drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <stdbool.h>
  10 #include <sys/queue.h>
  11
  12 #include <rte_common.h>
  13 #include <rte_ether.h>
  14 #include <ethdev_driver.h>
  15 #include <rte_eal_paging.h>
  16 #include <rte_flow.h>
  17 #include <rte_cycles.h>
  18 #include <rte_flow_driver.h>
  19 #include <rte_malloc.h>
  20 #include <rte_ip.h>
  21
  22 #include <mlx5_glue.h>
  23 #include <mlx5_devx_cmds.h>
  24 #include <mlx5_prm.h>
  25 #include <mlx5_malloc.h>
  26
  27 #include "mlx5_defs.h"
  28 #include "mlx5.h"
  29 #include "mlx5_flow.h"
  30 #include "mlx5_flow_os.h"
  31 #include "mlx5_rx.h"
  32 #include "mlx5_tx.h"
  33 #include "mlx5_common_os.h"
  34 #include "rte_pmd_mlx5.h"
  35
  36 struct tunnel_default_miss_ctx {
  37         uint16_t *queue;
  38         __extension__
  39         union {
  40                 struct rte_flow_action_rss action_rss;
  41                 struct rte_flow_action_queue miss_queue;
  42                 struct rte_flow_action_jump miss_jump;
  43                 uint8_t raw[0];
  44         };
  45 };
  46
  47 static int
  48 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
  49                              struct rte_flow *flow,
  50                              const struct rte_flow_attr *attr,
  51                              const struct rte_flow_action *app_actions,
  52                              uint32_t flow_idx,
  53                              const struct mlx5_flow_tunnel *tunnel,
  54                              struct tunnel_default_miss_ctx *ctx,
  55                              struct rte_flow_error *error);
  56 static struct mlx5_flow_tunnel *
  57 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id);
  58 static void
  59 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel);
  60 static uint32_t
  61 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
  62                                 const struct mlx5_flow_tunnel *tunnel,
  63                                 uint32_t group, uint32_t *table,
  64                                 struct rte_flow_error *error);
  65
  66 static struct mlx5_flow_workspace *mlx5_flow_push_thread_workspace(void);
  67 static void mlx5_flow_pop_thread_workspace(void);
  68
  69
  70 /** Device flow drivers. */
  71 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  72
  73 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  74
  75 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  76         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  77 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  78         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  79 #endif
  80         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  81         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  82 };
  83
  84 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */
  85 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \
  86         (const int []){ \
  87                 __VA_ARGS__, 0, \
  88         }
  89
  90 /** Node object of input graph for mlx5_flow_expand_rss(). */
  91 struct mlx5_flow_expand_node {
  92         const int *const next;
  93         /**<
  94          * List of next node indexes. Index 0 is interpreted as a terminator.
  95          */
  96         const enum rte_flow_item_type type;
  97         /**< Pattern item type of current node. */
  98         uint64_t rss_types;
  99         /**<
 100          * RSS types bit-field associated with this node
 101          * (see ETH_RSS_* definitions).
 102          */
 103         uint64_t node_flags;
 104         /**<
 105          *  Bit-fields that define how the node is used in the expansion.
 106          * (see MLX5_EXPANSION_NODE_* definitions).
 107          */
 108 };
 109
 110 /* Optional expand field. The expansion alg will not go deeper. */
 111 #define MLX5_EXPANSION_NODE_OPTIONAL (UINT64_C(1) << 0)
 112
 113 /* The node is not added implicitly as expansion to the flow pattern.
 114  * If the node type does not match the flow pattern item type, the
 115  * expansion alg will go deeper to its next items.
 116  * In the current implementation, the list of next nodes indexes can
 117  * have up to one node with this flag set and it has to be the last
 118  * node index (before the list terminator).
 119  */
 120 #define MLX5_EXPANSION_NODE_EXPLICIT (UINT64_C(1) << 1)
 121
 122 /** Object returned by mlx5_flow_expand_rss(). */
 123 struct mlx5_flow_expand_rss {
 124         uint32_t entries;
 125         /**< Number of entries @p patterns and @p priorities. */
 126         struct {
 127                 struct rte_flow_item *pattern; /**< Expanded pattern array. */
 128                 uint32_t priority; /**< Priority offset for each expansion. */
 129         } entry[];
 130 };
 131
 132 static void
 133 mlx5_dbg__print_pattern(const struct rte_flow_item *item);
 134
 135 static const struct mlx5_flow_expand_node *
 136 mlx5_flow_expand_rss_adjust_node(const struct rte_flow_item *pattern,
 137                 unsigned int item_idx,
 138                 const struct mlx5_flow_expand_node graph[],
 139                 const struct mlx5_flow_expand_node *node);
 140
 141 static bool
 142 mlx5_flow_is_rss_expandable_item(const struct rte_flow_item *item)
 143 {
 144         switch (item->type) {
 145         case RTE_FLOW_ITEM_TYPE_ETH:
 146         case RTE_FLOW_ITEM_TYPE_VLAN:
 147         case RTE_FLOW_ITEM_TYPE_IPV4:
 148         case RTE_FLOW_ITEM_TYPE_IPV6:
 149         case RTE_FLOW_ITEM_TYPE_UDP:
 150         case RTE_FLOW_ITEM_TYPE_TCP:
 151         case RTE_FLOW_ITEM_TYPE_VXLAN:
 152         case RTE_FLOW_ITEM_TYPE_NVGRE:
 153         case RTE_FLOW_ITEM_TYPE_GRE:
 154         case RTE_FLOW_ITEM_TYPE_GENEVE:
 155         case RTE_FLOW_ITEM_TYPE_MPLS:
 156         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 157         case RTE_FLOW_ITEM_TYPE_GRE_KEY:
 158         case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
 159         case RTE_FLOW_ITEM_TYPE_GTP:
 160                 return true;
 161         default:
 162                 break;
 163         }
 164         return false;
 165 }
 166
 167 static enum rte_flow_item_type
 168 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item)
 169 {
 170         enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID;
 171         uint16_t ether_type = 0;
 172         uint16_t ether_type_m;
 173         uint8_t ip_next_proto = 0;
 174         uint8_t ip_next_proto_m;
 175
 176         if (item == NULL || item->spec == NULL)
 177                 return ret;
 178         switch (item->type) {
 179         case RTE_FLOW_ITEM_TYPE_ETH:
 180                 if (item->mask)
 181                         ether_type_m = ((const struct rte_flow_item_eth *)
 182                                                 (item->mask))->type;
 183                 else
 184                         ether_type_m = rte_flow_item_eth_mask.type;
 185                 if (ether_type_m != RTE_BE16(0xFFFF))
 186                         break;
 187                 ether_type = ((const struct rte_flow_item_eth *)
 188                                 (item->spec))->type;
 189                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 190                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 191                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 192                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 193                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 194                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 195                 else
 196                         ret = RTE_FLOW_ITEM_TYPE_END;
 197                 break;
 198         case RTE_FLOW_ITEM_TYPE_VLAN:
 199                 if (item->mask)
 200                         ether_type_m = ((const struct rte_flow_item_vlan *)
 201                                                 (item->mask))->inner_type;
 202                 else
 203                         ether_type_m = rte_flow_item_vlan_mask.inner_type;
 204                 if (ether_type_m != RTE_BE16(0xFFFF))
 205                         break;
 206                 ether_type = ((const struct rte_flow_item_vlan *)
 207                                 (item->spec))->inner_type;
 208                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 209                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 210                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 211                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 212                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 213                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 214                 else
 215                         ret = RTE_FLOW_ITEM_TYPE_END;
 216                 break;
 217         case RTE_FLOW_ITEM_TYPE_IPV4:
 218                 if (item->mask)
 219                         ip_next_proto_m = ((const struct rte_flow_item_ipv4 *)
 220                                         (item->mask))->hdr.next_proto_id;
 221                 else
 222                         ip_next_proto_m =
 223                                 rte_flow_item_ipv4_mask.hdr.next_proto_id;
 224                 if (ip_next_proto_m != 0xFF)
 225                         break;
 226                 ip_next_proto = ((const struct rte_flow_item_ipv4 *)
 227                                 (item->spec))->hdr.next_proto_id;
 228                 if (ip_next_proto == IPPROTO_UDP)
 229                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 230                 else if (ip_next_proto == IPPROTO_TCP)
 231                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 232                 else if (ip_next_proto == IPPROTO_IP)
 233                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 234                 else if (ip_next_proto == IPPROTO_IPV6)
 235                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 236                 else
 237                         ret = RTE_FLOW_ITEM_TYPE_END;
 238                 break;
 239         case RTE_FLOW_ITEM_TYPE_IPV6:
 240                 if (item->mask)
 241                         ip_next_proto_m = ((const struct rte_flow_item_ipv6 *)
 242                                                 (item->mask))->hdr.proto;
 243                 else
 244                         ip_next_proto_m =
 245                                 rte_flow_item_ipv6_mask.hdr.proto;
 246                 if (ip_next_proto_m != 0xFF)
 247                         break;
 248                 ip_next_proto = ((const struct rte_flow_item_ipv6 *)
 249                                 (item->spec))->hdr.proto;
 250                 if (ip_next_proto == IPPROTO_UDP)
 251                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 252                 else if (ip_next_proto == IPPROTO_TCP)
 253                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 254                 else if (ip_next_proto == IPPROTO_IP)
 255                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 256                 else if (ip_next_proto == IPPROTO_IPV6)
 257                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 258                 else
 259                         ret = RTE_FLOW_ITEM_TYPE_END;
 260                 break;
 261         default:
 262                 ret = RTE_FLOW_ITEM_TYPE_VOID;
 263                 break;
 264         }
 265         return ret;
 266 }
 267
 268 static const int *
 269 mlx5_flow_expand_rss_skip_explicit(const struct mlx5_flow_expand_node graph[],
 270                 const int *next_node)
 271 {
 272         const struct mlx5_flow_expand_node *node = NULL;
 273         const int *next = next_node;
 274
 275         while (next && *next) {
 276                 /*
 277                  * Skip the nodes with the MLX5_EXPANSION_NODE_EXPLICIT
 278                  * flag set, because they were not found in the flow pattern.
 279                  */
 280                 node = &graph[*next];
 281                 if (!(node->node_flags & MLX5_EXPANSION_NODE_EXPLICIT))
 282                         break;
 283                 next = node->next;
 284         }
 285         return next;
 286 }
 287
 288 #define MLX5_RSS_EXP_ELT_N 16
 289
 290 /**
 291  * Expand RSS flows into several possible flows according to the RSS hash
 292  * fields requested and the driver capabilities.
 293  *
 294  * @param[out] buf
 295  *   Buffer to store the result expansion.
 296  * @param[in] size
 297  *   Buffer size in bytes. If 0, @p buf can be NULL.
 298  * @param[in] pattern
 299  *   User flow pattern.
 300  * @param[in] types
 301  *   RSS types to expand (see ETH_RSS_* definitions).
 302  * @param[in] graph
 303  *   Input graph to expand @p pattern according to @p types.
 304  * @param[in] graph_root_index
 305  *   Index of root node in @p graph, typically 0.
 306  *
 307  * @return
 308  *   A positive value representing the size of @p buf in bytes regardless of
 309  *   @p size on success, a negative errno value otherwise and rte_errno is
 310  *   set, the following errors are defined:
 311  *
 312  *   -E2BIG: graph-depth @p graph is too deep.
 313  *   -EINVAL: @p size has not enough space for expanded pattern.
 314  */
 315 static int
 316 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,
 317                      const struct rte_flow_item *pattern, uint64_t types,
 318                      const struct mlx5_flow_expand_node graph[],
 319                      int graph_root_index)
 320 {
 321         const struct rte_flow_item *item;
 322         const struct mlx5_flow_expand_node *node = &graph[graph_root_index];
 323         const int *next_node;
 324         const int *stack[MLX5_RSS_EXP_ELT_N];
 325         int stack_pos = 0;
 326         struct rte_flow_item flow_items[MLX5_RSS_EXP_ELT_N];
 327         unsigned int i, item_idx, last_expand_item_idx = 0;
 328         size_t lsize;
 329         size_t user_pattern_size = 0;
 330         void *addr = NULL;
 331         const struct mlx5_flow_expand_node *next = NULL;
 332         struct rte_flow_item missed_item;
 333         int missed = 0;
 334         int elt = 0;
 335         const struct rte_flow_item *last_expand_item = NULL;
 336
 337         memset(&missed_item, 0, sizeof(missed_item));
 338         lsize = offsetof(struct mlx5_flow_expand_rss, entry) +
 339                 MLX5_RSS_EXP_ELT_N * sizeof(buf->entry[0]);
 340         if (lsize > size)
 341                 return -EINVAL;
 342         buf->entry[0].priority = 0;
 343         buf->entry[0].pattern = (void *)&buf->entry[MLX5_RSS_EXP_ELT_N];
 344         buf->entries = 0;
 345         addr = buf->entry[0].pattern;
 346         for (item = pattern, item_idx = 0;
 347                         item->type != RTE_FLOW_ITEM_TYPE_END;
 348                         item++, item_idx++) {
 349                 if (!mlx5_flow_is_rss_expandable_item(item)) {
 350                         user_pattern_size += sizeof(*item);
 351                         continue;
 352                 }
 353                 last_expand_item = item;
 354                 last_expand_item_idx = item_idx;
 355                 i = 0;
 356                 while (node->next && node->next[i]) {
 357                         next = &graph[node->next[i]];
 358                         if (next->type == item->type)
 359                                 break;
 360                         if (next->node_flags & MLX5_EXPANSION_NODE_EXPLICIT) {
 361                                 node = next;
 362                                 i = 0;
 363                         } else {
 364                                 ++i;
 365                         }
 366                 }
 367                 if (next)
 368                         node = next;
 369                 user_pattern_size += sizeof(*item);
 370         }
 371         user_pattern_size += sizeof(*item); /* Handle END item. */
 372         lsize += user_pattern_size;
 373         if (lsize > size)
 374                 return -EINVAL;
 375         /* Copy the user pattern in the first entry of the buffer. */
 376         rte_memcpy(addr, pattern, user_pattern_size);
 377         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 378         buf->entries = 1;
 379         /* Start expanding. */
 380         memset(flow_items, 0, sizeof(flow_items));
 381         user_pattern_size -= sizeof(*item);
 382         /*
 383          * Check if the last valid item has spec set, need complete pattern,
 384          * and the pattern can be used for expansion.
 385          */
 386         missed_item.type = mlx5_flow_expand_rss_item_complete(last_expand_item);
 387         if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) {
 388                 /* Item type END indicates expansion is not required. */
 389                 return lsize;
 390         }
 391         if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) {
 392                 next = NULL;
 393                 missed = 1;
 394                 for (i = 0; node->next && node->next[i]; ++i) {
 395                         next = &graph[node->next[i]];
 396                         if (next->type == missed_item.type) {
 397                                 flow_items[0].type = missed_item.type;
 398                                 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
 399                                 break;
 400                         }
 401                         next = NULL;
 402                 }
 403         }
 404         if (next && missed) {
 405                 elt = 2; /* missed item + item end. */
 406                 node = next;
 407                 lsize += elt * sizeof(*item) + user_pattern_size;
 408                 if (lsize > size)
 409                         return -EINVAL;
 410                 if (node->rss_types & types) {
 411                         buf->entry[buf->entries].priority = 1;
 412                         buf->entry[buf->entries].pattern = addr;
 413                         buf->entries++;
 414                         rte_memcpy(addr, buf->entry[0].pattern,
 415                                    user_pattern_size);
 416                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 417                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
 418                         addr = (void *)(((uintptr_t)addr) +
 419                                         elt * sizeof(*item));
 420                 }
 421         } else if (last_expand_item != NULL) {
 422                 node = mlx5_flow_expand_rss_adjust_node(pattern,
 423                                 last_expand_item_idx, graph, node);
 424         }
 425         memset(flow_items, 0, sizeof(flow_items));
 426         next_node = mlx5_flow_expand_rss_skip_explicit(graph,
 427                         node->next);
 428         stack[stack_pos] = next_node;
 429         node = next_node ? &graph[*next_node] : NULL;
 430         while (node) {
 431                 flow_items[stack_pos].type = node->type;
 432                 if (node->rss_types & types) {
 433                         size_t n;
 434                         /*
 435                          * compute the number of items to copy from the
 436                          * expansion and copy it.
 437                          * When the stack_pos is 0, there are 1 element in it,
 438                          * plus the addition END item.
 439                          */
 440                         elt = stack_pos + 2;
 441                         flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END;
 442                         lsize += elt * sizeof(*item) + user_pattern_size;
 443                         if (lsize > size)
 444                                 return -EINVAL;
 445                         n = elt * sizeof(*item);
 446                         buf->entry[buf->entries].priority =
 447                                 stack_pos + 1 + missed;
 448                         buf->entry[buf->entries].pattern = addr;
 449                         buf->entries++;
 450                         rte_memcpy(addr, buf->entry[0].pattern,
 451                                    user_pattern_size);
 452                         addr = (void *)(((uintptr_t)addr) +
 453                                         user_pattern_size);
 454                         rte_memcpy(addr, &missed_item,
 455                                    missed * sizeof(*item));
 456                         addr = (void *)(((uintptr_t)addr) +
 457                                 missed * sizeof(*item));
 458                         rte_memcpy(addr, flow_items, n);
 459                         addr = (void *)(((uintptr_t)addr) + n);
 460                 }
 461                 /* Go deeper. */
 462                 if (!(node->node_flags & MLX5_EXPANSION_NODE_OPTIONAL) &&
 463                                 node->next) {
 464                         next_node = mlx5_flow_expand_rss_skip_explicit(graph,
 465                                         node->next);
 466                         if (stack_pos++ == MLX5_RSS_EXP_ELT_N) {
 467                                 rte_errno = E2BIG;
 468                                 return -rte_errno;
 469                         }
 470                         stack[stack_pos] = next_node;
 471                 } else if (*(next_node + 1)) {
 472                         /* Follow up with the next possibility. */
 473                         next_node = mlx5_flow_expand_rss_skip_explicit(graph,
 474                                         ++next_node);
 475                 } else if (!stack_pos) {
 476                         /*
 477                          * Completing the traverse over the different paths.
 478                          * The next_node is advanced to the terminator.
 479                          */
 480                         ++next_node;
 481                 } else {
 482                         /* Move to the next path. */
 483                         while (stack_pos) {
 484                                 next_node = stack[--stack_pos];
 485                                 next_node++;
 486                                 if (*next_node)
 487                                         break;
 488                         }
 489                         next_node = mlx5_flow_expand_rss_skip_explicit(graph,
 490                                         next_node);
 491                         stack[stack_pos] = next_node;
 492                 }
 493                 node = next_node && *next_node ? &graph[*next_node] : NULL;
 494         };
 495         return lsize;
 496 }
 497
 498 enum mlx5_expansion {
 499         MLX5_EXPANSION_ROOT,
 500         MLX5_EXPANSION_ROOT_OUTER,
 501         MLX5_EXPANSION_OUTER_ETH,
 502         MLX5_EXPANSION_OUTER_VLAN,
 503         MLX5_EXPANSION_OUTER_IPV4,
 504         MLX5_EXPANSION_OUTER_IPV4_UDP,
 505         MLX5_EXPANSION_OUTER_IPV4_TCP,
 506         MLX5_EXPANSION_OUTER_IPV6,
 507         MLX5_EXPANSION_OUTER_IPV6_UDP,
 508         MLX5_EXPANSION_OUTER_IPV6_TCP,
 509         MLX5_EXPANSION_VXLAN,
 510         MLX5_EXPANSION_STD_VXLAN,
 511         MLX5_EXPANSION_L3_VXLAN,
 512         MLX5_EXPANSION_VXLAN_GPE,
 513         MLX5_EXPANSION_GRE,
 514         MLX5_EXPANSION_NVGRE,
 515         MLX5_EXPANSION_GRE_KEY,
 516         MLX5_EXPANSION_MPLS,
 517         MLX5_EXPANSION_ETH,
 518         MLX5_EXPANSION_VLAN,
 519         MLX5_EXPANSION_IPV4,
 520         MLX5_EXPANSION_IPV4_UDP,
 521         MLX5_EXPANSION_IPV4_TCP,
 522         MLX5_EXPANSION_IPV6,
 523         MLX5_EXPANSION_IPV6_UDP,
 524         MLX5_EXPANSION_IPV6_TCP,
 525         MLX5_EXPANSION_IPV6_FRAG_EXT,
 526         MLX5_EXPANSION_GTP
 527 };
 528
 529 /** Supported expansion of items. */
 530 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = {
 531         [MLX5_EXPANSION_ROOT] = {
 532                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 533                                                   MLX5_EXPANSION_IPV4,
 534                                                   MLX5_EXPANSION_IPV6),
 535                 .type = RTE_FLOW_ITEM_TYPE_END,
 536         },
 537         [MLX5_EXPANSION_ROOT_OUTER] = {
 538                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
 539                                                   MLX5_EXPANSION_OUTER_IPV4,
 540                                                   MLX5_EXPANSION_OUTER_IPV6),
 541                 .type = RTE_FLOW_ITEM_TYPE_END,
 542         },
 543         [MLX5_EXPANSION_OUTER_ETH] = {
 544                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 545                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 546                 .rss_types = 0,
 547         },
 548         [MLX5_EXPANSION_OUTER_VLAN] = {
 549                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 550                                                   MLX5_EXPANSION_OUTER_IPV6),
 551                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 552                 .node_flags = MLX5_EXPANSION_NODE_EXPLICIT,
 553         },
 554         [MLX5_EXPANSION_OUTER_IPV4] = {
 555                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 556                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 557                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 558                          MLX5_EXPANSION_GRE,
 559                          MLX5_EXPANSION_NVGRE,
 560                          MLX5_EXPANSION_IPV4,
 561                          MLX5_EXPANSION_IPV6),
 562                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 563                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 564                         ETH_RSS_NONFRAG_IPV4_OTHER,
 565         },
 566         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 567                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 568                                                   MLX5_EXPANSION_VXLAN_GPE,
 569                                                   MLX5_EXPANSION_MPLS,
 570                                                   MLX5_EXPANSION_GTP),
 571                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 572                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 573         },
 574         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 575                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 576                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 577         },
 578         [MLX5_EXPANSION_OUTER_IPV6] = {
 579                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 580                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 581                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 582                          MLX5_EXPANSION_IPV4,
 583                          MLX5_EXPANSION_IPV6,
 584                          MLX5_EXPANSION_GRE,
 585                          MLX5_EXPANSION_NVGRE),
 586                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 587                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 588                         ETH_RSS_NONFRAG_IPV6_OTHER,
 589         },
 590         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 591                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 592                                                   MLX5_EXPANSION_VXLAN_GPE,
 593                                                   MLX5_EXPANSION_MPLS,
 594                                                   MLX5_EXPANSION_GTP),
 595                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 596                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 597         },
 598         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 599                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 600                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 601         },
 602         [MLX5_EXPANSION_VXLAN] = {
 603                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 604                                                   MLX5_EXPANSION_IPV4,
 605                                                   MLX5_EXPANSION_IPV6),
 606                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 607         },
 608         [MLX5_EXPANSION_STD_VXLAN] = {
 609                         .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
 610                                         .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 611         },
 612         [MLX5_EXPANSION_L3_VXLAN] = {
 613                         .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 614                                         MLX5_EXPANSION_IPV6),
 615                                         .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 616         },
 617         [MLX5_EXPANSION_VXLAN_GPE] = {
 618                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 619                                                   MLX5_EXPANSION_IPV4,
 620                                                   MLX5_EXPANSION_IPV6),
 621                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 622         },
 623         [MLX5_EXPANSION_GRE] = {
 624                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 625                                                   MLX5_EXPANSION_IPV6,
 626                                                   MLX5_EXPANSION_GRE_KEY,
 627                                                   MLX5_EXPANSION_MPLS),
 628                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 629         },
 630         [MLX5_EXPANSION_GRE_KEY] = {
 631                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 632                                                   MLX5_EXPANSION_IPV6,
 633                                                   MLX5_EXPANSION_MPLS),
 634                 .type = RTE_FLOW_ITEM_TYPE_GRE_KEY,
 635                 .node_flags = MLX5_EXPANSION_NODE_OPTIONAL,
 636         },
 637         [MLX5_EXPANSION_NVGRE] = {
 638                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
 639                 .type = RTE_FLOW_ITEM_TYPE_NVGRE,
 640         },
 641         [MLX5_EXPANSION_MPLS] = {
 642                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 643                                                   MLX5_EXPANSION_IPV6,
 644                                                   MLX5_EXPANSION_ETH),
 645                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 646                 .node_flags = MLX5_EXPANSION_NODE_OPTIONAL,
 647         },
 648         [MLX5_EXPANSION_ETH] = {
 649                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 650                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 651         },
 652         [MLX5_EXPANSION_VLAN] = {
 653                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 654                                                   MLX5_EXPANSION_IPV6),
 655                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 656                 .node_flags = MLX5_EXPANSION_NODE_EXPLICIT,
 657         },
 658         [MLX5_EXPANSION_IPV4] = {
 659                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 660                                                   MLX5_EXPANSION_IPV4_TCP),
 661                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 662                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 663                         ETH_RSS_NONFRAG_IPV4_OTHER,
 664         },
 665         [MLX5_EXPANSION_IPV4_UDP] = {
 666                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 667                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 668         },
 669         [MLX5_EXPANSION_IPV4_TCP] = {
 670                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 671                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 672         },
 673         [MLX5_EXPANSION_IPV6] = {
 674                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 675                                                   MLX5_EXPANSION_IPV6_TCP,
 676                                                   MLX5_EXPANSION_IPV6_FRAG_EXT),
 677                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 678                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 679                         ETH_RSS_NONFRAG_IPV6_OTHER,
 680         },
 681         [MLX5_EXPANSION_IPV6_UDP] = {
 682                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 683                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 684         },
 685         [MLX5_EXPANSION_IPV6_TCP] = {
 686                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 687                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 688         },
 689         [MLX5_EXPANSION_IPV6_FRAG_EXT] = {
 690                 .type = RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT,
 691         },
 692         [MLX5_EXPANSION_GTP] = {
 693                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 694                                                   MLX5_EXPANSION_IPV6),
 695                 .type = RTE_FLOW_ITEM_TYPE_GTP,
 696         },
 697 };
 698
 699 static struct rte_flow_action_handle *
 700 mlx5_action_handle_create(struct rte_eth_dev *dev,
 701                           const struct rte_flow_indir_action_conf *conf,
 702                           const struct rte_flow_action *action,
 703                           struct rte_flow_error *error);
 704 static int mlx5_action_handle_destroy
 705                                 (struct rte_eth_dev *dev,
 706                                  struct rte_flow_action_handle *handle,
 707                                  struct rte_flow_error *error);
 708 static int mlx5_action_handle_update
 709                                 (struct rte_eth_dev *dev,
 710                                  struct rte_flow_action_handle *handle,
 711                                  const void *update,
 712                                  struct rte_flow_error *error);
 713 static int mlx5_action_handle_query
 714                                 (struct rte_eth_dev *dev,
 715                                  const struct rte_flow_action_handle *handle,
 716                                  void *data,
 717                                  struct rte_flow_error *error);
 718 static int
 719 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
 720                     struct rte_flow_tunnel *app_tunnel,
 721                     struct rte_flow_action **actions,
 722                     uint32_t *num_of_actions,
 723                     struct rte_flow_error *error);
 724 static int
 725 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
 726                        struct rte_flow_tunnel *app_tunnel,
 727                        struct rte_flow_item **items,
 728                        uint32_t *num_of_items,
 729                        struct rte_flow_error *error);
 730 static int
 731 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
 732                               struct rte_flow_item *pmd_items,
 733                               uint32_t num_items, struct rte_flow_error *err);
 734 static int
 735 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
 736                                 struct rte_flow_action *pmd_actions,
 737                                 uint32_t num_actions,
 738                                 struct rte_flow_error *err);
 739 static int
 740 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
 741                                   struct rte_mbuf *m,
 742                                   struct rte_flow_restore_info *info,
 743                                   struct rte_flow_error *err);
 744
 745 static const struct rte_flow_ops mlx5_flow_ops = {
 746         .validate = mlx5_flow_validate,
 747         .create = mlx5_flow_create,
 748         .destroy = mlx5_flow_destroy,
 749         .flush = mlx5_flow_flush,
 750         .isolate = mlx5_flow_isolate,
 751         .query = mlx5_flow_query,
 752         .dev_dump = mlx5_flow_dev_dump,
 753         .get_aged_flows = mlx5_flow_get_aged_flows,
 754         .action_handle_create = mlx5_action_handle_create,
 755         .action_handle_destroy = mlx5_action_handle_destroy,
 756         .action_handle_update = mlx5_action_handle_update,
 757         .action_handle_query = mlx5_action_handle_query,
 758         .tunnel_decap_set = mlx5_flow_tunnel_decap_set,
 759         .tunnel_match = mlx5_flow_tunnel_match,
 760         .tunnel_action_decap_release = mlx5_flow_tunnel_action_release,
 761         .tunnel_item_release = mlx5_flow_tunnel_item_release,
 762         .get_restore_info = mlx5_flow_tunnel_get_restore_info,
 763 };
 764
 765 /* Tunnel information. */
 766 struct mlx5_flow_tunnel_info {
 767         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 768         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 769 };
 770
 771 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 772         {
 773                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 774                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 775         },
 776         {
 777                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
 778                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
 779         },
 780         {
 781                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 782                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 783         },
 784         {
 785                 .tunnel = MLX5_FLOW_LAYER_GRE,
 786                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 787         },
 788         {
 789                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 790                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 791         },
 792         {
 793                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 794                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 795         },
 796         {
 797                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 798                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 799         },
 800         {
 801                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 802                 .ptype = RTE_PTYPE_TUNNEL_IP,
 803         },
 804         {
 805                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 806                 .ptype = RTE_PTYPE_TUNNEL_IP,
 807         },
 808         {
 809                 .tunnel = MLX5_FLOW_LAYER_GTP,
 810                 .ptype = RTE_PTYPE_TUNNEL_GTPU,
 811         },
 812 };
 813
 814
 815
 816 /**
 817  * Translate tag ID to register.
 818  *
 819  * @param[in] dev
 820  *   Pointer to the Ethernet device structure.
 821  * @param[in] feature
 822  *   The feature that request the register.
 823  * @param[in] id
 824  *   The request register ID.
 825  * @param[out] error
 826  *   Error description in case of any.
 827  *
 828  * @return
 829  *   The request register on success, a negative errno
 830  *   value otherwise and rte_errno is set.
 831  */
 832 int
 833 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 834                      enum mlx5_feature_name feature,
 835                      uint32_t id,
 836                      struct rte_flow_error *error)
 837 {
 838         struct mlx5_priv *priv = dev->data->dev_private;
 839         struct mlx5_dev_config *config = &priv->config;
 840         enum modify_reg start_reg;
 841         bool skip_mtr_reg = false;
 842
 843         switch (feature) {
 844         case MLX5_HAIRPIN_RX:
 845                 return REG_B;
 846         case MLX5_HAIRPIN_TX:
 847                 return REG_A;
 848         case MLX5_METADATA_RX:
 849                 switch (config->dv_xmeta_en) {
 850                 case MLX5_XMETA_MODE_LEGACY:
 851                         return REG_B;
 852                 case MLX5_XMETA_MODE_META16:
 853                         return REG_C_0;
 854                 case MLX5_XMETA_MODE_META32:
 855                         return REG_C_1;
 856                 }
 857                 break;
 858         case MLX5_METADATA_TX:
 859                 return REG_A;
 860         case MLX5_METADATA_FDB:
 861                 switch (config->dv_xmeta_en) {
 862                 case MLX5_XMETA_MODE_LEGACY:
 863                         return REG_NON;
 864                 case MLX5_XMETA_MODE_META16:
 865                         return REG_C_0;
 866                 case MLX5_XMETA_MODE_META32:
 867                         return REG_C_1;
 868                 }
 869                 break;
 870         case MLX5_FLOW_MARK:
 871                 switch (config->dv_xmeta_en) {
 872                 case MLX5_XMETA_MODE_LEGACY:
 873                         return REG_NON;
 874                 case MLX5_XMETA_MODE_META16:
 875                         return REG_C_1;
 876                 case MLX5_XMETA_MODE_META32:
 877                         return REG_C_0;
 878                 }
 879                 break;
 880         case MLX5_MTR_ID:
 881                 /*
 882                  * If meter color and meter id share one register, flow match
 883                  * should use the meter color register for match.
 884                  */
 885                 if (priv->mtr_reg_share)
 886                         return priv->mtr_color_reg;
 887                 else
 888                         return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 889                                REG_C_3;
 890         case MLX5_MTR_COLOR:
 891         case MLX5_ASO_FLOW_HIT:
 892         case MLX5_ASO_CONNTRACK:
 893                 /* All features use the same REG_C. */
 894                 MLX5_ASSERT(priv->mtr_color_reg != REG_NON);
 895                 return priv->mtr_color_reg;
 896         case MLX5_COPY_MARK:
 897                 /*
 898                  * Metadata COPY_MARK register using is in meter suffix sub
 899                  * flow while with meter. It's safe to share the same register.
 900                  */
 901                 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
 902         case MLX5_APP_TAG:
 903                 /*
 904                  * If meter is enable, it will engage the register for color
 905                  * match and flow match. If meter color match is not using the
 906                  * REG_C_2, need to skip the REG_C_x be used by meter color
 907                  * match.
 908                  * If meter is disable, free to use all available registers.
 909                  */
 910                 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 911                             (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
 912                 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
 913                 if (id > (uint32_t)(REG_C_7 - start_reg))
 914                         return rte_flow_error_set(error, EINVAL,
 915                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 916                                                   NULL, "invalid tag id");
 917                 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON)
 918                         return rte_flow_error_set(error, ENOTSUP,
 919                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 920                                                   NULL, "unsupported tag id");
 921                 /*
 922                  * This case means meter is using the REG_C_x great than 2.
 923                  * Take care not to conflict with meter color REG_C_x.
 924                  * If the available index REG_C_y >= REG_C_x, skip the
 925                  * color register.
 926                  */
 927                 if (skip_mtr_reg && config->flow_mreg_c
 928                     [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
 929                         if (id >= (uint32_t)(REG_C_7 - start_reg))
 930                                 return rte_flow_error_set(error, EINVAL,
 931                                                        RTE_FLOW_ERROR_TYPE_ITEM,
 932                                                         NULL, "invalid tag id");
 933                         if (config->flow_mreg_c
 934                             [id + 1 + start_reg - REG_C_0] != REG_NON)
 935                                 return config->flow_mreg_c
 936                                                [id + 1 + start_reg - REG_C_0];
 937                         return rte_flow_error_set(error, ENOTSUP,
 938                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 939                                                   NULL, "unsupported tag id");
 940                 }
 941                 return config->flow_mreg_c[id + start_reg - REG_C_0];
 942         }
 943         MLX5_ASSERT(false);
 944         return rte_flow_error_set(error, EINVAL,
 945                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 946                                   NULL, "invalid feature name");
 947 }
 948
 949 /**
 950  * Check extensive flow metadata register support.
 951  *
 952  * @param dev
 953  *   Pointer to rte_eth_dev structure.
 954  *
 955  * @return
 956  *   True if device supports extensive flow metadata register, otherwise false.
 957  */
 958 bool
 959 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
 960 {
 961         struct mlx5_priv *priv = dev->data->dev_private;
 962         struct mlx5_dev_config *config = &priv->config;
 963
 964         /*
 965          * Having available reg_c can be regarded inclusively as supporting
 966          * extensive flow metadata register, which could mean,
 967          * - metadata register copy action by modify header.
 968          * - 16 modify header actions is supported.
 969          * - reg_c's are preserved across different domain (FDB and NIC) on
 970          *   packet loopback by flow lookup miss.
 971          */
 972         return config->flow_mreg_c[2] != REG_NON;
 973 }
 974
 975 /**
 976  * Get the lowest priority.
 977  *
 978  * @param[in] dev
 979  *   Pointer to the Ethernet device structure.
 980  * @param[in] attributes
 981  *   Pointer to device flow rule attributes.
 982  *
 983  * @return
 984  *   The value of lowest priority of flow.
 985  */
 986 uint32_t
 987 mlx5_get_lowest_priority(struct rte_eth_dev *dev,
 988                           const struct rte_flow_attr *attr)
 989 {
 990         struct mlx5_priv *priv = dev->data->dev_private;
 991
 992         if (!attr->group && !attr->transfer)
 993                 return priv->config.flow_prio - 2;
 994         return MLX5_NON_ROOT_FLOW_MAX_PRIO - 1;
 995 }
 996
 997 /**
 998  * Calculate matcher priority of the flow.
 999  *
1000  * @param[in] dev
1001  *   Pointer to the Ethernet device structure.
1002  * @param[in] attr
1003  *   Pointer to device flow rule attributes.
1004  * @param[in] subpriority
1005  *   The priority based on the items.
1006  * @return
1007  *   The matcher priority of the flow.
1008  */
1009 uint16_t
1010 mlx5_get_matcher_priority(struct rte_eth_dev *dev,
1011                           const struct rte_flow_attr *attr,
1012                           uint32_t subpriority)
1013 {
1014         uint16_t priority = (uint16_t)attr->priority;
1015         struct mlx5_priv *priv = dev->data->dev_private;
1016
1017         if (!attr->group && !attr->transfer) {
1018                 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
1019                         priority = priv->config.flow_prio - 1;
1020                 return mlx5_os_flow_adjust_priority(dev, priority, subpriority);
1021         }
1022         if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
1023                 priority = MLX5_NON_ROOT_FLOW_MAX_PRIO;
1024         return priority * 3 + subpriority;
1025 }
1026
1027 /**
1028  * Verify the @p item specifications (spec, last, mask) are compatible with the
1029  * NIC capabilities.
1030  *
1031  * @param[in] item
1032  *   Item specification.
1033  * @param[in] mask
1034  *   @p item->mask or flow default bit-masks.
1035  * @param[in] nic_mask
1036  *   Bit-masks covering supported fields by the NIC to compare with user mask.
1037  * @param[in] size
1038  *   Bit-masks size in bytes.
1039  * @param[in] range_accepted
1040  *   True if range of values is accepted for specific fields, false otherwise.
1041  * @param[out] error
1042  *   Pointer to error structure.
1043  *
1044  * @return
1045  *   0 on success, a negative errno value otherwise and rte_errno is set.
1046  */
1047 int
1048 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
1049                           const uint8_t *mask,
1050                           const uint8_t *nic_mask,
1051                           unsigned int size,
1052                           bool range_accepted,
1053                           struct rte_flow_error *error)
1054 {
1055         unsigned int i;
1056
1057         MLX5_ASSERT(nic_mask);
1058         for (i = 0; i < size; ++i)
1059                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
1060                         return rte_flow_error_set(error, ENOTSUP,
1061                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1062                                                   item,
1063                                                   "mask enables non supported"
1064                                                   " bits");
1065         if (!item->spec && (item->mask || item->last))
1066                 return rte_flow_error_set(error, EINVAL,
1067                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1068                                           "mask/last without a spec is not"
1069                                           " supported");
1070         if (item->spec && item->last && !range_accepted) {
1071                 uint8_t spec[size];
1072                 uint8_t last[size];
1073                 unsigned int i;
1074                 int ret;
1075
1076                 for (i = 0; i < size; ++i) {
1077                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
1078                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
1079                 }
1080                 ret = memcmp(spec, last, size);
1081                 if (ret != 0)
1082                         return rte_flow_error_set(error, EINVAL,
1083                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1084                                                   item,
1085                                                   "range is not valid");
1086         }
1087         return 0;
1088 }
1089
1090 /**
1091  * Adjust the hash fields according to the @p flow information.
1092  *
1093  * @param[in] dev_flow.
1094  *   Pointer to the mlx5_flow.
1095  * @param[in] tunnel
1096  *   1 when the hash field is for a tunnel item.
1097  * @param[in] layer_types
1098  *   ETH_RSS_* types.
1099  * @param[in] hash_fields
1100  *   Item hash fields.
1101  *
1102  * @return
1103  *   The hash fields that should be used.
1104  */
1105 uint64_t
1106 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc,
1107                             int tunnel __rte_unused, uint64_t layer_types,
1108                             uint64_t hash_fields)
1109 {
1110 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1111         int rss_request_inner = rss_desc->level >= 2;
1112
1113         /* Check RSS hash level for tunnel. */
1114         if (tunnel && rss_request_inner)
1115                 hash_fields |= IBV_RX_HASH_INNER;
1116         else if (tunnel || rss_request_inner)
1117                 return 0;
1118 #endif
1119         /* Check if requested layer matches RSS hash fields. */
1120         if (!(rss_desc->types & layer_types))
1121                 return 0;
1122         return hash_fields;
1123 }
1124
1125 /**
1126  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
1127  * if several tunnel rules are used on this queue, the tunnel ptype will be
1128  * cleared.
1129  *
1130  * @param rxq_ctrl
1131  *   Rx queue to update.
1132  */
1133 static void
1134 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
1135 {
1136         unsigned int i;
1137         uint32_t tunnel_ptype = 0;
1138
1139         /* Look up for the ptype to use. */
1140         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
1141                 if (!rxq_ctrl->flow_tunnels_n[i])
1142                         continue;
1143                 if (!tunnel_ptype) {
1144                         tunnel_ptype = tunnels_info[i].ptype;
1145                 } else {
1146                         tunnel_ptype = 0;
1147                         break;
1148                 }
1149         }
1150         rxq_ctrl->rxq.tunnel = tunnel_ptype;
1151 }
1152
1153 /**
1154  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
1155  * flow.
1156  *
1157  * @param[in] dev
1158  *   Pointer to the Ethernet device structure.
1159  * @param[in] dev_handle
1160  *   Pointer to device flow handle structure.
1161  */
1162 void
1163 flow_drv_rxq_flags_set(struct rte_eth_dev *dev,
1164                        struct mlx5_flow_handle *dev_handle)
1165 {
1166         struct mlx5_priv *priv = dev->data->dev_private;
1167         const int mark = dev_handle->mark;
1168         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1169         struct mlx5_ind_table_obj *ind_tbl = NULL;
1170         unsigned int i;
1171
1172         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1173                 struct mlx5_hrxq *hrxq;
1174
1175                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1176                               dev_handle->rix_hrxq);
1177                 if (hrxq)
1178                         ind_tbl = hrxq->ind_table;
1179         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1180                 struct mlx5_shared_action_rss *shared_rss;
1181
1182                 shared_rss = mlx5_ipool_get
1183                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1184                          dev_handle->rix_srss);
1185                 if (shared_rss)
1186                         ind_tbl = shared_rss->ind_tbl;
1187         }
1188         if (!ind_tbl)
1189                 return;
1190         for (i = 0; i != ind_tbl->queues_n; ++i) {
1191                 int idx = ind_tbl->queues[i];
1192                 struct mlx5_rxq_ctrl *rxq_ctrl =
1193                         container_of((*priv->rxqs)[idx],
1194                                      struct mlx5_rxq_ctrl, rxq);
1195
1196                 /*
1197                  * To support metadata register copy on Tx loopback,
1198                  * this must be always enabled (metadata may arive
1199                  * from other port - not from local flows only.
1200                  */
1201                 if (priv->config.dv_flow_en &&
1202                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1203                     mlx5_flow_ext_mreg_supported(dev)) {
1204                         rxq_ctrl->rxq.mark = 1;
1205                         rxq_ctrl->flow_mark_n = 1;
1206                 } else if (mark) {
1207                         rxq_ctrl->rxq.mark = 1;
1208                         rxq_ctrl->flow_mark_n++;
1209                 }
1210                 if (tunnel) {
1211                         unsigned int j;
1212
1213                         /* Increase the counter matching the flow. */
1214                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1215                                 if ((tunnels_info[j].tunnel &
1216                                      dev_handle->layers) ==
1217                                     tunnels_info[j].tunnel) {
1218                                         rxq_ctrl->flow_tunnels_n[j]++;
1219                                         break;
1220                                 }
1221                         }
1222                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1223                 }
1224         }
1225 }
1226
1227 /**
1228  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
1229  *
1230  * @param[in] dev
1231  *   Pointer to the Ethernet device structure.
1232  * @param[in] flow
1233  *   Pointer to flow structure.
1234  */
1235 static void
1236 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
1237 {
1238         struct mlx5_priv *priv = dev->data->dev_private;
1239         uint32_t handle_idx;
1240         struct mlx5_flow_handle *dev_handle;
1241
1242         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1243                        handle_idx, dev_handle, next)
1244                 flow_drv_rxq_flags_set(dev, dev_handle);
1245 }
1246
1247 /**
1248  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1249  * device flow if no other flow uses it with the same kind of request.
1250  *
1251  * @param dev
1252  *   Pointer to Ethernet device.
1253  * @param[in] dev_handle
1254  *   Pointer to the device flow handle structure.
1255  */
1256 static void
1257 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev,
1258                         struct mlx5_flow_handle *dev_handle)
1259 {
1260         struct mlx5_priv *priv = dev->data->dev_private;
1261         const int mark = dev_handle->mark;
1262         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1263         struct mlx5_ind_table_obj *ind_tbl = NULL;
1264         unsigned int i;
1265
1266         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1267                 struct mlx5_hrxq *hrxq;
1268
1269                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1270                               dev_handle->rix_hrxq);
1271                 if (hrxq)
1272                         ind_tbl = hrxq->ind_table;
1273         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1274                 struct mlx5_shared_action_rss *shared_rss;
1275
1276                 shared_rss = mlx5_ipool_get
1277                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1278                          dev_handle->rix_srss);
1279                 if (shared_rss)
1280                         ind_tbl = shared_rss->ind_tbl;
1281         }
1282         if (!ind_tbl)
1283                 return;
1284         MLX5_ASSERT(dev->data->dev_started);
1285         for (i = 0; i != ind_tbl->queues_n; ++i) {
1286                 int idx = ind_tbl->queues[i];
1287                 struct mlx5_rxq_ctrl *rxq_ctrl =
1288                         container_of((*priv->rxqs)[idx],
1289                                      struct mlx5_rxq_ctrl, rxq);
1290
1291                 if (priv->config.dv_flow_en &&
1292                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1293                     mlx5_flow_ext_mreg_supported(dev)) {
1294                         rxq_ctrl->rxq.mark = 1;
1295                         rxq_ctrl->flow_mark_n = 1;
1296                 } else if (mark) {
1297                         rxq_ctrl->flow_mark_n--;
1298                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
1299                 }
1300                 if (tunnel) {
1301                         unsigned int j;
1302
1303                         /* Decrease the counter matching the flow. */
1304                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1305                                 if ((tunnels_info[j].tunnel &
1306                                      dev_handle->layers) ==
1307                                     tunnels_info[j].tunnel) {
1308                                         rxq_ctrl->flow_tunnels_n[j]--;
1309                                         break;
1310                                 }
1311                         }
1312                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1313                 }
1314         }
1315 }
1316
1317 /**
1318  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1319  * @p flow if no other flow uses it with the same kind of request.
1320  *
1321  * @param dev
1322  *   Pointer to Ethernet device.
1323  * @param[in] flow
1324  *   Pointer to the flow.
1325  */
1326 static void
1327 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
1328 {
1329         struct mlx5_priv *priv = dev->data->dev_private;
1330         uint32_t handle_idx;
1331         struct mlx5_flow_handle *dev_handle;
1332
1333         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1334                        handle_idx, dev_handle, next)
1335                 flow_drv_rxq_flags_trim(dev, dev_handle);
1336 }
1337
1338 /**
1339  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
1340  *
1341  * @param dev
1342  *   Pointer to Ethernet device.
1343  */
1344 static void
1345 flow_rxq_flags_clear(struct rte_eth_dev *dev)
1346 {
1347         struct mlx5_priv *priv = dev->data->dev_private;
1348         unsigned int i;
1349
1350         for (i = 0; i != priv->rxqs_n; ++i) {
1351                 struct mlx5_rxq_ctrl *rxq_ctrl;
1352                 unsigned int j;
1353
1354                 if (!(*priv->rxqs)[i])
1355                         continue;
1356                 rxq_ctrl = container_of((*priv->rxqs)[i],
1357                                         struct mlx5_rxq_ctrl, rxq);
1358                 rxq_ctrl->flow_mark_n = 0;
1359                 rxq_ctrl->rxq.mark = 0;
1360                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
1361                         rxq_ctrl->flow_tunnels_n[j] = 0;
1362                 rxq_ctrl->rxq.tunnel = 0;
1363         }
1364 }
1365
1366 /**
1367  * Set the Rx queue dynamic metadata (mask and offset) for a flow
1368  *
1369  * @param[in] dev
1370  *   Pointer to the Ethernet device structure.
1371  */
1372 void
1373 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev)
1374 {
1375         struct mlx5_priv *priv = dev->data->dev_private;
1376         struct mlx5_rxq_data *data;
1377         unsigned int i;
1378
1379         for (i = 0; i != priv->rxqs_n; ++i) {
1380                 if (!(*priv->rxqs)[i])
1381                         continue;
1382                 data = (*priv->rxqs)[i];
1383                 if (!rte_flow_dynf_metadata_avail()) {
1384                         data->dynf_meta = 0;
1385                         data->flow_meta_mask = 0;
1386                         data->flow_meta_offset = -1;
1387                         data->flow_meta_port_mask = 0;
1388                 } else {
1389                         data->dynf_meta = 1;
1390                         data->flow_meta_mask = rte_flow_dynf_metadata_mask;
1391                         data->flow_meta_offset = rte_flow_dynf_metadata_offs;
1392                         data->flow_meta_port_mask = priv->sh->dv_meta_mask;
1393                 }
1394         }
1395 }
1396
1397 /*
1398  * return a pointer to the desired action in the list of actions.
1399  *
1400  * @param[in] actions
1401  *   The list of actions to search the action in.
1402  * @param[in] action
1403  *   The action to find.
1404  *
1405  * @return
1406  *   Pointer to the action in the list, if found. NULL otherwise.
1407  */
1408 const struct rte_flow_action *
1409 mlx5_flow_find_action(const struct rte_flow_action *actions,
1410                       enum rte_flow_action_type action)
1411 {
1412         if (actions == NULL)
1413                 return NULL;
1414         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
1415                 if (actions->type == action)
1416                         return actions;
1417         return NULL;
1418 }
1419
1420 /*
1421  * Validate the flag action.
1422  *
1423  * @param[in] action_flags
1424  *   Bit-fields that holds the actions detected until now.
1425  * @param[in] attr
1426  *   Attributes of flow that includes this action.
1427  * @param[out] error
1428  *   Pointer to error structure.
1429  *
1430  * @return
1431  *   0 on success, a negative errno value otherwise and rte_errno is set.
1432  */
1433 int
1434 mlx5_flow_validate_action_flag(uint64_t action_flags,
1435                                const struct rte_flow_attr *attr,
1436                                struct rte_flow_error *error)
1437 {
1438         if (action_flags & MLX5_FLOW_ACTION_MARK)
1439                 return rte_flow_error_set(error, EINVAL,
1440                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1441                                           "can't mark and flag in same flow");
1442         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1443                 return rte_flow_error_set(error, EINVAL,
1444                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1445                                           "can't have 2 flag"
1446                                           " actions in same flow");
1447         if (attr->egress)
1448                 return rte_flow_error_set(error, ENOTSUP,
1449                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1450                                           "flag action not supported for "
1451                                           "egress");
1452         return 0;
1453 }
1454
1455 /*
1456  * Validate the mark action.
1457  *
1458  * @param[in] action
1459  *   Pointer to the queue action.
1460  * @param[in] action_flags
1461  *   Bit-fields that holds the actions detected until now.
1462  * @param[in] attr
1463  *   Attributes of flow that includes this action.
1464  * @param[out] error
1465  *   Pointer to error structure.
1466  *
1467  * @return
1468  *   0 on success, a negative errno value otherwise and rte_errno is set.
1469  */
1470 int
1471 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
1472                                uint64_t action_flags,
1473                                const struct rte_flow_attr *attr,
1474                                struct rte_flow_error *error)
1475 {
1476         const struct rte_flow_action_mark *mark = action->conf;
1477
1478         if (!mark)
1479                 return rte_flow_error_set(error, EINVAL,
1480                                           RTE_FLOW_ERROR_TYPE_ACTION,
1481                                           action,
1482                                           "configuration cannot be null");
1483         if (mark->id >= MLX5_FLOW_MARK_MAX)
1484                 return rte_flow_error_set(error, EINVAL,
1485                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1486                                           &mark->id,
1487                                           "mark id must in 0 <= id < "
1488                                           RTE_STR(MLX5_FLOW_MARK_MAX));
1489         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1490                 return rte_flow_error_set(error, EINVAL,
1491                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1492                                           "can't flag and mark in same flow");
1493         if (action_flags & MLX5_FLOW_ACTION_MARK)
1494                 return rte_flow_error_set(error, EINVAL,
1495                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1496                                           "can't have 2 mark actions in same"
1497                                           " flow");
1498         if (attr->egress)
1499                 return rte_flow_error_set(error, ENOTSUP,
1500                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1501                                           "mark action not supported for "
1502                                           "egress");
1503         return 0;
1504 }
1505
1506 /*
1507  * Validate the drop action.
1508  *
1509  * @param[in] action_flags
1510  *   Bit-fields that holds the actions detected until now.
1511  * @param[in] attr
1512  *   Attributes of flow that includes this action.
1513  * @param[out] error
1514  *   Pointer to error structure.
1515  *
1516  * @return
1517  *   0 on success, a negative errno value otherwise and rte_errno is set.
1518  */
1519 int
1520 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1521                                const struct rte_flow_attr *attr,
1522                                struct rte_flow_error *error)
1523 {
1524         if (attr->egress)
1525                 return rte_flow_error_set(error, ENOTSUP,
1526                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1527                                           "drop action not supported for "
1528                                           "egress");
1529         return 0;
1530 }
1531
1532 /*
1533  * Validate the queue action.
1534  *
1535  * @param[in] action
1536  *   Pointer to the queue action.
1537  * @param[in] action_flags
1538  *   Bit-fields that holds the actions detected until now.
1539  * @param[in] dev
1540  *   Pointer to the Ethernet device structure.
1541  * @param[in] attr
1542  *   Attributes of flow that includes this action.
1543  * @param[out] error
1544  *   Pointer to error structure.
1545  *
1546  * @return
1547  *   0 on success, a negative errno value otherwise and rte_errno is set.
1548  */
1549 int
1550 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1551                                 uint64_t action_flags,
1552                                 struct rte_eth_dev *dev,
1553                                 const struct rte_flow_attr *attr,
1554                                 struct rte_flow_error *error)
1555 {
1556         struct mlx5_priv *priv = dev->data->dev_private;
1557         const struct rte_flow_action_queue *queue = action->conf;
1558
1559         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1560                 return rte_flow_error_set(error, EINVAL,
1561                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1562                                           "can't have 2 fate actions in"
1563                                           " same flow");
1564         if (!priv->rxqs_n)
1565                 return rte_flow_error_set(error, EINVAL,
1566                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1567                                           NULL, "No Rx queues configured");
1568         if (queue->index >= priv->rxqs_n)
1569                 return rte_flow_error_set(error, EINVAL,
1570                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1571                                           &queue->index,
1572                                           "queue index out of range");
1573         if (!(*priv->rxqs)[queue->index])
1574                 return rte_flow_error_set(error, EINVAL,
1575                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1576                                           &queue->index,
1577                                           "queue is not configured");
1578         if (attr->egress)
1579                 return rte_flow_error_set(error, ENOTSUP,
1580                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1581                                           "queue action not supported for "
1582                                           "egress");
1583         return 0;
1584 }
1585
1586 /*
1587  * Validate the rss action.
1588  *
1589  * @param[in] dev
1590  *   Pointer to the Ethernet device structure.
1591  * @param[in] action
1592  *   Pointer to the queue action.
1593  * @param[out] error
1594  *   Pointer to error structure.
1595  *
1596  * @return
1597  *   0 on success, a negative errno value otherwise and rte_errno is set.
1598  */
1599 int
1600 mlx5_validate_action_rss(struct rte_eth_dev *dev,
1601                          const struct rte_flow_action *action,
1602                          struct rte_flow_error *error)
1603 {
1604         struct mlx5_priv *priv = dev->data->dev_private;
1605         const struct rte_flow_action_rss *rss = action->conf;
1606         enum mlx5_rxq_type rxq_type = MLX5_RXQ_TYPE_UNDEFINED;
1607         unsigned int i;
1608
1609         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1610             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1611                 return rte_flow_error_set(error, ENOTSUP,
1612                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1613                                           &rss->func,
1614                                           "RSS hash function not supported");
1615 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1616         if (rss->level > 2)
1617 #else
1618         if (rss->level > 1)
1619 #endif
1620                 return rte_flow_error_set(error, ENOTSUP,
1621                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1622                                           &rss->level,
1623                                           "tunnel RSS is not supported");
1624         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1625         if (rss->key_len == 0 && rss->key != NULL)
1626                 return rte_flow_error_set(error, ENOTSUP,
1627                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1628                                           &rss->key_len,
1629                                           "RSS hash key length 0");
1630         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1631                 return rte_flow_error_set(error, ENOTSUP,
1632                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1633                                           &rss->key_len,
1634                                           "RSS hash key too small");
1635         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1636                 return rte_flow_error_set(error, ENOTSUP,
1637                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1638                                           &rss->key_len,
1639                                           "RSS hash key too large");
1640         if (rss->queue_num > priv->config.ind_table_max_size)
1641                 return rte_flow_error_set(error, ENOTSUP,
1642                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1643                                           &rss->queue_num,
1644                                           "number of queues too large");
1645         if (rss->types & MLX5_RSS_HF_MASK)
1646                 return rte_flow_error_set(error, ENOTSUP,
1647                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1648                                           &rss->types,
1649                                           "some RSS protocols are not"
1650                                           " supported");
1651         if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) &&
1652             !(rss->types & ETH_RSS_IP))
1653                 return rte_flow_error_set(error, EINVAL,
1654                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1655                                           "L3 partial RSS requested but L3 RSS"
1656                                           " type not specified");
1657         if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) &&
1658             !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP)))
1659                 return rte_flow_error_set(error, EINVAL,
1660                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1661                                           "L4 partial RSS requested but L4 RSS"
1662                                           " type not specified");
1663         if (!priv->rxqs_n)
1664                 return rte_flow_error_set(error, EINVAL,
1665                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1666                                           NULL, "No Rx queues configured");
1667         if (!rss->queue_num)
1668                 return rte_flow_error_set(error, EINVAL,
1669                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1670                                           NULL, "No queues configured");
1671         for (i = 0; i != rss->queue_num; ++i) {
1672                 struct mlx5_rxq_ctrl *rxq_ctrl;
1673
1674                 if (rss->queue[i] >= priv->rxqs_n)
1675                         return rte_flow_error_set
1676                                 (error, EINVAL,
1677                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1678                                  &rss->queue[i], "queue index out of range");
1679                 if (!(*priv->rxqs)[rss->queue[i]])
1680                         return rte_flow_error_set
1681                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1682                                  &rss->queue[i], "queue is not configured");
1683                 rxq_ctrl = container_of((*priv->rxqs)[rss->queue[i]],
1684                                         struct mlx5_rxq_ctrl, rxq);
1685                 if (i == 0)
1686                         rxq_type = rxq_ctrl->type;
1687                 if (rxq_type != rxq_ctrl->type)
1688                         return rte_flow_error_set
1689                                 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1690                                  &rss->queue[i],
1691                                  "combining hairpin and regular RSS queues is not supported");
1692         }
1693         return 0;
1694 }
1695
1696 /*
1697  * Validate the rss action.
1698  *
1699  * @param[in] action
1700  *   Pointer to the queue action.
1701  * @param[in] action_flags
1702  *   Bit-fields that holds the actions detected until now.
1703  * @param[in] dev
1704  *   Pointer to the Ethernet device structure.
1705  * @param[in] attr
1706  *   Attributes of flow that includes this action.
1707  * @param[in] item_flags
1708  *   Items that were detected.
1709  * @param[out] error
1710  *   Pointer to error structure.
1711  *
1712  * @return
1713  *   0 on success, a negative errno value otherwise and rte_errno is set.
1714  */
1715 int
1716 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1717                               uint64_t action_flags,
1718                               struct rte_eth_dev *dev,
1719                               const struct rte_flow_attr *attr,
1720                               uint64_t item_flags,
1721                               struct rte_flow_error *error)
1722 {
1723         const struct rte_flow_action_rss *rss = action->conf;
1724         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1725         int ret;
1726
1727         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1728                 return rte_flow_error_set(error, EINVAL,
1729                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1730                                           "can't have 2 fate actions"
1731                                           " in same flow");
1732         ret = mlx5_validate_action_rss(dev, action, error);
1733         if (ret)
1734                 return ret;
1735         if (attr->egress)
1736                 return rte_flow_error_set(error, ENOTSUP,
1737                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1738                                           "rss action not supported for "
1739                                           "egress");
1740         if (rss->level > 1 && !tunnel)
1741                 return rte_flow_error_set(error, EINVAL,
1742                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1743                                           "inner RSS is not supported for "
1744                                           "non-tunnel flows");
1745         if ((item_flags & MLX5_FLOW_LAYER_ECPRI) &&
1746             !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) {
1747                 return rte_flow_error_set(error, EINVAL,
1748                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1749                                           "RSS on eCPRI is not supported now");
1750         }
1751         if ((item_flags & MLX5_FLOW_LAYER_MPLS) &&
1752             !(item_flags &
1753               (MLX5_FLOW_LAYER_INNER_L2 | MLX5_FLOW_LAYER_INNER_L3)) &&
1754             rss->level > 1)
1755                 return rte_flow_error_set(error, EINVAL,
1756                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
1757                                           "MPLS inner RSS needs to specify inner L2/L3 items after MPLS in pattern");
1758         return 0;
1759 }
1760
1761 /*
1762  * Validate the default miss action.
1763  *
1764  * @param[in] action_flags
1765  *   Bit-fields that holds the actions detected until now.
1766  * @param[out] error
1767  *   Pointer to error structure.
1768  *
1769  * @return
1770  *   0 on success, a negative errno value otherwise and rte_errno is set.
1771  */
1772 int
1773 mlx5_flow_validate_action_default_miss(uint64_t action_flags,
1774                                 const struct rte_flow_attr *attr,
1775                                 struct rte_flow_error *error)
1776 {
1777         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1778                 return rte_flow_error_set(error, EINVAL,
1779                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1780                                           "can't have 2 fate actions in"
1781                                           " same flow");
1782         if (attr->egress)
1783                 return rte_flow_error_set(error, ENOTSUP,
1784                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1785                                           "default miss action not supported "
1786                                           "for egress");
1787         if (attr->group)
1788                 return rte_flow_error_set(error, ENOTSUP,
1789                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
1790                                           "only group 0 is supported");
1791         if (attr->transfer)
1792                 return rte_flow_error_set(error, ENOTSUP,
1793                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1794                                           NULL, "transfer is not supported");
1795         return 0;
1796 }
1797
1798 /*
1799  * Validate the count action.
1800  *
1801  * @param[in] dev
1802  *   Pointer to the Ethernet device structure.
1803  * @param[in] attr
1804  *   Attributes of flow that includes this action.
1805  * @param[out] error
1806  *   Pointer to error structure.
1807  *
1808  * @return
1809  *   0 on success, a negative errno value otherwise and rte_errno is set.
1810  */
1811 int
1812 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1813                                 const struct rte_flow_attr *attr,
1814                                 struct rte_flow_error *error)
1815 {
1816         if (attr->egress)
1817                 return rte_flow_error_set(error, ENOTSUP,
1818                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1819                                           "count action not supported for "
1820                                           "egress");
1821         return 0;
1822 }
1823
1824 /*
1825  * Validate the ASO CT action.
1826  *
1827  * @param[in] dev
1828  *   Pointer to the Ethernet device structure.
1829  * @param[in] conntrack
1830  *   Pointer to the CT action profile.
1831  * @param[out] error
1832  *   Pointer to error structure.
1833  *
1834  * @return
1835  *   0 on success, a negative errno value otherwise and rte_errno is set.
1836  */
1837 int
1838 mlx5_validate_action_ct(struct rte_eth_dev *dev,
1839                         const struct rte_flow_action_conntrack *conntrack,
1840                         struct rte_flow_error *error)
1841 {
1842         RTE_SET_USED(dev);
1843
1844         if (conntrack->state > RTE_FLOW_CONNTRACK_STATE_TIME_WAIT)
1845                 return rte_flow_error_set(error, EINVAL,
1846                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1847                                           "Invalid CT state");
1848         if (conntrack->last_index > RTE_FLOW_CONNTRACK_FLAG_RST)
1849                 return rte_flow_error_set(error, EINVAL,
1850                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1851                                           "Invalid last TCP packet flag");
1852         return 0;
1853 }
1854
1855 /**
1856  * Verify the @p attributes will be correctly understood by the NIC and store
1857  * them in the @p flow if everything is correct.
1858  *
1859  * @param[in] dev
1860  *   Pointer to the Ethernet device structure.
1861  * @param[in] attributes
1862  *   Pointer to flow attributes
1863  * @param[out] error
1864  *   Pointer to error structure.
1865  *
1866  * @return
1867  *   0 on success, a negative errno value otherwise and rte_errno is set.
1868  */
1869 int
1870 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1871                               const struct rte_flow_attr *attributes,
1872                               struct rte_flow_error *error)
1873 {
1874         struct mlx5_priv *priv = dev->data->dev_private;
1875         uint32_t priority_max = priv->config.flow_prio - 1;
1876
1877         if (attributes->group)
1878                 return rte_flow_error_set(error, ENOTSUP,
1879                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1880                                           NULL, "groups is not supported");
1881         if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
1882             attributes->priority >= priority_max)
1883                 return rte_flow_error_set(error, ENOTSUP,
1884                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1885                                           NULL, "priority out of range");
1886         if (attributes->egress)
1887                 return rte_flow_error_set(error, ENOTSUP,
1888                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1889                                           "egress is not supported");
1890         if (attributes->transfer && !priv->config.dv_esw_en)
1891                 return rte_flow_error_set(error, ENOTSUP,
1892                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1893                                           NULL, "transfer is not supported");
1894         if (!attributes->ingress)
1895                 return rte_flow_error_set(error, EINVAL,
1896                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1897                                           NULL,
1898                                           "ingress attribute is mandatory");
1899         return 0;
1900 }
1901
1902 /**
1903  * Validate ICMP6 item.
1904  *
1905  * @param[in] item
1906  *   Item specification.
1907  * @param[in] item_flags
1908  *   Bit-fields that holds the items detected until now.
1909  * @param[in] ext_vlan_sup
1910  *   Whether extended VLAN features are supported or not.
1911  * @param[out] error
1912  *   Pointer to error structure.
1913  *
1914  * @return
1915  *   0 on success, a negative errno value otherwise and rte_errno is set.
1916  */
1917 int
1918 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1919                                uint64_t item_flags,
1920                                uint8_t target_protocol,
1921                                struct rte_flow_error *error)
1922 {
1923         const struct rte_flow_item_icmp6 *mask = item->mask;
1924         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1925         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1926                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1927         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1928                                       MLX5_FLOW_LAYER_OUTER_L4;
1929         int ret;
1930
1931         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1932                 return rte_flow_error_set(error, EINVAL,
1933                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1934                                           "protocol filtering not compatible"
1935                                           " with ICMP6 layer");
1936         if (!(item_flags & l3m))
1937                 return rte_flow_error_set(error, EINVAL,
1938                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1939                                           "IPv6 is mandatory to filter on"
1940                                           " ICMP6");
1941         if (item_flags & l4m)
1942                 return rte_flow_error_set(error, EINVAL,
1943                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1944                                           "multiple L4 layers not supported");
1945         if (!mask)
1946                 mask = &rte_flow_item_icmp6_mask;
1947         ret = mlx5_flow_item_acceptable
1948                 (item, (const uint8_t *)mask,
1949                  (const uint8_t *)&rte_flow_item_icmp6_mask,
1950                  sizeof(struct rte_flow_item_icmp6),
1951                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1952         if (ret < 0)
1953                 return ret;
1954         return 0;
1955 }
1956
1957 /**
1958  * Validate ICMP item.
1959  *
1960  * @param[in] item
1961  *   Item specification.
1962  * @param[in] item_flags
1963  *   Bit-fields that holds the items detected until now.
1964  * @param[out] error
1965  *   Pointer to error structure.
1966  *
1967  * @return
1968  *   0 on success, a negative errno value otherwise and rte_errno is set.
1969  */
1970 int
1971 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1972                              uint64_t item_flags,
1973                              uint8_t target_protocol,
1974                              struct rte_flow_error *error)
1975 {
1976         const struct rte_flow_item_icmp *mask = item->mask;
1977         const struct rte_flow_item_icmp nic_mask = {
1978                 .hdr.icmp_type = 0xff,
1979                 .hdr.icmp_code = 0xff,
1980                 .hdr.icmp_ident = RTE_BE16(0xffff),
1981                 .hdr.icmp_seq_nb = RTE_BE16(0xffff),
1982         };
1983         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1984         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1985                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1986         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1987                                       MLX5_FLOW_LAYER_OUTER_L4;
1988         int ret;
1989
1990         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1991                 return rte_flow_error_set(error, EINVAL,
1992                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1993                                           "protocol filtering not compatible"
1994                                           " with ICMP layer");
1995         if (!(item_flags & l3m))
1996                 return rte_flow_error_set(error, EINVAL,
1997                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1998                                           "IPv4 is mandatory to filter"
1999                                           " on ICMP");
2000         if (item_flags & l4m)
2001                 return rte_flow_error_set(error, EINVAL,
2002                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2003                                           "multiple L4 layers not supported");
2004         if (!mask)
2005                 mask = &nic_mask;
2006         ret = mlx5_flow_item_acceptable
2007                 (item, (const uint8_t *)mask,
2008                  (const uint8_t *)&nic_mask,
2009                  sizeof(struct rte_flow_item_icmp),
2010                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2011         if (ret < 0)
2012                 return ret;
2013         return 0;
2014 }
2015
2016 /**
2017  * Validate Ethernet item.
2018  *
2019  * @param[in] item
2020  *   Item specification.
2021  * @param[in] item_flags
2022  *   Bit-fields that holds the items detected until now.
2023  * @param[out] error
2024  *   Pointer to error structure.
2025  *
2026  * @return
2027  *   0 on success, a negative errno value otherwise and rte_errno is set.
2028  */
2029 int
2030 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
2031                             uint64_t item_flags, bool ext_vlan_sup,
2032                             struct rte_flow_error *error)
2033 {
2034         const struct rte_flow_item_eth *mask = item->mask;
2035         const struct rte_flow_item_eth nic_mask = {
2036                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
2037                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
2038                 .type = RTE_BE16(0xffff),
2039                 .has_vlan = ext_vlan_sup ? 1 : 0,
2040         };
2041         int ret;
2042         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2043         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
2044                                        MLX5_FLOW_LAYER_OUTER_L2;
2045
2046         if (item_flags & ethm)
2047                 return rte_flow_error_set(error, ENOTSUP,
2048                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2049                                           "multiple L2 layers not supported");
2050         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
2051             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
2052                 return rte_flow_error_set(error, EINVAL,
2053                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2054                                           "L2 layer should not follow "
2055                                           "L3 layers");
2056         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
2057             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
2058                 return rte_flow_error_set(error, EINVAL,
2059                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2060                                           "L2 layer should not follow VLAN");
2061         if (item_flags & MLX5_FLOW_LAYER_GTP)
2062                 return rte_flow_error_set(error, EINVAL,
2063                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2064                                           "L2 layer should not follow GTP");
2065         if (!mask)
2066                 mask = &rte_flow_item_eth_mask;
2067         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2068                                         (const uint8_t *)&nic_mask,
2069                                         sizeof(struct rte_flow_item_eth),
2070                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2071         return ret;
2072 }
2073
2074 /**
2075  * Validate VLAN item.
2076  *
2077  * @param[in] item
2078  *   Item specification.
2079  * @param[in] item_flags
2080  *   Bit-fields that holds the items detected until now.
2081  * @param[in] dev
2082  *   Ethernet device flow is being created on.
2083  * @param[out] error
2084  *   Pointer to error structure.
2085  *
2086  * @return
2087  *   0 on success, a negative errno value otherwise and rte_errno is set.
2088  */
2089 int
2090 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
2091                              uint64_t item_flags,
2092                              struct rte_eth_dev *dev,
2093                              struct rte_flow_error *error)
2094 {
2095         const struct rte_flow_item_vlan *spec = item->spec;
2096         const struct rte_flow_item_vlan *mask = item->mask;
2097         const struct rte_flow_item_vlan nic_mask = {
2098                 .tci = RTE_BE16(UINT16_MAX),
2099                 .inner_type = RTE_BE16(UINT16_MAX),
2100         };
2101         uint16_t vlan_tag = 0;
2102         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2103         int ret;
2104         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2105                                         MLX5_FLOW_LAYER_INNER_L4) :
2106                                        (MLX5_FLOW_LAYER_OUTER_L3 |
2107                                         MLX5_FLOW_LAYER_OUTER_L4);
2108         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2109                                         MLX5_FLOW_LAYER_OUTER_VLAN;
2110
2111         if (item_flags & vlanm)
2112                 return rte_flow_error_set(error, EINVAL,
2113                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2114                                           "multiple VLAN layers not supported");
2115         else if ((item_flags & l34m) != 0)
2116                 return rte_flow_error_set(error, EINVAL,
2117                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2118                                           "VLAN cannot follow L3/L4 layer");
2119         if (!mask)
2120                 mask = &rte_flow_item_vlan_mask;
2121         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2122                                         (const uint8_t *)&nic_mask,
2123                                         sizeof(struct rte_flow_item_vlan),
2124                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2125         if (ret)
2126                 return ret;
2127         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2128                 struct mlx5_priv *priv = dev->data->dev_private;
2129
2130                 if (priv->vmwa_context) {
2131                         /*
2132                          * Non-NULL context means we have a virtual machine
2133                          * and SR-IOV enabled, we have to create VLAN interface
2134                          * to make hypervisor to setup E-Switch vport
2135                          * context correctly. We avoid creating the multiple
2136                          * VLAN interfaces, so we cannot support VLAN tag mask.
2137                          */
2138                         return rte_flow_error_set(error, EINVAL,
2139                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2140                                                   item,
2141                                                   "VLAN tag mask is not"
2142                                                   " supported in virtual"
2143                                                   " environment");
2144                 }
2145         }
2146         if (spec) {
2147                 vlan_tag = spec->tci;
2148                 vlan_tag &= mask->tci;
2149         }
2150         /*
2151          * From verbs perspective an empty VLAN is equivalent
2152          * to a packet without VLAN layer.
2153          */
2154         if (!vlan_tag)
2155                 return rte_flow_error_set(error, EINVAL,
2156                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2157                                           item->spec,
2158                                           "VLAN cannot be empty");
2159         return 0;
2160 }
2161
2162 /**
2163  * Validate IPV4 item.
2164  *
2165  * @param[in] item
2166  *   Item specification.
2167  * @param[in] item_flags
2168  *   Bit-fields that holds the items detected until now.
2169  * @param[in] last_item
2170  *   Previous validated item in the pattern items.
2171  * @param[in] ether_type
2172  *   Type in the ethernet layer header (including dot1q).
2173  * @param[in] acc_mask
2174  *   Acceptable mask, if NULL default internal default mask
2175  *   will be used to check whether item fields are supported.
2176  * @param[in] range_accepted
2177  *   True if range of values is accepted for specific fields, false otherwise.
2178  * @param[out] error
2179  *   Pointer to error structure.
2180  *
2181  * @return
2182  *   0 on success, a negative errno value otherwise and rte_errno is set.
2183  */
2184 int
2185 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
2186                              uint64_t item_flags,
2187                              uint64_t last_item,
2188                              uint16_t ether_type,
2189                              const struct rte_flow_item_ipv4 *acc_mask,
2190                              bool range_accepted,
2191                              struct rte_flow_error *error)
2192 {
2193         const struct rte_flow_item_ipv4 *mask = item->mask;
2194         const struct rte_flow_item_ipv4 *spec = item->spec;
2195         const struct rte_flow_item_ipv4 nic_mask = {
2196                 .hdr = {
2197                         .src_addr = RTE_BE32(0xffffffff),
2198                         .dst_addr = RTE_BE32(0xffffffff),
2199                         .type_of_service = 0xff,
2200                         .next_proto_id = 0xff,
2201                 },
2202         };
2203         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2204         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2205                                       MLX5_FLOW_LAYER_OUTER_L3;
2206         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2207                                       MLX5_FLOW_LAYER_OUTER_L4;
2208         int ret;
2209         uint8_t next_proto = 0xFF;
2210         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2211                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2212                                   MLX5_FLOW_LAYER_INNER_VLAN);
2213
2214         if ((last_item & l2_vlan) && ether_type &&
2215             ether_type != RTE_ETHER_TYPE_IPV4)
2216                 return rte_flow_error_set(error, EINVAL,
2217                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2218                                           "IPv4 cannot follow L2/VLAN layer "
2219                                           "which ether type is not IPv4");
2220         if (item_flags & MLX5_FLOW_LAYER_TUNNEL) {
2221                 if (mask && spec)
2222                         next_proto = mask->hdr.next_proto_id &
2223                                      spec->hdr.next_proto_id;
2224                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2225                         return rte_flow_error_set(error, EINVAL,
2226                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2227                                                   item,
2228                                                   "multiple tunnel "
2229                                                   "not supported");
2230         }
2231         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
2232                 return rte_flow_error_set(error, EINVAL,
2233                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2234                                           "wrong tunnel type - IPv6 specified "
2235                                           "but IPv4 item provided");
2236         if (item_flags & l3m)
2237                 return rte_flow_error_set(error, ENOTSUP,
2238                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2239                                           "multiple L3 layers not supported");
2240         else if (item_flags & l4m)
2241                 return rte_flow_error_set(error, EINVAL,
2242                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2243                                           "L3 cannot follow an L4 layer.");
2244         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2245                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2246                 return rte_flow_error_set(error, EINVAL,
2247                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2248                                           "L3 cannot follow an NVGRE layer.");
2249         if (!mask)
2250                 mask = &rte_flow_item_ipv4_mask;
2251         else if (mask->hdr.next_proto_id != 0 &&
2252                  mask->hdr.next_proto_id != 0xff)
2253                 return rte_flow_error_set(error, EINVAL,
2254                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2255                                           "partial mask is not supported"
2256                                           " for protocol");
2257         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2258                                         acc_mask ? (const uint8_t *)acc_mask
2259                                                  : (const uint8_t *)&nic_mask,
2260                                         sizeof(struct rte_flow_item_ipv4),
2261                                         range_accepted, error);
2262         if (ret < 0)
2263                 return ret;
2264         return 0;
2265 }
2266
2267 /**
2268  * Validate IPV6 item.
2269  *
2270  * @param[in] item
2271  *   Item specification.
2272  * @param[in] item_flags
2273  *   Bit-fields that holds the items detected until now.
2274  * @param[in] last_item
2275  *   Previous validated item in the pattern items.
2276  * @param[in] ether_type
2277  *   Type in the ethernet layer header (including dot1q).
2278  * @param[in] acc_mask
2279  *   Acceptable mask, if NULL default internal default mask
2280  *   will be used to check whether item fields are supported.
2281  * @param[out] error
2282  *   Pointer to error structure.
2283  *
2284  * @return
2285  *   0 on success, a negative errno value otherwise and rte_errno is set.
2286  */
2287 int
2288 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
2289                              uint64_t item_flags,
2290                              uint64_t last_item,
2291                              uint16_t ether_type,
2292                              const struct rte_flow_item_ipv6 *acc_mask,
2293                              struct rte_flow_error *error)
2294 {
2295         const struct rte_flow_item_ipv6 *mask = item->mask;
2296         const struct rte_flow_item_ipv6 *spec = item->spec;
2297         const struct rte_flow_item_ipv6 nic_mask = {
2298                 .hdr = {
2299                         .src_addr =
2300                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2301                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2302                         .dst_addr =
2303                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2304                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2305                         .vtc_flow = RTE_BE32(0xffffffff),
2306                         .proto = 0xff,
2307                 },
2308         };
2309         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2310         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2311                                       MLX5_FLOW_LAYER_OUTER_L3;
2312         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2313                                       MLX5_FLOW_LAYER_OUTER_L4;
2314         int ret;
2315         uint8_t next_proto = 0xFF;
2316         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2317                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2318                                   MLX5_FLOW_LAYER_INNER_VLAN);
2319
2320         if ((last_item & l2_vlan) && ether_type &&
2321             ether_type != RTE_ETHER_TYPE_IPV6)
2322                 return rte_flow_error_set(error, EINVAL,
2323                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2324                                           "IPv6 cannot follow L2/VLAN layer "
2325                                           "which ether type is not IPv6");
2326         if (mask && mask->hdr.proto == UINT8_MAX && spec)
2327                 next_proto = spec->hdr.proto;
2328         if (item_flags & MLX5_FLOW_LAYER_TUNNEL) {
2329                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2330                         return rte_flow_error_set(error, EINVAL,
2331                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2332                                                   item,
2333                                                   "multiple tunnel "
2334                                                   "not supported");
2335         }
2336         if (next_proto == IPPROTO_HOPOPTS  ||
2337             next_proto == IPPROTO_ROUTING  ||
2338             next_proto == IPPROTO_FRAGMENT ||
2339             next_proto == IPPROTO_ESP      ||
2340             next_proto == IPPROTO_AH       ||
2341             next_proto == IPPROTO_DSTOPTS)
2342                 return rte_flow_error_set(error, EINVAL,
2343                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2344                                           "IPv6 proto (next header) should "
2345                                           "not be set as extension header");
2346         if (item_flags & MLX5_FLOW_LAYER_IPIP)
2347                 return rte_flow_error_set(error, EINVAL,
2348                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2349                                           "wrong tunnel type - IPv4 specified "
2350                                           "but IPv6 item provided");
2351         if (item_flags & l3m)
2352                 return rte_flow_error_set(error, ENOTSUP,
2353                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2354                                           "multiple L3 layers not supported");
2355         else if (item_flags & l4m)
2356                 return rte_flow_error_set(error, EINVAL,
2357                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2358                                           "L3 cannot follow an L4 layer.");
2359         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2360                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2361                 return rte_flow_error_set(error, EINVAL,
2362                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2363                                           "L3 cannot follow an NVGRE layer.");
2364         if (!mask)
2365                 mask = &rte_flow_item_ipv6_mask;
2366         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2367                                         acc_mask ? (const uint8_t *)acc_mask
2368                                                  : (const uint8_t *)&nic_mask,
2369                                         sizeof(struct rte_flow_item_ipv6),
2370                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2371         if (ret < 0)
2372                 return ret;
2373         return 0;
2374 }
2375
2376 /**
2377  * Validate UDP item.
2378  *
2379  * @param[in] item
2380  *   Item specification.
2381  * @param[in] item_flags
2382  *   Bit-fields that holds the items detected until now.
2383  * @param[in] target_protocol
2384  *   The next protocol in the previous item.
2385  * @param[in] flow_mask
2386  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
2387  * @param[out] error
2388  *   Pointer to error structure.
2389  *
2390  * @return
2391  *   0 on success, a negative errno value otherwise and rte_errno is set.
2392  */
2393 int
2394 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
2395                             uint64_t item_flags,
2396                             uint8_t target_protocol,
2397                             struct rte_flow_error *error)
2398 {
2399         const struct rte_flow_item_udp *mask = item->mask;
2400         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2401         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2402                                       MLX5_FLOW_LAYER_OUTER_L3;
2403         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2404                                       MLX5_FLOW_LAYER_OUTER_L4;
2405         int ret;
2406
2407         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
2408                 return rte_flow_error_set(error, EINVAL,
2409                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2410                                           "protocol filtering not compatible"
2411                                           " with UDP layer");
2412         if (!(item_flags & l3m))
2413                 return rte_flow_error_set(error, EINVAL,
2414                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2415                                           "L3 is mandatory to filter on L4");
2416         if (item_flags & l4m)
2417                 return rte_flow_error_set(error, EINVAL,
2418                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2419                                           "multiple L4 layers not supported");
2420         if (!mask)
2421                 mask = &rte_flow_item_udp_mask;
2422         ret = mlx5_flow_item_acceptable
2423                 (item, (const uint8_t *)mask,
2424                  (const uint8_t *)&rte_flow_item_udp_mask,
2425                  sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2426                  error);
2427         if (ret < 0)
2428                 return ret;
2429         return 0;
2430 }
2431
2432 /**
2433  * Validate TCP item.
2434  *
2435  * @param[in] item
2436  *   Item specification.
2437  * @param[in] item_flags
2438  *   Bit-fields that holds the items detected until now.
2439  * @param[in] target_protocol
2440  *   The next protocol in the previous item.
2441  * @param[out] error
2442  *   Pointer to error structure.
2443  *
2444  * @return
2445  *   0 on success, a negative errno value otherwise and rte_errno is set.
2446  */
2447 int
2448 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
2449                             uint64_t item_flags,
2450                             uint8_t target_protocol,
2451                             const struct rte_flow_item_tcp *flow_mask,
2452                             struct rte_flow_error *error)
2453 {
2454         const struct rte_flow_item_tcp *mask = item->mask;
2455         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2456         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2457                                       MLX5_FLOW_LAYER_OUTER_L3;
2458         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2459                                       MLX5_FLOW_LAYER_OUTER_L4;
2460         int ret;
2461
2462         MLX5_ASSERT(flow_mask);
2463         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
2464                 return rte_flow_error_set(error, EINVAL,
2465                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2466                                           "protocol filtering not compatible"
2467                                           " with TCP layer");
2468         if (!(item_flags & l3m))
2469                 return rte_flow_error_set(error, EINVAL,
2470                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2471                                           "L3 is mandatory to filter on L4");
2472         if (item_flags & l4m)
2473                 return rte_flow_error_set(error, EINVAL,
2474                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2475                                           "multiple L4 layers not supported");
2476         if (!mask)
2477                 mask = &rte_flow_item_tcp_mask;
2478         ret = mlx5_flow_item_acceptable
2479                 (item, (const uint8_t *)mask,
2480                  (const uint8_t *)flow_mask,
2481                  sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2482                  error);
2483         if (ret < 0)
2484                 return ret;
2485         return 0;
2486 }
2487
2488 /**
2489  * Validate VXLAN item.
2490  *
2491  * @param[in] dev
2492  *   Pointer to the Ethernet device structure.
2493  * @param[in] udp_dport
2494  *   UDP destination port
2495  * @param[in] item
2496  *   Item specification.
2497  * @param[in] item_flags
2498  *   Bit-fields that holds the items detected until now.
2499  * @param[in] attr
2500  *   Flow rule attributes.
2501  * @param[out] error
2502  *   Pointer to error structure.
2503  *
2504  * @return
2505  *   0 on success, a negative errno value otherwise and rte_errno is set.
2506  */
2507 int
2508 mlx5_flow_validate_item_vxlan(struct rte_eth_dev *dev,
2509                               uint16_t udp_dport,
2510                               const struct rte_flow_item *item,
2511                               uint64_t item_flags,
2512                               const struct rte_flow_attr *attr,
2513                               struct rte_flow_error *error)
2514 {
2515         const struct rte_flow_item_vxlan *spec = item->spec;
2516         const struct rte_flow_item_vxlan *mask = item->mask;
2517         int ret;
2518         struct mlx5_priv *priv = dev->data->dev_private;
2519         union vni {
2520                 uint32_t vlan_id;
2521                 uint8_t vni[4];
2522         } id = { .vlan_id = 0, };
2523         const struct rte_flow_item_vxlan nic_mask = {
2524                 .vni = "\xff\xff\xff",
2525                 .rsvd1 = 0xff,
2526         };
2527         const struct rte_flow_item_vxlan *valid_mask;
2528
2529         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2530                 return rte_flow_error_set(error, ENOTSUP,
2531                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2532                                           "multiple tunnel layers not"
2533                                           " supported");
2534         valid_mask = &rte_flow_item_vxlan_mask;
2535         /*
2536          * Verify only UDPv4 is present as defined in
2537          * https://tools.ietf.org/html/rfc7348
2538          */
2539         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2540                 return rte_flow_error_set(error, EINVAL,
2541                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2542                                           "no outer UDP layer found");
2543         if (!mask)
2544                 mask = &rte_flow_item_vxlan_mask;
2545
2546         if (priv->sh->steering_format_version !=
2547             MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5 ||
2548             !udp_dport || udp_dport == MLX5_UDP_PORT_VXLAN) {
2549                 /* FDB domain & NIC domain non-zero group */
2550                 if ((attr->transfer || attr->group) && priv->sh->misc5_cap)
2551                         valid_mask = &nic_mask;
2552                 /* Group zero in NIC domain */
2553                 if (!attr->group && !attr->transfer &&
2554                     priv->sh->tunnel_header_0_1)
2555                         valid_mask = &nic_mask;
2556         }
2557         ret = mlx5_flow_item_acceptable
2558                 (item, (const uint8_t *)mask,
2559                  (const uint8_t *)valid_mask,
2560                  sizeof(struct rte_flow_item_vxlan),
2561                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2562         if (ret < 0)
2563                 return ret;
2564         if (spec) {
2565                 memcpy(&id.vni[1], spec->vni, 3);
2566                 memcpy(&id.vni[1], mask->vni, 3);
2567         }
2568         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2569                 return rte_flow_error_set(error, ENOTSUP,
2570                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2571                                           "VXLAN tunnel must be fully defined");
2572         return 0;
2573 }
2574
2575 /**
2576  * Validate VXLAN_GPE item.
2577  *
2578  * @param[in] item
2579  *   Item specification.
2580  * @param[in] item_flags
2581  *   Bit-fields that holds the items detected until now.
2582  * @param[in] priv
2583  *   Pointer to the private data structure.
2584  * @param[in] target_protocol
2585  *   The next protocol in the previous item.
2586  * @param[out] error
2587  *   Pointer to error structure.
2588  *
2589  * @return
2590  *   0 on success, a negative errno value otherwise and rte_errno is set.
2591  */
2592 int
2593 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
2594                                   uint64_t item_flags,
2595                                   struct rte_eth_dev *dev,
2596                                   struct rte_flow_error *error)
2597 {
2598         struct mlx5_priv *priv = dev->data->dev_private;
2599         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
2600         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
2601         int ret;
2602         union vni {
2603                 uint32_t vlan_id;
2604                 uint8_t vni[4];
2605         } id = { .vlan_id = 0, };
2606
2607         if (!priv->config.l3_vxlan_en)
2608                 return rte_flow_error_set(error, ENOTSUP,
2609                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2610                                           "L3 VXLAN is not enabled by device"
2611                                           " parameter and/or not configured in"
2612                                           " firmware");
2613         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2614                 return rte_flow_error_set(error, ENOTSUP,
2615                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2616                                           "multiple tunnel layers not"
2617                                           " supported");
2618         /*
2619          * Verify only UDPv4 is present as defined in
2620          * https://tools.ietf.org/html/rfc7348
2621          */
2622         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2623                 return rte_flow_error_set(error, EINVAL,
2624                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2625                                           "no outer UDP layer found");
2626         if (!mask)
2627                 mask = &rte_flow_item_vxlan_gpe_mask;
2628         ret = mlx5_flow_item_acceptable
2629                 (item, (const uint8_t *)mask,
2630                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
2631                  sizeof(struct rte_flow_item_vxlan_gpe),
2632                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2633         if (ret < 0)
2634                 return ret;
2635         if (spec) {
2636                 if (spec->protocol)
2637                         return rte_flow_error_set(error, ENOTSUP,
2638                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2639                                                   item,
2640                                                   "VxLAN-GPE protocol"
2641                                                   " not supported");
2642                 memcpy(&id.vni[1], spec->vni, 3);
2643                 memcpy(&id.vni[1], mask->vni, 3);
2644         }
2645         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2646                 return rte_flow_error_set(error, ENOTSUP,
2647                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2648                                           "VXLAN-GPE tunnel must be fully"
2649                                           " defined");
2650         return 0;
2651 }
2652 /**
2653  * Validate GRE Key item.
2654  *
2655  * @param[in] item
2656  *   Item specification.
2657  * @param[in] item_flags
2658  *   Bit flags to mark detected items.
2659  * @param[in] gre_item
2660  *   Pointer to gre_item
2661  * @param[out] error
2662  *   Pointer to error structure.
2663  *
2664  * @return
2665  *   0 on success, a negative errno value otherwise and rte_errno is set.
2666  */
2667 int
2668 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
2669                                 uint64_t item_flags,
2670                                 const struct rte_flow_item *gre_item,
2671                                 struct rte_flow_error *error)
2672 {
2673         const rte_be32_t *mask = item->mask;
2674         int ret = 0;
2675         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
2676         const struct rte_flow_item_gre *gre_spec;
2677         const struct rte_flow_item_gre *gre_mask;
2678
2679         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
2680                 return rte_flow_error_set(error, ENOTSUP,
2681                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2682                                           "Multiple GRE key not support");
2683         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2684                 return rte_flow_error_set(error, ENOTSUP,
2685                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2686                                           "No preceding GRE header");
2687         if (item_flags & MLX5_FLOW_LAYER_INNER)
2688                 return rte_flow_error_set(error, ENOTSUP,
2689                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2690                                           "GRE key following a wrong item");
2691         gre_mask = gre_item->mask;
2692         if (!gre_mask)
2693                 gre_mask = &rte_flow_item_gre_mask;
2694         gre_spec = gre_item->spec;
2695         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2696                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2697                 return rte_flow_error_set(error, EINVAL,
2698                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2699                                           "Key bit must be on");
2700
2701         if (!mask)
2702                 mask = &gre_key_default_mask;
2703         ret = mlx5_flow_item_acceptable
2704                 (item, (const uint8_t *)mask,
2705                  (const uint8_t *)&gre_key_default_mask,
2706                  sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2707         return ret;
2708 }
2709
2710 /**
2711  * Validate GRE item.
2712  *
2713  * @param[in] item
2714  *   Item specification.
2715  * @param[in] item_flags
2716  *   Bit flags to mark detected items.
2717  * @param[in] target_protocol
2718  *   The next protocol in the previous item.
2719  * @param[out] error
2720  *   Pointer to error structure.
2721  *
2722  * @return
2723  *   0 on success, a negative errno value otherwise and rte_errno is set.
2724  */
2725 int
2726 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2727                             uint64_t item_flags,
2728                             uint8_t target_protocol,
2729                             struct rte_flow_error *error)
2730 {
2731         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2732         const struct rte_flow_item_gre *mask = item->mask;
2733         int ret;
2734         const struct rte_flow_item_gre nic_mask = {
2735                 .c_rsvd0_ver = RTE_BE16(0xB000),
2736                 .protocol = RTE_BE16(UINT16_MAX),
2737         };
2738
2739         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2740                 return rte_flow_error_set(error, EINVAL,
2741                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2742                                           "protocol filtering not compatible"
2743                                           " with this GRE layer");
2744         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2745                 return rte_flow_error_set(error, ENOTSUP,
2746                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2747                                           "multiple tunnel layers not"
2748                                           " supported");
2749         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2750                 return rte_flow_error_set(error, ENOTSUP,
2751                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2752                                           "L3 Layer is missing");
2753         if (!mask)
2754                 mask = &rte_flow_item_gre_mask;
2755         ret = mlx5_flow_item_acceptable
2756                 (item, (const uint8_t *)mask,
2757                  (const uint8_t *)&nic_mask,
2758                  sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2759                  error);
2760         if (ret < 0)
2761                 return ret;
2762 #ifndef HAVE_MLX5DV_DR
2763 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2764         if (spec && (spec->protocol & mask->protocol))
2765                 return rte_flow_error_set(error, ENOTSUP,
2766                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2767                                           "without MPLS support the"
2768                                           " specification cannot be used for"
2769                                           " filtering");
2770 #endif
2771 #endif
2772         return 0;
2773 }
2774
2775 /**
2776  * Validate Geneve item.
2777  *
2778  * @param[in] item
2779  *   Item specification.
2780  * @param[in] itemFlags
2781  *   Bit-fields that holds the items detected until now.
2782  * @param[in] enPriv
2783  *   Pointer to the private data structure.
2784  * @param[out] error
2785  *   Pointer to error structure.
2786  *
2787  * @return
2788  *   0 on success, a negative errno value otherwise and rte_errno is set.
2789  */
2790
2791 int
2792 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2793                                uint64_t item_flags,
2794                                struct rte_eth_dev *dev,
2795                                struct rte_flow_error *error)
2796 {
2797         struct mlx5_priv *priv = dev->data->dev_private;
2798         const struct rte_flow_item_geneve *spec = item->spec;
2799         const struct rte_flow_item_geneve *mask = item->mask;
2800         int ret;
2801         uint16_t gbhdr;
2802         uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2803                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2804         const struct rte_flow_item_geneve nic_mask = {
2805                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2806                 .vni = "\xff\xff\xff",
2807                 .protocol = RTE_BE16(UINT16_MAX),
2808         };
2809
2810         if (!priv->config.hca_attr.tunnel_stateless_geneve_rx)
2811                 return rte_flow_error_set(error, ENOTSUP,
2812                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2813                                           "L3 Geneve is not enabled by device"
2814                                           " parameter and/or not configured in"
2815                                           " firmware");
2816         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2817                 return rte_flow_error_set(error, ENOTSUP,
2818                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2819                                           "multiple tunnel layers not"
2820                                           " supported");
2821         /*
2822          * Verify only UDPv4 is present as defined in
2823          * https://tools.ietf.org/html/rfc7348
2824          */
2825         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2826                 return rte_flow_error_set(error, EINVAL,
2827                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2828                                           "no outer UDP layer found");
2829         if (!mask)
2830                 mask = &rte_flow_item_geneve_mask;
2831         ret = mlx5_flow_item_acceptable
2832                                   (item, (const uint8_t *)mask,
2833                                    (const uint8_t *)&nic_mask,
2834                                    sizeof(struct rte_flow_item_geneve),
2835                                    MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2836         if (ret)
2837                 return ret;
2838         if (spec) {
2839                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2840                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2841                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2842                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2843                         return rte_flow_error_set(error, ENOTSUP,
2844                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2845                                                   item,
2846                                                   "Geneve protocol unsupported"
2847                                                   " fields are being used");
2848                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2849                         return rte_flow_error_set
2850                                         (error, ENOTSUP,
2851                                          RTE_FLOW_ERROR_TYPE_ITEM,
2852                                          item,
2853                                          "Unsupported Geneve options length");
2854         }
2855         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2856                 return rte_flow_error_set
2857                                     (error, ENOTSUP,
2858                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
2859                                      "Geneve tunnel must be fully defined");
2860         return 0;
2861 }
2862
2863 /**
2864  * Validate Geneve TLV option item.
2865  *
2866  * @param[in] item
2867  *   Item specification.
2868  * @param[in] last_item
2869  *   Previous validated item in the pattern items.
2870  * @param[in] geneve_item
2871  *   Previous GENEVE item specification.
2872  * @param[in] dev
2873  *   Pointer to the rte_eth_dev structure.
2874  * @param[out] error
2875  *   Pointer to error structure.
2876  *
2877  * @return
2878  *   0 on success, a negative errno value otherwise and rte_errno is set.
2879  */
2880 int
2881 mlx5_flow_validate_item_geneve_opt(const struct rte_flow_item *item,
2882                                    uint64_t last_item,
2883                                    const struct rte_flow_item *geneve_item,
2884                                    struct rte_eth_dev *dev,
2885                                    struct rte_flow_error *error)
2886 {
2887         struct mlx5_priv *priv = dev->data->dev_private;
2888         struct mlx5_dev_ctx_shared *sh = priv->sh;
2889         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource;
2890         struct mlx5_hca_attr *hca_attr = &priv->config.hca_attr;
2891         uint8_t data_max_supported =
2892                         hca_attr->max_geneve_tlv_option_data_len * 4;
2893         struct mlx5_dev_config *config = &priv->config;
2894         const struct rte_flow_item_geneve *geneve_spec;
2895         const struct rte_flow_item_geneve *geneve_mask;
2896         const struct rte_flow_item_geneve_opt *spec = item->spec;
2897         const struct rte_flow_item_geneve_opt *mask = item->mask;
2898         unsigned int i;
2899         unsigned int data_len;
2900         uint8_t tlv_option_len;
2901         uint16_t optlen_m, optlen_v;
2902         const struct rte_flow_item_geneve_opt full_mask = {
2903                 .option_class = RTE_BE16(0xffff),
2904                 .option_type = 0xff,
2905                 .option_len = 0x1f,
2906         };
2907
2908         if (!mask)
2909                 mask = &rte_flow_item_geneve_opt_mask;
2910         if (!spec)
2911                 return rte_flow_error_set
2912                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2913                         "Geneve TLV opt class/type/length must be specified");
2914         if ((uint32_t)spec->option_len > MLX5_GENEVE_OPTLEN_MASK)
2915                 return rte_flow_error_set
2916                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2917                         "Geneve TLV opt length exceeeds the limit (31)");
2918         /* Check if class type and length masks are full. */
2919         if (full_mask.option_class != mask->option_class ||
2920             full_mask.option_type != mask->option_type ||
2921             full_mask.option_len != (mask->option_len & full_mask.option_len))
2922                 return rte_flow_error_set
2923                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2924                         "Geneve TLV opt class/type/length masks must be full");
2925         /* Check if length is supported */
2926         if ((uint32_t)spec->option_len >
2927                         config->hca_attr.max_geneve_tlv_option_data_len)
2928                 return rte_flow_error_set
2929                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2930                         "Geneve TLV opt length not supported");
2931         if (config->hca_attr.max_geneve_tlv_options > 1)
2932                 DRV_LOG(DEBUG,
2933                         "max_geneve_tlv_options supports more than 1 option");
2934         /* Check GENEVE item preceding. */
2935         if (!geneve_item || !(last_item & MLX5_FLOW_LAYER_GENEVE))
2936                 return rte_flow_error_set
2937                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2938                         "Geneve opt item must be preceded with Geneve item");
2939         geneve_spec = geneve_item->spec;
2940         geneve_mask = geneve_item->mask ? geneve_item->mask :
2941                                           &rte_flow_item_geneve_mask;
2942         /* Check if GENEVE TLV option size doesn't exceed option length */
2943         if (geneve_spec && (geneve_mask->ver_opt_len_o_c_rsvd0 ||
2944                             geneve_spec->ver_opt_len_o_c_rsvd0)) {
2945                 tlv_option_len = spec->option_len & mask->option_len;
2946                 optlen_v = rte_be_to_cpu_16(geneve_spec->ver_opt_len_o_c_rsvd0);
2947                 optlen_v = MLX5_GENEVE_OPTLEN_VAL(optlen_v);
2948                 optlen_m = rte_be_to_cpu_16(geneve_mask->ver_opt_len_o_c_rsvd0);
2949                 optlen_m = MLX5_GENEVE_OPTLEN_VAL(optlen_m);
2950                 if ((optlen_v & optlen_m) <= tlv_option_len)
2951                         return rte_flow_error_set
2952                                 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2953                                  "GENEVE TLV option length exceeds optlen");
2954         }
2955         /* Check if length is 0 or data is 0. */
2956         if (spec->data == NULL || spec->option_len == 0)
2957                 return rte_flow_error_set
2958                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2959                         "Geneve TLV opt with zero data/length not supported");
2960         /* Check not all data & mask are 0. */
2961         data_len = spec->option_len * 4;
2962         if (mask->data == NULL) {
2963                 for (i = 0; i < data_len; i++)
2964                         if (spec->data[i])
2965                                 break;
2966                 if (i == data_len)
2967                         return rte_flow_error_set(error, ENOTSUP,
2968                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2969                                 "Can't match on Geneve option data 0");
2970         } else {
2971                 for (i = 0; i < data_len; i++)
2972                         if (spec->data[i] & mask->data[i])
2973                                 break;
2974                 if (i == data_len)
2975                         return rte_flow_error_set(error, ENOTSUP,
2976                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2977                                 "Can't match on Geneve option data and mask 0");
2978                 /* Check data mask supported. */
2979                 for (i = data_max_supported; i < data_len ; i++)
2980                         if (mask->data[i])
2981                                 return rte_flow_error_set(error, ENOTSUP,
2982                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2983                                         "Data mask is of unsupported size");
2984         }
2985         /* Check GENEVE option is supported in NIC. */
2986         if (!config->hca_attr.geneve_tlv_opt)
2987                 return rte_flow_error_set
2988                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2989                         "Geneve TLV opt not supported");
2990         /* Check if we already have geneve option with different type/class. */
2991         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
2992         geneve_opt_resource = sh->geneve_tlv_option_resource;
2993         if (geneve_opt_resource != NULL)
2994                 if (geneve_opt_resource->option_class != spec->option_class ||
2995                     geneve_opt_resource->option_type != spec->option_type ||
2996                     geneve_opt_resource->length != spec->option_len) {
2997                         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
2998                         return rte_flow_error_set(error, ENOTSUP,
2999                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
3000                                 "Only one Geneve TLV option supported");
3001                 }
3002         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
3003         return 0;
3004 }
3005
3006 /**
3007  * Validate MPLS item.
3008  *
3009  * @param[in] dev
3010  *   Pointer to the rte_eth_dev structure.
3011  * @param[in] item
3012  *   Item specification.
3013  * @param[in] item_flags
3014  *   Bit-fields that holds the items detected until now.
3015  * @param[in] prev_layer
3016  *   The protocol layer indicated in previous item.
3017  * @param[out] error
3018  *   Pointer to error structure.
3019  *
3020  * @return
3021  *   0 on success, a negative errno value otherwise and rte_errno is set.
3022  */
3023 int
3024 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
3025                              const struct rte_flow_item *item __rte_unused,
3026                              uint64_t item_flags __rte_unused,
3027                              uint64_t prev_layer __rte_unused,
3028                              struct rte_flow_error *error)
3029 {
3030 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
3031         const struct rte_flow_item_mpls *mask = item->mask;
3032         struct mlx5_priv *priv = dev->data->dev_private;
3033         int ret;
3034
3035         if (!priv->config.mpls_en)
3036                 return rte_flow_error_set(error, ENOTSUP,
3037                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3038                                           "MPLS not supported or"
3039                                           " disabled in firmware"
3040                                           " configuration.");
3041         /* MPLS over UDP, GRE is allowed */
3042         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L4_UDP |
3043                             MLX5_FLOW_LAYER_GRE |
3044                             MLX5_FLOW_LAYER_GRE_KEY)))
3045                 return rte_flow_error_set(error, EINVAL,
3046                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3047                                           "protocol filtering not compatible"
3048                                           " with MPLS layer");
3049         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
3050         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
3051             !(item_flags & MLX5_FLOW_LAYER_GRE))
3052                 return rte_flow_error_set(error, ENOTSUP,
3053                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3054                                           "multiple tunnel layers not"
3055                                           " supported");
3056         if (!mask)
3057                 mask = &rte_flow_item_mpls_mask;
3058         ret = mlx5_flow_item_acceptable
3059                 (item, (const uint8_t *)mask,
3060                  (const uint8_t *)&rte_flow_item_mpls_mask,
3061                  sizeof(struct rte_flow_item_mpls),
3062                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3063         if (ret < 0)
3064                 return ret;
3065         return 0;
3066 #else
3067         return rte_flow_error_set(error, ENOTSUP,
3068                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
3069                                   "MPLS is not supported by Verbs, please"
3070                                   " update.");
3071 #endif
3072 }
3073
3074 /**
3075  * Validate NVGRE item.
3076  *
3077  * @param[in] item
3078  *   Item specification.
3079  * @param[in] item_flags
3080  *   Bit flags to mark detected items.
3081  * @param[in] target_protocol
3082  *   The next protocol in the previous item.
3083  * @param[out] error
3084  *   Pointer to error structure.
3085  *
3086  * @return
3087  *   0 on success, a negative errno value otherwise and rte_errno is set.
3088  */
3089 int
3090 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
3091                               uint64_t item_flags,
3092                               uint8_t target_protocol,
3093                               struct rte_flow_error *error)
3094 {
3095         const struct rte_flow_item_nvgre *mask = item->mask;
3096         int ret;
3097
3098         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
3099                 return rte_flow_error_set(error, EINVAL,
3100                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3101                                           "protocol filtering not compatible"
3102                                           " with this GRE layer");
3103         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3104                 return rte_flow_error_set(error, ENOTSUP,
3105                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3106                                           "multiple tunnel layers not"
3107                                           " supported");
3108         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
3109                 return rte_flow_error_set(error, ENOTSUP,
3110                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3111                                           "L3 Layer is missing");
3112         if (!mask)
3113                 mask = &rte_flow_item_nvgre_mask;
3114         ret = mlx5_flow_item_acceptable
3115                 (item, (const uint8_t *)mask,
3116                  (const uint8_t *)&rte_flow_item_nvgre_mask,
3117                  sizeof(struct rte_flow_item_nvgre),
3118                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3119         if (ret < 0)
3120                 return ret;
3121         return 0;
3122 }
3123
3124 /**
3125  * Validate eCPRI item.
3126  *
3127  * @param[in] item
3128  *   Item specification.
3129  * @param[in] item_flags
3130  *   Bit-fields that holds the items detected until now.
3131  * @param[in] last_item
3132  *   Previous validated item in the pattern items.
3133  * @param[in] ether_type
3134  *   Type in the ethernet layer header (including dot1q).
3135  * @param[in] acc_mask
3136  *   Acceptable mask, if NULL default internal default mask
3137  *   will be used to check whether item fields are supported.
3138  * @param[out] error
3139  *   Pointer to error structure.
3140  *
3141  * @return
3142  *   0 on success, a negative errno value otherwise and rte_errno is set.
3143  */
3144 int
3145 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item,
3146                               uint64_t item_flags,
3147                               uint64_t last_item,
3148                               uint16_t ether_type,
3149                               const struct rte_flow_item_ecpri *acc_mask,
3150                               struct rte_flow_error *error)
3151 {
3152         const struct rte_flow_item_ecpri *mask = item->mask;
3153         const struct rte_flow_item_ecpri nic_mask = {
3154                 .hdr = {
3155                         .common = {
3156                                 .u32 =
3157                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
3158                                         .type = 0xFF,
3159                                         }).u32),
3160                         },
3161                         .dummy[0] = 0xFFFFFFFF,
3162                 },
3163         };
3164         const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 |
3165                                         MLX5_FLOW_LAYER_OUTER_VLAN);
3166         struct rte_flow_item_ecpri mask_lo;
3167
3168         if (!(last_item & outer_l2_vlan) &&
3169             last_item != MLX5_FLOW_LAYER_OUTER_L4_UDP)
3170                 return rte_flow_error_set(error, EINVAL,
3171                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3172                                           "eCPRI can only follow L2/VLAN layer or UDP layer");
3173         if ((last_item & outer_l2_vlan) && ether_type &&
3174             ether_type != RTE_ETHER_TYPE_ECPRI)
3175                 return rte_flow_error_set(error, EINVAL,
3176                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3177                                           "eCPRI cannot follow L2/VLAN layer which ether type is not 0xAEFE");
3178         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3179                 return rte_flow_error_set(error, EINVAL,
3180                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3181                                           "eCPRI with tunnel is not supported right now");
3182         if (item_flags & MLX5_FLOW_LAYER_OUTER_L3)
3183                 return rte_flow_error_set(error, ENOTSUP,
3184                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3185                                           "multiple L3 layers not supported");
3186         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP)
3187                 return rte_flow_error_set(error, EINVAL,
3188                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3189                                           "eCPRI cannot coexist with a TCP layer");
3190         /* In specification, eCPRI could be over UDP layer. */
3191         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)
3192                 return rte_flow_error_set(error, EINVAL,
3193                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3194                                           "eCPRI over UDP layer is not yet supported right now");
3195         /* Mask for type field in common header could be zero. */
3196         if (!mask)
3197                 mask = &rte_flow_item_ecpri_mask;
3198         mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32);
3199         /* Input mask is in big-endian format. */
3200         if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff)
3201                 return rte_flow_error_set(error, EINVAL,
3202                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3203                                           "partial mask is not supported for protocol");
3204         else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0)
3205                 return rte_flow_error_set(error, EINVAL,
3206                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3207                                           "message header mask must be after a type mask");
3208         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
3209                                          acc_mask ? (const uint8_t *)acc_mask
3210                                                   : (const uint8_t *)&nic_mask,
3211                                          sizeof(struct rte_flow_item_ecpri),
3212                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3213 }
3214
3215 static int
3216 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
3217                    const struct rte_flow_attr *attr __rte_unused,
3218                    const struct rte_flow_item items[] __rte_unused,
3219                    const struct rte_flow_action actions[] __rte_unused,
3220                    bool external __rte_unused,
3221                    int hairpin __rte_unused,
3222                    struct rte_flow_error *error)
3223 {
3224         return rte_flow_error_set(error, ENOTSUP,
3225                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3226 }
3227
3228 static struct mlx5_flow *
3229 flow_null_prepare(struct rte_eth_dev *dev __rte_unused,
3230                   const struct rte_flow_attr *attr __rte_unused,
3231                   const struct rte_flow_item items[] __rte_unused,
3232                   const struct rte_flow_action actions[] __rte_unused,
3233                   struct rte_flow_error *error)
3234 {
3235         rte_flow_error_set(error, ENOTSUP,
3236                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3237         return NULL;
3238 }
3239
3240 static int
3241 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
3242                     struct mlx5_flow *dev_flow __rte_unused,
3243                     const struct rte_flow_attr *attr __rte_unused,
3244                     const struct rte_flow_item items[] __rte_unused,
3245                     const struct rte_flow_action actions[] __rte_unused,
3246                     struct rte_flow_error *error)
3247 {
3248         return rte_flow_error_set(error, ENOTSUP,
3249                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3250 }
3251
3252 static int
3253 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
3254                 struct rte_flow *flow __rte_unused,
3255                 struct rte_flow_error *error)
3256 {
3257         return rte_flow_error_set(error, ENOTSUP,
3258                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3259 }
3260
3261 static void
3262 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
3263                  struct rte_flow *flow __rte_unused)
3264 {
3265 }
3266
3267 static void
3268 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
3269                   struct rte_flow *flow __rte_unused)
3270 {
3271 }
3272
3273 static int
3274 flow_null_query(struct rte_eth_dev *dev __rte_unused,
3275                 struct rte_flow *flow __rte_unused,
3276                 const struct rte_flow_action *actions __rte_unused,
3277                 void *data __rte_unused,
3278                 struct rte_flow_error *error)
3279 {
3280         return rte_flow_error_set(error, ENOTSUP,
3281                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3282 }
3283
3284 static int
3285 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused,
3286                       uint32_t domains __rte_unused,
3287                       uint32_t flags __rte_unused)
3288 {
3289         return 0;
3290 }
3291
3292 /* Void driver to protect from null pointer reference. */
3293 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
3294         .validate = flow_null_validate,
3295         .prepare = flow_null_prepare,
3296         .translate = flow_null_translate,
3297         .apply = flow_null_apply,
3298         .remove = flow_null_remove,
3299         .destroy = flow_null_destroy,
3300         .query = flow_null_query,
3301         .sync_domain = flow_null_sync_domain,
3302 };
3303
3304 /**
3305  * Select flow driver type according to flow attributes and device
3306  * configuration.
3307  *
3308  * @param[in] dev
3309  *   Pointer to the dev structure.
3310  * @param[in] attr
3311  *   Pointer to the flow attributes.
3312  *
3313  * @return
3314  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
3315  */
3316 static enum mlx5_flow_drv_type
3317 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
3318 {
3319         struct mlx5_priv *priv = dev->data->dev_private;
3320         /* The OS can determine first a specific flow type (DV, VERBS) */
3321         enum mlx5_flow_drv_type type = mlx5_flow_os_get_type();
3322
3323         if (type != MLX5_FLOW_TYPE_MAX)
3324                 return type;
3325         /* If no OS specific type - continue with DV/VERBS selection */
3326         if (attr->transfer && priv->config.dv_esw_en)
3327                 type = MLX5_FLOW_TYPE_DV;
3328         if (!attr->transfer)
3329                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
3330                                                  MLX5_FLOW_TYPE_VERBS;
3331         return type;
3332 }
3333
3334 #define flow_get_drv_ops(type) flow_drv_ops[type]
3335
3336 /**
3337  * Flow driver validation API. This abstracts calling driver specific functions.
3338  * The type of flow driver is determined according to flow attributes.
3339  *
3340  * @param[in] dev
3341  *   Pointer to the dev structure.
3342  * @param[in] attr
3343  *   Pointer to the flow attributes.
3344  * @param[in] items
3345  *   Pointer to the list of items.
3346  * @param[in] actions
3347  *   Pointer to the list of actions.
3348  * @param[in] external
3349  *   This flow rule is created by request external to PMD.
3350  * @param[in] hairpin
3351  *   Number of hairpin TX actions, 0 means classic flow.
3352  * @param[out] error
3353  *   Pointer to the error structure.
3354  *
3355  * @return
3356  *   0 on success, a negative errno value otherwise and rte_errno is set.
3357  */
3358 static inline int
3359 flow_drv_validate(struct rte_eth_dev *dev,
3360                   const struct rte_flow_attr *attr,
3361                   const struct rte_flow_item items[],
3362                   const struct rte_flow_action actions[],
3363                   bool external, int hairpin, struct rte_flow_error *error)
3364 {
3365         const struct mlx5_flow_driver_ops *fops;
3366         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
3367
3368         fops = flow_get_drv_ops(type);
3369         return fops->validate(dev, attr, items, actions, external,
3370                               hairpin, error);
3371 }
3372
3373 /**
3374  * Flow driver preparation API. This abstracts calling driver specific
3375  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3376  * calculates the size of memory required for device flow, allocates the memory,
3377  * initializes the device flow and returns the pointer.
3378  *
3379  * @note
3380  *   This function initializes device flow structure such as dv or verbs in
3381  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
3382  *   rest. For example, adding returning device flow to flow->dev_flow list and
3383  *   setting backward reference to the flow should be done out of this function.
3384  *   layers field is not filled either.
3385  *
3386  * @param[in] dev
3387  *   Pointer to the dev structure.
3388  * @param[in] attr
3389  *   Pointer to the flow attributes.
3390  * @param[in] items
3391  *   Pointer to the list of items.
3392  * @param[in] actions
3393  *   Pointer to the list of actions.
3394  * @param[in] flow_idx
3395  *   This memory pool index to the flow.
3396  * @param[out] error
3397  *   Pointer to the error structure.
3398  *
3399  * @return
3400  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
3401  */
3402 static inline struct mlx5_flow *
3403 flow_drv_prepare(struct rte_eth_dev *dev,
3404                  const struct rte_flow *flow,
3405                  const struct rte_flow_attr *attr,
3406                  const struct rte_flow_item items[],
3407                  const struct rte_flow_action actions[],
3408                  uint32_t flow_idx,
3409                  struct rte_flow_error *error)
3410 {
3411         const struct mlx5_flow_driver_ops *fops;
3412         enum mlx5_flow_drv_type type = flow->drv_type;
3413         struct mlx5_flow *mlx5_flow = NULL;
3414
3415         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3416         fops = flow_get_drv_ops(type);
3417         mlx5_flow = fops->prepare(dev, attr, items, actions, error);
3418         if (mlx5_flow)
3419                 mlx5_flow->flow_idx = flow_idx;
3420         return mlx5_flow;
3421 }
3422
3423 /**
3424  * Flow driver translation API. This abstracts calling driver specific
3425  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3426  * translates a generic flow into a driver flow. flow_drv_prepare() must
3427  * precede.
3428  *
3429  * @note
3430  *   dev_flow->layers could be filled as a result of parsing during translation
3431  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
3432  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
3433  *   flow->actions could be overwritten even though all the expanded dev_flows
3434  *   have the same actions.
3435  *
3436  * @param[in] dev
3437  *   Pointer to the rte dev structure.
3438  * @param[in, out] dev_flow
3439  *   Pointer to the mlx5 flow.
3440  * @param[in] attr
3441  *   Pointer to the flow attributes.
3442  * @param[in] items
3443  *   Pointer to the list of items.
3444  * @param[in] actions
3445  *   Pointer to the list of actions.
3446  * @param[out] error
3447  *   Pointer to the error structure.
3448  *
3449  * @return
3450  *   0 on success, a negative errno value otherwise and rte_errno is set.
3451  */
3452 static inline int
3453 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
3454                    const struct rte_flow_attr *attr,
3455                    const struct rte_flow_item items[],
3456                    const struct rte_flow_action actions[],
3457                    struct rte_flow_error *error)
3458 {
3459         const struct mlx5_flow_driver_ops *fops;
3460         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
3461
3462         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3463         fops = flow_get_drv_ops(type);
3464         return fops->translate(dev, dev_flow, attr, items, actions, error);
3465 }
3466
3467 /**
3468  * Flow driver apply API. This abstracts calling driver specific functions.
3469  * Parent flow (rte_flow) should have driver type (drv_type). It applies
3470  * translated driver flows on to device. flow_drv_translate() must precede.
3471  *
3472  * @param[in] dev
3473  *   Pointer to Ethernet device structure.
3474  * @param[in, out] flow
3475  *   Pointer to flow structure.
3476  * @param[out] error
3477  *   Pointer to error structure.
3478  *
3479  * @return
3480  *   0 on success, a negative errno value otherwise and rte_errno is set.
3481  */
3482 static inline int
3483 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
3484                struct rte_flow_error *error)
3485 {
3486         const struct mlx5_flow_driver_ops *fops;
3487         enum mlx5_flow_drv_type type = flow->drv_type;
3488
3489         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3490         fops = flow_get_drv_ops(type);
3491         return fops->apply(dev, flow, error);
3492 }
3493
3494 /**
3495  * Flow driver destroy API. This abstracts calling driver specific functions.
3496  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
3497  * on device and releases resources of the flow.
3498  *
3499  * @param[in] dev
3500  *   Pointer to Ethernet device.
3501  * @param[in, out] flow
3502  *   Pointer to flow structure.
3503  */
3504 static inline void
3505 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
3506 {
3507         const struct mlx5_flow_driver_ops *fops;
3508         enum mlx5_flow_drv_type type = flow->drv_type;
3509
3510         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3511         fops = flow_get_drv_ops(type);
3512         fops->destroy(dev, flow);
3513 }
3514
3515 /**
3516  * Flow driver find RSS policy tbl API. This abstracts calling driver
3517  * specific functions. Parent flow (rte_flow) should have driver
3518  * type (drv_type). It will find the RSS policy table that has the rss_desc.
3519  *
3520  * @param[in] dev
3521  *   Pointer to Ethernet device.
3522  * @param[in, out] flow
3523  *   Pointer to flow structure.
3524  * @param[in] policy
3525  *   Pointer to meter policy table.
3526  * @param[in] rss_desc
3527  *   Pointer to rss_desc
3528  */
3529 static struct mlx5_flow_meter_sub_policy *
3530 flow_drv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
3531                 struct rte_flow *flow,
3532                 struct mlx5_flow_meter_policy *policy,
3533                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
3534 {
3535         const struct mlx5_flow_driver_ops *fops;
3536         enum mlx5_flow_drv_type type = flow->drv_type;
3537
3538         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3539         fops = flow_get_drv_ops(type);
3540         return fops->meter_sub_policy_rss_prepare(dev, policy, rss_desc);
3541 }
3542
3543 /**
3544  * Flow driver color tag rule API. This abstracts calling driver
3545  * specific functions. Parent flow (rte_flow) should have driver
3546  * type (drv_type). It will create the color tag rules in hierarchy meter.
3547  *
3548  * @param[in] dev
3549  *   Pointer to Ethernet device.
3550  * @param[in, out] flow
3551  *   Pointer to flow structure.
3552  * @param[in] fm
3553  *   Pointer to flow meter structure.
3554  * @param[in] src_port
3555  *   The src port this extra rule should use.
3556  * @param[in] item
3557  *   The src port id match item.
3558  * @param[out] error
3559  *   Pointer to error structure.
3560  */
3561 static int
3562 flow_drv_mtr_hierarchy_rule_create(struct rte_eth_dev *dev,
3563                 struct rte_flow *flow,
3564                 struct mlx5_flow_meter_info *fm,
3565                 int32_t src_port,
3566                 const struct rte_flow_item *item,
3567                 struct rte_flow_error *error)
3568 {
3569         const struct mlx5_flow_driver_ops *fops;
3570         enum mlx5_flow_drv_type type = flow->drv_type;
3571
3572         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3573         fops = flow_get_drv_ops(type);
3574         return fops->meter_hierarchy_rule_create(dev, fm,
3575                                                 src_port, item, error);
3576 }
3577
3578 /**
3579  * Get RSS action from the action list.
3580  *
3581  * @param[in] dev
3582  *   Pointer to Ethernet device.
3583  * @param[in] actions
3584  *   Pointer to the list of actions.
3585  * @param[in] flow
3586  *   Parent flow structure pointer.
3587  *
3588  * @return
3589  *   Pointer to the RSS action if exist, else return NULL.
3590  */
3591 static const struct rte_flow_action_rss*
3592 flow_get_rss_action(struct rte_eth_dev *dev,
3593                     const struct rte_flow_action actions[])
3594 {
3595         struct mlx5_priv *priv = dev->data->dev_private;
3596         const struct rte_flow_action_rss *rss = NULL;
3597
3598         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3599                 switch (actions->type) {
3600                 case RTE_FLOW_ACTION_TYPE_RSS:
3601                         rss = actions->conf;
3602                         break;
3603                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
3604                 {
3605                         const struct rte_flow_action_sample *sample =
3606                                                                 actions->conf;
3607                         const struct rte_flow_action *act = sample->actions;
3608                         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++)
3609                                 if (act->type == RTE_FLOW_ACTION_TYPE_RSS)
3610                                         rss = act->conf;
3611                         break;
3612                 }
3613                 case RTE_FLOW_ACTION_TYPE_METER:
3614                 {
3615                         uint32_t mtr_idx;
3616                         struct mlx5_flow_meter_info *fm;
3617                         struct mlx5_flow_meter_policy *policy;
3618                         const struct rte_flow_action_meter *mtr = actions->conf;
3619
3620                         fm = mlx5_flow_meter_find(priv, mtr->mtr_id, &mtr_idx);
3621                         if (fm && !fm->def_policy) {
3622                                 policy = mlx5_flow_meter_policy_find(dev,
3623                                                 fm->policy_id, NULL);
3624                                 MLX5_ASSERT(policy);
3625                                 if (policy->is_hierarchy) {
3626                                         policy =
3627                                 mlx5_flow_meter_hierarchy_get_final_policy(dev,
3628                                                                         policy);
3629                                         if (!policy)
3630                                                 return NULL;
3631                                 }
3632                                 if (policy->is_rss)
3633                                         rss =
3634                                 policy->act_cnt[RTE_COLOR_GREEN].rss->conf;
3635                         }
3636                         break;
3637                 }
3638                 default:
3639                         break;
3640                 }
3641         }
3642         return rss;
3643 }
3644
3645 /**
3646  * Get ASO age action by index.
3647  *
3648  * @param[in] dev
3649  *   Pointer to the Ethernet device structure.
3650  * @param[in] age_idx
3651  *   Index to the ASO age action.
3652  *
3653  * @return
3654  *   The specified ASO age action.
3655  */
3656 struct mlx5_aso_age_action*
3657 flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx)
3658 {
3659         uint16_t pool_idx = age_idx & UINT16_MAX;
3660         uint16_t offset = (age_idx >> 16) & UINT16_MAX;
3661         struct mlx5_priv *priv = dev->data->dev_private;
3662         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
3663         struct mlx5_aso_age_pool *pool = mng->pools[pool_idx];
3664
3665         return &pool->actions[offset - 1];
3666 }
3667
3668 /* maps indirect action to translated direct in some actions array */
3669 struct mlx5_translated_action_handle {
3670         struct rte_flow_action_handle *action; /**< Indirect action handle. */
3671         int index; /**< Index in related array of rte_flow_action. */
3672 };
3673
3674 /**
3675  * Translates actions of type RTE_FLOW_ACTION_TYPE_INDIRECT to related
3676  * direct action if translation possible.
3677  * This functionality used to run same execution path for both direct and
3678  * indirect actions on flow create. All necessary preparations for indirect
3679  * action handling should be performed on *handle* actions list returned
3680  * from this call.
3681  *
3682  * @param[in] dev
3683  *   Pointer to Ethernet device.
3684  * @param[in] actions
3685  *   List of actions to translate.
3686  * @param[out] handle
3687  *   List to store translated indirect action object handles.
3688  * @param[in, out] indir_n
3689  *   Size of *handle* array. On return should be updated with number of
3690  *   indirect actions retrieved from the *actions* list.
3691  * @param[out] translated_actions
3692  *   List of actions where all indirect actions were translated to direct
3693  *   if possible. NULL if no translation took place.
3694  * @param[out] error
3695  *   Pointer to the error structure.
3696  *
3697  * @return
3698  *   0 on success, a negative errno value otherwise and rte_errno is set.
3699  */
3700 static int
3701 flow_action_handles_translate(struct rte_eth_dev *dev,
3702                               const struct rte_flow_action actions[],
3703                               struct mlx5_translated_action_handle *handle,
3704                               int *indir_n,
3705                               struct rte_flow_action **translated_actions,
3706                               struct rte_flow_error *error)
3707 {
3708         struct mlx5_priv *priv = dev->data->dev_private;
3709         struct rte_flow_action *translated = NULL;
3710         size_t actions_size;
3711         int n;
3712         int copied_n = 0;
3713         struct mlx5_translated_action_handle *handle_end = NULL;
3714
3715         for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) {
3716                 if (actions[n].type != RTE_FLOW_ACTION_TYPE_INDIRECT)
3717                         continue;
3718                 if (copied_n == *indir_n) {
3719                         return rte_flow_error_set
3720                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM,
3721                                  NULL, "too many shared actions");
3722                 }
3723                 rte_memcpy(&handle[copied_n].action, &actions[n].conf,
3724                            sizeof(actions[n].conf));
3725                 handle[copied_n].index = n;
3726                 copied_n++;
3727         }
3728         n++;
3729         *indir_n = copied_n;
3730         if (!copied_n)
3731                 return 0;
3732         actions_size = sizeof(struct rte_flow_action) * n;
3733         translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY);
3734         if (!translated) {
3735                 rte_errno = ENOMEM;
3736                 return -ENOMEM;
3737         }
3738         memcpy(translated, actions, actions_size);
3739         for (handle_end = handle + copied_n; handle < handle_end; handle++) {
3740                 struct mlx5_shared_action_rss *shared_rss;
3741                 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
3742                 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
3743                 uint32_t idx = act_idx &
3744                                ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
3745
3746                 switch (type) {
3747                 case MLX5_INDIRECT_ACTION_TYPE_RSS:
3748                         shared_rss = mlx5_ipool_get
3749                           (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
3750                         translated[handle->index].type =
3751                                 RTE_FLOW_ACTION_TYPE_RSS;
3752                         translated[handle->index].conf =
3753                                 &shared_rss->origin;
3754                         break;
3755                 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
3756                         translated[handle->index].type =
3757                                                 (enum rte_flow_action_type)
3758                                                 MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
3759                         translated[handle->index].conf = (void *)(uintptr_t)idx;
3760                         break;
3761                 case MLX5_INDIRECT_ACTION_TYPE_AGE:
3762                         if (priv->sh->flow_hit_aso_en) {
3763                                 translated[handle->index].type =
3764                                         (enum rte_flow_action_type)
3765                                         MLX5_RTE_FLOW_ACTION_TYPE_AGE;
3766                                 translated[handle->index].conf =
3767                                                          (void *)(uintptr_t)idx;
3768                                 break;
3769                         }
3770                         /* Fall-through */
3771                 case MLX5_INDIRECT_ACTION_TYPE_CT:
3772                         if (priv->sh->ct_aso_en) {
3773                                 translated[handle->index].type =
3774                                         RTE_FLOW_ACTION_TYPE_CONNTRACK;
3775                                 translated[handle->index].conf =
3776                                                          (void *)(uintptr_t)idx;
3777                                 break;
3778                         }
3779                         /* Fall-through */
3780                 default:
3781                         mlx5_free(translated);
3782                         return rte_flow_error_set
3783                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
3784                                  NULL, "invalid indirect action type");
3785                 }
3786         }
3787         *translated_actions = translated;
3788         return 0;
3789 }
3790
3791 /**
3792  * Get Shared RSS action from the action list.
3793  *
3794  * @param[in] dev
3795  *   Pointer to Ethernet device.
3796  * @param[in] shared
3797  *   Pointer to the list of actions.
3798  * @param[in] shared_n
3799  *   Actions list length.
3800  *
3801  * @return
3802  *   The MLX5 RSS action ID if exists, otherwise return 0.
3803  */
3804 static uint32_t
3805 flow_get_shared_rss_action(struct rte_eth_dev *dev,
3806                            struct mlx5_translated_action_handle *handle,
3807                            int shared_n)
3808 {
3809         struct mlx5_translated_action_handle *handle_end;
3810         struct mlx5_priv *priv = dev->data->dev_private;
3811         struct mlx5_shared_action_rss *shared_rss;
3812
3813
3814         for (handle_end = handle + shared_n; handle < handle_end; handle++) {
3815                 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
3816                 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
3817                 uint32_t idx = act_idx &
3818                                ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
3819                 switch (type) {
3820                 case MLX5_INDIRECT_ACTION_TYPE_RSS:
3821                         shared_rss = mlx5_ipool_get
3822                                 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
3823                                                                            idx);
3824                         __atomic_add_fetch(&shared_rss->refcnt, 1,
3825                                            __ATOMIC_RELAXED);
3826                         return idx;
3827                 default:
3828                         break;
3829                 }
3830         }
3831         return 0;
3832 }
3833
3834 static unsigned int
3835 find_graph_root(uint32_t rss_level)
3836 {
3837         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
3838                                MLX5_EXPANSION_ROOT_OUTER;
3839 }
3840
3841 /**
3842  *  Get layer flags from the prefix flow.
3843  *
3844  *  Some flows may be split to several subflows, the prefix subflow gets the
3845  *  match items and the suffix sub flow gets the actions.
3846  *  Some actions need the user defined match item flags to get the detail for
3847  *  the action.
3848  *  This function helps the suffix flow to get the item layer flags from prefix
3849  *  subflow.
3850  *
3851  * @param[in] dev_flow
3852  *   Pointer the created preifx subflow.
3853  *
3854  * @return
3855  *   The layers get from prefix subflow.
3856  */
3857 static inline uint64_t
3858 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
3859 {
3860         uint64_t layers = 0;
3861
3862         /*
3863          * Layers bits could be localization, but usually the compiler will
3864          * help to do the optimization work for source code.
3865          * If no decap actions, use the layers directly.
3866          */
3867         if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP))
3868                 return dev_flow->handle->layers;
3869         /* Convert L3 layers with decap action. */
3870         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
3871                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3872         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
3873                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3874         /* Convert L4 layers with decap action.  */
3875         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
3876                 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
3877         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
3878                 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
3879         return layers;
3880 }
3881
3882 /**
3883  * Get metadata split action information.
3884  *
3885  * @param[in] actions
3886  *   Pointer to the list of actions.
3887  * @param[out] qrss
3888  *   Pointer to the return pointer.
3889  * @param[out] qrss_type
3890  *   Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
3891  *   if no QUEUE/RSS is found.
3892  * @param[out] encap_idx
3893  *   Pointer to the index of the encap action if exists, otherwise the last
3894  *   action index.
3895  *
3896  * @return
3897  *   Total number of actions.
3898  */
3899 static int
3900 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
3901                                        const struct rte_flow_action **qrss,
3902                                        int *encap_idx)
3903 {
3904         const struct rte_flow_action_raw_encap *raw_encap;
3905         int actions_n = 0;
3906         int raw_decap_idx = -1;
3907
3908         *encap_idx = -1;
3909         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3910                 switch (actions->type) {
3911                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3912                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3913                         *encap_idx = actions_n;
3914                         break;
3915                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3916                         raw_decap_idx = actions_n;
3917                         break;
3918                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3919                         raw_encap = actions->conf;
3920                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3921                                 *encap_idx = raw_decap_idx != -1 ?
3922                                                       raw_decap_idx : actions_n;
3923                         break;
3924                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3925                 case RTE_FLOW_ACTION_TYPE_RSS:
3926                         *qrss = actions;
3927                         break;
3928                 default:
3929                         break;
3930                 }
3931                 actions_n++;
3932         }
3933         if (*encap_idx == -1)
3934                 *encap_idx = actions_n;
3935         /* Count RTE_FLOW_ACTION_TYPE_END. */
3936         return actions_n + 1;
3937 }
3938
3939 /**
3940  * Check if the action will change packet.
3941  *
3942  * @param dev
3943  *   Pointer to Ethernet device.
3944  * @param[in] type
3945  *   action type.
3946  *
3947  * @return
3948  *   true if action will change packet, false otherwise.
3949  */
3950 static bool flow_check_modify_action_type(struct rte_eth_dev *dev,
3951                                           enum rte_flow_action_type type)
3952 {
3953         struct mlx5_priv *priv = dev->data->dev_private;
3954
3955         switch (type) {
3956         case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
3957         case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
3958         case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
3959         case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
3960         case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
3961         case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
3962         case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
3963         case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
3964         case RTE_FLOW_ACTION_TYPE_DEC_TTL:
3965         case RTE_FLOW_ACTION_TYPE_SET_TTL:
3966         case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
3967         case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
3968         case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
3969         case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
3970         case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
3971         case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
3972         case RTE_FLOW_ACTION_TYPE_SET_META:
3973         case RTE_FLOW_ACTION_TYPE_SET_TAG:
3974         case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
3975         case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3976         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3977         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
3978         case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3979         case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
3980         case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3981         case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
3982         case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3983         case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3984         case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
3985                 return true;
3986         case RTE_FLOW_ACTION_TYPE_FLAG:
3987         case RTE_FLOW_ACTION_TYPE_MARK:
3988                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
3989                         return true;
3990                 else
3991                         return false;
3992         default:
3993                 return false;
3994         }
3995 }
3996
3997 /**
3998  * Check meter action from the action list.
3999  *
4000  * @param dev
4001  *   Pointer to Ethernet device.
4002  * @param[in] actions
4003  *   Pointer to the list of actions.
4004  * @param[out] has_mtr
4005  *   Pointer to the meter exist flag.
4006  * @param[out] has_modify
4007  *   Pointer to the flag showing there's packet change action.
4008  * @param[out] meter_id
4009  *   Pointer to the meter id.
4010  *
4011  * @return
4012  *   Total number of actions.
4013  */
4014 static int
4015 flow_check_meter_action(struct rte_eth_dev *dev,
4016                         const struct rte_flow_action actions[],
4017                         bool *has_mtr, bool *has_modify, uint32_t *meter_id)
4018 {
4019         const struct rte_flow_action_meter *mtr = NULL;
4020         int actions_n = 0;
4021
4022         MLX5_ASSERT(has_mtr);
4023         *has_mtr = false;
4024         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4025                 switch (actions->type) {
4026                 case RTE_FLOW_ACTION_TYPE_METER:
4027                         mtr = actions->conf;
4028                         *meter_id = mtr->mtr_id;
4029                         *has_mtr = true;
4030                         break;
4031                 default:
4032                         break;
4033                 }
4034                 if (!*has_mtr)
4035                         *has_modify |= flow_check_modify_action_type(dev,
4036                                                                 actions->type);
4037                 actions_n++;
4038         }
4039         /* Count RTE_FLOW_ACTION_TYPE_END. */
4040         return actions_n + 1;
4041 }
4042
4043 /**
4044  * Check if the flow should be split due to hairpin.
4045  * The reason for the split is that in current HW we can't
4046  * support encap and push-vlan on Rx, so if a flow contains
4047  * these actions we move it to Tx.
4048  *
4049  * @param dev
4050  *   Pointer to Ethernet device.
4051  * @param[in] attr
4052  *   Flow rule attributes.
4053  * @param[in] actions
4054  *   Associated actions (list terminated by the END action).
4055  *
4056  * @return
4057  *   > 0 the number of actions and the flow should be split,
4058  *   0 when no split required.
4059  */
4060 static int
4061 flow_check_hairpin_split(struct rte_eth_dev *dev,
4062                          const struct rte_flow_attr *attr,
4063                          const struct rte_flow_action actions[])
4064 {
4065         int queue_action = 0;
4066         int action_n = 0;
4067         int split = 0;
4068         const struct rte_flow_action_queue *queue;
4069         const struct rte_flow_action_rss *rss;
4070         const struct rte_flow_action_raw_encap *raw_encap;
4071         const struct rte_eth_hairpin_conf *conf;
4072
4073         if (!attr->ingress)
4074                 return 0;
4075         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4076                 switch (actions->type) {
4077                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4078                         queue = actions->conf;
4079                         if (queue == NULL)
4080                                 return 0;
4081                         conf = mlx5_rxq_get_hairpin_conf(dev, queue->index);
4082                         if (conf == NULL || conf->tx_explicit != 0)
4083                                 return 0;
4084                         queue_action = 1;
4085                         action_n++;
4086                         break;
4087                 case RTE_FLOW_ACTION_TYPE_RSS:
4088                         rss = actions->conf;
4089                         if (rss == NULL || rss->queue_num == 0)
4090                                 return 0;
4091                         conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]);
4092                         if (conf == NULL || conf->tx_explicit != 0)
4093                                 return 0;
4094                         queue_action = 1;
4095                         action_n++;
4096                         break;
4097                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4098                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4099                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4100                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4101                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4102                         split++;
4103                         action_n++;
4104                         break;
4105                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4106                         raw_encap = actions->conf;
4107                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4108                                 split++;
4109                         action_n++;
4110                         break;
4111                 default:
4112                         action_n++;
4113                         break;
4114                 }
4115         }
4116         if (split && queue_action)
4117                 return action_n;
4118         return 0;
4119 }
4120
4121 /* Declare flow create/destroy prototype in advance. */
4122 static uint32_t
4123 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type,
4124                  const struct rte_flow_attr *attr,
4125                  const struct rte_flow_item items[],
4126                  const struct rte_flow_action actions[],
4127                  bool external, struct rte_flow_error *error);
4128
4129 static void
4130 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type,
4131                   uint32_t flow_idx);
4132
4133 int
4134 flow_dv_mreg_match_cb(void *tool_ctx __rte_unused,
4135                       struct mlx5_list_entry *entry, void *cb_ctx)
4136 {
4137         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4138         struct mlx5_flow_mreg_copy_resource *mcp_res =
4139                                container_of(entry, typeof(*mcp_res), hlist_ent);
4140
4141         return mcp_res->mark_id != *(uint32_t *)(ctx->data);
4142 }
4143
4144 struct mlx5_list_entry *
4145 flow_dv_mreg_create_cb(void *tool_ctx, void *cb_ctx)
4146 {
4147         struct rte_eth_dev *dev = tool_ctx;
4148         struct mlx5_priv *priv = dev->data->dev_private;
4149         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4150         struct mlx5_flow_mreg_copy_resource *mcp_res;
4151         struct rte_flow_error *error = ctx->error;
4152         uint32_t idx = 0;
4153         int ret;
4154         uint32_t mark_id = *(uint32_t *)(ctx->data);
4155         struct rte_flow_attr attr = {
4156                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
4157                 .ingress = 1,
4158         };
4159         struct mlx5_rte_flow_item_tag tag_spec = {
4160                 .data = mark_id,
4161         };
4162         struct rte_flow_item items[] = {
4163                 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
4164         };
4165         struct rte_flow_action_mark ftag = {
4166                 .id = mark_id,
4167         };
4168         struct mlx5_flow_action_copy_mreg cp_mreg = {
4169                 .dst = REG_B,
4170                 .src = REG_NON,
4171         };
4172         struct rte_flow_action_jump jump = {
4173                 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
4174         };
4175         struct rte_flow_action actions[] = {
4176                 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
4177         };
4178
4179         /* Fill the register fileds in the flow. */
4180         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
4181         if (ret < 0)
4182                 return NULL;
4183         tag_spec.id = ret;
4184         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
4185         if (ret < 0)
4186                 return NULL;
4187         cp_mreg.src = ret;
4188         /* Provide the full width of FLAG specific value. */
4189         if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
4190                 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
4191         /* Build a new flow. */
4192         if (mark_id != MLX5_DEFAULT_COPY_ID) {
4193                 items[0] = (struct rte_flow_item){
4194                         .type = (enum rte_flow_item_type)
4195                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
4196                         .spec = &tag_spec,
4197                 };
4198                 items[1] = (struct rte_flow_item){
4199                         .type = RTE_FLOW_ITEM_TYPE_END,
4200                 };
4201                 actions[0] = (struct rte_flow_action){
4202                         .type = (enum rte_flow_action_type)
4203                                 MLX5_RTE_FLOW_ACTION_TYPE_MARK,
4204                         .conf = &ftag,
4205                 };
4206                 actions[1] = (struct rte_flow_action){
4207                         .type = (enum rte_flow_action_type)
4208                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4209                         .conf = &cp_mreg,
4210                 };
4211                 actions[2] = (struct rte_flow_action){
4212                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4213                         .conf = &jump,
4214                 };
4215                 actions[3] = (struct rte_flow_action){
4216                         .type = RTE_FLOW_ACTION_TYPE_END,
4217                 };
4218         } else {
4219                 /* Default rule, wildcard match. */
4220                 attr.priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR;
4221                 items[0] = (struct rte_flow_item){
4222                         .type = RTE_FLOW_ITEM_TYPE_END,
4223                 };
4224                 actions[0] = (struct rte_flow_action){
4225                         .type = (enum rte_flow_action_type)
4226                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4227                         .conf = &cp_mreg,
4228                 };
4229                 actions[1] = (struct rte_flow_action){
4230                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4231                         .conf = &jump,
4232                 };
4233                 actions[2] = (struct rte_flow_action){
4234                         .type = RTE_FLOW_ACTION_TYPE_END,
4235                 };
4236         }
4237         /* Build a new entry. */
4238         mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
4239         if (!mcp_res) {
4240                 rte_errno = ENOMEM;
4241                 return NULL;
4242         }
4243         mcp_res->idx = idx;
4244         mcp_res->mark_id = mark_id;
4245         /*
4246          * The copy Flows are not included in any list. There
4247          * ones are referenced from other Flows and can not
4248          * be applied, removed, deleted in ardbitrary order
4249          * by list traversing.
4250          */
4251         mcp_res->rix_flow = flow_list_create(dev, MLX5_FLOW_TYPE_MCP,
4252                                         &attr, items, actions, false, error);
4253         if (!mcp_res->rix_flow) {
4254                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx);
4255                 return NULL;
4256         }
4257         return &mcp_res->hlist_ent;
4258 }
4259
4260 struct mlx5_list_entry *
4261 flow_dv_mreg_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
4262                       void *cb_ctx __rte_unused)
4263 {
4264         struct rte_eth_dev *dev = tool_ctx;
4265         struct mlx5_priv *priv = dev->data->dev_private;
4266         struct mlx5_flow_mreg_copy_resource *mcp_res;
4267         uint32_t idx = 0;
4268
4269         mcp_res = mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
4270         if (!mcp_res) {
4271                 rte_errno = ENOMEM;
4272                 return NULL;
4273         }
4274         memcpy(mcp_res, oentry, sizeof(*mcp_res));
4275         mcp_res->idx = idx;
4276         return &mcp_res->hlist_ent;
4277 }
4278
4279 void
4280 flow_dv_mreg_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4281 {
4282         struct mlx5_flow_mreg_copy_resource *mcp_res =
4283                                container_of(entry, typeof(*mcp_res), hlist_ent);
4284         struct rte_eth_dev *dev = tool_ctx;
4285         struct mlx5_priv *priv = dev->data->dev_private;
4286
4287         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
4288 }
4289
4290 /**
4291  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4292  *
4293  * As mark_id is unique, if there's already a registered flow for the mark_id,
4294  * return by increasing the reference counter of the resource. Otherwise, create
4295  * the resource (mcp_res) and flow.
4296  *
4297  * Flow looks like,
4298  *   - If ingress port is ANY and reg_c[1] is mark_id,
4299  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4300  *
4301  * For default flow (zero mark_id), flow is like,
4302  *   - If ingress port is ANY,
4303  *     reg_b := reg_c[0] and jump to RX_ACT_TBL.
4304  *
4305  * @param dev
4306  *   Pointer to Ethernet device.
4307  * @param mark_id
4308  *   ID of MARK action, zero means default flow for META.
4309  * @param[out] error
4310  *   Perform verbose error reporting if not NULL.
4311  *
4312  * @return
4313  *   Associated resource on success, NULL otherwise and rte_errno is set.
4314  */
4315 static struct mlx5_flow_mreg_copy_resource *
4316 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
4317                           struct rte_flow_error *error)
4318 {
4319         struct mlx5_priv *priv = dev->data->dev_private;
4320         struct mlx5_list_entry *entry;
4321         struct mlx5_flow_cb_ctx ctx = {
4322                 .dev = dev,
4323                 .error = error,
4324                 .data = &mark_id,
4325         };
4326
4327         /* Check if already registered. */
4328         MLX5_ASSERT(priv->mreg_cp_tbl);
4329         entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx);
4330         if (!entry)
4331                 return NULL;
4332         return container_of(entry, struct mlx5_flow_mreg_copy_resource,
4333                             hlist_ent);
4334 }
4335
4336 void
4337 flow_dv_mreg_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4338 {
4339         struct mlx5_flow_mreg_copy_resource *mcp_res =
4340                                container_of(entry, typeof(*mcp_res), hlist_ent);
4341         struct rte_eth_dev *dev = tool_ctx;
4342         struct mlx5_priv *priv = dev->data->dev_private;
4343
4344         MLX5_ASSERT(mcp_res->rix_flow);
4345         flow_list_destroy(dev, MLX5_FLOW_TYPE_MCP, mcp_res->rix_flow);
4346         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
4347 }
4348
4349 /**
4350  * Release flow in RX_CP_TBL.
4351  *
4352  * @param dev
4353  *   Pointer to Ethernet device.
4354  * @flow
4355  *   Parent flow for wich copying is provided.
4356  */
4357 static void
4358 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
4359                           struct rte_flow *flow)
4360 {
4361         struct mlx5_flow_mreg_copy_resource *mcp_res;
4362         struct mlx5_priv *priv = dev->data->dev_private;
4363
4364         if (!flow->rix_mreg_copy)
4365                 return;
4366         mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
4367                                  flow->rix_mreg_copy);
4368         if (!mcp_res || !priv->mreg_cp_tbl)
4369                 return;
4370         MLX5_ASSERT(mcp_res->rix_flow);
4371         mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
4372         flow->rix_mreg_copy = 0;
4373 }
4374
4375 /**
4376  * Remove the default copy action from RX_CP_TBL.
4377  *
4378  * This functions is called in the mlx5_dev_start(). No thread safe
4379  * is guaranteed.
4380  *
4381  * @param dev
4382  *   Pointer to Ethernet device.
4383  */
4384 static void
4385 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
4386 {
4387         struct mlx5_list_entry *entry;
4388         struct mlx5_priv *priv = dev->data->dev_private;
4389         struct mlx5_flow_cb_ctx ctx;
4390         uint32_t mark_id;
4391
4392         /* Check if default flow is registered. */
4393         if (!priv->mreg_cp_tbl)
4394                 return;
4395         mark_id = MLX5_DEFAULT_COPY_ID;
4396         ctx.data = &mark_id;
4397         entry = mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx);
4398         if (!entry)
4399                 return;
4400         mlx5_hlist_unregister(priv->mreg_cp_tbl, entry);
4401 }
4402
4403 /**
4404  * Add the default copy action in in RX_CP_TBL.
4405  *
4406  * This functions is called in the mlx5_dev_start(). No thread safe
4407  * is guaranteed.
4408  *
4409  * @param dev
4410  *   Pointer to Ethernet device.
4411  * @param[out] error
4412  *   Perform verbose error reporting if not NULL.
4413  *
4414  * @return
4415  *   0 for success, negative value otherwise and rte_errno is set.
4416  */
4417 static int
4418 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
4419                                   struct rte_flow_error *error)
4420 {
4421         struct mlx5_priv *priv = dev->data->dev_private;
4422         struct mlx5_flow_mreg_copy_resource *mcp_res;
4423         struct mlx5_flow_cb_ctx ctx;
4424         uint32_t mark_id;
4425
4426         /* Check whether extensive metadata feature is engaged. */
4427         if (!priv->config.dv_flow_en ||
4428             priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4429             !mlx5_flow_ext_mreg_supported(dev) ||
4430             !priv->sh->dv_regc0_mask)
4431                 return 0;
4432         /*
4433          * Add default mreg copy flow may be called multiple time, but
4434          * only be called once in stop. Avoid register it twice.
4435          */
4436         mark_id = MLX5_DEFAULT_COPY_ID;
4437         ctx.data = &mark_id;
4438         if (mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx))
4439                 return 0;
4440         mcp_res = flow_mreg_add_copy_action(dev, mark_id, error);
4441         if (!mcp_res)
4442                 return -rte_errno;
4443         return 0;
4444 }
4445
4446 /**
4447  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4448  *
4449  * All the flow having Q/RSS action should be split by
4450  * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
4451  * performs the following,
4452  *   - CQE->flow_tag := reg_c[1] (MARK)
4453  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4454  * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
4455  * but there should be a flow per each MARK ID set by MARK action.
4456  *
4457  * For the aforementioned reason, if there's a MARK action in flow's action
4458  * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
4459  * the MARK ID to CQE's flow_tag like,
4460  *   - If reg_c[1] is mark_id,
4461  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4462  *
4463  * For SET_META action which stores value in reg_c[0], as the destination is
4464  * also a flow metadata register (reg_b), adding a default flow is enough. Zero
4465  * MARK ID means the default flow. The default flow looks like,
4466  *   - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4467  *
4468  * @param dev
4469  *   Pointer to Ethernet device.
4470  * @param flow
4471  *   Pointer to flow structure.
4472  * @param[in] actions
4473  *   Pointer to the list of actions.
4474  * @param[out] error
4475  *   Perform verbose error reporting if not NULL.
4476  *
4477  * @return
4478  *   0 on success, negative value otherwise and rte_errno is set.
4479  */
4480 static int
4481 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
4482                             struct rte_flow *flow,
4483                             const struct rte_flow_action *actions,
4484                             struct rte_flow_error *error)
4485 {
4486         struct mlx5_priv *priv = dev->data->dev_private;
4487         struct mlx5_dev_config *config = &priv->config;
4488         struct mlx5_flow_mreg_copy_resource *mcp_res;
4489         const struct rte_flow_action_mark *mark;
4490
4491         /* Check whether extensive metadata feature is engaged. */
4492         if (!config->dv_flow_en ||
4493             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4494             !mlx5_flow_ext_mreg_supported(dev) ||
4495             !priv->sh->dv_regc0_mask)
4496                 return 0;
4497         /* Find MARK action. */
4498         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4499                 switch (actions->type) {
4500                 case RTE_FLOW_ACTION_TYPE_FLAG:
4501                         mcp_res = flow_mreg_add_copy_action
4502                                 (dev, MLX5_FLOW_MARK_DEFAULT, error);
4503                         if (!mcp_res)
4504                                 return -rte_errno;
4505                         flow->rix_mreg_copy = mcp_res->idx;
4506                         return 0;
4507                 case RTE_FLOW_ACTION_TYPE_MARK:
4508                         mark = (const struct rte_flow_action_mark *)
4509                                 actions->conf;
4510                         mcp_res =
4511                                 flow_mreg_add_copy_action(dev, mark->id, error);
4512                         if (!mcp_res)
4513                                 return -rte_errno;
4514                         flow->rix_mreg_copy = mcp_res->idx;
4515                         return 0;
4516                 default:
4517                         break;
4518                 }
4519         }
4520         return 0;
4521 }
4522
4523 #define MLX5_MAX_SPLIT_ACTIONS 24
4524 #define MLX5_MAX_SPLIT_ITEMS 24
4525
4526 /**
4527  * Split the hairpin flow.
4528  * Since HW can't support encap and push-vlan on Rx, we move these
4529  * actions to Tx.
4530  * If the count action is after the encap then we also
4531  * move the count action. in this case the count will also measure
4532  * the outer bytes.
4533  *
4534  * @param dev
4535  *   Pointer to Ethernet device.
4536  * @param[in] actions
4537  *   Associated actions (list terminated by the END action).
4538  * @param[out] actions_rx
4539  *   Rx flow actions.
4540  * @param[out] actions_tx
4541  *   Tx flow actions..
4542  * @param[out] pattern_tx
4543  *   The pattern items for the Tx flow.
4544  * @param[out] flow_id
4545  *   The flow ID connected to this flow.
4546  *
4547  * @return
4548  *   0 on success.
4549  */
4550 static int
4551 flow_hairpin_split(struct rte_eth_dev *dev,
4552                    const struct rte_flow_action actions[],
4553                    struct rte_flow_action actions_rx[],
4554                    struct rte_flow_action actions_tx[],
4555                    struct rte_flow_item pattern_tx[],
4556                    uint32_t flow_id)
4557 {
4558         const struct rte_flow_action_raw_encap *raw_encap;
4559         const struct rte_flow_action_raw_decap *raw_decap;
4560         struct mlx5_rte_flow_action_set_tag *set_tag;
4561         struct rte_flow_action *tag_action;
4562         struct mlx5_rte_flow_item_tag *tag_item;
4563         struct rte_flow_item *item;
4564         char *addr;
4565         int encap = 0;
4566
4567         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4568                 switch (actions->type) {
4569                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4570                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4571                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4572                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4573                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4574                         rte_memcpy(actions_tx, actions,
4575                                sizeof(struct rte_flow_action));
4576                         actions_tx++;
4577                         break;
4578                 case RTE_FLOW_ACTION_TYPE_COUNT:
4579                         if (encap) {
4580                                 rte_memcpy(actions_tx, actions,
4581                                            sizeof(struct rte_flow_action));
4582                                 actions_tx++;
4583                         } else {
4584                                 rte_memcpy(actions_rx, actions,
4585                                            sizeof(struct rte_flow_action));
4586                                 actions_rx++;
4587                         }
4588                         break;
4589                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4590                         raw_encap = actions->conf;
4591                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
4592                                 memcpy(actions_tx, actions,
4593                                        sizeof(struct rte_flow_action));
4594                                 actions_tx++;
4595                                 encap = 1;
4596                         } else {
4597                                 rte_memcpy(actions_rx, actions,
4598                                            sizeof(struct rte_flow_action));
4599                                 actions_rx++;
4600                         }
4601                         break;
4602                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4603                         raw_decap = actions->conf;
4604                         if (raw_decap->size < MLX5_ENCAPSULATION_DECISION_SIZE) {
4605                                 memcpy(actions_tx, actions,
4606                                        sizeof(struct rte_flow_action));
4607                                 actions_tx++;
4608                         } else {
4609                                 rte_memcpy(actions_rx, actions,
4610                                            sizeof(struct rte_flow_action));
4611                                 actions_rx++;
4612                         }
4613                         break;
4614                 default:
4615                         rte_memcpy(actions_rx, actions,
4616                                    sizeof(struct rte_flow_action));
4617                         actions_rx++;
4618                         break;
4619                 }
4620         }
4621         /* Add set meta action and end action for the Rx flow. */
4622         tag_action = actions_rx;
4623         tag_action->type = (enum rte_flow_action_type)
4624                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4625         actions_rx++;
4626         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
4627         actions_rx++;
4628         set_tag = (void *)actions_rx;
4629         *set_tag = (struct mlx5_rte_flow_action_set_tag) {
4630                 .id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL),
4631                 .data = flow_id,
4632         };
4633         MLX5_ASSERT(set_tag->id > REG_NON);
4634         tag_action->conf = set_tag;
4635         /* Create Tx item list. */
4636         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
4637         addr = (void *)&pattern_tx[2];
4638         item = pattern_tx;
4639         item->type = (enum rte_flow_item_type)
4640                      MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4641         tag_item = (void *)addr;
4642         tag_item->data = flow_id;
4643         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
4644         MLX5_ASSERT(set_tag->id > REG_NON);
4645         item->spec = tag_item;
4646         addr += sizeof(struct mlx5_rte_flow_item_tag);
4647         tag_item = (void *)addr;
4648         tag_item->data = UINT32_MAX;
4649         tag_item->id = UINT16_MAX;
4650         item->mask = tag_item;
4651         item->last = NULL;
4652         item++;
4653         item->type = RTE_FLOW_ITEM_TYPE_END;
4654         return 0;
4655 }
4656
4657 /**
4658  * The last stage of splitting chain, just creates the subflow
4659  * without any modification.
4660  *
4661  * @param[in] dev
4662  *   Pointer to Ethernet device.
4663  * @param[in] flow
4664  *   Parent flow structure pointer.
4665  * @param[in, out] sub_flow
4666  *   Pointer to return the created subflow, may be NULL.
4667  * @param[in] attr
4668  *   Flow rule attributes.
4669  * @param[in] items
4670  *   Pattern specification (list terminated by the END pattern item).
4671  * @param[in] actions
4672  *   Associated actions (list terminated by the END action).
4673  * @param[in] flow_split_info
4674  *   Pointer to flow split info structure.
4675  * @param[out] error
4676  *   Perform verbose error reporting if not NULL.
4677  * @return
4678  *   0 on success, negative value otherwise
4679  */
4680 static int
4681 flow_create_split_inner(struct rte_eth_dev *dev,
4682                         struct rte_flow *flow,
4683                         struct mlx5_flow **sub_flow,
4684                         const struct rte_flow_attr *attr,
4685                         const struct rte_flow_item items[],
4686                         const struct rte_flow_action actions[],
4687                         struct mlx5_flow_split_info *flow_split_info,
4688                         struct rte_flow_error *error)
4689 {
4690         struct mlx5_flow *dev_flow;
4691
4692         dev_flow = flow_drv_prepare(dev, flow, attr, items, actions,
4693                                     flow_split_info->flow_idx, error);
4694         if (!dev_flow)
4695                 return -rte_errno;
4696         dev_flow->flow = flow;
4697         dev_flow->external = flow_split_info->external;
4698         dev_flow->skip_scale = flow_split_info->skip_scale;
4699         /* Subflow object was created, we must include one in the list. */
4700         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4701                       dev_flow->handle, next);
4702         /*
4703          * If dev_flow is as one of the suffix flow, some actions in suffix
4704          * flow may need some user defined item layer flags, and pass the
4705          * Metadate rxq mark flag to suffix flow as well.
4706          */
4707         if (flow_split_info->prefix_layers)
4708                 dev_flow->handle->layers = flow_split_info->prefix_layers;
4709         if (flow_split_info->prefix_mark)
4710                 dev_flow->handle->mark = 1;
4711         if (sub_flow)
4712                 *sub_flow = dev_flow;
4713 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
4714         dev_flow->dv.table_id = flow_split_info->table_id;
4715 #endif
4716         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
4717 }
4718
4719 /**
4720  * Get the sub policy of a meter.
4721  *
4722  * @param[in] dev
4723  *   Pointer to Ethernet device.
4724  * @param[in] flow
4725  *   Parent flow structure pointer.
4726  * @param wks
4727  *   Pointer to thread flow work space.
4728  * @param[in] attr
4729  *   Flow rule attributes.
4730  * @param[in] items
4731  *   Pattern specification (list terminated by the END pattern item).
4732  * @param[out] error
4733  *   Perform verbose error reporting if not NULL.
4734  *
4735  * @return
4736  *   Pointer to the meter sub policy, NULL otherwise and rte_errno is set.
4737  */
4738 static struct mlx5_flow_meter_sub_policy *
4739 get_meter_sub_policy(struct rte_eth_dev *dev,
4740                      struct rte_flow *flow,
4741                      struct mlx5_flow_workspace *wks,
4742                      const struct rte_flow_attr *attr,
4743                      const struct rte_flow_item items[],
4744                      struct rte_flow_error *error)
4745 {
4746         struct mlx5_flow_meter_policy *policy;
4747         struct mlx5_flow_meter_policy *final_policy;
4748         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
4749
4750         policy = wks->policy;
4751         final_policy = policy->is_hierarchy ? wks->final_policy : policy;
4752         if (final_policy->is_rss || final_policy->is_queue) {
4753                 struct mlx5_flow_rss_desc rss_desc_v[MLX5_MTR_RTE_COLORS];
4754                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS] = {0};
4755                 uint32_t i;
4756
4757                 /*
4758                  * This is a tmp dev_flow,
4759                  * no need to register any matcher for it in translate.
4760                  */
4761                 wks->skip_matcher_reg = 1;
4762                 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
4763                         struct mlx5_flow dev_flow = {0};
4764                         struct mlx5_flow_handle dev_handle = { {0} };
4765                         uint8_t fate = final_policy->act_cnt[i].fate_action;
4766
4767                         if (fate == MLX5_FLOW_FATE_SHARED_RSS) {
4768                                 const struct rte_flow_action_rss *rss_act =
4769                                         final_policy->act_cnt[i].rss->conf;
4770                                 struct rte_flow_action rss_actions[2] = {
4771                                         [0] = {
4772                                         .type = RTE_FLOW_ACTION_TYPE_RSS,
4773                                         .conf = rss_act,
4774                                         },
4775                                         [1] = {
4776                                         .type = RTE_FLOW_ACTION_TYPE_END,
4777                                         .conf = NULL,
4778                                         }
4779                                 };
4780
4781                                 dev_flow.handle = &dev_handle;
4782                                 dev_flow.ingress = attr->ingress;
4783                                 dev_flow.flow = flow;
4784                                 dev_flow.external = 0;
4785 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
4786                                 dev_flow.dv.transfer = attr->transfer;
4787 #endif
4788                                 /**
4789                                  * Translate RSS action to get rss hash fields.
4790                                  */
4791                                 if (flow_drv_translate(dev, &dev_flow, attr,
4792                                                 items, rss_actions, error))
4793                                         goto exit;
4794                                 rss_desc_v[i] = wks->rss_desc;
4795                                 rss_desc_v[i].key_len = MLX5_RSS_HASH_KEY_LEN;
4796                                 rss_desc_v[i].hash_fields =
4797                                                 dev_flow.hash_fields;
4798                                 rss_desc_v[i].queue_num =
4799                                                 rss_desc_v[i].hash_fields ?
4800                                                 rss_desc_v[i].queue_num : 1;
4801                                 rss_desc_v[i].tunnel =
4802                                                 !!(dev_flow.handle->layers &
4803                                                    MLX5_FLOW_LAYER_TUNNEL);
4804                                 /* Use the RSS queues in the containers. */
4805                                 rss_desc_v[i].queue =
4806                                         (uint16_t *)(uintptr_t)rss_act->queue;
4807                                 rss_desc[i] = &rss_desc_v[i];
4808                         } else if (fate == MLX5_FLOW_FATE_QUEUE) {
4809                                 /* This is queue action. */
4810                                 rss_desc_v[i] = wks->rss_desc;
4811                                 rss_desc_v[i].key_len = 0;
4812                                 rss_desc_v[i].hash_fields = 0;
4813                                 rss_desc_v[i].queue =
4814                                         &final_policy->act_cnt[i].queue;
4815                                 rss_desc_v[i].queue_num = 1;
4816                                 rss_desc[i] = &rss_desc_v[i];
4817                         } else {
4818                                 rss_desc[i] = NULL;
4819                         }
4820                 }
4821                 sub_policy = flow_drv_meter_sub_policy_rss_prepare(dev,
4822                                                 flow, policy, rss_desc);
4823         } else {
4824                 enum mlx5_meter_domain mtr_domain =
4825                         attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
4826                                 (attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
4827                                                 MLX5_MTR_DOMAIN_INGRESS);
4828                 sub_policy = policy->sub_policys[mtr_domain][0];
4829         }
4830         if (!sub_policy)
4831                 rte_flow_error_set(error, EINVAL,
4832                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4833                                    "Failed to get meter sub-policy.");
4834 exit:
4835         return sub_policy;
4836 }
4837
4838 /**
4839  * Split the meter flow.
4840  *
4841  * As meter flow will split to three sub flow, other than meter
4842  * action, the other actions make sense to only meter accepts
4843  * the packet. If it need to be dropped, no other additional
4844  * actions should be take.
4845  *
4846  * One kind of special action which decapsulates the L3 tunnel
4847  * header will be in the prefix sub flow, as not to take the
4848  * L3 tunnel header into account.
4849  *
4850  * @param[in] dev
4851  *   Pointer to Ethernet device.
4852  * @param[in] flow
4853  *   Parent flow structure pointer.
4854  * @param wks
4855  *   Pointer to thread flow work space.
4856  * @param[in] attr
4857  *   Flow rule attributes.
4858  * @param[in] items
4859  *   Pattern specification (list terminated by the END pattern item).
4860  * @param[out] sfx_items
4861  *   Suffix flow match items (list terminated by the END pattern item).
4862  * @param[in] actions
4863  *   Associated actions (list terminated by the END action).
4864  * @param[out] actions_sfx
4865  *   Suffix flow actions.
4866  * @param[out] actions_pre
4867  *   Prefix flow actions.
4868  * @param[out] mtr_flow_id
4869  *   Pointer to meter flow id.
4870  * @param[out] error
4871  *   Perform verbose error reporting if not NULL.
4872  *
4873  * @return
4874  *   0 on success, a negative errno value otherwise and rte_errno is set.
4875  */
4876 static int
4877 flow_meter_split_prep(struct rte_eth_dev *dev,
4878                       struct rte_flow *flow,
4879                       struct mlx5_flow_workspace *wks,
4880                       const struct rte_flow_attr *attr,
4881                       const struct rte_flow_item items[],
4882                       struct rte_flow_item sfx_items[],
4883                       const struct rte_flow_action actions[],
4884                       struct rte_flow_action actions_sfx[],
4885                       struct rte_flow_action actions_pre[],
4886                       uint32_t *mtr_flow_id,
4887                       struct rte_flow_error *error)
4888 {
4889         struct mlx5_priv *priv = dev->data->dev_private;
4890         struct mlx5_flow_meter_info *fm = wks->fm;
4891         struct rte_flow_action *tag_action = NULL;
4892         struct rte_flow_item *tag_item;
4893         struct mlx5_rte_flow_action_set_tag *set_tag;
4894         const struct rte_flow_action_raw_encap *raw_encap;
4895         const struct rte_flow_action_raw_decap *raw_decap;
4896         struct mlx5_rte_flow_item_tag *tag_item_spec;
4897         struct mlx5_rte_flow_item_tag *tag_item_mask;
4898         uint32_t tag_id = 0;
4899         struct rte_flow_item *vlan_item_dst = NULL;
4900         const struct rte_flow_item *vlan_item_src = NULL;
4901         struct rte_flow_action *hw_mtr_action;
4902         struct rte_flow_action *action_pre_head = NULL;
4903         int32_t flow_src_port = priv->representor_id;
4904         bool mtr_first;
4905         uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
4906         uint8_t mtr_reg_bits = priv->mtr_reg_share ?
4907                                 MLX5_MTR_IDLE_BITS_IN_COLOR_REG : MLX5_REG_BITS;
4908         uint32_t flow_id = 0;
4909         uint32_t flow_id_reversed = 0;
4910         uint8_t flow_id_bits = 0;
4911         int shift;
4912
4913         /* Prepare the suffix subflow items. */
4914         tag_item = sfx_items++;
4915         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4916                 struct mlx5_priv *port_priv;
4917                 const struct rte_flow_item_port_id *pid_v;
4918                 int item_type = items->type;
4919
4920                 switch (item_type) {
4921                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4922                         pid_v = items->spec;
4923                         MLX5_ASSERT(pid_v);
4924                         port_priv = mlx5_port_to_eswitch_info(pid_v->id, false);
4925                         if (!port_priv)
4926                                 return rte_flow_error_set(error,
4927                                                 rte_errno,
4928                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
4929                                                 pid_v,
4930                                                 "Failed to get port info.");
4931                         flow_src_port = port_priv->representor_id;
4932                         if (!fm->def_policy && wks->policy->is_hierarchy &&
4933                             flow_src_port != priv->representor_id) {
4934                                 if (flow_drv_mtr_hierarchy_rule_create(dev,
4935                                                                 flow, fm,
4936                                                                 flow_src_port,
4937                                                                 items,
4938                                                                 error))
4939                                         return -rte_errno;
4940                         }
4941                         memcpy(sfx_items, items, sizeof(*sfx_items));
4942                         sfx_items++;
4943                         break;
4944                 case RTE_FLOW_ITEM_TYPE_VLAN:
4945                         /* Determine if copy vlan item below. */
4946                         vlan_item_src = items;
4947                         vlan_item_dst = sfx_items++;
4948                         vlan_item_dst->type = RTE_FLOW_ITEM_TYPE_VOID;
4949                         break;
4950                 default:
4951                         break;
4952                 }
4953         }
4954         sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
4955         sfx_items++;
4956         mtr_first = priv->sh->meter_aso_en &&
4957                 (attr->egress || (attr->transfer && flow_src_port != UINT16_MAX));
4958         /* For ASO meter, meter must be before tag in TX direction. */
4959         if (mtr_first) {
4960                 action_pre_head = actions_pre++;
4961                 /* Leave space for tag action. */
4962                 tag_action = actions_pre++;
4963         }
4964         /* Prepare the actions for prefix and suffix flow. */
4965         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4966                 struct rte_flow_action *action_cur = NULL;
4967
4968                 switch (actions->type) {
4969                 case RTE_FLOW_ACTION_TYPE_METER:
4970                         if (mtr_first) {
4971                                 action_cur = action_pre_head;
4972                         } else {
4973                                 /* Leave space for tag action. */
4974                                 tag_action = actions_pre++;
4975                                 action_cur = actions_pre++;
4976                         }
4977                         break;
4978                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4979                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4980                         action_cur = actions_pre++;
4981                         break;
4982                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4983                         raw_encap = actions->conf;
4984                         if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
4985                                 action_cur = actions_pre++;
4986                         break;
4987                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4988                         raw_decap = actions->conf;
4989                         if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4990                                 action_cur = actions_pre++;
4991                         break;
4992                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4993                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4994                         if (vlan_item_dst && vlan_item_src) {
4995                                 memcpy(vlan_item_dst, vlan_item_src,
4996                                         sizeof(*vlan_item_dst));
4997                                 /*
4998                                  * Convert to internal match item, it is used
4999                                  * for vlan push and set vid.
5000                                  */
5001                                 vlan_item_dst->type = (enum rte_flow_item_type)
5002                                                 MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
5003                         }
5004                         break;
5005                 default:
5006                         break;
5007                 }
5008                 if (!action_cur)
5009                         action_cur = (fm->def_policy) ?
5010                                         actions_sfx++ : actions_pre++;
5011                 memcpy(action_cur, actions, sizeof(struct rte_flow_action));
5012         }
5013         /* Add end action to the actions. */
5014         actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
5015         if (priv->sh->meter_aso_en) {
5016                 /**
5017                  * For ASO meter, need to add an extra jump action explicitly,
5018                  * to jump from meter to policer table.
5019                  */
5020                 struct mlx5_flow_meter_sub_policy *sub_policy;
5021                 struct mlx5_flow_tbl_data_entry *tbl_data;
5022
5023                 if (!fm->def_policy) {
5024                         sub_policy = get_meter_sub_policy(dev, flow, wks,
5025                                                           attr, items, error);
5026                         if (!sub_policy)
5027                                 return -rte_errno;
5028                 } else {
5029                         enum mlx5_meter_domain mtr_domain =
5030                         attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
5031                                 (attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
5032                                                 MLX5_MTR_DOMAIN_INGRESS);
5033
5034                         sub_policy =
5035                         &priv->sh->mtrmng->def_policy[mtr_domain]->sub_policy;
5036                 }
5037                 tbl_data = container_of(sub_policy->tbl_rsc,
5038                                         struct mlx5_flow_tbl_data_entry, tbl);
5039                 hw_mtr_action = actions_pre++;
5040                 hw_mtr_action->type = (enum rte_flow_action_type)
5041                                       MLX5_RTE_FLOW_ACTION_TYPE_JUMP;
5042                 hw_mtr_action->conf = tbl_data->jump.action;
5043         }
5044         actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
5045         actions_pre++;
5046         if (!tag_action)
5047                 return rte_flow_error_set(error, ENOMEM,
5048                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5049                                           NULL, "No tag action space.");
5050         if (!mtr_flow_id) {
5051                 tag_action->type = RTE_FLOW_ACTION_TYPE_VOID;
5052                 goto exit;
5053         }
5054         /* Only default-policy Meter creates mtr flow id. */
5055         if (fm->def_policy) {
5056                 mlx5_ipool_malloc(fm->flow_ipool, &tag_id);
5057                 if (!tag_id)
5058                         return rte_flow_error_set(error, ENOMEM,
5059                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5060                                         "Failed to allocate meter flow id.");
5061                 flow_id = tag_id - 1;
5062                 flow_id_bits = (!flow_id) ? 1 :
5063                                 (MLX5_REG_BITS - __builtin_clz(flow_id));
5064                 if ((flow_id_bits + priv->sh->mtrmng->max_mtr_bits) >
5065                     mtr_reg_bits) {
5066                         mlx5_ipool_free(fm->flow_ipool, tag_id);
5067                         return rte_flow_error_set(error, EINVAL,
5068                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5069                                         "Meter flow id exceeds max limit.");
5070                 }
5071                 if (flow_id_bits > priv->sh->mtrmng->max_mtr_flow_bits)
5072                         priv->sh->mtrmng->max_mtr_flow_bits = flow_id_bits;
5073         }
5074         /* Build tag actions and items for meter_id/meter flow_id. */
5075         set_tag = (struct mlx5_rte_flow_action_set_tag *)actions_pre;
5076         tag_item_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
5077         tag_item_mask = tag_item_spec + 1;
5078         /* Both flow_id and meter_id share the same register. */
5079         *set_tag = (struct mlx5_rte_flow_action_set_tag) {
5080                 .id = (enum modify_reg)mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
5081                                                             0, error),
5082                 .offset = mtr_id_offset,
5083                 .length = mtr_reg_bits,
5084                 .data = flow->meter,
5085         };
5086         /*
5087          * The color Reg bits used by flow_id are growing from
5088          * msb to lsb, so must do bit reverse for flow_id val in RegC.
5089          */
5090         for (shift = 0; shift < flow_id_bits; shift++)
5091                 flow_id_reversed = (flow_id_reversed << 1) |
5092                                 ((flow_id >> shift) & 0x1);
5093         set_tag->data |=
5094                 flow_id_reversed << (mtr_reg_bits - flow_id_bits);
5095         tag_item_spec->id = set_tag->id;
5096         tag_item_spec->data = set_tag->data << mtr_id_offset;
5097         tag_item_mask->data = UINT32_MAX << mtr_id_offset;
5098         tag_action->type = (enum rte_flow_action_type)
5099                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
5100         tag_action->conf = set_tag;
5101         tag_item->type = (enum rte_flow_item_type)
5102                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG;
5103         tag_item->spec = tag_item_spec;
5104         tag_item->last = NULL;
5105         tag_item->mask = tag_item_mask;
5106 exit:
5107         if (mtr_flow_id)
5108                 *mtr_flow_id = tag_id;
5109         return 0;
5110 }
5111
5112 /**
5113  * Split action list having QUEUE/RSS for metadata register copy.
5114  *
5115  * Once Q/RSS action is detected in user's action list, the flow action
5116  * should be split in order to copy metadata registers, which will happen in
5117  * RX_CP_TBL like,
5118  *   - CQE->flow_tag := reg_c[1] (MARK)
5119  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
5120  * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
5121  * This is because the last action of each flow must be a terminal action
5122  * (QUEUE, RSS or DROP).
5123  *
5124  * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
5125  * stored and kept in the mlx5_flow structure per each sub_flow.
5126  *
5127  * The Q/RSS action is replaced with,
5128  *   - SET_TAG, setting the allocated flow ID to reg_c[2].
5129  * And the following JUMP action is added at the end,
5130  *   - JUMP, to RX_CP_TBL.
5131  *
5132  * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
5133  * flow_create_split_metadata() routine. The flow will look like,
5134  *   - If flow ID matches (reg_c[2]), perform Q/RSS.
5135  *
5136  * @param dev
5137  *   Pointer to Ethernet device.
5138  * @param[out] split_actions
5139  *   Pointer to store split actions to jump to CP_TBL.
5140  * @param[in] actions
5141  *   Pointer to the list of original flow actions.
5142  * @param[in] qrss
5143  *   Pointer to the Q/RSS action.
5144  * @param[in] actions_n
5145  *   Number of original actions.
5146  * @param[out] error
5147  *   Perform verbose error reporting if not NULL.
5148  *
5149  * @return
5150  *   non-zero unique flow_id on success, otherwise 0 and
5151  *   error/rte_error are set.
5152  */
5153 static uint32_t
5154 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
5155                           struct rte_flow_action *split_actions,
5156                           const struct rte_flow_action *actions,
5157                           const struct rte_flow_action *qrss,
5158                           int actions_n, struct rte_flow_error *error)
5159 {
5160         struct mlx5_priv *priv = dev->data->dev_private;
5161         struct mlx5_rte_flow_action_set_tag *set_tag;
5162         struct rte_flow_action_jump *jump;
5163         const int qrss_idx = qrss - actions;
5164         uint32_t flow_id = 0;
5165         int ret = 0;
5166
5167         /*
5168          * Given actions will be split
5169          * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
5170          * - Add jump to mreg CP_TBL.
5171          * As a result, there will be one more action.
5172          */
5173         ++actions_n;
5174         memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
5175         set_tag = (void *)(split_actions + actions_n);
5176         /*
5177          * If tag action is not set to void(it means we are not the meter
5178          * suffix flow), add the tag action. Since meter suffix flow already
5179          * has the tag added.
5180          */
5181         if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) {
5182                 /*
5183                  * Allocate the new subflow ID. This one is unique within
5184                  * device and not shared with representors. Otherwise,
5185                  * we would have to resolve multi-thread access synch
5186                  * issue. Each flow on the shared device is appended
5187                  * with source vport identifier, so the resulting
5188                  * flows will be unique in the shared (by master and
5189                  * representors) domain even if they have coinciding
5190                  * IDs.
5191                  */
5192                 mlx5_ipool_malloc(priv->sh->ipool
5193                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id);
5194                 if (!flow_id)
5195                         return rte_flow_error_set(error, ENOMEM,
5196                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5197                                                   NULL, "can't allocate id "
5198                                                   "for split Q/RSS subflow");
5199                 /* Internal SET_TAG action to set flow ID. */
5200                 *set_tag = (struct mlx5_rte_flow_action_set_tag){
5201                         .data = flow_id,
5202                 };
5203                 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
5204                 if (ret < 0)
5205                         return ret;
5206                 set_tag->id = ret;
5207                 /* Construct new actions array. */
5208                 /* Replace QUEUE/RSS action. */
5209                 split_actions[qrss_idx] = (struct rte_flow_action){
5210                         .type = (enum rte_flow_action_type)
5211                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
5212                         .conf = set_tag,
5213                 };
5214         }
5215         /* JUMP action to jump to mreg copy table (CP_TBL). */
5216         jump = (void *)(set_tag + 1);
5217         *jump = (struct rte_flow_action_jump){
5218                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
5219         };
5220         split_actions[actions_n - 2] = (struct rte_flow_action){
5221                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
5222                 .conf = jump,
5223         };
5224         split_actions[actions_n - 1] = (struct rte_flow_action){
5225                 .type = RTE_FLOW_ACTION_TYPE_END,
5226         };
5227         return flow_id;
5228 }
5229
5230 /**
5231  * Extend the given action list for Tx metadata copy.
5232  *
5233  * Copy the given action list to the ext_actions and add flow metadata register
5234  * copy action in order to copy reg_a set by WQE to reg_c[0].
5235  *
5236  * @param[out] ext_actions
5237  *   Pointer to the extended action list.
5238  * @param[in] actions
5239  *   Pointer to the list of actions.
5240  * @param[in] actions_n
5241  *   Number of actions in the list.
5242  * @param[out] error
5243  *   Perform verbose error reporting if not NULL.
5244  * @param[in] encap_idx
5245  *   The encap action inndex.
5246  *
5247  * @return
5248  *   0 on success, negative value otherwise
5249  */
5250 static int
5251 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
5252                        struct rte_flow_action *ext_actions,
5253                        const struct rte_flow_action *actions,
5254                        int actions_n, struct rte_flow_error *error,
5255                        int encap_idx)
5256 {
5257         struct mlx5_flow_action_copy_mreg *cp_mreg =
5258                 (struct mlx5_flow_action_copy_mreg *)
5259                         (ext_actions + actions_n + 1);
5260         int ret;
5261
5262         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
5263         if (ret < 0)
5264                 return ret;
5265         cp_mreg->dst = ret;
5266         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
5267         if (ret < 0)
5268                 return ret;
5269         cp_mreg->src = ret;
5270         if (encap_idx != 0)
5271                 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
5272         if (encap_idx == actions_n - 1) {
5273                 ext_actions[actions_n - 1] = (struct rte_flow_action){
5274                         .type = (enum rte_flow_action_type)
5275                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5276                         .conf = cp_mreg,
5277                 };
5278                 ext_actions[actions_n] = (struct rte_flow_action){
5279                         .type = RTE_FLOW_ACTION_TYPE_END,
5280                 };
5281         } else {
5282                 ext_actions[encap_idx] = (struct rte_flow_action){
5283                         .type = (enum rte_flow_action_type)
5284                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5285                         .conf = cp_mreg,
5286                 };
5287                 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
5288                                 sizeof(*ext_actions) * (actions_n - encap_idx));
5289         }
5290         return 0;
5291 }
5292
5293 /**
5294  * Check the match action from the action list.
5295  *
5296  * @param[in] actions
5297  *   Pointer to the list of actions.
5298  * @param[in] attr
5299  *   Flow rule attributes.
5300  * @param[in] action
5301  *   The action to be check if exist.
5302  * @param[out] match_action_pos
5303  *   Pointer to the position of the matched action if exists, otherwise is -1.
5304  * @param[out] qrss_action_pos
5305  *   Pointer to the position of the Queue/RSS action if exists, otherwise is -1.
5306  * @param[out] modify_after_mirror
5307  *   Pointer to the flag of modify action after FDB mirroring.
5308  *
5309  * @return
5310  *   > 0 the total number of actions.
5311  *   0 if not found match action in action list.
5312  */
5313 static int
5314 flow_check_match_action(const struct rte_flow_action actions[],
5315                         const struct rte_flow_attr *attr,
5316                         enum rte_flow_action_type action,
5317                         int *match_action_pos, int *qrss_action_pos,
5318                         int *modify_after_mirror)
5319 {
5320         const struct rte_flow_action_sample *sample;
5321         const struct rte_flow_action_raw_decap *decap;
5322         int actions_n = 0;
5323         uint32_t ratio = 0;
5324         int sub_type = 0;
5325         int flag = 0;
5326         int fdb_mirror = 0;
5327
5328         *match_action_pos = -1;
5329         *qrss_action_pos = -1;
5330         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5331                 if (actions->type == action) {
5332                         flag = 1;
5333                         *match_action_pos = actions_n;
5334                 }
5335                 switch (actions->type) {
5336                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5337                 case RTE_FLOW_ACTION_TYPE_RSS:
5338                         *qrss_action_pos = actions_n;
5339                         break;
5340                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
5341                         sample = actions->conf;
5342                         ratio = sample->ratio;
5343                         sub_type = ((const struct rte_flow_action *)
5344                                         (sample->actions))->type;
5345                         if (ratio == 1 && attr->transfer)
5346                                 fdb_mirror = 1;
5347                         break;
5348                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
5349                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
5350                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
5351                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
5352                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
5353                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
5354                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
5355                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
5356                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
5357                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
5358                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
5359                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
5360                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5361                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5362                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5363                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5364                 case RTE_FLOW_ACTION_TYPE_FLAG:
5365                 case RTE_FLOW_ACTION_TYPE_MARK:
5366                 case RTE_FLOW_ACTION_TYPE_SET_META:
5367                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
5368                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
5369                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5370                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
5371                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
5372                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5373                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5374                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
5375                 case RTE_FLOW_ACTION_TYPE_METER:
5376                         if (fdb_mirror)
5377                                 *modify_after_mirror = 1;
5378                         break;
5379                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5380                         decap = actions->conf;
5381                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
5382                                 ;
5383                         actions_n++;
5384                         if (actions->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
5385                                 const struct rte_flow_action_raw_encap *encap =
5386                                                                 actions->conf;
5387                                 if (decap->size <=
5388                                         MLX5_ENCAPSULATION_DECISION_SIZE &&
5389                                     encap->size >
5390                                         MLX5_ENCAPSULATION_DECISION_SIZE)
5391                                         /* L3 encap. */
5392                                         break;
5393                         }
5394                         if (fdb_mirror)
5395                                 *modify_after_mirror = 1;
5396                         break;
5397                 default:
5398                         break;
5399                 }
5400                 actions_n++;
5401         }
5402         if (flag && fdb_mirror && !*modify_after_mirror) {
5403                 /* FDB mirroring uses the destination array to implement
5404                  * instead of FLOW_SAMPLER object.
5405                  */
5406                 if (sub_type != RTE_FLOW_ACTION_TYPE_END)
5407                         flag = 0;
5408         }
5409         /* Count RTE_FLOW_ACTION_TYPE_END. */
5410         return flag ? actions_n + 1 : 0;
5411 }
5412
5413 #define SAMPLE_SUFFIX_ITEM 2
5414
5415 /**
5416  * Split the sample flow.
5417  *
5418  * As sample flow will split to two sub flow, sample flow with
5419  * sample action, the other actions will move to new suffix flow.
5420  *
5421  * Also add unique tag id with tag action in the sample flow,
5422  * the same tag id will be as match in the suffix flow.
5423  *
5424  * @param dev
5425  *   Pointer to Ethernet device.
5426  * @param[in] add_tag
5427  *   Add extra tag action flag.
5428  * @param[out] sfx_items
5429  *   Suffix flow match items (list terminated by the END pattern item).
5430  * @param[in] actions
5431  *   Associated actions (list terminated by the END action).
5432  * @param[out] actions_sfx
5433  *   Suffix flow actions.
5434  * @param[out] actions_pre
5435  *   Prefix flow actions.
5436  * @param[in] actions_n
5437  *  The total number of actions.
5438  * @param[in] sample_action_pos
5439  *   The sample action position.
5440  * @param[in] qrss_action_pos
5441  *   The Queue/RSS action position.
5442  * @param[in] jump_table
5443  *   Add extra jump action flag.
5444  * @param[out] error
5445  *   Perform verbose error reporting if not NULL.
5446  *
5447  * @return
5448  *   0 on success, or unique flow_id, a negative errno value
5449  *   otherwise and rte_errno is set.
5450  */
5451 static int
5452 flow_sample_split_prep(struct rte_eth_dev *dev,
5453                        int add_tag,
5454                        struct rte_flow_item sfx_items[],
5455                        const struct rte_flow_action actions[],
5456                        struct rte_flow_action actions_sfx[],
5457                        struct rte_flow_action actions_pre[],
5458                        int actions_n,
5459                        int sample_action_pos,
5460                        int qrss_action_pos,
5461                        int jump_table,
5462                        struct rte_flow_error *error)
5463 {
5464         struct mlx5_priv *priv = dev->data->dev_private;
5465         struct mlx5_rte_flow_action_set_tag *set_tag;
5466         struct mlx5_rte_flow_item_tag *tag_spec;
5467         struct mlx5_rte_flow_item_tag *tag_mask;
5468         struct rte_flow_action_jump *jump_action;
5469         uint32_t tag_id = 0;
5470         int index;
5471         int append_index = 0;
5472         int ret;
5473
5474         if (sample_action_pos < 0)
5475                 return rte_flow_error_set(error, EINVAL,
5476                                           RTE_FLOW_ERROR_TYPE_ACTION,
5477                                           NULL, "invalid position of sample "
5478                                           "action in list");
5479         /* Prepare the actions for prefix and suffix flow. */
5480         if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) {
5481                 index = qrss_action_pos;
5482                 /* Put the preceding the Queue/RSS action into prefix flow. */
5483                 if (index != 0)
5484                         memcpy(actions_pre, actions,
5485                                sizeof(struct rte_flow_action) * index);
5486                 /* Put others preceding the sample action into prefix flow. */
5487                 if (sample_action_pos > index + 1)
5488                         memcpy(actions_pre + index, actions + index + 1,
5489                                sizeof(struct rte_flow_action) *
5490                                (sample_action_pos - index - 1));
5491                 index = sample_action_pos - 1;
5492                 /* Put Queue/RSS action into Suffix flow. */
5493                 memcpy(actions_sfx, actions + qrss_action_pos,
5494                        sizeof(struct rte_flow_action));
5495                 actions_sfx++;
5496         } else {
5497                 index = sample_action_pos;
5498                 if (index != 0)
5499                         memcpy(actions_pre, actions,
5500                                sizeof(struct rte_flow_action) * index);
5501         }
5502         /* For CX5, add an extra tag action for NIC-RX and E-Switch ingress.
5503          * For CX6DX and above, metadata registers Cx preserve their value,
5504          * add an extra tag action for NIC-RX and E-Switch Domain.
5505          */
5506         if (add_tag) {
5507                 /* Prepare the prefix tag action. */
5508                 append_index++;
5509                 set_tag = (void *)(actions_pre + actions_n + append_index);
5510                 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error);
5511                 if (ret < 0)
5512                         return ret;
5513                 mlx5_ipool_malloc(priv->sh->ipool
5514                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id);
5515                 *set_tag = (struct mlx5_rte_flow_action_set_tag) {
5516                         .id = ret,
5517                         .data = tag_id,
5518                 };
5519                 /* Prepare the suffix subflow items. */
5520                 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM);
5521                 tag_spec->data = tag_id;
5522                 tag_spec->id = set_tag->id;
5523                 tag_mask = tag_spec + 1;
5524                 tag_mask->data = UINT32_MAX;
5525                 sfx_items[0] = (struct rte_flow_item){
5526                         .type = (enum rte_flow_item_type)
5527                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5528                         .spec = tag_spec,
5529                         .last = NULL,
5530                         .mask = tag_mask,
5531                 };
5532                 sfx_items[1] = (struct rte_flow_item){
5533                         .type = (enum rte_flow_item_type)
5534                                 RTE_FLOW_ITEM_TYPE_END,
5535                 };
5536                 /* Prepare the tag action in prefix subflow. */
5537                 actions_pre[index++] =
5538                         (struct rte_flow_action){
5539                         .type = (enum rte_flow_action_type)
5540                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
5541                         .conf = set_tag,
5542                 };
5543         }
5544         memcpy(actions_pre + index, actions + sample_action_pos,
5545                sizeof(struct rte_flow_action));
5546         index += 1;
5547         /* For the modify action after the sample action in E-Switch mirroring,
5548          * Add the extra jump action in prefix subflow and jump into the next
5549          * table, then do the modify action in the new table.
5550          */
5551         if (jump_table) {
5552                 /* Prepare the prefix jump action. */
5553                 append_index++;
5554                 jump_action = (void *)(actions_pre + actions_n + append_index);
5555                 jump_action->group = jump_table;
5556                 actions_pre[index++] =
5557                         (struct rte_flow_action){
5558                         .type = (enum rte_flow_action_type)
5559                                 RTE_FLOW_ACTION_TYPE_JUMP,
5560                         .conf = jump_action,
5561                 };
5562         }
5563         actions_pre[index] = (struct rte_flow_action){
5564                 .type = (enum rte_flow_action_type)
5565                         RTE_FLOW_ACTION_TYPE_END,
5566         };
5567         /* Put the actions after sample into Suffix flow. */
5568         memcpy(actions_sfx, actions + sample_action_pos + 1,
5569                sizeof(struct rte_flow_action) *
5570                (actions_n - sample_action_pos - 1));
5571         return tag_id;
5572 }
5573
5574 /**
5575  * The splitting for metadata feature.
5576  *
5577  * - Q/RSS action on NIC Rx should be split in order to pass by
5578  *   the mreg copy table (RX_CP_TBL) and then it jumps to the
5579  *   action table (RX_ACT_TBL) which has the split Q/RSS action.
5580  *
5581  * - All the actions on NIC Tx should have a mreg copy action to
5582  *   copy reg_a from WQE to reg_c[0].
5583  *
5584  * @param dev
5585  *   Pointer to Ethernet device.
5586  * @param[in] flow
5587  *   Parent flow structure pointer.
5588  * @param[in] attr
5589  *   Flow rule attributes.
5590  * @param[in] items
5591  *   Pattern specification (list terminated by the END pattern item).
5592  * @param[in] actions
5593  *   Associated actions (list terminated by the END action).
5594  * @param[in] flow_split_info
5595  *   Pointer to flow split info structure.
5596  * @param[out] error
5597  *   Perform verbose error reporting if not NULL.
5598  * @return
5599  *   0 on success, negative value otherwise
5600  */
5601 static int
5602 flow_create_split_metadata(struct rte_eth_dev *dev,
5603                            struct rte_flow *flow,
5604                            const struct rte_flow_attr *attr,
5605                            const struct rte_flow_item items[],
5606                            const struct rte_flow_action actions[],
5607                            struct mlx5_flow_split_info *flow_split_info,
5608                            struct rte_flow_error *error)
5609 {
5610         struct mlx5_priv *priv = dev->data->dev_private;
5611         struct mlx5_dev_config *config = &priv->config;
5612         const struct rte_flow_action *qrss = NULL;
5613         struct rte_flow_action *ext_actions = NULL;
5614         struct mlx5_flow *dev_flow = NULL;
5615         uint32_t qrss_id = 0;
5616         int mtr_sfx = 0;
5617         size_t act_size;
5618         int actions_n;
5619         int encap_idx;
5620         int ret;
5621
5622         /* Check whether extensive metadata feature is engaged. */
5623         if (!config->dv_flow_en ||
5624             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
5625             !mlx5_flow_ext_mreg_supported(dev))
5626                 return flow_create_split_inner(dev, flow, NULL, attr, items,
5627                                                actions, flow_split_info, error);
5628         actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
5629                                                            &encap_idx);
5630         if (qrss) {
5631                 /* Exclude hairpin flows from splitting. */
5632                 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
5633                         const struct rte_flow_action_queue *queue;
5634
5635                         queue = qrss->conf;
5636                         if (mlx5_rxq_get_type(dev, queue->index) ==
5637                             MLX5_RXQ_TYPE_HAIRPIN)
5638                                 qrss = NULL;
5639                 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
5640                         const struct rte_flow_action_rss *rss;
5641
5642                         rss = qrss->conf;
5643                         if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
5644                             MLX5_RXQ_TYPE_HAIRPIN)
5645                                 qrss = NULL;
5646                 }
5647         }
5648         if (qrss) {
5649                 /* Check if it is in meter suffix table. */
5650                 mtr_sfx = attr->group == (attr->transfer ?
5651                           (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
5652                           MLX5_FLOW_TABLE_LEVEL_METER);
5653                 /*
5654                  * Q/RSS action on NIC Rx should be split in order to pass by
5655                  * the mreg copy table (RX_CP_TBL) and then it jumps to the
5656                  * action table (RX_ACT_TBL) which has the split Q/RSS action.
5657                  */
5658                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5659                            sizeof(struct rte_flow_action_set_tag) +
5660                            sizeof(struct rte_flow_action_jump);
5661                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5662                                           SOCKET_ID_ANY);
5663                 if (!ext_actions)
5664                         return rte_flow_error_set(error, ENOMEM,
5665                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5666                                                   NULL, "no memory to split "
5667                                                   "metadata flow");
5668                 /*
5669                  * If we are the suffix flow of meter, tag already exist.
5670                  * Set the tag action to void.
5671                  */
5672                 if (mtr_sfx)
5673                         ext_actions[qrss - actions].type =
5674                                                 RTE_FLOW_ACTION_TYPE_VOID;
5675                 else
5676                         ext_actions[qrss - actions].type =
5677                                                 (enum rte_flow_action_type)
5678                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
5679                 /*
5680                  * Create the new actions list with removed Q/RSS action
5681                  * and appended set tag and jump to register copy table
5682                  * (RX_CP_TBL). We should preallocate unique tag ID here
5683                  * in advance, because it is needed for set tag action.
5684                  */
5685                 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
5686                                                     qrss, actions_n, error);
5687                 if (!mtr_sfx && !qrss_id) {
5688                         ret = -rte_errno;
5689                         goto exit;
5690                 }
5691         } else if (attr->egress && !attr->transfer) {
5692                 /*
5693                  * All the actions on NIC Tx should have a metadata register
5694                  * copy action to copy reg_a from WQE to reg_c[meta]
5695                  */
5696                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5697                            sizeof(struct mlx5_flow_action_copy_mreg);
5698                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5699                                           SOCKET_ID_ANY);
5700                 if (!ext_actions)
5701                         return rte_flow_error_set(error, ENOMEM,
5702                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5703                                                   NULL, "no memory to split "
5704                                                   "metadata flow");
5705                 /* Create the action list appended with copy register. */
5706                 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
5707                                              actions_n, error, encap_idx);
5708                 if (ret < 0)
5709                         goto exit;
5710         }
5711         /* Add the unmodified original or prefix subflow. */
5712         ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
5713                                       items, ext_actions ? ext_actions :
5714                                       actions, flow_split_info, error);
5715         if (ret < 0)
5716                 goto exit;
5717         MLX5_ASSERT(dev_flow);
5718         if (qrss) {
5719                 const struct rte_flow_attr q_attr = {
5720                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
5721                         .ingress = 1,
5722                 };
5723                 /* Internal PMD action to set register. */
5724                 struct mlx5_rte_flow_item_tag q_tag_spec = {
5725                         .data = qrss_id,
5726                         .id = REG_NON,
5727                 };
5728                 struct rte_flow_item q_items[] = {
5729                         {
5730                                 .type = (enum rte_flow_item_type)
5731                                         MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5732                                 .spec = &q_tag_spec,
5733                                 .last = NULL,
5734                                 .mask = NULL,
5735                         },
5736                         {
5737                                 .type = RTE_FLOW_ITEM_TYPE_END,
5738                         },
5739                 };
5740                 struct rte_flow_action q_actions[] = {
5741                         {
5742                                 .type = qrss->type,
5743                                 .conf = qrss->conf,
5744                         },
5745                         {
5746                                 .type = RTE_FLOW_ACTION_TYPE_END,
5747                         },
5748                 };
5749                 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
5750
5751                 /*
5752                  * Configure the tag item only if there is no meter subflow.
5753                  * Since tag is already marked in the meter suffix subflow
5754                  * we can just use the meter suffix items as is.
5755                  */
5756                 if (qrss_id) {
5757                         /* Not meter subflow. */
5758                         MLX5_ASSERT(!mtr_sfx);
5759                         /*
5760                          * Put unique id in prefix flow due to it is destroyed
5761                          * after suffix flow and id will be freed after there
5762                          * is no actual flows with this id and identifier
5763                          * reallocation becomes possible (for example, for
5764                          * other flows in other threads).
5765                          */
5766                         dev_flow->handle->split_flow_id = qrss_id;
5767                         ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
5768                                                    error);
5769                         if (ret < 0)
5770                                 goto exit;
5771                         q_tag_spec.id = ret;
5772                 }
5773                 dev_flow = NULL;
5774                 /* Add suffix subflow to execute Q/RSS. */
5775                 flow_split_info->prefix_layers = layers;
5776                 flow_split_info->prefix_mark = 0;
5777                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5778                                               &q_attr, mtr_sfx ? items :
5779                                               q_items, q_actions,
5780                                               flow_split_info, error);
5781                 if (ret < 0)
5782                         goto exit;
5783                 /* qrss ID should be freed if failed. */
5784                 qrss_id = 0;
5785                 MLX5_ASSERT(dev_flow);
5786         }
5787
5788 exit:
5789         /*
5790          * We do not destroy the partially created sub_flows in case of error.
5791          * These ones are included into parent flow list and will be destroyed
5792          * by flow_drv_destroy.
5793          */
5794         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
5795                         qrss_id);
5796         mlx5_free(ext_actions);
5797         return ret;
5798 }
5799
5800 /**
5801  * Create meter internal drop flow with the original pattern.
5802  *
5803  * @param dev
5804  *   Pointer to Ethernet device.
5805  * @param[in] flow
5806  *   Parent flow structure pointer.
5807  * @param[in] attr
5808  *   Flow rule attributes.
5809  * @param[in] items
5810  *   Pattern specification (list terminated by the END pattern item).
5811  * @param[in] flow_split_info
5812  *   Pointer to flow split info structure.
5813  * @param[in] fm
5814  *   Pointer to flow meter structure.
5815  * @param[out] error
5816  *   Perform verbose error reporting if not NULL.
5817  * @return
5818  *   0 on success, negative value otherwise
5819  */
5820 static uint32_t
5821 flow_meter_create_drop_flow_with_org_pattern(struct rte_eth_dev *dev,
5822                         struct rte_flow *flow,
5823                         const struct rte_flow_attr *attr,
5824                         const struct rte_flow_item items[],
5825                         struct mlx5_flow_split_info *flow_split_info,
5826                         struct mlx5_flow_meter_info *fm,
5827                         struct rte_flow_error *error)
5828 {
5829         struct mlx5_flow *dev_flow = NULL;
5830         struct rte_flow_attr drop_attr = *attr;
5831         struct rte_flow_action drop_actions[3];
5832         struct mlx5_flow_split_info drop_split_info = *flow_split_info;
5833
5834         MLX5_ASSERT(fm->drop_cnt);
5835         drop_actions[0].type =
5836                 (enum rte_flow_action_type)MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
5837         drop_actions[0].conf = (void *)(uintptr_t)fm->drop_cnt;
5838         drop_actions[1].type = RTE_FLOW_ACTION_TYPE_DROP;
5839         drop_actions[1].conf = NULL;
5840         drop_actions[2].type = RTE_FLOW_ACTION_TYPE_END;
5841         drop_actions[2].conf = NULL;
5842         drop_split_info.external = false;
5843         drop_split_info.skip_scale |= 1 << MLX5_SCALE_FLOW_GROUP_BIT;
5844         drop_split_info.table_id = MLX5_MTR_TABLE_ID_DROP;
5845         drop_attr.group = MLX5_FLOW_TABLE_LEVEL_METER;
5846         return flow_create_split_inner(dev, flow, &dev_flow,
5847                                 &drop_attr, items, drop_actions,
5848                                 &drop_split_info, error);
5849 }
5850
5851 /**
5852  * The splitting for meter feature.
5853  *
5854  * - The meter flow will be split to two flows as prefix and
5855  *   suffix flow. The packets make sense only it pass the prefix
5856  *   meter action.
5857  *
5858  * - Reg_C_5 is used for the packet to match betweend prefix and
5859  *   suffix flow.
5860  *
5861  * @param dev
5862  *   Pointer to Ethernet device.
5863  * @param[in] flow
5864  *   Parent flow structure pointer.
5865  * @param[in] attr
5866  *   Flow rule attributes.
5867  * @param[in] items
5868  *   Pattern specification (list terminated by the END pattern item).
5869  * @param[in] actions
5870  *   Associated actions (list terminated by the END action).
5871  * @param[in] flow_split_info
5872  *   Pointer to flow split info structure.
5873  * @param[out] error
5874  *   Perform verbose error reporting if not NULL.
5875  * @return
5876  *   0 on success, negative value otherwise
5877  */
5878 static int
5879 flow_create_split_meter(struct rte_eth_dev *dev,
5880                         struct rte_flow *flow,
5881                         const struct rte_flow_attr *attr,
5882                         const struct rte_flow_item items[],
5883                         const struct rte_flow_action actions[],
5884                         struct mlx5_flow_split_info *flow_split_info,
5885                         struct rte_flow_error *error)
5886 {
5887         struct mlx5_priv *priv = dev->data->dev_private;
5888         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
5889         struct rte_flow_action *sfx_actions = NULL;
5890         struct rte_flow_action *pre_actions = NULL;
5891         struct rte_flow_item *sfx_items = NULL;
5892         struct mlx5_flow *dev_flow = NULL;
5893         struct rte_flow_attr sfx_attr = *attr;
5894         struct mlx5_flow_meter_info *fm = NULL;
5895         uint8_t skip_scale_restore;
5896         bool has_mtr = false;
5897         bool has_modify = false;
5898         bool set_mtr_reg = true;
5899         bool is_mtr_hierarchy = false;
5900         uint32_t meter_id = 0;
5901         uint32_t mtr_idx = 0;
5902         uint32_t mtr_flow_id = 0;
5903         size_t act_size;
5904         size_t item_size;
5905         int actions_n = 0;
5906         int ret = 0;
5907
5908         if (priv->mtr_en)
5909                 actions_n = flow_check_meter_action(dev, actions, &has_mtr,
5910                                                     &has_modify, &meter_id);
5911         if (has_mtr) {
5912                 if (flow->meter) {
5913                         fm = flow_dv_meter_find_by_idx(priv, flow->meter);
5914                         if (!fm)
5915                                 return rte_flow_error_set(error, EINVAL,
5916                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5917                                                 NULL, "Meter not found.");
5918                 } else {
5919                         fm = mlx5_flow_meter_find(priv, meter_id, &mtr_idx);
5920                         if (!fm)
5921                                 return rte_flow_error_set(error, EINVAL,
5922                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5923                                                 NULL, "Meter not found.");
5924                         ret = mlx5_flow_meter_attach(priv, fm,
5925                                                      &sfx_attr, error);
5926                         if (ret)
5927                                 return -rte_errno;
5928                         flow->meter = mtr_idx;
5929                 }
5930                 MLX5_ASSERT(wks);
5931                 wks->fm = fm;
5932                 if (!fm->def_policy) {
5933                         wks->policy = mlx5_flow_meter_policy_find(dev,
5934                                                                   fm->policy_id,
5935                                                                   NULL);
5936                         MLX5_ASSERT(wks->policy);
5937                         if (wks->policy->is_hierarchy) {
5938                                 wks->final_policy =
5939                                 mlx5_flow_meter_hierarchy_get_final_policy(dev,
5940                                                                 wks->policy);
5941                                 if (!wks->final_policy)
5942                                         return rte_flow_error_set(error,
5943                                         EINVAL,
5944                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5945                                 "Failed to find terminal policy of hierarchy.");
5946                                 is_mtr_hierarchy = true;
5947                         }
5948                 }
5949                 /*
5950                  * If it isn't default-policy Meter, and
5951                  * 1. There's no action in flow to change
5952                  *    packet (modify/encap/decap etc.), OR
5953                  * 2. No drop count needed for this meter.
5954                  * 3. It's not meter hierarchy.
5955                  * Then no need to use regC to save meter id anymore.
5956                  */
5957                 if (!fm->def_policy && !is_mtr_hierarchy &&
5958                     (!has_modify || !fm->drop_cnt))
5959                         set_mtr_reg = false;
5960                 /* Prefix actions: meter, decap, encap, tag, jump, end. */
5961                 act_size = sizeof(struct rte_flow_action) * (actions_n + 6) +
5962                            sizeof(struct mlx5_rte_flow_action_set_tag);
5963                 /* Suffix items: tag, vlan, port id, end. */
5964 #define METER_SUFFIX_ITEM 4
5965                 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
5966                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
5967                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size),
5968                                           0, SOCKET_ID_ANY);
5969                 if (!sfx_actions)
5970                         return rte_flow_error_set(error, ENOMEM,
5971                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5972                                                   NULL, "no memory to split "
5973                                                   "meter flow");
5974                 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
5975                              act_size);
5976                 /* There's no suffix flow for meter of non-default policy. */
5977                 if (!fm->def_policy)
5978                         pre_actions = sfx_actions + 1;
5979                 else
5980                         pre_actions = sfx_actions + actions_n;
5981                 ret = flow_meter_split_prep(dev, flow, wks, &sfx_attr,
5982                                             items, sfx_items, actions,
5983                                             sfx_actions, pre_actions,
5984                                             (set_mtr_reg ? &mtr_flow_id : NULL),
5985                                             error);
5986                 if (ret) {
5987                         ret = -rte_errno;
5988                         goto exit;
5989                 }
5990                 /* Add the prefix subflow. */
5991                 flow_split_info->prefix_mark = 0;
5992                 skip_scale_restore = flow_split_info->skip_scale;
5993                 flow_split_info->skip_scale |=
5994                         1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
5995                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5996                                               attr, items, pre_actions,
5997                                               flow_split_info, error);
5998                 flow_split_info->skip_scale = skip_scale_restore;
5999                 if (ret) {
6000                         if (mtr_flow_id)
6001                                 mlx5_ipool_free(fm->flow_ipool, mtr_flow_id);
6002                         ret = -rte_errno;
6003                         goto exit;
6004                 }
6005                 if (mtr_flow_id) {
6006                         dev_flow->handle->split_flow_id = mtr_flow_id;
6007                         dev_flow->handle->is_meter_flow_id = 1;
6008                 }
6009                 if (!fm->def_policy) {
6010                         if (!set_mtr_reg && fm->drop_cnt)
6011                                 ret =
6012                         flow_meter_create_drop_flow_with_org_pattern(dev, flow,
6013                                                         &sfx_attr, items,
6014                                                         flow_split_info,
6015                                                         fm, error);
6016                         goto exit;
6017                 }
6018                 /* Setting the sfx group atrr. */
6019                 sfx_attr.group = sfx_attr.transfer ?
6020                                 (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
6021                                  MLX5_FLOW_TABLE_LEVEL_METER;
6022                 flow_split_info->prefix_layers =
6023                                 flow_get_prefix_layer_flags(dev_flow);
6024                 flow_split_info->prefix_mark = dev_flow->handle->mark;
6025                 flow_split_info->table_id = MLX5_MTR_TABLE_ID_SUFFIX;
6026         }
6027         /* Add the prefix subflow. */
6028         ret = flow_create_split_metadata(dev, flow,
6029                                          &sfx_attr, sfx_items ?
6030                                          sfx_items : items,
6031                                          sfx_actions ? sfx_actions : actions,
6032                                          flow_split_info, error);
6033 exit:
6034         if (sfx_actions)
6035                 mlx5_free(sfx_actions);
6036         return ret;
6037 }
6038
6039 /**
6040  * The splitting for sample feature.
6041  *
6042  * Once Sample action is detected in the action list, the flow actions should
6043  * be split into prefix sub flow and suffix sub flow.
6044  *
6045  * The original items remain in the prefix sub flow, all actions preceding the
6046  * sample action and the sample action itself will be copied to the prefix
6047  * sub flow, the actions following the sample action will be copied to the
6048  * suffix sub flow, Queue action always be located in the suffix sub flow.
6049  *
6050  * In order to make the packet from prefix sub flow matches with suffix sub
6051  * flow, an extra tag action be added into prefix sub flow, and the suffix sub
6052  * flow uses tag item with the unique flow id.
6053  *
6054  * @param dev
6055  *   Pointer to Ethernet device.
6056  * @param[in] flow
6057  *   Parent flow structure pointer.
6058  * @param[in] attr
6059  *   Flow rule attributes.
6060  * @param[in] items
6061  *   Pattern specification (list terminated by the END pattern item).
6062  * @param[in] actions
6063  *   Associated actions (list terminated by the END action).
6064  * @param[in] flow_split_info
6065  *   Pointer to flow split info structure.
6066  * @param[out] error
6067  *   Perform verbose error reporting if not NULL.
6068  * @return
6069  *   0 on success, negative value otherwise
6070  */
6071 static int
6072 flow_create_split_sample(struct rte_eth_dev *dev,
6073                          struct rte_flow *flow,
6074                          const struct rte_flow_attr *attr,
6075                          const struct rte_flow_item items[],
6076                          const struct rte_flow_action actions[],
6077                          struct mlx5_flow_split_info *flow_split_info,
6078                          struct rte_flow_error *error)
6079 {
6080         struct mlx5_priv *priv = dev->data->dev_private;
6081         struct rte_flow_action *sfx_actions = NULL;
6082         struct rte_flow_action *pre_actions = NULL;
6083         struct rte_flow_item *sfx_items = NULL;
6084         struct mlx5_flow *dev_flow = NULL;
6085         struct rte_flow_attr sfx_attr = *attr;
6086 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
6087         struct mlx5_flow_dv_sample_resource *sample_res;
6088         struct mlx5_flow_tbl_data_entry *sfx_tbl_data;
6089         struct mlx5_flow_tbl_resource *sfx_tbl;
6090 #endif
6091         size_t act_size;
6092         size_t item_size;
6093         uint32_t fdb_tx = 0;
6094         int32_t tag_id = 0;
6095         int actions_n = 0;
6096         int sample_action_pos;
6097         int qrss_action_pos;
6098         int add_tag = 0;
6099         int modify_after_mirror = 0;
6100         uint16_t jump_table = 0;
6101         const uint32_t next_ft_step = 1;
6102         int ret = 0;
6103
6104         if (priv->sampler_en)
6105                 actions_n = flow_check_match_action(actions, attr,
6106                                         RTE_FLOW_ACTION_TYPE_SAMPLE,
6107                                         &sample_action_pos, &qrss_action_pos,
6108                                         &modify_after_mirror);
6109         if (actions_n) {
6110                 /* The prefix actions must includes sample, tag, end. */
6111                 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1)
6112                            + sizeof(struct mlx5_rte_flow_action_set_tag);
6113                 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM +
6114                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
6115                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size +
6116                                           item_size), 0, SOCKET_ID_ANY);
6117                 if (!sfx_actions)
6118                         return rte_flow_error_set(error, ENOMEM,
6119                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6120                                                   NULL, "no memory to split "
6121                                                   "sample flow");
6122                 /* The representor_id is UINT16_MAX for uplink. */
6123                 fdb_tx = (attr->transfer && priv->representor_id != UINT16_MAX);
6124                 /*
6125                  * When reg_c_preserve is set, metadata registers Cx preserve
6126                  * their value even through packet duplication.
6127                  */
6128                 add_tag = (!fdb_tx || priv->config.hca_attr.reg_c_preserve);
6129                 if (add_tag)
6130                         sfx_items = (struct rte_flow_item *)((char *)sfx_actions
6131                                         + act_size);
6132                 if (modify_after_mirror)
6133                         jump_table = attr->group * MLX5_FLOW_TABLE_FACTOR +
6134                                      next_ft_step;
6135                 pre_actions = sfx_actions + actions_n;
6136                 tag_id = flow_sample_split_prep(dev, add_tag, sfx_items,
6137                                                 actions, sfx_actions,
6138                                                 pre_actions, actions_n,
6139                                                 sample_action_pos,
6140                                                 qrss_action_pos, jump_table,
6141                                                 error);
6142                 if (tag_id < 0 || (add_tag && !tag_id)) {
6143                         ret = -rte_errno;
6144                         goto exit;
6145                 }
6146                 if (modify_after_mirror)
6147                         flow_split_info->skip_scale =
6148                                         1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
6149                 /* Add the prefix subflow. */
6150                 ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
6151                                               items, pre_actions,
6152                                               flow_split_info, error);
6153                 if (ret) {
6154                         ret = -rte_errno;
6155                         goto exit;
6156                 }
6157                 dev_flow->handle->split_flow_id = tag_id;
6158 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
6159                 if (!modify_after_mirror) {
6160                         /* Set the sfx group attr. */
6161                         sample_res = (struct mlx5_flow_dv_sample_resource *)
6162                                                 dev_flow->dv.sample_res;
6163                         sfx_tbl = (struct mlx5_flow_tbl_resource *)
6164                                                 sample_res->normal_path_tbl;
6165                         sfx_tbl_data = container_of(sfx_tbl,
6166                                                 struct mlx5_flow_tbl_data_entry,
6167                                                 tbl);
6168                         sfx_attr.group = sfx_attr.transfer ?
6169                         (sfx_tbl_data->level - 1) : sfx_tbl_data->level;
6170                 } else {
6171                         MLX5_ASSERT(attr->transfer);
6172                         sfx_attr.group = jump_table;
6173                 }
6174                 flow_split_info->prefix_layers =
6175                                 flow_get_prefix_layer_flags(dev_flow);
6176                 flow_split_info->prefix_mark = dev_flow->handle->mark;
6177                 /* Suffix group level already be scaled with factor, set
6178                  * MLX5_SCALE_FLOW_GROUP_BIT of skip_scale to 1 to avoid scale
6179                  * again in translation.
6180                  */
6181                 flow_split_info->skip_scale = 1 << MLX5_SCALE_FLOW_GROUP_BIT;
6182 #endif
6183         }
6184         /* Add the suffix subflow. */
6185         ret = flow_create_split_meter(dev, flow, &sfx_attr,
6186                                       sfx_items ? sfx_items : items,
6187                                       sfx_actions ? sfx_actions : actions,
6188                                       flow_split_info, error);
6189 exit:
6190         if (sfx_actions)
6191                 mlx5_free(sfx_actions);
6192         return ret;
6193 }
6194
6195 /**
6196  * Split the flow to subflow set. The splitters might be linked
6197  * in the chain, like this:
6198  * flow_create_split_outer() calls:
6199  *   flow_create_split_meter() calls:
6200  *     flow_create_split_metadata(meter_subflow_0) calls:
6201  *       flow_create_split_inner(metadata_subflow_0)
6202  *       flow_create_split_inner(metadata_subflow_1)
6203  *       flow_create_split_inner(metadata_subflow_2)
6204  *     flow_create_split_metadata(meter_subflow_1) calls:
6205  *       flow_create_split_inner(metadata_subflow_0)
6206  *       flow_create_split_inner(metadata_subflow_1)
6207  *       flow_create_split_inner(metadata_subflow_2)
6208  *
6209  * This provide flexible way to add new levels of flow splitting.
6210  * The all of successfully created subflows are included to the
6211  * parent flow dev_flow list.
6212  *
6213  * @param dev
6214  *   Pointer to Ethernet device.
6215  * @param[in] flow
6216  *   Parent flow structure pointer.
6217  * @param[in] attr
6218  *   Flow rule attributes.
6219  * @param[in] items
6220  *   Pattern specification (list terminated by the END pattern item).
6221  * @param[in] actions
6222  *   Associated actions (list terminated by the END action).
6223  * @param[in] flow_split_info
6224  *   Pointer to flow split info structure.
6225  * @param[out] error
6226  *   Perform verbose error reporting if not NULL.
6227  * @return
6228  *   0 on success, negative value otherwise
6229  */
6230 static int
6231 flow_create_split_outer(struct rte_eth_dev *dev,
6232                         struct rte_flow *flow,
6233                         const struct rte_flow_attr *attr,
6234                         const struct rte_flow_item items[],
6235                         const struct rte_flow_action actions[],
6236                         struct mlx5_flow_split_info *flow_split_info,
6237                         struct rte_flow_error *error)
6238 {
6239         int ret;
6240
6241         ret = flow_create_split_sample(dev, flow, attr, items,
6242                                        actions, flow_split_info, error);
6243         MLX5_ASSERT(ret <= 0);
6244         return ret;
6245 }
6246
6247 static inline struct mlx5_flow_tunnel *
6248 flow_tunnel_from_rule(const struct mlx5_flow *flow)
6249 {
6250         struct mlx5_flow_tunnel *tunnel;
6251
6252 #pragma GCC diagnostic push
6253 #pragma GCC diagnostic ignored "-Wcast-qual"
6254         tunnel = (typeof(tunnel))flow->tunnel;
6255 #pragma GCC diagnostic pop
6256
6257         return tunnel;
6258 }
6259
6260 /**
6261  * Adjust flow RSS workspace if needed.
6262  *
6263  * @param wks
6264  *   Pointer to thread flow work space.
6265  * @param rss_desc
6266  *   Pointer to RSS descriptor.
6267  * @param[in] nrssq_num
6268  *   New RSS queue number.
6269  *
6270  * @return
6271  *   0 on success, -1 otherwise and rte_errno is set.
6272  */
6273 static int
6274 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks,
6275                           struct mlx5_flow_rss_desc *rss_desc,
6276                           uint32_t nrssq_num)
6277 {
6278         if (likely(nrssq_num <= wks->rssq_num))
6279                 return 0;
6280         rss_desc->queue = realloc(rss_desc->queue,
6281                           sizeof(*rss_desc->queue) * RTE_ALIGN(nrssq_num, 2));
6282         if (!rss_desc->queue) {
6283                 rte_errno = ENOMEM;
6284                 return -1;
6285         }
6286         wks->rssq_num = RTE_ALIGN(nrssq_num, 2);
6287         return 0;
6288 }
6289
6290 /**
6291  * Create a flow and add it to @p list.
6292  *
6293  * @param dev
6294  *   Pointer to Ethernet device.
6295  * @param list
6296  *   Pointer to a TAILQ flow list. If this parameter NULL,
6297  *   no list insertion occurred, flow is just created,
6298  *   this is caller's responsibility to track the
6299  *   created flow.
6300  * @param[in] attr
6301  *   Flow rule attributes.
6302  * @param[in] items
6303  *   Pattern specification (list terminated by the END pattern item).
6304  * @param[in] actions
6305  *   Associated actions (list terminated by the END action).
6306  * @param[in] external
6307  *   This flow rule is created by request external to PMD.
6308  * @param[out] error
6309  *   Perform verbose error reporting if not NULL.
6310  *
6311  * @return
6312  *   A flow index on success, 0 otherwise and rte_errno is set.
6313  */
6314 static uint32_t
6315 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6316                  const struct rte_flow_attr *attr,
6317                  const struct rte_flow_item items[],
6318                  const struct rte_flow_action original_actions[],
6319                  bool external, struct rte_flow_error *error)
6320 {
6321         struct mlx5_priv *priv = dev->data->dev_private;
6322         struct rte_flow *flow = NULL;
6323         struct mlx5_flow *dev_flow;
6324         const struct rte_flow_action_rss *rss = NULL;
6325         struct mlx5_translated_action_handle
6326                 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6327         int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6328         union {
6329                 struct mlx5_flow_expand_rss buf;
6330                 uint8_t buffer[4096];
6331         } expand_buffer;
6332         union {
6333                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6334                 uint8_t buffer[2048];
6335         } actions_rx;
6336         union {
6337                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6338                 uint8_t buffer[2048];
6339         } actions_hairpin_tx;
6340         union {
6341                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
6342                 uint8_t buffer[2048];
6343         } items_tx;
6344         struct mlx5_flow_expand_rss *buf = &expand_buffer.buf;
6345         struct mlx5_flow_rss_desc *rss_desc;
6346         const struct rte_flow_action *p_actions_rx;
6347         uint32_t i;
6348         uint32_t idx = 0;
6349         int hairpin_flow;
6350         struct rte_flow_attr attr_tx = { .priority = 0 };
6351         const struct rte_flow_action *actions;
6352         struct rte_flow_action *translated_actions = NULL;
6353         struct mlx5_flow_tunnel *tunnel;
6354         struct tunnel_default_miss_ctx default_miss_ctx = { 0, };
6355         struct mlx5_flow_workspace *wks = mlx5_flow_push_thread_workspace();
6356         struct mlx5_flow_split_info flow_split_info = {
6357                 .external = !!external,
6358                 .skip_scale = 0,
6359                 .flow_idx = 0,
6360                 .prefix_mark = 0,
6361                 .prefix_layers = 0,
6362                 .table_id = 0
6363         };
6364         int ret;
6365
6366         MLX5_ASSERT(wks);
6367         rss_desc = &wks->rss_desc;
6368         ret = flow_action_handles_translate(dev, original_actions,
6369                                             indir_actions,
6370                                             &indir_actions_n,
6371                                             &translated_actions, error);
6372         if (ret < 0) {
6373                 MLX5_ASSERT(translated_actions == NULL);
6374                 return 0;
6375         }
6376         actions = translated_actions ? translated_actions : original_actions;
6377         p_actions_rx = actions;
6378         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6379         ret = flow_drv_validate(dev, attr, items, p_actions_rx,
6380                                 external, hairpin_flow, error);
6381         if (ret < 0)
6382                 goto error_before_hairpin_split;
6383         flow = mlx5_ipool_zmalloc(priv->flows[type], &idx);
6384         if (!flow) {
6385                 rte_errno = ENOMEM;
6386                 goto error_before_hairpin_split;
6387         }
6388         if (hairpin_flow > 0) {
6389                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
6390                         rte_errno = EINVAL;
6391                         goto error_before_hairpin_split;
6392                 }
6393                 flow_hairpin_split(dev, actions, actions_rx.actions,
6394                                    actions_hairpin_tx.actions, items_tx.items,
6395                                    idx);
6396                 p_actions_rx = actions_rx.actions;
6397         }
6398         flow_split_info.flow_idx = idx;
6399         flow->drv_type = flow_get_drv_type(dev, attr);
6400         MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
6401                     flow->drv_type < MLX5_FLOW_TYPE_MAX);
6402         memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue));
6403         /* RSS Action only works on NIC RX domain */
6404         if (attr->ingress && !attr->transfer)
6405                 rss = flow_get_rss_action(dev, p_actions_rx);
6406         if (rss) {
6407                 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num))
6408                         return 0;
6409                 /*
6410                  * The following information is required by
6411                  * mlx5_flow_hashfields_adjust() in advance.
6412                  */
6413                 rss_desc->level = rss->level;
6414                 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
6415                 rss_desc->types = !rss->types ? ETH_RSS_IP : rss->types;
6416         }
6417         flow->dev_handles = 0;
6418         if (rss && rss->types) {
6419                 unsigned int graph_root;
6420
6421                 graph_root = find_graph_root(rss->level);
6422                 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
6423                                            items, rss->types,
6424                                            mlx5_support_expansion, graph_root);
6425                 MLX5_ASSERT(ret > 0 &&
6426                        (unsigned int)ret < sizeof(expand_buffer.buffer));
6427                 if (rte_log_can_log(mlx5_logtype, RTE_LOG_DEBUG)) {
6428                         for (i = 0; i < buf->entries; ++i)
6429                                 mlx5_dbg__print_pattern(buf->entry[i].pattern);
6430                 }
6431         } else {
6432                 buf->entries = 1;
6433                 buf->entry[0].pattern = (void *)(uintptr_t)items;
6434         }
6435         rss_desc->shared_rss = flow_get_shared_rss_action(dev, indir_actions,
6436                                                       indir_actions_n);
6437         for (i = 0; i < buf->entries; ++i) {
6438                 /* Initialize flow split data. */
6439                 flow_split_info.prefix_layers = 0;
6440                 flow_split_info.prefix_mark = 0;
6441                 flow_split_info.skip_scale = 0;
6442                 /*
6443                  * The splitter may create multiple dev_flows,
6444                  * depending on configuration. In the simplest
6445                  * case it just creates unmodified original flow.
6446                  */
6447                 ret = flow_create_split_outer(dev, flow, attr,
6448                                               buf->entry[i].pattern,
6449                                               p_actions_rx, &flow_split_info,
6450                                               error);
6451                 if (ret < 0)
6452                         goto error;
6453                 if (is_flow_tunnel_steer_rule(wks->flows[0].tof_type)) {
6454                         ret = flow_tunnel_add_default_miss(dev, flow, attr,
6455                                                            p_actions_rx,
6456                                                            idx,
6457                                                            wks->flows[0].tunnel,
6458                                                            &default_miss_ctx,
6459                                                            error);
6460                         if (ret < 0) {
6461                                 mlx5_free(default_miss_ctx.queue);
6462                                 goto error;
6463                         }
6464                 }
6465         }
6466         /* Create the tx flow. */
6467         if (hairpin_flow) {
6468                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
6469                 attr_tx.ingress = 0;
6470                 attr_tx.egress = 1;
6471                 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items,
6472                                          actions_hairpin_tx.actions,
6473                                          idx, error);
6474                 if (!dev_flow)
6475                         goto error;
6476                 dev_flow->flow = flow;
6477                 dev_flow->external = 0;
6478                 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
6479                               dev_flow->handle, next);
6480                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
6481                                          items_tx.items,
6482                                          actions_hairpin_tx.actions, error);
6483                 if (ret < 0)
6484                         goto error;
6485         }
6486         /*
6487          * Update the metadata register copy table. If extensive
6488          * metadata feature is enabled and registers are supported
6489          * we might create the extra rte_flow for each unique
6490          * MARK/FLAG action ID.
6491          *
6492          * The table is updated for ingress Flows only, because
6493          * the egress Flows belong to the different device and
6494          * copy table should be updated in peer NIC Rx domain.
6495          */
6496         if (attr->ingress &&
6497             (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
6498                 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
6499                 if (ret)
6500                         goto error;
6501         }
6502         /*
6503          * If the flow is external (from application) OR device is started,
6504          * OR mreg discover, then apply immediately.
6505          */
6506         if (external || dev->data->dev_started ||
6507             (attr->group == MLX5_FLOW_MREG_CP_TABLE_GROUP &&
6508              attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)) {
6509                 ret = flow_drv_apply(dev, flow, error);
6510                 if (ret < 0)
6511                         goto error;
6512         }
6513         flow->type = type;
6514         flow_rxq_flags_set(dev, flow);
6515         rte_free(translated_actions);
6516         tunnel = flow_tunnel_from_rule(wks->flows);
6517         if (tunnel) {
6518                 flow->tunnel = 1;
6519                 flow->tunnel_id = tunnel->tunnel_id;
6520                 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED);
6521                 mlx5_free(default_miss_ctx.queue);
6522         }
6523         mlx5_flow_pop_thread_workspace();
6524         return idx;
6525 error:
6526         MLX5_ASSERT(flow);
6527         ret = rte_errno; /* Save rte_errno before cleanup. */
6528         flow_mreg_del_copy_action(dev, flow);
6529         flow_drv_destroy(dev, flow);
6530         if (rss_desc->shared_rss)
6531                 __atomic_sub_fetch(&((struct mlx5_shared_action_rss *)
6532                         mlx5_ipool_get
6533                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
6534                         rss_desc->shared_rss))->refcnt, 1, __ATOMIC_RELAXED);
6535         mlx5_ipool_free(priv->flows[type], idx);
6536         rte_errno = ret; /* Restore rte_errno. */
6537         ret = rte_errno;
6538         rte_errno = ret;
6539         mlx5_flow_pop_thread_workspace();
6540 error_before_hairpin_split:
6541         rte_free(translated_actions);
6542         return 0;
6543 }
6544
6545 /**
6546  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
6547  * incoming packets to table 1.
6548  *
6549  * Other flow rules, requested for group n, will be created in
6550  * e-switch table n+1.
6551  * Jump action to e-switch group n will be created to group n+1.
6552  *
6553  * Used when working in switchdev mode, to utilise advantages of table 1
6554  * and above.
6555  *
6556  * @param dev
6557  *   Pointer to Ethernet device.
6558  *
6559  * @return
6560  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
6561  */
6562 struct rte_flow *
6563 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
6564 {
6565         const struct rte_flow_attr attr = {
6566                 .group = 0,
6567                 .priority = 0,
6568                 .ingress = 1,
6569                 .egress = 0,
6570                 .transfer = 1,
6571         };
6572         const struct rte_flow_item pattern = {
6573                 .type = RTE_FLOW_ITEM_TYPE_END,
6574         };
6575         struct rte_flow_action_jump jump = {
6576                 .group = 1,
6577         };
6578         const struct rte_flow_action actions[] = {
6579                 {
6580                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
6581                         .conf = &jump,
6582                 },
6583                 {
6584                         .type = RTE_FLOW_ACTION_TYPE_END,
6585                 },
6586         };
6587         struct rte_flow_error error;
6588
6589         return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
6590                                                    &attr, &pattern,
6591                                                    actions, false, &error);
6592 }
6593
6594 /**
6595  * Validate a flow supported by the NIC.
6596  *
6597  * @see rte_flow_validate()
6598  * @see rte_flow_ops
6599  */
6600 int
6601 mlx5_flow_validate(struct rte_eth_dev *dev,
6602                    const struct rte_flow_attr *attr,
6603                    const struct rte_flow_item items[],
6604                    const struct rte_flow_action original_actions[],
6605                    struct rte_flow_error *error)
6606 {
6607         int hairpin_flow;
6608         struct mlx5_translated_action_handle
6609                 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6610         int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6611         const struct rte_flow_action *actions;
6612         struct rte_flow_action *translated_actions = NULL;
6613         int ret = flow_action_handles_translate(dev, original_actions,
6614                                                 indir_actions,
6615                                                 &indir_actions_n,
6616                                                 &translated_actions, error);
6617
6618         if (ret)
6619                 return ret;
6620         actions = translated_actions ? translated_actions : original_actions;
6621         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6622         ret = flow_drv_validate(dev, attr, items, actions,
6623                                 true, hairpin_flow, error);
6624         rte_free(translated_actions);
6625         return ret;
6626 }
6627
6628 /**
6629  * Create a flow.
6630  *
6631  * @see rte_flow_create()
6632  * @see rte_flow_ops
6633  */
6634 struct rte_flow *
6635 mlx5_flow_create(struct rte_eth_dev *dev,
6636                  const struct rte_flow_attr *attr,
6637                  const struct rte_flow_item items[],
6638                  const struct rte_flow_action actions[],
6639                  struct rte_flow_error *error)
6640 {
6641         /*
6642          * If the device is not started yet, it is not allowed to created a
6643          * flow from application. PMD default flows and traffic control flows
6644          * are not affected.
6645          */
6646         if (unlikely(!dev->data->dev_started)) {
6647                 DRV_LOG(DEBUG, "port %u is not started when "
6648                         "inserting a flow", dev->data->port_id);
6649                 rte_flow_error_set(error, ENODEV,
6650                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6651                                    NULL,
6652                                    "port not started");
6653                 return NULL;
6654         }
6655
6656         return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_GEN,
6657                                                    attr, items, actions,
6658                                                    true, error);
6659 }
6660
6661 /**
6662  * Destroy a flow in a list.
6663  *
6664  * @param dev
6665  *   Pointer to Ethernet device.
6666  * @param[in] flow_idx
6667  *   Index of flow to destroy.
6668  */
6669 static void
6670 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6671                   uint32_t flow_idx)
6672 {
6673         struct mlx5_priv *priv = dev->data->dev_private;
6674         struct rte_flow *flow = mlx5_ipool_get(priv->flows[type], flow_idx);
6675
6676         if (!flow)
6677                 return;
6678         MLX5_ASSERT(flow->type == type);
6679         /*
6680          * Update RX queue flags only if port is started, otherwise it is
6681          * already clean.
6682          */
6683         if (dev->data->dev_started)
6684                 flow_rxq_flags_trim(dev, flow);
6685         flow_drv_destroy(dev, flow);
6686         if (flow->tunnel) {
6687                 struct mlx5_flow_tunnel *tunnel;
6688
6689                 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id);
6690                 RTE_VERIFY(tunnel);
6691                 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
6692                         mlx5_flow_tunnel_free(dev, tunnel);
6693         }
6694         flow_mreg_del_copy_action(dev, flow);
6695         mlx5_ipool_free(priv->flows[type], flow_idx);
6696 }
6697
6698 /**
6699  * Destroy all flows.
6700  *
6701  * @param dev
6702  *   Pointer to Ethernet device.
6703  * @param type
6704  *   Flow type to be flushed.
6705  * @param active
6706  *   If flushing is called avtively.
6707  */
6708 void
6709 mlx5_flow_list_flush(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6710                      bool active)
6711 {
6712         struct mlx5_priv *priv = dev->data->dev_private;
6713         uint32_t num_flushed = 0, fidx = 1;
6714         struct rte_flow *flow;
6715
6716         MLX5_IPOOL_FOREACH(priv->flows[type], fidx, flow) {
6717                 flow_list_destroy(dev, type, fidx);
6718                 num_flushed++;
6719         }
6720         if (active) {
6721                 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
6722                         dev->data->port_id, num_flushed);
6723         }
6724 }
6725
6726 /**
6727  * Stop all default actions for flows.
6728  *
6729  * @param dev
6730  *   Pointer to Ethernet device.
6731  */
6732 void
6733 mlx5_flow_stop_default(struct rte_eth_dev *dev)
6734 {
6735         flow_mreg_del_default_copy_action(dev);
6736         flow_rxq_flags_clear(dev);
6737 }
6738
6739 /**
6740  * Start all default actions for flows.
6741  *
6742  * @param dev
6743  *   Pointer to Ethernet device.
6744  * @return
6745  *   0 on success, a negative errno value otherwise and rte_errno is set.
6746  */
6747 int
6748 mlx5_flow_start_default(struct rte_eth_dev *dev)
6749 {
6750         struct rte_flow_error error;
6751
6752         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
6753         return flow_mreg_add_default_copy_action(dev, &error);
6754 }
6755
6756 /**
6757  * Release key of thread specific flow workspace data.
6758  */
6759 void
6760 flow_release_workspace(void *data)
6761 {
6762         struct mlx5_flow_workspace *wks = data;
6763         struct mlx5_flow_workspace *next;
6764
6765         while (wks) {
6766                 next = wks->next;
6767                 free(wks->rss_desc.queue);
6768                 free(wks);
6769                 wks = next;
6770         }
6771 }
6772
6773 /**
6774  * Get thread specific current flow workspace.
6775  *
6776  * @return pointer to thread specific flow workspace data, NULL on error.
6777  */
6778 struct mlx5_flow_workspace*
6779 mlx5_flow_get_thread_workspace(void)
6780 {
6781         struct mlx5_flow_workspace *data;
6782
6783         data = mlx5_flow_os_get_specific_workspace();
6784         MLX5_ASSERT(data && data->inuse);
6785         if (!data || !data->inuse)
6786                 DRV_LOG(ERR, "flow workspace not initialized.");
6787         return data;
6788 }
6789
6790 /**
6791  * Allocate and init new flow workspace.
6792  *
6793  * @return pointer to flow workspace data, NULL on error.
6794  */
6795 static struct mlx5_flow_workspace*
6796 flow_alloc_thread_workspace(void)
6797 {
6798         struct mlx5_flow_workspace *data = calloc(1, sizeof(*data));
6799
6800         if (!data) {
6801                 DRV_LOG(ERR, "Failed to allocate flow workspace "
6802                         "memory.");
6803                 return NULL;
6804         }
6805         data->rss_desc.queue = calloc(1,
6806                         sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM);
6807         if (!data->rss_desc.queue)
6808                 goto err;
6809         data->rssq_num = MLX5_RSSQ_DEFAULT_NUM;
6810         return data;
6811 err:
6812         if (data->rss_desc.queue)
6813                 free(data->rss_desc.queue);
6814         free(data);
6815         return NULL;
6816 }
6817
6818 /**
6819  * Get new thread specific flow workspace.
6820  *
6821  * If current workspace inuse, create new one and set as current.
6822  *
6823  * @return pointer to thread specific flow workspace data, NULL on error.
6824  */
6825 static struct mlx5_flow_workspace*
6826 mlx5_flow_push_thread_workspace(void)
6827 {
6828         struct mlx5_flow_workspace *curr;
6829         struct mlx5_flow_workspace *data;
6830
6831         curr = mlx5_flow_os_get_specific_workspace();
6832         if (!curr) {
6833                 data = flow_alloc_thread_workspace();
6834                 if (!data)
6835                         return NULL;
6836         } else if (!curr->inuse) {
6837                 data = curr;
6838         } else if (curr->next) {
6839                 data = curr->next;
6840         } else {
6841                 data = flow_alloc_thread_workspace();
6842                 if (!data)
6843                         return NULL;
6844                 curr->next = data;
6845                 data->prev = curr;
6846         }
6847         data->inuse = 1;
6848         data->flow_idx = 0;
6849         /* Set as current workspace */
6850         if (mlx5_flow_os_set_specific_workspace(data))
6851                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6852         return data;
6853 }
6854
6855 /**
6856  * Close current thread specific flow workspace.
6857  *
6858  * If previous workspace available, set it as current.
6859  *
6860  * @return pointer to thread specific flow workspace data, NULL on error.
6861  */
6862 static void
6863 mlx5_flow_pop_thread_workspace(void)
6864 {
6865         struct mlx5_flow_workspace *data = mlx5_flow_get_thread_workspace();
6866
6867         if (!data)
6868                 return;
6869         if (!data->inuse) {
6870                 DRV_LOG(ERR, "Failed to close unused flow workspace.");
6871                 return;
6872         }
6873         data->inuse = 0;
6874         if (!data->prev)
6875                 return;
6876         if (mlx5_flow_os_set_specific_workspace(data->prev))
6877                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6878 }
6879
6880 /**
6881  * Verify the flow list is empty
6882  *
6883  * @param dev
6884  *  Pointer to Ethernet device.
6885  *
6886  * @return the number of flows not released.
6887  */
6888 int
6889 mlx5_flow_verify(struct rte_eth_dev *dev __rte_unused)
6890 {
6891         struct mlx5_priv *priv = dev->data->dev_private;
6892         struct rte_flow *flow;
6893         uint32_t idx = 0;
6894         int ret = 0, i;
6895
6896         for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
6897                 MLX5_IPOOL_FOREACH(priv->flows[i], idx, flow) {
6898                         DRV_LOG(DEBUG, "port %u flow %p still referenced",
6899                                 dev->data->port_id, (void *)flow);
6900                         ret++;
6901                 }
6902         }
6903         return ret;
6904 }
6905
6906 /**
6907  * Enable default hairpin egress flow.
6908  *
6909  * @param dev
6910  *   Pointer to Ethernet device.
6911  * @param queue
6912  *   The queue index.
6913  *
6914  * @return
6915  *   0 on success, a negative errno value otherwise and rte_errno is set.
6916  */
6917 int
6918 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
6919                             uint32_t queue)
6920 {
6921         const struct rte_flow_attr attr = {
6922                 .egress = 1,
6923                 .priority = 0,
6924         };
6925         struct mlx5_rte_flow_item_tx_queue queue_spec = {
6926                 .queue = queue,
6927         };
6928         struct mlx5_rte_flow_item_tx_queue queue_mask = {
6929                 .queue = UINT32_MAX,
6930         };
6931         struct rte_flow_item items[] = {
6932                 {
6933                         .type = (enum rte_flow_item_type)
6934                                 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
6935                         .spec = &queue_spec,
6936                         .last = NULL,
6937                         .mask = &queue_mask,
6938                 },
6939                 {
6940                         .type = RTE_FLOW_ITEM_TYPE_END,
6941                 },
6942         };
6943         struct rte_flow_action_jump jump = {
6944                 .group = MLX5_HAIRPIN_TX_TABLE,
6945         };
6946         struct rte_flow_action actions[2];
6947         uint32_t flow_idx;
6948         struct rte_flow_error error;
6949
6950         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
6951         actions[0].conf = &jump;
6952         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
6953         flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
6954                                     &attr, items, actions, false, &error);
6955         if (!flow_idx) {
6956                 DRV_LOG(DEBUG,
6957                         "Failed to create ctrl flow: rte_errno(%d),"
6958                         " type(%d), message(%s)",
6959                         rte_errno, error.type,
6960                         error.message ? error.message : " (no stated reason)");
6961                 return -rte_errno;
6962         }
6963         return 0;
6964 }
6965
6966 /**
6967  * Enable a control flow configured from the control plane.
6968  *
6969  * @param dev
6970  *   Pointer to Ethernet device.
6971  * @param eth_spec
6972  *   An Ethernet flow spec to apply.
6973  * @param eth_mask
6974  *   An Ethernet flow mask to apply.
6975  * @param vlan_spec
6976  *   A VLAN flow spec to apply.
6977  * @param vlan_mask
6978  *   A VLAN flow mask to apply.
6979  *
6980  * @return
6981  *   0 on success, a negative errno value otherwise and rte_errno is set.
6982  */
6983 int
6984 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
6985                     struct rte_flow_item_eth *eth_spec,
6986                     struct rte_flow_item_eth *eth_mask,
6987                     struct rte_flow_item_vlan *vlan_spec,
6988                     struct rte_flow_item_vlan *vlan_mask)
6989 {
6990         struct mlx5_priv *priv = dev->data->dev_private;
6991         const struct rte_flow_attr attr = {
6992                 .ingress = 1,
6993                 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
6994         };
6995         struct rte_flow_item items[] = {
6996                 {
6997                         .type = RTE_FLOW_ITEM_TYPE_ETH,
6998                         .spec = eth_spec,
6999                         .last = NULL,
7000                         .mask = eth_mask,
7001                 },
7002                 {
7003                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
7004                                               RTE_FLOW_ITEM_TYPE_END,
7005                         .spec = vlan_spec,
7006                         .last = NULL,
7007                         .mask = vlan_mask,
7008                 },
7009                 {
7010                         .type = RTE_FLOW_ITEM_TYPE_END,
7011                 },
7012         };
7013         uint16_t queue[priv->reta_idx_n];
7014         struct rte_flow_action_rss action_rss = {
7015                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
7016                 .level = 0,
7017                 .types = priv->rss_conf.rss_hf,
7018                 .key_len = priv->rss_conf.rss_key_len,
7019                 .queue_num = priv->reta_idx_n,
7020                 .key = priv->rss_conf.rss_key,
7021                 .queue = queue,
7022         };
7023         struct rte_flow_action actions[] = {
7024                 {
7025                         .type = RTE_FLOW_ACTION_TYPE_RSS,
7026                         .conf = &action_rss,
7027                 },
7028                 {
7029                         .type = RTE_FLOW_ACTION_TYPE_END,
7030                 },
7031         };
7032         uint32_t flow_idx;
7033         struct rte_flow_error error;
7034         unsigned int i;
7035
7036         if (!priv->reta_idx_n || !priv->rxqs_n) {
7037                 return 0;
7038         }
7039         if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
7040                 action_rss.types = 0;
7041         for (i = 0; i != priv->reta_idx_n; ++i)
7042                 queue[i] = (*priv->reta_idx)[i];
7043         flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7044                                     &attr, items, actions, false, &error);
7045         if (!flow_idx)
7046                 return -rte_errno;
7047         return 0;
7048 }
7049
7050 /**
7051  * Enable a flow control configured from the control plane.
7052  *
7053  * @param dev
7054  *   Pointer to Ethernet device.
7055  * @param eth_spec
7056  *   An Ethernet flow spec to apply.
7057  * @param eth_mask
7058  *   An Ethernet flow mask to apply.
7059  *
7060  * @return
7061  *   0 on success, a negative errno value otherwise and rte_errno is set.
7062  */
7063 int
7064 mlx5_ctrl_flow(struct rte_eth_dev *dev,
7065                struct rte_flow_item_eth *eth_spec,
7066                struct rte_flow_item_eth *eth_mask)
7067 {
7068         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
7069 }
7070
7071 /**
7072  * Create default miss flow rule matching lacp traffic
7073  *
7074  * @param dev
7075  *   Pointer to Ethernet device.
7076  * @param eth_spec
7077  *   An Ethernet flow spec to apply.
7078  *
7079  * @return
7080  *   0 on success, a negative errno value otherwise and rte_errno is set.
7081  */
7082 int
7083 mlx5_flow_lacp_miss(struct rte_eth_dev *dev)
7084 {
7085         /*
7086          * The LACP matching is done by only using ether type since using
7087          * a multicast dst mac causes kernel to give low priority to this flow.
7088          */
7089         static const struct rte_flow_item_eth lacp_spec = {
7090                 .type = RTE_BE16(0x8809),
7091         };
7092         static const struct rte_flow_item_eth lacp_mask = {
7093                 .type = 0xffff,
7094         };
7095         const struct rte_flow_attr attr = {
7096                 .ingress = 1,
7097         };
7098         struct rte_flow_item items[] = {
7099                 {
7100                         .type = RTE_FLOW_ITEM_TYPE_ETH,
7101                         .spec = &lacp_spec,
7102                         .mask = &lacp_mask,
7103                 },
7104                 {
7105                         .type = RTE_FLOW_ITEM_TYPE_END,
7106                 },
7107         };
7108         struct rte_flow_action actions[] = {
7109                 {
7110                         .type = (enum rte_flow_action_type)
7111                                 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS,
7112                 },
7113                 {
7114                         .type = RTE_FLOW_ACTION_TYPE_END,
7115                 },
7116         };
7117         struct rte_flow_error error;
7118         uint32_t flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7119                                         &attr, items, actions,
7120                                         false, &error);
7121
7122         if (!flow_idx)
7123                 return -rte_errno;
7124         return 0;
7125 }
7126
7127 /**
7128  * Destroy a flow.
7129  *
7130  * @see rte_flow_destroy()
7131  * @see rte_flow_ops
7132  */
7133 int
7134 mlx5_flow_destroy(struct rte_eth_dev *dev,
7135                   struct rte_flow *flow,
7136                   struct rte_flow_error *error __rte_unused)
7137 {
7138         flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN,
7139                                 (uintptr_t)(void *)flow);
7140         return 0;
7141 }
7142
7143 /**
7144  * Destroy all flows.
7145  *
7146  * @see rte_flow_flush()
7147  * @see rte_flow_ops
7148  */
7149 int
7150 mlx5_flow_flush(struct rte_eth_dev *dev,
7151                 struct rte_flow_error *error __rte_unused)
7152 {
7153         mlx5_flow_list_flush(dev, MLX5_FLOW_TYPE_GEN, false);
7154         return 0;
7155 }
7156
7157 /**
7158  * Isolated mode.
7159  *
7160  * @see rte_flow_isolate()
7161  * @see rte_flow_ops
7162  */
7163 int
7164 mlx5_flow_isolate(struct rte_eth_dev *dev,
7165                   int enable,
7166                   struct rte_flow_error *error)
7167 {
7168         struct mlx5_priv *priv = dev->data->dev_private;
7169
7170         if (dev->data->dev_started) {
7171                 rte_flow_error_set(error, EBUSY,
7172                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7173                                    NULL,
7174                                    "port must be stopped first");
7175                 return -rte_errno;
7176         }
7177         priv->isolated = !!enable;
7178         if (enable)
7179                 dev->dev_ops = &mlx5_dev_ops_isolate;
7180         else
7181                 dev->dev_ops = &mlx5_dev_ops;
7182
7183         dev->rx_descriptor_status = mlx5_rx_descriptor_status;
7184         dev->tx_descriptor_status = mlx5_tx_descriptor_status;
7185
7186         return 0;
7187 }
7188
7189 /**
7190  * Query a flow.
7191  *
7192  * @see rte_flow_query()
7193  * @see rte_flow_ops
7194  */
7195 static int
7196 flow_drv_query(struct rte_eth_dev *dev,
7197                uint32_t flow_idx,
7198                const struct rte_flow_action *actions,
7199                void *data,
7200                struct rte_flow_error *error)
7201 {
7202         struct mlx5_priv *priv = dev->data->dev_private;
7203         const struct mlx5_flow_driver_ops *fops;
7204         struct rte_flow *flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
7205                                                flow_idx);
7206         enum mlx5_flow_drv_type ftype;
7207
7208         if (!flow) {
7209                 return rte_flow_error_set(error, ENOENT,
7210                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7211                           NULL,
7212                           "invalid flow handle");
7213         }
7214         ftype = flow->drv_type;
7215         MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
7216         fops = flow_get_drv_ops(ftype);
7217
7218         return fops->query(dev, flow, actions, data, error);
7219 }
7220
7221 /**
7222  * Query a flow.
7223  *
7224  * @see rte_flow_query()
7225  * @see rte_flow_ops
7226  */
7227 int
7228 mlx5_flow_query(struct rte_eth_dev *dev,
7229                 struct rte_flow *flow,
7230                 const struct rte_flow_action *actions,
7231                 void *data,
7232                 struct rte_flow_error *error)
7233 {
7234         int ret;
7235
7236         ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data,
7237                              error);
7238         if (ret < 0)
7239                 return ret;
7240         return 0;
7241 }
7242
7243 /**
7244  * Get rte_flow callbacks.
7245  *
7246  * @param dev
7247  *   Pointer to Ethernet device structure.
7248  * @param ops
7249  *   Pointer to operation-specific structure.
7250  *
7251  * @return 0
7252  */
7253 int
7254 mlx5_flow_ops_get(struct rte_eth_dev *dev __rte_unused,
7255                   const struct rte_flow_ops **ops)
7256 {
7257         *ops = &mlx5_flow_ops;
7258         return 0;
7259 }
7260
7261 /**
7262  * Validate meter policy actions.
7263  * Dispatcher for action type specific validation.
7264  *
7265  * @param[in] dev
7266  *   Pointer to the Ethernet device structure.
7267  * @param[in] action
7268  *   The meter policy action object to validate.
7269  * @param[in] attr
7270  *   Attributes of flow to determine steering domain.
7271  * @param[out] is_rss
7272  *   Is RSS or not.
7273  * @param[out] domain_bitmap
7274  *   Domain bitmap.
7275  * @param[out] is_def_policy
7276  *   Is default policy or not.
7277  * @param[out] error
7278  *   Perform verbose error reporting if not NULL. Initialized in case of
7279  *   error only.
7280  *
7281  * @return
7282  *   0 on success, otherwise negative errno value.
7283  */
7284 int
7285 mlx5_flow_validate_mtr_acts(struct rte_eth_dev *dev,
7286                         const struct rte_flow_action *actions[RTE_COLORS],
7287                         struct rte_flow_attr *attr,
7288                         bool *is_rss,
7289                         uint8_t *domain_bitmap,
7290                         uint8_t *policy_mode,
7291                         struct rte_mtr_error *error)
7292 {
7293         const struct mlx5_flow_driver_ops *fops;
7294
7295         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7296         return fops->validate_mtr_acts(dev, actions, attr, is_rss,
7297                                        domain_bitmap, policy_mode, error);
7298 }
7299
7300 /**
7301  * Destroy the meter table set.
7302  *
7303  * @param[in] dev
7304  *   Pointer to Ethernet device.
7305  * @param[in] mtr_policy
7306  *   Meter policy struct.
7307  */
7308 void
7309 mlx5_flow_destroy_mtr_acts(struct rte_eth_dev *dev,
7310                       struct mlx5_flow_meter_policy *mtr_policy)
7311 {
7312         const struct mlx5_flow_driver_ops *fops;
7313
7314         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7315         fops->destroy_mtr_acts(dev, mtr_policy);
7316 }
7317
7318 /**
7319  * Create policy action, lock free,
7320  * (mutex should be acquired by caller).
7321  * Dispatcher for action type specific call.
7322  *
7323  * @param[in] dev
7324  *   Pointer to the Ethernet device structure.
7325  * @param[in] mtr_policy
7326  *   Meter policy struct.
7327  * @param[in] action
7328  *   Action specification used to create meter actions.
7329  * @param[out] error
7330  *   Perform verbose error reporting if not NULL. Initialized in case of
7331  *   error only.
7332  *
7333  * @return
7334  *   0 on success, otherwise negative errno value.
7335  */
7336 int
7337 mlx5_flow_create_mtr_acts(struct rte_eth_dev *dev,
7338                       struct mlx5_flow_meter_policy *mtr_policy,
7339                       const struct rte_flow_action *actions[RTE_COLORS],
7340                       struct rte_mtr_error *error)
7341 {
7342         const struct mlx5_flow_driver_ops *fops;
7343
7344         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7345         return fops->create_mtr_acts(dev, mtr_policy, actions, error);
7346 }
7347
7348 /**
7349  * Create policy rules, lock free,
7350  * (mutex should be acquired by caller).
7351  * Dispatcher for action type specific call.
7352  *
7353  * @param[in] dev
7354  *   Pointer to the Ethernet device structure.
7355  * @param[in] mtr_policy
7356  *   Meter policy struct.
7357  *
7358  * @return
7359  *   0 on success, -1 otherwise.
7360  */
7361 int
7362 mlx5_flow_create_policy_rules(struct rte_eth_dev *dev,
7363                              struct mlx5_flow_meter_policy *mtr_policy)
7364 {
7365         const struct mlx5_flow_driver_ops *fops;
7366
7367         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7368         return fops->create_policy_rules(dev, mtr_policy);
7369 }
7370
7371 /**
7372  * Destroy policy rules, lock free,
7373  * (mutex should be acquired by caller).
7374  * Dispatcher for action type specific call.
7375  *
7376  * @param[in] dev
7377  *   Pointer to the Ethernet device structure.
7378  * @param[in] mtr_policy
7379  *   Meter policy struct.
7380  */
7381 void
7382 mlx5_flow_destroy_policy_rules(struct rte_eth_dev *dev,
7383                              struct mlx5_flow_meter_policy *mtr_policy)
7384 {
7385         const struct mlx5_flow_driver_ops *fops;
7386
7387         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7388         fops->destroy_policy_rules(dev, mtr_policy);
7389 }
7390
7391 /**
7392  * Destroy the default policy table set.
7393  *
7394  * @param[in] dev
7395  *   Pointer to Ethernet device.
7396  */
7397 void
7398 mlx5_flow_destroy_def_policy(struct rte_eth_dev *dev)
7399 {
7400         const struct mlx5_flow_driver_ops *fops;
7401
7402         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7403         fops->destroy_def_policy(dev);
7404 }
7405
7406 /**
7407  * Destroy the default policy table set.
7408  *
7409  * @param[in] dev
7410  *   Pointer to Ethernet device.
7411  *
7412  * @return
7413  *   0 on success, -1 otherwise.
7414  */
7415 int
7416 mlx5_flow_create_def_policy(struct rte_eth_dev *dev)
7417 {
7418         const struct mlx5_flow_driver_ops *fops;
7419
7420         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7421         return fops->create_def_policy(dev);
7422 }
7423
7424 /**
7425  * Create the needed meter and suffix tables.
7426  *
7427  * @param[in] dev
7428  *   Pointer to Ethernet device.
7429  *
7430  * @return
7431  *   0 on success, -1 otherwise.
7432  */
7433 int
7434 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
7435                         struct mlx5_flow_meter_info *fm,
7436                         uint32_t mtr_idx,
7437                         uint8_t domain_bitmap)
7438 {
7439         const struct mlx5_flow_driver_ops *fops;
7440
7441         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7442         return fops->create_mtr_tbls(dev, fm, mtr_idx, domain_bitmap);
7443 }
7444
7445 /**
7446  * Destroy the meter table set.
7447  *
7448  * @param[in] dev
7449  *   Pointer to Ethernet device.
7450  * @param[in] tbl
7451  *   Pointer to the meter table set.
7452  */
7453 void
7454 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
7455                            struct mlx5_flow_meter_info *fm)
7456 {
7457         const struct mlx5_flow_driver_ops *fops;
7458
7459         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7460         fops->destroy_mtr_tbls(dev, fm);
7461 }
7462
7463 /**
7464  * Destroy the global meter drop table.
7465  *
7466  * @param[in] dev
7467  *   Pointer to Ethernet device.
7468  */
7469 void
7470 mlx5_flow_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
7471 {
7472         const struct mlx5_flow_driver_ops *fops;
7473
7474         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7475         fops->destroy_mtr_drop_tbls(dev);
7476 }
7477
7478 /**
7479  * Destroy the sub policy table with RX queue.
7480  *
7481  * @param[in] dev
7482  *   Pointer to Ethernet device.
7483  * @param[in] mtr_policy
7484  *   Pointer to meter policy table.
7485  */
7486 void
7487 mlx5_flow_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
7488                 struct mlx5_flow_meter_policy *mtr_policy)
7489 {
7490         const struct mlx5_flow_driver_ops *fops;
7491
7492         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7493         fops->destroy_sub_policy_with_rxq(dev, mtr_policy);
7494 }
7495
7496 /**
7497  * Allocate the needed aso flow meter id.
7498  *
7499  * @param[in] dev
7500  *   Pointer to Ethernet device.
7501  *
7502  * @return
7503  *   Index to aso flow meter on success, NULL otherwise.
7504  */
7505 uint32_t
7506 mlx5_flow_mtr_alloc(struct rte_eth_dev *dev)
7507 {
7508         const struct mlx5_flow_driver_ops *fops;
7509
7510         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7511         return fops->create_meter(dev);
7512 }
7513
7514 /**
7515  * Free the aso flow meter id.
7516  *
7517  * @param[in] dev
7518  *   Pointer to Ethernet device.
7519  * @param[in] mtr_idx
7520  *  Index to aso flow meter to be free.
7521  *
7522  * @return
7523  *   0 on success.
7524  */
7525 void
7526 mlx5_flow_mtr_free(struct rte_eth_dev *dev, uint32_t mtr_idx)
7527 {
7528         const struct mlx5_flow_driver_ops *fops;
7529
7530         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7531         fops->free_meter(dev, mtr_idx);
7532 }
7533
7534 /**
7535  * Allocate a counter.
7536  *
7537  * @param[in] dev
7538  *   Pointer to Ethernet device structure.
7539  *
7540  * @return
7541  *   Index to allocated counter  on success, 0 otherwise.
7542  */
7543 uint32_t
7544 mlx5_counter_alloc(struct rte_eth_dev *dev)
7545 {
7546         const struct mlx5_flow_driver_ops *fops;
7547         struct rte_flow_attr attr = { .transfer = 0 };
7548
7549         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7550                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7551                 return fops->counter_alloc(dev);
7552         }
7553         DRV_LOG(ERR,
7554                 "port %u counter allocate is not supported.",
7555                  dev->data->port_id);
7556         return 0;
7557 }
7558
7559 /**
7560  * Free a counter.
7561  *
7562  * @param[in] dev
7563  *   Pointer to Ethernet device structure.
7564  * @param[in] cnt
7565  *   Index to counter to be free.
7566  */
7567 void
7568 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt)
7569 {
7570         const struct mlx5_flow_driver_ops *fops;
7571         struct rte_flow_attr attr = { .transfer = 0 };
7572
7573         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7574                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7575                 fops->counter_free(dev, cnt);
7576                 return;
7577         }
7578         DRV_LOG(ERR,
7579                 "port %u counter free is not supported.",
7580                  dev->data->port_id);
7581 }
7582
7583 /**
7584  * Query counter statistics.
7585  *
7586  * @param[in] dev
7587  *   Pointer to Ethernet device structure.
7588  * @param[in] cnt
7589  *   Index to counter to query.
7590  * @param[in] clear
7591  *   Set to clear counter statistics.
7592  * @param[out] pkts
7593  *   The counter hits packets number to save.
7594  * @param[out] bytes
7595  *   The counter hits bytes number to save.
7596  *
7597  * @return
7598  *   0 on success, a negative errno value otherwise.
7599  */
7600 int
7601 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
7602                    bool clear, uint64_t *pkts, uint64_t *bytes)
7603 {
7604         const struct mlx5_flow_driver_ops *fops;
7605         struct rte_flow_attr attr = { .transfer = 0 };
7606
7607         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7608                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7609                 return fops->counter_query(dev, cnt, clear, pkts, bytes);
7610         }
7611         DRV_LOG(ERR,
7612                 "port %u counter query is not supported.",
7613                  dev->data->port_id);
7614         return -ENOTSUP;
7615 }
7616
7617 /**
7618  * Allocate a new memory for the counter values wrapped by all the needed
7619  * management.
7620  *
7621  * @param[in] sh
7622  *   Pointer to mlx5_dev_ctx_shared object.
7623  *
7624  * @return
7625  *   0 on success, a negative errno value otherwise.
7626  */
7627 static int
7628 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh)
7629 {
7630         struct mlx5_devx_mkey_attr mkey_attr;
7631         struct mlx5_counter_stats_mem_mng *mem_mng;
7632         volatile struct flow_counter_stats *raw_data;
7633         int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES;
7634         int size = (sizeof(struct flow_counter_stats) *
7635                         MLX5_COUNTERS_PER_POOL +
7636                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
7637                         sizeof(struct mlx5_counter_stats_mem_mng);
7638         size_t pgsize = rte_mem_page_size();
7639         uint8_t *mem;
7640         int i;
7641
7642         if (pgsize == (size_t)-1) {
7643                 DRV_LOG(ERR, "Failed to get mem page size");
7644                 rte_errno = ENOMEM;
7645                 return -ENOMEM;
7646         }
7647         mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY);
7648         if (!mem) {
7649                 rte_errno = ENOMEM;
7650                 return -ENOMEM;
7651         }
7652         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
7653         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
7654         mem_mng->umem = mlx5_os_umem_reg(sh->cdev->ctx, mem, size,
7655                                                  IBV_ACCESS_LOCAL_WRITE);
7656         if (!mem_mng->umem) {
7657                 rte_errno = errno;
7658                 mlx5_free(mem);
7659                 return -rte_errno;
7660         }
7661         memset(&mkey_attr, 0, sizeof(mkey_attr));
7662         mkey_attr.addr = (uintptr_t)mem;
7663         mkey_attr.size = size;
7664         mkey_attr.umem_id = mlx5_os_get_umem_id(mem_mng->umem);
7665         mkey_attr.pd = sh->cdev->pdn;
7666         mkey_attr.relaxed_ordering_write = sh->cmng.relaxed_ordering_write;
7667         mkey_attr.relaxed_ordering_read = sh->cmng.relaxed_ordering_read;
7668         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->cdev->ctx, &mkey_attr);
7669         if (!mem_mng->dm) {
7670                 mlx5_os_umem_dereg(mem_mng->umem);
7671                 rte_errno = errno;
7672                 mlx5_free(mem);
7673                 return -rte_errno;
7674         }
7675         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
7676         raw_data = (volatile struct flow_counter_stats *)mem;
7677         for (i = 0; i < raws_n; ++i) {
7678                 mem_mng->raws[i].mem_mng = mem_mng;
7679                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
7680         }
7681         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
7682                 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws,
7683                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i,
7684                                  next);
7685         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
7686         sh->cmng.mem_mng = mem_mng;
7687         return 0;
7688 }
7689
7690 /**
7691  * Set the statistic memory to the new counter pool.
7692  *
7693  * @param[in] sh
7694  *   Pointer to mlx5_dev_ctx_shared object.
7695  * @param[in] pool
7696  *   Pointer to the pool to set the statistic memory.
7697  *
7698  * @return
7699  *   0 on success, a negative errno value otherwise.
7700  */
7701 static int
7702 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh,
7703                                struct mlx5_flow_counter_pool *pool)
7704 {
7705         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7706         /* Resize statistic memory once used out. */
7707         if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) &&
7708             mlx5_flow_create_counter_stat_mem_mng(sh)) {
7709                 DRV_LOG(ERR, "Cannot resize counter stat mem.");
7710                 return -1;
7711         }
7712         rte_spinlock_lock(&pool->sl);
7713         pool->raw = cmng->mem_mng->raws + pool->index %
7714                     MLX5_CNT_CONTAINER_RESIZE;
7715         rte_spinlock_unlock(&pool->sl);
7716         pool->raw_hw = NULL;
7717         return 0;
7718 }
7719
7720 #define MLX5_POOL_QUERY_FREQ_US 1000000
7721
7722 /**
7723  * Set the periodic procedure for triggering asynchronous batch queries for all
7724  * the counter pools.
7725  *
7726  * @param[in] sh
7727  *   Pointer to mlx5_dev_ctx_shared object.
7728  */
7729 void
7730 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh)
7731 {
7732         uint32_t pools_n, us;
7733
7734         pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED);
7735         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
7736         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
7737         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
7738                 sh->cmng.query_thread_on = 0;
7739                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
7740         } else {
7741                 sh->cmng.query_thread_on = 1;
7742         }
7743 }
7744
7745 /**
7746  * The periodic procedure for triggering asynchronous batch queries for all the
7747  * counter pools. This function is probably called by the host thread.
7748  *
7749  * @param[in] arg
7750  *   The parameter for the alarm process.
7751  */
7752 void
7753 mlx5_flow_query_alarm(void *arg)
7754 {
7755         struct mlx5_dev_ctx_shared *sh = arg;
7756         int ret;
7757         uint16_t pool_index = sh->cmng.pool_index;
7758         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7759         struct mlx5_flow_counter_pool *pool;
7760         uint16_t n_valid;
7761
7762         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
7763                 goto set_alarm;
7764         rte_spinlock_lock(&cmng->pool_update_sl);
7765         pool = cmng->pools[pool_index];
7766         n_valid = cmng->n_valid;
7767         rte_spinlock_unlock(&cmng->pool_update_sl);
7768         /* Set the statistic memory to the new created pool. */
7769         if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool)))
7770                 goto set_alarm;
7771         if (pool->raw_hw)
7772                 /* There is a pool query in progress. */
7773                 goto set_alarm;
7774         pool->raw_hw =
7775                 LIST_FIRST(&sh->cmng.free_stat_raws);
7776         if (!pool->raw_hw)
7777                 /* No free counter statistics raw memory. */
7778                 goto set_alarm;
7779         /*
7780          * Identify the counters released between query trigger and query
7781          * handle more efficiently. The counter released in this gap period
7782          * should wait for a new round of query as the new arrived packets
7783          * will not be taken into account.
7784          */
7785         pool->query_gen++;
7786         ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0,
7787                                                MLX5_COUNTERS_PER_POOL,
7788                                                NULL, NULL,
7789                                                pool->raw_hw->mem_mng->dm->id,
7790                                                (void *)(uintptr_t)
7791                                                pool->raw_hw->data,
7792                                                sh->devx_comp,
7793                                                (uint64_t)(uintptr_t)pool);
7794         if (ret) {
7795                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
7796                         " %d", pool->min_dcs->id);
7797                 pool->raw_hw = NULL;
7798                 goto set_alarm;
7799         }
7800         LIST_REMOVE(pool->raw_hw, next);
7801         sh->cmng.pending_queries++;
7802         pool_index++;
7803         if (pool_index >= n_valid)
7804                 pool_index = 0;
7805 set_alarm:
7806         sh->cmng.pool_index = pool_index;
7807         mlx5_set_query_alarm(sh);
7808 }
7809
7810 /**
7811  * Check and callback event for new aged flow in the counter pool
7812  *
7813  * @param[in] sh
7814  *   Pointer to mlx5_dev_ctx_shared object.
7815  * @param[in] pool
7816  *   Pointer to Current counter pool.
7817  */
7818 static void
7819 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh,
7820                    struct mlx5_flow_counter_pool *pool)
7821 {
7822         struct mlx5_priv *priv;
7823         struct mlx5_flow_counter *cnt;
7824         struct mlx5_age_info *age_info;
7825         struct mlx5_age_param *age_param;
7826         struct mlx5_counter_stats_raw *cur = pool->raw_hw;
7827         struct mlx5_counter_stats_raw *prev = pool->raw;
7828         const uint64_t curr_time = MLX5_CURR_TIME_SEC;
7829         const uint32_t time_delta = curr_time - pool->time_of_last_age_check;
7830         uint16_t expected = AGE_CANDIDATE;
7831         uint32_t i;
7832
7833         pool->time_of_last_age_check = curr_time;
7834         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
7835                 cnt = MLX5_POOL_GET_CNT(pool, i);
7836                 age_param = MLX5_CNT_TO_AGE(cnt);
7837                 if (__atomic_load_n(&age_param->state,
7838                                     __ATOMIC_RELAXED) != AGE_CANDIDATE)
7839                         continue;
7840                 if (cur->data[i].hits != prev->data[i].hits) {
7841                         __atomic_store_n(&age_param->sec_since_last_hit, 0,
7842                                          __ATOMIC_RELAXED);
7843                         continue;
7844                 }
7845                 if (__atomic_add_fetch(&age_param->sec_since_last_hit,
7846                                        time_delta,
7847                                        __ATOMIC_RELAXED) <= age_param->timeout)
7848                         continue;
7849                 /**
7850                  * Hold the lock first, or if between the
7851                  * state AGE_TMOUT and tailq operation the
7852                  * release happened, the release procedure
7853                  * may delete a non-existent tailq node.
7854                  */
7855                 priv = rte_eth_devices[age_param->port_id].data->dev_private;
7856                 age_info = GET_PORT_AGE_INFO(priv);
7857                 rte_spinlock_lock(&age_info->aged_sl);
7858                 if (__atomic_compare_exchange_n(&age_param->state, &expected,
7859                                                 AGE_TMOUT, false,
7860                                                 __ATOMIC_RELAXED,
7861                                                 __ATOMIC_RELAXED)) {
7862                         TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next);
7863                         MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW);
7864                 }
7865                 rte_spinlock_unlock(&age_info->aged_sl);
7866         }
7867         mlx5_age_event_prepare(sh);
7868 }
7869
7870 /**
7871  * Handler for the HW respond about ready values from an asynchronous batch
7872  * query. This function is probably called by the host thread.
7873  *
7874  * @param[in] sh
7875  *   The pointer to the shared device context.
7876  * @param[in] async_id
7877  *   The Devx async ID.
7878  * @param[in] status
7879  *   The status of the completion.
7880  */
7881 void
7882 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
7883                                   uint64_t async_id, int status)
7884 {
7885         struct mlx5_flow_counter_pool *pool =
7886                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
7887         struct mlx5_counter_stats_raw *raw_to_free;
7888         uint8_t query_gen = pool->query_gen ^ 1;
7889         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7890         enum mlx5_counter_type cnt_type =
7891                 pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
7892                                 MLX5_COUNTER_TYPE_ORIGIN;
7893
7894         if (unlikely(status)) {
7895                 raw_to_free = pool->raw_hw;
7896         } else {
7897                 raw_to_free = pool->raw;
7898                 if (pool->is_aged)
7899                         mlx5_flow_aging_check(sh, pool);
7900                 rte_spinlock_lock(&pool->sl);
7901                 pool->raw = pool->raw_hw;
7902                 rte_spinlock_unlock(&pool->sl);
7903                 /* Be sure the new raw counters data is updated in memory. */
7904                 rte_io_wmb();
7905                 if (!TAILQ_EMPTY(&pool->counters[query_gen])) {
7906                         rte_spinlock_lock(&cmng->csl[cnt_type]);
7907                         TAILQ_CONCAT(&cmng->counters[cnt_type],
7908                                      &pool->counters[query_gen], next);
7909                         rte_spinlock_unlock(&cmng->csl[cnt_type]);
7910                 }
7911         }
7912         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
7913         pool->raw_hw = NULL;
7914         sh->cmng.pending_queries--;
7915 }
7916
7917 static int
7918 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table,
7919                     const struct flow_grp_info *grp_info,
7920                     struct rte_flow_error *error)
7921 {
7922         if (grp_info->transfer && grp_info->external &&
7923             grp_info->fdb_def_rule) {
7924                 if (group == UINT32_MAX)
7925                         return rte_flow_error_set
7926                                                 (error, EINVAL,
7927                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
7928                                                  NULL,
7929                                                  "group index not supported");
7930                 *table = group + 1;
7931         } else {
7932                 *table = group;
7933         }
7934         DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table);
7935         return 0;
7936 }
7937
7938 /**
7939  * Translate the rte_flow group index to HW table value.
7940  *
7941  * If tunnel offload is disabled, all group ids converted to flow table
7942  * id using the standard method.
7943  * If tunnel offload is enabled, group id can be converted using the
7944  * standard or tunnel conversion method. Group conversion method
7945  * selection depends on flags in `grp_info` parameter:
7946  * - Internal (grp_info.external == 0) groups conversion uses the
7947  *   standard method.
7948  * - Group ids in JUMP action converted with the tunnel conversion.
7949  * - Group id in rule attribute conversion depends on a rule type and
7950  *   group id value:
7951  *   ** non zero group attributes converted with the tunnel method
7952  *   ** zero group attribute in non-tunnel rule is converted using the
7953  *      standard method - there's only one root table
7954  *   ** zero group attribute in steer tunnel rule is converted with the
7955  *      standard method - single root table
7956  *   ** zero group attribute in match tunnel rule is a special OvS
7957  *      case: that value is used for portability reasons. That group
7958  *      id is converted with the tunnel conversion method.
7959  *
7960  * @param[in] dev
7961  *   Port device
7962  * @param[in] tunnel
7963  *   PMD tunnel offload object
7964  * @param[in] group
7965  *   rte_flow group index value.
7966  * @param[out] table
7967  *   HW table value.
7968  * @param[in] grp_info
7969  *   flags used for conversion
7970  * @param[out] error
7971  *   Pointer to error structure.
7972  *
7973  * @return
7974  *   0 on success, a negative errno value otherwise and rte_errno is set.
7975  */
7976 int
7977 mlx5_flow_group_to_table(struct rte_eth_dev *dev,
7978                          const struct mlx5_flow_tunnel *tunnel,
7979                          uint32_t group, uint32_t *table,
7980                          const struct flow_grp_info *grp_info,
7981                          struct rte_flow_error *error)
7982 {
7983         int ret;
7984         bool standard_translation;
7985
7986         if (!grp_info->skip_scale && grp_info->external &&
7987             group < MLX5_MAX_TABLES_EXTERNAL)
7988                 group *= MLX5_FLOW_TABLE_FACTOR;
7989         if (is_tunnel_offload_active(dev)) {
7990                 standard_translation = !grp_info->external ||
7991                                         grp_info->std_tbl_fix;
7992         } else {
7993                 standard_translation = true;
7994         }
7995         DRV_LOG(DEBUG,
7996                 "port %u group=%u transfer=%d external=%d fdb_def_rule=%d translate=%s",
7997                 dev->data->port_id, group, grp_info->transfer,
7998                 grp_info->external, grp_info->fdb_def_rule,
7999                 standard_translation ? "STANDARD" : "TUNNEL");
8000         if (standard_translation)
8001                 ret = flow_group_to_table(dev->data->port_id, group, table,
8002                                           grp_info, error);
8003         else
8004                 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group,
8005                                                       table, error);
8006
8007         return ret;
8008 }
8009
8010 /**
8011  * Discover availability of metadata reg_c's.
8012  *
8013  * Iteratively use test flows to check availability.
8014  *
8015  * @param[in] dev
8016  *   Pointer to the Ethernet device structure.
8017  *
8018  * @return
8019  *   0 on success, a negative errno value otherwise and rte_errno is set.
8020  */
8021 int
8022 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
8023 {
8024         struct mlx5_priv *priv = dev->data->dev_private;
8025         struct mlx5_dev_config *config = &priv->config;
8026         enum modify_reg idx;
8027         int n = 0;
8028
8029         /* reg_c[0] and reg_c[1] are reserved. */
8030         config->flow_mreg_c[n++] = REG_C_0;
8031         config->flow_mreg_c[n++] = REG_C_1;
8032         /* Discover availability of other reg_c's. */
8033         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
8034                 struct rte_flow_attr attr = {
8035                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
8036                         .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
8037                         .ingress = 1,
8038                 };
8039                 struct rte_flow_item items[] = {
8040                         [0] = {
8041                                 .type = RTE_FLOW_ITEM_TYPE_END,
8042                         },
8043                 };
8044                 struct rte_flow_action actions[] = {
8045                         [0] = {
8046                                 .type = (enum rte_flow_action_type)
8047                                         MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
8048                                 .conf = &(struct mlx5_flow_action_copy_mreg){
8049                                         .src = REG_C_1,
8050                                         .dst = idx,
8051                                 },
8052                         },
8053                         [1] = {
8054                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
8055                                 .conf = &(struct rte_flow_action_jump){
8056                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
8057                                 },
8058                         },
8059                         [2] = {
8060                                 .type = RTE_FLOW_ACTION_TYPE_END,
8061                         },
8062                 };
8063                 uint32_t flow_idx;
8064                 struct rte_flow *flow;
8065                 struct rte_flow_error error;
8066
8067                 if (!config->dv_flow_en)
8068                         break;
8069                 /* Create internal flow, validation skips copy action. */
8070                 flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_GEN, &attr,
8071                                         items, actions, false, &error);
8072                 flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
8073                                       flow_idx);
8074                 if (!flow)
8075                         continue;
8076                 config->flow_mreg_c[n++] = idx;
8077                 flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN, flow_idx);
8078         }
8079         for (; n < MLX5_MREG_C_NUM; ++n)
8080                 config->flow_mreg_c[n] = REG_NON;
8081         return 0;
8082 }
8083
8084 int
8085 save_dump_file(const uint8_t *data, uint32_t size,
8086         uint32_t type, uint32_t id, void *arg, FILE *file)
8087 {
8088         char line[BUF_SIZE];
8089         uint32_t out = 0;
8090         uint32_t k;
8091         uint32_t actions_num;
8092         struct rte_flow_query_count *count;
8093
8094         memset(line, 0, BUF_SIZE);
8095         switch (type) {
8096         case DR_DUMP_REC_TYPE_PMD_MODIFY_HDR:
8097                 actions_num = *(uint32_t *)(arg);
8098                 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%x,%d,",
8099                                 type, id, actions_num);
8100                 break;
8101         case DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT:
8102                 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%x,",
8103                                 type, id);
8104                 break;
8105         case DR_DUMP_REC_TYPE_PMD_COUNTER:
8106                 count = (struct rte_flow_query_count *)arg;
8107                 fprintf(file, "%d,0x%x,%" PRIu64 ",%" PRIu64 "\n", type,
8108                                 id, count->hits, count->bytes);
8109                 return 0;
8110         default:
8111                 return -1;
8112         }
8113
8114         for (k = 0; k < size; k++) {
8115                 /* Make sure we do not overrun the line buffer length. */
8116                 if (out >= BUF_SIZE - 4) {
8117                         line[out] = '\0';
8118                         break;
8119                 }
8120                 out += snprintf(line + out, BUF_SIZE - out, "%02x",
8121                                 (data[k]) & 0xff);
8122         }
8123         fprintf(file, "%s\n", line);
8124         return 0;
8125 }
8126
8127 int
8128 mlx5_flow_query_counter(struct rte_eth_dev *dev, struct rte_flow *flow,
8129         struct rte_flow_query_count *count, struct rte_flow_error *error)
8130 {
8131         struct rte_flow_action action[2];
8132         enum mlx5_flow_drv_type ftype;
8133         const struct mlx5_flow_driver_ops *fops;
8134
8135         if (!flow) {
8136                 return rte_flow_error_set(error, ENOENT,
8137                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8138                                 NULL,
8139                                 "invalid flow handle");
8140         }
8141         action[0].type = RTE_FLOW_ACTION_TYPE_COUNT;
8142         action[1].type = RTE_FLOW_ACTION_TYPE_END;
8143         if (flow->counter) {
8144                 memset(count, 0, sizeof(struct rte_flow_query_count));
8145                 ftype = (enum mlx5_flow_drv_type)(flow->drv_type);
8146                 MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN &&
8147                                                 ftype < MLX5_FLOW_TYPE_MAX);
8148                 fops = flow_get_drv_ops(ftype);
8149                 return fops->query(dev, flow, action, count, error);
8150         }
8151         return -1;
8152 }
8153
8154 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8155 /**
8156  * Dump flow ipool data to file
8157  *
8158  * @param[in] dev
8159  *   The pointer to Ethernet device.
8160  * @param[in] file
8161  *   A pointer to a file for output.
8162  * @param[out] error
8163  *   Perform verbose error reporting if not NULL. PMDs initialize this
8164  *   structure in case of error only.
8165  * @return
8166  *   0 on success, a negative value otherwise.
8167  */
8168 int
8169 mlx5_flow_dev_dump_ipool(struct rte_eth_dev *dev,
8170         struct rte_flow *flow, FILE *file,
8171         struct rte_flow_error *error)
8172 {
8173         struct mlx5_priv *priv = dev->data->dev_private;
8174         struct mlx5_flow_dv_modify_hdr_resource  *modify_hdr;
8175         struct mlx5_flow_dv_encap_decap_resource *encap_decap;
8176         uint32_t handle_idx;
8177         struct mlx5_flow_handle *dh;
8178         struct rte_flow_query_count count;
8179         uint32_t actions_num;
8180         const uint8_t *data;
8181         size_t size;
8182         uint32_t id;
8183         uint32_t type;
8184
8185         if (!flow) {
8186                 return rte_flow_error_set(error, ENOENT,
8187                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8188                         NULL,
8189                         "invalid flow handle");
8190         }
8191         handle_idx = flow->dev_handles;
8192         while (handle_idx) {
8193                 dh = mlx5_ipool_get(priv->sh->ipool
8194                         [MLX5_IPOOL_MLX5_FLOW], handle_idx);
8195                 if (!dh)
8196                         continue;
8197                 handle_idx = dh->next.next;
8198                 id = (uint32_t)(uintptr_t)dh->drv_flow;
8199
8200                 /* query counter */
8201                 type = DR_DUMP_REC_TYPE_PMD_COUNTER;
8202                 if (!mlx5_flow_query_counter(dev, flow, &count, error))
8203                         save_dump_file(NULL, 0, type,
8204                                         id, (void *)&count, file);
8205
8206                 /* Get modify_hdr and encap_decap buf from ipools. */
8207                 encap_decap = NULL;
8208                 modify_hdr = dh->dvh.modify_hdr;
8209
8210                 if (dh->dvh.rix_encap_decap) {
8211                         encap_decap = mlx5_ipool_get(priv->sh->ipool
8212                                                 [MLX5_IPOOL_DECAP_ENCAP],
8213                                                 dh->dvh.rix_encap_decap);
8214                 }
8215                 if (modify_hdr) {
8216                         data = (const uint8_t *)modify_hdr->actions;
8217                         size = (size_t)(modify_hdr->actions_num) * 8;
8218                         actions_num = modify_hdr->actions_num;
8219                         type = DR_DUMP_REC_TYPE_PMD_MODIFY_HDR;
8220                         save_dump_file(data, size, type, id,
8221                                         (void *)(&actions_num), file);
8222                 }
8223                 if (encap_decap) {
8224                         data = encap_decap->buf;
8225                         size = encap_decap->size;
8226                         type = DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT;
8227                         save_dump_file(data, size, type,
8228                                                 id, NULL, file);
8229                 }
8230         }
8231         return 0;
8232 }
8233 #endif
8234
8235 /**
8236  * Dump flow raw hw data to file
8237  *
8238  * @param[in] dev
8239  *    The pointer to Ethernet device.
8240  * @param[in] file
8241  *   A pointer to a file for output.
8242  * @param[out] error
8243  *   Perform verbose error reporting if not NULL. PMDs initialize this
8244  *   structure in case of error only.
8245  * @return
8246  *   0 on success, a nagative value otherwise.
8247  */
8248 int
8249 mlx5_flow_dev_dump(struct rte_eth_dev *dev, struct rte_flow *flow_idx,
8250                    FILE *file,
8251                    struct rte_flow_error *error __rte_unused)
8252 {
8253         struct mlx5_priv *priv = dev->data->dev_private;
8254         struct mlx5_dev_ctx_shared *sh = priv->sh;
8255         uint32_t handle_idx;
8256         int ret;
8257         struct mlx5_flow_handle *dh;
8258         struct rte_flow *flow;
8259 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8260         uint32_t idx;
8261 #endif
8262
8263         if (!priv->config.dv_flow_en) {
8264                 if (fputs("device dv flow disabled\n", file) <= 0)
8265                         return -errno;
8266                 return -ENOTSUP;
8267         }
8268
8269         /* dump all */
8270         if (!flow_idx) {
8271 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8272                 MLX5_IPOOL_FOREACH(priv->flows[MLX5_FLOW_TYPE_GEN], idx, flow)
8273                         mlx5_flow_dev_dump_ipool(dev, flow, file, error);
8274 #endif
8275                 return mlx5_devx_cmd_flow_dump(sh->fdb_domain,
8276                                         sh->rx_domain,
8277                                         sh->tx_domain, file);
8278         }
8279         /* dump one */
8280         flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
8281                         (uintptr_t)(void *)flow_idx);
8282         if (!flow)
8283                 return -ENOENT;
8284
8285 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8286         mlx5_flow_dev_dump_ipool(dev, flow, file, error);
8287 #endif
8288         handle_idx = flow->dev_handles;
8289         while (handle_idx) {
8290                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
8291                                 handle_idx);
8292                 if (!dh)
8293                         return -ENOENT;
8294                 if (dh->drv_flow) {
8295                         ret = mlx5_devx_cmd_flow_single_dump(dh->drv_flow,
8296                                         file);
8297                         if (ret)
8298                                 return -ENOENT;
8299                 }
8300                 handle_idx = dh->next.next;
8301         }
8302         return 0;
8303 }
8304
8305 /**
8306  * Get aged-out flows.
8307  *
8308  * @param[in] dev
8309  *   Pointer to the Ethernet device structure.
8310  * @param[in] context
8311  *   The address of an array of pointers to the aged-out flows contexts.
8312  * @param[in] nb_countexts
8313  *   The length of context array pointers.
8314  * @param[out] error
8315  *   Perform verbose error reporting if not NULL. Initialized in case of
8316  *   error only.
8317  *
8318  * @return
8319  *   how many contexts get in success, otherwise negative errno value.
8320  *   if nb_contexts is 0, return the amount of all aged contexts.
8321  *   if nb_contexts is not 0 , return the amount of aged flows reported
8322  *   in the context array.
8323  */
8324 int
8325 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
8326                         uint32_t nb_contexts, struct rte_flow_error *error)
8327 {
8328         const struct mlx5_flow_driver_ops *fops;
8329         struct rte_flow_attr attr = { .transfer = 0 };
8330
8331         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
8332                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
8333                 return fops->get_aged_flows(dev, contexts, nb_contexts,
8334                                                     error);
8335         }
8336         DRV_LOG(ERR,
8337                 "port %u get aged flows is not supported.",
8338                  dev->data->port_id);
8339         return -ENOTSUP;
8340 }
8341
8342 /* Wrapper for driver action_validate op callback */
8343 static int
8344 flow_drv_action_validate(struct rte_eth_dev *dev,
8345                          const struct rte_flow_indir_action_conf *conf,
8346                          const struct rte_flow_action *action,
8347                          const struct mlx5_flow_driver_ops *fops,
8348                          struct rte_flow_error *error)
8349 {
8350         static const char err_msg[] = "indirect action validation unsupported";
8351
8352         if (!fops->action_validate) {
8353                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8354                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8355                                    NULL, err_msg);
8356                 return -rte_errno;
8357         }
8358         return fops->action_validate(dev, conf, action, error);
8359 }
8360
8361 /**
8362  * Destroys the shared action by handle.
8363  *
8364  * @param dev
8365  *   Pointer to Ethernet device structure.
8366  * @param[in] handle
8367  *   Handle for the indirect action object to be destroyed.
8368  * @param[out] error
8369  *   Perform verbose error reporting if not NULL. PMDs initialize this
8370  *   structure in case of error only.
8371  *
8372  * @return
8373  *   0 on success, a negative errno value otherwise and rte_errno is set.
8374  *
8375  * @note: wrapper for driver action_create op callback.
8376  */
8377 static int
8378 mlx5_action_handle_destroy(struct rte_eth_dev *dev,
8379                            struct rte_flow_action_handle *handle,
8380                            struct rte_flow_error *error)
8381 {
8382         static const char err_msg[] = "indirect action destruction unsupported";
8383         struct rte_flow_attr attr = { .transfer = 0 };
8384         const struct mlx5_flow_driver_ops *fops =
8385                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8386
8387         if (!fops->action_destroy) {
8388                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8389                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8390                                    NULL, err_msg);
8391                 return -rte_errno;
8392         }
8393         return fops->action_destroy(dev, handle, error);
8394 }
8395
8396 /* Wrapper for driver action_destroy op callback */
8397 static int
8398 flow_drv_action_update(struct rte_eth_dev *dev,
8399                        struct rte_flow_action_handle *handle,
8400                        const void *update,
8401                        const struct mlx5_flow_driver_ops *fops,
8402                        struct rte_flow_error *error)
8403 {
8404         static const char err_msg[] = "indirect action update unsupported";
8405
8406         if (!fops->action_update) {
8407                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8408                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8409                                    NULL, err_msg);
8410                 return -rte_errno;
8411         }
8412         return fops->action_update(dev, handle, update, error);
8413 }
8414
8415 /* Wrapper for driver action_destroy op callback */
8416 static int
8417 flow_drv_action_query(struct rte_eth_dev *dev,
8418                       const struct rte_flow_action_handle *handle,
8419                       void *data,
8420                       const struct mlx5_flow_driver_ops *fops,
8421                       struct rte_flow_error *error)
8422 {
8423         static const char err_msg[] = "indirect action query unsupported";
8424
8425         if (!fops->action_query) {
8426                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8427                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8428                                    NULL, err_msg);
8429                 return -rte_errno;
8430         }
8431         return fops->action_query(dev, handle, data, error);
8432 }
8433
8434 /**
8435  * Create indirect action for reuse in multiple flow rules.
8436  *
8437  * @param dev
8438  *   Pointer to Ethernet device structure.
8439  * @param conf
8440  *   Pointer to indirect action object configuration.
8441  * @param[in] action
8442  *   Action configuration for indirect action object creation.
8443  * @param[out] error
8444  *   Perform verbose error reporting if not NULL. PMDs initialize this
8445  *   structure in case of error only.
8446  * @return
8447  *   A valid handle in case of success, NULL otherwise and rte_errno is set.
8448  */
8449 static struct rte_flow_action_handle *
8450 mlx5_action_handle_create(struct rte_eth_dev *dev,
8451                           const struct rte_flow_indir_action_conf *conf,
8452                           const struct rte_flow_action *action,
8453                           struct rte_flow_error *error)
8454 {
8455         static const char err_msg[] = "indirect action creation unsupported";
8456         struct rte_flow_attr attr = { .transfer = 0 };
8457         const struct mlx5_flow_driver_ops *fops =
8458                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8459
8460         if (flow_drv_action_validate(dev, conf, action, fops, error))
8461                 return NULL;
8462         if (!fops->action_create) {
8463                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8464                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8465                                    NULL, err_msg);
8466                 return NULL;
8467         }
8468         return fops->action_create(dev, conf, action, error);
8469 }
8470
8471 /**
8472  * Updates inplace the indirect action configuration pointed by *handle*
8473  * with the configuration provided as *update* argument.
8474  * The update of the indirect action configuration effects all flow rules
8475  * reusing the action via handle.
8476  *
8477  * @param dev
8478  *   Pointer to Ethernet device structure.
8479  * @param[in] handle
8480  *   Handle for the indirect action to be updated.
8481  * @param[in] update
8482  *   Action specification used to modify the action pointed by handle.
8483  *   *update* could be of same type with the action pointed by the *handle*
8484  *   handle argument, or some other structures like a wrapper, depending on
8485  *   the indirect action type.
8486  * @param[out] error
8487  *   Perform verbose error reporting if not NULL. PMDs initialize this
8488  *   structure in case of error only.
8489  *
8490  * @return
8491  *   0 on success, a negative errno value otherwise and rte_errno is set.
8492  */
8493 static int
8494 mlx5_action_handle_update(struct rte_eth_dev *dev,
8495                 struct rte_flow_action_handle *handle,
8496                 const void *update,
8497                 struct rte_flow_error *error)
8498 {
8499         struct rte_flow_attr attr = { .transfer = 0 };
8500         const struct mlx5_flow_driver_ops *fops =
8501                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8502         int ret;
8503
8504         ret = flow_drv_action_validate(dev, NULL,
8505                         (const struct rte_flow_action *)update, fops, error);
8506         if (ret)
8507                 return ret;
8508         return flow_drv_action_update(dev, handle, update, fops,
8509                                       error);
8510 }
8511
8512 /**
8513  * Query the indirect action by handle.
8514  *
8515  * This function allows retrieving action-specific data such as counters.
8516  * Data is gathered by special action which may be present/referenced in
8517  * more than one flow rule definition.
8518  *
8519  * see @RTE_FLOW_ACTION_TYPE_COUNT
8520  *
8521  * @param dev
8522  *   Pointer to Ethernet device structure.
8523  * @param[in] handle
8524  *   Handle for the indirect action to query.
8525  * @param[in, out] data
8526  *   Pointer to storage for the associated query data type.
8527  * @param[out] error
8528  *   Perform verbose error reporting if not NULL. PMDs initialize this
8529  *   structure in case of error only.
8530  *
8531  * @return
8532  *   0 on success, a negative errno value otherwise and rte_errno is set.
8533  */
8534 static int
8535 mlx5_action_handle_query(struct rte_eth_dev *dev,
8536                          const struct rte_flow_action_handle *handle,
8537                          void *data,
8538                          struct rte_flow_error *error)
8539 {
8540         struct rte_flow_attr attr = { .transfer = 0 };
8541         const struct mlx5_flow_driver_ops *fops =
8542                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8543
8544         return flow_drv_action_query(dev, handle, data, fops, error);
8545 }
8546
8547 /**
8548  * Destroy all indirect actions (shared RSS).
8549  *
8550  * @param dev
8551  *   Pointer to Ethernet device.
8552  *
8553  * @return
8554  *   0 on success, a negative errno value otherwise and rte_errno is set.
8555  */
8556 int
8557 mlx5_action_handle_flush(struct rte_eth_dev *dev)
8558 {
8559         struct rte_flow_error error;
8560         struct mlx5_priv *priv = dev->data->dev_private;
8561         struct mlx5_shared_action_rss *shared_rss;
8562         int ret = 0;
8563         uint32_t idx;
8564
8565         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
8566                       priv->rss_shared_actions, idx, shared_rss, next) {
8567                 ret |= mlx5_action_handle_destroy(dev,
8568                        (struct rte_flow_action_handle *)(uintptr_t)idx, &error);
8569         }
8570         return ret;
8571 }
8572
8573 #ifndef HAVE_MLX5DV_DR
8574 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1))
8575 #else
8576 #define MLX5_DOMAIN_SYNC_FLOW \
8577         (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW)
8578 #endif
8579
8580 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
8581 {
8582         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
8583         const struct mlx5_flow_driver_ops *fops;
8584         int ret;
8585         struct rte_flow_attr attr = { .transfer = 0 };
8586
8587         fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8588         ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW);
8589         if (ret > 0)
8590                 ret = -ret;
8591         return ret;
8592 }
8593
8594 const struct mlx5_flow_tunnel *
8595 mlx5_get_tof(const struct rte_flow_item *item,
8596              const struct rte_flow_action *action,
8597              enum mlx5_tof_rule_type *rule_type)
8598 {
8599         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
8600                 if (item->type == (typeof(item->type))
8601                                   MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL) {
8602                         *rule_type = MLX5_TUNNEL_OFFLOAD_MATCH_RULE;
8603                         return flow_items_to_tunnel(item);
8604                 }
8605         }
8606         for (; action->conf != RTE_FLOW_ACTION_TYPE_END; action++) {
8607                 if (action->type == (typeof(action->type))
8608                                     MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET) {
8609                         *rule_type = MLX5_TUNNEL_OFFLOAD_SET_RULE;
8610                         return flow_actions_to_tunnel(action);
8611                 }
8612         }
8613         return NULL;
8614 }
8615
8616 /**
8617  * tunnel offload functionalilty is defined for DV environment only
8618  */
8619 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8620 __extension__
8621 union tunnel_offload_mark {
8622         uint32_t val;
8623         struct {
8624                 uint32_t app_reserve:8;
8625                 uint32_t table_id:15;
8626                 uint32_t transfer:1;
8627                 uint32_t _unused_:8;
8628         };
8629 };
8630
8631 static bool
8632 mlx5_access_tunnel_offload_db
8633         (struct rte_eth_dev *dev,
8634          bool (*match)(struct rte_eth_dev *,
8635                        struct mlx5_flow_tunnel *, const void *),
8636          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
8637          void (*miss)(struct rte_eth_dev *, void *),
8638          void *ctx, bool lock_op);
8639
8640 static int
8641 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
8642                              struct rte_flow *flow,
8643                              const struct rte_flow_attr *attr,
8644                              const struct rte_flow_action *app_actions,
8645                              uint32_t flow_idx,
8646                              const struct mlx5_flow_tunnel *tunnel,
8647                              struct tunnel_default_miss_ctx *ctx,
8648                              struct rte_flow_error *error)
8649 {
8650         struct mlx5_priv *priv = dev->data->dev_private;
8651         struct mlx5_flow *dev_flow;
8652         struct rte_flow_attr miss_attr = *attr;
8653         const struct rte_flow_item miss_items[2] = {
8654                 {
8655                         .type = RTE_FLOW_ITEM_TYPE_ETH,
8656                         .spec = NULL,
8657                         .last = NULL,
8658                         .mask = NULL
8659                 },
8660                 {
8661                         .type = RTE_FLOW_ITEM_TYPE_END,
8662                         .spec = NULL,
8663                         .last = NULL,
8664                         .mask = NULL
8665                 }
8666         };
8667         union tunnel_offload_mark mark_id;
8668         struct rte_flow_action_mark miss_mark;
8669         struct rte_flow_action miss_actions[3] = {
8670                 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark },
8671                 [2] = { .type = RTE_FLOW_ACTION_TYPE_END,  .conf = NULL }
8672         };
8673         const struct rte_flow_action_jump *jump_data;
8674         uint32_t i, flow_table = 0; /* prevent compilation warning */
8675         struct flow_grp_info grp_info = {
8676                 .external = 1,
8677                 .transfer = attr->transfer,
8678                 .fdb_def_rule = !!priv->fdb_def_rule,
8679                 .std_tbl_fix = 0,
8680         };
8681         int ret;
8682
8683         if (!attr->transfer) {
8684                 uint32_t q_size;
8685
8686                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS;
8687                 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]);
8688                 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size,
8689                                          0, SOCKET_ID_ANY);
8690                 if (!ctx->queue)
8691                         return rte_flow_error_set
8692                                 (error, ENOMEM,
8693                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
8694                                 NULL, "invalid default miss RSS");
8695                 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT,
8696                 ctx->action_rss.level = 0,
8697                 ctx->action_rss.types = priv->rss_conf.rss_hf,
8698                 ctx->action_rss.key_len = priv->rss_conf.rss_key_len,
8699                 ctx->action_rss.queue_num = priv->reta_idx_n,
8700                 ctx->action_rss.key = priv->rss_conf.rss_key,
8701                 ctx->action_rss.queue = ctx->queue;
8702                 if (!priv->reta_idx_n || !priv->rxqs_n)
8703                         return rte_flow_error_set
8704                                 (error, EINVAL,
8705                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
8706                                 NULL, "invalid port configuration");
8707                 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
8708                         ctx->action_rss.types = 0;
8709                 for (i = 0; i != priv->reta_idx_n; ++i)
8710                         ctx->queue[i] = (*priv->reta_idx)[i];
8711         } else {
8712                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP;
8713                 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP;
8714         }
8715         miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw;
8716         for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++);
8717         jump_data = app_actions->conf;
8718         miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY;
8719         miss_attr.group = jump_data->group;
8720         ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group,
8721                                        &flow_table, &grp_info, error);
8722         if (ret)
8723                 return rte_flow_error_set(error, EINVAL,
8724                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
8725                                           NULL, "invalid tunnel id");
8726         mark_id.app_reserve = 0;
8727         mark_id.table_id = tunnel_flow_tbl_to_id(flow_table);
8728         mark_id.transfer = !!attr->transfer;
8729         mark_id._unused_ = 0;
8730         miss_mark.id = mark_id.val;
8731         dev_flow = flow_drv_prepare(dev, flow, &miss_attr,
8732                                     miss_items, miss_actions, flow_idx, error);
8733         if (!dev_flow)
8734                 return -rte_errno;
8735         dev_flow->flow = flow;
8736         dev_flow->external = true;
8737         dev_flow->tunnel = tunnel;
8738         dev_flow->tof_type = MLX5_TUNNEL_OFFLOAD_MISS_RULE;
8739         /* Subflow object was created, we must include one in the list. */
8740         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
8741                       dev_flow->handle, next);
8742         DRV_LOG(DEBUG,
8743                 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u",
8744                 dev->data->port_id, tunnel->app_tunnel.type,
8745                 tunnel->tunnel_id, miss_attr.priority, miss_attr.group);
8746         ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items,
8747                                   miss_actions, error);
8748         if (!ret)
8749                 ret = flow_mreg_update_copy_table(dev, flow, miss_actions,
8750                                                   error);
8751
8752         return ret;
8753 }
8754
8755 static const struct mlx5_flow_tbl_data_entry  *
8756 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark)
8757 {
8758         struct mlx5_priv *priv = dev->data->dev_private;
8759         struct mlx5_dev_ctx_shared *sh = priv->sh;
8760         struct mlx5_list_entry *he;
8761         union tunnel_offload_mark mbits = { .val = mark };
8762         union mlx5_flow_tbl_key table_key = {
8763                 {
8764                         .level = tunnel_id_to_flow_tbl(mbits.table_id),
8765                         .id = 0,
8766                         .reserved = 0,
8767                         .dummy = 0,
8768                         .is_fdb = !!mbits.transfer,
8769                         .is_egress = 0,
8770                 }
8771         };
8772         struct mlx5_flow_cb_ctx ctx = {
8773                 .data = &table_key.v64,
8774         };
8775
8776         he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, &ctx);
8777         return he ?
8778                container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL;
8779 }
8780
8781 static void
8782 mlx5_flow_tunnel_grp2tbl_remove_cb(void *tool_ctx,
8783                                    struct mlx5_list_entry *entry)
8784 {
8785         struct mlx5_dev_ctx_shared *sh = tool_ctx;
8786         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
8787
8788         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
8789                         tunnel_flow_tbl_to_id(tte->flow_table));
8790         mlx5_free(tte);
8791 }
8792
8793 static int
8794 mlx5_flow_tunnel_grp2tbl_match_cb(void *tool_ctx __rte_unused,
8795                                   struct mlx5_list_entry *entry, void *cb_ctx)
8796 {
8797         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8798         union tunnel_tbl_key tbl = {
8799                 .val = *(uint64_t *)(ctx->data),
8800         };
8801         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
8802
8803         return tbl.tunnel_id != tte->tunnel_id || tbl.group != tte->group;
8804 }
8805
8806 static struct mlx5_list_entry *
8807 mlx5_flow_tunnel_grp2tbl_create_cb(void *tool_ctx, void *cb_ctx)
8808 {
8809         struct mlx5_dev_ctx_shared *sh = tool_ctx;
8810         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8811         struct tunnel_tbl_entry *tte;
8812         union tunnel_tbl_key tbl = {
8813                 .val = *(uint64_t *)(ctx->data),
8814         };
8815
8816         tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
8817                           sizeof(*tte), 0,
8818                           SOCKET_ID_ANY);
8819         if (!tte)
8820                 goto err;
8821         mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
8822                           &tte->flow_table);
8823         if (tte->flow_table >= MLX5_MAX_TABLES) {
8824                 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.",
8825                         tte->flow_table);
8826                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
8827                                 tte->flow_table);
8828                 goto err;
8829         } else if (!tte->flow_table) {
8830                 goto err;
8831         }
8832         tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table);
8833         tte->tunnel_id = tbl.tunnel_id;
8834         tte->group = tbl.group;
8835         return &tte->hash;
8836 err:
8837         if (tte)
8838                 mlx5_free(tte);
8839         return NULL;
8840 }
8841
8842 static struct mlx5_list_entry *
8843 mlx5_flow_tunnel_grp2tbl_clone_cb(void *tool_ctx __rte_unused,
8844                                   struct mlx5_list_entry *oentry,
8845                                   void *cb_ctx __rte_unused)
8846 {
8847         struct tunnel_tbl_entry *tte = mlx5_malloc(MLX5_MEM_SYS, sizeof(*tte),
8848                                                    0, SOCKET_ID_ANY);
8849
8850         if (!tte)
8851                 return NULL;
8852         memcpy(tte, oentry, sizeof(*tte));
8853         return &tte->hash;
8854 }
8855
8856 static void
8857 mlx5_flow_tunnel_grp2tbl_clone_free_cb(void *tool_ctx __rte_unused,
8858                                        struct mlx5_list_entry *entry)
8859 {
8860         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
8861
8862         mlx5_free(tte);
8863 }
8864
8865 static uint32_t
8866 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
8867                                 const struct mlx5_flow_tunnel *tunnel,
8868                                 uint32_t group, uint32_t *table,
8869                                 struct rte_flow_error *error)
8870 {
8871         struct mlx5_list_entry *he;
8872         struct tunnel_tbl_entry *tte;
8873         union tunnel_tbl_key key = {
8874                 .tunnel_id = tunnel ? tunnel->tunnel_id : 0,
8875                 .group = group
8876         };
8877         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8878         struct mlx5_hlist *group_hash;
8879         struct mlx5_flow_cb_ctx ctx = {
8880                 .data = &key.val,
8881         };
8882
8883         group_hash = tunnel ? tunnel->groups : thub->groups;
8884         he = mlx5_hlist_register(group_hash, key.val, &ctx);
8885         if (!he)
8886                 return rte_flow_error_set(error, EINVAL,
8887                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
8888                                           NULL,
8889                                           "tunnel group index not supported");
8890         tte = container_of(he, typeof(*tte), hash);
8891         *table = tte->flow_table;
8892         DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x",
8893                 dev->data->port_id, key.tunnel_id, group, *table);
8894         return 0;
8895 }
8896
8897 static void
8898 mlx5_flow_tunnel_free(struct rte_eth_dev *dev,
8899                       struct mlx5_flow_tunnel *tunnel)
8900 {
8901         struct mlx5_priv *priv = dev->data->dev_private;
8902         struct mlx5_indexed_pool *ipool;
8903
8904         DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x",
8905                 dev->data->port_id, tunnel->tunnel_id);
8906         LIST_REMOVE(tunnel, chain);
8907         mlx5_hlist_destroy(tunnel->groups);
8908         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
8909         mlx5_ipool_free(ipool, tunnel->tunnel_id);
8910 }
8911
8912 static bool
8913 mlx5_access_tunnel_offload_db
8914         (struct rte_eth_dev *dev,
8915          bool (*match)(struct rte_eth_dev *,
8916                        struct mlx5_flow_tunnel *, const void *),
8917          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
8918          void (*miss)(struct rte_eth_dev *, void *),
8919          void *ctx, bool lock_op)
8920 {
8921         bool verdict = false;
8922         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8923         struct mlx5_flow_tunnel *tunnel;
8924
8925         rte_spinlock_lock(&thub->sl);
8926         LIST_FOREACH(tunnel, &thub->tunnels, chain) {
8927                 verdict = match(dev, tunnel, (const void *)ctx);
8928                 if (verdict)
8929                         break;
8930         }
8931         if (!lock_op)
8932                 rte_spinlock_unlock(&thub->sl);
8933         if (verdict && hit)
8934                 hit(dev, tunnel, ctx);
8935         if (!verdict && miss)
8936                 miss(dev, ctx);
8937         if (lock_op)
8938                 rte_spinlock_unlock(&thub->sl);
8939
8940         return verdict;
8941 }
8942
8943 struct tunnel_db_find_tunnel_id_ctx {
8944         uint32_t tunnel_id;
8945         struct mlx5_flow_tunnel *tunnel;
8946 };
8947
8948 static bool
8949 find_tunnel_id_match(struct rte_eth_dev *dev,
8950                      struct mlx5_flow_tunnel *tunnel, const void *x)
8951 {
8952         const struct tunnel_db_find_tunnel_id_ctx *ctx = x;
8953
8954         RTE_SET_USED(dev);
8955         return tunnel->tunnel_id == ctx->tunnel_id;
8956 }
8957
8958 static void
8959 find_tunnel_id_hit(struct rte_eth_dev *dev,
8960                    struct mlx5_flow_tunnel *tunnel, void *x)
8961 {
8962         struct tunnel_db_find_tunnel_id_ctx *ctx = x;
8963         RTE_SET_USED(dev);
8964         ctx->tunnel = tunnel;
8965 }
8966
8967 static struct mlx5_flow_tunnel *
8968 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id)
8969 {
8970         struct tunnel_db_find_tunnel_id_ctx ctx = {
8971                 .tunnel_id = id,
8972         };
8973
8974         mlx5_access_tunnel_offload_db(dev, find_tunnel_id_match,
8975                                       find_tunnel_id_hit, NULL, &ctx, true);
8976
8977         return ctx.tunnel;
8978 }
8979
8980 static struct mlx5_flow_tunnel *
8981 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev,
8982                           const struct rte_flow_tunnel *app_tunnel)
8983 {
8984         struct mlx5_priv *priv = dev->data->dev_private;
8985         struct mlx5_indexed_pool *ipool;
8986         struct mlx5_flow_tunnel *tunnel;
8987         uint32_t id;
8988
8989         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
8990         tunnel = mlx5_ipool_zmalloc(ipool, &id);
8991         if (!tunnel)
8992                 return NULL;
8993         if (id >= MLX5_MAX_TUNNELS) {
8994                 mlx5_ipool_free(ipool, id);
8995                 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id);
8996                 return NULL;
8997         }
8998         tunnel->groups = mlx5_hlist_create("tunnel groups", 64, false, true,
8999                                            priv->sh,
9000                                            mlx5_flow_tunnel_grp2tbl_create_cb,
9001                                            mlx5_flow_tunnel_grp2tbl_match_cb,
9002                                            mlx5_flow_tunnel_grp2tbl_remove_cb,
9003                                            mlx5_flow_tunnel_grp2tbl_clone_cb,
9004                                         mlx5_flow_tunnel_grp2tbl_clone_free_cb);
9005         if (!tunnel->groups) {
9006                 mlx5_ipool_free(ipool, id);
9007                 return NULL;
9008         }
9009         /* initiate new PMD tunnel */
9010         memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel));
9011         tunnel->tunnel_id = id;
9012         tunnel->action.type = (typeof(tunnel->action.type))
9013                               MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET;
9014         tunnel->action.conf = tunnel;
9015         tunnel->item.type = (typeof(tunnel->item.type))
9016                             MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL;
9017         tunnel->item.spec = tunnel;
9018         tunnel->item.last = NULL;
9019         tunnel->item.mask = NULL;
9020
9021         DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x",
9022                 dev->data->port_id, tunnel->tunnel_id);
9023
9024         return tunnel;
9025 }
9026
9027 struct tunnel_db_get_tunnel_ctx {
9028         const struct rte_flow_tunnel *app_tunnel;
9029         struct mlx5_flow_tunnel *tunnel;
9030 };
9031
9032 static bool get_tunnel_match(struct rte_eth_dev *dev,
9033                              struct mlx5_flow_tunnel *tunnel, const void *x)
9034 {
9035         const struct tunnel_db_get_tunnel_ctx *ctx = x;
9036
9037         RTE_SET_USED(dev);
9038         return !memcmp(ctx->app_tunnel, &tunnel->app_tunnel,
9039                        sizeof(*ctx->app_tunnel));
9040 }
9041
9042 static void get_tunnel_hit(struct rte_eth_dev *dev,
9043                            struct mlx5_flow_tunnel *tunnel, void *x)
9044 {
9045         /* called under tunnel spinlock protection */
9046         struct tunnel_db_get_tunnel_ctx *ctx = x;
9047
9048         RTE_SET_USED(dev);
9049         tunnel->refctn++;
9050         ctx->tunnel = tunnel;
9051 }
9052
9053 static void get_tunnel_miss(struct rte_eth_dev *dev, void *x)
9054 {
9055         /* called under tunnel spinlock protection */
9056         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
9057         struct tunnel_db_get_tunnel_ctx *ctx = x;
9058
9059         rte_spinlock_unlock(&thub->sl);
9060         ctx->tunnel = mlx5_flow_tunnel_allocate(dev, ctx->app_tunnel);
9061         rte_spinlock_lock(&thub->sl);
9062         if (ctx->tunnel) {
9063                 ctx->tunnel->refctn = 1;
9064                 LIST_INSERT_HEAD(&thub->tunnels, ctx->tunnel, chain);
9065         }
9066 }
9067
9068
9069 static int
9070 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
9071                      const struct rte_flow_tunnel *app_tunnel,
9072                      struct mlx5_flow_tunnel **tunnel)
9073 {
9074         struct tunnel_db_get_tunnel_ctx ctx = {
9075                 .app_tunnel = app_tunnel,
9076         };
9077
9078         mlx5_access_tunnel_offload_db(dev, get_tunnel_match, get_tunnel_hit,
9079                                       get_tunnel_miss, &ctx, true);
9080         *tunnel = ctx.tunnel;
9081         return ctx.tunnel ? 0 : -ENOMEM;
9082 }
9083
9084 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id)
9085 {
9086         struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
9087
9088         if (!thub)
9089                 return;
9090         if (!LIST_EMPTY(&thub->tunnels))
9091                 DRV_LOG(WARNING, "port %u tunnels present", port_id);
9092         mlx5_hlist_destroy(thub->groups);
9093         mlx5_free(thub);
9094 }
9095
9096 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh)
9097 {
9098         int err;
9099         struct mlx5_flow_tunnel_hub *thub;
9100
9101         thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub),
9102                            0, SOCKET_ID_ANY);
9103         if (!thub)
9104                 return -ENOMEM;
9105         LIST_INIT(&thub->tunnels);
9106         rte_spinlock_init(&thub->sl);
9107         thub->groups = mlx5_hlist_create("flow groups", 64,
9108                                          false, true, sh,
9109                                          mlx5_flow_tunnel_grp2tbl_create_cb,
9110                                          mlx5_flow_tunnel_grp2tbl_match_cb,
9111                                          mlx5_flow_tunnel_grp2tbl_remove_cb,
9112                                          mlx5_flow_tunnel_grp2tbl_clone_cb,
9113                                         mlx5_flow_tunnel_grp2tbl_clone_free_cb);
9114         if (!thub->groups) {
9115                 err = -rte_errno;
9116                 goto err;
9117         }
9118         sh->tunnel_hub = thub;
9119
9120         return 0;
9121
9122 err:
9123         if (thub->groups)
9124                 mlx5_hlist_destroy(thub->groups);
9125         if (thub)
9126                 mlx5_free(thub);
9127         return err;
9128 }
9129
9130 static inline bool
9131 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev,
9132                           struct rte_flow_tunnel *tunnel,
9133                           const char *err_msg)
9134 {
9135         err_msg = NULL;
9136         if (!is_tunnel_offload_active(dev)) {
9137                 err_msg = "tunnel offload was not activated";
9138                 goto out;
9139         } else if (!tunnel) {
9140                 err_msg = "no application tunnel";
9141                 goto out;
9142         }
9143
9144         switch (tunnel->type) {
9145         default:
9146                 err_msg = "unsupported tunnel type";
9147                 goto out;
9148         case RTE_FLOW_ITEM_TYPE_VXLAN:
9149         case RTE_FLOW_ITEM_TYPE_GRE:
9150         case RTE_FLOW_ITEM_TYPE_NVGRE:
9151         case RTE_FLOW_ITEM_TYPE_GENEVE:
9152                 break;
9153         }
9154
9155 out:
9156         return !err_msg;
9157 }
9158
9159 static int
9160 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
9161                     struct rte_flow_tunnel *app_tunnel,
9162                     struct rte_flow_action **actions,
9163                     uint32_t *num_of_actions,
9164                     struct rte_flow_error *error)
9165 {
9166         int ret;
9167         struct mlx5_flow_tunnel *tunnel;
9168         const char *err_msg = NULL;
9169         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
9170
9171         if (!verdict)
9172                 return rte_flow_error_set(error, EINVAL,
9173                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
9174                                           err_msg);
9175         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
9176         if (ret < 0) {
9177                 return rte_flow_error_set(error, ret,
9178                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
9179                                           "failed to initialize pmd tunnel");
9180         }
9181         *actions = &tunnel->action;
9182         *num_of_actions = 1;
9183         return 0;
9184 }
9185
9186 static int
9187 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
9188                        struct rte_flow_tunnel *app_tunnel,
9189                        struct rte_flow_item **items,
9190                        uint32_t *num_of_items,
9191                        struct rte_flow_error *error)
9192 {
9193         int ret;
9194         struct mlx5_flow_tunnel *tunnel;
9195         const char *err_msg = NULL;
9196         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
9197
9198         if (!verdict)
9199                 return rte_flow_error_set(error, EINVAL,
9200                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
9201                                           err_msg);
9202         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
9203         if (ret < 0) {
9204                 return rte_flow_error_set(error, ret,
9205                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
9206                                           "failed to initialize pmd tunnel");
9207         }
9208         *items = &tunnel->item;
9209         *num_of_items = 1;
9210         return 0;
9211 }
9212
9213 struct tunnel_db_element_release_ctx {
9214         struct rte_flow_item *items;
9215         struct rte_flow_action *actions;
9216         uint32_t num_elements;
9217         struct rte_flow_error *error;
9218         int ret;
9219 };
9220
9221 static bool
9222 tunnel_element_release_match(struct rte_eth_dev *dev,
9223                              struct mlx5_flow_tunnel *tunnel, const void *x)
9224 {
9225         const struct tunnel_db_element_release_ctx *ctx = x;
9226
9227         RTE_SET_USED(dev);
9228         if (ctx->num_elements != 1)
9229                 return false;
9230         else if (ctx->items)
9231                 return ctx->items == &tunnel->item;
9232         else if (ctx->actions)
9233                 return ctx->actions == &tunnel->action;
9234
9235         return false;
9236 }
9237
9238 static void
9239 tunnel_element_release_hit(struct rte_eth_dev *dev,
9240                            struct mlx5_flow_tunnel *tunnel, void *x)
9241 {
9242         struct tunnel_db_element_release_ctx *ctx = x;
9243         ctx->ret = 0;
9244         if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
9245                 mlx5_flow_tunnel_free(dev, tunnel);
9246 }
9247
9248 static void
9249 tunnel_element_release_miss(struct rte_eth_dev *dev, void *x)
9250 {
9251         struct tunnel_db_element_release_ctx *ctx = x;
9252         RTE_SET_USED(dev);
9253         ctx->ret = rte_flow_error_set(ctx->error, EINVAL,
9254                                       RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
9255                                       "invalid argument");
9256 }
9257
9258 static int
9259 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
9260                        struct rte_flow_item *pmd_items,
9261                        uint32_t num_items, struct rte_flow_error *err)
9262 {
9263         struct tunnel_db_element_release_ctx ctx = {
9264                 .items = pmd_items,
9265                 .actions = NULL,
9266                 .num_elements = num_items,
9267                 .error = err,
9268         };
9269
9270         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
9271                                       tunnel_element_release_hit,
9272                                       tunnel_element_release_miss, &ctx, false);
9273
9274         return ctx.ret;
9275 }
9276
9277 static int
9278 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
9279                          struct rte_flow_action *pmd_actions,
9280                          uint32_t num_actions, struct rte_flow_error *err)
9281 {
9282         struct tunnel_db_element_release_ctx ctx = {
9283                 .items = NULL,
9284                 .actions = pmd_actions,
9285                 .num_elements = num_actions,
9286                 .error = err,
9287         };
9288
9289         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
9290                                       tunnel_element_release_hit,
9291                                       tunnel_element_release_miss, &ctx, false);
9292
9293         return ctx.ret;
9294 }
9295
9296 static int
9297 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
9298                                   struct rte_mbuf *m,
9299                                   struct rte_flow_restore_info *info,
9300                                   struct rte_flow_error *err)
9301 {
9302         uint64_t ol_flags = m->ol_flags;
9303         const struct mlx5_flow_tbl_data_entry *tble;
9304         const uint64_t mask = PKT_RX_FDIR | PKT_RX_FDIR_ID;
9305
9306         if (!is_tunnel_offload_active(dev)) {
9307                 info->flags = 0;
9308                 return 0;
9309         }
9310
9311         if ((ol_flags & mask) != mask)
9312                 goto err;
9313         tble = tunnel_mark_decode(dev, m->hash.fdir.hi);
9314         if (!tble) {
9315                 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x",
9316                         dev->data->port_id, m->hash.fdir.hi);
9317                 goto err;
9318         }
9319         MLX5_ASSERT(tble->tunnel);
9320         memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel));
9321         info->group_id = tble->group_id;
9322         info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL |
9323                       RTE_FLOW_RESTORE_INFO_GROUP_ID |
9324                       RTE_FLOW_RESTORE_INFO_ENCAPSULATED;
9325
9326         return 0;
9327
9328 err:
9329         return rte_flow_error_set(err, EINVAL,
9330                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9331                                   "failed to get restore info");
9332 }
9333
9334 #else /* HAVE_IBV_FLOW_DV_SUPPORT */
9335 static int
9336 mlx5_flow_tunnel_decap_set(__rte_unused struct rte_eth_dev *dev,
9337                            __rte_unused struct rte_flow_tunnel *app_tunnel,
9338                            __rte_unused struct rte_flow_action **actions,
9339                            __rte_unused uint32_t *num_of_actions,
9340                            __rte_unused struct rte_flow_error *error)
9341 {
9342         return -ENOTSUP;
9343 }
9344
9345 static int
9346 mlx5_flow_tunnel_match(__rte_unused struct rte_eth_dev *dev,
9347                        __rte_unused struct rte_flow_tunnel *app_tunnel,
9348                        __rte_unused struct rte_flow_item **items,
9349                        __rte_unused uint32_t *num_of_items,
9350                        __rte_unused struct rte_flow_error *error)
9351 {
9352         return -ENOTSUP;
9353 }
9354
9355 static int
9356 mlx5_flow_tunnel_item_release(__rte_unused struct rte_eth_dev *dev,
9357                               __rte_unused struct rte_flow_item *pmd_items,
9358                               __rte_unused uint32_t num_items,
9359                               __rte_unused struct rte_flow_error *err)
9360 {
9361         return -ENOTSUP;
9362 }
9363
9364 static int
9365 mlx5_flow_tunnel_action_release(__rte_unused struct rte_eth_dev *dev,
9366                                 __rte_unused struct rte_flow_action *pmd_action,
9367                                 __rte_unused uint32_t num_actions,
9368                                 __rte_unused struct rte_flow_error *err)
9369 {
9370         return -ENOTSUP;
9371 }
9372
9373 static int
9374 mlx5_flow_tunnel_get_restore_info(__rte_unused struct rte_eth_dev *dev,
9375                                   __rte_unused struct rte_mbuf *m,
9376                                   __rte_unused struct rte_flow_restore_info *i,
9377                                   __rte_unused struct rte_flow_error *err)
9378 {
9379         return -ENOTSUP;
9380 }
9381
9382 static int
9383 flow_tunnel_add_default_miss(__rte_unused struct rte_eth_dev *dev,
9384                              __rte_unused struct rte_flow *flow,
9385                              __rte_unused const struct rte_flow_attr *attr,
9386                              __rte_unused const struct rte_flow_action *actions,
9387                              __rte_unused uint32_t flow_idx,
9388                              __rte_unused const struct mlx5_flow_tunnel *tunnel,
9389                              __rte_unused struct tunnel_default_miss_ctx *ctx,
9390                              __rte_unused struct rte_flow_error *error)
9391 {
9392         return -ENOTSUP;
9393 }
9394
9395 static struct mlx5_flow_tunnel *
9396 mlx5_find_tunnel_id(__rte_unused struct rte_eth_dev *dev,
9397                     __rte_unused uint32_t id)
9398 {
9399         return NULL;
9400 }
9401
9402 static void
9403 mlx5_flow_tunnel_free(__rte_unused struct rte_eth_dev *dev,
9404                       __rte_unused struct mlx5_flow_tunnel *tunnel)
9405 {
9406 }
9407
9408 static uint32_t
9409 tunnel_flow_group_to_flow_table(__rte_unused struct rte_eth_dev *dev,
9410                                 __rte_unused const struct mlx5_flow_tunnel *t,
9411                                 __rte_unused uint32_t group,
9412                                 __rte_unused uint32_t *table,
9413                                 struct rte_flow_error *error)
9414 {
9415         return rte_flow_error_set(error, ENOTSUP,
9416                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9417                                   "tunnel offload requires DV support");
9418 }
9419
9420 void
9421 mlx5_release_tunnel_hub(__rte_unused struct mlx5_dev_ctx_shared *sh,
9422                         __rte_unused  uint16_t port_id)
9423 {
9424 }
9425 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
9426
9427 static void
9428 mlx5_dbg__print_pattern(const struct rte_flow_item *item)
9429 {
9430         int ret;
9431         struct rte_flow_error error;
9432
9433         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
9434                 char *item_name;
9435                 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ITEM_NAME_PTR, &item_name,
9436                                     sizeof(item_name),
9437                                     (void *)(uintptr_t)item->type, &error);
9438                 if (ret > 0)
9439                         printf("%s ", item_name);
9440                 else
9441                         printf("%d\n", (int)item->type);
9442         }
9443         printf("END\n");
9444 }
9445
9446 static int
9447 mlx5_flow_is_std_vxlan_port(const struct rte_flow_item *udp_item)
9448 {
9449         const struct rte_flow_item_udp *spec = udp_item->spec;
9450         const struct rte_flow_item_udp *mask = udp_item->mask;
9451         uint16_t udp_dport = 0;
9452
9453         if (spec != NULL) {
9454                 if (!mask)
9455                         mask = &rte_flow_item_udp_mask;
9456                 udp_dport = rte_be_to_cpu_16(spec->hdr.dst_port &
9457                                 mask->hdr.dst_port);
9458         }
9459         return (!udp_dport || udp_dport == MLX5_UDP_PORT_VXLAN);
9460 }
9461
9462 static const struct mlx5_flow_expand_node *
9463 mlx5_flow_expand_rss_adjust_node(const struct rte_flow_item *pattern,
9464                 unsigned int item_idx,
9465                 const struct mlx5_flow_expand_node graph[],
9466                 const struct mlx5_flow_expand_node *node)
9467 {
9468         const struct rte_flow_item *item = pattern + item_idx, *prev_item;
9469         switch (item->type) {
9470         case RTE_FLOW_ITEM_TYPE_VXLAN:
9471                 MLX5_ASSERT(item_idx > 0);
9472                 prev_item = pattern + item_idx - 1;
9473                 MLX5_ASSERT(prev_item->type == RTE_FLOW_ITEM_TYPE_UDP);
9474                 if (mlx5_flow_is_std_vxlan_port(prev_item))
9475                         return &graph[MLX5_EXPANSION_STD_VXLAN];
9476                 else
9477                         return &graph[MLX5_EXPANSION_L3_VXLAN];
9478                 break;
9479         default:
9480                 return node;
9481         }
9482 }