drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29
  30 #include "mlx5.h"
  31 #include "mlx5_defs.h"
  32 #include "mlx5_glue.h"
  33 #include "mlx5_flow.h"
  34 #include "mlx5_prm.h"
  35 #include "mlx5_rxtx.h"
  36
  37 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  38
  39 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  40 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  41 #endif
  42
  43 #ifndef HAVE_MLX5DV_DR_ESWITCH
  44 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  45 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  46 #endif
  47 #endif
  48
  49 #ifndef HAVE_MLX5DV_DR
  50 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  51 #endif
  52
  53 union flow_dv_attr {
  54         struct {
  55                 uint32_t valid:1;
  56                 uint32_t ipv4:1;
  57                 uint32_t ipv6:1;
  58                 uint32_t tcp:1;
  59                 uint32_t udp:1;
  60                 uint32_t reserved:27;
  61         };
  62         uint32_t attr;
  63 };
  64
  65 /**
  66  * Initialize flow attributes structure according to flow items' types.
  67  *
  68  * @param[in] item
  69  *   Pointer to item specification.
  70  * @param[out] attr
  71  *   Pointer to flow attributes structure.
  72  */
  73 static void
  74 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr)
  75 {
  76         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
  77                 switch (item->type) {
  78                 case RTE_FLOW_ITEM_TYPE_IPV4:
  79                         attr->ipv4 = 1;
  80                         break;
  81                 case RTE_FLOW_ITEM_TYPE_IPV6:
  82                         attr->ipv6 = 1;
  83                         break;
  84                 case RTE_FLOW_ITEM_TYPE_UDP:
  85                         attr->udp = 1;
  86                         break;
  87                 case RTE_FLOW_ITEM_TYPE_TCP:
  88                         attr->tcp = 1;
  89                         break;
  90                 default:
  91                         break;
  92                 }
  93         }
  94         attr->valid = 1;
  95 }
  96
  97 struct field_modify_info {
  98         uint32_t size; /* Size of field in protocol header, in bytes. */
  99         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 100         enum mlx5_modification_field id;
 101 };
 102
 103 struct field_modify_info modify_eth[] = {
 104         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 105         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 106         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 107         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 108         {0, 0, 0},
 109 };
 110
 111 struct field_modify_info modify_ipv4[] = {
 112         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 113         {4, 12, MLX5_MODI_OUT_SIPV4},
 114         {4, 16, MLX5_MODI_OUT_DIPV4},
 115         {0, 0, 0},
 116 };
 117
 118 struct field_modify_info modify_ipv6[] = {
 119         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 120         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 121         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 122         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 123         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 124         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 125         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 126         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 127         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 128         {0, 0, 0},
 129 };
 130
 131 struct field_modify_info modify_udp[] = {
 132         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 133         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 134         {0, 0, 0},
 135 };
 136
 137 struct field_modify_info modify_tcp[] = {
 138         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 139         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 140         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 141         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 142         {0, 0, 0},
 143 };
 144
 145 static void
 146 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item, uint64_t *flags)
 147 {
 148         uint8_t next_protocol = 0xFF;
 149
 150         if (item->mask != NULL) {
 151                 switch (item->type) {
 152                 case RTE_FLOW_ITEM_TYPE_IPV4:
 153                         next_protocol =
 154                                 ((const struct rte_flow_item_ipv4 *)
 155                                  (item->spec))->hdr.next_proto_id;
 156                         next_protocol &=
 157                                 ((const struct rte_flow_item_ipv4 *)
 158                                  (item->mask))->hdr.next_proto_id;
 159                         break;
 160                 case RTE_FLOW_ITEM_TYPE_IPV6:
 161                         next_protocol =
 162                                 ((const struct rte_flow_item_ipv6 *)
 163                                  (item->spec))->hdr.proto;
 164                         next_protocol &=
 165                                 ((const struct rte_flow_item_ipv6 *)
 166                                  (item->mask))->hdr.proto;
 167                         break;
 168                 default:
 169                         break;
 170                 }
 171         }
 172         if (next_protocol == IPPROTO_IPIP)
 173                 *flags |= MLX5_FLOW_LAYER_IPIP;
 174         if (next_protocol == IPPROTO_IPV6)
 175                 *flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 176 }
 177
 178 /**
 179  * Acquire the synchronizing object to protect multithreaded access
 180  * to shared dv context. Lock occurs only if context is actually
 181  * shared, i.e. we have multiport IB device and representors are
 182  * created.
 183  *
 184  * @param[in] dev
 185  *   Pointer to the rte_eth_dev structure.
 186  */
 187 static void
 188 flow_d_shared_lock(struct rte_eth_dev *dev)
 189 {
 190         struct mlx5_priv *priv = dev->data->dev_private;
 191         struct mlx5_ibv_shared *sh = priv->sh;
 192
 193         if (sh->dv_refcnt > 1) {
 194                 int ret;
 195
 196                 ret = pthread_mutex_lock(&sh->dv_mutex);
 197                 assert(!ret);
 198                 (void)ret;
 199         }
 200 }
 201
 202 static void
 203 flow_d_shared_unlock(struct rte_eth_dev *dev)
 204 {
 205         struct mlx5_priv *priv = dev->data->dev_private;
 206         struct mlx5_ibv_shared *sh = priv->sh;
 207
 208         if (sh->dv_refcnt > 1) {
 209                 int ret;
 210
 211                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 212                 assert(!ret);
 213                 (void)ret;
 214         }
 215 }
 216
 217 /**
 218  * Convert modify-header action to DV specification.
 219  *
 220  * @param[in] item
 221  *   Pointer to item specification.
 222  * @param[in] field
 223  *   Pointer to field modification information.
 224  * @param[in,out] resource
 225  *   Pointer to the modify-header resource.
 226  * @param[in] type
 227  *   Type of modification.
 228  * @param[out] error
 229  *   Pointer to the error structure.
 230  *
 231  * @return
 232  *   0 on success, a negative errno value otherwise and rte_errno is set.
 233  */
 234 static int
 235 flow_dv_convert_modify_action(struct rte_flow_item *item,
 236                               struct field_modify_info *field,
 237                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 238                               uint32_t type,
 239                               struct rte_flow_error *error)
 240 {
 241         uint32_t i = resource->actions_num;
 242         struct mlx5_modification_cmd *actions = resource->actions;
 243         const uint8_t *spec = item->spec;
 244         const uint8_t *mask = item->mask;
 245         uint32_t set;
 246
 247         while (field->size) {
 248                 set = 0;
 249                 /* Generate modify command for each mask segment. */
 250                 memcpy(&set, &mask[field->offset], field->size);
 251                 if (set) {
 252                         if (i >= MLX5_MODIFY_NUM)
 253                                 return rte_flow_error_set(error, EINVAL,
 254                                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 255                                          "too many items to modify");
 256                         actions[i].action_type = type;
 257                         actions[i].field = field->id;
 258                         actions[i].length = field->size ==
 259                                         4 ? 0 : field->size * 8;
 260                         rte_memcpy(&actions[i].data[4 - field->size],
 261                                    &spec[field->offset], field->size);
 262                         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 263                         ++i;
 264                 }
 265                 if (resource->actions_num != i)
 266                         resource->actions_num = i;
 267                 field++;
 268         }
 269         if (!resource->actions_num)
 270                 return rte_flow_error_set(error, EINVAL,
 271                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 272                                           "invalid modification flow item");
 273         return 0;
 274 }
 275
 276 /**
 277  * Convert modify-header set IPv4 address action to DV specification.
 278  *
 279  * @param[in,out] resource
 280  *   Pointer to the modify-header resource.
 281  * @param[in] action
 282  *   Pointer to action specification.
 283  * @param[out] error
 284  *   Pointer to the error structure.
 285  *
 286  * @return
 287  *   0 on success, a negative errno value otherwise and rte_errno is set.
 288  */
 289 static int
 290 flow_dv_convert_action_modify_ipv4
 291                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 292                          const struct rte_flow_action *action,
 293                          struct rte_flow_error *error)
 294 {
 295         const struct rte_flow_action_set_ipv4 *conf =
 296                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 297         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 298         struct rte_flow_item_ipv4 ipv4;
 299         struct rte_flow_item_ipv4 ipv4_mask;
 300
 301         memset(&ipv4, 0, sizeof(ipv4));
 302         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 303         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 304                 ipv4.hdr.src_addr = conf->ipv4_addr;
 305                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 306         } else {
 307                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 308                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 309         }
 310         item.spec = &ipv4;
 311         item.mask = &ipv4_mask;
 312         return flow_dv_convert_modify_action(&item, modify_ipv4, resource,
 313                                              MLX5_MODIFICATION_TYPE_SET, error);
 314 }
 315
 316 /**
 317  * Convert modify-header set IPv6 address action to DV specification.
 318  *
 319  * @param[in,out] resource
 320  *   Pointer to the modify-header resource.
 321  * @param[in] action
 322  *   Pointer to action specification.
 323  * @param[out] error
 324  *   Pointer to the error structure.
 325  *
 326  * @return
 327  *   0 on success, a negative errno value otherwise and rte_errno is set.
 328  */
 329 static int
 330 flow_dv_convert_action_modify_ipv6
 331                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 332                          const struct rte_flow_action *action,
 333                          struct rte_flow_error *error)
 334 {
 335         const struct rte_flow_action_set_ipv6 *conf =
 336                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 337         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 338         struct rte_flow_item_ipv6 ipv6;
 339         struct rte_flow_item_ipv6 ipv6_mask;
 340
 341         memset(&ipv6, 0, sizeof(ipv6));
 342         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 343         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 344                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 345                        sizeof(ipv6.hdr.src_addr));
 346                 memcpy(&ipv6_mask.hdr.src_addr,
 347                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 348                        sizeof(ipv6.hdr.src_addr));
 349         } else {
 350                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 351                        sizeof(ipv6.hdr.dst_addr));
 352                 memcpy(&ipv6_mask.hdr.dst_addr,
 353                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 354                        sizeof(ipv6.hdr.dst_addr));
 355         }
 356         item.spec = &ipv6;
 357         item.mask = &ipv6_mask;
 358         return flow_dv_convert_modify_action(&item, modify_ipv6, resource,
 359                                              MLX5_MODIFICATION_TYPE_SET, error);
 360 }
 361
 362 /**
 363  * Convert modify-header set MAC address action to DV specification.
 364  *
 365  * @param[in,out] resource
 366  *   Pointer to the modify-header resource.
 367  * @param[in] action
 368  *   Pointer to action specification.
 369  * @param[out] error
 370  *   Pointer to the error structure.
 371  *
 372  * @return
 373  *   0 on success, a negative errno value otherwise and rte_errno is set.
 374  */
 375 static int
 376 flow_dv_convert_action_modify_mac
 377                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 378                          const struct rte_flow_action *action,
 379                          struct rte_flow_error *error)
 380 {
 381         const struct rte_flow_action_set_mac *conf =
 382                 (const struct rte_flow_action_set_mac *)(action->conf);
 383         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 384         struct rte_flow_item_eth eth;
 385         struct rte_flow_item_eth eth_mask;
 386
 387         memset(&eth, 0, sizeof(eth));
 388         memset(&eth_mask, 0, sizeof(eth_mask));
 389         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 390                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 391                        sizeof(eth.src.addr_bytes));
 392                 memcpy(&eth_mask.src.addr_bytes,
 393                        &rte_flow_item_eth_mask.src.addr_bytes,
 394                        sizeof(eth_mask.src.addr_bytes));
 395         } else {
 396                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 397                        sizeof(eth.dst.addr_bytes));
 398                 memcpy(&eth_mask.dst.addr_bytes,
 399                        &rte_flow_item_eth_mask.dst.addr_bytes,
 400                        sizeof(eth_mask.dst.addr_bytes));
 401         }
 402         item.spec = &eth;
 403         item.mask = &eth_mask;
 404         return flow_dv_convert_modify_action(&item, modify_eth, resource,
 405                                              MLX5_MODIFICATION_TYPE_SET, error);
 406 }
 407
 408 /**
 409  * Convert modify-header set TP action to DV specification.
 410  *
 411  * @param[in,out] resource
 412  *   Pointer to the modify-header resource.
 413  * @param[in] action
 414  *   Pointer to action specification.
 415  * @param[in] items
 416  *   Pointer to rte_flow_item objects list.
 417  * @param[in] attr
 418  *   Pointer to flow attributes structure.
 419  * @param[out] error
 420  *   Pointer to the error structure.
 421  *
 422  * @return
 423  *   0 on success, a negative errno value otherwise and rte_errno is set.
 424  */
 425 static int
 426 flow_dv_convert_action_modify_tp
 427                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 428                          const struct rte_flow_action *action,
 429                          const struct rte_flow_item *items,
 430                          union flow_dv_attr *attr,
 431                          struct rte_flow_error *error)
 432 {
 433         const struct rte_flow_action_set_tp *conf =
 434                 (const struct rte_flow_action_set_tp *)(action->conf);
 435         struct rte_flow_item item;
 436         struct rte_flow_item_udp udp;
 437         struct rte_flow_item_udp udp_mask;
 438         struct rte_flow_item_tcp tcp;
 439         struct rte_flow_item_tcp tcp_mask;
 440         struct field_modify_info *field;
 441
 442         if (!attr->valid)
 443                 flow_dv_attr_init(items, attr);
 444         if (attr->udp) {
 445                 memset(&udp, 0, sizeof(udp));
 446                 memset(&udp_mask, 0, sizeof(udp_mask));
 447                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 448                         udp.hdr.src_port = conf->port;
 449                         udp_mask.hdr.src_port =
 450                                         rte_flow_item_udp_mask.hdr.src_port;
 451                 } else {
 452                         udp.hdr.dst_port = conf->port;
 453                         udp_mask.hdr.dst_port =
 454                                         rte_flow_item_udp_mask.hdr.dst_port;
 455                 }
 456                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 457                 item.spec = &udp;
 458                 item.mask = &udp_mask;
 459                 field = modify_udp;
 460         }
 461         if (attr->tcp) {
 462                 memset(&tcp, 0, sizeof(tcp));
 463                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 464                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 465                         tcp.hdr.src_port = conf->port;
 466                         tcp_mask.hdr.src_port =
 467                                         rte_flow_item_tcp_mask.hdr.src_port;
 468                 } else {
 469                         tcp.hdr.dst_port = conf->port;
 470                         tcp_mask.hdr.dst_port =
 471                                         rte_flow_item_tcp_mask.hdr.dst_port;
 472                 }
 473                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 474                 item.spec = &tcp;
 475                 item.mask = &tcp_mask;
 476                 field = modify_tcp;
 477         }
 478         return flow_dv_convert_modify_action(&item, field, resource,
 479                                              MLX5_MODIFICATION_TYPE_SET, error);
 480 }
 481
 482 /**
 483  * Convert modify-header set TTL action to DV specification.
 484  *
 485  * @param[in,out] resource
 486  *   Pointer to the modify-header resource.
 487  * @param[in] action
 488  *   Pointer to action specification.
 489  * @param[in] items
 490  *   Pointer to rte_flow_item objects list.
 491  * @param[in] attr
 492  *   Pointer to flow attributes structure.
 493  * @param[out] error
 494  *   Pointer to the error structure.
 495  *
 496  * @return
 497  *   0 on success, a negative errno value otherwise and rte_errno is set.
 498  */
 499 static int
 500 flow_dv_convert_action_modify_ttl
 501                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 502                          const struct rte_flow_action *action,
 503                          const struct rte_flow_item *items,
 504                          union flow_dv_attr *attr,
 505                          struct rte_flow_error *error)
 506 {
 507         const struct rte_flow_action_set_ttl *conf =
 508                 (const struct rte_flow_action_set_ttl *)(action->conf);
 509         struct rte_flow_item item;
 510         struct rte_flow_item_ipv4 ipv4;
 511         struct rte_flow_item_ipv4 ipv4_mask;
 512         struct rte_flow_item_ipv6 ipv6;
 513         struct rte_flow_item_ipv6 ipv6_mask;
 514         struct field_modify_info *field;
 515
 516         if (!attr->valid)
 517                 flow_dv_attr_init(items, attr);
 518         if (attr->ipv4) {
 519                 memset(&ipv4, 0, sizeof(ipv4));
 520                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 521                 ipv4.hdr.time_to_live = conf->ttl_value;
 522                 ipv4_mask.hdr.time_to_live = 0xFF;
 523                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 524                 item.spec = &ipv4;
 525                 item.mask = &ipv4_mask;
 526                 field = modify_ipv4;
 527         }
 528         if (attr->ipv6) {
 529                 memset(&ipv6, 0, sizeof(ipv6));
 530                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 531                 ipv6.hdr.hop_limits = conf->ttl_value;
 532                 ipv6_mask.hdr.hop_limits = 0xFF;
 533                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 534                 item.spec = &ipv6;
 535                 item.mask = &ipv6_mask;
 536                 field = modify_ipv6;
 537         }
 538         return flow_dv_convert_modify_action(&item, field, resource,
 539                                              MLX5_MODIFICATION_TYPE_SET, error);
 540 }
 541
 542 /**
 543  * Convert modify-header decrement TTL action to DV specification.
 544  *
 545  * @param[in,out] resource
 546  *   Pointer to the modify-header resource.
 547  * @param[in] action
 548  *   Pointer to action specification.
 549  * @param[in] items
 550  *   Pointer to rte_flow_item objects list.
 551  * @param[in] attr
 552  *   Pointer to flow attributes structure.
 553  * @param[out] error
 554  *   Pointer to the error structure.
 555  *
 556  * @return
 557  *   0 on success, a negative errno value otherwise and rte_errno is set.
 558  */
 559 static int
 560 flow_dv_convert_action_modify_dec_ttl
 561                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 562                          const struct rte_flow_item *items,
 563                          union flow_dv_attr *attr,
 564                          struct rte_flow_error *error)
 565 {
 566         struct rte_flow_item item;
 567         struct rte_flow_item_ipv4 ipv4;
 568         struct rte_flow_item_ipv4 ipv4_mask;
 569         struct rte_flow_item_ipv6 ipv6;
 570         struct rte_flow_item_ipv6 ipv6_mask;
 571         struct field_modify_info *field;
 572
 573         if (!attr->valid)
 574                 flow_dv_attr_init(items, attr);
 575         if (attr->ipv4) {
 576                 memset(&ipv4, 0, sizeof(ipv4));
 577                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 578                 ipv4.hdr.time_to_live = 0xFF;
 579                 ipv4_mask.hdr.time_to_live = 0xFF;
 580                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 581                 item.spec = &ipv4;
 582                 item.mask = &ipv4_mask;
 583                 field = modify_ipv4;
 584         }
 585         if (attr->ipv6) {
 586                 memset(&ipv6, 0, sizeof(ipv6));
 587                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 588                 ipv6.hdr.hop_limits = 0xFF;
 589                 ipv6_mask.hdr.hop_limits = 0xFF;
 590                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 591                 item.spec = &ipv6;
 592                 item.mask = &ipv6_mask;
 593                 field = modify_ipv6;
 594         }
 595         return flow_dv_convert_modify_action(&item, field, resource,
 596                                              MLX5_MODIFICATION_TYPE_ADD, error);
 597 }
 598
 599 /**
 600  * Convert modify-header increment/decrement TCP Sequence number
 601  * to DV specification.
 602  *
 603  * @param[in,out] resource
 604  *   Pointer to the modify-header resource.
 605  * @param[in] action
 606  *   Pointer to action specification.
 607  * @param[out] error
 608  *   Pointer to the error structure.
 609  *
 610  * @return
 611  *   0 on success, a negative errno value otherwise and rte_errno is set.
 612  */
 613 static int
 614 flow_dv_convert_action_modify_tcp_seq
 615                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 616                          const struct rte_flow_action *action,
 617                          struct rte_flow_error *error)
 618 {
 619         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 620         uint64_t value = rte_be_to_cpu_32(*conf);
 621         struct rte_flow_item item;
 622         struct rte_flow_item_tcp tcp;
 623         struct rte_flow_item_tcp tcp_mask;
 624
 625         memset(&tcp, 0, sizeof(tcp));
 626         memset(&tcp_mask, 0, sizeof(tcp_mask));
 627         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 628                 /*
 629                  * The HW has no decrement operation, only increment operation.
 630                  * To simulate decrement X from Y using increment operation
 631                  * we need to add UINT32_MAX X times to Y.
 632                  * Each adding of UINT32_MAX decrements Y by 1.
 633                  */
 634                 value *= UINT32_MAX;
 635         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 636         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 637         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 638         item.spec = &tcp;
 639         item.mask = &tcp_mask;
 640         return flow_dv_convert_modify_action(&item, modify_tcp, resource,
 641                                              MLX5_MODIFICATION_TYPE_ADD, error);
 642 }
 643
 644 /**
 645  * Convert modify-header increment/decrement TCP Acknowledgment number
 646  * to DV specification.
 647  *
 648  * @param[in,out] resource
 649  *   Pointer to the modify-header resource.
 650  * @param[in] action
 651  *   Pointer to action specification.
 652  * @param[out] error
 653  *   Pointer to the error structure.
 654  *
 655  * @return
 656  *   0 on success, a negative errno value otherwise and rte_errno is set.
 657  */
 658 static int
 659 flow_dv_convert_action_modify_tcp_ack
 660                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 661                          const struct rte_flow_action *action,
 662                          struct rte_flow_error *error)
 663 {
 664         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 665         uint64_t value = rte_be_to_cpu_32(*conf);
 666         struct rte_flow_item item;
 667         struct rte_flow_item_tcp tcp;
 668         struct rte_flow_item_tcp tcp_mask;
 669
 670         memset(&tcp, 0, sizeof(tcp));
 671         memset(&tcp_mask, 0, sizeof(tcp_mask));
 672         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 673                 /*
 674                  * The HW has no decrement operation, only increment operation.
 675                  * To simulate decrement X from Y using increment operation
 676                  * we need to add UINT32_MAX X times to Y.
 677                  * Each adding of UINT32_MAX decrements Y by 1.
 678                  */
 679                 value *= UINT32_MAX;
 680         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 681         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 682         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 683         item.spec = &tcp;
 684         item.mask = &tcp_mask;
 685         return flow_dv_convert_modify_action(&item, modify_tcp, resource,
 686                                              MLX5_MODIFICATION_TYPE_ADD, error);
 687 }
 688
 689 /**
 690  * Validate META item.
 691  *
 692  * @param[in] dev
 693  *   Pointer to the rte_eth_dev structure.
 694  * @param[in] item
 695  *   Item specification.
 696  * @param[in] attr
 697  *   Attributes of flow that includes this item.
 698  * @param[out] error
 699  *   Pointer to error structure.
 700  *
 701  * @return
 702  *   0 on success, a negative errno value otherwise and rte_errno is set.
 703  */
 704 static int
 705 flow_dv_validate_item_meta(struct rte_eth_dev *dev,
 706                            const struct rte_flow_item *item,
 707                            const struct rte_flow_attr *attr,
 708                            struct rte_flow_error *error)
 709 {
 710         const struct rte_flow_item_meta *spec = item->spec;
 711         const struct rte_flow_item_meta *mask = item->mask;
 712         const struct rte_flow_item_meta nic_mask = {
 713                 .data = RTE_BE32(UINT32_MAX)
 714         };
 715         int ret;
 716         uint64_t offloads = dev->data->dev_conf.txmode.offloads;
 717
 718         if (!(offloads & DEV_TX_OFFLOAD_MATCH_METADATA))
 719                 return rte_flow_error_set(error, EPERM,
 720                                           RTE_FLOW_ERROR_TYPE_ITEM,
 721                                           NULL,
 722                                           "match on metadata offload "
 723                                           "configuration is off for this port");
 724         if (!spec)
 725                 return rte_flow_error_set(error, EINVAL,
 726                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
 727                                           item->spec,
 728                                           "data cannot be empty");
 729         if (!spec->data)
 730                 return rte_flow_error_set(error, EINVAL,
 731                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
 732                                           NULL,
 733                                           "data cannot be zero");
 734         if (!mask)
 735                 mask = &rte_flow_item_meta_mask;
 736         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
 737                                         (const uint8_t *)&nic_mask,
 738                                         sizeof(struct rte_flow_item_meta),
 739                                         error);
 740         if (ret < 0)
 741                 return ret;
 742         if (attr->ingress)
 743                 return rte_flow_error_set(error, ENOTSUP,
 744                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
 745                                           NULL,
 746                                           "pattern not supported for ingress");
 747         return 0;
 748 }
 749
 750 /**
 751  * Validate vport item.
 752  *
 753  * @param[in] dev
 754  *   Pointer to the rte_eth_dev structure.
 755  * @param[in] item
 756  *   Item specification.
 757  * @param[in] attr
 758  *   Attributes of flow that includes this item.
 759  * @param[in] item_flags
 760  *   Bit-fields that holds the items detected until now.
 761  * @param[out] error
 762  *   Pointer to error structure.
 763  *
 764  * @return
 765  *   0 on success, a negative errno value otherwise and rte_errno is set.
 766  */
 767 static int
 768 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
 769                               const struct rte_flow_item *item,
 770                               const struct rte_flow_attr *attr,
 771                               uint64_t item_flags,
 772                               struct rte_flow_error *error)
 773 {
 774         const struct rte_flow_item_port_id *spec = item->spec;
 775         const struct rte_flow_item_port_id *mask = item->mask;
 776         const struct rte_flow_item_port_id switch_mask = {
 777                         .id = 0xffffffff,
 778         };
 779         uint16_t esw_domain_id;
 780         uint16_t item_port_esw_domain_id;
 781         int ret;
 782
 783         if (!attr->transfer)
 784                 return rte_flow_error_set(error, EINVAL,
 785                                           RTE_FLOW_ERROR_TYPE_ITEM,
 786                                           NULL,
 787                                           "match on port id is valid only"
 788                                           " when transfer flag is enabled");
 789         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
 790                 return rte_flow_error_set(error, ENOTSUP,
 791                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
 792                                           "multiple source ports are not"
 793                                           " supported");
 794         if (!mask)
 795                 mask = &switch_mask;
 796         if (mask->id != 0xffffffff)
 797                 return rte_flow_error_set(error, ENOTSUP,
 798                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
 799                                            mask,
 800                                            "no support for partial mask on"
 801                                            " \"id\" field");
 802         ret = mlx5_flow_item_acceptable
 803                                 (item, (const uint8_t *)mask,
 804                                  (const uint8_t *)&rte_flow_item_port_id_mask,
 805                                  sizeof(struct rte_flow_item_port_id),
 806                                  error);
 807         if (ret)
 808                 return ret;
 809         if (!spec)
 810                 return 0;
 811         ret = mlx5_port_to_eswitch_info(spec->id, &item_port_esw_domain_id,
 812                                         NULL);
 813         if (ret)
 814                 return rte_flow_error_set(error, -ret,
 815                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
 816                                           "failed to obtain E-Switch info for"
 817                                           " port");
 818         ret = mlx5_port_to_eswitch_info(dev->data->port_id,
 819                                         &esw_domain_id, NULL);
 820         if (ret < 0)
 821                 return rte_flow_error_set(error, -ret,
 822                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 823                                           NULL,
 824                                           "failed to obtain E-Switch info");
 825         if (item_port_esw_domain_id != esw_domain_id)
 826                 return rte_flow_error_set(error, -ret,
 827                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
 828                                           "cannot match on a port from a"
 829                                           " different E-Switch");
 830         return 0;
 831 }
 832
 833 /**
 834  * Validate count action.
 835  *
 836  * @param[in] dev
 837  *   device otr.
 838  * @param[out] error
 839  *   Pointer to error structure.
 840  *
 841  * @return
 842  *   0 on success, a negative errno value otherwise and rte_errno is set.
 843  */
 844 static int
 845 flow_dv_validate_action_count(struct rte_eth_dev *dev,
 846                               struct rte_flow_error *error)
 847 {
 848         struct mlx5_priv *priv = dev->data->dev_private;
 849
 850         if (!priv->config.devx)
 851                 goto notsup_err;
 852 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
 853         return 0;
 854 #endif
 855 notsup_err:
 856         return rte_flow_error_set
 857                       (error, ENOTSUP,
 858                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 859                        NULL,
 860                        "count action not supported");
 861 }
 862
 863 /**
 864  * Validate the L2 encap action.
 865  *
 866  * @param[in] action_flags
 867  *   Holds the actions detected until now.
 868  * @param[in] action
 869  *   Pointer to the encap action.
 870  * @param[in] attr
 871  *   Pointer to flow attributes
 872  * @param[out] error
 873  *   Pointer to error structure.
 874  *
 875  * @return
 876  *   0 on success, a negative errno value otherwise and rte_errno is set.
 877  */
 878 static int
 879 flow_dv_validate_action_l2_encap(uint64_t action_flags,
 880                                  const struct rte_flow_action *action,
 881                                  const struct rte_flow_attr *attr,
 882                                  struct rte_flow_error *error)
 883 {
 884         if (!(action->conf))
 885                 return rte_flow_error_set(error, EINVAL,
 886                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
 887                                           "configuration cannot be null");
 888         if (action_flags & MLX5_FLOW_ACTION_DROP)
 889                 return rte_flow_error_set(error, EINVAL,
 890                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 891                                           "can't drop and encap in same flow");
 892         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
 893                 return rte_flow_error_set(error, EINVAL,
 894                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 895                                           "can only have a single encap or"
 896                                           " decap action in a flow");
 897         if (!attr->transfer && attr->ingress)
 898                 return rte_flow_error_set(error, ENOTSUP,
 899                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
 900                                           NULL,
 901                                           "encap action not supported for "
 902                                           "ingress");
 903         return 0;
 904 }
 905
 906 /**
 907  * Validate the L2 decap action.
 908  *
 909  * @param[in] action_flags
 910  *   Holds the actions detected until now.
 911  * @param[in] attr
 912  *   Pointer to flow attributes
 913  * @param[out] error
 914  *   Pointer to error structure.
 915  *
 916  * @return
 917  *   0 on success, a negative errno value otherwise and rte_errno is set.
 918  */
 919 static int
 920 flow_dv_validate_action_l2_decap(uint64_t action_flags,
 921                                  const struct rte_flow_attr *attr,
 922                                  struct rte_flow_error *error)
 923 {
 924         if (action_flags & MLX5_FLOW_ACTION_DROP)
 925                 return rte_flow_error_set(error, EINVAL,
 926                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 927                                           "can't drop and decap in same flow");
 928         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
 929                 return rte_flow_error_set(error, EINVAL,
 930                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 931                                           "can only have a single encap or"
 932                                           " decap action in a flow");
 933         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
 934                 return rte_flow_error_set(error, EINVAL,
 935                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 936                                           "can't have decap action after"
 937                                           " modify action");
 938         if (attr->egress)
 939                 return rte_flow_error_set(error, ENOTSUP,
 940                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
 941                                           NULL,
 942                                           "decap action not supported for "
 943                                           "egress");
 944         return 0;
 945 }
 946
 947 /**
 948  * Validate the raw encap action.
 949  *
 950  * @param[in] action_flags
 951  *   Holds the actions detected until now.
 952  * @param[in] action
 953  *   Pointer to the encap action.
 954  * @param[in] attr
 955  *   Pointer to flow attributes
 956  * @param[out] error
 957  *   Pointer to error structure.
 958  *
 959  * @return
 960  *   0 on success, a negative errno value otherwise and rte_errno is set.
 961  */
 962 static int
 963 flow_dv_validate_action_raw_encap(uint64_t action_flags,
 964                                   const struct rte_flow_action *action,
 965                                   const struct rte_flow_attr *attr,
 966                                   struct rte_flow_error *error)
 967 {
 968         if (!(action->conf))
 969                 return rte_flow_error_set(error, EINVAL,
 970                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
 971                                           "configuration cannot be null");
 972         if (action_flags & MLX5_FLOW_ACTION_DROP)
 973                 return rte_flow_error_set(error, EINVAL,
 974                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 975                                           "can't drop and encap in same flow");
 976         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
 977                 return rte_flow_error_set(error, EINVAL,
 978                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 979                                           "can only have a single encap"
 980                                           " action in a flow");
 981         /* encap without preceding decap is not supported for ingress */
 982         if (!attr->transfer &&  attr->ingress &&
 983             !(action_flags & MLX5_FLOW_ACTION_RAW_DECAP))
 984                 return rte_flow_error_set(error, ENOTSUP,
 985                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
 986                                           NULL,
 987                                           "encap action not supported for "
 988                                           "ingress");
 989         return 0;
 990 }
 991
 992 /**
 993  * Validate the raw decap action.
 994  *
 995  * @param[in] action_flags
 996  *   Holds the actions detected until now.
 997  * @param[in] action
 998  *   Pointer to the encap action.
 999  * @param[in] attr
1000  *   Pointer to flow attributes
1001  * @param[out] error
1002  *   Pointer to error structure.
1003  *
1004  * @return
1005  *   0 on success, a negative errno value otherwise and rte_errno is set.
1006  */
1007 static int
1008 flow_dv_validate_action_raw_decap(uint64_t action_flags,
1009                                   const struct rte_flow_action *action,
1010                                   const struct rte_flow_attr *attr,
1011                                   struct rte_flow_error *error)
1012 {
1013         if (action_flags & MLX5_FLOW_ACTION_DROP)
1014                 return rte_flow_error_set(error, EINVAL,
1015                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1016                                           "can't drop and decap in same flow");
1017         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
1018                 return rte_flow_error_set(error, EINVAL,
1019                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1020                                           "can't have encap action before"
1021                                           " decap action");
1022         if (action_flags & MLX5_FLOW_DECAP_ACTIONS)
1023                 return rte_flow_error_set(error, EINVAL,
1024                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1025                                           "can only have a single decap"
1026                                           " action in a flow");
1027         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
1028                 return rte_flow_error_set(error, EINVAL,
1029                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1030                                           "can't have decap action after"
1031                                           " modify action");
1032         /* decap action is valid on egress only if it is followed by encap */
1033         if (attr->egress) {
1034                 for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
1035                        action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
1036                        action++) {
1037                 }
1038                 if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP)
1039                         return rte_flow_error_set
1040                                         (error, ENOTSUP,
1041                                          RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
1042                                          NULL, "decap action not supported"
1043                                          " for egress");
1044         }
1045         return 0;
1046 }
1047
1048 /**
1049  * Find existing encap/decap resource or create and register a new one.
1050  *
1051  * @param dev[in, out]
1052  *   Pointer to rte_eth_dev structure.
1053  * @param[in, out] resource
1054  *   Pointer to encap/decap resource.
1055  * @parm[in, out] dev_flow
1056  *   Pointer to the dev_flow.
1057  * @param[out] error
1058  *   pointer to error structure.
1059  *
1060  * @return
1061  *   0 on success otherwise -errno and errno is set.
1062  */
1063 static int
1064 flow_dv_encap_decap_resource_register
1065                         (struct rte_eth_dev *dev,
1066                          struct mlx5_flow_dv_encap_decap_resource *resource,
1067                          struct mlx5_flow *dev_flow,
1068                          struct rte_flow_error *error)
1069 {
1070         struct mlx5_priv *priv = dev->data->dev_private;
1071         struct mlx5_ibv_shared *sh = priv->sh;
1072         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
1073         struct rte_flow *flow = dev_flow->flow;
1074         struct mlx5dv_dr_domain *domain;
1075
1076         resource->flags = flow->group ? 0 : 1;
1077         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
1078                 domain = sh->fdb_domain;
1079         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
1080                 domain = sh->rx_domain;
1081         else
1082                 domain = sh->tx_domain;
1083
1084         /* Lookup a matching resource from cache. */
1085         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
1086                 if (resource->reformat_type == cache_resource->reformat_type &&
1087                     resource->ft_type == cache_resource->ft_type &&
1088                     resource->flags == cache_resource->flags &&
1089                     resource->size == cache_resource->size &&
1090                     !memcmp((const void *)resource->buf,
1091                             (const void *)cache_resource->buf,
1092                             resource->size)) {
1093                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
1094                                 (void *)cache_resource,
1095                                 rte_atomic32_read(&cache_resource->refcnt));
1096                         rte_atomic32_inc(&cache_resource->refcnt);
1097                         dev_flow->dv.encap_decap = cache_resource;
1098                         return 0;
1099                 }
1100         }
1101         /* Register new encap/decap resource. */
1102         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
1103         if (!cache_resource)
1104                 return rte_flow_error_set(error, ENOMEM,
1105                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1106                                           "cannot allocate resource memory");
1107         *cache_resource = *resource;
1108         cache_resource->verbs_action =
1109                 mlx5_glue->dv_create_flow_action_packet_reformat
1110                         (sh->ctx, cache_resource->reformat_type,
1111                          cache_resource->ft_type, domain, cache_resource->flags,
1112                          cache_resource->size,
1113                          (cache_resource->size ? cache_resource->buf : NULL));
1114         if (!cache_resource->verbs_action) {
1115                 rte_free(cache_resource);
1116                 return rte_flow_error_set(error, ENOMEM,
1117                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1118                                           NULL, "cannot create action");
1119         }
1120         rte_atomic32_init(&cache_resource->refcnt);
1121         rte_atomic32_inc(&cache_resource->refcnt);
1122         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
1123         dev_flow->dv.encap_decap = cache_resource;
1124         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
1125                 (void *)cache_resource,
1126                 rte_atomic32_read(&cache_resource->refcnt));
1127         return 0;
1128 }
1129
1130 /**
1131  * Find existing table jump resource or create and register a new one.
1132  *
1133  * @param dev[in, out]
1134  *   Pointer to rte_eth_dev structure.
1135  * @param[in, out] resource
1136  *   Pointer to jump table resource.
1137  * @parm[in, out] dev_flow
1138  *   Pointer to the dev_flow.
1139  * @param[out] error
1140  *   pointer to error structure.
1141  *
1142  * @return
1143  *   0 on success otherwise -errno and errno is set.
1144  */
1145 static int
1146 flow_dv_jump_tbl_resource_register
1147                         (struct rte_eth_dev *dev,
1148                          struct mlx5_flow_dv_jump_tbl_resource *resource,
1149                          struct mlx5_flow *dev_flow,
1150                          struct rte_flow_error *error)
1151 {
1152         struct mlx5_priv *priv = dev->data->dev_private;
1153         struct mlx5_ibv_shared *sh = priv->sh;
1154         struct mlx5_flow_dv_jump_tbl_resource *cache_resource;
1155
1156         /* Lookup a matching resource from cache. */
1157         LIST_FOREACH(cache_resource, &sh->jump_tbl, next) {
1158                 if (resource->tbl == cache_resource->tbl) {
1159                         DRV_LOG(DEBUG, "jump table resource resource %p: refcnt %d++",
1160                                 (void *)cache_resource,
1161                                 rte_atomic32_read(&cache_resource->refcnt));
1162                         rte_atomic32_inc(&cache_resource->refcnt);
1163                         dev_flow->dv.jump = cache_resource;
1164                         return 0;
1165                 }
1166         }
1167         /* Register new jump table resource. */
1168         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
1169         if (!cache_resource)
1170                 return rte_flow_error_set(error, ENOMEM,
1171                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1172                                           "cannot allocate resource memory");
1173         *cache_resource = *resource;
1174         cache_resource->action =
1175                 mlx5_glue->dr_create_flow_action_dest_flow_tbl
1176                 (resource->tbl->obj);
1177         if (!cache_resource->action) {
1178                 rte_free(cache_resource);
1179                 return rte_flow_error_set(error, ENOMEM,
1180                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1181                                           NULL, "cannot create action");
1182         }
1183         rte_atomic32_init(&cache_resource->refcnt);
1184         rte_atomic32_inc(&cache_resource->refcnt);
1185         LIST_INSERT_HEAD(&sh->jump_tbl, cache_resource, next);
1186         dev_flow->dv.jump = cache_resource;
1187         DRV_LOG(DEBUG, "new jump table  resource %p: refcnt %d++",
1188                 (void *)cache_resource,
1189                 rte_atomic32_read(&cache_resource->refcnt));
1190         return 0;
1191 }
1192
1193 /**
1194  * Find existing table port ID resource or create and register a new one.
1195  *
1196  * @param dev[in, out]
1197  *   Pointer to rte_eth_dev structure.
1198  * @param[in, out] resource
1199  *   Pointer to port ID action resource.
1200  * @parm[in, out] dev_flow
1201  *   Pointer to the dev_flow.
1202  * @param[out] error
1203  *   pointer to error structure.
1204  *
1205  * @return
1206  *   0 on success otherwise -errno and errno is set.
1207  */
1208 static int
1209 flow_dv_port_id_action_resource_register
1210                         (struct rte_eth_dev *dev,
1211                          struct mlx5_flow_dv_port_id_action_resource *resource,
1212                          struct mlx5_flow *dev_flow,
1213                          struct rte_flow_error *error)
1214 {
1215         struct mlx5_priv *priv = dev->data->dev_private;
1216         struct mlx5_ibv_shared *sh = priv->sh;
1217         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
1218
1219         /* Lookup a matching resource from cache. */
1220         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
1221                 if (resource->port_id == cache_resource->port_id) {
1222                         DRV_LOG(DEBUG, "port id action resource resource %p: "
1223                                 "refcnt %d++",
1224                                 (void *)cache_resource,
1225                                 rte_atomic32_read(&cache_resource->refcnt));
1226                         rte_atomic32_inc(&cache_resource->refcnt);
1227                         dev_flow->dv.port_id_action = cache_resource;
1228                         return 0;
1229                 }
1230         }
1231         /* Register new port id action resource. */
1232         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
1233         if (!cache_resource)
1234                 return rte_flow_error_set(error, ENOMEM,
1235                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1236                                           "cannot allocate resource memory");
1237         *cache_resource = *resource;
1238         cache_resource->action =
1239                 mlx5_glue->dr_create_flow_action_dest_vport
1240                         (priv->sh->fdb_domain, resource->port_id);
1241         if (!cache_resource->action) {
1242                 rte_free(cache_resource);
1243                 return rte_flow_error_set(error, ENOMEM,
1244                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1245                                           NULL, "cannot create action");
1246         }
1247         rte_atomic32_init(&cache_resource->refcnt);
1248         rte_atomic32_inc(&cache_resource->refcnt);
1249         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
1250         dev_flow->dv.port_id_action = cache_resource;
1251         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
1252                 (void *)cache_resource,
1253                 rte_atomic32_read(&cache_resource->refcnt));
1254         return 0;
1255 }
1256
1257 /**
1258  * Get the size of specific rte_flow_item_type
1259  *
1260  * @param[in] item_type
1261  *   Tested rte_flow_item_type.
1262  *
1263  * @return
1264  *   sizeof struct item_type, 0 if void or irrelevant.
1265  */
1266 static size_t
1267 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
1268 {
1269         size_t retval;
1270
1271         switch (item_type) {
1272         case RTE_FLOW_ITEM_TYPE_ETH:
1273                 retval = sizeof(struct rte_flow_item_eth);
1274                 break;
1275         case RTE_FLOW_ITEM_TYPE_VLAN:
1276                 retval = sizeof(struct rte_flow_item_vlan);
1277                 break;
1278         case RTE_FLOW_ITEM_TYPE_IPV4:
1279                 retval = sizeof(struct rte_flow_item_ipv4);
1280                 break;
1281         case RTE_FLOW_ITEM_TYPE_IPV6:
1282                 retval = sizeof(struct rte_flow_item_ipv6);
1283                 break;
1284         case RTE_FLOW_ITEM_TYPE_UDP:
1285                 retval = sizeof(struct rte_flow_item_udp);
1286                 break;
1287         case RTE_FLOW_ITEM_TYPE_TCP:
1288                 retval = sizeof(struct rte_flow_item_tcp);
1289                 break;
1290         case RTE_FLOW_ITEM_TYPE_VXLAN:
1291                 retval = sizeof(struct rte_flow_item_vxlan);
1292                 break;
1293         case RTE_FLOW_ITEM_TYPE_GRE:
1294                 retval = sizeof(struct rte_flow_item_gre);
1295                 break;
1296         case RTE_FLOW_ITEM_TYPE_NVGRE:
1297                 retval = sizeof(struct rte_flow_item_nvgre);
1298                 break;
1299         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
1300                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
1301                 break;
1302         case RTE_FLOW_ITEM_TYPE_MPLS:
1303                 retval = sizeof(struct rte_flow_item_mpls);
1304                 break;
1305         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
1306         default:
1307                 retval = 0;
1308                 break;
1309         }
1310         return retval;
1311 }
1312
1313 #define MLX5_ENCAP_IPV4_VERSION         0x40
1314 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
1315 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
1316 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
1317 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
1318 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
1319 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
1320
1321 /**
1322  * Convert the encap action data from list of rte_flow_item to raw buffer
1323  *
1324  * @param[in] items
1325  *   Pointer to rte_flow_item objects list.
1326  * @param[out] buf
1327  *   Pointer to the output buffer.
1328  * @param[out] size
1329  *   Pointer to the output buffer size.
1330  * @param[out] error
1331  *   Pointer to the error structure.
1332  *
1333  * @return
1334  *   0 on success, a negative errno value otherwise and rte_errno is set.
1335  */
1336 static int
1337 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
1338                            size_t *size, struct rte_flow_error *error)
1339 {
1340         struct rte_ether_hdr *eth = NULL;
1341         struct rte_vlan_hdr *vlan = NULL;
1342         struct rte_ipv4_hdr *ipv4 = NULL;
1343         struct rte_ipv6_hdr *ipv6 = NULL;
1344         struct rte_udp_hdr *udp = NULL;
1345         struct rte_vxlan_hdr *vxlan = NULL;
1346         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
1347         struct rte_gre_hdr *gre = NULL;
1348         size_t len;
1349         size_t temp_size = 0;
1350
1351         if (!items)
1352                 return rte_flow_error_set(error, EINVAL,
1353                                           RTE_FLOW_ERROR_TYPE_ACTION,
1354                                           NULL, "invalid empty data");
1355         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
1356                 len = flow_dv_get_item_len(items->type);
1357                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
1358                         return rte_flow_error_set(error, EINVAL,
1359                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1360                                                   (void *)items->type,
1361                                                   "items total size is too big"
1362                                                   " for encap action");
1363                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
1364                 switch (items->type) {
1365                 case RTE_FLOW_ITEM_TYPE_ETH:
1366                         eth = (struct rte_ether_hdr *)&buf[temp_size];
1367                         break;
1368                 case RTE_FLOW_ITEM_TYPE_VLAN:
1369                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
1370                         if (!eth)
1371                                 return rte_flow_error_set(error, EINVAL,
1372                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1373                                                 (void *)items->type,
1374                                                 "eth header not found");
1375                         if (!eth->ether_type)
1376                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
1377                         break;
1378                 case RTE_FLOW_ITEM_TYPE_IPV4:
1379                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
1380                         if (!vlan && !eth)
1381                                 return rte_flow_error_set(error, EINVAL,
1382                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1383                                                 (void *)items->type,
1384                                                 "neither eth nor vlan"
1385                                                 " header found");
1386                         if (vlan && !vlan->eth_proto)
1387                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
1388                         else if (eth && !eth->ether_type)
1389                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
1390                         if (!ipv4->version_ihl)
1391                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
1392                                                     MLX5_ENCAP_IPV4_IHL_MIN;
1393                         if (!ipv4->time_to_live)
1394                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
1395                         break;
1396                 case RTE_FLOW_ITEM_TYPE_IPV6:
1397                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
1398                         if (!vlan && !eth)
1399                                 return rte_flow_error_set(error, EINVAL,
1400                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1401                                                 (void *)items->type,
1402                                                 "neither eth nor vlan"
1403                                                 " header found");
1404                         if (vlan && !vlan->eth_proto)
1405                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
1406                         else if (eth && !eth->ether_type)
1407                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
1408                         if (!ipv6->vtc_flow)
1409                                 ipv6->vtc_flow =
1410                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
1411                         if (!ipv6->hop_limits)
1412                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
1413                         break;
1414                 case RTE_FLOW_ITEM_TYPE_UDP:
1415                         udp = (struct rte_udp_hdr *)&buf[temp_size];
1416                         if (!ipv4 && !ipv6)
1417                                 return rte_flow_error_set(error, EINVAL,
1418                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1419                                                 (void *)items->type,
1420                                                 "ip header not found");
1421                         if (ipv4 && !ipv4->next_proto_id)
1422                                 ipv4->next_proto_id = IPPROTO_UDP;
1423                         else if (ipv6 && !ipv6->proto)
1424                                 ipv6->proto = IPPROTO_UDP;
1425                         break;
1426                 case RTE_FLOW_ITEM_TYPE_VXLAN:
1427                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
1428                         if (!udp)
1429                                 return rte_flow_error_set(error, EINVAL,
1430                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1431                                                 (void *)items->type,
1432                                                 "udp header not found");
1433                         if (!udp->dst_port)
1434                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
1435                         if (!vxlan->vx_flags)
1436                                 vxlan->vx_flags =
1437                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
1438                         break;
1439                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
1440                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
1441                         if (!udp)
1442                                 return rte_flow_error_set(error, EINVAL,
1443                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1444                                                 (void *)items->type,
1445                                                 "udp header not found");
1446                         if (!vxlan_gpe->proto)
1447                                 return rte_flow_error_set(error, EINVAL,
1448                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1449                                                 (void *)items->type,
1450                                                 "next protocol not found");
1451                         if (!udp->dst_port)
1452                                 udp->dst_port =
1453                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
1454                         if (!vxlan_gpe->vx_flags)
1455                                 vxlan_gpe->vx_flags =
1456                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
1457                         break;
1458                 case RTE_FLOW_ITEM_TYPE_GRE:
1459                 case RTE_FLOW_ITEM_TYPE_NVGRE:
1460                         gre = (struct rte_gre_hdr *)&buf[temp_size];
1461                         if (!gre->proto)
1462                                 return rte_flow_error_set(error, EINVAL,
1463                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1464                                                 (void *)items->type,
1465                                                 "next protocol not found");
1466                         if (!ipv4 && !ipv6)
1467                                 return rte_flow_error_set(error, EINVAL,
1468                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1469                                                 (void *)items->type,
1470                                                 "ip header not found");
1471                         if (ipv4 && !ipv4->next_proto_id)
1472                                 ipv4->next_proto_id = IPPROTO_GRE;
1473                         else if (ipv6 && !ipv6->proto)
1474                                 ipv6->proto = IPPROTO_GRE;
1475                         break;
1476                 case RTE_FLOW_ITEM_TYPE_VOID:
1477                         break;
1478                 default:
1479                         return rte_flow_error_set(error, EINVAL,
1480                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1481                                                   (void *)items->type,
1482                                                   "unsupported item type");
1483                         break;
1484                 }
1485                 temp_size += len;
1486         }
1487         *size = temp_size;
1488         return 0;
1489 }
1490
1491 static int
1492 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
1493 {
1494         struct rte_ether_hdr *eth = NULL;
1495         struct rte_vlan_hdr *vlan = NULL;
1496         struct rte_ipv6_hdr *ipv6 = NULL;
1497         struct rte_udp_hdr *udp = NULL;
1498         char *next_hdr;
1499         uint16_t proto;
1500
1501         eth = (struct rte_ether_hdr *)data;
1502         next_hdr = (char *)(eth + 1);
1503         proto = RTE_BE16(eth->ether_type);
1504
1505         /* VLAN skipping */
1506         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
1507                 next_hdr += sizeof(struct rte_vlan_hdr);
1508                 vlan = (struct rte_vlan_hdr *)next_hdr;
1509                 proto = RTE_BE16(vlan->eth_proto);
1510         }
1511
1512         /* HW calculates IPv4 csum. no need to proceed */
1513         if (proto == RTE_ETHER_TYPE_IPV4)
1514                 return 0;
1515
1516         /* non IPv4/IPv6 header. not supported */
1517         if (proto != RTE_ETHER_TYPE_IPV6) {
1518                 return rte_flow_error_set(error, ENOTSUP,
1519                                           RTE_FLOW_ERROR_TYPE_ACTION,
1520                                           NULL, "Cannot offload non IPv4/IPv6");
1521         }
1522
1523         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
1524
1525         /* ignore non UDP */
1526         if (ipv6->proto != IPPROTO_UDP)
1527                 return 0;
1528
1529         udp = (struct rte_udp_hdr *)(ipv6 + 1);
1530         udp->dgram_cksum = 0;
1531
1532         return 0;
1533 }
1534
1535 /**
1536  * Convert L2 encap action to DV specification.
1537  *
1538  * @param[in] dev
1539  *   Pointer to rte_eth_dev structure.
1540  * @param[in] action
1541  *   Pointer to action structure.
1542  * @param[in, out] dev_flow
1543  *   Pointer to the mlx5_flow.
1544  * @param[in] transfer
1545  *   Mark if the flow is E-Switch flow.
1546  * @param[out] error
1547  *   Pointer to the error structure.
1548  *
1549  * @return
1550  *   0 on success, a negative errno value otherwise and rte_errno is set.
1551  */
1552 static int
1553 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
1554                                const struct rte_flow_action *action,
1555                                struct mlx5_flow *dev_flow,
1556                                uint8_t transfer,
1557                                struct rte_flow_error *error)
1558 {
1559         const struct rte_flow_item *encap_data;
1560         const struct rte_flow_action_raw_encap *raw_encap_data;
1561         struct mlx5_flow_dv_encap_decap_resource res = {
1562                 .reformat_type =
1563                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
1564                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
1565                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
1566         };
1567
1568         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
1569                 raw_encap_data =
1570                         (const struct rte_flow_action_raw_encap *)action->conf;
1571                 res.size = raw_encap_data->size;
1572                 memcpy(res.buf, raw_encap_data->data, res.size);
1573                 if (flow_dv_zero_encap_udp_csum(res.buf, error))
1574                         return -rte_errno;
1575         } else {
1576                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
1577                         encap_data =
1578                                 ((const struct rte_flow_action_vxlan_encap *)
1579                                                 action->conf)->definition;
1580                 else
1581                         encap_data =
1582                                 ((const struct rte_flow_action_nvgre_encap *)
1583                                                 action->conf)->definition;
1584                 if (flow_dv_convert_encap_data(encap_data, res.buf,
1585                                                &res.size, error))
1586                         return -rte_errno;
1587         }
1588         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
1589                 return rte_flow_error_set(error, EINVAL,
1590                                           RTE_FLOW_ERROR_TYPE_ACTION,
1591                                           NULL, "can't create L2 encap action");
1592         return 0;
1593 }
1594
1595 /**
1596  * Convert L2 decap action to DV specification.
1597  *
1598  * @param[in] dev
1599  *   Pointer to rte_eth_dev structure.
1600  * @param[in, out] dev_flow
1601  *   Pointer to the mlx5_flow.
1602  * @param[in] transfer
1603  *   Mark if the flow is E-Switch flow.
1604  * @param[out] error
1605  *   Pointer to the error structure.
1606  *
1607  * @return
1608  *   0 on success, a negative errno value otherwise and rte_errno is set.
1609  */
1610 static int
1611 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
1612                                struct mlx5_flow *dev_flow,
1613                                uint8_t transfer,
1614                                struct rte_flow_error *error)
1615 {
1616         struct mlx5_flow_dv_encap_decap_resource res = {
1617                 .size = 0,
1618                 .reformat_type =
1619                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
1620                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
1621                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
1622         };
1623
1624         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
1625                 return rte_flow_error_set(error, EINVAL,
1626                                           RTE_FLOW_ERROR_TYPE_ACTION,
1627                                           NULL, "can't create L2 decap action");
1628         return 0;
1629 }
1630
1631 /**
1632  * Convert raw decap/encap (L3 tunnel) action to DV specification.
1633  *
1634  * @param[in] dev
1635  *   Pointer to rte_eth_dev structure.
1636  * @param[in] action
1637  *   Pointer to action structure.
1638  * @param[in, out] dev_flow
1639  *   Pointer to the mlx5_flow.
1640  * @param[in] attr
1641  *   Pointer to the flow attributes.
1642  * @param[out] error
1643  *   Pointer to the error structure.
1644  *
1645  * @return
1646  *   0 on success, a negative errno value otherwise and rte_errno is set.
1647  */
1648 static int
1649 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
1650                                 const struct rte_flow_action *action,
1651                                 struct mlx5_flow *dev_flow,
1652                                 const struct rte_flow_attr *attr,
1653                                 struct rte_flow_error *error)
1654 {
1655         const struct rte_flow_action_raw_encap *encap_data;
1656         struct mlx5_flow_dv_encap_decap_resource res;
1657
1658         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
1659         res.size = encap_data->size;
1660         memcpy(res.buf, encap_data->data, res.size);
1661         res.reformat_type = attr->egress ?
1662                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL :
1663                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2;
1664         if (attr->transfer)
1665                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
1666         else
1667                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
1668                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
1669         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
1670                 return rte_flow_error_set(error, EINVAL,
1671                                           RTE_FLOW_ERROR_TYPE_ACTION,
1672                                           NULL, "can't create encap action");
1673         return 0;
1674 }
1675
1676 /**
1677  * Validate the modify-header actions.
1678  *
1679  * @param[in] action_flags
1680  *   Holds the actions detected until now.
1681  * @param[in] action
1682  *   Pointer to the modify action.
1683  * @param[out] error
1684  *   Pointer to error structure.
1685  *
1686  * @return
1687  *   0 on success, a negative errno value otherwise and rte_errno is set.
1688  */
1689 static int
1690 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
1691                                    const struct rte_flow_action *action,
1692                                    struct rte_flow_error *error)
1693 {
1694         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
1695                 return rte_flow_error_set(error, EINVAL,
1696                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1697                                           NULL, "action configuration not set");
1698         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
1699                 return rte_flow_error_set(error, EINVAL,
1700                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1701                                           "can't have encap action before"
1702                                           " modify action");
1703         return 0;
1704 }
1705
1706 /**
1707  * Validate the modify-header MAC address actions.
1708  *
1709  * @param[in] action_flags
1710  *   Holds the actions detected until now.
1711  * @param[in] action
1712  *   Pointer to the modify action.
1713  * @param[in] item_flags
1714  *   Holds the items detected.
1715  * @param[out] error
1716  *   Pointer to error structure.
1717  *
1718  * @return
1719  *   0 on success, a negative errno value otherwise and rte_errno is set.
1720  */
1721 static int
1722 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
1723                                    const struct rte_flow_action *action,
1724                                    const uint64_t item_flags,
1725                                    struct rte_flow_error *error)
1726 {
1727         int ret = 0;
1728
1729         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1730         if (!ret) {
1731                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
1732                         return rte_flow_error_set(error, EINVAL,
1733                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1734                                                   NULL,
1735                                                   "no L2 item in pattern");
1736         }
1737         return ret;
1738 }
1739
1740 /**
1741  * Validate the modify-header IPv4 address actions.
1742  *
1743  * @param[in] action_flags
1744  *   Holds the actions detected until now.
1745  * @param[in] action
1746  *   Pointer to the modify action.
1747  * @param[in] item_flags
1748  *   Holds the items detected.
1749  * @param[out] error
1750  *   Pointer to error structure.
1751  *
1752  * @return
1753  *   0 on success, a negative errno value otherwise and rte_errno is set.
1754  */
1755 static int
1756 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
1757                                     const struct rte_flow_action *action,
1758                                     const uint64_t item_flags,
1759                                     struct rte_flow_error *error)
1760 {
1761         int ret = 0;
1762
1763         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1764         if (!ret) {
1765                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
1766                         return rte_flow_error_set(error, EINVAL,
1767                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1768                                                   NULL,
1769                                                   "no ipv4 item in pattern");
1770         }
1771         return ret;
1772 }
1773
1774 /**
1775  * Validate the modify-header IPv6 address actions.
1776  *
1777  * @param[in] action_flags
1778  *   Holds the actions detected until now.
1779  * @param[in] action
1780  *   Pointer to the modify action.
1781  * @param[in] item_flags
1782  *   Holds the items detected.
1783  * @param[out] error
1784  *   Pointer to error structure.
1785  *
1786  * @return
1787  *   0 on success, a negative errno value otherwise and rte_errno is set.
1788  */
1789 static int
1790 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
1791                                     const struct rte_flow_action *action,
1792                                     const uint64_t item_flags,
1793                                     struct rte_flow_error *error)
1794 {
1795         int ret = 0;
1796
1797         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1798         if (!ret) {
1799                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
1800                         return rte_flow_error_set(error, EINVAL,
1801                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1802                                                   NULL,
1803                                                   "no ipv6 item in pattern");
1804         }
1805         return ret;
1806 }
1807
1808 /**
1809  * Validate the modify-header TP actions.
1810  *
1811  * @param[in] action_flags
1812  *   Holds the actions detected until now.
1813  * @param[in] action
1814  *   Pointer to the modify action.
1815  * @param[in] item_flags
1816  *   Holds the items detected.
1817  * @param[out] error
1818  *   Pointer to error structure.
1819  *
1820  * @return
1821  *   0 on success, a negative errno value otherwise and rte_errno is set.
1822  */
1823 static int
1824 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
1825                                   const struct rte_flow_action *action,
1826                                   const uint64_t item_flags,
1827                                   struct rte_flow_error *error)
1828 {
1829         int ret = 0;
1830
1831         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1832         if (!ret) {
1833                 if (!(item_flags & MLX5_FLOW_LAYER_L4))
1834                         return rte_flow_error_set(error, EINVAL,
1835                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1836                                                   NULL, "no transport layer "
1837                                                   "in pattern");
1838         }
1839         return ret;
1840 }
1841
1842 /**
1843  * Validate the modify-header actions of increment/decrement
1844  * TCP Sequence-number.
1845  *
1846  * @param[in] action_flags
1847  *   Holds the actions detected until now.
1848  * @param[in] action
1849  *   Pointer to the modify action.
1850  * @param[in] item_flags
1851  *   Holds the items detected.
1852  * @param[out] error
1853  *   Pointer to error structure.
1854  *
1855  * @return
1856  *   0 on success, a negative errno value otherwise and rte_errno is set.
1857  */
1858 static int
1859 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
1860                                        const struct rte_flow_action *action,
1861                                        const uint64_t item_flags,
1862                                        struct rte_flow_error *error)
1863 {
1864         int ret = 0;
1865
1866         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1867         if (!ret) {
1868                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
1869                         return rte_flow_error_set(error, EINVAL,
1870                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1871                                                   NULL, "no TCP item in"
1872                                                   " pattern");
1873                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
1874                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
1875                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
1876                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
1877                         return rte_flow_error_set(error, EINVAL,
1878                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1879                                                   NULL,
1880                                                   "cannot decrease and increase"
1881                                                   " TCP sequence number"
1882                                                   " at the same time");
1883         }
1884         return ret;
1885 }
1886
1887 /**
1888  * Validate the modify-header actions of increment/decrement
1889  * TCP Acknowledgment number.
1890  *
1891  * @param[in] action_flags
1892  *   Holds the actions detected until now.
1893  * @param[in] action
1894  *   Pointer to the modify action.
1895  * @param[in] item_flags
1896  *   Holds the items detected.
1897  * @param[out] error
1898  *   Pointer to error structure.
1899  *
1900  * @return
1901  *   0 on success, a negative errno value otherwise and rte_errno is set.
1902  */
1903 static int
1904 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
1905                                        const struct rte_flow_action *action,
1906                                        const uint64_t item_flags,
1907                                        struct rte_flow_error *error)
1908 {
1909         int ret = 0;
1910
1911         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1912         if (!ret) {
1913                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
1914                         return rte_flow_error_set(error, EINVAL,
1915                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1916                                                   NULL, "no TCP item in"
1917                                                   " pattern");
1918                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
1919                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
1920                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
1921                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
1922                         return rte_flow_error_set(error, EINVAL,
1923                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1924                                                   NULL,
1925                                                   "cannot decrease and increase"
1926                                                   " TCP acknowledgment number"
1927                                                   " at the same time");
1928         }
1929         return ret;
1930 }
1931
1932 /**
1933  * Validate the modify-header TTL actions.
1934  *
1935  * @param[in] action_flags
1936  *   Holds the actions detected until now.
1937  * @param[in] action
1938  *   Pointer to the modify action.
1939  * @param[in] item_flags
1940  *   Holds the items detected.
1941  * @param[out] error
1942  *   Pointer to error structure.
1943  *
1944  * @return
1945  *   0 on success, a negative errno value otherwise and rte_errno is set.
1946  */
1947 static int
1948 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
1949                                    const struct rte_flow_action *action,
1950                                    const uint64_t item_flags,
1951                                    struct rte_flow_error *error)
1952 {
1953         int ret = 0;
1954
1955         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1956         if (!ret) {
1957                 if (!(item_flags & MLX5_FLOW_LAYER_L3))
1958                         return rte_flow_error_set(error, EINVAL,
1959                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1960                                                   NULL,
1961                                                   "no IP protocol in pattern");
1962         }
1963         return ret;
1964 }
1965
1966 /**
1967  * Validate jump action.
1968  *
1969  * @param[in] action
1970  *   Pointer to the modify action.
1971  * @param[in] group
1972  *   The group of the current flow.
1973  * @param[out] error
1974  *   Pointer to error structure.
1975  *
1976  * @return
1977  *   0 on success, a negative errno value otherwise and rte_errno is set.
1978  */
1979 static int
1980 flow_dv_validate_action_jump(const struct rte_flow_action *action,
1981                              uint32_t group,
1982                              struct rte_flow_error *error)
1983 {
1984         if (action->type != RTE_FLOW_ACTION_TYPE_JUMP && !action->conf)
1985                 return rte_flow_error_set(error, EINVAL,
1986                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1987                                           NULL, "action configuration not set");
1988         if (group >= ((const struct rte_flow_action_jump *)action->conf)->group)
1989                 return rte_flow_error_set(error, EINVAL,
1990                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1991                                           "target group must be higher then"
1992                                           " the current flow group");
1993         return 0;
1994 }
1995
1996 /*
1997  * Validate the port_id action.
1998  *
1999  * @param[in] dev
2000  *   Pointer to rte_eth_dev structure.
2001  * @param[in] action_flags
2002  *   Bit-fields that holds the actions detected until now.
2003  * @param[in] action
2004  *   Port_id RTE action structure.
2005  * @param[in] attr
2006  *   Attributes of flow that includes this action.
2007  * @param[out] error
2008  *   Pointer to error structure.
2009  *
2010  * @return
2011  *   0 on success, a negative errno value otherwise and rte_errno is set.
2012  */
2013 static int
2014 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
2015                                 uint64_t action_flags,
2016                                 const struct rte_flow_action *action,
2017                                 const struct rte_flow_attr *attr,
2018                                 struct rte_flow_error *error)
2019 {
2020         const struct rte_flow_action_port_id *port_id;
2021         uint16_t port;
2022         uint16_t esw_domain_id;
2023         uint16_t act_port_domain_id;
2024         int ret;
2025
2026         if (!attr->transfer)
2027                 return rte_flow_error_set(error, ENOTSUP,
2028                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2029                                           NULL,
2030                                           "port id action is valid in transfer"
2031                                           " mode only");
2032         if (!action || !action->conf)
2033                 return rte_flow_error_set(error, ENOTSUP,
2034                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2035                                           NULL,
2036                                           "port id action parameters must be"
2037                                           " specified");
2038         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
2039                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
2040                 return rte_flow_error_set(error, EINVAL,
2041                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2042                                           "can have only one fate actions in"
2043                                           " a flow");
2044         ret = mlx5_port_to_eswitch_info(dev->data->port_id,
2045                                         &esw_domain_id, NULL);
2046         if (ret < 0)
2047                 return rte_flow_error_set(error, -ret,
2048                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2049                                           NULL,
2050                                           "failed to obtain E-Switch info");
2051         port_id = action->conf;
2052         port = port_id->original ? dev->data->port_id : port_id->id;
2053         ret = mlx5_port_to_eswitch_info(port, &act_port_domain_id, NULL);
2054         if (ret)
2055                 return rte_flow_error_set
2056                                 (error, -ret,
2057                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
2058                                  "failed to obtain E-Switch port id for port");
2059         if (act_port_domain_id != esw_domain_id)
2060                 return rte_flow_error_set
2061                                 (error, -ret,
2062                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2063                                  "port does not belong to"
2064                                  " E-Switch being configured");
2065         return 0;
2066 }
2067
2068 /**
2069  * Find existing modify-header resource or create and register a new one.
2070  *
2071  * @param dev[in, out]
2072  *   Pointer to rte_eth_dev structure.
2073  * @param[in, out] resource
2074  *   Pointer to modify-header resource.
2075  * @parm[in, out] dev_flow
2076  *   Pointer to the dev_flow.
2077  * @param[out] error
2078  *   pointer to error structure.
2079  *
2080  * @return
2081  *   0 on success otherwise -errno and errno is set.
2082  */
2083 static int
2084 flow_dv_modify_hdr_resource_register
2085                         (struct rte_eth_dev *dev,
2086                          struct mlx5_flow_dv_modify_hdr_resource *resource,
2087                          struct mlx5_flow *dev_flow,
2088                          struct rte_flow_error *error)
2089 {
2090         struct mlx5_priv *priv = dev->data->dev_private;
2091         struct mlx5_ibv_shared *sh = priv->sh;
2092         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
2093         struct mlx5dv_dr_domain *ns;
2094
2095         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2096                 ns = sh->fdb_domain;
2097         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
2098                 ns = sh->tx_domain;
2099         else
2100                 ns = sh->rx_domain;
2101         resource->flags =
2102                 dev_flow->flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
2103         /* Lookup a matching resource from cache. */
2104         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
2105                 if (resource->ft_type == cache_resource->ft_type &&
2106                     resource->actions_num == cache_resource->actions_num &&
2107                     resource->flags == cache_resource->flags &&
2108                     !memcmp((const void *)resource->actions,
2109                             (const void *)cache_resource->actions,
2110                             (resource->actions_num *
2111                                             sizeof(resource->actions[0])))) {
2112                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
2113                                 (void *)cache_resource,
2114                                 rte_atomic32_read(&cache_resource->refcnt));
2115                         rte_atomic32_inc(&cache_resource->refcnt);
2116                         dev_flow->dv.modify_hdr = cache_resource;
2117                         return 0;
2118                 }
2119         }
2120         /* Register new modify-header resource. */
2121         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2122         if (!cache_resource)
2123                 return rte_flow_error_set(error, ENOMEM,
2124                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2125                                           "cannot allocate resource memory");
2126         *cache_resource = *resource;
2127         cache_resource->verbs_action =
2128                 mlx5_glue->dv_create_flow_action_modify_header
2129                                         (sh->ctx, cache_resource->ft_type,
2130                                          ns, cache_resource->flags,
2131                                          cache_resource->actions_num *
2132                                          sizeof(cache_resource->actions[0]),
2133                                          (uint64_t *)cache_resource->actions);
2134         if (!cache_resource->verbs_action) {
2135                 rte_free(cache_resource);
2136                 return rte_flow_error_set(error, ENOMEM,
2137                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2138                                           NULL, "cannot create action");
2139         }
2140         rte_atomic32_init(&cache_resource->refcnt);
2141         rte_atomic32_inc(&cache_resource->refcnt);
2142         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
2143         dev_flow->dv.modify_hdr = cache_resource;
2144         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
2145                 (void *)cache_resource,
2146                 rte_atomic32_read(&cache_resource->refcnt));
2147         return 0;
2148 }
2149
2150 #define MLX5_CNT_CONTAINER_RESIZE 64
2151 #define MLX5_CNT_CONTAINER(priv, batch) (&(priv)->sh->cmng.ccont[batch])
2152
2153 /**
2154  * Get a pool by a counter.
2155  *
2156  * @param[in] cnt
2157  *   Pointer to the counter.
2158  *
2159  * @return
2160  *   The counter pool.
2161  */
2162 static struct mlx5_flow_counter_pool *
2163 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
2164 {
2165         if (!cnt->batch) {
2166                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
2167                 return (struct mlx5_flow_counter_pool *)cnt - 1;
2168         }
2169         return cnt->pool;
2170 }
2171
2172 /**
2173  * Get a pool by devx counter ID.
2174  *
2175  * @param[in] cont
2176  *   Pointer to the counter container.
2177  * @param[in] id
2178  *   The counter devx ID.
2179  *
2180  * @return
2181  *   The counter pool pointer if exists, NULL otherwise,
2182  */
2183 static struct mlx5_flow_counter_pool *
2184 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
2185 {
2186         struct mlx5_flow_counter_pool *pool;
2187
2188         TAILQ_FOREACH(pool, &cont->pool_list, next) {
2189                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
2190                                 MLX5_COUNTERS_PER_POOL;
2191
2192                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
2193                         return pool;
2194         };
2195         return NULL;
2196 }
2197
2198 /**
2199  * Allocate a new memory for the counter values wrapped by all the needed
2200  * management.
2201  *
2202  * @param[in] dev
2203  *   Pointer to the Ethernet device structure.
2204  * @param[in] raws_n
2205  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
2206  *
2207  * @return
2208  *   The new memory management pointer on success, otherwise NULL and rte_errno
2209  *   is set.
2210  */
2211 static struct mlx5_counter_stats_mem_mng *
2212 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
2213 {
2214         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
2215                                         (dev->data->dev_private))->sh;
2216         struct mlx5dv_pd dv_pd;
2217         struct mlx5dv_obj dv_obj;
2218         struct mlx5_devx_mkey_attr mkey_attr;
2219         struct mlx5_counter_stats_mem_mng *mem_mng;
2220         volatile struct flow_counter_stats *raw_data;
2221         int size = (sizeof(struct flow_counter_stats) *
2222                         MLX5_COUNTERS_PER_POOL +
2223                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
2224                         sizeof(struct mlx5_counter_stats_mem_mng);
2225         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
2226         int i;
2227
2228         if (!mem) {
2229                 rte_errno = ENOMEM;
2230                 return NULL;
2231         }
2232         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
2233         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
2234         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
2235                                                  IBV_ACCESS_LOCAL_WRITE);
2236         if (!mem_mng->umem) {
2237                 rte_errno = errno;
2238                 rte_free(mem);
2239                 return NULL;
2240         }
2241         dv_obj.pd.in = sh->pd;
2242         dv_obj.pd.out = &dv_pd;
2243         mlx5_glue->dv_init_obj(&dv_obj, MLX5DV_OBJ_PD);
2244         mkey_attr.addr = (uintptr_t)mem;
2245         mkey_attr.size = size;
2246         mkey_attr.umem_id = mem_mng->umem->umem_id;
2247         mkey_attr.pd = dv_pd.pdn;
2248         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
2249         if (!mem_mng->dm) {
2250                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
2251                 rte_errno = errno;
2252                 rte_free(mem);
2253                 return NULL;
2254         }
2255         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
2256         raw_data = (volatile struct flow_counter_stats *)mem;
2257         for (i = 0; i < raws_n; ++i) {
2258                 mem_mng->raws[i].mem_mng = mem_mng;
2259                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
2260         }
2261         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
2262         return mem_mng;
2263 }
2264
2265 /**
2266  * Resize a counter container.
2267  *
2268  * @param[in] dev
2269  *   Pointer to the Ethernet device structure.
2270  * @param[in] batch
2271  *   Whether the pool is for counter that was allocated by batch command.
2272  *
2273  * @return
2274  *   The container pointer on success, otherwise NULL and rte_errno is set.
2275  */
2276 static struct mlx5_pools_container *
2277 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
2278 {
2279         struct mlx5_priv *priv = dev->data->dev_private;
2280         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv, batch);
2281         struct mlx5_counter_stats_mem_mng *mem_mng;
2282         uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
2283         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
2284         struct mlx5_flow_counter_pool **new_pools = rte_calloc(__func__, 1,
2285                                                                mem_size, 0);
2286         if (!new_pools) {
2287                 rte_errno = ENOMEM;
2288                 return NULL;
2289         }
2290         mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
2291                                                     MLX5_CNT_CONTAINER_RESIZE);
2292         if (!mem_mng) {
2293                 rte_free(new_pools);
2294                 return NULL;
2295         }
2296         if (cont->n) {
2297                 memcpy(new_pools, cont->pools,
2298                        cont->n * sizeof(struct mlx5_flow_counter_pool *));
2299                 rte_free(cont->pools);
2300         } else {
2301                 TAILQ_INIT(&cont->pool_list);
2302         }
2303         cont->pools = new_pools;
2304         cont->n = resize;
2305         cont->init_mem_mng = mem_mng;
2306         return cont;
2307 }
2308
2309 /**
2310  * Query a devx flow counter.
2311  *
2312  * @param[in] dev
2313  *   Pointer to the Ethernet device structure.
2314  * @param[in] cnt
2315  *   Pointer to the flow counter.
2316  * @param[out] pkts
2317  *   The statistics value of packets.
2318  * @param[out] bytes
2319  *   The statistics value of bytes.
2320  *
2321  * @return
2322  *   0 on success, otherwise a negative errno value and rte_errno is set.
2323  */
2324 static inline int
2325 _flow_dv_query_count(struct rte_eth_dev *dev __rte_unused,
2326                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
2327                      uint64_t *bytes)
2328 {
2329         struct mlx5_flow_counter_pool *pool =
2330                         flow_dv_counter_pool_get(cnt);
2331         uint16_t offset = pool->min_dcs->id % MLX5_COUNTERS_PER_POOL;
2332         int ret = mlx5_devx_cmd_flow_counter_query
2333                 (pool->min_dcs, 0, MLX5_COUNTERS_PER_POOL - offset, NULL,
2334                  NULL, pool->raw->mem_mng->dm->id,
2335                  (void *)(uintptr_t)(pool->raw->data +
2336                  offset));
2337
2338         if (ret) {
2339                 DRV_LOG(ERR, "Failed to trigger synchronous"
2340                         " query for dcs ID %d\n",
2341                         pool->min_dcs->id);
2342                 return ret;
2343         }
2344         offset = cnt - &pool->counters_raw[0];
2345         *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
2346         *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
2347         return 0;
2348 }
2349
2350 /**
2351  * Create and initialize a new counter pool.
2352  *
2353  * @param[in] dev
2354  *   Pointer to the Ethernet device structure.
2355  * @param[out] dcs
2356  *   The devX counter handle.
2357  * @param[in] batch
2358  *   Whether the pool is for counter that was allocated by batch command.
2359  *
2360  * @return
2361  *   A new pool pointer on success, NULL otherwise and rte_errno is set.
2362  */
2363 static struct mlx5_flow_counter_pool *
2364 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
2365                     uint32_t batch)
2366 {
2367         struct mlx5_priv *priv = dev->data->dev_private;
2368         struct mlx5_flow_counter_pool *pool;
2369         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv, batch);
2370         uint32_t size;
2371
2372         if (cont->n == cont->n_valid) {
2373                 cont = flow_dv_container_resize(dev, batch);
2374                 if (!cont)
2375                         return NULL;
2376         }
2377         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
2378                         sizeof(struct mlx5_flow_counter);
2379         pool = rte_calloc(__func__, 1, size, 0);
2380         if (!pool) {
2381                 rte_errno = ENOMEM;
2382                 return NULL;
2383         }
2384         pool->min_dcs = dcs;
2385         pool->raw = cont->init_mem_mng->raws + cont->n_valid  %
2386                         MLX5_CNT_CONTAINER_RESIZE;
2387         TAILQ_INIT(&pool->counters);
2388         TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
2389         cont->pools[cont->n_valid] = pool;
2390         cont->n_valid++;
2391         return pool;
2392 }
2393
2394 /**
2395  * Prepare a new counter and/or a new counter pool.
2396  *
2397  * @param[in] dev
2398  *   Pointer to the Ethernet device structure.
2399  * @param[out] cnt_free
2400  *   Where to put the pointer of a new counter.
2401  * @param[in] batch
2402  *   Whether the pool is for counter that was allocated by batch command.
2403  *
2404  * @return
2405  *   The free counter pool pointer and @p cnt_free is set on success,
2406  *   NULL otherwise and rte_errno is set.
2407  */
2408 static struct mlx5_flow_counter_pool *
2409 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
2410                              struct mlx5_flow_counter **cnt_free,
2411                              uint32_t batch)
2412 {
2413         struct mlx5_priv *priv = dev->data->dev_private;
2414         struct mlx5_flow_counter_pool *pool;
2415         struct mlx5_devx_obj *dcs = NULL;
2416         struct mlx5_flow_counter *cnt;
2417         uint32_t i;
2418
2419         if (!batch) {
2420                 /* bulk_bitmap must be 0 for single counter allocation. */
2421                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
2422                 if (!dcs)
2423                         return NULL;
2424                 pool = flow_dv_find_pool_by_id(MLX5_CNT_CONTAINER(priv, batch),
2425                                                dcs->id);
2426                 if (!pool) {
2427                         pool = flow_dv_pool_create(dev, dcs, batch);
2428                         if (!pool) {
2429                                 mlx5_devx_cmd_destroy(dcs);
2430                                 return NULL;
2431                         }
2432                 } else if (dcs->id < pool->min_dcs->id) {
2433                         pool->min_dcs->id = dcs->id;
2434                 }
2435                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
2436                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
2437                 cnt->dcs = dcs;
2438                 *cnt_free = cnt;
2439                 return pool;
2440         }
2441         /* bulk_bitmap is in 128 counters units. */
2442         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
2443                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
2444         if (!dcs) {
2445                 rte_errno = ENODATA;
2446                 return NULL;
2447         }
2448         pool = flow_dv_pool_create(dev, dcs, batch);
2449         if (!pool) {
2450                 mlx5_devx_cmd_destroy(dcs);
2451                 return NULL;
2452         }
2453         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
2454                 cnt = &pool->counters_raw[i];
2455                 cnt->pool = pool;
2456                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
2457         }
2458         *cnt_free = &pool->counters_raw[0];
2459         return pool;
2460 }
2461
2462 /**
2463  * Search for existed shared counter.
2464  *
2465  * @param[in] cont
2466  *   Pointer to the relevant counter pool container.
2467  * @param[in] id
2468  *   The shared counter ID to search.
2469  *
2470  * @return
2471  *   NULL if not existed, otherwise pointer to the shared counter.
2472  */
2473 static struct mlx5_flow_counter *
2474 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
2475                               uint32_t id)
2476 {
2477         static struct mlx5_flow_counter *cnt;
2478         struct mlx5_flow_counter_pool *pool;
2479         int i;
2480
2481         TAILQ_FOREACH(pool, &cont->pool_list, next) {
2482                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
2483                         cnt = &pool->counters_raw[i];
2484                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
2485                                 return cnt;
2486                 }
2487         }
2488         return NULL;
2489 }
2490
2491 /**
2492  * Allocate a flow counter.
2493  *
2494  * @param[in] dev
2495  *   Pointer to the Ethernet device structure.
2496  * @param[in] shared
2497  *   Indicate if this counter is shared with other flows.
2498  * @param[in] id
2499  *   Counter identifier.
2500  * @param[in] group
2501  *   Counter flow group.
2502  *
2503  * @return
2504  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
2505  */
2506 static struct mlx5_flow_counter *
2507 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
2508                       uint16_t group)
2509 {
2510         struct mlx5_priv *priv = dev->data->dev_private;
2511         struct mlx5_flow_counter_pool *pool = NULL;
2512         struct mlx5_flow_counter *cnt_free = NULL;
2513         /*
2514          * Currently group 0 flow counter cannot be assigned to a flow if it is
2515          * not the first one in the batch counter allocation, so it is better
2516          * to allocate counters one by one for these flows in a separate
2517          * container.
2518          * A counter can be shared between different groups so need to take
2519          * shared counters from the single container.
2520          */
2521         uint32_t batch = (group && !shared) ? 1 : 0;
2522         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv, batch);
2523
2524         if (!priv->config.devx) {
2525                 rte_errno = ENOTSUP;
2526                 return NULL;
2527         }
2528         if (shared) {
2529                 cnt_free = flow_dv_counter_shared_search(cont, id);
2530                 if (cnt_free) {
2531                         if (cnt_free->ref_cnt + 1 == 0) {
2532                                 rte_errno = E2BIG;
2533                                 return NULL;
2534                         }
2535                         cnt_free->ref_cnt++;
2536                         return cnt_free;
2537                 }
2538         }
2539         /* Pools which has a free counters are in the start. */
2540         pool = TAILQ_FIRST(&cont->pool_list);
2541         if (pool)
2542                 cnt_free = TAILQ_FIRST(&pool->counters);
2543         if (!cnt_free) {
2544                 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
2545                 if (!pool)
2546                         return NULL;
2547         }
2548         cnt_free->batch = batch;
2549         /* Create a DV counter action only in the first time usage. */
2550         if (!cnt_free->action) {
2551                 uint16_t offset;
2552                 struct mlx5_devx_obj *dcs;
2553
2554                 if (batch) {
2555                         offset = cnt_free - &pool->counters_raw[0];
2556                         dcs = pool->min_dcs;
2557                 } else {
2558                         offset = 0;
2559                         dcs = cnt_free->dcs;
2560                 }
2561                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
2562                                         (dcs->obj, offset);
2563                 if (!cnt_free->action) {
2564                         rte_errno = errno;
2565                         return NULL;
2566                 }
2567         }
2568         /* Update the counter reset values. */
2569         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
2570                                  &cnt_free->bytes))
2571                 return NULL;
2572         cnt_free->shared = shared;
2573         cnt_free->ref_cnt = 1;
2574         cnt_free->id = id;
2575         TAILQ_REMOVE(&pool->counters, cnt_free, next);
2576         if (TAILQ_EMPTY(&pool->counters)) {
2577                 /* Move the pool to the end of the container pool list. */
2578                 TAILQ_REMOVE(&cont->pool_list, pool, next);
2579                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
2580         }
2581         return cnt_free;
2582 }
2583
2584 /**
2585  * Release a flow counter.
2586  *
2587  * @param[in] dev
2588  *   Pointer to the Ethernet device structure.
2589  * @param[in] counter
2590  *   Pointer to the counter handler.
2591  */
2592 static void
2593 flow_dv_counter_release(struct rte_eth_dev *dev __rte_unused,
2594                         struct mlx5_flow_counter *counter)
2595 {
2596         if (!counter)
2597                 return;
2598         if (--counter->ref_cnt == 0) {
2599                 struct mlx5_flow_counter_pool *pool =
2600                                 flow_dv_counter_pool_get(counter);
2601
2602                 /* Put the counter in the end - the earliest one. */
2603                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
2604         }
2605 }
2606
2607 /**
2608  * Verify the @p attributes will be correctly understood by the NIC and store
2609  * them in the @p flow if everything is correct.
2610  *
2611  * @param[in] dev
2612  *   Pointer to dev struct.
2613  * @param[in] attributes
2614  *   Pointer to flow attributes
2615  * @param[out] error
2616  *   Pointer to error structure.
2617  *
2618  * @return
2619  *   0 on success, a negative errno value otherwise and rte_errno is set.
2620  */
2621 static int
2622 flow_dv_validate_attributes(struct rte_eth_dev *dev,
2623                             const struct rte_flow_attr *attributes,
2624                             struct rte_flow_error *error)
2625 {
2626         struct mlx5_priv *priv = dev->data->dev_private;
2627         uint32_t priority_max = priv->config.flow_prio - 1;
2628
2629 #ifndef HAVE_MLX5DV_DR
2630         if (attributes->group)
2631                 return rte_flow_error_set(error, ENOTSUP,
2632                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
2633                                           NULL,
2634                                           "groups is not supported");
2635 #endif
2636         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
2637             attributes->priority >= priority_max)
2638                 return rte_flow_error_set(error, ENOTSUP,
2639                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
2640                                           NULL,
2641                                           "priority out of range");
2642         if (attributes->transfer) {
2643                 if (!priv->config.dv_esw_en)
2644                         return rte_flow_error_set
2645                                 (error, ENOTSUP,
2646                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2647                                  "E-Switch dr is not supported");
2648                 if (!(priv->representor || priv->master))
2649                         return rte_flow_error_set
2650                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2651                                  NULL, "E-Switch configurationd can only be"
2652                                  " done by a master or a representor device");
2653                 if (attributes->egress)
2654                         return rte_flow_error_set
2655                                 (error, ENOTSUP,
2656                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
2657                                  "egress is not supported");
2658                 if (attributes->group >= MLX5_MAX_TABLES_FDB)
2659                         return rte_flow_error_set
2660                                 (error, EINVAL,
2661                                  RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
2662                                  NULL, "group must be smaller than "
2663                                  RTE_STR(MLX5_MAX_FDB_TABLES));
2664         }
2665         if (!(attributes->egress ^ attributes->ingress))
2666                 return rte_flow_error_set(error, ENOTSUP,
2667                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
2668                                           "must specify exactly one of "
2669                                           "ingress or egress");
2670         return 0;
2671 }
2672
2673 /**
2674  * Internal validation function. For validating both actions and items.
2675  *
2676  * @param[in] dev
2677  *   Pointer to the rte_eth_dev structure.
2678  * @param[in] attr
2679  *   Pointer to the flow attributes.
2680  * @param[in] items
2681  *   Pointer to the list of items.
2682  * @param[in] actions
2683  *   Pointer to the list of actions.
2684  * @param[out] error
2685  *   Pointer to the error structure.
2686  *
2687  * @return
2688  *   0 on success, a negative errno value otherwise and rte_errno is set.
2689  */
2690 static int
2691 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
2692                  const struct rte_flow_item items[],
2693                  const struct rte_flow_action actions[],
2694                  struct rte_flow_error *error)
2695 {
2696         int ret;
2697         uint64_t action_flags = 0;
2698         uint64_t item_flags = 0;
2699         uint64_t last_item = 0;
2700         uint8_t next_protocol = 0xff;
2701         int actions_n = 0;
2702         const struct rte_flow_item *gre_item = NULL;
2703         struct rte_flow_item_tcp nic_tcp_mask = {
2704                 .hdr = {
2705                         .tcp_flags = 0xFF,
2706                         .src_port = RTE_BE16(UINT16_MAX),
2707                         .dst_port = RTE_BE16(UINT16_MAX),
2708                 }
2709         };
2710
2711         if (items == NULL)
2712                 return -1;
2713         ret = flow_dv_validate_attributes(dev, attr, error);
2714         if (ret < 0)
2715                 return ret;
2716         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2717                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2718                 switch (items->type) {
2719                 case RTE_FLOW_ITEM_TYPE_VOID:
2720                         break;
2721                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
2722                         ret = flow_dv_validate_item_port_id
2723                                         (dev, items, attr, item_flags, error);
2724                         if (ret < 0)
2725                                 return ret;
2726                         last_item |= MLX5_FLOW_ITEM_PORT_ID;
2727                         break;
2728                 case RTE_FLOW_ITEM_TYPE_ETH:
2729                         ret = mlx5_flow_validate_item_eth(items, item_flags,
2730                                                           error);
2731                         if (ret < 0)
2732                                 return ret;
2733                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
2734                                              MLX5_FLOW_LAYER_OUTER_L2;
2735                         break;
2736                 case RTE_FLOW_ITEM_TYPE_VLAN:
2737                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
2738                                                            error);
2739                         if (ret < 0)
2740                                 return ret;
2741                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2742                                              MLX5_FLOW_LAYER_OUTER_VLAN;
2743                         break;
2744                 case RTE_FLOW_ITEM_TYPE_IPV4:
2745                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
2746                                                            NULL, error);
2747                         if (ret < 0)
2748                                 return ret;
2749                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
2750                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
2751                         if (items->mask != NULL &&
2752                             ((const struct rte_flow_item_ipv4 *)
2753                              items->mask)->hdr.next_proto_id) {
2754                                 next_protocol =
2755                                         ((const struct rte_flow_item_ipv4 *)
2756                                          (items->spec))->hdr.next_proto_id;
2757                                 next_protocol &=
2758                                         ((const struct rte_flow_item_ipv4 *)
2759                                          (items->mask))->hdr.next_proto_id;
2760                         } else {
2761                                 /* Reset for inner layer. */
2762                                 next_protocol = 0xff;
2763                         }
2764                         mlx5_flow_tunnel_ip_check(items, &last_item);
2765                         break;
2766                 case RTE_FLOW_ITEM_TYPE_IPV6:
2767                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
2768                                                            NULL, error);
2769                         if (ret < 0)
2770                                 return ret;
2771                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
2772                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
2773                         if (items->mask != NULL &&
2774                             ((const struct rte_flow_item_ipv6 *)
2775                              items->mask)->hdr.proto) {
2776                                 next_protocol =
2777                                         ((const struct rte_flow_item_ipv6 *)
2778                                          items->spec)->hdr.proto;
2779                                 next_protocol &=
2780                                         ((const struct rte_flow_item_ipv6 *)
2781                                          items->mask)->hdr.proto;
2782                         } else {
2783                                 /* Reset for inner layer. */
2784                                 next_protocol = 0xff;
2785                         }
2786                         mlx5_flow_tunnel_ip_check(items, &last_item);
2787                         break;
2788                 case RTE_FLOW_ITEM_TYPE_TCP:
2789                         ret = mlx5_flow_validate_item_tcp
2790                                                 (items, item_flags,
2791                                                  next_protocol,
2792                                                  &nic_tcp_mask,
2793                                                  error);
2794                         if (ret < 0)
2795                                 return ret;
2796                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
2797                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
2798                         break;
2799                 case RTE_FLOW_ITEM_TYPE_UDP:
2800                         ret = mlx5_flow_validate_item_udp(items, item_flags,
2801                                                           next_protocol,
2802                                                           error);
2803                         if (ret < 0)
2804                                 return ret;
2805                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
2806                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
2807                         break;
2808                 case RTE_FLOW_ITEM_TYPE_GRE:
2809                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2810                         ret = mlx5_flow_validate_item_gre(items, item_flags,
2811                                                           next_protocol, error);
2812                         if (ret < 0)
2813                                 return ret;
2814                         gre_item = items;
2815                         last_item = MLX5_FLOW_LAYER_GRE;
2816                         break;
2817                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
2818                         ret = mlx5_flow_validate_item_gre_key
2819                                 (items, item_flags, gre_item, error);
2820                         if (ret < 0)
2821                                 return ret;
2822                         item_flags |= MLX5_FLOW_LAYER_GRE_KEY;
2823                         break;
2824                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2825                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
2826                                                             error);
2827                         if (ret < 0)
2828                                 return ret;
2829                         last_item = MLX5_FLOW_LAYER_VXLAN;
2830                         break;
2831                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2832                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
2833                                                                 item_flags, dev,
2834                                                                 error);
2835                         if (ret < 0)
2836                                 return ret;
2837                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
2838                         break;
2839                 case RTE_FLOW_ITEM_TYPE_MPLS:
2840                         ret = mlx5_flow_validate_item_mpls(dev, items,
2841                                                            item_flags,
2842                                                            last_item, error);
2843                         if (ret < 0)
2844                                 return ret;
2845                         last_item = MLX5_FLOW_LAYER_MPLS;
2846                         break;
2847                 case RTE_FLOW_ITEM_TYPE_META:
2848                         ret = flow_dv_validate_item_meta(dev, items, attr,
2849                                                          error);
2850                         if (ret < 0)
2851                                 return ret;
2852                         last_item = MLX5_FLOW_ITEM_METADATA;
2853                         break;
2854                 case RTE_FLOW_ITEM_TYPE_ICMP:
2855                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
2856                                                            next_protocol,
2857                                                            error);
2858                         if (ret < 0)
2859                                 return ret;
2860                         item_flags |= MLX5_FLOW_LAYER_ICMP;
2861                         break;
2862                 case RTE_FLOW_ITEM_TYPE_ICMP6:
2863                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
2864                                                             next_protocol,
2865                                                             error);
2866                         if (ret < 0)
2867                                 return ret;
2868                         item_flags |= MLX5_FLOW_LAYER_ICMP6;
2869                         break;
2870                 default:
2871                         return rte_flow_error_set(error, ENOTSUP,
2872                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2873                                                   NULL, "item not supported");
2874                 }
2875                 item_flags |= last_item;
2876         }
2877         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2878                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
2879                         return rte_flow_error_set(error, ENOTSUP,
2880                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2881                                                   actions, "too many actions");
2882                 switch (actions->type) {
2883                 case RTE_FLOW_ACTION_TYPE_VOID:
2884                         break;
2885                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
2886                         ret = flow_dv_validate_action_port_id(dev,
2887                                                               action_flags,
2888                                                               actions,
2889                                                               attr,
2890                                                               error);
2891                         if (ret)
2892                                 return ret;
2893                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
2894                         ++actions_n;
2895                         break;
2896                 case RTE_FLOW_ACTION_TYPE_FLAG:
2897                         ret = mlx5_flow_validate_action_flag(action_flags,
2898                                                              attr, error);
2899                         if (ret < 0)
2900                                 return ret;
2901                         action_flags |= MLX5_FLOW_ACTION_FLAG;
2902                         ++actions_n;
2903                         break;
2904                 case RTE_FLOW_ACTION_TYPE_MARK:
2905                         ret = mlx5_flow_validate_action_mark(actions,
2906                                                              action_flags,
2907                                                              attr, error);
2908                         if (ret < 0)
2909                                 return ret;
2910                         action_flags |= MLX5_FLOW_ACTION_MARK;
2911                         ++actions_n;
2912                         break;
2913                 case RTE_FLOW_ACTION_TYPE_DROP:
2914                         ret = mlx5_flow_validate_action_drop(action_flags,
2915                                                              attr, error);
2916                         if (ret < 0)
2917                                 return ret;
2918                         action_flags |= MLX5_FLOW_ACTION_DROP;
2919                         ++actions_n;
2920                         break;
2921                 case RTE_FLOW_ACTION_TYPE_QUEUE:
2922                         ret = mlx5_flow_validate_action_queue(actions,
2923                                                               action_flags, dev,
2924                                                               attr, error);
2925                         if (ret < 0)
2926                                 return ret;
2927                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
2928                         ++actions_n;
2929                         break;
2930                 case RTE_FLOW_ACTION_TYPE_RSS:
2931                         ret = mlx5_flow_validate_action_rss(actions,
2932                                                             action_flags, dev,
2933                                                             attr, item_flags,
2934                                                             error);
2935                         if (ret < 0)
2936                                 return ret;
2937                         action_flags |= MLX5_FLOW_ACTION_RSS;
2938                         ++actions_n;
2939                         break;
2940                 case RTE_FLOW_ACTION_TYPE_COUNT:
2941                         ret = flow_dv_validate_action_count(dev, error);
2942                         if (ret < 0)
2943                                 return ret;
2944                         action_flags |= MLX5_FLOW_ACTION_COUNT;
2945                         ++actions_n;
2946                         break;
2947                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
2948                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
2949                         ret = flow_dv_validate_action_l2_encap(action_flags,
2950                                                                actions, attr,
2951                                                                error);
2952                         if (ret < 0)
2953                                 return ret;
2954                         action_flags |= actions->type ==
2955                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
2956                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
2957                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
2958                         ++actions_n;
2959                         break;
2960                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
2961                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
2962                         ret = flow_dv_validate_action_l2_decap(action_flags,
2963                                                                attr, error);
2964                         if (ret < 0)
2965                                 return ret;
2966                         action_flags |= actions->type ==
2967                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
2968                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
2969                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
2970                         ++actions_n;
2971                         break;
2972                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
2973                         ret = flow_dv_validate_action_raw_encap(action_flags,
2974                                                                 actions, attr,
2975                                                                 error);
2976                         if (ret < 0)
2977                                 return ret;
2978                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
2979                         ++actions_n;
2980                         break;
2981                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
2982                         ret = flow_dv_validate_action_raw_decap(action_flags,
2983                                                                 actions, attr,
2984                                                                 error);
2985                         if (ret < 0)
2986                                 return ret;
2987                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
2988                         ++actions_n;
2989                         break;
2990                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
2991                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
2992                         ret = flow_dv_validate_action_modify_mac(action_flags,
2993                                                                  actions,
2994                                                                  item_flags,
2995                                                                  error);
2996                         if (ret < 0)
2997                                 return ret;
2998                         /* Count all modify-header actions as one action. */
2999                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3000                                 ++actions_n;
3001                         action_flags |= actions->type ==
3002                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
3003                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
3004                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
3005                         break;
3006
3007                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
3008                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
3009                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
3010                                                                   actions,
3011                                                                   item_flags,
3012                                                                   error);
3013                         if (ret < 0)
3014                                 return ret;
3015                         /* Count all modify-header actions as one action. */
3016                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3017                                 ++actions_n;
3018                         action_flags |= actions->type ==
3019                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
3020                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
3021                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
3022                         break;
3023                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
3024                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
3025                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
3026                                                                   actions,
3027                                                                   item_flags,
3028                                                                   error);
3029                         if (ret < 0)
3030                                 return ret;
3031                         /* Count all modify-header actions as one action. */
3032                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3033                                 ++actions_n;
3034                         action_flags |= actions->type ==
3035                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
3036                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
3037                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
3038                         break;
3039                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
3040                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
3041                         ret = flow_dv_validate_action_modify_tp(action_flags,
3042                                                                 actions,
3043                                                                 item_flags,
3044                                                                 error);
3045                         if (ret < 0)
3046                                 return ret;
3047                         /* Count all modify-header actions as one action. */
3048                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3049                                 ++actions_n;
3050                         action_flags |= actions->type ==
3051                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
3052                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
3053                                                 MLX5_FLOW_ACTION_SET_TP_DST;
3054                         break;
3055                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
3056                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
3057                         ret = flow_dv_validate_action_modify_ttl(action_flags,
3058                                                                  actions,
3059                                                                  item_flags,
3060                                                                  error);
3061                         if (ret < 0)
3062                                 return ret;
3063                         /* Count all modify-header actions as one action. */
3064                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3065                                 ++actions_n;
3066                         action_flags |= actions->type ==
3067                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
3068                                                 MLX5_FLOW_ACTION_SET_TTL :
3069                                                 MLX5_FLOW_ACTION_DEC_TTL;
3070                         break;
3071                 case RTE_FLOW_ACTION_TYPE_JUMP:
3072                         ret = flow_dv_validate_action_jump(actions,
3073                                                            attr->group, error);
3074                         if (ret)
3075                                 return ret;
3076                         ++actions_n;
3077                         action_flags |= MLX5_FLOW_ACTION_JUMP;
3078                         break;
3079                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
3080                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
3081                         ret = flow_dv_validate_action_modify_tcp_seq
3082                                                                 (action_flags,
3083                                                                  actions,
3084                                                                  item_flags,
3085                                                                  error);
3086                         if (ret < 0)
3087                                 return ret;
3088                         /* Count all modify-header actions as one action. */
3089                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3090                                 ++actions_n;
3091                         action_flags |= actions->type ==
3092                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
3093                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
3094                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
3095                         break;
3096                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
3097                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
3098                         ret = flow_dv_validate_action_modify_tcp_ack
3099                                                                 (action_flags,
3100                                                                  actions,
3101                                                                  item_flags,
3102                                                                  error);
3103                         if (ret < 0)
3104                                 return ret;
3105                         /* Count all modify-header actions as one action. */
3106                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3107                                 ++actions_n;
3108                         action_flags |= actions->type ==
3109                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
3110                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
3111                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
3112                         break;
3113                 default:
3114                         return rte_flow_error_set(error, ENOTSUP,
3115                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3116                                                   actions,
3117                                                   "action not supported");
3118                 }
3119         }
3120         /* Eswitch has few restrictions on using items and actions */
3121         if (attr->transfer) {
3122                 if (action_flags & MLX5_FLOW_ACTION_FLAG)
3123                         return rte_flow_error_set(error, ENOTSUP,
3124                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3125                                                   NULL,
3126                                                   "unsupported action FLAG");
3127                 if (action_flags & MLX5_FLOW_ACTION_MARK)
3128                         return rte_flow_error_set(error, ENOTSUP,
3129                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3130                                                   NULL,
3131                                                   "unsupported action MARK");
3132                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
3133                         return rte_flow_error_set(error, ENOTSUP,
3134                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3135                                                   NULL,
3136                                                   "unsupported action QUEUE");
3137                 if (action_flags & MLX5_FLOW_ACTION_RSS)
3138                         return rte_flow_error_set(error, ENOTSUP,
3139                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3140                                                   NULL,
3141                                                   "unsupported action RSS");
3142                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3143                         return rte_flow_error_set(error, EINVAL,
3144                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3145                                                   actions,
3146                                                   "no fate action is found");
3147         } else {
3148                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
3149                         return rte_flow_error_set(error, EINVAL,
3150                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3151                                                   actions,
3152                                                   "no fate action is found");
3153         }
3154         return 0;
3155 }
3156
3157 /**
3158  * Internal preparation function. Allocates the DV flow size,
3159  * this size is constant.
3160  *
3161  * @param[in] attr
3162  *   Pointer to the flow attributes.
3163  * @param[in] items
3164  *   Pointer to the list of items.
3165  * @param[in] actions
3166  *   Pointer to the list of actions.
3167  * @param[out] error
3168  *   Pointer to the error structure.
3169  *
3170  * @return
3171  *   Pointer to mlx5_flow object on success,
3172  *   otherwise NULL and rte_errno is set.
3173  */
3174 static struct mlx5_flow *
3175 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
3176                 const struct rte_flow_item items[] __rte_unused,
3177                 const struct rte_flow_action actions[] __rte_unused,
3178                 struct rte_flow_error *error)
3179 {
3180         uint32_t size = sizeof(struct mlx5_flow);
3181         struct mlx5_flow *flow;
3182
3183         flow = rte_calloc(__func__, 1, size, 0);
3184         if (!flow) {
3185                 rte_flow_error_set(error, ENOMEM,
3186                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3187                                    "not enough memory to create flow");
3188                 return NULL;
3189         }
3190         flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
3191         return flow;
3192 }
3193
3194 #ifndef NDEBUG
3195 /**
3196  * Sanity check for match mask and value. Similar to check_valid_spec() in
3197  * kernel driver. If unmasked bit is present in value, it returns failure.
3198  *
3199  * @param match_mask
3200  *   pointer to match mask buffer.
3201  * @param match_value
3202  *   pointer to match value buffer.
3203  *
3204  * @return
3205  *   0 if valid, -EINVAL otherwise.
3206  */
3207 static int
3208 flow_dv_check_valid_spec(void *match_mask, void *match_value)
3209 {
3210         uint8_t *m = match_mask;
3211         uint8_t *v = match_value;
3212         unsigned int i;
3213
3214         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
3215                 if (v[i] & ~m[i]) {
3216                         DRV_LOG(ERR,
3217                                 "match_value differs from match_criteria"
3218                                 " %p[%u] != %p[%u]",
3219                                 match_value, i, match_mask, i);
3220                         return -EINVAL;
3221                 }
3222         }
3223         return 0;
3224 }
3225 #endif
3226
3227 /**
3228  * Add Ethernet item to matcher and to the value.
3229  *
3230  * @param[in, out] matcher
3231  *   Flow matcher.
3232  * @param[in, out] key
3233  *   Flow matcher value.
3234  * @param[in] item
3235  *   Flow pattern to translate.
3236  * @param[in] inner
3237  *   Item is inner pattern.
3238  */
3239 static void
3240 flow_dv_translate_item_eth(void *matcher, void *key,
3241                            const struct rte_flow_item *item, int inner)
3242 {
3243         const struct rte_flow_item_eth *eth_m = item->mask;
3244         const struct rte_flow_item_eth *eth_v = item->spec;
3245         const struct rte_flow_item_eth nic_mask = {
3246                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
3247                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
3248                 .type = RTE_BE16(0xffff),
3249         };
3250         void *headers_m;
3251         void *headers_v;
3252         char *l24_v;
3253         unsigned int i;
3254
3255         if (!eth_v)
3256                 return;
3257         if (!eth_m)
3258                 eth_m = &nic_mask;
3259         if (inner) {
3260                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3261                                          inner_headers);
3262                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3263         } else {
3264                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3265                                          outer_headers);
3266                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3267         }
3268         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
3269                &eth_m->dst, sizeof(eth_m->dst));
3270         /* The value must be in the range of the mask. */
3271         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
3272         for (i = 0; i < sizeof(eth_m->dst); ++i)
3273                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
3274         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
3275                &eth_m->src, sizeof(eth_m->src));
3276         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
3277         /* The value must be in the range of the mask. */
3278         for (i = 0; i < sizeof(eth_m->dst); ++i)
3279                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
3280         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
3281                  rte_be_to_cpu_16(eth_m->type));
3282         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
3283         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
3284 }
3285
3286 /**
3287  * Add VLAN item to matcher and to the value.
3288  *
3289  * @param[in, out] matcher
3290  *   Flow matcher.
3291  * @param[in, out] key
3292  *   Flow matcher value.
3293  * @param[in] item
3294  *   Flow pattern to translate.
3295  * @param[in] inner
3296  *   Item is inner pattern.
3297  */
3298 static void
3299 flow_dv_translate_item_vlan(void *matcher, void *key,
3300                             const struct rte_flow_item *item,
3301                             int inner)
3302 {
3303         const struct rte_flow_item_vlan *vlan_m = item->mask;
3304         const struct rte_flow_item_vlan *vlan_v = item->spec;
3305         const struct rte_flow_item_vlan nic_mask = {
3306                 .tci = RTE_BE16(0x0fff),
3307                 .inner_type = RTE_BE16(0xffff),
3308         };
3309         void *headers_m;
3310         void *headers_v;
3311         uint16_t tci_m;
3312         uint16_t tci_v;
3313
3314         if (!vlan_v)
3315                 return;
3316         if (!vlan_m)
3317                 vlan_m = &nic_mask;
3318         if (inner) {
3319                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3320                                          inner_headers);
3321                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3322         } else {
3323                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3324                                          outer_headers);
3325                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3326         }
3327         tci_m = rte_be_to_cpu_16(vlan_m->tci);
3328         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
3329         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
3330         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
3331         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
3332         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
3333         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
3334         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
3335         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
3336         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
3337 }
3338
3339 /**
3340  * Add IPV4 item to matcher and to the value.
3341  *
3342  * @param[in, out] matcher
3343  *   Flow matcher.
3344  * @param[in, out] key
3345  *   Flow matcher value.
3346  * @param[in] item
3347  *   Flow pattern to translate.
3348  * @param[in] inner
3349  *   Item is inner pattern.
3350  * @param[in] group
3351  *   The group to insert the rule.
3352  */
3353 static void
3354 flow_dv_translate_item_ipv4(void *matcher, void *key,
3355                             const struct rte_flow_item *item,
3356                             int inner, uint32_t group)
3357 {
3358         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
3359         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
3360         const struct rte_flow_item_ipv4 nic_mask = {
3361                 .hdr = {
3362                         .src_addr = RTE_BE32(0xffffffff),
3363                         .dst_addr = RTE_BE32(0xffffffff),
3364                         .type_of_service = 0xff,
3365                         .next_proto_id = 0xff,
3366                 },
3367         };
3368         void *headers_m;
3369         void *headers_v;
3370         char *l24_m;
3371         char *l24_v;
3372         uint8_t tos;
3373
3374         if (inner) {
3375                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3376                                          inner_headers);
3377                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3378         } else {
3379                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3380                                          outer_headers);
3381                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3382         }
3383         if (group == 0)
3384                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
3385         else
3386                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
3387         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
3388         if (!ipv4_v)
3389                 return;
3390         if (!ipv4_m)
3391                 ipv4_m = &nic_mask;
3392         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
3393                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
3394         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
3395                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
3396         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
3397         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
3398         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
3399                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
3400         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
3401                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
3402         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
3403         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
3404         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
3405         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
3406                  ipv4_m->hdr.type_of_service);
3407         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
3408         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
3409                  ipv4_m->hdr.type_of_service >> 2);
3410         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
3411         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
3412                  ipv4_m->hdr.next_proto_id);
3413         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
3414                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
3415 }
3416
3417 /**
3418  * Add IPV6 item to matcher and to the value.
3419  *
3420  * @param[in, out] matcher
3421  *   Flow matcher.
3422  * @param[in, out] key
3423  *   Flow matcher value.
3424  * @param[in] item
3425  *   Flow pattern to translate.
3426  * @param[in] inner
3427  *   Item is inner pattern.
3428  * @param[in] group
3429  *   The group to insert the rule.
3430  */
3431 static void
3432 flow_dv_translate_item_ipv6(void *matcher, void *key,
3433                             const struct rte_flow_item *item,
3434                             int inner, uint32_t group)
3435 {
3436         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
3437         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
3438         const struct rte_flow_item_ipv6 nic_mask = {
3439                 .hdr = {
3440                         .src_addr =
3441                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
3442                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
3443                         .dst_addr =
3444                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
3445                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
3446                         .vtc_flow = RTE_BE32(0xffffffff),
3447                         .proto = 0xff,
3448                         .hop_limits = 0xff,
3449                 },
3450         };
3451         void *headers_m;
3452         void *headers_v;
3453         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
3454         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
3455         char *l24_m;
3456         char *l24_v;
3457         uint32_t vtc_m;
3458         uint32_t vtc_v;
3459         int i;
3460         int size;
3461
3462         if (inner) {
3463                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3464                                          inner_headers);
3465                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3466         } else {
3467                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3468                                          outer_headers);
3469                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3470         }
3471         if (group == 0)
3472                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
3473         else
3474                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
3475         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
3476         if (!ipv6_v)
3477                 return;
3478         if (!ipv6_m)
3479                 ipv6_m = &nic_mask;
3480         size = sizeof(ipv6_m->hdr.dst_addr);
3481         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
3482                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
3483         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
3484                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
3485         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
3486         for (i = 0; i < size; ++i)
3487                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
3488         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
3489                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
3490         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
3491                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
3492         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
3493         for (i = 0; i < size; ++i)
3494                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
3495         /* TOS. */
3496         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
3497         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
3498         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
3499         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
3500         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
3501         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
3502         /* Label. */
3503         if (inner) {
3504                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
3505                          vtc_m);
3506                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
3507                          vtc_v);
3508         } else {
3509                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
3510                          vtc_m);
3511                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
3512                          vtc_v);
3513         }
3514         /* Protocol. */
3515         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
3516                  ipv6_m->hdr.proto);
3517         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
3518                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
3519 }
3520
3521 /**
3522  * Add TCP item to matcher and to the value.
3523  *
3524  * @param[in, out] matcher
3525  *   Flow matcher.
3526  * @param[in, out] key
3527  *   Flow matcher value.
3528  * @param[in] item
3529  *   Flow pattern to translate.
3530  * @param[in] inner
3531  *   Item is inner pattern.
3532  */
3533 static void
3534 flow_dv_translate_item_tcp(void *matcher, void *key,
3535                            const struct rte_flow_item *item,
3536                            int inner)
3537 {
3538         const struct rte_flow_item_tcp *tcp_m = item->mask;
3539         const struct rte_flow_item_tcp *tcp_v = item->spec;
3540         void *headers_m;
3541         void *headers_v;
3542
3543         if (inner) {
3544                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3545                                          inner_headers);
3546                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3547         } else {
3548                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3549                                          outer_headers);
3550                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3551         }
3552         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
3553         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
3554         if (!tcp_v)
3555                 return;
3556         if (!tcp_m)
3557                 tcp_m = &rte_flow_item_tcp_mask;
3558         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
3559                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
3560         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
3561                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
3562         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
3563                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
3564         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
3565                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
3566         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
3567                  tcp_m->hdr.tcp_flags);
3568         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
3569                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
3570 }
3571
3572 /**
3573  * Add UDP item to matcher and to the value.
3574  *
3575  * @param[in, out] matcher
3576  *   Flow matcher.
3577  * @param[in, out] key
3578  *   Flow matcher value.
3579  * @param[in] item
3580  *   Flow pattern to translate.
3581  * @param[in] inner
3582  *   Item is inner pattern.
3583  */
3584 static void
3585 flow_dv_translate_item_udp(void *matcher, void *key,
3586                            const struct rte_flow_item *item,
3587                            int inner)
3588 {
3589         const struct rte_flow_item_udp *udp_m = item->mask;
3590         const struct rte_flow_item_udp *udp_v = item->spec;
3591         void *headers_m;
3592         void *headers_v;
3593
3594         if (inner) {
3595                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3596                                          inner_headers);
3597                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3598         } else {
3599                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3600                                          outer_headers);
3601                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3602         }
3603         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
3604         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
3605         if (!udp_v)
3606                 return;
3607         if (!udp_m)
3608                 udp_m = &rte_flow_item_udp_mask;
3609         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
3610                  rte_be_to_cpu_16(udp_m->hdr.src_port));
3611         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
3612                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
3613         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
3614                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
3615         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
3616                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
3617 }
3618
3619 /**
3620  * Add GRE optional Key item to matcher and to the value.
3621  *
3622  * @param[in, out] matcher
3623  *   Flow matcher.
3624  * @param[in, out] key
3625  *   Flow matcher value.
3626  * @param[in] item
3627  *   Flow pattern to translate.
3628  * @param[in] inner
3629  *   Item is inner pattern.
3630  */
3631 static void
3632 flow_dv_translate_item_gre_key(void *matcher, void *key,
3633                                    const struct rte_flow_item *item)
3634 {
3635         const rte_be32_t *key_m = item->mask;
3636         const rte_be32_t *key_v = item->spec;
3637         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
3638         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
3639         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
3640
3641         if (!key_v)
3642                 return;
3643         if (!key_m)
3644                 key_m = &gre_key_default_mask;
3645         /* GRE K bit must be on and should already be validated */
3646         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
3647         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
3648         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
3649                  rte_be_to_cpu_32(*key_m) >> 8);
3650         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
3651                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
3652         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
3653                  rte_be_to_cpu_32(*key_m) & 0xFF);
3654         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
3655                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
3656 }
3657
3658 /**
3659  * Add GRE item to matcher and to the value.
3660  *
3661  * @param[in, out] matcher
3662  *   Flow matcher.
3663  * @param[in, out] key
3664  *   Flow matcher value.
3665  * @param[in] item
3666  *   Flow pattern to translate.
3667  * @param[in] inner
3668  *   Item is inner pattern.
3669  */
3670 static void
3671 flow_dv_translate_item_gre(void *matcher, void *key,
3672                            const struct rte_flow_item *item,
3673                            int inner)
3674 {
3675         const struct rte_flow_item_gre *gre_m = item->mask;
3676         const struct rte_flow_item_gre *gre_v = item->spec;
3677         void *headers_m;
3678         void *headers_v;
3679         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
3680         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
3681         struct {
3682                 union {
3683                         __extension__
3684                         struct {
3685                                 uint16_t version:3;
3686                                 uint16_t rsvd0:9;
3687                                 uint16_t s_present:1;
3688                                 uint16_t k_present:1;
3689                                 uint16_t rsvd_bit1:1;
3690                                 uint16_t c_present:1;
3691                         };
3692                         uint16_t value;
3693                 };
3694         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
3695
3696         if (inner) {
3697                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3698                                          inner_headers);
3699                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3700         } else {
3701                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3702                                          outer_headers);
3703                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3704         }
3705         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
3706         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
3707         if (!gre_v)
3708                 return;
3709         if (!gre_m)
3710                 gre_m = &rte_flow_item_gre_mask;
3711         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
3712                  rte_be_to_cpu_16(gre_m->protocol));
3713         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
3714                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
3715         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
3716         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
3717         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
3718                  gre_crks_rsvd0_ver_m.c_present);
3719         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
3720                  gre_crks_rsvd0_ver_v.c_present &
3721                  gre_crks_rsvd0_ver_m.c_present);
3722         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
3723                  gre_crks_rsvd0_ver_m.k_present);
3724         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
3725                  gre_crks_rsvd0_ver_v.k_present &
3726                  gre_crks_rsvd0_ver_m.k_present);
3727         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
3728                  gre_crks_rsvd0_ver_m.s_present);
3729         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
3730                  gre_crks_rsvd0_ver_v.s_present &
3731                  gre_crks_rsvd0_ver_m.s_present);
3732 }
3733
3734 /**
3735  * Add NVGRE item to matcher and to the value.
3736  *
3737  * @param[in, out] matcher
3738  *   Flow matcher.
3739  * @param[in, out] key
3740  *   Flow matcher value.
3741  * @param[in] item
3742  *   Flow pattern to translate.
3743  * @param[in] inner
3744  *   Item is inner pattern.
3745  */
3746 static void
3747 flow_dv_translate_item_nvgre(void *matcher, void *key,
3748                              const struct rte_flow_item *item,
3749                              int inner)
3750 {
3751         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
3752         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
3753         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
3754         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
3755         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
3756         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
3757         char *gre_key_m;
3758         char *gre_key_v;
3759         int size;
3760         int i;
3761
3762         flow_dv_translate_item_gre(matcher, key, item, inner);
3763         if (!nvgre_v)
3764                 return;
3765         if (!nvgre_m)
3766                 nvgre_m = &rte_flow_item_nvgre_mask;
3767         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
3768         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
3769         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
3770         memcpy(gre_key_m, tni_flow_id_m, size);
3771         for (i = 0; i < size; ++i)
3772                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
3773 }
3774
3775 /**
3776  * Add VXLAN item to matcher and to the value.
3777  *
3778  * @param[in, out] matcher
3779  *   Flow matcher.
3780  * @param[in, out] key
3781  *   Flow matcher value.
3782  * @param[in] item
3783  *   Flow pattern to translate.
3784  * @param[in] inner
3785  *   Item is inner pattern.
3786  */
3787 static void
3788 flow_dv_translate_item_vxlan(void *matcher, void *key,
3789                              const struct rte_flow_item *item,
3790                              int inner)
3791 {
3792         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
3793         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
3794         void *headers_m;
3795         void *headers_v;
3796         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
3797         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
3798         char *vni_m;
3799         char *vni_v;
3800         uint16_t dport;
3801         int size;
3802         int i;
3803
3804         if (inner) {
3805                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3806                                          inner_headers);
3807                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3808         } else {
3809                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3810                                          outer_headers);
3811                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3812         }
3813         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
3814                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
3815         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
3816                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
3817                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
3818         }
3819         if (!vxlan_v)
3820                 return;
3821         if (!vxlan_m)
3822                 vxlan_m = &rte_flow_item_vxlan_mask;
3823         size = sizeof(vxlan_m->vni);
3824         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
3825         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
3826         memcpy(vni_m, vxlan_m->vni, size);
3827         for (i = 0; i < size; ++i)
3828                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
3829 }
3830
3831 /**
3832  * Add MPLS item to matcher and to the value.
3833  *
3834  * @param[in, out] matcher
3835  *   Flow matcher.
3836  * @param[in, out] key
3837  *   Flow matcher value.
3838  * @param[in] item
3839  *   Flow pattern to translate.
3840  * @param[in] prev_layer
3841  *   The protocol layer indicated in previous item.
3842  * @param[in] inner
3843  *   Item is inner pattern.
3844  */
3845 static void
3846 flow_dv_translate_item_mpls(void *matcher, void *key,
3847                             const struct rte_flow_item *item,
3848                             uint64_t prev_layer,
3849                             int inner)
3850 {
3851         const uint32_t *in_mpls_m = item->mask;
3852         const uint32_t *in_mpls_v = item->spec;
3853         uint32_t *out_mpls_m = 0;
3854         uint32_t *out_mpls_v = 0;
3855         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
3856         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
3857         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
3858                                      misc_parameters_2);
3859         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
3860         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
3861         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3862
3863         switch (prev_layer) {
3864         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
3865                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
3866                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
3867                          MLX5_UDP_PORT_MPLS);
3868                 break;
3869         case MLX5_FLOW_LAYER_GRE:
3870                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
3871                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
3872                          RTE_ETHER_TYPE_MPLS);
3873                 break;
3874         default:
3875                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
3876                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
3877                          IPPROTO_MPLS);
3878                 break;
3879         }
3880         if (!in_mpls_v)
3881                 return;
3882         if (!in_mpls_m)
3883                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
3884         switch (prev_layer) {
3885         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
3886                 out_mpls_m =
3887                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
3888                                                  outer_first_mpls_over_udp);
3889                 out_mpls_v =
3890                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
3891                                                  outer_first_mpls_over_udp);
3892                 break;
3893         case MLX5_FLOW_LAYER_GRE:
3894                 out_mpls_m =
3895                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
3896                                                  outer_first_mpls_over_gre);
3897                 out_mpls_v =
3898                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
3899                                                  outer_first_mpls_over_gre);
3900                 break;
3901         default:
3902                 /* Inner MPLS not over GRE is not supported. */
3903                 if (!inner) {
3904                         out_mpls_m =
3905                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
3906                                                          misc2_m,
3907                                                          outer_first_mpls);
3908                         out_mpls_v =
3909                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
3910                                                          misc2_v,
3911                                                          outer_first_mpls);
3912                 }
3913                 break;
3914         }
3915         if (out_mpls_m && out_mpls_v) {
3916                 *out_mpls_m = *in_mpls_m;
3917                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
3918         }
3919 }
3920
3921 /**
3922  * Add META item to matcher
3923  *
3924  * @param[in, out] matcher
3925  *   Flow matcher.
3926  * @param[in, out] key
3927  *   Flow matcher value.
3928  * @param[in] item
3929  *   Flow pattern to translate.
3930  * @param[in] inner
3931  *   Item is inner pattern.
3932  */
3933 static void
3934 flow_dv_translate_item_meta(void *matcher, void *key,
3935                             const struct rte_flow_item *item)
3936 {
3937         const struct rte_flow_item_meta *meta_m;
3938         const struct rte_flow_item_meta *meta_v;
3939         void *misc2_m =
3940                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
3941         void *misc2_v =
3942                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
3943
3944         meta_m = (const void *)item->mask;
3945         if (!meta_m)
3946                 meta_m = &rte_flow_item_meta_mask;
3947         meta_v = (const void *)item->spec;
3948         if (meta_v) {
3949                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a,
3950                          rte_be_to_cpu_32(meta_m->data));
3951                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a,
3952                          rte_be_to_cpu_32(meta_v->data & meta_m->data));
3953         }
3954 }
3955
3956 /**
3957  * Add source vport match to the specified matcher.
3958  *
3959  * @param[in, out] matcher
3960  *   Flow matcher.
3961  * @param[in, out] key
3962  *   Flow matcher value.
3963  * @param[in] port
3964  *   Source vport value to match
3965  * @param[in] mask
3966  *   Mask
3967  */
3968 static void
3969 flow_dv_translate_item_source_vport(void *matcher, void *key,
3970                                     int16_t port, uint16_t mask)
3971 {
3972         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
3973         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
3974
3975         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
3976         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
3977 }
3978
3979 /**
3980  * Translate port-id item to eswitch match on  port-id.
3981  *
3982  * @param[in] dev
3983  *   The devich to configure through.
3984  * @param[in, out] matcher
3985  *   Flow matcher.
3986  * @param[in, out] key
3987  *   Flow matcher value.
3988  * @param[in] item
3989  *   Flow pattern to translate.
3990  *
3991  * @return
3992  *   0 on success, a negative errno value otherwise.
3993  */
3994 static int
3995 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
3996                                void *key, const struct rte_flow_item *item)
3997 {
3998         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
3999         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
4000         uint16_t mask, val, id;
4001         int ret;
4002
4003         mask = pid_m ? pid_m->id : 0xffff;
4004         id = pid_v ? pid_v->id : dev->data->port_id;
4005         ret = mlx5_port_to_eswitch_info(id, NULL, &val);
4006         if (ret)
4007                 return ret;
4008         flow_dv_translate_item_source_vport(matcher, key, val, mask);
4009         return 0;
4010 }
4011
4012 /**
4013  * Add ICMP6 item to matcher and to the value.
4014  *
4015  * @param[in, out] matcher
4016  *   Flow matcher.
4017  * @param[in, out] key
4018  *   Flow matcher value.
4019  * @param[in] item
4020  *   Flow pattern to translate.
4021  * @param[in] inner
4022  *   Item is inner pattern.
4023  */
4024 static void
4025 flow_dv_translate_item_icmp6(void *matcher, void *key,
4026                               const struct rte_flow_item *item,
4027                               int inner)
4028 {
4029         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
4030         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
4031         void *headers_m;
4032         void *headers_v;
4033         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
4034                                      misc_parameters_3);
4035         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
4036         if (inner) {
4037                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4038                                          inner_headers);
4039                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4040         } else {
4041                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4042                                          outer_headers);
4043                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4044         }
4045         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
4046         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
4047         if (!icmp6_v)
4048                 return;
4049         if (!icmp6_m)
4050                 icmp6_m = &rte_flow_item_icmp6_mask;
4051         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
4052         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
4053                  icmp6_v->type & icmp6_m->type);
4054         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
4055         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
4056                  icmp6_v->code & icmp6_m->code);
4057 }
4058
4059 /**
4060  * Add ICMP item to matcher and to the value.
4061  *
4062  * @param[in, out] matcher
4063  *   Flow matcher.
4064  * @param[in, out] key
4065  *   Flow matcher value.
4066  * @param[in] item
4067  *   Flow pattern to translate.
4068  * @param[in] inner
4069  *   Item is inner pattern.
4070  */
4071 static void
4072 flow_dv_translate_item_icmp(void *matcher, void *key,
4073                             const struct rte_flow_item *item,
4074                             int inner)
4075 {
4076         const struct rte_flow_item_icmp *icmp_m = item->mask;
4077         const struct rte_flow_item_icmp *icmp_v = item->spec;
4078         void *headers_m;
4079         void *headers_v;
4080         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
4081                                      misc_parameters_3);
4082         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
4083         if (inner) {
4084                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4085                                          inner_headers);
4086                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4087         } else {
4088                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4089                                          outer_headers);
4090                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4091         }
4092         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
4093         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
4094         if (!icmp_v)
4095                 return;
4096         if (!icmp_m)
4097                 icmp_m = &rte_flow_item_icmp_mask;
4098         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
4099                  icmp_m->hdr.icmp_type);
4100         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
4101                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
4102         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
4103                  icmp_m->hdr.icmp_code);
4104         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
4105                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
4106 }
4107
4108 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
4109
4110 #define HEADER_IS_ZERO(match_criteria, headers)                              \
4111         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
4112                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
4113
4114 /**
4115  * Calculate flow matcher enable bitmap.
4116  *
4117  * @param match_criteria
4118  *   Pointer to flow matcher criteria.
4119  *
4120  * @return
4121  *   Bitmap of enabled fields.
4122  */
4123 static uint8_t
4124 flow_dv_matcher_enable(uint32_t *match_criteria)
4125 {
4126         uint8_t match_criteria_enable;
4127
4128         match_criteria_enable =
4129                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
4130                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
4131         match_criteria_enable |=
4132                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
4133                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
4134         match_criteria_enable |=
4135                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
4136                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
4137         match_criteria_enable |=
4138                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
4139                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
4140 #ifdef HAVE_MLX5DV_DR
4141         match_criteria_enable |=
4142                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
4143                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
4144 #endif
4145         return match_criteria_enable;
4146 }
4147
4148
4149 /**
4150  * Get a flow table.
4151  *
4152  * @param dev[in, out]
4153  *   Pointer to rte_eth_dev structure.
4154  * @param[in] table_id
4155  *   Table id to use.
4156  * @param[in] egress
4157  *   Direction of the table.
4158  * @param[in] transfer
4159  *   E-Switch or NIC flow.
4160  * @param[out] error
4161  *   pointer to error structure.
4162  *
4163  * @return
4164  *   Returns tables resource based on the index, NULL in case of failed.
4165  */
4166 static struct mlx5_flow_tbl_resource *
4167 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
4168                          uint32_t table_id, uint8_t egress,
4169                          uint8_t transfer,
4170                          struct rte_flow_error *error)
4171 {
4172         struct mlx5_priv *priv = dev->data->dev_private;
4173         struct mlx5_ibv_shared *sh = priv->sh;
4174         struct mlx5_flow_tbl_resource *tbl;
4175
4176 #ifdef HAVE_MLX5DV_DR
4177         if (transfer) {
4178                 tbl = &sh->fdb_tbl[table_id];
4179                 if (!tbl->obj)
4180                         tbl->obj = mlx5_glue->dr_create_flow_tbl
4181                                 (sh->fdb_domain, table_id);
4182         } else if (egress) {
4183                 tbl = &sh->tx_tbl[table_id];
4184                 if (!tbl->obj)
4185                         tbl->obj = mlx5_glue->dr_create_flow_tbl
4186                                 (sh->tx_domain, table_id);
4187         } else {
4188                 tbl = &sh->rx_tbl[table_id];
4189                 if (!tbl->obj)
4190                         tbl->obj = mlx5_glue->dr_create_flow_tbl
4191                                 (sh->rx_domain, table_id);
4192         }
4193         if (!tbl->obj) {
4194                 rte_flow_error_set(error, ENOMEM,
4195                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4196                                    NULL, "cannot create table");
4197                 return NULL;
4198         }
4199         rte_atomic32_inc(&tbl->refcnt);
4200         return tbl;
4201 #else
4202         (void)error;
4203         (void)tbl;
4204         if (transfer)
4205                 return &sh->fdb_tbl[table_id];
4206         else if (egress)
4207                 return &sh->tx_tbl[table_id];
4208         else
4209                 return &sh->rx_tbl[table_id];
4210 #endif
4211 }
4212
4213 /**
4214  * Release a flow table.
4215  *
4216  * @param[in] tbl
4217  *   Table resource to be released.
4218  *
4219  * @return
4220  *   Returns 0 if table was released, else return 1;
4221  */
4222 static int
4223 flow_dv_tbl_resource_release(struct mlx5_flow_tbl_resource *tbl)
4224 {
4225         if (!tbl)
4226                 return 0;
4227         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
4228                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
4229                 tbl->obj = NULL;
4230                 return 0;
4231         }
4232         return 1;
4233 }
4234
4235 /**
4236  * Register the flow matcher.
4237  *
4238  * @param dev[in, out]
4239  *   Pointer to rte_eth_dev structure.
4240  * @param[in, out] matcher
4241  *   Pointer to flow matcher.
4242  * @parm[in, out] dev_flow
4243  *   Pointer to the dev_flow.
4244  * @param[out] error
4245  *   pointer to error structure.
4246  *
4247  * @return
4248  *   0 on success otherwise -errno and errno is set.
4249  */
4250 static int
4251 flow_dv_matcher_register(struct rte_eth_dev *dev,
4252                          struct mlx5_flow_dv_matcher *matcher,
4253                          struct mlx5_flow *dev_flow,
4254                          struct rte_flow_error *error)
4255 {
4256         struct mlx5_priv *priv = dev->data->dev_private;
4257         struct mlx5_ibv_shared *sh = priv->sh;
4258         struct mlx5_flow_dv_matcher *cache_matcher;
4259         struct mlx5dv_flow_matcher_attr dv_attr = {
4260                 .type = IBV_FLOW_ATTR_NORMAL,
4261                 .match_mask = (void *)&matcher->mask,
4262         };
4263         struct mlx5_flow_tbl_resource *tbl = NULL;
4264
4265         /* Lookup from cache. */
4266         LIST_FOREACH(cache_matcher, &sh->matchers, next) {
4267                 if (matcher->crc == cache_matcher->crc &&
4268                     matcher->priority == cache_matcher->priority &&
4269                     matcher->egress == cache_matcher->egress &&
4270                     matcher->group == cache_matcher->group &&
4271                     matcher->transfer == cache_matcher->transfer &&
4272                     !memcmp((const void *)matcher->mask.buf,
4273                             (const void *)cache_matcher->mask.buf,
4274                             cache_matcher->mask.size)) {
4275                         DRV_LOG(DEBUG,
4276                                 "priority %hd use %s matcher %p: refcnt %d++",
4277                                 cache_matcher->priority,
4278                                 cache_matcher->egress ? "tx" : "rx",
4279                                 (void *)cache_matcher,
4280                                 rte_atomic32_read(&cache_matcher->refcnt));
4281                         rte_atomic32_inc(&cache_matcher->refcnt);
4282                         dev_flow->dv.matcher = cache_matcher;
4283                         return 0;
4284                 }
4285         }
4286         /* Register new matcher. */
4287         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
4288         if (!cache_matcher)
4289                 return rte_flow_error_set(error, ENOMEM,
4290                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4291                                           "cannot allocate matcher memory");
4292         tbl = flow_dv_tbl_resource_get(dev, matcher->group * MLX5_GROUP_FACTOR,
4293                                        matcher->egress, matcher->transfer,
4294                                        error);
4295         if (!tbl) {
4296                 rte_free(cache_matcher);
4297                 return rte_flow_error_set(error, ENOMEM,
4298                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4299                                           NULL, "cannot create table");
4300         }
4301         *cache_matcher = *matcher;
4302         dv_attr.match_criteria_enable =
4303                 flow_dv_matcher_enable(cache_matcher->mask.buf);
4304         dv_attr.priority = matcher->priority;
4305         if (matcher->egress)
4306                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
4307         cache_matcher->matcher_object =
4308                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
4309         if (!cache_matcher->matcher_object) {
4310                 rte_free(cache_matcher);
4311 #ifdef HAVE_MLX5DV_DR
4312                 flow_dv_tbl_resource_release(tbl);
4313 #endif
4314                 return rte_flow_error_set(error, ENOMEM,
4315                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4316                                           NULL, "cannot create matcher");
4317         }
4318         rte_atomic32_inc(&cache_matcher->refcnt);
4319         LIST_INSERT_HEAD(&sh->matchers, cache_matcher, next);
4320         dev_flow->dv.matcher = cache_matcher;
4321         DRV_LOG(DEBUG, "priority %hd new %s matcher %p: refcnt %d",
4322                 cache_matcher->priority,
4323                 cache_matcher->egress ? "tx" : "rx", (void *)cache_matcher,
4324                 rte_atomic32_read(&cache_matcher->refcnt));
4325         rte_atomic32_inc(&tbl->refcnt);
4326         return 0;
4327 }
4328
4329 /**
4330  * Find existing tag resource or create and register a new one.
4331  *
4332  * @param dev[in, out]
4333  *   Pointer to rte_eth_dev structure.
4334  * @param[in, out] resource
4335  *   Pointer to tag resource.
4336  * @parm[in, out] dev_flow
4337  *   Pointer to the dev_flow.
4338  * @param[out] error
4339  *   pointer to error structure.
4340  *
4341  * @return
4342  *   0 on success otherwise -errno and errno is set.
4343  */
4344 static int
4345 flow_dv_tag_resource_register
4346                         (struct rte_eth_dev *dev,
4347                          struct mlx5_flow_dv_tag_resource *resource,
4348                          struct mlx5_flow *dev_flow,
4349                          struct rte_flow_error *error)
4350 {
4351         struct mlx5_priv *priv = dev->data->dev_private;
4352         struct mlx5_ibv_shared *sh = priv->sh;
4353         struct mlx5_flow_dv_tag_resource *cache_resource;
4354
4355         /* Lookup a matching resource from cache. */
4356         LIST_FOREACH(cache_resource, &sh->tags, next) {
4357                 if (resource->tag == cache_resource->tag) {
4358                         DRV_LOG(DEBUG, "tag resource %p: refcnt %d++",
4359                                 (void *)cache_resource,
4360                                 rte_atomic32_read(&cache_resource->refcnt));
4361                         rte_atomic32_inc(&cache_resource->refcnt);
4362                         dev_flow->flow->tag_resource = cache_resource;
4363                         return 0;
4364                 }
4365         }
4366         /* Register new  resource. */
4367         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
4368         if (!cache_resource)
4369                 return rte_flow_error_set(error, ENOMEM,
4370                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4371                                           "cannot allocate resource memory");
4372         *cache_resource = *resource;
4373         cache_resource->action = mlx5_glue->dv_create_flow_action_tag
4374                 (resource->tag);
4375         if (!cache_resource->action) {
4376                 rte_free(cache_resource);
4377                 return rte_flow_error_set(error, ENOMEM,
4378                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4379                                           NULL, "cannot create action");
4380         }
4381         rte_atomic32_init(&cache_resource->refcnt);
4382         rte_atomic32_inc(&cache_resource->refcnt);
4383         LIST_INSERT_HEAD(&sh->tags, cache_resource, next);
4384         dev_flow->flow->tag_resource = cache_resource;
4385         DRV_LOG(DEBUG, "new tag resource %p: refcnt %d++",
4386                 (void *)cache_resource,
4387                 rte_atomic32_read(&cache_resource->refcnt));
4388         return 0;
4389 }
4390
4391 /**
4392  * Release the tag.
4393  *
4394  * @param dev
4395  *   Pointer to Ethernet device.
4396  * @param flow
4397  *   Pointer to mlx5_flow.
4398  *
4399  * @return
4400  *   1 while a reference on it exists, 0 when freed.
4401  */
4402 static int
4403 flow_dv_tag_release(struct rte_eth_dev *dev,
4404                     struct mlx5_flow_dv_tag_resource *tag)
4405 {
4406         assert(tag);
4407         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
4408                 dev->data->port_id, (void *)tag,
4409                 rte_atomic32_read(&tag->refcnt));
4410         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
4411                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
4412                 LIST_REMOVE(tag, next);
4413                 DRV_LOG(DEBUG, "port %u tag %p: removed",
4414                         dev->data->port_id, (void *)tag);
4415                 rte_free(tag);
4416                 return 0;
4417         }
4418         return 1;
4419 }
4420
4421 /**
4422  * Translate port ID action to vport.
4423  *
4424  * @param[in] dev
4425  *   Pointer to rte_eth_dev structure.
4426  * @param[in] action
4427  *   Pointer to the port ID action.
4428  * @param[out] dst_port_id
4429  *   The target port ID.
4430  * @param[out] error
4431  *   Pointer to the error structure.
4432  *
4433  * @return
4434  *   0 on success, a negative errno value otherwise and rte_errno is set.
4435  */
4436 static int
4437 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
4438                                  const struct rte_flow_action *action,
4439                                  uint32_t *dst_port_id,
4440                                  struct rte_flow_error *error)
4441 {
4442         uint32_t port;
4443         uint16_t port_id;
4444         int ret;
4445         const struct rte_flow_action_port_id *conf =
4446                         (const struct rte_flow_action_port_id *)action->conf;
4447
4448         port = conf->original ? dev->data->port_id : conf->id;
4449         ret = mlx5_port_to_eswitch_info(port, NULL, &port_id);
4450         if (ret)
4451                 return rte_flow_error_set(error, -ret,
4452                                           RTE_FLOW_ERROR_TYPE_ACTION,
4453                                           NULL,
4454                                           "No eswitch info was found for port");
4455         *dst_port_id = port_id;
4456         return 0;
4457 }
4458
4459 /**
4460  * Fill the flow with DV spec.
4461  *
4462  * @param[in] dev
4463  *   Pointer to rte_eth_dev structure.
4464  * @param[in, out] dev_flow
4465  *   Pointer to the sub flow.
4466  * @param[in] attr
4467  *   Pointer to the flow attributes.
4468  * @param[in] items
4469  *   Pointer to the list of items.
4470  * @param[in] actions
4471  *   Pointer to the list of actions.
4472  * @param[out] error
4473  *   Pointer to the error structure.
4474  *
4475  * @return
4476  *   0 on success, a negative errno value otherwise and rte_errno is set.
4477  */
4478 static int
4479 flow_dv_translate(struct rte_eth_dev *dev,
4480                   struct mlx5_flow *dev_flow,
4481                   const struct rte_flow_attr *attr,
4482                   const struct rte_flow_item items[],
4483                   const struct rte_flow_action actions[],
4484                   struct rte_flow_error *error)
4485 {
4486         struct mlx5_priv *priv = dev->data->dev_private;
4487         struct rte_flow *flow = dev_flow->flow;
4488         uint64_t item_flags = 0;
4489         uint64_t last_item = 0;
4490         uint64_t action_flags = 0;
4491         uint64_t priority = attr->priority;
4492         struct mlx5_flow_dv_matcher matcher = {
4493                 .mask = {
4494                         .size = sizeof(matcher.mask.buf),
4495                 },
4496         };
4497         int actions_n = 0;
4498         bool actions_end = false;
4499         struct mlx5_flow_dv_modify_hdr_resource res = {
4500                 .ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4501                                           MLX5DV_FLOW_TABLE_TYPE_NIC_RX
4502         };
4503         union flow_dv_attr flow_attr = { .attr = 0 };
4504         struct mlx5_flow_dv_tag_resource tag_resource;
4505         uint32_t modify_action_position = UINT32_MAX;
4506         void *match_mask = matcher.mask.buf;
4507         void *match_value = dev_flow->dv.value.buf;
4508
4509         flow->group = attr->group;
4510         if (attr->transfer)
4511                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4512         if (priority == MLX5_FLOW_PRIO_RSVD)
4513                 priority = priv->config.flow_prio - 1;
4514         for (; !actions_end ; actions++) {
4515                 const struct rte_flow_action_queue *queue;
4516                 const struct rte_flow_action_rss *rss;
4517                 const struct rte_flow_action *action = actions;
4518                 const struct rte_flow_action_count *count = action->conf;
4519                 const uint8_t *rss_key;
4520                 const struct rte_flow_action_jump *jump_data;
4521                 struct mlx5_flow_dv_jump_tbl_resource jump_tbl_resource;
4522                 struct mlx5_flow_tbl_resource *tbl;
4523                 uint32_t port_id = 0;
4524                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
4525
4526                 switch (actions->type) {
4527                 case RTE_FLOW_ACTION_TYPE_VOID:
4528                         break;
4529                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4530                         if (flow_dv_translate_action_port_id(dev, action,
4531                                                              &port_id, error))
4532                                 return -rte_errno;
4533                         port_id_resource.port_id = port_id;
4534                         if (flow_dv_port_id_action_resource_register
4535                             (dev, &port_id_resource, dev_flow, error))
4536                                 return -rte_errno;
4537                         dev_flow->dv.actions[actions_n++] =
4538                                 dev_flow->dv.port_id_action->action;
4539                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4540                         break;
4541                 case RTE_FLOW_ACTION_TYPE_FLAG:
4542                         tag_resource.tag =
4543                                 mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
4544                         if (!flow->tag_resource)
4545                                 if (flow_dv_tag_resource_register
4546                                     (dev, &tag_resource, dev_flow, error))
4547                                         return errno;
4548                         dev_flow->dv.actions[actions_n++] =
4549                                 flow->tag_resource->action;
4550                         action_flags |= MLX5_FLOW_ACTION_FLAG;
4551                         break;
4552                 case RTE_FLOW_ACTION_TYPE_MARK:
4553                         tag_resource.tag = mlx5_flow_mark_set
4554                               (((const struct rte_flow_action_mark *)
4555                                (actions->conf))->id);
4556                         if (!flow->tag_resource)
4557                                 if (flow_dv_tag_resource_register
4558                                     (dev, &tag_resource, dev_flow, error))
4559                                         return errno;
4560                         dev_flow->dv.actions[actions_n++] =
4561                                 flow->tag_resource->action;
4562                         action_flags |= MLX5_FLOW_ACTION_MARK;
4563                         break;
4564                 case RTE_FLOW_ACTION_TYPE_DROP:
4565                         action_flags |= MLX5_FLOW_ACTION_DROP;
4566                         break;
4567                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4568                         queue = actions->conf;
4569                         flow->rss.queue_num = 1;
4570                         (*flow->queue)[0] = queue->index;
4571                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
4572                         break;
4573                 case RTE_FLOW_ACTION_TYPE_RSS:
4574                         rss = actions->conf;
4575                         if (flow->queue)
4576                                 memcpy((*flow->queue), rss->queue,
4577                                        rss->queue_num * sizeof(uint16_t));
4578                         flow->rss.queue_num = rss->queue_num;
4579                         /* NULL RSS key indicates default RSS key. */
4580                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
4581                         memcpy(flow->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
4582                         /* RSS type 0 indicates default RSS type ETH_RSS_IP. */
4583                         flow->rss.types = !rss->types ? ETH_RSS_IP : rss->types;
4584                         flow->rss.level = rss->level;
4585                         action_flags |= MLX5_FLOW_ACTION_RSS;
4586                         break;
4587                 case RTE_FLOW_ACTION_TYPE_COUNT:
4588                         if (!priv->config.devx) {
4589                                 rte_errno = ENOTSUP;
4590                                 goto cnt_err;
4591                         }
4592                         flow->counter = flow_dv_counter_alloc(dev,
4593                                                               count->shared,
4594                                                               count->id,
4595                                                               attr->group);
4596                         if (flow->counter == NULL)
4597                                 goto cnt_err;
4598                         dev_flow->dv.actions[actions_n++] =
4599                                 flow->counter->action;
4600                         action_flags |= MLX5_FLOW_ACTION_COUNT;
4601                         break;
4602 cnt_err:
4603                         if (rte_errno == ENOTSUP)
4604                                 return rte_flow_error_set
4605                                               (error, ENOTSUP,
4606                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4607                                                NULL,
4608                                                "count action not supported");
4609                         else
4610                                 return rte_flow_error_set
4611                                                 (error, rte_errno,
4612                                                  RTE_FLOW_ERROR_TYPE_ACTION,
4613                                                  action,
4614                                                  "cannot create counter"
4615                                                   " object.");
4616                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4617                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4618                         if (flow_dv_create_action_l2_encap(dev, actions,
4619                                                            dev_flow,
4620                                                            attr->transfer,
4621                                                            error))
4622                                 return -rte_errno;
4623                         dev_flow->dv.actions[actions_n++] =
4624                                 dev_flow->dv.encap_decap->verbs_action;
4625                         action_flags |= actions->type ==
4626                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
4627                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
4628                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
4629                         break;
4630                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4631                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4632                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
4633                                                            attr->transfer,
4634                                                            error))
4635                                 return -rte_errno;
4636                         dev_flow->dv.actions[actions_n++] =
4637                                 dev_flow->dv.encap_decap->verbs_action;
4638                         action_flags |= actions->type ==
4639                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
4640                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
4641                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
4642                         break;
4643                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4644                         /* Handle encap with preceding decap. */
4645                         if (action_flags & MLX5_FLOW_ACTION_RAW_DECAP) {
4646                                 if (flow_dv_create_action_raw_encap
4647                                         (dev, actions, dev_flow, attr, error))
4648                                         return -rte_errno;
4649                                 dev_flow->dv.actions[actions_n++] =
4650                                         dev_flow->dv.encap_decap->verbs_action;
4651                         } else {
4652                                 /* Handle encap without preceding decap. */
4653                                 if (flow_dv_create_action_l2_encap
4654                                     (dev, actions, dev_flow, attr->transfer,
4655                                      error))
4656                                         return -rte_errno;
4657                                 dev_flow->dv.actions[actions_n++] =
4658                                         dev_flow->dv.encap_decap->verbs_action;
4659                         }
4660                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
4661                         break;
4662                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4663                         /* Check if this decap is followed by encap. */
4664                         for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
4665                                action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
4666                                action++) {
4667                         }
4668                         /* Handle decap only if it isn't followed by encap. */
4669                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4670                                 if (flow_dv_create_action_l2_decap
4671                                     (dev, dev_flow, attr->transfer, error))
4672                                         return -rte_errno;
4673                                 dev_flow->dv.actions[actions_n++] =
4674                                         dev_flow->dv.encap_decap->verbs_action;
4675                         }
4676                         /* If decap is followed by encap, handle it at encap. */
4677                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
4678                         break;
4679                 case RTE_FLOW_ACTION_TYPE_JUMP:
4680                         jump_data = action->conf;
4681                         tbl = flow_dv_tbl_resource_get(dev, jump_data->group *
4682                                                        MLX5_GROUP_FACTOR,
4683                                                        attr->egress,
4684                                                        attr->transfer, error);
4685                         if (!tbl)
4686                                 return rte_flow_error_set
4687                                                 (error, errno,
4688                                                  RTE_FLOW_ERROR_TYPE_ACTION,
4689                                                  NULL,
4690                                                  "cannot create jump action.");
4691                         jump_tbl_resource.tbl = tbl;
4692                         if (flow_dv_jump_tbl_resource_register
4693                             (dev, &jump_tbl_resource, dev_flow, error)) {
4694                                 flow_dv_tbl_resource_release(tbl);
4695                                 return rte_flow_error_set
4696                                                 (error, errno,
4697                                                  RTE_FLOW_ERROR_TYPE_ACTION,
4698                                                  NULL,
4699                                                  "cannot create jump action.");
4700                         }
4701                         dev_flow->dv.actions[actions_n++] =
4702                                 dev_flow->dv.jump->action;
4703                         action_flags |= MLX5_FLOW_ACTION_JUMP;
4704                         break;
4705                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4706                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4707                         if (flow_dv_convert_action_modify_mac(&res, actions,
4708                                                               error))
4709                                 return -rte_errno;
4710                         action_flags |= actions->type ==
4711                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
4712                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
4713                                         MLX5_FLOW_ACTION_SET_MAC_DST;
4714                         break;
4715                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4716                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4717                         if (flow_dv_convert_action_modify_ipv4(&res, actions,
4718                                                                error))
4719                                 return -rte_errno;
4720                         action_flags |= actions->type ==
4721                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
4722                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
4723                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
4724                         break;
4725                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4726                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4727                         if (flow_dv_convert_action_modify_ipv6(&res, actions,
4728                                                                error))
4729                                 return -rte_errno;
4730                         action_flags |= actions->type ==
4731                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
4732                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
4733                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
4734                         break;
4735                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4736                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4737                         if (flow_dv_convert_action_modify_tp(&res, actions,
4738                                                              items, &flow_attr,
4739                                                              error))
4740                                 return -rte_errno;
4741                         action_flags |= actions->type ==
4742                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
4743                                         MLX5_FLOW_ACTION_SET_TP_SRC :
4744                                         MLX5_FLOW_ACTION_SET_TP_DST;
4745                         break;
4746                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4747                         if (flow_dv_convert_action_modify_dec_ttl(&res, items,
4748                                                                   &flow_attr,
4749                                                                   error))
4750                                 return -rte_errno;
4751                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
4752                         break;
4753                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
4754                         if (flow_dv_convert_action_modify_ttl(&res, actions,
4755                                                              items, &flow_attr,
4756                                                              error))
4757                                 return -rte_errno;
4758                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
4759                         break;
4760                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4761                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4762                         if (flow_dv_convert_action_modify_tcp_seq(&res, actions,
4763                                                                   error))
4764                                 return -rte_errno;
4765                         action_flags |= actions->type ==
4766                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
4767                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
4768                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
4769                         break;
4770
4771                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4772                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4773                         if (flow_dv_convert_action_modify_tcp_ack(&res, actions,
4774                                                                   error))
4775                                 return -rte_errno;
4776                         action_flags |= actions->type ==
4777                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
4778                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
4779                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
4780                         break;
4781                 case RTE_FLOW_ACTION_TYPE_END:
4782                         actions_end = true;
4783                         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS) {
4784                                 /* create modify action if needed. */
4785                                 if (flow_dv_modify_hdr_resource_register
4786                                                                 (dev, &res,
4787                                                                  dev_flow,
4788                                                                  error))
4789                                         return -rte_errno;
4790                                 dev_flow->dv.actions[modify_action_position] =
4791                                         dev_flow->dv.modify_hdr->verbs_action;
4792                         }
4793                         break;
4794                 default:
4795                         break;
4796                 }
4797                 if ((action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS) &&
4798                     modify_action_position == UINT32_MAX)
4799                         modify_action_position = actions_n++;
4800         }
4801         dev_flow->dv.actions_n = actions_n;
4802         flow->actions = action_flags;
4803         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4804                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
4805
4806                 switch (items->type) {
4807                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4808                         flow_dv_translate_item_port_id(dev, match_mask,
4809                                                        match_value, items);
4810                         last_item = MLX5_FLOW_ITEM_PORT_ID;
4811                         break;
4812                 case RTE_FLOW_ITEM_TYPE_ETH:
4813                         flow_dv_translate_item_eth(match_mask, match_value,
4814                                                    items, tunnel);
4815                         matcher.priority = MLX5_PRIORITY_MAP_L2;
4816                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
4817                                              MLX5_FLOW_LAYER_OUTER_L2;
4818                         break;
4819                 case RTE_FLOW_ITEM_TYPE_VLAN:
4820                         flow_dv_translate_item_vlan(match_mask, match_value,
4821                                                     items, tunnel);
4822                         matcher.priority = MLX5_PRIORITY_MAP_L2;
4823                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
4824                                               MLX5_FLOW_LAYER_INNER_VLAN) :
4825                                              (MLX5_FLOW_LAYER_OUTER_L2 |
4826                                               MLX5_FLOW_LAYER_OUTER_VLAN);
4827                         break;
4828                 case RTE_FLOW_ITEM_TYPE_IPV4:
4829                         flow_dv_translate_item_ipv4(match_mask, match_value,
4830                                                     items, tunnel, attr->group);
4831                         matcher.priority = MLX5_PRIORITY_MAP_L3;
4832                         dev_flow->dv.hash_fields |=
4833                                 mlx5_flow_hashfields_adjust
4834                                         (dev_flow, tunnel,
4835                                          MLX5_IPV4_LAYER_TYPES,
4836                                          MLX5_IPV4_IBV_RX_HASH);
4837                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4838                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4839                         mlx5_flow_tunnel_ip_check(items, &last_item);
4840                         break;
4841                 case RTE_FLOW_ITEM_TYPE_IPV6:
4842                         flow_dv_translate_item_ipv6(match_mask, match_value,
4843                                                     items, tunnel, attr->group);
4844                         matcher.priority = MLX5_PRIORITY_MAP_L3;
4845                         dev_flow->dv.hash_fields |=
4846                                 mlx5_flow_hashfields_adjust
4847                                         (dev_flow, tunnel,
4848                                          MLX5_IPV6_LAYER_TYPES,
4849                                          MLX5_IPV6_IBV_RX_HASH);
4850                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4851                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4852                         mlx5_flow_tunnel_ip_check(items, &last_item);
4853                         break;
4854                 case RTE_FLOW_ITEM_TYPE_TCP:
4855                         flow_dv_translate_item_tcp(match_mask, match_value,
4856                                                    items, tunnel);
4857                         matcher.priority = MLX5_PRIORITY_MAP_L4;
4858                         dev_flow->dv.hash_fields |=
4859                                 mlx5_flow_hashfields_adjust
4860                                         (dev_flow, tunnel, ETH_RSS_TCP,
4861                                          IBV_RX_HASH_SRC_PORT_TCP |
4862                                          IBV_RX_HASH_DST_PORT_TCP);
4863                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
4864                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
4865                         break;
4866                 case RTE_FLOW_ITEM_TYPE_UDP:
4867                         flow_dv_translate_item_udp(match_mask, match_value,
4868                                                    items, tunnel);
4869                         matcher.priority = MLX5_PRIORITY_MAP_L4;
4870                         dev_flow->dv.hash_fields |=
4871                                 mlx5_flow_hashfields_adjust
4872                                         (dev_flow, tunnel, ETH_RSS_UDP,
4873                                          IBV_RX_HASH_SRC_PORT_UDP |
4874                                          IBV_RX_HASH_DST_PORT_UDP);
4875                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
4876                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
4877                         break;
4878                 case RTE_FLOW_ITEM_TYPE_GRE:
4879                         flow_dv_translate_item_gre(match_mask, match_value,
4880                                                    items, tunnel);
4881                         last_item = MLX5_FLOW_LAYER_GRE;
4882                         break;
4883                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
4884                         flow_dv_translate_item_gre_key(match_mask,
4885                                                        match_value, items);
4886                         item_flags |= MLX5_FLOW_LAYER_GRE_KEY;
4887                         break;
4888                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4889                         flow_dv_translate_item_nvgre(match_mask, match_value,
4890                                                      items, tunnel);
4891                         last_item = MLX5_FLOW_LAYER_GRE;
4892                         break;
4893                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4894                         flow_dv_translate_item_vxlan(match_mask, match_value,
4895                                                      items, tunnel);
4896                         last_item = MLX5_FLOW_LAYER_VXLAN;
4897                         break;
4898                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4899                         flow_dv_translate_item_vxlan(match_mask, match_value,
4900                                                      items, tunnel);
4901                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4902                         break;
4903                 case RTE_FLOW_ITEM_TYPE_MPLS:
4904                         flow_dv_translate_item_mpls(match_mask, match_value,
4905                                                     items, last_item, tunnel);
4906                         last_item = MLX5_FLOW_LAYER_MPLS;
4907                         break;
4908                 case RTE_FLOW_ITEM_TYPE_META:
4909                         flow_dv_translate_item_meta(match_mask, match_value,
4910                                                     items);
4911                         last_item = MLX5_FLOW_ITEM_METADATA;
4912                         break;
4913                 case RTE_FLOW_ITEM_TYPE_ICMP:
4914                         flow_dv_translate_item_icmp(match_mask, match_value,
4915                                                     items, tunnel);
4916                         item_flags |= MLX5_FLOW_LAYER_ICMP;
4917                         break;
4918                 case RTE_FLOW_ITEM_TYPE_ICMP6:
4919                         flow_dv_translate_item_icmp6(match_mask, match_value,
4920                                                       items, tunnel);
4921                         item_flags |= MLX5_FLOW_LAYER_ICMP6;
4922                         break;
4923                 default:
4924                         break;
4925                 }
4926                 item_flags |= last_item;
4927         }
4928         /*
4929          * In case of ingress traffic when E-Switch mode is enabled,
4930          * we have two cases where we need to set the source port manually.
4931          * The first one, is in case of Nic steering rule, and the second is
4932          * E-Switch rule where no port_id item was found. In both cases
4933          * the source port is set according the current port in use.
4934          */
4935         if ((attr->ingress && !(item_flags & MLX5_FLOW_ITEM_PORT_ID)) &&
4936             (priv->representor || priv->master)) {
4937                 if (flow_dv_translate_item_port_id(dev, match_mask,
4938                                                    match_value, NULL))
4939                         return -rte_errno;
4940         }
4941         assert(!flow_dv_check_valid_spec(matcher.mask.buf,
4942                                          dev_flow->dv.value.buf));
4943         dev_flow->layers = item_flags;
4944         /* Register matcher. */
4945         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
4946                                     matcher.mask.size);
4947         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
4948                                                      matcher.priority);
4949         matcher.egress = attr->egress;
4950         matcher.group = attr->group;
4951         matcher.transfer = attr->transfer;
4952         if (flow_dv_matcher_register(dev, &matcher, dev_flow, error))
4953                 return -rte_errno;
4954         return 0;
4955 }
4956
4957 /**
4958  * Apply the flow to the NIC.
4959  *
4960  * @param[in] dev
4961  *   Pointer to the Ethernet device structure.
4962  * @param[in, out] flow
4963  *   Pointer to flow structure.
4964  * @param[out] error
4965  *   Pointer to error structure.
4966  *
4967  * @return
4968  *   0 on success, a negative errno value otherwise and rte_errno is set.
4969  */
4970 static int
4971 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
4972               struct rte_flow_error *error)
4973 {
4974         struct mlx5_flow_dv *dv;
4975         struct mlx5_flow *dev_flow;
4976         struct mlx5_priv *priv = dev->data->dev_private;
4977         int n;
4978         int err;
4979
4980         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
4981                 dv = &dev_flow->dv;
4982                 n = dv->actions_n;
4983                 if (flow->actions & MLX5_FLOW_ACTION_DROP) {
4984                         if (flow->transfer) {
4985                                 dv->actions[n++] = priv->sh->esw_drop_action;
4986                         } else {
4987                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
4988                                 if (!dv->hrxq) {
4989                                         rte_flow_error_set
4990                                                 (error, errno,
4991                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4992                                                  NULL,
4993                                                  "cannot get drop hash queue");
4994                                         goto error;
4995                                 }
4996                                 dv->actions[n++] = dv->hrxq->action;
4997                         }
4998                 } else if (flow->actions &
4999                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
5000                         struct mlx5_hrxq *hrxq;
5001
5002                         hrxq = mlx5_hrxq_get(dev, flow->key,
5003                                              MLX5_RSS_HASH_KEY_LEN,
5004                                              dv->hash_fields,
5005                                              (*flow->queue),
5006                                              flow->rss.queue_num);
5007                         if (!hrxq)
5008                                 hrxq = mlx5_hrxq_new
5009                                         (dev, flow->key, MLX5_RSS_HASH_KEY_LEN,
5010                                          dv->hash_fields, (*flow->queue),
5011                                          flow->rss.queue_num,
5012                                          !!(dev_flow->layers &
5013                                             MLX5_FLOW_LAYER_TUNNEL));
5014                         if (!hrxq) {
5015                                 rte_flow_error_set
5016                                         (error, rte_errno,
5017                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5018                                          "cannot get hash queue");
5019                                 goto error;
5020                         }
5021                         dv->hrxq = hrxq;
5022                         dv->actions[n++] = dv->hrxq->action;
5023                 }
5024                 dv->flow =
5025                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
5026                                                   (void *)&dv->value, n,
5027                                                   dv->actions);
5028                 if (!dv->flow) {
5029                         rte_flow_error_set(error, errno,
5030                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5031                                            NULL,
5032                                            "hardware refuses to create flow");
5033                         goto error;
5034                 }
5035         }
5036         return 0;
5037 error:
5038         err = rte_errno; /* Save rte_errno before cleanup. */
5039         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
5040                 struct mlx5_flow_dv *dv = &dev_flow->dv;
5041                 if (dv->hrxq) {
5042                         if (flow->actions & MLX5_FLOW_ACTION_DROP)
5043                                 mlx5_hrxq_drop_release(dev);
5044                         else
5045                                 mlx5_hrxq_release(dev, dv->hrxq);
5046                         dv->hrxq = NULL;
5047                 }
5048         }
5049         rte_errno = err; /* Restore rte_errno. */
5050         return -rte_errno;
5051 }
5052
5053 /**
5054  * Release the flow matcher.
5055  *
5056  * @param dev
5057  *   Pointer to Ethernet device.
5058  * @param flow
5059  *   Pointer to mlx5_flow.
5060  *
5061  * @return
5062  *   1 while a reference on it exists, 0 when freed.
5063  */
5064 static int
5065 flow_dv_matcher_release(struct rte_eth_dev *dev,
5066                         struct mlx5_flow *flow)
5067 {
5068         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
5069         struct mlx5_priv *priv = dev->data->dev_private;
5070         struct mlx5_ibv_shared *sh = priv->sh;
5071         struct mlx5_flow_tbl_resource *tbl;
5072
5073         assert(matcher->matcher_object);
5074         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
5075                 dev->data->port_id, (void *)matcher,
5076                 rte_atomic32_read(&matcher->refcnt));
5077         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
5078                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
5079                            (matcher->matcher_object));
5080                 LIST_REMOVE(matcher, next);
5081                 if (matcher->egress)
5082                         tbl = &sh->tx_tbl[matcher->group];
5083                 else
5084                         tbl = &sh->rx_tbl[matcher->group];
5085                 flow_dv_tbl_resource_release(tbl);
5086                 rte_free(matcher);
5087                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
5088                         dev->data->port_id, (void *)matcher);
5089                 return 0;
5090         }
5091         return 1;
5092 }
5093
5094 /**
5095  * Release an encap/decap resource.
5096  *
5097  * @param flow
5098  *   Pointer to mlx5_flow.
5099  *
5100  * @return
5101  *   1 while a reference on it exists, 0 when freed.
5102  */
5103 static int
5104 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
5105 {
5106         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
5107                                                 flow->dv.encap_decap;
5108
5109         assert(cache_resource->verbs_action);
5110         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
5111                 (void *)cache_resource,
5112                 rte_atomic32_read(&cache_resource->refcnt));
5113         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
5114                 claim_zero(mlx5_glue->destroy_flow_action
5115                                 (cache_resource->verbs_action));
5116                 LIST_REMOVE(cache_resource, next);
5117                 rte_free(cache_resource);
5118                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
5119                         (void *)cache_resource);
5120                 return 0;
5121         }
5122         return 1;
5123 }
5124
5125 /**
5126  * Release an jump to table action resource.
5127  *
5128  * @param flow
5129  *   Pointer to mlx5_flow.
5130  *
5131  * @return
5132  *   1 while a reference on it exists, 0 when freed.
5133  */
5134 static int
5135 flow_dv_jump_tbl_resource_release(struct mlx5_flow *flow)
5136 {
5137         struct mlx5_flow_dv_jump_tbl_resource *cache_resource =
5138                                                 flow->dv.jump;
5139
5140         assert(cache_resource->action);
5141         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
5142                 (void *)cache_resource,
5143                 rte_atomic32_read(&cache_resource->refcnt));
5144         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
5145                 claim_zero(mlx5_glue->destroy_flow_action
5146                                 (cache_resource->action));
5147                 LIST_REMOVE(cache_resource, next);
5148                 flow_dv_tbl_resource_release(cache_resource->tbl);
5149                 rte_free(cache_resource);
5150                 DRV_LOG(DEBUG, "jump table resource %p: removed",
5151                         (void *)cache_resource);
5152                 return 0;
5153         }
5154         return 1;
5155 }
5156
5157 /**
5158  * Release a modify-header resource.
5159  *
5160  * @param flow
5161  *   Pointer to mlx5_flow.
5162  *
5163  * @return
5164  *   1 while a reference on it exists, 0 when freed.
5165  */
5166 static int
5167 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
5168 {
5169         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
5170                                                 flow->dv.modify_hdr;
5171
5172         assert(cache_resource->verbs_action);
5173         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
5174                 (void *)cache_resource,
5175                 rte_atomic32_read(&cache_resource->refcnt));
5176         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
5177                 claim_zero(mlx5_glue->destroy_flow_action
5178                                 (cache_resource->verbs_action));
5179                 LIST_REMOVE(cache_resource, next);
5180                 rte_free(cache_resource);
5181                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
5182                         (void *)cache_resource);
5183                 return 0;
5184         }
5185         return 1;
5186 }
5187
5188 /**
5189  * Release port ID action resource.
5190  *
5191  * @param flow
5192  *   Pointer to mlx5_flow.
5193  *
5194  * @return
5195  *   1 while a reference on it exists, 0 when freed.
5196  */
5197 static int
5198 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
5199 {
5200         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
5201                 flow->dv.port_id_action;
5202
5203         assert(cache_resource->action);
5204         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
5205                 (void *)cache_resource,
5206                 rte_atomic32_read(&cache_resource->refcnt));
5207         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
5208                 claim_zero(mlx5_glue->destroy_flow_action
5209                                 (cache_resource->action));
5210                 LIST_REMOVE(cache_resource, next);
5211                 rte_free(cache_resource);
5212                 DRV_LOG(DEBUG, "port id action resource %p: removed",
5213                         (void *)cache_resource);
5214                 return 0;
5215         }
5216         return 1;
5217 }
5218
5219 /**
5220  * Remove the flow from the NIC but keeps it in memory.
5221  *
5222  * @param[in] dev
5223  *   Pointer to Ethernet device.
5224  * @param[in, out] flow
5225  *   Pointer to flow structure.
5226  */
5227 static void
5228 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
5229 {
5230         struct mlx5_flow_dv *dv;
5231         struct mlx5_flow *dev_flow;
5232
5233         if (!flow)
5234                 return;
5235         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
5236                 dv = &dev_flow->dv;
5237                 if (dv->flow) {
5238                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
5239                         dv->flow = NULL;
5240                 }
5241                 if (dv->hrxq) {
5242                         if (flow->actions & MLX5_FLOW_ACTION_DROP)
5243                                 mlx5_hrxq_drop_release(dev);
5244                         else
5245                                 mlx5_hrxq_release(dev, dv->hrxq);
5246                         dv->hrxq = NULL;
5247                 }
5248         }
5249 }
5250
5251 /**
5252  * Remove the flow from the NIC and the memory.
5253  *
5254  * @param[in] dev
5255  *   Pointer to the Ethernet device structure.
5256  * @param[in, out] flow
5257  *   Pointer to flow structure.
5258  */
5259 static void
5260 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
5261 {
5262         struct mlx5_flow *dev_flow;
5263
5264         if (!flow)
5265                 return;
5266         flow_dv_remove(dev, flow);
5267         if (flow->counter) {
5268                 flow_dv_counter_release(dev, flow->counter);
5269                 flow->counter = NULL;
5270         }
5271         if (flow->tag_resource) {
5272                 flow_dv_tag_release(dev, flow->tag_resource);
5273                 flow->tag_resource = NULL;
5274         }
5275         while (!LIST_EMPTY(&flow->dev_flows)) {
5276                 dev_flow = LIST_FIRST(&flow->dev_flows);
5277                 LIST_REMOVE(dev_flow, next);
5278                 if (dev_flow->dv.matcher)
5279                         flow_dv_matcher_release(dev, dev_flow);
5280                 if (dev_flow->dv.encap_decap)
5281                         flow_dv_encap_decap_resource_release(dev_flow);
5282                 if (dev_flow->dv.modify_hdr)
5283                         flow_dv_modify_hdr_resource_release(dev_flow);
5284                 if (dev_flow->dv.jump)
5285                         flow_dv_jump_tbl_resource_release(dev_flow);
5286                 if (dev_flow->dv.port_id_action)
5287                         flow_dv_port_id_action_resource_release(dev_flow);
5288                 rte_free(dev_flow);
5289         }
5290 }
5291
5292 /**
5293  * Query a dv flow  rule for its statistics via devx.
5294  *
5295  * @param[in] dev
5296  *   Pointer to Ethernet device.
5297  * @param[in] flow
5298  *   Pointer to the sub flow.
5299  * @param[out] data
5300  *   data retrieved by the query.
5301  * @param[out] error
5302  *   Perform verbose error reporting if not NULL.
5303  *
5304  * @return
5305  *   0 on success, a negative errno value otherwise and rte_errno is set.
5306  */
5307 static int
5308 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
5309                     void *data, struct rte_flow_error *error)
5310 {
5311         struct mlx5_priv *priv = dev->data->dev_private;
5312         struct rte_flow_query_count *qc = data;
5313
5314         if (!priv->config.devx)
5315                 return rte_flow_error_set(error, ENOTSUP,
5316                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5317                                           NULL,
5318                                           "counters are not supported");
5319         if (flow->counter) {
5320                 uint64_t pkts, bytes;
5321                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
5322                                                &bytes);
5323
5324                 if (err)
5325                         return rte_flow_error_set(error, -err,
5326                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5327                                         NULL, "cannot read counters");
5328                 qc->hits_set = 1;
5329                 qc->bytes_set = 1;
5330                 qc->hits = pkts - flow->counter->hits;
5331                 qc->bytes = bytes - flow->counter->bytes;
5332                 if (qc->reset) {
5333                         flow->counter->hits = pkts;
5334                         flow->counter->bytes = bytes;
5335                 }
5336                 return 0;
5337         }
5338         return rte_flow_error_set(error, EINVAL,
5339                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5340                                   NULL,
5341                                   "counters are not available");
5342 }
5343
5344 /**
5345  * Query a flow.
5346  *
5347  * @see rte_flow_query()
5348  * @see rte_flow_ops
5349  */
5350 static int
5351 flow_dv_query(struct rte_eth_dev *dev,
5352               struct rte_flow *flow __rte_unused,
5353               const struct rte_flow_action *actions __rte_unused,
5354               void *data __rte_unused,
5355               struct rte_flow_error *error __rte_unused)
5356 {
5357         int ret = -EINVAL;
5358
5359         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5360                 switch (actions->type) {
5361                 case RTE_FLOW_ACTION_TYPE_VOID:
5362                         break;
5363                 case RTE_FLOW_ACTION_TYPE_COUNT:
5364                         ret = flow_dv_query_count(dev, flow, data, error);
5365                         break;
5366                 default:
5367                         return rte_flow_error_set(error, ENOTSUP,
5368                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5369                                                   actions,
5370                                                   "action not supported");
5371                 }
5372         }
5373         return ret;
5374 }
5375
5376 /*
5377  * Mutex-protected thunk to flow_dv_translate().
5378  */
5379 static int
5380 flow_d_translate(struct rte_eth_dev *dev,
5381                  struct mlx5_flow *dev_flow,
5382                  const struct rte_flow_attr *attr,
5383                  const struct rte_flow_item items[],
5384                  const struct rte_flow_action actions[],
5385                  struct rte_flow_error *error)
5386 {
5387         int ret;
5388
5389         flow_d_shared_lock(dev);
5390         ret = flow_dv_translate(dev, dev_flow, attr, items, actions, error);
5391         flow_d_shared_unlock(dev);
5392         return ret;
5393 }
5394
5395 /*
5396  * Mutex-protected thunk to flow_dv_apply().
5397  */
5398 static int
5399 flow_d_apply(struct rte_eth_dev *dev,
5400              struct rte_flow *flow,
5401              struct rte_flow_error *error)
5402 {
5403         int ret;
5404
5405         flow_d_shared_lock(dev);
5406         ret = flow_dv_apply(dev, flow, error);
5407         flow_d_shared_unlock(dev);
5408         return ret;
5409 }
5410
5411 /*
5412  * Mutex-protected thunk to flow_dv_remove().
5413  */
5414 static void
5415 flow_d_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
5416 {
5417         flow_d_shared_lock(dev);
5418         flow_dv_remove(dev, flow);
5419         flow_d_shared_unlock(dev);
5420 }
5421
5422 /*
5423  * Mutex-protected thunk to flow_dv_destroy().
5424  */
5425 static void
5426 flow_d_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
5427 {
5428         flow_d_shared_lock(dev);
5429         flow_dv_destroy(dev, flow);
5430         flow_d_shared_unlock(dev);
5431 }
5432
5433 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
5434         .validate = flow_dv_validate,
5435         .prepare = flow_dv_prepare,
5436         .translate = flow_d_translate,
5437         .apply = flow_d_apply,
5438         .remove = flow_d_remove,
5439         .destroy = flow_d_destroy,
5440         .query = flow_dv_query,
5441 };
5442
5443 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */