drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 #include <rte_common.h>
  12 #include <rte_ether.h>
  13 #include <ethdev_driver.h>
  14 #include <rte_flow.h>
  15 #include <rte_flow_driver.h>
  16 #include <rte_malloc.h>
  17 #include <rte_cycles.h>
  18 #include <rte_bus_pci.h>
  19 #include <rte_ip.h>
  20 #include <rte_gre.h>
  21 #include <rte_vxlan.h>
  22 #include <rte_gtp.h>
  23 #include <rte_eal_paging.h>
  24 #include <rte_mpls.h>
  25 #include <rte_mtr.h>
  26 #include <rte_mtr_driver.h>
  27 #include <rte_tailq.h>
  28
  29 #include <mlx5_glue.h>
  30 #include <mlx5_devx_cmds.h>
  31 #include <mlx5_prm.h>
  32 #include <mlx5_malloc.h>
  33
  34 #include "mlx5_defs.h"
  35 #include "mlx5.h"
  36 #include "mlx5_common_os.h"
  37 #include "mlx5_flow.h"
  38 #include "mlx5_flow_os.h"
  39 #include "mlx5_rx.h"
  40 #include "mlx5_tx.h"
  41 #include "rte_pmd_mlx5.h"
  42
  43 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  44
  45 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  46 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  47 #endif
  48
  49 #ifndef HAVE_MLX5DV_DR_ESWITCH
  50 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  51 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  52 #endif
  53 #endif
  54
  55 #ifndef HAVE_MLX5DV_DR
  56 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  57 #endif
  58
  59 /* VLAN header definitions */
  60 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  61 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  62 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  63 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  64 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  65
  66 union flow_dv_attr {
  67         struct {
  68                 uint32_t valid:1;
  69                 uint32_t ipv4:1;
  70                 uint32_t ipv6:1;
  71                 uint32_t tcp:1;
  72                 uint32_t udp:1;
  73                 uint32_t reserved:27;
  74         };
  75         uint32_t attr;
  76 };
  77
  78 static int
  79 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
  80                              struct mlx5_flow_tbl_resource *tbl);
  81
  82 static int
  83 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
  84                                      uint32_t encap_decap_idx);
  85
  86 static int
  87 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
  88                                         uint32_t port_id);
  89 static void
  90 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss);
  91
  92 static int
  93 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
  94                                   uint32_t rix_jump);
  95
  96 static int16_t
  97 flow_dv_get_esw_manager_vport_id(struct rte_eth_dev *dev)
  98 {
  99         struct mlx5_priv *priv = dev->data->dev_private;
 100
 101         if (priv->pci_dev == NULL)
 102                 return 0;
 103         switch (priv->pci_dev->id.device_id) {
 104         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
 105         case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXBF:
 106         case PCI_DEVICE_ID_MELLANOX_CONNECTX7BF:
 107                 return (int16_t)0xfffe;
 108         default:
 109                 return 0;
 110         }
 111 }
 112
 113 /**
 114  * Initialize flow attributes structure according to flow items' types.
 115  *
 116  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
 117  * mode. For tunnel mode, the items to be modified are the outermost ones.
 118  *
 119  * @param[in] item
 120  *   Pointer to item specification.
 121  * @param[out] attr
 122  *   Pointer to flow attributes structure.
 123  * @param[in] dev_flow
 124  *   Pointer to the sub flow.
 125  * @param[in] tunnel_decap
 126  *   Whether action is after tunnel decapsulation.
 127  */
 128 static void
 129 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
 130                   struct mlx5_flow *dev_flow, bool tunnel_decap)
 131 {
 132         uint64_t layers = dev_flow->handle->layers;
 133
 134         /*
 135          * If layers is already initialized, it means this dev_flow is the
 136          * suffix flow, the layers flags is set by the prefix flow. Need to
 137          * use the layer flags from prefix flow as the suffix flow may not
 138          * have the user defined items as the flow is split.
 139          */
 140         if (layers) {
 141                 if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
 142                         attr->ipv4 = 1;
 143                 else if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
 144                         attr->ipv6 = 1;
 145                 if (layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
 146                         attr->tcp = 1;
 147                 else if (layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
 148                         attr->udp = 1;
 149                 attr->valid = 1;
 150                 return;
 151         }
 152         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 153                 uint8_t next_protocol = 0xff;
 154                 switch (item->type) {
 155                 case RTE_FLOW_ITEM_TYPE_GRE:
 156                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 157                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 158                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 159                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 160                 case RTE_FLOW_ITEM_TYPE_MPLS:
 161                         if (tunnel_decap)
 162                                 attr->attr = 0;
 163                         break;
 164                 case RTE_FLOW_ITEM_TYPE_IPV4:
 165                         if (!attr->ipv6)
 166                                 attr->ipv4 = 1;
 167                         if (item->mask != NULL &&
 168                             ((const struct rte_flow_item_ipv4 *)
 169                             item->mask)->hdr.next_proto_id)
 170                                 next_protocol =
 171                                     ((const struct rte_flow_item_ipv4 *)
 172                                       (item->spec))->hdr.next_proto_id &
 173                                     ((const struct rte_flow_item_ipv4 *)
 174                                       (item->mask))->hdr.next_proto_id;
 175                         if ((next_protocol == IPPROTO_IPIP ||
 176                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 177                                 attr->attr = 0;
 178                         break;
 179                 case RTE_FLOW_ITEM_TYPE_IPV6:
 180                         if (!attr->ipv4)
 181                                 attr->ipv6 = 1;
 182                         if (item->mask != NULL &&
 183                             ((const struct rte_flow_item_ipv6 *)
 184                             item->mask)->hdr.proto)
 185                                 next_protocol =
 186                                     ((const struct rte_flow_item_ipv6 *)
 187                                       (item->spec))->hdr.proto &
 188                                     ((const struct rte_flow_item_ipv6 *)
 189                                       (item->mask))->hdr.proto;
 190                         if ((next_protocol == IPPROTO_IPIP ||
 191                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 192                                 attr->attr = 0;
 193                         break;
 194                 case RTE_FLOW_ITEM_TYPE_UDP:
 195                         if (!attr->tcp)
 196                                 attr->udp = 1;
 197                         break;
 198                 case RTE_FLOW_ITEM_TYPE_TCP:
 199                         if (!attr->udp)
 200                                 attr->tcp = 1;
 201                         break;
 202                 default:
 203                         break;
 204                 }
 205         }
 206         attr->valid = 1;
 207 }
 208
 209 /*
 210  * Convert rte_mtr_color to mlx5 color.
 211  *
 212  * @param[in] rcol
 213  *   rte_mtr_color.
 214  *
 215  * @return
 216  *   mlx5 color.
 217  */
 218 static inline int
 219 rte_col_2_mlx5_col(enum rte_color rcol)
 220 {
 221         switch (rcol) {
 222         case RTE_COLOR_GREEN:
 223                 return MLX5_FLOW_COLOR_GREEN;
 224         case RTE_COLOR_YELLOW:
 225                 return MLX5_FLOW_COLOR_YELLOW;
 226         case RTE_COLOR_RED:
 227                 return MLX5_FLOW_COLOR_RED;
 228         default:
 229                 break;
 230         }
 231         return MLX5_FLOW_COLOR_UNDEFINED;
 232 }
 233
 234 struct field_modify_info {
 235         uint32_t size; /* Size of field in protocol header, in bytes. */
 236         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 237         enum mlx5_modification_field id;
 238 };
 239
 240 struct field_modify_info modify_eth[] = {
 241         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 242         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 243         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 244         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 245         {0, 0, 0},
 246 };
 247
 248 struct field_modify_info modify_vlan_out_first_vid[] = {
 249         /* Size in bits !!! */
 250         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 251         {0, 0, 0},
 252 };
 253
 254 struct field_modify_info modify_ipv4[] = {
 255         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 256         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 257         {4, 12, MLX5_MODI_OUT_SIPV4},
 258         {4, 16, MLX5_MODI_OUT_DIPV4},
 259         {0, 0, 0},
 260 };
 261
 262 struct field_modify_info modify_ipv6[] = {
 263         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 264         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 265         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 266         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 267         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 268         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 269         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 270         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 271         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 272         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 273         {0, 0, 0},
 274 };
 275
 276 struct field_modify_info modify_udp[] = {
 277         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 278         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 279         {0, 0, 0},
 280 };
 281
 282 struct field_modify_info modify_tcp[] = {
 283         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 284         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 285         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 286         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 287         {0, 0, 0},
 288 };
 289
 290 static void
 291 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 292                           uint8_t next_protocol, uint64_t *item_flags,
 293                           int *tunnel)
 294 {
 295         MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 296                     item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 297         if (next_protocol == IPPROTO_IPIP) {
 298                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 299                 *tunnel = 1;
 300         }
 301         if (next_protocol == IPPROTO_IPV6) {
 302                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 303                 *tunnel = 1;
 304         }
 305 }
 306
 307 static inline struct mlx5_hlist *
 308 flow_dv_hlist_prepare(struct mlx5_dev_ctx_shared *sh, struct mlx5_hlist **phl,
 309                      const char *name, uint32_t size, bool direct_key,
 310                      bool lcores_share, void *ctx,
 311                      mlx5_list_create_cb cb_create,
 312                      mlx5_list_match_cb cb_match,
 313                      mlx5_list_remove_cb cb_remove,
 314                      mlx5_list_clone_cb cb_clone,
 315                      mlx5_list_clone_free_cb cb_clone_free)
 316 {
 317         struct mlx5_hlist *hl;
 318         struct mlx5_hlist *expected = NULL;
 319         char s[MLX5_NAME_SIZE];
 320
 321         hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
 322         if (likely(hl))
 323                 return hl;
 324         snprintf(s, sizeof(s), "%s_%s", sh->ibdev_name, name);
 325         hl = mlx5_hlist_create(s, size, direct_key, lcores_share,
 326                         ctx, cb_create, cb_match, cb_remove, cb_clone,
 327                         cb_clone_free);
 328         if (!hl) {
 329                 DRV_LOG(ERR, "%s hash creation failed", name);
 330                 rte_errno = ENOMEM;
 331                 return NULL;
 332         }
 333         if (!__atomic_compare_exchange_n(phl, &expected, hl, false,
 334                                          __ATOMIC_SEQ_CST,
 335                                          __ATOMIC_SEQ_CST)) {
 336                 mlx5_hlist_destroy(hl);
 337                 hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
 338         }
 339         return hl;
 340 }
 341
 342 /* Update VLAN's VID/PCP based on input rte_flow_action.
 343  *
 344  * @param[in] action
 345  *   Pointer to struct rte_flow_action.
 346  * @param[out] vlan
 347  *   Pointer to struct rte_vlan_hdr.
 348  */
 349 static void
 350 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 351                          struct rte_vlan_hdr *vlan)
 352 {
 353         uint16_t vlan_tci;
 354         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 355                 vlan_tci =
 356                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 357                                                action->conf)->vlan_pcp;
 358                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 359                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 360                 vlan->vlan_tci |= vlan_tci;
 361         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 362                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 363                 vlan->vlan_tci |= rte_be_to_cpu_16
 364                     (((const struct rte_flow_action_of_set_vlan_vid *)
 365                                              action->conf)->vlan_vid);
 366         }
 367 }
 368
 369 /**
 370  * Fetch 1, 2, 3 or 4 byte field from the byte array
 371  * and return as unsigned integer in host-endian format.
 372  *
 373  * @param[in] data
 374  *   Pointer to data array.
 375  * @param[in] size
 376  *   Size of field to extract.
 377  *
 378  * @return
 379  *   converted field in host endian format.
 380  */
 381 static inline uint32_t
 382 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 383 {
 384         uint32_t ret;
 385
 386         switch (size) {
 387         case 1:
 388                 ret = *data;
 389                 break;
 390         case 2:
 391                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 392                 break;
 393         case 3:
 394                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 395                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 396                 break;
 397         case 4:
 398                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 399                 break;
 400         default:
 401                 MLX5_ASSERT(false);
 402                 ret = 0;
 403                 break;
 404         }
 405         return ret;
 406 }
 407
 408 /**
 409  * Convert modify-header action to DV specification.
 410  *
 411  * Data length of each action is determined by provided field description
 412  * and the item mask. Data bit offset and width of each action is determined
 413  * by provided item mask.
 414  *
 415  * @param[in] item
 416  *   Pointer to item specification.
 417  * @param[in] field
 418  *   Pointer to field modification information.
 419  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 420  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 421  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 422  * @param[in] dcopy
 423  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 424  *   Negative offset value sets the same offset as source offset.
 425  *   size field is ignored, value is taken from source field.
 426  * @param[in,out] resource
 427  *   Pointer to the modify-header resource.
 428  * @param[in] type
 429  *   Type of modification.
 430  * @param[out] error
 431  *   Pointer to the error structure.
 432  *
 433  * @return
 434  *   0 on success, a negative errno value otherwise and rte_errno is set.
 435  */
 436 static int
 437 flow_dv_convert_modify_action(struct rte_flow_item *item,
 438                               struct field_modify_info *field,
 439                               struct field_modify_info *dcopy,
 440                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 441                               uint32_t type, struct rte_flow_error *error)
 442 {
 443         uint32_t i = resource->actions_num;
 444         struct mlx5_modification_cmd *actions = resource->actions;
 445         uint32_t carry_b = 0;
 446
 447         /*
 448          * The item and mask are provided in big-endian format.
 449          * The fields should be presented as in big-endian format either.
 450          * Mask must be always present, it defines the actual field width.
 451          */
 452         MLX5_ASSERT(item->mask);
 453         MLX5_ASSERT(field->size);
 454         do {
 455                 uint32_t size_b;
 456                 uint32_t off_b;
 457                 uint32_t mask;
 458                 uint32_t data;
 459                 bool next_field = true;
 460                 bool next_dcopy = true;
 461
 462                 if (i >= MLX5_MAX_MODIFY_NUM)
 463                         return rte_flow_error_set(error, EINVAL,
 464                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 465                                  "too many items to modify");
 466                 /* Fetch variable byte size mask from the array. */
 467                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 468                                            field->offset, field->size);
 469                 if (!mask) {
 470                         ++field;
 471                         continue;
 472                 }
 473                 /* Deduce actual data width in bits from mask value. */
 474                 off_b = rte_bsf32(mask) + carry_b;
 475                 size_b = sizeof(uint32_t) * CHAR_BIT -
 476                          off_b - __builtin_clz(mask);
 477                 MLX5_ASSERT(size_b);
 478                 actions[i] = (struct mlx5_modification_cmd) {
 479                         .action_type = type,
 480                         .field = field->id,
 481                         .offset = off_b,
 482                         .length = (size_b == sizeof(uint32_t) * CHAR_BIT) ?
 483                                 0 : size_b,
 484                 };
 485                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 486                         MLX5_ASSERT(dcopy);
 487                         actions[i].dst_field = dcopy->id;
 488                         actions[i].dst_offset =
 489                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 490                         /* Convert entire record to big-endian format. */
 491                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 492                         /*
 493                          * Destination field overflow. Copy leftovers of
 494                          * a source field to the next destination field.
 495                          */
 496                         carry_b = 0;
 497                         if ((size_b > dcopy->size * CHAR_BIT - dcopy->offset) &&
 498                             dcopy->size != 0) {
 499                                 actions[i].length =
 500                                         dcopy->size * CHAR_BIT - dcopy->offset;
 501                                 carry_b = actions[i].length;
 502                                 next_field = false;
 503                         }
 504                         /*
 505                          * Not enough bits in a source filed to fill a
 506                          * destination field. Switch to the next source.
 507                          */
 508                         if ((size_b < dcopy->size * CHAR_BIT - dcopy->offset) &&
 509                             (size_b == field->size * CHAR_BIT - off_b)) {
 510                                 actions[i].length =
 511                                         field->size * CHAR_BIT - off_b;
 512                                 dcopy->offset += actions[i].length;
 513                                 next_dcopy = false;
 514                         }
 515                         if (next_dcopy)
 516                                 ++dcopy;
 517                 } else {
 518                         MLX5_ASSERT(item->spec);
 519                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 520                                                    field->offset, field->size);
 521                         /* Shift out the trailing masked bits from data. */
 522                         data = (data & mask) >> off_b;
 523                         actions[i].data1 = rte_cpu_to_be_32(data);
 524                 }
 525                 /* Convert entire record to expected big-endian format. */
 526                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 527                 if (next_field)
 528                         ++field;
 529                 ++i;
 530         } while (field->size);
 531         if (resource->actions_num == i)
 532                 return rte_flow_error_set(error, EINVAL,
 533                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 534                                           "invalid modification flow item");
 535         resource->actions_num = i;
 536         return 0;
 537 }
 538
 539 /**
 540  * Convert modify-header set IPv4 address action to DV specification.
 541  *
 542  * @param[in,out] resource
 543  *   Pointer to the modify-header resource.
 544  * @param[in] action
 545  *   Pointer to action specification.
 546  * @param[out] error
 547  *   Pointer to the error structure.
 548  *
 549  * @return
 550  *   0 on success, a negative errno value otherwise and rte_errno is set.
 551  */
 552 static int
 553 flow_dv_convert_action_modify_ipv4
 554                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 555                          const struct rte_flow_action *action,
 556                          struct rte_flow_error *error)
 557 {
 558         const struct rte_flow_action_set_ipv4 *conf =
 559                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 560         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 561         struct rte_flow_item_ipv4 ipv4;
 562         struct rte_flow_item_ipv4 ipv4_mask;
 563
 564         memset(&ipv4, 0, sizeof(ipv4));
 565         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 566         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 567                 ipv4.hdr.src_addr = conf->ipv4_addr;
 568                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 569         } else {
 570                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 571                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 572         }
 573         item.spec = &ipv4;
 574         item.mask = &ipv4_mask;
 575         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 576                                              MLX5_MODIFICATION_TYPE_SET, error);
 577 }
 578
 579 /**
 580  * Convert modify-header set IPv6 address action to DV specification.
 581  *
 582  * @param[in,out] resource
 583  *   Pointer to the modify-header resource.
 584  * @param[in] action
 585  *   Pointer to action specification.
 586  * @param[out] error
 587  *   Pointer to the error structure.
 588  *
 589  * @return
 590  *   0 on success, a negative errno value otherwise and rte_errno is set.
 591  */
 592 static int
 593 flow_dv_convert_action_modify_ipv6
 594                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 595                          const struct rte_flow_action *action,
 596                          struct rte_flow_error *error)
 597 {
 598         const struct rte_flow_action_set_ipv6 *conf =
 599                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 600         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 601         struct rte_flow_item_ipv6 ipv6;
 602         struct rte_flow_item_ipv6 ipv6_mask;
 603
 604         memset(&ipv6, 0, sizeof(ipv6));
 605         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 606         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 607                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 608                        sizeof(ipv6.hdr.src_addr));
 609                 memcpy(&ipv6_mask.hdr.src_addr,
 610                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 611                        sizeof(ipv6.hdr.src_addr));
 612         } else {
 613                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 614                        sizeof(ipv6.hdr.dst_addr));
 615                 memcpy(&ipv6_mask.hdr.dst_addr,
 616                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 617                        sizeof(ipv6.hdr.dst_addr));
 618         }
 619         item.spec = &ipv6;
 620         item.mask = &ipv6_mask;
 621         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 622                                              MLX5_MODIFICATION_TYPE_SET, error);
 623 }
 624
 625 /**
 626  * Convert modify-header set MAC address action to DV specification.
 627  *
 628  * @param[in,out] resource
 629  *   Pointer to the modify-header resource.
 630  * @param[in] action
 631  *   Pointer to action specification.
 632  * @param[out] error
 633  *   Pointer to the error structure.
 634  *
 635  * @return
 636  *   0 on success, a negative errno value otherwise and rte_errno is set.
 637  */
 638 static int
 639 flow_dv_convert_action_modify_mac
 640                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 641                          const struct rte_flow_action *action,
 642                          struct rte_flow_error *error)
 643 {
 644         const struct rte_flow_action_set_mac *conf =
 645                 (const struct rte_flow_action_set_mac *)(action->conf);
 646         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 647         struct rte_flow_item_eth eth;
 648         struct rte_flow_item_eth eth_mask;
 649
 650         memset(&eth, 0, sizeof(eth));
 651         memset(&eth_mask, 0, sizeof(eth_mask));
 652         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 653                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 654                        sizeof(eth.src.addr_bytes));
 655                 memcpy(&eth_mask.src.addr_bytes,
 656                        &rte_flow_item_eth_mask.src.addr_bytes,
 657                        sizeof(eth_mask.src.addr_bytes));
 658         } else {
 659                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 660                        sizeof(eth.dst.addr_bytes));
 661                 memcpy(&eth_mask.dst.addr_bytes,
 662                        &rte_flow_item_eth_mask.dst.addr_bytes,
 663                        sizeof(eth_mask.dst.addr_bytes));
 664         }
 665         item.spec = &eth;
 666         item.mask = &eth_mask;
 667         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 668                                              MLX5_MODIFICATION_TYPE_SET, error);
 669 }
 670
 671 /**
 672  * Convert modify-header set VLAN VID action to DV specification.
 673  *
 674  * @param[in,out] resource
 675  *   Pointer to the modify-header resource.
 676  * @param[in] action
 677  *   Pointer to action specification.
 678  * @param[out] error
 679  *   Pointer to the error structure.
 680  *
 681  * @return
 682  *   0 on success, a negative errno value otherwise and rte_errno is set.
 683  */
 684 static int
 685 flow_dv_convert_action_modify_vlan_vid
 686                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 687                          const struct rte_flow_action *action,
 688                          struct rte_flow_error *error)
 689 {
 690         const struct rte_flow_action_of_set_vlan_vid *conf =
 691                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 692         int i = resource->actions_num;
 693         struct mlx5_modification_cmd *actions = resource->actions;
 694         struct field_modify_info *field = modify_vlan_out_first_vid;
 695
 696         if (i >= MLX5_MAX_MODIFY_NUM)
 697                 return rte_flow_error_set(error, EINVAL,
 698                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 699                          "too many items to modify");
 700         actions[i] = (struct mlx5_modification_cmd) {
 701                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 702                 .field = field->id,
 703                 .length = field->size,
 704                 .offset = field->offset,
 705         };
 706         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 707         actions[i].data1 = conf->vlan_vid;
 708         actions[i].data1 = actions[i].data1 << 16;
 709         resource->actions_num = ++i;
 710         return 0;
 711 }
 712
 713 /**
 714  * Convert modify-header set TP action to DV specification.
 715  *
 716  * @param[in,out] resource
 717  *   Pointer to the modify-header resource.
 718  * @param[in] action
 719  *   Pointer to action specification.
 720  * @param[in] items
 721  *   Pointer to rte_flow_item objects list.
 722  * @param[in] attr
 723  *   Pointer to flow attributes structure.
 724  * @param[in] dev_flow
 725  *   Pointer to the sub flow.
 726  * @param[in] tunnel_decap
 727  *   Whether action is after tunnel decapsulation.
 728  * @param[out] error
 729  *   Pointer to the error structure.
 730  *
 731  * @return
 732  *   0 on success, a negative errno value otherwise and rte_errno is set.
 733  */
 734 static int
 735 flow_dv_convert_action_modify_tp
 736                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 737                          const struct rte_flow_action *action,
 738                          const struct rte_flow_item *items,
 739                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 740                          bool tunnel_decap, struct rte_flow_error *error)
 741 {
 742         const struct rte_flow_action_set_tp *conf =
 743                 (const struct rte_flow_action_set_tp *)(action->conf);
 744         struct rte_flow_item item;
 745         struct rte_flow_item_udp udp;
 746         struct rte_flow_item_udp udp_mask;
 747         struct rte_flow_item_tcp tcp;
 748         struct rte_flow_item_tcp tcp_mask;
 749         struct field_modify_info *field;
 750
 751         if (!attr->valid)
 752                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 753         if (attr->udp) {
 754                 memset(&udp, 0, sizeof(udp));
 755                 memset(&udp_mask, 0, sizeof(udp_mask));
 756                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 757                         udp.hdr.src_port = conf->port;
 758                         udp_mask.hdr.src_port =
 759                                         rte_flow_item_udp_mask.hdr.src_port;
 760                 } else {
 761                         udp.hdr.dst_port = conf->port;
 762                         udp_mask.hdr.dst_port =
 763                                         rte_flow_item_udp_mask.hdr.dst_port;
 764                 }
 765                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 766                 item.spec = &udp;
 767                 item.mask = &udp_mask;
 768                 field = modify_udp;
 769         } else {
 770                 MLX5_ASSERT(attr->tcp);
 771                 memset(&tcp, 0, sizeof(tcp));
 772                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 773                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 774                         tcp.hdr.src_port = conf->port;
 775                         tcp_mask.hdr.src_port =
 776                                         rte_flow_item_tcp_mask.hdr.src_port;
 777                 } else {
 778                         tcp.hdr.dst_port = conf->port;
 779                         tcp_mask.hdr.dst_port =
 780                                         rte_flow_item_tcp_mask.hdr.dst_port;
 781                 }
 782                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 783                 item.spec = &tcp;
 784                 item.mask = &tcp_mask;
 785                 field = modify_tcp;
 786         }
 787         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 788                                              MLX5_MODIFICATION_TYPE_SET, error);
 789 }
 790
 791 /**
 792  * Convert modify-header set TTL action to DV specification.
 793  *
 794  * @param[in,out] resource
 795  *   Pointer to the modify-header resource.
 796  * @param[in] action
 797  *   Pointer to action specification.
 798  * @param[in] items
 799  *   Pointer to rte_flow_item objects list.
 800  * @param[in] attr
 801  *   Pointer to flow attributes structure.
 802  * @param[in] dev_flow
 803  *   Pointer to the sub flow.
 804  * @param[in] tunnel_decap
 805  *   Whether action is after tunnel decapsulation.
 806  * @param[out] error
 807  *   Pointer to the error structure.
 808  *
 809  * @return
 810  *   0 on success, a negative errno value otherwise and rte_errno is set.
 811  */
 812 static int
 813 flow_dv_convert_action_modify_ttl
 814                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 815                          const struct rte_flow_action *action,
 816                          const struct rte_flow_item *items,
 817                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 818                          bool tunnel_decap, struct rte_flow_error *error)
 819 {
 820         const struct rte_flow_action_set_ttl *conf =
 821                 (const struct rte_flow_action_set_ttl *)(action->conf);
 822         struct rte_flow_item item;
 823         struct rte_flow_item_ipv4 ipv4;
 824         struct rte_flow_item_ipv4 ipv4_mask;
 825         struct rte_flow_item_ipv6 ipv6;
 826         struct rte_flow_item_ipv6 ipv6_mask;
 827         struct field_modify_info *field;
 828
 829         if (!attr->valid)
 830                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 831         if (attr->ipv4) {
 832                 memset(&ipv4, 0, sizeof(ipv4));
 833                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 834                 ipv4.hdr.time_to_live = conf->ttl_value;
 835                 ipv4_mask.hdr.time_to_live = 0xFF;
 836                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 837                 item.spec = &ipv4;
 838                 item.mask = &ipv4_mask;
 839                 field = modify_ipv4;
 840         } else {
 841                 MLX5_ASSERT(attr->ipv6);
 842                 memset(&ipv6, 0, sizeof(ipv6));
 843                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 844                 ipv6.hdr.hop_limits = conf->ttl_value;
 845                 ipv6_mask.hdr.hop_limits = 0xFF;
 846                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 847                 item.spec = &ipv6;
 848                 item.mask = &ipv6_mask;
 849                 field = modify_ipv6;
 850         }
 851         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 852                                              MLX5_MODIFICATION_TYPE_SET, error);
 853 }
 854
 855 /**
 856  * Convert modify-header decrement TTL action to DV specification.
 857  *
 858  * @param[in,out] resource
 859  *   Pointer to the modify-header resource.
 860  * @param[in] action
 861  *   Pointer to action specification.
 862  * @param[in] items
 863  *   Pointer to rte_flow_item objects list.
 864  * @param[in] attr
 865  *   Pointer to flow attributes structure.
 866  * @param[in] dev_flow
 867  *   Pointer to the sub flow.
 868  * @param[in] tunnel_decap
 869  *   Whether action is after tunnel decapsulation.
 870  * @param[out] error
 871  *   Pointer to the error structure.
 872  *
 873  * @return
 874  *   0 on success, a negative errno value otherwise and rte_errno is set.
 875  */
 876 static int
 877 flow_dv_convert_action_modify_dec_ttl
 878                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 879                          const struct rte_flow_item *items,
 880                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 881                          bool tunnel_decap, struct rte_flow_error *error)
 882 {
 883         struct rte_flow_item item;
 884         struct rte_flow_item_ipv4 ipv4;
 885         struct rte_flow_item_ipv4 ipv4_mask;
 886         struct rte_flow_item_ipv6 ipv6;
 887         struct rte_flow_item_ipv6 ipv6_mask;
 888         struct field_modify_info *field;
 889
 890         if (!attr->valid)
 891                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 892         if (attr->ipv4) {
 893                 memset(&ipv4, 0, sizeof(ipv4));
 894                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 895                 ipv4.hdr.time_to_live = 0xFF;
 896                 ipv4_mask.hdr.time_to_live = 0xFF;
 897                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 898                 item.spec = &ipv4;
 899                 item.mask = &ipv4_mask;
 900                 field = modify_ipv4;
 901         } else {
 902                 MLX5_ASSERT(attr->ipv6);
 903                 memset(&ipv6, 0, sizeof(ipv6));
 904                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 905                 ipv6.hdr.hop_limits = 0xFF;
 906                 ipv6_mask.hdr.hop_limits = 0xFF;
 907                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 908                 item.spec = &ipv6;
 909                 item.mask = &ipv6_mask;
 910                 field = modify_ipv6;
 911         }
 912         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 913                                              MLX5_MODIFICATION_TYPE_ADD, error);
 914 }
 915
 916 /**
 917  * Convert modify-header increment/decrement TCP Sequence number
 918  * to DV specification.
 919  *
 920  * @param[in,out] resource
 921  *   Pointer to the modify-header resource.
 922  * @param[in] action
 923  *   Pointer to action specification.
 924  * @param[out] error
 925  *   Pointer to the error structure.
 926  *
 927  * @return
 928  *   0 on success, a negative errno value otherwise and rte_errno is set.
 929  */
 930 static int
 931 flow_dv_convert_action_modify_tcp_seq
 932                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 933                          const struct rte_flow_action *action,
 934                          struct rte_flow_error *error)
 935 {
 936         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 937         uint64_t value = rte_be_to_cpu_32(*conf);
 938         struct rte_flow_item item;
 939         struct rte_flow_item_tcp tcp;
 940         struct rte_flow_item_tcp tcp_mask;
 941
 942         memset(&tcp, 0, sizeof(tcp));
 943         memset(&tcp_mask, 0, sizeof(tcp_mask));
 944         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 945                 /*
 946                  * The HW has no decrement operation, only increment operation.
 947                  * To simulate decrement X from Y using increment operation
 948                  * we need to add UINT32_MAX X times to Y.
 949                  * Each adding of UINT32_MAX decrements Y by 1.
 950                  */
 951                 value *= UINT32_MAX;
 952         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 953         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 954         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 955         item.spec = &tcp;
 956         item.mask = &tcp_mask;
 957         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 958                                              MLX5_MODIFICATION_TYPE_ADD, error);
 959 }
 960
 961 /**
 962  * Convert modify-header increment/decrement TCP Acknowledgment number
 963  * to DV specification.
 964  *
 965  * @param[in,out] resource
 966  *   Pointer to the modify-header resource.
 967  * @param[in] action
 968  *   Pointer to action specification.
 969  * @param[out] error
 970  *   Pointer to the error structure.
 971  *
 972  * @return
 973  *   0 on success, a negative errno value otherwise and rte_errno is set.
 974  */
 975 static int
 976 flow_dv_convert_action_modify_tcp_ack
 977                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 978                          const struct rte_flow_action *action,
 979                          struct rte_flow_error *error)
 980 {
 981         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 982         uint64_t value = rte_be_to_cpu_32(*conf);
 983         struct rte_flow_item item;
 984         struct rte_flow_item_tcp tcp;
 985         struct rte_flow_item_tcp tcp_mask;
 986
 987         memset(&tcp, 0, sizeof(tcp));
 988         memset(&tcp_mask, 0, sizeof(tcp_mask));
 989         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 990                 /*
 991                  * The HW has no decrement operation, only increment operation.
 992                  * To simulate decrement X from Y using increment operation
 993                  * we need to add UINT32_MAX X times to Y.
 994                  * Each adding of UINT32_MAX decrements Y by 1.
 995                  */
 996                 value *= UINT32_MAX;
 997         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 998         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 999         item.type = RTE_FLOW_ITEM_TYPE_TCP;
1000         item.spec = &tcp;
1001         item.mask = &tcp_mask;
1002         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
1003                                              MLX5_MODIFICATION_TYPE_ADD, error);
1004 }
1005
1006 static enum mlx5_modification_field reg_to_field[] = {
1007         [REG_NON] = MLX5_MODI_OUT_NONE,
1008         [REG_A] = MLX5_MODI_META_DATA_REG_A,
1009         [REG_B] = MLX5_MODI_META_DATA_REG_B,
1010         [REG_C_0] = MLX5_MODI_META_REG_C_0,
1011         [REG_C_1] = MLX5_MODI_META_REG_C_1,
1012         [REG_C_2] = MLX5_MODI_META_REG_C_2,
1013         [REG_C_3] = MLX5_MODI_META_REG_C_3,
1014         [REG_C_4] = MLX5_MODI_META_REG_C_4,
1015         [REG_C_5] = MLX5_MODI_META_REG_C_5,
1016         [REG_C_6] = MLX5_MODI_META_REG_C_6,
1017         [REG_C_7] = MLX5_MODI_META_REG_C_7,
1018 };
1019
1020 /**
1021  * Convert register set to DV specification.
1022  *
1023  * @param[in,out] resource
1024  *   Pointer to the modify-header resource.
1025  * @param[in] action
1026  *   Pointer to action specification.
1027  * @param[out] error
1028  *   Pointer to the error structure.
1029  *
1030  * @return
1031  *   0 on success, a negative errno value otherwise and rte_errno is set.
1032  */
1033 static int
1034 flow_dv_convert_action_set_reg
1035                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1036                          const struct rte_flow_action *action,
1037                          struct rte_flow_error *error)
1038 {
1039         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
1040         struct mlx5_modification_cmd *actions = resource->actions;
1041         uint32_t i = resource->actions_num;
1042
1043         if (i >= MLX5_MAX_MODIFY_NUM)
1044                 return rte_flow_error_set(error, EINVAL,
1045                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1046                                           "too many items to modify");
1047         MLX5_ASSERT(conf->id != REG_NON);
1048         MLX5_ASSERT(conf->id < (enum modify_reg)RTE_DIM(reg_to_field));
1049         actions[i] = (struct mlx5_modification_cmd) {
1050                 .action_type = MLX5_MODIFICATION_TYPE_SET,
1051                 .field = reg_to_field[conf->id],
1052                 .offset = conf->offset,
1053                 .length = conf->length,
1054         };
1055         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
1056         actions[i].data1 = rte_cpu_to_be_32(conf->data);
1057         ++i;
1058         resource->actions_num = i;
1059         return 0;
1060 }
1061
1062 /**
1063  * Convert SET_TAG action to DV specification.
1064  *
1065  * @param[in] dev
1066  *   Pointer to the rte_eth_dev structure.
1067  * @param[in,out] resource
1068  *   Pointer to the modify-header resource.
1069  * @param[in] conf
1070  *   Pointer to action specification.
1071  * @param[out] error
1072  *   Pointer to the error structure.
1073  *
1074  * @return
1075  *   0 on success, a negative errno value otherwise and rte_errno is set.
1076  */
1077 static int
1078 flow_dv_convert_action_set_tag
1079                         (struct rte_eth_dev *dev,
1080                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1081                          const struct rte_flow_action_set_tag *conf,
1082                          struct rte_flow_error *error)
1083 {
1084         rte_be32_t data = rte_cpu_to_be_32(conf->data);
1085         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
1086         struct rte_flow_item item = {
1087                 .spec = &data,
1088                 .mask = &mask,
1089         };
1090         struct field_modify_info reg_c_x[] = {
1091                 [1] = {0, 0, 0},
1092         };
1093         enum mlx5_modification_field reg_type;
1094         int ret;
1095
1096         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1097         if (ret < 0)
1098                 return ret;
1099         MLX5_ASSERT(ret != REG_NON);
1100         MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1101         reg_type = reg_to_field[ret];
1102         MLX5_ASSERT(reg_type > 0);
1103         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1104         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1105                                              MLX5_MODIFICATION_TYPE_SET, error);
1106 }
1107
1108 /**
1109  * Convert internal COPY_REG action to DV specification.
1110  *
1111  * @param[in] dev
1112  *   Pointer to the rte_eth_dev structure.
1113  * @param[in,out] res
1114  *   Pointer to the modify-header resource.
1115  * @param[in] action
1116  *   Pointer to action specification.
1117  * @param[out] error
1118  *   Pointer to the error structure.
1119  *
1120  * @return
1121  *   0 on success, a negative errno value otherwise and rte_errno is set.
1122  */
1123 static int
1124 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1125                                  struct mlx5_flow_dv_modify_hdr_resource *res,
1126                                  const struct rte_flow_action *action,
1127                                  struct rte_flow_error *error)
1128 {
1129         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1130         rte_be32_t mask = RTE_BE32(UINT32_MAX);
1131         struct rte_flow_item item = {
1132                 .spec = NULL,
1133                 .mask = &mask,
1134         };
1135         struct field_modify_info reg_src[] = {
1136                 {4, 0, reg_to_field[conf->src]},
1137                 {0, 0, 0},
1138         };
1139         struct field_modify_info reg_dst = {
1140                 .offset = 0,
1141                 .id = reg_to_field[conf->dst],
1142         };
1143         /* Adjust reg_c[0] usage according to reported mask. */
1144         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1145                 struct mlx5_priv *priv = dev->data->dev_private;
1146                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1147
1148                 MLX5_ASSERT(reg_c0);
1149                 MLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1150                 if (conf->dst == REG_C_0) {
1151                         /* Copy to reg_c[0], within mask only. */
1152                         reg_dst.offset = rte_bsf32(reg_c0);
1153                         mask = rte_cpu_to_be_32(reg_c0 >> reg_dst.offset);
1154                 } else {
1155                         reg_dst.offset = 0;
1156                         mask = rte_cpu_to_be_32(reg_c0);
1157                 }
1158         }
1159         return flow_dv_convert_modify_action(&item,
1160                                              reg_src, &reg_dst, res,
1161                                              MLX5_MODIFICATION_TYPE_COPY,
1162                                              error);
1163 }
1164
1165 /**
1166  * Convert MARK action to DV specification. This routine is used
1167  * in extensive metadata only and requires metadata register to be
1168  * handled. In legacy mode hardware tag resource is engaged.
1169  *
1170  * @param[in] dev
1171  *   Pointer to the rte_eth_dev structure.
1172  * @param[in] conf
1173  *   Pointer to MARK action specification.
1174  * @param[in,out] resource
1175  *   Pointer to the modify-header resource.
1176  * @param[out] error
1177  *   Pointer to the error structure.
1178  *
1179  * @return
1180  *   0 on success, a negative errno value otherwise and rte_errno is set.
1181  */
1182 static int
1183 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1184                             const struct rte_flow_action_mark *conf,
1185                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1186                             struct rte_flow_error *error)
1187 {
1188         struct mlx5_priv *priv = dev->data->dev_private;
1189         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1190                                            priv->sh->dv_mark_mask);
1191         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1192         struct rte_flow_item item = {
1193                 .spec = &data,
1194                 .mask = &mask,
1195         };
1196         struct field_modify_info reg_c_x[] = {
1197                 [1] = {0, 0, 0},
1198         };
1199         int reg;
1200
1201         if (!mask)
1202                 return rte_flow_error_set(error, EINVAL,
1203                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1204                                           NULL, "zero mark action mask");
1205         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1206         if (reg < 0)
1207                 return reg;
1208         MLX5_ASSERT(reg > 0);
1209         if (reg == REG_C_0) {
1210                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1211                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1212
1213                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1214                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1215                 mask = rte_cpu_to_be_32(mask << shl_c0);
1216         }
1217         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1218         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1219                                              MLX5_MODIFICATION_TYPE_SET, error);
1220 }
1221
1222 /**
1223  * Get metadata register index for specified steering domain.
1224  *
1225  * @param[in] dev
1226  *   Pointer to the rte_eth_dev structure.
1227  * @param[in] attr
1228  *   Attributes of flow to determine steering domain.
1229  * @param[out] error
1230  *   Pointer to the error structure.
1231  *
1232  * @return
1233  *   positive index on success, a negative errno value otherwise
1234  *   and rte_errno is set.
1235  */
1236 static enum modify_reg
1237 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1238                          const struct rte_flow_attr *attr,
1239                          struct rte_flow_error *error)
1240 {
1241         int reg =
1242                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1243                                           MLX5_METADATA_FDB :
1244                                             attr->egress ?
1245                                             MLX5_METADATA_TX :
1246                                             MLX5_METADATA_RX, 0, error);
1247         if (reg < 0)
1248                 return rte_flow_error_set(error,
1249                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1250                                           NULL, "unavailable "
1251                                           "metadata register");
1252         return reg;
1253 }
1254
1255 /**
1256  * Convert SET_META action to DV specification.
1257  *
1258  * @param[in] dev
1259  *   Pointer to the rte_eth_dev structure.
1260  * @param[in,out] resource
1261  *   Pointer to the modify-header resource.
1262  * @param[in] attr
1263  *   Attributes of flow that includes this item.
1264  * @param[in] conf
1265  *   Pointer to action specification.
1266  * @param[out] error
1267  *   Pointer to the error structure.
1268  *
1269  * @return
1270  *   0 on success, a negative errno value otherwise and rte_errno is set.
1271  */
1272 static int
1273 flow_dv_convert_action_set_meta
1274                         (struct rte_eth_dev *dev,
1275                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1276                          const struct rte_flow_attr *attr,
1277                          const struct rte_flow_action_set_meta *conf,
1278                          struct rte_flow_error *error)
1279 {
1280         uint32_t mask = rte_cpu_to_be_32(conf->mask);
1281         uint32_t data = rte_cpu_to_be_32(conf->data) & mask;
1282         struct rte_flow_item item = {
1283                 .spec = &data,
1284                 .mask = &mask,
1285         };
1286         struct field_modify_info reg_c_x[] = {
1287                 [1] = {0, 0, 0},
1288         };
1289         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1290
1291         if (reg < 0)
1292                 return reg;
1293         MLX5_ASSERT(reg != REG_NON);
1294         if (reg == REG_C_0) {
1295                 struct mlx5_priv *priv = dev->data->dev_private;
1296                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1297                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1298
1299                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1300                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1301                 mask = rte_cpu_to_be_32(mask << shl_c0);
1302         }
1303         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1304         /* The routine expects parameters in memory as big-endian ones. */
1305         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1306                                              MLX5_MODIFICATION_TYPE_SET, error);
1307 }
1308
1309 /**
1310  * Convert modify-header set IPv4 DSCP action to DV specification.
1311  *
1312  * @param[in,out] resource
1313  *   Pointer to the modify-header resource.
1314  * @param[in] action
1315  *   Pointer to action specification.
1316  * @param[out] error
1317  *   Pointer to the error structure.
1318  *
1319  * @return
1320  *   0 on success, a negative errno value otherwise and rte_errno is set.
1321  */
1322 static int
1323 flow_dv_convert_action_modify_ipv4_dscp
1324                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1325                          const struct rte_flow_action *action,
1326                          struct rte_flow_error *error)
1327 {
1328         const struct rte_flow_action_set_dscp *conf =
1329                 (const struct rte_flow_action_set_dscp *)(action->conf);
1330         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1331         struct rte_flow_item_ipv4 ipv4;
1332         struct rte_flow_item_ipv4 ipv4_mask;
1333
1334         memset(&ipv4, 0, sizeof(ipv4));
1335         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1336         ipv4.hdr.type_of_service = conf->dscp;
1337         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1338         item.spec = &ipv4;
1339         item.mask = &ipv4_mask;
1340         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1341                                              MLX5_MODIFICATION_TYPE_SET, error);
1342 }
1343
1344 /**
1345  * Convert modify-header set IPv6 DSCP action to DV specification.
1346  *
1347  * @param[in,out] resource
1348  *   Pointer to the modify-header resource.
1349  * @param[in] action
1350  *   Pointer to action specification.
1351  * @param[out] error
1352  *   Pointer to the error structure.
1353  *
1354  * @return
1355  *   0 on success, a negative errno value otherwise and rte_errno is set.
1356  */
1357 static int
1358 flow_dv_convert_action_modify_ipv6_dscp
1359                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1360                          const struct rte_flow_action *action,
1361                          struct rte_flow_error *error)
1362 {
1363         const struct rte_flow_action_set_dscp *conf =
1364                 (const struct rte_flow_action_set_dscp *)(action->conf);
1365         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1366         struct rte_flow_item_ipv6 ipv6;
1367         struct rte_flow_item_ipv6 ipv6_mask;
1368
1369         memset(&ipv6, 0, sizeof(ipv6));
1370         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1371         /*
1372          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1373          * rdma-core only accept the DSCP bits byte aligned start from
1374          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1375          * bits in IPv6 case as rdma-core requires byte aligned value.
1376          */
1377         ipv6.hdr.vtc_flow = conf->dscp;
1378         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1379         item.spec = &ipv6;
1380         item.mask = &ipv6_mask;
1381         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1382                                              MLX5_MODIFICATION_TYPE_SET, error);
1383 }
1384
1385 static int
1386 mlx5_flow_item_field_width(struct rte_eth_dev *dev,
1387                            enum rte_flow_field_id field, int inherit,
1388                            const struct rte_flow_attr *attr,
1389                            struct rte_flow_error *error)
1390 {
1391         struct mlx5_priv *priv = dev->data->dev_private;
1392
1393         switch (field) {
1394         case RTE_FLOW_FIELD_START:
1395                 return 32;
1396         case RTE_FLOW_FIELD_MAC_DST:
1397         case RTE_FLOW_FIELD_MAC_SRC:
1398                 return 48;
1399         case RTE_FLOW_FIELD_VLAN_TYPE:
1400                 return 16;
1401         case RTE_FLOW_FIELD_VLAN_ID:
1402                 return 12;
1403         case RTE_FLOW_FIELD_MAC_TYPE:
1404                 return 16;
1405         case RTE_FLOW_FIELD_IPV4_DSCP:
1406                 return 6;
1407         case RTE_FLOW_FIELD_IPV4_TTL:
1408                 return 8;
1409         case RTE_FLOW_FIELD_IPV4_SRC:
1410         case RTE_FLOW_FIELD_IPV4_DST:
1411                 return 32;
1412         case RTE_FLOW_FIELD_IPV6_DSCP:
1413                 return 6;
1414         case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1415                 return 8;
1416         case RTE_FLOW_FIELD_IPV6_SRC:
1417         case RTE_FLOW_FIELD_IPV6_DST:
1418                 return 128;
1419         case RTE_FLOW_FIELD_TCP_PORT_SRC:
1420         case RTE_FLOW_FIELD_TCP_PORT_DST:
1421                 return 16;
1422         case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1423         case RTE_FLOW_FIELD_TCP_ACK_NUM:
1424                 return 32;
1425         case RTE_FLOW_FIELD_TCP_FLAGS:
1426                 return 9;
1427         case RTE_FLOW_FIELD_UDP_PORT_SRC:
1428         case RTE_FLOW_FIELD_UDP_PORT_DST:
1429                 return 16;
1430         case RTE_FLOW_FIELD_VXLAN_VNI:
1431         case RTE_FLOW_FIELD_GENEVE_VNI:
1432                 return 24;
1433         case RTE_FLOW_FIELD_GTP_TEID:
1434         case RTE_FLOW_FIELD_TAG:
1435                 return 32;
1436         case RTE_FLOW_FIELD_MARK:
1437                 return __builtin_popcount(priv->sh->dv_mark_mask);
1438         case RTE_FLOW_FIELD_META:
1439                 return (flow_dv_get_metadata_reg(dev, attr, error) == REG_C_0) ?
1440                         __builtin_popcount(priv->sh->dv_meta_mask) : 32;
1441         case RTE_FLOW_FIELD_POINTER:
1442         case RTE_FLOW_FIELD_VALUE:
1443                 return inherit < 0 ? 0 : inherit;
1444         default:
1445                 MLX5_ASSERT(false);
1446         }
1447         return 0;
1448 }
1449
1450 static void
1451 mlx5_flow_field_id_to_modify_info
1452                 (const struct rte_flow_action_modify_data *data,
1453                  struct field_modify_info *info, uint32_t *mask,
1454                  uint32_t width, uint32_t *shift, struct rte_eth_dev *dev,
1455                  const struct rte_flow_attr *attr, struct rte_flow_error *error)
1456 {
1457         struct mlx5_priv *priv = dev->data->dev_private;
1458         uint32_t idx = 0;
1459         uint32_t off = 0;
1460
1461         switch (data->field) {
1462         case RTE_FLOW_FIELD_START:
1463                 /* not supported yet */
1464                 MLX5_ASSERT(false);
1465                 break;
1466         case RTE_FLOW_FIELD_MAC_DST:
1467                 off = data->offset > 16 ? data->offset - 16 : 0;
1468                 if (mask) {
1469                         if (data->offset < 16) {
1470                                 info[idx] = (struct field_modify_info){2, 4,
1471                                                 MLX5_MODI_OUT_DMAC_15_0};
1472                                 if (width < 16) {
1473                                         mask[idx] = rte_cpu_to_be_16(0xffff >>
1474                                                                  (16 - width));
1475                                         width = 0;
1476                                 } else {
1477                                         mask[idx] = RTE_BE16(0xffff);
1478                                         width -= 16;
1479                                 }
1480                                 if (!width)
1481                                         break;
1482                                 ++idx;
1483                         }
1484                         info[idx] = (struct field_modify_info){4, 0,
1485                                                 MLX5_MODI_OUT_DMAC_47_16};
1486                         mask[idx] = rte_cpu_to_be_32((0xffffffff >>
1487                                                       (32 - width)) << off);
1488                 } else {
1489                         if (data->offset < 16)
1490                                 info[idx++] = (struct field_modify_info){2, 4,
1491                                                 MLX5_MODI_OUT_DMAC_15_0};
1492                         info[idx] = (struct field_modify_info){4, 0,
1493                                                 MLX5_MODI_OUT_DMAC_47_16};
1494                 }
1495                 break;
1496         case RTE_FLOW_FIELD_MAC_SRC:
1497                 off = data->offset > 16 ? data->offset - 16 : 0;
1498                 if (mask) {
1499                         if (data->offset < 16) {
1500                                 info[idx] = (struct field_modify_info){2, 4,
1501                                                 MLX5_MODI_OUT_SMAC_15_0};
1502                                 if (width < 16) {
1503                                         mask[idx] = rte_cpu_to_be_16(0xffff >>
1504                                                                  (16 - width));
1505                                         width = 0;
1506                                 } else {
1507                                         mask[idx] = RTE_BE16(0xffff);
1508                                         width -= 16;
1509                                 }
1510                                 if (!width)
1511                                         break;
1512                                 ++idx;
1513                         }
1514                         info[idx] = (struct field_modify_info){4, 0,
1515                                                 MLX5_MODI_OUT_SMAC_47_16};
1516                         mask[idx] = rte_cpu_to_be_32((0xffffffff >>
1517                                                       (32 - width)) << off);
1518                 } else {
1519                         if (data->offset < 16)
1520                                 info[idx++] = (struct field_modify_info){2, 4,
1521                                                 MLX5_MODI_OUT_SMAC_15_0};
1522                         info[idx] = (struct field_modify_info){4, 0,
1523                                                 MLX5_MODI_OUT_SMAC_47_16};
1524                 }
1525                 break;
1526         case RTE_FLOW_FIELD_VLAN_TYPE:
1527                 /* not supported yet */
1528                 break;
1529         case RTE_FLOW_FIELD_VLAN_ID:
1530                 info[idx] = (struct field_modify_info){2, 0,
1531                                         MLX5_MODI_OUT_FIRST_VID};
1532                 if (mask)
1533                         mask[idx] = rte_cpu_to_be_16(0x0fff >> (12 - width));
1534                 break;
1535         case RTE_FLOW_FIELD_MAC_TYPE:
1536                 info[idx] = (struct field_modify_info){2, 0,
1537                                         MLX5_MODI_OUT_ETHERTYPE};
1538                 if (mask)
1539                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1540                 break;
1541         case RTE_FLOW_FIELD_IPV4_DSCP:
1542                 info[idx] = (struct field_modify_info){1, 0,
1543                                         MLX5_MODI_OUT_IP_DSCP};
1544                 if (mask)
1545                         mask[idx] = 0x3f >> (6 - width);
1546                 break;
1547         case RTE_FLOW_FIELD_IPV4_TTL:
1548                 info[idx] = (struct field_modify_info){1, 0,
1549                                         MLX5_MODI_OUT_IPV4_TTL};
1550                 if (mask)
1551                         mask[idx] = 0xff >> (8 - width);
1552                 break;
1553         case RTE_FLOW_FIELD_IPV4_SRC:
1554                 info[idx] = (struct field_modify_info){4, 0,
1555                                         MLX5_MODI_OUT_SIPV4};
1556                 if (mask)
1557                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1558                                                      (32 - width));
1559                 break;
1560         case RTE_FLOW_FIELD_IPV4_DST:
1561                 info[idx] = (struct field_modify_info){4, 0,
1562                                         MLX5_MODI_OUT_DIPV4};
1563                 if (mask)
1564                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1565                                                      (32 - width));
1566                 break;
1567         case RTE_FLOW_FIELD_IPV6_DSCP:
1568                 info[idx] = (struct field_modify_info){1, 0,
1569                                         MLX5_MODI_OUT_IP_DSCP};
1570                 if (mask)
1571                         mask[idx] = 0x3f >> (6 - width);
1572                 break;
1573         case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1574                 info[idx] = (struct field_modify_info){1, 0,
1575                                         MLX5_MODI_OUT_IPV6_HOPLIMIT};
1576                 if (mask)
1577                         mask[idx] = 0xff >> (8 - width);
1578                 break;
1579         case RTE_FLOW_FIELD_IPV6_SRC:
1580                 if (mask) {
1581                         if (data->offset < 32) {
1582                                 info[idx] = (struct field_modify_info){4, 12,
1583                                                 MLX5_MODI_OUT_SIPV6_31_0};
1584                                 if (width < 32) {
1585                                         mask[idx] =
1586                                                 rte_cpu_to_be_32(0xffffffff >>
1587                                                                  (32 - width));
1588                                         width = 0;
1589                                 } else {
1590                                         mask[idx] = RTE_BE32(0xffffffff);
1591                                         width -= 32;
1592                                 }
1593                                 if (!width)
1594                                         break;
1595                                 ++idx;
1596                         }
1597                         if (data->offset < 64) {
1598                                 info[idx] = (struct field_modify_info){4, 8,
1599                                                 MLX5_MODI_OUT_SIPV6_63_32};
1600                                 if (width < 32) {
1601                                         mask[idx] =
1602                                                 rte_cpu_to_be_32(0xffffffff >>
1603                                                                  (32 - width));
1604                                         width = 0;
1605                                 } else {
1606                                         mask[idx] = RTE_BE32(0xffffffff);
1607                                         width -= 32;
1608                                 }
1609                                 if (!width)
1610                                         break;
1611                                 ++idx;
1612                         }
1613                         if (data->offset < 96) {
1614                                 info[idx] = (struct field_modify_info){4, 4,
1615                                                 MLX5_MODI_OUT_SIPV6_95_64};
1616                                 if (width < 32) {
1617                                         mask[idx] =
1618                                                 rte_cpu_to_be_32(0xffffffff >>
1619                                                                  (32 - width));
1620                                         width = 0;
1621                                 } else {
1622                                         mask[idx] = RTE_BE32(0xffffffff);
1623                                         width -= 32;
1624                                 }
1625                                 if (!width)
1626                                         break;
1627                                 ++idx;
1628                         }
1629                         info[idx] = (struct field_modify_info){4, 0,
1630                                                 MLX5_MODI_OUT_SIPV6_127_96};
1631                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1632                                                      (32 - width));
1633                 } else {
1634                         if (data->offset < 32)
1635                                 info[idx++] = (struct field_modify_info){4, 12,
1636                                                 MLX5_MODI_OUT_SIPV6_31_0};
1637                         if (data->offset < 64)
1638                                 info[idx++] = (struct field_modify_info){4, 8,
1639                                                 MLX5_MODI_OUT_SIPV6_63_32};
1640                         if (data->offset < 96)
1641                                 info[idx++] = (struct field_modify_info){4, 4,
1642                                                 MLX5_MODI_OUT_SIPV6_95_64};
1643                         if (data->offset < 128)
1644                                 info[idx++] = (struct field_modify_info){4, 0,
1645                                                 MLX5_MODI_OUT_SIPV6_127_96};
1646                 }
1647                 break;
1648         case RTE_FLOW_FIELD_IPV6_DST:
1649                 if (mask) {
1650                         if (data->offset < 32) {
1651                                 info[idx] = (struct field_modify_info){4, 12,
1652                                                 MLX5_MODI_OUT_DIPV6_31_0};
1653                                 if (width < 32) {
1654                                         mask[idx] =
1655                                                 rte_cpu_to_be_32(0xffffffff >>
1656                                                                  (32 - width));
1657                                         width = 0;
1658                                 } else {
1659                                         mask[idx] = RTE_BE32(0xffffffff);
1660                                         width -= 32;
1661                                 }
1662                                 if (!width)
1663                                         break;
1664                                 ++idx;
1665                         }
1666                         if (data->offset < 64) {
1667                                 info[idx] = (struct field_modify_info){4, 8,
1668                                                 MLX5_MODI_OUT_DIPV6_63_32};
1669                                 if (width < 32) {
1670                                         mask[idx] =
1671                                                 rte_cpu_to_be_32(0xffffffff >>
1672                                                                  (32 - width));
1673                                         width = 0;
1674                                 } else {
1675                                         mask[idx] = RTE_BE32(0xffffffff);
1676                                         width -= 32;
1677                                 }
1678                                 if (!width)
1679                                         break;
1680                                 ++idx;
1681                         }
1682                         if (data->offset < 96) {
1683                                 info[idx] = (struct field_modify_info){4, 4,
1684                                                 MLX5_MODI_OUT_DIPV6_95_64};
1685                                 if (width < 32) {
1686                                         mask[idx] =
1687                                                 rte_cpu_to_be_32(0xffffffff >>
1688                                                                  (32 - width));
1689                                         width = 0;
1690                                 } else {
1691                                         mask[idx] = RTE_BE32(0xffffffff);
1692                                         width -= 32;
1693                                 }
1694                                 if (!width)
1695                                         break;
1696                                 ++idx;
1697                         }
1698                         info[idx] = (struct field_modify_info){4, 0,
1699                                                 MLX5_MODI_OUT_DIPV6_127_96};
1700                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1701                                                      (32 - width));
1702                 } else {
1703                         if (data->offset < 32)
1704                                 info[idx++] = (struct field_modify_info){4, 12,
1705                                                 MLX5_MODI_OUT_DIPV6_31_0};
1706                         if (data->offset < 64)
1707                                 info[idx++] = (struct field_modify_info){4, 8,
1708                                                 MLX5_MODI_OUT_DIPV6_63_32};
1709                         if (data->offset < 96)
1710                                 info[idx++] = (struct field_modify_info){4, 4,
1711                                                 MLX5_MODI_OUT_DIPV6_95_64};
1712                         if (data->offset < 128)
1713                                 info[idx++] = (struct field_modify_info){4, 0,
1714                                                 MLX5_MODI_OUT_DIPV6_127_96};
1715                 }
1716                 break;
1717         case RTE_FLOW_FIELD_TCP_PORT_SRC:
1718                 info[idx] = (struct field_modify_info){2, 0,
1719                                         MLX5_MODI_OUT_TCP_SPORT};
1720                 if (mask)
1721                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1722                 break;
1723         case RTE_FLOW_FIELD_TCP_PORT_DST:
1724                 info[idx] = (struct field_modify_info){2, 0,
1725                                         MLX5_MODI_OUT_TCP_DPORT};
1726                 if (mask)
1727                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1728                 break;
1729         case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1730                 info[idx] = (struct field_modify_info){4, 0,
1731                                         MLX5_MODI_OUT_TCP_SEQ_NUM};
1732                 if (mask)
1733                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1734                                                      (32 - width));
1735                 break;
1736         case RTE_FLOW_FIELD_TCP_ACK_NUM:
1737                 info[idx] = (struct field_modify_info){4, 0,
1738                                         MLX5_MODI_OUT_TCP_ACK_NUM};
1739                 if (mask)
1740                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1741                                                      (32 - width));
1742                 break;
1743         case RTE_FLOW_FIELD_TCP_FLAGS:
1744                 info[idx] = (struct field_modify_info){2, 0,
1745                                         MLX5_MODI_OUT_TCP_FLAGS};
1746                 if (mask)
1747                         mask[idx] = rte_cpu_to_be_16(0x1ff >> (9 - width));
1748                 break;
1749         case RTE_FLOW_FIELD_UDP_PORT_SRC:
1750                 info[idx] = (struct field_modify_info){2, 0,
1751                                         MLX5_MODI_OUT_UDP_SPORT};
1752                 if (mask)
1753                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1754                 break;
1755         case RTE_FLOW_FIELD_UDP_PORT_DST:
1756                 info[idx] = (struct field_modify_info){2, 0,
1757                                         MLX5_MODI_OUT_UDP_DPORT};
1758                 if (mask)
1759                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1760                 break;
1761         case RTE_FLOW_FIELD_VXLAN_VNI:
1762                 /* not supported yet */
1763                 break;
1764         case RTE_FLOW_FIELD_GENEVE_VNI:
1765                 /* not supported yet*/
1766                 break;
1767         case RTE_FLOW_FIELD_GTP_TEID:
1768                 info[idx] = (struct field_modify_info){4, 0,
1769                                         MLX5_MODI_GTP_TEID};
1770                 if (mask)
1771                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1772                                                      (32 - width));
1773                 break;
1774         case RTE_FLOW_FIELD_TAG:
1775                 {
1776                         int reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG,
1777                                                    data->level, error);
1778                         if (reg < 0)
1779                                 return;
1780                         MLX5_ASSERT(reg != REG_NON);
1781                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1782                         info[idx] = (struct field_modify_info){4, 0,
1783                                                 reg_to_field[reg]};
1784                         if (mask)
1785                                 mask[idx] =
1786                                         rte_cpu_to_be_32(0xffffffff >>
1787                                                          (32 - width));
1788                 }
1789                 break;
1790         case RTE_FLOW_FIELD_MARK:
1791                 {
1792                         uint32_t mark_mask = priv->sh->dv_mark_mask;
1793                         uint32_t mark_count = __builtin_popcount(mark_mask);
1794                         int reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK,
1795                                                        0, error);
1796                         if (reg < 0)
1797                                 return;
1798                         MLX5_ASSERT(reg != REG_NON);
1799                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1800                         info[idx] = (struct field_modify_info){4, 0,
1801                                                 reg_to_field[reg]};
1802                         if (mask)
1803                                 mask[idx] = rte_cpu_to_be_32((mark_mask >>
1804                                          (mark_count - width)) & mark_mask);
1805                 }
1806                 break;
1807         case RTE_FLOW_FIELD_META:
1808                 {
1809                         uint32_t meta_mask = priv->sh->dv_meta_mask;
1810                         uint32_t meta_count = __builtin_popcount(meta_mask);
1811                         uint32_t msk_c0 =
1812                                 rte_cpu_to_be_32(priv->sh->dv_regc0_mask);
1813                         uint32_t shl_c0 = rte_bsf32(msk_c0);
1814                         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1815                         if (reg < 0)
1816                                 return;
1817                         MLX5_ASSERT(reg != REG_NON);
1818                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1819                         if (reg == REG_C_0)
1820                                 *shift = shl_c0;
1821                         info[idx] = (struct field_modify_info){4, 0,
1822                                                 reg_to_field[reg]};
1823                         if (mask)
1824                                 mask[idx] = rte_cpu_to_be_32((meta_mask >>
1825                                         (meta_count - width)) & meta_mask);
1826                 }
1827                 break;
1828         case RTE_FLOW_FIELD_POINTER:
1829         case RTE_FLOW_FIELD_VALUE:
1830         default:
1831                 MLX5_ASSERT(false);
1832                 break;
1833         }
1834 }
1835
1836 /**
1837  * Convert modify_field action to DV specification.
1838  *
1839  * @param[in] dev
1840  *   Pointer to the rte_eth_dev structure.
1841  * @param[in,out] resource
1842  *   Pointer to the modify-header resource.
1843  * @param[in] action
1844  *   Pointer to action specification.
1845  * @param[in] attr
1846  *   Attributes of flow that includes this item.
1847  * @param[out] error
1848  *   Pointer to the error structure.
1849  *
1850  * @return
1851  *   0 on success, a negative errno value otherwise and rte_errno is set.
1852  */
1853 static int
1854 flow_dv_convert_action_modify_field
1855                         (struct rte_eth_dev *dev,
1856                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1857                          const struct rte_flow_action *action,
1858                          const struct rte_flow_attr *attr,
1859                          struct rte_flow_error *error)
1860 {
1861         const struct rte_flow_action_modify_field *conf =
1862                 (const struct rte_flow_action_modify_field *)(action->conf);
1863         struct rte_flow_item item = {
1864                 .spec = NULL,
1865                 .mask = NULL
1866         };
1867         struct field_modify_info field[MLX5_ACT_MAX_MOD_FIELDS] = {
1868                                                                 {0, 0, 0} };
1869         struct field_modify_info dcopy[MLX5_ACT_MAX_MOD_FIELDS] = {
1870                                                                 {0, 0, 0} };
1871         uint32_t mask[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1872         uint32_t type;
1873         uint32_t shift = 0;
1874
1875         if (conf->src.field == RTE_FLOW_FIELD_POINTER ||
1876             conf->src.field == RTE_FLOW_FIELD_VALUE) {
1877                 type = MLX5_MODIFICATION_TYPE_SET;
1878                 /** For SET fill the destination field (field) first. */
1879                 mlx5_flow_field_id_to_modify_info(&conf->dst, field, mask,
1880                                                   conf->width, &shift, dev,
1881                                                   attr, error);
1882                 item.spec = conf->src.field == RTE_FLOW_FIELD_POINTER ?
1883                                         (void *)(uintptr_t)conf->src.pvalue :
1884                                         (void *)(uintptr_t)&conf->src.value;
1885         } else {
1886                 type = MLX5_MODIFICATION_TYPE_COPY;
1887                 /** For COPY fill the destination field (dcopy) without mask. */
1888                 mlx5_flow_field_id_to_modify_info(&conf->dst, dcopy, NULL,
1889                                                   conf->width, &shift, dev,
1890                                                   attr, error);
1891                 /** Then construct the source field (field) with mask. */
1892                 mlx5_flow_field_id_to_modify_info(&conf->src, field, mask,
1893                                                   conf->width, &shift,
1894                                                   dev, attr, error);
1895         }
1896         item.mask = &mask;
1897         return flow_dv_convert_modify_action(&item,
1898                         field, dcopy, resource, type, error);
1899 }
1900
1901 /**
1902  * Validate MARK item.
1903  *
1904  * @param[in] dev
1905  *   Pointer to the rte_eth_dev structure.
1906  * @param[in] item
1907  *   Item specification.
1908  * @param[in] attr
1909  *   Attributes of flow that includes this item.
1910  * @param[out] error
1911  *   Pointer to error structure.
1912  *
1913  * @return
1914  *   0 on success, a negative errno value otherwise and rte_errno is set.
1915  */
1916 static int
1917 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1918                            const struct rte_flow_item *item,
1919                            const struct rte_flow_attr *attr __rte_unused,
1920                            struct rte_flow_error *error)
1921 {
1922         struct mlx5_priv *priv = dev->data->dev_private;
1923         struct mlx5_dev_config *config = &priv->config;
1924         const struct rte_flow_item_mark *spec = item->spec;
1925         const struct rte_flow_item_mark *mask = item->mask;
1926         const struct rte_flow_item_mark nic_mask = {
1927                 .id = priv->sh->dv_mark_mask,
1928         };
1929         int ret;
1930
1931         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1932                 return rte_flow_error_set(error, ENOTSUP,
1933                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1934                                           "extended metadata feature"
1935                                           " isn't enabled");
1936         if (!mlx5_flow_ext_mreg_supported(dev))
1937                 return rte_flow_error_set(error, ENOTSUP,
1938                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1939                                           "extended metadata register"
1940                                           " isn't supported");
1941         if (!nic_mask.id)
1942                 return rte_flow_error_set(error, ENOTSUP,
1943                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1944                                           "extended metadata register"
1945                                           " isn't available");
1946         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1947         if (ret < 0)
1948                 return ret;
1949         if (!spec)
1950                 return rte_flow_error_set(error, EINVAL,
1951                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1952                                           item->spec,
1953                                           "data cannot be empty");
1954         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1955                 return rte_flow_error_set(error, EINVAL,
1956                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1957                                           &spec->id,
1958                                           "mark id exceeds the limit");
1959         if (!mask)
1960                 mask = &nic_mask;
1961         if (!mask->id)
1962                 return rte_flow_error_set(error, EINVAL,
1963                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1964                                         "mask cannot be zero");
1965
1966         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1967                                         (const uint8_t *)&nic_mask,
1968                                         sizeof(struct rte_flow_item_mark),
1969                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1970         if (ret < 0)
1971                 return ret;
1972         return 0;
1973 }
1974
1975 /**
1976  * Validate META item.
1977  *
1978  * @param[in] dev
1979  *   Pointer to the rte_eth_dev structure.
1980  * @param[in] item
1981  *   Item specification.
1982  * @param[in] attr
1983  *   Attributes of flow that includes this item.
1984  * @param[out] error
1985  *   Pointer to error structure.
1986  *
1987  * @return
1988  *   0 on success, a negative errno value otherwise and rte_errno is set.
1989  */
1990 static int
1991 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1992                            const struct rte_flow_item *item,
1993                            const struct rte_flow_attr *attr,
1994                            struct rte_flow_error *error)
1995 {
1996         struct mlx5_priv *priv = dev->data->dev_private;
1997         struct mlx5_dev_config *config = &priv->config;
1998         const struct rte_flow_item_meta *spec = item->spec;
1999         const struct rte_flow_item_meta *mask = item->mask;
2000         struct rte_flow_item_meta nic_mask = {
2001                 .data = UINT32_MAX
2002         };
2003         int reg;
2004         int ret;
2005
2006         if (!spec)
2007                 return rte_flow_error_set(error, EINVAL,
2008                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2009                                           item->spec,
2010                                           "data cannot be empty");
2011         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2012                 if (!mlx5_flow_ext_mreg_supported(dev))
2013                         return rte_flow_error_set(error, ENOTSUP,
2014                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2015                                           "extended metadata register"
2016                                           " isn't supported");
2017                 reg = flow_dv_get_metadata_reg(dev, attr, error);
2018                 if (reg < 0)
2019                         return reg;
2020                 if (reg == REG_NON)
2021                         return rte_flow_error_set(error, ENOTSUP,
2022                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2023                                         "unavalable extended metadata register");
2024                 if (reg == REG_B)
2025                         return rte_flow_error_set(error, ENOTSUP,
2026                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2027                                           "match on reg_b "
2028                                           "isn't supported");
2029                 if (reg != REG_A)
2030                         nic_mask.data = priv->sh->dv_meta_mask;
2031         } else {
2032                 if (attr->transfer)
2033                         return rte_flow_error_set(error, ENOTSUP,
2034                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2035                                         "extended metadata feature "
2036                                         "should be enabled when "
2037                                         "meta item is requested "
2038                                         "with e-switch mode ");
2039                 if (attr->ingress)
2040                         return rte_flow_error_set(error, ENOTSUP,
2041                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2042                                         "match on metadata for ingress "
2043                                         "is not supported in legacy "
2044                                         "metadata mode");
2045         }
2046         if (!mask)
2047                 mask = &rte_flow_item_meta_mask;
2048         if (!mask->data)
2049                 return rte_flow_error_set(error, EINVAL,
2050                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2051                                         "mask cannot be zero");
2052
2053         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2054                                         (const uint8_t *)&nic_mask,
2055                                         sizeof(struct rte_flow_item_meta),
2056                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2057         return ret;
2058 }
2059
2060 /**
2061  * Validate TAG item.
2062  *
2063  * @param[in] dev
2064  *   Pointer to the rte_eth_dev structure.
2065  * @param[in] item
2066  *   Item specification.
2067  * @param[in] attr
2068  *   Attributes of flow that includes this item.
2069  * @param[out] error
2070  *   Pointer to error structure.
2071  *
2072  * @return
2073  *   0 on success, a negative errno value otherwise and rte_errno is set.
2074  */
2075 static int
2076 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
2077                           const struct rte_flow_item *item,
2078                           const struct rte_flow_attr *attr __rte_unused,
2079                           struct rte_flow_error *error)
2080 {
2081         const struct rte_flow_item_tag *spec = item->spec;
2082         const struct rte_flow_item_tag *mask = item->mask;
2083         const struct rte_flow_item_tag nic_mask = {
2084                 .data = RTE_BE32(UINT32_MAX),
2085                 .index = 0xff,
2086         };
2087         int ret;
2088
2089         if (!mlx5_flow_ext_mreg_supported(dev))
2090                 return rte_flow_error_set(error, ENOTSUP,
2091                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2092                                           "extensive metadata register"
2093                                           " isn't supported");
2094         if (!spec)
2095                 return rte_flow_error_set(error, EINVAL,
2096                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2097                                           item->spec,
2098                                           "data cannot be empty");
2099         if (!mask)
2100                 mask = &rte_flow_item_tag_mask;
2101         if (!mask->data)
2102                 return rte_flow_error_set(error, EINVAL,
2103                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2104                                         "mask cannot be zero");
2105
2106         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2107                                         (const uint8_t *)&nic_mask,
2108                                         sizeof(struct rte_flow_item_tag),
2109                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2110         if (ret < 0)
2111                 return ret;
2112         if (mask->index != 0xff)
2113                 return rte_flow_error_set(error, EINVAL,
2114                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2115                                           "partial mask for tag index"
2116                                           " is not supported");
2117         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
2118         if (ret < 0)
2119                 return ret;
2120         MLX5_ASSERT(ret != REG_NON);
2121         return 0;
2122 }
2123
2124 /**
2125  * Validate vport item.
2126  *
2127  * @param[in] dev
2128  *   Pointer to the rte_eth_dev structure.
2129  * @param[in] item
2130  *   Item specification.
2131  * @param[in] attr
2132  *   Attributes of flow that includes this item.
2133  * @param[in] item_flags
2134  *   Bit-fields that holds the items detected until now.
2135  * @param[out] error
2136  *   Pointer to error structure.
2137  *
2138  * @return
2139  *   0 on success, a negative errno value otherwise and rte_errno is set.
2140  */
2141 static int
2142 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
2143                               const struct rte_flow_item *item,
2144                               const struct rte_flow_attr *attr,
2145                               uint64_t item_flags,
2146                               struct rte_flow_error *error)
2147 {
2148         const struct rte_flow_item_port_id *spec = item->spec;
2149         const struct rte_flow_item_port_id *mask = item->mask;
2150         const struct rte_flow_item_port_id switch_mask = {
2151                         .id = 0xffffffff,
2152         };
2153         struct mlx5_priv *esw_priv;
2154         struct mlx5_priv *dev_priv;
2155         int ret;
2156
2157         if (!attr->transfer)
2158                 return rte_flow_error_set(error, EINVAL,
2159                                           RTE_FLOW_ERROR_TYPE_ITEM,
2160                                           NULL,
2161                                           "match on port id is valid only"
2162                                           " when transfer flag is enabled");
2163         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
2164                 return rte_flow_error_set(error, ENOTSUP,
2165                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2166                                           "multiple source ports are not"
2167                                           " supported");
2168         if (!mask)
2169                 mask = &switch_mask;
2170         if (mask->id != 0xffffffff)
2171                 return rte_flow_error_set(error, ENOTSUP,
2172                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2173                                            mask,
2174                                            "no support for partial mask on"
2175                                            " \"id\" field");
2176         ret = mlx5_flow_item_acceptable
2177                                 (item, (const uint8_t *)mask,
2178                                  (const uint8_t *)&rte_flow_item_port_id_mask,
2179                                  sizeof(struct rte_flow_item_port_id),
2180                                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2181         if (ret)
2182                 return ret;
2183         if (!spec)
2184                 return 0;
2185         if (spec->id == MLX5_PORT_ESW_MGR)
2186                 return 0;
2187         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
2188         if (!esw_priv)
2189                 return rte_flow_error_set(error, rte_errno,
2190                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2191                                           "failed to obtain E-Switch info for"
2192                                           " port");
2193         dev_priv = mlx5_dev_to_eswitch_info(dev);
2194         if (!dev_priv)
2195                 return rte_flow_error_set(error, rte_errno,
2196                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2197                                           NULL,
2198                                           "failed to obtain E-Switch info");
2199         if (esw_priv->domain_id != dev_priv->domain_id)
2200                 return rte_flow_error_set(error, EINVAL,
2201                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2202                                           "cannot match on a port from a"
2203                                           " different E-Switch");
2204         return 0;
2205 }
2206
2207 /**
2208  * Validate VLAN item.
2209  *
2210  * @param[in] item
2211  *   Item specification.
2212  * @param[in] item_flags
2213  *   Bit-fields that holds the items detected until now.
2214  * @param[in] dev
2215  *   Ethernet device flow is being created on.
2216  * @param[out] error
2217  *   Pointer to error structure.
2218  *
2219  * @return
2220  *   0 on success, a negative errno value otherwise and rte_errno is set.
2221  */
2222 static int
2223 flow_dv_validate_item_vlan(const struct rte_flow_item *item,
2224                            uint64_t item_flags,
2225                            struct rte_eth_dev *dev,
2226                            struct rte_flow_error *error)
2227 {
2228         const struct rte_flow_item_vlan *mask = item->mask;
2229         const struct rte_flow_item_vlan nic_mask = {
2230                 .tci = RTE_BE16(UINT16_MAX),
2231                 .inner_type = RTE_BE16(UINT16_MAX),
2232                 .has_more_vlan = 1,
2233         };
2234         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2235         int ret;
2236         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2237                                         MLX5_FLOW_LAYER_INNER_L4) :
2238                                        (MLX5_FLOW_LAYER_OUTER_L3 |
2239                                         MLX5_FLOW_LAYER_OUTER_L4);
2240         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2241                                         MLX5_FLOW_LAYER_OUTER_VLAN;
2242
2243         if (item_flags & vlanm)
2244                 return rte_flow_error_set(error, EINVAL,
2245                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2246                                           "multiple VLAN layers not supported");
2247         else if ((item_flags & l34m) != 0)
2248                 return rte_flow_error_set(error, EINVAL,
2249                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2250                                           "VLAN cannot follow L3/L4 layer");
2251         if (!mask)
2252                 mask = &rte_flow_item_vlan_mask;
2253         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2254                                         (const uint8_t *)&nic_mask,
2255                                         sizeof(struct rte_flow_item_vlan),
2256                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2257         if (ret)
2258                 return ret;
2259         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2260                 struct mlx5_priv *priv = dev->data->dev_private;
2261
2262                 if (priv->vmwa_context) {
2263                         /*
2264                          * Non-NULL context means we have a virtual machine
2265                          * and SR-IOV enabled, we have to create VLAN interface
2266                          * to make hypervisor to setup E-Switch vport
2267                          * context correctly. We avoid creating the multiple
2268                          * VLAN interfaces, so we cannot support VLAN tag mask.
2269                          */
2270                         return rte_flow_error_set(error, EINVAL,
2271                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2272                                                   item,
2273                                                   "VLAN tag mask is not"
2274                                                   " supported in virtual"
2275                                                   " environment");
2276                 }
2277         }
2278         return 0;
2279 }
2280
2281 /*
2282  * GTP flags are contained in 1 byte of the format:
2283  * -------------------------------------------
2284  * | bit   | 0 - 2   | 3  | 4   | 5 | 6 | 7  |
2285  * |-----------------------------------------|
2286  * | value | Version | PT | Res | E | S | PN |
2287  * -------------------------------------------
2288  *
2289  * Matching is supported only for GTP flags E, S, PN.
2290  */
2291 #define MLX5_GTP_FLAGS_MASK     0x07
2292
2293 /**
2294  * Validate GTP item.
2295  *
2296  * @param[in] dev
2297  *   Pointer to the rte_eth_dev structure.
2298  * @param[in] item
2299  *   Item specification.
2300  * @param[in] item_flags
2301  *   Bit-fields that holds the items detected until now.
2302  * @param[out] error
2303  *   Pointer to error structure.
2304  *
2305  * @return
2306  *   0 on success, a negative errno value otherwise and rte_errno is set.
2307  */
2308 static int
2309 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
2310                           const struct rte_flow_item *item,
2311                           uint64_t item_flags,
2312                           struct rte_flow_error *error)
2313 {
2314         struct mlx5_priv *priv = dev->data->dev_private;
2315         const struct rte_flow_item_gtp *spec = item->spec;
2316         const struct rte_flow_item_gtp *mask = item->mask;
2317         const struct rte_flow_item_gtp nic_mask = {
2318                 .v_pt_rsv_flags = MLX5_GTP_FLAGS_MASK,
2319                 .msg_type = 0xff,
2320                 .teid = RTE_BE32(0xffffffff),
2321         };
2322
2323         if (!priv->config.hca_attr.tunnel_stateless_gtp)
2324                 return rte_flow_error_set(error, ENOTSUP,
2325                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2326                                           "GTP support is not enabled");
2327         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2328                 return rte_flow_error_set(error, ENOTSUP,
2329                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2330                                           "multiple tunnel layers not"
2331                                           " supported");
2332         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2333                 return rte_flow_error_set(error, EINVAL,
2334                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2335                                           "no outer UDP layer found");
2336         if (!mask)
2337                 mask = &rte_flow_item_gtp_mask;
2338         if (spec && spec->v_pt_rsv_flags & ~MLX5_GTP_FLAGS_MASK)
2339                 return rte_flow_error_set(error, ENOTSUP,
2340                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2341                                           "Match is supported for GTP"
2342                                           " flags only");
2343         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2344                                          (const uint8_t *)&nic_mask,
2345                                          sizeof(struct rte_flow_item_gtp),
2346                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2347 }
2348
2349 /**
2350  * Validate GTP PSC item.
2351  *
2352  * @param[in] item
2353  *   Item specification.
2354  * @param[in] last_item
2355  *   Previous validated item in the pattern items.
2356  * @param[in] gtp_item
2357  *   Previous GTP item specification.
2358  * @param[in] attr
2359  *   Pointer to flow attributes.
2360  * @param[out] error
2361  *   Pointer to error structure.
2362  *
2363  * @return
2364  *   0 on success, a negative errno value otherwise and rte_errno is set.
2365  */
2366 static int
2367 flow_dv_validate_item_gtp_psc(const struct rte_flow_item *item,
2368                               uint64_t last_item,
2369                               const struct rte_flow_item *gtp_item,
2370                               const struct rte_flow_attr *attr,
2371                               struct rte_flow_error *error)
2372 {
2373         const struct rte_flow_item_gtp *gtp_spec;
2374         const struct rte_flow_item_gtp *gtp_mask;
2375         const struct rte_flow_item_gtp_psc *mask;
2376         const struct rte_flow_item_gtp_psc nic_mask = {
2377                 .hdr.type = 0xF,
2378                 .hdr.qfi = 0x3F,
2379         };
2380
2381         if (!gtp_item || !(last_item & MLX5_FLOW_LAYER_GTP))
2382                 return rte_flow_error_set
2383                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2384                          "GTP PSC item must be preceded with GTP item");
2385         gtp_spec = gtp_item->spec;
2386         gtp_mask = gtp_item->mask ? gtp_item->mask : &rte_flow_item_gtp_mask;
2387         /* GTP spec and E flag is requested to match zero. */
2388         if (gtp_spec &&
2389                 (gtp_mask->v_pt_rsv_flags &
2390                 ~gtp_spec->v_pt_rsv_flags & MLX5_GTP_EXT_HEADER_FLAG))
2391                 return rte_flow_error_set
2392                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2393                          "GTP E flag must be 1 to match GTP PSC");
2394         /* Check the flow is not created in group zero. */
2395         if (!attr->transfer && !attr->group)
2396                 return rte_flow_error_set
2397                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2398                          "GTP PSC is not supported for group 0");
2399         /* GTP spec is here and E flag is requested to match zero. */
2400         if (!item->spec)
2401                 return 0;
2402         mask = item->mask ? item->mask : &rte_flow_item_gtp_psc_mask;
2403         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2404                                          (const uint8_t *)&nic_mask,
2405                                          sizeof(struct rte_flow_item_gtp_psc),
2406                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2407 }
2408
2409 /**
2410  * Validate IPV4 item.
2411  * Use existing validation function mlx5_flow_validate_item_ipv4(), and
2412  * add specific validation of fragment_offset field,
2413  *
2414  * @param[in] item
2415  *   Item specification.
2416  * @param[in] item_flags
2417  *   Bit-fields that holds the items detected until now.
2418  * @param[out] error
2419  *   Pointer to error structure.
2420  *
2421  * @return
2422  *   0 on success, a negative errno value otherwise and rte_errno is set.
2423  */
2424 static int
2425 flow_dv_validate_item_ipv4(struct rte_eth_dev *dev,
2426                            const struct rte_flow_item *item,
2427                            uint64_t item_flags, uint64_t last_item,
2428                            uint16_t ether_type, struct rte_flow_error *error)
2429 {
2430         int ret;
2431         struct mlx5_priv *priv = dev->data->dev_private;
2432         const struct rte_flow_item_ipv4 *spec = item->spec;
2433         const struct rte_flow_item_ipv4 *last = item->last;
2434         const struct rte_flow_item_ipv4 *mask = item->mask;
2435         rte_be16_t fragment_offset_spec = 0;
2436         rte_be16_t fragment_offset_last = 0;
2437         struct rte_flow_item_ipv4 nic_ipv4_mask = {
2438                 .hdr = {
2439                         .src_addr = RTE_BE32(0xffffffff),
2440                         .dst_addr = RTE_BE32(0xffffffff),
2441                         .type_of_service = 0xff,
2442                         .fragment_offset = RTE_BE16(0xffff),
2443                         .next_proto_id = 0xff,
2444                         .time_to_live = 0xff,
2445                 },
2446         };
2447
2448         if (mask && (mask->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK)) {
2449                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2450                 bool ihl_cap = !tunnel ? priv->config.hca_attr.outer_ipv4_ihl :
2451                                priv->config.hca_attr.inner_ipv4_ihl;
2452                 if (!ihl_cap)
2453                         return rte_flow_error_set(error, ENOTSUP,
2454                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2455                                                   item,
2456                                                   "IPV4 ihl offload not supported");
2457                 nic_ipv4_mask.hdr.version_ihl = mask->hdr.version_ihl;
2458         }
2459         ret = mlx5_flow_validate_item_ipv4(item, item_flags, last_item,
2460                                            ether_type, &nic_ipv4_mask,
2461                                            MLX5_ITEM_RANGE_ACCEPTED, error);
2462         if (ret < 0)
2463                 return ret;
2464         if (spec && mask)
2465                 fragment_offset_spec = spec->hdr.fragment_offset &
2466                                        mask->hdr.fragment_offset;
2467         if (!fragment_offset_spec)
2468                 return 0;
2469         /*
2470          * spec and mask are valid, enforce using full mask to make sure the
2471          * complete value is used correctly.
2472          */
2473         if ((mask->hdr.fragment_offset & RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2474                         != RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2475                 return rte_flow_error_set(error, EINVAL,
2476                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2477                                           item, "must use full mask for"
2478                                           " fragment_offset");
2479         /*
2480          * Match on fragment_offset 0x2000 means MF is 1 and frag-offset is 0,
2481          * indicating this is 1st fragment of fragmented packet.
2482          * This is not yet supported in MLX5, return appropriate error message.
2483          */
2484         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG))
2485                 return rte_flow_error_set(error, ENOTSUP,
2486                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2487                                           "match on first fragment not "
2488                                           "supported");
2489         if (fragment_offset_spec && !last)
2490                 return rte_flow_error_set(error, ENOTSUP,
2491                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2492                                           "specified value not supported");
2493         /* spec and last are valid, validate the specified range. */
2494         fragment_offset_last = last->hdr.fragment_offset &
2495                                mask->hdr.fragment_offset;
2496         /*
2497          * Match on fragment_offset spec 0x2001 and last 0x3fff
2498          * means MF is 1 and frag-offset is > 0.
2499          * This packet is fragment 2nd and onward, excluding last.
2500          * This is not yet supported in MLX5, return appropriate
2501          * error message.
2502          */
2503         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG + 1) &&
2504             fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2505                 return rte_flow_error_set(error, ENOTSUP,
2506                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2507                                           last, "match on following "
2508                                           "fragments not supported");
2509         /*
2510          * Match on fragment_offset spec 0x0001 and last 0x1fff
2511          * means MF is 0 and frag-offset is > 0.
2512          * This packet is last fragment of fragmented packet.
2513          * This is not yet supported in MLX5, return appropriate
2514          * error message.
2515          */
2516         if (fragment_offset_spec == RTE_BE16(1) &&
2517             fragment_offset_last == RTE_BE16(RTE_IPV4_HDR_OFFSET_MASK))
2518                 return rte_flow_error_set(error, ENOTSUP,
2519                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2520                                           last, "match on last "
2521                                           "fragment not supported");
2522         /*
2523          * Match on fragment_offset spec 0x0001 and last 0x3fff
2524          * means MF and/or frag-offset is not 0.
2525          * This is a fragmented packet.
2526          * Other range values are invalid and rejected.
2527          */
2528         if (!(fragment_offset_spec == RTE_BE16(1) &&
2529               fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK)))
2530                 return rte_flow_error_set(error, ENOTSUP,
2531                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2532                                           "specified range not supported");
2533         return 0;
2534 }
2535
2536 /**
2537  * Validate IPV6 fragment extension item.
2538  *
2539  * @param[in] item
2540  *   Item specification.
2541  * @param[in] item_flags
2542  *   Bit-fields that holds the items detected until now.
2543  * @param[out] error
2544  *   Pointer to error structure.
2545  *
2546  * @return
2547  *   0 on success, a negative errno value otherwise and rte_errno is set.
2548  */
2549 static int
2550 flow_dv_validate_item_ipv6_frag_ext(const struct rte_flow_item *item,
2551                                     uint64_t item_flags,
2552                                     struct rte_flow_error *error)
2553 {
2554         const struct rte_flow_item_ipv6_frag_ext *spec = item->spec;
2555         const struct rte_flow_item_ipv6_frag_ext *last = item->last;
2556         const struct rte_flow_item_ipv6_frag_ext *mask = item->mask;
2557         rte_be16_t frag_data_spec = 0;
2558         rte_be16_t frag_data_last = 0;
2559         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2560         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2561                                       MLX5_FLOW_LAYER_OUTER_L4;
2562         int ret = 0;
2563         struct rte_flow_item_ipv6_frag_ext nic_mask = {
2564                 .hdr = {
2565                         .next_header = 0xff,
2566                         .frag_data = RTE_BE16(0xffff),
2567                 },
2568         };
2569
2570         if (item_flags & l4m)
2571                 return rte_flow_error_set(error, EINVAL,
2572                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2573                                           "ipv6 fragment extension item cannot "
2574                                           "follow L4 item.");
2575         if ((tunnel && !(item_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
2576             (!tunnel && !(item_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV6)))
2577                 return rte_flow_error_set(error, EINVAL,
2578                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2579                                           "ipv6 fragment extension item must "
2580                                           "follow ipv6 item");
2581         if (spec && mask)
2582                 frag_data_spec = spec->hdr.frag_data & mask->hdr.frag_data;
2583         if (!frag_data_spec)
2584                 return 0;
2585         /*
2586          * spec and mask are valid, enforce using full mask to make sure the
2587          * complete value is used correctly.
2588          */
2589         if ((mask->hdr.frag_data & RTE_BE16(RTE_IPV6_FRAG_USED_MASK)) !=
2590                                 RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2591                 return rte_flow_error_set(error, EINVAL,
2592                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2593                                           item, "must use full mask for"
2594                                           " frag_data");
2595         /*
2596          * Match on frag_data 0x00001 means M is 1 and frag-offset is 0.
2597          * This is 1st fragment of fragmented packet.
2598          */
2599         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_MF_MASK))
2600                 return rte_flow_error_set(error, ENOTSUP,
2601                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2602                                           "match on first fragment not "
2603                                           "supported");
2604         if (frag_data_spec && !last)
2605                 return rte_flow_error_set(error, EINVAL,
2606                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2607                                           "specified value not supported");
2608         ret = mlx5_flow_item_acceptable
2609                                 (item, (const uint8_t *)mask,
2610                                  (const uint8_t *)&nic_mask,
2611                                  sizeof(struct rte_flow_item_ipv6_frag_ext),
2612                                  MLX5_ITEM_RANGE_ACCEPTED, error);
2613         if (ret)
2614                 return ret;
2615         /* spec and last are valid, validate the specified range. */
2616         frag_data_last = last->hdr.frag_data & mask->hdr.frag_data;
2617         /*
2618          * Match on frag_data spec 0x0009 and last 0xfff9
2619          * means M is 1 and frag-offset is > 0.
2620          * This packet is fragment 2nd and onward, excluding last.
2621          * This is not yet supported in MLX5, return appropriate
2622          * error message.
2623          */
2624         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN |
2625                                        RTE_IPV6_EHDR_MF_MASK) &&
2626             frag_data_last == RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2627                 return rte_flow_error_set(error, ENOTSUP,
2628                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2629                                           last, "match on following "
2630                                           "fragments not supported");
2631         /*
2632          * Match on frag_data spec 0x0008 and last 0xfff8
2633          * means M is 0 and frag-offset is > 0.
2634          * This packet is last fragment of fragmented packet.
2635          * This is not yet supported in MLX5, return appropriate
2636          * error message.
2637          */
2638         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN) &&
2639             frag_data_last == RTE_BE16(RTE_IPV6_EHDR_FO_MASK))
2640                 return rte_flow_error_set(error, ENOTSUP,
2641                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2642                                           last, "match on last "
2643                                           "fragment not supported");
2644         /* Other range values are invalid and rejected. */
2645         return rte_flow_error_set(error, EINVAL,
2646                                   RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2647                                   "specified range not supported");
2648 }
2649
2650 /*
2651  * Validate ASO CT item.
2652  *
2653  * @param[in] dev
2654  *   Pointer to the rte_eth_dev structure.
2655  * @param[in] item
2656  *   Item specification.
2657  * @param[in] item_flags
2658  *   Pointer to bit-fields that holds the items detected until now.
2659  * @param[out] error
2660  *   Pointer to error structure.
2661  *
2662  * @return
2663  *   0 on success, a negative errno value otherwise and rte_errno is set.
2664  */
2665 static int
2666 flow_dv_validate_item_aso_ct(struct rte_eth_dev *dev,
2667                              const struct rte_flow_item *item,
2668                              uint64_t *item_flags,
2669                              struct rte_flow_error *error)
2670 {
2671         const struct rte_flow_item_conntrack *spec = item->spec;
2672         const struct rte_flow_item_conntrack *mask = item->mask;
2673         RTE_SET_USED(dev);
2674         uint32_t flags;
2675
2676         if (*item_flags & MLX5_FLOW_LAYER_ASO_CT)
2677                 return rte_flow_error_set(error, EINVAL,
2678                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2679                                           "Only one CT is supported");
2680         if (!mask)
2681                 mask = &rte_flow_item_conntrack_mask;
2682         flags = spec->flags & mask->flags;
2683         if ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID) &&
2684             ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID) ||
2685              (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD) ||
2686              (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)))
2687                 return rte_flow_error_set(error, EINVAL,
2688                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2689                                           "Conflict status bits");
2690         /* State change also needs to be considered. */
2691         *item_flags |= MLX5_FLOW_LAYER_ASO_CT;
2692         return 0;
2693 }
2694
2695 /**
2696  * Validate the pop VLAN action.
2697  *
2698  * @param[in] dev
2699  *   Pointer to the rte_eth_dev structure.
2700  * @param[in] action_flags
2701  *   Holds the actions detected until now.
2702  * @param[in] action
2703  *   Pointer to the pop vlan action.
2704  * @param[in] item_flags
2705  *   The items found in this flow rule.
2706  * @param[in] attr
2707  *   Pointer to flow attributes.
2708  * @param[out] error
2709  *   Pointer to error structure.
2710  *
2711  * @return
2712  *   0 on success, a negative errno value otherwise and rte_errno is set.
2713  */
2714 static int
2715 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
2716                                  uint64_t action_flags,
2717                                  const struct rte_flow_action *action,
2718                                  uint64_t item_flags,
2719                                  const struct rte_flow_attr *attr,
2720                                  struct rte_flow_error *error)
2721 {
2722         const struct mlx5_priv *priv = dev->data->dev_private;
2723         struct mlx5_dev_ctx_shared *sh = priv->sh;
2724         bool direction_error = false;
2725
2726         if (!priv->sh->pop_vlan_action)
2727                 return rte_flow_error_set(error, ENOTSUP,
2728                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2729                                           NULL,
2730                                           "pop vlan action is not supported");
2731         /* Pop VLAN is not supported in egress except for CX6 FDB mode. */
2732         if (attr->transfer) {
2733                 bool fdb_tx = priv->representor_id != UINT16_MAX;
2734                 bool is_cx5 = sh->steering_format_version ==
2735                     MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2736
2737                 if (fdb_tx && is_cx5)
2738                         direction_error = true;
2739         } else if (attr->egress) {
2740                 direction_error = true;
2741         }
2742         if (direction_error)
2743                 return rte_flow_error_set(error, ENOTSUP,
2744                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2745                                           NULL,
2746                                           "pop vlan action not supported for egress");
2747         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
2748                 return rte_flow_error_set(error, ENOTSUP,
2749                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2750                                           "no support for multiple VLAN "
2751                                           "actions");
2752         /* Pop VLAN with preceding Decap requires inner header with VLAN. */
2753         if ((action_flags & MLX5_FLOW_ACTION_DECAP) &&
2754             !(item_flags & MLX5_FLOW_LAYER_INNER_VLAN))
2755                 return rte_flow_error_set(error, ENOTSUP,
2756                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2757                                           NULL,
2758                                           "cannot pop vlan after decap without "
2759                                           "match on inner vlan in the flow");
2760         /* Pop VLAN without preceding Decap requires outer header with VLAN. */
2761         if (!(action_flags & MLX5_FLOW_ACTION_DECAP) &&
2762             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2763                 return rte_flow_error_set(error, ENOTSUP,
2764                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2765                                           NULL,
2766                                           "cannot pop vlan without a "
2767                                           "match on (outer) vlan in the flow");
2768         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2769                 return rte_flow_error_set(error, EINVAL,
2770                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2771                                           "wrong action order, port_id should "
2772                                           "be after pop VLAN action");
2773         if (!attr->transfer && priv->representor)
2774                 return rte_flow_error_set(error, ENOTSUP,
2775                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2776                                           "pop vlan action for VF representor "
2777                                           "not supported on NIC table");
2778         return 0;
2779 }
2780
2781 /**
2782  * Get VLAN default info from vlan match info.
2783  *
2784  * @param[in] items
2785  *   the list of item specifications.
2786  * @param[out] vlan
2787  *   pointer VLAN info to fill to.
2788  *
2789  * @return
2790  *   0 on success, a negative errno value otherwise and rte_errno is set.
2791  */
2792 static void
2793 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
2794                                   struct rte_vlan_hdr *vlan)
2795 {
2796         const struct rte_flow_item_vlan nic_mask = {
2797                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
2798                                 MLX5DV_FLOW_VLAN_VID_MASK),
2799                 .inner_type = RTE_BE16(0xffff),
2800         };
2801
2802         if (items == NULL)
2803                 return;
2804         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2805                 int type = items->type;
2806
2807                 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
2808                     type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
2809                         break;
2810         }
2811         if (items->type != RTE_FLOW_ITEM_TYPE_END) {
2812                 const struct rte_flow_item_vlan *vlan_m = items->mask;
2813                 const struct rte_flow_item_vlan *vlan_v = items->spec;
2814
2815                 /* If VLAN item in pattern doesn't contain data, return here. */
2816                 if (!vlan_v)
2817                         return;
2818                 if (!vlan_m)
2819                         vlan_m = &nic_mask;
2820                 /* Only full match values are accepted */
2821                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
2822                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
2823                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
2824                         vlan->vlan_tci |=
2825                                 rte_be_to_cpu_16(vlan_v->tci &
2826                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
2827                 }
2828                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
2829                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
2830                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
2831                         vlan->vlan_tci |=
2832                                 rte_be_to_cpu_16(vlan_v->tci &
2833                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
2834                 }
2835                 if (vlan_m->inner_type == nic_mask.inner_type)
2836                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
2837                                                            vlan_m->inner_type);
2838         }
2839 }
2840
2841 /**
2842  * Validate the push VLAN action.
2843  *
2844  * @param[in] dev
2845  *   Pointer to the rte_eth_dev structure.
2846  * @param[in] action_flags
2847  *   Holds the actions detected until now.
2848  * @param[in] item_flags
2849  *   The items found in this flow rule.
2850  * @param[in] action
2851  *   Pointer to the action structure.
2852  * @param[in] attr
2853  *   Pointer to flow attributes
2854  * @param[out] error
2855  *   Pointer to error structure.
2856  *
2857  * @return
2858  *   0 on success, a negative errno value otherwise and rte_errno is set.
2859  */
2860 static int
2861 flow_dv_validate_action_push_vlan(struct rte_eth_dev *dev,
2862                                   uint64_t action_flags,
2863                                   const struct rte_flow_item_vlan *vlan_m,
2864                                   const struct rte_flow_action *action,
2865                                   const struct rte_flow_attr *attr,
2866                                   struct rte_flow_error *error)
2867 {
2868         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
2869         const struct mlx5_priv *priv = dev->data->dev_private;
2870         struct mlx5_dev_ctx_shared *sh = priv->sh;
2871         bool direction_error = false;
2872
2873         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
2874             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
2875                 return rte_flow_error_set(error, EINVAL,
2876                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2877                                           "invalid vlan ethertype");
2878         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2879                 return rte_flow_error_set(error, EINVAL,
2880                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2881                                           "wrong action order, port_id should "
2882                                           "be after push VLAN");
2883         /* Push VLAN is not supported in ingress except for CX6 FDB mode. */
2884         if (attr->transfer) {
2885                 bool fdb_tx = priv->representor_id != UINT16_MAX;
2886                 bool is_cx5 = sh->steering_format_version ==
2887                     MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2888
2889                 if (!fdb_tx && is_cx5)
2890                         direction_error = true;
2891         } else if (attr->ingress) {
2892                 direction_error = true;
2893         }
2894         if (direction_error)
2895                 return rte_flow_error_set(error, ENOTSUP,
2896                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2897                                           NULL,
2898                                           "push vlan action not supported for ingress");
2899         if (!attr->transfer && priv->representor)
2900                 return rte_flow_error_set(error, ENOTSUP,
2901                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2902                                           "push vlan action for VF representor "
2903                                           "not supported on NIC table");
2904         if (vlan_m &&
2905             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) &&
2906             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) !=
2907                 MLX5DV_FLOW_VLAN_PCP_MASK_BE &&
2908             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP) &&
2909             !(mlx5_flow_find_action
2910                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP)))
2911                 return rte_flow_error_set(error, EINVAL,
2912                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2913                                           "not full match mask on VLAN PCP and "
2914                                           "there is no of_set_vlan_pcp action, "
2915                                           "push VLAN action cannot figure out "
2916                                           "PCP value");
2917         if (vlan_m &&
2918             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) &&
2919             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) !=
2920                 MLX5DV_FLOW_VLAN_VID_MASK_BE &&
2921             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID) &&
2922             !(mlx5_flow_find_action
2923                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID)))
2924                 return rte_flow_error_set(error, EINVAL,
2925                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2926                                           "not full match mask on VLAN VID and "
2927                                           "there is no of_set_vlan_vid action, "
2928                                           "push VLAN action cannot figure out "
2929                                           "VID value");
2930         (void)attr;
2931         return 0;
2932 }
2933
2934 /**
2935  * Validate the set VLAN PCP.
2936  *
2937  * @param[in] action_flags
2938  *   Holds the actions detected until now.
2939  * @param[in] actions
2940  *   Pointer to the list of actions remaining in the flow rule.
2941  * @param[out] error
2942  *   Pointer to error structure.
2943  *
2944  * @return
2945  *   0 on success, a negative errno value otherwise and rte_errno is set.
2946  */
2947 static int
2948 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
2949                                      const struct rte_flow_action actions[],
2950                                      struct rte_flow_error *error)
2951 {
2952         const struct rte_flow_action *action = actions;
2953         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
2954
2955         if (conf->vlan_pcp > 7)
2956                 return rte_flow_error_set(error, EINVAL,
2957                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2958                                           "VLAN PCP value is too big");
2959         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
2960                 return rte_flow_error_set(error, ENOTSUP,
2961                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2962                                           "set VLAN PCP action must follow "
2963                                           "the push VLAN action");
2964         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
2965                 return rte_flow_error_set(error, ENOTSUP,
2966                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2967                                           "Multiple VLAN PCP modification are "
2968                                           "not supported");
2969         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2970                 return rte_flow_error_set(error, EINVAL,
2971                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2972                                           "wrong action order, port_id should "
2973                                           "be after set VLAN PCP");
2974         return 0;
2975 }
2976
2977 /**
2978  * Validate the set VLAN VID.
2979  *
2980  * @param[in] item_flags
2981  *   Holds the items detected in this rule.
2982  * @param[in] action_flags
2983  *   Holds the actions detected until now.
2984  * @param[in] actions
2985  *   Pointer to the list of actions remaining in the flow rule.
2986  * @param[out] error
2987  *   Pointer to error structure.
2988  *
2989  * @return
2990  *   0 on success, a negative errno value otherwise and rte_errno is set.
2991  */
2992 static int
2993 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
2994                                      uint64_t action_flags,
2995                                      const struct rte_flow_action actions[],
2996                                      struct rte_flow_error *error)
2997 {
2998         const struct rte_flow_action *action = actions;
2999         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
3000
3001         if (rte_be_to_cpu_16(conf->vlan_vid) > 0xFFE)
3002                 return rte_flow_error_set(error, EINVAL,
3003                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3004                                           "VLAN VID value is too big");
3005         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
3006             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
3007                 return rte_flow_error_set(error, ENOTSUP,
3008                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3009                                           "set VLAN VID action must follow push"
3010                                           " VLAN action or match on VLAN item");
3011         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
3012                 return rte_flow_error_set(error, ENOTSUP,
3013                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3014                                           "Multiple VLAN VID modifications are "
3015                                           "not supported");
3016         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
3017                 return rte_flow_error_set(error, EINVAL,
3018                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3019                                           "wrong action order, port_id should "
3020                                           "be after set VLAN VID");
3021         return 0;
3022 }
3023
3024 /*
3025  * Validate the FLAG action.
3026  *
3027  * @param[in] dev
3028  *   Pointer to the rte_eth_dev structure.
3029  * @param[in] action_flags
3030  *   Holds the actions detected until now.
3031  * @param[in] attr
3032  *   Pointer to flow attributes
3033  * @param[out] error
3034  *   Pointer to error structure.
3035  *
3036  * @return
3037  *   0 on success, a negative errno value otherwise and rte_errno is set.
3038  */
3039 static int
3040 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
3041                              uint64_t action_flags,
3042                              const struct rte_flow_attr *attr,
3043                              struct rte_flow_error *error)
3044 {
3045         struct mlx5_priv *priv = dev->data->dev_private;
3046         struct mlx5_dev_config *config = &priv->config;
3047         int ret;
3048
3049         /* Fall back if no extended metadata register support. */
3050         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3051                 return mlx5_flow_validate_action_flag(action_flags, attr,
3052                                                       error);
3053         /* Extensive metadata mode requires registers. */
3054         if (!mlx5_flow_ext_mreg_supported(dev))
3055                 return rte_flow_error_set(error, ENOTSUP,
3056                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3057                                           "no metadata registers "
3058                                           "to support flag action");
3059         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
3060                 return rte_flow_error_set(error, ENOTSUP,
3061                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3062                                           "extended metadata register"
3063                                           " isn't available");
3064         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3065         if (ret < 0)
3066                 return ret;
3067         MLX5_ASSERT(ret > 0);
3068         if (action_flags & MLX5_FLOW_ACTION_MARK)
3069                 return rte_flow_error_set(error, EINVAL,
3070                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3071                                           "can't mark and flag in same flow");
3072         if (action_flags & MLX5_FLOW_ACTION_FLAG)
3073                 return rte_flow_error_set(error, EINVAL,
3074                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3075                                           "can't have 2 flag"
3076                                           " actions in same flow");
3077         return 0;
3078 }
3079
3080 /**
3081  * Validate MARK action.
3082  *
3083  * @param[in] dev
3084  *   Pointer to the rte_eth_dev structure.
3085  * @param[in] action
3086  *   Pointer to action.
3087  * @param[in] action_flags
3088  *   Holds the actions detected until now.
3089  * @param[in] attr
3090  *   Pointer to flow attributes
3091  * @param[out] error
3092  *   Pointer to error structure.
3093  *
3094  * @return
3095  *   0 on success, a negative errno value otherwise and rte_errno is set.
3096  */
3097 static int
3098 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
3099                              const struct rte_flow_action *action,
3100                              uint64_t action_flags,
3101                              const struct rte_flow_attr *attr,
3102                              struct rte_flow_error *error)
3103 {
3104         struct mlx5_priv *priv = dev->data->dev_private;
3105         struct mlx5_dev_config *config = &priv->config;
3106         const struct rte_flow_action_mark *mark = action->conf;
3107         int ret;
3108
3109         if (is_tunnel_offload_active(dev))
3110                 return rte_flow_error_set(error, ENOTSUP,
3111                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3112                                           "no mark action "
3113                                           "if tunnel offload active");
3114         /* Fall back if no extended metadata register support. */
3115         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3116                 return mlx5_flow_validate_action_mark(action, action_flags,
3117                                                       attr, error);
3118         /* Extensive metadata mode requires registers. */
3119         if (!mlx5_flow_ext_mreg_supported(dev))
3120                 return rte_flow_error_set(error, ENOTSUP,
3121                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3122                                           "no metadata registers "
3123                                           "to support mark action");
3124         if (!priv->sh->dv_mark_mask)
3125                 return rte_flow_error_set(error, ENOTSUP,
3126                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3127                                           "extended metadata register"
3128                                           " isn't available");
3129         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3130         if (ret < 0)
3131                 return ret;
3132         MLX5_ASSERT(ret > 0);
3133         if (!mark)
3134                 return rte_flow_error_set(error, EINVAL,
3135                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3136                                           "configuration cannot be null");
3137         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
3138                 return rte_flow_error_set(error, EINVAL,
3139                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3140                                           &mark->id,
3141                                           "mark id exceeds the limit");
3142         if (action_flags & MLX5_FLOW_ACTION_FLAG)
3143                 return rte_flow_error_set(error, EINVAL,
3144                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3145                                           "can't flag and mark in same flow");
3146         if (action_flags & MLX5_FLOW_ACTION_MARK)
3147                 return rte_flow_error_set(error, EINVAL,
3148                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3149                                           "can't have 2 mark actions in same"
3150                                           " flow");
3151         return 0;
3152 }
3153
3154 /**
3155  * Validate SET_META action.
3156  *
3157  * @param[in] dev
3158  *   Pointer to the rte_eth_dev structure.
3159  * @param[in] action
3160  *   Pointer to the action structure.
3161  * @param[in] action_flags
3162  *   Holds the actions detected until now.
3163  * @param[in] attr
3164  *   Pointer to flow attributes
3165  * @param[out] error
3166  *   Pointer to error structure.
3167  *
3168  * @return
3169  *   0 on success, a negative errno value otherwise and rte_errno is set.
3170  */
3171 static int
3172 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
3173                                  const struct rte_flow_action *action,
3174                                  uint64_t action_flags __rte_unused,
3175                                  const struct rte_flow_attr *attr,
3176                                  struct rte_flow_error *error)
3177 {
3178         struct mlx5_priv *priv = dev->data->dev_private;
3179         struct mlx5_dev_config *config = &priv->config;
3180         const struct rte_flow_action_set_meta *conf;
3181         uint32_t nic_mask = UINT32_MAX;
3182         int reg;
3183
3184         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
3185             !mlx5_flow_ext_mreg_supported(dev))
3186                 return rte_flow_error_set(error, ENOTSUP,
3187                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3188                                           "extended metadata register"
3189                                           " isn't supported");
3190         reg = flow_dv_get_metadata_reg(dev, attr, error);
3191         if (reg < 0)
3192                 return reg;
3193         if (reg == REG_NON)
3194                 return rte_flow_error_set(error, ENOTSUP,
3195                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3196                                           "unavalable extended metadata register");
3197         if (reg != REG_A && reg != REG_B) {
3198                 struct mlx5_priv *priv = dev->data->dev_private;
3199
3200                 nic_mask = priv->sh->dv_meta_mask;
3201         }
3202         if (!(action->conf))
3203                 return rte_flow_error_set(error, EINVAL,
3204                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3205                                           "configuration cannot be null");
3206         conf = (const struct rte_flow_action_set_meta *)action->conf;
3207         if (!conf->mask)
3208                 return rte_flow_error_set(error, EINVAL,
3209                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3210                                           "zero mask doesn't have any effect");
3211         if (conf->mask & ~nic_mask)
3212                 return rte_flow_error_set(error, EINVAL,
3213                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3214                                           "meta data must be within reg C0");
3215         return 0;
3216 }
3217
3218 /**
3219  * Validate SET_TAG action.
3220  *
3221  * @param[in] dev
3222  *   Pointer to the rte_eth_dev structure.
3223  * @param[in] action
3224  *   Pointer to the action structure.
3225  * @param[in] action_flags
3226  *   Holds the actions detected until now.
3227  * @param[in] attr
3228  *   Pointer to flow attributes
3229  * @param[out] error
3230  *   Pointer to error structure.
3231  *
3232  * @return
3233  *   0 on success, a negative errno value otherwise and rte_errno is set.
3234  */
3235 static int
3236 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
3237                                 const struct rte_flow_action *action,
3238                                 uint64_t action_flags,
3239                                 const struct rte_flow_attr *attr,
3240                                 struct rte_flow_error *error)
3241 {
3242         const struct rte_flow_action_set_tag *conf;
3243         const uint64_t terminal_action_flags =
3244                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
3245                 MLX5_FLOW_ACTION_RSS;
3246         int ret;
3247
3248         if (!mlx5_flow_ext_mreg_supported(dev))
3249                 return rte_flow_error_set(error, ENOTSUP,
3250                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3251                                           "extensive metadata register"
3252                                           " isn't supported");
3253         if (!(action->conf))
3254                 return rte_flow_error_set(error, EINVAL,
3255                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3256                                           "configuration cannot be null");
3257         conf = (const struct rte_flow_action_set_tag *)action->conf;
3258         if (!conf->mask)
3259                 return rte_flow_error_set(error, EINVAL,
3260                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3261                                           "zero mask doesn't have any effect");
3262         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
3263         if (ret < 0)
3264                 return ret;
3265         if (!attr->transfer && attr->ingress &&
3266             (action_flags & terminal_action_flags))
3267                 return rte_flow_error_set(error, EINVAL,
3268                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3269                                           "set_tag has no effect"
3270                                           " with terminal actions");
3271         return 0;
3272 }
3273
3274 /**
3275  * Validate count action.
3276  *
3277  * @param[in] dev
3278  *   Pointer to rte_eth_dev structure.
3279  * @param[in] shared
3280  *   Indicator if action is shared.
3281  * @param[in] action_flags
3282  *   Holds the actions detected until now.
3283  * @param[out] error
3284  *   Pointer to error structure.
3285  *
3286  * @return
3287  *   0 on success, a negative errno value otherwise and rte_errno is set.
3288  */
3289 static int
3290 flow_dv_validate_action_count(struct rte_eth_dev *dev, bool shared,
3291                               uint64_t action_flags,
3292                               struct rte_flow_error *error)
3293 {
3294         struct mlx5_priv *priv = dev->data->dev_private;
3295
3296         if (!priv->sh->devx)
3297                 goto notsup_err;
3298         if (action_flags & MLX5_FLOW_ACTION_COUNT)
3299                 return rte_flow_error_set(error, EINVAL,
3300                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3301                                           "duplicate count actions set");
3302         if (shared && (action_flags & MLX5_FLOW_ACTION_AGE) &&
3303             !priv->sh->flow_hit_aso_en)
3304                 return rte_flow_error_set(error, EINVAL,
3305                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3306                                           "old age and shared count combination is not supported");
3307 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
3308         return 0;
3309 #endif
3310 notsup_err:
3311         return rte_flow_error_set
3312                       (error, ENOTSUP,
3313                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3314                        NULL,
3315                        "count action not supported");
3316 }
3317
3318 /**
3319  * Validate the L2 encap action.
3320  *
3321  * @param[in] dev
3322  *   Pointer to the rte_eth_dev structure.
3323  * @param[in] action_flags
3324  *   Holds the actions detected until now.
3325  * @param[in] action
3326  *   Pointer to the action structure.
3327  * @param[in] attr
3328  *   Pointer to flow attributes.
3329  * @param[out] error
3330  *   Pointer to error structure.
3331  *
3332  * @return
3333  *   0 on success, a negative errno value otherwise and rte_errno is set.
3334  */
3335 static int
3336 flow_dv_validate_action_l2_encap(struct rte_eth_dev *dev,
3337                                  uint64_t action_flags,
3338                                  const struct rte_flow_action *action,
3339                                  const struct rte_flow_attr *attr,
3340                                  struct rte_flow_error *error)
3341 {
3342         const struct mlx5_priv *priv = dev->data->dev_private;
3343
3344         if (!(action->conf))
3345                 return rte_flow_error_set(error, EINVAL,
3346                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3347                                           "configuration cannot be null");
3348         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3349                 return rte_flow_error_set(error, EINVAL,
3350                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3351                                           "can only have a single encap action "
3352                                           "in a flow");
3353         if (!attr->transfer && priv->representor)
3354                 return rte_flow_error_set(error, ENOTSUP,
3355                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3356                                           "encap action for VF representor "
3357                                           "not supported on NIC table");
3358         return 0;
3359 }
3360
3361 /**
3362  * Validate a decap action.
3363  *
3364  * @param[in] dev
3365  *   Pointer to the rte_eth_dev structure.
3366  * @param[in] action_flags
3367  *   Holds the actions detected until now.
3368  * @param[in] action
3369  *   Pointer to the action structure.
3370  * @param[in] item_flags
3371  *   Holds the items detected.
3372  * @param[in] attr
3373  *   Pointer to flow attributes
3374  * @param[out] error
3375  *   Pointer to error structure.
3376  *
3377  * @return
3378  *   0 on success, a negative errno value otherwise and rte_errno is set.
3379  */
3380 static int
3381 flow_dv_validate_action_decap(struct rte_eth_dev *dev,
3382                               uint64_t action_flags,
3383                               const struct rte_flow_action *action,
3384                               const uint64_t item_flags,
3385                               const struct rte_flow_attr *attr,
3386                               struct rte_flow_error *error)
3387 {
3388         const struct mlx5_priv *priv = dev->data->dev_private;
3389
3390         if (priv->config.hca_attr.scatter_fcs_w_decap_disable &&
3391             !priv->config.decap_en)
3392                 return rte_flow_error_set(error, ENOTSUP,
3393                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3394                                           "decap is not enabled");
3395         if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
3396                 return rte_flow_error_set(error, ENOTSUP,
3397                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3398                                           action_flags &
3399                                           MLX5_FLOW_ACTION_DECAP ? "can only "
3400                                           "have a single decap action" : "decap "
3401                                           "after encap is not supported");
3402         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
3403                 return rte_flow_error_set(error, EINVAL,
3404                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3405                                           "can't have decap action after"
3406                                           " modify action");
3407         if (attr->egress)
3408                 return rte_flow_error_set(error, ENOTSUP,
3409                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
3410                                           NULL,
3411                                           "decap action not supported for "
3412                                           "egress");
3413         if (!attr->transfer && priv->representor)
3414                 return rte_flow_error_set(error, ENOTSUP,
3415                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3416                                           "decap action for VF representor "
3417                                           "not supported on NIC table");
3418         if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_DECAP &&
3419             !(item_flags & MLX5_FLOW_LAYER_VXLAN))
3420                 return rte_flow_error_set(error, ENOTSUP,
3421                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3422                                 "VXLAN item should be present for VXLAN decap");
3423         return 0;
3424 }
3425
3426 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
3427
3428 /**
3429  * Validate the raw encap and decap actions.
3430  *
3431  * @param[in] dev
3432  *   Pointer to the rte_eth_dev structure.
3433  * @param[in] decap
3434  *   Pointer to the decap action.
3435  * @param[in] encap
3436  *   Pointer to the encap action.
3437  * @param[in] attr
3438  *   Pointer to flow attributes
3439  * @param[in/out] action_flags
3440  *   Holds the actions detected until now.
3441  * @param[out] actions_n
3442  *   pointer to the number of actions counter.
3443  * @param[in] action
3444  *   Pointer to the action structure.
3445  * @param[in] item_flags
3446  *   Holds the items detected.
3447  * @param[out] error
3448  *   Pointer to error structure.
3449  *
3450  * @return
3451  *   0 on success, a negative errno value otherwise and rte_errno is set.
3452  */
3453 static int
3454 flow_dv_validate_action_raw_encap_decap
3455         (struct rte_eth_dev *dev,
3456          const struct rte_flow_action_raw_decap *decap,
3457          const struct rte_flow_action_raw_encap *encap,
3458          const struct rte_flow_attr *attr, uint64_t *action_flags,
3459          int *actions_n, const struct rte_flow_action *action,
3460          uint64_t item_flags, struct rte_flow_error *error)
3461 {
3462         const struct mlx5_priv *priv = dev->data->dev_private;
3463         int ret;
3464
3465         if (encap && (!encap->size || !encap->data))
3466                 return rte_flow_error_set(error, EINVAL,
3467                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3468                                           "raw encap data cannot be empty");
3469         if (decap && encap) {
3470                 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
3471                     encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3472                         /* L3 encap. */
3473                         decap = NULL;
3474                 else if (encap->size <=
3475                            MLX5_ENCAPSULATION_DECISION_SIZE &&
3476                            decap->size >
3477                            MLX5_ENCAPSULATION_DECISION_SIZE)
3478                         /* L3 decap. */
3479                         encap = NULL;
3480                 else if (encap->size >
3481                            MLX5_ENCAPSULATION_DECISION_SIZE &&
3482                            decap->size >
3483                            MLX5_ENCAPSULATION_DECISION_SIZE)
3484                         /* 2 L2 actions: encap and decap. */
3485                         ;
3486                 else
3487                         return rte_flow_error_set(error,
3488                                 ENOTSUP,
3489                                 RTE_FLOW_ERROR_TYPE_ACTION,
3490                                 NULL, "unsupported too small "
3491                                 "raw decap and too small raw "
3492                                 "encap combination");
3493         }
3494         if (decap) {
3495                 ret = flow_dv_validate_action_decap(dev, *action_flags, action,
3496                                                     item_flags, attr, error);
3497                 if (ret < 0)
3498                         return ret;
3499                 *action_flags |= MLX5_FLOW_ACTION_DECAP;
3500                 ++(*actions_n);
3501         }
3502         if (encap) {
3503                 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
3504                         return rte_flow_error_set(error, ENOTSUP,
3505                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3506                                                   NULL,
3507                                                   "small raw encap size");
3508                 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
3509                         return rte_flow_error_set(error, EINVAL,
3510                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3511                                                   NULL,
3512                                                   "more than one encap action");
3513                 if (!attr->transfer && priv->representor)
3514                         return rte_flow_error_set
3515                                         (error, ENOTSUP,
3516                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3517                                          "encap action for VF representor "
3518                                          "not supported on NIC table");
3519                 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
3520                 ++(*actions_n);
3521         }
3522         return 0;
3523 }
3524
3525 /*
3526  * Validate the ASO CT action.
3527  *
3528  * @param[in] dev
3529  *   Pointer to the rte_eth_dev structure.
3530  * @param[in] action_flags
3531  *   Holds the actions detected until now.
3532  * @param[in] item_flags
3533  *   The items found in this flow rule.
3534  * @param[in] attr
3535  *   Pointer to flow attributes.
3536  * @param[out] error
3537  *   Pointer to error structure.
3538  *
3539  * @return
3540  *   0 on success, a negative errno value otherwise and rte_errno is set.
3541  */
3542 static int
3543 flow_dv_validate_action_aso_ct(struct rte_eth_dev *dev,
3544                                uint64_t action_flags,
3545                                uint64_t item_flags,
3546                                const struct rte_flow_attr *attr,
3547                                struct rte_flow_error *error)
3548 {
3549         RTE_SET_USED(dev);
3550
3551         if (attr->group == 0 && !attr->transfer)
3552                 return rte_flow_error_set(error, ENOTSUP,
3553                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3554                                           NULL,
3555                                           "Only support non-root table");
3556         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
3557                 return rte_flow_error_set(error, ENOTSUP,
3558                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3559                                           "CT cannot follow a fate action");
3560         if ((action_flags & MLX5_FLOW_ACTION_METER) ||
3561             (action_flags & MLX5_FLOW_ACTION_AGE))
3562                 return rte_flow_error_set(error, EINVAL,
3563                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3564                                           "Only one ASO action is supported");
3565         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3566                 return rte_flow_error_set(error, EINVAL,
3567                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3568                                           "Encap cannot exist before CT");
3569         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3570                 return rte_flow_error_set(error, EINVAL,
3571                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3572                                           "Not a outer TCP packet");
3573         return 0;
3574 }
3575
3576 int
3577 flow_dv_encap_decap_match_cb(void *tool_ctx __rte_unused,
3578                              struct mlx5_list_entry *entry, void *cb_ctx)
3579 {
3580         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3581         struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3582         struct mlx5_flow_dv_encap_decap_resource *resource;
3583
3584         resource = container_of(entry, struct mlx5_flow_dv_encap_decap_resource,
3585                                 entry);
3586         if (resource->reformat_type == ctx_resource->reformat_type &&
3587             resource->ft_type == ctx_resource->ft_type &&
3588             resource->flags == ctx_resource->flags &&
3589             resource->size == ctx_resource->size &&
3590             !memcmp((const void *)resource->buf,
3591                     (const void *)ctx_resource->buf,
3592                     resource->size))
3593                 return 0;
3594         return -1;
3595 }
3596
3597 struct mlx5_list_entry *
3598 flow_dv_encap_decap_create_cb(void *tool_ctx, void *cb_ctx)
3599 {
3600         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3601         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3602         struct mlx5dv_dr_domain *domain;
3603         struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3604         struct mlx5_flow_dv_encap_decap_resource *resource;
3605         uint32_t idx;
3606         int ret;
3607
3608         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3609                 domain = sh->fdb_domain;
3610         else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3611                 domain = sh->rx_domain;
3612         else
3613                 domain = sh->tx_domain;
3614         /* Register new encap/decap resource. */
3615         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], &idx);
3616         if (!resource) {
3617                 rte_flow_error_set(ctx->error, ENOMEM,
3618                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3619                                    "cannot allocate resource memory");
3620                 return NULL;
3621         }
3622         *resource = *ctx_resource;
3623         resource->idx = idx;
3624         ret = mlx5_flow_os_create_flow_action_packet_reformat(sh->cdev->ctx,
3625                                                               domain, resource,
3626                                                              &resource->action);
3627         if (ret) {
3628                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], idx);
3629                 rte_flow_error_set(ctx->error, ENOMEM,
3630                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3631                                    NULL, "cannot create action");
3632                 return NULL;
3633         }
3634
3635         return &resource->entry;
3636 }
3637
3638 struct mlx5_list_entry *
3639 flow_dv_encap_decap_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
3640                              void *cb_ctx)
3641 {
3642         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3643         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3644         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
3645         uint32_t idx;
3646
3647         cache_resource = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
3648                                            &idx);
3649         if (!cache_resource) {
3650                 rte_flow_error_set(ctx->error, ENOMEM,
3651                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3652                                    "cannot allocate resource memory");
3653                 return NULL;
3654         }
3655         memcpy(cache_resource, oentry, sizeof(*cache_resource));
3656         cache_resource->idx = idx;
3657         return &cache_resource->entry;
3658 }
3659
3660 void
3661 flow_dv_encap_decap_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3662 {
3663         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3664         struct mlx5_flow_dv_encap_decap_resource *res =
3665                                        container_of(entry, typeof(*res), entry);
3666
3667         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
3668 }
3669
3670 /**
3671  * Find existing encap/decap resource or create and register a new one.
3672  *
3673  * @param[in, out] dev
3674  *   Pointer to rte_eth_dev structure.
3675  * @param[in, out] resource
3676  *   Pointer to encap/decap resource.
3677  * @parm[in, out] dev_flow
3678  *   Pointer to the dev_flow.
3679  * @param[out] error
3680  *   pointer to error structure.
3681  *
3682  * @return
3683  *   0 on success otherwise -errno and errno is set.
3684  */
3685 static int
3686 flow_dv_encap_decap_resource_register
3687                         (struct rte_eth_dev *dev,
3688                          struct mlx5_flow_dv_encap_decap_resource *resource,
3689                          struct mlx5_flow *dev_flow,
3690                          struct rte_flow_error *error)
3691 {
3692         struct mlx5_priv *priv = dev->data->dev_private;
3693         struct mlx5_dev_ctx_shared *sh = priv->sh;
3694         struct mlx5_list_entry *entry;
3695         union {
3696                 struct {
3697                         uint32_t ft_type:8;
3698                         uint32_t refmt_type:8;
3699                         /*
3700                          * Header reformat actions can be shared between
3701                          * non-root tables. One bit to indicate non-root
3702                          * table or not.
3703                          */
3704                         uint32_t is_root:1;
3705                         uint32_t reserve:15;
3706                 };
3707                 uint32_t v32;
3708         } encap_decap_key = {
3709                 {
3710                         .ft_type = resource->ft_type,
3711                         .refmt_type = resource->reformat_type,
3712                         .is_root = !!dev_flow->dv.group,
3713                         .reserve = 0,
3714                 }
3715         };
3716         struct mlx5_flow_cb_ctx ctx = {
3717                 .error = error,
3718                 .data = resource,
3719         };
3720         struct mlx5_hlist *encaps_decaps;
3721         uint64_t key64;
3722
3723         encaps_decaps = flow_dv_hlist_prepare(sh, &sh->encaps_decaps,
3724                                 "encaps_decaps",
3725                                 MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
3726                                 true, true, sh,
3727                                 flow_dv_encap_decap_create_cb,
3728                                 flow_dv_encap_decap_match_cb,
3729                                 flow_dv_encap_decap_remove_cb,
3730                                 flow_dv_encap_decap_clone_cb,
3731                                 flow_dv_encap_decap_clone_free_cb);
3732         if (unlikely(!encaps_decaps))
3733                 return -rte_errno;
3734         resource->flags = dev_flow->dv.group ? 0 : 1;
3735         key64 =  __rte_raw_cksum(&encap_decap_key.v32,
3736                                  sizeof(encap_decap_key.v32), 0);
3737         if (resource->reformat_type !=
3738             MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2 &&
3739             resource->size)
3740                 key64 = __rte_raw_cksum(resource->buf, resource->size, key64);
3741         entry = mlx5_hlist_register(encaps_decaps, key64, &ctx);
3742         if (!entry)
3743                 return -rte_errno;
3744         resource = container_of(entry, typeof(*resource), entry);
3745         dev_flow->dv.encap_decap = resource;
3746         dev_flow->handle->dvh.rix_encap_decap = resource->idx;
3747         return 0;
3748 }
3749
3750 /**
3751  * Find existing table jump resource or create and register a new one.
3752  *
3753  * @param[in, out] dev
3754  *   Pointer to rte_eth_dev structure.
3755  * @param[in, out] tbl
3756  *   Pointer to flow table resource.
3757  * @parm[in, out] dev_flow
3758  *   Pointer to the dev_flow.
3759  * @param[out] error
3760  *   pointer to error structure.
3761  *
3762  * @return
3763  *   0 on success otherwise -errno and errno is set.
3764  */
3765 static int
3766 flow_dv_jump_tbl_resource_register
3767                         (struct rte_eth_dev *dev __rte_unused,
3768                          struct mlx5_flow_tbl_resource *tbl,
3769                          struct mlx5_flow *dev_flow,
3770                          struct rte_flow_error *error __rte_unused)
3771 {
3772         struct mlx5_flow_tbl_data_entry *tbl_data =
3773                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
3774
3775         MLX5_ASSERT(tbl);
3776         MLX5_ASSERT(tbl_data->jump.action);
3777         dev_flow->handle->rix_jump = tbl_data->idx;
3778         dev_flow->dv.jump = &tbl_data->jump;
3779         return 0;
3780 }
3781
3782 int
3783 flow_dv_port_id_match_cb(void *tool_ctx __rte_unused,
3784                          struct mlx5_list_entry *entry, void *cb_ctx)
3785 {
3786         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3787         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3788         struct mlx5_flow_dv_port_id_action_resource *res =
3789                                        container_of(entry, typeof(*res), entry);
3790
3791         return ref->port_id != res->port_id;
3792 }
3793
3794 struct mlx5_list_entry *
3795 flow_dv_port_id_create_cb(void *tool_ctx, void *cb_ctx)
3796 {
3797         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3798         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3799         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3800         struct mlx5_flow_dv_port_id_action_resource *resource;
3801         uint32_t idx;
3802         int ret;
3803
3804         /* Register new port id action resource. */
3805         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3806         if (!resource) {
3807                 rte_flow_error_set(ctx->error, ENOMEM,
3808                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3809                                    "cannot allocate port_id action memory");
3810                 return NULL;
3811         }
3812         *resource = *ref;
3813         ret = mlx5_flow_os_create_flow_action_dest_port(sh->fdb_domain,
3814                                                         ref->port_id,
3815                                                         &resource->action);
3816         if (ret) {
3817                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], idx);
3818                 rte_flow_error_set(ctx->error, ENOMEM,
3819                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3820                                    "cannot create action");
3821                 return NULL;
3822         }
3823         resource->idx = idx;
3824         return &resource->entry;
3825 }
3826
3827 struct mlx5_list_entry *
3828 flow_dv_port_id_clone_cb(void *tool_ctx,
3829                          struct mlx5_list_entry *entry __rte_unused,
3830                          void *cb_ctx)
3831 {
3832         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3833         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3834         struct mlx5_flow_dv_port_id_action_resource *resource;
3835         uint32_t idx;
3836
3837         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3838         if (!resource) {
3839                 rte_flow_error_set(ctx->error, ENOMEM,
3840                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3841                                    "cannot allocate port_id action memory");
3842                 return NULL;
3843         }
3844         memcpy(resource, entry, sizeof(*resource));
3845         resource->idx = idx;
3846         return &resource->entry;
3847 }
3848
3849 void
3850 flow_dv_port_id_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3851 {
3852         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3853         struct mlx5_flow_dv_port_id_action_resource *resource =
3854                                   container_of(entry, typeof(*resource), entry);
3855
3856         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
3857 }
3858
3859 /**
3860  * Find existing table port ID resource or create and register a new one.
3861  *
3862  * @param[in, out] dev
3863  *   Pointer to rte_eth_dev structure.
3864  * @param[in, out] ref
3865  *   Pointer to port ID action resource reference.
3866  * @parm[in, out] dev_flow
3867  *   Pointer to the dev_flow.
3868  * @param[out] error
3869  *   pointer to error structure.
3870  *
3871  * @return
3872  *   0 on success otherwise -errno and errno is set.
3873  */
3874 static int
3875 flow_dv_port_id_action_resource_register
3876                         (struct rte_eth_dev *dev,
3877                          struct mlx5_flow_dv_port_id_action_resource *ref,
3878                          struct mlx5_flow *dev_flow,
3879                          struct rte_flow_error *error)
3880 {
3881         struct mlx5_priv *priv = dev->data->dev_private;
3882         struct mlx5_list_entry *entry;
3883         struct mlx5_flow_dv_port_id_action_resource *resource;
3884         struct mlx5_flow_cb_ctx ctx = {
3885                 .error = error,
3886                 .data = ref,
3887         };
3888
3889         entry = mlx5_list_register(priv->sh->port_id_action_list, &ctx);
3890         if (!entry)
3891                 return -rte_errno;
3892         resource = container_of(entry, typeof(*resource), entry);
3893         dev_flow->dv.port_id_action = resource;
3894         dev_flow->handle->rix_port_id_action = resource->idx;
3895         return 0;
3896 }
3897
3898 int
3899 flow_dv_push_vlan_match_cb(void *tool_ctx __rte_unused,
3900                            struct mlx5_list_entry *entry, void *cb_ctx)
3901 {
3902         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3903         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3904         struct mlx5_flow_dv_push_vlan_action_resource *res =
3905                                        container_of(entry, typeof(*res), entry);
3906
3907         return ref->vlan_tag != res->vlan_tag || ref->ft_type != res->ft_type;
3908 }
3909
3910 struct mlx5_list_entry *
3911 flow_dv_push_vlan_create_cb(void *tool_ctx, void *cb_ctx)
3912 {
3913         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3914         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3915         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3916         struct mlx5_flow_dv_push_vlan_action_resource *resource;
3917         struct mlx5dv_dr_domain *domain;
3918         uint32_t idx;
3919         int ret;
3920
3921         /* Register new port id action resource. */
3922         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3923         if (!resource) {
3924                 rte_flow_error_set(ctx->error, ENOMEM,
3925                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3926                                    "cannot allocate push_vlan action memory");
3927                 return NULL;
3928         }
3929         *resource = *ref;
3930         if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3931                 domain = sh->fdb_domain;
3932         else if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3933                 domain = sh->rx_domain;
3934         else
3935                 domain = sh->tx_domain;
3936         ret = mlx5_flow_os_create_flow_action_push_vlan(domain, ref->vlan_tag,
3937                                                         &resource->action);
3938         if (ret) {
3939                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
3940                 rte_flow_error_set(ctx->error, ENOMEM,
3941                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3942                                    "cannot create push vlan action");
3943                 return NULL;
3944         }
3945         resource->idx = idx;
3946         return &resource->entry;
3947 }
3948
3949 struct mlx5_list_entry *
3950 flow_dv_push_vlan_clone_cb(void *tool_ctx,
3951                            struct mlx5_list_entry *entry __rte_unused,
3952                            void *cb_ctx)
3953 {
3954         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3955         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3956         struct mlx5_flow_dv_push_vlan_action_resource *resource;
3957         uint32_t idx;
3958
3959         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3960         if (!resource) {
3961                 rte_flow_error_set(ctx->error, ENOMEM,
3962                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3963                                    "cannot allocate push_vlan action memory");
3964                 return NULL;
3965         }
3966         memcpy(resource, entry, sizeof(*resource));
3967         resource->idx = idx;
3968         return &resource->entry;
3969 }
3970
3971 void
3972 flow_dv_push_vlan_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3973 {
3974         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3975         struct mlx5_flow_dv_push_vlan_action_resource *resource =
3976                                   container_of(entry, typeof(*resource), entry);
3977
3978         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
3979 }
3980
3981 /**
3982  * Find existing push vlan resource or create and register a new one.
3983  *
3984  * @param [in, out] dev
3985  *   Pointer to rte_eth_dev structure.
3986  * @param[in, out] ref
3987  *   Pointer to port ID action resource reference.
3988  * @parm[in, out] dev_flow
3989  *   Pointer to the dev_flow.
3990  * @param[out] error
3991  *   pointer to error structure.
3992  *
3993  * @return
3994  *   0 on success otherwise -errno and errno is set.
3995  */
3996 static int
3997 flow_dv_push_vlan_action_resource_register
3998                        (struct rte_eth_dev *dev,
3999                         struct mlx5_flow_dv_push_vlan_action_resource *ref,
4000                         struct mlx5_flow *dev_flow,
4001                         struct rte_flow_error *error)
4002 {
4003         struct mlx5_priv *priv = dev->data->dev_private;
4004         struct mlx5_flow_dv_push_vlan_action_resource *resource;
4005         struct mlx5_list_entry *entry;
4006         struct mlx5_flow_cb_ctx ctx = {
4007                 .error = error,
4008                 .data = ref,
4009         };
4010
4011         entry = mlx5_list_register(priv->sh->push_vlan_action_list, &ctx);
4012         if (!entry)
4013                 return -rte_errno;
4014         resource = container_of(entry, typeof(*resource), entry);
4015
4016         dev_flow->handle->dvh.rix_push_vlan = resource->idx;
4017         dev_flow->dv.push_vlan_res = resource;
4018         return 0;
4019 }
4020
4021 /**
4022  * Get the size of specific rte_flow_item_type hdr size
4023  *
4024  * @param[in] item_type
4025  *   Tested rte_flow_item_type.
4026  *
4027  * @return
4028  *   sizeof struct item_type, 0 if void or irrelevant.
4029  */
4030 static size_t
4031 flow_dv_get_item_hdr_len(const enum rte_flow_item_type item_type)
4032 {
4033         size_t retval;
4034
4035         switch (item_type) {
4036         case RTE_FLOW_ITEM_TYPE_ETH:
4037                 retval = sizeof(struct rte_ether_hdr);
4038                 break;
4039         case RTE_FLOW_ITEM_TYPE_VLAN:
4040                 retval = sizeof(struct rte_vlan_hdr);
4041                 break;
4042         case RTE_FLOW_ITEM_TYPE_IPV4:
4043                 retval = sizeof(struct rte_ipv4_hdr);
4044                 break;
4045         case RTE_FLOW_ITEM_TYPE_IPV6:
4046                 retval = sizeof(struct rte_ipv6_hdr);
4047                 break;
4048         case RTE_FLOW_ITEM_TYPE_UDP:
4049                 retval = sizeof(struct rte_udp_hdr);
4050                 break;
4051         case RTE_FLOW_ITEM_TYPE_TCP:
4052                 retval = sizeof(struct rte_tcp_hdr);
4053                 break;
4054         case RTE_FLOW_ITEM_TYPE_VXLAN:
4055         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4056                 retval = sizeof(struct rte_vxlan_hdr);
4057                 break;
4058         case RTE_FLOW_ITEM_TYPE_GRE:
4059         case RTE_FLOW_ITEM_TYPE_NVGRE:
4060                 retval = sizeof(struct rte_gre_hdr);
4061                 break;
4062         case RTE_FLOW_ITEM_TYPE_MPLS:
4063                 retval = sizeof(struct rte_mpls_hdr);
4064                 break;
4065         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
4066         default:
4067                 retval = 0;
4068                 break;
4069         }
4070         return retval;
4071 }
4072
4073 #define MLX5_ENCAP_IPV4_VERSION         0x40
4074 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
4075 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
4076 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
4077 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
4078 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
4079 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
4080
4081 /**
4082  * Convert the encap action data from list of rte_flow_item to raw buffer
4083  *
4084  * @param[in] items
4085  *   Pointer to rte_flow_item objects list.
4086  * @param[out] buf
4087  *   Pointer to the output buffer.
4088  * @param[out] size
4089  *   Pointer to the output buffer size.
4090  * @param[out] error
4091  *   Pointer to the error structure.
4092  *
4093  * @return
4094  *   0 on success, a negative errno value otherwise and rte_errno is set.
4095  */
4096 static int
4097 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
4098                            size_t *size, struct rte_flow_error *error)
4099 {
4100         struct rte_ether_hdr *eth = NULL;
4101         struct rte_vlan_hdr *vlan = NULL;
4102         struct rte_ipv4_hdr *ipv4 = NULL;
4103         struct rte_ipv6_hdr *ipv6 = NULL;
4104         struct rte_udp_hdr *udp = NULL;
4105         struct rte_vxlan_hdr *vxlan = NULL;
4106         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
4107         struct rte_gre_hdr *gre = NULL;
4108         size_t len;
4109         size_t temp_size = 0;
4110
4111         if (!items)
4112                 return rte_flow_error_set(error, EINVAL,
4113                                           RTE_FLOW_ERROR_TYPE_ACTION,
4114                                           NULL, "invalid empty data");
4115         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4116                 len = flow_dv_get_item_hdr_len(items->type);
4117                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
4118                         return rte_flow_error_set(error, EINVAL,
4119                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4120                                                   (void *)items->type,
4121                                                   "items total size is too big"
4122                                                   " for encap action");
4123                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
4124                 switch (items->type) {
4125                 case RTE_FLOW_ITEM_TYPE_ETH:
4126                         eth = (struct rte_ether_hdr *)&buf[temp_size];
4127                         break;
4128                 case RTE_FLOW_ITEM_TYPE_VLAN:
4129                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
4130                         if (!eth)
4131                                 return rte_flow_error_set(error, EINVAL,
4132                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4133                                                 (void *)items->type,
4134                                                 "eth header not found");
4135                         if (!eth->ether_type)
4136                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
4137                         break;
4138                 case RTE_FLOW_ITEM_TYPE_IPV4:
4139                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
4140                         if (!vlan && !eth)
4141                                 return rte_flow_error_set(error, EINVAL,
4142                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4143                                                 (void *)items->type,
4144                                                 "neither eth nor vlan"
4145                                                 " header found");
4146                         if (vlan && !vlan->eth_proto)
4147                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4148                         else if (eth && !eth->ether_type)
4149                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4150                         if (!ipv4->version_ihl)
4151                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
4152                                                     MLX5_ENCAP_IPV4_IHL_MIN;
4153                         if (!ipv4->time_to_live)
4154                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
4155                         break;
4156                 case RTE_FLOW_ITEM_TYPE_IPV6:
4157                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
4158                         if (!vlan && !eth)
4159                                 return rte_flow_error_set(error, EINVAL,
4160                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4161                                                 (void *)items->type,
4162                                                 "neither eth nor vlan"
4163                                                 " header found");
4164                         if (vlan && !vlan->eth_proto)
4165                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4166                         else if (eth && !eth->ether_type)
4167                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4168                         if (!ipv6->vtc_flow)
4169                                 ipv6->vtc_flow =
4170                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
4171                         if (!ipv6->hop_limits)
4172                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
4173                         break;
4174                 case RTE_FLOW_ITEM_TYPE_UDP:
4175                         udp = (struct rte_udp_hdr *)&buf[temp_size];
4176                         if (!ipv4 && !ipv6)
4177                                 return rte_flow_error_set(error, EINVAL,
4178                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4179                                                 (void *)items->type,
4180                                                 "ip header not found");
4181                         if (ipv4 && !ipv4->next_proto_id)
4182                                 ipv4->next_proto_id = IPPROTO_UDP;
4183                         else if (ipv6 && !ipv6->proto)
4184                                 ipv6->proto = IPPROTO_UDP;
4185                         break;
4186                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4187                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
4188                         if (!udp)
4189                                 return rte_flow_error_set(error, EINVAL,
4190                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4191                                                 (void *)items->type,
4192                                                 "udp header not found");
4193                         if (!udp->dst_port)
4194                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
4195                         if (!vxlan->vx_flags)
4196                                 vxlan->vx_flags =
4197                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
4198                         break;
4199                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4200                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
4201                         if (!udp)
4202                                 return rte_flow_error_set(error, EINVAL,
4203                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4204                                                 (void *)items->type,
4205                                                 "udp header not found");
4206                         if (!vxlan_gpe->proto)
4207                                 return rte_flow_error_set(error, EINVAL,
4208                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4209                                                 (void *)items->type,
4210                                                 "next protocol not found");
4211                         if (!udp->dst_port)
4212                                 udp->dst_port =
4213                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
4214                         if (!vxlan_gpe->vx_flags)
4215                                 vxlan_gpe->vx_flags =
4216                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
4217                         break;
4218                 case RTE_FLOW_ITEM_TYPE_GRE:
4219                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4220                         gre = (struct rte_gre_hdr *)&buf[temp_size];
4221                         if (!gre->proto)
4222                                 return rte_flow_error_set(error, EINVAL,
4223                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4224                                                 (void *)items->type,
4225                                                 "next protocol not found");
4226                         if (!ipv4 && !ipv6)
4227                                 return rte_flow_error_set(error, EINVAL,
4228                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4229                                                 (void *)items->type,
4230                                                 "ip header not found");
4231                         if (ipv4 && !ipv4->next_proto_id)
4232                                 ipv4->next_proto_id = IPPROTO_GRE;
4233                         else if (ipv6 && !ipv6->proto)
4234                                 ipv6->proto = IPPROTO_GRE;
4235                         break;
4236                 case RTE_FLOW_ITEM_TYPE_VOID:
4237                         break;
4238                 default:
4239                         return rte_flow_error_set(error, EINVAL,
4240                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4241                                                   (void *)items->type,
4242                                                   "unsupported item type");
4243                         break;
4244                 }
4245                 temp_size += len;
4246         }
4247         *size = temp_size;
4248         return 0;
4249 }
4250
4251 static int
4252 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
4253 {
4254         struct rte_ether_hdr *eth = NULL;
4255         struct rte_vlan_hdr *vlan = NULL;
4256         struct rte_ipv6_hdr *ipv6 = NULL;
4257         struct rte_udp_hdr *udp = NULL;
4258         char *next_hdr;
4259         uint16_t proto;
4260
4261         eth = (struct rte_ether_hdr *)data;
4262         next_hdr = (char *)(eth + 1);
4263         proto = RTE_BE16(eth->ether_type);
4264
4265         /* VLAN skipping */
4266         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
4267                 vlan = (struct rte_vlan_hdr *)next_hdr;
4268                 proto = RTE_BE16(vlan->eth_proto);
4269                 next_hdr += sizeof(struct rte_vlan_hdr);
4270         }
4271
4272         /* HW calculates IPv4 csum. no need to proceed */
4273         if (proto == RTE_ETHER_TYPE_IPV4)
4274                 return 0;
4275
4276         /* non IPv4/IPv6 header. not supported */
4277         if (proto != RTE_ETHER_TYPE_IPV6) {
4278                 return rte_flow_error_set(error, ENOTSUP,
4279                                           RTE_FLOW_ERROR_TYPE_ACTION,
4280                                           NULL, "Cannot offload non IPv4/IPv6");
4281         }
4282
4283         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
4284
4285         /* ignore non UDP */
4286         if (ipv6->proto != IPPROTO_UDP)
4287                 return 0;
4288
4289         udp = (struct rte_udp_hdr *)(ipv6 + 1);
4290         udp->dgram_cksum = 0;
4291
4292         return 0;
4293 }
4294
4295 /**
4296  * Convert L2 encap action to DV specification.
4297  *
4298  * @param[in] dev
4299  *   Pointer to rte_eth_dev structure.
4300  * @param[in] action
4301  *   Pointer to action structure.
4302  * @param[in, out] dev_flow
4303  *   Pointer to the mlx5_flow.
4304  * @param[in] transfer
4305  *   Mark if the flow is E-Switch flow.
4306  * @param[out] error
4307  *   Pointer to the error structure.
4308  *
4309  * @return
4310  *   0 on success, a negative errno value otherwise and rte_errno is set.
4311  */
4312 static int
4313 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
4314                                const struct rte_flow_action *action,
4315                                struct mlx5_flow *dev_flow,
4316                                uint8_t transfer,
4317                                struct rte_flow_error *error)
4318 {
4319         const struct rte_flow_item *encap_data;
4320         const struct rte_flow_action_raw_encap *raw_encap_data;
4321         struct mlx5_flow_dv_encap_decap_resource res = {
4322                 .reformat_type =
4323                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
4324                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4325                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
4326         };
4327
4328         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4329                 raw_encap_data =
4330                         (const struct rte_flow_action_raw_encap *)action->conf;
4331                 res.size = raw_encap_data->size;
4332                 memcpy(res.buf, raw_encap_data->data, res.size);
4333         } else {
4334                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
4335                         encap_data =
4336                                 ((const struct rte_flow_action_vxlan_encap *)
4337                                                 action->conf)->definition;
4338                 else
4339                         encap_data =
4340                                 ((const struct rte_flow_action_nvgre_encap *)
4341                                                 action->conf)->definition;
4342                 if (flow_dv_convert_encap_data(encap_data, res.buf,
4343                                                &res.size, error))
4344                         return -rte_errno;
4345         }
4346         if (flow_dv_zero_encap_udp_csum(res.buf, error))
4347                 return -rte_errno;
4348         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4349                 return rte_flow_error_set(error, EINVAL,
4350                                           RTE_FLOW_ERROR_TYPE_ACTION,
4351                                           NULL, "can't create L2 encap action");
4352         return 0;
4353 }
4354
4355 /**
4356  * Convert L2 decap action to DV specification.
4357  *
4358  * @param[in] dev
4359  *   Pointer to rte_eth_dev structure.
4360  * @param[in, out] dev_flow
4361  *   Pointer to the mlx5_flow.
4362  * @param[in] transfer
4363  *   Mark if the flow is E-Switch flow.
4364  * @param[out] error
4365  *   Pointer to the error structure.
4366  *
4367  * @return
4368  *   0 on success, a negative errno value otherwise and rte_errno is set.
4369  */
4370 static int
4371 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
4372                                struct mlx5_flow *dev_flow,
4373                                uint8_t transfer,
4374                                struct rte_flow_error *error)
4375 {
4376         struct mlx5_flow_dv_encap_decap_resource res = {
4377                 .size = 0,
4378                 .reformat_type =
4379                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
4380                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4381                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
4382         };
4383
4384         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4385                 return rte_flow_error_set(error, EINVAL,
4386                                           RTE_FLOW_ERROR_TYPE_ACTION,
4387                                           NULL, "can't create L2 decap action");
4388         return 0;
4389 }
4390
4391 /**
4392  * Convert raw decap/encap (L3 tunnel) action to DV specification.
4393  *
4394  * @param[in] dev
4395  *   Pointer to rte_eth_dev structure.
4396  * @param[in] action
4397  *   Pointer to action structure.
4398  * @param[in, out] dev_flow
4399  *   Pointer to the mlx5_flow.
4400  * @param[in] attr
4401  *   Pointer to the flow attributes.
4402  * @param[out] error
4403  *   Pointer to the error structure.
4404  *
4405  * @return
4406  *   0 on success, a negative errno value otherwise and rte_errno is set.
4407  */
4408 static int
4409 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
4410                                 const struct rte_flow_action *action,
4411                                 struct mlx5_flow *dev_flow,
4412                                 const struct rte_flow_attr *attr,
4413                                 struct rte_flow_error *error)
4414 {
4415         const struct rte_flow_action_raw_encap *encap_data;
4416         struct mlx5_flow_dv_encap_decap_resource res;
4417
4418         memset(&res, 0, sizeof(res));
4419         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
4420         res.size = encap_data->size;
4421         memcpy(res.buf, encap_data->data, res.size);
4422         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
4423                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
4424                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
4425         if (attr->transfer)
4426                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4427         else
4428                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4429                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4430         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4431                 return rte_flow_error_set(error, EINVAL,
4432                                           RTE_FLOW_ERROR_TYPE_ACTION,
4433                                           NULL, "can't create encap action");
4434         return 0;
4435 }
4436
4437 /**
4438  * Create action push VLAN.
4439  *
4440  * @param[in] dev
4441  *   Pointer to rte_eth_dev structure.
4442  * @param[in] attr
4443  *   Pointer to the flow attributes.
4444  * @param[in] vlan
4445  *   Pointer to the vlan to push to the Ethernet header.
4446  * @param[in, out] dev_flow
4447  *   Pointer to the mlx5_flow.
4448  * @param[out] error
4449  *   Pointer to the error structure.
4450  *
4451  * @return
4452  *   0 on success, a negative errno value otherwise and rte_errno is set.
4453  */
4454 static int
4455 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
4456                                 const struct rte_flow_attr *attr,
4457                                 const struct rte_vlan_hdr *vlan,
4458                                 struct mlx5_flow *dev_flow,
4459                                 struct rte_flow_error *error)
4460 {
4461         struct mlx5_flow_dv_push_vlan_action_resource res;
4462
4463         memset(&res, 0, sizeof(res));
4464         res.vlan_tag =
4465                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
4466                                  vlan->vlan_tci);
4467         if (attr->transfer)
4468                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4469         else
4470                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4471                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4472         return flow_dv_push_vlan_action_resource_register
4473                                             (dev, &res, dev_flow, error);
4474 }
4475
4476 /**
4477  * Validate the modify-header actions.
4478  *
4479  * @param[in] action_flags
4480  *   Holds the actions detected until now.
4481  * @param[in] action
4482  *   Pointer to the modify action.
4483  * @param[out] error
4484  *   Pointer to error structure.
4485  *
4486  * @return
4487  *   0 on success, a negative errno value otherwise and rte_errno is set.
4488  */
4489 static int
4490 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
4491                                    const struct rte_flow_action *action,
4492                                    struct rte_flow_error *error)
4493 {
4494         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
4495                 return rte_flow_error_set(error, EINVAL,
4496                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4497                                           NULL, "action configuration not set");
4498         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
4499                 return rte_flow_error_set(error, EINVAL,
4500                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4501                                           "can't have encap action before"
4502                                           " modify action");
4503         return 0;
4504 }
4505
4506 /**
4507  * Validate the modify-header MAC address actions.
4508  *
4509  * @param[in] action_flags
4510  *   Holds the actions detected until now.
4511  * @param[in] action
4512  *   Pointer to the modify action.
4513  * @param[in] item_flags
4514  *   Holds the items detected.
4515  * @param[out] error
4516  *   Pointer to error structure.
4517  *
4518  * @return
4519  *   0 on success, a negative errno value otherwise and rte_errno is set.
4520  */
4521 static int
4522 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
4523                                    const struct rte_flow_action *action,
4524                                    const uint64_t item_flags,
4525                                    struct rte_flow_error *error)
4526 {
4527         int ret = 0;
4528
4529         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4530         if (!ret) {
4531                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
4532                         return rte_flow_error_set(error, EINVAL,
4533                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4534                                                   NULL,
4535                                                   "no L2 item in pattern");
4536         }
4537         return ret;
4538 }
4539
4540 /**
4541  * Validate the modify-header IPv4 address actions.
4542  *
4543  * @param[in] action_flags
4544  *   Holds the actions detected until now.
4545  * @param[in] action
4546  *   Pointer to the modify action.
4547  * @param[in] item_flags
4548  *   Holds the items detected.
4549  * @param[out] error
4550  *   Pointer to error structure.
4551  *
4552  * @return
4553  *   0 on success, a negative errno value otherwise and rte_errno is set.
4554  */
4555 static int
4556 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
4557                                     const struct rte_flow_action *action,
4558                                     const uint64_t item_flags,
4559                                     struct rte_flow_error *error)
4560 {
4561         int ret = 0;
4562         uint64_t layer;
4563
4564         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4565         if (!ret) {
4566                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4567                                  MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4568                                  MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4569                 if (!(item_flags & layer))
4570                         return rte_flow_error_set(error, EINVAL,
4571                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4572                                                   NULL,
4573                                                   "no ipv4 item in pattern");
4574         }
4575         return ret;
4576 }
4577
4578 /**
4579  * Validate the modify-header IPv6 address actions.
4580  *
4581  * @param[in] action_flags
4582  *   Holds the actions detected until now.
4583  * @param[in] action
4584  *   Pointer to the modify action.
4585  * @param[in] item_flags
4586  *   Holds the items detected.
4587  * @param[out] error
4588  *   Pointer to error structure.
4589  *
4590  * @return
4591  *   0 on success, a negative errno value otherwise and rte_errno is set.
4592  */
4593 static int
4594 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
4595                                     const struct rte_flow_action *action,
4596                                     const uint64_t item_flags,
4597                                     struct rte_flow_error *error)
4598 {
4599         int ret = 0;
4600         uint64_t layer;
4601
4602         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4603         if (!ret) {
4604                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4605                                  MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4606                                  MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4607                 if (!(item_flags & layer))
4608                         return rte_flow_error_set(error, EINVAL,
4609                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4610                                                   NULL,
4611                                                   "no ipv6 item in pattern");
4612         }
4613         return ret;
4614 }
4615
4616 /**
4617  * Validate the modify-header TP actions.
4618  *
4619  * @param[in] action_flags
4620  *   Holds the actions detected until now.
4621  * @param[in] action
4622  *   Pointer to the modify action.
4623  * @param[in] item_flags
4624  *   Holds the items detected.
4625  * @param[out] error
4626  *   Pointer to error structure.
4627  *
4628  * @return
4629  *   0 on success, a negative errno value otherwise and rte_errno is set.
4630  */
4631 static int
4632 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
4633                                   const struct rte_flow_action *action,
4634                                   const uint64_t item_flags,
4635                                   struct rte_flow_error *error)
4636 {
4637         int ret = 0;
4638         uint64_t layer;
4639
4640         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4641         if (!ret) {
4642                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4643                                  MLX5_FLOW_LAYER_INNER_L4 :
4644                                  MLX5_FLOW_LAYER_OUTER_L4;
4645                 if (!(item_flags & layer))
4646                         return rte_flow_error_set(error, EINVAL,
4647                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4648                                                   NULL, "no transport layer "
4649                                                   "in pattern");
4650         }
4651         return ret;
4652 }
4653
4654 /**
4655  * Validate the modify-header actions of increment/decrement
4656  * TCP Sequence-number.
4657  *
4658  * @param[in] action_flags
4659  *   Holds the actions detected until now.
4660  * @param[in] action
4661  *   Pointer to the modify action.
4662  * @param[in] item_flags
4663  *   Holds the items detected.
4664  * @param[out] error
4665  *   Pointer to error structure.
4666  *
4667  * @return
4668  *   0 on success, a negative errno value otherwise and rte_errno is set.
4669  */
4670 static int
4671 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
4672                                        const struct rte_flow_action *action,
4673                                        const uint64_t item_flags,
4674                                        struct rte_flow_error *error)
4675 {
4676         int ret = 0;
4677         uint64_t layer;
4678
4679         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4680         if (!ret) {
4681                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4682                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
4683                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
4684                 if (!(item_flags & layer))
4685                         return rte_flow_error_set(error, EINVAL,
4686                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4687                                                   NULL, "no TCP item in"
4688                                                   " pattern");
4689                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
4690                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
4691                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
4692                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
4693                         return rte_flow_error_set(error, EINVAL,
4694                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4695                                                   NULL,
4696                                                   "cannot decrease and increase"
4697                                                   " TCP sequence number"
4698                                                   " at the same time");
4699         }
4700         return ret;
4701 }
4702
4703 /**
4704  * Validate the modify-header actions of increment/decrement
4705  * TCP Acknowledgment number.
4706  *
4707  * @param[in] action_flags
4708  *   Holds the actions detected until now.
4709  * @param[in] action
4710  *   Pointer to the modify action.
4711  * @param[in] item_flags
4712  *   Holds the items detected.
4713  * @param[out] error
4714  *   Pointer to error structure.
4715  *
4716  * @return
4717  *   0 on success, a negative errno value otherwise and rte_errno is set.
4718  */
4719 static int
4720 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
4721                                        const struct rte_flow_action *action,
4722                                        const uint64_t item_flags,
4723                                        struct rte_flow_error *error)
4724 {
4725         int ret = 0;
4726         uint64_t layer;
4727
4728         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4729         if (!ret) {
4730                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4731                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
4732                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
4733                 if (!(item_flags & layer))
4734                         return rte_flow_error_set(error, EINVAL,
4735                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4736                                                   NULL, "no TCP item in"
4737                                                   " pattern");
4738                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
4739                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
4740                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
4741                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
4742                         return rte_flow_error_set(error, EINVAL,
4743                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4744                                                   NULL,
4745                                                   "cannot decrease and increase"
4746                                                   " TCP acknowledgment number"
4747                                                   " at the same time");
4748         }
4749         return ret;
4750 }
4751
4752 /**
4753  * Validate the modify-header TTL actions.
4754  *
4755  * @param[in] action_flags
4756  *   Holds the actions detected until now.
4757  * @param[in] action
4758  *   Pointer to the modify action.
4759  * @param[in] item_flags
4760  *   Holds the items detected.
4761  * @param[out] error
4762  *   Pointer to error structure.
4763  *
4764  * @return
4765  *   0 on success, a negative errno value otherwise and rte_errno is set.
4766  */
4767 static int
4768 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
4769                                    const struct rte_flow_action *action,
4770                                    const uint64_t item_flags,
4771                                    struct rte_flow_error *error)
4772 {
4773         int ret = 0;
4774         uint64_t layer;
4775
4776         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4777         if (!ret) {
4778                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4779                                  MLX5_FLOW_LAYER_INNER_L3 :
4780                                  MLX5_FLOW_LAYER_OUTER_L3;
4781                 if (!(item_flags & layer))
4782                         return rte_flow_error_set(error, EINVAL,
4783                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4784                                                   NULL,
4785                                                   "no IP protocol in pattern");
4786         }
4787         return ret;
4788 }
4789
4790 /**
4791  * Validate the generic modify field actions.
4792  * @param[in] dev
4793  *   Pointer to the rte_eth_dev structure.
4794  * @param[in] action_flags
4795  *   Holds the actions detected until now.
4796  * @param[in] action
4797  *   Pointer to the modify action.
4798  * @param[in] attr
4799  *   Pointer to the flow attributes.
4800  * @param[out] error
4801  *   Pointer to error structure.
4802  *
4803  * @return
4804  *   Number of header fields to modify (0 or more) on success,
4805  *   a negative errno value otherwise and rte_errno is set.
4806  */
4807 static int
4808 flow_dv_validate_action_modify_field(struct rte_eth_dev *dev,
4809                                    const uint64_t action_flags,
4810                                    const struct rte_flow_action *action,
4811                                    const struct rte_flow_attr *attr,
4812                                    struct rte_flow_error *error)
4813 {
4814         int ret = 0;
4815         struct mlx5_priv *priv = dev->data->dev_private;
4816         struct mlx5_dev_config *config = &priv->config;
4817         const struct rte_flow_action_modify_field *action_modify_field =
4818                 action->conf;
4819         uint32_t dst_width = mlx5_flow_item_field_width(dev,
4820                                 action_modify_field->dst.field,
4821                                 -1, attr, error);
4822         uint32_t src_width = mlx5_flow_item_field_width(dev,
4823                                 action_modify_field->src.field,
4824                                 dst_width, attr, error);
4825
4826         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4827         if (ret)
4828                 return ret;
4829
4830         if (action_modify_field->width == 0)
4831                 return rte_flow_error_set(error, EINVAL,
4832                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4833                                 "no bits are requested to be modified");
4834         else if (action_modify_field->width > dst_width ||
4835                  action_modify_field->width > src_width)
4836                 return rte_flow_error_set(error, EINVAL,
4837                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4838                                 "cannot modify more bits than"
4839                                 " the width of a field");
4840         if (action_modify_field->dst.field != RTE_FLOW_FIELD_VALUE &&
4841             action_modify_field->dst.field != RTE_FLOW_FIELD_POINTER) {
4842                 if ((action_modify_field->dst.offset +
4843                      action_modify_field->width > dst_width) ||
4844                     (action_modify_field->dst.offset % 32))
4845                         return rte_flow_error_set(error, EINVAL,
4846                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4847                                         "destination offset is too big"
4848                                         " or not aligned to 4 bytes");
4849                 if (action_modify_field->dst.level &&
4850                     action_modify_field->dst.field != RTE_FLOW_FIELD_TAG)
4851                         return rte_flow_error_set(error, ENOTSUP,
4852                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4853                                         "inner header fields modification"
4854                                         " is not supported");
4855         }
4856         if (action_modify_field->src.field != RTE_FLOW_FIELD_VALUE &&
4857             action_modify_field->src.field != RTE_FLOW_FIELD_POINTER) {
4858                 if (!attr->transfer && !attr->group)
4859                         return rte_flow_error_set(error, ENOTSUP,
4860                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4861                                         "modify field action is not"
4862                                         " supported for group 0");
4863                 if ((action_modify_field->src.offset +
4864                      action_modify_field->width > src_width) ||
4865                     (action_modify_field->src.offset % 32))
4866                         return rte_flow_error_set(error, EINVAL,
4867                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4868                                         "source offset is too big"
4869                                         " or not aligned to 4 bytes");
4870                 if (action_modify_field->src.level &&
4871                     action_modify_field->src.field != RTE_FLOW_FIELD_TAG)
4872                         return rte_flow_error_set(error, ENOTSUP,
4873                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4874                                         "inner header fields modification"
4875                                         " is not supported");
4876         }
4877         if ((action_modify_field->dst.field ==
4878              action_modify_field->src.field) &&
4879             (action_modify_field->dst.level ==
4880              action_modify_field->src.level))
4881                 return rte_flow_error_set(error, EINVAL,
4882                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4883                                 "source and destination fields"
4884                                 " cannot be the same");
4885         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VALUE ||
4886             action_modify_field->dst.field == RTE_FLOW_FIELD_POINTER ||
4887             action_modify_field->dst.field == RTE_FLOW_FIELD_MARK)
4888                 return rte_flow_error_set(error, EINVAL,
4889                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4890                                 "mark, immediate value or a pointer to it"
4891                                 " cannot be used as a destination");
4892         if (action_modify_field->dst.field == RTE_FLOW_FIELD_START ||
4893             action_modify_field->src.field == RTE_FLOW_FIELD_START)
4894                 return rte_flow_error_set(error, ENOTSUP,
4895                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4896                                 "modifications of an arbitrary"
4897                                 " place in a packet is not supported");
4898         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VLAN_TYPE ||
4899             action_modify_field->src.field == RTE_FLOW_FIELD_VLAN_TYPE)
4900                 return rte_flow_error_set(error, ENOTSUP,
4901                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4902                                 "modifications of the 802.1Q Tag"
4903                                 " Identifier is not supported");
4904         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VXLAN_VNI ||
4905             action_modify_field->src.field == RTE_FLOW_FIELD_VXLAN_VNI)
4906                 return rte_flow_error_set(error, ENOTSUP,
4907                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4908                                 "modifications of the VXLAN Network"
4909                                 " Identifier is not supported");
4910         if (action_modify_field->dst.field == RTE_FLOW_FIELD_GENEVE_VNI ||
4911             action_modify_field->src.field == RTE_FLOW_FIELD_GENEVE_VNI)
4912                 return rte_flow_error_set(error, ENOTSUP,
4913                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4914                                 "modifications of the GENEVE Network"
4915                                 " Identifier is not supported");
4916         if (action_modify_field->dst.field == RTE_FLOW_FIELD_MARK ||
4917             action_modify_field->src.field == RTE_FLOW_FIELD_MARK)
4918                 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4919                     !mlx5_flow_ext_mreg_supported(dev))
4920                         return rte_flow_error_set(error, ENOTSUP,
4921                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4922                                         "cannot modify mark in legacy mode"
4923                                         " or without extensive registers");
4924         if (action_modify_field->dst.field == RTE_FLOW_FIELD_META ||
4925             action_modify_field->src.field == RTE_FLOW_FIELD_META) {
4926                 if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
4927                     !mlx5_flow_ext_mreg_supported(dev))
4928                         return rte_flow_error_set(error, ENOTSUP,
4929                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4930                                         "cannot modify meta without"
4931                                         " extensive registers support");
4932                 ret = flow_dv_get_metadata_reg(dev, attr, error);
4933                 if (ret < 0 || ret == REG_NON)
4934                         return rte_flow_error_set(error, ENOTSUP,
4935                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4936                                         "cannot modify meta without"
4937                                         " extensive registers available");
4938         }
4939         if (action_modify_field->operation != RTE_FLOW_MODIFY_SET)
4940                 return rte_flow_error_set(error, ENOTSUP,
4941                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4942                                 "add and sub operations"
4943                                 " are not supported");
4944         return (action_modify_field->width / 32) +
4945                !!(action_modify_field->width % 32);
4946 }
4947
4948 /**
4949  * Validate jump action.
4950  *
4951  * @param[in] action
4952  *   Pointer to the jump action.
4953  * @param[in] action_flags
4954  *   Holds the actions detected until now.
4955  * @param[in] attributes
4956  *   Pointer to flow attributes
4957  * @param[in] external
4958  *   Action belongs to flow rule created by request external to PMD.
4959  * @param[out] error
4960  *   Pointer to error structure.
4961  *
4962  * @return
4963  *   0 on success, a negative errno value otherwise and rte_errno is set.
4964  */
4965 static int
4966 flow_dv_validate_action_jump(struct rte_eth_dev *dev,
4967                              const struct mlx5_flow_tunnel *tunnel,
4968                              const struct rte_flow_action *action,
4969                              uint64_t action_flags,
4970                              const struct rte_flow_attr *attributes,
4971                              bool external, struct rte_flow_error *error)
4972 {
4973         uint32_t target_group, table;
4974         int ret = 0;
4975         struct flow_grp_info grp_info = {
4976                 .external = !!external,
4977                 .transfer = !!attributes->transfer,
4978                 .fdb_def_rule = 1,
4979                 .std_tbl_fix = 0
4980         };
4981         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
4982                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
4983                 return rte_flow_error_set(error, EINVAL,
4984                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4985                                           "can't have 2 fate actions in"
4986                                           " same flow");
4987         if (!action->conf)
4988                 return rte_flow_error_set(error, EINVAL,
4989                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4990                                           NULL, "action configuration not set");
4991         target_group =
4992                 ((const struct rte_flow_action_jump *)action->conf)->group;
4993         ret = mlx5_flow_group_to_table(dev, tunnel, target_group, &table,
4994                                        &grp_info, error);
4995         if (ret)
4996                 return ret;
4997         if (attributes->group == target_group &&
4998             !(action_flags & (MLX5_FLOW_ACTION_TUNNEL_SET |
4999                               MLX5_FLOW_ACTION_TUNNEL_MATCH)))
5000                 return rte_flow_error_set(error, EINVAL,
5001                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5002                                           "target group must be other than"
5003                                           " the current flow group");
5004         return 0;
5005 }
5006
5007 /*
5008  * Validate action PORT_ID / REPRESENTED_PORT.
5009  *
5010  * @param[in] dev
5011  *   Pointer to rte_eth_dev structure.
5012  * @param[in] action_flags
5013  *   Bit-fields that holds the actions detected until now.
5014  * @param[in] action
5015  *   PORT_ID / REPRESENTED_PORT action structure.
5016  * @param[in] attr
5017  *   Attributes of flow that includes this action.
5018  * @param[out] error
5019  *   Pointer to error structure.
5020  *
5021  * @return
5022  *   0 on success, a negative errno value otherwise and rte_errno is set.
5023  */
5024 static int
5025 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
5026                                 uint64_t action_flags,
5027                                 const struct rte_flow_action *action,
5028                                 const struct rte_flow_attr *attr,
5029                                 struct rte_flow_error *error)
5030 {
5031         const struct rte_flow_action_port_id *port_id;
5032         const struct rte_flow_action_ethdev *ethdev;
5033         struct mlx5_priv *act_priv;
5034         struct mlx5_priv *dev_priv;
5035         uint16_t port;
5036
5037         if (!attr->transfer)
5038                 return rte_flow_error_set(error, ENOTSUP,
5039                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5040                                           NULL,
5041                                           "port action is valid in transfer"
5042                                           " mode only");
5043         if (!action || !action->conf)
5044                 return rte_flow_error_set(error, ENOTSUP,
5045                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5046                                           NULL,
5047                                           "port action parameters must be"
5048                                           " specified");
5049         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
5050                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5051                 return rte_flow_error_set(error, EINVAL,
5052                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5053                                           "can have only one fate actions in"
5054                                           " a flow");
5055         dev_priv = mlx5_dev_to_eswitch_info(dev);
5056         if (!dev_priv)
5057                 return rte_flow_error_set(error, rte_errno,
5058                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5059                                           NULL,
5060                                           "failed to obtain E-Switch info");
5061         switch (action->type) {
5062         case RTE_FLOW_ACTION_TYPE_PORT_ID:
5063                 port_id = action->conf;
5064                 port = port_id->original ? dev->data->port_id : port_id->id;
5065                 break;
5066         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
5067                 ethdev = action->conf;
5068                 port = ethdev->port_id;
5069                 break;
5070         default:
5071                 MLX5_ASSERT(false);
5072                 return rte_flow_error_set
5073                                 (error, EINVAL,
5074                                  RTE_FLOW_ERROR_TYPE_ACTION, action,
5075                                  "unknown E-Switch action");
5076         }
5077         act_priv = mlx5_port_to_eswitch_info(port, false);
5078         if (!act_priv)
5079                 return rte_flow_error_set
5080                                 (error, rte_errno,
5081                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, action->conf,
5082                                  "failed to obtain E-Switch port id for port");
5083         if (act_priv->domain_id != dev_priv->domain_id)
5084                 return rte_flow_error_set
5085                                 (error, EINVAL,
5086                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5087                                  "port does not belong to"
5088                                  " E-Switch being configured");
5089         return 0;
5090 }
5091
5092 /**
5093  * Get the maximum number of modify header actions.
5094  *
5095  * @param dev
5096  *   Pointer to rte_eth_dev structure.
5097  * @param root
5098  *   Whether action is on root table.
5099  *
5100  * @return
5101  *   Max number of modify header actions device can support.
5102  */
5103 static inline unsigned int
5104 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev __rte_unused,
5105                               bool root)
5106 {
5107         /*
5108          * There's no way to directly query the max capacity from FW.
5109          * The maximal value on root table should be assumed to be supported.
5110          */
5111         if (!root)
5112                 return MLX5_MAX_MODIFY_NUM;
5113         else
5114                 return MLX5_ROOT_TBL_MODIFY_NUM;
5115 }
5116
5117 /**
5118  * Validate the meter action.
5119  *
5120  * @param[in] dev
5121  *   Pointer to rte_eth_dev structure.
5122  * @param[in] action_flags
5123  *   Bit-fields that holds the actions detected until now.
5124  * @param[in] action
5125  *   Pointer to the meter action.
5126  * @param[in] attr
5127  *   Attributes of flow that includes this action.
5128  * @param[in] port_id_item
5129  *   Pointer to item indicating port id.
5130  * @param[out] error
5131  *   Pointer to error structure.
5132  *
5133  * @return
5134  *   0 on success, a negative errno value otherwise and rte_ernno is set.
5135  */
5136 static int
5137 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
5138                                 uint64_t action_flags,
5139                                 const struct rte_flow_action *action,
5140                                 const struct rte_flow_attr *attr,
5141                                 const struct rte_flow_item *port_id_item,
5142                                 bool *def_policy,
5143                                 struct rte_flow_error *error)
5144 {
5145         struct mlx5_priv *priv = dev->data->dev_private;
5146         const struct rte_flow_action_meter *am = action->conf;
5147         struct mlx5_flow_meter_info *fm;
5148         struct mlx5_flow_meter_policy *mtr_policy;
5149         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
5150
5151         if (!am)
5152                 return rte_flow_error_set(error, EINVAL,
5153                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5154                                           "meter action conf is NULL");
5155
5156         if (action_flags & MLX5_FLOW_ACTION_METER)
5157                 return rte_flow_error_set(error, ENOTSUP,
5158                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5159                                           "meter chaining not support");
5160         if (action_flags & MLX5_FLOW_ACTION_JUMP)
5161                 return rte_flow_error_set(error, ENOTSUP,
5162                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5163                                           "meter with jump not support");
5164         if (!priv->mtr_en)
5165                 return rte_flow_error_set(error, ENOTSUP,
5166                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5167                                           NULL,
5168                                           "meter action not supported");
5169         fm = mlx5_flow_meter_find(priv, am->mtr_id, NULL);
5170         if (!fm)
5171                 return rte_flow_error_set(error, EINVAL,
5172                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5173                                           "Meter not found");
5174         /* aso meter can always be shared by different domains */
5175         if (fm->ref_cnt && !priv->sh->meter_aso_en &&
5176             !(fm->transfer == attr->transfer ||
5177               (!fm->ingress && !attr->ingress && attr->egress) ||
5178               (!fm->egress && !attr->egress && attr->ingress)))
5179                 return rte_flow_error_set(error, EINVAL,
5180                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5181                         "Flow attributes domain are either invalid "
5182                         "or have a domain conflict with current "
5183                         "meter attributes");
5184         if (fm->def_policy) {
5185                 if (!((attr->transfer &&
5186                         mtrmng->def_policy[MLX5_MTR_DOMAIN_TRANSFER]) ||
5187                         (attr->egress &&
5188                         mtrmng->def_policy[MLX5_MTR_DOMAIN_EGRESS]) ||
5189                         (attr->ingress &&
5190                         mtrmng->def_policy[MLX5_MTR_DOMAIN_INGRESS])))
5191                         return rte_flow_error_set(error, EINVAL,
5192                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5193                                           "Flow attributes domain "
5194                                           "have a conflict with current "
5195                                           "meter domain attributes");
5196                 *def_policy = true;
5197         } else {
5198                 mtr_policy = mlx5_flow_meter_policy_find(dev,
5199                                                 fm->policy_id, NULL);
5200                 if (!mtr_policy)
5201                         return rte_flow_error_set(error, EINVAL,
5202                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5203                                           "Invalid policy id for meter ");
5204                 if (!((attr->transfer && mtr_policy->transfer) ||
5205                         (attr->egress && mtr_policy->egress) ||
5206                         (attr->ingress && mtr_policy->ingress)))
5207                         return rte_flow_error_set(error, EINVAL,
5208                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5209                                           "Flow attributes domain "
5210                                           "have a conflict with current "
5211                                           "meter domain attributes");
5212                 if (attr->transfer && mtr_policy->dev) {
5213                         /**
5214                          * When policy has fate action of port_id,
5215                          * the flow should have the same src port as policy.
5216                          */
5217                         struct mlx5_priv *policy_port_priv =
5218                                         mtr_policy->dev->data->dev_private;
5219                         int32_t flow_src_port = priv->representor_id;
5220
5221                         if (port_id_item) {
5222                                 const struct rte_flow_item_port_id *spec =
5223                                                         port_id_item->spec;
5224                                 struct mlx5_priv *port_priv =
5225                                         mlx5_port_to_eswitch_info(spec->id,
5226                                                                   false);
5227                                 if (!port_priv)
5228                                         return rte_flow_error_set(error,
5229                                                 rte_errno,
5230                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5231                                                 spec,
5232                                                 "Failed to get port info.");
5233                                 flow_src_port = port_priv->representor_id;
5234                         }
5235                         if (flow_src_port != policy_port_priv->representor_id)
5236                                 return rte_flow_error_set(error,
5237                                                 rte_errno,
5238                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5239                                                 NULL,
5240                                                 "Flow and meter policy "
5241                                                 "have different src port.");
5242                 }
5243                 *def_policy = false;
5244         }
5245         return 0;
5246 }
5247
5248 /**
5249  * Validate the age action.
5250  *
5251  * @param[in] action_flags
5252  *   Holds the actions detected until now.
5253  * @param[in] action
5254  *   Pointer to the age action.
5255  * @param[in] dev
5256  *   Pointer to the Ethernet device structure.
5257  * @param[out] error
5258  *   Pointer to error structure.
5259  *
5260  * @return
5261  *   0 on success, a negative errno value otherwise and rte_errno is set.
5262  */
5263 static int
5264 flow_dv_validate_action_age(uint64_t action_flags,
5265                             const struct rte_flow_action *action,
5266                             struct rte_eth_dev *dev,
5267                             struct rte_flow_error *error)
5268 {
5269         struct mlx5_priv *priv = dev->data->dev_private;
5270         const struct rte_flow_action_age *age = action->conf;
5271
5272         if (!priv->sh->devx || (priv->sh->cmng.counter_fallback &&
5273             !priv->sh->aso_age_mng))
5274                 return rte_flow_error_set(error, ENOTSUP,
5275                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5276                                           NULL,
5277                                           "age action not supported");
5278         if (!(action->conf))
5279                 return rte_flow_error_set(error, EINVAL,
5280                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5281                                           "configuration cannot be null");
5282         if (!(age->timeout))
5283                 return rte_flow_error_set(error, EINVAL,
5284                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5285                                           "invalid timeout value 0");
5286         if (action_flags & MLX5_FLOW_ACTION_AGE)
5287                 return rte_flow_error_set(error, EINVAL,
5288                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5289                                           "duplicate age actions set");
5290         return 0;
5291 }
5292
5293 /**
5294  * Validate the modify-header IPv4 DSCP actions.
5295  *
5296  * @param[in] action_flags
5297  *   Holds the actions detected until now.
5298  * @param[in] action
5299  *   Pointer to the modify action.
5300  * @param[in] item_flags
5301  *   Holds the items detected.
5302  * @param[out] error
5303  *   Pointer to error structure.
5304  *
5305  * @return
5306  *   0 on success, a negative errno value otherwise and rte_errno is set.
5307  */
5308 static int
5309 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
5310                                          const struct rte_flow_action *action,
5311                                          const uint64_t item_flags,
5312                                          struct rte_flow_error *error)
5313 {
5314         int ret = 0;
5315
5316         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5317         if (!ret) {
5318                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
5319                         return rte_flow_error_set(error, EINVAL,
5320                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5321                                                   NULL,
5322                                                   "no ipv4 item in pattern");
5323         }
5324         return ret;
5325 }
5326
5327 /**
5328  * Validate the modify-header IPv6 DSCP actions.
5329  *
5330  * @param[in] action_flags
5331  *   Holds the actions detected until now.
5332  * @param[in] action
5333  *   Pointer to the modify action.
5334  * @param[in] item_flags
5335  *   Holds the items detected.
5336  * @param[out] error
5337  *   Pointer to error structure.
5338  *
5339  * @return
5340  *   0 on success, a negative errno value otherwise and rte_errno is set.
5341  */
5342 static int
5343 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
5344                                          const struct rte_flow_action *action,
5345                                          const uint64_t item_flags,
5346                                          struct rte_flow_error *error)
5347 {
5348         int ret = 0;
5349
5350         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5351         if (!ret) {
5352                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
5353                         return rte_flow_error_set(error, EINVAL,
5354                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5355                                                   NULL,
5356                                                   "no ipv6 item in pattern");
5357         }
5358         return ret;
5359 }
5360
5361 int
5362 flow_dv_modify_match_cb(void *tool_ctx __rte_unused,
5363                         struct mlx5_list_entry *entry, void *cb_ctx)
5364 {
5365         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5366         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5367         struct mlx5_flow_dv_modify_hdr_resource *resource =
5368                                   container_of(entry, typeof(*resource), entry);
5369         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5370
5371         key_len += ref->actions_num * sizeof(ref->actions[0]);
5372         return ref->actions_num != resource->actions_num ||
5373                memcmp(&ref->ft_type, &resource->ft_type, key_len);
5374 }
5375
5376 static struct mlx5_indexed_pool *
5377 flow_dv_modify_ipool_get(struct mlx5_dev_ctx_shared *sh, uint8_t index)
5378 {
5379         struct mlx5_indexed_pool *ipool = __atomic_load_n
5380                                      (&sh->mdh_ipools[index], __ATOMIC_SEQ_CST);
5381
5382         if (!ipool) {
5383                 struct mlx5_indexed_pool *expected = NULL;
5384                 struct mlx5_indexed_pool_config cfg =
5385                     (struct mlx5_indexed_pool_config) {
5386                        .size = sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
5387                                                                    (index + 1) *
5388                                            sizeof(struct mlx5_modification_cmd),
5389                        .trunk_size = 64,
5390                        .grow_trunk = 3,
5391                        .grow_shift = 2,
5392                        .need_lock = 1,
5393                        .release_mem_en = !!sh->reclaim_mode,
5394                        .per_core_cache = sh->reclaim_mode ? 0 : (1 << 16),
5395                        .malloc = mlx5_malloc,
5396                        .free = mlx5_free,
5397                        .type = "mlx5_modify_action_resource",
5398                 };
5399
5400                 cfg.size = RTE_ALIGN(cfg.size, sizeof(ipool));
5401                 ipool = mlx5_ipool_create(&cfg);
5402                 if (!ipool)
5403                         return NULL;
5404                 if (!__atomic_compare_exchange_n(&sh->mdh_ipools[index],
5405                                                  &expected, ipool, false,
5406                                                  __ATOMIC_SEQ_CST,
5407                                                  __ATOMIC_SEQ_CST)) {
5408                         mlx5_ipool_destroy(ipool);
5409                         ipool = __atomic_load_n(&sh->mdh_ipools[index],
5410                                                 __ATOMIC_SEQ_CST);
5411                 }
5412         }
5413         return ipool;
5414 }
5415
5416 struct mlx5_list_entry *
5417 flow_dv_modify_create_cb(void *tool_ctx, void *cb_ctx)
5418 {
5419         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5420         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5421         struct mlx5dv_dr_domain *ns;
5422         struct mlx5_flow_dv_modify_hdr_resource *entry;
5423         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5424         struct mlx5_indexed_pool *ipool = flow_dv_modify_ipool_get(sh,
5425                                                           ref->actions_num - 1);
5426         int ret;
5427         uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5428         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5429         uint32_t idx;
5430
5431         if (unlikely(!ipool)) {
5432                 rte_flow_error_set(ctx->error, ENOMEM,
5433                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5434                                    NULL, "cannot allocate modify ipool");
5435                 return NULL;
5436         }
5437         entry = mlx5_ipool_zmalloc(ipool, &idx);
5438         if (!entry) {
5439                 rte_flow_error_set(ctx->error, ENOMEM,
5440                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5441                                    "cannot allocate resource memory");
5442                 return NULL;
5443         }
5444         rte_memcpy(&entry->ft_type,
5445                    RTE_PTR_ADD(ref, offsetof(typeof(*ref), ft_type)),
5446                    key_len + data_len);
5447         if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
5448                 ns = sh->fdb_domain;
5449         else if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
5450                 ns = sh->tx_domain;
5451         else
5452                 ns = sh->rx_domain;
5453         ret = mlx5_flow_os_create_flow_action_modify_header
5454                                         (sh->cdev->ctx, ns, entry,
5455                                          data_len, &entry->action);
5456         if (ret) {
5457                 mlx5_ipool_free(sh->mdh_ipools[ref->actions_num - 1], idx);
5458                 rte_flow_error_set(ctx->error, ENOMEM,
5459                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5460                                    NULL, "cannot create modification action");
5461                 return NULL;
5462         }
5463         entry->idx = idx;
5464         return &entry->entry;
5465 }
5466
5467 struct mlx5_list_entry *
5468 flow_dv_modify_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
5469                         void *cb_ctx)
5470 {
5471         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5472         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5473         struct mlx5_flow_dv_modify_hdr_resource *entry;
5474         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5475         uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5476         uint32_t idx;
5477
5478         entry = mlx5_ipool_malloc(sh->mdh_ipools[ref->actions_num - 1],
5479                                   &idx);
5480         if (!entry) {
5481                 rte_flow_error_set(ctx->error, ENOMEM,
5482                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5483                                    "cannot allocate resource memory");
5484                 return NULL;
5485         }
5486         memcpy(entry, oentry, sizeof(*entry) + data_len);
5487         entry->idx = idx;
5488         return &entry->entry;
5489 }
5490
5491 void
5492 flow_dv_modify_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
5493 {
5494         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5495         struct mlx5_flow_dv_modify_hdr_resource *res =
5496                 container_of(entry, typeof(*res), entry);
5497
5498         mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
5499 }
5500
5501 /**
5502  * Validate the sample action.
5503  *
5504  * @param[in, out] action_flags
5505  *   Holds the actions detected until now.
5506  * @param[in] action
5507  *   Pointer to the sample action.
5508  * @param[in] dev
5509  *   Pointer to the Ethernet device structure.
5510  * @param[in] attr
5511  *   Attributes of flow that includes this action.
5512  * @param[in] item_flags
5513  *   Holds the items detected.
5514  * @param[in] rss
5515  *   Pointer to the RSS action.
5516  * @param[out] sample_rss
5517  *   Pointer to the RSS action in sample action list.
5518  * @param[out] count
5519  *   Pointer to the COUNT action in sample action list.
5520  * @param[out] fdb_mirror_limit
5521  *   Pointer to the FDB mirror limitation flag.
5522  * @param[out] error
5523  *   Pointer to error structure.
5524  *
5525  * @return
5526  *   0 on success, a negative errno value otherwise and rte_errno is set.
5527  */
5528 static int
5529 flow_dv_validate_action_sample(uint64_t *action_flags,
5530                                const struct rte_flow_action *action,
5531                                struct rte_eth_dev *dev,
5532                                const struct rte_flow_attr *attr,
5533                                uint64_t item_flags,
5534                                const struct rte_flow_action_rss *rss,
5535                                const struct rte_flow_action_rss **sample_rss,
5536                                const struct rte_flow_action_count **count,
5537                                int *fdb_mirror_limit,
5538                                struct rte_flow_error *error)
5539 {
5540         struct mlx5_priv *priv = dev->data->dev_private;
5541         struct mlx5_dev_config *dev_conf = &priv->config;
5542         const struct rte_flow_action_sample *sample = action->conf;
5543         const struct rte_flow_action *act;
5544         uint64_t sub_action_flags = 0;
5545         uint16_t queue_index = 0xFFFF;
5546         int actions_n = 0;
5547         int ret;
5548
5549         if (!sample)
5550                 return rte_flow_error_set(error, EINVAL,
5551                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5552                                           "configuration cannot be NULL");
5553         if (sample->ratio == 0)
5554                 return rte_flow_error_set(error, EINVAL,
5555                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5556                                           "ratio value starts from 1");
5557         if (!priv->sh->devx || (sample->ratio > 0 && !priv->sampler_en))
5558                 return rte_flow_error_set(error, ENOTSUP,
5559                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5560                                           NULL,
5561                                           "sample action not supported");
5562         if (*action_flags & MLX5_FLOW_ACTION_SAMPLE)
5563                 return rte_flow_error_set(error, EINVAL,
5564                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5565                                           "Multiple sample actions not "
5566                                           "supported");
5567         if (*action_flags & MLX5_FLOW_ACTION_METER)
5568                 return rte_flow_error_set(error, EINVAL,
5569                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5570                                           "wrong action order, meter should "
5571                                           "be after sample action");
5572         if (*action_flags & MLX5_FLOW_ACTION_JUMP)
5573                 return rte_flow_error_set(error, EINVAL,
5574                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5575                                           "wrong action order, jump should "
5576                                           "be after sample action");
5577         act = sample->actions;
5578         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
5579                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
5580                         return rte_flow_error_set(error, ENOTSUP,
5581                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5582                                                   act, "too many actions");
5583                 switch (act->type) {
5584                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5585                         ret = mlx5_flow_validate_action_queue(act,
5586                                                               sub_action_flags,
5587                                                               dev,
5588                                                               attr, error);
5589                         if (ret < 0)
5590                                 return ret;
5591                         queue_index = ((const struct rte_flow_action_queue *)
5592                                                         (act->conf))->index;
5593                         sub_action_flags |= MLX5_FLOW_ACTION_QUEUE;
5594                         ++actions_n;
5595                         break;
5596                 case RTE_FLOW_ACTION_TYPE_RSS:
5597                         *sample_rss = act->conf;
5598                         ret = mlx5_flow_validate_action_rss(act,
5599                                                             sub_action_flags,
5600                                                             dev, attr,
5601                                                             item_flags,
5602                                                             error);
5603                         if (ret < 0)
5604                                 return ret;
5605                         if (rss && *sample_rss &&
5606                             ((*sample_rss)->level != rss->level ||
5607                             (*sample_rss)->types != rss->types))
5608                                 return rte_flow_error_set(error, ENOTSUP,
5609                                         RTE_FLOW_ERROR_TYPE_ACTION,
5610                                         NULL,
5611                                         "Can't use the different RSS types "
5612                                         "or level in the same flow");
5613                         if (*sample_rss != NULL && (*sample_rss)->queue_num)
5614                                 queue_index = (*sample_rss)->queue[0];
5615                         sub_action_flags |= MLX5_FLOW_ACTION_RSS;
5616                         ++actions_n;
5617                         break;
5618                 case RTE_FLOW_ACTION_TYPE_MARK:
5619                         ret = flow_dv_validate_action_mark(dev, act,
5620                                                            sub_action_flags,
5621                                                            attr, error);
5622                         if (ret < 0)
5623                                 return ret;
5624                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
5625                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK |
5626                                                 MLX5_FLOW_ACTION_MARK_EXT;
5627                         else
5628                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK;
5629                         ++actions_n;
5630                         break;
5631                 case RTE_FLOW_ACTION_TYPE_COUNT:
5632                         ret = flow_dv_validate_action_count
5633                                 (dev, false, *action_flags | sub_action_flags,
5634                                  error);
5635                         if (ret < 0)
5636                                 return ret;
5637                         *count = act->conf;
5638                         sub_action_flags |= MLX5_FLOW_ACTION_COUNT;
5639                         *action_flags |= MLX5_FLOW_ACTION_COUNT;
5640                         ++actions_n;
5641                         break;
5642                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5643                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
5644                         ret = flow_dv_validate_action_port_id(dev,
5645                                                               sub_action_flags,
5646                                                               act,
5647                                                               attr,
5648                                                               error);
5649                         if (ret)
5650                                 return ret;
5651                         sub_action_flags |= MLX5_FLOW_ACTION_PORT_ID;
5652                         ++actions_n;
5653                         break;
5654                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5655                         ret = flow_dv_validate_action_raw_encap_decap
5656                                 (dev, NULL, act->conf, attr, &sub_action_flags,
5657                                  &actions_n, action, item_flags, error);
5658                         if (ret < 0)
5659                                 return ret;
5660                         ++actions_n;
5661                         break;
5662                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5663                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5664                         ret = flow_dv_validate_action_l2_encap(dev,
5665                                                                sub_action_flags,
5666                                                                act, attr,
5667                                                                error);
5668                         if (ret < 0)
5669                                 return ret;
5670                         sub_action_flags |= MLX5_FLOW_ACTION_ENCAP;
5671                         ++actions_n;
5672                         break;
5673                 default:
5674                         return rte_flow_error_set(error, ENOTSUP,
5675                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5676                                                   NULL,
5677                                                   "Doesn't support optional "
5678                                                   "action");
5679                 }
5680         }
5681         if (attr->ingress && !attr->transfer) {
5682                 if (!(sub_action_flags & (MLX5_FLOW_ACTION_QUEUE |
5683                                           MLX5_FLOW_ACTION_RSS)))
5684                         return rte_flow_error_set(error, EINVAL,
5685                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5686                                                   NULL,
5687                                                   "Ingress must has a dest "
5688                                                   "QUEUE for Sample");
5689         } else if (attr->egress && !attr->transfer) {
5690                 return rte_flow_error_set(error, ENOTSUP,
5691                                           RTE_FLOW_ERROR_TYPE_ACTION,
5692                                           NULL,
5693                                           "Sample Only support Ingress "
5694                                           "or E-Switch");
5695         } else if (sample->actions->type != RTE_FLOW_ACTION_TYPE_END) {
5696                 MLX5_ASSERT(attr->transfer);
5697                 if (sample->ratio > 1)
5698                         return rte_flow_error_set(error, ENOTSUP,
5699                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5700                                                   NULL,
5701                                                   "E-Switch doesn't support "
5702                                                   "any optional action "
5703                                                   "for sampling");
5704                 if (sub_action_flags & MLX5_FLOW_ACTION_QUEUE)
5705                         return rte_flow_error_set(error, ENOTSUP,
5706                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5707                                                   NULL,
5708                                                   "unsupported action QUEUE");
5709                 if (sub_action_flags & MLX5_FLOW_ACTION_RSS)
5710                         return rte_flow_error_set(error, ENOTSUP,
5711                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5712                                                   NULL,
5713                                                   "unsupported action QUEUE");
5714                 if (!(sub_action_flags & MLX5_FLOW_ACTION_PORT_ID))
5715                         return rte_flow_error_set(error, EINVAL,
5716                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5717                                                   NULL,
5718                                                   "E-Switch must has a dest "
5719                                                   "port for mirroring");
5720                 if (!priv->config.hca_attr.reg_c_preserve &&
5721                      priv->representor_id != UINT16_MAX)
5722                         *fdb_mirror_limit = 1;
5723         }
5724         /* Continue validation for Xcap actions.*/
5725         if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) &&
5726             (queue_index == 0xFFFF ||
5727              mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
5728                 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5729                      MLX5_FLOW_XCAP_ACTIONS)
5730                         return rte_flow_error_set(error, ENOTSUP,
5731                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5732                                                   NULL, "encap and decap "
5733                                                   "combination aren't "
5734                                                   "supported");
5735                 if (!attr->transfer && attr->ingress && (sub_action_flags &
5736                                                         MLX5_FLOW_ACTION_ENCAP))
5737                         return rte_flow_error_set(error, ENOTSUP,
5738                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5739                                                   NULL, "encap is not supported"
5740                                                   " for ingress traffic");
5741         }
5742         return 0;
5743 }
5744
5745 /**
5746  * Find existing modify-header resource or create and register a new one.
5747  *
5748  * @param dev[in, out]
5749  *   Pointer to rte_eth_dev structure.
5750  * @param[in, out] resource
5751  *   Pointer to modify-header resource.
5752  * @parm[in, out] dev_flow
5753  *   Pointer to the dev_flow.
5754  * @param[out] error
5755  *   pointer to error structure.
5756  *
5757  * @return
5758  *   0 on success otherwise -errno and errno is set.
5759  */
5760 static int
5761 flow_dv_modify_hdr_resource_register
5762                         (struct rte_eth_dev *dev,
5763                          struct mlx5_flow_dv_modify_hdr_resource *resource,
5764                          struct mlx5_flow *dev_flow,
5765                          struct rte_flow_error *error)
5766 {
5767         struct mlx5_priv *priv = dev->data->dev_private;
5768         struct mlx5_dev_ctx_shared *sh = priv->sh;
5769         uint32_t key_len = sizeof(*resource) -
5770                            offsetof(typeof(*resource), ft_type) +
5771                            resource->actions_num * sizeof(resource->actions[0]);
5772         struct mlx5_list_entry *entry;
5773         struct mlx5_flow_cb_ctx ctx = {
5774                 .error = error,
5775                 .data = resource,
5776         };
5777         struct mlx5_hlist *modify_cmds;
5778         uint64_t key64;
5779
5780         modify_cmds = flow_dv_hlist_prepare(sh, &sh->modify_cmds,
5781                                 "hdr_modify",
5782                                 MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
5783                                 true, false, sh,
5784                                 flow_dv_modify_create_cb,
5785                                 flow_dv_modify_match_cb,
5786                                 flow_dv_modify_remove_cb,
5787                                 flow_dv_modify_clone_cb,
5788                                 flow_dv_modify_clone_free_cb);
5789         if (unlikely(!modify_cmds))
5790                 return -rte_errno;
5791         resource->root = !dev_flow->dv.group;
5792         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
5793                                                                 resource->root))
5794                 return rte_flow_error_set(error, EOVERFLOW,
5795                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5796                                           "too many modify header items");
5797         key64 = __rte_raw_cksum(&resource->ft_type, key_len, 0);
5798         entry = mlx5_hlist_register(modify_cmds, key64, &ctx);
5799         if (!entry)
5800                 return -rte_errno;
5801         resource = container_of(entry, typeof(*resource), entry);
5802         dev_flow->handle->dvh.modify_hdr = resource;
5803         return 0;
5804 }
5805
5806 /**
5807  * Get DV flow counter by index.
5808  *
5809  * @param[in] dev
5810  *   Pointer to the Ethernet device structure.
5811  * @param[in] idx
5812  *   mlx5 flow counter index in the container.
5813  * @param[out] ppool
5814  *   mlx5 flow counter pool in the container.
5815  *
5816  * @return
5817  *   Pointer to the counter, NULL otherwise.
5818  */
5819 static struct mlx5_flow_counter *
5820 flow_dv_counter_get_by_idx(struct rte_eth_dev *dev,
5821                            uint32_t idx,
5822                            struct mlx5_flow_counter_pool **ppool)
5823 {
5824         struct mlx5_priv *priv = dev->data->dev_private;
5825         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5826         struct mlx5_flow_counter_pool *pool;
5827
5828         /* Decrease to original index and clear shared bit. */
5829         idx = (idx - 1) & (MLX5_CNT_SHARED_OFFSET - 1);
5830         MLX5_ASSERT(idx / MLX5_COUNTERS_PER_POOL < cmng->n);
5831         pool = cmng->pools[idx / MLX5_COUNTERS_PER_POOL];
5832         MLX5_ASSERT(pool);
5833         if (ppool)
5834                 *ppool = pool;
5835         return MLX5_POOL_GET_CNT(pool, idx % MLX5_COUNTERS_PER_POOL);
5836 }
5837
5838 /**
5839  * Check the devx counter belongs to the pool.
5840  *
5841  * @param[in] pool
5842  *   Pointer to the counter pool.
5843  * @param[in] id
5844  *   The counter devx ID.
5845  *
5846  * @return
5847  *   True if counter belongs to the pool, false otherwise.
5848  */
5849 static bool
5850 flow_dv_is_counter_in_pool(struct mlx5_flow_counter_pool *pool, int id)
5851 {
5852         int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
5853                    MLX5_COUNTERS_PER_POOL;
5854
5855         if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
5856                 return true;
5857         return false;
5858 }
5859
5860 /**
5861  * Get a pool by devx counter ID.
5862  *
5863  * @param[in] cmng
5864  *   Pointer to the counter management.
5865  * @param[in] id
5866  *   The counter devx ID.
5867  *
5868  * @return
5869  *   The counter pool pointer if exists, NULL otherwise,
5870  */
5871 static struct mlx5_flow_counter_pool *
5872 flow_dv_find_pool_by_id(struct mlx5_flow_counter_mng *cmng, int id)
5873 {
5874         uint32_t i;
5875         struct mlx5_flow_counter_pool *pool = NULL;
5876
5877         rte_spinlock_lock(&cmng->pool_update_sl);
5878         /* Check last used pool. */
5879         if (cmng->last_pool_idx != POOL_IDX_INVALID &&
5880             flow_dv_is_counter_in_pool(cmng->pools[cmng->last_pool_idx], id)) {
5881                 pool = cmng->pools[cmng->last_pool_idx];
5882                 goto out;
5883         }
5884         /* ID out of range means no suitable pool in the container. */
5885         if (id > cmng->max_id || id < cmng->min_id)
5886                 goto out;
5887         /*
5888          * Find the pool from the end of the container, since mostly counter
5889          * ID is sequence increasing, and the last pool should be the needed
5890          * one.
5891          */
5892         i = cmng->n_valid;
5893         while (i--) {
5894                 struct mlx5_flow_counter_pool *pool_tmp = cmng->pools[i];
5895
5896                 if (flow_dv_is_counter_in_pool(pool_tmp, id)) {
5897                         pool = pool_tmp;
5898                         break;
5899                 }
5900         }
5901 out:
5902         rte_spinlock_unlock(&cmng->pool_update_sl);
5903         return pool;
5904 }
5905
5906 /**
5907  * Resize a counter container.
5908  *
5909  * @param[in] dev
5910  *   Pointer to the Ethernet device structure.
5911  *
5912  * @return
5913  *   0 on success, otherwise negative errno value and rte_errno is set.
5914  */
5915 static int
5916 flow_dv_container_resize(struct rte_eth_dev *dev)
5917 {
5918         struct mlx5_priv *priv = dev->data->dev_private;
5919         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5920         void *old_pools = cmng->pools;
5921         uint32_t resize = cmng->n + MLX5_CNT_CONTAINER_RESIZE;
5922         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
5923         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
5924
5925         if (!pools) {
5926                 rte_errno = ENOMEM;
5927                 return -ENOMEM;
5928         }
5929         if (old_pools)
5930                 memcpy(pools, old_pools, cmng->n *
5931                                        sizeof(struct mlx5_flow_counter_pool *));
5932         cmng->n = resize;
5933         cmng->pools = pools;
5934         if (old_pools)
5935                 mlx5_free(old_pools);
5936         return 0;
5937 }
5938
5939 /**
5940  * Query a devx flow counter.
5941  *
5942  * @param[in] dev
5943  *   Pointer to the Ethernet device structure.
5944  * @param[in] counter
5945  *   Index to the flow counter.
5946  * @param[out] pkts
5947  *   The statistics value of packets.
5948  * @param[out] bytes
5949  *   The statistics value of bytes.
5950  *
5951  * @return
5952  *   0 on success, otherwise a negative errno value and rte_errno is set.
5953  */
5954 static inline int
5955 _flow_dv_query_count(struct rte_eth_dev *dev, uint32_t counter, uint64_t *pkts,
5956                      uint64_t *bytes)
5957 {
5958         struct mlx5_priv *priv = dev->data->dev_private;
5959         struct mlx5_flow_counter_pool *pool = NULL;
5960         struct mlx5_flow_counter *cnt;
5961         int offset;
5962
5963         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
5964         MLX5_ASSERT(pool);
5965         if (priv->sh->cmng.counter_fallback)
5966                 return mlx5_devx_cmd_flow_counter_query(cnt->dcs_when_active, 0,
5967                                         0, pkts, bytes, 0, NULL, NULL, 0);
5968         rte_spinlock_lock(&pool->sl);
5969         if (!pool->raw) {
5970                 *pkts = 0;
5971                 *bytes = 0;
5972         } else {
5973                 offset = MLX5_CNT_ARRAY_IDX(pool, cnt);
5974                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
5975                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
5976         }
5977         rte_spinlock_unlock(&pool->sl);
5978         return 0;
5979 }
5980
5981 /**
5982  * Create and initialize a new counter pool.
5983  *
5984  * @param[in] dev
5985  *   Pointer to the Ethernet device structure.
5986  * @param[out] dcs
5987  *   The devX counter handle.
5988  * @param[in] age
5989  *   Whether the pool is for counter that was allocated for aging.
5990  * @param[in/out] cont_cur
5991  *   Pointer to the container pointer, it will be update in pool resize.
5992  *
5993  * @return
5994  *   The pool container pointer on success, NULL otherwise and rte_errno is set.
5995  */
5996 static struct mlx5_flow_counter_pool *
5997 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
5998                     uint32_t age)
5999 {
6000         struct mlx5_priv *priv = dev->data->dev_private;
6001         struct mlx5_flow_counter_pool *pool;
6002         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6003         bool fallback = priv->sh->cmng.counter_fallback;
6004         uint32_t size = sizeof(*pool);
6005
6006         size += MLX5_COUNTERS_PER_POOL * MLX5_CNT_SIZE;
6007         size += (!age ? 0 : MLX5_COUNTERS_PER_POOL * MLX5_AGE_SIZE);
6008         pool = mlx5_malloc(MLX5_MEM_ZERO, size, 0, SOCKET_ID_ANY);
6009         if (!pool) {
6010                 rte_errno = ENOMEM;
6011                 return NULL;
6012         }
6013         pool->raw = NULL;
6014         pool->is_aged = !!age;
6015         pool->query_gen = 0;
6016         pool->min_dcs = dcs;
6017         rte_spinlock_init(&pool->sl);
6018         rte_spinlock_init(&pool->csl);
6019         TAILQ_INIT(&pool->counters[0]);
6020         TAILQ_INIT(&pool->counters[1]);
6021         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
6022         rte_spinlock_lock(&cmng->pool_update_sl);
6023         pool->index = cmng->n_valid;
6024         if (pool->index == cmng->n && flow_dv_container_resize(dev)) {
6025                 mlx5_free(pool);
6026                 rte_spinlock_unlock(&cmng->pool_update_sl);
6027                 return NULL;
6028         }
6029         cmng->pools[pool->index] = pool;
6030         cmng->n_valid++;
6031         if (unlikely(fallback)) {
6032                 int base = RTE_ALIGN_FLOOR(dcs->id, MLX5_COUNTERS_PER_POOL);
6033
6034                 if (base < cmng->min_id)
6035                         cmng->min_id = base;
6036                 if (base > cmng->max_id)
6037                         cmng->max_id = base + MLX5_COUNTERS_PER_POOL - 1;
6038                 cmng->last_pool_idx = pool->index;
6039         }
6040         rte_spinlock_unlock(&cmng->pool_update_sl);
6041         return pool;
6042 }
6043
6044 /**
6045  * Prepare a new counter and/or a new counter pool.
6046  *
6047  * @param[in] dev
6048  *   Pointer to the Ethernet device structure.
6049  * @param[out] cnt_free
6050  *   Where to put the pointer of a new counter.
6051  * @param[in] age
6052  *   Whether the pool is for counter that was allocated for aging.
6053  *
6054  * @return
6055  *   The counter pool pointer and @p cnt_free is set on success,
6056  *   NULL otherwise and rte_errno is set.
6057  */
6058 static struct mlx5_flow_counter_pool *
6059 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
6060                              struct mlx5_flow_counter **cnt_free,
6061                              uint32_t age)
6062 {
6063         struct mlx5_priv *priv = dev->data->dev_private;
6064         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6065         struct mlx5_flow_counter_pool *pool;
6066         struct mlx5_counters tmp_tq;
6067         struct mlx5_devx_obj *dcs = NULL;
6068         struct mlx5_flow_counter *cnt;
6069         enum mlx5_counter_type cnt_type =
6070                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6071         bool fallback = priv->sh->cmng.counter_fallback;
6072         uint32_t i;
6073
6074         if (fallback) {
6075                 /* bulk_bitmap must be 0 for single counter allocation. */
6076                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0);
6077                 if (!dcs)
6078                         return NULL;
6079                 pool = flow_dv_find_pool_by_id(cmng, dcs->id);
6080                 if (!pool) {
6081                         pool = flow_dv_pool_create(dev, dcs, age);
6082                         if (!pool) {
6083                                 mlx5_devx_cmd_destroy(dcs);
6084                                 return NULL;
6085                         }
6086                 }
6087                 i = dcs->id % MLX5_COUNTERS_PER_POOL;
6088                 cnt = MLX5_POOL_GET_CNT(pool, i);
6089                 cnt->pool = pool;
6090                 cnt->dcs_when_free = dcs;
6091                 *cnt_free = cnt;
6092                 return pool;
6093         }
6094         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0x4);
6095         if (!dcs) {
6096                 rte_errno = ENODATA;
6097                 return NULL;
6098         }
6099         pool = flow_dv_pool_create(dev, dcs, age);
6100         if (!pool) {
6101                 mlx5_devx_cmd_destroy(dcs);
6102                 return NULL;
6103         }
6104         TAILQ_INIT(&tmp_tq);
6105         for (i = 1; i < MLX5_COUNTERS_PER_POOL; ++i) {
6106                 cnt = MLX5_POOL_GET_CNT(pool, i);
6107                 cnt->pool = pool;
6108                 TAILQ_INSERT_HEAD(&tmp_tq, cnt, next);
6109         }
6110         rte_spinlock_lock(&cmng->csl[cnt_type]);
6111         TAILQ_CONCAT(&cmng->counters[cnt_type], &tmp_tq, next);
6112         rte_spinlock_unlock(&cmng->csl[cnt_type]);
6113         *cnt_free = MLX5_POOL_GET_CNT(pool, 0);
6114         (*cnt_free)->pool = pool;
6115         return pool;
6116 }
6117
6118 /**
6119  * Allocate a flow counter.
6120  *
6121  * @param[in] dev
6122  *   Pointer to the Ethernet device structure.
6123  * @param[in] age
6124  *   Whether the counter was allocated for aging.
6125  *
6126  * @return
6127  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
6128  */
6129 static uint32_t
6130 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t age)
6131 {
6132         struct mlx5_priv *priv = dev->data->dev_private;
6133         struct mlx5_flow_counter_pool *pool = NULL;
6134         struct mlx5_flow_counter *cnt_free = NULL;
6135         bool fallback = priv->sh->cmng.counter_fallback;
6136         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6137         enum mlx5_counter_type cnt_type =
6138                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6139         uint32_t cnt_idx;
6140
6141         if (!priv->sh->devx) {
6142                 rte_errno = ENOTSUP;
6143                 return 0;
6144         }
6145         /* Get free counters from container. */
6146         rte_spinlock_lock(&cmng->csl[cnt_type]);
6147         cnt_free = TAILQ_FIRST(&cmng->counters[cnt_type]);
6148         if (cnt_free)
6149                 TAILQ_REMOVE(&cmng->counters[cnt_type], cnt_free, next);
6150         rte_spinlock_unlock(&cmng->csl[cnt_type]);
6151         if (!cnt_free && !flow_dv_counter_pool_prepare(dev, &cnt_free, age))
6152                 goto err;
6153         pool = cnt_free->pool;
6154         if (fallback)
6155                 cnt_free->dcs_when_active = cnt_free->dcs_when_free;
6156         /* Create a DV counter action only in the first time usage. */
6157         if (!cnt_free->action) {
6158                 uint16_t offset;
6159                 struct mlx5_devx_obj *dcs;
6160                 int ret;
6161
6162                 if (!fallback) {
6163                         offset = MLX5_CNT_ARRAY_IDX(pool, cnt_free);
6164                         dcs = pool->min_dcs;
6165                 } else {
6166                         offset = 0;
6167                         dcs = cnt_free->dcs_when_free;
6168                 }
6169                 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, offset,
6170                                                             &cnt_free->action);
6171                 if (ret) {
6172                         rte_errno = errno;
6173                         goto err;
6174                 }
6175         }
6176         cnt_idx = MLX5_MAKE_CNT_IDX(pool->index,
6177                                 MLX5_CNT_ARRAY_IDX(pool, cnt_free));
6178         /* Update the counter reset values. */
6179         if (_flow_dv_query_count(dev, cnt_idx, &cnt_free->hits,
6180                                  &cnt_free->bytes))
6181                 goto err;
6182         if (!fallback && !priv->sh->cmng.query_thread_on)
6183                 /* Start the asynchronous batch query by the host thread. */
6184                 mlx5_set_query_alarm(priv->sh);
6185         /*
6186          * When the count action isn't shared (by ID), shared_info field is
6187          * used for indirect action API's refcnt.
6188          * When the counter action is not shared neither by ID nor by indirect
6189          * action API, shared info must be 1.
6190          */
6191         cnt_free->shared_info.refcnt = 1;
6192         return cnt_idx;
6193 err:
6194         if (cnt_free) {
6195                 cnt_free->pool = pool;
6196                 if (fallback)
6197                         cnt_free->dcs_when_free = cnt_free->dcs_when_active;
6198                 rte_spinlock_lock(&cmng->csl[cnt_type]);
6199                 TAILQ_INSERT_TAIL(&cmng->counters[cnt_type], cnt_free, next);
6200                 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6201         }
6202         return 0;
6203 }
6204
6205 /**
6206  * Get age param from counter index.
6207  *
6208  * @param[in] dev
6209  *   Pointer to the Ethernet device structure.
6210  * @param[in] counter
6211  *   Index to the counter handler.
6212  *
6213  * @return
6214  *   The aging parameter specified for the counter index.
6215  */
6216 static struct mlx5_age_param*
6217 flow_dv_counter_idx_get_age(struct rte_eth_dev *dev,
6218                                 uint32_t counter)
6219 {
6220         struct mlx5_flow_counter *cnt;
6221         struct mlx5_flow_counter_pool *pool = NULL;
6222
6223         flow_dv_counter_get_by_idx(dev, counter, &pool);
6224         counter = (counter - 1) % MLX5_COUNTERS_PER_POOL;
6225         cnt = MLX5_POOL_GET_CNT(pool, counter);
6226         return MLX5_CNT_TO_AGE(cnt);
6227 }
6228
6229 /**
6230  * Remove a flow counter from aged counter list.
6231  *
6232  * @param[in] dev
6233  *   Pointer to the Ethernet device structure.
6234  * @param[in] counter
6235  *   Index to the counter handler.
6236  * @param[in] cnt
6237  *   Pointer to the counter handler.
6238  */
6239 static void
6240 flow_dv_counter_remove_from_age(struct rte_eth_dev *dev,
6241                                 uint32_t counter, struct mlx5_flow_counter *cnt)
6242 {
6243         struct mlx5_age_info *age_info;
6244         struct mlx5_age_param *age_param;
6245         struct mlx5_priv *priv = dev->data->dev_private;
6246         uint16_t expected = AGE_CANDIDATE;
6247
6248         age_info = GET_PORT_AGE_INFO(priv);
6249         age_param = flow_dv_counter_idx_get_age(dev, counter);
6250         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
6251                                          AGE_FREE, false, __ATOMIC_RELAXED,
6252                                          __ATOMIC_RELAXED)) {
6253                 /**
6254                  * We need the lock even it is age timeout,
6255                  * since counter may still in process.
6256                  */
6257                 rte_spinlock_lock(&age_info->aged_sl);
6258                 TAILQ_REMOVE(&age_info->aged_counters, cnt, next);
6259                 rte_spinlock_unlock(&age_info->aged_sl);
6260                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
6261         }
6262 }
6263
6264 /**
6265  * Release a flow counter.
6266  *
6267  * @param[in] dev
6268  *   Pointer to the Ethernet device structure.
6269  * @param[in] counter
6270  *   Index to the counter handler.
6271  */
6272 static void
6273 flow_dv_counter_free(struct rte_eth_dev *dev, uint32_t counter)
6274 {
6275         struct mlx5_priv *priv = dev->data->dev_private;
6276         struct mlx5_flow_counter_pool *pool = NULL;
6277         struct mlx5_flow_counter *cnt;
6278         enum mlx5_counter_type cnt_type;
6279
6280         if (!counter)
6281                 return;
6282         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
6283         MLX5_ASSERT(pool);
6284         if (pool->is_aged) {
6285                 flow_dv_counter_remove_from_age(dev, counter, cnt);
6286         } else {
6287                 /*
6288                  * If the counter action is shared by indirect action API,
6289                  * the atomic function reduces its references counter.
6290                  * If after the reduction the action is still referenced, the
6291                  * function returns here and does not release it.
6292                  * When the counter action is not shared by
6293                  * indirect action API, shared info is 1 before the reduction,
6294                  * so this condition is failed and function doesn't return here.
6295                  */
6296                 if (__atomic_sub_fetch(&cnt->shared_info.refcnt, 1,
6297                                        __ATOMIC_RELAXED))
6298                         return;
6299         }
6300         cnt->pool = pool;
6301         /*
6302          * Put the counter back to list to be updated in none fallback mode.
6303          * Currently, we are using two list alternately, while one is in query,
6304          * add the freed counter to the other list based on the pool query_gen
6305          * value. After query finishes, add counter the list to the global
6306          * container counter list. The list changes while query starts. In
6307          * this case, lock will not be needed as query callback and release
6308          * function both operate with the different list.
6309          */
6310         if (!priv->sh->cmng.counter_fallback) {
6311                 rte_spinlock_lock(&pool->csl);
6312                 TAILQ_INSERT_TAIL(&pool->counters[pool->query_gen], cnt, next);
6313                 rte_spinlock_unlock(&pool->csl);
6314         } else {
6315                 cnt->dcs_when_free = cnt->dcs_when_active;
6316                 cnt_type = pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6317                                            MLX5_COUNTER_TYPE_ORIGIN;
6318                 rte_spinlock_lock(&priv->sh->cmng.csl[cnt_type]);
6319                 TAILQ_INSERT_TAIL(&priv->sh->cmng.counters[cnt_type],
6320                                   cnt, next);
6321                 rte_spinlock_unlock(&priv->sh->cmng.csl[cnt_type]);
6322         }
6323 }
6324
6325 /**
6326  * Resize a meter id container.
6327  *
6328  * @param[in] dev
6329  *   Pointer to the Ethernet device structure.
6330  *
6331  * @return
6332  *   0 on success, otherwise negative errno value and rte_errno is set.
6333  */
6334 static int
6335 flow_dv_mtr_container_resize(struct rte_eth_dev *dev)
6336 {
6337         struct mlx5_priv *priv = dev->data->dev_private;
6338         struct mlx5_aso_mtr_pools_mng *pools_mng =
6339                                 &priv->sh->mtrmng->pools_mng;
6340         void *old_pools = pools_mng->pools;
6341         uint32_t resize = pools_mng->n + MLX5_MTRS_CONTAINER_RESIZE;
6342         uint32_t mem_size = sizeof(struct mlx5_aso_mtr_pool *) * resize;
6343         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
6344
6345         if (!pools) {
6346                 rte_errno = ENOMEM;
6347                 return -ENOMEM;
6348         }
6349         if (!pools_mng->n)
6350                 if (mlx5_aso_queue_init(priv->sh, ASO_OPC_MOD_POLICER)) {
6351                         mlx5_free(pools);
6352                         return -ENOMEM;
6353                 }
6354         if (old_pools)
6355                 memcpy(pools, old_pools, pools_mng->n *
6356                                        sizeof(struct mlx5_aso_mtr_pool *));
6357         pools_mng->n = resize;
6358         pools_mng->pools = pools;
6359         if (old_pools)
6360                 mlx5_free(old_pools);
6361         return 0;
6362 }
6363
6364 /**
6365  * Prepare a new meter and/or a new meter pool.
6366  *
6367  * @param[in] dev
6368  *   Pointer to the Ethernet device structure.
6369  * @param[out] mtr_free
6370  *   Where to put the pointer of a new meter.g.
6371  *
6372  * @return
6373  *   The meter pool pointer and @mtr_free is set on success,
6374  *   NULL otherwise and rte_errno is set.
6375  */
6376 static struct mlx5_aso_mtr_pool *
6377 flow_dv_mtr_pool_create(struct rte_eth_dev *dev, struct mlx5_aso_mtr **mtr_free)
6378 {
6379         struct mlx5_priv *priv = dev->data->dev_private;
6380         struct mlx5_aso_mtr_pools_mng *pools_mng = &priv->sh->mtrmng->pools_mng;
6381         struct mlx5_aso_mtr_pool *pool = NULL;
6382         struct mlx5_devx_obj *dcs = NULL;
6383         uint32_t i;
6384         uint32_t log_obj_size;
6385
6386         log_obj_size = rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
6387         dcs = mlx5_devx_cmd_create_flow_meter_aso_obj(priv->sh->cdev->ctx,
6388                                                       priv->sh->cdev->pdn,
6389                                                       log_obj_size);
6390         if (!dcs) {
6391                 rte_errno = ENODATA;
6392                 return NULL;
6393         }
6394         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
6395         if (!pool) {
6396                 rte_errno = ENOMEM;
6397                 claim_zero(mlx5_devx_cmd_destroy(dcs));
6398                 return NULL;
6399         }
6400         pool->devx_obj = dcs;
6401         rte_rwlock_write_lock(&pools_mng->resize_mtrwl);
6402         pool->index = pools_mng->n_valid;
6403         if (pool->index == pools_mng->n && flow_dv_mtr_container_resize(dev)) {
6404                 mlx5_free(pool);
6405                 claim_zero(mlx5_devx_cmd_destroy(dcs));
6406                 rte_rwlock_write_unlock(&pools_mng->resize_mtrwl);
6407                 return NULL;
6408         }
6409         pools_mng->pools[pool->index] = pool;
6410         pools_mng->n_valid++;
6411         rte_rwlock_write_unlock(&pools_mng->resize_mtrwl);
6412         for (i = 1; i < MLX5_ASO_MTRS_PER_POOL; ++i) {
6413                 pool->mtrs[i].offset = i;
6414                 LIST_INSERT_HEAD(&pools_mng->meters, &pool->mtrs[i], next);
6415         }
6416         pool->mtrs[0].offset = 0;
6417         *mtr_free = &pool->mtrs[0];
6418         return pool;
6419 }
6420
6421 /**
6422  * Release a flow meter into pool.
6423  *
6424  * @param[in] dev
6425  *   Pointer to the Ethernet device structure.
6426  * @param[in] mtr_idx
6427  *   Index to aso flow meter.
6428  */
6429 static void
6430 flow_dv_aso_mtr_release_to_pool(struct rte_eth_dev *dev, uint32_t mtr_idx)
6431 {
6432         struct mlx5_priv *priv = dev->data->dev_private;
6433         struct mlx5_aso_mtr_pools_mng *pools_mng =
6434                                 &priv->sh->mtrmng->pools_mng;
6435         struct mlx5_aso_mtr *aso_mtr = mlx5_aso_meter_by_idx(priv, mtr_idx);
6436
6437         MLX5_ASSERT(aso_mtr);
6438         rte_spinlock_lock(&pools_mng->mtrsl);
6439         memset(&aso_mtr->fm, 0, sizeof(struct mlx5_flow_meter_info));
6440         aso_mtr->state = ASO_METER_FREE;
6441         LIST_INSERT_HEAD(&pools_mng->meters, aso_mtr, next);
6442         rte_spinlock_unlock(&pools_mng->mtrsl);
6443 }
6444
6445 /**
6446  * Allocate a aso flow meter.
6447  *
6448  * @param[in] dev
6449  *   Pointer to the Ethernet device structure.
6450  *
6451  * @return
6452  *   Index to aso flow meter on success, 0 otherwise and rte_errno is set.
6453  */
6454 static uint32_t
6455 flow_dv_mtr_alloc(struct rte_eth_dev *dev)
6456 {
6457         struct mlx5_priv *priv = dev->data->dev_private;
6458         struct mlx5_aso_mtr *mtr_free = NULL;
6459         struct mlx5_aso_mtr_pools_mng *pools_mng =
6460                                 &priv->sh->mtrmng->pools_mng;
6461         struct mlx5_aso_mtr_pool *pool;
6462         uint32_t mtr_idx = 0;
6463
6464         if (!priv->sh->devx) {
6465                 rte_errno = ENOTSUP;
6466                 return 0;
6467         }
6468         /* Allocate the flow meter memory. */
6469         /* Get free meters from management. */
6470         rte_spinlock_lock(&pools_mng->mtrsl);
6471         mtr_free = LIST_FIRST(&pools_mng->meters);
6472         if (mtr_free)
6473                 LIST_REMOVE(mtr_free, next);
6474         if (!mtr_free && !flow_dv_mtr_pool_create(dev, &mtr_free)) {
6475                 rte_spinlock_unlock(&pools_mng->mtrsl);
6476                 return 0;
6477         }
6478         mtr_free->state = ASO_METER_WAIT;
6479         rte_spinlock_unlock(&pools_mng->mtrsl);
6480         pool = container_of(mtr_free,
6481                         struct mlx5_aso_mtr_pool,
6482                         mtrs[mtr_free->offset]);
6483         mtr_idx = MLX5_MAKE_MTR_IDX(pool->index, mtr_free->offset);
6484         if (!mtr_free->fm.meter_action) {
6485 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
6486                 struct rte_flow_error error;
6487                 uint8_t reg_id;
6488
6489                 reg_id = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &error);
6490                 mtr_free->fm.meter_action =
6491                         mlx5_glue->dv_create_flow_action_aso
6492                                                 (priv->sh->rx_domain,
6493                                                  pool->devx_obj->obj,
6494                                                  mtr_free->offset,
6495                                                  (1 << MLX5_FLOW_COLOR_GREEN),
6496                                                  reg_id - REG_C_0);
6497 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
6498                 if (!mtr_free->fm.meter_action) {
6499                         flow_dv_aso_mtr_release_to_pool(dev, mtr_idx);
6500                         return 0;
6501                 }
6502         }
6503         return mtr_idx;
6504 }
6505
6506 /**
6507  * Verify the @p attributes will be correctly understood by the NIC and store
6508  * them in the @p flow if everything is correct.
6509  *
6510  * @param[in] dev
6511  *   Pointer to dev struct.
6512  * @param[in] attributes
6513  *   Pointer to flow attributes
6514  * @param[in] external
6515  *   This flow rule is created by request external to PMD.
6516  * @param[out] error
6517  *   Pointer to error structure.
6518  *
6519  * @return
6520  *   - 0 on success and non root table.
6521  *   - 1 on success and root table.
6522  *   - a negative errno value otherwise and rte_errno is set.
6523  */
6524 static int
6525 flow_dv_validate_attributes(struct rte_eth_dev *dev,
6526                             const struct mlx5_flow_tunnel *tunnel,
6527                             const struct rte_flow_attr *attributes,
6528                             const struct flow_grp_info *grp_info,
6529                             struct rte_flow_error *error)
6530 {
6531         struct mlx5_priv *priv = dev->data->dev_private;
6532         uint32_t lowest_priority = mlx5_get_lowest_priority(dev, attributes);
6533         int ret = 0;
6534
6535 #ifndef HAVE_MLX5DV_DR
6536         RTE_SET_USED(tunnel);
6537         RTE_SET_USED(grp_info);
6538         if (attributes->group)
6539                 return rte_flow_error_set(error, ENOTSUP,
6540                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6541                                           NULL,
6542                                           "groups are not supported");
6543 #else
6544         uint32_t table = 0;
6545
6546         ret = mlx5_flow_group_to_table(dev, tunnel, attributes->group, &table,
6547                                        grp_info, error);
6548         if (ret)
6549                 return ret;
6550         if (!table)
6551                 ret = MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
6552 #endif
6553         if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
6554             attributes->priority > lowest_priority)
6555                 return rte_flow_error_set(error, ENOTSUP,
6556                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
6557                                           NULL,
6558                                           "priority out of range");
6559         if (attributes->transfer) {
6560                 if (!priv->config.dv_esw_en)
6561                         return rte_flow_error_set
6562                                 (error, ENOTSUP,
6563                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6564                                  "E-Switch dr is not supported");
6565                 if (!(priv->representor || priv->master))
6566                         return rte_flow_error_set
6567                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6568                                  NULL, "E-Switch configuration can only be"
6569                                  " done by a master or a representor device");
6570                 if (attributes->egress)
6571                         return rte_flow_error_set
6572                                 (error, ENOTSUP,
6573                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
6574                                  "egress is not supported");
6575         }
6576         if (!(attributes->egress ^ attributes->ingress))
6577                 return rte_flow_error_set(error, ENOTSUP,
6578                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
6579                                           "must specify exactly one of "
6580                                           "ingress or egress");
6581         return ret;
6582 }
6583
6584 static int
6585 validate_integrity_bits(const struct rte_flow_item_integrity *mask,
6586                         int64_t pattern_flags, uint64_t l3_flags,
6587                         uint64_t l4_flags, uint64_t ip4_flag,
6588                         struct rte_flow_error *error)
6589 {
6590         if (mask->l3_ok && !(pattern_flags & l3_flags))
6591                 return rte_flow_error_set(error, EINVAL,
6592                                           RTE_FLOW_ERROR_TYPE_ITEM,
6593                                           NULL, "missing L3 protocol");
6594
6595         if (mask->ipv4_csum_ok && !(pattern_flags & ip4_flag))
6596                 return rte_flow_error_set(error, EINVAL,
6597                                           RTE_FLOW_ERROR_TYPE_ITEM,
6598                                           NULL, "missing IPv4 protocol");
6599
6600         if ((mask->l4_ok || mask->l4_csum_ok) && !(pattern_flags & l4_flags))
6601                 return rte_flow_error_set(error, EINVAL,
6602                                           RTE_FLOW_ERROR_TYPE_ITEM,
6603                                           NULL, "missing L4 protocol");
6604
6605         return 0;
6606 }
6607
6608 static int
6609 flow_dv_validate_item_integrity_post(const struct
6610                                      rte_flow_item *integrity_items[2],
6611                                      int64_t pattern_flags,
6612                                      struct rte_flow_error *error)
6613 {
6614         const struct rte_flow_item_integrity *mask;
6615         int ret;
6616
6617         if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY) {
6618                 mask = (typeof(mask))integrity_items[0]->mask;
6619                 ret = validate_integrity_bits(mask, pattern_flags,
6620                                               MLX5_FLOW_LAYER_OUTER_L3,
6621                                               MLX5_FLOW_LAYER_OUTER_L4,
6622                                               MLX5_FLOW_LAYER_OUTER_L3_IPV4,
6623                                               error);
6624                 if (ret)
6625                         return ret;
6626         }
6627         if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY) {
6628                 mask = (typeof(mask))integrity_items[1]->mask;
6629                 ret = validate_integrity_bits(mask, pattern_flags,
6630                                               MLX5_FLOW_LAYER_INNER_L3,
6631                                               MLX5_FLOW_LAYER_INNER_L4,
6632                                               MLX5_FLOW_LAYER_INNER_L3_IPV4,
6633                                               error);
6634                 if (ret)
6635                         return ret;
6636         }
6637         return 0;
6638 }
6639
6640 static int
6641 flow_dv_validate_item_integrity(struct rte_eth_dev *dev,
6642                                 const struct rte_flow_item *integrity_item,
6643                                 uint64_t pattern_flags, uint64_t *last_item,
6644                                 const struct rte_flow_item *integrity_items[2],
6645                                 struct rte_flow_error *error)
6646 {
6647         struct mlx5_priv *priv = dev->data->dev_private;
6648         const struct rte_flow_item_integrity *mask = (typeof(mask))
6649                                                      integrity_item->mask;
6650         const struct rte_flow_item_integrity *spec = (typeof(spec))
6651                                                      integrity_item->spec;
6652
6653         if (!priv->config.hca_attr.pkt_integrity_match)
6654                 return rte_flow_error_set(error, ENOTSUP,
6655                                           RTE_FLOW_ERROR_TYPE_ITEM,
6656                                           integrity_item,
6657                                           "packet integrity integrity_item not supported");
6658         if (!spec)
6659                 return rte_flow_error_set(error, ENOTSUP,
6660                                           RTE_FLOW_ERROR_TYPE_ITEM,
6661                                           integrity_item,
6662                                           "no spec for integrity item");
6663         if (!mask)
6664                 mask = &rte_flow_item_integrity_mask;
6665         if (!mlx5_validate_integrity_item(mask))
6666                 return rte_flow_error_set(error, ENOTSUP,
6667                                           RTE_FLOW_ERROR_TYPE_ITEM,
6668                                           integrity_item,
6669                                           "unsupported integrity filter");
6670         if (spec->level > 1) {
6671                 if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY)
6672                         return rte_flow_error_set
6673                                 (error, ENOTSUP,
6674                                  RTE_FLOW_ERROR_TYPE_ITEM,
6675                                  NULL, "multiple inner integrity items not supported");
6676                 integrity_items[1] = integrity_item;
6677                 *last_item |= MLX5_FLOW_ITEM_INNER_INTEGRITY;
6678         } else {
6679                 if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY)
6680                         return rte_flow_error_set
6681                                 (error, ENOTSUP,
6682                                  RTE_FLOW_ERROR_TYPE_ITEM,
6683                                  NULL, "multiple outer integrity items not supported");
6684                 integrity_items[0] = integrity_item;
6685                 *last_item |= MLX5_FLOW_ITEM_OUTER_INTEGRITY;
6686         }
6687         return 0;
6688 }
6689
6690 /**
6691  * Internal validation function. For validating both actions and items.
6692  *
6693  * @param[in] dev
6694  *   Pointer to the rte_eth_dev structure.
6695  * @param[in] attr
6696  *   Pointer to the flow attributes.
6697  * @param[in] items
6698  *   Pointer to the list of items.
6699  * @param[in] actions
6700  *   Pointer to the list of actions.
6701  * @param[in] external
6702  *   This flow rule is created by request external to PMD.
6703  * @param[in] hairpin
6704  *   Number of hairpin TX actions, 0 means classic flow.
6705  * @param[out] error
6706  *   Pointer to the error structure.
6707  *
6708  * @return
6709  *   0 on success, a negative errno value otherwise and rte_errno is set.
6710  */
6711 static int
6712 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
6713                  const struct rte_flow_item items[],
6714                  const struct rte_flow_action actions[],
6715                  bool external, int hairpin, struct rte_flow_error *error)
6716 {
6717         int ret;
6718         uint64_t action_flags = 0;
6719         uint64_t item_flags = 0;
6720         uint64_t last_item = 0;
6721         uint8_t next_protocol = 0xff;
6722         uint16_t ether_type = 0;
6723         int actions_n = 0;
6724         uint8_t item_ipv6_proto = 0;
6725         int fdb_mirror_limit = 0;
6726         int modify_after_mirror = 0;
6727         const struct rte_flow_item *geneve_item = NULL;
6728         const struct rte_flow_item *gre_item = NULL;
6729         const struct rte_flow_item *gtp_item = NULL;
6730         const struct rte_flow_action_raw_decap *decap;
6731         const struct rte_flow_action_raw_encap *encap;
6732         const struct rte_flow_action_rss *rss = NULL;
6733         const struct rte_flow_action_rss *sample_rss = NULL;
6734         const struct rte_flow_action_count *sample_count = NULL;
6735         const struct rte_flow_item_tcp nic_tcp_mask = {
6736                 .hdr = {
6737                         .tcp_flags = 0xFF,
6738                         .src_port = RTE_BE16(UINT16_MAX),
6739                         .dst_port = RTE_BE16(UINT16_MAX),
6740                 }
6741         };
6742         const struct rte_flow_item_ipv6 nic_ipv6_mask = {
6743                 .hdr = {
6744                         .src_addr =
6745                         "\xff\xff\xff\xff\xff\xff\xff\xff"
6746                         "\xff\xff\xff\xff\xff\xff\xff\xff",
6747                         .dst_addr =
6748                         "\xff\xff\xff\xff\xff\xff\xff\xff"
6749                         "\xff\xff\xff\xff\xff\xff\xff\xff",
6750                         .vtc_flow = RTE_BE32(0xffffffff),
6751                         .proto = 0xff,
6752                         .hop_limits = 0xff,
6753                 },
6754                 .has_frag_ext = 1,
6755         };
6756         const struct rte_flow_item_ecpri nic_ecpri_mask = {
6757                 .hdr = {
6758                         .common = {
6759                                 .u32 =
6760                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
6761                                         .type = 0xFF,
6762                                         }).u32),
6763                         },
6764                         .dummy[0] = 0xffffffff,
6765                 },
6766         };
6767         struct mlx5_priv *priv = dev->data->dev_private;
6768         struct mlx5_dev_config *dev_conf = &priv->config;
6769         uint16_t queue_index = 0xFFFF;
6770         const struct rte_flow_item_vlan *vlan_m = NULL;
6771         uint32_t rw_act_num = 0;
6772         uint64_t is_root;
6773         const struct mlx5_flow_tunnel *tunnel;
6774         enum mlx5_tof_rule_type tof_rule_type;
6775         struct flow_grp_info grp_info = {
6776                 .external = !!external,
6777                 .transfer = !!attr->transfer,
6778                 .fdb_def_rule = !!priv->fdb_def_rule,
6779                 .std_tbl_fix = true,
6780         };
6781         const struct rte_eth_hairpin_conf *conf;
6782         const struct rte_flow_item *integrity_items[2] = {NULL, NULL};
6783         const struct rte_flow_item *port_id_item = NULL;
6784         bool def_policy = false;
6785         uint16_t udp_dport = 0;
6786
6787         if (items == NULL)
6788                 return -1;
6789         tunnel = is_tunnel_offload_active(dev) ?
6790                  mlx5_get_tof(items, actions, &tof_rule_type) : NULL;
6791         if (tunnel) {
6792                 if (priv->representor)
6793                         return rte_flow_error_set
6794                                 (error, ENOTSUP,
6795                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6796                                  NULL, "decap not supported for VF representor");
6797                 if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_SET_RULE)
6798                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
6799                 else if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_MATCH_RULE)
6800                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_MATCH |
6801                                         MLX5_FLOW_ACTION_DECAP;
6802                 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
6803                                         (dev, attr, tunnel, tof_rule_type);
6804         }
6805         ret = flow_dv_validate_attributes(dev, tunnel, attr, &grp_info, error);
6806         if (ret < 0)
6807                 return ret;
6808         is_root = (uint64_t)ret;
6809         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
6810                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
6811                 int type = items->type;
6812
6813                 if (!mlx5_flow_os_item_supported(type))
6814                         return rte_flow_error_set(error, ENOTSUP,
6815                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6816                                                   NULL, "item not supported");
6817                 switch (type) {
6818                 case RTE_FLOW_ITEM_TYPE_VOID:
6819                         break;
6820                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
6821                         ret = flow_dv_validate_item_port_id
6822                                         (dev, items, attr, item_flags, error);
6823                         if (ret < 0)
6824                                 return ret;
6825                         last_item = MLX5_FLOW_ITEM_PORT_ID;
6826                         port_id_item = items;
6827                         break;
6828                 case RTE_FLOW_ITEM_TYPE_ETH:
6829                         ret = mlx5_flow_validate_item_eth(items, item_flags,
6830                                                           true, error);
6831                         if (ret < 0)
6832                                 return ret;
6833                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
6834                                              MLX5_FLOW_LAYER_OUTER_L2;
6835                         if (items->mask != NULL && items->spec != NULL) {
6836                                 ether_type =
6837                                         ((const struct rte_flow_item_eth *)
6838                                          items->spec)->type;
6839                                 ether_type &=
6840                                         ((const struct rte_flow_item_eth *)
6841                                          items->mask)->type;
6842                                 ether_type = rte_be_to_cpu_16(ether_type);
6843                         } else {
6844                                 ether_type = 0;
6845                         }
6846                         break;
6847                 case RTE_FLOW_ITEM_TYPE_VLAN:
6848                         ret = flow_dv_validate_item_vlan(items, item_flags,
6849                                                          dev, error);
6850                         if (ret < 0)
6851                                 return ret;
6852                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
6853                                              MLX5_FLOW_LAYER_OUTER_VLAN;
6854                         if (items->mask != NULL && items->spec != NULL) {
6855                                 ether_type =
6856                                         ((const struct rte_flow_item_vlan *)
6857                                          items->spec)->inner_type;
6858                                 ether_type &=
6859                                         ((const struct rte_flow_item_vlan *)
6860                                          items->mask)->inner_type;
6861                                 ether_type = rte_be_to_cpu_16(ether_type);
6862                         } else {
6863                                 ether_type = 0;
6864                         }
6865                         /* Store outer VLAN mask for of_push_vlan action. */
6866                         if (!tunnel)
6867                                 vlan_m = items->mask;
6868                         break;
6869                 case RTE_FLOW_ITEM_TYPE_IPV4:
6870                         mlx5_flow_tunnel_ip_check(items, next_protocol,
6871                                                   &item_flags, &tunnel);
6872                         ret = flow_dv_validate_item_ipv4(dev, items, item_flags,
6873                                                          last_item, ether_type,
6874                                                          error);
6875                         if (ret < 0)
6876                                 return ret;
6877                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
6878                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
6879                         if (items->mask != NULL &&
6880                             ((const struct rte_flow_item_ipv4 *)
6881                              items->mask)->hdr.next_proto_id) {
6882                                 next_protocol =
6883                                         ((const struct rte_flow_item_ipv4 *)
6884                                          (items->spec))->hdr.next_proto_id;
6885                                 next_protocol &=
6886                                         ((const struct rte_flow_item_ipv4 *)
6887                                          (items->mask))->hdr.next_proto_id;
6888                         } else {
6889                                 /* Reset for inner layer. */
6890                                 next_protocol = 0xff;
6891                         }
6892                         break;
6893                 case RTE_FLOW_ITEM_TYPE_IPV6:
6894                         mlx5_flow_tunnel_ip_check(items, next_protocol,
6895                                                   &item_flags, &tunnel);
6896                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
6897                                                            last_item,
6898                                                            ether_type,
6899                                                            &nic_ipv6_mask,
6900                                                            error);
6901                         if (ret < 0)
6902                                 return ret;
6903                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
6904                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
6905                         if (items->mask != NULL &&
6906                             ((const struct rte_flow_item_ipv6 *)
6907                              items->mask)->hdr.proto) {
6908                                 item_ipv6_proto =
6909                                         ((const struct rte_flow_item_ipv6 *)
6910                                          items->spec)->hdr.proto;
6911                                 next_protocol =
6912                                         ((const struct rte_flow_item_ipv6 *)
6913                                          items->spec)->hdr.proto;
6914                                 next_protocol &=
6915                                         ((const struct rte_flow_item_ipv6 *)
6916                                          items->mask)->hdr.proto;
6917                         } else {
6918                                 /* Reset for inner layer. */
6919                                 next_protocol = 0xff;
6920                         }
6921                         break;
6922                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
6923                         ret = flow_dv_validate_item_ipv6_frag_ext(items,
6924                                                                   item_flags,
6925                                                                   error);
6926                         if (ret < 0)
6927                                 return ret;
6928                         last_item = tunnel ?
6929                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
6930                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
6931                         if (items->mask != NULL &&
6932                             ((const struct rte_flow_item_ipv6_frag_ext *)
6933                              items->mask)->hdr.next_header) {
6934                                 next_protocol =
6935                                 ((const struct rte_flow_item_ipv6_frag_ext *)
6936                                  items->spec)->hdr.next_header;
6937                                 next_protocol &=
6938                                 ((const struct rte_flow_item_ipv6_frag_ext *)
6939                                  items->mask)->hdr.next_header;
6940                         } else {
6941                                 /* Reset for inner layer. */
6942                                 next_protocol = 0xff;
6943                         }
6944                         break;
6945                 case RTE_FLOW_ITEM_TYPE_TCP:
6946                         ret = mlx5_flow_validate_item_tcp
6947                                                 (items, item_flags,
6948                                                  next_protocol,
6949                                                  &nic_tcp_mask,
6950                                                  error);
6951                         if (ret < 0)
6952                                 return ret;
6953                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
6954                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
6955                         break;
6956                 case RTE_FLOW_ITEM_TYPE_UDP:
6957                         ret = mlx5_flow_validate_item_udp(items, item_flags,
6958                                                           next_protocol,
6959                                                           error);
6960                         const struct rte_flow_item_udp *spec = items->spec;
6961                         const struct rte_flow_item_udp *mask = items->mask;
6962                         if (!mask)
6963                                 mask = &rte_flow_item_udp_mask;
6964                         if (spec != NULL)
6965                                 udp_dport = rte_be_to_cpu_16
6966                                                 (spec->hdr.dst_port &
6967                                                  mask->hdr.dst_port);
6968                         if (ret < 0)
6969                                 return ret;
6970                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
6971                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
6972                         break;
6973                 case RTE_FLOW_ITEM_TYPE_GRE:
6974                         ret = mlx5_flow_validate_item_gre(items, item_flags,
6975                                                           next_protocol, error);
6976                         if (ret < 0)
6977                                 return ret;
6978                         gre_item = items;
6979                         last_item = MLX5_FLOW_LAYER_GRE;
6980                         break;
6981                 case RTE_FLOW_ITEM_TYPE_NVGRE:
6982                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
6983                                                             next_protocol,
6984                                                             error);
6985                         if (ret < 0)
6986                                 return ret;
6987                         last_item = MLX5_FLOW_LAYER_NVGRE;
6988                         break;
6989                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
6990                         ret = mlx5_flow_validate_item_gre_key
6991                                 (items, item_flags, gre_item, error);
6992                         if (ret < 0)
6993                                 return ret;
6994                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
6995                         break;
6996                 case RTE_FLOW_ITEM_TYPE_VXLAN:
6997                         ret = mlx5_flow_validate_item_vxlan(dev, udp_dport,
6998                                                             items, item_flags,
6999                                                             attr, error);
7000                         if (ret < 0)
7001                                 return ret;
7002                         last_item = MLX5_FLOW_LAYER_VXLAN;
7003                         break;
7004                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7005                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
7006                                                                 item_flags, dev,
7007                                                                 error);
7008                         if (ret < 0)
7009                                 return ret;
7010                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7011                         break;
7012                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7013                         ret = mlx5_flow_validate_item_geneve(items,
7014                                                              item_flags, dev,
7015                                                              error);
7016                         if (ret < 0)
7017                                 return ret;
7018                         geneve_item = items;
7019                         last_item = MLX5_FLOW_LAYER_GENEVE;
7020                         break;
7021                 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
7022                         ret = mlx5_flow_validate_item_geneve_opt(items,
7023                                                                  last_item,
7024                                                                  geneve_item,
7025                                                                  dev,
7026                                                                  error);
7027                         if (ret < 0)
7028                                 return ret;
7029                         last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
7030                         break;
7031                 case RTE_FLOW_ITEM_TYPE_MPLS:
7032                         ret = mlx5_flow_validate_item_mpls(dev, items,
7033                                                            item_flags,
7034                                                            last_item, error);
7035                         if (ret < 0)
7036                                 return ret;
7037                         last_item = MLX5_FLOW_LAYER_MPLS;
7038                         break;
7039
7040                 case RTE_FLOW_ITEM_TYPE_MARK:
7041                         ret = flow_dv_validate_item_mark(dev, items, attr,
7042                                                          error);
7043                         if (ret < 0)
7044                                 return ret;
7045                         last_item = MLX5_FLOW_ITEM_MARK;
7046                         break;
7047                 case RTE_FLOW_ITEM_TYPE_META:
7048                         ret = flow_dv_validate_item_meta(dev, items, attr,
7049                                                          error);
7050                         if (ret < 0)
7051                                 return ret;
7052                         last_item = MLX5_FLOW_ITEM_METADATA;
7053                         break;
7054                 case RTE_FLOW_ITEM_TYPE_ICMP:
7055                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
7056                                                            next_protocol,
7057                                                            error);
7058                         if (ret < 0)
7059                                 return ret;
7060                         last_item = MLX5_FLOW_LAYER_ICMP;
7061                         break;
7062                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7063                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
7064                                                             next_protocol,
7065                                                             error);
7066                         if (ret < 0)
7067                                 return ret;
7068                         item_ipv6_proto = IPPROTO_ICMPV6;
7069                         last_item = MLX5_FLOW_LAYER_ICMP6;
7070                         break;
7071                 case RTE_FLOW_ITEM_TYPE_TAG:
7072                         ret = flow_dv_validate_item_tag(dev, items,
7073                                                         attr, error);
7074                         if (ret < 0)
7075                                 return ret;
7076                         last_item = MLX5_FLOW_ITEM_TAG;
7077                         break;
7078                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7079                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7080                         break;
7081                 case RTE_FLOW_ITEM_TYPE_GTP:
7082                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
7083                                                         error);
7084                         if (ret < 0)
7085                                 return ret;
7086                         gtp_item = items;
7087                         last_item = MLX5_FLOW_LAYER_GTP;
7088                         break;
7089                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
7090                         ret = flow_dv_validate_item_gtp_psc(items, last_item,
7091                                                             gtp_item, attr,
7092                                                             error);
7093                         if (ret < 0)
7094                                 return ret;
7095                         last_item = MLX5_FLOW_LAYER_GTP_PSC;
7096                         break;
7097                 case RTE_FLOW_ITEM_TYPE_ECPRI:
7098                         /* Capacity will be checked in the translate stage. */
7099                         ret = mlx5_flow_validate_item_ecpri(items, item_flags,
7100                                                             last_item,
7101                                                             ether_type,
7102                                                             &nic_ecpri_mask,
7103                                                             error);
7104                         if (ret < 0)
7105                                 return ret;
7106                         last_item = MLX5_FLOW_LAYER_ECPRI;
7107                         break;
7108                 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
7109                         ret = flow_dv_validate_item_integrity(dev, items,
7110                                                               item_flags,
7111                                                               &last_item,
7112                                                               integrity_items,
7113                                                               error);
7114                         if (ret < 0)
7115                                 return ret;
7116                         break;
7117                 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
7118                         ret = flow_dv_validate_item_aso_ct(dev, items,
7119                                                            &item_flags, error);
7120                         if (ret < 0)
7121                                 return ret;
7122                         break;
7123                 case MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL:
7124                         /* tunnel offload item was processed before
7125                          * list it here as a supported type
7126                          */
7127                         break;
7128                 default:
7129                         return rte_flow_error_set(error, ENOTSUP,
7130                                                   RTE_FLOW_ERROR_TYPE_ITEM,
7131                                                   NULL, "item not supported");
7132                 }
7133                 item_flags |= last_item;
7134         }
7135         if (item_flags & MLX5_FLOW_ITEM_INTEGRITY) {
7136                 ret = flow_dv_validate_item_integrity_post(integrity_items,
7137                                                            item_flags, error);
7138                 if (ret)
7139                         return ret;
7140         }
7141         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
7142                 int type = actions->type;
7143                 bool shared_count = false;
7144
7145                 if (!mlx5_flow_os_action_supported(type))
7146                         return rte_flow_error_set(error, ENOTSUP,
7147                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7148                                                   actions,
7149                                                   "action not supported");
7150                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
7151                         return rte_flow_error_set(error, ENOTSUP,
7152                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7153                                                   actions, "too many actions");
7154                 if (action_flags &
7155                         MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
7156                         return rte_flow_error_set(error, ENOTSUP,
7157                                 RTE_FLOW_ERROR_TYPE_ACTION,
7158                                 NULL, "meter action with policy "
7159                                 "must be the last action");
7160                 switch (type) {
7161                 case RTE_FLOW_ACTION_TYPE_VOID:
7162                         break;
7163                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7164                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
7165                         ret = flow_dv_validate_action_port_id(dev,
7166                                                               action_flags,
7167                                                               actions,
7168                                                               attr,
7169                                                               error);
7170                         if (ret)
7171                                 return ret;
7172                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7173                         ++actions_n;
7174                         break;
7175                 case RTE_FLOW_ACTION_TYPE_FLAG:
7176                         ret = flow_dv_validate_action_flag(dev, action_flags,
7177                                                            attr, error);
7178                         if (ret < 0)
7179                                 return ret;
7180                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7181                                 /* Count all modify-header actions as one. */
7182                                 if (!(action_flags &
7183                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
7184                                         ++actions_n;
7185                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
7186                                                 MLX5_FLOW_ACTION_MARK_EXT;
7187                                 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7188                                         modify_after_mirror = 1;
7189
7190                         } else {
7191                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
7192                                 ++actions_n;
7193                         }
7194                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
7195                         break;
7196                 case RTE_FLOW_ACTION_TYPE_MARK:
7197                         ret = flow_dv_validate_action_mark(dev, actions,
7198                                                            action_flags,
7199                                                            attr, error);
7200                         if (ret < 0)
7201                                 return ret;
7202                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7203                                 /* Count all modify-header actions as one. */
7204                                 if (!(action_flags &
7205                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
7206                                         ++actions_n;
7207                                 action_flags |= MLX5_FLOW_ACTION_MARK |
7208                                                 MLX5_FLOW_ACTION_MARK_EXT;
7209                                 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7210                                         modify_after_mirror = 1;
7211                         } else {
7212                                 action_flags |= MLX5_FLOW_ACTION_MARK;
7213                                 ++actions_n;
7214                         }
7215                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
7216                         break;
7217                 case RTE_FLOW_ACTION_TYPE_SET_META:
7218                         ret = flow_dv_validate_action_set_meta(dev, actions,
7219                                                                action_flags,
7220                                                                attr, error);
7221                         if (ret < 0)
7222                                 return ret;
7223                         /* Count all modify-header actions as one action. */
7224                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7225                                 ++actions_n;
7226                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7227                                 modify_after_mirror = 1;
7228                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7229                         rw_act_num += MLX5_ACT_NUM_SET_META;
7230                         break;
7231                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7232                         ret = flow_dv_validate_action_set_tag(dev, actions,
7233                                                               action_flags,
7234                                                               attr, error);
7235                         if (ret < 0)
7236                                 return ret;
7237                         /* Count all modify-header actions as one action. */
7238                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7239                                 ++actions_n;
7240                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7241                                 modify_after_mirror = 1;
7242                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7243                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7244                         break;
7245                 case RTE_FLOW_ACTION_TYPE_DROP:
7246                         ret = mlx5_flow_validate_action_drop(action_flags,
7247                                                              attr, error);
7248                         if (ret < 0)
7249                                 return ret;
7250                         action_flags |= MLX5_FLOW_ACTION_DROP;
7251                         ++actions_n;
7252                         break;
7253                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7254                         ret = mlx5_flow_validate_action_queue(actions,
7255                                                               action_flags, dev,
7256                                                               attr, error);
7257                         if (ret < 0)
7258                                 return ret;
7259                         queue_index = ((const struct rte_flow_action_queue *)
7260                                                         (actions->conf))->index;
7261                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7262                         ++actions_n;
7263                         break;
7264                 case RTE_FLOW_ACTION_TYPE_RSS:
7265                         rss = actions->conf;
7266                         ret = mlx5_flow_validate_action_rss(actions,
7267                                                             action_flags, dev,
7268                                                             attr, item_flags,
7269                                                             error);
7270                         if (ret < 0)
7271                                 return ret;
7272                         if (rss && sample_rss &&
7273                             (sample_rss->level != rss->level ||
7274                             sample_rss->types != rss->types))
7275                                 return rte_flow_error_set(error, ENOTSUP,
7276                                         RTE_FLOW_ERROR_TYPE_ACTION,
7277                                         NULL,
7278                                         "Can't use the different RSS types "
7279                                         "or level in the same flow");
7280                         if (rss != NULL && rss->queue_num)
7281                                 queue_index = rss->queue[0];
7282                         action_flags |= MLX5_FLOW_ACTION_RSS;
7283                         ++actions_n;
7284                         break;
7285                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
7286                         ret =
7287                         mlx5_flow_validate_action_default_miss(action_flags,
7288                                         attr, error);
7289                         if (ret < 0)
7290                                 return ret;
7291                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
7292                         ++actions_n;
7293                         break;
7294                 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
7295                         shared_count = true;
7296                         /* fall-through. */
7297                 case RTE_FLOW_ACTION_TYPE_COUNT:
7298                         ret = flow_dv_validate_action_count(dev, shared_count,
7299                                                             action_flags,
7300                                                             error);
7301                         if (ret < 0)
7302                                 return ret;
7303                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7304                         ++actions_n;
7305                         break;
7306                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7307                         if (flow_dv_validate_action_pop_vlan(dev,
7308                                                              action_flags,
7309                                                              actions,
7310                                                              item_flags, attr,
7311                                                              error))
7312                                 return -rte_errno;
7313                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7314                                 modify_after_mirror = 1;
7315                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7316                         ++actions_n;
7317                         break;
7318                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7319                         ret = flow_dv_validate_action_push_vlan(dev,
7320                                                                 action_flags,
7321                                                                 vlan_m,
7322                                                                 actions, attr,
7323                                                                 error);
7324                         if (ret < 0)
7325                                 return ret;
7326                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7327                                 modify_after_mirror = 1;
7328                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7329                         ++actions_n;
7330                         break;
7331                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7332                         ret = flow_dv_validate_action_set_vlan_pcp
7333                                                 (action_flags, actions, error);
7334                         if (ret < 0)
7335                                 return ret;
7336                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7337                                 modify_after_mirror = 1;
7338                         /* Count PCP with push_vlan command. */
7339                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
7340                         break;
7341                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7342                         ret = flow_dv_validate_action_set_vlan_vid
7343                                                 (item_flags, action_flags,
7344                                                  actions, error);
7345                         if (ret < 0)
7346                                 return ret;
7347                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7348                                 modify_after_mirror = 1;
7349                         /* Count VID with push_vlan command. */
7350                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7351                         rw_act_num += MLX5_ACT_NUM_MDF_VID;
7352                         break;
7353                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7354                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7355                         ret = flow_dv_validate_action_l2_encap(dev,
7356                                                                action_flags,
7357                                                                actions, attr,
7358                                                                error);
7359                         if (ret < 0)
7360                                 return ret;
7361                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
7362                         ++actions_n;
7363                         break;
7364                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7365                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7366                         ret = flow_dv_validate_action_decap(dev, action_flags,
7367                                                             actions, item_flags,
7368                                                             attr, error);
7369                         if (ret < 0)
7370                                 return ret;
7371                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7372                                 modify_after_mirror = 1;
7373                         action_flags |= MLX5_FLOW_ACTION_DECAP;
7374                         ++actions_n;
7375                         break;
7376                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7377                         ret = flow_dv_validate_action_raw_encap_decap
7378                                 (dev, NULL, actions->conf, attr, &action_flags,
7379                                  &actions_n, actions, item_flags, error);
7380                         if (ret < 0)
7381                                 return ret;
7382                         break;
7383                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7384                         decap = actions->conf;
7385                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
7386                                 ;
7387                         if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7388                                 encap = NULL;
7389                                 actions--;
7390                         } else {
7391                                 encap = actions->conf;
7392                         }
7393                         ret = flow_dv_validate_action_raw_encap_decap
7394                                            (dev,
7395                                             decap ? decap : &empty_decap, encap,
7396                                             attr, &action_flags, &actions_n,
7397                                             actions, item_flags, error);
7398                         if (ret < 0)
7399                                 return ret;
7400                         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7401                             (action_flags & MLX5_FLOW_ACTION_DECAP))
7402                                 modify_after_mirror = 1;
7403                         break;
7404                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7405                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7406                         ret = flow_dv_validate_action_modify_mac(action_flags,
7407                                                                  actions,
7408                                                                  item_flags,
7409                                                                  error);
7410                         if (ret < 0)
7411                                 return ret;
7412                         /* Count all modify-header actions as one action. */
7413                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7414                                 ++actions_n;
7415                         action_flags |= actions->type ==
7416                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7417                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
7418                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
7419                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7420                                 modify_after_mirror = 1;
7421                         /*
7422                          * Even if the source and destination MAC addresses have
7423                          * overlap in the header with 4B alignment, the convert
7424                          * function will handle them separately and 4 SW actions
7425                          * will be created. And 2 actions will be added each
7426                          * time no matter how many bytes of address will be set.
7427                          */
7428                         rw_act_num += MLX5_ACT_NUM_MDF_MAC;
7429                         break;
7430                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7431                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7432                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
7433                                                                   actions,
7434                                                                   item_flags,
7435                                                                   error);
7436                         if (ret < 0)
7437                                 return ret;
7438                         /* Count all modify-header actions as one action. */
7439                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7440                                 ++actions_n;
7441                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7442                                 modify_after_mirror = 1;
7443                         action_flags |= actions->type ==
7444                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7445                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
7446                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
7447                         rw_act_num += MLX5_ACT_NUM_MDF_IPV4;
7448                         break;
7449                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7450                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7451                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
7452                                                                   actions,
7453                                                                   item_flags,
7454                                                                   error);
7455                         if (ret < 0)
7456                                 return ret;
7457                         if (item_ipv6_proto == IPPROTO_ICMPV6)
7458                                 return rte_flow_error_set(error, ENOTSUP,
7459                                         RTE_FLOW_ERROR_TYPE_ACTION,
7460                                         actions,
7461                                         "Can't change header "
7462                                         "with ICMPv6 proto");
7463                         /* Count all modify-header actions as one action. */
7464                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7465                                 ++actions_n;
7466                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7467                                 modify_after_mirror = 1;
7468                         action_flags |= actions->type ==
7469                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7470                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
7471                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
7472                         rw_act_num += MLX5_ACT_NUM_MDF_IPV6;
7473                         break;
7474                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7475                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7476                         ret = flow_dv_validate_action_modify_tp(action_flags,
7477                                                                 actions,
7478                                                                 item_flags,
7479                                                                 error);
7480                         if (ret < 0)
7481                                 return ret;
7482                         /* Count all modify-header actions as one action. */
7483                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7484                                 ++actions_n;
7485                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7486                                 modify_after_mirror = 1;
7487                         action_flags |= actions->type ==
7488                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7489                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
7490                                                 MLX5_FLOW_ACTION_SET_TP_DST;
7491                         rw_act_num += MLX5_ACT_NUM_MDF_PORT;
7492                         break;
7493                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7494                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7495                         ret = flow_dv_validate_action_modify_ttl(action_flags,
7496                                                                  actions,
7497                                                                  item_flags,
7498                                                                  error);
7499                         if (ret < 0)
7500                                 return ret;
7501                         /* Count all modify-header actions as one action. */
7502                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7503                                 ++actions_n;
7504                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7505                                 modify_after_mirror = 1;
7506                         action_flags |= actions->type ==
7507                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
7508                                                 MLX5_FLOW_ACTION_SET_TTL :
7509                                                 MLX5_FLOW_ACTION_DEC_TTL;
7510                         rw_act_num += MLX5_ACT_NUM_MDF_TTL;
7511                         break;
7512                 case RTE_FLOW_ACTION_TYPE_JUMP:
7513                         ret = flow_dv_validate_action_jump(dev, tunnel, actions,
7514                                                            action_flags,
7515                                                            attr, external,
7516                                                            error);
7517                         if (ret)
7518                                 return ret;
7519                         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7520                             fdb_mirror_limit)
7521                                 return rte_flow_error_set(error, EINVAL,
7522                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7523                                                   NULL,
7524                                                   "sample and jump action combination is not supported");
7525                         ++actions_n;
7526                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7527                         break;
7528                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7529                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7530                         ret = flow_dv_validate_action_modify_tcp_seq
7531                                                                 (action_flags,
7532                                                                  actions,
7533                                                                  item_flags,
7534                                                                  error);
7535                         if (ret < 0)
7536                                 return ret;
7537                         /* Count all modify-header actions as one action. */
7538                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7539                                 ++actions_n;
7540                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7541                                 modify_after_mirror = 1;
7542                         action_flags |= actions->type ==
7543                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7544                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
7545                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7546                         rw_act_num += MLX5_ACT_NUM_MDF_TCPSEQ;
7547                         break;
7548                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7549                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7550                         ret = flow_dv_validate_action_modify_tcp_ack
7551                                                                 (action_flags,
7552                                                                  actions,
7553                                                                  item_flags,
7554                                                                  error);
7555                         if (ret < 0)
7556                                 return ret;
7557                         /* Count all modify-header actions as one action. */
7558                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7559                                 ++actions_n;
7560                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7561                                 modify_after_mirror = 1;
7562                         action_flags |= actions->type ==
7563                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7564                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
7565                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
7566                         rw_act_num += MLX5_ACT_NUM_MDF_TCPACK;
7567                         break;
7568                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7569                         break;
7570                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7571                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7572                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7573                         break;
7574                 case RTE_FLOW_ACTION_TYPE_METER:
7575                         ret = mlx5_flow_validate_action_meter(dev,
7576                                                               action_flags,
7577                                                               actions, attr,
7578                                                               port_id_item,
7579                                                               &def_policy,
7580                                                               error);
7581                         if (ret < 0)
7582                                 return ret;
7583                         action_flags |= MLX5_FLOW_ACTION_METER;
7584                         if (!def_policy)
7585                                 action_flags |=
7586                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
7587                         ++actions_n;
7588                         /* Meter action will add one more TAG action. */
7589                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7590                         break;
7591                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
7592                         if (!attr->transfer && !attr->group)
7593                                 return rte_flow_error_set(error, ENOTSUP,
7594                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7595                                                                            NULL,
7596                           "Shared ASO age action is not supported for group 0");
7597                         if (action_flags & MLX5_FLOW_ACTION_AGE)
7598                                 return rte_flow_error_set
7599                                                   (error, EINVAL,
7600                                                    RTE_FLOW_ERROR_TYPE_ACTION,
7601                                                    NULL,
7602                                                    "duplicate age actions set");
7603                         action_flags |= MLX5_FLOW_ACTION_AGE;
7604                         ++actions_n;
7605                         break;
7606                 case RTE_FLOW_ACTION_TYPE_AGE:
7607                         ret = flow_dv_validate_action_age(action_flags,
7608                                                           actions, dev,
7609                                                           error);
7610                         if (ret < 0)
7611                                 return ret;
7612                         /*
7613                          * Validate the regular AGE action (using counter)
7614                          * mutual exclusion with share counter actions.
7615                          */
7616                         if (!priv->sh->flow_hit_aso_en) {
7617                                 if (shared_count)
7618                                         return rte_flow_error_set
7619                                                 (error, EINVAL,
7620                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7621                                                 NULL,
7622                                                 "old age and shared count combination is not supported");
7623                                 if (sample_count)
7624                                         return rte_flow_error_set
7625                                                 (error, EINVAL,
7626                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7627                                                 NULL,
7628                                                 "old age action and count must be in the same sub flow");
7629                         }
7630                         action_flags |= MLX5_FLOW_ACTION_AGE;
7631                         ++actions_n;
7632                         break;
7633                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7634                         ret = flow_dv_validate_action_modify_ipv4_dscp
7635                                                          (action_flags,
7636                                                           actions,
7637                                                           item_flags,
7638                                                           error);
7639                         if (ret < 0)
7640                                 return ret;
7641                         /* Count all modify-header actions as one action. */
7642                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7643                                 ++actions_n;
7644                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7645                                 modify_after_mirror = 1;
7646                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7647                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7648                         break;
7649                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7650                         ret = flow_dv_validate_action_modify_ipv6_dscp
7651                                                                 (action_flags,
7652                                                                  actions,
7653                                                                  item_flags,
7654                                                                  error);
7655                         if (ret < 0)
7656                                 return ret;
7657                         /* Count all modify-header actions as one action. */
7658                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7659                                 ++actions_n;
7660                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7661                                 modify_after_mirror = 1;
7662                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7663                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7664                         break;
7665                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
7666                         ret = flow_dv_validate_action_sample(&action_flags,
7667                                                              actions, dev,
7668                                                              attr, item_flags,
7669                                                              rss, &sample_rss,
7670                                                              &sample_count,
7671                                                              &fdb_mirror_limit,
7672                                                              error);
7673                         if (ret < 0)
7674                                 return ret;
7675                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
7676                         ++actions_n;
7677                         break;
7678                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
7679                         ret = flow_dv_validate_action_modify_field(dev,
7680                                                                    action_flags,
7681                                                                    actions,
7682                                                                    attr,
7683                                                                    error);
7684                         if (ret < 0)
7685                                 return ret;
7686                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7687                                 modify_after_mirror = 1;
7688                         /* Count all modify-header actions as one action. */
7689                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7690                                 ++actions_n;
7691                         action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
7692                         rw_act_num += ret;
7693                         break;
7694                 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
7695                         ret = flow_dv_validate_action_aso_ct(dev, action_flags,
7696                                                              item_flags, attr,
7697                                                              error);
7698                         if (ret < 0)
7699                                 return ret;
7700                         action_flags |= MLX5_FLOW_ACTION_CT;
7701                         break;
7702                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
7703                         /* tunnel offload action was processed before
7704                          * list it here as a supported type
7705                          */
7706                         break;
7707                 default:
7708                         return rte_flow_error_set(error, ENOTSUP,
7709                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7710                                                   actions,
7711                                                   "action not supported");
7712                 }
7713         }
7714         /*
7715          * Validate actions in flow rules
7716          * - Explicit decap action is prohibited by the tunnel offload API.
7717          * - Drop action in tunnel steer rule is prohibited by the API.
7718          * - Application cannot use MARK action because it's value can mask
7719          *   tunnel default miss nitification.
7720          * - JUMP in tunnel match rule has no support in current PMD
7721          *   implementation.
7722          * - TAG & META are reserved for future uses.
7723          */
7724         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_SET) {
7725                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_DECAP    |
7726                                             MLX5_FLOW_ACTION_MARK     |
7727                                             MLX5_FLOW_ACTION_SET_TAG  |
7728                                             MLX5_FLOW_ACTION_SET_META |
7729                                             MLX5_FLOW_ACTION_DROP;
7730
7731                 if (action_flags & bad_actions_mask)
7732                         return rte_flow_error_set
7733                                         (error, EINVAL,
7734                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7735                                         "Invalid RTE action in tunnel "
7736                                         "set decap rule");
7737                 if (!(action_flags & MLX5_FLOW_ACTION_JUMP))
7738                         return rte_flow_error_set
7739                                         (error, EINVAL,
7740                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7741                                         "tunnel set decap rule must terminate "
7742                                         "with JUMP");
7743                 if (!attr->ingress)
7744                         return rte_flow_error_set
7745                                         (error, EINVAL,
7746                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7747                                         "tunnel flows for ingress traffic only");
7748         }
7749         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_MATCH) {
7750                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_JUMP    |
7751                                             MLX5_FLOW_ACTION_MARK    |
7752                                             MLX5_FLOW_ACTION_SET_TAG |
7753                                             MLX5_FLOW_ACTION_SET_META;
7754
7755                 if (action_flags & bad_actions_mask)
7756                         return rte_flow_error_set
7757                                         (error, EINVAL,
7758                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7759                                         "Invalid RTE action in tunnel "
7760                                         "set match rule");
7761         }
7762         /*
7763          * Validate the drop action mutual exclusion with other actions.
7764          * Drop action is mutually-exclusive with any other action, except for
7765          * Count action.
7766          * Drop action compatibility with tunnel offload was already validated.
7767          */
7768         if (action_flags & (MLX5_FLOW_ACTION_TUNNEL_MATCH |
7769                             MLX5_FLOW_ACTION_TUNNEL_MATCH));
7770         else if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
7771             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
7772                 return rte_flow_error_set(error, EINVAL,
7773                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7774                                           "Drop action is mutually-exclusive "
7775                                           "with any other action, except for "
7776                                           "Count action");
7777         /* Eswitch has few restrictions on using items and actions */
7778         if (attr->transfer) {
7779                 if (!mlx5_flow_ext_mreg_supported(dev) &&
7780                     action_flags & MLX5_FLOW_ACTION_FLAG)
7781                         return rte_flow_error_set(error, ENOTSUP,
7782                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7783                                                   NULL,
7784                                                   "unsupported action FLAG");
7785                 if (!mlx5_flow_ext_mreg_supported(dev) &&
7786                     action_flags & MLX5_FLOW_ACTION_MARK)
7787                         return rte_flow_error_set(error, ENOTSUP,
7788                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7789                                                   NULL,
7790                                                   "unsupported action MARK");
7791                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
7792                         return rte_flow_error_set(error, ENOTSUP,
7793                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7794                                                   NULL,
7795                                                   "unsupported action QUEUE");
7796                 if (action_flags & MLX5_FLOW_ACTION_RSS)
7797                         return rte_flow_error_set(error, ENOTSUP,
7798                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7799                                                   NULL,
7800                                                   "unsupported action RSS");
7801                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
7802                         return rte_flow_error_set(error, EINVAL,
7803                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7804                                                   actions,
7805                                                   "no fate action is found");
7806         } else {
7807                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
7808                         return rte_flow_error_set(error, EINVAL,
7809                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7810                                                   actions,
7811                                                   "no fate action is found");
7812         }
7813         /*
7814          * Continue validation for Xcap and VLAN actions.
7815          * If hairpin is working in explicit TX rule mode, there is no actions
7816          * splitting and the validation of hairpin ingress flow should be the
7817          * same as other standard flows.
7818          */
7819         if ((action_flags & (MLX5_FLOW_XCAP_ACTIONS |
7820                              MLX5_FLOW_VLAN_ACTIONS)) &&
7821             (queue_index == 0xFFFF ||
7822              mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN ||
7823              ((conf = mlx5_rxq_get_hairpin_conf(dev, queue_index)) != NULL &&
7824              conf->tx_explicit != 0))) {
7825                 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
7826                     MLX5_FLOW_XCAP_ACTIONS)
7827                         return rte_flow_error_set(error, ENOTSUP,
7828                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7829                                                   NULL, "encap and decap "
7830                                                   "combination aren't supported");
7831                 if (!attr->transfer && attr->ingress) {
7832                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7833                                 return rte_flow_error_set
7834                                                 (error, ENOTSUP,
7835                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7836                                                  NULL, "encap is not supported"
7837                                                  " for ingress traffic");
7838                         else if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7839                                 return rte_flow_error_set
7840                                                 (error, ENOTSUP,
7841                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7842                                                  NULL, "push VLAN action not "
7843                                                  "supported for ingress");
7844                         else if ((action_flags & MLX5_FLOW_VLAN_ACTIONS) ==
7845                                         MLX5_FLOW_VLAN_ACTIONS)
7846                                 return rte_flow_error_set
7847                                                 (error, ENOTSUP,
7848                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7849                                                  NULL, "no support for "
7850                                                  "multiple VLAN actions");
7851                 }
7852         }
7853         if (action_flags & MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY) {
7854                 if ((action_flags & (MLX5_FLOW_FATE_ACTIONS &
7855                         ~MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)) &&
7856                         attr->ingress)
7857                         return rte_flow_error_set
7858                                 (error, ENOTSUP,
7859                                 RTE_FLOW_ERROR_TYPE_ACTION,
7860                                 NULL, "fate action not supported for "
7861                                 "meter with policy");
7862                 if (attr->egress) {
7863                         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
7864                                 return rte_flow_error_set
7865                                         (error, ENOTSUP,
7866                                         RTE_FLOW_ERROR_TYPE_ACTION,
7867                                         NULL, "modify header action in egress "
7868                                         "cannot be done before meter action");
7869                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7870                                 return rte_flow_error_set
7871                                         (error, ENOTSUP,
7872                                         RTE_FLOW_ERROR_TYPE_ACTION,
7873                                         NULL, "encap action in egress "
7874                                         "cannot be done before meter action");
7875                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7876                                 return rte_flow_error_set
7877                                         (error, ENOTSUP,
7878                                         RTE_FLOW_ERROR_TYPE_ACTION,
7879                                         NULL, "push vlan action in egress "
7880                                         "cannot be done before meter action");
7881                 }
7882         }
7883         /*
7884          * Hairpin flow will add one more TAG action in TX implicit mode.
7885          * In TX explicit mode, there will be no hairpin flow ID.
7886          */
7887         if (hairpin > 0)
7888                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7889         /* extra metadata enabled: one more TAG action will be add. */
7890         if (dev_conf->dv_flow_en &&
7891             dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
7892             mlx5_flow_ext_mreg_supported(dev))
7893                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7894         if (rw_act_num >
7895                         flow_dv_modify_hdr_action_max(dev, is_root)) {
7896                 return rte_flow_error_set(error, ENOTSUP,
7897                                           RTE_FLOW_ERROR_TYPE_ACTION,
7898                                           NULL, "too many header modify"
7899                                           " actions to support");
7900         }
7901         /* Eswitch egress mirror and modify flow has limitation on CX5 */
7902         if (fdb_mirror_limit && modify_after_mirror)
7903                 return rte_flow_error_set(error, EINVAL,
7904                                 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7905                                 "sample before modify action is not supported");
7906         return 0;
7907 }
7908
7909 /**
7910  * Internal preparation function. Allocates the DV flow size,
7911  * this size is constant.
7912  *
7913  * @param[in] dev
7914  *   Pointer to the rte_eth_dev structure.
7915  * @param[in] attr
7916  *   Pointer to the flow attributes.
7917  * @param[in] items
7918  *   Pointer to the list of items.
7919  * @param[in] actions
7920  *   Pointer to the list of actions.
7921  * @param[out] error
7922  *   Pointer to the error structure.
7923  *
7924  * @return
7925  *   Pointer to mlx5_flow object on success,
7926  *   otherwise NULL and rte_errno is set.
7927  */
7928 static struct mlx5_flow *
7929 flow_dv_prepare(struct rte_eth_dev *dev,
7930                 const struct rte_flow_attr *attr __rte_unused,
7931                 const struct rte_flow_item items[] __rte_unused,
7932                 const struct rte_flow_action actions[] __rte_unused,
7933                 struct rte_flow_error *error)
7934 {
7935         uint32_t handle_idx = 0;
7936         struct mlx5_flow *dev_flow;
7937         struct mlx5_flow_handle *dev_handle;
7938         struct mlx5_priv *priv = dev->data->dev_private;
7939         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
7940
7941         MLX5_ASSERT(wks);
7942         wks->skip_matcher_reg = 0;
7943         wks->policy = NULL;
7944         wks->final_policy = NULL;
7945         /* In case of corrupting the memory. */
7946         if (wks->flow_idx >= MLX5_NUM_MAX_DEV_FLOWS) {
7947                 rte_flow_error_set(error, ENOSPC,
7948                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7949                                    "not free temporary device flow");
7950                 return NULL;
7951         }
7952         dev_handle = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
7953                                    &handle_idx);
7954         if (!dev_handle) {
7955                 rte_flow_error_set(error, ENOMEM,
7956                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7957                                    "not enough memory to create flow handle");
7958                 return NULL;
7959         }
7960         MLX5_ASSERT(wks->flow_idx < RTE_DIM(wks->flows));
7961         dev_flow = &wks->flows[wks->flow_idx++];
7962         memset(dev_flow, 0, sizeof(*dev_flow));
7963         dev_flow->handle = dev_handle;
7964         dev_flow->handle_idx = handle_idx;
7965         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
7966         dev_flow->ingress = attr->ingress;
7967         dev_flow->dv.transfer = attr->transfer;
7968         return dev_flow;
7969 }
7970
7971 #ifdef RTE_LIBRTE_MLX5_DEBUG
7972 /**
7973  * Sanity check for match mask and value. Similar to check_valid_spec() in
7974  * kernel driver. If unmasked bit is present in value, it returns failure.
7975  *
7976  * @param match_mask
7977  *   pointer to match mask buffer.
7978  * @param match_value
7979  *   pointer to match value buffer.
7980  *
7981  * @return
7982  *   0 if valid, -EINVAL otherwise.
7983  */
7984 static int
7985 flow_dv_check_valid_spec(void *match_mask, void *match_value)
7986 {
7987         uint8_t *m = match_mask;
7988         uint8_t *v = match_value;
7989         unsigned int i;
7990
7991         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
7992                 if (v[i] & ~m[i]) {
7993                         DRV_LOG(ERR,
7994                                 "match_value differs from match_criteria"
7995                                 " %p[%u] != %p[%u]",
7996                                 match_value, i, match_mask, i);
7997                         return -EINVAL;
7998                 }
7999         }
8000         return 0;
8001 }
8002 #endif
8003
8004 /**
8005  * Add match of ip_version.
8006  *
8007  * @param[in] group
8008  *   Flow group.
8009  * @param[in] headers_v
8010  *   Values header pointer.
8011  * @param[in] headers_m
8012  *   Masks header pointer.
8013  * @param[in] ip_version
8014  *   The IP version to set.
8015  */
8016 static inline void
8017 flow_dv_set_match_ip_version(uint32_t group,
8018                              void *headers_v,
8019                              void *headers_m,
8020                              uint8_t ip_version)
8021 {
8022         if (group == 0)
8023                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
8024         else
8025                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version,
8026                          ip_version);
8027         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, ip_version);
8028         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, 0);
8029         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype, 0);
8030 }
8031
8032 /**
8033  * Add Ethernet item to matcher and to the value.
8034  *
8035  * @param[in, out] matcher
8036  *   Flow matcher.
8037  * @param[in, out] key
8038  *   Flow matcher value.
8039  * @param[in] item
8040  *   Flow pattern to translate.
8041  * @param[in] inner
8042  *   Item is inner pattern.
8043  */
8044 static void
8045 flow_dv_translate_item_eth(void *matcher, void *key,
8046                            const struct rte_flow_item *item, int inner,
8047                            uint32_t group)
8048 {
8049         const struct rte_flow_item_eth *eth_m = item->mask;
8050         const struct rte_flow_item_eth *eth_v = item->spec;
8051         const struct rte_flow_item_eth nic_mask = {
8052                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8053                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8054                 .type = RTE_BE16(0xffff),
8055                 .has_vlan = 0,
8056         };
8057         void *hdrs_m;
8058         void *hdrs_v;
8059         char *l24_v;
8060         unsigned int i;
8061
8062         if (!eth_v)
8063                 return;
8064         if (!eth_m)
8065                 eth_m = &nic_mask;
8066         if (inner) {
8067                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8068                                          inner_headers);
8069                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8070         } else {
8071                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8072                                          outer_headers);
8073                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8074         }
8075         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, dmac_47_16),
8076                &eth_m->dst, sizeof(eth_m->dst));
8077         /* The value must be in the range of the mask. */
8078         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, dmac_47_16);
8079         for (i = 0; i < sizeof(eth_m->dst); ++i)
8080                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
8081         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, smac_47_16),
8082                &eth_m->src, sizeof(eth_m->src));
8083         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, smac_47_16);
8084         /* The value must be in the range of the mask. */
8085         for (i = 0; i < sizeof(eth_m->dst); ++i)
8086                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
8087         /*
8088          * HW supports match on one Ethertype, the Ethertype following the last
8089          * VLAN tag of the packet (see PRM).
8090          * Set match on ethertype only if ETH header is not followed by VLAN.
8091          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8092          * ethertype, and use ip_version field instead.
8093          * eCPRI over Ether layer will use type value 0xAEFE.
8094          */
8095         if (eth_m->type == 0xFFFF) {
8096                 /* Set cvlan_tag mask for any single\multi\un-tagged case. */
8097                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8098                 switch (eth_v->type) {
8099                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8100                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8101                         return;
8102                 case RTE_BE16(RTE_ETHER_TYPE_QINQ):
8103                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8104                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8105                         return;
8106                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8107                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8108                         return;
8109                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8110                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8111                         return;
8112                 default:
8113                         break;
8114                 }
8115         }
8116         if (eth_m->has_vlan) {
8117                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8118                 if (eth_v->has_vlan) {
8119                         /*
8120                          * Here, when also has_more_vlan field in VLAN item is
8121                          * not set, only single-tagged packets will be matched.
8122                          */
8123                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8124                         return;
8125                 }
8126         }
8127         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8128                  rte_be_to_cpu_16(eth_m->type));
8129         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
8130         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
8131 }
8132
8133 /**
8134  * Add VLAN item to matcher and to the value.
8135  *
8136  * @param[in, out] dev_flow
8137  *   Flow descriptor.
8138  * @param[in, out] matcher
8139  *   Flow matcher.
8140  * @param[in, out] key
8141  *   Flow matcher value.
8142  * @param[in] item
8143  *   Flow pattern to translate.
8144  * @param[in] inner
8145  *   Item is inner pattern.
8146  */
8147 static void
8148 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
8149                             void *matcher, void *key,
8150                             const struct rte_flow_item *item,
8151                             int inner, uint32_t group)
8152 {
8153         const struct rte_flow_item_vlan *vlan_m = item->mask;
8154         const struct rte_flow_item_vlan *vlan_v = item->spec;
8155         void *hdrs_m;
8156         void *hdrs_v;
8157         uint16_t tci_m;
8158         uint16_t tci_v;
8159
8160         if (inner) {
8161                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8162                                          inner_headers);
8163                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8164         } else {
8165                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8166                                          outer_headers);
8167                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8168                 /*
8169                  * This is workaround, masks are not supported,
8170                  * and pre-validated.
8171                  */
8172                 if (vlan_v)
8173                         dev_flow->handle->vf_vlan.tag =
8174                                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
8175         }
8176         /*
8177          * When VLAN item exists in flow, mark packet as tagged,
8178          * even if TCI is not specified.
8179          */
8180         if (!MLX5_GET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag)) {
8181                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8182                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8183         }
8184         if (!vlan_v)
8185                 return;
8186         if (!vlan_m)
8187                 vlan_m = &rte_flow_item_vlan_mask;
8188         tci_m = rte_be_to_cpu_16(vlan_m->tci);
8189         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
8190         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_vid, tci_m);
8191         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_vid, tci_v);
8192         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_cfi, tci_m >> 12);
8193         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_cfi, tci_v >> 12);
8194         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_prio, tci_m >> 13);
8195         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_prio, tci_v >> 13);
8196         /*
8197          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8198          * ethertype, and use ip_version field instead.
8199          */
8200         if (vlan_m->inner_type == 0xFFFF) {
8201                 switch (vlan_v->inner_type) {
8202                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8203                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8204                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8205                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8206                         return;
8207                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8208                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8209                         return;
8210                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8211                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8212                         return;
8213                 default:
8214                         break;
8215                 }
8216         }
8217         if (vlan_m->has_more_vlan && vlan_v->has_more_vlan) {
8218                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8219                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8220                 /* Only one vlan_tag bit can be set. */
8221                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8222                 return;
8223         }
8224         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8225                  rte_be_to_cpu_16(vlan_m->inner_type));
8226         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, ethertype,
8227                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
8228 }
8229
8230 /**
8231  * Add IPV4 item to matcher and to the value.
8232  *
8233  * @param[in, out] matcher
8234  *   Flow matcher.
8235  * @param[in, out] key
8236  *   Flow matcher value.
8237  * @param[in] item
8238  *   Flow pattern to translate.
8239  * @param[in] inner
8240  *   Item is inner pattern.
8241  * @param[in] group
8242  *   The group to insert the rule.
8243  */
8244 static void
8245 flow_dv_translate_item_ipv4(void *matcher, void *key,
8246                             const struct rte_flow_item *item,
8247                             int inner, uint32_t group)
8248 {
8249         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
8250         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
8251         const struct rte_flow_item_ipv4 nic_mask = {
8252                 .hdr = {
8253                         .src_addr = RTE_BE32(0xffffffff),
8254                         .dst_addr = RTE_BE32(0xffffffff),
8255                         .type_of_service = 0xff,
8256                         .next_proto_id = 0xff,
8257                         .time_to_live = 0xff,
8258                 },
8259         };
8260         void *headers_m;
8261         void *headers_v;
8262         char *l24_m;
8263         char *l24_v;
8264         uint8_t tos, ihl_m, ihl_v;
8265
8266         if (inner) {
8267                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8268                                          inner_headers);
8269                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8270         } else {
8271                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8272                                          outer_headers);
8273                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8274         }
8275         flow_dv_set_match_ip_version(group, headers_v, headers_m, 4);
8276         if (!ipv4_v)
8277                 return;
8278         if (!ipv4_m)
8279                 ipv4_m = &nic_mask;
8280         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8281                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8282         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8283                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8284         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
8285         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
8286         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8287                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
8288         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8289                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
8290         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
8291         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
8292         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
8293         ihl_m = ipv4_m->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8294         ihl_v = ipv4_v->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8295         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_ihl, ihl_m);
8296         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_ihl, ihl_m & ihl_v);
8297         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
8298                  ipv4_m->hdr.type_of_service);
8299         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
8300         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
8301                  ipv4_m->hdr.type_of_service >> 2);
8302         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
8303         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8304                  ipv4_m->hdr.next_proto_id);
8305         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8306                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
8307         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8308                  ipv4_m->hdr.time_to_live);
8309         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8310                  ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
8311         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8312                  !!(ipv4_m->hdr.fragment_offset));
8313         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8314                  !!(ipv4_v->hdr.fragment_offset & ipv4_m->hdr.fragment_offset));
8315 }
8316
8317 /**
8318  * Add IPV6 item to matcher and to the value.
8319  *
8320  * @param[in, out] matcher
8321  *   Flow matcher.
8322  * @param[in, out] key
8323  *   Flow matcher value.
8324  * @param[in] item
8325  *   Flow pattern to translate.
8326  * @param[in] inner
8327  *   Item is inner pattern.
8328  * @param[in] group
8329  *   The group to insert the rule.
8330  */
8331 static void
8332 flow_dv_translate_item_ipv6(void *matcher, void *key,
8333                             const struct rte_flow_item *item,
8334                             int inner, uint32_t group)
8335 {
8336         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
8337         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
8338         const struct rte_flow_item_ipv6 nic_mask = {
8339                 .hdr = {
8340                         .src_addr =
8341                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
8342                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
8343                         .dst_addr =
8344                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
8345                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
8346                         .vtc_flow = RTE_BE32(0xffffffff),
8347                         .proto = 0xff,
8348                         .hop_limits = 0xff,
8349                 },
8350         };
8351         void *headers_m;
8352         void *headers_v;
8353         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8354         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8355         char *l24_m;
8356         char *l24_v;
8357         uint32_t vtc_m;
8358         uint32_t vtc_v;
8359         int i;
8360         int size;
8361
8362         if (inner) {
8363                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8364                                          inner_headers);
8365                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8366         } else {
8367                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8368                                          outer_headers);
8369                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8370         }
8371         flow_dv_set_match_ip_version(group, headers_v, headers_m, 6);
8372         if (!ipv6_v)
8373                 return;
8374         if (!ipv6_m)
8375                 ipv6_m = &nic_mask;
8376         size = sizeof(ipv6_m->hdr.dst_addr);
8377         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8378                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8379         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8380                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8381         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
8382         for (i = 0; i < size; ++i)
8383                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
8384         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8385                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
8386         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8387                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
8388         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
8389         for (i = 0; i < size; ++i)
8390                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
8391         /* TOS. */
8392         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
8393         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
8394         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
8395         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
8396         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
8397         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
8398         /* Label. */
8399         if (inner) {
8400                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
8401                          vtc_m);
8402                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
8403                          vtc_v);
8404         } else {
8405                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
8406                          vtc_m);
8407                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
8408                          vtc_v);
8409         }
8410         /* Protocol. */
8411         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8412                  ipv6_m->hdr.proto);
8413         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8414                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
8415         /* Hop limit. */
8416         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8417                  ipv6_m->hdr.hop_limits);
8418         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8419                  ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
8420         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8421                  !!(ipv6_m->has_frag_ext));
8422         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8423                  !!(ipv6_v->has_frag_ext & ipv6_m->has_frag_ext));
8424 }
8425
8426 /**
8427  * Add IPV6 fragment extension item to matcher and to the value.
8428  *
8429  * @param[in, out] matcher
8430  *   Flow matcher.
8431  * @param[in, out] key
8432  *   Flow matcher value.
8433  * @param[in] item
8434  *   Flow pattern to translate.
8435  * @param[in] inner
8436  *   Item is inner pattern.
8437  */
8438 static void
8439 flow_dv_translate_item_ipv6_frag_ext(void *matcher, void *key,
8440                                      const struct rte_flow_item *item,
8441                                      int inner)
8442 {
8443         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_m = item->mask;
8444         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_v = item->spec;
8445         const struct rte_flow_item_ipv6_frag_ext nic_mask = {
8446                 .hdr = {
8447                         .next_header = 0xff,
8448                         .frag_data = RTE_BE16(0xffff),
8449                 },
8450         };
8451         void *headers_m;
8452         void *headers_v;
8453
8454         if (inner) {
8455                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8456                                          inner_headers);
8457                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8458         } else {
8459                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8460                                          outer_headers);
8461                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8462         }
8463         /* IPv6 fragment extension item exists, so packet is IP fragment. */
8464         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
8465         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 1);
8466         if (!ipv6_frag_ext_v)
8467                 return;
8468         if (!ipv6_frag_ext_m)
8469                 ipv6_frag_ext_m = &nic_mask;
8470         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8471                  ipv6_frag_ext_m->hdr.next_header);
8472         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8473                  ipv6_frag_ext_v->hdr.next_header &
8474                  ipv6_frag_ext_m->hdr.next_header);
8475 }
8476
8477 /**
8478  * Add TCP item to matcher and to the value.
8479  *
8480  * @param[in, out] matcher
8481  *   Flow matcher.
8482  * @param[in, out] key
8483  *   Flow matcher value.
8484  * @param[in] item
8485  *   Flow pattern to translate.
8486  * @param[in] inner
8487  *   Item is inner pattern.
8488  */
8489 static void
8490 flow_dv_translate_item_tcp(void *matcher, void *key,
8491                            const struct rte_flow_item *item,
8492                            int inner)
8493 {
8494         const struct rte_flow_item_tcp *tcp_m = item->mask;
8495         const struct rte_flow_item_tcp *tcp_v = item->spec;
8496         void *headers_m;
8497         void *headers_v;
8498
8499         if (inner) {
8500                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8501                                          inner_headers);
8502                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8503         } else {
8504                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8505                                          outer_headers);
8506                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8507         }
8508         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8509         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
8510         if (!tcp_v)
8511                 return;
8512         if (!tcp_m)
8513                 tcp_m = &rte_flow_item_tcp_mask;
8514         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
8515                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
8516         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
8517                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
8518         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
8519                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
8520         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
8521                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
8522         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
8523                  tcp_m->hdr.tcp_flags);
8524         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
8525                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
8526 }
8527
8528 /**
8529  * Add UDP item to matcher and to the value.
8530  *
8531  * @param[in, out] matcher
8532  *   Flow matcher.
8533  * @param[in, out] key
8534  *   Flow matcher value.
8535  * @param[in] item
8536  *   Flow pattern to translate.
8537  * @param[in] inner
8538  *   Item is inner pattern.
8539  */
8540 static void
8541 flow_dv_translate_item_udp(void *matcher, void *key,
8542                            const struct rte_flow_item *item,
8543                            int inner)
8544 {
8545         const struct rte_flow_item_udp *udp_m = item->mask;
8546         const struct rte_flow_item_udp *udp_v = item->spec;
8547         void *headers_m;
8548         void *headers_v;
8549
8550         if (inner) {
8551                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8552                                          inner_headers);
8553                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8554         } else {
8555                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8556                                          outer_headers);
8557                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8558         }
8559         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8560         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
8561         if (!udp_v)
8562                 return;
8563         if (!udp_m)
8564                 udp_m = &rte_flow_item_udp_mask;
8565         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
8566                  rte_be_to_cpu_16(udp_m->hdr.src_port));
8567         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
8568                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
8569         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
8570                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
8571         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
8572                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
8573 }
8574
8575 /**
8576  * Add GRE optional Key item to matcher and to the value.
8577  *
8578  * @param[in, out] matcher
8579  *   Flow matcher.
8580  * @param[in, out] key
8581  *   Flow matcher value.
8582  * @param[in] item
8583  *   Flow pattern to translate.
8584  * @param[in] inner
8585  *   Item is inner pattern.
8586  */
8587 static void
8588 flow_dv_translate_item_gre_key(void *matcher, void *key,
8589                                    const struct rte_flow_item *item)
8590 {
8591         const rte_be32_t *key_m = item->mask;
8592         const rte_be32_t *key_v = item->spec;
8593         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8594         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8595         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
8596
8597         /* GRE K bit must be on and should already be validated */
8598         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
8599         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
8600         if (!key_v)
8601                 return;
8602         if (!key_m)
8603                 key_m = &gre_key_default_mask;
8604         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
8605                  rte_be_to_cpu_32(*key_m) >> 8);
8606         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
8607                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
8608         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
8609                  rte_be_to_cpu_32(*key_m) & 0xFF);
8610         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
8611                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
8612 }
8613
8614 /**
8615  * Add GRE item to matcher and to the value.
8616  *
8617  * @param[in, out] matcher
8618  *   Flow matcher.
8619  * @param[in, out] key
8620  *   Flow matcher value.
8621  * @param[in] item
8622  *   Flow pattern to translate.
8623  * @param[in] inner
8624  *   Item is inner pattern.
8625  */
8626 static void
8627 flow_dv_translate_item_gre(void *matcher, void *key,
8628                            const struct rte_flow_item *item,
8629                            int inner)
8630 {
8631         const struct rte_flow_item_gre *gre_m = item->mask;
8632         const struct rte_flow_item_gre *gre_v = item->spec;
8633         void *headers_m;
8634         void *headers_v;
8635         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8636         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8637         struct {
8638                 union {
8639                         __extension__
8640                         struct {
8641                                 uint16_t version:3;
8642                                 uint16_t rsvd0:9;
8643                                 uint16_t s_present:1;
8644                                 uint16_t k_present:1;
8645                                 uint16_t rsvd_bit1:1;
8646                                 uint16_t c_present:1;
8647                         };
8648                         uint16_t value;
8649                 };
8650         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
8651
8652         if (inner) {
8653                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8654                                          inner_headers);
8655                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8656         } else {
8657                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8658                                          outer_headers);
8659                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8660         }
8661         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8662         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
8663         if (!gre_v)
8664                 return;
8665         if (!gre_m)
8666                 gre_m = &rte_flow_item_gre_mask;
8667         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
8668                  rte_be_to_cpu_16(gre_m->protocol));
8669         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
8670                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
8671         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
8672         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
8673         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
8674                  gre_crks_rsvd0_ver_m.c_present);
8675         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
8676                  gre_crks_rsvd0_ver_v.c_present &
8677                  gre_crks_rsvd0_ver_m.c_present);
8678         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
8679                  gre_crks_rsvd0_ver_m.k_present);
8680         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
8681                  gre_crks_rsvd0_ver_v.k_present &
8682                  gre_crks_rsvd0_ver_m.k_present);
8683         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
8684                  gre_crks_rsvd0_ver_m.s_present);
8685         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
8686                  gre_crks_rsvd0_ver_v.s_present &
8687                  gre_crks_rsvd0_ver_m.s_present);
8688 }
8689
8690 /**
8691  * Add NVGRE item to matcher and to the value.
8692  *
8693  * @param[in, out] matcher
8694  *   Flow matcher.
8695  * @param[in, out] key
8696  *   Flow matcher value.
8697  * @param[in] item
8698  *   Flow pattern to translate.
8699  * @param[in] inner
8700  *   Item is inner pattern.
8701  */
8702 static void
8703 flow_dv_translate_item_nvgre(void *matcher, void *key,
8704                              const struct rte_flow_item *item,
8705                              int inner)
8706 {
8707         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
8708         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
8709         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8710         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8711         const char *tni_flow_id_m;
8712         const char *tni_flow_id_v;
8713         char *gre_key_m;
8714         char *gre_key_v;
8715         int size;
8716         int i;
8717
8718         /* For NVGRE, GRE header fields must be set with defined values. */
8719         const struct rte_flow_item_gre gre_spec = {
8720                 .c_rsvd0_ver = RTE_BE16(0x2000),
8721                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
8722         };
8723         const struct rte_flow_item_gre gre_mask = {
8724                 .c_rsvd0_ver = RTE_BE16(0xB000),
8725                 .protocol = RTE_BE16(UINT16_MAX),
8726         };
8727         const struct rte_flow_item gre_item = {
8728                 .spec = &gre_spec,
8729                 .mask = &gre_mask,
8730                 .last = NULL,
8731         };
8732         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
8733         if (!nvgre_v)
8734                 return;
8735         if (!nvgre_m)
8736                 nvgre_m = &rte_flow_item_nvgre_mask;
8737         tni_flow_id_m = (const char *)nvgre_m->tni;
8738         tni_flow_id_v = (const char *)nvgre_v->tni;
8739         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
8740         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
8741         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
8742         memcpy(gre_key_m, tni_flow_id_m, size);
8743         for (i = 0; i < size; ++i)
8744                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
8745 }
8746
8747 /**
8748  * Add VXLAN item to matcher and to the value.
8749  *
8750  * @param[in] dev
8751  *   Pointer to the Ethernet device structure.
8752  * @param[in] attr
8753  *   Flow rule attributes.
8754  * @param[in, out] matcher
8755  *   Flow matcher.
8756  * @param[in, out] key
8757  *   Flow matcher value.
8758  * @param[in] item
8759  *   Flow pattern to translate.
8760  * @param[in] inner
8761  *   Item is inner pattern.
8762  */
8763 static void
8764 flow_dv_translate_item_vxlan(struct rte_eth_dev *dev,
8765                              const struct rte_flow_attr *attr,
8766                              void *matcher, void *key,
8767                              const struct rte_flow_item *item,
8768                              int inner)
8769 {
8770         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
8771         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
8772         void *headers_m;
8773         void *headers_v;
8774         void *misc5_m;
8775         void *misc5_v;
8776         uint32_t *tunnel_header_v;
8777         uint32_t *tunnel_header_m;
8778         uint16_t dport;
8779         struct mlx5_priv *priv = dev->data->dev_private;
8780         const struct rte_flow_item_vxlan nic_mask = {
8781                 .vni = "\xff\xff\xff",
8782                 .rsvd1 = 0xff,
8783         };
8784
8785         if (inner) {
8786                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8787                                          inner_headers);
8788                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8789         } else {
8790                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8791                                          outer_headers);
8792                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8793         }
8794         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
8795                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
8796         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8797                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8798                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8799         }
8800         dport = MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport);
8801         if (!vxlan_v)
8802                 return;
8803         if (!vxlan_m) {
8804                 if ((!attr->group && !priv->sh->tunnel_header_0_1) ||
8805                     (attr->group && !priv->sh->misc5_cap))
8806                         vxlan_m = &rte_flow_item_vxlan_mask;
8807                 else
8808                         vxlan_m = &nic_mask;
8809         }
8810         if ((priv->sh->steering_format_version ==
8811             MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5 &&
8812             dport != MLX5_UDP_PORT_VXLAN) ||
8813             (!attr->group && !attr->transfer && !priv->sh->tunnel_header_0_1) ||
8814             ((attr->group || attr->transfer) && !priv->sh->misc5_cap)) {
8815                 void *misc_m;
8816                 void *misc_v;
8817                 char *vni_m;
8818                 char *vni_v;
8819                 int size;
8820                 int i;
8821                 misc_m = MLX5_ADDR_OF(fte_match_param,
8822                                       matcher, misc_parameters);
8823                 misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8824                 size = sizeof(vxlan_m->vni);
8825                 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
8826                 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
8827                 memcpy(vni_m, vxlan_m->vni, size);
8828                 for (i = 0; i < size; ++i)
8829                         vni_v[i] = vni_m[i] & vxlan_v->vni[i];
8830                 return;
8831         }
8832         misc5_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_5);
8833         misc5_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_5);
8834         tunnel_header_v = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8835                                                    misc5_v,
8836                                                    tunnel_header_1);
8837         tunnel_header_m = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8838                                                    misc5_m,
8839                                                    tunnel_header_1);
8840         *tunnel_header_v = (vxlan_v->vni[0] & vxlan_m->vni[0]) |
8841                            (vxlan_v->vni[1] & vxlan_m->vni[1]) << 8 |
8842                            (vxlan_v->vni[2] & vxlan_m->vni[2]) << 16;
8843         if (*tunnel_header_v)
8844                 *tunnel_header_m = vxlan_m->vni[0] |
8845                         vxlan_m->vni[1] << 8 |
8846                         vxlan_m->vni[2] << 16;
8847         else
8848                 *tunnel_header_m = 0x0;
8849         *tunnel_header_v |= (vxlan_v->rsvd1 & vxlan_m->rsvd1) << 24;
8850         if (vxlan_v->rsvd1 & vxlan_m->rsvd1)
8851                 *tunnel_header_m |= vxlan_m->rsvd1 << 24;
8852 }
8853
8854 /**
8855  * Add VXLAN-GPE item to matcher and to the value.
8856  *
8857  * @param[in, out] matcher
8858  *   Flow matcher.
8859  * @param[in, out] key
8860  *   Flow matcher value.
8861  * @param[in] item
8862  *   Flow pattern to translate.
8863  * @param[in] inner
8864  *   Item is inner pattern.
8865  */
8866
8867 static void
8868 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
8869                                  const struct rte_flow_item *item, int inner)
8870 {
8871         const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
8872         const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
8873         void *headers_m;
8874         void *headers_v;
8875         void *misc_m =
8876                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
8877         void *misc_v =
8878                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
8879         char *vni_m;
8880         char *vni_v;
8881         uint16_t dport;
8882         int size;
8883         int i;
8884         uint8_t flags_m = 0xff;
8885         uint8_t flags_v = 0xc;
8886
8887         if (inner) {
8888                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8889                                          inner_headers);
8890                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8891         } else {
8892                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8893                                          outer_headers);
8894                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8895         }
8896         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
8897                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
8898         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8899                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8900                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8901         }
8902         if (!vxlan_v)
8903                 return;
8904         if (!vxlan_m)
8905                 vxlan_m = &rte_flow_item_vxlan_gpe_mask;
8906         size = sizeof(vxlan_m->vni);
8907         vni_m = MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
8908         vni_v = MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
8909         memcpy(vni_m, vxlan_m->vni, size);
8910         for (i = 0; i < size; ++i)
8911                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
8912         if (vxlan_m->flags) {
8913                 flags_m = vxlan_m->flags;
8914                 flags_v = vxlan_v->flags;
8915         }
8916         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
8917         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
8918         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_next_protocol,
8919                  vxlan_m->protocol);
8920         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_next_protocol,
8921                  vxlan_v->protocol);
8922 }
8923
8924 /**
8925  * Add Geneve item to matcher and to the value.
8926  *
8927  * @param[in, out] matcher
8928  *   Flow matcher.
8929  * @param[in, out] key
8930  *   Flow matcher value.
8931  * @param[in] item
8932  *   Flow pattern to translate.
8933  * @param[in] inner
8934  *   Item is inner pattern.
8935  */
8936
8937 static void
8938 flow_dv_translate_item_geneve(void *matcher, void *key,
8939                               const struct rte_flow_item *item, int inner)
8940 {
8941         const struct rte_flow_item_geneve *geneve_m = item->mask;
8942         const struct rte_flow_item_geneve *geneve_v = item->spec;
8943         void *headers_m;
8944         void *headers_v;
8945         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8946         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8947         uint16_t dport;
8948         uint16_t gbhdr_m;
8949         uint16_t gbhdr_v;
8950         char *vni_m;
8951         char *vni_v;
8952         size_t size, i;
8953
8954         if (inner) {
8955                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8956                                          inner_headers);
8957                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8958         } else {
8959                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8960                                          outer_headers);
8961                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8962         }
8963         dport = MLX5_UDP_PORT_GENEVE;
8964         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8965                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8966                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8967         }
8968         if (!geneve_v)
8969                 return;
8970         if (!geneve_m)
8971                 geneve_m = &rte_flow_item_geneve_mask;
8972         size = sizeof(geneve_m->vni);
8973         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
8974         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
8975         memcpy(vni_m, geneve_m->vni, size);
8976         for (i = 0; i < size; ++i)
8977                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
8978         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
8979                  rte_be_to_cpu_16(geneve_m->protocol));
8980         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
8981                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
8982         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
8983         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
8984         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
8985                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
8986         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
8987                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
8988         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
8989                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
8990         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
8991                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
8992                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
8993 }
8994
8995 /**
8996  * Create Geneve TLV option resource.
8997  *
8998  * @param dev[in, out]
8999  *   Pointer to rte_eth_dev structure.
9000  * @param[in, out] tag_be24
9001  *   Tag value in big endian then R-shift 8.
9002  * @parm[in, out] dev_flow
9003  *   Pointer to the dev_flow.
9004  * @param[out] error
9005  *   pointer to error structure.
9006  *
9007  * @return
9008  *   0 on success otherwise -errno and errno is set.
9009  */
9010
9011 int
9012 flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev,
9013                                              const struct rte_flow_item *item,
9014                                              struct rte_flow_error *error)
9015 {
9016         struct mlx5_priv *priv = dev->data->dev_private;
9017         struct mlx5_dev_ctx_shared *sh = priv->sh;
9018         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
9019                         sh->geneve_tlv_option_resource;
9020         struct mlx5_devx_obj *obj;
9021         const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9022         int ret = 0;
9023
9024         if (!geneve_opt_v)
9025                 return -1;
9026         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
9027         if (geneve_opt_resource != NULL) {
9028                 if (geneve_opt_resource->option_class ==
9029                         geneve_opt_v->option_class &&
9030                         geneve_opt_resource->option_type ==
9031                         geneve_opt_v->option_type &&
9032                         geneve_opt_resource->length ==
9033                         geneve_opt_v->option_len) {
9034                         /* We already have GENVE TLV option obj allocated. */
9035                         __atomic_fetch_add(&geneve_opt_resource->refcnt, 1,
9036                                            __ATOMIC_RELAXED);
9037                 } else {
9038                         ret = rte_flow_error_set(error, ENOMEM,
9039                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9040                                 "Only one GENEVE TLV option supported");
9041                         goto exit;
9042                 }
9043         } else {
9044                 /* Create a GENEVE TLV object and resource. */
9045                 obj = mlx5_devx_cmd_create_geneve_tlv_option(sh->cdev->ctx,
9046                                 geneve_opt_v->option_class,
9047                                 geneve_opt_v->option_type,
9048                                 geneve_opt_v->option_len);
9049                 if (!obj) {
9050                         ret = rte_flow_error_set(error, ENODATA,
9051                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9052                                 "Failed to create GENEVE TLV Devx object");
9053                         goto exit;
9054                 }
9055                 sh->geneve_tlv_option_resource =
9056                                 mlx5_malloc(MLX5_MEM_ZERO,
9057                                                 sizeof(*geneve_opt_resource),
9058                                                 0, SOCKET_ID_ANY);
9059                 if (!sh->geneve_tlv_option_resource) {
9060                         claim_zero(mlx5_devx_cmd_destroy(obj));
9061                         ret = rte_flow_error_set(error, ENOMEM,
9062                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9063                                 "GENEVE TLV object memory allocation failed");
9064                         goto exit;
9065                 }
9066                 geneve_opt_resource = sh->geneve_tlv_option_resource;
9067                 geneve_opt_resource->obj = obj;
9068                 geneve_opt_resource->option_class = geneve_opt_v->option_class;
9069                 geneve_opt_resource->option_type = geneve_opt_v->option_type;
9070                 geneve_opt_resource->length = geneve_opt_v->option_len;
9071                 __atomic_store_n(&geneve_opt_resource->refcnt, 1,
9072                                 __ATOMIC_RELAXED);
9073         }
9074 exit:
9075         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
9076         return ret;
9077 }
9078
9079 /**
9080  * Add Geneve TLV option item to matcher.
9081  *
9082  * @param[in, out] dev
9083  *   Pointer to rte_eth_dev structure.
9084  * @param[in, out] matcher
9085  *   Flow matcher.
9086  * @param[in, out] key
9087  *   Flow matcher value.
9088  * @param[in] item
9089  *   Flow pattern to translate.
9090  * @param[out] error
9091  *   Pointer to error structure.
9092  */
9093 static int
9094 flow_dv_translate_item_geneve_opt(struct rte_eth_dev *dev, void *matcher,
9095                                   void *key, const struct rte_flow_item *item,
9096                                   struct rte_flow_error *error)
9097 {
9098         const struct rte_flow_item_geneve_opt *geneve_opt_m = item->mask;
9099         const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9100         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9101         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9102         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9103                         misc_parameters_3);
9104         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9105         rte_be32_t opt_data_key = 0, opt_data_mask = 0;
9106         int ret = 0;
9107
9108         if (!geneve_opt_v)
9109                 return -1;
9110         if (!geneve_opt_m)
9111                 geneve_opt_m = &rte_flow_item_geneve_opt_mask;
9112         ret = flow_dev_geneve_tlv_option_resource_register(dev, item,
9113                                                            error);
9114         if (ret) {
9115                 DRV_LOG(ERR, "Failed to create geneve_tlv_obj");
9116                 return ret;
9117         }
9118         /*
9119          * Set the option length in GENEVE header if not requested.
9120          * The GENEVE TLV option length is expressed by the option length field
9121          * in the GENEVE header.
9122          * If the option length was not requested but the GENEVE TLV option item
9123          * is present we set the option length field implicitly.
9124          */
9125         if (!MLX5_GET16(fte_match_set_misc, misc_m, geneve_opt_len)) {
9126                 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9127                          MLX5_GENEVE_OPTLEN_MASK);
9128                 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9129                          geneve_opt_v->option_len + 1);
9130         }
9131         MLX5_SET(fte_match_set_misc, misc_m, geneve_tlv_option_0_exist, 1);
9132         MLX5_SET(fte_match_set_misc, misc_v, geneve_tlv_option_0_exist, 1);
9133         /* Set the data. */
9134         if (geneve_opt_v->data) {
9135                 memcpy(&opt_data_key, geneve_opt_v->data,
9136                         RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9137                                 sizeof(opt_data_key)));
9138                 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9139                                 sizeof(opt_data_key));
9140                 memcpy(&opt_data_mask, geneve_opt_m->data,
9141                         RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9142                                 sizeof(opt_data_mask)));
9143                 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9144                                 sizeof(opt_data_mask));
9145                 MLX5_SET(fte_match_set_misc3, misc3_m,
9146                                 geneve_tlv_option_0_data,
9147                                 rte_be_to_cpu_32(opt_data_mask));
9148                 MLX5_SET(fte_match_set_misc3, misc3_v,
9149                                 geneve_tlv_option_0_data,
9150                         rte_be_to_cpu_32(opt_data_key & opt_data_mask));
9151         }
9152         return ret;
9153 }
9154
9155 /**
9156  * Add MPLS item to matcher and to the value.
9157  *
9158  * @param[in, out] matcher
9159  *   Flow matcher.
9160  * @param[in, out] key
9161  *   Flow matcher value.
9162  * @param[in] item
9163  *   Flow pattern to translate.
9164  * @param[in] prev_layer
9165  *   The protocol layer indicated in previous item.
9166  * @param[in] inner
9167  *   Item is inner pattern.
9168  */
9169 static void
9170 flow_dv_translate_item_mpls(void *matcher, void *key,
9171                             const struct rte_flow_item *item,
9172                             uint64_t prev_layer,
9173                             int inner)
9174 {
9175         const uint32_t *in_mpls_m = item->mask;
9176         const uint32_t *in_mpls_v = item->spec;
9177         uint32_t *out_mpls_m = 0;
9178         uint32_t *out_mpls_v = 0;
9179         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9180         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9181         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
9182                                      misc_parameters_2);
9183         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9184         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9185         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9186
9187         switch (prev_layer) {
9188         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9189                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
9190                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9191                          MLX5_UDP_PORT_MPLS);
9192                 break;
9193         case MLX5_FLOW_LAYER_GRE:
9194                 /* Fall-through. */
9195         case MLX5_FLOW_LAYER_GRE_KEY:
9196                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
9197                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
9198                          RTE_ETHER_TYPE_MPLS);
9199                 break;
9200         default:
9201                 break;
9202         }
9203         if (!in_mpls_v)
9204                 return;
9205         if (!in_mpls_m)
9206                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
9207         switch (prev_layer) {
9208         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9209                 out_mpls_m =
9210                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9211                                                  outer_first_mpls_over_udp);
9212                 out_mpls_v =
9213                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9214                                                  outer_first_mpls_over_udp);
9215                 break;
9216         case MLX5_FLOW_LAYER_GRE:
9217                 out_mpls_m =
9218                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9219                                                  outer_first_mpls_over_gre);
9220                 out_mpls_v =
9221                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9222                                                  outer_first_mpls_over_gre);
9223                 break;
9224         default:
9225                 /* Inner MPLS not over GRE is not supported. */
9226                 if (!inner) {
9227                         out_mpls_m =
9228                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9229                                                          misc2_m,
9230                                                          outer_first_mpls);
9231                         out_mpls_v =
9232                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9233                                                          misc2_v,
9234                                                          outer_first_mpls);
9235                 }
9236                 break;
9237         }
9238         if (out_mpls_m && out_mpls_v) {
9239                 *out_mpls_m = *in_mpls_m;
9240                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
9241         }
9242 }
9243
9244 /**
9245  * Add metadata register item to matcher
9246  *
9247  * @param[in, out] matcher
9248  *   Flow matcher.
9249  * @param[in, out] key
9250  *   Flow matcher value.
9251  * @param[in] reg_type
9252  *   Type of device metadata register
9253  * @param[in] value
9254  *   Register value
9255  * @param[in] mask
9256  *   Register mask
9257  */
9258 static void
9259 flow_dv_match_meta_reg(void *matcher, void *key,
9260                        enum modify_reg reg_type,
9261                        uint32_t data, uint32_t mask)
9262 {
9263         void *misc2_m =
9264                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
9265         void *misc2_v =
9266                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9267         uint32_t temp;
9268
9269         data &= mask;
9270         switch (reg_type) {
9271         case REG_A:
9272                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
9273                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
9274                 break;
9275         case REG_B:
9276                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
9277                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
9278                 break;
9279         case REG_C_0:
9280                 /*
9281                  * The metadata register C0 field might be divided into
9282                  * source vport index and META item value, we should set
9283                  * this field according to specified mask, not as whole one.
9284                  */
9285                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
9286                 temp |= mask;
9287                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
9288                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
9289                 temp &= ~mask;
9290                 temp |= data;
9291                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
9292                 break;
9293         case REG_C_1:
9294                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
9295                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
9296                 break;
9297         case REG_C_2:
9298                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
9299                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
9300                 break;
9301         case REG_C_3:
9302                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
9303                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
9304                 break;
9305         case REG_C_4:
9306                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
9307                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
9308                 break;
9309         case REG_C_5:
9310                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
9311                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
9312                 break;
9313         case REG_C_6:
9314                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
9315                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
9316                 break;
9317         case REG_C_7:
9318                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
9319                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
9320                 break;
9321         default:
9322                 MLX5_ASSERT(false);
9323                 break;
9324         }
9325 }
9326
9327 /**
9328  * Add MARK item to matcher
9329  *
9330  * @param[in] dev
9331  *   The device to configure through.
9332  * @param[in, out] matcher
9333  *   Flow matcher.
9334  * @param[in, out] key
9335  *   Flow matcher value.
9336  * @param[in] item
9337  *   Flow pattern to translate.
9338  */
9339 static void
9340 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
9341                             void *matcher, void *key,
9342                             const struct rte_flow_item *item)
9343 {
9344         struct mlx5_priv *priv = dev->data->dev_private;
9345         const struct rte_flow_item_mark *mark;
9346         uint32_t value;
9347         uint32_t mask;
9348
9349         mark = item->mask ? (const void *)item->mask :
9350                             &rte_flow_item_mark_mask;
9351         mask = mark->id & priv->sh->dv_mark_mask;
9352         mark = (const void *)item->spec;
9353         MLX5_ASSERT(mark);
9354         value = mark->id & priv->sh->dv_mark_mask & mask;
9355         if (mask) {
9356                 enum modify_reg reg;
9357
9358                 /* Get the metadata register index for the mark. */
9359                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
9360                 MLX5_ASSERT(reg > 0);
9361                 if (reg == REG_C_0) {
9362                         struct mlx5_priv *priv = dev->data->dev_private;
9363                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9364                         uint32_t shl_c0 = rte_bsf32(msk_c0);
9365
9366                         mask &= msk_c0;
9367                         mask <<= shl_c0;
9368                         value <<= shl_c0;
9369                 }
9370                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9371         }
9372 }
9373
9374 /**
9375  * Add META item to matcher
9376  *
9377  * @param[in] dev
9378  *   The devich to configure through.
9379  * @param[in, out] matcher
9380  *   Flow matcher.
9381  * @param[in, out] key
9382  *   Flow matcher value.
9383  * @param[in] attr
9384  *   Attributes of flow that includes this item.
9385  * @param[in] item
9386  *   Flow pattern to translate.
9387  */
9388 static void
9389 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
9390                             void *matcher, void *key,
9391                             const struct rte_flow_attr *attr,
9392                             const struct rte_flow_item *item)
9393 {
9394         const struct rte_flow_item_meta *meta_m;
9395         const struct rte_flow_item_meta *meta_v;
9396
9397         meta_m = (const void *)item->mask;
9398         if (!meta_m)
9399                 meta_m = &rte_flow_item_meta_mask;
9400         meta_v = (const void *)item->spec;
9401         if (meta_v) {
9402                 int reg;
9403                 uint32_t value = meta_v->data;
9404                 uint32_t mask = meta_m->data;
9405
9406                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
9407                 if (reg < 0)
9408                         return;
9409                 MLX5_ASSERT(reg != REG_NON);
9410                 if (reg == REG_C_0) {
9411                         struct mlx5_priv *priv = dev->data->dev_private;
9412                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9413                         uint32_t shl_c0 = rte_bsf32(msk_c0);
9414
9415                         mask &= msk_c0;
9416                         mask <<= shl_c0;
9417                         value <<= shl_c0;
9418                 }
9419                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9420         }
9421 }
9422
9423 /**
9424  * Add vport metadata Reg C0 item to matcher
9425  *
9426  * @param[in, out] matcher
9427  *   Flow matcher.
9428  * @param[in, out] key
9429  *   Flow matcher value.
9430  * @param[in] reg
9431  *   Flow pattern to translate.
9432  */
9433 static void
9434 flow_dv_translate_item_meta_vport(void *matcher, void *key,
9435                                   uint32_t value, uint32_t mask)
9436 {
9437         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
9438 }
9439
9440 /**
9441  * Add tag item to matcher
9442  *
9443  * @param[in] dev
9444  *   The devich to configure through.
9445  * @param[in, out] matcher
9446  *   Flow matcher.
9447  * @param[in, out] key
9448  *   Flow matcher value.
9449  * @param[in] item
9450  *   Flow pattern to translate.
9451  */
9452 static void
9453 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
9454                                 void *matcher, void *key,
9455                                 const struct rte_flow_item *item)
9456 {
9457         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
9458         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
9459         uint32_t mask, value;
9460
9461         MLX5_ASSERT(tag_v);
9462         value = tag_v->data;
9463         mask = tag_m ? tag_m->data : UINT32_MAX;
9464         if (tag_v->id == REG_C_0) {
9465                 struct mlx5_priv *priv = dev->data->dev_private;
9466                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9467                 uint32_t shl_c0 = rte_bsf32(msk_c0);
9468
9469                 mask &= msk_c0;
9470                 mask <<= shl_c0;
9471                 value <<= shl_c0;
9472         }
9473         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
9474 }
9475
9476 /**
9477  * Add TAG item to matcher
9478  *
9479  * @param[in] dev
9480  *   The devich to configure through.
9481  * @param[in, out] matcher
9482  *   Flow matcher.
9483  * @param[in, out] key
9484  *   Flow matcher value.
9485  * @param[in] item
9486  *   Flow pattern to translate.
9487  */
9488 static void
9489 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
9490                            void *matcher, void *key,
9491                            const struct rte_flow_item *item)
9492 {
9493         const struct rte_flow_item_tag *tag_v = item->spec;
9494         const struct rte_flow_item_tag *tag_m = item->mask;
9495         enum modify_reg reg;
9496
9497         MLX5_ASSERT(tag_v);
9498         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
9499         /* Get the metadata register index for the tag. */
9500         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
9501         MLX5_ASSERT(reg > 0);
9502         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
9503 }
9504
9505 /**
9506  * Add source vport match to the specified matcher.
9507  *
9508  * @param[in, out] matcher
9509  *   Flow matcher.
9510  * @param[in, out] key
9511  *   Flow matcher value.
9512  * @param[in] port
9513  *   Source vport value to match
9514  * @param[in] mask
9515  *   Mask
9516  */
9517 static void
9518 flow_dv_translate_item_source_vport(void *matcher, void *key,
9519                                     int16_t port, uint16_t mask)
9520 {
9521         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9522         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9523
9524         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
9525         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
9526 }
9527
9528 /**
9529  * Translate port-id item to eswitch match on  port-id.
9530  *
9531  * @param[in] dev
9532  *   The devich to configure through.
9533  * @param[in, out] matcher
9534  *   Flow matcher.
9535  * @param[in, out] key
9536  *   Flow matcher value.
9537  * @param[in] item
9538  *   Flow pattern to translate.
9539  * @param[in]
9540  *   Flow attributes.
9541  *
9542  * @return
9543  *   0 on success, a negative errno value otherwise.
9544  */
9545 static int
9546 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
9547                                void *key, const struct rte_flow_item *item,
9548                                const struct rte_flow_attr *attr)
9549 {
9550         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
9551         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
9552         struct mlx5_priv *priv;
9553         uint16_t mask, id;
9554
9555         if (pid_v && pid_v->id == MLX5_PORT_ESW_MGR) {
9556                 flow_dv_translate_item_source_vport(matcher, key,
9557                         flow_dv_get_esw_manager_vport_id(dev), 0xffff);
9558                 return 0;
9559         }
9560         mask = pid_m ? pid_m->id : 0xffff;
9561         id = pid_v ? pid_v->id : dev->data->port_id;
9562         priv = mlx5_port_to_eswitch_info(id, item == NULL);
9563         if (!priv)
9564                 return -rte_errno;
9565         /*
9566          * Translate to vport field or to metadata, depending on mode.
9567          * Kernel can use either misc.source_port or half of C0 metadata
9568          * register.
9569          */
9570         if (priv->vport_meta_mask) {
9571                 /*
9572                  * Provide the hint for SW steering library
9573                  * to insert the flow into ingress domain and
9574                  * save the extra vport match.
9575                  */
9576                 if (mask == 0xffff && priv->vport_id == 0xffff &&
9577                     priv->pf_bond < 0 && attr->transfer)
9578                         flow_dv_translate_item_source_vport
9579                                 (matcher, key, priv->vport_id, mask);
9580                 /*
9581                  * We should always set the vport metadata register,
9582                  * otherwise the SW steering library can drop
9583                  * the rule if wire vport metadata value is not zero,
9584                  * it depends on kernel configuration.
9585                  */
9586                 flow_dv_translate_item_meta_vport(matcher, key,
9587                                                   priv->vport_meta_tag,
9588                                                   priv->vport_meta_mask);
9589         } else {
9590                 flow_dv_translate_item_source_vport(matcher, key,
9591                                                     priv->vport_id, mask);
9592         }
9593         return 0;
9594 }
9595
9596 /**
9597  * Add ICMP6 item to matcher and to the value.
9598  *
9599  * @param[in, out] matcher
9600  *   Flow matcher.
9601  * @param[in, out] key
9602  *   Flow matcher value.
9603  * @param[in] item
9604  *   Flow pattern to translate.
9605  * @param[in] inner
9606  *   Item is inner pattern.
9607  */
9608 static void
9609 flow_dv_translate_item_icmp6(void *matcher, void *key,
9610                               const struct rte_flow_item *item,
9611                               int inner)
9612 {
9613         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
9614         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
9615         void *headers_m;
9616         void *headers_v;
9617         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9618                                      misc_parameters_3);
9619         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9620         if (inner) {
9621                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9622                                          inner_headers);
9623                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9624         } else {
9625                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9626                                          outer_headers);
9627                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9628         }
9629         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9630         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
9631         if (!icmp6_v)
9632                 return;
9633         if (!icmp6_m)
9634                 icmp6_m = &rte_flow_item_icmp6_mask;
9635         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
9636         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
9637                  icmp6_v->type & icmp6_m->type);
9638         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
9639         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
9640                  icmp6_v->code & icmp6_m->code);
9641 }
9642
9643 /**
9644  * Add ICMP item to matcher and to the value.
9645  *
9646  * @param[in, out] matcher
9647  *   Flow matcher.
9648  * @param[in, out] key
9649  *   Flow matcher value.
9650  * @param[in] item
9651  *   Flow pattern to translate.
9652  * @param[in] inner
9653  *   Item is inner pattern.
9654  */
9655 static void
9656 flow_dv_translate_item_icmp(void *matcher, void *key,
9657                             const struct rte_flow_item *item,
9658                             int inner)
9659 {
9660         const struct rte_flow_item_icmp *icmp_m = item->mask;
9661         const struct rte_flow_item_icmp *icmp_v = item->spec;
9662         uint32_t icmp_header_data_m = 0;
9663         uint32_t icmp_header_data_v = 0;
9664         void *headers_m;
9665         void *headers_v;
9666         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9667                                      misc_parameters_3);
9668         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9669         if (inner) {
9670                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9671                                          inner_headers);
9672                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9673         } else {
9674                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9675                                          outer_headers);
9676                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9677         }
9678         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9679         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
9680         if (!icmp_v)
9681                 return;
9682         if (!icmp_m)
9683                 icmp_m = &rte_flow_item_icmp_mask;
9684         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
9685                  icmp_m->hdr.icmp_type);
9686         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
9687                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
9688         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
9689                  icmp_m->hdr.icmp_code);
9690         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
9691                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
9692         icmp_header_data_m = rte_be_to_cpu_16(icmp_m->hdr.icmp_seq_nb);
9693         icmp_header_data_m |= rte_be_to_cpu_16(icmp_m->hdr.icmp_ident) << 16;
9694         if (icmp_header_data_m) {
9695                 icmp_header_data_v = rte_be_to_cpu_16(icmp_v->hdr.icmp_seq_nb);
9696                 icmp_header_data_v |=
9697                          rte_be_to_cpu_16(icmp_v->hdr.icmp_ident) << 16;
9698                 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_header_data,
9699                          icmp_header_data_m);
9700                 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_header_data,
9701                          icmp_header_data_v & icmp_header_data_m);
9702         }
9703 }
9704
9705 /**
9706  * Add GTP item to matcher and to the value.
9707  *
9708  * @param[in, out] matcher
9709  *   Flow matcher.
9710  * @param[in, out] key
9711  *   Flow matcher value.
9712  * @param[in] item
9713  *   Flow pattern to translate.
9714  * @param[in] inner
9715  *   Item is inner pattern.
9716  */
9717 static void
9718 flow_dv_translate_item_gtp(void *matcher, void *key,
9719                            const struct rte_flow_item *item, int inner)
9720 {
9721         const struct rte_flow_item_gtp *gtp_m = item->mask;
9722         const struct rte_flow_item_gtp *gtp_v = item->spec;
9723         void *headers_m;
9724         void *headers_v;
9725         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9726                                      misc_parameters_3);
9727         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9728         uint16_t dport = RTE_GTPU_UDP_PORT;
9729
9730         if (inner) {
9731                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9732                                          inner_headers);
9733                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9734         } else {
9735                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9736                                          outer_headers);
9737                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9738         }
9739         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9740                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9741                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9742         }
9743         if (!gtp_v)
9744                 return;
9745         if (!gtp_m)
9746                 gtp_m = &rte_flow_item_gtp_mask;
9747         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags,
9748                  gtp_m->v_pt_rsv_flags);
9749         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags,
9750                  gtp_v->v_pt_rsv_flags & gtp_m->v_pt_rsv_flags);
9751         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
9752         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
9753                  gtp_v->msg_type & gtp_m->msg_type);
9754         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
9755                  rte_be_to_cpu_32(gtp_m->teid));
9756         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
9757                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
9758 }
9759
9760 /**
9761  * Add GTP PSC item to matcher.
9762  *
9763  * @param[in, out] matcher
9764  *   Flow matcher.
9765  * @param[in, out] key
9766  *   Flow matcher value.
9767  * @param[in] item
9768  *   Flow pattern to translate.
9769  */
9770 static int
9771 flow_dv_translate_item_gtp_psc(void *matcher, void *key,
9772                                const struct rte_flow_item *item)
9773 {
9774         const struct rte_flow_item_gtp_psc *gtp_psc_m = item->mask;
9775         const struct rte_flow_item_gtp_psc *gtp_psc_v = item->spec;
9776         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9777                         misc_parameters_3);
9778         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9779         union {
9780                 uint32_t w32;
9781                 struct {
9782                         uint16_t seq_num;
9783                         uint8_t npdu_num;
9784                         uint8_t next_ext_header_type;
9785                 };
9786         } dw_2;
9787         uint8_t gtp_flags;
9788
9789         /* Always set E-flag match on one, regardless of GTP item settings. */
9790         gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_m, gtpu_msg_flags);
9791         gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9792         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags, gtp_flags);
9793         gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_v, gtpu_msg_flags);
9794         gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9795         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags, gtp_flags);
9796         /*Set next extension header type. */
9797         dw_2.seq_num = 0;
9798         dw_2.npdu_num = 0;
9799         dw_2.next_ext_header_type = 0xff;
9800         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_dw_2,
9801                  rte_cpu_to_be_32(dw_2.w32));
9802         dw_2.seq_num = 0;
9803         dw_2.npdu_num = 0;
9804         dw_2.next_ext_header_type = 0x85;
9805         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_dw_2,
9806                  rte_cpu_to_be_32(dw_2.w32));
9807         if (gtp_psc_v) {
9808                 union {
9809                         uint32_t w32;
9810                         struct {
9811                                 uint8_t len;
9812                                 uint8_t type_flags;
9813                                 uint8_t qfi;
9814                                 uint8_t reserved;
9815                         };
9816                 } dw_0;
9817
9818                 /*Set extension header PDU type and Qos. */
9819                 if (!gtp_psc_m)
9820                         gtp_psc_m = &rte_flow_item_gtp_psc_mask;
9821                 dw_0.w32 = 0;
9822                 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_m->hdr.type);
9823                 dw_0.qfi = gtp_psc_m->hdr.qfi;
9824                 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_first_ext_dw_0,
9825                          rte_cpu_to_be_32(dw_0.w32));
9826                 dw_0.w32 = 0;
9827                 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_v->hdr.type &
9828                                                         gtp_psc_m->hdr.type);
9829                 dw_0.qfi = gtp_psc_v->hdr.qfi & gtp_psc_m->hdr.qfi;
9830                 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_first_ext_dw_0,
9831                          rte_cpu_to_be_32(dw_0.w32));
9832         }
9833         return 0;
9834 }
9835
9836 /**
9837  * Add eCPRI item to matcher and to the value.
9838  *
9839  * @param[in] dev
9840  *   The devich to configure through.
9841  * @param[in, out] matcher
9842  *   Flow matcher.
9843  * @param[in, out] key
9844  *   Flow matcher value.
9845  * @param[in] item
9846  *   Flow pattern to translate.
9847  * @param[in] last_item
9848  *   Last item flags.
9849  */
9850 static void
9851 flow_dv_translate_item_ecpri(struct rte_eth_dev *dev, void *matcher,
9852                              void *key, const struct rte_flow_item *item,
9853                              uint64_t last_item)
9854 {
9855         struct mlx5_priv *priv = dev->data->dev_private;
9856         const struct rte_flow_item_ecpri *ecpri_m = item->mask;
9857         const struct rte_flow_item_ecpri *ecpri_v = item->spec;
9858         struct rte_ecpri_common_hdr common;
9859         void *misc4_m = MLX5_ADDR_OF(fte_match_param, matcher,
9860                                      misc_parameters_4);
9861         void *misc4_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_4);
9862         uint32_t *samples;
9863         void *dw_m;
9864         void *dw_v;
9865
9866         /*
9867          * In case of eCPRI over Ethernet, if EtherType is not specified,
9868          * match on eCPRI EtherType implicitly.
9869          */
9870         if (last_item & MLX5_FLOW_LAYER_OUTER_L2) {
9871                 void *hdrs_m, *hdrs_v, *l2m, *l2v;
9872
9873                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9874                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9875                 l2m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, ethertype);
9876                 l2v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
9877                 if (*(uint16_t *)l2m == 0 && *(uint16_t *)l2v == 0) {
9878                         *(uint16_t *)l2m = UINT16_MAX;
9879                         *(uint16_t *)l2v = RTE_BE16(RTE_ETHER_TYPE_ECPRI);
9880                 }
9881         }
9882         if (!ecpri_v)
9883                 return;
9884         if (!ecpri_m)
9885                 ecpri_m = &rte_flow_item_ecpri_mask;
9886         /*
9887          * Maximal four DW samples are supported in a single matching now.
9888          * Two are used now for a eCPRI matching:
9889          * 1. Type: one byte, mask should be 0x00ff0000 in network order
9890          * 2. ID of a message: one or two bytes, mask 0xffff0000 or 0xff000000
9891          *    if any.
9892          */
9893         if (!ecpri_m->hdr.common.u32)
9894                 return;
9895         samples = priv->sh->fp[MLX5_FLEX_PARSER_ECPRI_0].ids;
9896         /* Need to take the whole DW as the mask to fill the entry. */
9897         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
9898                             prog_sample_field_value_0);
9899         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
9900                             prog_sample_field_value_0);
9901         /* Already big endian (network order) in the header. */
9902         *(uint32_t *)dw_m = ecpri_m->hdr.common.u32;
9903         *(uint32_t *)dw_v = ecpri_v->hdr.common.u32 & ecpri_m->hdr.common.u32;
9904         /* Sample#0, used for matching type, offset 0. */
9905         MLX5_SET(fte_match_set_misc4, misc4_m,
9906                  prog_sample_field_id_0, samples[0]);
9907         /* It makes no sense to set the sample ID in the mask field. */
9908         MLX5_SET(fte_match_set_misc4, misc4_v,
9909                  prog_sample_field_id_0, samples[0]);
9910         /*
9911          * Checking if message body part needs to be matched.
9912          * Some wildcard rules only matching type field should be supported.
9913          */
9914         if (ecpri_m->hdr.dummy[0]) {
9915                 common.u32 = rte_be_to_cpu_32(ecpri_v->hdr.common.u32);
9916                 switch (common.type) {
9917                 case RTE_ECPRI_MSG_TYPE_IQ_DATA:
9918                 case RTE_ECPRI_MSG_TYPE_RTC_CTRL:
9919                 case RTE_ECPRI_MSG_TYPE_DLY_MSR:
9920                         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
9921                                             prog_sample_field_value_1);
9922                         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
9923                                             prog_sample_field_value_1);
9924                         *(uint32_t *)dw_m = ecpri_m->hdr.dummy[0];
9925                         *(uint32_t *)dw_v = ecpri_v->hdr.dummy[0] &
9926                                             ecpri_m->hdr.dummy[0];
9927                         /* Sample#1, to match message body, offset 4. */
9928                         MLX5_SET(fte_match_set_misc4, misc4_m,
9929                                  prog_sample_field_id_1, samples[1]);
9930                         MLX5_SET(fte_match_set_misc4, misc4_v,
9931                                  prog_sample_field_id_1, samples[1]);
9932                         break;
9933                 default:
9934                         /* Others, do not match any sample ID. */
9935                         break;
9936                 }
9937         }
9938 }
9939
9940 /*
9941  * Add connection tracking status item to matcher
9942  *
9943  * @param[in] dev
9944  *   The devich to configure through.
9945  * @param[in, out] matcher
9946  *   Flow matcher.
9947  * @param[in, out] key
9948  *   Flow matcher value.
9949  * @param[in] item
9950  *   Flow pattern to translate.
9951  */
9952 static void
9953 flow_dv_translate_item_aso_ct(struct rte_eth_dev *dev,
9954                               void *matcher, void *key,
9955                               const struct rte_flow_item *item)
9956 {
9957         uint32_t reg_value = 0;
9958         int reg_id;
9959         /* 8LSB 0b 11/0000/11, middle 4 bits are reserved. */
9960         uint32_t reg_mask = 0;
9961         const struct rte_flow_item_conntrack *spec = item->spec;
9962         const struct rte_flow_item_conntrack *mask = item->mask;
9963         uint32_t flags;
9964         struct rte_flow_error error;
9965
9966         if (!mask)
9967                 mask = &rte_flow_item_conntrack_mask;
9968         if (!spec || !mask->flags)
9969                 return;
9970         flags = spec->flags & mask->flags;
9971         /* The conflict should be checked in the validation. */
9972         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID)
9973                 reg_value |= MLX5_CT_SYNDROME_VALID;
9974         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
9975                 reg_value |= MLX5_CT_SYNDROME_STATE_CHANGE;
9976         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID)
9977                 reg_value |= MLX5_CT_SYNDROME_INVALID;
9978         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)
9979                 reg_value |= MLX5_CT_SYNDROME_TRAP;
9980         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
9981                 reg_value |= MLX5_CT_SYNDROME_BAD_PACKET;
9982         if (mask->flags & (RTE_FLOW_CONNTRACK_PKT_STATE_VALID |
9983                            RTE_FLOW_CONNTRACK_PKT_STATE_INVALID |
9984                            RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED))
9985                 reg_mask |= 0xc0;
9986         if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
9987                 reg_mask |= MLX5_CT_SYNDROME_STATE_CHANGE;
9988         if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
9989                 reg_mask |= MLX5_CT_SYNDROME_BAD_PACKET;
9990         /* The REG_C_x value could be saved during startup. */
9991         reg_id = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, &error);
9992         if (reg_id == REG_NON)
9993                 return;
9994         flow_dv_match_meta_reg(matcher, key, (enum modify_reg)reg_id,
9995                                reg_value, reg_mask);
9996 }
9997
9998 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
9999
10000 #define HEADER_IS_ZERO(match_criteria, headers)                              \
10001         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
10002                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
10003
10004 /**
10005  * Calculate flow matcher enable bitmap.
10006  *
10007  * @param match_criteria
10008  *   Pointer to flow matcher criteria.
10009  *
10010  * @return
10011  *   Bitmap of enabled fields.
10012  */
10013 static uint8_t
10014 flow_dv_matcher_enable(uint32_t *match_criteria)
10015 {
10016         uint8_t match_criteria_enable;
10017
10018         match_criteria_enable =
10019                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
10020                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
10021         match_criteria_enable |=
10022                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
10023                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
10024         match_criteria_enable |=
10025                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
10026                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
10027         match_criteria_enable |=
10028                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
10029                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
10030         match_criteria_enable |=
10031                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
10032                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
10033         match_criteria_enable |=
10034                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_4)) <<
10035                 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT;
10036         match_criteria_enable |=
10037                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_5)) <<
10038                 MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT;
10039         return match_criteria_enable;
10040 }
10041
10042 static void
10043 __flow_dv_adjust_buf_size(size_t *size, uint8_t match_criteria)
10044 {
10045         /*
10046          * Check flow matching criteria first, subtract misc5/4 length if flow
10047          * doesn't own misc5/4 parameters. In some old rdma-core releases,
10048          * misc5/4 are not supported, and matcher creation failure is expected
10049          * w/o subtration. If misc5 is provided, misc4 must be counted in since
10050          * misc5 is right after misc4.
10051          */
10052         if (!(match_criteria & (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT))) {
10053                 *size = MLX5_ST_SZ_BYTES(fte_match_param) -
10054                         MLX5_ST_SZ_BYTES(fte_match_set_misc5);
10055                 if (!(match_criteria & (1 <<
10056                         MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT))) {
10057                         *size -= MLX5_ST_SZ_BYTES(fte_match_set_misc4);
10058                 }
10059         }
10060 }
10061
10062 static struct mlx5_list_entry *
10063 flow_dv_matcher_clone_cb(void *tool_ctx __rte_unused,
10064                          struct mlx5_list_entry *entry, void *cb_ctx)
10065 {
10066         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10067         struct mlx5_flow_dv_matcher *ref = ctx->data;
10068         struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10069                                                             typeof(*tbl), tbl);
10070         struct mlx5_flow_dv_matcher *resource = mlx5_malloc(MLX5_MEM_ANY,
10071                                                             sizeof(*resource),
10072                                                             0, SOCKET_ID_ANY);
10073
10074         if (!resource) {
10075                 rte_flow_error_set(ctx->error, ENOMEM,
10076                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10077                                    "cannot create matcher");
10078                 return NULL;
10079         }
10080         memcpy(resource, entry, sizeof(*resource));
10081         resource->tbl = &tbl->tbl;
10082         return &resource->entry;
10083 }
10084
10085 static void
10086 flow_dv_matcher_clone_free_cb(void *tool_ctx __rte_unused,
10087                              struct mlx5_list_entry *entry)
10088 {
10089         mlx5_free(entry);
10090 }
10091
10092 struct mlx5_list_entry *
10093 flow_dv_tbl_create_cb(void *tool_ctx, void *cb_ctx)
10094 {
10095         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10096         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10097         struct rte_eth_dev *dev = ctx->dev;
10098         struct mlx5_flow_tbl_data_entry *tbl_data;
10099         struct mlx5_flow_tbl_tunnel_prm *tt_prm = ctx->data2;
10100         struct rte_flow_error *error = ctx->error;
10101         union mlx5_flow_tbl_key key = { .v64 = *(uint64_t *)(ctx->data) };
10102         struct mlx5_flow_tbl_resource *tbl;
10103         void *domain;
10104         uint32_t idx = 0;
10105         int ret;
10106
10107         tbl_data = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10108         if (!tbl_data) {
10109                 rte_flow_error_set(error, ENOMEM,
10110                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10111                                    NULL,
10112                                    "cannot allocate flow table data entry");
10113                 return NULL;
10114         }
10115         tbl_data->idx = idx;
10116         tbl_data->tunnel = tt_prm->tunnel;
10117         tbl_data->group_id = tt_prm->group_id;
10118         tbl_data->external = !!tt_prm->external;
10119         tbl_data->tunnel_offload = is_tunnel_offload_active(dev);
10120         tbl_data->is_egress = !!key.is_egress;
10121         tbl_data->is_transfer = !!key.is_fdb;
10122         tbl_data->dummy = !!key.dummy;
10123         tbl_data->level = key.level;
10124         tbl_data->id = key.id;
10125         tbl = &tbl_data->tbl;
10126         if (key.dummy)
10127                 return &tbl_data->entry;
10128         if (key.is_fdb)
10129                 domain = sh->fdb_domain;
10130         else if (key.is_egress)
10131                 domain = sh->tx_domain;
10132         else
10133                 domain = sh->rx_domain;
10134         ret = mlx5_flow_os_create_flow_tbl(domain, key.level, &tbl->obj);
10135         if (ret) {
10136                 rte_flow_error_set(error, ENOMEM,
10137                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10138                                    NULL, "cannot create flow table object");
10139                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10140                 return NULL;
10141         }
10142         if (key.level != 0) {
10143                 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
10144                                         (tbl->obj, &tbl_data->jump.action);
10145                 if (ret) {
10146                         rte_flow_error_set(error, ENOMEM,
10147                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10148                                            NULL,
10149                                            "cannot create flow jump action");
10150                         mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10151                         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10152                         return NULL;
10153                 }
10154         }
10155         MKSTR(matcher_name, "%s_%s_%u_%u_matcher_list",
10156               key.is_fdb ? "FDB" : "NIC", key.is_egress ? "egress" : "ingress",
10157               key.level, key.id);
10158         tbl_data->matchers = mlx5_list_create(matcher_name, sh, true,
10159                                               flow_dv_matcher_create_cb,
10160                                               flow_dv_matcher_match_cb,
10161                                               flow_dv_matcher_remove_cb,
10162                                               flow_dv_matcher_clone_cb,
10163                                               flow_dv_matcher_clone_free_cb);
10164         if (!tbl_data->matchers) {
10165                 rte_flow_error_set(error, ENOMEM,
10166                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10167                                    NULL,
10168                                    "cannot create tbl matcher list");
10169                 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10170                 mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10171                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10172                 return NULL;
10173         }
10174         return &tbl_data->entry;
10175 }
10176
10177 int
10178 flow_dv_tbl_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10179                      void *cb_ctx)
10180 {
10181         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10182         struct mlx5_flow_tbl_data_entry *tbl_data =
10183                 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10184         union mlx5_flow_tbl_key key = { .v64 =  *(uint64_t *)(ctx->data) };
10185
10186         return tbl_data->level != key.level ||
10187                tbl_data->id != key.id ||
10188                tbl_data->dummy != key.dummy ||
10189                tbl_data->is_transfer != !!key.is_fdb ||
10190                tbl_data->is_egress != !!key.is_egress;
10191 }
10192
10193 struct mlx5_list_entry *
10194 flow_dv_tbl_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10195                       void *cb_ctx)
10196 {
10197         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10198         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10199         struct mlx5_flow_tbl_data_entry *tbl_data;
10200         struct rte_flow_error *error = ctx->error;
10201         uint32_t idx = 0;
10202
10203         tbl_data = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10204         if (!tbl_data) {
10205                 rte_flow_error_set(error, ENOMEM,
10206                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10207                                    NULL,
10208                                    "cannot allocate flow table data entry");
10209                 return NULL;
10210         }
10211         memcpy(tbl_data, oentry, sizeof(*tbl_data));
10212         tbl_data->idx = idx;
10213         return &tbl_data->entry;
10214 }
10215
10216 void
10217 flow_dv_tbl_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10218 {
10219         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10220         struct mlx5_flow_tbl_data_entry *tbl_data =
10221                     container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10222
10223         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10224 }
10225
10226 /**
10227  * Get a flow table.
10228  *
10229  * @param[in, out] dev
10230  *   Pointer to rte_eth_dev structure.
10231  * @param[in] table_level
10232  *   Table level to use.
10233  * @param[in] egress
10234  *   Direction of the table.
10235  * @param[in] transfer
10236  *   E-Switch or NIC flow.
10237  * @param[in] dummy
10238  *   Dummy entry for dv API.
10239  * @param[in] table_id
10240  *   Table id to use.
10241  * @param[out] error
10242  *   pointer to error structure.
10243  *
10244  * @return
10245  *   Returns tables resource based on the index, NULL in case of failed.
10246  */
10247 struct mlx5_flow_tbl_resource *
10248 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
10249                          uint32_t table_level, uint8_t egress,
10250                          uint8_t transfer,
10251                          bool external,
10252                          const struct mlx5_flow_tunnel *tunnel,
10253                          uint32_t group_id, uint8_t dummy,
10254                          uint32_t table_id,
10255                          struct rte_flow_error *error)
10256 {
10257         struct mlx5_priv *priv = dev->data->dev_private;
10258         union mlx5_flow_tbl_key table_key = {
10259                 {
10260                         .level = table_level,
10261                         .id = table_id,
10262                         .reserved = 0,
10263                         .dummy = !!dummy,
10264                         .is_fdb = !!transfer,
10265                         .is_egress = !!egress,
10266                 }
10267         };
10268         struct mlx5_flow_tbl_tunnel_prm tt_prm = {
10269                 .tunnel = tunnel,
10270                 .group_id = group_id,
10271                 .external = external,
10272         };
10273         struct mlx5_flow_cb_ctx ctx = {
10274                 .dev = dev,
10275                 .error = error,
10276                 .data = &table_key.v64,
10277                 .data2 = &tt_prm,
10278         };
10279         struct mlx5_list_entry *entry;
10280         struct mlx5_flow_tbl_data_entry *tbl_data;
10281
10282         entry = mlx5_hlist_register(priv->sh->flow_tbls, table_key.v64, &ctx);
10283         if (!entry) {
10284                 rte_flow_error_set(error, ENOMEM,
10285                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10286                                    "cannot get table");
10287                 return NULL;
10288         }
10289         DRV_LOG(DEBUG, "table_level %u table_id %u "
10290                 "tunnel %u group %u registered.",
10291                 table_level, table_id,
10292                 tunnel ? tunnel->tunnel_id : 0, group_id);
10293         tbl_data = container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10294         return &tbl_data->tbl;
10295 }
10296
10297 void
10298 flow_dv_tbl_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10299 {
10300         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10301         struct mlx5_flow_tbl_data_entry *tbl_data =
10302                     container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10303
10304         MLX5_ASSERT(entry && sh);
10305         if (tbl_data->jump.action)
10306                 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10307         if (tbl_data->tbl.obj)
10308                 mlx5_flow_os_destroy_flow_tbl(tbl_data->tbl.obj);
10309         if (tbl_data->tunnel_offload && tbl_data->external) {
10310                 struct mlx5_list_entry *he;
10311                 struct mlx5_hlist *tunnel_grp_hash;
10312                 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
10313                 union tunnel_tbl_key tunnel_key = {
10314                         .tunnel_id = tbl_data->tunnel ?
10315                                         tbl_data->tunnel->tunnel_id : 0,
10316                         .group = tbl_data->group_id
10317                 };
10318                 uint32_t table_level = tbl_data->level;
10319                 struct mlx5_flow_cb_ctx ctx = {
10320                         .data = (void *)&tunnel_key.val,
10321                 };
10322
10323                 tunnel_grp_hash = tbl_data->tunnel ?
10324                                         tbl_data->tunnel->groups :
10325                                         thub->groups;
10326                 he = mlx5_hlist_lookup(tunnel_grp_hash, tunnel_key.val, &ctx);
10327                 if (he)
10328                         mlx5_hlist_unregister(tunnel_grp_hash, he);
10329                 DRV_LOG(DEBUG,
10330                         "table_level %u id %u tunnel %u group %u released.",
10331                         table_level,
10332                         tbl_data->id,
10333                         tbl_data->tunnel ?
10334                         tbl_data->tunnel->tunnel_id : 0,
10335                         tbl_data->group_id);
10336         }
10337         mlx5_list_destroy(tbl_data->matchers);
10338         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10339 }
10340
10341 /**
10342  * Release a flow table.
10343  *
10344  * @param[in] sh
10345  *   Pointer to device shared structure.
10346  * @param[in] tbl
10347  *   Table resource to be released.
10348  *
10349  * @return
10350  *   Returns 0 if table was released, else return 1;
10351  */
10352 static int
10353 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
10354                              struct mlx5_flow_tbl_resource *tbl)
10355 {
10356         struct mlx5_flow_tbl_data_entry *tbl_data =
10357                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10358
10359         if (!tbl)
10360                 return 0;
10361         return mlx5_hlist_unregister(sh->flow_tbls, &tbl_data->entry);
10362 }
10363
10364 int
10365 flow_dv_matcher_match_cb(void *tool_ctx __rte_unused,
10366                          struct mlx5_list_entry *entry, void *cb_ctx)
10367 {
10368         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10369         struct mlx5_flow_dv_matcher *ref = ctx->data;
10370         struct mlx5_flow_dv_matcher *cur = container_of(entry, typeof(*cur),
10371                                                         entry);
10372
10373         return cur->crc != ref->crc ||
10374                cur->priority != ref->priority ||
10375                memcmp((const void *)cur->mask.buf,
10376                       (const void *)ref->mask.buf, ref->mask.size);
10377 }
10378
10379 struct mlx5_list_entry *
10380 flow_dv_matcher_create_cb(void *tool_ctx, void *cb_ctx)
10381 {
10382         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10383         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10384         struct mlx5_flow_dv_matcher *ref = ctx->data;
10385         struct mlx5_flow_dv_matcher *resource;
10386         struct mlx5dv_flow_matcher_attr dv_attr = {
10387                 .type = IBV_FLOW_ATTR_NORMAL,
10388                 .match_mask = (void *)&ref->mask,
10389         };
10390         struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10391                                                             typeof(*tbl), tbl);
10392         int ret;
10393
10394         resource = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*resource), 0,
10395                                SOCKET_ID_ANY);
10396         if (!resource) {
10397                 rte_flow_error_set(ctx->error, ENOMEM,
10398                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10399                                    "cannot create matcher");
10400                 return NULL;
10401         }
10402         *resource = *ref;
10403         dv_attr.match_criteria_enable =
10404                 flow_dv_matcher_enable(resource->mask.buf);
10405         __flow_dv_adjust_buf_size(&ref->mask.size,
10406                                   dv_attr.match_criteria_enable);
10407         dv_attr.priority = ref->priority;
10408         if (tbl->is_egress)
10409                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
10410         ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
10411                                                tbl->tbl.obj,
10412                                                &resource->matcher_object);
10413         if (ret) {
10414                 mlx5_free(resource);
10415                 rte_flow_error_set(ctx->error, ENOMEM,
10416                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10417                                    "cannot create matcher");
10418                 return NULL;
10419         }
10420         return &resource->entry;
10421 }
10422
10423 /**
10424  * Register the flow matcher.
10425  *
10426  * @param[in, out] dev
10427  *   Pointer to rte_eth_dev structure.
10428  * @param[in, out] matcher
10429  *   Pointer to flow matcher.
10430  * @param[in, out] key
10431  *   Pointer to flow table key.
10432  * @parm[in, out] dev_flow
10433  *   Pointer to the dev_flow.
10434  * @param[out] error
10435  *   pointer to error structure.
10436  *
10437  * @return
10438  *   0 on success otherwise -errno and errno is set.
10439  */
10440 static int
10441 flow_dv_matcher_register(struct rte_eth_dev *dev,
10442                          struct mlx5_flow_dv_matcher *ref,
10443                          union mlx5_flow_tbl_key *key,
10444                          struct mlx5_flow *dev_flow,
10445                          const struct mlx5_flow_tunnel *tunnel,
10446                          uint32_t group_id,
10447                          struct rte_flow_error *error)
10448 {
10449         struct mlx5_list_entry *entry;
10450         struct mlx5_flow_dv_matcher *resource;
10451         struct mlx5_flow_tbl_resource *tbl;
10452         struct mlx5_flow_tbl_data_entry *tbl_data;
10453         struct mlx5_flow_cb_ctx ctx = {
10454                 .error = error,
10455                 .data = ref,
10456         };
10457         /**
10458          * tunnel offload API requires this registration for cases when
10459          * tunnel match rule was inserted before tunnel set rule.
10460          */
10461         tbl = flow_dv_tbl_resource_get(dev, key->level,
10462                                        key->is_egress, key->is_fdb,
10463                                        dev_flow->external, tunnel,
10464                                        group_id, 0, key->id, error);
10465         if (!tbl)
10466                 return -rte_errno;      /* No need to refill the error info */
10467         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10468         ref->tbl = tbl;
10469         entry = mlx5_list_register(tbl_data->matchers, &ctx);
10470         if (!entry) {
10471                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
10472                 return rte_flow_error_set(error, ENOMEM,
10473                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10474                                           "cannot allocate ref memory");
10475         }
10476         resource = container_of(entry, typeof(*resource), entry);
10477         dev_flow->handle->dvh.matcher = resource;
10478         return 0;
10479 }
10480
10481 struct mlx5_list_entry *
10482 flow_dv_tag_create_cb(void *tool_ctx, void *cb_ctx)
10483 {
10484         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10485         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10486         struct mlx5_flow_dv_tag_resource *entry;
10487         uint32_t idx = 0;
10488         int ret;
10489
10490         entry = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10491         if (!entry) {
10492                 rte_flow_error_set(ctx->error, ENOMEM,
10493                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10494                                    "cannot allocate resource memory");
10495                 return NULL;
10496         }
10497         entry->idx = idx;
10498         entry->tag_id = *(uint32_t *)(ctx->data);
10499         ret = mlx5_flow_os_create_flow_action_tag(entry->tag_id,
10500                                                   &entry->action);
10501         if (ret) {
10502                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], idx);
10503                 rte_flow_error_set(ctx->error, ENOMEM,
10504                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10505                                    NULL, "cannot create action");
10506                 return NULL;
10507         }
10508         return &entry->entry;
10509 }
10510
10511 int
10512 flow_dv_tag_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10513                      void *cb_ctx)
10514 {
10515         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10516         struct mlx5_flow_dv_tag_resource *tag =
10517                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10518
10519         return *(uint32_t *)(ctx->data) != tag->tag_id;
10520 }
10521
10522 struct mlx5_list_entry *
10523 flow_dv_tag_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10524                      void *cb_ctx)
10525 {
10526         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10527         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10528         struct mlx5_flow_dv_tag_resource *entry;
10529         uint32_t idx = 0;
10530
10531         entry = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10532         if (!entry) {
10533                 rte_flow_error_set(ctx->error, ENOMEM,
10534                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10535                                    "cannot allocate tag resource memory");
10536                 return NULL;
10537         }
10538         memcpy(entry, oentry, sizeof(*entry));
10539         entry->idx = idx;
10540         return &entry->entry;
10541 }
10542
10543 void
10544 flow_dv_tag_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10545 {
10546         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10547         struct mlx5_flow_dv_tag_resource *tag =
10548                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10549
10550         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10551 }
10552
10553 /**
10554  * Find existing tag resource or create and register a new one.
10555  *
10556  * @param dev[in, out]
10557  *   Pointer to rte_eth_dev structure.
10558  * @param[in, out] tag_be24
10559  *   Tag value in big endian then R-shift 8.
10560  * @parm[in, out] dev_flow
10561  *   Pointer to the dev_flow.
10562  * @param[out] error
10563  *   pointer to error structure.
10564  *
10565  * @return
10566  *   0 on success otherwise -errno and errno is set.
10567  */
10568 static int
10569 flow_dv_tag_resource_register
10570                         (struct rte_eth_dev *dev,
10571                          uint32_t tag_be24,
10572                          struct mlx5_flow *dev_flow,
10573                          struct rte_flow_error *error)
10574 {
10575         struct mlx5_priv *priv = dev->data->dev_private;
10576         struct mlx5_flow_dv_tag_resource *resource;
10577         struct mlx5_list_entry *entry;
10578         struct mlx5_flow_cb_ctx ctx = {
10579                                         .error = error,
10580                                         .data = &tag_be24,
10581                                         };
10582         struct mlx5_hlist *tag_table;
10583
10584         tag_table = flow_dv_hlist_prepare(priv->sh, &priv->sh->tag_table,
10585                                       "tags",
10586                                       MLX5_TAGS_HLIST_ARRAY_SIZE,
10587                                       false, false, priv->sh,
10588                                       flow_dv_tag_create_cb,
10589                                       flow_dv_tag_match_cb,
10590                                       flow_dv_tag_remove_cb,
10591                                       flow_dv_tag_clone_cb,
10592                                       flow_dv_tag_clone_free_cb);
10593         if (unlikely(!tag_table))
10594                 return -rte_errno;
10595         entry = mlx5_hlist_register(tag_table, tag_be24, &ctx);
10596         if (entry) {
10597                 resource = container_of(entry, struct mlx5_flow_dv_tag_resource,
10598                                         entry);
10599                 dev_flow->handle->dvh.rix_tag = resource->idx;
10600                 dev_flow->dv.tag_resource = resource;
10601                 return 0;
10602         }
10603         return -rte_errno;
10604 }
10605
10606 void
10607 flow_dv_tag_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10608 {
10609         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10610         struct mlx5_flow_dv_tag_resource *tag =
10611                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10612
10613         MLX5_ASSERT(tag && sh && tag->action);
10614         claim_zero(mlx5_flow_os_destroy_flow_action(tag->action));
10615         DRV_LOG(DEBUG, "Tag %p: removed.", (void *)tag);
10616         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10617 }
10618
10619 /**
10620  * Release the tag.
10621  *
10622  * @param dev
10623  *   Pointer to Ethernet device.
10624  * @param tag_idx
10625  *   Tag index.
10626  *
10627  * @return
10628  *   1 while a reference on it exists, 0 when freed.
10629  */
10630 static int
10631 flow_dv_tag_release(struct rte_eth_dev *dev,
10632                     uint32_t tag_idx)
10633 {
10634         struct mlx5_priv *priv = dev->data->dev_private;
10635         struct mlx5_flow_dv_tag_resource *tag;
10636
10637         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG], tag_idx);
10638         if (!tag)
10639                 return 0;
10640         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
10641                 dev->data->port_id, (void *)tag, tag->entry.ref_cnt);
10642         return mlx5_hlist_unregister(priv->sh->tag_table, &tag->entry);
10643 }
10644
10645 /**
10646  * Translate action PORT_ID / REPRESENTED_PORT to vport.
10647  *
10648  * @param[in] dev
10649  *   Pointer to rte_eth_dev structure.
10650  * @param[in] action
10651  *   Pointer to action PORT_ID / REPRESENTED_PORT.
10652  * @param[out] dst_port_id
10653  *   The target port ID.
10654  * @param[out] error
10655  *   Pointer to the error structure.
10656  *
10657  * @return
10658  *   0 on success, a negative errno value otherwise and rte_errno is set.
10659  */
10660 static int
10661 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
10662                                  const struct rte_flow_action *action,
10663                                  uint32_t *dst_port_id,
10664                                  struct rte_flow_error *error)
10665 {
10666         uint32_t port;
10667         struct mlx5_priv *priv;
10668
10669         switch (action->type) {
10670         case RTE_FLOW_ACTION_TYPE_PORT_ID: {
10671                 const struct rte_flow_action_port_id *conf;
10672
10673                 conf = (const struct rte_flow_action_port_id *)action->conf;
10674                 port = conf->original ? dev->data->port_id : conf->id;
10675                 break;
10676         }
10677         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT: {
10678                 const struct rte_flow_action_ethdev *ethdev;
10679
10680                 ethdev = (const struct rte_flow_action_ethdev *)action->conf;
10681                 port = ethdev->port_id;
10682                 break;
10683         }
10684         default:
10685                 MLX5_ASSERT(false);
10686                 return rte_flow_error_set(error, EINVAL,
10687                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
10688                                           "unknown E-Switch action");
10689         }
10690
10691         priv = mlx5_port_to_eswitch_info(port, false);
10692         if (!priv)
10693                 return rte_flow_error_set(error, -rte_errno,
10694                                           RTE_FLOW_ERROR_TYPE_ACTION,
10695                                           NULL,
10696                                           "No eswitch info was found for port");
10697 #ifdef HAVE_MLX5DV_DR_CREATE_DEST_IB_PORT
10698         /*
10699          * This parameter is transferred to
10700          * mlx5dv_dr_action_create_dest_ib_port().
10701          */
10702         *dst_port_id = priv->dev_port;
10703 #else
10704         /*
10705          * Legacy mode, no LAG configurations is supported.
10706          * This parameter is transferred to
10707          * mlx5dv_dr_action_create_dest_vport().
10708          */
10709         *dst_port_id = priv->vport_id;
10710 #endif
10711         return 0;
10712 }
10713
10714 /**
10715  * Create a counter with aging configuration.
10716  *
10717  * @param[in] dev
10718  *   Pointer to rte_eth_dev structure.
10719  * @param[in] dev_flow
10720  *   Pointer to the mlx5_flow.
10721  * @param[out] count
10722  *   Pointer to the counter action configuration.
10723  * @param[in] age
10724  *   Pointer to the aging action configuration.
10725  *
10726  * @return
10727  *   Index to flow counter on success, 0 otherwise.
10728  */
10729 static uint32_t
10730 flow_dv_translate_create_counter(struct rte_eth_dev *dev,
10731                                 struct mlx5_flow *dev_flow,
10732                                 const struct rte_flow_action_count *count
10733                                         __rte_unused,
10734                                 const struct rte_flow_action_age *age)
10735 {
10736         uint32_t counter;
10737         struct mlx5_age_param *age_param;
10738
10739         counter = flow_dv_counter_alloc(dev, !!age);
10740         if (!counter || age == NULL)
10741                 return counter;
10742         age_param = flow_dv_counter_idx_get_age(dev, counter);
10743         age_param->context = age->context ? age->context :
10744                 (void *)(uintptr_t)(dev_flow->flow_idx);
10745         age_param->timeout = age->timeout;
10746         age_param->port_id = dev->data->port_id;
10747         __atomic_store_n(&age_param->sec_since_last_hit, 0, __ATOMIC_RELAXED);
10748         __atomic_store_n(&age_param->state, AGE_CANDIDATE, __ATOMIC_RELAXED);
10749         return counter;
10750 }
10751
10752 /**
10753  * Add Tx queue matcher
10754  *
10755  * @param[in] dev
10756  *   Pointer to the dev struct.
10757  * @param[in, out] matcher
10758  *   Flow matcher.
10759  * @param[in, out] key
10760  *   Flow matcher value.
10761  * @param[in] item
10762  *   Flow pattern to translate.
10763  * @param[in] inner
10764  *   Item is inner pattern.
10765  */
10766 static void
10767 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
10768                                 void *matcher, void *key,
10769                                 const struct rte_flow_item *item)
10770 {
10771         const struct mlx5_rte_flow_item_tx_queue *queue_m;
10772         const struct mlx5_rte_flow_item_tx_queue *queue_v;
10773         void *misc_m =
10774                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
10775         void *misc_v =
10776                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
10777         struct mlx5_txq_ctrl *txq;
10778         uint32_t queue, mask;
10779
10780         queue_m = (const void *)item->mask;
10781         queue_v = (const void *)item->spec;
10782         if (!queue_v)
10783                 return;
10784         txq = mlx5_txq_get(dev, queue_v->queue);
10785         if (!txq)
10786                 return;
10787         if (txq->type == MLX5_TXQ_TYPE_HAIRPIN)
10788                 queue = txq->obj->sq->id;
10789         else
10790                 queue = txq->obj->sq_obj.sq->id;
10791         mask = queue_m == NULL ? UINT32_MAX : queue_m->queue;
10792         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, mask);
10793         MLX5_SET(fte_match_set_misc, misc_v, source_sqn, queue & mask);
10794         mlx5_txq_release(dev, queue_v->queue);
10795 }
10796
10797 /**
10798  * Set the hash fields according to the @p flow information.
10799  *
10800  * @param[in] dev_flow
10801  *   Pointer to the mlx5_flow.
10802  * @param[in] rss_desc
10803  *   Pointer to the mlx5_flow_rss_desc.
10804  */
10805 static void
10806 flow_dv_hashfields_set(struct mlx5_flow *dev_flow,
10807                        struct mlx5_flow_rss_desc *rss_desc)
10808 {
10809         uint64_t items = dev_flow->handle->layers;
10810         int rss_inner = 0;
10811         uint64_t rss_types = rte_eth_rss_hf_refine(rss_desc->types);
10812
10813         dev_flow->hash_fields = 0;
10814 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
10815         if (rss_desc->level >= 2)
10816                 rss_inner = 1;
10817 #endif
10818         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
10819             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
10820                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
10821                         if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
10822                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
10823                         else if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
10824                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
10825                         else
10826                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
10827                 }
10828         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
10829                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
10830                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
10831                         if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
10832                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
10833                         else if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
10834                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
10835                         else
10836                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
10837                 }
10838         }
10839         if (dev_flow->hash_fields == 0)
10840                 /*
10841                  * There is no match between the RSS types and the
10842                  * L3 protocol (IPv4/IPv6) defined in the flow rule.
10843                  */
10844                 return;
10845         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
10846             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
10847                 if (rss_types & RTE_ETH_RSS_UDP) {
10848                         if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
10849                                 dev_flow->hash_fields |=
10850                                                 IBV_RX_HASH_SRC_PORT_UDP;
10851                         else if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
10852                                 dev_flow->hash_fields |=
10853                                                 IBV_RX_HASH_DST_PORT_UDP;
10854                         else
10855                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
10856                 }
10857         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
10858                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
10859                 if (rss_types & RTE_ETH_RSS_TCP) {
10860                         if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
10861                                 dev_flow->hash_fields |=
10862                                                 IBV_RX_HASH_SRC_PORT_TCP;
10863                         else if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
10864                                 dev_flow->hash_fields |=
10865                                                 IBV_RX_HASH_DST_PORT_TCP;
10866                         else
10867                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
10868                 }
10869         }
10870         if (rss_inner)
10871                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
10872 }
10873
10874 /**
10875  * Prepare an Rx Hash queue.
10876  *
10877  * @param dev
10878  *   Pointer to Ethernet device.
10879  * @param[in] dev_flow
10880  *   Pointer to the mlx5_flow.
10881  * @param[in] rss_desc
10882  *   Pointer to the mlx5_flow_rss_desc.
10883  * @param[out] hrxq_idx
10884  *   Hash Rx queue index.
10885  *
10886  * @return
10887  *   The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
10888  */
10889 static struct mlx5_hrxq *
10890 flow_dv_hrxq_prepare(struct rte_eth_dev *dev,
10891                      struct mlx5_flow *dev_flow,
10892                      struct mlx5_flow_rss_desc *rss_desc,
10893                      uint32_t *hrxq_idx)
10894 {
10895         struct mlx5_priv *priv = dev->data->dev_private;
10896         struct mlx5_flow_handle *dh = dev_flow->handle;
10897         struct mlx5_hrxq *hrxq;
10898
10899         MLX5_ASSERT(rss_desc->queue_num);
10900         rss_desc->key_len = MLX5_RSS_HASH_KEY_LEN;
10901         rss_desc->hash_fields = dev_flow->hash_fields;
10902         rss_desc->tunnel = !!(dh->layers & MLX5_FLOW_LAYER_TUNNEL);
10903         rss_desc->shared_rss = 0;
10904         if (rss_desc->hash_fields == 0)
10905                 rss_desc->queue_num = 1;
10906         *hrxq_idx = mlx5_hrxq_get(dev, rss_desc);
10907         if (!*hrxq_idx)
10908                 return NULL;
10909         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
10910                               *hrxq_idx);
10911         return hrxq;
10912 }
10913
10914 /**
10915  * Release sample sub action resource.
10916  *
10917  * @param[in, out] dev
10918  *   Pointer to rte_eth_dev structure.
10919  * @param[in] act_res
10920  *   Pointer to sample sub action resource.
10921  */
10922 static void
10923 flow_dv_sample_sub_actions_release(struct rte_eth_dev *dev,
10924                                    struct mlx5_flow_sub_actions_idx *act_res)
10925 {
10926         if (act_res->rix_hrxq) {
10927                 mlx5_hrxq_release(dev, act_res->rix_hrxq);
10928                 act_res->rix_hrxq = 0;
10929         }
10930         if (act_res->rix_encap_decap) {
10931                 flow_dv_encap_decap_resource_release(dev,
10932                                                      act_res->rix_encap_decap);
10933                 act_res->rix_encap_decap = 0;
10934         }
10935         if (act_res->rix_port_id_action) {
10936                 flow_dv_port_id_action_resource_release(dev,
10937                                                 act_res->rix_port_id_action);
10938                 act_res->rix_port_id_action = 0;
10939         }
10940         if (act_res->rix_tag) {
10941                 flow_dv_tag_release(dev, act_res->rix_tag);
10942                 act_res->rix_tag = 0;
10943         }
10944         if (act_res->rix_jump) {
10945                 flow_dv_jump_tbl_resource_release(dev, act_res->rix_jump);
10946                 act_res->rix_jump = 0;
10947         }
10948 }
10949
10950 int
10951 flow_dv_sample_match_cb(void *tool_ctx __rte_unused,
10952                         struct mlx5_list_entry *entry, void *cb_ctx)
10953 {
10954         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10955         struct rte_eth_dev *dev = ctx->dev;
10956         struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
10957         struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
10958                                                               typeof(*resource),
10959                                                               entry);
10960
10961         if (ctx_resource->ratio == resource->ratio &&
10962             ctx_resource->ft_type == resource->ft_type &&
10963             ctx_resource->ft_id == resource->ft_id &&
10964             ctx_resource->set_action == resource->set_action &&
10965             !memcmp((void *)&ctx_resource->sample_act,
10966                     (void *)&resource->sample_act,
10967                     sizeof(struct mlx5_flow_sub_actions_list))) {
10968                 /*
10969                  * Existing sample action should release the prepared
10970                  * sub-actions reference counter.
10971                  */
10972                 flow_dv_sample_sub_actions_release(dev,
10973                                                    &ctx_resource->sample_idx);
10974                 return 0;
10975         }
10976         return 1;
10977 }
10978
10979 struct mlx5_list_entry *
10980 flow_dv_sample_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
10981 {
10982         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10983         struct rte_eth_dev *dev = ctx->dev;
10984         struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
10985         void **sample_dv_actions = ctx_resource->sub_actions;
10986         struct mlx5_flow_dv_sample_resource *resource;
10987         struct mlx5dv_dr_flow_sampler_attr sampler_attr;
10988         struct mlx5_priv *priv = dev->data->dev_private;
10989         struct mlx5_dev_ctx_shared *sh = priv->sh;
10990         struct mlx5_flow_tbl_resource *tbl;
10991         uint32_t idx = 0;
10992         const uint32_t next_ft_step = 1;
10993         uint32_t next_ft_id = ctx_resource->ft_id + next_ft_step;
10994         uint8_t is_egress = 0;
10995         uint8_t is_transfer = 0;
10996         struct rte_flow_error *error = ctx->error;
10997
10998         /* Register new sample resource. */
10999         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11000         if (!resource) {
11001                 rte_flow_error_set(error, ENOMEM,
11002                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11003                                           NULL,
11004                                           "cannot allocate resource memory");
11005                 return NULL;
11006         }
11007         *resource = *ctx_resource;
11008         /* Create normal path table level */
11009         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11010                 is_transfer = 1;
11011         else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
11012                 is_egress = 1;
11013         tbl = flow_dv_tbl_resource_get(dev, next_ft_id,
11014                                         is_egress, is_transfer,
11015                                         true, NULL, 0, 0, 0, error);
11016         if (!tbl) {
11017                 rte_flow_error_set(error, ENOMEM,
11018                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11019                                           NULL,
11020                                           "fail to create normal path table "
11021                                           "for sample");
11022                 goto error;
11023         }
11024         resource->normal_path_tbl = tbl;
11025         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
11026                 if (!sh->default_miss_action) {
11027                         rte_flow_error_set(error, ENOMEM,
11028                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11029                                                 NULL,
11030                                                 "default miss action was not "
11031                                                 "created");
11032                         goto error;
11033                 }
11034                 sample_dv_actions[ctx_resource->sample_act.actions_num++] =
11035                                                 sh->default_miss_action;
11036         }
11037         /* Create a DR sample action */
11038         sampler_attr.sample_ratio = resource->ratio;
11039         sampler_attr.default_next_table = tbl->obj;
11040         sampler_attr.num_sample_actions = ctx_resource->sample_act.actions_num;
11041         sampler_attr.sample_actions = (struct mlx5dv_dr_action **)
11042                                                         &sample_dv_actions[0];
11043         sampler_attr.action = resource->set_action;
11044         if (mlx5_os_flow_dr_create_flow_action_sampler
11045                         (&sampler_attr, &resource->verbs_action)) {
11046                 rte_flow_error_set(error, ENOMEM,
11047                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11048                                         NULL, "cannot create sample action");
11049                 goto error;
11050         }
11051         resource->idx = idx;
11052         resource->dev = dev;
11053         return &resource->entry;
11054 error:
11055         if (resource->ft_type != MLX5DV_FLOW_TABLE_TYPE_FDB)
11056                 flow_dv_sample_sub_actions_release(dev,
11057                                                    &resource->sample_idx);
11058         if (resource->normal_path_tbl)
11059                 flow_dv_tbl_resource_release(MLX5_SH(dev),
11060                                 resource->normal_path_tbl);
11061         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_SAMPLE], idx);
11062         return NULL;
11063
11064 }
11065
11066 struct mlx5_list_entry *
11067 flow_dv_sample_clone_cb(void *tool_ctx __rte_unused,
11068                          struct mlx5_list_entry *entry __rte_unused,
11069                          void *cb_ctx)
11070 {
11071         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11072         struct rte_eth_dev *dev = ctx->dev;
11073         struct mlx5_flow_dv_sample_resource *resource;
11074         struct mlx5_priv *priv = dev->data->dev_private;
11075         struct mlx5_dev_ctx_shared *sh = priv->sh;
11076         uint32_t idx = 0;
11077
11078         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11079         if (!resource) {
11080                 rte_flow_error_set(ctx->error, ENOMEM,
11081                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11082                                           NULL,
11083                                           "cannot allocate resource memory");
11084                 return NULL;
11085         }
11086         memcpy(resource, entry, sizeof(*resource));
11087         resource->idx = idx;
11088         resource->dev = dev;
11089         return &resource->entry;
11090 }
11091
11092 void
11093 flow_dv_sample_clone_free_cb(void *tool_ctx __rte_unused,
11094                              struct mlx5_list_entry *entry)
11095 {
11096         struct mlx5_flow_dv_sample_resource *resource =
11097                                   container_of(entry, typeof(*resource), entry);
11098         struct rte_eth_dev *dev = resource->dev;
11099         struct mlx5_priv *priv = dev->data->dev_private;
11100
11101         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
11102 }
11103
11104 /**
11105  * Find existing sample resource or create and register a new one.
11106  *
11107  * @param[in, out] dev
11108  *   Pointer to rte_eth_dev structure.
11109  * @param[in] ref
11110  *   Pointer to sample resource reference.
11111  * @parm[in, out] dev_flow
11112  *   Pointer to the dev_flow.
11113  * @param[out] error
11114  *   pointer to error structure.
11115  *
11116  * @return
11117  *   0 on success otherwise -errno and errno is set.
11118  */
11119 static int
11120 flow_dv_sample_resource_register(struct rte_eth_dev *dev,
11121                          struct mlx5_flow_dv_sample_resource *ref,
11122                          struct mlx5_flow *dev_flow,
11123                          struct rte_flow_error *error)
11124 {
11125         struct mlx5_flow_dv_sample_resource *resource;
11126         struct mlx5_list_entry *entry;
11127         struct mlx5_priv *priv = dev->data->dev_private;
11128         struct mlx5_flow_cb_ctx ctx = {
11129                 .dev = dev,
11130                 .error = error,
11131                 .data = ref,
11132         };
11133
11134         entry = mlx5_list_register(priv->sh->sample_action_list, &ctx);
11135         if (!entry)
11136                 return -rte_errno;
11137         resource = container_of(entry, typeof(*resource), entry);
11138         dev_flow->handle->dvh.rix_sample = resource->idx;
11139         dev_flow->dv.sample_res = resource;
11140         return 0;
11141 }
11142
11143 int
11144 flow_dv_dest_array_match_cb(void *tool_ctx __rte_unused,
11145                             struct mlx5_list_entry *entry, void *cb_ctx)
11146 {
11147         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11148         struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11149         struct rte_eth_dev *dev = ctx->dev;
11150         struct mlx5_flow_dv_dest_array_resource *resource =
11151                                   container_of(entry, typeof(*resource), entry);
11152         uint32_t idx = 0;
11153
11154         if (ctx_resource->num_of_dest == resource->num_of_dest &&
11155             ctx_resource->ft_type == resource->ft_type &&
11156             !memcmp((void *)resource->sample_act,
11157                     (void *)ctx_resource->sample_act,
11158                    (ctx_resource->num_of_dest *
11159                    sizeof(struct mlx5_flow_sub_actions_list)))) {
11160                 /*
11161                  * Existing sample action should release the prepared
11162                  * sub-actions reference counter.
11163                  */
11164                 for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11165                         flow_dv_sample_sub_actions_release(dev,
11166                                         &ctx_resource->sample_idx[idx]);
11167                 return 0;
11168         }
11169         return 1;
11170 }
11171
11172 struct mlx5_list_entry *
11173 flow_dv_dest_array_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11174 {
11175         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11176         struct rte_eth_dev *dev = ctx->dev;
11177         struct mlx5_flow_dv_dest_array_resource *resource;
11178         struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11179         struct mlx5dv_dr_action_dest_attr *dest_attr[MLX5_MAX_DEST_NUM] = { 0 };
11180         struct mlx5dv_dr_action_dest_reformat dest_reformat[MLX5_MAX_DEST_NUM];
11181         struct mlx5_priv *priv = dev->data->dev_private;
11182         struct mlx5_dev_ctx_shared *sh = priv->sh;
11183         struct mlx5_flow_sub_actions_list *sample_act;
11184         struct mlx5dv_dr_domain *domain;
11185         uint32_t idx = 0, res_idx = 0;
11186         struct rte_flow_error *error = ctx->error;
11187         uint64_t action_flags;
11188         int ret;
11189
11190         /* Register new destination array resource. */
11191         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11192                                             &res_idx);
11193         if (!resource) {
11194                 rte_flow_error_set(error, ENOMEM,
11195                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11196                                           NULL,
11197                                           "cannot allocate resource memory");
11198                 return NULL;
11199         }
11200         *resource = *ctx_resource;
11201         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11202                 domain = sh->fdb_domain;
11203         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
11204                 domain = sh->rx_domain;
11205         else
11206                 domain = sh->tx_domain;
11207         for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11208                 dest_attr[idx] = (struct mlx5dv_dr_action_dest_attr *)
11209                                  mlx5_malloc(MLX5_MEM_ZERO,
11210                                  sizeof(struct mlx5dv_dr_action_dest_attr),
11211                                  0, SOCKET_ID_ANY);
11212                 if (!dest_attr[idx]) {
11213                         rte_flow_error_set(error, ENOMEM,
11214                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11215                                            NULL,
11216                                            "cannot allocate resource memory");
11217                         goto error;
11218                 }
11219                 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST;
11220                 sample_act = &ctx_resource->sample_act[idx];
11221                 action_flags = sample_act->action_flags;
11222                 switch (action_flags) {
11223                 case MLX5_FLOW_ACTION_QUEUE:
11224                         dest_attr[idx]->dest = sample_act->dr_queue_action;
11225                         break;
11226                 case (MLX5_FLOW_ACTION_PORT_ID | MLX5_FLOW_ACTION_ENCAP):
11227                         dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST_REFORMAT;
11228                         dest_attr[idx]->dest_reformat = &dest_reformat[idx];
11229                         dest_attr[idx]->dest_reformat->reformat =
11230                                         sample_act->dr_encap_action;
11231                         dest_attr[idx]->dest_reformat->dest =
11232                                         sample_act->dr_port_id_action;
11233                         break;
11234                 case MLX5_FLOW_ACTION_PORT_ID:
11235                         dest_attr[idx]->dest = sample_act->dr_port_id_action;
11236                         break;
11237                 case MLX5_FLOW_ACTION_JUMP:
11238                         dest_attr[idx]->dest = sample_act->dr_jump_action;
11239                         break;
11240                 default:
11241                         rte_flow_error_set(error, EINVAL,
11242                                            RTE_FLOW_ERROR_TYPE_ACTION,
11243                                            NULL,
11244                                            "unsupported actions type");
11245                         goto error;
11246                 }
11247         }
11248         /* create a dest array actioin */
11249         ret = mlx5_os_flow_dr_create_flow_action_dest_array
11250                                                 (domain,
11251                                                  resource->num_of_dest,
11252                                                  dest_attr,
11253                                                  &resource->action);
11254         if (ret) {
11255                 rte_flow_error_set(error, ENOMEM,
11256                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11257                                    NULL,
11258                                    "cannot create destination array action");
11259                 goto error;
11260         }
11261         resource->idx = res_idx;
11262         resource->dev = dev;
11263         for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11264                 mlx5_free(dest_attr[idx]);
11265         return &resource->entry;
11266 error:
11267         for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11268                 flow_dv_sample_sub_actions_release(dev,
11269                                                    &resource->sample_idx[idx]);
11270                 if (dest_attr[idx])
11271                         mlx5_free(dest_attr[idx]);
11272         }
11273         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DEST_ARRAY], res_idx);
11274         return NULL;
11275 }
11276
11277 struct mlx5_list_entry *
11278 flow_dv_dest_array_clone_cb(void *tool_ctx __rte_unused,
11279                             struct mlx5_list_entry *entry __rte_unused,
11280                             void *cb_ctx)
11281 {
11282         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11283         struct rte_eth_dev *dev = ctx->dev;
11284         struct mlx5_flow_dv_dest_array_resource *resource;
11285         struct mlx5_priv *priv = dev->data->dev_private;
11286         struct mlx5_dev_ctx_shared *sh = priv->sh;
11287         uint32_t res_idx = 0;
11288         struct rte_flow_error *error = ctx->error;
11289
11290         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11291                                       &res_idx);
11292         if (!resource) {
11293                 rte_flow_error_set(error, ENOMEM,
11294                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11295                                           NULL,
11296                                           "cannot allocate dest-array memory");
11297                 return NULL;
11298         }
11299         memcpy(resource, entry, sizeof(*resource));
11300         resource->idx = res_idx;
11301         resource->dev = dev;
11302         return &resource->entry;
11303 }
11304
11305 void
11306 flow_dv_dest_array_clone_free_cb(void *tool_ctx __rte_unused,
11307                                  struct mlx5_list_entry *entry)
11308 {
11309         struct mlx5_flow_dv_dest_array_resource *resource =
11310                         container_of(entry, typeof(*resource), entry);
11311         struct rte_eth_dev *dev = resource->dev;
11312         struct mlx5_priv *priv = dev->data->dev_private;
11313
11314         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
11315 }
11316
11317 /**
11318  * Find existing destination array resource or create and register a new one.
11319  *
11320  * @param[in, out] dev
11321  *   Pointer to rte_eth_dev structure.
11322  * @param[in] ref
11323  *   Pointer to destination array resource reference.
11324  * @parm[in, out] dev_flow
11325  *   Pointer to the dev_flow.
11326  * @param[out] error
11327  *   pointer to error structure.
11328  *
11329  * @return
11330  *   0 on success otherwise -errno and errno is set.
11331  */
11332 static int
11333 flow_dv_dest_array_resource_register(struct rte_eth_dev *dev,
11334                          struct mlx5_flow_dv_dest_array_resource *ref,
11335                          struct mlx5_flow *dev_flow,
11336                          struct rte_flow_error *error)
11337 {
11338         struct mlx5_flow_dv_dest_array_resource *resource;
11339         struct mlx5_priv *priv = dev->data->dev_private;
11340         struct mlx5_list_entry *entry;
11341         struct mlx5_flow_cb_ctx ctx = {
11342                 .dev = dev,
11343                 .error = error,
11344                 .data = ref,
11345         };
11346
11347         entry = mlx5_list_register(priv->sh->dest_array_list, &ctx);
11348         if (!entry)
11349                 return -rte_errno;
11350         resource = container_of(entry, typeof(*resource), entry);
11351         dev_flow->handle->dvh.rix_dest_array = resource->idx;
11352         dev_flow->dv.dest_array_res = resource;
11353         return 0;
11354 }
11355
11356 /**
11357  * Convert Sample action to DV specification.
11358  *
11359  * @param[in] dev
11360  *   Pointer to rte_eth_dev structure.
11361  * @param[in] action
11362  *   Pointer to sample action structure.
11363  * @param[in, out] dev_flow
11364  *   Pointer to the mlx5_flow.
11365  * @param[in] attr
11366  *   Pointer to the flow attributes.
11367  * @param[in, out] num_of_dest
11368  *   Pointer to the num of destination.
11369  * @param[in, out] sample_actions
11370  *   Pointer to sample actions list.
11371  * @param[in, out] res
11372  *   Pointer to sample resource.
11373  * @param[out] error
11374  *   Pointer to the error structure.
11375  *
11376  * @return
11377  *   0 on success, a negative errno value otherwise and rte_errno is set.
11378  */
11379 static int
11380 flow_dv_translate_action_sample(struct rte_eth_dev *dev,
11381                                 const struct rte_flow_action_sample *action,
11382                                 struct mlx5_flow *dev_flow,
11383                                 const struct rte_flow_attr *attr,
11384                                 uint32_t *num_of_dest,
11385                                 void **sample_actions,
11386                                 struct mlx5_flow_dv_sample_resource *res,
11387                                 struct rte_flow_error *error)
11388 {
11389         struct mlx5_priv *priv = dev->data->dev_private;
11390         const struct rte_flow_action *sub_actions;
11391         struct mlx5_flow_sub_actions_list *sample_act;
11392         struct mlx5_flow_sub_actions_idx *sample_idx;
11393         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11394         struct rte_flow *flow = dev_flow->flow;
11395         struct mlx5_flow_rss_desc *rss_desc;
11396         uint64_t action_flags = 0;
11397
11398         MLX5_ASSERT(wks);
11399         rss_desc = &wks->rss_desc;
11400         sample_act = &res->sample_act;
11401         sample_idx = &res->sample_idx;
11402         res->ratio = action->ratio;
11403         sub_actions = action->actions;
11404         for (; sub_actions->type != RTE_FLOW_ACTION_TYPE_END; sub_actions++) {
11405                 int type = sub_actions->type;
11406                 uint32_t pre_rix = 0;
11407                 void *pre_r;
11408                 switch (type) {
11409                 case RTE_FLOW_ACTION_TYPE_QUEUE:
11410                 {
11411                         const struct rte_flow_action_queue *queue;
11412                         struct mlx5_hrxq *hrxq;
11413                         uint32_t hrxq_idx;
11414
11415                         queue = sub_actions->conf;
11416                         rss_desc->queue_num = 1;
11417                         rss_desc->queue[0] = queue->index;
11418                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11419                                                     rss_desc, &hrxq_idx);
11420                         if (!hrxq)
11421                                 return rte_flow_error_set
11422                                         (error, rte_errno,
11423                                          RTE_FLOW_ERROR_TYPE_ACTION,
11424                                          NULL,
11425                                          "cannot create fate queue");
11426                         sample_act->dr_queue_action = hrxq->action;
11427                         sample_idx->rix_hrxq = hrxq_idx;
11428                         sample_actions[sample_act->actions_num++] =
11429                                                 hrxq->action;
11430                         (*num_of_dest)++;
11431                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
11432                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11433                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11434                         dev_flow->handle->fate_action =
11435                                         MLX5_FLOW_FATE_QUEUE;
11436                         break;
11437                 }
11438                 case RTE_FLOW_ACTION_TYPE_RSS:
11439                 {
11440                         struct mlx5_hrxq *hrxq;
11441                         uint32_t hrxq_idx;
11442                         const struct rte_flow_action_rss *rss;
11443                         const uint8_t *rss_key;
11444
11445                         rss = sub_actions->conf;
11446                         memcpy(rss_desc->queue, rss->queue,
11447                                rss->queue_num * sizeof(uint16_t));
11448                         rss_desc->queue_num = rss->queue_num;
11449                         /* NULL RSS key indicates default RSS key. */
11450                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
11451                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
11452                         /*
11453                          * rss->level and rss.types should be set in advance
11454                          * when expanding items for RSS.
11455                          */
11456                         flow_dv_hashfields_set(dev_flow, rss_desc);
11457                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11458                                                     rss_desc, &hrxq_idx);
11459                         if (!hrxq)
11460                                 return rte_flow_error_set
11461                                         (error, rte_errno,
11462                                          RTE_FLOW_ERROR_TYPE_ACTION,
11463                                          NULL,
11464                                          "cannot create fate queue");
11465                         sample_act->dr_queue_action = hrxq->action;
11466                         sample_idx->rix_hrxq = hrxq_idx;
11467                         sample_actions[sample_act->actions_num++] =
11468                                                 hrxq->action;
11469                         (*num_of_dest)++;
11470                         action_flags |= MLX5_FLOW_ACTION_RSS;
11471                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11472                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11473                         dev_flow->handle->fate_action =
11474                                         MLX5_FLOW_FATE_QUEUE;
11475                         break;
11476                 }
11477                 case RTE_FLOW_ACTION_TYPE_MARK:
11478                 {
11479                         uint32_t tag_be = mlx5_flow_mark_set
11480                                 (((const struct rte_flow_action_mark *)
11481                                 (sub_actions->conf))->id);
11482
11483                         dev_flow->handle->mark = 1;
11484                         pre_rix = dev_flow->handle->dvh.rix_tag;
11485                         /* Save the mark resource before sample */
11486                         pre_r = dev_flow->dv.tag_resource;
11487                         if (flow_dv_tag_resource_register(dev, tag_be,
11488                                                   dev_flow, error))
11489                                 return -rte_errno;
11490                         MLX5_ASSERT(dev_flow->dv.tag_resource);
11491                         sample_act->dr_tag_action =
11492                                 dev_flow->dv.tag_resource->action;
11493                         sample_idx->rix_tag =
11494                                 dev_flow->handle->dvh.rix_tag;
11495                         sample_actions[sample_act->actions_num++] =
11496                                                 sample_act->dr_tag_action;
11497                         /* Recover the mark resource after sample */
11498                         dev_flow->dv.tag_resource = pre_r;
11499                         dev_flow->handle->dvh.rix_tag = pre_rix;
11500                         action_flags |= MLX5_FLOW_ACTION_MARK;
11501                         break;
11502                 }
11503                 case RTE_FLOW_ACTION_TYPE_COUNT:
11504                 {
11505                         if (!flow->counter) {
11506                                 flow->counter =
11507                                         flow_dv_translate_create_counter(dev,
11508                                                 dev_flow, sub_actions->conf,
11509                                                 0);
11510                                 if (!flow->counter)
11511                                         return rte_flow_error_set
11512                                                 (error, rte_errno,
11513                                                 RTE_FLOW_ERROR_TYPE_ACTION,
11514                                                 NULL,
11515                                                 "cannot create counter"
11516                                                 " object.");
11517                         }
11518                         sample_act->dr_cnt_action =
11519                                   (flow_dv_counter_get_by_idx(dev,
11520                                   flow->counter, NULL))->action;
11521                         sample_actions[sample_act->actions_num++] =
11522                                                 sample_act->dr_cnt_action;
11523                         action_flags |= MLX5_FLOW_ACTION_COUNT;
11524                         break;
11525                 }
11526                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
11527                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
11528                 {
11529                         struct mlx5_flow_dv_port_id_action_resource
11530                                         port_id_resource;
11531                         uint32_t port_id = 0;
11532
11533                         memset(&port_id_resource, 0, sizeof(port_id_resource));
11534                         /* Save the port id resource before sample */
11535                         pre_rix = dev_flow->handle->rix_port_id_action;
11536                         pre_r = dev_flow->dv.port_id_action;
11537                         if (flow_dv_translate_action_port_id(dev, sub_actions,
11538                                                              &port_id, error))
11539                                 return -rte_errno;
11540                         port_id_resource.port_id = port_id;
11541                         if (flow_dv_port_id_action_resource_register
11542                             (dev, &port_id_resource, dev_flow, error))
11543                                 return -rte_errno;
11544                         sample_act->dr_port_id_action =
11545                                 dev_flow->dv.port_id_action->action;
11546                         sample_idx->rix_port_id_action =
11547                                 dev_flow->handle->rix_port_id_action;
11548                         sample_actions[sample_act->actions_num++] =
11549                                                 sample_act->dr_port_id_action;
11550                         /* Recover the port id resource after sample */
11551                         dev_flow->dv.port_id_action = pre_r;
11552                         dev_flow->handle->rix_port_id_action = pre_rix;
11553                         (*num_of_dest)++;
11554                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
11555                         break;
11556                 }
11557                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
11558                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
11559                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
11560                         /* Save the encap resource before sample */
11561                         pre_rix = dev_flow->handle->dvh.rix_encap_decap;
11562                         pre_r = dev_flow->dv.encap_decap;
11563                         if (flow_dv_create_action_l2_encap(dev, sub_actions,
11564                                                            dev_flow,
11565                                                            attr->transfer,
11566                                                            error))
11567                                 return -rte_errno;
11568                         sample_act->dr_encap_action =
11569                                 dev_flow->dv.encap_decap->action;
11570                         sample_idx->rix_encap_decap =
11571                                 dev_flow->handle->dvh.rix_encap_decap;
11572                         sample_actions[sample_act->actions_num++] =
11573                                                 sample_act->dr_encap_action;
11574                         /* Recover the encap resource after sample */
11575                         dev_flow->dv.encap_decap = pre_r;
11576                         dev_flow->handle->dvh.rix_encap_decap = pre_rix;
11577                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
11578                         break;
11579                 default:
11580                         return rte_flow_error_set(error, EINVAL,
11581                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11582                                 NULL,
11583                                 "Not support for sampler action");
11584                 }
11585         }
11586         sample_act->action_flags = action_flags;
11587         res->ft_id = dev_flow->dv.group;
11588         if (attr->transfer) {
11589                 union {
11590                         uint32_t action_in[MLX5_ST_SZ_DW(set_action_in)];
11591                         uint64_t set_action;
11592                 } action_ctx = { .set_action = 0 };
11593
11594                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
11595                 MLX5_SET(set_action_in, action_ctx.action_in, action_type,
11596                          MLX5_MODIFICATION_TYPE_SET);
11597                 MLX5_SET(set_action_in, action_ctx.action_in, field,
11598                          MLX5_MODI_META_REG_C_0);
11599                 MLX5_SET(set_action_in, action_ctx.action_in, data,
11600                          priv->vport_meta_tag);
11601                 res->set_action = action_ctx.set_action;
11602         } else if (attr->ingress) {
11603                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
11604         } else {
11605                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_TX;
11606         }
11607         return 0;
11608 }
11609
11610 /**
11611  * Convert Sample action to DV specification.
11612  *
11613  * @param[in] dev
11614  *   Pointer to rte_eth_dev structure.
11615  * @param[in, out] dev_flow
11616  *   Pointer to the mlx5_flow.
11617  * @param[in] num_of_dest
11618  *   The num of destination.
11619  * @param[in, out] res
11620  *   Pointer to sample resource.
11621  * @param[in, out] mdest_res
11622  *   Pointer to destination array resource.
11623  * @param[in] sample_actions
11624  *   Pointer to sample path actions list.
11625  * @param[in] action_flags
11626  *   Holds the actions detected until now.
11627  * @param[out] error
11628  *   Pointer to the error structure.
11629  *
11630  * @return
11631  *   0 on success, a negative errno value otherwise and rte_errno is set.
11632  */
11633 static int
11634 flow_dv_create_action_sample(struct rte_eth_dev *dev,
11635                              struct mlx5_flow *dev_flow,
11636                              uint32_t num_of_dest,
11637                              struct mlx5_flow_dv_sample_resource *res,
11638                              struct mlx5_flow_dv_dest_array_resource *mdest_res,
11639                              void **sample_actions,
11640                              uint64_t action_flags,
11641                              struct rte_flow_error *error)
11642 {
11643         /* update normal path action resource into last index of array */
11644         uint32_t dest_index = MLX5_MAX_DEST_NUM - 1;
11645         struct mlx5_flow_sub_actions_list *sample_act =
11646                                         &mdest_res->sample_act[dest_index];
11647         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11648         struct mlx5_flow_rss_desc *rss_desc;
11649         uint32_t normal_idx = 0;
11650         struct mlx5_hrxq *hrxq;
11651         uint32_t hrxq_idx;
11652
11653         MLX5_ASSERT(wks);
11654         rss_desc = &wks->rss_desc;
11655         if (num_of_dest > 1) {
11656                 if (sample_act->action_flags & MLX5_FLOW_ACTION_QUEUE) {
11657                         /* Handle QP action for mirroring */
11658                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11659                                                     rss_desc, &hrxq_idx);
11660                         if (!hrxq)
11661                                 return rte_flow_error_set
11662                                      (error, rte_errno,
11663                                       RTE_FLOW_ERROR_TYPE_ACTION,
11664                                       NULL,
11665                                       "cannot create rx queue");
11666                         normal_idx++;
11667                         mdest_res->sample_idx[dest_index].rix_hrxq = hrxq_idx;
11668                         sample_act->dr_queue_action = hrxq->action;
11669                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11670                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11671                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
11672                 }
11673                 if (sample_act->action_flags & MLX5_FLOW_ACTION_ENCAP) {
11674                         normal_idx++;
11675                         mdest_res->sample_idx[dest_index].rix_encap_decap =
11676                                 dev_flow->handle->dvh.rix_encap_decap;
11677                         sample_act->dr_encap_action =
11678                                 dev_flow->dv.encap_decap->action;
11679                         dev_flow->handle->dvh.rix_encap_decap = 0;
11680                 }
11681                 if (sample_act->action_flags & MLX5_FLOW_ACTION_PORT_ID) {
11682                         normal_idx++;
11683                         mdest_res->sample_idx[dest_index].rix_port_id_action =
11684                                 dev_flow->handle->rix_port_id_action;
11685                         sample_act->dr_port_id_action =
11686                                 dev_flow->dv.port_id_action->action;
11687                         dev_flow->handle->rix_port_id_action = 0;
11688                 }
11689                 if (sample_act->action_flags & MLX5_FLOW_ACTION_JUMP) {
11690                         normal_idx++;
11691                         mdest_res->sample_idx[dest_index].rix_jump =
11692                                 dev_flow->handle->rix_jump;
11693                         sample_act->dr_jump_action =
11694                                 dev_flow->dv.jump->action;
11695                         dev_flow->handle->rix_jump = 0;
11696                 }
11697                 sample_act->actions_num = normal_idx;
11698                 /* update sample action resource into first index of array */
11699                 mdest_res->ft_type = res->ft_type;
11700                 memcpy(&mdest_res->sample_idx[0], &res->sample_idx,
11701                                 sizeof(struct mlx5_flow_sub_actions_idx));
11702                 memcpy(&mdest_res->sample_act[0], &res->sample_act,
11703                                 sizeof(struct mlx5_flow_sub_actions_list));
11704                 mdest_res->num_of_dest = num_of_dest;
11705                 if (flow_dv_dest_array_resource_register(dev, mdest_res,
11706                                                          dev_flow, error))
11707                         return rte_flow_error_set(error, EINVAL,
11708                                                   RTE_FLOW_ERROR_TYPE_ACTION,
11709                                                   NULL, "can't create sample "
11710                                                   "action");
11711         } else {
11712                 res->sub_actions = sample_actions;
11713                 if (flow_dv_sample_resource_register(dev, res, dev_flow, error))
11714                         return rte_flow_error_set(error, EINVAL,
11715                                                   RTE_FLOW_ERROR_TYPE_ACTION,
11716                                                   NULL,
11717                                                   "can't create sample action");
11718         }
11719         return 0;
11720 }
11721
11722 /**
11723  * Remove an ASO age action from age actions list.
11724  *
11725  * @param[in] dev
11726  *   Pointer to the Ethernet device structure.
11727  * @param[in] age
11728  *   Pointer to the aso age action handler.
11729  */
11730 static void
11731 flow_dv_aso_age_remove_from_age(struct rte_eth_dev *dev,
11732                                 struct mlx5_aso_age_action *age)
11733 {
11734         struct mlx5_age_info *age_info;
11735         struct mlx5_age_param *age_param = &age->age_params;
11736         struct mlx5_priv *priv = dev->data->dev_private;
11737         uint16_t expected = AGE_CANDIDATE;
11738
11739         age_info = GET_PORT_AGE_INFO(priv);
11740         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
11741                                          AGE_FREE, false, __ATOMIC_RELAXED,
11742                                          __ATOMIC_RELAXED)) {
11743                 /**
11744                  * We need the lock even it is age timeout,
11745                  * since age action may still in process.
11746                  */
11747                 rte_spinlock_lock(&age_info->aged_sl);
11748                 LIST_REMOVE(age, next);
11749                 rte_spinlock_unlock(&age_info->aged_sl);
11750                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
11751         }
11752 }
11753
11754 /**
11755  * Release an ASO age action.
11756  *
11757  * @param[in] dev
11758  *   Pointer to the Ethernet device structure.
11759  * @param[in] age_idx
11760  *   Index of ASO age action to release.
11761  * @param[in] flow
11762  *   True if the release operation is during flow destroy operation.
11763  *   False if the release operation is during action destroy operation.
11764  *
11765  * @return
11766  *   0 when age action was removed, otherwise the number of references.
11767  */
11768 static int
11769 flow_dv_aso_age_release(struct rte_eth_dev *dev, uint32_t age_idx)
11770 {
11771         struct mlx5_priv *priv = dev->data->dev_private;
11772         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11773         struct mlx5_aso_age_action *age = flow_aso_age_get_by_idx(dev, age_idx);
11774         uint32_t ret = __atomic_sub_fetch(&age->refcnt, 1, __ATOMIC_RELAXED);
11775
11776         if (!ret) {
11777                 flow_dv_aso_age_remove_from_age(dev, age);
11778                 rte_spinlock_lock(&mng->free_sl);
11779                 LIST_INSERT_HEAD(&mng->free, age, next);
11780                 rte_spinlock_unlock(&mng->free_sl);
11781         }
11782         return ret;
11783 }
11784
11785 /**
11786  * Resize the ASO age pools array by MLX5_CNT_CONTAINER_RESIZE pools.
11787  *
11788  * @param[in] dev
11789  *   Pointer to the Ethernet device structure.
11790  *
11791  * @return
11792  *   0 on success, otherwise negative errno value and rte_errno is set.
11793  */
11794 static int
11795 flow_dv_aso_age_pools_resize(struct rte_eth_dev *dev)
11796 {
11797         struct mlx5_priv *priv = dev->data->dev_private;
11798         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11799         void *old_pools = mng->pools;
11800         uint32_t resize = mng->n + MLX5_CNT_CONTAINER_RESIZE;
11801         uint32_t mem_size = sizeof(struct mlx5_aso_age_pool *) * resize;
11802         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
11803
11804         if (!pools) {
11805                 rte_errno = ENOMEM;
11806                 return -ENOMEM;
11807         }
11808         if (old_pools) {
11809                 memcpy(pools, old_pools,
11810                        mng->n * sizeof(struct mlx5_flow_counter_pool *));
11811                 mlx5_free(old_pools);
11812         } else {
11813                 /* First ASO flow hit allocation - starting ASO data-path. */
11814                 int ret = mlx5_aso_flow_hit_queue_poll_start(priv->sh);
11815
11816                 if (ret) {
11817                         mlx5_free(pools);
11818                         return ret;
11819                 }
11820         }
11821         mng->n = resize;
11822         mng->pools = pools;
11823         return 0;
11824 }
11825
11826 /**
11827  * Create and initialize a new ASO aging pool.
11828  *
11829  * @param[in] dev
11830  *   Pointer to the Ethernet device structure.
11831  * @param[out] age_free
11832  *   Where to put the pointer of a new age action.
11833  *
11834  * @return
11835  *   The age actions pool pointer and @p age_free is set on success,
11836  *   NULL otherwise and rte_errno is set.
11837  */
11838 static struct mlx5_aso_age_pool *
11839 flow_dv_age_pool_create(struct rte_eth_dev *dev,
11840                         struct mlx5_aso_age_action **age_free)
11841 {
11842         struct mlx5_priv *priv = dev->data->dev_private;
11843         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11844         struct mlx5_aso_age_pool *pool = NULL;
11845         struct mlx5_devx_obj *obj = NULL;
11846         uint32_t i;
11847
11848         obj = mlx5_devx_cmd_create_flow_hit_aso_obj(priv->sh->cdev->ctx,
11849                                                     priv->sh->cdev->pdn);
11850         if (!obj) {
11851                 rte_errno = ENODATA;
11852                 DRV_LOG(ERR, "Failed to create flow_hit_aso_obj using DevX.");
11853                 return NULL;
11854         }
11855         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
11856         if (!pool) {
11857                 claim_zero(mlx5_devx_cmd_destroy(obj));
11858                 rte_errno = ENOMEM;
11859                 return NULL;
11860         }
11861         pool->flow_hit_aso_obj = obj;
11862         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
11863         rte_rwlock_write_lock(&mng->resize_rwl);
11864         pool->index = mng->next;
11865         /* Resize pools array if there is no room for the new pool in it. */
11866         if (pool->index == mng->n && flow_dv_aso_age_pools_resize(dev)) {
11867                 claim_zero(mlx5_devx_cmd_destroy(obj));
11868                 mlx5_free(pool);
11869                 rte_rwlock_write_unlock(&mng->resize_rwl);
11870                 return NULL;
11871         }
11872         mng->pools[pool->index] = pool;
11873         mng->next++;
11874         rte_rwlock_write_unlock(&mng->resize_rwl);
11875         /* Assign the first action in the new pool, the rest go to free list. */
11876         *age_free = &pool->actions[0];
11877         for (i = 1; i < MLX5_ASO_AGE_ACTIONS_PER_POOL; i++) {
11878                 pool->actions[i].offset = i;
11879                 LIST_INSERT_HEAD(&mng->free, &pool->actions[i], next);
11880         }
11881         return pool;
11882 }
11883
11884 /**
11885  * Allocate a ASO aging bit.
11886  *
11887  * @param[in] dev
11888  *   Pointer to the Ethernet device structure.
11889  * @param[out] error
11890  *   Pointer to the error structure.
11891  *
11892  * @return
11893  *   Index to ASO age action on success, 0 otherwise and rte_errno is set.
11894  */
11895 static uint32_t
11896 flow_dv_aso_age_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
11897 {
11898         struct mlx5_priv *priv = dev->data->dev_private;
11899         const struct mlx5_aso_age_pool *pool;
11900         struct mlx5_aso_age_action *age_free = NULL;
11901         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11902
11903         MLX5_ASSERT(mng);
11904         /* Try to get the next free age action bit. */
11905         rte_spinlock_lock(&mng->free_sl);
11906         age_free = LIST_FIRST(&mng->free);
11907         if (age_free) {
11908                 LIST_REMOVE(age_free, next);
11909         } else if (!flow_dv_age_pool_create(dev, &age_free)) {
11910                 rte_spinlock_unlock(&mng->free_sl);
11911                 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
11912                                    NULL, "failed to create ASO age pool");
11913                 return 0; /* 0 is an error. */
11914         }
11915         rte_spinlock_unlock(&mng->free_sl);
11916         pool = container_of
11917           ((const struct mlx5_aso_age_action (*)[MLX5_ASO_AGE_ACTIONS_PER_POOL])
11918                   (age_free - age_free->offset), const struct mlx5_aso_age_pool,
11919                                                                        actions);
11920         if (!age_free->dr_action) {
11921                 int reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_FLOW_HIT, 0,
11922                                                  error);
11923
11924                 if (reg_c < 0) {
11925                         rte_flow_error_set(error, rte_errno,
11926                                            RTE_FLOW_ERROR_TYPE_ACTION,
11927                                            NULL, "failed to get reg_c "
11928                                            "for ASO flow hit");
11929                         return 0; /* 0 is an error. */
11930                 }
11931 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
11932                 age_free->dr_action = mlx5_glue->dv_create_flow_action_aso
11933                                 (priv->sh->rx_domain,
11934                                  pool->flow_hit_aso_obj->obj, age_free->offset,
11935                                  MLX5DV_DR_ACTION_FLAGS_ASO_FIRST_HIT_SET,
11936                                  (reg_c - REG_C_0));
11937 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
11938                 if (!age_free->dr_action) {
11939                         rte_errno = errno;
11940                         rte_spinlock_lock(&mng->free_sl);
11941                         LIST_INSERT_HEAD(&mng->free, age_free, next);
11942                         rte_spinlock_unlock(&mng->free_sl);
11943                         rte_flow_error_set(error, rte_errno,
11944                                            RTE_FLOW_ERROR_TYPE_ACTION,
11945                                            NULL, "failed to create ASO "
11946                                            "flow hit action");
11947                         return 0; /* 0 is an error. */
11948                 }
11949         }
11950         __atomic_store_n(&age_free->refcnt, 1, __ATOMIC_RELAXED);
11951         return pool->index | ((age_free->offset + 1) << 16);
11952 }
11953
11954 /**
11955  * Initialize flow ASO age parameters.
11956  *
11957  * @param[in] dev
11958  *   Pointer to rte_eth_dev structure.
11959  * @param[in] age_idx
11960  *   Index of ASO age action.
11961  * @param[in] context
11962  *   Pointer to flow counter age context.
11963  * @param[in] timeout
11964  *   Aging timeout in seconds.
11965  *
11966  */
11967 static void
11968 flow_dv_aso_age_params_init(struct rte_eth_dev *dev,
11969                             uint32_t age_idx,
11970                             void *context,
11971                             uint32_t timeout)
11972 {
11973         struct mlx5_aso_age_action *aso_age;
11974
11975         aso_age = flow_aso_age_get_by_idx(dev, age_idx);
11976         MLX5_ASSERT(aso_age);
11977         aso_age->age_params.context = context;
11978         aso_age->age_params.timeout = timeout;
11979         aso_age->age_params.port_id = dev->data->port_id;
11980         __atomic_store_n(&aso_age->age_params.sec_since_last_hit, 0,
11981                          __ATOMIC_RELAXED);
11982         __atomic_store_n(&aso_age->age_params.state, AGE_CANDIDATE,
11983                          __ATOMIC_RELAXED);
11984 }
11985
11986 static void
11987 flow_dv_translate_integrity_l4(const struct rte_flow_item_integrity *mask,
11988                                const struct rte_flow_item_integrity *value,
11989                                void *headers_m, void *headers_v)
11990 {
11991         if (mask->l4_ok) {
11992                 /* application l4_ok filter aggregates all hardware l4 filters
11993                  * therefore hw l4_checksum_ok must be implicitly added here.
11994                  */
11995                 struct rte_flow_item_integrity local_item;
11996
11997                 local_item.l4_csum_ok = 1;
11998                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
11999                          local_item.l4_csum_ok);
12000                 if (value->l4_ok) {
12001                         /* application l4_ok = 1 matches sets both hw flags
12002                          * l4_ok and l4_checksum_ok flags to 1.
12003                          */
12004                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12005                                  l4_checksum_ok, local_item.l4_csum_ok);
12006                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_ok,
12007                                  mask->l4_ok);
12008                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_ok,
12009                                  value->l4_ok);
12010                 } else {
12011                         /* application l4_ok = 0 matches on hw flag
12012                          * l4_checksum_ok = 0 only.
12013                          */
12014                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12015                                  l4_checksum_ok, 0);
12016                 }
12017         } else if (mask->l4_csum_ok) {
12018                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
12019                          mask->l4_csum_ok);
12020                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_checksum_ok,
12021                          value->l4_csum_ok);
12022         }
12023 }
12024
12025 static void
12026 flow_dv_translate_integrity_l3(const struct rte_flow_item_integrity *mask,
12027                                const struct rte_flow_item_integrity *value,
12028                                void *headers_m, void *headers_v, bool is_ipv4)
12029 {
12030         if (mask->l3_ok) {
12031                 /* application l3_ok filter aggregates all hardware l3 filters
12032                  * therefore hw ipv4_checksum_ok must be implicitly added here.
12033                  */
12034                 struct rte_flow_item_integrity local_item;
12035
12036                 local_item.ipv4_csum_ok = !!is_ipv4;
12037                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
12038                          local_item.ipv4_csum_ok);
12039                 if (value->l3_ok) {
12040                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12041                                  ipv4_checksum_ok, local_item.ipv4_csum_ok);
12042                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, l3_ok,
12043                                  mask->l3_ok);
12044                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, l3_ok,
12045                                  value->l3_ok);
12046                 } else {
12047                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12048                                  ipv4_checksum_ok, 0);
12049                 }
12050         } else if (mask->ipv4_csum_ok) {
12051                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
12052                          mask->ipv4_csum_ok);
12053                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_checksum_ok,
12054                          value->ipv4_csum_ok);
12055         }
12056 }
12057
12058 static void
12059 set_integrity_bits(void *headers_m, void *headers_v,
12060                    const struct rte_flow_item *integrity_item, bool is_l3_ip4)
12061 {
12062         const struct rte_flow_item_integrity *spec = integrity_item->spec;
12063         const struct rte_flow_item_integrity *mask = integrity_item->mask;
12064
12065         /* Integrity bits validation cleared spec pointer */
12066         MLX5_ASSERT(spec != NULL);
12067         if (!mask)
12068                 mask = &rte_flow_item_integrity_mask;
12069         flow_dv_translate_integrity_l3(mask, spec, headers_m, headers_v,
12070                                        is_l3_ip4);
12071         flow_dv_translate_integrity_l4(mask, spec, headers_m, headers_v);
12072 }
12073
12074 static void
12075 flow_dv_translate_item_integrity_post(void *matcher, void *key,
12076                                       const
12077                                       struct rte_flow_item *integrity_items[2],
12078                                       uint64_t pattern_flags)
12079 {
12080         void *headers_m, *headers_v;
12081         bool is_l3_ip4;
12082
12083         if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY) {
12084                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12085                                          inner_headers);
12086                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
12087                 is_l3_ip4 = (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV4) !=
12088                             0;
12089                 set_integrity_bits(headers_m, headers_v,
12090                                    integrity_items[1], is_l3_ip4);
12091         }
12092         if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY) {
12093                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12094                                          outer_headers);
12095                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
12096                 is_l3_ip4 = (pattern_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV4) !=
12097                             0;
12098                 set_integrity_bits(headers_m, headers_v,
12099                                    integrity_items[0], is_l3_ip4);
12100         }
12101 }
12102
12103 static void
12104 flow_dv_translate_item_integrity(const struct rte_flow_item *item,
12105                                  const struct rte_flow_item *integrity_items[2],
12106                                  uint64_t *last_item)
12107 {
12108         const struct rte_flow_item_integrity *spec = (typeof(spec))item->spec;
12109
12110         /* integrity bits validation cleared spec pointer */
12111         MLX5_ASSERT(spec != NULL);
12112         if (spec->level > 1) {
12113                 integrity_items[1] = item;
12114                 *last_item |= MLX5_FLOW_ITEM_INNER_INTEGRITY;
12115         } else {
12116                 integrity_items[0] = item;
12117                 *last_item |= MLX5_FLOW_ITEM_OUTER_INTEGRITY;
12118         }
12119 }
12120
12121 /**
12122  * Prepares DV flow counter with aging configuration.
12123  * Gets it by index when exists, creates a new one when doesn't.
12124  *
12125  * @param[in] dev
12126  *   Pointer to rte_eth_dev structure.
12127  * @param[in] dev_flow
12128  *   Pointer to the mlx5_flow.
12129  * @param[in, out] flow
12130  *   Pointer to the sub flow.
12131  * @param[in] count
12132  *   Pointer to the counter action configuration.
12133  * @param[in] age
12134  *   Pointer to the aging action configuration.
12135  * @param[out] error
12136  *   Pointer to the error structure.
12137  *
12138  * @return
12139  *   Pointer to the counter, NULL otherwise.
12140  */
12141 static struct mlx5_flow_counter *
12142 flow_dv_prepare_counter(struct rte_eth_dev *dev,
12143                         struct mlx5_flow *dev_flow,
12144                         struct rte_flow *flow,
12145                         const struct rte_flow_action_count *count,
12146                         const struct rte_flow_action_age *age,
12147                         struct rte_flow_error *error)
12148 {
12149         if (!flow->counter) {
12150                 flow->counter = flow_dv_translate_create_counter(dev, dev_flow,
12151                                                                  count, age);
12152                 if (!flow->counter) {
12153                         rte_flow_error_set(error, rte_errno,
12154                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12155                                            "cannot create counter object.");
12156                         return NULL;
12157                 }
12158         }
12159         return flow_dv_counter_get_by_idx(dev, flow->counter, NULL);
12160 }
12161
12162 /*
12163  * Release an ASO CT action by its own device.
12164  *
12165  * @param[in] dev
12166  *   Pointer to the Ethernet device structure.
12167  * @param[in] idx
12168  *   Index of ASO CT action to release.
12169  *
12170  * @return
12171  *   0 when CT action was removed, otherwise the number of references.
12172  */
12173 static inline int
12174 flow_dv_aso_ct_dev_release(struct rte_eth_dev *dev, uint32_t idx)
12175 {
12176         struct mlx5_priv *priv = dev->data->dev_private;
12177         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12178         uint32_t ret;
12179         struct mlx5_aso_ct_action *ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12180         enum mlx5_aso_ct_state state =
12181                         __atomic_load_n(&ct->state, __ATOMIC_RELAXED);
12182
12183         /* Cannot release when CT is in the ASO SQ. */
12184         if (state == ASO_CONNTRACK_WAIT || state == ASO_CONNTRACK_QUERY)
12185                 return -1;
12186         ret = __atomic_sub_fetch(&ct->refcnt, 1, __ATOMIC_RELAXED);
12187         if (!ret) {
12188                 if (ct->dr_action_orig) {
12189 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12190                         claim_zero(mlx5_glue->destroy_flow_action
12191                                         (ct->dr_action_orig));
12192 #endif
12193                         ct->dr_action_orig = NULL;
12194                 }
12195                 if (ct->dr_action_rply) {
12196 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12197                         claim_zero(mlx5_glue->destroy_flow_action
12198                                         (ct->dr_action_rply));
12199 #endif
12200                         ct->dr_action_rply = NULL;
12201                 }
12202                 /* Clear the state to free, no need in 1st allocation. */
12203                 MLX5_ASO_CT_UPDATE_STATE(ct, ASO_CONNTRACK_FREE);
12204                 rte_spinlock_lock(&mng->ct_sl);
12205                 LIST_INSERT_HEAD(&mng->free_cts, ct, next);
12206                 rte_spinlock_unlock(&mng->ct_sl);
12207         }
12208         return (int)ret;
12209 }
12210
12211 static inline int
12212 flow_dv_aso_ct_release(struct rte_eth_dev *dev, uint32_t own_idx,
12213                        struct rte_flow_error *error)
12214 {
12215         uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(own_idx);
12216         uint32_t idx = MLX5_INDIRECT_ACT_CT_GET_IDX(own_idx);
12217         struct rte_eth_dev *owndev = &rte_eth_devices[owner];
12218         int ret;
12219
12220         MLX5_ASSERT(owner < RTE_MAX_ETHPORTS);
12221         if (dev->data->dev_started != 1)
12222                 return rte_flow_error_set(error, EAGAIN,
12223                                           RTE_FLOW_ERROR_TYPE_ACTION,
12224                                           NULL,
12225                                           "Indirect CT action cannot be destroyed when the port is stopped");
12226         ret = flow_dv_aso_ct_dev_release(owndev, idx);
12227         if (ret < 0)
12228                 return rte_flow_error_set(error, EAGAIN,
12229                                           RTE_FLOW_ERROR_TYPE_ACTION,
12230                                           NULL,
12231                                           "Current state prevents indirect CT action from being destroyed");
12232         return ret;
12233 }
12234
12235 /*
12236  * Resize the ASO CT pools array by 64 pools.
12237  *
12238  * @param[in] dev
12239  *   Pointer to the Ethernet device structure.
12240  *
12241  * @return
12242  *   0 on success, otherwise negative errno value and rte_errno is set.
12243  */
12244 static int
12245 flow_dv_aso_ct_pools_resize(struct rte_eth_dev *dev)
12246 {
12247         struct mlx5_priv *priv = dev->data->dev_private;
12248         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12249         void *old_pools = mng->pools;
12250         /* Magic number now, need a macro. */
12251         uint32_t resize = mng->n + 64;
12252         uint32_t mem_size = sizeof(struct mlx5_aso_ct_pool *) * resize;
12253         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
12254
12255         if (!pools) {
12256                 rte_errno = ENOMEM;
12257                 return -rte_errno;
12258         }
12259         rte_rwlock_write_lock(&mng->resize_rwl);
12260         /* ASO SQ/QP was already initialized in the startup. */
12261         if (old_pools) {
12262                 /* Realloc could be an alternative choice. */
12263                 rte_memcpy(pools, old_pools,
12264                            mng->n * sizeof(struct mlx5_aso_ct_pool *));
12265                 mlx5_free(old_pools);
12266         }
12267         mng->n = resize;
12268         mng->pools = pools;
12269         rte_rwlock_write_unlock(&mng->resize_rwl);
12270         return 0;
12271 }
12272
12273 /*
12274  * Create and initialize a new ASO CT pool.
12275  *
12276  * @param[in] dev
12277  *   Pointer to the Ethernet device structure.
12278  * @param[out] ct_free
12279  *   Where to put the pointer of a new CT action.
12280  *
12281  * @return
12282  *   The CT actions pool pointer and @p ct_free is set on success,
12283  *   NULL otherwise and rte_errno is set.
12284  */
12285 static struct mlx5_aso_ct_pool *
12286 flow_dv_ct_pool_create(struct rte_eth_dev *dev,
12287                        struct mlx5_aso_ct_action **ct_free)
12288 {
12289         struct mlx5_priv *priv = dev->data->dev_private;
12290         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12291         struct mlx5_aso_ct_pool *pool = NULL;
12292         struct mlx5_devx_obj *obj = NULL;
12293         uint32_t i;
12294         uint32_t log_obj_size = rte_log2_u32(MLX5_ASO_CT_ACTIONS_PER_POOL);
12295
12296         obj = mlx5_devx_cmd_create_conn_track_offload_obj(priv->sh->cdev->ctx,
12297                                                           priv->sh->cdev->pdn,
12298                                                           log_obj_size);
12299         if (!obj) {
12300                 rte_errno = ENODATA;
12301                 DRV_LOG(ERR, "Failed to create conn_track_offload_obj using DevX.");
12302                 return NULL;
12303         }
12304         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
12305         if (!pool) {
12306                 rte_errno = ENOMEM;
12307                 claim_zero(mlx5_devx_cmd_destroy(obj));
12308                 return NULL;
12309         }
12310         pool->devx_obj = obj;
12311         pool->index = mng->next;
12312         /* Resize pools array if there is no room for the new pool in it. */
12313         if (pool->index == mng->n && flow_dv_aso_ct_pools_resize(dev)) {
12314                 claim_zero(mlx5_devx_cmd_destroy(obj));
12315                 mlx5_free(pool);
12316                 return NULL;
12317         }
12318         mng->pools[pool->index] = pool;
12319         mng->next++;
12320         /* Assign the first action in the new pool, the rest go to free list. */
12321         *ct_free = &pool->actions[0];
12322         /* Lock outside, the list operation is safe here. */
12323         for (i = 1; i < MLX5_ASO_CT_ACTIONS_PER_POOL; i++) {
12324                 /* refcnt is 0 when allocating the memory. */
12325                 pool->actions[i].offset = i;
12326                 LIST_INSERT_HEAD(&mng->free_cts, &pool->actions[i], next);
12327         }
12328         return pool;
12329 }
12330
12331 /*
12332  * Allocate a ASO CT action from free list.
12333  *
12334  * @param[in] dev
12335  *   Pointer to the Ethernet device structure.
12336  * @param[out] error
12337  *   Pointer to the error structure.
12338  *
12339  * @return
12340  *   Index to ASO CT action on success, 0 otherwise and rte_errno is set.
12341  */
12342 static uint32_t
12343 flow_dv_aso_ct_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
12344 {
12345         struct mlx5_priv *priv = dev->data->dev_private;
12346         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12347         struct mlx5_aso_ct_action *ct = NULL;
12348         struct mlx5_aso_ct_pool *pool;
12349         uint8_t reg_c;
12350         uint32_t ct_idx;
12351
12352         MLX5_ASSERT(mng);
12353         if (!priv->sh->devx) {
12354                 rte_errno = ENOTSUP;
12355                 return 0;
12356         }
12357         /* Get a free CT action, if no, a new pool will be created. */
12358         rte_spinlock_lock(&mng->ct_sl);
12359         ct = LIST_FIRST(&mng->free_cts);
12360         if (ct) {
12361                 LIST_REMOVE(ct, next);
12362         } else if (!flow_dv_ct_pool_create(dev, &ct)) {
12363                 rte_spinlock_unlock(&mng->ct_sl);
12364                 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12365                                    NULL, "failed to create ASO CT pool");
12366                 return 0;
12367         }
12368         rte_spinlock_unlock(&mng->ct_sl);
12369         pool = container_of(ct, struct mlx5_aso_ct_pool, actions[ct->offset]);
12370         ct_idx = MLX5_MAKE_CT_IDX(pool->index, ct->offset);
12371         /* 0: inactive, 1: created, 2+: used by flows. */
12372         __atomic_store_n(&ct->refcnt, 1, __ATOMIC_RELAXED);
12373         reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, error);
12374         if (!ct->dr_action_orig) {
12375 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12376                 ct->dr_action_orig = mlx5_glue->dv_create_flow_action_aso
12377                         (priv->sh->rx_domain, pool->devx_obj->obj,
12378                          ct->offset,
12379                          MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_INITIATOR,
12380                          reg_c - REG_C_0);
12381 #else
12382                 RTE_SET_USED(reg_c);
12383 #endif
12384                 if (!ct->dr_action_orig) {
12385                         flow_dv_aso_ct_dev_release(dev, ct_idx);
12386                         rte_flow_error_set(error, rte_errno,
12387                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12388                                            "failed to create ASO CT action");
12389                         return 0;
12390                 }
12391         }
12392         if (!ct->dr_action_rply) {
12393 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12394                 ct->dr_action_rply = mlx5_glue->dv_create_flow_action_aso
12395                         (priv->sh->rx_domain, pool->devx_obj->obj,
12396                          ct->offset,
12397                          MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_RESPONDER,
12398                          reg_c - REG_C_0);
12399 #endif
12400                 if (!ct->dr_action_rply) {
12401                         flow_dv_aso_ct_dev_release(dev, ct_idx);
12402                         rte_flow_error_set(error, rte_errno,
12403                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12404                                            "failed to create ASO CT action");
12405                         return 0;
12406                 }
12407         }
12408         return ct_idx;
12409 }
12410
12411 /*
12412  * Create a conntrack object with context and actions by using ASO mechanism.
12413  *
12414  * @param[in] dev
12415  *   Pointer to rte_eth_dev structure.
12416  * @param[in] pro
12417  *   Pointer to conntrack information profile.
12418  * @param[out] error
12419  *   Pointer to the error structure.
12420  *
12421  * @return
12422  *   Index to conntrack object on success, 0 otherwise.
12423  */
12424 static uint32_t
12425 flow_dv_translate_create_conntrack(struct rte_eth_dev *dev,
12426                                    const struct rte_flow_action_conntrack *pro,
12427                                    struct rte_flow_error *error)
12428 {
12429         struct mlx5_priv *priv = dev->data->dev_private;
12430         struct mlx5_dev_ctx_shared *sh = priv->sh;
12431         struct mlx5_aso_ct_action *ct;
12432         uint32_t idx;
12433
12434         if (!sh->ct_aso_en)
12435                 return rte_flow_error_set(error, ENOTSUP,
12436                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12437                                           "Connection is not supported");
12438         idx = flow_dv_aso_ct_alloc(dev, error);
12439         if (!idx)
12440                 return rte_flow_error_set(error, rte_errno,
12441                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12442                                           "Failed to allocate CT object");
12443         ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12444         if (mlx5_aso_ct_update_by_wqe(sh, ct, pro))
12445                 return rte_flow_error_set(error, EBUSY,
12446                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12447                                           "Failed to update CT");
12448         ct->is_original = !!pro->is_original_dir;
12449         ct->peer = pro->peer_port;
12450         return idx;
12451 }
12452
12453 /**
12454  * Fill the flow with DV spec, lock free
12455  * (mutex should be acquired by caller).
12456  *
12457  * @param[in] dev
12458  *   Pointer to rte_eth_dev structure.
12459  * @param[in, out] dev_flow
12460  *   Pointer to the sub flow.
12461  * @param[in] attr
12462  *   Pointer to the flow attributes.
12463  * @param[in] items
12464  *   Pointer to the list of items.
12465  * @param[in] actions
12466  *   Pointer to the list of actions.
12467  * @param[out] error
12468  *   Pointer to the error structure.
12469  *
12470  * @return
12471  *   0 on success, a negative errno value otherwise and rte_errno is set.
12472  */
12473 static int
12474 flow_dv_translate(struct rte_eth_dev *dev,
12475                   struct mlx5_flow *dev_flow,
12476                   const struct rte_flow_attr *attr,
12477                   const struct rte_flow_item items[],
12478                   const struct rte_flow_action actions[],
12479                   struct rte_flow_error *error)
12480 {
12481         struct mlx5_priv *priv = dev->data->dev_private;
12482         struct mlx5_dev_config *dev_conf = &priv->config;
12483         struct rte_flow *flow = dev_flow->flow;
12484         struct mlx5_flow_handle *handle = dev_flow->handle;
12485         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
12486         struct mlx5_flow_rss_desc *rss_desc;
12487         uint64_t item_flags = 0;
12488         uint64_t last_item = 0;
12489         uint64_t action_flags = 0;
12490         struct mlx5_flow_dv_matcher matcher = {
12491                 .mask = {
12492                         .size = sizeof(matcher.mask.buf),
12493                 },
12494         };
12495         int actions_n = 0;
12496         bool actions_end = false;
12497         union {
12498                 struct mlx5_flow_dv_modify_hdr_resource res;
12499                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
12500                             sizeof(struct mlx5_modification_cmd) *
12501                             (MLX5_MAX_MODIFY_NUM + 1)];
12502         } mhdr_dummy;
12503         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
12504         const struct rte_flow_action_count *count = NULL;
12505         const struct rte_flow_action_age *non_shared_age = NULL;
12506         union flow_dv_attr flow_attr = { .attr = 0 };
12507         uint32_t tag_be;
12508         union mlx5_flow_tbl_key tbl_key;
12509         uint32_t modify_action_position = UINT32_MAX;
12510         void *match_mask = matcher.mask.buf;
12511         void *match_value = dev_flow->dv.value.buf;
12512         uint8_t next_protocol = 0xff;
12513         struct rte_vlan_hdr vlan = { 0 };
12514         struct mlx5_flow_dv_dest_array_resource mdest_res;
12515         struct mlx5_flow_dv_sample_resource sample_res;
12516         void *sample_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
12517         const struct rte_flow_action_sample *sample = NULL;
12518         struct mlx5_flow_sub_actions_list *sample_act;
12519         uint32_t sample_act_pos = UINT32_MAX;
12520         uint32_t age_act_pos = UINT32_MAX;
12521         uint32_t num_of_dest = 0;
12522         int tmp_actions_n = 0;
12523         uint32_t table;
12524         int ret = 0;
12525         const struct mlx5_flow_tunnel *tunnel = NULL;
12526         struct flow_grp_info grp_info = {
12527                 .external = !!dev_flow->external,
12528                 .transfer = !!attr->transfer,
12529                 .fdb_def_rule = !!priv->fdb_def_rule,
12530                 .skip_scale = dev_flow->skip_scale &
12531                         (1 << MLX5_SCALE_FLOW_GROUP_BIT),
12532                 .std_tbl_fix = true,
12533         };
12534         const struct rte_flow_item *integrity_items[2] = {NULL, NULL};
12535
12536         if (!wks)
12537                 return rte_flow_error_set(error, ENOMEM,
12538                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12539                                           NULL,
12540                                           "failed to push flow workspace");
12541         rss_desc = &wks->rss_desc;
12542         memset(&mdest_res, 0, sizeof(struct mlx5_flow_dv_dest_array_resource));
12543         memset(&sample_res, 0, sizeof(struct mlx5_flow_dv_sample_resource));
12544         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12545                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12546         /* update normal path action resource into last index of array */
12547         sample_act = &mdest_res.sample_act[MLX5_MAX_DEST_NUM - 1];
12548         if (is_tunnel_offload_active(dev)) {
12549                 if (dev_flow->tunnel) {
12550                         RTE_VERIFY(dev_flow->tof_type ==
12551                                    MLX5_TUNNEL_OFFLOAD_MISS_RULE);
12552                         tunnel = dev_flow->tunnel;
12553                 } else {
12554                         tunnel = mlx5_get_tof(items, actions,
12555                                               &dev_flow->tof_type);
12556                         dev_flow->tunnel = tunnel;
12557                 }
12558                 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
12559                                         (dev, attr, tunnel, dev_flow->tof_type);
12560         }
12561         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12562                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12563         ret = mlx5_flow_group_to_table(dev, tunnel, attr->group, &table,
12564                                        &grp_info, error);
12565         if (ret)
12566                 return ret;
12567         dev_flow->dv.group = table;
12568         if (attr->transfer)
12569                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
12570         /* number of actions must be set to 0 in case of dirty stack. */
12571         mhdr_res->actions_num = 0;
12572         if (is_flow_tunnel_match_rule(dev_flow->tof_type)) {
12573                 /*
12574                  * do not add decap action if match rule drops packet
12575                  * HW rejects rules with decap & drop
12576                  *
12577                  * if tunnel match rule was inserted before matching tunnel set
12578                  * rule flow table used in the match rule must be registered.
12579                  * current implementation handles that in the
12580                  * flow_dv_match_register() at the function end.
12581                  */
12582                 bool add_decap = true;
12583                 const struct rte_flow_action *ptr = actions;
12584
12585                 for (; ptr->type != RTE_FLOW_ACTION_TYPE_END; ptr++) {
12586                         if (ptr->type == RTE_FLOW_ACTION_TYPE_DROP) {
12587                                 add_decap = false;
12588                                 break;
12589                         }
12590                 }
12591                 if (add_decap) {
12592                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
12593                                                            attr->transfer,
12594                                                            error))
12595                                 return -rte_errno;
12596                         dev_flow->dv.actions[actions_n++] =
12597                                         dev_flow->dv.encap_decap->action;
12598                         action_flags |= MLX5_FLOW_ACTION_DECAP;
12599                 }
12600         }
12601         for (; !actions_end ; actions++) {
12602                 const struct rte_flow_action_queue *queue;
12603                 const struct rte_flow_action_rss *rss;
12604                 const struct rte_flow_action *action = actions;
12605                 const uint8_t *rss_key;
12606                 struct mlx5_flow_tbl_resource *tbl;
12607                 struct mlx5_aso_age_action *age_act;
12608                 struct mlx5_flow_counter *cnt_act;
12609                 uint32_t port_id = 0;
12610                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
12611                 int action_type = actions->type;
12612                 const struct rte_flow_action *found_action = NULL;
12613                 uint32_t jump_group = 0;
12614                 uint32_t owner_idx;
12615                 struct mlx5_aso_ct_action *ct;
12616
12617                 if (!mlx5_flow_os_action_supported(action_type))
12618                         return rte_flow_error_set(error, ENOTSUP,
12619                                                   RTE_FLOW_ERROR_TYPE_ACTION,
12620                                                   actions,
12621                                                   "action not supported");
12622                 switch (action_type) {
12623                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
12624                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
12625                         break;
12626                 case RTE_FLOW_ACTION_TYPE_VOID:
12627                         break;
12628                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
12629                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
12630                         if (flow_dv_translate_action_port_id(dev, action,
12631                                                              &port_id, error))
12632                                 return -rte_errno;
12633                         port_id_resource.port_id = port_id;
12634                         MLX5_ASSERT(!handle->rix_port_id_action);
12635                         if (flow_dv_port_id_action_resource_register
12636                             (dev, &port_id_resource, dev_flow, error))
12637                                 return -rte_errno;
12638                         dev_flow->dv.actions[actions_n++] =
12639                                         dev_flow->dv.port_id_action->action;
12640                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12641                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_PORT_ID;
12642                         sample_act->action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12643                         num_of_dest++;
12644                         break;
12645                 case RTE_FLOW_ACTION_TYPE_FLAG:
12646                         action_flags |= MLX5_FLOW_ACTION_FLAG;
12647                         dev_flow->handle->mark = 1;
12648                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12649                                 struct rte_flow_action_mark mark = {
12650                                         .id = MLX5_FLOW_MARK_DEFAULT,
12651                                 };
12652
12653                                 if (flow_dv_convert_action_mark(dev, &mark,
12654                                                                 mhdr_res,
12655                                                                 error))
12656                                         return -rte_errno;
12657                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12658                                 break;
12659                         }
12660                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
12661                         /*
12662                          * Only one FLAG or MARK is supported per device flow
12663                          * right now. So the pointer to the tag resource must be
12664                          * zero before the register process.
12665                          */
12666                         MLX5_ASSERT(!handle->dvh.rix_tag);
12667                         if (flow_dv_tag_resource_register(dev, tag_be,
12668                                                           dev_flow, error))
12669                                 return -rte_errno;
12670                         MLX5_ASSERT(dev_flow->dv.tag_resource);
12671                         dev_flow->dv.actions[actions_n++] =
12672                                         dev_flow->dv.tag_resource->action;
12673                         break;
12674                 case RTE_FLOW_ACTION_TYPE_MARK:
12675                         action_flags |= MLX5_FLOW_ACTION_MARK;
12676                         dev_flow->handle->mark = 1;
12677                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12678                                 const struct rte_flow_action_mark *mark =
12679                                         (const struct rte_flow_action_mark *)
12680                                                 actions->conf;
12681
12682                                 if (flow_dv_convert_action_mark(dev, mark,
12683                                                                 mhdr_res,
12684                                                                 error))
12685                                         return -rte_errno;
12686                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12687                                 break;
12688                         }
12689                         /* Fall-through */
12690                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
12691                         /* Legacy (non-extensive) MARK action. */
12692                         tag_be = mlx5_flow_mark_set
12693                               (((const struct rte_flow_action_mark *)
12694                                (actions->conf))->id);
12695                         MLX5_ASSERT(!handle->dvh.rix_tag);
12696                         if (flow_dv_tag_resource_register(dev, tag_be,
12697                                                           dev_flow, error))
12698                                 return -rte_errno;
12699                         MLX5_ASSERT(dev_flow->dv.tag_resource);
12700                         dev_flow->dv.actions[actions_n++] =
12701                                         dev_flow->dv.tag_resource->action;
12702                         break;
12703                 case RTE_FLOW_ACTION_TYPE_SET_META:
12704                         if (flow_dv_convert_action_set_meta
12705                                 (dev, mhdr_res, attr,
12706                                  (const struct rte_flow_action_set_meta *)
12707                                   actions->conf, error))
12708                                 return -rte_errno;
12709                         action_flags |= MLX5_FLOW_ACTION_SET_META;
12710                         break;
12711                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
12712                         if (flow_dv_convert_action_set_tag
12713                                 (dev, mhdr_res,
12714                                  (const struct rte_flow_action_set_tag *)
12715                                   actions->conf, error))
12716                                 return -rte_errno;
12717                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
12718                         break;
12719                 case RTE_FLOW_ACTION_TYPE_DROP:
12720                         action_flags |= MLX5_FLOW_ACTION_DROP;
12721                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_DROP;
12722                         break;
12723                 case RTE_FLOW_ACTION_TYPE_QUEUE:
12724                         queue = actions->conf;
12725                         rss_desc->queue_num = 1;
12726                         rss_desc->queue[0] = queue->index;
12727                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
12728                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
12729                         sample_act->action_flags |= MLX5_FLOW_ACTION_QUEUE;
12730                         num_of_dest++;
12731                         break;
12732                 case RTE_FLOW_ACTION_TYPE_RSS:
12733                         rss = actions->conf;
12734                         memcpy(rss_desc->queue, rss->queue,
12735                                rss->queue_num * sizeof(uint16_t));
12736                         rss_desc->queue_num = rss->queue_num;
12737                         /* NULL RSS key indicates default RSS key. */
12738                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
12739                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
12740                         /*
12741                          * rss->level and rss.types should be set in advance
12742                          * when expanding items for RSS.
12743                          */
12744                         action_flags |= MLX5_FLOW_ACTION_RSS;
12745                         dev_flow->handle->fate_action = rss_desc->shared_rss ?
12746                                 MLX5_FLOW_FATE_SHARED_RSS :
12747                                 MLX5_FLOW_FATE_QUEUE;
12748                         break;
12749                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
12750                         owner_idx = (uint32_t)(uintptr_t)action->conf;
12751                         age_act = flow_aso_age_get_by_idx(dev, owner_idx);
12752                         if (flow->age == 0) {
12753                                 flow->age = owner_idx;
12754                                 __atomic_fetch_add(&age_act->refcnt, 1,
12755                                                    __ATOMIC_RELAXED);
12756                         }
12757                         age_act_pos = actions_n++;
12758                         action_flags |= MLX5_FLOW_ACTION_AGE;
12759                         break;
12760                 case RTE_FLOW_ACTION_TYPE_AGE:
12761                         non_shared_age = action->conf;
12762                         age_act_pos = actions_n++;
12763                         action_flags |= MLX5_FLOW_ACTION_AGE;
12764                         break;
12765                 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
12766                         owner_idx = (uint32_t)(uintptr_t)action->conf;
12767                         cnt_act = flow_dv_counter_get_by_idx(dev, owner_idx,
12768                                                              NULL);
12769                         MLX5_ASSERT(cnt_act != NULL);
12770                         /**
12771                          * When creating meter drop flow in drop table, the
12772                          * counter should not overwrite the rte flow counter.
12773                          */
12774                         if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
12775                             dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP) {
12776                                 dev_flow->dv.actions[actions_n++] =
12777                                                         cnt_act->action;
12778                         } else {
12779                                 if (flow->counter == 0) {
12780                                         flow->counter = owner_idx;
12781                                         __atomic_fetch_add
12782                                                 (&cnt_act->shared_info.refcnt,
12783                                                  1, __ATOMIC_RELAXED);
12784                                 }
12785                                 /* Save information first, will apply later. */
12786                                 action_flags |= MLX5_FLOW_ACTION_COUNT;
12787                         }
12788                         break;
12789                 case RTE_FLOW_ACTION_TYPE_COUNT:
12790                         if (!priv->sh->devx) {
12791                                 return rte_flow_error_set
12792                                               (error, ENOTSUP,
12793                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12794                                                NULL,
12795                                                "count action not supported");
12796                         }
12797                         /* Save information first, will apply later. */
12798                         count = action->conf;
12799                         action_flags |= MLX5_FLOW_ACTION_COUNT;
12800                         break;
12801                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
12802                         dev_flow->dv.actions[actions_n++] =
12803                                                 priv->sh->pop_vlan_action;
12804                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
12805                         break;
12806                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
12807                         if (!(action_flags &
12808                               MLX5_FLOW_ACTION_OF_SET_VLAN_VID))
12809                                 flow_dev_get_vlan_info_from_items(items, &vlan);
12810                         vlan.eth_proto = rte_be_to_cpu_16
12811                              ((((const struct rte_flow_action_of_push_vlan *)
12812                                                    actions->conf)->ethertype));
12813                         found_action = mlx5_flow_find_action
12814                                         (actions + 1,
12815                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
12816                         if (found_action)
12817                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12818                         found_action = mlx5_flow_find_action
12819                                         (actions + 1,
12820                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
12821                         if (found_action)
12822                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12823                         if (flow_dv_create_action_push_vlan
12824                                             (dev, attr, &vlan, dev_flow, error))
12825                                 return -rte_errno;
12826                         dev_flow->dv.actions[actions_n++] =
12827                                         dev_flow->dv.push_vlan_res->action;
12828                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
12829                         break;
12830                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
12831                         /* of_vlan_push action handled this action */
12832                         MLX5_ASSERT(action_flags &
12833                                     MLX5_FLOW_ACTION_OF_PUSH_VLAN);
12834                         break;
12835                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
12836                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
12837                                 break;
12838                         flow_dev_get_vlan_info_from_items(items, &vlan);
12839                         mlx5_update_vlan_vid_pcp(actions, &vlan);
12840                         /* If no VLAN push - this is a modify header action */
12841                         if (flow_dv_convert_action_modify_vlan_vid
12842                                                 (mhdr_res, actions, error))
12843                                 return -rte_errno;
12844                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
12845                         break;
12846                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
12847                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
12848                         if (flow_dv_create_action_l2_encap(dev, actions,
12849                                                            dev_flow,
12850                                                            attr->transfer,
12851                                                            error))
12852                                 return -rte_errno;
12853                         dev_flow->dv.actions[actions_n++] =
12854                                         dev_flow->dv.encap_decap->action;
12855                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
12856                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12857                                 sample_act->action_flags |=
12858                                                         MLX5_FLOW_ACTION_ENCAP;
12859                         break;
12860                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
12861                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
12862                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
12863                                                            attr->transfer,
12864                                                            error))
12865                                 return -rte_errno;
12866                         dev_flow->dv.actions[actions_n++] =
12867                                         dev_flow->dv.encap_decap->action;
12868                         action_flags |= MLX5_FLOW_ACTION_DECAP;
12869                         break;
12870                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
12871                         /* Handle encap with preceding decap. */
12872                         if (action_flags & MLX5_FLOW_ACTION_DECAP) {
12873                                 if (flow_dv_create_action_raw_encap
12874                                         (dev, actions, dev_flow, attr, error))
12875                                         return -rte_errno;
12876                                 dev_flow->dv.actions[actions_n++] =
12877                                         dev_flow->dv.encap_decap->action;
12878                         } else {
12879                                 /* Handle encap without preceding decap. */
12880                                 if (flow_dv_create_action_l2_encap
12881                                     (dev, actions, dev_flow, attr->transfer,
12882                                      error))
12883                                         return -rte_errno;
12884                                 dev_flow->dv.actions[actions_n++] =
12885                                         dev_flow->dv.encap_decap->action;
12886                         }
12887                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
12888                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12889                                 sample_act->action_flags |=
12890                                                         MLX5_FLOW_ACTION_ENCAP;
12891                         break;
12892                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
12893                         while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
12894                                 ;
12895                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
12896                                 if (flow_dv_create_action_l2_decap
12897                                     (dev, dev_flow, attr->transfer, error))
12898                                         return -rte_errno;
12899                                 dev_flow->dv.actions[actions_n++] =
12900                                         dev_flow->dv.encap_decap->action;
12901                         }
12902                         /* If decap is followed by encap, handle it at encap. */
12903                         action_flags |= MLX5_FLOW_ACTION_DECAP;
12904                         break;
12905                 case MLX5_RTE_FLOW_ACTION_TYPE_JUMP:
12906                         dev_flow->dv.actions[actions_n++] =
12907                                 (void *)(uintptr_t)action->conf;
12908                         action_flags |= MLX5_FLOW_ACTION_JUMP;
12909                         break;
12910                 case RTE_FLOW_ACTION_TYPE_JUMP:
12911                         jump_group = ((const struct rte_flow_action_jump *)
12912                                                         action->conf)->group;
12913                         grp_info.std_tbl_fix = 0;
12914                         if (dev_flow->skip_scale &
12915                                 (1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT))
12916                                 grp_info.skip_scale = 1;
12917                         else
12918                                 grp_info.skip_scale = 0;
12919                         ret = mlx5_flow_group_to_table(dev, tunnel,
12920                                                        jump_group,
12921                                                        &table,
12922                                                        &grp_info, error);
12923                         if (ret)
12924                                 return ret;
12925                         tbl = flow_dv_tbl_resource_get(dev, table, attr->egress,
12926                                                        attr->transfer,
12927                                                        !!dev_flow->external,
12928                                                        tunnel, jump_group, 0,
12929                                                        0, error);
12930                         if (!tbl)
12931                                 return rte_flow_error_set
12932                                                 (error, errno,
12933                                                  RTE_FLOW_ERROR_TYPE_ACTION,
12934                                                  NULL,
12935                                                  "cannot create jump action.");
12936                         if (flow_dv_jump_tbl_resource_register
12937                             (dev, tbl, dev_flow, error)) {
12938                                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
12939                                 return rte_flow_error_set
12940                                                 (error, errno,
12941                                                  RTE_FLOW_ERROR_TYPE_ACTION,
12942                                                  NULL,
12943                                                  "cannot create jump action.");
12944                         }
12945                         dev_flow->dv.actions[actions_n++] =
12946                                         dev_flow->dv.jump->action;
12947                         action_flags |= MLX5_FLOW_ACTION_JUMP;
12948                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_JUMP;
12949                         sample_act->action_flags |= MLX5_FLOW_ACTION_JUMP;
12950                         num_of_dest++;
12951                         break;
12952                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
12953                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
12954                         if (flow_dv_convert_action_modify_mac
12955                                         (mhdr_res, actions, error))
12956                                 return -rte_errno;
12957                         action_flags |= actions->type ==
12958                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
12959                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
12960                                         MLX5_FLOW_ACTION_SET_MAC_DST;
12961                         break;
12962                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
12963                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
12964                         if (flow_dv_convert_action_modify_ipv4
12965                                         (mhdr_res, actions, error))
12966                                 return -rte_errno;
12967                         action_flags |= actions->type ==
12968                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
12969                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
12970                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
12971                         break;
12972                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
12973                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
12974                         if (flow_dv_convert_action_modify_ipv6
12975                                         (mhdr_res, actions, error))
12976                                 return -rte_errno;
12977                         action_flags |= actions->type ==
12978                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
12979                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
12980                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
12981                         break;
12982                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
12983                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
12984                         if (flow_dv_convert_action_modify_tp
12985                                         (mhdr_res, actions, items,
12986                                          &flow_attr, dev_flow, !!(action_flags &
12987                                          MLX5_FLOW_ACTION_DECAP), error))
12988                                 return -rte_errno;
12989                         action_flags |= actions->type ==
12990                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
12991                                         MLX5_FLOW_ACTION_SET_TP_SRC :
12992                                         MLX5_FLOW_ACTION_SET_TP_DST;
12993                         break;
12994                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
12995                         if (flow_dv_convert_action_modify_dec_ttl
12996                                         (mhdr_res, items, &flow_attr, dev_flow,
12997                                          !!(action_flags &
12998                                          MLX5_FLOW_ACTION_DECAP), error))
12999                                 return -rte_errno;
13000                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
13001                         break;
13002                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
13003                         if (flow_dv_convert_action_modify_ttl
13004                                         (mhdr_res, actions, items, &flow_attr,
13005                                          dev_flow, !!(action_flags &
13006                                          MLX5_FLOW_ACTION_DECAP), error))
13007                                 return -rte_errno;
13008                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
13009                         break;
13010                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
13011                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
13012                         if (flow_dv_convert_action_modify_tcp_seq
13013                                         (mhdr_res, actions, error))
13014                                 return -rte_errno;
13015                         action_flags |= actions->type ==
13016                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
13017                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
13018                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
13019                         break;
13020
13021                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
13022                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
13023                         if (flow_dv_convert_action_modify_tcp_ack
13024                                         (mhdr_res, actions, error))
13025                                 return -rte_errno;
13026                         action_flags |= actions->type ==
13027                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
13028                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
13029                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
13030                         break;
13031                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
13032                         if (flow_dv_convert_action_set_reg
13033                                         (mhdr_res, actions, error))
13034                                 return -rte_errno;
13035                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13036                         break;
13037                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
13038                         if (flow_dv_convert_action_copy_mreg
13039                                         (dev, mhdr_res, actions, error))
13040                                 return -rte_errno;
13041                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13042                         break;
13043                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
13044                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
13045                         dev_flow->handle->fate_action =
13046                                         MLX5_FLOW_FATE_DEFAULT_MISS;
13047                         break;
13048                 case RTE_FLOW_ACTION_TYPE_METER:
13049                         if (!wks->fm)
13050                                 return rte_flow_error_set(error, rte_errno,
13051                                         RTE_FLOW_ERROR_TYPE_ACTION,
13052                                         NULL, "Failed to get meter in flow.");
13053                         /* Set the meter action. */
13054                         dev_flow->dv.actions[actions_n++] =
13055                                 wks->fm->meter_action;
13056                         action_flags |= MLX5_FLOW_ACTION_METER;
13057                         break;
13058                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
13059                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
13060                                                               actions, error))
13061                                 return -rte_errno;
13062                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
13063                         break;
13064                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
13065                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
13066                                                               actions, error))
13067                                 return -rte_errno;
13068                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
13069                         break;
13070                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
13071                         sample_act_pos = actions_n;
13072                         sample = (const struct rte_flow_action_sample *)
13073                                  action->conf;
13074                         actions_n++;
13075                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
13076                         /* put encap action into group if work with port id */
13077                         if ((action_flags & MLX5_FLOW_ACTION_ENCAP) &&
13078                             (action_flags & MLX5_FLOW_ACTION_PORT_ID))
13079                                 sample_act->action_flags |=
13080                                                         MLX5_FLOW_ACTION_ENCAP;
13081                         break;
13082                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
13083                         if (flow_dv_convert_action_modify_field
13084                                         (dev, mhdr_res, actions, attr, error))
13085                                 return -rte_errno;
13086                         action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
13087                         break;
13088                 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
13089                         owner_idx = (uint32_t)(uintptr_t)action->conf;
13090                         ct = flow_aso_ct_get_by_idx(dev, owner_idx);
13091                         if (!ct)
13092                                 return rte_flow_error_set(error, EINVAL,
13093                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13094                                                 NULL,
13095                                                 "Failed to get CT object.");
13096                         if (mlx5_aso_ct_available(priv->sh, ct))
13097                                 return rte_flow_error_set(error, rte_errno,
13098                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13099                                                 NULL,
13100                                                 "CT is unavailable.");
13101                         if (ct->is_original)
13102                                 dev_flow->dv.actions[actions_n] =
13103                                                         ct->dr_action_orig;
13104                         else
13105                                 dev_flow->dv.actions[actions_n] =
13106                                                         ct->dr_action_rply;
13107                         if (flow->ct == 0) {
13108                                 flow->indirect_type =
13109                                                 MLX5_INDIRECT_ACTION_TYPE_CT;
13110                                 flow->ct = owner_idx;
13111                                 __atomic_fetch_add(&ct->refcnt, 1,
13112                                                    __ATOMIC_RELAXED);
13113                         }
13114                         actions_n++;
13115                         action_flags |= MLX5_FLOW_ACTION_CT;
13116                         break;
13117                 case RTE_FLOW_ACTION_TYPE_END:
13118                         actions_end = true;
13119                         if (mhdr_res->actions_num) {
13120                                 /* create modify action if needed. */
13121                                 if (flow_dv_modify_hdr_resource_register
13122                                         (dev, mhdr_res, dev_flow, error))
13123                                         return -rte_errno;
13124                                 dev_flow->dv.actions[modify_action_position] =
13125                                         handle->dvh.modify_hdr->action;
13126                         }
13127                         /*
13128                          * Handle AGE and COUNT action by single HW counter
13129                          * when they are not shared.
13130                          */
13131                         if (action_flags & MLX5_FLOW_ACTION_AGE) {
13132                                 if ((non_shared_age && count) ||
13133                                     !(priv->sh->flow_hit_aso_en &&
13134                                       (attr->group || attr->transfer))) {
13135                                         /* Creates age by counters. */
13136                                         cnt_act = flow_dv_prepare_counter
13137                                                                 (dev, dev_flow,
13138                                                                  flow, count,
13139                                                                  non_shared_age,
13140                                                                  error);
13141                                         if (!cnt_act)
13142                                                 return -rte_errno;
13143                                         dev_flow->dv.actions[age_act_pos] =
13144                                                                 cnt_act->action;
13145                                         break;
13146                                 }
13147                                 if (!flow->age && non_shared_age) {
13148                                         flow->age = flow_dv_aso_age_alloc
13149                                                                 (dev, error);
13150                                         if (!flow->age)
13151                                                 return -rte_errno;
13152                                         flow_dv_aso_age_params_init
13153                                                     (dev, flow->age,
13154                                                      non_shared_age->context ?
13155                                                      non_shared_age->context :
13156                                                      (void *)(uintptr_t)
13157                                                      (dev_flow->flow_idx),
13158                                                      non_shared_age->timeout);
13159                                 }
13160                                 age_act = flow_aso_age_get_by_idx(dev,
13161                                                                   flow->age);
13162                                 dev_flow->dv.actions[age_act_pos] =
13163                                                              age_act->dr_action;
13164                         }
13165                         if (action_flags & MLX5_FLOW_ACTION_COUNT) {
13166                                 /*
13167                                  * Create one count action, to be used
13168                                  * by all sub-flows.
13169                                  */
13170                                 cnt_act = flow_dv_prepare_counter(dev, dev_flow,
13171                                                                   flow, count,
13172                                                                   NULL, error);
13173                                 if (!cnt_act)
13174                                         return -rte_errno;
13175                                 dev_flow->dv.actions[actions_n++] =
13176                                                                 cnt_act->action;
13177                         }
13178                 default:
13179                         break;
13180                 }
13181                 if (mhdr_res->actions_num &&
13182                     modify_action_position == UINT32_MAX)
13183                         modify_action_position = actions_n++;
13184         }
13185         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
13186                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
13187                 int item_type = items->type;
13188
13189                 if (!mlx5_flow_os_item_supported(item_type))
13190                         return rte_flow_error_set(error, ENOTSUP,
13191                                                   RTE_FLOW_ERROR_TYPE_ITEM,
13192                                                   NULL, "item not supported");
13193                 switch (item_type) {
13194                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
13195                         flow_dv_translate_item_port_id
13196                                 (dev, match_mask, match_value, items, attr);
13197                         last_item = MLX5_FLOW_ITEM_PORT_ID;
13198                         break;
13199                 case RTE_FLOW_ITEM_TYPE_ETH:
13200                         flow_dv_translate_item_eth(match_mask, match_value,
13201                                                    items, tunnel,
13202                                                    dev_flow->dv.group);
13203                         matcher.priority = action_flags &
13204                                         MLX5_FLOW_ACTION_DEFAULT_MISS &&
13205                                         !dev_flow->external ?
13206                                         MLX5_PRIORITY_MAP_L3 :
13207                                         MLX5_PRIORITY_MAP_L2;
13208                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
13209                                              MLX5_FLOW_LAYER_OUTER_L2;
13210                         break;
13211                 case RTE_FLOW_ITEM_TYPE_VLAN:
13212                         flow_dv_translate_item_vlan(dev_flow,
13213                                                     match_mask, match_value,
13214                                                     items, tunnel,
13215                                                     dev_flow->dv.group);
13216                         matcher.priority = MLX5_PRIORITY_MAP_L2;
13217                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
13218                                               MLX5_FLOW_LAYER_INNER_VLAN) :
13219                                              (MLX5_FLOW_LAYER_OUTER_L2 |
13220                                               MLX5_FLOW_LAYER_OUTER_VLAN);
13221                         break;
13222                 case RTE_FLOW_ITEM_TYPE_IPV4:
13223                         mlx5_flow_tunnel_ip_check(items, next_protocol,
13224                                                   &item_flags, &tunnel);
13225                         flow_dv_translate_item_ipv4(match_mask, match_value,
13226                                                     items, tunnel,
13227                                                     dev_flow->dv.group);
13228                         matcher.priority = MLX5_PRIORITY_MAP_L3;
13229                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
13230                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
13231                         if (items->mask != NULL &&
13232                             ((const struct rte_flow_item_ipv4 *)
13233                              items->mask)->hdr.next_proto_id) {
13234                                 next_protocol =
13235                                         ((const struct rte_flow_item_ipv4 *)
13236                                          (items->spec))->hdr.next_proto_id;
13237                                 next_protocol &=
13238                                         ((const struct rte_flow_item_ipv4 *)
13239                                          (items->mask))->hdr.next_proto_id;
13240                         } else {
13241                                 /* Reset for inner layer. */
13242                                 next_protocol = 0xff;
13243                         }
13244                         break;
13245                 case RTE_FLOW_ITEM_TYPE_IPV6:
13246                         mlx5_flow_tunnel_ip_check(items, next_protocol,
13247                                                   &item_flags, &tunnel);
13248                         flow_dv_translate_item_ipv6(match_mask, match_value,
13249                                                     items, tunnel,
13250                                                     dev_flow->dv.group);
13251                         matcher.priority = MLX5_PRIORITY_MAP_L3;
13252                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
13253                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
13254                         if (items->mask != NULL &&
13255                             ((const struct rte_flow_item_ipv6 *)
13256                              items->mask)->hdr.proto) {
13257                                 next_protocol =
13258                                         ((const struct rte_flow_item_ipv6 *)
13259                                          items->spec)->hdr.proto;
13260                                 next_protocol &=
13261                                         ((const struct rte_flow_item_ipv6 *)
13262                                          items->mask)->hdr.proto;
13263                         } else {
13264                                 /* Reset for inner layer. */
13265                                 next_protocol = 0xff;
13266                         }
13267                         break;
13268                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
13269                         flow_dv_translate_item_ipv6_frag_ext(match_mask,
13270                                                              match_value,
13271                                                              items, tunnel);
13272                         last_item = tunnel ?
13273                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
13274                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
13275                         if (items->mask != NULL &&
13276                             ((const struct rte_flow_item_ipv6_frag_ext *)
13277                              items->mask)->hdr.next_header) {
13278                                 next_protocol =
13279                                 ((const struct rte_flow_item_ipv6_frag_ext *)
13280                                  items->spec)->hdr.next_header;
13281                                 next_protocol &=
13282                                 ((const struct rte_flow_item_ipv6_frag_ext *)
13283                                  items->mask)->hdr.next_header;
13284                         } else {
13285                                 /* Reset for inner layer. */
13286                                 next_protocol = 0xff;
13287                         }
13288                         break;
13289                 case RTE_FLOW_ITEM_TYPE_TCP:
13290                         flow_dv_translate_item_tcp(match_mask, match_value,
13291                                                    items, tunnel);
13292                         matcher.priority = MLX5_PRIORITY_MAP_L4;
13293                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
13294                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
13295                         break;
13296                 case RTE_FLOW_ITEM_TYPE_UDP:
13297                         flow_dv_translate_item_udp(match_mask, match_value,
13298                                                    items, tunnel);
13299                         matcher.priority = MLX5_PRIORITY_MAP_L4;
13300                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
13301                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
13302                         break;
13303                 case RTE_FLOW_ITEM_TYPE_GRE:
13304                         flow_dv_translate_item_gre(match_mask, match_value,
13305                                                    items, tunnel);
13306                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13307                         last_item = MLX5_FLOW_LAYER_GRE;
13308                         break;
13309                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
13310                         flow_dv_translate_item_gre_key(match_mask,
13311                                                        match_value, items);
13312                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
13313                         break;
13314                 case RTE_FLOW_ITEM_TYPE_NVGRE:
13315                         flow_dv_translate_item_nvgre(match_mask, match_value,
13316                                                      items, tunnel);
13317                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13318                         last_item = MLX5_FLOW_LAYER_GRE;
13319                         break;
13320                 case RTE_FLOW_ITEM_TYPE_VXLAN:
13321                         flow_dv_translate_item_vxlan(dev, attr,
13322                                                      match_mask, match_value,
13323                                                      items, tunnel);
13324                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13325                         last_item = MLX5_FLOW_LAYER_VXLAN;
13326                         break;
13327                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
13328                         flow_dv_translate_item_vxlan_gpe(match_mask,
13329                                                          match_value, items,
13330                                                          tunnel);
13331                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13332                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
13333                         break;
13334                 case RTE_FLOW_ITEM_TYPE_GENEVE:
13335                         flow_dv_translate_item_geneve(match_mask, match_value,
13336                                                       items, tunnel);
13337                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13338                         last_item = MLX5_FLOW_LAYER_GENEVE;
13339                         break;
13340                 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
13341                         ret = flow_dv_translate_item_geneve_opt(dev, match_mask,
13342                                                           match_value,
13343                                                           items, error);
13344                         if (ret)
13345                                 return rte_flow_error_set(error, -ret,
13346                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13347                                         "cannot create GENEVE TLV option");
13348                         flow->geneve_tlv_option = 1;
13349                         last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
13350                         break;
13351                 case RTE_FLOW_ITEM_TYPE_MPLS:
13352                         flow_dv_translate_item_mpls(match_mask, match_value,
13353                                                     items, last_item, tunnel);
13354                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13355                         last_item = MLX5_FLOW_LAYER_MPLS;
13356                         break;
13357                 case RTE_FLOW_ITEM_TYPE_MARK:
13358                         flow_dv_translate_item_mark(dev, match_mask,
13359                                                     match_value, items);
13360                         last_item = MLX5_FLOW_ITEM_MARK;
13361                         break;
13362                 case RTE_FLOW_ITEM_TYPE_META:
13363                         flow_dv_translate_item_meta(dev, match_mask,
13364                                                     match_value, attr, items);
13365                         last_item = MLX5_FLOW_ITEM_METADATA;
13366                         break;
13367                 case RTE_FLOW_ITEM_TYPE_ICMP:
13368                         flow_dv_translate_item_icmp(match_mask, match_value,
13369                                                     items, tunnel);
13370                         last_item = MLX5_FLOW_LAYER_ICMP;
13371                         break;
13372                 case RTE_FLOW_ITEM_TYPE_ICMP6:
13373                         flow_dv_translate_item_icmp6(match_mask, match_value,
13374                                                       items, tunnel);
13375                         last_item = MLX5_FLOW_LAYER_ICMP6;
13376                         break;
13377                 case RTE_FLOW_ITEM_TYPE_TAG:
13378                         flow_dv_translate_item_tag(dev, match_mask,
13379                                                    match_value, items);
13380                         last_item = MLX5_FLOW_ITEM_TAG;
13381                         break;
13382                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
13383                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
13384                                                         match_value, items);
13385                         last_item = MLX5_FLOW_ITEM_TAG;
13386                         break;
13387                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
13388                         flow_dv_translate_item_tx_queue(dev, match_mask,
13389                                                         match_value,
13390                                                         items);
13391                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
13392                         break;
13393                 case RTE_FLOW_ITEM_TYPE_GTP:
13394                         flow_dv_translate_item_gtp(match_mask, match_value,
13395                                                    items, tunnel);
13396                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13397                         last_item = MLX5_FLOW_LAYER_GTP;
13398                         break;
13399                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
13400                         ret = flow_dv_translate_item_gtp_psc(match_mask,
13401                                                           match_value,
13402                                                           items);
13403                         if (ret)
13404                                 return rte_flow_error_set(error, -ret,
13405                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13406                                         "cannot create GTP PSC item");
13407                         last_item = MLX5_FLOW_LAYER_GTP_PSC;
13408                         break;
13409                 case RTE_FLOW_ITEM_TYPE_ECPRI:
13410                         if (!mlx5_flex_parser_ecpri_exist(dev)) {
13411                                 /* Create it only the first time to be used. */
13412                                 ret = mlx5_flex_parser_ecpri_alloc(dev);
13413                                 if (ret)
13414                                         return rte_flow_error_set
13415                                                 (error, -ret,
13416                                                 RTE_FLOW_ERROR_TYPE_ITEM,
13417                                                 NULL,
13418                                                 "cannot create eCPRI parser");
13419                         }
13420                         flow_dv_translate_item_ecpri(dev, match_mask,
13421                                                      match_value, items,
13422                                                      last_item);
13423                         /* No other protocol should follow eCPRI layer. */
13424                         last_item = MLX5_FLOW_LAYER_ECPRI;
13425                         break;
13426                 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
13427                         flow_dv_translate_item_integrity(items, integrity_items,
13428                                                          &last_item);
13429                         break;
13430                 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
13431                         flow_dv_translate_item_aso_ct(dev, match_mask,
13432                                                       match_value, items);
13433                         break;
13434                 default:
13435                         break;
13436                 }
13437                 item_flags |= last_item;
13438         }
13439         /*
13440          * When E-Switch mode is enabled, we have two cases where we need to
13441          * set the source port manually.
13442          * The first one, is in case of Nic steering rule, and the second is
13443          * E-Switch rule where no port_id item was found. In both cases
13444          * the source port is set according the current port in use.
13445          */
13446         if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
13447             (priv->representor || priv->master)) {
13448                 if (flow_dv_translate_item_port_id(dev, match_mask,
13449                                                    match_value, NULL, attr))
13450                         return -rte_errno;
13451         }
13452         if (item_flags & MLX5_FLOW_ITEM_INTEGRITY) {
13453                 flow_dv_translate_item_integrity_post(match_mask, match_value,
13454                                                       integrity_items,
13455                                                       item_flags);
13456         }
13457 #ifdef RTE_LIBRTE_MLX5_DEBUG
13458         MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
13459                                               dev_flow->dv.value.buf));
13460 #endif
13461         /*
13462          * Layers may be already initialized from prefix flow if this dev_flow
13463          * is the suffix flow.
13464          */
13465         handle->layers |= item_flags;
13466         if (action_flags & MLX5_FLOW_ACTION_RSS)
13467                 flow_dv_hashfields_set(dev_flow, rss_desc);
13468         /* If has RSS action in the sample action, the Sample/Mirror resource
13469          * should be registered after the hash filed be update.
13470          */
13471         if (action_flags & MLX5_FLOW_ACTION_SAMPLE) {
13472                 ret = flow_dv_translate_action_sample(dev,
13473                                                       sample,
13474                                                       dev_flow, attr,
13475                                                       &num_of_dest,
13476                                                       sample_actions,
13477                                                       &sample_res,
13478                                                       error);
13479                 if (ret < 0)
13480                         return ret;
13481                 ret = flow_dv_create_action_sample(dev,
13482                                                    dev_flow,
13483                                                    num_of_dest,
13484                                                    &sample_res,
13485                                                    &mdest_res,
13486                                                    sample_actions,
13487                                                    action_flags,
13488                                                    error);
13489                 if (ret < 0)
13490                         return rte_flow_error_set
13491                                                 (error, rte_errno,
13492                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13493                                                 NULL,
13494                                                 "cannot create sample action");
13495                 if (num_of_dest > 1) {
13496                         dev_flow->dv.actions[sample_act_pos] =
13497                         dev_flow->dv.dest_array_res->action;
13498                 } else {
13499                         dev_flow->dv.actions[sample_act_pos] =
13500                         dev_flow->dv.sample_res->verbs_action;
13501                 }
13502         }
13503         /*
13504          * For multiple destination (sample action with ratio=1), the encap
13505          * action and port id action will be combined into group action.
13506          * So need remove the original these actions in the flow and only
13507          * use the sample action instead of.
13508          */
13509         if (num_of_dest > 1 &&
13510             (sample_act->dr_port_id_action || sample_act->dr_jump_action)) {
13511                 int i;
13512                 void *temp_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
13513
13514                 for (i = 0; i < actions_n; i++) {
13515                         if ((sample_act->dr_encap_action &&
13516                                 sample_act->dr_encap_action ==
13517                                 dev_flow->dv.actions[i]) ||
13518                                 (sample_act->dr_port_id_action &&
13519                                 sample_act->dr_port_id_action ==
13520                                 dev_flow->dv.actions[i]) ||
13521                                 (sample_act->dr_jump_action &&
13522                                 sample_act->dr_jump_action ==
13523                                 dev_flow->dv.actions[i]))
13524                                 continue;
13525                         temp_actions[tmp_actions_n++] = dev_flow->dv.actions[i];
13526                 }
13527                 memcpy((void *)dev_flow->dv.actions,
13528                                 (void *)temp_actions,
13529                                 tmp_actions_n * sizeof(void *));
13530                 actions_n = tmp_actions_n;
13531         }
13532         dev_flow->dv.actions_n = actions_n;
13533         dev_flow->act_flags = action_flags;
13534         if (wks->skip_matcher_reg)
13535                 return 0;
13536         /* Register matcher. */
13537         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
13538                                     matcher.mask.size);
13539         matcher.priority = mlx5_get_matcher_priority(dev, attr,
13540                                                      matcher.priority,
13541                                                      dev_flow->external);
13542         /**
13543          * When creating meter drop flow in drop table, using original
13544          * 5-tuple match, the matcher priority should be lower than
13545          * mtr_id matcher.
13546          */
13547         if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
13548             dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP &&
13549             matcher.priority <= MLX5_REG_BITS)
13550                 matcher.priority += MLX5_REG_BITS;
13551         /* reserved field no needs to be set to 0 here. */
13552         tbl_key.is_fdb = attr->transfer;
13553         tbl_key.is_egress = attr->egress;
13554         tbl_key.level = dev_flow->dv.group;
13555         tbl_key.id = dev_flow->dv.table_id;
13556         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow,
13557                                      tunnel, attr->group, error))
13558                 return -rte_errno;
13559         return 0;
13560 }
13561
13562 /**
13563  * Set hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13564  * and tunnel.
13565  *
13566  * @param[in, out] action
13567  *   Shred RSS action holding hash RX queue objects.
13568  * @param[in] hash_fields
13569  *   Defines combination of packet fields to participate in RX hash.
13570  * @param[in] tunnel
13571  *   Tunnel type
13572  * @param[in] hrxq_idx
13573  *   Hash RX queue index to set.
13574  *
13575  * @return
13576  *   0 on success, otherwise negative errno value.
13577  */
13578 static int
13579 __flow_dv_action_rss_hrxq_set(struct mlx5_shared_action_rss *action,
13580                               const uint64_t hash_fields,
13581                               uint32_t hrxq_idx)
13582 {
13583         uint32_t *hrxqs = action->hrxq;
13584
13585         switch (hash_fields & ~IBV_RX_HASH_INNER) {
13586         case MLX5_RSS_HASH_IPV4:
13587                 /* fall-through. */
13588         case MLX5_RSS_HASH_IPV4_DST_ONLY:
13589                 /* fall-through. */
13590         case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13591                 hrxqs[0] = hrxq_idx;
13592                 return 0;
13593         case MLX5_RSS_HASH_IPV4_TCP:
13594                 /* fall-through. */
13595         case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13596                 /* fall-through. */
13597         case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13598                 hrxqs[1] = hrxq_idx;
13599                 return 0;
13600         case MLX5_RSS_HASH_IPV4_UDP:
13601                 /* fall-through. */
13602         case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13603                 /* fall-through. */
13604         case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13605                 hrxqs[2] = hrxq_idx;
13606                 return 0;
13607         case MLX5_RSS_HASH_IPV6:
13608                 /* fall-through. */
13609         case MLX5_RSS_HASH_IPV6_DST_ONLY:
13610                 /* fall-through. */
13611         case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13612                 hrxqs[3] = hrxq_idx;
13613                 return 0;
13614         case MLX5_RSS_HASH_IPV6_TCP:
13615                 /* fall-through. */
13616         case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13617                 /* fall-through. */
13618         case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13619                 hrxqs[4] = hrxq_idx;
13620                 return 0;
13621         case MLX5_RSS_HASH_IPV6_UDP:
13622                 /* fall-through. */
13623         case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13624                 /* fall-through. */
13625         case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13626                 hrxqs[5] = hrxq_idx;
13627                 return 0;
13628         case MLX5_RSS_HASH_NONE:
13629                 hrxqs[6] = hrxq_idx;
13630                 return 0;
13631         default:
13632                 return -1;
13633         }
13634 }
13635
13636 /**
13637  * Look up for hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13638  * and tunnel.
13639  *
13640  * @param[in] dev
13641  *   Pointer to the Ethernet device structure.
13642  * @param[in] idx
13643  *   Shared RSS action ID holding hash RX queue objects.
13644  * @param[in] hash_fields
13645  *   Defines combination of packet fields to participate in RX hash.
13646  * @param[in] tunnel
13647  *   Tunnel type
13648  *
13649  * @return
13650  *   Valid hash RX queue index, otherwise 0.
13651  */
13652 static uint32_t
13653 __flow_dv_action_rss_hrxq_lookup(struct rte_eth_dev *dev, uint32_t idx,
13654                                  const uint64_t hash_fields)
13655 {
13656         struct mlx5_priv *priv = dev->data->dev_private;
13657         struct mlx5_shared_action_rss *shared_rss =
13658             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
13659         const uint32_t *hrxqs = shared_rss->hrxq;
13660
13661         switch (hash_fields & ~IBV_RX_HASH_INNER) {
13662         case MLX5_RSS_HASH_IPV4:
13663                 /* fall-through. */
13664         case MLX5_RSS_HASH_IPV4_DST_ONLY:
13665                 /* fall-through. */
13666         case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13667                 return hrxqs[0];
13668         case MLX5_RSS_HASH_IPV4_TCP:
13669                 /* fall-through. */
13670         case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13671                 /* fall-through. */
13672         case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13673                 return hrxqs[1];
13674         case MLX5_RSS_HASH_IPV4_UDP:
13675                 /* fall-through. */
13676         case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13677                 /* fall-through. */
13678         case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13679                 return hrxqs[2];
13680         case MLX5_RSS_HASH_IPV6:
13681                 /* fall-through. */
13682         case MLX5_RSS_HASH_IPV6_DST_ONLY:
13683                 /* fall-through. */
13684         case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13685                 return hrxqs[3];
13686         case MLX5_RSS_HASH_IPV6_TCP:
13687                 /* fall-through. */
13688         case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13689                 /* fall-through. */
13690         case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13691                 return hrxqs[4];
13692         case MLX5_RSS_HASH_IPV6_UDP:
13693                 /* fall-through. */
13694         case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13695                 /* fall-through. */
13696         case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13697                 return hrxqs[5];
13698         case MLX5_RSS_HASH_NONE:
13699                 return hrxqs[6];
13700         default:
13701                 return 0;
13702         }
13703
13704 }
13705
13706 /**
13707  * Apply the flow to the NIC, lock free,
13708  * (mutex should be acquired by caller).
13709  *
13710  * @param[in] dev
13711  *   Pointer to the Ethernet device structure.
13712  * @param[in, out] flow
13713  *   Pointer to flow structure.
13714  * @param[out] error
13715  *   Pointer to error structure.
13716  *
13717  * @return
13718  *   0 on success, a negative errno value otherwise and rte_errno is set.
13719  */
13720 static int
13721 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
13722               struct rte_flow_error *error)
13723 {
13724         struct mlx5_flow_dv_workspace *dv;
13725         struct mlx5_flow_handle *dh;
13726         struct mlx5_flow_handle_dv *dv_h;
13727         struct mlx5_flow *dev_flow;
13728         struct mlx5_priv *priv = dev->data->dev_private;
13729         uint32_t handle_idx;
13730         int n;
13731         int err;
13732         int idx;
13733         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
13734         struct mlx5_flow_rss_desc *rss_desc = &wks->rss_desc;
13735         uint8_t misc_mask;
13736
13737         MLX5_ASSERT(wks);
13738         for (idx = wks->flow_idx - 1; idx >= 0; idx--) {
13739                 dev_flow = &wks->flows[idx];
13740                 dv = &dev_flow->dv;
13741                 dh = dev_flow->handle;
13742                 dv_h = &dh->dvh;
13743                 n = dv->actions_n;
13744                 if (dh->fate_action == MLX5_FLOW_FATE_DROP) {
13745                         if (dv->transfer) {
13746                                 MLX5_ASSERT(priv->sh->dr_drop_action);
13747                                 dv->actions[n++] = priv->sh->dr_drop_action;
13748                         } else {
13749 #ifdef HAVE_MLX5DV_DR
13750                                 /* DR supports drop action placeholder. */
13751                                 MLX5_ASSERT(priv->sh->dr_drop_action);
13752                                 dv->actions[n++] = dv->group ?
13753                                         priv->sh->dr_drop_action :
13754                                         priv->root_drop_action;
13755 #else
13756                                 /* For DV we use the explicit drop queue. */
13757                                 MLX5_ASSERT(priv->drop_queue.hrxq);
13758                                 dv->actions[n++] =
13759                                                 priv->drop_queue.hrxq->action;
13760 #endif
13761                         }
13762                 } else if ((dh->fate_action == MLX5_FLOW_FATE_QUEUE &&
13763                            !dv_h->rix_sample && !dv_h->rix_dest_array)) {
13764                         struct mlx5_hrxq *hrxq;
13765                         uint32_t hrxq_idx;
13766
13767                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow, rss_desc,
13768                                                     &hrxq_idx);
13769                         if (!hrxq) {
13770                                 rte_flow_error_set
13771                                         (error, rte_errno,
13772                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13773                                          "cannot get hash queue");
13774                                 goto error;
13775                         }
13776                         dh->rix_hrxq = hrxq_idx;
13777                         dv->actions[n++] = hrxq->action;
13778                 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13779                         struct mlx5_hrxq *hrxq = NULL;
13780                         uint32_t hrxq_idx;
13781
13782                         hrxq_idx = __flow_dv_action_rss_hrxq_lookup(dev,
13783                                                 rss_desc->shared_rss,
13784                                                 dev_flow->hash_fields);
13785                         if (hrxq_idx)
13786                                 hrxq = mlx5_ipool_get
13787                                         (priv->sh->ipool[MLX5_IPOOL_HRXQ],
13788                                          hrxq_idx);
13789                         if (!hrxq) {
13790                                 rte_flow_error_set
13791                                         (error, rte_errno,
13792                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13793                                          "cannot get hash queue");
13794                                 goto error;
13795                         }
13796                         dh->rix_srss = rss_desc->shared_rss;
13797                         dv->actions[n++] = hrxq->action;
13798                 } else if (dh->fate_action == MLX5_FLOW_FATE_DEFAULT_MISS) {
13799                         if (!priv->sh->default_miss_action) {
13800                                 rte_flow_error_set
13801                                         (error, rte_errno,
13802                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13803                                          "default miss action not be created.");
13804                                 goto error;
13805                         }
13806                         dv->actions[n++] = priv->sh->default_miss_action;
13807                 }
13808                 misc_mask = flow_dv_matcher_enable(dv->value.buf);
13809                 __flow_dv_adjust_buf_size(&dv->value.size, misc_mask);
13810                 err = mlx5_flow_os_create_flow(dv_h->matcher->matcher_object,
13811                                                (void *)&dv->value, n,
13812                                                dv->actions, &dh->drv_flow);
13813                 if (err) {
13814                         rte_flow_error_set
13815                                 (error, errno,
13816                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
13817                                 NULL,
13818                                 (!priv->config.allow_duplicate_pattern &&
13819                                 errno == EEXIST) ?
13820                                 "duplicating pattern is not allowed" :
13821                                 "hardware refuses to create flow");
13822                         goto error;
13823                 }
13824                 if (priv->vmwa_context &&
13825                     dh->vf_vlan.tag && !dh->vf_vlan.created) {
13826                         /*
13827                          * The rule contains the VLAN pattern.
13828                          * For VF we are going to create VLAN
13829                          * interface to make hypervisor set correct
13830                          * e-Switch vport context.
13831                          */
13832                         mlx5_vlan_vmwa_acquire(dev, &dh->vf_vlan);
13833                 }
13834         }
13835         return 0;
13836 error:
13837         err = rte_errno; /* Save rte_errno before cleanup. */
13838         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
13839                        handle_idx, dh, next) {
13840                 /* hrxq is union, don't clear it if the flag is not set. */
13841                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE && dh->rix_hrxq) {
13842                         mlx5_hrxq_release(dev, dh->rix_hrxq);
13843                         dh->rix_hrxq = 0;
13844                 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13845                         dh->rix_srss = 0;
13846                 }
13847                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
13848                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
13849         }
13850         rte_errno = err; /* Restore rte_errno. */
13851         return -rte_errno;
13852 }
13853
13854 void
13855 flow_dv_matcher_remove_cb(void *tool_ctx __rte_unused,
13856                           struct mlx5_list_entry *entry)
13857 {
13858         struct mlx5_flow_dv_matcher *resource = container_of(entry,
13859                                                              typeof(*resource),
13860                                                              entry);
13861
13862         claim_zero(mlx5_flow_os_destroy_flow_matcher(resource->matcher_object));
13863         mlx5_free(resource);
13864 }
13865
13866 /**
13867  * Release the flow matcher.
13868  *
13869  * @param dev
13870  *   Pointer to Ethernet device.
13871  * @param port_id
13872  *   Index to port ID action resource.
13873  *
13874  * @return
13875  *   1 while a reference on it exists, 0 when freed.
13876  */
13877 static int
13878 flow_dv_matcher_release(struct rte_eth_dev *dev,
13879                         struct mlx5_flow_handle *handle)
13880 {
13881         struct mlx5_flow_dv_matcher *matcher = handle->dvh.matcher;
13882         struct mlx5_flow_tbl_data_entry *tbl = container_of(matcher->tbl,
13883                                                             typeof(*tbl), tbl);
13884         int ret;
13885
13886         MLX5_ASSERT(matcher->matcher_object);
13887         ret = mlx5_list_unregister(tbl->matchers, &matcher->entry);
13888         flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl->tbl);
13889         return ret;
13890 }
13891
13892 void
13893 flow_dv_encap_decap_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
13894 {
13895         struct mlx5_dev_ctx_shared *sh = tool_ctx;
13896         struct mlx5_flow_dv_encap_decap_resource *res =
13897                                        container_of(entry, typeof(*res), entry);
13898
13899         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
13900         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
13901 }
13902
13903 /**
13904  * Release an encap/decap resource.
13905  *
13906  * @param dev
13907  *   Pointer to Ethernet device.
13908  * @param encap_decap_idx
13909  *   Index of encap decap resource.
13910  *
13911  * @return
13912  *   1 while a reference on it exists, 0 when freed.
13913  */
13914 static int
13915 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
13916                                      uint32_t encap_decap_idx)
13917 {
13918         struct mlx5_priv *priv = dev->data->dev_private;
13919         struct mlx5_flow_dv_encap_decap_resource *resource;
13920
13921         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
13922                                   encap_decap_idx);
13923         if (!resource)
13924                 return 0;
13925         MLX5_ASSERT(resource->action);
13926         return mlx5_hlist_unregister(priv->sh->encaps_decaps, &resource->entry);
13927 }
13928
13929 /**
13930  * Release an jump to table action resource.
13931  *
13932  * @param dev
13933  *   Pointer to Ethernet device.
13934  * @param rix_jump
13935  *   Index to the jump action resource.
13936  *
13937  * @return
13938  *   1 while a reference on it exists, 0 when freed.
13939  */
13940 static int
13941 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
13942                                   uint32_t rix_jump)
13943 {
13944         struct mlx5_priv *priv = dev->data->dev_private;
13945         struct mlx5_flow_tbl_data_entry *tbl_data;
13946
13947         tbl_data = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_JUMP],
13948                                   rix_jump);
13949         if (!tbl_data)
13950                 return 0;
13951         return flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl_data->tbl);
13952 }
13953
13954 void
13955 flow_dv_modify_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
13956 {
13957         struct mlx5_flow_dv_modify_hdr_resource *res =
13958                 container_of(entry, typeof(*res), entry);
13959         struct mlx5_dev_ctx_shared *sh = tool_ctx;
13960
13961         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
13962         mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
13963 }
13964
13965 /**
13966  * Release a modify-header resource.
13967  *
13968  * @param dev
13969  *   Pointer to Ethernet device.
13970  * @param handle
13971  *   Pointer to mlx5_flow_handle.
13972  *
13973  * @return
13974  *   1 while a reference on it exists, 0 when freed.
13975  */
13976 static int
13977 flow_dv_modify_hdr_resource_release(struct rte_eth_dev *dev,
13978                                     struct mlx5_flow_handle *handle)
13979 {
13980         struct mlx5_priv *priv = dev->data->dev_private;
13981         struct mlx5_flow_dv_modify_hdr_resource *entry = handle->dvh.modify_hdr;
13982
13983         MLX5_ASSERT(entry->action);
13984         return mlx5_hlist_unregister(priv->sh->modify_cmds, &entry->entry);
13985 }
13986
13987 void
13988 flow_dv_port_id_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
13989 {
13990         struct mlx5_dev_ctx_shared *sh = tool_ctx;
13991         struct mlx5_flow_dv_port_id_action_resource *resource =
13992                                   container_of(entry, typeof(*resource), entry);
13993
13994         claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
13995         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
13996 }
13997
13998 /**
13999  * Release port ID action resource.
14000  *
14001  * @param dev
14002  *   Pointer to Ethernet device.
14003  * @param handle
14004  *   Pointer to mlx5_flow_handle.
14005  *
14006  * @return
14007  *   1 while a reference on it exists, 0 when freed.
14008  */
14009 static int
14010 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
14011                                         uint32_t port_id)
14012 {
14013         struct mlx5_priv *priv = dev->data->dev_private;
14014         struct mlx5_flow_dv_port_id_action_resource *resource;
14015
14016         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PORT_ID], port_id);
14017         if (!resource)
14018                 return 0;
14019         MLX5_ASSERT(resource->action);
14020         return mlx5_list_unregister(priv->sh->port_id_action_list,
14021                                     &resource->entry);
14022 }
14023
14024 /**
14025  * Release shared RSS action resource.
14026  *
14027  * @param dev
14028  *   Pointer to Ethernet device.
14029  * @param srss
14030  *   Shared RSS action index.
14031  */
14032 static void
14033 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss)
14034 {
14035         struct mlx5_priv *priv = dev->data->dev_private;
14036         struct mlx5_shared_action_rss *shared_rss;
14037
14038         shared_rss = mlx5_ipool_get
14039                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], srss);
14040         __atomic_sub_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14041 }
14042
14043 void
14044 flow_dv_push_vlan_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14045 {
14046         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14047         struct mlx5_flow_dv_push_vlan_action_resource *resource =
14048                         container_of(entry, typeof(*resource), entry);
14049
14050         claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14051         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
14052 }
14053
14054 /**
14055  * Release push vlan action resource.
14056  *
14057  * @param dev
14058  *   Pointer to Ethernet device.
14059  * @param handle
14060  *   Pointer to mlx5_flow_handle.
14061  *
14062  * @return
14063  *   1 while a reference on it exists, 0 when freed.
14064  */
14065 static int
14066 flow_dv_push_vlan_action_resource_release(struct rte_eth_dev *dev,
14067                                           struct mlx5_flow_handle *handle)
14068 {
14069         struct mlx5_priv *priv = dev->data->dev_private;
14070         struct mlx5_flow_dv_push_vlan_action_resource *resource;
14071         uint32_t idx = handle->dvh.rix_push_vlan;
14072
14073         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
14074         if (!resource)
14075                 return 0;
14076         MLX5_ASSERT(resource->action);
14077         return mlx5_list_unregister(priv->sh->push_vlan_action_list,
14078                                     &resource->entry);
14079 }
14080
14081 /**
14082  * Release the fate resource.
14083  *
14084  * @param dev
14085  *   Pointer to Ethernet device.
14086  * @param handle
14087  *   Pointer to mlx5_flow_handle.
14088  */
14089 static void
14090 flow_dv_fate_resource_release(struct rte_eth_dev *dev,
14091                                struct mlx5_flow_handle *handle)
14092 {
14093         if (!handle->rix_fate)
14094                 return;
14095         switch (handle->fate_action) {
14096         case MLX5_FLOW_FATE_QUEUE:
14097                 if (!handle->dvh.rix_sample && !handle->dvh.rix_dest_array)
14098                         mlx5_hrxq_release(dev, handle->rix_hrxq);
14099                 break;
14100         case MLX5_FLOW_FATE_JUMP:
14101                 flow_dv_jump_tbl_resource_release(dev, handle->rix_jump);
14102                 break;
14103         case MLX5_FLOW_FATE_PORT_ID:
14104                 flow_dv_port_id_action_resource_release(dev,
14105                                 handle->rix_port_id_action);
14106                 break;
14107         default:
14108                 DRV_LOG(DEBUG, "Incorrect fate action:%d", handle->fate_action);
14109                 break;
14110         }
14111         handle->rix_fate = 0;
14112 }
14113
14114 void
14115 flow_dv_sample_remove_cb(void *tool_ctx __rte_unused,
14116                          struct mlx5_list_entry *entry)
14117 {
14118         struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
14119                                                               typeof(*resource),
14120                                                               entry);
14121         struct rte_eth_dev *dev = resource->dev;
14122         struct mlx5_priv *priv = dev->data->dev_private;
14123
14124         if (resource->verbs_action)
14125                 claim_zero(mlx5_flow_os_destroy_flow_action
14126                                                       (resource->verbs_action));
14127         if (resource->normal_path_tbl)
14128                 flow_dv_tbl_resource_release(MLX5_SH(dev),
14129                                              resource->normal_path_tbl);
14130         flow_dv_sample_sub_actions_release(dev, &resource->sample_idx);
14131         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
14132         DRV_LOG(DEBUG, "sample resource %p: removed", (void *)resource);
14133 }
14134
14135 /**
14136  * Release an sample resource.
14137  *
14138  * @param dev
14139  *   Pointer to Ethernet device.
14140  * @param handle
14141  *   Pointer to mlx5_flow_handle.
14142  *
14143  * @return
14144  *   1 while a reference on it exists, 0 when freed.
14145  */
14146 static int
14147 flow_dv_sample_resource_release(struct rte_eth_dev *dev,
14148                                      struct mlx5_flow_handle *handle)
14149 {
14150         struct mlx5_priv *priv = dev->data->dev_private;
14151         struct mlx5_flow_dv_sample_resource *resource;
14152
14153         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
14154                                   handle->dvh.rix_sample);
14155         if (!resource)
14156                 return 0;
14157         MLX5_ASSERT(resource->verbs_action);
14158         return mlx5_list_unregister(priv->sh->sample_action_list,
14159                                     &resource->entry);
14160 }
14161
14162 void
14163 flow_dv_dest_array_remove_cb(void *tool_ctx __rte_unused,
14164                              struct mlx5_list_entry *entry)
14165 {
14166         struct mlx5_flow_dv_dest_array_resource *resource =
14167                         container_of(entry, typeof(*resource), entry);
14168         struct rte_eth_dev *dev = resource->dev;
14169         struct mlx5_priv *priv = dev->data->dev_private;
14170         uint32_t i = 0;
14171
14172         MLX5_ASSERT(resource->action);
14173         if (resource->action)
14174                 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14175         for (; i < resource->num_of_dest; i++)
14176                 flow_dv_sample_sub_actions_release(dev,
14177                                                    &resource->sample_idx[i]);
14178         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
14179         DRV_LOG(DEBUG, "destination array resource %p: removed",
14180                 (void *)resource);
14181 }
14182
14183 /**
14184  * Release an destination array resource.
14185  *
14186  * @param dev
14187  *   Pointer to Ethernet device.
14188  * @param handle
14189  *   Pointer to mlx5_flow_handle.
14190  *
14191  * @return
14192  *   1 while a reference on it exists, 0 when freed.
14193  */
14194 static int
14195 flow_dv_dest_array_resource_release(struct rte_eth_dev *dev,
14196                                     struct mlx5_flow_handle *handle)
14197 {
14198         struct mlx5_priv *priv = dev->data->dev_private;
14199         struct mlx5_flow_dv_dest_array_resource *resource;
14200
14201         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
14202                                   handle->dvh.rix_dest_array);
14203         if (!resource)
14204                 return 0;
14205         MLX5_ASSERT(resource->action);
14206         return mlx5_list_unregister(priv->sh->dest_array_list,
14207                                     &resource->entry);
14208 }
14209
14210 static void
14211 flow_dv_geneve_tlv_option_resource_release(struct rte_eth_dev *dev)
14212 {
14213         struct mlx5_priv *priv = dev->data->dev_private;
14214         struct mlx5_dev_ctx_shared *sh = priv->sh;
14215         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
14216                                 sh->geneve_tlv_option_resource;
14217         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
14218         if (geneve_opt_resource) {
14219                 if (!(__atomic_sub_fetch(&geneve_opt_resource->refcnt, 1,
14220                                          __ATOMIC_RELAXED))) {
14221                         claim_zero(mlx5_devx_cmd_destroy
14222                                         (geneve_opt_resource->obj));
14223                         mlx5_free(sh->geneve_tlv_option_resource);
14224                         sh->geneve_tlv_option_resource = NULL;
14225                 }
14226         }
14227         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
14228 }
14229
14230 /**
14231  * Remove the flow from the NIC but keeps it in memory.
14232  * Lock free, (mutex should be acquired by caller).
14233  *
14234  * @param[in] dev
14235  *   Pointer to Ethernet device.
14236  * @param[in, out] flow
14237  *   Pointer to flow structure.
14238  */
14239 static void
14240 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
14241 {
14242         struct mlx5_flow_handle *dh;
14243         uint32_t handle_idx;
14244         struct mlx5_priv *priv = dev->data->dev_private;
14245
14246         if (!flow)
14247                 return;
14248         handle_idx = flow->dev_handles;
14249         while (handle_idx) {
14250                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14251                                     handle_idx);
14252                 if (!dh)
14253                         return;
14254                 if (dh->drv_flow) {
14255                         claim_zero(mlx5_flow_os_destroy_flow(dh->drv_flow));
14256                         dh->drv_flow = NULL;
14257                 }
14258                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE)
14259                         flow_dv_fate_resource_release(dev, dh);
14260                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
14261                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
14262                 handle_idx = dh->next.next;
14263         }
14264 }
14265
14266 /**
14267  * Remove the flow from the NIC and the memory.
14268  * Lock free, (mutex should be acquired by caller).
14269  *
14270  * @param[in] dev
14271  *   Pointer to the Ethernet device structure.
14272  * @param[in, out] flow
14273  *   Pointer to flow structure.
14274  */
14275 static void
14276 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
14277 {
14278         struct mlx5_flow_handle *dev_handle;
14279         struct mlx5_priv *priv = dev->data->dev_private;
14280         struct mlx5_flow_meter_info *fm = NULL;
14281         uint32_t srss = 0;
14282
14283         if (!flow)
14284                 return;
14285         flow_dv_remove(dev, flow);
14286         if (flow->counter) {
14287                 flow_dv_counter_free(dev, flow->counter);
14288                 flow->counter = 0;
14289         }
14290         if (flow->meter) {
14291                 fm = flow_dv_meter_find_by_idx(priv, flow->meter);
14292                 if (fm)
14293                         mlx5_flow_meter_detach(priv, fm);
14294                 flow->meter = 0;
14295         }
14296         /* Keep the current age handling by default. */
14297         if (flow->indirect_type == MLX5_INDIRECT_ACTION_TYPE_CT && flow->ct)
14298                 flow_dv_aso_ct_release(dev, flow->ct, NULL);
14299         else if (flow->age)
14300                 flow_dv_aso_age_release(dev, flow->age);
14301         if (flow->geneve_tlv_option) {
14302                 flow_dv_geneve_tlv_option_resource_release(dev);
14303                 flow->geneve_tlv_option = 0;
14304         }
14305         while (flow->dev_handles) {
14306                 uint32_t tmp_idx = flow->dev_handles;
14307
14308                 dev_handle = mlx5_ipool_get(priv->sh->ipool
14309                                             [MLX5_IPOOL_MLX5_FLOW], tmp_idx);
14310                 if (!dev_handle)
14311                         return;
14312                 flow->dev_handles = dev_handle->next.next;
14313                 if (dev_handle->dvh.matcher)
14314                         flow_dv_matcher_release(dev, dev_handle);
14315                 if (dev_handle->dvh.rix_sample)
14316                         flow_dv_sample_resource_release(dev, dev_handle);
14317                 if (dev_handle->dvh.rix_dest_array)
14318                         flow_dv_dest_array_resource_release(dev, dev_handle);
14319                 if (dev_handle->dvh.rix_encap_decap)
14320                         flow_dv_encap_decap_resource_release(dev,
14321                                 dev_handle->dvh.rix_encap_decap);
14322                 if (dev_handle->dvh.modify_hdr)
14323                         flow_dv_modify_hdr_resource_release(dev, dev_handle);
14324                 if (dev_handle->dvh.rix_push_vlan)
14325                         flow_dv_push_vlan_action_resource_release(dev,
14326                                                                   dev_handle);
14327                 if (dev_handle->dvh.rix_tag)
14328                         flow_dv_tag_release(dev,
14329                                             dev_handle->dvh.rix_tag);
14330                 if (dev_handle->fate_action != MLX5_FLOW_FATE_SHARED_RSS)
14331                         flow_dv_fate_resource_release(dev, dev_handle);
14332                 else if (!srss)
14333                         srss = dev_handle->rix_srss;
14334                 if (fm && dev_handle->is_meter_flow_id &&
14335                     dev_handle->split_flow_id)
14336                         mlx5_ipool_free(fm->flow_ipool,
14337                                         dev_handle->split_flow_id);
14338                 else if (dev_handle->split_flow_id &&
14339                     !dev_handle->is_meter_flow_id)
14340                         mlx5_ipool_free(priv->sh->ipool
14341                                         [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
14342                                         dev_handle->split_flow_id);
14343                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14344                            tmp_idx);
14345         }
14346         if (srss)
14347                 flow_dv_shared_rss_action_release(dev, srss);
14348 }
14349
14350 /**
14351  * Release array of hash RX queue objects.
14352  * Helper function.
14353  *
14354  * @param[in] dev
14355  *   Pointer to the Ethernet device structure.
14356  * @param[in, out] hrxqs
14357  *   Array of hash RX queue objects.
14358  *
14359  * @return
14360  *   Total number of references to hash RX queue objects in *hrxqs* array
14361  *   after this operation.
14362  */
14363 static int
14364 __flow_dv_hrxqs_release(struct rte_eth_dev *dev,
14365                         uint32_t (*hrxqs)[MLX5_RSS_HASH_FIELDS_LEN])
14366 {
14367         size_t i;
14368         int remaining = 0;
14369
14370         for (i = 0; i < RTE_DIM(*hrxqs); i++) {
14371                 int ret = mlx5_hrxq_release(dev, (*hrxqs)[i]);
14372
14373                 if (!ret)
14374                         (*hrxqs)[i] = 0;
14375                 remaining += ret;
14376         }
14377         return remaining;
14378 }
14379
14380 /**
14381  * Release all hash RX queue objects representing shared RSS action.
14382  *
14383  * @param[in] dev
14384  *   Pointer to the Ethernet device structure.
14385  * @param[in, out] action
14386  *   Shared RSS action to remove hash RX queue objects from.
14387  *
14388  * @return
14389  *   Total number of references to hash RX queue objects stored in *action*
14390  *   after this operation.
14391  *   Expected to be 0 if no external references held.
14392  */
14393 static int
14394 __flow_dv_action_rss_hrxqs_release(struct rte_eth_dev *dev,
14395                                  struct mlx5_shared_action_rss *shared_rss)
14396 {
14397         return __flow_dv_hrxqs_release(dev, &shared_rss->hrxq);
14398 }
14399
14400 /**
14401  * Adjust L3/L4 hash value of pre-created shared RSS hrxq according to
14402  * user input.
14403  *
14404  * Only one hash value is available for one L3+L4 combination:
14405  * for example:
14406  * MLX5_RSS_HASH_IPV4, MLX5_RSS_HASH_IPV4_SRC_ONLY, and
14407  * MLX5_RSS_HASH_IPV4_DST_ONLY are mutually exclusive so they can share
14408  * same slot in mlx5_rss_hash_fields.
14409  *
14410  * @param[in] rss
14411  *   Pointer to the shared action RSS conf.
14412  * @param[in, out] hash_field
14413  *   hash_field variable needed to be adjusted.
14414  *
14415  * @return
14416  *   void
14417  */
14418 static void
14419 __flow_dv_action_rss_l34_hash_adjust(struct mlx5_shared_action_rss *rss,
14420                                      uint64_t *hash_field)
14421 {
14422         uint64_t rss_types = rss->origin.types;
14423
14424         switch (*hash_field & ~IBV_RX_HASH_INNER) {
14425         case MLX5_RSS_HASH_IPV4:
14426                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
14427                         *hash_field &= ~MLX5_RSS_HASH_IPV4;
14428                         if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
14429                                 *hash_field |= IBV_RX_HASH_DST_IPV4;
14430                         else if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
14431                                 *hash_field |= IBV_RX_HASH_SRC_IPV4;
14432                         else
14433                                 *hash_field |= MLX5_RSS_HASH_IPV4;
14434                 }
14435                 return;
14436         case MLX5_RSS_HASH_IPV6:
14437                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
14438                         *hash_field &= ~MLX5_RSS_HASH_IPV6;
14439                         if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
14440                                 *hash_field |= IBV_RX_HASH_DST_IPV6;
14441                         else if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
14442                                 *hash_field |= IBV_RX_HASH_SRC_IPV6;
14443                         else
14444                                 *hash_field |= MLX5_RSS_HASH_IPV6;
14445                 }
14446                 return;
14447         case MLX5_RSS_HASH_IPV4_UDP:
14448                 /* fall-through. */
14449         case MLX5_RSS_HASH_IPV6_UDP:
14450                 if (rss_types & RTE_ETH_RSS_UDP) {
14451                         *hash_field &= ~MLX5_UDP_IBV_RX_HASH;
14452                         if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
14453                                 *hash_field |= IBV_RX_HASH_DST_PORT_UDP;
14454                         else if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
14455                                 *hash_field |= IBV_RX_HASH_SRC_PORT_UDP;
14456                         else
14457                                 *hash_field |= MLX5_UDP_IBV_RX_HASH;
14458                 }
14459                 return;
14460         case MLX5_RSS_HASH_IPV4_TCP:
14461                 /* fall-through. */
14462         case MLX5_RSS_HASH_IPV6_TCP:
14463                 if (rss_types & RTE_ETH_RSS_TCP) {
14464                         *hash_field &= ~MLX5_TCP_IBV_RX_HASH;
14465                         if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
14466                                 *hash_field |= IBV_RX_HASH_DST_PORT_TCP;
14467                         else if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
14468                                 *hash_field |= IBV_RX_HASH_SRC_PORT_TCP;
14469                         else
14470                                 *hash_field |= MLX5_TCP_IBV_RX_HASH;
14471                 }
14472                 return;
14473         default:
14474                 return;
14475         }
14476 }
14477
14478 /**
14479  * Setup shared RSS action.
14480  * Prepare set of hash RX queue objects sufficient to handle all valid
14481  * hash_fields combinations (see enum ibv_rx_hash_fields).
14482  *
14483  * @param[in] dev
14484  *   Pointer to the Ethernet device structure.
14485  * @param[in] action_idx
14486  *   Shared RSS action ipool index.
14487  * @param[in, out] action
14488  *   Partially initialized shared RSS action.
14489  * @param[out] error
14490  *   Perform verbose error reporting if not NULL. Initialized in case of
14491  *   error only.
14492  *
14493  * @return
14494  *   0 on success, otherwise negative errno value.
14495  */
14496 static int
14497 __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
14498                            uint32_t action_idx,
14499                            struct mlx5_shared_action_rss *shared_rss,
14500                            struct rte_flow_error *error)
14501 {
14502         struct mlx5_flow_rss_desc rss_desc = { 0 };
14503         size_t i;
14504         int err;
14505
14506         if (mlx5_ind_table_obj_setup(dev, shared_rss->ind_tbl)) {
14507                 return rte_flow_error_set(error, rte_errno,
14508                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14509                                           "cannot setup indirection table");
14510         }
14511         memcpy(rss_desc.key, shared_rss->origin.key, MLX5_RSS_HASH_KEY_LEN);
14512         rss_desc.key_len = MLX5_RSS_HASH_KEY_LEN;
14513         rss_desc.const_q = shared_rss->origin.queue;
14514         rss_desc.queue_num = shared_rss->origin.queue_num;
14515         /* Set non-zero value to indicate a shared RSS. */
14516         rss_desc.shared_rss = action_idx;
14517         rss_desc.ind_tbl = shared_rss->ind_tbl;
14518         for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
14519                 uint32_t hrxq_idx;
14520                 uint64_t hash_fields = mlx5_rss_hash_fields[i];
14521                 int tunnel = 0;
14522
14523                 __flow_dv_action_rss_l34_hash_adjust(shared_rss, &hash_fields);
14524                 if (shared_rss->origin.level > 1) {
14525                         hash_fields |= IBV_RX_HASH_INNER;
14526                         tunnel = 1;
14527                 }
14528                 rss_desc.tunnel = tunnel;
14529                 rss_desc.hash_fields = hash_fields;
14530                 hrxq_idx = mlx5_hrxq_get(dev, &rss_desc);
14531                 if (!hrxq_idx) {
14532                         rte_flow_error_set
14533                                 (error, rte_errno,
14534                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14535                                  "cannot get hash queue");
14536                         goto error_hrxq_new;
14537                 }
14538                 err = __flow_dv_action_rss_hrxq_set
14539                         (shared_rss, hash_fields, hrxq_idx);
14540                 MLX5_ASSERT(!err);
14541         }
14542         return 0;
14543 error_hrxq_new:
14544         err = rte_errno;
14545         __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14546         if (!mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true))
14547                 shared_rss->ind_tbl = NULL;
14548         rte_errno = err;
14549         return -rte_errno;
14550 }
14551
14552 /**
14553  * Create shared RSS action.
14554  *
14555  * @param[in] dev
14556  *   Pointer to the Ethernet device structure.
14557  * @param[in] conf
14558  *   Shared action configuration.
14559  * @param[in] rss
14560  *   RSS action specification used to create shared action.
14561  * @param[out] error
14562  *   Perform verbose error reporting if not NULL. Initialized in case of
14563  *   error only.
14564  *
14565  * @return
14566  *   A valid shared action ID in case of success, 0 otherwise and
14567  *   rte_errno is set.
14568  */
14569 static uint32_t
14570 __flow_dv_action_rss_create(struct rte_eth_dev *dev,
14571                             const struct rte_flow_indir_action_conf *conf,
14572                             const struct rte_flow_action_rss *rss,
14573                             struct rte_flow_error *error)
14574 {
14575         struct mlx5_priv *priv = dev->data->dev_private;
14576         struct mlx5_shared_action_rss *shared_rss = NULL;
14577         void *queue = NULL;
14578         struct rte_flow_action_rss *origin;
14579         const uint8_t *rss_key;
14580         uint32_t queue_size = rss->queue_num * sizeof(uint16_t);
14581         uint32_t idx;
14582
14583         RTE_SET_USED(conf);
14584         queue = mlx5_malloc(0, RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14585                             0, SOCKET_ID_ANY);
14586         shared_rss = mlx5_ipool_zmalloc
14587                          (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], &idx);
14588         if (!shared_rss || !queue) {
14589                 rte_flow_error_set(error, ENOMEM,
14590                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14591                                    "cannot allocate resource memory");
14592                 goto error_rss_init;
14593         }
14594         if (idx > (1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET)) {
14595                 rte_flow_error_set(error, E2BIG,
14596                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14597                                    "rss action number out of range");
14598                 goto error_rss_init;
14599         }
14600         shared_rss->ind_tbl = mlx5_malloc(MLX5_MEM_ZERO,
14601                                           sizeof(*shared_rss->ind_tbl),
14602                                           0, SOCKET_ID_ANY);
14603         if (!shared_rss->ind_tbl) {
14604                 rte_flow_error_set(error, ENOMEM,
14605                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14606                                    "cannot allocate resource memory");
14607                 goto error_rss_init;
14608         }
14609         memcpy(queue, rss->queue, queue_size);
14610         shared_rss->ind_tbl->queues = queue;
14611         shared_rss->ind_tbl->queues_n = rss->queue_num;
14612         origin = &shared_rss->origin;
14613         origin->func = rss->func;
14614         origin->level = rss->level;
14615         /* RSS type 0 indicates default RSS type (RTE_ETH_RSS_IP). */
14616         origin->types = !rss->types ? RTE_ETH_RSS_IP : rss->types;
14617         /* NULL RSS key indicates default RSS key. */
14618         rss_key = !rss->key ? rss_hash_default_key : rss->key;
14619         memcpy(shared_rss->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
14620         origin->key = &shared_rss->key[0];
14621         origin->key_len = MLX5_RSS_HASH_KEY_LEN;
14622         origin->queue = queue;
14623         origin->queue_num = rss->queue_num;
14624         if (__flow_dv_action_rss_setup(dev, idx, shared_rss, error))
14625                 goto error_rss_init;
14626         rte_spinlock_init(&shared_rss->action_rss_sl);
14627         __atomic_add_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14628         rte_spinlock_lock(&priv->shared_act_sl);
14629         ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14630                      &priv->rss_shared_actions, idx, shared_rss, next);
14631         rte_spinlock_unlock(&priv->shared_act_sl);
14632         return idx;
14633 error_rss_init:
14634         if (shared_rss) {
14635                 if (shared_rss->ind_tbl)
14636                         mlx5_free(shared_rss->ind_tbl);
14637                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14638                                 idx);
14639         }
14640         if (queue)
14641                 mlx5_free(queue);
14642         return 0;
14643 }
14644
14645 /**
14646  * Destroy the shared RSS action.
14647  * Release related hash RX queue objects.
14648  *
14649  * @param[in] dev
14650  *   Pointer to the Ethernet device structure.
14651  * @param[in] idx
14652  *   The shared RSS action object ID to be removed.
14653  * @param[out] error
14654  *   Perform verbose error reporting if not NULL. Initialized in case of
14655  *   error only.
14656  *
14657  * @return
14658  *   0 on success, otherwise negative errno value.
14659  */
14660 static int
14661 __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
14662                              struct rte_flow_error *error)
14663 {
14664         struct mlx5_priv *priv = dev->data->dev_private;
14665         struct mlx5_shared_action_rss *shared_rss =
14666             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14667         uint32_t old_refcnt = 1;
14668         int remaining;
14669         uint16_t *queue = NULL;
14670
14671         if (!shared_rss)
14672                 return rte_flow_error_set(error, EINVAL,
14673                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14674                                           "invalid shared action");
14675         if (!__atomic_compare_exchange_n(&shared_rss->refcnt, &old_refcnt,
14676                                          0, 0, __ATOMIC_ACQUIRE,
14677                                          __ATOMIC_RELAXED))
14678                 return rte_flow_error_set(error, EBUSY,
14679                                           RTE_FLOW_ERROR_TYPE_ACTION,
14680                                           NULL,
14681                                           "shared rss has references");
14682         remaining = __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14683         if (remaining)
14684                 return rte_flow_error_set(error, EBUSY,
14685                                           RTE_FLOW_ERROR_TYPE_ACTION,
14686                                           NULL,
14687                                           "shared rss hrxq has references");
14688         queue = shared_rss->ind_tbl->queues;
14689         remaining = mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true);
14690         if (remaining)
14691                 return rte_flow_error_set(error, EBUSY,
14692                                           RTE_FLOW_ERROR_TYPE_ACTION,
14693                                           NULL,
14694                                           "shared rss indirection table has"
14695                                           " references");
14696         mlx5_free(queue);
14697         rte_spinlock_lock(&priv->shared_act_sl);
14698         ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14699                      &priv->rss_shared_actions, idx, shared_rss, next);
14700         rte_spinlock_unlock(&priv->shared_act_sl);
14701         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14702                         idx);
14703         return 0;
14704 }
14705
14706 /**
14707  * Create indirect action, lock free,
14708  * (mutex should be acquired by caller).
14709  * Dispatcher for action type specific call.
14710  *
14711  * @param[in] dev
14712  *   Pointer to the Ethernet device structure.
14713  * @param[in] conf
14714  *   Shared action configuration.
14715  * @param[in] action
14716  *   Action specification used to create indirect action.
14717  * @param[out] error
14718  *   Perform verbose error reporting if not NULL. Initialized in case of
14719  *   error only.
14720  *
14721  * @return
14722  *   A valid shared action handle in case of success, NULL otherwise and
14723  *   rte_errno is set.
14724  */
14725 static struct rte_flow_action_handle *
14726 flow_dv_action_create(struct rte_eth_dev *dev,
14727                       const struct rte_flow_indir_action_conf *conf,
14728                       const struct rte_flow_action *action,
14729                       struct rte_flow_error *err)
14730 {
14731         struct mlx5_priv *priv = dev->data->dev_private;
14732         uint32_t age_idx = 0;
14733         uint32_t idx = 0;
14734         uint32_t ret = 0;
14735
14736         switch (action->type) {
14737         case RTE_FLOW_ACTION_TYPE_RSS:
14738                 ret = __flow_dv_action_rss_create(dev, conf, action->conf, err);
14739                 idx = (MLX5_INDIRECT_ACTION_TYPE_RSS <<
14740                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14741                 break;
14742         case RTE_FLOW_ACTION_TYPE_AGE:
14743                 age_idx = flow_dv_aso_age_alloc(dev, err);
14744                 if (!age_idx) {
14745                         ret = -rte_errno;
14746                         break;
14747                 }
14748                 idx = (MLX5_INDIRECT_ACTION_TYPE_AGE <<
14749                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | age_idx;
14750                 flow_dv_aso_age_params_init(dev, age_idx,
14751                                         ((const struct rte_flow_action_age *)
14752                                                 action->conf)->context ?
14753                                         ((const struct rte_flow_action_age *)
14754                                                 action->conf)->context :
14755                                         (void *)(uintptr_t)idx,
14756                                         ((const struct rte_flow_action_age *)
14757                                                 action->conf)->timeout);
14758                 ret = age_idx;
14759                 break;
14760         case RTE_FLOW_ACTION_TYPE_COUNT:
14761                 ret = flow_dv_translate_create_counter(dev, NULL, NULL, NULL);
14762                 idx = (MLX5_INDIRECT_ACTION_TYPE_COUNT <<
14763                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14764                 break;
14765         case RTE_FLOW_ACTION_TYPE_CONNTRACK:
14766                 ret = flow_dv_translate_create_conntrack(dev, action->conf,
14767                                                          err);
14768                 idx = MLX5_INDIRECT_ACT_CT_GEN_IDX(PORT_ID(priv), ret);
14769                 break;
14770         default:
14771                 rte_flow_error_set(err, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
14772                                    NULL, "action type not supported");
14773                 break;
14774         }
14775         return ret ? (struct rte_flow_action_handle *)(uintptr_t)idx : NULL;
14776 }
14777
14778 /**
14779  * Destroy the indirect action.
14780  * Release action related resources on the NIC and the memory.
14781  * Lock free, (mutex should be acquired by caller).
14782  * Dispatcher for action type specific call.
14783  *
14784  * @param[in] dev
14785  *   Pointer to the Ethernet device structure.
14786  * @param[in] handle
14787  *   The indirect action object handle to be removed.
14788  * @param[out] error
14789  *   Perform verbose error reporting if not NULL. Initialized in case of
14790  *   error only.
14791  *
14792  * @return
14793  *   0 on success, otherwise negative errno value.
14794  */
14795 static int
14796 flow_dv_action_destroy(struct rte_eth_dev *dev,
14797                        struct rte_flow_action_handle *handle,
14798                        struct rte_flow_error *error)
14799 {
14800         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
14801         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
14802         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
14803         struct mlx5_flow_counter *cnt;
14804         uint32_t no_flow_refcnt = 1;
14805         int ret;
14806
14807         switch (type) {
14808         case MLX5_INDIRECT_ACTION_TYPE_RSS:
14809                 return __flow_dv_action_rss_release(dev, idx, error);
14810         case MLX5_INDIRECT_ACTION_TYPE_COUNT:
14811                 cnt = flow_dv_counter_get_by_idx(dev, idx, NULL);
14812                 if (!__atomic_compare_exchange_n(&cnt->shared_info.refcnt,
14813                                                  &no_flow_refcnt, 1, false,
14814                                                  __ATOMIC_ACQUIRE,
14815                                                  __ATOMIC_RELAXED))
14816                         return rte_flow_error_set(error, EBUSY,
14817                                                   RTE_FLOW_ERROR_TYPE_ACTION,
14818                                                   NULL,
14819                                                   "Indirect count action has references");
14820                 flow_dv_counter_free(dev, idx);
14821                 return 0;
14822         case MLX5_INDIRECT_ACTION_TYPE_AGE:
14823                 ret = flow_dv_aso_age_release(dev, idx);
14824                 if (ret)
14825                         /*
14826                          * In this case, the last flow has a reference will
14827                          * actually release the age action.
14828                          */
14829                         DRV_LOG(DEBUG, "Indirect age action %" PRIu32 " was"
14830                                 " released with references %d.", idx, ret);
14831                 return 0;
14832         case MLX5_INDIRECT_ACTION_TYPE_CT:
14833                 ret = flow_dv_aso_ct_release(dev, idx, error);
14834                 if (ret < 0)
14835                         return ret;
14836                 if (ret > 0)
14837                         DRV_LOG(DEBUG, "Connection tracking object %u still "
14838                                 "has references %d.", idx, ret);
14839                 return 0;
14840         default:
14841                 return rte_flow_error_set(error, ENOTSUP,
14842                                           RTE_FLOW_ERROR_TYPE_ACTION,
14843                                           NULL,
14844                                           "action type not supported");
14845         }
14846 }
14847
14848 /**
14849  * Updates in place shared RSS action configuration.
14850  *
14851  * @param[in] dev
14852  *   Pointer to the Ethernet device structure.
14853  * @param[in] idx
14854  *   The shared RSS action object ID to be updated.
14855  * @param[in] action_conf
14856  *   RSS action specification used to modify *shared_rss*.
14857  * @param[out] error
14858  *   Perform verbose error reporting if not NULL. Initialized in case of
14859  *   error only.
14860  *
14861  * @return
14862  *   0 on success, otherwise negative errno value.
14863  * @note: currently only support update of RSS queues.
14864  */
14865 static int
14866 __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
14867                             const struct rte_flow_action_rss *action_conf,
14868                             struct rte_flow_error *error)
14869 {
14870         struct mlx5_priv *priv = dev->data->dev_private;
14871         struct mlx5_shared_action_rss *shared_rss =
14872             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14873         int ret = 0;
14874         void *queue = NULL;
14875         uint16_t *queue_old = NULL;
14876         uint32_t queue_size = action_conf->queue_num * sizeof(uint16_t);
14877
14878         if (!shared_rss)
14879                 return rte_flow_error_set(error, EINVAL,
14880                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14881                                           "invalid shared action to update");
14882         if (priv->obj_ops.ind_table_modify == NULL)
14883                 return rte_flow_error_set(error, ENOTSUP,
14884                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14885                                           "cannot modify indirection table");
14886         queue = mlx5_malloc(MLX5_MEM_ZERO,
14887                             RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14888                             0, SOCKET_ID_ANY);
14889         if (!queue)
14890                 return rte_flow_error_set(error, ENOMEM,
14891                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14892                                           NULL,
14893                                           "cannot allocate resource memory");
14894         memcpy(queue, action_conf->queue, queue_size);
14895         MLX5_ASSERT(shared_rss->ind_tbl);
14896         rte_spinlock_lock(&shared_rss->action_rss_sl);
14897         queue_old = shared_rss->ind_tbl->queues;
14898         ret = mlx5_ind_table_obj_modify(dev, shared_rss->ind_tbl,
14899                                         queue, action_conf->queue_num, true);
14900         if (ret) {
14901                 mlx5_free(queue);
14902                 ret = rte_flow_error_set(error, rte_errno,
14903                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14904                                           "cannot update indirection table");
14905         } else {
14906                 mlx5_free(queue_old);
14907                 shared_rss->origin.queue = queue;
14908                 shared_rss->origin.queue_num = action_conf->queue_num;
14909         }
14910         rte_spinlock_unlock(&shared_rss->action_rss_sl);
14911         return ret;
14912 }
14913
14914 /*
14915  * Updates in place conntrack context or direction.
14916  * Context update should be synchronized.
14917  *
14918  * @param[in] dev
14919  *   Pointer to the Ethernet device structure.
14920  * @param[in] idx
14921  *   The conntrack object ID to be updated.
14922  * @param[in] update
14923  *   Pointer to the structure of information to update.
14924  * @param[out] error
14925  *   Perform verbose error reporting if not NULL. Initialized in case of
14926  *   error only.
14927  *
14928  * @return
14929  *   0 on success, otherwise negative errno value.
14930  */
14931 static int
14932 __flow_dv_action_ct_update(struct rte_eth_dev *dev, uint32_t idx,
14933                            const struct rte_flow_modify_conntrack *update,
14934                            struct rte_flow_error *error)
14935 {
14936         struct mlx5_priv *priv = dev->data->dev_private;
14937         struct mlx5_aso_ct_action *ct;
14938         const struct rte_flow_action_conntrack *new_prf;
14939         int ret = 0;
14940         uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
14941         uint32_t dev_idx;
14942
14943         if (PORT_ID(priv) != owner)
14944                 return rte_flow_error_set(error, EACCES,
14945                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14946                                           NULL,
14947                                           "CT object owned by another port");
14948         dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
14949         ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
14950         if (!ct->refcnt)
14951                 return rte_flow_error_set(error, ENOMEM,
14952                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14953                                           NULL,
14954                                           "CT object is inactive");
14955         new_prf = &update->new_ct;
14956         if (update->direction)
14957                 ct->is_original = !!new_prf->is_original_dir;
14958         if (update->state) {
14959                 /* Only validate the profile when it needs to be updated. */
14960                 ret = mlx5_validate_action_ct(dev, new_prf, error);
14961                 if (ret)
14962                         return ret;
14963                 ret = mlx5_aso_ct_update_by_wqe(priv->sh, ct, new_prf);
14964                 if (ret)
14965                         return rte_flow_error_set(error, EIO,
14966                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14967                                         NULL,
14968                                         "Failed to send CT context update WQE");
14969                 /* Block until ready or a failure. */
14970                 ret = mlx5_aso_ct_available(priv->sh, ct);
14971                 if (ret)
14972                         rte_flow_error_set(error, rte_errno,
14973                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14974                                            NULL,
14975                                            "Timeout to get the CT update");
14976         }
14977         return ret;
14978 }
14979
14980 /**
14981  * Updates in place shared action configuration, lock free,
14982  * (mutex should be acquired by caller).
14983  *
14984  * @param[in] dev
14985  *   Pointer to the Ethernet device structure.
14986  * @param[in] handle
14987  *   The indirect action object handle to be updated.
14988  * @param[in] update
14989  *   Action specification used to modify the action pointed by *handle*.
14990  *   *update* could be of same type with the action pointed by the *handle*
14991  *   handle argument, or some other structures like a wrapper, depending on
14992  *   the indirect action type.
14993  * @param[out] error
14994  *   Perform verbose error reporting if not NULL. Initialized in case of
14995  *   error only.
14996  *
14997  * @return
14998  *   0 on success, otherwise negative errno value.
14999  */
15000 static int
15001 flow_dv_action_update(struct rte_eth_dev *dev,
15002                         struct rte_flow_action_handle *handle,
15003                         const void *update,
15004                         struct rte_flow_error *err)
15005 {
15006         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15007         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15008         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15009         const void *action_conf;
15010
15011         switch (type) {
15012         case MLX5_INDIRECT_ACTION_TYPE_RSS:
15013                 action_conf = ((const struct rte_flow_action *)update)->conf;
15014                 return __flow_dv_action_rss_update(dev, idx, action_conf, err);
15015         case MLX5_INDIRECT_ACTION_TYPE_CT:
15016                 return __flow_dv_action_ct_update(dev, idx, update, err);
15017         default:
15018                 return rte_flow_error_set(err, ENOTSUP,
15019                                           RTE_FLOW_ERROR_TYPE_ACTION,
15020                                           NULL,
15021                                           "action type update not supported");
15022         }
15023 }
15024
15025 /**
15026  * Destroy the meter sub policy table rules.
15027  * Lock free, (mutex should be acquired by caller).
15028  *
15029  * @param[in] dev
15030  *   Pointer to Ethernet device.
15031  * @param[in] sub_policy
15032  *   Pointer to meter sub policy table.
15033  */
15034 static void
15035 __flow_dv_destroy_sub_policy_rules(struct rte_eth_dev *dev,
15036                              struct mlx5_flow_meter_sub_policy *sub_policy)
15037 {
15038         struct mlx5_priv *priv = dev->data->dev_private;
15039         struct mlx5_flow_tbl_data_entry *tbl;
15040         struct mlx5_flow_meter_policy *policy = sub_policy->main_policy;
15041         struct mlx5_flow_meter_info *next_fm;
15042         struct mlx5_sub_policy_color_rule *color_rule;
15043         void *tmp;
15044         uint32_t i;
15045
15046         for (i = 0; i < RTE_COLORS; i++) {
15047                 next_fm = NULL;
15048                 if (i == RTE_COLOR_GREEN && policy &&
15049                     policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR)
15050                         next_fm = mlx5_flow_meter_find(priv,
15051                                         policy->act_cnt[i].next_mtr_id, NULL);
15052                 RTE_TAILQ_FOREACH_SAFE(color_rule, &sub_policy->color_rules[i],
15053                                    next_port, tmp) {
15054                         claim_zero(mlx5_flow_os_destroy_flow(color_rule->rule));
15055                         tbl = container_of(color_rule->matcher->tbl,
15056                                            typeof(*tbl), tbl);
15057                         mlx5_list_unregister(tbl->matchers,
15058                                              &color_rule->matcher->entry);
15059                         TAILQ_REMOVE(&sub_policy->color_rules[i],
15060                                      color_rule, next_port);
15061                         mlx5_free(color_rule);
15062                         if (next_fm)
15063                                 mlx5_flow_meter_detach(priv, next_fm);
15064                 }
15065         }
15066         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15067                 if (sub_policy->rix_hrxq[i]) {
15068                         if (policy && !policy->is_hierarchy)
15069                                 mlx5_hrxq_release(dev, sub_policy->rix_hrxq[i]);
15070                         sub_policy->rix_hrxq[i] = 0;
15071                 }
15072                 if (sub_policy->jump_tbl[i]) {
15073                         flow_dv_tbl_resource_release(MLX5_SH(dev),
15074                                                      sub_policy->jump_tbl[i]);
15075                         sub_policy->jump_tbl[i] = NULL;
15076                 }
15077         }
15078         if (sub_policy->tbl_rsc) {
15079                 flow_dv_tbl_resource_release(MLX5_SH(dev),
15080                                              sub_policy->tbl_rsc);
15081                 sub_policy->tbl_rsc = NULL;
15082         }
15083 }
15084
15085 /**
15086  * Destroy policy rules, lock free,
15087  * (mutex should be acquired by caller).
15088  * Dispatcher for action type specific call.
15089  *
15090  * @param[in] dev
15091  *   Pointer to the Ethernet device structure.
15092  * @param[in] mtr_policy
15093  *   Meter policy struct.
15094  */
15095 static void
15096 flow_dv_destroy_policy_rules(struct rte_eth_dev *dev,
15097                              struct mlx5_flow_meter_policy *mtr_policy)
15098 {
15099         uint32_t i, j;
15100         struct mlx5_flow_meter_sub_policy *sub_policy;
15101         uint16_t sub_policy_num;
15102
15103         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15104                 sub_policy_num = (mtr_policy->sub_policy_num >>
15105                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15106                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15107                 for (j = 0; j < sub_policy_num; j++) {
15108                         sub_policy = mtr_policy->sub_policys[i][j];
15109                         if (sub_policy)
15110                                 __flow_dv_destroy_sub_policy_rules(dev,
15111                                                                    sub_policy);
15112                 }
15113         }
15114 }
15115
15116 /**
15117  * Destroy policy action, lock free,
15118  * (mutex should be acquired by caller).
15119  * Dispatcher for action type specific call.
15120  *
15121  * @param[in] dev
15122  *   Pointer to the Ethernet device structure.
15123  * @param[in] mtr_policy
15124  *   Meter policy struct.
15125  */
15126 static void
15127 flow_dv_destroy_mtr_policy_acts(struct rte_eth_dev *dev,
15128                       struct mlx5_flow_meter_policy *mtr_policy)
15129 {
15130         struct rte_flow_action *rss_action;
15131         struct mlx5_flow_handle dev_handle;
15132         uint32_t i, j;
15133
15134         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15135                 if (mtr_policy->act_cnt[i].rix_mark) {
15136                         flow_dv_tag_release(dev,
15137                                 mtr_policy->act_cnt[i].rix_mark);
15138                         mtr_policy->act_cnt[i].rix_mark = 0;
15139                 }
15140                 if (mtr_policy->act_cnt[i].modify_hdr) {
15141                         dev_handle.dvh.modify_hdr =
15142                                 mtr_policy->act_cnt[i].modify_hdr;
15143                         flow_dv_modify_hdr_resource_release(dev, &dev_handle);
15144                 }
15145                 switch (mtr_policy->act_cnt[i].fate_action) {
15146                 case MLX5_FLOW_FATE_SHARED_RSS:
15147                         rss_action = mtr_policy->act_cnt[i].rss;
15148                         mlx5_free(rss_action);
15149                         break;
15150                 case MLX5_FLOW_FATE_PORT_ID:
15151                         if (mtr_policy->act_cnt[i].rix_port_id_action) {
15152                                 flow_dv_port_id_action_resource_release(dev,
15153                                 mtr_policy->act_cnt[i].rix_port_id_action);
15154                                 mtr_policy->act_cnt[i].rix_port_id_action = 0;
15155                         }
15156                         break;
15157                 case MLX5_FLOW_FATE_DROP:
15158                 case MLX5_FLOW_FATE_JUMP:
15159                         for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15160                                 mtr_policy->act_cnt[i].dr_jump_action[j] =
15161                                                 NULL;
15162                         break;
15163                 default:
15164                         /*Queue action do nothing*/
15165                         break;
15166                 }
15167         }
15168         for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15169                 mtr_policy->dr_drop_action[j] = NULL;
15170 }
15171
15172 /**
15173  * Create policy action per domain, lock free,
15174  * (mutex should be acquired by caller).
15175  * Dispatcher for action type specific call.
15176  *
15177  * @param[in] dev
15178  *   Pointer to the Ethernet device structure.
15179  * @param[in] mtr_policy
15180  *   Meter policy struct.
15181  * @param[in] action
15182  *   Action specification used to create meter actions.
15183  * @param[out] error
15184  *   Perform verbose error reporting if not NULL. Initialized in case of
15185  *   error only.
15186  *
15187  * @return
15188  *   0 on success, otherwise negative errno value.
15189  */
15190 static int
15191 __flow_dv_create_domain_policy_acts(struct rte_eth_dev *dev,
15192                         struct mlx5_flow_meter_policy *mtr_policy,
15193                         const struct rte_flow_action *actions[RTE_COLORS],
15194                         enum mlx5_meter_domain domain,
15195                         struct rte_mtr_error *error)
15196 {
15197         struct mlx5_priv *priv = dev->data->dev_private;
15198         struct rte_flow_error flow_err;
15199         const struct rte_flow_action *act;
15200         uint64_t action_flags;
15201         struct mlx5_flow_handle dh;
15202         struct mlx5_flow dev_flow;
15203         struct mlx5_flow_dv_port_id_action_resource port_id_action;
15204         int i, ret;
15205         uint8_t egress, transfer;
15206         struct mlx5_meter_policy_action_container *act_cnt = NULL;
15207         union {
15208                 struct mlx5_flow_dv_modify_hdr_resource res;
15209                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
15210                             sizeof(struct mlx5_modification_cmd) *
15211                             (MLX5_MAX_MODIFY_NUM + 1)];
15212         } mhdr_dummy;
15213         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
15214
15215         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15216         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15217         memset(&dh, 0, sizeof(struct mlx5_flow_handle));
15218         memset(&dev_flow, 0, sizeof(struct mlx5_flow));
15219         memset(&port_id_action, 0,
15220                sizeof(struct mlx5_flow_dv_port_id_action_resource));
15221         memset(mhdr_res, 0, sizeof(*mhdr_res));
15222         mhdr_res->ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
15223                                        (egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
15224                                         MLX5DV_FLOW_TABLE_TYPE_NIC_RX);
15225         dev_flow.handle = &dh;
15226         dev_flow.dv.port_id_action = &port_id_action;
15227         dev_flow.external = true;
15228         for (i = 0; i < RTE_COLORS; i++) {
15229                 if (i < MLX5_MTR_RTE_COLORS)
15230                         act_cnt = &mtr_policy->act_cnt[i];
15231                 /* Skip the color policy actions creation. */
15232                 if ((i == RTE_COLOR_YELLOW && mtr_policy->skip_y) ||
15233                     (i == RTE_COLOR_GREEN && mtr_policy->skip_g))
15234                         continue;
15235                 action_flags = 0;
15236                 for (act = actions[i];
15237                      act && act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
15238                         switch (act->type) {
15239                         case RTE_FLOW_ACTION_TYPE_MARK:
15240                         {
15241                                 uint32_t tag_be = mlx5_flow_mark_set
15242                                         (((const struct rte_flow_action_mark *)
15243                                         (act->conf))->id);
15244
15245                                 if (i >= MLX5_MTR_RTE_COLORS)
15246                                         return -rte_mtr_error_set(error,
15247                                           ENOTSUP,
15248                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15249                                           NULL,
15250                                           "cannot create policy "
15251                                           "mark action for this color");
15252                                 dev_flow.handle->mark = 1;
15253                                 if (flow_dv_tag_resource_register(dev, tag_be,
15254                                                   &dev_flow, &flow_err))
15255                                         return -rte_mtr_error_set(error,
15256                                         ENOTSUP,
15257                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15258                                         NULL,
15259                                         "cannot setup policy mark action");
15260                                 MLX5_ASSERT(dev_flow.dv.tag_resource);
15261                                 act_cnt->rix_mark =
15262                                         dev_flow.handle->dvh.rix_tag;
15263                                 action_flags |= MLX5_FLOW_ACTION_MARK;
15264                                 break;
15265                         }
15266                         case RTE_FLOW_ACTION_TYPE_SET_TAG:
15267                                 if (i >= MLX5_MTR_RTE_COLORS)
15268                                         return -rte_mtr_error_set(error,
15269                                           ENOTSUP,
15270                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15271                                           NULL,
15272                                           "cannot create policy "
15273                                           "set tag action for this color");
15274                                 if (flow_dv_convert_action_set_tag
15275                                 (dev, mhdr_res,
15276                                 (const struct rte_flow_action_set_tag *)
15277                                 act->conf,  &flow_err))
15278                                         return -rte_mtr_error_set(error,
15279                                         ENOTSUP,
15280                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15281                                         NULL, "cannot convert policy "
15282                                         "set tag action");
15283                                 if (!mhdr_res->actions_num)
15284                                         return -rte_mtr_error_set(error,
15285                                         ENOTSUP,
15286                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15287                                         NULL, "cannot find policy "
15288                                         "set tag action");
15289                                 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
15290                                 break;
15291                         case RTE_FLOW_ACTION_TYPE_DROP:
15292                         {
15293                                 struct mlx5_flow_mtr_mng *mtrmng =
15294                                                 priv->sh->mtrmng;
15295                                 struct mlx5_flow_tbl_data_entry *tbl_data;
15296
15297                                 /*
15298                                  * Create the drop table with
15299                                  * METER DROP level.
15300                                  */
15301                                 if (!mtrmng->drop_tbl[domain]) {
15302                                         mtrmng->drop_tbl[domain] =
15303                                         flow_dv_tbl_resource_get(dev,
15304                                         MLX5_FLOW_TABLE_LEVEL_METER,
15305                                         egress, transfer, false, NULL, 0,
15306                                         0, MLX5_MTR_TABLE_ID_DROP, &flow_err);
15307                                         if (!mtrmng->drop_tbl[domain])
15308                                                 return -rte_mtr_error_set
15309                                         (error, ENOTSUP,
15310                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15311                                         NULL,
15312                                         "Failed to create meter drop table");
15313                                 }
15314                                 tbl_data = container_of
15315                                 (mtrmng->drop_tbl[domain],
15316                                 struct mlx5_flow_tbl_data_entry, tbl);
15317                                 if (i < MLX5_MTR_RTE_COLORS) {
15318                                         act_cnt->dr_jump_action[domain] =
15319                                                 tbl_data->jump.action;
15320                                         act_cnt->fate_action =
15321                                                 MLX5_FLOW_FATE_DROP;
15322                                 }
15323                                 if (i == RTE_COLOR_RED)
15324                                         mtr_policy->dr_drop_action[domain] =
15325                                                 tbl_data->jump.action;
15326                                 action_flags |= MLX5_FLOW_ACTION_DROP;
15327                                 break;
15328                         }
15329                         case RTE_FLOW_ACTION_TYPE_QUEUE:
15330                         {
15331                                 if (i >= MLX5_MTR_RTE_COLORS)
15332                                         return -rte_mtr_error_set(error,
15333                                         ENOTSUP,
15334                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15335                                         NULL, "cannot create policy "
15336                                         "fate queue for this color");
15337                                 act_cnt->queue =
15338                                 ((const struct rte_flow_action_queue *)
15339                                         (act->conf))->index;
15340                                 act_cnt->fate_action =
15341                                         MLX5_FLOW_FATE_QUEUE;
15342                                 dev_flow.handle->fate_action =
15343                                         MLX5_FLOW_FATE_QUEUE;
15344                                 mtr_policy->is_queue = 1;
15345                                 action_flags |= MLX5_FLOW_ACTION_QUEUE;
15346                                 break;
15347                         }
15348                         case RTE_FLOW_ACTION_TYPE_RSS:
15349                         {
15350                                 int rss_size;
15351
15352                                 if (i >= MLX5_MTR_RTE_COLORS)
15353                                         return -rte_mtr_error_set(error,
15354                                           ENOTSUP,
15355                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15356                                           NULL,
15357                                           "cannot create policy "
15358                                           "rss action for this color");
15359                                 /*
15360                                  * Save RSS conf into policy struct
15361                                  * for translate stage.
15362                                  */
15363                                 rss_size = (int)rte_flow_conv
15364                                         (RTE_FLOW_CONV_OP_ACTION,
15365                                         NULL, 0, act, &flow_err);
15366                                 if (rss_size <= 0)
15367                                         return -rte_mtr_error_set(error,
15368                                           ENOTSUP,
15369                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15370                                           NULL, "Get the wrong "
15371                                           "rss action struct size");
15372                                 act_cnt->rss = mlx5_malloc(MLX5_MEM_ZERO,
15373                                                 rss_size, 0, SOCKET_ID_ANY);
15374                                 if (!act_cnt->rss)
15375                                         return -rte_mtr_error_set(error,
15376                                           ENOTSUP,
15377                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15378                                           NULL,
15379                                           "Fail to malloc rss action memory");
15380                                 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ACTION,
15381                                         act_cnt->rss, rss_size,
15382                                         act, &flow_err);
15383                                 if (ret < 0)
15384                                         return -rte_mtr_error_set(error,
15385                                           ENOTSUP,
15386                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15387                                           NULL, "Fail to save "
15388                                           "rss action into policy struct");
15389                                 act_cnt->fate_action =
15390                                         MLX5_FLOW_FATE_SHARED_RSS;
15391                                 action_flags |= MLX5_FLOW_ACTION_RSS;
15392                                 break;
15393                         }
15394                         case RTE_FLOW_ACTION_TYPE_PORT_ID:
15395                         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
15396                         {
15397                                 struct mlx5_flow_dv_port_id_action_resource
15398                                         port_id_resource;
15399                                 uint32_t port_id = 0;
15400
15401                                 if (i >= MLX5_MTR_RTE_COLORS)
15402                                         return -rte_mtr_error_set(error,
15403                                         ENOTSUP,
15404                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15405                                         NULL, "cannot create policy "
15406                                         "port action for this color");
15407                                 memset(&port_id_resource, 0,
15408                                         sizeof(port_id_resource));
15409                                 if (flow_dv_translate_action_port_id(dev, act,
15410                                                 &port_id, &flow_err))
15411                                         return -rte_mtr_error_set(error,
15412                                         ENOTSUP,
15413                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15414                                         NULL, "cannot translate "
15415                                         "policy port action");
15416                                 port_id_resource.port_id = port_id;
15417                                 if (flow_dv_port_id_action_resource_register
15418                                         (dev, &port_id_resource,
15419                                         &dev_flow, &flow_err))
15420                                         return -rte_mtr_error_set(error,
15421                                         ENOTSUP,
15422                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15423                                         NULL, "cannot setup "
15424                                         "policy port action");
15425                                 act_cnt->rix_port_id_action =
15426                                         dev_flow.handle->rix_port_id_action;
15427                                 act_cnt->fate_action =
15428                                         MLX5_FLOW_FATE_PORT_ID;
15429                                 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
15430                                 break;
15431                         }
15432                         case RTE_FLOW_ACTION_TYPE_JUMP:
15433                         {
15434                                 uint32_t jump_group = 0;
15435                                 uint32_t table = 0;
15436                                 struct mlx5_flow_tbl_data_entry *tbl_data;
15437                                 struct flow_grp_info grp_info = {
15438                                         .external = !!dev_flow.external,
15439                                         .transfer = !!transfer,
15440                                         .fdb_def_rule = !!priv->fdb_def_rule,
15441                                         .std_tbl_fix = 0,
15442                                         .skip_scale = dev_flow.skip_scale &
15443                                         (1 << MLX5_SCALE_FLOW_GROUP_BIT),
15444                                 };
15445                                 struct mlx5_flow_meter_sub_policy *sub_policy =
15446                                         mtr_policy->sub_policys[domain][0];
15447
15448                                 if (i >= MLX5_MTR_RTE_COLORS)
15449                                         return -rte_mtr_error_set(error,
15450                                           ENOTSUP,
15451                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15452                                           NULL,
15453                                           "cannot create policy "
15454                                           "jump action for this color");
15455                                 jump_group =
15456                                 ((const struct rte_flow_action_jump *)
15457                                                         act->conf)->group;
15458                                 if (mlx5_flow_group_to_table(dev, NULL,
15459                                                        jump_group,
15460                                                        &table,
15461                                                        &grp_info, &flow_err))
15462                                         return -rte_mtr_error_set(error,
15463                                         ENOTSUP,
15464                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15465                                         NULL, "cannot setup "
15466                                         "policy jump action");
15467                                 sub_policy->jump_tbl[i] =
15468                                 flow_dv_tbl_resource_get(dev,
15469                                         table, egress,
15470                                         transfer,
15471                                         !!dev_flow.external,
15472                                         NULL, jump_group, 0,
15473                                         0, &flow_err);
15474                                 if
15475                                 (!sub_policy->jump_tbl[i])
15476                                         return  -rte_mtr_error_set(error,
15477                                         ENOTSUP,
15478                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15479                                         NULL, "cannot create jump action.");
15480                                 tbl_data = container_of
15481                                 (sub_policy->jump_tbl[i],
15482                                 struct mlx5_flow_tbl_data_entry, tbl);
15483                                 act_cnt->dr_jump_action[domain] =
15484                                         tbl_data->jump.action;
15485                                 act_cnt->fate_action =
15486                                         MLX5_FLOW_FATE_JUMP;
15487                                 action_flags |= MLX5_FLOW_ACTION_JUMP;
15488                                 break;
15489                         }
15490                         /*
15491                          * No need to check meter hierarchy for Y or R colors
15492                          * here since it is done in the validation stage.
15493                          */
15494                         case RTE_FLOW_ACTION_TYPE_METER:
15495                         {
15496                                 const struct rte_flow_action_meter *mtr;
15497                                 struct mlx5_flow_meter_info *next_fm;
15498                                 struct mlx5_flow_meter_policy *next_policy;
15499                                 struct rte_flow_action tag_action;
15500                                 struct mlx5_rte_flow_action_set_tag set_tag;
15501                                 uint32_t next_mtr_idx = 0;
15502
15503                                 mtr = act->conf;
15504                                 next_fm = mlx5_flow_meter_find(priv,
15505                                                         mtr->mtr_id,
15506                                                         &next_mtr_idx);
15507                                 if (!next_fm)
15508                                         return -rte_mtr_error_set(error, EINVAL,
15509                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15510                                                 "Fail to find next meter.");
15511                                 if (next_fm->def_policy)
15512                                         return -rte_mtr_error_set(error, EINVAL,
15513                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15514                                 "Hierarchy only supports termination meter.");
15515                                 next_policy = mlx5_flow_meter_policy_find(dev,
15516                                                 next_fm->policy_id, NULL);
15517                                 MLX5_ASSERT(next_policy);
15518                                 if (next_fm->drop_cnt) {
15519                                         set_tag.id =
15520                                                 (enum modify_reg)
15521                                                 mlx5_flow_get_reg_id(dev,
15522                                                 MLX5_MTR_ID,
15523                                                 0,
15524                                                 (struct rte_flow_error *)error);
15525                                         set_tag.offset = (priv->mtr_reg_share ?
15526                                                 MLX5_MTR_COLOR_BITS : 0);
15527                                         set_tag.length = (priv->mtr_reg_share ?
15528                                                MLX5_MTR_IDLE_BITS_IN_COLOR_REG :
15529                                                MLX5_REG_BITS);
15530                                         set_tag.data = next_mtr_idx;
15531                                         tag_action.type =
15532                                                 (enum rte_flow_action_type)
15533                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
15534                                         tag_action.conf = &set_tag;
15535                                         if (flow_dv_convert_action_set_reg
15536                                                 (mhdr_res, &tag_action,
15537                                                 (struct rte_flow_error *)error))
15538                                                 return -rte_errno;
15539                                         action_flags |=
15540                                                 MLX5_FLOW_ACTION_SET_TAG;
15541                                 }
15542                                 act_cnt->fate_action = MLX5_FLOW_FATE_MTR;
15543                                 act_cnt->next_mtr_id = next_fm->meter_id;
15544                                 act_cnt->next_sub_policy = NULL;
15545                                 mtr_policy->is_hierarchy = 1;
15546                                 mtr_policy->dev = next_policy->dev;
15547                                 action_flags |=
15548                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
15549                                 break;
15550                         }
15551                         default:
15552                                 return -rte_mtr_error_set(error, ENOTSUP,
15553                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15554                                           NULL, "action type not supported");
15555                         }
15556                         if (action_flags & MLX5_FLOW_ACTION_SET_TAG) {
15557                                 /* create modify action if needed. */
15558                                 dev_flow.dv.group = 1;
15559                                 if (flow_dv_modify_hdr_resource_register
15560                                         (dev, mhdr_res, &dev_flow, &flow_err))
15561                                         return -rte_mtr_error_set(error,
15562                                                 ENOTSUP,
15563                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
15564                                                 NULL, "cannot register policy "
15565                                                 "set tag action");
15566                                 act_cnt->modify_hdr =
15567                                         dev_flow.handle->dvh.modify_hdr;
15568                         }
15569                 }
15570         }
15571         return 0;
15572 }
15573
15574 /**
15575  * Create policy action per domain, lock free,
15576  * (mutex should be acquired by caller).
15577  * Dispatcher for action type specific call.
15578  *
15579  * @param[in] dev
15580  *   Pointer to the Ethernet device structure.
15581  * @param[in] mtr_policy
15582  *   Meter policy struct.
15583  * @param[in] action
15584  *   Action specification used to create meter actions.
15585  * @param[out] error
15586  *   Perform verbose error reporting if not NULL. Initialized in case of
15587  *   error only.
15588  *
15589  * @return
15590  *   0 on success, otherwise negative errno value.
15591  */
15592 static int
15593 flow_dv_create_mtr_policy_acts(struct rte_eth_dev *dev,
15594                       struct mlx5_flow_meter_policy *mtr_policy,
15595                       const struct rte_flow_action *actions[RTE_COLORS],
15596                       struct rte_mtr_error *error)
15597 {
15598         int ret, i;
15599         uint16_t sub_policy_num;
15600
15601         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15602                 sub_policy_num = (mtr_policy->sub_policy_num >>
15603                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15604                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15605                 if (sub_policy_num) {
15606                         ret = __flow_dv_create_domain_policy_acts(dev,
15607                                 mtr_policy, actions,
15608                                 (enum mlx5_meter_domain)i, error);
15609                         /* Cleaning resource is done in the caller level. */
15610                         if (ret)
15611                                 return ret;
15612                 }
15613         }
15614         return 0;
15615 }
15616
15617 /**
15618  * Query a DV flow rule for its statistics via DevX.
15619  *
15620  * @param[in] dev
15621  *   Pointer to Ethernet device.
15622  * @param[in] cnt_idx
15623  *   Index to the flow counter.
15624  * @param[out] data
15625  *   Data retrieved by the query.
15626  * @param[out] error
15627  *   Perform verbose error reporting if not NULL.
15628  *
15629  * @return
15630  *   0 on success, a negative errno value otherwise and rte_errno is set.
15631  */
15632 int
15633 flow_dv_query_count(struct rte_eth_dev *dev, uint32_t cnt_idx, void *data,
15634                     struct rte_flow_error *error)
15635 {
15636         struct mlx5_priv *priv = dev->data->dev_private;
15637         struct rte_flow_query_count *qc = data;
15638
15639         if (!priv->sh->devx)
15640                 return rte_flow_error_set(error, ENOTSUP,
15641                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15642                                           NULL,
15643                                           "counters are not supported");
15644         if (cnt_idx) {
15645                 uint64_t pkts, bytes;
15646                 struct mlx5_flow_counter *cnt;
15647                 int err = _flow_dv_query_count(dev, cnt_idx, &pkts, &bytes);
15648
15649                 if (err)
15650                         return rte_flow_error_set(error, -err,
15651                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15652                                         NULL, "cannot read counters");
15653                 cnt = flow_dv_counter_get_by_idx(dev, cnt_idx, NULL);
15654                 qc->hits_set = 1;
15655                 qc->bytes_set = 1;
15656                 qc->hits = pkts - cnt->hits;
15657                 qc->bytes = bytes - cnt->bytes;
15658                 if (qc->reset) {
15659                         cnt->hits = pkts;
15660                         cnt->bytes = bytes;
15661                 }
15662                 return 0;
15663         }
15664         return rte_flow_error_set(error, EINVAL,
15665                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15666                                   NULL,
15667                                   "counters are not available");
15668 }
15669
15670
15671 /**
15672  * Query counter's action pointer for a DV flow rule via DevX.
15673  *
15674  * @param[in] dev
15675  *   Pointer to Ethernet device.
15676  * @param[in] cnt_idx
15677  *   Index to the flow counter.
15678  * @param[out] action_ptr
15679  *   Action pointer for counter.
15680  * @param[out] error
15681  *   Perform verbose error reporting if not NULL.
15682  *
15683  * @return
15684  *   0 on success, a negative errno value otherwise and rte_errno is set.
15685  */
15686 int
15687 flow_dv_query_count_ptr(struct rte_eth_dev *dev, uint32_t cnt_idx,
15688         void **action_ptr, struct rte_flow_error *error)
15689 {
15690         struct mlx5_priv *priv = dev->data->dev_private;
15691
15692         if (!priv->sh->devx || !action_ptr)
15693                 return rte_flow_error_set(error, ENOTSUP,
15694                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15695                                           NULL,
15696                                           "counters are not supported");
15697
15698         if (cnt_idx) {
15699                 struct mlx5_flow_counter *cnt = NULL;
15700                 cnt = flow_dv_counter_get_by_idx(dev, cnt_idx, NULL);
15701                 if (cnt) {
15702                         *action_ptr = cnt->action;
15703                         return 0;
15704                 }
15705         }
15706         return rte_flow_error_set(error, EINVAL,
15707                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15708                                   NULL,
15709                                   "counters are not available");
15710 }
15711
15712 static int
15713 flow_dv_action_query(struct rte_eth_dev *dev,
15714                      const struct rte_flow_action_handle *handle, void *data,
15715                      struct rte_flow_error *error)
15716 {
15717         struct mlx5_age_param *age_param;
15718         struct rte_flow_query_age *resp;
15719         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15720         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15721         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15722         struct mlx5_priv *priv = dev->data->dev_private;
15723         struct mlx5_aso_ct_action *ct;
15724         uint16_t owner;
15725         uint32_t dev_idx;
15726
15727         switch (type) {
15728         case MLX5_INDIRECT_ACTION_TYPE_AGE:
15729                 age_param = &flow_aso_age_get_by_idx(dev, idx)->age_params;
15730                 resp = data;
15731                 resp->aged = __atomic_load_n(&age_param->state,
15732                                               __ATOMIC_RELAXED) == AGE_TMOUT ?
15733                                                                           1 : 0;
15734                 resp->sec_since_last_hit_valid = !resp->aged;
15735                 if (resp->sec_since_last_hit_valid)
15736                         resp->sec_since_last_hit = __atomic_load_n
15737                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15738                 return 0;
15739         case MLX5_INDIRECT_ACTION_TYPE_COUNT:
15740                 return flow_dv_query_count(dev, idx, data, error);
15741         case MLX5_INDIRECT_ACTION_TYPE_CT:
15742                 owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
15743                 if (owner != PORT_ID(priv))
15744                         return rte_flow_error_set(error, EACCES,
15745                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15746                                         NULL,
15747                                         "CT object owned by another port");
15748                 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
15749                 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
15750                 MLX5_ASSERT(ct);
15751                 if (!ct->refcnt)
15752                         return rte_flow_error_set(error, EFAULT,
15753                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15754                                         NULL,
15755                                         "CT object is inactive");
15756                 ((struct rte_flow_action_conntrack *)data)->peer_port =
15757                                                         ct->peer;
15758                 ((struct rte_flow_action_conntrack *)data)->is_original_dir =
15759                                                         ct->is_original;
15760                 if (mlx5_aso_ct_query_by_wqe(priv->sh, ct, data))
15761                         return rte_flow_error_set(error, EIO,
15762                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15763                                         NULL,
15764                                         "Failed to query CT context");
15765                 return 0;
15766         default:
15767                 return rte_flow_error_set(error, ENOTSUP,
15768                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15769                                           "action type query not supported");
15770         }
15771 }
15772
15773 /**
15774  * Query a flow rule AGE action for aging information.
15775  *
15776  * @param[in] dev
15777  *   Pointer to Ethernet device.
15778  * @param[in] flow
15779  *   Pointer to the sub flow.
15780  * @param[out] data
15781  *   data retrieved by the query.
15782  * @param[out] error
15783  *   Perform verbose error reporting if not NULL.
15784  *
15785  * @return
15786  *   0 on success, a negative errno value otherwise and rte_errno is set.
15787  */
15788 static int
15789 flow_dv_query_age(struct rte_eth_dev *dev, struct rte_flow *flow,
15790                   void *data, struct rte_flow_error *error)
15791 {
15792         struct rte_flow_query_age *resp = data;
15793         struct mlx5_age_param *age_param;
15794
15795         if (flow->age) {
15796                 struct mlx5_aso_age_action *act =
15797                                      flow_aso_age_get_by_idx(dev, flow->age);
15798
15799                 age_param = &act->age_params;
15800         } else if (flow->counter) {
15801                 age_param = flow_dv_counter_idx_get_age(dev, flow->counter);
15802
15803                 if (!age_param || !age_param->timeout)
15804                         return rte_flow_error_set
15805                                         (error, EINVAL,
15806                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15807                                          NULL, "cannot read age data");
15808         } else {
15809                 return rte_flow_error_set(error, EINVAL,
15810                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15811                                           NULL, "age data not available");
15812         }
15813         resp->aged = __atomic_load_n(&age_param->state, __ATOMIC_RELAXED) ==
15814                                      AGE_TMOUT ? 1 : 0;
15815         resp->sec_since_last_hit_valid = !resp->aged;
15816         if (resp->sec_since_last_hit_valid)
15817                 resp->sec_since_last_hit = __atomic_load_n
15818                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15819         return 0;
15820 }
15821
15822 /**
15823  * Query a flow.
15824  *
15825  * @see rte_flow_query()
15826  * @see rte_flow_ops
15827  */
15828 static int
15829 flow_dv_query(struct rte_eth_dev *dev,
15830               struct rte_flow *flow __rte_unused,
15831               const struct rte_flow_action *actions __rte_unused,
15832               void *data __rte_unused,
15833               struct rte_flow_error *error __rte_unused)
15834 {
15835         int ret = -EINVAL;
15836
15837         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
15838                 switch (actions->type) {
15839                 case RTE_FLOW_ACTION_TYPE_VOID:
15840                         break;
15841                 case RTE_FLOW_ACTION_TYPE_COUNT:
15842                         ret = flow_dv_query_count(dev, flow->counter, data,
15843                                                   error);
15844                         break;
15845                 case RTE_FLOW_ACTION_TYPE_AGE:
15846                         ret = flow_dv_query_age(dev, flow, data, error);
15847                         break;
15848                 default:
15849                         return rte_flow_error_set(error, ENOTSUP,
15850                                                   RTE_FLOW_ERROR_TYPE_ACTION,
15851                                                   actions,
15852                                                   "action not supported");
15853                 }
15854         }
15855         return ret;
15856 }
15857
15858 /**
15859  * Destroy the meter table set.
15860  * Lock free, (mutex should be acquired by caller).
15861  *
15862  * @param[in] dev
15863  *   Pointer to Ethernet device.
15864  * @param[in] fm
15865  *   Meter information table.
15866  */
15867 static void
15868 flow_dv_destroy_mtr_tbls(struct rte_eth_dev *dev,
15869                         struct mlx5_flow_meter_info *fm)
15870 {
15871         struct mlx5_priv *priv = dev->data->dev_private;
15872         int i;
15873
15874         if (!fm || !priv->config.dv_flow_en)
15875                 return;
15876         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15877                 if (fm->drop_rule[i]) {
15878                         claim_zero(mlx5_flow_os_destroy_flow(fm->drop_rule[i]));
15879                         fm->drop_rule[i] = NULL;
15880                 }
15881         }
15882 }
15883
15884 static void
15885 flow_dv_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
15886 {
15887         struct mlx5_priv *priv = dev->data->dev_private;
15888         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
15889         struct mlx5_flow_tbl_data_entry *tbl;
15890         int i, j;
15891
15892         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15893                 if (mtrmng->def_rule[i]) {
15894                         claim_zero(mlx5_flow_os_destroy_flow
15895                                         (mtrmng->def_rule[i]));
15896                         mtrmng->def_rule[i] = NULL;
15897                 }
15898                 if (mtrmng->def_matcher[i]) {
15899                         tbl = container_of(mtrmng->def_matcher[i]->tbl,
15900                                 struct mlx5_flow_tbl_data_entry, tbl);
15901                         mlx5_list_unregister(tbl->matchers,
15902                                              &mtrmng->def_matcher[i]->entry);
15903                         mtrmng->def_matcher[i] = NULL;
15904                 }
15905                 for (j = 0; j < MLX5_REG_BITS; j++) {
15906                         if (mtrmng->drop_matcher[i][j]) {
15907                                 tbl =
15908                                 container_of(mtrmng->drop_matcher[i][j]->tbl,
15909                                              struct mlx5_flow_tbl_data_entry,
15910                                              tbl);
15911                                 mlx5_list_unregister(tbl->matchers,
15912                                             &mtrmng->drop_matcher[i][j]->entry);
15913                                 mtrmng->drop_matcher[i][j] = NULL;
15914                         }
15915                 }
15916                 if (mtrmng->drop_tbl[i]) {
15917                         flow_dv_tbl_resource_release(MLX5_SH(dev),
15918                                 mtrmng->drop_tbl[i]);
15919                         mtrmng->drop_tbl[i] = NULL;
15920                 }
15921         }
15922 }
15923
15924 /* Number of meter flow actions, count and jump or count and drop. */
15925 #define METER_ACTIONS 2
15926
15927 static void
15928 __flow_dv_destroy_domain_def_policy(struct rte_eth_dev *dev,
15929                                     enum mlx5_meter_domain domain)
15930 {
15931         struct mlx5_priv *priv = dev->data->dev_private;
15932         struct mlx5_flow_meter_def_policy *def_policy =
15933                         priv->sh->mtrmng->def_policy[domain];
15934
15935         __flow_dv_destroy_sub_policy_rules(dev, &def_policy->sub_policy);
15936         mlx5_free(def_policy);
15937         priv->sh->mtrmng->def_policy[domain] = NULL;
15938 }
15939
15940 /**
15941  * Destroy the default policy table set.
15942  *
15943  * @param[in] dev
15944  *   Pointer to Ethernet device.
15945  */
15946 static void
15947 flow_dv_destroy_def_policy(struct rte_eth_dev *dev)
15948 {
15949         struct mlx5_priv *priv = dev->data->dev_private;
15950         int i;
15951
15952         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++)
15953                 if (priv->sh->mtrmng->def_policy[i])
15954                         __flow_dv_destroy_domain_def_policy(dev,
15955                                         (enum mlx5_meter_domain)i);
15956         priv->sh->mtrmng->def_policy_id = MLX5_INVALID_POLICY_ID;
15957 }
15958
15959 static int
15960 __flow_dv_create_policy_flow(struct rte_eth_dev *dev,
15961                         uint32_t color_reg_c_idx,
15962                         enum rte_color color, void *matcher_object,
15963                         int actions_n, void *actions,
15964                         bool match_src_port, const struct rte_flow_item *item,
15965                         void **rule, const struct rte_flow_attr *attr)
15966 {
15967         int ret;
15968         struct mlx5_flow_dv_match_params value = {
15969                 .size = sizeof(value.buf),
15970         };
15971         struct mlx5_flow_dv_match_params matcher = {
15972                 .size = sizeof(matcher.buf),
15973         };
15974         struct mlx5_priv *priv = dev->data->dev_private;
15975         uint8_t misc_mask;
15976
15977         if (match_src_port && (priv->representor || priv->master)) {
15978                 if (flow_dv_translate_item_port_id(dev, matcher.buf,
15979                                                    value.buf, item, attr)) {
15980                         DRV_LOG(ERR, "Failed to create meter policy%d flow's"
15981                                 " value with port.", color);
15982                         return -1;
15983                 }
15984         }
15985         flow_dv_match_meta_reg(matcher.buf, value.buf,
15986                                (enum modify_reg)color_reg_c_idx,
15987                                rte_col_2_mlx5_col(color), UINT32_MAX);
15988         misc_mask = flow_dv_matcher_enable(value.buf);
15989         __flow_dv_adjust_buf_size(&value.size, misc_mask);
15990         ret = mlx5_flow_os_create_flow(matcher_object, (void *)&value,
15991                                        actions_n, actions, rule);
15992         if (ret) {
15993                 DRV_LOG(ERR, "Failed to create meter policy%d flow.", color);
15994                 return -1;
15995         }
15996         return 0;
15997 }
15998
15999 static int
16000 __flow_dv_create_policy_matcher(struct rte_eth_dev *dev,
16001                         uint32_t color_reg_c_idx,
16002                         uint16_t priority,
16003                         struct mlx5_flow_meter_sub_policy *sub_policy,
16004                         const struct rte_flow_attr *attr,
16005                         bool match_src_port,
16006                         const struct rte_flow_item *item,
16007                         struct mlx5_flow_dv_matcher **policy_matcher,
16008                         struct rte_flow_error *error)
16009 {
16010         struct mlx5_list_entry *entry;
16011         struct mlx5_flow_tbl_resource *tbl_rsc = sub_policy->tbl_rsc;
16012         struct mlx5_flow_dv_matcher matcher = {
16013                 .mask = {
16014                         .size = sizeof(matcher.mask.buf),
16015                 },
16016                 .tbl = tbl_rsc,
16017         };
16018         struct mlx5_flow_dv_match_params value = {
16019                 .size = sizeof(value.buf),
16020         };
16021         struct mlx5_flow_cb_ctx ctx = {
16022                 .error = error,
16023                 .data = &matcher,
16024         };
16025         struct mlx5_flow_tbl_data_entry *tbl_data;
16026         struct mlx5_priv *priv = dev->data->dev_private;
16027         const uint32_t color_mask = (UINT32_C(1) << MLX5_MTR_COLOR_BITS) - 1;
16028
16029         if (match_src_port && (priv->representor || priv->master)) {
16030                 if (flow_dv_translate_item_port_id(dev, matcher.mask.buf,
16031                                                    value.buf, item, attr)) {
16032                         DRV_LOG(ERR, "Failed to register meter policy%d matcher"
16033                                 " with port.", priority);
16034                         return -1;
16035                 }
16036         }
16037         tbl_data = container_of(tbl_rsc, struct mlx5_flow_tbl_data_entry, tbl);
16038         if (priority < RTE_COLOR_RED)
16039                 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16040                         (enum modify_reg)color_reg_c_idx, 0, color_mask);
16041         matcher.priority = priority;
16042         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
16043                                     matcher.mask.size);
16044         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16045         if (!entry) {
16046                 DRV_LOG(ERR, "Failed to register meter drop matcher.");
16047                 return -1;
16048         }
16049         *policy_matcher =
16050                 container_of(entry, struct mlx5_flow_dv_matcher, entry);
16051         return 0;
16052 }
16053
16054 /**
16055  * Create the policy rules per domain.
16056  *
16057  * @param[in] dev
16058  *   Pointer to Ethernet device.
16059  * @param[in] sub_policy
16060  *    Pointer to sub policy table..
16061  * @param[in] egress
16062  *   Direction of the table.
16063  * @param[in] transfer
16064  *   E-Switch or NIC flow.
16065  * @param[in] acts
16066  *   Pointer to policy action list per color.
16067  *
16068  * @return
16069  *   0 on success, -1 otherwise.
16070  */
16071 static int
16072 __flow_dv_create_domain_policy_rules(struct rte_eth_dev *dev,
16073                 struct mlx5_flow_meter_sub_policy *sub_policy,
16074                 uint8_t egress, uint8_t transfer, bool match_src_port,
16075                 struct mlx5_meter_policy_acts acts[RTE_COLORS])
16076 {
16077         struct mlx5_priv *priv = dev->data->dev_private;
16078         struct rte_flow_error flow_err;
16079         uint32_t color_reg_c_idx;
16080         struct rte_flow_attr attr = {
16081                 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
16082                 .priority = 0,
16083                 .ingress = 0,
16084                 .egress = !!egress,
16085                 .transfer = !!transfer,
16086                 .reserved = 0,
16087         };
16088         int i;
16089         int ret = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &flow_err);
16090         struct mlx5_sub_policy_color_rule *color_rule;
16091         bool svport_match;
16092         struct mlx5_sub_policy_color_rule *tmp_rules[RTE_COLORS] = {NULL};
16093
16094         if (ret < 0)
16095                 return -1;
16096         /* Create policy table with POLICY level. */
16097         if (!sub_policy->tbl_rsc)
16098                 sub_policy->tbl_rsc = flow_dv_tbl_resource_get(dev,
16099                                 MLX5_FLOW_TABLE_LEVEL_POLICY,
16100                                 egress, transfer, false, NULL, 0, 0,
16101                                 sub_policy->idx, &flow_err);
16102         if (!sub_policy->tbl_rsc) {
16103                 DRV_LOG(ERR,
16104                         "Failed to create meter sub policy table.");
16105                 return -1;
16106         }
16107         /* Prepare matchers. */
16108         color_reg_c_idx = ret;
16109         for (i = 0; i < RTE_COLORS; i++) {
16110                 TAILQ_INIT(&sub_policy->color_rules[i]);
16111                 if (!acts[i].actions_n)
16112                         continue;
16113                 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
16114                                 sizeof(struct mlx5_sub_policy_color_rule),
16115                                 0, SOCKET_ID_ANY);
16116                 if (!color_rule) {
16117                         DRV_LOG(ERR, "No memory to create color rule.");
16118                         goto err_exit;
16119                 }
16120                 tmp_rules[i] = color_rule;
16121                 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
16122                                   color_rule, next_port);
16123                 color_rule->src_port = priv->representor_id;
16124                 /* No use. */
16125                 attr.priority = i;
16126                 /* Create matchers for colors. */
16127                 svport_match = (i != RTE_COLOR_RED) ? match_src_port : false;
16128                 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
16129                                 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
16130                                 &attr, svport_match, NULL,
16131                                 &color_rule->matcher, &flow_err)) {
16132                         DRV_LOG(ERR, "Failed to create color%u matcher.", i);
16133                         goto err_exit;
16134                 }
16135                 /* Create flow, matching color. */
16136                 if (__flow_dv_create_policy_flow(dev,
16137                                 color_reg_c_idx, (enum rte_color)i,
16138                                 color_rule->matcher->matcher_object,
16139                                 acts[i].actions_n, acts[i].dv_actions,
16140                                 svport_match, NULL, &color_rule->rule,
16141                                 &attr)) {
16142                         DRV_LOG(ERR, "Failed to create color%u rule.", i);
16143                         goto err_exit;
16144                 }
16145         }
16146         return 0;
16147 err_exit:
16148         /* All the policy rules will be cleared. */
16149         do {
16150                 color_rule = tmp_rules[i];
16151                 if (color_rule) {
16152                         if (color_rule->rule)
16153                                 mlx5_flow_os_destroy_flow(color_rule->rule);
16154                         if (color_rule->matcher) {
16155                                 struct mlx5_flow_tbl_data_entry *tbl =
16156                                         container_of(color_rule->matcher->tbl,
16157                                                      typeof(*tbl), tbl);
16158                                 mlx5_list_unregister(tbl->matchers,
16159                                                 &color_rule->matcher->entry);
16160                         }
16161                         TAILQ_REMOVE(&sub_policy->color_rules[i],
16162                                      color_rule, next_port);
16163                         mlx5_free(color_rule);
16164                 }
16165         } while (i--);
16166         return -1;
16167 }
16168
16169 static int
16170 __flow_dv_create_policy_acts_rules(struct rte_eth_dev *dev,
16171                         struct mlx5_flow_meter_policy *mtr_policy,
16172                         struct mlx5_flow_meter_sub_policy *sub_policy,
16173                         uint32_t domain)
16174 {
16175         struct mlx5_priv *priv = dev->data->dev_private;
16176         struct mlx5_meter_policy_acts acts[RTE_COLORS];
16177         struct mlx5_flow_dv_tag_resource *tag;
16178         struct mlx5_flow_dv_port_id_action_resource *port_action;
16179         struct mlx5_hrxq *hrxq;
16180         struct mlx5_flow_meter_info *next_fm = NULL;
16181         struct mlx5_flow_meter_policy *next_policy;
16182         struct mlx5_flow_meter_sub_policy *next_sub_policy;
16183         struct mlx5_flow_tbl_data_entry *tbl_data;
16184         struct rte_flow_error error;
16185         uint8_t egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16186         uint8_t transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16187         bool mtr_first = egress || (transfer && priv->representor_id != UINT16_MAX);
16188         bool match_src_port = false;
16189         int i;
16190
16191         /* If RSS or Queue, no previous actions / rules is created. */
16192         for (i = 0; i < RTE_COLORS; i++) {
16193                 acts[i].actions_n = 0;
16194                 if (i == RTE_COLOR_RED) {
16195                         /* Only support drop on red. */
16196                         acts[i].dv_actions[0] =
16197                                 mtr_policy->dr_drop_action[domain];
16198                         acts[i].actions_n = 1;
16199                         continue;
16200                 }
16201                 if (i == RTE_COLOR_GREEN &&
16202                     mtr_policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR) {
16203                         struct rte_flow_attr attr = {
16204                                 .transfer = transfer
16205                         };
16206
16207                         next_fm = mlx5_flow_meter_find(priv,
16208                                         mtr_policy->act_cnt[i].next_mtr_id,
16209                                         NULL);
16210                         if (!next_fm) {
16211                                 DRV_LOG(ERR,
16212                                         "Failed to get next hierarchy meter.");
16213                                 goto err_exit;
16214                         }
16215                         if (mlx5_flow_meter_attach(priv, next_fm,
16216                                                    &attr, &error)) {
16217                                 DRV_LOG(ERR, "%s", error.message);
16218                                 next_fm = NULL;
16219                                 goto err_exit;
16220                         }
16221                         /* Meter action must be the first for TX. */
16222                         if (mtr_first) {
16223                                 acts[i].dv_actions[acts[i].actions_n] =
16224                                         next_fm->meter_action;
16225                                 acts[i].actions_n++;
16226                         }
16227                 }
16228                 if (mtr_policy->act_cnt[i].rix_mark) {
16229                         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG],
16230                                         mtr_policy->act_cnt[i].rix_mark);
16231                         if (!tag) {
16232                                 DRV_LOG(ERR, "Failed to find "
16233                                 "mark action for policy.");
16234                                 goto err_exit;
16235                         }
16236                         acts[i].dv_actions[acts[i].actions_n] = tag->action;
16237                         acts[i].actions_n++;
16238                 }
16239                 if (mtr_policy->act_cnt[i].modify_hdr) {
16240                         acts[i].dv_actions[acts[i].actions_n] =
16241                                 mtr_policy->act_cnt[i].modify_hdr->action;
16242                         acts[i].actions_n++;
16243                 }
16244                 if (mtr_policy->act_cnt[i].fate_action) {
16245                         switch (mtr_policy->act_cnt[i].fate_action) {
16246                         case MLX5_FLOW_FATE_PORT_ID:
16247                                 port_action = mlx5_ipool_get
16248                                         (priv->sh->ipool[MLX5_IPOOL_PORT_ID],
16249                                 mtr_policy->act_cnt[i].rix_port_id_action);
16250                                 if (!port_action) {
16251                                         DRV_LOG(ERR, "Failed to find "
16252                                                 "port action for policy.");
16253                                         goto err_exit;
16254                                 }
16255                                 acts[i].dv_actions[acts[i].actions_n] =
16256                                         port_action->action;
16257                                 acts[i].actions_n++;
16258                                 mtr_policy->dev = dev;
16259                                 match_src_port = true;
16260                                 break;
16261                         case MLX5_FLOW_FATE_DROP:
16262                         case MLX5_FLOW_FATE_JUMP:
16263                                 acts[i].dv_actions[acts[i].actions_n] =
16264                                 mtr_policy->act_cnt[i].dr_jump_action[domain];
16265                                 acts[i].actions_n++;
16266                                 break;
16267                         case MLX5_FLOW_FATE_SHARED_RSS:
16268                         case MLX5_FLOW_FATE_QUEUE:
16269                                 hrxq = mlx5_ipool_get
16270                                         (priv->sh->ipool[MLX5_IPOOL_HRXQ],
16271                                          sub_policy->rix_hrxq[i]);
16272                                 if (!hrxq) {
16273                                         DRV_LOG(ERR, "Failed to find "
16274                                                 "queue action for policy.");
16275                                         goto err_exit;
16276                                 }
16277                                 acts[i].dv_actions[acts[i].actions_n] =
16278                                         hrxq->action;
16279                                 acts[i].actions_n++;
16280                                 break;
16281                         case MLX5_FLOW_FATE_MTR:
16282                                 if (!next_fm) {
16283                                         DRV_LOG(ERR,
16284                                                 "No next hierarchy meter.");
16285                                         goto err_exit;
16286                                 }
16287                                 if (!mtr_first) {
16288                                         acts[i].dv_actions[acts[i].actions_n] =
16289                                                         next_fm->meter_action;
16290                                         acts[i].actions_n++;
16291                                 }
16292                                 if (mtr_policy->act_cnt[i].next_sub_policy) {
16293                                         next_sub_policy =
16294                                         mtr_policy->act_cnt[i].next_sub_policy;
16295                                 } else {
16296                                         next_policy =
16297                                                 mlx5_flow_meter_policy_find(dev,
16298                                                 next_fm->policy_id, NULL);
16299                                         MLX5_ASSERT(next_policy);
16300                                         next_sub_policy =
16301                                         next_policy->sub_policys[domain][0];
16302                                 }
16303                                 tbl_data =
16304                                         container_of(next_sub_policy->tbl_rsc,
16305                                         struct mlx5_flow_tbl_data_entry, tbl);
16306                                 acts[i].dv_actions[acts[i].actions_n++] =
16307                                                         tbl_data->jump.action;
16308                                 if (mtr_policy->act_cnt[i].modify_hdr)
16309                                         match_src_port = !!transfer;
16310                                 break;
16311                         default:
16312                                 /*Queue action do nothing*/
16313                                 break;
16314                         }
16315                 }
16316         }
16317         if (__flow_dv_create_domain_policy_rules(dev, sub_policy,
16318                                 egress, transfer, match_src_port, acts)) {
16319                 DRV_LOG(ERR,
16320                         "Failed to create policy rules per domain.");
16321                 goto err_exit;
16322         }
16323         return 0;
16324 err_exit:
16325         if (next_fm)
16326                 mlx5_flow_meter_detach(priv, next_fm);
16327         return -1;
16328 }
16329
16330 /**
16331  * Create the policy rules.
16332  *
16333  * @param[in] dev
16334  *   Pointer to Ethernet device.
16335  * @param[in,out] mtr_policy
16336  *   Pointer to meter policy table.
16337  *
16338  * @return
16339  *   0 on success, -1 otherwise.
16340  */
16341 static int
16342 flow_dv_create_policy_rules(struct rte_eth_dev *dev,
16343                              struct mlx5_flow_meter_policy *mtr_policy)
16344 {
16345         int i;
16346         uint16_t sub_policy_num;
16347
16348         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16349                 sub_policy_num = (mtr_policy->sub_policy_num >>
16350                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
16351                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16352                 if (!sub_policy_num)
16353                         continue;
16354                 /* Prepare actions list and create policy rules. */
16355                 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16356                         mtr_policy->sub_policys[i][0], i)) {
16357                         DRV_LOG(ERR, "Failed to create policy action "
16358                                 "list per domain.");
16359                         return -1;
16360                 }
16361         }
16362         return 0;
16363 }
16364
16365 static int
16366 __flow_dv_create_domain_def_policy(struct rte_eth_dev *dev, uint32_t domain)
16367 {
16368         struct mlx5_priv *priv = dev->data->dev_private;
16369         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16370         struct mlx5_flow_meter_def_policy *def_policy;
16371         struct mlx5_flow_tbl_resource *jump_tbl;
16372         struct mlx5_flow_tbl_data_entry *tbl_data;
16373         uint8_t egress, transfer;
16374         struct rte_flow_error error;
16375         struct mlx5_meter_policy_acts acts[RTE_COLORS];
16376         int ret;
16377
16378         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16379         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16380         def_policy = mtrmng->def_policy[domain];
16381         if (!def_policy) {
16382                 def_policy = mlx5_malloc(MLX5_MEM_ZERO,
16383                         sizeof(struct mlx5_flow_meter_def_policy),
16384                         RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
16385                 if (!def_policy) {
16386                         DRV_LOG(ERR, "Failed to alloc default policy table.");
16387                         goto def_policy_error;
16388                 }
16389                 mtrmng->def_policy[domain] = def_policy;
16390                 /* Create the meter suffix table with SUFFIX level. */
16391                 jump_tbl = flow_dv_tbl_resource_get(dev,
16392                                 MLX5_FLOW_TABLE_LEVEL_METER,
16393                                 egress, transfer, false, NULL, 0,
16394                                 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16395                 if (!jump_tbl) {
16396                         DRV_LOG(ERR,
16397                                 "Failed to create meter suffix table.");
16398                         goto def_policy_error;
16399                 }
16400                 def_policy->sub_policy.jump_tbl[RTE_COLOR_GREEN] = jump_tbl;
16401                 tbl_data = container_of(jump_tbl,
16402                                         struct mlx5_flow_tbl_data_entry, tbl);
16403                 def_policy->dr_jump_action[RTE_COLOR_GREEN] =
16404                                                 tbl_data->jump.action;
16405                 acts[RTE_COLOR_GREEN].dv_actions[0] = tbl_data->jump.action;
16406                 acts[RTE_COLOR_GREEN].actions_n = 1;
16407                 /*
16408                  * YELLOW has the same default policy as GREEN does.
16409                  * G & Y share the same table and action. The 2nd time of table
16410                  * resource getting is just to update the reference count for
16411                  * the releasing stage.
16412                  */
16413                 jump_tbl = flow_dv_tbl_resource_get(dev,
16414                                 MLX5_FLOW_TABLE_LEVEL_METER,
16415                                 egress, transfer, false, NULL, 0,
16416                                 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16417                 if (!jump_tbl) {
16418                         DRV_LOG(ERR,
16419                                 "Failed to get meter suffix table.");
16420                         goto def_policy_error;
16421                 }
16422                 def_policy->sub_policy.jump_tbl[RTE_COLOR_YELLOW] = jump_tbl;
16423                 tbl_data = container_of(jump_tbl,
16424                                         struct mlx5_flow_tbl_data_entry, tbl);
16425                 def_policy->dr_jump_action[RTE_COLOR_YELLOW] =
16426                                                 tbl_data->jump.action;
16427                 acts[RTE_COLOR_YELLOW].dv_actions[0] = tbl_data->jump.action;
16428                 acts[RTE_COLOR_YELLOW].actions_n = 1;
16429                 /* Create jump action to the drop table. */
16430                 if (!mtrmng->drop_tbl[domain]) {
16431                         mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get
16432                                 (dev, MLX5_FLOW_TABLE_LEVEL_METER,
16433                                  egress, transfer, false, NULL, 0,
16434                                  0, MLX5_MTR_TABLE_ID_DROP, &error);
16435                         if (!mtrmng->drop_tbl[domain]) {
16436                                 DRV_LOG(ERR, "Failed to create meter "
16437                                         "drop table for default policy.");
16438                                 goto def_policy_error;
16439                         }
16440                 }
16441                 /* all RED: unique Drop table for jump action. */
16442                 tbl_data = container_of(mtrmng->drop_tbl[domain],
16443                                         struct mlx5_flow_tbl_data_entry, tbl);
16444                 def_policy->dr_jump_action[RTE_COLOR_RED] =
16445                                                 tbl_data->jump.action;
16446                 acts[RTE_COLOR_RED].dv_actions[0] = tbl_data->jump.action;
16447                 acts[RTE_COLOR_RED].actions_n = 1;
16448                 /* Create default policy rules. */
16449                 ret = __flow_dv_create_domain_policy_rules(dev,
16450                                         &def_policy->sub_policy,
16451                                         egress, transfer, false, acts);
16452                 if (ret) {
16453                         DRV_LOG(ERR, "Failed to create default policy rules.");
16454                         goto def_policy_error;
16455                 }
16456         }
16457         return 0;
16458 def_policy_error:
16459         __flow_dv_destroy_domain_def_policy(dev,
16460                                             (enum mlx5_meter_domain)domain);
16461         return -1;
16462 }
16463
16464 /**
16465  * Create the default policy table set.
16466  *
16467  * @param[in] dev
16468  *   Pointer to Ethernet device.
16469  * @return
16470  *   0 on success, -1 otherwise.
16471  */
16472 static int
16473 flow_dv_create_def_policy(struct rte_eth_dev *dev)
16474 {
16475         struct mlx5_priv *priv = dev->data->dev_private;
16476         int i;
16477
16478         /* Non-termination policy table. */
16479         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16480                 if (!priv->config.dv_esw_en && i == MLX5_MTR_DOMAIN_TRANSFER)
16481                         continue;
16482                 if (__flow_dv_create_domain_def_policy(dev, i)) {
16483                         DRV_LOG(ERR, "Failed to create default policy");
16484                         /* Rollback the created default policies for others. */
16485                         flow_dv_destroy_def_policy(dev);
16486                         return -1;
16487                 }
16488         }
16489         return 0;
16490 }
16491
16492 /**
16493  * Create the needed meter tables.
16494  * Lock free, (mutex should be acquired by caller).
16495  *
16496  * @param[in] dev
16497  *   Pointer to Ethernet device.
16498  * @param[in] fm
16499  *   Meter information table.
16500  * @param[in] mtr_idx
16501  *   Meter index.
16502  * @param[in] domain_bitmap
16503  *   Domain bitmap.
16504  * @return
16505  *   0 on success, -1 otherwise.
16506  */
16507 static int
16508 flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,
16509                         struct mlx5_flow_meter_info *fm,
16510                         uint32_t mtr_idx,
16511                         uint8_t domain_bitmap)
16512 {
16513         struct mlx5_priv *priv = dev->data->dev_private;
16514         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16515         struct rte_flow_error error;
16516         struct mlx5_flow_tbl_data_entry *tbl_data;
16517         uint8_t egress, transfer;
16518         void *actions[METER_ACTIONS];
16519         int domain, ret, i;
16520         struct mlx5_flow_counter *cnt;
16521         struct mlx5_flow_dv_match_params value = {
16522                 .size = sizeof(value.buf),
16523         };
16524         struct mlx5_flow_dv_match_params matcher_para = {
16525                 .size = sizeof(matcher_para.buf),
16526         };
16527         int mtr_id_reg_c = mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
16528                                                      0, &error);
16529         uint32_t mtr_id_mask = (UINT32_C(1) << mtrmng->max_mtr_bits) - 1;
16530         uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
16531         struct mlx5_list_entry *entry;
16532         struct mlx5_flow_dv_matcher matcher = {
16533                 .mask = {
16534                         .size = sizeof(matcher.mask.buf),
16535                 },
16536         };
16537         struct mlx5_flow_dv_matcher *drop_matcher;
16538         struct mlx5_flow_cb_ctx ctx = {
16539                 .error = &error,
16540                 .data = &matcher,
16541         };
16542         uint8_t misc_mask;
16543
16544         if (!priv->mtr_en || mtr_id_reg_c < 0) {
16545                 rte_errno = ENOTSUP;
16546                 return -1;
16547         }
16548         for (domain = 0; domain < MLX5_MTR_DOMAIN_MAX; domain++) {
16549                 if (!(domain_bitmap & (1 << domain)) ||
16550                         (mtrmng->def_rule[domain] && !fm->drop_cnt))
16551                         continue;
16552                 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16553                 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16554                 /* Create the drop table with METER DROP level. */
16555                 if (!mtrmng->drop_tbl[domain]) {
16556                         mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get(dev,
16557                                         MLX5_FLOW_TABLE_LEVEL_METER,
16558                                         egress, transfer, false, NULL, 0,
16559                                         0, MLX5_MTR_TABLE_ID_DROP, &error);
16560                         if (!mtrmng->drop_tbl[domain]) {
16561                                 DRV_LOG(ERR, "Failed to create meter drop table.");
16562                                 goto policy_error;
16563                         }
16564                 }
16565                 /* Create default matcher in drop table. */
16566                 matcher.tbl = mtrmng->drop_tbl[domain],
16567                 tbl_data = container_of(mtrmng->drop_tbl[domain],
16568                                 struct mlx5_flow_tbl_data_entry, tbl);
16569                 if (!mtrmng->def_matcher[domain]) {
16570                         flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16571                                        (enum modify_reg)mtr_id_reg_c,
16572                                        0, 0);
16573                         matcher.priority = MLX5_MTRS_DEFAULT_RULE_PRIORITY;
16574                         matcher.crc = rte_raw_cksum
16575                                         ((const void *)matcher.mask.buf,
16576                                         matcher.mask.size);
16577                         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16578                         if (!entry) {
16579                                 DRV_LOG(ERR, "Failed to register meter "
16580                                 "drop default matcher.");
16581                                 goto policy_error;
16582                         }
16583                         mtrmng->def_matcher[domain] = container_of(entry,
16584                         struct mlx5_flow_dv_matcher, entry);
16585                 }
16586                 /* Create default rule in drop table. */
16587                 if (!mtrmng->def_rule[domain]) {
16588                         i = 0;
16589                         actions[i++] = priv->sh->dr_drop_action;
16590                         flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16591                                 (enum modify_reg)mtr_id_reg_c, 0, 0);
16592                         misc_mask = flow_dv_matcher_enable(value.buf);
16593                         __flow_dv_adjust_buf_size(&value.size, misc_mask);
16594                         ret = mlx5_flow_os_create_flow
16595                                 (mtrmng->def_matcher[domain]->matcher_object,
16596                                 (void *)&value, i, actions,
16597                                 &mtrmng->def_rule[domain]);
16598                         if (ret) {
16599                                 DRV_LOG(ERR, "Failed to create meter "
16600                                 "default drop rule for drop table.");
16601                                 goto policy_error;
16602                         }
16603                 }
16604                 if (!fm->drop_cnt)
16605                         continue;
16606                 MLX5_ASSERT(mtrmng->max_mtr_bits);
16607                 if (!mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1]) {
16608                         /* Create matchers for Drop. */
16609                         flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16610                                         (enum modify_reg)mtr_id_reg_c, 0,
16611                                         (mtr_id_mask << mtr_id_offset));
16612                         matcher.priority = MLX5_REG_BITS - mtrmng->max_mtr_bits;
16613                         matcher.crc = rte_raw_cksum
16614                                         ((const void *)matcher.mask.buf,
16615                                         matcher.mask.size);
16616                         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16617                         if (!entry) {
16618                                 DRV_LOG(ERR,
16619                                 "Failed to register meter drop matcher.");
16620                                 goto policy_error;
16621                         }
16622                         mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1] =
16623                                 container_of(entry, struct mlx5_flow_dv_matcher,
16624                                              entry);
16625                 }
16626                 drop_matcher =
16627                         mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1];
16628                 /* Create drop rule, matching meter_id only. */
16629                 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16630                                 (enum modify_reg)mtr_id_reg_c,
16631                                 (mtr_idx << mtr_id_offset), UINT32_MAX);
16632                 i = 0;
16633                 cnt = flow_dv_counter_get_by_idx(dev,
16634                                         fm->drop_cnt, NULL);
16635                 actions[i++] = cnt->action;
16636                 actions[i++] = priv->sh->dr_drop_action;
16637                 misc_mask = flow_dv_matcher_enable(value.buf);
16638                 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16639                 ret = mlx5_flow_os_create_flow(drop_matcher->matcher_object,
16640                                                (void *)&value, i, actions,
16641                                                &fm->drop_rule[domain]);
16642                 if (ret) {
16643                         DRV_LOG(ERR, "Failed to create meter "
16644                                 "drop rule for drop table.");
16645                                 goto policy_error;
16646                 }
16647         }
16648         return 0;
16649 policy_error:
16650         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16651                 if (fm->drop_rule[i]) {
16652                         claim_zero(mlx5_flow_os_destroy_flow
16653                                 (fm->drop_rule[i]));
16654                         fm->drop_rule[i] = NULL;
16655                 }
16656         }
16657         return -1;
16658 }
16659
16660 static struct mlx5_flow_meter_sub_policy *
16661 __flow_dv_meter_get_rss_sub_policy(struct rte_eth_dev *dev,
16662                 struct mlx5_flow_meter_policy *mtr_policy,
16663                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS],
16664                 struct mlx5_flow_meter_sub_policy *next_sub_policy,
16665                 bool *is_reuse)
16666 {
16667         struct mlx5_priv *priv = dev->data->dev_private;
16668         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16669         uint32_t sub_policy_idx = 0;
16670         uint32_t hrxq_idx[MLX5_MTR_RTE_COLORS] = {0};
16671         uint32_t i, j;
16672         struct mlx5_hrxq *hrxq;
16673         struct mlx5_flow_handle dh;
16674         struct mlx5_meter_policy_action_container *act_cnt;
16675         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16676         uint16_t sub_policy_num;
16677
16678         rte_spinlock_lock(&mtr_policy->sl);
16679         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16680                 if (!rss_desc[i])
16681                         continue;
16682                 hrxq_idx[i] = mlx5_hrxq_get(dev, rss_desc[i]);
16683                 if (!hrxq_idx[i]) {
16684                         rte_spinlock_unlock(&mtr_policy->sl);
16685                         return NULL;
16686                 }
16687         }
16688         sub_policy_num = (mtr_policy->sub_policy_num >>
16689                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16690                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16691         for (j = 0; j < sub_policy_num; j++) {
16692                 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16693                         if (rss_desc[i] &&
16694                             hrxq_idx[i] !=
16695                             mtr_policy->sub_policys[domain][j]->rix_hrxq[i])
16696                                 break;
16697                 }
16698                 if (i >= MLX5_MTR_RTE_COLORS) {
16699                         /*
16700                          * Found the sub policy table with
16701                          * the same queue per color.
16702                          */
16703                         rte_spinlock_unlock(&mtr_policy->sl);
16704                         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16705                                 mlx5_hrxq_release(dev, hrxq_idx[i]);
16706                         *is_reuse = true;
16707                         return mtr_policy->sub_policys[domain][j];
16708                 }
16709         }
16710         /* Create sub policy. */
16711         if (!mtr_policy->sub_policys[domain][0]->rix_hrxq[0]) {
16712                 /* Reuse the first pre-allocated sub_policy. */
16713                 sub_policy = mtr_policy->sub_policys[domain][0];
16714                 sub_policy_idx = sub_policy->idx;
16715         } else {
16716                 sub_policy = mlx5_ipool_zmalloc
16717                                 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16718                                  &sub_policy_idx);
16719                 if (!sub_policy ||
16720                     sub_policy_idx > MLX5_MAX_SUB_POLICY_TBL_NUM) {
16721                         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16722                                 mlx5_hrxq_release(dev, hrxq_idx[i]);
16723                         goto rss_sub_policy_error;
16724                 }
16725                 sub_policy->idx = sub_policy_idx;
16726                 sub_policy->main_policy = mtr_policy;
16727         }
16728         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16729                 if (!rss_desc[i])
16730                         continue;
16731                 sub_policy->rix_hrxq[i] = hrxq_idx[i];
16732                 if (mtr_policy->is_hierarchy) {
16733                         act_cnt = &mtr_policy->act_cnt[i];
16734                         act_cnt->next_sub_policy = next_sub_policy;
16735                         mlx5_hrxq_release(dev, hrxq_idx[i]);
16736                 } else {
16737                         /*
16738                          * Overwrite the last action from
16739                          * RSS action to Queue action.
16740                          */
16741                         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
16742                                               hrxq_idx[i]);
16743                         if (!hrxq) {
16744                                 DRV_LOG(ERR, "Failed to get policy hrxq");
16745                                 goto rss_sub_policy_error;
16746                         }
16747                         act_cnt = &mtr_policy->act_cnt[i];
16748                         if (act_cnt->rix_mark || act_cnt->modify_hdr) {
16749                                 memset(&dh, 0, sizeof(struct mlx5_flow_handle));
16750                                 if (act_cnt->rix_mark)
16751                                         dh.mark = 1;
16752                                 dh.fate_action = MLX5_FLOW_FATE_QUEUE;
16753                                 dh.rix_hrxq = hrxq_idx[i];
16754                                 flow_drv_rxq_flags_set(dev, &dh);
16755                         }
16756                 }
16757         }
16758         if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16759                                                sub_policy, domain)) {
16760                 DRV_LOG(ERR, "Failed to create policy "
16761                         "rules for ingress domain.");
16762                 goto rss_sub_policy_error;
16763         }
16764         if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16765                 i = (mtr_policy->sub_policy_num >>
16766                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16767                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16768                 if (i >= MLX5_MTR_RSS_MAX_SUB_POLICY) {
16769                         DRV_LOG(ERR, "No free sub-policy slot.");
16770                         goto rss_sub_policy_error;
16771                 }
16772                 mtr_policy->sub_policys[domain][i] = sub_policy;
16773                 i++;
16774                 mtr_policy->sub_policy_num &= ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16775                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
16776                 mtr_policy->sub_policy_num |=
16777                         (i & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16778                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
16779         }
16780         rte_spinlock_unlock(&mtr_policy->sl);
16781         *is_reuse = false;
16782         return sub_policy;
16783 rss_sub_policy_error:
16784         if (sub_policy) {
16785                 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16786                 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16787                         i = (mtr_policy->sub_policy_num >>
16788                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16789                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16790                         mtr_policy->sub_policys[domain][i] = NULL;
16791                         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16792                                         sub_policy->idx);
16793                 }
16794         }
16795         rte_spinlock_unlock(&mtr_policy->sl);
16796         return NULL;
16797 }
16798
16799 /**
16800  * Find the policy table for prefix table with RSS.
16801  *
16802  * @param[in] dev
16803  *   Pointer to Ethernet device.
16804  * @param[in] mtr_policy
16805  *   Pointer to meter policy table.
16806  * @param[in] rss_desc
16807  *   Pointer to rss_desc
16808  * @return
16809  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
16810  */
16811 static struct mlx5_flow_meter_sub_policy *
16812 flow_dv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
16813                 struct mlx5_flow_meter_policy *mtr_policy,
16814                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
16815 {
16816         struct mlx5_priv *priv = dev->data->dev_private;
16817         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16818         struct mlx5_flow_meter_info *next_fm;
16819         struct mlx5_flow_meter_policy *next_policy;
16820         struct mlx5_flow_meter_sub_policy *next_sub_policy = NULL;
16821         struct mlx5_flow_meter_policy *policies[MLX5_MTR_CHAIN_MAX_NUM];
16822         struct mlx5_flow_meter_sub_policy *sub_policies[MLX5_MTR_CHAIN_MAX_NUM];
16823         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16824         bool reuse_sub_policy;
16825         uint32_t i = 0;
16826         uint32_t j = 0;
16827
16828         while (true) {
16829                 /* Iterate hierarchy to get all policies in this hierarchy. */
16830                 policies[i++] = mtr_policy;
16831                 if (!mtr_policy->is_hierarchy)
16832                         break;
16833                 if (i >= MLX5_MTR_CHAIN_MAX_NUM) {
16834                         DRV_LOG(ERR, "Exceed max meter number in hierarchy.");
16835                         return NULL;
16836                 }
16837                 next_fm = mlx5_flow_meter_find(priv,
16838                         mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
16839                 if (!next_fm) {
16840                         DRV_LOG(ERR, "Failed to get next meter in hierarchy.");
16841                         return NULL;
16842                 }
16843                 next_policy =
16844                         mlx5_flow_meter_policy_find(dev, next_fm->policy_id,
16845                                                     NULL);
16846                 MLX5_ASSERT(next_policy);
16847                 mtr_policy = next_policy;
16848         }
16849         while (i) {
16850                 /**
16851                  * From last policy to the first one in hierarchy,
16852                  * create / get the sub policy for each of them.
16853                  */
16854                 sub_policy = __flow_dv_meter_get_rss_sub_policy(dev,
16855                                                         policies[--i],
16856                                                         rss_desc,
16857                                                         next_sub_policy,
16858                                                         &reuse_sub_policy);
16859                 if (!sub_policy) {
16860                         DRV_LOG(ERR, "Failed to get the sub policy.");
16861                         goto err_exit;
16862                 }
16863                 if (!reuse_sub_policy)
16864                         sub_policies[j++] = sub_policy;
16865                 next_sub_policy = sub_policy;
16866         }
16867         return sub_policy;
16868 err_exit:
16869         while (j) {
16870                 uint16_t sub_policy_num;
16871
16872                 sub_policy = sub_policies[--j];
16873                 mtr_policy = sub_policy->main_policy;
16874                 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16875                 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16876                         sub_policy_num = (mtr_policy->sub_policy_num >>
16877                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16878                                 MLX5_MTR_SUB_POLICY_NUM_MASK;
16879                         mtr_policy->sub_policys[domain][sub_policy_num - 1] =
16880                                                                         NULL;
16881                         sub_policy_num--;
16882                         mtr_policy->sub_policy_num &=
16883                                 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16884                                   (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i));
16885                         mtr_policy->sub_policy_num |=
16886                         (sub_policy_num & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16887                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i);
16888                         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16889                                         sub_policy->idx);
16890                 }
16891         }
16892         return NULL;
16893 }
16894
16895 /**
16896  * Create the sub policy tag rule for all meters in hierarchy.
16897  *
16898  * @param[in] dev
16899  *   Pointer to Ethernet device.
16900  * @param[in] fm
16901  *   Meter information table.
16902  * @param[in] src_port
16903  *   The src port this extra rule should use.
16904  * @param[in] item
16905  *   The src port match item.
16906  * @param[out] error
16907  *   Perform verbose error reporting if not NULL.
16908  * @return
16909  *   0 on success, a negative errno value otherwise and rte_errno is set.
16910  */
16911 static int
16912 flow_dv_meter_hierarchy_rule_create(struct rte_eth_dev *dev,
16913                                 struct mlx5_flow_meter_info *fm,
16914                                 int32_t src_port,
16915                                 const struct rte_flow_item *item,
16916                                 struct rte_flow_error *error)
16917 {
16918         struct mlx5_priv *priv = dev->data->dev_private;
16919         struct mlx5_flow_meter_policy *mtr_policy;
16920         struct mlx5_flow_meter_sub_policy *sub_policy;
16921         struct mlx5_flow_meter_info *next_fm = NULL;
16922         struct mlx5_flow_meter_policy *next_policy;
16923         struct mlx5_flow_meter_sub_policy *next_sub_policy;
16924         struct mlx5_flow_tbl_data_entry *tbl_data;
16925         struct mlx5_sub_policy_color_rule *color_rule;
16926         struct mlx5_meter_policy_acts acts;
16927         uint32_t color_reg_c_idx;
16928         bool mtr_first = (src_port != UINT16_MAX) ? true : false;
16929         struct rte_flow_attr attr = {
16930                 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
16931                 .priority = 0,
16932                 .ingress = 0,
16933                 .egress = 0,
16934                 .transfer = 1,
16935                 .reserved = 0,
16936         };
16937         uint32_t domain = MLX5_MTR_DOMAIN_TRANSFER;
16938         int i;
16939
16940         mtr_policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
16941         MLX5_ASSERT(mtr_policy);
16942         if (!mtr_policy->is_hierarchy)
16943                 return 0;
16944         next_fm = mlx5_flow_meter_find(priv,
16945                         mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
16946         if (!next_fm) {
16947                 return rte_flow_error_set(error, EINVAL,
16948                                 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
16949                                 "Failed to find next meter in hierarchy.");
16950         }
16951         if (!next_fm->drop_cnt)
16952                 goto exit;
16953         color_reg_c_idx = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, error);
16954         sub_policy = mtr_policy->sub_policys[domain][0];
16955         for (i = 0; i < RTE_COLORS; i++) {
16956                 bool rule_exist = false;
16957                 struct mlx5_meter_policy_action_container *act_cnt;
16958
16959                 if (i >= RTE_COLOR_YELLOW)
16960                         break;
16961                 TAILQ_FOREACH(color_rule,
16962                               &sub_policy->color_rules[i], next_port)
16963                         if (color_rule->src_port == src_port) {
16964                                 rule_exist = true;
16965                                 break;
16966                         }
16967                 if (rule_exist)
16968                         continue;
16969                 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
16970                                 sizeof(struct mlx5_sub_policy_color_rule),
16971                                 0, SOCKET_ID_ANY);
16972                 if (!color_rule)
16973                         return rte_flow_error_set(error, ENOMEM,
16974                                 RTE_FLOW_ERROR_TYPE_ACTION,
16975                                 NULL, "No memory to create tag color rule.");
16976                 color_rule->src_port = src_port;
16977                 attr.priority = i;
16978                 next_policy = mlx5_flow_meter_policy_find(dev,
16979                                                 next_fm->policy_id, NULL);
16980                 MLX5_ASSERT(next_policy);
16981                 next_sub_policy = next_policy->sub_policys[domain][0];
16982                 tbl_data = container_of(next_sub_policy->tbl_rsc,
16983                                         struct mlx5_flow_tbl_data_entry, tbl);
16984                 act_cnt = &mtr_policy->act_cnt[i];
16985                 if (mtr_first) {
16986                         acts.dv_actions[0] = next_fm->meter_action;
16987                         acts.dv_actions[1] = act_cnt->modify_hdr->action;
16988                 } else {
16989                         acts.dv_actions[0] = act_cnt->modify_hdr->action;
16990                         acts.dv_actions[1] = next_fm->meter_action;
16991                 }
16992                 acts.dv_actions[2] = tbl_data->jump.action;
16993                 acts.actions_n = 3;
16994                 if (mlx5_flow_meter_attach(priv, next_fm, &attr, error)) {
16995                         next_fm = NULL;
16996                         goto err_exit;
16997                 }
16998                 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
16999                                 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
17000                                 &attr, true, item,
17001                                 &color_rule->matcher, error)) {
17002                         rte_flow_error_set(error, errno,
17003                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17004                                 "Failed to create hierarchy meter matcher.");
17005                         goto err_exit;
17006                 }
17007                 if (__flow_dv_create_policy_flow(dev, color_reg_c_idx,
17008                                         (enum rte_color)i,
17009                                         color_rule->matcher->matcher_object,
17010                                         acts.actions_n, acts.dv_actions,
17011                                         true, item,
17012                                         &color_rule->rule, &attr)) {
17013                         rte_flow_error_set(error, errno,
17014                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17015                                 "Failed to create hierarchy meter rule.");
17016                         goto err_exit;
17017                 }
17018                 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
17019                                   color_rule, next_port);
17020         }
17021 exit:
17022         /**
17023          * Recursive call to iterate all meters in hierarchy and
17024          * create needed rules.
17025          */
17026         return flow_dv_meter_hierarchy_rule_create(dev, next_fm,
17027                                                 src_port, item, error);
17028 err_exit:
17029         if (color_rule) {
17030                 if (color_rule->rule)
17031                         mlx5_flow_os_destroy_flow(color_rule->rule);
17032                 if (color_rule->matcher) {
17033                         struct mlx5_flow_tbl_data_entry *tbl =
17034                                 container_of(color_rule->matcher->tbl,
17035                                                 typeof(*tbl), tbl);
17036                         mlx5_list_unregister(tbl->matchers,
17037                                                 &color_rule->matcher->entry);
17038                 }
17039                 mlx5_free(color_rule);
17040         }
17041         if (next_fm)
17042                 mlx5_flow_meter_detach(priv, next_fm);
17043         return -rte_errno;
17044 }
17045
17046 /**
17047  * Destroy the sub policy table with RX queue.
17048  *
17049  * @param[in] dev
17050  *   Pointer to Ethernet device.
17051  * @param[in] mtr_policy
17052  *   Pointer to meter policy table.
17053  */
17054 static void
17055 flow_dv_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
17056                                     struct mlx5_flow_meter_policy *mtr_policy)
17057 {
17058         struct mlx5_priv *priv = dev->data->dev_private;
17059         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
17060         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
17061         uint32_t i, j;
17062         uint16_t sub_policy_num, new_policy_num;
17063
17064         rte_spinlock_lock(&mtr_policy->sl);
17065         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
17066                 switch (mtr_policy->act_cnt[i].fate_action) {
17067                 case MLX5_FLOW_FATE_SHARED_RSS:
17068                         sub_policy_num = (mtr_policy->sub_policy_num >>
17069                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17070                         MLX5_MTR_SUB_POLICY_NUM_MASK;
17071                         new_policy_num = sub_policy_num;
17072                         for (j = 0; j < sub_policy_num; j++) {
17073                                 sub_policy =
17074                                         mtr_policy->sub_policys[domain][j];
17075                                 if (sub_policy) {
17076                                         __flow_dv_destroy_sub_policy_rules(dev,
17077                                                 sub_policy);
17078                                 if (sub_policy !=
17079                                         mtr_policy->sub_policys[domain][0]) {
17080                                         mtr_policy->sub_policys[domain][j] =
17081                                                                 NULL;
17082                                         mlx5_ipool_free
17083                                 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17084                                                 sub_policy->idx);
17085                                                 new_policy_num--;
17086                                         }
17087                                 }
17088                         }
17089                         if (new_policy_num != sub_policy_num) {
17090                                 mtr_policy->sub_policy_num &=
17091                                 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17092                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
17093                                 mtr_policy->sub_policy_num |=
17094                                 (new_policy_num &
17095                                         MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17096                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
17097                         }
17098                         break;
17099                 case MLX5_FLOW_FATE_QUEUE:
17100                         sub_policy = mtr_policy->sub_policys[domain][0];
17101                         __flow_dv_destroy_sub_policy_rules(dev,
17102                                                            sub_policy);
17103                         break;
17104                 default:
17105                         /*Other actions without queue and do nothing*/
17106                         break;
17107                 }
17108         }
17109         rte_spinlock_unlock(&mtr_policy->sl);
17110 }
17111 /**
17112  * Check whether the DR drop action is supported on the root table or not.
17113  *
17114  * Create a simple flow with DR drop action on root table to validate
17115  * if DR drop action on root table is supported or not.
17116  *
17117  * @param[in] dev
17118  *   Pointer to rte_eth_dev structure.
17119  *
17120  * @return
17121  *   0 on success, a negative errno value otherwise and rte_errno is set.
17122  */
17123 int
17124 mlx5_flow_discover_dr_action_support(struct rte_eth_dev *dev)
17125 {
17126         struct mlx5_priv *priv = dev->data->dev_private;
17127         struct mlx5_dev_ctx_shared *sh = priv->sh;
17128         struct mlx5_flow_dv_match_params mask = {
17129                 .size = sizeof(mask.buf),
17130         };
17131         struct mlx5_flow_dv_match_params value = {
17132                 .size = sizeof(value.buf),
17133         };
17134         struct mlx5dv_flow_matcher_attr dv_attr = {
17135                 .type = IBV_FLOW_ATTR_NORMAL,
17136                 .priority = 0,
17137                 .match_criteria_enable = 0,
17138                 .match_mask = (void *)&mask,
17139         };
17140         struct mlx5_flow_tbl_resource *tbl = NULL;
17141         void *matcher = NULL;
17142         void *flow = NULL;
17143         int ret = -1;
17144
17145         tbl = flow_dv_tbl_resource_get(dev, 0, 0, 0, false, NULL,
17146                                         0, 0, 0, NULL);
17147         if (!tbl)
17148                 goto err;
17149         dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17150         __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17151         ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
17152                                                tbl->obj, &matcher);
17153         if (ret)
17154                 goto err;
17155         __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17156         ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17157                                        &sh->dr_drop_action, &flow);
17158 err:
17159         /*
17160          * If DR drop action is not supported on root table, flow create will
17161          * be failed with EOPNOTSUPP or EPROTONOSUPPORT.
17162          */
17163         if (!flow) {
17164                 if (matcher &&
17165                     (errno == EPROTONOSUPPORT || errno == EOPNOTSUPP))
17166                         DRV_LOG(INFO, "DR drop action is not supported in root table.");
17167                 else
17168                         DRV_LOG(ERR, "Unexpected error in DR drop action support detection");
17169                 ret = -1;
17170         } else {
17171                 claim_zero(mlx5_flow_os_destroy_flow(flow));
17172         }
17173         if (matcher)
17174                 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17175         if (tbl)
17176                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17177         return ret;
17178 }
17179
17180 /**
17181  * Validate the batch counter support in root table.
17182  *
17183  * Create a simple flow with invalid counter and drop action on root table to
17184  * validate if batch counter with offset on root table is supported or not.
17185  *
17186  * @param[in] dev
17187  *   Pointer to rte_eth_dev structure.
17188  *
17189  * @return
17190  *   0 on success, a negative errno value otherwise and rte_errno is set.
17191  */
17192 int
17193 mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)
17194 {
17195         struct mlx5_priv *priv = dev->data->dev_private;
17196         struct mlx5_dev_ctx_shared *sh = priv->sh;
17197         struct mlx5_flow_dv_match_params mask = {
17198                 .size = sizeof(mask.buf),
17199         };
17200         struct mlx5_flow_dv_match_params value = {
17201                 .size = sizeof(value.buf),
17202         };
17203         struct mlx5dv_flow_matcher_attr dv_attr = {
17204                 .type = IBV_FLOW_ATTR_NORMAL | IBV_FLOW_ATTR_FLAGS_EGRESS,
17205                 .priority = 0,
17206                 .match_criteria_enable = 0,
17207                 .match_mask = (void *)&mask,
17208         };
17209         void *actions[2] = { 0 };
17210         struct mlx5_flow_tbl_resource *tbl = NULL;
17211         struct mlx5_devx_obj *dcs = NULL;
17212         void *matcher = NULL;
17213         void *flow = NULL;
17214         int ret = -1;
17215
17216         tbl = flow_dv_tbl_resource_get(dev, 0, 1, 0, false, NULL,
17217                                         0, 0, 0, NULL);
17218         if (!tbl)
17219                 goto err;
17220         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0x4);
17221         if (!dcs)
17222                 goto err;
17223         ret = mlx5_flow_os_create_flow_action_count(dcs->obj, UINT16_MAX,
17224                                                     &actions[0]);
17225         if (ret)
17226                 goto err;
17227         dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17228         __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17229         ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
17230                                                tbl->obj, &matcher);
17231         if (ret)
17232                 goto err;
17233         __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17234         ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17235                                        actions, &flow);
17236 err:
17237         /*
17238          * If batch counter with offset is not supported, the driver will not
17239          * validate the invalid offset value, flow create should success.
17240          * In this case, it means batch counter is not supported in root table.
17241          *
17242          * Otherwise, if flow create is failed, counter offset is supported.
17243          */
17244         if (flow) {
17245                 DRV_LOG(INFO, "Batch counter is not supported in root "
17246                               "table. Switch to fallback mode.");
17247                 rte_errno = ENOTSUP;
17248                 ret = -rte_errno;
17249                 claim_zero(mlx5_flow_os_destroy_flow(flow));
17250         } else {
17251                 /* Check matcher to make sure validate fail at flow create. */
17252                 if (!matcher || (matcher && errno != EINVAL))
17253                         DRV_LOG(ERR, "Unexpected error in counter offset "
17254                                      "support detection");
17255                 ret = 0;
17256         }
17257         if (actions[0])
17258                 claim_zero(mlx5_flow_os_destroy_flow_action(actions[0]));
17259         if (matcher)
17260                 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17261         if (tbl)
17262                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17263         if (dcs)
17264                 claim_zero(mlx5_devx_cmd_destroy(dcs));
17265         return ret;
17266 }
17267
17268 /**
17269  * Query a devx counter.
17270  *
17271  * @param[in] dev
17272  *   Pointer to the Ethernet device structure.
17273  * @param[in] cnt
17274  *   Index to the flow counter.
17275  * @param[in] clear
17276  *   Set to clear the counter statistics.
17277  * @param[out] pkts
17278  *   The statistics value of packets.
17279  * @param[out] bytes
17280  *   The statistics value of bytes.
17281  *
17282  * @return
17283  *   0 on success, otherwise return -1.
17284  */
17285 static int
17286 flow_dv_counter_query(struct rte_eth_dev *dev, uint32_t counter, bool clear,
17287                       uint64_t *pkts, uint64_t *bytes)
17288 {
17289         struct mlx5_priv *priv = dev->data->dev_private;
17290         struct mlx5_flow_counter *cnt;
17291         uint64_t inn_pkts, inn_bytes;
17292         int ret;
17293
17294         if (!priv->sh->devx)
17295                 return -1;
17296
17297         ret = _flow_dv_query_count(dev, counter, &inn_pkts, &inn_bytes);
17298         if (ret)
17299                 return -1;
17300         cnt = flow_dv_counter_get_by_idx(dev, counter, NULL);
17301         *pkts = inn_pkts - cnt->hits;
17302         *bytes = inn_bytes - cnt->bytes;
17303         if (clear) {
17304                 cnt->hits = inn_pkts;
17305                 cnt->bytes = inn_bytes;
17306         }
17307         return 0;
17308 }
17309
17310 /**
17311  * Get aged-out flows.
17312  *
17313  * @param[in] dev
17314  *   Pointer to the Ethernet device structure.
17315  * @param[in] context
17316  *   The address of an array of pointers to the aged-out flows contexts.
17317  * @param[in] nb_contexts
17318  *   The length of context array pointers.
17319  * @param[out] error
17320  *   Perform verbose error reporting if not NULL. Initialized in case of
17321  *   error only.
17322  *
17323  * @return
17324  *   how many contexts get in success, otherwise negative errno value.
17325  *   if nb_contexts is 0, return the amount of all aged contexts.
17326  *   if nb_contexts is not 0 , return the amount of aged flows reported
17327  *   in the context array.
17328  * @note: only stub for now
17329  */
17330 static int
17331 flow_dv_get_aged_flows(struct rte_eth_dev *dev,
17332                     void **context,
17333                     uint32_t nb_contexts,
17334                     struct rte_flow_error *error)
17335 {
17336         struct mlx5_priv *priv = dev->data->dev_private;
17337         struct mlx5_age_info *age_info;
17338         struct mlx5_age_param *age_param;
17339         struct mlx5_flow_counter *counter;
17340         struct mlx5_aso_age_action *act;
17341         int nb_flows = 0;
17342
17343         if (nb_contexts && !context)
17344                 return rte_flow_error_set(error, EINVAL,
17345                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17346                                           NULL, "empty context");
17347         age_info = GET_PORT_AGE_INFO(priv);
17348         rte_spinlock_lock(&age_info->aged_sl);
17349         LIST_FOREACH(act, &age_info->aged_aso, next) {
17350                 nb_flows++;
17351                 if (nb_contexts) {
17352                         context[nb_flows - 1] =
17353                                                 act->age_params.context;
17354                         if (!(--nb_contexts))
17355                                 break;
17356                 }
17357         }
17358         TAILQ_FOREACH(counter, &age_info->aged_counters, next) {
17359                 nb_flows++;
17360                 if (nb_contexts) {
17361                         age_param = MLX5_CNT_TO_AGE(counter);
17362                         context[nb_flows - 1] = age_param->context;
17363                         if (!(--nb_contexts))
17364                                 break;
17365                 }
17366         }
17367         rte_spinlock_unlock(&age_info->aged_sl);
17368         MLX5_AGE_SET(age_info, MLX5_AGE_TRIGGER);
17369         return nb_flows;
17370 }
17371
17372 /*
17373  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
17374  */
17375 static uint32_t
17376 flow_dv_counter_allocate(struct rte_eth_dev *dev)
17377 {
17378         return flow_dv_counter_alloc(dev, 0);
17379 }
17380
17381 /**
17382  * Validate indirect action.
17383  * Dispatcher for action type specific validation.
17384  *
17385  * @param[in] dev
17386  *   Pointer to the Ethernet device structure.
17387  * @param[in] conf
17388  *   Indirect action configuration.
17389  * @param[in] action
17390  *   The indirect action object to validate.
17391  * @param[out] error
17392  *   Perform verbose error reporting if not NULL. Initialized in case of
17393  *   error only.
17394  *
17395  * @return
17396  *   0 on success, otherwise negative errno value.
17397  */
17398 static int
17399 flow_dv_action_validate(struct rte_eth_dev *dev,
17400                         const struct rte_flow_indir_action_conf *conf,
17401                         const struct rte_flow_action *action,
17402                         struct rte_flow_error *err)
17403 {
17404         struct mlx5_priv *priv = dev->data->dev_private;
17405
17406         RTE_SET_USED(conf);
17407         switch (action->type) {
17408         case RTE_FLOW_ACTION_TYPE_RSS:
17409                 /*
17410                  * priv->obj_ops is set according to driver capabilities.
17411                  * When DevX capabilities are
17412                  * sufficient, it is set to devx_obj_ops.
17413                  * Otherwise, it is set to ibv_obj_ops.
17414                  * ibv_obj_ops doesn't support ind_table_modify operation.
17415                  * In this case the indirect RSS action can't be used.
17416                  */
17417                 if (priv->obj_ops.ind_table_modify == NULL)
17418                         return rte_flow_error_set
17419                                         (err, ENOTSUP,
17420                                          RTE_FLOW_ERROR_TYPE_ACTION,
17421                                          NULL,
17422                                          "Indirect RSS action not supported");
17423                 return mlx5_validate_action_rss(dev, action, err);
17424         case RTE_FLOW_ACTION_TYPE_AGE:
17425                 if (!priv->sh->aso_age_mng)
17426                         return rte_flow_error_set(err, ENOTSUP,
17427                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17428                                                 NULL,
17429                                                 "Indirect age action not supported");
17430                 return flow_dv_validate_action_age(0, action, dev, err);
17431         case RTE_FLOW_ACTION_TYPE_COUNT:
17432                 return flow_dv_validate_action_count(dev, true, 0, err);
17433         case RTE_FLOW_ACTION_TYPE_CONNTRACK:
17434                 if (!priv->sh->ct_aso_en)
17435                         return rte_flow_error_set(err, ENOTSUP,
17436                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17437                                         "ASO CT is not supported");
17438                 return mlx5_validate_action_ct(dev, action->conf, err);
17439         default:
17440                 return rte_flow_error_set(err, ENOTSUP,
17441                                           RTE_FLOW_ERROR_TYPE_ACTION,
17442                                           NULL,
17443                                           "action type not supported");
17444         }
17445 }
17446
17447 /*
17448  * Check if the RSS configurations for colors of a meter policy match
17449  * each other, except the queues.
17450  *
17451  * @param[in] r1
17452  *   Pointer to the first RSS flow action.
17453  * @param[in] r2
17454  *   Pointer to the second RSS flow action.
17455  *
17456  * @return
17457  *   0 on match, 1 on conflict.
17458  */
17459 static inline int
17460 flow_dv_mtr_policy_rss_compare(const struct rte_flow_action_rss *r1,
17461                                const struct rte_flow_action_rss *r2)
17462 {
17463         if (!r1 || !r2)
17464                 return 0;
17465         if (r1->func != r2->func || r1->level != r2->level ||
17466             r1->types != r2->types || r1->key_len != r2->key_len ||
17467             memcmp(r1->key, r2->key, r1->key_len))
17468                 return 1;
17469         return 0;
17470 }
17471
17472 /**
17473  * Validate the meter hierarchy chain for meter policy.
17474  *
17475  * @param[in] dev
17476  *   Pointer to the Ethernet device structure.
17477  * @param[in] meter_id
17478  *   Meter id.
17479  * @param[in] action_flags
17480  *   Holds the actions detected until now.
17481  * @param[out] is_rss
17482  *   Is RSS or not.
17483  * @param[out] hierarchy_domain
17484  *   The domain bitmap for hierarchy policy.
17485  * @param[out] error
17486  *   Perform verbose error reporting if not NULL. Initialized in case of
17487  *   error only.
17488  *
17489  * @return
17490  *   0 on success, otherwise negative errno value with error set.
17491  */
17492 static int
17493 flow_dv_validate_policy_mtr_hierarchy(struct rte_eth_dev *dev,
17494                                   uint32_t meter_id,
17495                                   uint64_t action_flags,
17496                                   bool *is_rss,
17497                                   uint8_t *hierarchy_domain,
17498                                   struct rte_mtr_error *error)
17499 {
17500         struct mlx5_priv *priv = dev->data->dev_private;
17501         struct mlx5_flow_meter_info *fm;
17502         struct mlx5_flow_meter_policy *policy;
17503         uint8_t cnt = 1;
17504
17505         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
17506                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17507                 return -rte_mtr_error_set(error, EINVAL,
17508                                         RTE_MTR_ERROR_TYPE_POLICER_ACTION_GREEN,
17509                                         NULL,
17510                                         "Multiple fate actions not supported.");
17511         *hierarchy_domain = 0;
17512         while (true) {
17513                 fm = mlx5_flow_meter_find(priv, meter_id, NULL);
17514                 if (!fm)
17515                         return -rte_mtr_error_set(error, EINVAL,
17516                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17517                                         "Meter not found in meter hierarchy.");
17518                 if (fm->def_policy)
17519                         return -rte_mtr_error_set(error, EINVAL,
17520                                         RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17521                         "Non termination meter not supported in hierarchy.");
17522                 policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
17523                 MLX5_ASSERT(policy);
17524                 /**
17525                  * Only inherit the supported domains of the first meter in
17526                  * hierarchy.
17527                  * One meter supports at least one domain.
17528                  */
17529                 if (!*hierarchy_domain) {
17530                         if (policy->transfer)
17531                                 *hierarchy_domain |=
17532                                                 MLX5_MTR_DOMAIN_TRANSFER_BIT;
17533                         if (policy->ingress)
17534                                 *hierarchy_domain |=
17535                                                 MLX5_MTR_DOMAIN_INGRESS_BIT;
17536                         if (policy->egress)
17537                                 *hierarchy_domain |= MLX5_MTR_DOMAIN_EGRESS_BIT;
17538                 }
17539                 if (!policy->is_hierarchy) {
17540                         *is_rss = policy->is_rss;
17541                         break;
17542                 }
17543                 meter_id = policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id;
17544                 if (++cnt >= MLX5_MTR_CHAIN_MAX_NUM)
17545                         return -rte_mtr_error_set(error, EINVAL,
17546                                         RTE_MTR_ERROR_TYPE_METER_POLICY, NULL,
17547                                         "Exceed max hierarchy meter number.");
17548         }
17549         return 0;
17550 }
17551
17552 /**
17553  * Validate meter policy actions.
17554  * Dispatcher for action type specific validation.
17555  *
17556  * @param[in] dev
17557  *   Pointer to the Ethernet device structure.
17558  * @param[in] action
17559  *   The meter policy action object to validate.
17560  * @param[in] attr
17561  *   Attributes of flow to determine steering domain.
17562  * @param[out] error
17563  *   Perform verbose error reporting if not NULL. Initialized in case of
17564  *   error only.
17565  *
17566  * @return
17567  *   0 on success, otherwise negative errno value.
17568  */
17569 static int
17570 flow_dv_validate_mtr_policy_acts(struct rte_eth_dev *dev,
17571                         const struct rte_flow_action *actions[RTE_COLORS],
17572                         struct rte_flow_attr *attr,
17573                         bool *is_rss,
17574                         uint8_t *domain_bitmap,
17575                         uint8_t *policy_mode,
17576                         struct rte_mtr_error *error)
17577 {
17578         struct mlx5_priv *priv = dev->data->dev_private;
17579         struct mlx5_dev_config *dev_conf = &priv->config;
17580         const struct rte_flow_action *act;
17581         uint64_t action_flags[RTE_COLORS] = {0};
17582         int actions_n;
17583         int i, ret;
17584         struct rte_flow_error flow_err;
17585         uint8_t domain_color[RTE_COLORS] = {0};
17586         uint8_t def_domain = MLX5_MTR_ALL_DOMAIN_BIT;
17587         uint8_t hierarchy_domain = 0;
17588         const struct rte_flow_action_meter *mtr;
17589         bool def_green = false;
17590         bool def_yellow = false;
17591         const struct rte_flow_action_rss *rss_color[RTE_COLORS] = {NULL};
17592
17593         if (!priv->config.dv_esw_en)
17594                 def_domain &= ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
17595         *domain_bitmap = def_domain;
17596         /* Red color could only support DROP action. */
17597         if (!actions[RTE_COLOR_RED] ||
17598             actions[RTE_COLOR_RED]->type != RTE_FLOW_ACTION_TYPE_DROP)
17599                 return -rte_mtr_error_set(error, ENOTSUP,
17600                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17601                                 NULL, "Red color only supports drop action.");
17602         /*
17603          * Check default policy actions:
17604          * Green / Yellow: no action, Red: drop action
17605          * Either G or Y will trigger default policy actions to be created.
17606          */
17607         if (!actions[RTE_COLOR_GREEN] ||
17608             actions[RTE_COLOR_GREEN]->type == RTE_FLOW_ACTION_TYPE_END)
17609                 def_green = true;
17610         if (!actions[RTE_COLOR_YELLOW] ||
17611             actions[RTE_COLOR_YELLOW]->type == RTE_FLOW_ACTION_TYPE_END)
17612                 def_yellow = true;
17613         if (def_green && def_yellow) {
17614                 *policy_mode = MLX5_MTR_POLICY_MODE_DEF;
17615                 return 0;
17616         } else if (!def_green && def_yellow) {
17617                 *policy_mode = MLX5_MTR_POLICY_MODE_OG;
17618         } else if (def_green && !def_yellow) {
17619                 *policy_mode = MLX5_MTR_POLICY_MODE_OY;
17620         }
17621         /* Set to empty string in case of NULL pointer access by user. */
17622         flow_err.message = "";
17623         for (i = 0; i < RTE_COLORS; i++) {
17624                 act = actions[i];
17625                 for (action_flags[i] = 0, actions_n = 0;
17626                      act && act->type != RTE_FLOW_ACTION_TYPE_END;
17627                      act++) {
17628                         if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
17629                                 return -rte_mtr_error_set(error, ENOTSUP,
17630                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17631                                           NULL, "too many actions");
17632                         switch (act->type) {
17633                         case RTE_FLOW_ACTION_TYPE_PORT_ID:
17634                         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
17635                                 if (!priv->config.dv_esw_en)
17636                                         return -rte_mtr_error_set(error,
17637                                         ENOTSUP,
17638                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17639                                         NULL, "PORT action validate check"
17640                                         " fail for ESW disable");
17641                                 ret = flow_dv_validate_action_port_id(dev,
17642                                                 action_flags[i],
17643                                                 act, attr, &flow_err);
17644                                 if (ret)
17645                                         return -rte_mtr_error_set(error,
17646                                         ENOTSUP,
17647                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17648                                         NULL, flow_err.message ?
17649                                         flow_err.message :
17650                                         "PORT action validate check fail");
17651                                 ++actions_n;
17652                                 action_flags[i] |= MLX5_FLOW_ACTION_PORT_ID;
17653                                 break;
17654                         case RTE_FLOW_ACTION_TYPE_MARK:
17655                                 ret = flow_dv_validate_action_mark(dev, act,
17656                                                            action_flags[i],
17657                                                            attr, &flow_err);
17658                                 if (ret < 0)
17659                                         return -rte_mtr_error_set(error,
17660                                         ENOTSUP,
17661                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17662                                         NULL, flow_err.message ?
17663                                         flow_err.message :
17664                                         "Mark action validate check fail");
17665                                 if (dev_conf->dv_xmeta_en !=
17666                                         MLX5_XMETA_MODE_LEGACY)
17667                                         return -rte_mtr_error_set(error,
17668                                         ENOTSUP,
17669                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17670                                         NULL, "Extend MARK action is "
17671                                         "not supported. Please try use "
17672                                         "default policy for meter.");
17673                                 action_flags[i] |= MLX5_FLOW_ACTION_MARK;
17674                                 ++actions_n;
17675                                 break;
17676                         case RTE_FLOW_ACTION_TYPE_SET_TAG:
17677                                 ret = flow_dv_validate_action_set_tag(dev,
17678                                                         act, action_flags[i],
17679                                                         attr, &flow_err);
17680                                 if (ret)
17681                                         return -rte_mtr_error_set(error,
17682                                         ENOTSUP,
17683                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17684                                         NULL, flow_err.message ?
17685                                         flow_err.message :
17686                                         "Set tag action validate check fail");
17687                                 action_flags[i] |= MLX5_FLOW_ACTION_SET_TAG;
17688                                 ++actions_n;
17689                                 break;
17690                         case RTE_FLOW_ACTION_TYPE_DROP:
17691                                 ret = mlx5_flow_validate_action_drop
17692                                         (action_flags[i], attr, &flow_err);
17693                                 if (ret < 0)
17694                                         return -rte_mtr_error_set(error,
17695                                         ENOTSUP,
17696                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17697                                         NULL, flow_err.message ?
17698                                         flow_err.message :
17699                                         "Drop action validate check fail");
17700                                 action_flags[i] |= MLX5_FLOW_ACTION_DROP;
17701                                 ++actions_n;
17702                                 break;
17703                         case RTE_FLOW_ACTION_TYPE_QUEUE:
17704                                 /*
17705                                  * Check whether extensive
17706                                  * metadata feature is engaged.
17707                                  */
17708                                 if (dev_conf->dv_flow_en &&
17709                                     (dev_conf->dv_xmeta_en !=
17710                                      MLX5_XMETA_MODE_LEGACY) &&
17711                                     mlx5_flow_ext_mreg_supported(dev))
17712                                         return -rte_mtr_error_set(error,
17713                                           ENOTSUP,
17714                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17715                                           NULL, "Queue action with meta "
17716                                           "is not supported. Please try use "
17717                                           "default policy for meter.");
17718                                 ret = mlx5_flow_validate_action_queue(act,
17719                                                         action_flags[i], dev,
17720                                                         attr, &flow_err);
17721                                 if (ret < 0)
17722                                         return -rte_mtr_error_set(error,
17723                                           ENOTSUP,
17724                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17725                                           NULL, flow_err.message ?
17726                                           flow_err.message :
17727                                           "Queue action validate check fail");
17728                                 action_flags[i] |= MLX5_FLOW_ACTION_QUEUE;
17729                                 ++actions_n;
17730                                 break;
17731                         case RTE_FLOW_ACTION_TYPE_RSS:
17732                                 if (dev_conf->dv_flow_en &&
17733                                     (dev_conf->dv_xmeta_en !=
17734                                      MLX5_XMETA_MODE_LEGACY) &&
17735                                     mlx5_flow_ext_mreg_supported(dev))
17736                                         return -rte_mtr_error_set(error,
17737                                           ENOTSUP,
17738                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17739                                           NULL, "RSS action with meta "
17740                                           "is not supported. Please try use "
17741                                           "default policy for meter.");
17742                                 ret = mlx5_validate_action_rss(dev, act,
17743                                                                &flow_err);
17744                                 if (ret < 0)
17745                                         return -rte_mtr_error_set(error,
17746                                           ENOTSUP,
17747                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17748                                           NULL, flow_err.message ?
17749                                           flow_err.message :
17750                                           "RSS action validate check fail");
17751                                 action_flags[i] |= MLX5_FLOW_ACTION_RSS;
17752                                 ++actions_n;
17753                                 /* Either G or Y will set the RSS. */
17754                                 rss_color[i] = act->conf;
17755                                 break;
17756                         case RTE_FLOW_ACTION_TYPE_JUMP:
17757                                 ret = flow_dv_validate_action_jump(dev,
17758                                         NULL, act, action_flags[i],
17759                                         attr, true, &flow_err);
17760                                 if (ret)
17761                                         return -rte_mtr_error_set(error,
17762                                           ENOTSUP,
17763                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17764                                           NULL, flow_err.message ?
17765                                           flow_err.message :
17766                                           "Jump action validate check fail");
17767                                 ++actions_n;
17768                                 action_flags[i] |= MLX5_FLOW_ACTION_JUMP;
17769                                 break;
17770                         /*
17771                          * Only the last meter in the hierarchy will support
17772                          * the YELLOW color steering. Then in the meter policy
17773                          * actions list, there should be no other meter inside.
17774                          */
17775                         case RTE_FLOW_ACTION_TYPE_METER:
17776                                 if (i != RTE_COLOR_GREEN)
17777                                         return -rte_mtr_error_set(error,
17778                                                 ENOTSUP,
17779                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17780                                                 NULL,
17781                                                 "Meter hierarchy only supports GREEN color.");
17782                                 if (*policy_mode != MLX5_MTR_POLICY_MODE_OG)
17783                                         return -rte_mtr_error_set(error,
17784                                                 ENOTSUP,
17785                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17786                                                 NULL,
17787                                                 "No yellow policy should be provided in meter hierarchy.");
17788                                 mtr = act->conf;
17789                                 ret = flow_dv_validate_policy_mtr_hierarchy(dev,
17790                                                         mtr->mtr_id,
17791                                                         action_flags[i],
17792                                                         is_rss,
17793                                                         &hierarchy_domain,
17794                                                         error);
17795                                 if (ret)
17796                                         return ret;
17797                                 ++actions_n;
17798                                 action_flags[i] |=
17799                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
17800                                 break;
17801                         default:
17802                                 return -rte_mtr_error_set(error, ENOTSUP,
17803                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17804                                         NULL,
17805                                         "Doesn't support optional action");
17806                         }
17807                 }
17808                 if (action_flags[i] & MLX5_FLOW_ACTION_PORT_ID) {
17809                         domain_color[i] = MLX5_MTR_DOMAIN_TRANSFER_BIT;
17810                 } else if ((action_flags[i] &
17811                           (MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_QUEUE)) ||
17812                           (action_flags[i] & MLX5_FLOW_ACTION_MARK)) {
17813                         /*
17814                          * Only support MLX5_XMETA_MODE_LEGACY
17815                          * so MARK action is only in ingress domain.
17816                          */
17817                         domain_color[i] = MLX5_MTR_DOMAIN_INGRESS_BIT;
17818                 } else {
17819                         domain_color[i] = def_domain;
17820                         if (action_flags[i] &&
17821                             !(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17822                                 domain_color[i] &=
17823                                 ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
17824                 }
17825                 if (action_flags[i] &
17826                     MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
17827                         domain_color[i] &= hierarchy_domain;
17828                 /*
17829                  * Non-termination actions only support NIC Tx domain.
17830                  * The adjustion should be skipped when there is no
17831                  * action or only END is provided. The default domains
17832                  * bit-mask is set to find the MIN intersection.
17833                  * The action flags checking should also be skipped.
17834                  */
17835                 if ((def_green && i == RTE_COLOR_GREEN) ||
17836                     (def_yellow && i == RTE_COLOR_YELLOW))
17837                         continue;
17838                 /*
17839                  * Validate the drop action mutual exclusion
17840                  * with other actions. Drop action is mutually-exclusive
17841                  * with any other action, except for Count action.
17842                  */
17843                 if ((action_flags[i] & MLX5_FLOW_ACTION_DROP) &&
17844                     (action_flags[i] & ~MLX5_FLOW_ACTION_DROP)) {
17845                         return -rte_mtr_error_set(error, ENOTSUP,
17846                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17847                                 NULL, "Drop action is mutually-exclusive "
17848                                 "with any other action");
17849                 }
17850                 /* Eswitch has few restrictions on using items and actions */
17851                 if (domain_color[i] & MLX5_MTR_DOMAIN_TRANSFER_BIT) {
17852                         if (!mlx5_flow_ext_mreg_supported(dev) &&
17853                             action_flags[i] & MLX5_FLOW_ACTION_MARK)
17854                                 return -rte_mtr_error_set(error, ENOTSUP,
17855                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17856                                         NULL, "unsupported action MARK");
17857                         if (action_flags[i] & MLX5_FLOW_ACTION_QUEUE)
17858                                 return -rte_mtr_error_set(error, ENOTSUP,
17859                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17860                                         NULL, "unsupported action QUEUE");
17861                         if (action_flags[i] & MLX5_FLOW_ACTION_RSS)
17862                                 return -rte_mtr_error_set(error, ENOTSUP,
17863                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17864                                         NULL, "unsupported action RSS");
17865                         if (!(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17866                                 return -rte_mtr_error_set(error, ENOTSUP,
17867                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17868                                         NULL, "no fate action is found");
17869                 } else {
17870                         if (!(action_flags[i] & MLX5_FLOW_FATE_ACTIONS) &&
17871                             (domain_color[i] & MLX5_MTR_DOMAIN_INGRESS_BIT)) {
17872                                 if ((domain_color[i] &
17873                                      MLX5_MTR_DOMAIN_EGRESS_BIT))
17874                                         domain_color[i] =
17875                                                 MLX5_MTR_DOMAIN_EGRESS_BIT;
17876                                 else
17877                                         return -rte_mtr_error_set(error,
17878                                                 ENOTSUP,
17879                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17880                                                 NULL,
17881                                                 "no fate action is found");
17882                         }
17883                 }
17884         }
17885         /* If both colors have RSS, the attributes should be the same. */
17886         if (flow_dv_mtr_policy_rss_compare(rss_color[RTE_COLOR_GREEN],
17887                                            rss_color[RTE_COLOR_YELLOW]))
17888                 return -rte_mtr_error_set(error, EINVAL,
17889                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17890                                           NULL, "policy RSS attr conflict");
17891         if (rss_color[RTE_COLOR_GREEN] || rss_color[RTE_COLOR_YELLOW])
17892                 *is_rss = true;
17893         /* "domain_color[C]" is non-zero for each color, default is ALL. */
17894         if (!def_green && !def_yellow &&
17895             domain_color[RTE_COLOR_GREEN] != domain_color[RTE_COLOR_YELLOW] &&
17896             !(action_flags[RTE_COLOR_GREEN] & MLX5_FLOW_ACTION_DROP) &&
17897             !(action_flags[RTE_COLOR_YELLOW] & MLX5_FLOW_ACTION_DROP))
17898                 return -rte_mtr_error_set(error, EINVAL,
17899                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17900                                           NULL, "policy domains conflict");
17901         /*
17902          * At least one color policy is listed in the actions, the domains
17903          * to be supported should be the intersection.
17904          */
17905         *domain_bitmap = domain_color[RTE_COLOR_GREEN] &
17906                          domain_color[RTE_COLOR_YELLOW];
17907         return 0;
17908 }
17909
17910 static int
17911 flow_dv_sync_domain(struct rte_eth_dev *dev, uint32_t domains, uint32_t flags)
17912 {
17913         struct mlx5_priv *priv = dev->data->dev_private;
17914         int ret = 0;
17915
17916         if ((domains & MLX5_DOMAIN_BIT_NIC_RX) && priv->sh->rx_domain != NULL) {
17917                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->rx_domain,
17918                                                 flags);
17919                 if (ret != 0)
17920                         return ret;
17921         }
17922         if ((domains & MLX5_DOMAIN_BIT_NIC_TX) && priv->sh->tx_domain != NULL) {
17923                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->tx_domain, flags);
17924                 if (ret != 0)
17925                         return ret;
17926         }
17927         if ((domains & MLX5_DOMAIN_BIT_FDB) && priv->sh->fdb_domain != NULL) {
17928                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->fdb_domain, flags);
17929                 if (ret != 0)
17930                         return ret;
17931         }
17932         return 0;
17933 }
17934
17935 /**
17936  * Discover the number of available flow priorities
17937  * by trying to create a flow with the highest priority value
17938  * for each possible number.
17939  *
17940  * @param[in] dev
17941  *   Ethernet device.
17942  * @param[in] vprio
17943  *   List of possible number of available priorities.
17944  * @param[in] vprio_n
17945  *   Size of @p vprio array.
17946  * @return
17947  *   On success, number of available flow priorities.
17948  *   On failure, a negative errno-style code and rte_errno is set.
17949  */
17950 static int
17951 flow_dv_discover_priorities(struct rte_eth_dev *dev,
17952                             const uint16_t *vprio, int vprio_n)
17953 {
17954         struct mlx5_priv *priv = dev->data->dev_private;
17955         struct mlx5_indexed_pool *pool = priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW];
17956         struct rte_flow_item_eth eth;
17957         struct rte_flow_item item = {
17958                 .type = RTE_FLOW_ITEM_TYPE_ETH,
17959                 .spec = &eth,
17960                 .mask = &eth,
17961         };
17962         struct mlx5_flow_dv_matcher matcher = {
17963                 .mask = {
17964                         .size = sizeof(matcher.mask.buf),
17965                 },
17966         };
17967         union mlx5_flow_tbl_key tbl_key;
17968         struct mlx5_flow flow;
17969         void *action;
17970         struct rte_flow_error error;
17971         uint8_t misc_mask;
17972         int i, err, ret = -ENOTSUP;
17973
17974         /*
17975          * Prepare a flow with a catch-all pattern and a drop action.
17976          * Use drop queue, because shared drop action may be unavailable.
17977          */
17978         action = priv->drop_queue.hrxq->action;
17979         if (action == NULL) {
17980                 DRV_LOG(ERR, "Priority discovery requires a drop action");
17981                 rte_errno = ENOTSUP;
17982                 return -rte_errno;
17983         }
17984         memset(&flow, 0, sizeof(flow));
17985         flow.handle = mlx5_ipool_zmalloc(pool, &flow.handle_idx);
17986         if (flow.handle == NULL) {
17987                 DRV_LOG(ERR, "Cannot create flow handle");
17988                 rte_errno = ENOMEM;
17989                 return -rte_errno;
17990         }
17991         flow.ingress = true;
17992         flow.dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
17993         flow.dv.actions[0] = action;
17994         flow.dv.actions_n = 1;
17995         memset(&eth, 0, sizeof(eth));
17996         flow_dv_translate_item_eth(matcher.mask.buf, flow.dv.value.buf,
17997                                    &item, /* inner */ false, /* group */ 0);
17998         matcher.crc = rte_raw_cksum(matcher.mask.buf, matcher.mask.size);
17999         for (i = 0; i < vprio_n; i++) {
18000                 /* Configure the next proposed maximum priority. */
18001                 matcher.priority = vprio[i] - 1;
18002                 memset(&tbl_key, 0, sizeof(tbl_key));
18003                 err = flow_dv_matcher_register(dev, &matcher, &tbl_key, &flow,
18004                                                /* tunnel */ NULL,
18005                                                /* group */ 0,
18006                                                &error);
18007                 if (err != 0) {
18008                         /* This action is pure SW and must always succeed. */
18009                         DRV_LOG(ERR, "Cannot register matcher");
18010                         ret = -rte_errno;
18011                         break;
18012                 }
18013                 /* Try to apply the flow to HW. */
18014                 misc_mask = flow_dv_matcher_enable(flow.dv.value.buf);
18015                 __flow_dv_adjust_buf_size(&flow.dv.value.size, misc_mask);
18016                 err = mlx5_flow_os_create_flow
18017                                 (flow.handle->dvh.matcher->matcher_object,
18018                                  (void *)&flow.dv.value, flow.dv.actions_n,
18019                                  flow.dv.actions, &flow.handle->drv_flow);
18020                 if (err == 0) {
18021                         claim_zero(mlx5_flow_os_destroy_flow
18022                                                 (flow.handle->drv_flow));
18023                         flow.handle->drv_flow = NULL;
18024                 }
18025                 claim_zero(flow_dv_matcher_release(dev, flow.handle));
18026                 if (err != 0)
18027                         break;
18028                 ret = vprio[i];
18029         }
18030         mlx5_ipool_free(pool, flow.handle_idx);
18031         /* Set rte_errno if no expected priority value matched. */
18032         if (ret < 0)
18033                 rte_errno = -ret;
18034         return ret;
18035 }
18036
18037 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
18038         .validate = flow_dv_validate,
18039         .prepare = flow_dv_prepare,
18040         .translate = flow_dv_translate,
18041         .apply = flow_dv_apply,
18042         .remove = flow_dv_remove,
18043         .destroy = flow_dv_destroy,
18044         .query = flow_dv_query,
18045         .create_mtr_tbls = flow_dv_create_mtr_tbls,
18046         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbls,
18047         .destroy_mtr_drop_tbls = flow_dv_destroy_mtr_drop_tbls,
18048         .create_meter = flow_dv_mtr_alloc,
18049         .free_meter = flow_dv_aso_mtr_release_to_pool,
18050         .validate_mtr_acts = flow_dv_validate_mtr_policy_acts,
18051         .create_mtr_acts = flow_dv_create_mtr_policy_acts,
18052         .destroy_mtr_acts = flow_dv_destroy_mtr_policy_acts,
18053         .create_policy_rules = flow_dv_create_policy_rules,
18054         .destroy_policy_rules = flow_dv_destroy_policy_rules,
18055         .create_def_policy = flow_dv_create_def_policy,
18056         .destroy_def_policy = flow_dv_destroy_def_policy,
18057         .meter_sub_policy_rss_prepare = flow_dv_meter_sub_policy_rss_prepare,
18058         .meter_hierarchy_rule_create = flow_dv_meter_hierarchy_rule_create,
18059         .destroy_sub_policy_with_rxq = flow_dv_destroy_sub_policy_with_rxq,
18060         .counter_alloc = flow_dv_counter_allocate,
18061         .counter_free = flow_dv_counter_free,
18062         .counter_query = flow_dv_counter_query,
18063         .get_aged_flows = flow_dv_get_aged_flows,
18064         .action_validate = flow_dv_action_validate,
18065         .action_create = flow_dv_action_create,
18066         .action_destroy = flow_dv_action_destroy,
18067         .action_update = flow_dv_action_update,
18068         .action_query = flow_dv_action_query,
18069         .sync_domain = flow_dv_sync_domain,
18070         .discover_priorities = flow_dv_discover_priorities,
18071 };
18072
18073 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
18074