drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 #include <rte_common.h>
  12 #include <rte_ether.h>
  13 #include <rte_ethdev_driver.h>
  14 #include <rte_flow.h>
  15 #include <rte_flow_driver.h>
  16 #include <rte_malloc.h>
  17 #include <rte_cycles.h>
  18 #include <rte_ip.h>
  19 #include <rte_gre.h>
  20 #include <rte_vxlan.h>
  21 #include <rte_gtp.h>
  22 #include <rte_eal_paging.h>
  23 #include <rte_mpls.h>
  24
  25 #include <mlx5_glue.h>
  26 #include <mlx5_devx_cmds.h>
  27 #include <mlx5_prm.h>
  28 #include <mlx5_malloc.h>
  29
  30 #include "mlx5_defs.h"
  31 #include "mlx5.h"
  32 #include "mlx5_common_os.h"
  33 #include "mlx5_flow.h"
  34 #include "mlx5_flow_os.h"
  35 #include "mlx5_rxtx.h"
  36 #include "rte_pmd_mlx5.h"
  37
  38 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  39
  40 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  41 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  42 #endif
  43
  44 #ifndef HAVE_MLX5DV_DR_ESWITCH
  45 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  46 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  47 #endif
  48 #endif
  49
  50 #ifndef HAVE_MLX5DV_DR
  51 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  52 #endif
  53
  54 /* VLAN header definitions */
  55 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  56 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  57 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  58 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  59 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  60
  61 union flow_dv_attr {
  62         struct {
  63                 uint32_t valid:1;
  64                 uint32_t ipv4:1;
  65                 uint32_t ipv6:1;
  66                 uint32_t tcp:1;
  67                 uint32_t udp:1;
  68                 uint32_t reserved:27;
  69         };
  70         uint32_t attr;
  71 };
  72
  73 static int
  74 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
  75                              struct mlx5_flow_tbl_resource *tbl);
  76
  77 static int
  78 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
  79                                       uint32_t encap_decap_idx);
  80
  81 static int
  82 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
  83                                         uint32_t port_id);
  84
  85 /**
  86  * Initialize flow attributes structure according to flow items' types.
  87  *
  88  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
  89  * mode. For tunnel mode, the items to be modified are the outermost ones.
  90  *
  91  * @param[in] item
  92  *   Pointer to item specification.
  93  * @param[out] attr
  94  *   Pointer to flow attributes structure.
  95  * @param[in] dev_flow
  96  *   Pointer to the sub flow.
  97  * @param[in] tunnel_decap
  98  *   Whether action is after tunnel decapsulation.
  99  */
 100 static void
 101 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
 102                   struct mlx5_flow *dev_flow, bool tunnel_decap)
 103 {
 104         uint64_t layers = dev_flow->handle->layers;
 105
 106         /*
 107          * If layers is already initialized, it means this dev_flow is the
 108          * suffix flow, the layers flags is set by the prefix flow. Need to
 109          * use the layer flags from prefix flow as the suffix flow may not
 110          * have the user defined items as the flow is split.
 111          */
 112         if (layers) {
 113                 if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
 114                         attr->ipv4 = 1;
 115                 else if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
 116                         attr->ipv6 = 1;
 117                 if (layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
 118                         attr->tcp = 1;
 119                 else if (layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
 120                         attr->udp = 1;
 121                 attr->valid = 1;
 122                 return;
 123         }
 124         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 125                 uint8_t next_protocol = 0xff;
 126                 switch (item->type) {
 127                 case RTE_FLOW_ITEM_TYPE_GRE:
 128                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 129                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 130                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 131                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 132                 case RTE_FLOW_ITEM_TYPE_MPLS:
 133                         if (tunnel_decap)
 134                                 attr->attr = 0;
 135                         break;
 136                 case RTE_FLOW_ITEM_TYPE_IPV4:
 137                         if (!attr->ipv6)
 138                                 attr->ipv4 = 1;
 139                         if (item->mask != NULL &&
 140                             ((const struct rte_flow_item_ipv4 *)
 141                             item->mask)->hdr.next_proto_id)
 142                                 next_protocol =
 143                                     ((const struct rte_flow_item_ipv4 *)
 144                                       (item->spec))->hdr.next_proto_id &
 145                                     ((const struct rte_flow_item_ipv4 *)
 146                                       (item->mask))->hdr.next_proto_id;
 147                         if ((next_protocol == IPPROTO_IPIP ||
 148                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 149                                 attr->attr = 0;
 150                         break;
 151                 case RTE_FLOW_ITEM_TYPE_IPV6:
 152                         if (!attr->ipv4)
 153                                 attr->ipv6 = 1;
 154                         if (item->mask != NULL &&
 155                             ((const struct rte_flow_item_ipv6 *)
 156                             item->mask)->hdr.proto)
 157                                 next_protocol =
 158                                     ((const struct rte_flow_item_ipv6 *)
 159                                       (item->spec))->hdr.proto &
 160                                     ((const struct rte_flow_item_ipv6 *)
 161                                       (item->mask))->hdr.proto;
 162                         if ((next_protocol == IPPROTO_IPIP ||
 163                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 164                                 attr->attr = 0;
 165                         break;
 166                 case RTE_FLOW_ITEM_TYPE_UDP:
 167                         if (!attr->tcp)
 168                                 attr->udp = 1;
 169                         break;
 170                 case RTE_FLOW_ITEM_TYPE_TCP:
 171                         if (!attr->udp)
 172                                 attr->tcp = 1;
 173                         break;
 174                 default:
 175                         break;
 176                 }
 177         }
 178         attr->valid = 1;
 179 }
 180
 181 /**
 182  * Convert rte_mtr_color to mlx5 color.
 183  *
 184  * @param[in] rcol
 185  *   rte_mtr_color.
 186  *
 187  * @return
 188  *   mlx5 color.
 189  */
 190 static int
 191 rte_col_2_mlx5_col(enum rte_color rcol)
 192 {
 193         switch (rcol) {
 194         case RTE_COLOR_GREEN:
 195                 return MLX5_FLOW_COLOR_GREEN;
 196         case RTE_COLOR_YELLOW:
 197                 return MLX5_FLOW_COLOR_YELLOW;
 198         case RTE_COLOR_RED:
 199                 return MLX5_FLOW_COLOR_RED;
 200         default:
 201                 break;
 202         }
 203         return MLX5_FLOW_COLOR_UNDEFINED;
 204 }
 205
 206 struct field_modify_info {
 207         uint32_t size; /* Size of field in protocol header, in bytes. */
 208         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 209         enum mlx5_modification_field id;
 210 };
 211
 212 struct field_modify_info modify_eth[] = {
 213         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 214         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 215         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 216         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 217         {0, 0, 0},
 218 };
 219
 220 struct field_modify_info modify_vlan_out_first_vid[] = {
 221         /* Size in bits !!! */
 222         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 223         {0, 0, 0},
 224 };
 225
 226 struct field_modify_info modify_ipv4[] = {
 227         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 228         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 229         {4, 12, MLX5_MODI_OUT_SIPV4},
 230         {4, 16, MLX5_MODI_OUT_DIPV4},
 231         {0, 0, 0},
 232 };
 233
 234 struct field_modify_info modify_ipv6[] = {
 235         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 236         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 237         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 238         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 239         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 240         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 241         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 242         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 243         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 244         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 245         {0, 0, 0},
 246 };
 247
 248 struct field_modify_info modify_udp[] = {
 249         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 250         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 251         {0, 0, 0},
 252 };
 253
 254 struct field_modify_info modify_tcp[] = {
 255         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 256         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 257         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 258         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 259         {0, 0, 0},
 260 };
 261
 262 static void
 263 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 264                           uint8_t next_protocol, uint64_t *item_flags,
 265                           int *tunnel)
 266 {
 267         MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 268                     item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 269         if (next_protocol == IPPROTO_IPIP) {
 270                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 271                 *tunnel = 1;
 272         }
 273         if (next_protocol == IPPROTO_IPV6) {
 274                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 275                 *tunnel = 1;
 276         }
 277 }
 278
 279 /* Update VLAN's VID/PCP based on input rte_flow_action.
 280  *
 281  * @param[in] action
 282  *   Pointer to struct rte_flow_action.
 283  * @param[out] vlan
 284  *   Pointer to struct rte_vlan_hdr.
 285  */
 286 static void
 287 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 288                          struct rte_vlan_hdr *vlan)
 289 {
 290         uint16_t vlan_tci;
 291         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 292                 vlan_tci =
 293                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 294                                                action->conf)->vlan_pcp;
 295                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 296                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 297                 vlan->vlan_tci |= vlan_tci;
 298         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 299                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 300                 vlan->vlan_tci |= rte_be_to_cpu_16
 301                     (((const struct rte_flow_action_of_set_vlan_vid *)
 302                                              action->conf)->vlan_vid);
 303         }
 304 }
 305
 306 /**
 307  * Fetch 1, 2, 3 or 4 byte field from the byte array
 308  * and return as unsigned integer in host-endian format.
 309  *
 310  * @param[in] data
 311  *   Pointer to data array.
 312  * @param[in] size
 313  *   Size of field to extract.
 314  *
 315  * @return
 316  *   converted field in host endian format.
 317  */
 318 static inline uint32_t
 319 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 320 {
 321         uint32_t ret;
 322
 323         switch (size) {
 324         case 1:
 325                 ret = *data;
 326                 break;
 327         case 2:
 328                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 329                 break;
 330         case 3:
 331                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 332                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 333                 break;
 334         case 4:
 335                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 336                 break;
 337         default:
 338                 MLX5_ASSERT(false);
 339                 ret = 0;
 340                 break;
 341         }
 342         return ret;
 343 }
 344
 345 /**
 346  * Convert modify-header action to DV specification.
 347  *
 348  * Data length of each action is determined by provided field description
 349  * and the item mask. Data bit offset and width of each action is determined
 350  * by provided item mask.
 351  *
 352  * @param[in] item
 353  *   Pointer to item specification.
 354  * @param[in] field
 355  *   Pointer to field modification information.
 356  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 357  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 358  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 359  * @param[in] dcopy
 360  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 361  *   Negative offset value sets the same offset as source offset.
 362  *   size field is ignored, value is taken from source field.
 363  * @param[in,out] resource
 364  *   Pointer to the modify-header resource.
 365  * @param[in] type
 366  *   Type of modification.
 367  * @param[out] error
 368  *   Pointer to the error structure.
 369  *
 370  * @return
 371  *   0 on success, a negative errno value otherwise and rte_errno is set.
 372  */
 373 static int
 374 flow_dv_convert_modify_action(struct rte_flow_item *item,
 375                               struct field_modify_info *field,
 376                               struct field_modify_info *dcopy,
 377                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 378                               uint32_t type, struct rte_flow_error *error)
 379 {
 380         uint32_t i = resource->actions_num;
 381         struct mlx5_modification_cmd *actions = resource->actions;
 382
 383         /*
 384          * The item and mask are provided in big-endian format.
 385          * The fields should be presented as in big-endian format either.
 386          * Mask must be always present, it defines the actual field width.
 387          */
 388         MLX5_ASSERT(item->mask);
 389         MLX5_ASSERT(field->size);
 390         do {
 391                 unsigned int size_b;
 392                 unsigned int off_b;
 393                 uint32_t mask;
 394                 uint32_t data;
 395
 396                 if (i >= MLX5_MAX_MODIFY_NUM)
 397                         return rte_flow_error_set(error, EINVAL,
 398                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 399                                  "too many items to modify");
 400                 /* Fetch variable byte size mask from the array. */
 401                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 402                                            field->offset, field->size);
 403                 if (!mask) {
 404                         ++field;
 405                         continue;
 406                 }
 407                 /* Deduce actual data width in bits from mask value. */
 408                 off_b = rte_bsf32(mask);
 409                 size_b = sizeof(uint32_t) * CHAR_BIT -
 410                          off_b - __builtin_clz(mask);
 411                 MLX5_ASSERT(size_b);
 412                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 413                 actions[i] = (struct mlx5_modification_cmd) {
 414                         .action_type = type,
 415                         .field = field->id,
 416                         .offset = off_b,
 417                         .length = size_b,
 418                 };
 419                 /* Convert entire record to expected big-endian format. */
 420                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 421                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 422                         MLX5_ASSERT(dcopy);
 423                         actions[i].dst_field = dcopy->id;
 424                         actions[i].dst_offset =
 425                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 426                         /* Convert entire record to big-endian format. */
 427                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 428                 } else {
 429                         MLX5_ASSERT(item->spec);
 430                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 431                                                    field->offset, field->size);
 432                         /* Shift out the trailing masked bits from data. */
 433                         data = (data & mask) >> off_b;
 434                         actions[i].data1 = rte_cpu_to_be_32(data);
 435                 }
 436                 ++i;
 437                 ++field;
 438         } while (field->size);
 439         if (resource->actions_num == i)
 440                 return rte_flow_error_set(error, EINVAL,
 441                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 442                                           "invalid modification flow item");
 443         resource->actions_num = i;
 444         return 0;
 445 }
 446
 447 /**
 448  * Convert modify-header set IPv4 address action to DV specification.
 449  *
 450  * @param[in,out] resource
 451  *   Pointer to the modify-header resource.
 452  * @param[in] action
 453  *   Pointer to action specification.
 454  * @param[out] error
 455  *   Pointer to the error structure.
 456  *
 457  * @return
 458  *   0 on success, a negative errno value otherwise and rte_errno is set.
 459  */
 460 static int
 461 flow_dv_convert_action_modify_ipv4
 462                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 463                          const struct rte_flow_action *action,
 464                          struct rte_flow_error *error)
 465 {
 466         const struct rte_flow_action_set_ipv4 *conf =
 467                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 468         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 469         struct rte_flow_item_ipv4 ipv4;
 470         struct rte_flow_item_ipv4 ipv4_mask;
 471
 472         memset(&ipv4, 0, sizeof(ipv4));
 473         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 474         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 475                 ipv4.hdr.src_addr = conf->ipv4_addr;
 476                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 477         } else {
 478                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 479                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 480         }
 481         item.spec = &ipv4;
 482         item.mask = &ipv4_mask;
 483         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 484                                              MLX5_MODIFICATION_TYPE_SET, error);
 485 }
 486
 487 /**
 488  * Convert modify-header set IPv6 address action to DV specification.
 489  *
 490  * @param[in,out] resource
 491  *   Pointer to the modify-header resource.
 492  * @param[in] action
 493  *   Pointer to action specification.
 494  * @param[out] error
 495  *   Pointer to the error structure.
 496  *
 497  * @return
 498  *   0 on success, a negative errno value otherwise and rte_errno is set.
 499  */
 500 static int
 501 flow_dv_convert_action_modify_ipv6
 502                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 503                          const struct rte_flow_action *action,
 504                          struct rte_flow_error *error)
 505 {
 506         const struct rte_flow_action_set_ipv6 *conf =
 507                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 508         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 509         struct rte_flow_item_ipv6 ipv6;
 510         struct rte_flow_item_ipv6 ipv6_mask;
 511
 512         memset(&ipv6, 0, sizeof(ipv6));
 513         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 514         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 515                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 516                        sizeof(ipv6.hdr.src_addr));
 517                 memcpy(&ipv6_mask.hdr.src_addr,
 518                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 519                        sizeof(ipv6.hdr.src_addr));
 520         } else {
 521                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 522                        sizeof(ipv6.hdr.dst_addr));
 523                 memcpy(&ipv6_mask.hdr.dst_addr,
 524                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 525                        sizeof(ipv6.hdr.dst_addr));
 526         }
 527         item.spec = &ipv6;
 528         item.mask = &ipv6_mask;
 529         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 530                                              MLX5_MODIFICATION_TYPE_SET, error);
 531 }
 532
 533 /**
 534  * Convert modify-header set MAC address action to DV specification.
 535  *
 536  * @param[in,out] resource
 537  *   Pointer to the modify-header resource.
 538  * @param[in] action
 539  *   Pointer to action specification.
 540  * @param[out] error
 541  *   Pointer to the error structure.
 542  *
 543  * @return
 544  *   0 on success, a negative errno value otherwise and rte_errno is set.
 545  */
 546 static int
 547 flow_dv_convert_action_modify_mac
 548                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 549                          const struct rte_flow_action *action,
 550                          struct rte_flow_error *error)
 551 {
 552         const struct rte_flow_action_set_mac *conf =
 553                 (const struct rte_flow_action_set_mac *)(action->conf);
 554         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 555         struct rte_flow_item_eth eth;
 556         struct rte_flow_item_eth eth_mask;
 557
 558         memset(&eth, 0, sizeof(eth));
 559         memset(&eth_mask, 0, sizeof(eth_mask));
 560         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 561                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 562                        sizeof(eth.src.addr_bytes));
 563                 memcpy(&eth_mask.src.addr_bytes,
 564                        &rte_flow_item_eth_mask.src.addr_bytes,
 565                        sizeof(eth_mask.src.addr_bytes));
 566         } else {
 567                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 568                        sizeof(eth.dst.addr_bytes));
 569                 memcpy(&eth_mask.dst.addr_bytes,
 570                        &rte_flow_item_eth_mask.dst.addr_bytes,
 571                        sizeof(eth_mask.dst.addr_bytes));
 572         }
 573         item.spec = &eth;
 574         item.mask = &eth_mask;
 575         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 576                                              MLX5_MODIFICATION_TYPE_SET, error);
 577 }
 578
 579 /**
 580  * Convert modify-header set VLAN VID action to DV specification.
 581  *
 582  * @param[in,out] resource
 583  *   Pointer to the modify-header resource.
 584  * @param[in] action
 585  *   Pointer to action specification.
 586  * @param[out] error
 587  *   Pointer to the error structure.
 588  *
 589  * @return
 590  *   0 on success, a negative errno value otherwise and rte_errno is set.
 591  */
 592 static int
 593 flow_dv_convert_action_modify_vlan_vid
 594                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 595                          const struct rte_flow_action *action,
 596                          struct rte_flow_error *error)
 597 {
 598         const struct rte_flow_action_of_set_vlan_vid *conf =
 599                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 600         int i = resource->actions_num;
 601         struct mlx5_modification_cmd *actions = resource->actions;
 602         struct field_modify_info *field = modify_vlan_out_first_vid;
 603
 604         if (i >= MLX5_MAX_MODIFY_NUM)
 605                 return rte_flow_error_set(error, EINVAL,
 606                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 607                          "too many items to modify");
 608         actions[i] = (struct mlx5_modification_cmd) {
 609                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 610                 .field = field->id,
 611                 .length = field->size,
 612                 .offset = field->offset,
 613         };
 614         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 615         actions[i].data1 = conf->vlan_vid;
 616         actions[i].data1 = actions[i].data1 << 16;
 617         resource->actions_num = ++i;
 618         return 0;
 619 }
 620
 621 /**
 622  * Convert modify-header set TP action to DV specification.
 623  *
 624  * @param[in,out] resource
 625  *   Pointer to the modify-header resource.
 626  * @param[in] action
 627  *   Pointer to action specification.
 628  * @param[in] items
 629  *   Pointer to rte_flow_item objects list.
 630  * @param[in] attr
 631  *   Pointer to flow attributes structure.
 632  * @param[in] dev_flow
 633  *   Pointer to the sub flow.
 634  * @param[in] tunnel_decap
 635  *   Whether action is after tunnel decapsulation.
 636  * @param[out] error
 637  *   Pointer to the error structure.
 638  *
 639  * @return
 640  *   0 on success, a negative errno value otherwise and rte_errno is set.
 641  */
 642 static int
 643 flow_dv_convert_action_modify_tp
 644                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 645                          const struct rte_flow_action *action,
 646                          const struct rte_flow_item *items,
 647                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 648                          bool tunnel_decap, struct rte_flow_error *error)
 649 {
 650         const struct rte_flow_action_set_tp *conf =
 651                 (const struct rte_flow_action_set_tp *)(action->conf);
 652         struct rte_flow_item item;
 653         struct rte_flow_item_udp udp;
 654         struct rte_flow_item_udp udp_mask;
 655         struct rte_flow_item_tcp tcp;
 656         struct rte_flow_item_tcp tcp_mask;
 657         struct field_modify_info *field;
 658
 659         if (!attr->valid)
 660                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 661         if (attr->udp) {
 662                 memset(&udp, 0, sizeof(udp));
 663                 memset(&udp_mask, 0, sizeof(udp_mask));
 664                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 665                         udp.hdr.src_port = conf->port;
 666                         udp_mask.hdr.src_port =
 667                                         rte_flow_item_udp_mask.hdr.src_port;
 668                 } else {
 669                         udp.hdr.dst_port = conf->port;
 670                         udp_mask.hdr.dst_port =
 671                                         rte_flow_item_udp_mask.hdr.dst_port;
 672                 }
 673                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 674                 item.spec = &udp;
 675                 item.mask = &udp_mask;
 676                 field = modify_udp;
 677         } else {
 678                 MLX5_ASSERT(attr->tcp);
 679                 memset(&tcp, 0, sizeof(tcp));
 680                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 681                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 682                         tcp.hdr.src_port = conf->port;
 683                         tcp_mask.hdr.src_port =
 684                                         rte_flow_item_tcp_mask.hdr.src_port;
 685                 } else {
 686                         tcp.hdr.dst_port = conf->port;
 687                         tcp_mask.hdr.dst_port =
 688                                         rte_flow_item_tcp_mask.hdr.dst_port;
 689                 }
 690                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 691                 item.spec = &tcp;
 692                 item.mask = &tcp_mask;
 693                 field = modify_tcp;
 694         }
 695         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 696                                              MLX5_MODIFICATION_TYPE_SET, error);
 697 }
 698
 699 /**
 700  * Convert modify-header set TTL action to DV specification.
 701  *
 702  * @param[in,out] resource
 703  *   Pointer to the modify-header resource.
 704  * @param[in] action
 705  *   Pointer to action specification.
 706  * @param[in] items
 707  *   Pointer to rte_flow_item objects list.
 708  * @param[in] attr
 709  *   Pointer to flow attributes structure.
 710  * @param[in] dev_flow
 711  *   Pointer to the sub flow.
 712  * @param[in] tunnel_decap
 713  *   Whether action is after tunnel decapsulation.
 714  * @param[out] error
 715  *   Pointer to the error structure.
 716  *
 717  * @return
 718  *   0 on success, a negative errno value otherwise and rte_errno is set.
 719  */
 720 static int
 721 flow_dv_convert_action_modify_ttl
 722                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 723                          const struct rte_flow_action *action,
 724                          const struct rte_flow_item *items,
 725                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 726                          bool tunnel_decap, struct rte_flow_error *error)
 727 {
 728         const struct rte_flow_action_set_ttl *conf =
 729                 (const struct rte_flow_action_set_ttl *)(action->conf);
 730         struct rte_flow_item item;
 731         struct rte_flow_item_ipv4 ipv4;
 732         struct rte_flow_item_ipv4 ipv4_mask;
 733         struct rte_flow_item_ipv6 ipv6;
 734         struct rte_flow_item_ipv6 ipv6_mask;
 735         struct field_modify_info *field;
 736
 737         if (!attr->valid)
 738                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 739         if (attr->ipv4) {
 740                 memset(&ipv4, 0, sizeof(ipv4));
 741                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 742                 ipv4.hdr.time_to_live = conf->ttl_value;
 743                 ipv4_mask.hdr.time_to_live = 0xFF;
 744                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 745                 item.spec = &ipv4;
 746                 item.mask = &ipv4_mask;
 747                 field = modify_ipv4;
 748         } else {
 749                 MLX5_ASSERT(attr->ipv6);
 750                 memset(&ipv6, 0, sizeof(ipv6));
 751                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 752                 ipv6.hdr.hop_limits = conf->ttl_value;
 753                 ipv6_mask.hdr.hop_limits = 0xFF;
 754                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 755                 item.spec = &ipv6;
 756                 item.mask = &ipv6_mask;
 757                 field = modify_ipv6;
 758         }
 759         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 760                                              MLX5_MODIFICATION_TYPE_SET, error);
 761 }
 762
 763 /**
 764  * Convert modify-header decrement TTL action to DV specification.
 765  *
 766  * @param[in,out] resource
 767  *   Pointer to the modify-header resource.
 768  * @param[in] action
 769  *   Pointer to action specification.
 770  * @param[in] items
 771  *   Pointer to rte_flow_item objects list.
 772  * @param[in] attr
 773  *   Pointer to flow attributes structure.
 774  * @param[in] dev_flow
 775  *   Pointer to the sub flow.
 776  * @param[in] tunnel_decap
 777  *   Whether action is after tunnel decapsulation.
 778  * @param[out] error
 779  *   Pointer to the error structure.
 780  *
 781  * @return
 782  *   0 on success, a negative errno value otherwise and rte_errno is set.
 783  */
 784 static int
 785 flow_dv_convert_action_modify_dec_ttl
 786                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 787                          const struct rte_flow_item *items,
 788                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 789                          bool tunnel_decap, struct rte_flow_error *error)
 790 {
 791         struct rte_flow_item item;
 792         struct rte_flow_item_ipv4 ipv4;
 793         struct rte_flow_item_ipv4 ipv4_mask;
 794         struct rte_flow_item_ipv6 ipv6;
 795         struct rte_flow_item_ipv6 ipv6_mask;
 796         struct field_modify_info *field;
 797
 798         if (!attr->valid)
 799                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 800         if (attr->ipv4) {
 801                 memset(&ipv4, 0, sizeof(ipv4));
 802                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 803                 ipv4.hdr.time_to_live = 0xFF;
 804                 ipv4_mask.hdr.time_to_live = 0xFF;
 805                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 806                 item.spec = &ipv4;
 807                 item.mask = &ipv4_mask;
 808                 field = modify_ipv4;
 809         } else {
 810                 MLX5_ASSERT(attr->ipv6);
 811                 memset(&ipv6, 0, sizeof(ipv6));
 812                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 813                 ipv6.hdr.hop_limits = 0xFF;
 814                 ipv6_mask.hdr.hop_limits = 0xFF;
 815                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 816                 item.spec = &ipv6;
 817                 item.mask = &ipv6_mask;
 818                 field = modify_ipv6;
 819         }
 820         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 821                                              MLX5_MODIFICATION_TYPE_ADD, error);
 822 }
 823
 824 /**
 825  * Convert modify-header increment/decrement TCP Sequence number
 826  * to DV specification.
 827  *
 828  * @param[in,out] resource
 829  *   Pointer to the modify-header resource.
 830  * @param[in] action
 831  *   Pointer to action specification.
 832  * @param[out] error
 833  *   Pointer to the error structure.
 834  *
 835  * @return
 836  *   0 on success, a negative errno value otherwise and rte_errno is set.
 837  */
 838 static int
 839 flow_dv_convert_action_modify_tcp_seq
 840                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 841                          const struct rte_flow_action *action,
 842                          struct rte_flow_error *error)
 843 {
 844         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 845         uint64_t value = rte_be_to_cpu_32(*conf);
 846         struct rte_flow_item item;
 847         struct rte_flow_item_tcp tcp;
 848         struct rte_flow_item_tcp tcp_mask;
 849
 850         memset(&tcp, 0, sizeof(tcp));
 851         memset(&tcp_mask, 0, sizeof(tcp_mask));
 852         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 853                 /*
 854                  * The HW has no decrement operation, only increment operation.
 855                  * To simulate decrement X from Y using increment operation
 856                  * we need to add UINT32_MAX X times to Y.
 857                  * Each adding of UINT32_MAX decrements Y by 1.
 858                  */
 859                 value *= UINT32_MAX;
 860         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 861         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 862         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 863         item.spec = &tcp;
 864         item.mask = &tcp_mask;
 865         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 866                                              MLX5_MODIFICATION_TYPE_ADD, error);
 867 }
 868
 869 /**
 870  * Convert modify-header increment/decrement TCP Acknowledgment number
 871  * to DV specification.
 872  *
 873  * @param[in,out] resource
 874  *   Pointer to the modify-header resource.
 875  * @param[in] action
 876  *   Pointer to action specification.
 877  * @param[out] error
 878  *   Pointer to the error structure.
 879  *
 880  * @return
 881  *   0 on success, a negative errno value otherwise and rte_errno is set.
 882  */
 883 static int
 884 flow_dv_convert_action_modify_tcp_ack
 885                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 886                          const struct rte_flow_action *action,
 887                          struct rte_flow_error *error)
 888 {
 889         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 890         uint64_t value = rte_be_to_cpu_32(*conf);
 891         struct rte_flow_item item;
 892         struct rte_flow_item_tcp tcp;
 893         struct rte_flow_item_tcp tcp_mask;
 894
 895         memset(&tcp, 0, sizeof(tcp));
 896         memset(&tcp_mask, 0, sizeof(tcp_mask));
 897         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 898                 /*
 899                  * The HW has no decrement operation, only increment operation.
 900                  * To simulate decrement X from Y using increment operation
 901                  * we need to add UINT32_MAX X times to Y.
 902                  * Each adding of UINT32_MAX decrements Y by 1.
 903                  */
 904                 value *= UINT32_MAX;
 905         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 906         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 907         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 908         item.spec = &tcp;
 909         item.mask = &tcp_mask;
 910         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 911                                              MLX5_MODIFICATION_TYPE_ADD, error);
 912 }
 913
 914 static enum mlx5_modification_field reg_to_field[] = {
 915         [REG_NON] = MLX5_MODI_OUT_NONE,
 916         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 917         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 918         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 919         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 920         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 921         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 922         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 923         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 924         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 925         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 926 };
 927
 928 /**
 929  * Convert register set to DV specification.
 930  *
 931  * @param[in,out] resource
 932  *   Pointer to the modify-header resource.
 933  * @param[in] action
 934  *   Pointer to action specification.
 935  * @param[out] error
 936  *   Pointer to the error structure.
 937  *
 938  * @return
 939  *   0 on success, a negative errno value otherwise and rte_errno is set.
 940  */
 941 static int
 942 flow_dv_convert_action_set_reg
 943                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 944                          const struct rte_flow_action *action,
 945                          struct rte_flow_error *error)
 946 {
 947         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 948         struct mlx5_modification_cmd *actions = resource->actions;
 949         uint32_t i = resource->actions_num;
 950
 951         if (i >= MLX5_MAX_MODIFY_NUM)
 952                 return rte_flow_error_set(error, EINVAL,
 953                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 954                                           "too many items to modify");
 955         MLX5_ASSERT(conf->id != REG_NON);
 956         MLX5_ASSERT(conf->id < RTE_DIM(reg_to_field));
 957         actions[i] = (struct mlx5_modification_cmd) {
 958                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 959                 .field = reg_to_field[conf->id],
 960         };
 961         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 962         actions[i].data1 = rte_cpu_to_be_32(conf->data);
 963         ++i;
 964         resource->actions_num = i;
 965         return 0;
 966 }
 967
 968 /**
 969  * Convert SET_TAG action to DV specification.
 970  *
 971  * @param[in] dev
 972  *   Pointer to the rte_eth_dev structure.
 973  * @param[in,out] resource
 974  *   Pointer to the modify-header resource.
 975  * @param[in] conf
 976  *   Pointer to action specification.
 977  * @param[out] error
 978  *   Pointer to the error structure.
 979  *
 980  * @return
 981  *   0 on success, a negative errno value otherwise and rte_errno is set.
 982  */
 983 static int
 984 flow_dv_convert_action_set_tag
 985                         (struct rte_eth_dev *dev,
 986                          struct mlx5_flow_dv_modify_hdr_resource *resource,
 987                          const struct rte_flow_action_set_tag *conf,
 988                          struct rte_flow_error *error)
 989 {
 990         rte_be32_t data = rte_cpu_to_be_32(conf->data);
 991         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
 992         struct rte_flow_item item = {
 993                 .spec = &data,
 994                 .mask = &mask,
 995         };
 996         struct field_modify_info reg_c_x[] = {
 997                 [1] = {0, 0, 0},
 998         };
 999         enum mlx5_modification_field reg_type;
1000         int ret;
1001
1002         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1003         if (ret < 0)
1004                 return ret;
1005         MLX5_ASSERT(ret != REG_NON);
1006         MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1007         reg_type = reg_to_field[ret];
1008         MLX5_ASSERT(reg_type > 0);
1009         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1010         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1011                                              MLX5_MODIFICATION_TYPE_SET, error);
1012 }
1013
1014 /**
1015  * Convert internal COPY_REG action to DV specification.
1016  *
1017  * @param[in] dev
1018  *   Pointer to the rte_eth_dev structure.
1019  * @param[in,out] res
1020  *   Pointer to the modify-header resource.
1021  * @param[in] action
1022  *   Pointer to action specification.
1023  * @param[out] error
1024  *   Pointer to the error structure.
1025  *
1026  * @return
1027  *   0 on success, a negative errno value otherwise and rte_errno is set.
1028  */
1029 static int
1030 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1031                                  struct mlx5_flow_dv_modify_hdr_resource *res,
1032                                  const struct rte_flow_action *action,
1033                                  struct rte_flow_error *error)
1034 {
1035         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1036         rte_be32_t mask = RTE_BE32(UINT32_MAX);
1037         struct rte_flow_item item = {
1038                 .spec = NULL,
1039                 .mask = &mask,
1040         };
1041         struct field_modify_info reg_src[] = {
1042                 {4, 0, reg_to_field[conf->src]},
1043                 {0, 0, 0},
1044         };
1045         struct field_modify_info reg_dst = {
1046                 .offset = 0,
1047                 .id = reg_to_field[conf->dst],
1048         };
1049         /* Adjust reg_c[0] usage according to reported mask. */
1050         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1051                 struct mlx5_priv *priv = dev->data->dev_private;
1052                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1053
1054                 MLX5_ASSERT(reg_c0);
1055                 MLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1056                 if (conf->dst == REG_C_0) {
1057                         /* Copy to reg_c[0], within mask only. */
1058                         reg_dst.offset = rte_bsf32(reg_c0);
1059                         /*
1060                          * Mask is ignoring the enianness, because
1061                          * there is no conversion in datapath.
1062                          */
1063 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1064                         /* Copy from destination lower bits to reg_c[0]. */
1065                         mask = reg_c0 >> reg_dst.offset;
1066 #else
1067                         /* Copy from destination upper bits to reg_c[0]. */
1068                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1069                                           rte_fls_u32(reg_c0));
1070 #endif
1071                 } else {
1072                         mask = rte_cpu_to_be_32(reg_c0);
1073 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1074                         /* Copy from reg_c[0] to destination lower bits. */
1075                         reg_dst.offset = 0;
1076 #else
1077                         /* Copy from reg_c[0] to destination upper bits. */
1078                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1079                                          (rte_fls_u32(reg_c0) -
1080                                           rte_bsf32(reg_c0));
1081 #endif
1082                 }
1083         }
1084         return flow_dv_convert_modify_action(&item,
1085                                              reg_src, &reg_dst, res,
1086                                              MLX5_MODIFICATION_TYPE_COPY,
1087                                              error);
1088 }
1089
1090 /**
1091  * Convert MARK action to DV specification. This routine is used
1092  * in extensive metadata only and requires metadata register to be
1093  * handled. In legacy mode hardware tag resource is engaged.
1094  *
1095  * @param[in] dev
1096  *   Pointer to the rte_eth_dev structure.
1097  * @param[in] conf
1098  *   Pointer to MARK action specification.
1099  * @param[in,out] resource
1100  *   Pointer to the modify-header resource.
1101  * @param[out] error
1102  *   Pointer to the error structure.
1103  *
1104  * @return
1105  *   0 on success, a negative errno value otherwise and rte_errno is set.
1106  */
1107 static int
1108 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1109                             const struct rte_flow_action_mark *conf,
1110                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1111                             struct rte_flow_error *error)
1112 {
1113         struct mlx5_priv *priv = dev->data->dev_private;
1114         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1115                                            priv->sh->dv_mark_mask);
1116         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1117         struct rte_flow_item item = {
1118                 .spec = &data,
1119                 .mask = &mask,
1120         };
1121         struct field_modify_info reg_c_x[] = {
1122                 [1] = {0, 0, 0},
1123         };
1124         int reg;
1125
1126         if (!mask)
1127                 return rte_flow_error_set(error, EINVAL,
1128                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1129                                           NULL, "zero mark action mask");
1130         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1131         if (reg < 0)
1132                 return reg;
1133         MLX5_ASSERT(reg > 0);
1134         if (reg == REG_C_0) {
1135                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1136                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1137
1138                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1139                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1140                 mask = rte_cpu_to_be_32(mask << shl_c0);
1141         }
1142         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1143         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1144                                              MLX5_MODIFICATION_TYPE_SET, error);
1145 }
1146
1147 /**
1148  * Get metadata register index for specified steering domain.
1149  *
1150  * @param[in] dev
1151  *   Pointer to the rte_eth_dev structure.
1152  * @param[in] attr
1153  *   Attributes of flow to determine steering domain.
1154  * @param[out] error
1155  *   Pointer to the error structure.
1156  *
1157  * @return
1158  *   positive index on success, a negative errno value otherwise
1159  *   and rte_errno is set.
1160  */
1161 static enum modify_reg
1162 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1163                          const struct rte_flow_attr *attr,
1164                          struct rte_flow_error *error)
1165 {
1166         int reg =
1167                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1168                                           MLX5_METADATA_FDB :
1169                                             attr->egress ?
1170                                             MLX5_METADATA_TX :
1171                                             MLX5_METADATA_RX, 0, error);
1172         if (reg < 0)
1173                 return rte_flow_error_set(error,
1174                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1175                                           NULL, "unavailable "
1176                                           "metadata register");
1177         return reg;
1178 }
1179
1180 /**
1181  * Convert SET_META action to DV specification.
1182  *
1183  * @param[in] dev
1184  *   Pointer to the rte_eth_dev structure.
1185  * @param[in,out] resource
1186  *   Pointer to the modify-header resource.
1187  * @param[in] attr
1188  *   Attributes of flow that includes this item.
1189  * @param[in] conf
1190  *   Pointer to action specification.
1191  * @param[out] error
1192  *   Pointer to the error structure.
1193  *
1194  * @return
1195  *   0 on success, a negative errno value otherwise and rte_errno is set.
1196  */
1197 static int
1198 flow_dv_convert_action_set_meta
1199                         (struct rte_eth_dev *dev,
1200                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1201                          const struct rte_flow_attr *attr,
1202                          const struct rte_flow_action_set_meta *conf,
1203                          struct rte_flow_error *error)
1204 {
1205         uint32_t data = conf->data;
1206         uint32_t mask = conf->mask;
1207         struct rte_flow_item item = {
1208                 .spec = &data,
1209                 .mask = &mask,
1210         };
1211         struct field_modify_info reg_c_x[] = {
1212                 [1] = {0, 0, 0},
1213         };
1214         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1215
1216         if (reg < 0)
1217                 return reg;
1218         /*
1219          * In datapath code there is no endianness
1220          * coversions for perfromance reasons, all
1221          * pattern conversions are done in rte_flow.
1222          */
1223         if (reg == REG_C_0) {
1224                 struct mlx5_priv *priv = dev->data->dev_private;
1225                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1226                 uint32_t shl_c0;
1227
1228                 MLX5_ASSERT(msk_c0);
1229 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1230                 shl_c0 = rte_bsf32(msk_c0);
1231 #else
1232                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1233 #endif
1234                 mask <<= shl_c0;
1235                 data <<= shl_c0;
1236                 MLX5_ASSERT(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1237         }
1238         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1239         /* The routine expects parameters in memory as big-endian ones. */
1240         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1241                                              MLX5_MODIFICATION_TYPE_SET, error);
1242 }
1243
1244 /**
1245  * Convert modify-header set IPv4 DSCP action to DV specification.
1246  *
1247  * @param[in,out] resource
1248  *   Pointer to the modify-header resource.
1249  * @param[in] action
1250  *   Pointer to action specification.
1251  * @param[out] error
1252  *   Pointer to the error structure.
1253  *
1254  * @return
1255  *   0 on success, a negative errno value otherwise and rte_errno is set.
1256  */
1257 static int
1258 flow_dv_convert_action_modify_ipv4_dscp
1259                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1260                          const struct rte_flow_action *action,
1261                          struct rte_flow_error *error)
1262 {
1263         const struct rte_flow_action_set_dscp *conf =
1264                 (const struct rte_flow_action_set_dscp *)(action->conf);
1265         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1266         struct rte_flow_item_ipv4 ipv4;
1267         struct rte_flow_item_ipv4 ipv4_mask;
1268
1269         memset(&ipv4, 0, sizeof(ipv4));
1270         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1271         ipv4.hdr.type_of_service = conf->dscp;
1272         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1273         item.spec = &ipv4;
1274         item.mask = &ipv4_mask;
1275         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1276                                              MLX5_MODIFICATION_TYPE_SET, error);
1277 }
1278
1279 /**
1280  * Convert modify-header set IPv6 DSCP action to DV specification.
1281  *
1282  * @param[in,out] resource
1283  *   Pointer to the modify-header resource.
1284  * @param[in] action
1285  *   Pointer to action specification.
1286  * @param[out] error
1287  *   Pointer to the error structure.
1288  *
1289  * @return
1290  *   0 on success, a negative errno value otherwise and rte_errno is set.
1291  */
1292 static int
1293 flow_dv_convert_action_modify_ipv6_dscp
1294                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1295                          const struct rte_flow_action *action,
1296                          struct rte_flow_error *error)
1297 {
1298         const struct rte_flow_action_set_dscp *conf =
1299                 (const struct rte_flow_action_set_dscp *)(action->conf);
1300         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1301         struct rte_flow_item_ipv6 ipv6;
1302         struct rte_flow_item_ipv6 ipv6_mask;
1303
1304         memset(&ipv6, 0, sizeof(ipv6));
1305         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1306         /*
1307          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1308          * rdma-core only accept the DSCP bits byte aligned start from
1309          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1310          * bits in IPv6 case as rdma-core requires byte aligned value.
1311          */
1312         ipv6.hdr.vtc_flow = conf->dscp;
1313         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1314         item.spec = &ipv6;
1315         item.mask = &ipv6_mask;
1316         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1317                                              MLX5_MODIFICATION_TYPE_SET, error);
1318 }
1319
1320 /**
1321  * Validate MARK item.
1322  *
1323  * @param[in] dev
1324  *   Pointer to the rte_eth_dev structure.
1325  * @param[in] item
1326  *   Item specification.
1327  * @param[in] attr
1328  *   Attributes of flow that includes this item.
1329  * @param[out] error
1330  *   Pointer to error structure.
1331  *
1332  * @return
1333  *   0 on success, a negative errno value otherwise and rte_errno is set.
1334  */
1335 static int
1336 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1337                            const struct rte_flow_item *item,
1338                            const struct rte_flow_attr *attr __rte_unused,
1339                            struct rte_flow_error *error)
1340 {
1341         struct mlx5_priv *priv = dev->data->dev_private;
1342         struct mlx5_dev_config *config = &priv->config;
1343         const struct rte_flow_item_mark *spec = item->spec;
1344         const struct rte_flow_item_mark *mask = item->mask;
1345         const struct rte_flow_item_mark nic_mask = {
1346                 .id = priv->sh->dv_mark_mask,
1347         };
1348         int ret;
1349
1350         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1351                 return rte_flow_error_set(error, ENOTSUP,
1352                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1353                                           "extended metadata feature"
1354                                           " isn't enabled");
1355         if (!mlx5_flow_ext_mreg_supported(dev))
1356                 return rte_flow_error_set(error, ENOTSUP,
1357                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1358                                           "extended metadata register"
1359                                           " isn't supported");
1360         if (!nic_mask.id)
1361                 return rte_flow_error_set(error, ENOTSUP,
1362                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1363                                           "extended metadata register"
1364                                           " isn't available");
1365         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1366         if (ret < 0)
1367                 return ret;
1368         if (!spec)
1369                 return rte_flow_error_set(error, EINVAL,
1370                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1371                                           item->spec,
1372                                           "data cannot be empty");
1373         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1374                 return rte_flow_error_set(error, EINVAL,
1375                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1376                                           &spec->id,
1377                                           "mark id exceeds the limit");
1378         if (!mask)
1379                 mask = &nic_mask;
1380         if (!mask->id)
1381                 return rte_flow_error_set(error, EINVAL,
1382                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1383                                         "mask cannot be zero");
1384
1385         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1386                                         (const uint8_t *)&nic_mask,
1387                                         sizeof(struct rte_flow_item_mark),
1388                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1389         if (ret < 0)
1390                 return ret;
1391         return 0;
1392 }
1393
1394 /**
1395  * Validate META item.
1396  *
1397  * @param[in] dev
1398  *   Pointer to the rte_eth_dev structure.
1399  * @param[in] item
1400  *   Item specification.
1401  * @param[in] attr
1402  *   Attributes of flow that includes this item.
1403  * @param[out] error
1404  *   Pointer to error structure.
1405  *
1406  * @return
1407  *   0 on success, a negative errno value otherwise and rte_errno is set.
1408  */
1409 static int
1410 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1411                            const struct rte_flow_item *item,
1412                            const struct rte_flow_attr *attr,
1413                            struct rte_flow_error *error)
1414 {
1415         struct mlx5_priv *priv = dev->data->dev_private;
1416         struct mlx5_dev_config *config = &priv->config;
1417         const struct rte_flow_item_meta *spec = item->spec;
1418         const struct rte_flow_item_meta *mask = item->mask;
1419         struct rte_flow_item_meta nic_mask = {
1420                 .data = UINT32_MAX
1421         };
1422         int reg;
1423         int ret;
1424
1425         if (!spec)
1426                 return rte_flow_error_set(error, EINVAL,
1427                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1428                                           item->spec,
1429                                           "data cannot be empty");
1430         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1431                 if (!mlx5_flow_ext_mreg_supported(dev))
1432                         return rte_flow_error_set(error, ENOTSUP,
1433                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1434                                           "extended metadata register"
1435                                           " isn't supported");
1436                 reg = flow_dv_get_metadata_reg(dev, attr, error);
1437                 if (reg < 0)
1438                         return reg;
1439                 if (reg == REG_B)
1440                         return rte_flow_error_set(error, ENOTSUP,
1441                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1442                                           "match on reg_b "
1443                                           "isn't supported");
1444                 if (reg != REG_A)
1445                         nic_mask.data = priv->sh->dv_meta_mask;
1446         } else if (attr->transfer) {
1447                 return rte_flow_error_set(error, ENOTSUP,
1448                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
1449                                         "extended metadata feature "
1450                                         "should be enabled when "
1451                                         "meta item is requested "
1452                                         "with e-switch mode ");
1453         }
1454         if (!mask)
1455                 mask = &rte_flow_item_meta_mask;
1456         if (!mask->data)
1457                 return rte_flow_error_set(error, EINVAL,
1458                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1459                                         "mask cannot be zero");
1460
1461         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1462                                         (const uint8_t *)&nic_mask,
1463                                         sizeof(struct rte_flow_item_meta),
1464                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1465         return ret;
1466 }
1467
1468 /**
1469  * Validate TAG item.
1470  *
1471  * @param[in] dev
1472  *   Pointer to the rte_eth_dev structure.
1473  * @param[in] item
1474  *   Item specification.
1475  * @param[in] attr
1476  *   Attributes of flow that includes this item.
1477  * @param[out] error
1478  *   Pointer to error structure.
1479  *
1480  * @return
1481  *   0 on success, a negative errno value otherwise and rte_errno is set.
1482  */
1483 static int
1484 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
1485                           const struct rte_flow_item *item,
1486                           const struct rte_flow_attr *attr __rte_unused,
1487                           struct rte_flow_error *error)
1488 {
1489         const struct rte_flow_item_tag *spec = item->spec;
1490         const struct rte_flow_item_tag *mask = item->mask;
1491         const struct rte_flow_item_tag nic_mask = {
1492                 .data = RTE_BE32(UINT32_MAX),
1493                 .index = 0xff,
1494         };
1495         int ret;
1496
1497         if (!mlx5_flow_ext_mreg_supported(dev))
1498                 return rte_flow_error_set(error, ENOTSUP,
1499                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1500                                           "extensive metadata register"
1501                                           " isn't supported");
1502         if (!spec)
1503                 return rte_flow_error_set(error, EINVAL,
1504                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1505                                           item->spec,
1506                                           "data cannot be empty");
1507         if (!mask)
1508                 mask = &rte_flow_item_tag_mask;
1509         if (!mask->data)
1510                 return rte_flow_error_set(error, EINVAL,
1511                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1512                                         "mask cannot be zero");
1513
1514         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1515                                         (const uint8_t *)&nic_mask,
1516                                         sizeof(struct rte_flow_item_tag),
1517                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1518         if (ret < 0)
1519                 return ret;
1520         if (mask->index != 0xff)
1521                 return rte_flow_error_set(error, EINVAL,
1522                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1523                                           "partial mask for tag index"
1524                                           " is not supported");
1525         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
1526         if (ret < 0)
1527                 return ret;
1528         MLX5_ASSERT(ret != REG_NON);
1529         return 0;
1530 }
1531
1532 /**
1533  * Validate vport item.
1534  *
1535  * @param[in] dev
1536  *   Pointer to the rte_eth_dev structure.
1537  * @param[in] item
1538  *   Item specification.
1539  * @param[in] attr
1540  *   Attributes of flow that includes this item.
1541  * @param[in] item_flags
1542  *   Bit-fields that holds the items detected until now.
1543  * @param[out] error
1544  *   Pointer to error structure.
1545  *
1546  * @return
1547  *   0 on success, a negative errno value otherwise and rte_errno is set.
1548  */
1549 static int
1550 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
1551                               const struct rte_flow_item *item,
1552                               const struct rte_flow_attr *attr,
1553                               uint64_t item_flags,
1554                               struct rte_flow_error *error)
1555 {
1556         const struct rte_flow_item_port_id *spec = item->spec;
1557         const struct rte_flow_item_port_id *mask = item->mask;
1558         const struct rte_flow_item_port_id switch_mask = {
1559                         .id = 0xffffffff,
1560         };
1561         struct mlx5_priv *esw_priv;
1562         struct mlx5_priv *dev_priv;
1563         int ret;
1564
1565         if (!attr->transfer)
1566                 return rte_flow_error_set(error, EINVAL,
1567                                           RTE_FLOW_ERROR_TYPE_ITEM,
1568                                           NULL,
1569                                           "match on port id is valid only"
1570                                           " when transfer flag is enabled");
1571         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
1572                 return rte_flow_error_set(error, ENOTSUP,
1573                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1574                                           "multiple source ports are not"
1575                                           " supported");
1576         if (!mask)
1577                 mask = &switch_mask;
1578         if (mask->id != 0xffffffff)
1579                 return rte_flow_error_set(error, ENOTSUP,
1580                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1581                                            mask,
1582                                            "no support for partial mask on"
1583                                            " \"id\" field");
1584         ret = mlx5_flow_item_acceptable
1585                                 (item, (const uint8_t *)mask,
1586                                  (const uint8_t *)&rte_flow_item_port_id_mask,
1587                                  sizeof(struct rte_flow_item_port_id),
1588                                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1589         if (ret)
1590                 return ret;
1591         if (!spec)
1592                 return 0;
1593         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
1594         if (!esw_priv)
1595                 return rte_flow_error_set(error, rte_errno,
1596                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1597                                           "failed to obtain E-Switch info for"
1598                                           " port");
1599         dev_priv = mlx5_dev_to_eswitch_info(dev);
1600         if (!dev_priv)
1601                 return rte_flow_error_set(error, rte_errno,
1602                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1603                                           NULL,
1604                                           "failed to obtain E-Switch info");
1605         if (esw_priv->domain_id != dev_priv->domain_id)
1606                 return rte_flow_error_set(error, EINVAL,
1607                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1608                                           "cannot match on a port from a"
1609                                           " different E-Switch");
1610         return 0;
1611 }
1612
1613 /**
1614  * Validate VLAN item.
1615  *
1616  * @param[in] item
1617  *   Item specification.
1618  * @param[in] item_flags
1619  *   Bit-fields that holds the items detected until now.
1620  * @param[in] dev
1621  *   Ethernet device flow is being created on.
1622  * @param[out] error
1623  *   Pointer to error structure.
1624  *
1625  * @return
1626  *   0 on success, a negative errno value otherwise and rte_errno is set.
1627  */
1628 static int
1629 flow_dv_validate_item_vlan(const struct rte_flow_item *item,
1630                            uint64_t item_flags,
1631                            struct rte_eth_dev *dev,
1632                            struct rte_flow_error *error)
1633 {
1634         const struct rte_flow_item_vlan *mask = item->mask;
1635         const struct rte_flow_item_vlan nic_mask = {
1636                 .tci = RTE_BE16(UINT16_MAX),
1637                 .inner_type = RTE_BE16(UINT16_MAX),
1638                 .has_more_vlan = 1,
1639         };
1640         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1641         int ret;
1642         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1643                                         MLX5_FLOW_LAYER_INNER_L4) :
1644                                        (MLX5_FLOW_LAYER_OUTER_L3 |
1645                                         MLX5_FLOW_LAYER_OUTER_L4);
1646         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1647                                         MLX5_FLOW_LAYER_OUTER_VLAN;
1648
1649         if (item_flags & vlanm)
1650                 return rte_flow_error_set(error, EINVAL,
1651                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1652                                           "multiple VLAN layers not supported");
1653         else if ((item_flags & l34m) != 0)
1654                 return rte_flow_error_set(error, EINVAL,
1655                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1656                                           "VLAN cannot follow L3/L4 layer");
1657         if (!mask)
1658                 mask = &rte_flow_item_vlan_mask;
1659         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1660                                         (const uint8_t *)&nic_mask,
1661                                         sizeof(struct rte_flow_item_vlan),
1662                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1663         if (ret)
1664                 return ret;
1665         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
1666                 struct mlx5_priv *priv = dev->data->dev_private;
1667
1668                 if (priv->vmwa_context) {
1669                         /*
1670                          * Non-NULL context means we have a virtual machine
1671                          * and SR-IOV enabled, we have to create VLAN interface
1672                          * to make hypervisor to setup E-Switch vport
1673                          * context correctly. We avoid creating the multiple
1674                          * VLAN interfaces, so we cannot support VLAN tag mask.
1675                          */
1676                         return rte_flow_error_set(error, EINVAL,
1677                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1678                                                   item,
1679                                                   "VLAN tag mask is not"
1680                                                   " supported in virtual"
1681                                                   " environment");
1682                 }
1683         }
1684         return 0;
1685 }
1686
1687 /*
1688  * GTP flags are contained in 1 byte of the format:
1689  * -------------------------------------------
1690  * | bit   | 0 - 2   | 3  | 4   | 5 | 6 | 7  |
1691  * |-----------------------------------------|
1692  * | value | Version | PT | Res | E | S | PN |
1693  * -------------------------------------------
1694  *
1695  * Matching is supported only for GTP flags E, S, PN.
1696  */
1697 #define MLX5_GTP_FLAGS_MASK     0x07
1698
1699 /**
1700  * Validate GTP item.
1701  *
1702  * @param[in] dev
1703  *   Pointer to the rte_eth_dev structure.
1704  * @param[in] item
1705  *   Item specification.
1706  * @param[in] item_flags
1707  *   Bit-fields that holds the items detected until now.
1708  * @param[out] error
1709  *   Pointer to error structure.
1710  *
1711  * @return
1712  *   0 on success, a negative errno value otherwise and rte_errno is set.
1713  */
1714 static int
1715 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
1716                           const struct rte_flow_item *item,
1717                           uint64_t item_flags,
1718                           struct rte_flow_error *error)
1719 {
1720         struct mlx5_priv *priv = dev->data->dev_private;
1721         const struct rte_flow_item_gtp *spec = item->spec;
1722         const struct rte_flow_item_gtp *mask = item->mask;
1723         const struct rte_flow_item_gtp nic_mask = {
1724                 .v_pt_rsv_flags = MLX5_GTP_FLAGS_MASK,
1725                 .msg_type = 0xff,
1726                 .teid = RTE_BE32(0xffffffff),
1727         };
1728
1729         if (!priv->config.hca_attr.tunnel_stateless_gtp)
1730                 return rte_flow_error_set(error, ENOTSUP,
1731                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1732                                           "GTP support is not enabled");
1733         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1734                 return rte_flow_error_set(error, ENOTSUP,
1735                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1736                                           "multiple tunnel layers not"
1737                                           " supported");
1738         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1739                 return rte_flow_error_set(error, EINVAL,
1740                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1741                                           "no outer UDP layer found");
1742         if (!mask)
1743                 mask = &rte_flow_item_gtp_mask;
1744         if (spec && spec->v_pt_rsv_flags & ~MLX5_GTP_FLAGS_MASK)
1745                 return rte_flow_error_set(error, ENOTSUP,
1746                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1747                                           "Match is supported for GTP"
1748                                           " flags only");
1749         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1750                                          (const uint8_t *)&nic_mask,
1751                                          sizeof(struct rte_flow_item_gtp),
1752                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1753 }
1754
1755 /**
1756  * Validate IPV4 item.
1757  * Use existing validation function mlx5_flow_validate_item_ipv4(), and
1758  * add specific validation of fragment_offset field,
1759  *
1760  * @param[in] item
1761  *   Item specification.
1762  * @param[in] item_flags
1763  *   Bit-fields that holds the items detected until now.
1764  * @param[out] error
1765  *   Pointer to error structure.
1766  *
1767  * @return
1768  *   0 on success, a negative errno value otherwise and rte_errno is set.
1769  */
1770 static int
1771 flow_dv_validate_item_ipv4(const struct rte_flow_item *item,
1772                            uint64_t item_flags,
1773                            uint64_t last_item,
1774                            uint16_t ether_type,
1775                            struct rte_flow_error *error)
1776 {
1777         int ret;
1778         const struct rte_flow_item_ipv4 *spec = item->spec;
1779         const struct rte_flow_item_ipv4 *last = item->last;
1780         const struct rte_flow_item_ipv4 *mask = item->mask;
1781         rte_be16_t fragment_offset_spec = 0;
1782         rte_be16_t fragment_offset_last = 0;
1783         const struct rte_flow_item_ipv4 nic_ipv4_mask = {
1784                 .hdr = {
1785                         .src_addr = RTE_BE32(0xffffffff),
1786                         .dst_addr = RTE_BE32(0xffffffff),
1787                         .type_of_service = 0xff,
1788                         .fragment_offset = RTE_BE16(0xffff),
1789                         .next_proto_id = 0xff,
1790                         .time_to_live = 0xff,
1791                 },
1792         };
1793
1794         ret = mlx5_flow_validate_item_ipv4(item, item_flags, last_item,
1795                                            ether_type, &nic_ipv4_mask,
1796                                            MLX5_ITEM_RANGE_ACCEPTED, error);
1797         if (ret < 0)
1798                 return ret;
1799         if (spec && mask)
1800                 fragment_offset_spec = spec->hdr.fragment_offset &
1801                                        mask->hdr.fragment_offset;
1802         if (!fragment_offset_spec)
1803                 return 0;
1804         /*
1805          * spec and mask are valid, enforce using full mask to make sure the
1806          * complete value is used correctly.
1807          */
1808         if ((mask->hdr.fragment_offset & RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
1809                         != RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
1810                 return rte_flow_error_set(error, EINVAL,
1811                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1812                                           item, "must use full mask for"
1813                                           " fragment_offset");
1814         /*
1815          * Match on fragment_offset 0x2000 means MF is 1 and frag-offset is 0,
1816          * indicating this is 1st fragment of fragmented packet.
1817          * This is not yet supported in MLX5, return appropriate error message.
1818          */
1819         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG))
1820                 return rte_flow_error_set(error, ENOTSUP,
1821                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1822                                           "match on first fragment not "
1823                                           "supported");
1824         if (fragment_offset_spec && !last)
1825                 return rte_flow_error_set(error, ENOTSUP,
1826                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1827                                           "specified value not supported");
1828         /* spec and last are valid, validate the specified range. */
1829         fragment_offset_last = last->hdr.fragment_offset &
1830                                mask->hdr.fragment_offset;
1831         /*
1832          * Match on fragment_offset spec 0x2001 and last 0x3fff
1833          * means MF is 1 and frag-offset is > 0.
1834          * This packet is fragment 2nd and onward, excluding last.
1835          * This is not yet supported in MLX5, return appropriate
1836          * error message.
1837          */
1838         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG + 1) &&
1839             fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
1840                 return rte_flow_error_set(error, ENOTSUP,
1841                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
1842                                           last, "match on following "
1843                                           "fragments not supported");
1844         /*
1845          * Match on fragment_offset spec 0x0001 and last 0x1fff
1846          * means MF is 0 and frag-offset is > 0.
1847          * This packet is last fragment of fragmented packet.
1848          * This is not yet supported in MLX5, return appropriate
1849          * error message.
1850          */
1851         if (fragment_offset_spec == RTE_BE16(1) &&
1852             fragment_offset_last == RTE_BE16(RTE_IPV4_HDR_OFFSET_MASK))
1853                 return rte_flow_error_set(error, ENOTSUP,
1854                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
1855                                           last, "match on last "
1856                                           "fragment not supported");
1857         /*
1858          * Match on fragment_offset spec 0x0001 and last 0x3fff
1859          * means MF and/or frag-offset is not 0.
1860          * This is a fragmented packet.
1861          * Other range values are invalid and rejected.
1862          */
1863         if (!(fragment_offset_spec == RTE_BE16(1) &&
1864               fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK)))
1865                 return rte_flow_error_set(error, ENOTSUP,
1866                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
1867                                           "specified range not supported");
1868         return 0;
1869 }
1870
1871 /**
1872  * Validate IPV6 fragment extension item.
1873  *
1874  * @param[in] item
1875  *   Item specification.
1876  * @param[in] item_flags
1877  *   Bit-fields that holds the items detected until now.
1878  * @param[out] error
1879  *   Pointer to error structure.
1880  *
1881  * @return
1882  *   0 on success, a negative errno value otherwise and rte_errno is set.
1883  */
1884 static int
1885 flow_dv_validate_item_ipv6_frag_ext(const struct rte_flow_item *item,
1886                                     uint64_t item_flags,
1887                                     struct rte_flow_error *error)
1888 {
1889         const struct rte_flow_item_ipv6_frag_ext *spec = item->spec;
1890         const struct rte_flow_item_ipv6_frag_ext *last = item->last;
1891         const struct rte_flow_item_ipv6_frag_ext *mask = item->mask;
1892         rte_be16_t frag_data_spec = 0;
1893         rte_be16_t frag_data_last = 0;
1894         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1895         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1896                                       MLX5_FLOW_LAYER_OUTER_L4;
1897         int ret = 0;
1898         struct rte_flow_item_ipv6_frag_ext nic_mask = {
1899                 .hdr = {
1900                         .next_header = 0xff,
1901                         .frag_data = RTE_BE16(0xffff),
1902                 },
1903         };
1904
1905         if (item_flags & l4m)
1906                 return rte_flow_error_set(error, EINVAL,
1907                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1908                                           "ipv6 fragment extension item cannot "
1909                                           "follow L4 item.");
1910         if ((tunnel && !(item_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
1911             (!tunnel && !(item_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV6)))
1912                 return rte_flow_error_set(error, EINVAL,
1913                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1914                                           "ipv6 fragment extension item must "
1915                                           "follow ipv6 item");
1916         if (spec && mask)
1917                 frag_data_spec = spec->hdr.frag_data & mask->hdr.frag_data;
1918         if (!frag_data_spec)
1919                 return 0;
1920         /*
1921          * spec and mask are valid, enforce using full mask to make sure the
1922          * complete value is used correctly.
1923          */
1924         if ((mask->hdr.frag_data & RTE_BE16(RTE_IPV6_FRAG_USED_MASK)) !=
1925                                 RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
1926                 return rte_flow_error_set(error, EINVAL,
1927                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1928                                           item, "must use full mask for"
1929                                           " frag_data");
1930         /*
1931          * Match on frag_data 0x00001 means M is 1 and frag-offset is 0.
1932          * This is 1st fragment of fragmented packet.
1933          */
1934         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_MF_MASK))
1935                 return rte_flow_error_set(error, ENOTSUP,
1936                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1937                                           "match on first fragment not "
1938                                           "supported");
1939         if (frag_data_spec && !last)
1940                 return rte_flow_error_set(error, EINVAL,
1941                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1942                                           "specified value not supported");
1943         ret = mlx5_flow_item_acceptable
1944                                 (item, (const uint8_t *)mask,
1945                                  (const uint8_t *)&nic_mask,
1946                                  sizeof(struct rte_flow_item_ipv6_frag_ext),
1947                                  MLX5_ITEM_RANGE_ACCEPTED, error);
1948         if (ret)
1949                 return ret;
1950         /* spec and last are valid, validate the specified range. */
1951         frag_data_last = last->hdr.frag_data & mask->hdr.frag_data;
1952         /*
1953          * Match on frag_data spec 0x0009 and last 0xfff9
1954          * means M is 1 and frag-offset is > 0.
1955          * This packet is fragment 2nd and onward, excluding last.
1956          * This is not yet supported in MLX5, return appropriate
1957          * error message.
1958          */
1959         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN |
1960                                        RTE_IPV6_EHDR_MF_MASK) &&
1961             frag_data_last == RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
1962                 return rte_flow_error_set(error, ENOTSUP,
1963                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
1964                                           last, "match on following "
1965                                           "fragments not supported");
1966         /*
1967          * Match on frag_data spec 0x0008 and last 0xfff8
1968          * means M is 0 and frag-offset is > 0.
1969          * This packet is last fragment of fragmented packet.
1970          * This is not yet supported in MLX5, return appropriate
1971          * error message.
1972          */
1973         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN) &&
1974             frag_data_last == RTE_BE16(RTE_IPV6_EHDR_FO_MASK))
1975                 return rte_flow_error_set(error, ENOTSUP,
1976                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
1977                                           last, "match on last "
1978                                           "fragment not supported");
1979         /* Other range values are invalid and rejected. */
1980         return rte_flow_error_set(error, EINVAL,
1981                                   RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
1982                                   "specified range not supported");
1983 }
1984
1985 /**
1986  * Validate the pop VLAN action.
1987  *
1988  * @param[in] dev
1989  *   Pointer to the rte_eth_dev structure.
1990  * @param[in] action_flags
1991  *   Holds the actions detected until now.
1992  * @param[in] action
1993  *   Pointer to the pop vlan action.
1994  * @param[in] item_flags
1995  *   The items found in this flow rule.
1996  * @param[in] attr
1997  *   Pointer to flow attributes.
1998  * @param[out] error
1999  *   Pointer to error structure.
2000  *
2001  * @return
2002  *   0 on success, a negative errno value otherwise and rte_errno is set.
2003  */
2004 static int
2005 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
2006                                  uint64_t action_flags,
2007                                  const struct rte_flow_action *action,
2008                                  uint64_t item_flags,
2009                                  const struct rte_flow_attr *attr,
2010                                  struct rte_flow_error *error)
2011 {
2012         const struct mlx5_priv *priv = dev->data->dev_private;
2013
2014         (void)action;
2015         (void)attr;
2016         if (!priv->sh->pop_vlan_action)
2017                 return rte_flow_error_set(error, ENOTSUP,
2018                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2019                                           NULL,
2020                                           "pop vlan action is not supported");
2021         if (attr->egress)
2022                 return rte_flow_error_set(error, ENOTSUP,
2023                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2024                                           NULL,
2025                                           "pop vlan action not supported for "
2026                                           "egress");
2027         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
2028                 return rte_flow_error_set(error, ENOTSUP,
2029                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2030                                           "no support for multiple VLAN "
2031                                           "actions");
2032         /* Pop VLAN with preceding Decap requires inner header with VLAN. */
2033         if ((action_flags & MLX5_FLOW_ACTION_DECAP) &&
2034             !(item_flags & MLX5_FLOW_LAYER_INNER_VLAN))
2035                 return rte_flow_error_set(error, ENOTSUP,
2036                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2037                                           NULL,
2038                                           "cannot pop vlan after decap without "
2039                                           "match on inner vlan in the flow");
2040         /* Pop VLAN without preceding Decap requires outer header with VLAN. */
2041         if (!(action_flags & MLX5_FLOW_ACTION_DECAP) &&
2042             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2043                 return rte_flow_error_set(error, ENOTSUP,
2044                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2045                                           NULL,
2046                                           "cannot pop vlan without a "
2047                                           "match on (outer) vlan in the flow");
2048         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2049                 return rte_flow_error_set(error, EINVAL,
2050                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2051                                           "wrong action order, port_id should "
2052                                           "be after pop VLAN action");
2053         if (!attr->transfer && priv->representor)
2054                 return rte_flow_error_set(error, ENOTSUP,
2055                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2056                                           "pop vlan action for VF representor "
2057                                           "not supported on NIC table");
2058         return 0;
2059 }
2060
2061 /**
2062  * Get VLAN default info from vlan match info.
2063  *
2064  * @param[in] items
2065  *   the list of item specifications.
2066  * @param[out] vlan
2067  *   pointer VLAN info to fill to.
2068  *
2069  * @return
2070  *   0 on success, a negative errno value otherwise and rte_errno is set.
2071  */
2072 static void
2073 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
2074                                   struct rte_vlan_hdr *vlan)
2075 {
2076         const struct rte_flow_item_vlan nic_mask = {
2077                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
2078                                 MLX5DV_FLOW_VLAN_VID_MASK),
2079                 .inner_type = RTE_BE16(0xffff),
2080         };
2081
2082         if (items == NULL)
2083                 return;
2084         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2085                 int type = items->type;
2086
2087                 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
2088                     type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
2089                         break;
2090         }
2091         if (items->type != RTE_FLOW_ITEM_TYPE_END) {
2092                 const struct rte_flow_item_vlan *vlan_m = items->mask;
2093                 const struct rte_flow_item_vlan *vlan_v = items->spec;
2094
2095                 /* If VLAN item in pattern doesn't contain data, return here. */
2096                 if (!vlan_v)
2097                         return;
2098                 if (!vlan_m)
2099                         vlan_m = &nic_mask;
2100                 /* Only full match values are accepted */
2101                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
2102                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
2103                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
2104                         vlan->vlan_tci |=
2105                                 rte_be_to_cpu_16(vlan_v->tci &
2106                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
2107                 }
2108                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
2109                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
2110                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
2111                         vlan->vlan_tci |=
2112                                 rte_be_to_cpu_16(vlan_v->tci &
2113                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
2114                 }
2115                 if (vlan_m->inner_type == nic_mask.inner_type)
2116                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
2117                                                            vlan_m->inner_type);
2118         }
2119 }
2120
2121 /**
2122  * Validate the push VLAN action.
2123  *
2124  * @param[in] dev
2125  *   Pointer to the rte_eth_dev structure.
2126  * @param[in] action_flags
2127  *   Holds the actions detected until now.
2128  * @param[in] item_flags
2129  *   The items found in this flow rule.
2130  * @param[in] action
2131  *   Pointer to the action structure.
2132  * @param[in] attr
2133  *   Pointer to flow attributes
2134  * @param[out] error
2135  *   Pointer to error structure.
2136  *
2137  * @return
2138  *   0 on success, a negative errno value otherwise and rte_errno is set.
2139  */
2140 static int
2141 flow_dv_validate_action_push_vlan(struct rte_eth_dev *dev,
2142                                   uint64_t action_flags,
2143                                   const struct rte_flow_item_vlan *vlan_m,
2144                                   const struct rte_flow_action *action,
2145                                   const struct rte_flow_attr *attr,
2146                                   struct rte_flow_error *error)
2147 {
2148         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
2149         const struct mlx5_priv *priv = dev->data->dev_private;
2150
2151         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
2152             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
2153                 return rte_flow_error_set(error, EINVAL,
2154                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2155                                           "invalid vlan ethertype");
2156         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2157                 return rte_flow_error_set(error, EINVAL,
2158                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2159                                           "wrong action order, port_id should "
2160                                           "be after push VLAN");
2161         if (!attr->transfer && priv->representor)
2162                 return rte_flow_error_set(error, ENOTSUP,
2163                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2164                                           "push vlan action for VF representor "
2165                                           "not supported on NIC table");
2166         if (vlan_m &&
2167             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) &&
2168             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) !=
2169                 MLX5DV_FLOW_VLAN_PCP_MASK_BE &&
2170             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP) &&
2171             !(mlx5_flow_find_action
2172                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP)))
2173                 return rte_flow_error_set(error, EINVAL,
2174                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2175                                           "not full match mask on VLAN PCP and "
2176                                           "there is no of_set_vlan_pcp action, "
2177                                           "push VLAN action cannot figure out "
2178                                           "PCP value");
2179         if (vlan_m &&
2180             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) &&
2181             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) !=
2182                 MLX5DV_FLOW_VLAN_VID_MASK_BE &&
2183             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID) &&
2184             !(mlx5_flow_find_action
2185                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID)))
2186                 return rte_flow_error_set(error, EINVAL,
2187                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2188                                           "not full match mask on VLAN VID and "
2189                                           "there is no of_set_vlan_vid action, "
2190                                           "push VLAN action cannot figure out "
2191                                           "VID value");
2192         (void)attr;
2193         return 0;
2194 }
2195
2196 /**
2197  * Validate the set VLAN PCP.
2198  *
2199  * @param[in] action_flags
2200  *   Holds the actions detected until now.
2201  * @param[in] actions
2202  *   Pointer to the list of actions remaining in the flow rule.
2203  * @param[out] error
2204  *   Pointer to error structure.
2205  *
2206  * @return
2207  *   0 on success, a negative errno value otherwise and rte_errno is set.
2208  */
2209 static int
2210 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
2211                                      const struct rte_flow_action actions[],
2212                                      struct rte_flow_error *error)
2213 {
2214         const struct rte_flow_action *action = actions;
2215         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
2216
2217         if (conf->vlan_pcp > 7)
2218                 return rte_flow_error_set(error, EINVAL,
2219                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2220                                           "VLAN PCP value is too big");
2221         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
2222                 return rte_flow_error_set(error, ENOTSUP,
2223                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2224                                           "set VLAN PCP action must follow "
2225                                           "the push VLAN action");
2226         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
2227                 return rte_flow_error_set(error, ENOTSUP,
2228                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2229                                           "Multiple VLAN PCP modification are "
2230                                           "not supported");
2231         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2232                 return rte_flow_error_set(error, EINVAL,
2233                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2234                                           "wrong action order, port_id should "
2235                                           "be after set VLAN PCP");
2236         return 0;
2237 }
2238
2239 /**
2240  * Validate the set VLAN VID.
2241  *
2242  * @param[in] item_flags
2243  *   Holds the items detected in this rule.
2244  * @param[in] action_flags
2245  *   Holds the actions detected until now.
2246  * @param[in] actions
2247  *   Pointer to the list of actions remaining in the flow rule.
2248  * @param[out] error
2249  *   Pointer to error structure.
2250  *
2251  * @return
2252  *   0 on success, a negative errno value otherwise and rte_errno is set.
2253  */
2254 static int
2255 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
2256                                      uint64_t action_flags,
2257                                      const struct rte_flow_action actions[],
2258                                      struct rte_flow_error *error)
2259 {
2260         const struct rte_flow_action *action = actions;
2261         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
2262
2263         if (rte_be_to_cpu_16(conf->vlan_vid) > 0xFFE)
2264                 return rte_flow_error_set(error, EINVAL,
2265                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2266                                           "VLAN VID value is too big");
2267         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
2268             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2269                 return rte_flow_error_set(error, ENOTSUP,
2270                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2271                                           "set VLAN VID action must follow push"
2272                                           " VLAN action or match on VLAN item");
2273         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
2274                 return rte_flow_error_set(error, ENOTSUP,
2275                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2276                                           "Multiple VLAN VID modifications are "
2277                                           "not supported");
2278         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2279                 return rte_flow_error_set(error, EINVAL,
2280                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2281                                           "wrong action order, port_id should "
2282                                           "be after set VLAN VID");
2283         return 0;
2284 }
2285
2286 /*
2287  * Validate the FLAG action.
2288  *
2289  * @param[in] dev
2290  *   Pointer to the rte_eth_dev structure.
2291  * @param[in] action_flags
2292  *   Holds the actions detected until now.
2293  * @param[in] attr
2294  *   Pointer to flow attributes
2295  * @param[out] error
2296  *   Pointer to error structure.
2297  *
2298  * @return
2299  *   0 on success, a negative errno value otherwise and rte_errno is set.
2300  */
2301 static int
2302 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
2303                              uint64_t action_flags,
2304                              const struct rte_flow_attr *attr,
2305                              struct rte_flow_error *error)
2306 {
2307         struct mlx5_priv *priv = dev->data->dev_private;
2308         struct mlx5_dev_config *config = &priv->config;
2309         int ret;
2310
2311         /* Fall back if no extended metadata register support. */
2312         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
2313                 return mlx5_flow_validate_action_flag(action_flags, attr,
2314                                                       error);
2315         /* Extensive metadata mode requires registers. */
2316         if (!mlx5_flow_ext_mreg_supported(dev))
2317                 return rte_flow_error_set(error, ENOTSUP,
2318                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2319                                           "no metadata registers "
2320                                           "to support flag action");
2321         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
2322                 return rte_flow_error_set(error, ENOTSUP,
2323                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2324                                           "extended metadata register"
2325                                           " isn't available");
2326         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
2327         if (ret < 0)
2328                 return ret;
2329         MLX5_ASSERT(ret > 0);
2330         if (action_flags & MLX5_FLOW_ACTION_MARK)
2331                 return rte_flow_error_set(error, EINVAL,
2332                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2333                                           "can't mark and flag in same flow");
2334         if (action_flags & MLX5_FLOW_ACTION_FLAG)
2335                 return rte_flow_error_set(error, EINVAL,
2336                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2337                                           "can't have 2 flag"
2338                                           " actions in same flow");
2339         return 0;
2340 }
2341
2342 /**
2343  * Validate MARK action.
2344  *
2345  * @param[in] dev
2346  *   Pointer to the rte_eth_dev structure.
2347  * @param[in] action
2348  *   Pointer to action.
2349  * @param[in] action_flags
2350  *   Holds the actions detected until now.
2351  * @param[in] attr
2352  *   Pointer to flow attributes
2353  * @param[out] error
2354  *   Pointer to error structure.
2355  *
2356  * @return
2357  *   0 on success, a negative errno value otherwise and rte_errno is set.
2358  */
2359 static int
2360 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
2361                              const struct rte_flow_action *action,
2362                              uint64_t action_flags,
2363                              const struct rte_flow_attr *attr,
2364                              struct rte_flow_error *error)
2365 {
2366         struct mlx5_priv *priv = dev->data->dev_private;
2367         struct mlx5_dev_config *config = &priv->config;
2368         const struct rte_flow_action_mark *mark = action->conf;
2369         int ret;
2370
2371         /* Fall back if no extended metadata register support. */
2372         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
2373                 return mlx5_flow_validate_action_mark(action, action_flags,
2374                                                       attr, error);
2375         /* Extensive metadata mode requires registers. */
2376         if (!mlx5_flow_ext_mreg_supported(dev))
2377                 return rte_flow_error_set(error, ENOTSUP,
2378                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2379                                           "no metadata registers "
2380                                           "to support mark action");
2381         if (!priv->sh->dv_mark_mask)
2382                 return rte_flow_error_set(error, ENOTSUP,
2383                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2384                                           "extended metadata register"
2385                                           " isn't available");
2386         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
2387         if (ret < 0)
2388                 return ret;
2389         MLX5_ASSERT(ret > 0);
2390         if (!mark)
2391                 return rte_flow_error_set(error, EINVAL,
2392                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2393                                           "configuration cannot be null");
2394         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
2395                 return rte_flow_error_set(error, EINVAL,
2396                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2397                                           &mark->id,
2398                                           "mark id exceeds the limit");
2399         if (action_flags & MLX5_FLOW_ACTION_FLAG)
2400                 return rte_flow_error_set(error, EINVAL,
2401                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2402                                           "can't flag and mark in same flow");
2403         if (action_flags & MLX5_FLOW_ACTION_MARK)
2404                 return rte_flow_error_set(error, EINVAL,
2405                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2406                                           "can't have 2 mark actions in same"
2407                                           " flow");
2408         return 0;
2409 }
2410
2411 /**
2412  * Validate SET_META action.
2413  *
2414  * @param[in] dev
2415  *   Pointer to the rte_eth_dev structure.
2416  * @param[in] action
2417  *   Pointer to the action structure.
2418  * @param[in] action_flags
2419  *   Holds the actions detected until now.
2420  * @param[in] attr
2421  *   Pointer to flow attributes
2422  * @param[out] error
2423  *   Pointer to error structure.
2424  *
2425  * @return
2426  *   0 on success, a negative errno value otherwise and rte_errno is set.
2427  */
2428 static int
2429 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
2430                                  const struct rte_flow_action *action,
2431                                  uint64_t action_flags __rte_unused,
2432                                  const struct rte_flow_attr *attr,
2433                                  struct rte_flow_error *error)
2434 {
2435         const struct rte_flow_action_set_meta *conf;
2436         uint32_t nic_mask = UINT32_MAX;
2437         int reg;
2438
2439         if (!mlx5_flow_ext_mreg_supported(dev))
2440                 return rte_flow_error_set(error, ENOTSUP,
2441                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2442                                           "extended metadata register"
2443                                           " isn't supported");
2444         reg = flow_dv_get_metadata_reg(dev, attr, error);
2445         if (reg < 0)
2446                 return reg;
2447         if (reg != REG_A && reg != REG_B) {
2448                 struct mlx5_priv *priv = dev->data->dev_private;
2449
2450                 nic_mask = priv->sh->dv_meta_mask;
2451         }
2452         if (!(action->conf))
2453                 return rte_flow_error_set(error, EINVAL,
2454                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2455                                           "configuration cannot be null");
2456         conf = (const struct rte_flow_action_set_meta *)action->conf;
2457         if (!conf->mask)
2458                 return rte_flow_error_set(error, EINVAL,
2459                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2460                                           "zero mask doesn't have any effect");
2461         if (conf->mask & ~nic_mask)
2462                 return rte_flow_error_set(error, EINVAL,
2463                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2464                                           "meta data must be within reg C0");
2465         return 0;
2466 }
2467
2468 /**
2469  * Validate SET_TAG action.
2470  *
2471  * @param[in] dev
2472  *   Pointer to the rte_eth_dev structure.
2473  * @param[in] action
2474  *   Pointer to the action structure.
2475  * @param[in] action_flags
2476  *   Holds the actions detected until now.
2477  * @param[in] attr
2478  *   Pointer to flow attributes
2479  * @param[out] error
2480  *   Pointer to error structure.
2481  *
2482  * @return
2483  *   0 on success, a negative errno value otherwise and rte_errno is set.
2484  */
2485 static int
2486 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
2487                                 const struct rte_flow_action *action,
2488                                 uint64_t action_flags,
2489                                 const struct rte_flow_attr *attr,
2490                                 struct rte_flow_error *error)
2491 {
2492         const struct rte_flow_action_set_tag *conf;
2493         const uint64_t terminal_action_flags =
2494                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
2495                 MLX5_FLOW_ACTION_RSS;
2496         int ret;
2497
2498         if (!mlx5_flow_ext_mreg_supported(dev))
2499                 return rte_flow_error_set(error, ENOTSUP,
2500                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2501                                           "extensive metadata register"
2502                                           " isn't supported");
2503         if (!(action->conf))
2504                 return rte_flow_error_set(error, EINVAL,
2505                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2506                                           "configuration cannot be null");
2507         conf = (const struct rte_flow_action_set_tag *)action->conf;
2508         if (!conf->mask)
2509                 return rte_flow_error_set(error, EINVAL,
2510                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2511                                           "zero mask doesn't have any effect");
2512         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
2513         if (ret < 0)
2514                 return ret;
2515         if (!attr->transfer && attr->ingress &&
2516             (action_flags & terminal_action_flags))
2517                 return rte_flow_error_set(error, EINVAL,
2518                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2519                                           "set_tag has no effect"
2520                                           " with terminal actions");
2521         return 0;
2522 }
2523
2524 /**
2525  * Validate count action.
2526  *
2527  * @param[in] dev
2528  *   Pointer to rte_eth_dev structure.
2529  * @param[out] error
2530  *   Pointer to error structure.
2531  *
2532  * @return
2533  *   0 on success, a negative errno value otherwise and rte_errno is set.
2534  */
2535 static int
2536 flow_dv_validate_action_count(struct rte_eth_dev *dev,
2537                               struct rte_flow_error *error)
2538 {
2539         struct mlx5_priv *priv = dev->data->dev_private;
2540
2541         if (!priv->config.devx)
2542                 goto notsup_err;
2543 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
2544         return 0;
2545 #endif
2546 notsup_err:
2547         return rte_flow_error_set
2548                       (error, ENOTSUP,
2549                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2550                        NULL,
2551                        "count action not supported");
2552 }
2553
2554 /**
2555  * Validate the L2 encap action.
2556  *
2557  * @param[in] dev
2558  *   Pointer to the rte_eth_dev structure.
2559  * @param[in] action_flags
2560  *   Holds the actions detected until now.
2561  * @param[in] action
2562  *   Pointer to the action structure.
2563  * @param[in] attr
2564  *   Pointer to flow attributes.
2565  * @param[out] error
2566  *   Pointer to error structure.
2567  *
2568  * @return
2569  *   0 on success, a negative errno value otherwise and rte_errno is set.
2570  */
2571 static int
2572 flow_dv_validate_action_l2_encap(struct rte_eth_dev *dev,
2573                                  uint64_t action_flags,
2574                                  const struct rte_flow_action *action,
2575                                  const struct rte_flow_attr *attr,
2576                                  struct rte_flow_error *error)
2577 {
2578         const struct mlx5_priv *priv = dev->data->dev_private;
2579
2580         if (!(action->conf))
2581                 return rte_flow_error_set(error, EINVAL,
2582                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2583                                           "configuration cannot be null");
2584         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
2585                 return rte_flow_error_set(error, EINVAL,
2586                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2587                                           "can only have a single encap action "
2588                                           "in a flow");
2589         if (!attr->transfer && priv->representor)
2590                 return rte_flow_error_set(error, ENOTSUP,
2591                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2592                                           "encap action for VF representor "
2593                                           "not supported on NIC table");
2594         return 0;
2595 }
2596
2597 /**
2598  * Validate a decap action.
2599  *
2600  * @param[in] dev
2601  *   Pointer to the rte_eth_dev structure.
2602  * @param[in] action_flags
2603  *   Holds the actions detected until now.
2604  * @param[in] attr
2605  *   Pointer to flow attributes
2606  * @param[out] error
2607  *   Pointer to error structure.
2608  *
2609  * @return
2610  *   0 on success, a negative errno value otherwise and rte_errno is set.
2611  */
2612 static int
2613 flow_dv_validate_action_decap(struct rte_eth_dev *dev,
2614                               uint64_t action_flags,
2615                               const struct rte_flow_attr *attr,
2616                               struct rte_flow_error *error)
2617 {
2618         const struct mlx5_priv *priv = dev->data->dev_private;
2619
2620         if (priv->config.hca_attr.scatter_fcs_w_decap_disable &&
2621             !priv->config.decap_en)
2622                 return rte_flow_error_set(error, ENOTSUP,
2623                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2624                                           "decap is not enabled");
2625         if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
2626                 return rte_flow_error_set(error, ENOTSUP,
2627                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2628                                           action_flags &
2629                                           MLX5_FLOW_ACTION_DECAP ? "can only "
2630                                           "have a single decap action" : "decap "
2631                                           "after encap is not supported");
2632         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2633                 return rte_flow_error_set(error, EINVAL,
2634                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2635                                           "can't have decap action after"
2636                                           " modify action");
2637         if (attr->egress)
2638                 return rte_flow_error_set(error, ENOTSUP,
2639                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2640                                           NULL,
2641                                           "decap action not supported for "
2642                                           "egress");
2643         if (!attr->transfer && priv->representor)
2644                 return rte_flow_error_set(error, ENOTSUP,
2645                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2646                                           "decap action for VF representor "
2647                                           "not supported on NIC table");
2648         return 0;
2649 }
2650
2651 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
2652
2653 /**
2654  * Validate the raw encap and decap actions.
2655  *
2656  * @param[in] dev
2657  *   Pointer to the rte_eth_dev structure.
2658  * @param[in] decap
2659  *   Pointer to the decap action.
2660  * @param[in] encap
2661  *   Pointer to the encap action.
2662  * @param[in] attr
2663  *   Pointer to flow attributes
2664  * @param[in/out] action_flags
2665  *   Holds the actions detected until now.
2666  * @param[out] actions_n
2667  *   pointer to the number of actions counter.
2668  * @param[out] error
2669  *   Pointer to error structure.
2670  *
2671  * @return
2672  *   0 on success, a negative errno value otherwise and rte_errno is set.
2673  */
2674 static int
2675 flow_dv_validate_action_raw_encap_decap
2676         (struct rte_eth_dev *dev,
2677          const struct rte_flow_action_raw_decap *decap,
2678          const struct rte_flow_action_raw_encap *encap,
2679          const struct rte_flow_attr *attr, uint64_t *action_flags,
2680          int *actions_n, struct rte_flow_error *error)
2681 {
2682         const struct mlx5_priv *priv = dev->data->dev_private;
2683         int ret;
2684
2685         if (encap && (!encap->size || !encap->data))
2686                 return rte_flow_error_set(error, EINVAL,
2687                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2688                                           "raw encap data cannot be empty");
2689         if (decap && encap) {
2690                 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
2691                     encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
2692                         /* L3 encap. */
2693                         decap = NULL;
2694                 else if (encap->size <=
2695                            MLX5_ENCAPSULATION_DECISION_SIZE &&
2696                            decap->size >
2697                            MLX5_ENCAPSULATION_DECISION_SIZE)
2698                         /* L3 decap. */
2699                         encap = NULL;
2700                 else if (encap->size >
2701                            MLX5_ENCAPSULATION_DECISION_SIZE &&
2702                            decap->size >
2703                            MLX5_ENCAPSULATION_DECISION_SIZE)
2704                         /* 2 L2 actions: encap and decap. */
2705                         ;
2706                 else
2707                         return rte_flow_error_set(error,
2708                                 ENOTSUP,
2709                                 RTE_FLOW_ERROR_TYPE_ACTION,
2710                                 NULL, "unsupported too small "
2711                                 "raw decap and too small raw "
2712                                 "encap combination");
2713         }
2714         if (decap) {
2715                 ret = flow_dv_validate_action_decap(dev, *action_flags, attr,
2716                                                     error);
2717                 if (ret < 0)
2718                         return ret;
2719                 *action_flags |= MLX5_FLOW_ACTION_DECAP;
2720                 ++(*actions_n);
2721         }
2722         if (encap) {
2723                 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
2724                         return rte_flow_error_set(error, ENOTSUP,
2725                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2726                                                   NULL,
2727                                                   "small raw encap size");
2728                 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
2729                         return rte_flow_error_set(error, EINVAL,
2730                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2731                                                   NULL,
2732                                                   "more than one encap action");
2733                 if (!attr->transfer && priv->representor)
2734                         return rte_flow_error_set
2735                                         (error, ENOTSUP,
2736                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2737                                          "encap action for VF representor "
2738                                          "not supported on NIC table");
2739                 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
2740                 ++(*actions_n);
2741         }
2742         return 0;
2743 }
2744
2745 /**
2746  * Match encap_decap resource.
2747  *
2748  * @param list
2749  *   Pointer to the hash list.
2750  * @param entry
2751  *   Pointer to exist resource entry object.
2752  * @param key
2753  *   Key of the new entry.
2754  * @param ctx_cb
2755  *   Pointer to new encap_decap resource.
2756  *
2757  * @return
2758  *   0 on matching, none-zero otherwise.
2759  */
2760 int
2761 flow_dv_encap_decap_match_cb(struct mlx5_hlist *list __rte_unused,
2762                              struct mlx5_hlist_entry *entry,
2763                              uint64_t key __rte_unused, void *cb_ctx)
2764 {
2765         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2766         struct mlx5_flow_dv_encap_decap_resource *resource = ctx->data;
2767         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2768
2769         cache_resource = container_of(entry,
2770                                       struct mlx5_flow_dv_encap_decap_resource,
2771                                       entry);
2772         if (resource->entry.key == cache_resource->entry.key &&
2773             resource->reformat_type == cache_resource->reformat_type &&
2774             resource->ft_type == cache_resource->ft_type &&
2775             resource->flags == cache_resource->flags &&
2776             resource->size == cache_resource->size &&
2777             !memcmp((const void *)resource->buf,
2778                     (const void *)cache_resource->buf,
2779                     resource->size))
2780                 return 0;
2781         return -1;
2782 }
2783
2784 /**
2785  * Allocate encap_decap resource.
2786  *
2787  * @param list
2788  *   Pointer to the hash list.
2789  * @param entry
2790  *   Pointer to exist resource entry object.
2791  * @param ctx_cb
2792  *   Pointer to new encap_decap resource.
2793  *
2794  * @return
2795  *   0 on matching, none-zero otherwise.
2796  */
2797 struct mlx5_hlist_entry *
2798 flow_dv_encap_decap_create_cb(struct mlx5_hlist *list,
2799                               uint64_t key __rte_unused,
2800                               void *cb_ctx)
2801 {
2802         struct mlx5_dev_ctx_shared *sh = list->ctx;
2803         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2804         struct mlx5dv_dr_domain *domain;
2805         struct mlx5_flow_dv_encap_decap_resource *resource = ctx->data;
2806         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2807         uint32_t idx;
2808         int ret;
2809
2810         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2811                 domain = sh->fdb_domain;
2812         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2813                 domain = sh->rx_domain;
2814         else
2815                 domain = sh->tx_domain;
2816         /* Register new encap/decap resource. */
2817         cache_resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
2818                                        &idx);
2819         if (!cache_resource) {
2820                 rte_flow_error_set(ctx->error, ENOMEM,
2821                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2822                                    "cannot allocate resource memory");
2823                 return NULL;
2824         }
2825         *cache_resource = *resource;
2826         cache_resource->idx = idx;
2827         ret = mlx5_flow_os_create_flow_action_packet_reformat
2828                                         (sh->ctx, domain, cache_resource,
2829                                          &cache_resource->action);
2830         if (ret) {
2831                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], idx);
2832                 rte_flow_error_set(ctx->error, ENOMEM,
2833                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2834                                    NULL, "cannot create action");
2835                 return NULL;
2836         }
2837
2838         return &cache_resource->entry;
2839 }
2840
2841 /**
2842  * Find existing encap/decap resource or create and register a new one.
2843  *
2844  * @param[in, out] dev
2845  *   Pointer to rte_eth_dev structure.
2846  * @param[in, out] resource
2847  *   Pointer to encap/decap resource.
2848  * @parm[in, out] dev_flow
2849  *   Pointer to the dev_flow.
2850  * @param[out] error
2851  *   pointer to error structure.
2852  *
2853  * @return
2854  *   0 on success otherwise -errno and errno is set.
2855  */
2856 static int
2857 flow_dv_encap_decap_resource_register
2858                         (struct rte_eth_dev *dev,
2859                          struct mlx5_flow_dv_encap_decap_resource *resource,
2860                          struct mlx5_flow *dev_flow,
2861                          struct rte_flow_error *error)
2862 {
2863         struct mlx5_priv *priv = dev->data->dev_private;
2864         struct mlx5_dev_ctx_shared *sh = priv->sh;
2865         struct mlx5_hlist_entry *entry;
2866         union mlx5_flow_encap_decap_key encap_decap_key = {
2867                 {
2868                         .ft_type = resource->ft_type,
2869                         .refmt_type = resource->reformat_type,
2870                         .buf_size = resource->size,
2871                         .table_level = !!dev_flow->dv.group,
2872                         .cksum = 0,
2873                 }
2874         };
2875         struct mlx5_flow_cb_ctx ctx = {
2876                 .error = error,
2877                 .data = resource,
2878         };
2879
2880         resource->flags = dev_flow->dv.group ? 0 : 1;
2881         encap_decap_key.cksum = __rte_raw_cksum(resource->buf,
2882                                                 resource->size, 0);
2883         resource->entry.key = encap_decap_key.v64;
2884         entry = mlx5_hlist_register(sh->encaps_decaps, resource->entry.key,
2885                                     &ctx);
2886         if (!entry)
2887                 return -rte_errno;
2888         resource = container_of(entry, typeof(*resource), entry);
2889         dev_flow->dv.encap_decap = resource;
2890         dev_flow->handle->dvh.rix_encap_decap = resource->idx;
2891         return 0;
2892 }
2893
2894 /**
2895  * Find existing table jump resource or create and register a new one.
2896  *
2897  * @param[in, out] dev
2898  *   Pointer to rte_eth_dev structure.
2899  * @param[in, out] tbl
2900  *   Pointer to flow table resource.
2901  * @parm[in, out] dev_flow
2902  *   Pointer to the dev_flow.
2903  * @param[out] error
2904  *   pointer to error structure.
2905  *
2906  * @return
2907  *   0 on success otherwise -errno and errno is set.
2908  */
2909 static int
2910 flow_dv_jump_tbl_resource_register
2911                         (struct rte_eth_dev *dev __rte_unused,
2912                          struct mlx5_flow_tbl_resource *tbl,
2913                          struct mlx5_flow *dev_flow,
2914                          struct rte_flow_error *error __rte_unused)
2915 {
2916         struct mlx5_flow_tbl_data_entry *tbl_data =
2917                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
2918
2919         MLX5_ASSERT(tbl);
2920         MLX5_ASSERT(tbl_data->jump.action);
2921         dev_flow->handle->rix_jump = tbl_data->idx;
2922         dev_flow->dv.jump = &tbl_data->jump;
2923         return 0;
2924 }
2925
2926 int
2927 flow_dv_port_id_match_cb(struct mlx5_cache_list *list __rte_unused,
2928                          struct mlx5_cache_entry *entry, void *cb_ctx)
2929 {
2930         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2931         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
2932         struct mlx5_flow_dv_port_id_action_resource *res =
2933                         container_of(entry, typeof(*res), entry);
2934
2935         return ref->port_id != res->port_id;
2936 }
2937
2938 struct mlx5_cache_entry *
2939 flow_dv_port_id_create_cb(struct mlx5_cache_list *list,
2940                           struct mlx5_cache_entry *entry __rte_unused,
2941                           void *cb_ctx)
2942 {
2943         struct mlx5_dev_ctx_shared *sh = list->ctx;
2944         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2945         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
2946         struct mlx5_flow_dv_port_id_action_resource *cache;
2947         uint32_t idx;
2948         int ret;
2949
2950         /* Register new port id action resource. */
2951         cache = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
2952         if (!cache) {
2953                 rte_flow_error_set(ctx->error, ENOMEM,
2954                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2955                                    "cannot allocate port_id action cache memory");
2956                 return NULL;
2957         }
2958         *cache = *ref;
2959         ret = mlx5_flow_os_create_flow_action_dest_port(sh->fdb_domain,
2960                                                         ref->port_id,
2961                                                         &cache->action);
2962         if (ret) {
2963                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], idx);
2964                 rte_flow_error_set(ctx->error, ENOMEM,
2965                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2966                                    "cannot create action");
2967                 return NULL;
2968         }
2969         return &cache->entry;
2970 }
2971
2972 /**
2973  * Find existing table port ID resource or create and register a new one.
2974  *
2975  * @param[in, out] dev
2976  *   Pointer to rte_eth_dev structure.
2977  * @param[in, out] resource
2978  *   Pointer to port ID action resource.
2979  * @parm[in, out] dev_flow
2980  *   Pointer to the dev_flow.
2981  * @param[out] error
2982  *   pointer to error structure.
2983  *
2984  * @return
2985  *   0 on success otherwise -errno and errno is set.
2986  */
2987 static int
2988 flow_dv_port_id_action_resource_register
2989                         (struct rte_eth_dev *dev,
2990                          struct mlx5_flow_dv_port_id_action_resource *resource,
2991                          struct mlx5_flow *dev_flow,
2992                          struct rte_flow_error *error)
2993 {
2994         struct mlx5_priv *priv = dev->data->dev_private;
2995         struct mlx5_cache_entry *entry;
2996         struct mlx5_flow_dv_port_id_action_resource *cache;
2997         struct mlx5_flow_cb_ctx ctx = {
2998                 .error = error,
2999                 .data = resource,
3000         };
3001
3002         entry = mlx5_cache_register(&priv->sh->port_id_action_list, &ctx);
3003         if (!entry)
3004                 return -rte_errno;
3005         cache = container_of(entry, typeof(*cache), entry);
3006         dev_flow->dv.port_id_action = cache;
3007         dev_flow->handle->rix_port_id_action = cache->idx;
3008         return 0;
3009 }
3010
3011 int
3012 flow_dv_push_vlan_match_cb(struct mlx5_cache_list *list __rte_unused,
3013                          struct mlx5_cache_entry *entry, void *cb_ctx)
3014 {
3015         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3016         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3017         struct mlx5_flow_dv_push_vlan_action_resource *res =
3018                         container_of(entry, typeof(*res), entry);
3019
3020         return ref->vlan_tag != res->vlan_tag || ref->ft_type != res->ft_type;
3021 }
3022
3023 struct mlx5_cache_entry *
3024 flow_dv_push_vlan_create_cb(struct mlx5_cache_list *list,
3025                           struct mlx5_cache_entry *entry __rte_unused,
3026                           void *cb_ctx)
3027 {
3028         struct mlx5_dev_ctx_shared *sh = list->ctx;
3029         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3030         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3031         struct mlx5_flow_dv_push_vlan_action_resource *cache;
3032         struct mlx5dv_dr_domain *domain;
3033         uint32_t idx;
3034         int ret;
3035
3036         /* Register new port id action resource. */
3037         cache = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3038         if (!cache) {
3039                 rte_flow_error_set(ctx->error, ENOMEM,
3040                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3041                                    "cannot allocate push_vlan action cache memory");
3042                 return NULL;
3043         }
3044         *cache = *ref;
3045         if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3046                 domain = sh->fdb_domain;
3047         else if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3048                 domain = sh->rx_domain;
3049         else
3050                 domain = sh->tx_domain;
3051         ret = mlx5_flow_os_create_flow_action_push_vlan(domain, ref->vlan_tag,
3052                                                         &cache->action);
3053         if (ret) {
3054                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
3055                 rte_flow_error_set(ctx->error, ENOMEM,
3056                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3057                                    "cannot create push vlan action");
3058                 return NULL;
3059         }
3060         return &cache->entry;
3061 }
3062
3063 /**
3064  * Find existing push vlan resource or create and register a new one.
3065  *
3066  * @param [in, out] dev
3067  *   Pointer to rte_eth_dev structure.
3068  * @param[in, out] resource
3069  *   Pointer to port ID action resource.
3070  * @parm[in, out] dev_flow
3071  *   Pointer to the dev_flow.
3072  * @param[out] error
3073  *   pointer to error structure.
3074  *
3075  * @return
3076  *   0 on success otherwise -errno and errno is set.
3077  */
3078 static int
3079 flow_dv_push_vlan_action_resource_register
3080                        (struct rte_eth_dev *dev,
3081                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
3082                         struct mlx5_flow *dev_flow,
3083                         struct rte_flow_error *error)
3084 {
3085         struct mlx5_priv *priv = dev->data->dev_private;
3086         struct mlx5_flow_dv_push_vlan_action_resource *cache;
3087         struct mlx5_cache_entry *entry;
3088         struct mlx5_flow_cb_ctx ctx = {
3089                 .error = error,
3090                 .data = resource,
3091         };
3092
3093         entry = mlx5_cache_register(&priv->sh->push_vlan_action_list, &ctx);
3094         if (!entry)
3095                 return -rte_errno;
3096         cache = container_of(entry, typeof(*cache), entry);
3097
3098         dev_flow->handle->dvh.rix_push_vlan = cache->idx;
3099         dev_flow->dv.push_vlan_res = cache;
3100         return 0;
3101 }
3102
3103 /**
3104  * Get the size of specific rte_flow_item_type hdr size
3105  *
3106  * @param[in] item_type
3107  *   Tested rte_flow_item_type.
3108  *
3109  * @return
3110  *   sizeof struct item_type, 0 if void or irrelevant.
3111  */
3112 static size_t
3113 flow_dv_get_item_hdr_len(const enum rte_flow_item_type item_type)
3114 {
3115         size_t retval;
3116
3117         switch (item_type) {
3118         case RTE_FLOW_ITEM_TYPE_ETH:
3119                 retval = sizeof(struct rte_ether_hdr);
3120                 break;
3121         case RTE_FLOW_ITEM_TYPE_VLAN:
3122                 retval = sizeof(struct rte_vlan_hdr);
3123                 break;
3124         case RTE_FLOW_ITEM_TYPE_IPV4:
3125                 retval = sizeof(struct rte_ipv4_hdr);
3126                 break;
3127         case RTE_FLOW_ITEM_TYPE_IPV6:
3128                 retval = sizeof(struct rte_ipv6_hdr);
3129                 break;
3130         case RTE_FLOW_ITEM_TYPE_UDP:
3131                 retval = sizeof(struct rte_udp_hdr);
3132                 break;
3133         case RTE_FLOW_ITEM_TYPE_TCP:
3134                 retval = sizeof(struct rte_tcp_hdr);
3135                 break;
3136         case RTE_FLOW_ITEM_TYPE_VXLAN:
3137         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
3138                 retval = sizeof(struct rte_vxlan_hdr);
3139                 break;
3140         case RTE_FLOW_ITEM_TYPE_GRE:
3141         case RTE_FLOW_ITEM_TYPE_NVGRE:
3142                 retval = sizeof(struct rte_gre_hdr);
3143                 break;
3144         case RTE_FLOW_ITEM_TYPE_MPLS:
3145                 retval = sizeof(struct rte_mpls_hdr);
3146                 break;
3147         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
3148         default:
3149                 retval = 0;
3150                 break;
3151         }
3152         return retval;
3153 }
3154
3155 #define MLX5_ENCAP_IPV4_VERSION         0x40
3156 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
3157 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
3158 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
3159 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
3160 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
3161 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
3162
3163 /**
3164  * Convert the encap action data from list of rte_flow_item to raw buffer
3165  *
3166  * @param[in] items
3167  *   Pointer to rte_flow_item objects list.
3168  * @param[out] buf
3169  *   Pointer to the output buffer.
3170  * @param[out] size
3171  *   Pointer to the output buffer size.
3172  * @param[out] error
3173  *   Pointer to the error structure.
3174  *
3175  * @return
3176  *   0 on success, a negative errno value otherwise and rte_errno is set.
3177  */
3178 static int
3179 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
3180                            size_t *size, struct rte_flow_error *error)
3181 {
3182         struct rte_ether_hdr *eth = NULL;
3183         struct rte_vlan_hdr *vlan = NULL;
3184         struct rte_ipv4_hdr *ipv4 = NULL;
3185         struct rte_ipv6_hdr *ipv6 = NULL;
3186         struct rte_udp_hdr *udp = NULL;
3187         struct rte_vxlan_hdr *vxlan = NULL;
3188         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
3189         struct rte_gre_hdr *gre = NULL;
3190         size_t len;
3191         size_t temp_size = 0;
3192
3193         if (!items)
3194                 return rte_flow_error_set(error, EINVAL,
3195                                           RTE_FLOW_ERROR_TYPE_ACTION,
3196                                           NULL, "invalid empty data");
3197         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
3198                 len = flow_dv_get_item_hdr_len(items->type);
3199                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
3200                         return rte_flow_error_set(error, EINVAL,
3201                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3202                                                   (void *)items->type,
3203                                                   "items total size is too big"
3204                                                   " for encap action");
3205                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
3206                 switch (items->type) {
3207                 case RTE_FLOW_ITEM_TYPE_ETH:
3208                         eth = (struct rte_ether_hdr *)&buf[temp_size];
3209                         break;
3210                 case RTE_FLOW_ITEM_TYPE_VLAN:
3211                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
3212                         if (!eth)
3213                                 return rte_flow_error_set(error, EINVAL,
3214                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3215                                                 (void *)items->type,
3216                                                 "eth header not found");
3217                         if (!eth->ether_type)
3218                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
3219                         break;
3220                 case RTE_FLOW_ITEM_TYPE_IPV4:
3221                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
3222                         if (!vlan && !eth)
3223                                 return rte_flow_error_set(error, EINVAL,
3224                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3225                                                 (void *)items->type,
3226                                                 "neither eth nor vlan"
3227                                                 " header found");
3228                         if (vlan && !vlan->eth_proto)
3229                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
3230                         else if (eth && !eth->ether_type)
3231                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
3232                         if (!ipv4->version_ihl)
3233                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
3234                                                     MLX5_ENCAP_IPV4_IHL_MIN;
3235                         if (!ipv4->time_to_live)
3236                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
3237                         break;
3238                 case RTE_FLOW_ITEM_TYPE_IPV6:
3239                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
3240                         if (!vlan && !eth)
3241                                 return rte_flow_error_set(error, EINVAL,
3242                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3243                                                 (void *)items->type,
3244                                                 "neither eth nor vlan"
3245                                                 " header found");
3246                         if (vlan && !vlan->eth_proto)
3247                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
3248                         else if (eth && !eth->ether_type)
3249                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
3250                         if (!ipv6->vtc_flow)
3251                                 ipv6->vtc_flow =
3252                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
3253                         if (!ipv6->hop_limits)
3254                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
3255                         break;
3256                 case RTE_FLOW_ITEM_TYPE_UDP:
3257                         udp = (struct rte_udp_hdr *)&buf[temp_size];
3258                         if (!ipv4 && !ipv6)
3259                                 return rte_flow_error_set(error, EINVAL,
3260                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3261                                                 (void *)items->type,
3262                                                 "ip header not found");
3263                         if (ipv4 && !ipv4->next_proto_id)
3264                                 ipv4->next_proto_id = IPPROTO_UDP;
3265                         else if (ipv6 && !ipv6->proto)
3266                                 ipv6->proto = IPPROTO_UDP;
3267                         break;
3268                 case RTE_FLOW_ITEM_TYPE_VXLAN:
3269                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
3270                         if (!udp)
3271                                 return rte_flow_error_set(error, EINVAL,
3272                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3273                                                 (void *)items->type,
3274                                                 "udp header not found");
3275                         if (!udp->dst_port)
3276                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
3277                         if (!vxlan->vx_flags)
3278                                 vxlan->vx_flags =
3279                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
3280                         break;
3281                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
3282                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
3283                         if (!udp)
3284                                 return rte_flow_error_set(error, EINVAL,
3285                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3286                                                 (void *)items->type,
3287                                                 "udp header not found");
3288                         if (!vxlan_gpe->proto)
3289                                 return rte_flow_error_set(error, EINVAL,
3290                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3291                                                 (void *)items->type,
3292                                                 "next protocol not found");
3293                         if (!udp->dst_port)
3294                                 udp->dst_port =
3295                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
3296                         if (!vxlan_gpe->vx_flags)
3297                                 vxlan_gpe->vx_flags =
3298                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
3299                         break;
3300                 case RTE_FLOW_ITEM_TYPE_GRE:
3301                 case RTE_FLOW_ITEM_TYPE_NVGRE:
3302                         gre = (struct rte_gre_hdr *)&buf[temp_size];
3303                         if (!gre->proto)
3304                                 return rte_flow_error_set(error, EINVAL,
3305                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3306                                                 (void *)items->type,
3307                                                 "next protocol not found");
3308                         if (!ipv4 && !ipv6)
3309                                 return rte_flow_error_set(error, EINVAL,
3310                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3311                                                 (void *)items->type,
3312                                                 "ip header not found");
3313                         if (ipv4 && !ipv4->next_proto_id)
3314                                 ipv4->next_proto_id = IPPROTO_GRE;
3315                         else if (ipv6 && !ipv6->proto)
3316                                 ipv6->proto = IPPROTO_GRE;
3317                         break;
3318                 case RTE_FLOW_ITEM_TYPE_VOID:
3319                         break;
3320                 default:
3321                         return rte_flow_error_set(error, EINVAL,
3322                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3323                                                   (void *)items->type,
3324                                                   "unsupported item type");
3325                         break;
3326                 }
3327                 temp_size += len;
3328         }
3329         *size = temp_size;
3330         return 0;
3331 }
3332
3333 static int
3334 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
3335 {
3336         struct rte_ether_hdr *eth = NULL;
3337         struct rte_vlan_hdr *vlan = NULL;
3338         struct rte_ipv6_hdr *ipv6 = NULL;
3339         struct rte_udp_hdr *udp = NULL;
3340         char *next_hdr;
3341         uint16_t proto;
3342
3343         eth = (struct rte_ether_hdr *)data;
3344         next_hdr = (char *)(eth + 1);
3345         proto = RTE_BE16(eth->ether_type);
3346
3347         /* VLAN skipping */
3348         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
3349                 vlan = (struct rte_vlan_hdr *)next_hdr;
3350                 proto = RTE_BE16(vlan->eth_proto);
3351                 next_hdr += sizeof(struct rte_vlan_hdr);
3352         }
3353
3354         /* HW calculates IPv4 csum. no need to proceed */
3355         if (proto == RTE_ETHER_TYPE_IPV4)
3356                 return 0;
3357
3358         /* non IPv4/IPv6 header. not supported */
3359         if (proto != RTE_ETHER_TYPE_IPV6) {
3360                 return rte_flow_error_set(error, ENOTSUP,
3361                                           RTE_FLOW_ERROR_TYPE_ACTION,
3362                                           NULL, "Cannot offload non IPv4/IPv6");
3363         }
3364
3365         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
3366
3367         /* ignore non UDP */
3368         if (ipv6->proto != IPPROTO_UDP)
3369                 return 0;
3370
3371         udp = (struct rte_udp_hdr *)(ipv6 + 1);
3372         udp->dgram_cksum = 0;
3373
3374         return 0;
3375 }
3376
3377 /**
3378  * Convert L2 encap action to DV specification.
3379  *
3380  * @param[in] dev
3381  *   Pointer to rte_eth_dev structure.
3382  * @param[in] action
3383  *   Pointer to action structure.
3384  * @param[in, out] dev_flow
3385  *   Pointer to the mlx5_flow.
3386  * @param[in] transfer
3387  *   Mark if the flow is E-Switch flow.
3388  * @param[out] error
3389  *   Pointer to the error structure.
3390  *
3391  * @return
3392  *   0 on success, a negative errno value otherwise and rte_errno is set.
3393  */
3394 static int
3395 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
3396                                const struct rte_flow_action *action,
3397                                struct mlx5_flow *dev_flow,
3398                                uint8_t transfer,
3399                                struct rte_flow_error *error)
3400 {
3401         const struct rte_flow_item *encap_data;
3402         const struct rte_flow_action_raw_encap *raw_encap_data;
3403         struct mlx5_flow_dv_encap_decap_resource res = {
3404                 .reformat_type =
3405                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
3406                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
3407                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
3408         };
3409
3410         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
3411                 raw_encap_data =
3412                         (const struct rte_flow_action_raw_encap *)action->conf;
3413                 res.size = raw_encap_data->size;
3414                 memcpy(res.buf, raw_encap_data->data, res.size);
3415         } else {
3416                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
3417                         encap_data =
3418                                 ((const struct rte_flow_action_vxlan_encap *)
3419                                                 action->conf)->definition;
3420                 else
3421                         encap_data =
3422                                 ((const struct rte_flow_action_nvgre_encap *)
3423                                                 action->conf)->definition;
3424                 if (flow_dv_convert_encap_data(encap_data, res.buf,
3425                                                &res.size, error))
3426                         return -rte_errno;
3427         }
3428         if (flow_dv_zero_encap_udp_csum(res.buf, error))
3429                 return -rte_errno;
3430         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
3431                 return rte_flow_error_set(error, EINVAL,
3432                                           RTE_FLOW_ERROR_TYPE_ACTION,
3433                                           NULL, "can't create L2 encap action");
3434         return 0;
3435 }
3436
3437 /**
3438  * Convert L2 decap action to DV specification.
3439  *
3440  * @param[in] dev
3441  *   Pointer to rte_eth_dev structure.
3442  * @param[in, out] dev_flow
3443  *   Pointer to the mlx5_flow.
3444  * @param[in] transfer
3445  *   Mark if the flow is E-Switch flow.
3446  * @param[out] error
3447  *   Pointer to the error structure.
3448  *
3449  * @return
3450  *   0 on success, a negative errno value otherwise and rte_errno is set.
3451  */
3452 static int
3453 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
3454                                struct mlx5_flow *dev_flow,
3455                                uint8_t transfer,
3456                                struct rte_flow_error *error)
3457 {
3458         struct mlx5_flow_dv_encap_decap_resource res = {
3459                 .size = 0,
3460                 .reformat_type =
3461                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
3462                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
3463                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
3464         };
3465
3466         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
3467                 return rte_flow_error_set(error, EINVAL,
3468                                           RTE_FLOW_ERROR_TYPE_ACTION,
3469                                           NULL, "can't create L2 decap action");
3470         return 0;
3471 }
3472
3473 /**
3474  * Convert raw decap/encap (L3 tunnel) action to DV specification.
3475  *
3476  * @param[in] dev
3477  *   Pointer to rte_eth_dev structure.
3478  * @param[in] action
3479  *   Pointer to action structure.
3480  * @param[in, out] dev_flow
3481  *   Pointer to the mlx5_flow.
3482  * @param[in] attr
3483  *   Pointer to the flow attributes.
3484  * @param[out] error
3485  *   Pointer to the error structure.
3486  *
3487  * @return
3488  *   0 on success, a negative errno value otherwise and rte_errno is set.
3489  */
3490 static int
3491 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
3492                                 const struct rte_flow_action *action,
3493                                 struct mlx5_flow *dev_flow,
3494                                 const struct rte_flow_attr *attr,
3495                                 struct rte_flow_error *error)
3496 {
3497         const struct rte_flow_action_raw_encap *encap_data;
3498         struct mlx5_flow_dv_encap_decap_resource res;
3499
3500         memset(&res, 0, sizeof(res));
3501         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
3502         res.size = encap_data->size;
3503         memcpy(res.buf, encap_data->data, res.size);
3504         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
3505                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
3506                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
3507         if (attr->transfer)
3508                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3509         else
3510                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3511                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3512         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
3513                 return rte_flow_error_set(error, EINVAL,
3514                                           RTE_FLOW_ERROR_TYPE_ACTION,
3515                                           NULL, "can't create encap action");
3516         return 0;
3517 }
3518
3519 /**
3520  * Create action push VLAN.
3521  *
3522  * @param[in] dev
3523  *   Pointer to rte_eth_dev structure.
3524  * @param[in] attr
3525  *   Pointer to the flow attributes.
3526  * @param[in] vlan
3527  *   Pointer to the vlan to push to the Ethernet header.
3528  * @param[in, out] dev_flow
3529  *   Pointer to the mlx5_flow.
3530  * @param[out] error
3531  *   Pointer to the error structure.
3532  *
3533  * @return
3534  *   0 on success, a negative errno value otherwise and rte_errno is set.
3535  */
3536 static int
3537 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
3538                                 const struct rte_flow_attr *attr,
3539                                 const struct rte_vlan_hdr *vlan,
3540                                 struct mlx5_flow *dev_flow,
3541                                 struct rte_flow_error *error)
3542 {
3543         struct mlx5_flow_dv_push_vlan_action_resource res;
3544
3545         memset(&res, 0, sizeof(res));
3546         res.vlan_tag =
3547                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
3548                                  vlan->vlan_tci);
3549         if (attr->transfer)
3550                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3551         else
3552                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3553                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3554         return flow_dv_push_vlan_action_resource_register
3555                                             (dev, &res, dev_flow, error);
3556 }
3557
3558 static int fdb_mirror;
3559
3560 /**
3561  * Validate the modify-header actions.
3562  *
3563  * @param[in] action_flags
3564  *   Holds the actions detected until now.
3565  * @param[in] action
3566  *   Pointer to the modify action.
3567  * @param[out] error
3568  *   Pointer to error structure.
3569  *
3570  * @return
3571  *   0 on success, a negative errno value otherwise and rte_errno is set.
3572  */
3573 static int
3574 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
3575                                    const struct rte_flow_action *action,
3576                                    struct rte_flow_error *error)
3577 {
3578         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
3579                 return rte_flow_error_set(error, EINVAL,
3580                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3581                                           NULL, "action configuration not set");
3582         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3583                 return rte_flow_error_set(error, EINVAL,
3584                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3585                                           "can't have encap action before"
3586                                           " modify action");
3587         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) && fdb_mirror)
3588                 return rte_flow_error_set(error, EINVAL,
3589                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3590                                           "can't support sample action before"
3591                                           " modify action for E-Switch"
3592                                           " mirroring");
3593         return 0;
3594 }
3595
3596 /**
3597  * Validate the modify-header MAC address actions.
3598  *
3599  * @param[in] action_flags
3600  *   Holds the actions detected until now.
3601  * @param[in] action
3602  *   Pointer to the modify action.
3603  * @param[in] item_flags
3604  *   Holds the items detected.
3605  * @param[out] error
3606  *   Pointer to error structure.
3607  *
3608  * @return
3609  *   0 on success, a negative errno value otherwise and rte_errno is set.
3610  */
3611 static int
3612 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
3613                                    const struct rte_flow_action *action,
3614                                    const uint64_t item_flags,
3615                                    struct rte_flow_error *error)
3616 {
3617         int ret = 0;
3618
3619         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3620         if (!ret) {
3621                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
3622                         return rte_flow_error_set(error, EINVAL,
3623                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3624                                                   NULL,
3625                                                   "no L2 item in pattern");
3626         }
3627         return ret;
3628 }
3629
3630 /**
3631  * Validate the modify-header IPv4 address actions.
3632  *
3633  * @param[in] action_flags
3634  *   Holds the actions detected until now.
3635  * @param[in] action
3636  *   Pointer to the modify action.
3637  * @param[in] item_flags
3638  *   Holds the items detected.
3639  * @param[out] error
3640  *   Pointer to error structure.
3641  *
3642  * @return
3643  *   0 on success, a negative errno value otherwise and rte_errno is set.
3644  */
3645 static int
3646 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
3647                                     const struct rte_flow_action *action,
3648                                     const uint64_t item_flags,
3649                                     struct rte_flow_error *error)
3650 {
3651         int ret = 0;
3652         uint64_t layer;
3653
3654         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3655         if (!ret) {
3656                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3657                                  MLX5_FLOW_LAYER_INNER_L3_IPV4 :
3658                                  MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3659                 if (!(item_flags & layer))
3660                         return rte_flow_error_set(error, EINVAL,
3661                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3662                                                   NULL,
3663                                                   "no ipv4 item in pattern");
3664         }
3665         return ret;
3666 }
3667
3668 /**
3669  * Validate the modify-header IPv6 address actions.
3670  *
3671  * @param[in] action_flags
3672  *   Holds the actions detected until now.
3673  * @param[in] action
3674  *   Pointer to the modify action.
3675  * @param[in] item_flags
3676  *   Holds the items detected.
3677  * @param[out] error
3678  *   Pointer to error structure.
3679  *
3680  * @return
3681  *   0 on success, a negative errno value otherwise and rte_errno is set.
3682  */
3683 static int
3684 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
3685                                     const struct rte_flow_action *action,
3686                                     const uint64_t item_flags,
3687                                     struct rte_flow_error *error)
3688 {
3689         int ret = 0;
3690         uint64_t layer;
3691
3692         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3693         if (!ret) {
3694                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3695                                  MLX5_FLOW_LAYER_INNER_L3_IPV6 :
3696                                  MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3697                 if (!(item_flags & layer))
3698                         return rte_flow_error_set(error, EINVAL,
3699                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3700                                                   NULL,
3701                                                   "no ipv6 item in pattern");
3702         }
3703         return ret;
3704 }
3705
3706 /**
3707  * Validate the modify-header TP actions.
3708  *
3709  * @param[in] action_flags
3710  *   Holds the actions detected until now.
3711  * @param[in] action
3712  *   Pointer to the modify action.
3713  * @param[in] item_flags
3714  *   Holds the items detected.
3715  * @param[out] error
3716  *   Pointer to error structure.
3717  *
3718  * @return
3719  *   0 on success, a negative errno value otherwise and rte_errno is set.
3720  */
3721 static int
3722 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
3723                                   const struct rte_flow_action *action,
3724                                   const uint64_t item_flags,
3725                                   struct rte_flow_error *error)
3726 {
3727         int ret = 0;
3728         uint64_t layer;
3729
3730         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3731         if (!ret) {
3732                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3733                                  MLX5_FLOW_LAYER_INNER_L4 :
3734                                  MLX5_FLOW_LAYER_OUTER_L4;
3735                 if (!(item_flags & layer))
3736                         return rte_flow_error_set(error, EINVAL,
3737                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3738                                                   NULL, "no transport layer "
3739                                                   "in pattern");
3740         }
3741         return ret;
3742 }
3743
3744 /**
3745  * Validate the modify-header actions of increment/decrement
3746  * TCP Sequence-number.
3747  *
3748  * @param[in] action_flags
3749  *   Holds the actions detected until now.
3750  * @param[in] action
3751  *   Pointer to the modify action.
3752  * @param[in] item_flags
3753  *   Holds the items detected.
3754  * @param[out] error
3755  *   Pointer to error structure.
3756  *
3757  * @return
3758  *   0 on success, a negative errno value otherwise and rte_errno is set.
3759  */
3760 static int
3761 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
3762                                        const struct rte_flow_action *action,
3763                                        const uint64_t item_flags,
3764                                        struct rte_flow_error *error)
3765 {
3766         int ret = 0;
3767         uint64_t layer;
3768
3769         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3770         if (!ret) {
3771                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3772                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
3773                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
3774                 if (!(item_flags & layer))
3775                         return rte_flow_error_set(error, EINVAL,
3776                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3777                                                   NULL, "no TCP item in"
3778                                                   " pattern");
3779                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
3780                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
3781                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
3782                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
3783                         return rte_flow_error_set(error, EINVAL,
3784                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3785                                                   NULL,
3786                                                   "cannot decrease and increase"
3787                                                   " TCP sequence number"
3788                                                   " at the same time");
3789         }
3790         return ret;
3791 }
3792
3793 /**
3794  * Validate the modify-header actions of increment/decrement
3795  * TCP Acknowledgment number.
3796  *
3797  * @param[in] action_flags
3798  *   Holds the actions detected until now.
3799  * @param[in] action
3800  *   Pointer to the modify action.
3801  * @param[in] item_flags
3802  *   Holds the items detected.
3803  * @param[out] error
3804  *   Pointer to error structure.
3805  *
3806  * @return
3807  *   0 on success, a negative errno value otherwise and rte_errno is set.
3808  */
3809 static int
3810 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
3811                                        const struct rte_flow_action *action,
3812                                        const uint64_t item_flags,
3813                                        struct rte_flow_error *error)
3814 {
3815         int ret = 0;
3816         uint64_t layer;
3817
3818         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3819         if (!ret) {
3820                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3821                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
3822                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
3823                 if (!(item_flags & layer))
3824                         return rte_flow_error_set(error, EINVAL,
3825                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3826                                                   NULL, "no TCP item in"
3827                                                   " pattern");
3828                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
3829                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
3830                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
3831                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
3832                         return rte_flow_error_set(error, EINVAL,
3833                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3834                                                   NULL,
3835                                                   "cannot decrease and increase"
3836                                                   " TCP acknowledgment number"
3837                                                   " at the same time");
3838         }
3839         return ret;
3840 }
3841
3842 /**
3843  * Validate the modify-header TTL actions.
3844  *
3845  * @param[in] action_flags
3846  *   Holds the actions detected until now.
3847  * @param[in] action
3848  *   Pointer to the modify action.
3849  * @param[in] item_flags
3850  *   Holds the items detected.
3851  * @param[out] error
3852  *   Pointer to error structure.
3853  *
3854  * @return
3855  *   0 on success, a negative errno value otherwise and rte_errno is set.
3856  */
3857 static int
3858 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
3859                                    const struct rte_flow_action *action,
3860                                    const uint64_t item_flags,
3861                                    struct rte_flow_error *error)
3862 {
3863         int ret = 0;
3864         uint64_t layer;
3865
3866         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3867         if (!ret) {
3868                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3869                                  MLX5_FLOW_LAYER_INNER_L3 :
3870                                  MLX5_FLOW_LAYER_OUTER_L3;
3871                 if (!(item_flags & layer))
3872                         return rte_flow_error_set(error, EINVAL,
3873                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3874                                                   NULL,
3875                                                   "no IP protocol in pattern");
3876         }
3877         return ret;
3878 }
3879
3880 /**
3881  * Validate jump action.
3882  *
3883  * @param[in] action
3884  *   Pointer to the jump action.
3885  * @param[in] action_flags
3886  *   Holds the actions detected until now.
3887  * @param[in] attributes
3888  *   Pointer to flow attributes
3889  * @param[in] external
3890  *   Action belongs to flow rule created by request external to PMD.
3891  * @param[out] error
3892  *   Pointer to error structure.
3893  *
3894  * @return
3895  *   0 on success, a negative errno value otherwise and rte_errno is set.
3896  */
3897 static int
3898 flow_dv_validate_action_jump(struct rte_eth_dev *dev,
3899                              const struct mlx5_flow_tunnel *tunnel,
3900                              const struct rte_flow_action *action,
3901                              uint64_t action_flags,
3902                              const struct rte_flow_attr *attributes,
3903                              bool external, struct rte_flow_error *error)
3904 {
3905         uint32_t target_group, table;
3906         int ret = 0;
3907         struct flow_grp_info grp_info = {
3908                 .external = !!external,
3909                 .transfer = !!attributes->transfer,
3910                 .fdb_def_rule = 1,
3911                 .std_tbl_fix = 0
3912         };
3913         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3914                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3915                 return rte_flow_error_set(error, EINVAL,
3916                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3917                                           "can't have 2 fate actions in"
3918                                           " same flow");
3919         if (action_flags & MLX5_FLOW_ACTION_METER)
3920                 return rte_flow_error_set(error, ENOTSUP,
3921                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3922                                           "jump with meter not support");
3923         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) && fdb_mirror)
3924                 return rte_flow_error_set(error, EINVAL,
3925                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3926                                           "E-Switch mirroring can't support"
3927                                           " Sample action and jump action in"
3928                                           " same flow now");
3929         if (!action->conf)
3930                 return rte_flow_error_set(error, EINVAL,
3931                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3932                                           NULL, "action configuration not set");
3933         target_group =
3934                 ((const struct rte_flow_action_jump *)action->conf)->group;
3935         ret = mlx5_flow_group_to_table(dev, tunnel, target_group, &table,
3936                                        grp_info, error);
3937         if (ret)
3938                 return ret;
3939         if (attributes->group == target_group &&
3940             !(action_flags & (MLX5_FLOW_ACTION_TUNNEL_SET |
3941                               MLX5_FLOW_ACTION_TUNNEL_MATCH)))
3942                 return rte_flow_error_set(error, EINVAL,
3943                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3944                                           "target group must be other than"
3945                                           " the current flow group");
3946         return 0;
3947 }
3948
3949 /*
3950  * Validate the port_id action.
3951  *
3952  * @param[in] dev
3953  *   Pointer to rte_eth_dev structure.
3954  * @param[in] action_flags
3955  *   Bit-fields that holds the actions detected until now.
3956  * @param[in] action
3957  *   Port_id RTE action structure.
3958  * @param[in] attr
3959  *   Attributes of flow that includes this action.
3960  * @param[out] error
3961  *   Pointer to error structure.
3962  *
3963  * @return
3964  *   0 on success, a negative errno value otherwise and rte_errno is set.
3965  */
3966 static int
3967 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
3968                                 uint64_t action_flags,
3969                                 const struct rte_flow_action *action,
3970                                 const struct rte_flow_attr *attr,
3971                                 struct rte_flow_error *error)
3972 {
3973         const struct rte_flow_action_port_id *port_id;
3974         struct mlx5_priv *act_priv;
3975         struct mlx5_priv *dev_priv;
3976         uint16_t port;
3977
3978         if (!attr->transfer)
3979                 return rte_flow_error_set(error, ENOTSUP,
3980                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3981                                           NULL,
3982                                           "port id action is valid in transfer"
3983                                           " mode only");
3984         if (!action || !action->conf)
3985                 return rte_flow_error_set(error, ENOTSUP,
3986                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3987                                           NULL,
3988                                           "port id action parameters must be"
3989                                           " specified");
3990         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3991                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3992                 return rte_flow_error_set(error, EINVAL,
3993                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3994                                           "can have only one fate actions in"
3995                                           " a flow");
3996         dev_priv = mlx5_dev_to_eswitch_info(dev);
3997         if (!dev_priv)
3998                 return rte_flow_error_set(error, rte_errno,
3999                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4000                                           NULL,
4001                                           "failed to obtain E-Switch info");
4002         port_id = action->conf;
4003         port = port_id->original ? dev->data->port_id : port_id->id;
4004         act_priv = mlx5_port_to_eswitch_info(port, false);
4005         if (!act_priv)
4006                 return rte_flow_error_set
4007                                 (error, rte_errno,
4008                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
4009                                  "failed to obtain E-Switch port id for port");
4010         if (act_priv->domain_id != dev_priv->domain_id)
4011                 return rte_flow_error_set
4012                                 (error, EINVAL,
4013                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4014                                  "port does not belong to"
4015                                  " E-Switch being configured");
4016         return 0;
4017 }
4018
4019 /**
4020  * Get the maximum number of modify header actions.
4021  *
4022  * @param dev
4023  *   Pointer to rte_eth_dev structure.
4024  * @param flags
4025  *   Flags bits to check if root level.
4026  *
4027  * @return
4028  *   Max number of modify header actions device can support.
4029  */
4030 static inline unsigned int
4031 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev __rte_unused,
4032                               uint64_t flags)
4033 {
4034         /*
4035          * There's no way to directly query the max capacity from FW.
4036          * The maximal value on root table should be assumed to be supported.
4037          */
4038         if (!(flags & MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL))
4039                 return MLX5_MAX_MODIFY_NUM;
4040         else
4041                 return MLX5_ROOT_TBL_MODIFY_NUM;
4042 }
4043
4044 /**
4045  * Validate the meter action.
4046  *
4047  * @param[in] dev
4048  *   Pointer to rte_eth_dev structure.
4049  * @param[in] action_flags
4050  *   Bit-fields that holds the actions detected until now.
4051  * @param[in] action
4052  *   Pointer to the meter action.
4053  * @param[in] attr
4054  *   Attributes of flow that includes this action.
4055  * @param[out] error
4056  *   Pointer to error structure.
4057  *
4058  * @return
4059  *   0 on success, a negative errno value otherwise and rte_ernno is set.
4060  */
4061 static int
4062 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
4063                                 uint64_t action_flags,
4064                                 const struct rte_flow_action *action,
4065                                 const struct rte_flow_attr *attr,
4066                                 struct rte_flow_error *error)
4067 {
4068         struct mlx5_priv *priv = dev->data->dev_private;
4069         const struct rte_flow_action_meter *am = action->conf;
4070         struct mlx5_flow_meter *fm;
4071
4072         if (!am)
4073                 return rte_flow_error_set(error, EINVAL,
4074                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4075                                           "meter action conf is NULL");
4076
4077         if (action_flags & MLX5_FLOW_ACTION_METER)
4078                 return rte_flow_error_set(error, ENOTSUP,
4079                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4080                                           "meter chaining not support");
4081         if (action_flags & MLX5_FLOW_ACTION_JUMP)
4082                 return rte_flow_error_set(error, ENOTSUP,
4083                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4084                                           "meter with jump not support");
4085         if (!priv->mtr_en)
4086                 return rte_flow_error_set(error, ENOTSUP,
4087                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4088                                           NULL,
4089                                           "meter action not supported");
4090         fm = mlx5_flow_meter_find(priv, am->mtr_id);
4091         if (!fm)
4092                 return rte_flow_error_set(error, EINVAL,
4093                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4094                                           "Meter not found");
4095         if (fm->ref_cnt && (!(fm->transfer == attr->transfer ||
4096               (!fm->ingress && !attr->ingress && attr->egress) ||
4097               (!fm->egress && !attr->egress && attr->ingress))))
4098                 return rte_flow_error_set(error, EINVAL,
4099                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4100                                           "Flow attributes are either invalid "
4101                                           "or have a conflict with current "
4102                                           "meter attributes");
4103         return 0;
4104 }
4105
4106 /**
4107  * Validate the age action.
4108  *
4109  * @param[in] action_flags
4110  *   Holds the actions detected until now.
4111  * @param[in] action
4112  *   Pointer to the age action.
4113  * @param[in] dev
4114  *   Pointer to the Ethernet device structure.
4115  * @param[out] error
4116  *   Pointer to error structure.
4117  *
4118  * @return
4119  *   0 on success, a negative errno value otherwise and rte_errno is set.
4120  */
4121 static int
4122 flow_dv_validate_action_age(uint64_t action_flags,
4123                             const struct rte_flow_action *action,
4124                             struct rte_eth_dev *dev,
4125                             struct rte_flow_error *error)
4126 {
4127         struct mlx5_priv *priv = dev->data->dev_private;
4128         const struct rte_flow_action_age *age = action->conf;
4129
4130         if (!priv->config.devx || (priv->sh->cmng.counter_fallback &&
4131             !priv->sh->aso_age_mng))
4132                 return rte_flow_error_set(error, ENOTSUP,
4133                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4134                                           NULL,
4135                                           "age action not supported");
4136         if (!(action->conf))
4137                 return rte_flow_error_set(error, EINVAL,
4138                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
4139                                           "configuration cannot be null");
4140         if (!(age->timeout))
4141                 return rte_flow_error_set(error, EINVAL,
4142                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
4143                                           "invalid timeout value 0");
4144         if (action_flags & MLX5_FLOW_ACTION_AGE)
4145                 return rte_flow_error_set(error, EINVAL,
4146                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4147                                           "duplicate age actions set");
4148         return 0;
4149 }
4150
4151 /**
4152  * Validate the modify-header IPv4 DSCP actions.
4153  *
4154  * @param[in] action_flags
4155  *   Holds the actions detected until now.
4156  * @param[in] action
4157  *   Pointer to the modify action.
4158  * @param[in] item_flags
4159  *   Holds the items detected.
4160  * @param[out] error
4161  *   Pointer to error structure.
4162  *
4163  * @return
4164  *   0 on success, a negative errno value otherwise and rte_errno is set.
4165  */
4166 static int
4167 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
4168                                          const struct rte_flow_action *action,
4169                                          const uint64_t item_flags,
4170                                          struct rte_flow_error *error)
4171 {
4172         int ret = 0;
4173
4174         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4175         if (!ret) {
4176                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
4177                         return rte_flow_error_set(error, EINVAL,
4178                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4179                                                   NULL,
4180                                                   "no ipv4 item in pattern");
4181         }
4182         return ret;
4183 }
4184
4185 /**
4186  * Validate the modify-header IPv6 DSCP actions.
4187  *
4188  * @param[in] action_flags
4189  *   Holds the actions detected until now.
4190  * @param[in] action
4191  *   Pointer to the modify action.
4192  * @param[in] item_flags
4193  *   Holds the items detected.
4194  * @param[out] error
4195  *   Pointer to error structure.
4196  *
4197  * @return
4198  *   0 on success, a negative errno value otherwise and rte_errno is set.
4199  */
4200 static int
4201 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
4202                                          const struct rte_flow_action *action,
4203                                          const uint64_t item_flags,
4204                                          struct rte_flow_error *error)
4205 {
4206         int ret = 0;
4207
4208         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4209         if (!ret) {
4210                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
4211                         return rte_flow_error_set(error, EINVAL,
4212                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4213                                                   NULL,
4214                                                   "no ipv6 item in pattern");
4215         }
4216         return ret;
4217 }
4218
4219 /**
4220  * Match modify-header resource.
4221  *
4222  * @param list
4223  *   Pointer to the hash list.
4224  * @param entry
4225  *   Pointer to exist resource entry object.
4226  * @param key
4227  *   Key of the new entry.
4228  * @param ctx
4229  *   Pointer to new modify-header resource.
4230  *
4231  * @return
4232  *   0 on matching, non-zero otherwise.
4233  */
4234 int
4235 flow_dv_modify_match_cb(struct mlx5_hlist *list __rte_unused,
4236                         struct mlx5_hlist_entry *entry,
4237                         uint64_t key __rte_unused, void *cb_ctx)
4238 {
4239         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4240         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
4241         struct mlx5_flow_dv_modify_hdr_resource *resource =
4242                         container_of(entry, typeof(*resource), entry);
4243         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
4244
4245         key_len += ref->actions_num * sizeof(ref->actions[0]);
4246         return ref->actions_num != resource->actions_num ||
4247                memcmp(&ref->ft_type, &resource->ft_type, key_len);
4248 }
4249
4250 struct mlx5_hlist_entry *
4251 flow_dv_modify_create_cb(struct mlx5_hlist *list, uint64_t key __rte_unused,
4252                          void *cb_ctx)
4253 {
4254         struct mlx5_dev_ctx_shared *sh = list->ctx;
4255         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4256         struct mlx5dv_dr_domain *ns;
4257         struct mlx5_flow_dv_modify_hdr_resource *entry;
4258         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
4259         int ret;
4260         uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
4261         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
4262
4263         entry = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*entry) + data_len, 0,
4264                             SOCKET_ID_ANY);
4265         if (!entry) {
4266                 rte_flow_error_set(ctx->error, ENOMEM,
4267                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4268                                    "cannot allocate resource memory");
4269                 return NULL;
4270         }
4271         rte_memcpy(&entry->ft_type,
4272                    RTE_PTR_ADD(ref, offsetof(typeof(*ref), ft_type)),
4273                    key_len + data_len);
4274         if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
4275                 ns = sh->fdb_domain;
4276         else if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
4277                 ns = sh->tx_domain;
4278         else
4279                 ns = sh->rx_domain;
4280         ret = mlx5_flow_os_create_flow_action_modify_header
4281                                         (sh->ctx, ns, entry,
4282                                          data_len, &entry->action);
4283         if (ret) {
4284                 mlx5_free(entry);
4285                 rte_flow_error_set(ctx->error, ENOMEM,
4286                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4287                                    NULL, "cannot create modification action");
4288                 return NULL;
4289         }
4290         return &entry->entry;
4291 }
4292
4293 /**
4294  * Validate the sample action.
4295  *
4296  * @param[in] action_flags
4297  *   Holds the actions detected until now.
4298  * @param[in] action
4299  *   Pointer to the sample action.
4300  * @param[in] dev
4301  *   Pointer to the Ethernet device structure.
4302  * @param[in] attr
4303  *   Attributes of flow that includes this action.
4304  * @param[out] error
4305  *   Pointer to error structure.
4306  *
4307  * @return
4308  *   0 on success, a negative errno value otherwise and rte_errno is set.
4309  */
4310 static int
4311 flow_dv_validate_action_sample(uint64_t action_flags,
4312                                const struct rte_flow_action *action,
4313                                struct rte_eth_dev *dev,
4314                                const struct rte_flow_attr *attr,
4315                                struct rte_flow_error *error)
4316 {
4317         struct mlx5_priv *priv = dev->data->dev_private;
4318         struct mlx5_dev_config *dev_conf = &priv->config;
4319         const struct rte_flow_action_sample *sample = action->conf;
4320         const struct rte_flow_action *act;
4321         uint64_t sub_action_flags = 0;
4322         uint16_t queue_index = 0xFFFF;
4323         int actions_n = 0;
4324         int ret;
4325         fdb_mirror = 0;
4326
4327         if (!sample)
4328                 return rte_flow_error_set(error, EINVAL,
4329                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
4330                                           "configuration cannot be NULL");
4331         if (sample->ratio == 0)
4332                 return rte_flow_error_set(error, EINVAL,
4333                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
4334                                           "ratio value starts from 1");
4335         if (!priv->config.devx || (sample->ratio > 0 && !priv->sampler_en))
4336                 return rte_flow_error_set(error, ENOTSUP,
4337                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4338                                           NULL,
4339                                           "sample action not supported");
4340         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
4341                 return rte_flow_error_set(error, EINVAL,
4342                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4343                                           "Multiple sample actions not "
4344                                           "supported");
4345         if (action_flags & MLX5_FLOW_ACTION_METER)
4346                 return rte_flow_error_set(error, EINVAL,
4347                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
4348                                           "wrong action order, meter should "
4349                                           "be after sample action");
4350         if (action_flags & MLX5_FLOW_ACTION_JUMP)
4351                 return rte_flow_error_set(error, EINVAL,
4352                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
4353                                           "wrong action order, jump should "
4354                                           "be after sample action");
4355         act = sample->actions;
4356         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
4357                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
4358                         return rte_flow_error_set(error, ENOTSUP,
4359                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4360                                                   act, "too many actions");
4361                 switch (act->type) {
4362                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4363                         ret = mlx5_flow_validate_action_queue(act,
4364                                                               sub_action_flags,
4365                                                               dev,
4366                                                               attr, error);
4367                         if (ret < 0)
4368                                 return ret;
4369                         queue_index = ((const struct rte_flow_action_queue *)
4370                                                         (act->conf))->index;
4371                         sub_action_flags |= MLX5_FLOW_ACTION_QUEUE;
4372                         ++actions_n;
4373                         break;
4374                 case RTE_FLOW_ACTION_TYPE_MARK:
4375                         ret = flow_dv_validate_action_mark(dev, act,
4376                                                            sub_action_flags,
4377                                                            attr, error);
4378                         if (ret < 0)
4379                                 return ret;
4380                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
4381                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK |
4382                                                 MLX5_FLOW_ACTION_MARK_EXT;
4383                         else
4384                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK;
4385                         ++actions_n;
4386                         break;
4387                 case RTE_FLOW_ACTION_TYPE_COUNT:
4388                         ret = flow_dv_validate_action_count(dev, error);
4389                         if (ret < 0)
4390                                 return ret;
4391                         sub_action_flags |= MLX5_FLOW_ACTION_COUNT;
4392                         ++actions_n;
4393                         break;
4394                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4395                         ret = flow_dv_validate_action_port_id(dev,
4396                                                               sub_action_flags,
4397                                                               act,
4398                                                               attr,
4399                                                               error);
4400                         if (ret)
4401                                 return ret;
4402                         sub_action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4403                         ++actions_n;
4404                         break;
4405                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4406                         ret = flow_dv_validate_action_raw_encap_decap
4407                                 (dev, NULL, act->conf, attr, &sub_action_flags,
4408                                  &actions_n, error);
4409                         if (ret < 0)
4410                                 return ret;
4411                         ++actions_n;
4412                         break;
4413                 default:
4414                         return rte_flow_error_set(error, ENOTSUP,
4415                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4416                                                   NULL,
4417                                                   "Doesn't support optional "
4418                                                   "action");
4419                 }
4420         }
4421         if (attr->ingress && !attr->transfer) {
4422                 if (!(sub_action_flags & MLX5_FLOW_ACTION_QUEUE))
4423                         return rte_flow_error_set(error, EINVAL,
4424                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4425                                                   NULL,
4426                                                   "Ingress must has a dest "
4427                                                   "QUEUE for Sample");
4428         } else if (attr->egress && !attr->transfer) {
4429                 return rte_flow_error_set(error, ENOTSUP,
4430                                           RTE_FLOW_ERROR_TYPE_ACTION,
4431                                           NULL,
4432                                           "Sample Only support Ingress "
4433                                           "or E-Switch");
4434         } else if (sample->actions->type != RTE_FLOW_ACTION_TYPE_END) {
4435                 MLX5_ASSERT(attr->transfer);
4436                 if (sample->ratio > 1)
4437                         return rte_flow_error_set(error, ENOTSUP,
4438                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4439                                                   NULL,
4440                                                   "E-Switch doesn't support "
4441                                                   "any optional action "
4442                                                   "for sampling");
4443                 fdb_mirror = 1;
4444                 if (sub_action_flags & MLX5_FLOW_ACTION_QUEUE)
4445                         return rte_flow_error_set(error, ENOTSUP,
4446                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4447                                                   NULL,
4448                                                   "unsupported action QUEUE");
4449                 if (!(sub_action_flags & MLX5_FLOW_ACTION_PORT_ID))
4450                         return rte_flow_error_set(error, EINVAL,
4451                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4452                                                   NULL,
4453                                                   "E-Switch must has a dest "
4454                                                   "port for mirroring");
4455         }
4456         /* Continue validation for Xcap actions.*/
4457         if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) &&
4458             (queue_index == 0xFFFF ||
4459              mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
4460                 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
4461                      MLX5_FLOW_XCAP_ACTIONS)
4462                         return rte_flow_error_set(error, ENOTSUP,
4463                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4464                                                   NULL, "encap and decap "
4465                                                   "combination aren't "
4466                                                   "supported");
4467                 if (!attr->transfer && attr->ingress && (sub_action_flags &
4468                                                         MLX5_FLOW_ACTION_ENCAP))
4469                         return rte_flow_error_set(error, ENOTSUP,
4470                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4471                                                   NULL, "encap is not supported"
4472                                                   " for ingress traffic");
4473         }
4474         return 0;
4475 }
4476
4477 /**
4478  * Find existing modify-header resource or create and register a new one.
4479  *
4480  * @param dev[in, out]
4481  *   Pointer to rte_eth_dev structure.
4482  * @param[in, out] resource
4483  *   Pointer to modify-header resource.
4484  * @parm[in, out] dev_flow
4485  *   Pointer to the dev_flow.
4486  * @param[out] error
4487  *   pointer to error structure.
4488  *
4489  * @return
4490  *   0 on success otherwise -errno and errno is set.
4491  */
4492 static int
4493 flow_dv_modify_hdr_resource_register
4494                         (struct rte_eth_dev *dev,
4495                          struct mlx5_flow_dv_modify_hdr_resource *resource,
4496                          struct mlx5_flow *dev_flow,
4497                          struct rte_flow_error *error)
4498 {
4499         struct mlx5_priv *priv = dev->data->dev_private;
4500         struct mlx5_dev_ctx_shared *sh = priv->sh;
4501         uint32_t key_len = sizeof(*resource) -
4502                            offsetof(typeof(*resource), ft_type) +
4503                            resource->actions_num * sizeof(resource->actions[0]);
4504         struct mlx5_hlist_entry *entry;
4505         struct mlx5_flow_cb_ctx ctx = {
4506                 .error = error,
4507                 .data = resource,
4508         };
4509
4510         resource->flags = dev_flow->dv.group ? 0 :
4511                           MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
4512         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
4513                                     resource->flags))
4514                 return rte_flow_error_set(error, EOVERFLOW,
4515                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4516                                           "too many modify header items");
4517         resource->entry.key = __rte_raw_cksum(&resource->ft_type, key_len, 0);
4518         entry = mlx5_hlist_register(sh->modify_cmds, resource->entry.key, &ctx);
4519         if (!entry)
4520                 return -rte_errno;
4521         resource = container_of(entry, typeof(*resource), entry);
4522         dev_flow->handle->dvh.modify_hdr = resource;
4523         return 0;
4524 }
4525
4526 /**
4527  * Get DV flow counter by index.
4528  *
4529  * @param[in] dev
4530  *   Pointer to the Ethernet device structure.
4531  * @param[in] idx
4532  *   mlx5 flow counter index in the container.
4533  * @param[out] ppool
4534  *   mlx5 flow counter pool in the container,
4535  *
4536  * @return
4537  *   Pointer to the counter, NULL otherwise.
4538  */
4539 static struct mlx5_flow_counter *
4540 flow_dv_counter_get_by_idx(struct rte_eth_dev *dev,
4541                            uint32_t idx,
4542                            struct mlx5_flow_counter_pool **ppool)
4543 {
4544         struct mlx5_priv *priv = dev->data->dev_private;
4545         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
4546         struct mlx5_flow_counter_pool *pool;
4547
4548         /* Decrease to original index and clear shared bit. */
4549         idx = (idx - 1) & (MLX5_CNT_SHARED_OFFSET - 1);
4550         MLX5_ASSERT(idx / MLX5_COUNTERS_PER_POOL < cmng->n);
4551         pool = cmng->pools[idx / MLX5_COUNTERS_PER_POOL];
4552         MLX5_ASSERT(pool);
4553         if (ppool)
4554                 *ppool = pool;
4555         return MLX5_POOL_GET_CNT(pool, idx % MLX5_COUNTERS_PER_POOL);
4556 }
4557
4558 /**
4559  * Check the devx counter belongs to the pool.
4560  *
4561  * @param[in] pool
4562  *   Pointer to the counter pool.
4563  * @param[in] id
4564  *   The counter devx ID.
4565  *
4566  * @return
4567  *   True if counter belongs to the pool, false otherwise.
4568  */
4569 static bool
4570 flow_dv_is_counter_in_pool(struct mlx5_flow_counter_pool *pool, int id)
4571 {
4572         int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
4573                    MLX5_COUNTERS_PER_POOL;
4574
4575         if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
4576                 return true;
4577         return false;
4578 }
4579
4580 /**
4581  * Get a pool by devx counter ID.
4582  *
4583  * @param[in] cmng
4584  *   Pointer to the counter management.
4585  * @param[in] id
4586  *   The counter devx ID.
4587  *
4588  * @return
4589  *   The counter pool pointer if exists, NULL otherwise,
4590  */
4591 static struct mlx5_flow_counter_pool *
4592 flow_dv_find_pool_by_id(struct mlx5_flow_counter_mng *cmng, int id)
4593 {
4594         uint32_t i;
4595         struct mlx5_flow_counter_pool *pool = NULL;
4596
4597         rte_spinlock_lock(&cmng->pool_update_sl);
4598         /* Check last used pool. */
4599         if (cmng->last_pool_idx != POOL_IDX_INVALID &&
4600             flow_dv_is_counter_in_pool(cmng->pools[cmng->last_pool_idx], id)) {
4601                 pool = cmng->pools[cmng->last_pool_idx];
4602                 goto out;
4603         }
4604         /* ID out of range means no suitable pool in the container. */
4605         if (id > cmng->max_id || id < cmng->min_id)
4606                 goto out;
4607         /*
4608          * Find the pool from the end of the container, since mostly counter
4609          * ID is sequence increasing, and the last pool should be the needed
4610          * one.
4611          */
4612         i = cmng->n_valid;
4613         while (i--) {
4614                 struct mlx5_flow_counter_pool *pool_tmp = cmng->pools[i];
4615
4616                 if (flow_dv_is_counter_in_pool(pool_tmp, id)) {
4617                         pool = pool_tmp;
4618                         break;
4619                 }
4620         }
4621 out:
4622         rte_spinlock_unlock(&cmng->pool_update_sl);
4623         return pool;
4624 }
4625
4626 /**
4627  * Resize a counter container.
4628  *
4629  * @param[in] dev
4630  *   Pointer to the Ethernet device structure.
4631  *
4632  * @return
4633  *   0 on success, otherwise negative errno value and rte_errno is set.
4634  */
4635 static int
4636 flow_dv_container_resize(struct rte_eth_dev *dev)
4637 {
4638         struct mlx5_priv *priv = dev->data->dev_private;
4639         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
4640         void *old_pools = cmng->pools;
4641         uint32_t resize = cmng->n + MLX5_CNT_CONTAINER_RESIZE;
4642         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
4643         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
4644
4645         if (!pools) {
4646                 rte_errno = ENOMEM;
4647                 return -ENOMEM;
4648         }
4649         if (old_pools)
4650                 memcpy(pools, old_pools, cmng->n *
4651                                        sizeof(struct mlx5_flow_counter_pool *));
4652         cmng->n = resize;
4653         cmng->pools = pools;
4654         if (old_pools)
4655                 mlx5_free(old_pools);
4656         return 0;
4657 }
4658
4659 /**
4660  * Query a devx flow counter.
4661  *
4662  * @param[in] dev
4663  *   Pointer to the Ethernet device structure.
4664  * @param[in] cnt
4665  *   Index to the flow counter.
4666  * @param[out] pkts
4667  *   The statistics value of packets.
4668  * @param[out] bytes
4669  *   The statistics value of bytes.
4670  *
4671  * @return
4672  *   0 on success, otherwise a negative errno value and rte_errno is set.
4673  */
4674 static inline int
4675 _flow_dv_query_count(struct rte_eth_dev *dev, uint32_t counter, uint64_t *pkts,
4676                      uint64_t *bytes)
4677 {
4678         struct mlx5_priv *priv = dev->data->dev_private;
4679         struct mlx5_flow_counter_pool *pool = NULL;
4680         struct mlx5_flow_counter *cnt;
4681         int offset;
4682
4683         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
4684         MLX5_ASSERT(pool);
4685         if (priv->sh->cmng.counter_fallback)
4686                 return mlx5_devx_cmd_flow_counter_query(cnt->dcs_when_active, 0,
4687                                         0, pkts, bytes, 0, NULL, NULL, 0);
4688         rte_spinlock_lock(&pool->sl);
4689         if (!pool->raw) {
4690                 *pkts = 0;
4691                 *bytes = 0;
4692         } else {
4693                 offset = MLX5_CNT_ARRAY_IDX(pool, cnt);
4694                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
4695                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
4696         }
4697         rte_spinlock_unlock(&pool->sl);
4698         return 0;
4699 }
4700
4701 /**
4702  * Create and initialize a new counter pool.
4703  *
4704  * @param[in] dev
4705  *   Pointer to the Ethernet device structure.
4706  * @param[out] dcs
4707  *   The devX counter handle.
4708  * @param[in] age
4709  *   Whether the pool is for counter that was allocated for aging.
4710  * @param[in/out] cont_cur
4711  *   Pointer to the container pointer, it will be update in pool resize.
4712  *
4713  * @return
4714  *   The pool container pointer on success, NULL otherwise and rte_errno is set.
4715  */
4716 static struct mlx5_flow_counter_pool *
4717 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
4718                     uint32_t age)
4719 {
4720         struct mlx5_priv *priv = dev->data->dev_private;
4721         struct mlx5_flow_counter_pool *pool;
4722         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
4723         bool fallback = priv->sh->cmng.counter_fallback;
4724         uint32_t size = sizeof(*pool);
4725
4726         size += MLX5_COUNTERS_PER_POOL * MLX5_CNT_SIZE;
4727         size += (!age ? 0 : MLX5_COUNTERS_PER_POOL * MLX5_AGE_SIZE);
4728         pool = mlx5_malloc(MLX5_MEM_ZERO, size, 0, SOCKET_ID_ANY);
4729         if (!pool) {
4730                 rte_errno = ENOMEM;
4731                 return NULL;
4732         }
4733         pool->raw = NULL;
4734         pool->is_aged = !!age;
4735         pool->query_gen = 0;
4736         pool->min_dcs = dcs;
4737         rte_spinlock_init(&pool->sl);
4738         rte_spinlock_init(&pool->csl);
4739         TAILQ_INIT(&pool->counters[0]);
4740         TAILQ_INIT(&pool->counters[1]);
4741         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
4742         rte_spinlock_lock(&cmng->pool_update_sl);
4743         pool->index = cmng->n_valid;
4744         if (pool->index == cmng->n && flow_dv_container_resize(dev)) {
4745                 mlx5_free(pool);
4746                 rte_spinlock_unlock(&cmng->pool_update_sl);
4747                 return NULL;
4748         }
4749         cmng->pools[pool->index] = pool;
4750         cmng->n_valid++;
4751         if (unlikely(fallback)) {
4752                 int base = RTE_ALIGN_FLOOR(dcs->id, MLX5_COUNTERS_PER_POOL);
4753
4754                 if (base < cmng->min_id)
4755                         cmng->min_id = base;
4756                 if (base > cmng->max_id)
4757                         cmng->max_id = base + MLX5_COUNTERS_PER_POOL - 1;
4758                 cmng->last_pool_idx = pool->index;
4759         }
4760         rte_spinlock_unlock(&cmng->pool_update_sl);
4761         return pool;
4762 }
4763
4764 /**
4765  * Prepare a new counter and/or a new counter pool.
4766  *
4767  * @param[in] dev
4768  *   Pointer to the Ethernet device structure.
4769  * @param[out] cnt_free
4770  *   Where to put the pointer of a new counter.
4771  * @param[in] age
4772  *   Whether the pool is for counter that was allocated for aging.
4773  *
4774  * @return
4775  *   The counter pool pointer and @p cnt_free is set on success,
4776  *   NULL otherwise and rte_errno is set.
4777  */
4778 static struct mlx5_flow_counter_pool *
4779 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
4780                              struct mlx5_flow_counter **cnt_free,
4781                              uint32_t age)
4782 {
4783         struct mlx5_priv *priv = dev->data->dev_private;
4784         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
4785         struct mlx5_flow_counter_pool *pool;
4786         struct mlx5_counters tmp_tq;
4787         struct mlx5_devx_obj *dcs = NULL;
4788         struct mlx5_flow_counter *cnt;
4789         enum mlx5_counter_type cnt_type =
4790                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
4791         bool fallback = priv->sh->cmng.counter_fallback;
4792         uint32_t i;
4793
4794         if (fallback) {
4795                 /* bulk_bitmap must be 0 for single counter allocation. */
4796                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
4797                 if (!dcs)
4798                         return NULL;
4799                 pool = flow_dv_find_pool_by_id(cmng, dcs->id);
4800                 if (!pool) {
4801                         pool = flow_dv_pool_create(dev, dcs, age);
4802                         if (!pool) {
4803                                 mlx5_devx_cmd_destroy(dcs);
4804                                 return NULL;
4805                         }
4806                 }
4807                 i = dcs->id % MLX5_COUNTERS_PER_POOL;
4808                 cnt = MLX5_POOL_GET_CNT(pool, i);
4809                 cnt->pool = pool;
4810                 cnt->dcs_when_free = dcs;
4811                 *cnt_free = cnt;
4812                 return pool;
4813         }
4814         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
4815         if (!dcs) {
4816                 rte_errno = ENODATA;
4817                 return NULL;
4818         }
4819         pool = flow_dv_pool_create(dev, dcs, age);
4820         if (!pool) {
4821                 mlx5_devx_cmd_destroy(dcs);
4822                 return NULL;
4823         }
4824         TAILQ_INIT(&tmp_tq);
4825         for (i = 1; i < MLX5_COUNTERS_PER_POOL; ++i) {
4826                 cnt = MLX5_POOL_GET_CNT(pool, i);
4827                 cnt->pool = pool;
4828                 TAILQ_INSERT_HEAD(&tmp_tq, cnt, next);
4829         }
4830         rte_spinlock_lock(&cmng->csl[cnt_type]);
4831         TAILQ_CONCAT(&cmng->counters[cnt_type], &tmp_tq, next);
4832         rte_spinlock_unlock(&cmng->csl[cnt_type]);
4833         *cnt_free = MLX5_POOL_GET_CNT(pool, 0);
4834         (*cnt_free)->pool = pool;
4835         return pool;
4836 }
4837
4838 /**
4839  * Allocate a flow counter.
4840  *
4841  * @param[in] dev
4842  *   Pointer to the Ethernet device structure.
4843  * @param[in] age
4844  *   Whether the counter was allocated for aging.
4845  *
4846  * @return
4847  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
4848  */
4849 static uint32_t
4850 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t age)
4851 {
4852         struct mlx5_priv *priv = dev->data->dev_private;
4853         struct mlx5_flow_counter_pool *pool = NULL;
4854         struct mlx5_flow_counter *cnt_free = NULL;
4855         bool fallback = priv->sh->cmng.counter_fallback;
4856         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
4857         enum mlx5_counter_type cnt_type =
4858                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
4859         uint32_t cnt_idx;
4860
4861         if (!priv->config.devx) {
4862                 rte_errno = ENOTSUP;
4863                 return 0;
4864         }
4865         /* Get free counters from container. */
4866         rte_spinlock_lock(&cmng->csl[cnt_type]);
4867         cnt_free = TAILQ_FIRST(&cmng->counters[cnt_type]);
4868         if (cnt_free)
4869                 TAILQ_REMOVE(&cmng->counters[cnt_type], cnt_free, next);
4870         rte_spinlock_unlock(&cmng->csl[cnt_type]);
4871         if (!cnt_free && !flow_dv_counter_pool_prepare(dev, &cnt_free, age))
4872                 goto err;
4873         pool = cnt_free->pool;
4874         if (fallback)
4875                 cnt_free->dcs_when_active = cnt_free->dcs_when_free;
4876         /* Create a DV counter action only in the first time usage. */
4877         if (!cnt_free->action) {
4878                 uint16_t offset;
4879                 struct mlx5_devx_obj *dcs;
4880                 int ret;
4881
4882                 if (!fallback) {
4883                         offset = MLX5_CNT_ARRAY_IDX(pool, cnt_free);
4884                         dcs = pool->min_dcs;
4885                 } else {
4886                         offset = 0;
4887                         dcs = cnt_free->dcs_when_free;
4888                 }
4889                 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, offset,
4890                                                             &cnt_free->action);
4891                 if (ret) {
4892                         rte_errno = errno;
4893                         goto err;
4894                 }
4895         }
4896         cnt_idx = MLX5_MAKE_CNT_IDX(pool->index,
4897                                 MLX5_CNT_ARRAY_IDX(pool, cnt_free));
4898         /* Update the counter reset values. */
4899         if (_flow_dv_query_count(dev, cnt_idx, &cnt_free->hits,
4900                                  &cnt_free->bytes))
4901                 goto err;
4902         if (!fallback && !priv->sh->cmng.query_thread_on)
4903                 /* Start the asynchronous batch query by the host thread. */
4904                 mlx5_set_query_alarm(priv->sh);
4905         return cnt_idx;
4906 err:
4907         if (cnt_free) {
4908                 cnt_free->pool = pool;
4909                 if (fallback)
4910                         cnt_free->dcs_when_free = cnt_free->dcs_when_active;
4911                 rte_spinlock_lock(&cmng->csl[cnt_type]);
4912                 TAILQ_INSERT_TAIL(&cmng->counters[cnt_type], cnt_free, next);
4913                 rte_spinlock_unlock(&cmng->csl[cnt_type]);
4914         }
4915         return 0;
4916 }
4917
4918 /**
4919  * Allocate a shared flow counter.
4920  *
4921  * @param[in] ctx
4922  *   Pointer to the shared counter configuration.
4923  * @param[in] data
4924  *   Pointer to save the allocated counter index.
4925  *
4926  * @return
4927  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
4928  */
4929
4930 static int32_t
4931 flow_dv_counter_alloc_shared_cb(void *ctx, union mlx5_l3t_data *data)
4932 {
4933         struct mlx5_shared_counter_conf *conf = ctx;
4934         struct rte_eth_dev *dev = conf->dev;
4935         struct mlx5_flow_counter *cnt;
4936
4937         data->dword = flow_dv_counter_alloc(dev, 0);
4938         data->dword |= MLX5_CNT_SHARED_OFFSET;
4939         cnt = flow_dv_counter_get_by_idx(dev, data->dword, NULL);
4940         cnt->shared_info.id = conf->id;
4941         return 0;
4942 }
4943
4944 /**
4945  * Get a shared flow counter.
4946  *
4947  * @param[in] dev
4948  *   Pointer to the Ethernet device structure.
4949  * @param[in] id
4950  *   Counter identifier.
4951  *
4952  * @return
4953  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
4954  */
4955 static uint32_t
4956 flow_dv_counter_get_shared(struct rte_eth_dev *dev, uint32_t id)
4957 {
4958         struct mlx5_priv *priv = dev->data->dev_private;
4959         struct mlx5_shared_counter_conf conf = {
4960                 .dev = dev,
4961                 .id = id,
4962         };
4963         union mlx5_l3t_data data = {
4964                 .dword = 0,
4965         };
4966
4967         mlx5_l3t_prepare_entry(priv->sh->cnt_id_tbl, id, &data,
4968                                flow_dv_counter_alloc_shared_cb, &conf);
4969         return data.dword;
4970 }
4971
4972 /**
4973  * Get age param from counter index.
4974  *
4975  * @param[in] dev
4976  *   Pointer to the Ethernet device structure.
4977  * @param[in] counter
4978  *   Index to the counter handler.
4979  *
4980  * @return
4981  *   The aging parameter specified for the counter index.
4982  */
4983 static struct mlx5_age_param*
4984 flow_dv_counter_idx_get_age(struct rte_eth_dev *dev,
4985                                 uint32_t counter)
4986 {
4987         struct mlx5_flow_counter *cnt;
4988         struct mlx5_flow_counter_pool *pool = NULL;
4989
4990         flow_dv_counter_get_by_idx(dev, counter, &pool);
4991         counter = (counter - 1) % MLX5_COUNTERS_PER_POOL;
4992         cnt = MLX5_POOL_GET_CNT(pool, counter);
4993         return MLX5_CNT_TO_AGE(cnt);
4994 }
4995
4996 /**
4997  * Remove a flow counter from aged counter list.
4998  *
4999  * @param[in] dev
5000  *   Pointer to the Ethernet device structure.
5001  * @param[in] counter
5002  *   Index to the counter handler.
5003  * @param[in] cnt
5004  *   Pointer to the counter handler.
5005  */
5006 static void
5007 flow_dv_counter_remove_from_age(struct rte_eth_dev *dev,
5008                                 uint32_t counter, struct mlx5_flow_counter *cnt)
5009 {
5010         struct mlx5_age_info *age_info;
5011         struct mlx5_age_param *age_param;
5012         struct mlx5_priv *priv = dev->data->dev_private;
5013         uint16_t expected = AGE_CANDIDATE;
5014
5015         age_info = GET_PORT_AGE_INFO(priv);
5016         age_param = flow_dv_counter_idx_get_age(dev, counter);
5017         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
5018                                          AGE_FREE, false, __ATOMIC_RELAXED,
5019                                          __ATOMIC_RELAXED)) {
5020                 /**
5021                  * We need the lock even it is age timeout,
5022                  * since counter may still in process.
5023                  */
5024                 rte_spinlock_lock(&age_info->aged_sl);
5025                 TAILQ_REMOVE(&age_info->aged_counters, cnt, next);
5026                 rte_spinlock_unlock(&age_info->aged_sl);
5027                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
5028         }
5029 }
5030
5031 /**
5032  * Release a flow counter.
5033  *
5034  * @param[in] dev
5035  *   Pointer to the Ethernet device structure.
5036  * @param[in] counter
5037  *   Index to the counter handler.
5038  */
5039 static void
5040 flow_dv_counter_free(struct rte_eth_dev *dev, uint32_t counter)
5041 {
5042         struct mlx5_priv *priv = dev->data->dev_private;
5043         struct mlx5_flow_counter_pool *pool = NULL;
5044         struct mlx5_flow_counter *cnt;
5045         enum mlx5_counter_type cnt_type;
5046
5047         if (!counter)
5048                 return;
5049         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
5050         MLX5_ASSERT(pool);
5051         if (IS_SHARED_CNT(counter) &&
5052             mlx5_l3t_clear_entry(priv->sh->cnt_id_tbl, cnt->shared_info.id))
5053                 return;
5054         if (pool->is_aged)
5055                 flow_dv_counter_remove_from_age(dev, counter, cnt);
5056         cnt->pool = pool;
5057         /*
5058          * Put the counter back to list to be updated in none fallback mode.
5059          * Currently, we are using two list alternately, while one is in query,
5060          * add the freed counter to the other list based on the pool query_gen
5061          * value. After query finishes, add counter the list to the global
5062          * container counter list. The list changes while query starts. In
5063          * this case, lock will not be needed as query callback and release
5064          * function both operate with the different list.
5065          *
5066          */
5067         if (!priv->sh->cmng.counter_fallback) {
5068                 rte_spinlock_lock(&pool->csl);
5069                 TAILQ_INSERT_TAIL(&pool->counters[pool->query_gen], cnt, next);
5070                 rte_spinlock_unlock(&pool->csl);
5071         } else {
5072                 cnt->dcs_when_free = cnt->dcs_when_active;
5073                 cnt_type = pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
5074                                            MLX5_COUNTER_TYPE_ORIGIN;
5075                 rte_spinlock_lock(&priv->sh->cmng.csl[cnt_type]);
5076                 TAILQ_INSERT_TAIL(&priv->sh->cmng.counters[cnt_type],
5077                                   cnt, next);
5078                 rte_spinlock_unlock(&priv->sh->cmng.csl[cnt_type]);
5079         }
5080 }
5081
5082 /**
5083  * Verify the @p attributes will be correctly understood by the NIC and store
5084  * them in the @p flow if everything is correct.
5085  *
5086  * @param[in] dev
5087  *   Pointer to dev struct.
5088  * @param[in] attributes
5089  *   Pointer to flow attributes
5090  * @param[in] external
5091  *   This flow rule is created by request external to PMD.
5092  * @param[out] error
5093  *   Pointer to error structure.
5094  *
5095  * @return
5096  *   - 0 on success and non root table.
5097  *   - 1 on success and root table.
5098  *   - a negative errno value otherwise and rte_errno is set.
5099  */
5100 static int
5101 flow_dv_validate_attributes(struct rte_eth_dev *dev,
5102                             const struct mlx5_flow_tunnel *tunnel,
5103                             const struct rte_flow_attr *attributes,
5104                             struct flow_grp_info grp_info,
5105                             struct rte_flow_error *error)
5106 {
5107         struct mlx5_priv *priv = dev->data->dev_private;
5108         uint32_t priority_max = priv->config.flow_prio - 1;
5109         int ret = 0;
5110
5111 #ifndef HAVE_MLX5DV_DR
5112         RTE_SET_USED(tunnel);
5113         RTE_SET_USED(grp_info);
5114         if (attributes->group)
5115                 return rte_flow_error_set(error, ENOTSUP,
5116                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
5117                                           NULL,
5118                                           "groups are not supported");
5119 #else
5120         uint32_t table = 0;
5121
5122         ret = mlx5_flow_group_to_table(dev, tunnel, attributes->group, &table,
5123                                        grp_info, error);
5124         if (ret)
5125                 return ret;
5126         if (!table)
5127                 ret = MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
5128 #endif
5129         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
5130             attributes->priority >= priority_max)
5131                 return rte_flow_error_set(error, ENOTSUP,
5132                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
5133                                           NULL,
5134                                           "priority out of range");
5135         if (attributes->transfer) {
5136                 if (!priv->config.dv_esw_en)
5137                         return rte_flow_error_set
5138                                 (error, ENOTSUP,
5139                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5140                                  "E-Switch dr is not supported");
5141                 if (!(priv->representor || priv->master))
5142                         return rte_flow_error_set
5143                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5144                                  NULL, "E-Switch configuration can only be"
5145                                  " done by a master or a representor device");
5146                 if (attributes->egress)
5147                         return rte_flow_error_set
5148                                 (error, ENOTSUP,
5149                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
5150                                  "egress is not supported");
5151         }
5152         if (!(attributes->egress ^ attributes->ingress))
5153                 return rte_flow_error_set(error, ENOTSUP,
5154                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
5155                                           "must specify exactly one of "
5156                                           "ingress or egress");
5157         return ret;
5158 }
5159
5160 /**
5161  * Internal validation function. For validating both actions and items.
5162  *
5163  * @param[in] dev
5164  *   Pointer to the rte_eth_dev structure.
5165  * @param[in] attr
5166  *   Pointer to the flow attributes.
5167  * @param[in] items
5168  *   Pointer to the list of items.
5169  * @param[in] actions
5170  *   Pointer to the list of actions.
5171  * @param[in] external
5172  *   This flow rule is created by request external to PMD.
5173  * @param[in] hairpin
5174  *   Number of hairpin TX actions, 0 means classic flow.
5175  * @param[out] error
5176  *   Pointer to the error structure.
5177  *
5178  * @return
5179  *   0 on success, a negative errno value otherwise and rte_errno is set.
5180  */
5181 static int
5182 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
5183                  const struct rte_flow_item items[],
5184                  const struct rte_flow_action actions[],
5185                  bool external, int hairpin, struct rte_flow_error *error)
5186 {
5187         int ret;
5188         uint64_t action_flags = 0;
5189         uint64_t item_flags = 0;
5190         uint64_t last_item = 0;
5191         uint8_t next_protocol = 0xff;
5192         uint16_t ether_type = 0;
5193         int actions_n = 0;
5194         uint8_t item_ipv6_proto = 0;
5195         const struct rte_flow_item *gre_item = NULL;
5196         const struct rte_flow_action_raw_decap *decap;
5197         const struct rte_flow_action_raw_encap *encap;
5198         const struct rte_flow_action_rss *rss;
5199         const struct rte_flow_item_tcp nic_tcp_mask = {
5200                 .hdr = {
5201                         .tcp_flags = 0xFF,
5202                         .src_port = RTE_BE16(UINT16_MAX),
5203                         .dst_port = RTE_BE16(UINT16_MAX),
5204                 }
5205         };
5206         const struct rte_flow_item_ipv6 nic_ipv6_mask = {
5207                 .hdr = {
5208                         .src_addr =
5209                         "\xff\xff\xff\xff\xff\xff\xff\xff"
5210                         "\xff\xff\xff\xff\xff\xff\xff\xff",
5211                         .dst_addr =
5212                         "\xff\xff\xff\xff\xff\xff\xff\xff"
5213                         "\xff\xff\xff\xff\xff\xff\xff\xff",
5214                         .vtc_flow = RTE_BE32(0xffffffff),
5215                         .proto = 0xff,
5216                         .hop_limits = 0xff,
5217                 },
5218                 .has_frag_ext = 1,
5219         };
5220         const struct rte_flow_item_ecpri nic_ecpri_mask = {
5221                 .hdr = {
5222                         .common = {
5223                                 .u32 =
5224                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
5225                                         .type = 0xFF,
5226                                         }).u32),
5227                         },
5228                         .dummy[0] = 0xffffffff,
5229                 },
5230         };
5231         struct mlx5_priv *priv = dev->data->dev_private;
5232         struct mlx5_dev_config *dev_conf = &priv->config;
5233         uint16_t queue_index = 0xFFFF;
5234         const struct rte_flow_item_vlan *vlan_m = NULL;
5235         int16_t rw_act_num = 0;
5236         uint64_t is_root;
5237         const struct mlx5_flow_tunnel *tunnel;
5238         struct flow_grp_info grp_info = {
5239                 .external = !!external,
5240                 .transfer = !!attr->transfer,
5241                 .fdb_def_rule = !!priv->fdb_def_rule,
5242         };
5243         const struct rte_eth_hairpin_conf *conf;
5244
5245         if (items == NULL)
5246                 return -1;
5247         if (is_flow_tunnel_match_rule(dev, attr, items, actions)) {
5248                 tunnel = flow_items_to_tunnel(items);
5249                 action_flags |= MLX5_FLOW_ACTION_TUNNEL_MATCH |
5250                                 MLX5_FLOW_ACTION_DECAP;
5251         } else if (is_flow_tunnel_steer_rule(dev, attr, items, actions)) {
5252                 tunnel = flow_actions_to_tunnel(actions);
5253                 action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
5254         } else {
5255                 tunnel = NULL;
5256         }
5257         grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
5258                                 (dev, tunnel, attr, items, actions);
5259         ret = flow_dv_validate_attributes(dev, tunnel, attr, grp_info, error);
5260         if (ret < 0)
5261                 return ret;
5262         is_root = (uint64_t)ret;
5263         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
5264                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
5265                 int type = items->type;
5266
5267                 if (!mlx5_flow_os_item_supported(type))
5268                         return rte_flow_error_set(error, ENOTSUP,
5269                                                   RTE_FLOW_ERROR_TYPE_ITEM,
5270                                                   NULL, "item not supported");
5271                 switch (type) {
5272                 case MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL:
5273                         if (items[0].type != (typeof(items[0].type))
5274                                                 MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL)
5275                                 return rte_flow_error_set
5276                                                 (error, EINVAL,
5277                                                 RTE_FLOW_ERROR_TYPE_ITEM,
5278                                                 NULL, "MLX5 private items "
5279                                                 "must be the first");
5280                         break;
5281                 case RTE_FLOW_ITEM_TYPE_VOID:
5282                         break;
5283                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
5284                         ret = flow_dv_validate_item_port_id
5285                                         (dev, items, attr, item_flags, error);
5286                         if (ret < 0)
5287                                 return ret;
5288                         last_item = MLX5_FLOW_ITEM_PORT_ID;
5289                         break;
5290                 case RTE_FLOW_ITEM_TYPE_ETH:
5291                         ret = mlx5_flow_validate_item_eth(items, item_flags,
5292                                                           true, error);
5293                         if (ret < 0)
5294                                 return ret;
5295                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
5296                                              MLX5_FLOW_LAYER_OUTER_L2;
5297                         if (items->mask != NULL && items->spec != NULL) {
5298                                 ether_type =
5299                                         ((const struct rte_flow_item_eth *)
5300                                          items->spec)->type;
5301                                 ether_type &=
5302                                         ((const struct rte_flow_item_eth *)
5303                                          items->mask)->type;
5304                                 ether_type = rte_be_to_cpu_16(ether_type);
5305                         } else {
5306                                 ether_type = 0;
5307                         }
5308                         break;
5309                 case RTE_FLOW_ITEM_TYPE_VLAN:
5310                         ret = flow_dv_validate_item_vlan(items, item_flags,
5311                                                          dev, error);
5312                         if (ret < 0)
5313                                 return ret;
5314                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
5315                                              MLX5_FLOW_LAYER_OUTER_VLAN;
5316                         if (items->mask != NULL && items->spec != NULL) {
5317                                 ether_type =
5318                                         ((const struct rte_flow_item_vlan *)
5319                                          items->spec)->inner_type;
5320                                 ether_type &=
5321                                         ((const struct rte_flow_item_vlan *)
5322                                          items->mask)->inner_type;
5323                                 ether_type = rte_be_to_cpu_16(ether_type);
5324                         } else {
5325                                 ether_type = 0;
5326                         }
5327                         /* Store outer VLAN mask for of_push_vlan action. */
5328                         if (!tunnel)
5329                                 vlan_m = items->mask;
5330                         break;
5331                 case RTE_FLOW_ITEM_TYPE_IPV4:
5332                         mlx5_flow_tunnel_ip_check(items, next_protocol,
5333                                                   &item_flags, &tunnel);
5334                         ret = flow_dv_validate_item_ipv4(items, item_flags,
5335                                                          last_item, ether_type,
5336                                                          error);
5337                         if (ret < 0)
5338                                 return ret;
5339                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
5340                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
5341                         if (items->mask != NULL &&
5342                             ((const struct rte_flow_item_ipv4 *)
5343                              items->mask)->hdr.next_proto_id) {
5344                                 next_protocol =
5345                                         ((const struct rte_flow_item_ipv4 *)
5346                                          (items->spec))->hdr.next_proto_id;
5347                                 next_protocol &=
5348                                         ((const struct rte_flow_item_ipv4 *)
5349                                          (items->mask))->hdr.next_proto_id;
5350                         } else {
5351                                 /* Reset for inner layer. */
5352                                 next_protocol = 0xff;
5353                         }
5354                         break;
5355                 case RTE_FLOW_ITEM_TYPE_IPV6:
5356                         mlx5_flow_tunnel_ip_check(items, next_protocol,
5357                                                   &item_flags, &tunnel);
5358                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
5359                                                            last_item,
5360                                                            ether_type,
5361                                                            &nic_ipv6_mask,
5362                                                            error);
5363                         if (ret < 0)
5364                                 return ret;
5365                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
5366                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
5367                         if (items->mask != NULL &&
5368                             ((const struct rte_flow_item_ipv6 *)
5369                              items->mask)->hdr.proto) {
5370                                 item_ipv6_proto =
5371                                         ((const struct rte_flow_item_ipv6 *)
5372                                          items->spec)->hdr.proto;
5373                                 next_protocol =
5374                                         ((const struct rte_flow_item_ipv6 *)
5375                                          items->spec)->hdr.proto;
5376                                 next_protocol &=
5377                                         ((const struct rte_flow_item_ipv6 *)
5378                                          items->mask)->hdr.proto;
5379                         } else {
5380                                 /* Reset for inner layer. */
5381                                 next_protocol = 0xff;
5382                         }
5383                         break;
5384                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
5385                         ret = flow_dv_validate_item_ipv6_frag_ext(items,
5386                                                                   item_flags,
5387                                                                   error);
5388                         if (ret < 0)
5389                                 return ret;
5390                         last_item = tunnel ?
5391                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
5392                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
5393                         if (items->mask != NULL &&
5394                             ((const struct rte_flow_item_ipv6_frag_ext *)
5395                              items->mask)->hdr.next_header) {
5396                                 next_protocol =
5397                                 ((const struct rte_flow_item_ipv6_frag_ext *)
5398                                  items->spec)->hdr.next_header;
5399                                 next_protocol &=
5400                                 ((const struct rte_flow_item_ipv6_frag_ext *)
5401                                  items->mask)->hdr.next_header;
5402                         } else {
5403                                 /* Reset for inner layer. */
5404                                 next_protocol = 0xff;
5405                         }
5406                         break;
5407                 case RTE_FLOW_ITEM_TYPE_TCP:
5408                         ret = mlx5_flow_validate_item_tcp
5409                                                 (items, item_flags,
5410                                                  next_protocol,
5411                                                  &nic_tcp_mask,
5412                                                  error);
5413                         if (ret < 0)
5414                                 return ret;
5415                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
5416                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
5417                         break;
5418                 case RTE_FLOW_ITEM_TYPE_UDP:
5419                         ret = mlx5_flow_validate_item_udp(items, item_flags,
5420                                                           next_protocol,
5421                                                           error);
5422                         if (ret < 0)
5423                                 return ret;
5424                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
5425                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
5426                         break;
5427                 case RTE_FLOW_ITEM_TYPE_GRE:
5428                         ret = mlx5_flow_validate_item_gre(items, item_flags,
5429                                                           next_protocol, error);
5430                         if (ret < 0)
5431                                 return ret;
5432                         gre_item = items;
5433                         last_item = MLX5_FLOW_LAYER_GRE;
5434                         break;
5435                 case RTE_FLOW_ITEM_TYPE_NVGRE:
5436                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
5437                                                             next_protocol,
5438                                                             error);
5439                         if (ret < 0)
5440                                 return ret;
5441                         last_item = MLX5_FLOW_LAYER_NVGRE;
5442                         break;
5443                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
5444                         ret = mlx5_flow_validate_item_gre_key
5445                                 (items, item_flags, gre_item, error);
5446                         if (ret < 0)
5447                                 return ret;
5448                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
5449                         break;
5450                 case RTE_FLOW_ITEM_TYPE_VXLAN:
5451                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
5452                                                             error);
5453                         if (ret < 0)
5454                                 return ret;
5455                         last_item = MLX5_FLOW_LAYER_VXLAN;
5456                         break;
5457                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
5458                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
5459                                                                 item_flags, dev,
5460                                                                 error);
5461                         if (ret < 0)
5462                                 return ret;
5463                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
5464                         break;
5465                 case RTE_FLOW_ITEM_TYPE_GENEVE:
5466                         ret = mlx5_flow_validate_item_geneve(items,
5467                                                              item_flags, dev,
5468                                                              error);
5469                         if (ret < 0)
5470                                 return ret;
5471                         last_item = MLX5_FLOW_LAYER_GENEVE;
5472                         break;
5473                 case RTE_FLOW_ITEM_TYPE_MPLS:
5474                         ret = mlx5_flow_validate_item_mpls(dev, items,
5475                                                            item_flags,
5476                                                            last_item, error);
5477                         if (ret < 0)
5478                                 return ret;
5479                         last_item = MLX5_FLOW_LAYER_MPLS;
5480                         break;
5481
5482                 case RTE_FLOW_ITEM_TYPE_MARK:
5483                         ret = flow_dv_validate_item_mark(dev, items, attr,
5484                                                          error);
5485                         if (ret < 0)
5486                                 return ret;
5487                         last_item = MLX5_FLOW_ITEM_MARK;
5488                         break;
5489                 case RTE_FLOW_ITEM_TYPE_META:
5490                         ret = flow_dv_validate_item_meta(dev, items, attr,
5491                                                          error);
5492                         if (ret < 0)
5493                                 return ret;
5494                         last_item = MLX5_FLOW_ITEM_METADATA;
5495                         break;
5496                 case RTE_FLOW_ITEM_TYPE_ICMP:
5497                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
5498                                                            next_protocol,
5499                                                            error);
5500                         if (ret < 0)
5501                                 return ret;
5502                         last_item = MLX5_FLOW_LAYER_ICMP;
5503                         break;
5504                 case RTE_FLOW_ITEM_TYPE_ICMP6:
5505                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
5506                                                             next_protocol,
5507                                                             error);
5508                         if (ret < 0)
5509                                 return ret;
5510                         item_ipv6_proto = IPPROTO_ICMPV6;
5511                         last_item = MLX5_FLOW_LAYER_ICMP6;
5512                         break;
5513                 case RTE_FLOW_ITEM_TYPE_TAG:
5514                         ret = flow_dv_validate_item_tag(dev, items,
5515                                                         attr, error);
5516                         if (ret < 0)
5517                                 return ret;
5518                         last_item = MLX5_FLOW_ITEM_TAG;
5519                         break;
5520                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
5521                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
5522                         break;
5523                 case RTE_FLOW_ITEM_TYPE_GTP:
5524                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
5525                                                         error);
5526                         if (ret < 0)
5527                                 return ret;
5528                         last_item = MLX5_FLOW_LAYER_GTP;
5529                         break;
5530                 case RTE_FLOW_ITEM_TYPE_ECPRI:
5531                         /* Capacity will be checked in the translate stage. */
5532                         ret = mlx5_flow_validate_item_ecpri(items, item_flags,
5533                                                             last_item,
5534                                                             ether_type,
5535                                                             &nic_ecpri_mask,
5536                                                             error);
5537                         if (ret < 0)
5538                                 return ret;
5539                         last_item = MLX5_FLOW_LAYER_ECPRI;
5540                         break;
5541                 default:
5542                         return rte_flow_error_set(error, ENOTSUP,
5543                                                   RTE_FLOW_ERROR_TYPE_ITEM,
5544                                                   NULL, "item not supported");
5545                 }
5546                 item_flags |= last_item;
5547         }
5548         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5549                 int type = actions->type;
5550
5551                 if (!mlx5_flow_os_action_supported(type))
5552                         return rte_flow_error_set(error, ENOTSUP,
5553                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5554                                                   actions,
5555                                                   "action not supported");
5556                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
5557                         return rte_flow_error_set(error, ENOTSUP,
5558                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5559                                                   actions, "too many actions");
5560                 switch (type) {
5561                 case RTE_FLOW_ACTION_TYPE_VOID:
5562                         break;
5563                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5564                         ret = flow_dv_validate_action_port_id(dev,
5565                                                               action_flags,
5566                                                               actions,
5567                                                               attr,
5568                                                               error);
5569                         if (ret)
5570                                 return ret;
5571                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
5572                         ++actions_n;
5573                         break;
5574                 case RTE_FLOW_ACTION_TYPE_FLAG:
5575                         ret = flow_dv_validate_action_flag(dev, action_flags,
5576                                                            attr, error);
5577                         if (ret < 0)
5578                                 return ret;
5579                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
5580                                 /* Count all modify-header actions as one. */
5581                                 if (!(action_flags &
5582                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
5583                                         ++actions_n;
5584                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
5585                                                 MLX5_FLOW_ACTION_MARK_EXT;
5586                         } else {
5587                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
5588                                 ++actions_n;
5589                         }
5590                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
5591                         break;
5592                 case RTE_FLOW_ACTION_TYPE_MARK:
5593                         ret = flow_dv_validate_action_mark(dev, actions,
5594                                                            action_flags,
5595                                                            attr, error);
5596                         if (ret < 0)
5597                                 return ret;
5598                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
5599                                 /* Count all modify-header actions as one. */
5600                                 if (!(action_flags &
5601                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
5602                                         ++actions_n;
5603                                 action_flags |= MLX5_FLOW_ACTION_MARK |
5604                                                 MLX5_FLOW_ACTION_MARK_EXT;
5605                         } else {
5606                                 action_flags |= MLX5_FLOW_ACTION_MARK;
5607                                 ++actions_n;
5608                         }
5609                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
5610                         break;
5611                 case RTE_FLOW_ACTION_TYPE_SET_META:
5612                         ret = flow_dv_validate_action_set_meta(dev, actions,
5613                                                                action_flags,
5614                                                                attr, error);
5615                         if (ret < 0)
5616                                 return ret;
5617                         /* Count all modify-header actions as one action. */
5618                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5619                                 ++actions_n;
5620                         action_flags |= MLX5_FLOW_ACTION_SET_META;
5621                         rw_act_num += MLX5_ACT_NUM_SET_META;
5622                         break;
5623                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
5624                         ret = flow_dv_validate_action_set_tag(dev, actions,
5625                                                               action_flags,
5626                                                               attr, error);
5627                         if (ret < 0)
5628                                 return ret;
5629                         /* Count all modify-header actions as one action. */
5630                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5631                                 ++actions_n;
5632                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
5633                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
5634                         break;
5635                 case RTE_FLOW_ACTION_TYPE_DROP:
5636                         ret = mlx5_flow_validate_action_drop(action_flags,
5637                                                              attr, error);
5638                         if (ret < 0)
5639                                 return ret;
5640                         action_flags |= MLX5_FLOW_ACTION_DROP;
5641                         ++actions_n;
5642                         break;
5643                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5644                         ret = mlx5_flow_validate_action_queue(actions,
5645                                                               action_flags, dev,
5646                                                               attr, error);
5647                         if (ret < 0)
5648                                 return ret;
5649                         queue_index = ((const struct rte_flow_action_queue *)
5650                                                         (actions->conf))->index;
5651                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
5652                         ++actions_n;
5653                         break;
5654                 case RTE_FLOW_ACTION_TYPE_RSS:
5655                         rss = actions->conf;
5656                         ret = mlx5_flow_validate_action_rss(actions,
5657                                                             action_flags, dev,
5658                                                             attr, item_flags,
5659                                                             error);
5660                         if (ret < 0)
5661                                 return ret;
5662                         if (rss != NULL && rss->queue_num)
5663                                 queue_index = rss->queue[0];
5664                         action_flags |= MLX5_FLOW_ACTION_RSS;
5665                         ++actions_n;
5666                         break;
5667                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
5668                         ret =
5669                         mlx5_flow_validate_action_default_miss(action_flags,
5670                                         attr, error);
5671                         if (ret < 0)
5672                                 return ret;
5673                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
5674                         ++actions_n;
5675                         break;
5676                 case RTE_FLOW_ACTION_TYPE_COUNT:
5677                         ret = flow_dv_validate_action_count(dev, error);
5678                         if (ret < 0)
5679                                 return ret;
5680                         action_flags |= MLX5_FLOW_ACTION_COUNT;
5681                         ++actions_n;
5682                         break;
5683                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
5684                         if (flow_dv_validate_action_pop_vlan(dev,
5685                                                              action_flags,
5686                                                              actions,
5687                                                              item_flags, attr,
5688                                                              error))
5689                                 return -rte_errno;
5690                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
5691                         ++actions_n;
5692                         break;
5693                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5694                         ret = flow_dv_validate_action_push_vlan(dev,
5695                                                                 action_flags,
5696                                                                 vlan_m,
5697                                                                 actions, attr,
5698                                                                 error);
5699                         if (ret < 0)
5700                                 return ret;
5701                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
5702                         ++actions_n;
5703                         break;
5704                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
5705                         ret = flow_dv_validate_action_set_vlan_pcp
5706                                                 (action_flags, actions, error);
5707                         if (ret < 0)
5708                                 return ret;
5709                         /* Count PCP with push_vlan command. */
5710                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
5711                         break;
5712                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
5713                         ret = flow_dv_validate_action_set_vlan_vid
5714                                                 (item_flags, action_flags,
5715                                                  actions, error);
5716                         if (ret < 0)
5717                                 return ret;
5718                         /* Count VID with push_vlan command. */
5719                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
5720                         rw_act_num += MLX5_ACT_NUM_MDF_VID;
5721                         break;
5722                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5723                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5724                         ret = flow_dv_validate_action_l2_encap(dev,
5725                                                                action_flags,
5726                                                                actions, attr,
5727                                                                error);
5728                         if (ret < 0)
5729                                 return ret;
5730                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
5731                         ++actions_n;
5732                         break;
5733                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5734                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5735                         ret = flow_dv_validate_action_decap(dev, action_flags,
5736                                                             attr, error);
5737                         if (ret < 0)
5738                                 return ret;
5739                         action_flags |= MLX5_FLOW_ACTION_DECAP;
5740                         ++actions_n;
5741                         break;
5742                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5743                         ret = flow_dv_validate_action_raw_encap_decap
5744                                 (dev, NULL, actions->conf, attr, &action_flags,
5745                                  &actions_n, error);
5746                         if (ret < 0)
5747                                 return ret;
5748                         break;
5749                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5750                         decap = actions->conf;
5751                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
5752                                 ;
5753                         if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
5754                                 encap = NULL;
5755                                 actions--;
5756                         } else {
5757                                 encap = actions->conf;
5758                         }
5759                         ret = flow_dv_validate_action_raw_encap_decap
5760                                            (dev,
5761                                             decap ? decap : &empty_decap, encap,
5762                                             attr, &action_flags, &actions_n,
5763                                             error);
5764                         if (ret < 0)
5765                                 return ret;
5766                         break;
5767                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
5768                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
5769                         ret = flow_dv_validate_action_modify_mac(action_flags,
5770                                                                  actions,
5771                                                                  item_flags,
5772                                                                  error);
5773                         if (ret < 0)
5774                                 return ret;
5775                         /* Count all modify-header actions as one action. */
5776                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5777                                 ++actions_n;
5778                         action_flags |= actions->type ==
5779                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
5780                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
5781                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
5782                         /*
5783                          * Even if the source and destination MAC addresses have
5784                          * overlap in the header with 4B alignment, the convert
5785                          * function will handle them separately and 4 SW actions
5786                          * will be created. And 2 actions will be added each
5787                          * time no matter how many bytes of address will be set.
5788                          */
5789                         rw_act_num += MLX5_ACT_NUM_MDF_MAC;
5790                         break;
5791                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
5792                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
5793                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
5794                                                                   actions,
5795                                                                   item_flags,
5796                                                                   error);
5797                         if (ret < 0)
5798                                 return ret;
5799                         /* Count all modify-header actions as one action. */
5800                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5801                                 ++actions_n;
5802                         action_flags |= actions->type ==
5803                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
5804                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
5805                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
5806                         rw_act_num += MLX5_ACT_NUM_MDF_IPV4;
5807                         break;
5808                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
5809                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
5810                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
5811                                                                   actions,
5812                                                                   item_flags,
5813                                                                   error);
5814                         if (ret < 0)
5815                                 return ret;
5816                         if (item_ipv6_proto == IPPROTO_ICMPV6)
5817                                 return rte_flow_error_set(error, ENOTSUP,
5818                                         RTE_FLOW_ERROR_TYPE_ACTION,
5819                                         actions,
5820                                         "Can't change header "
5821                                         "with ICMPv6 proto");
5822                         /* Count all modify-header actions as one action. */
5823                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5824                                 ++actions_n;
5825                         action_flags |= actions->type ==
5826                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
5827                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
5828                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
5829                         rw_act_num += MLX5_ACT_NUM_MDF_IPV6;
5830                         break;
5831                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
5832                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
5833                         ret = flow_dv_validate_action_modify_tp(action_flags,
5834                                                                 actions,
5835                                                                 item_flags,
5836                                                                 error);
5837                         if (ret < 0)
5838                                 return ret;
5839                         /* Count all modify-header actions as one action. */
5840                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5841                                 ++actions_n;
5842                         action_flags |= actions->type ==
5843                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
5844                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
5845                                                 MLX5_FLOW_ACTION_SET_TP_DST;
5846                         rw_act_num += MLX5_ACT_NUM_MDF_PORT;
5847                         break;
5848                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
5849                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
5850                         ret = flow_dv_validate_action_modify_ttl(action_flags,
5851                                                                  actions,
5852                                                                  item_flags,
5853                                                                  error);
5854                         if (ret < 0)
5855                                 return ret;
5856                         /* Count all modify-header actions as one action. */
5857                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5858                                 ++actions_n;
5859                         action_flags |= actions->type ==
5860                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
5861                                                 MLX5_FLOW_ACTION_SET_TTL :
5862                                                 MLX5_FLOW_ACTION_DEC_TTL;
5863                         rw_act_num += MLX5_ACT_NUM_MDF_TTL;
5864                         break;
5865                 case RTE_FLOW_ACTION_TYPE_JUMP:
5866                         ret = flow_dv_validate_action_jump(dev, tunnel, actions,
5867                                                            action_flags,
5868                                                            attr, external,
5869                                                            error);
5870                         if (ret)
5871                                 return ret;
5872                         ++actions_n;
5873                         action_flags |= MLX5_FLOW_ACTION_JUMP;
5874                         break;
5875                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
5876                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
5877                         ret = flow_dv_validate_action_modify_tcp_seq
5878                                                                 (action_flags,
5879                                                                  actions,
5880                                                                  item_flags,
5881                                                                  error);
5882                         if (ret < 0)
5883                                 return ret;
5884                         /* Count all modify-header actions as one action. */
5885                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5886                                 ++actions_n;
5887                         action_flags |= actions->type ==
5888                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
5889                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
5890                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
5891                         rw_act_num += MLX5_ACT_NUM_MDF_TCPSEQ;
5892                         break;
5893                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5894                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5895                         ret = flow_dv_validate_action_modify_tcp_ack
5896                                                                 (action_flags,
5897                                                                  actions,
5898                                                                  item_flags,
5899                                                                  error);
5900                         if (ret < 0)
5901                                 return ret;
5902                         /* Count all modify-header actions as one action. */
5903                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5904                                 ++actions_n;
5905                         action_flags |= actions->type ==
5906                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
5907                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
5908                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
5909                         rw_act_num += MLX5_ACT_NUM_MDF_TCPACK;
5910                         break;
5911                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
5912                         break;
5913                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
5914                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
5915                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
5916                         break;
5917                 case RTE_FLOW_ACTION_TYPE_METER:
5918                         ret = mlx5_flow_validate_action_meter(dev,
5919                                                               action_flags,
5920                                                               actions, attr,
5921                                                               error);
5922                         if (ret < 0)
5923                                 return ret;
5924                         action_flags |= MLX5_FLOW_ACTION_METER;
5925                         ++actions_n;
5926                         /* Meter action will add one more TAG action. */
5927                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
5928                         break;
5929                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
5930                         if (!attr->group)
5931                                 return rte_flow_error_set(error, ENOTSUP,
5932                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5933                                                                            NULL,
5934                           "Shared ASO age action is not supported for group 0");
5935                         action_flags |= MLX5_FLOW_ACTION_AGE;
5936                         ++actions_n;
5937                         break;
5938                 case RTE_FLOW_ACTION_TYPE_AGE:
5939                         ret = flow_dv_validate_action_age(action_flags,
5940                                                           actions, dev,
5941                                                           error);
5942                         if (ret < 0)
5943                                 return ret;
5944                         action_flags |= MLX5_FLOW_ACTION_AGE;
5945                         ++actions_n;
5946                         break;
5947                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5948                         ret = flow_dv_validate_action_modify_ipv4_dscp
5949                                                          (action_flags,
5950                                                           actions,
5951                                                           item_flags,
5952                                                           error);
5953                         if (ret < 0)
5954                                 return ret;
5955                         /* Count all modify-header actions as one action. */
5956                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5957                                 ++actions_n;
5958                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
5959                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
5960                         break;
5961                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5962                         ret = flow_dv_validate_action_modify_ipv6_dscp
5963                                                                 (action_flags,
5964                                                                  actions,
5965                                                                  item_flags,
5966                                                                  error);
5967                         if (ret < 0)
5968                                 return ret;
5969                         /* Count all modify-header actions as one action. */
5970                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5971                                 ++actions_n;
5972                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
5973                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
5974                         break;
5975                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
5976                         ret = flow_dv_validate_action_sample(action_flags,
5977                                                              actions, dev,
5978                                                              attr, error);
5979                         if (ret < 0)
5980                                 return ret;
5981                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
5982                         ++actions_n;
5983                         break;
5984                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
5985                         if (actions[0].type != (typeof(actions[0].type))
5986                                 MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET)
5987                                 return rte_flow_error_set
5988                                                 (error, EINVAL,
5989                                                 RTE_FLOW_ERROR_TYPE_ACTION,
5990                                                 NULL, "MLX5 private action "
5991                                                 "must be the first");
5992
5993                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
5994                         break;
5995                 default:
5996                         return rte_flow_error_set(error, ENOTSUP,
5997                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5998                                                   actions,
5999                                                   "action not supported");
6000                 }
6001         }
6002         /*
6003          * Validate actions in flow rules
6004          * - Explicit decap action is prohibited by the tunnel offload API.
6005          * - Drop action in tunnel steer rule is prohibited by the API.
6006          * - Application cannot use MARK action because it's value can mask
6007          *   tunnel default miss nitification.
6008          * - JUMP in tunnel match rule has no support in current PMD
6009          *   implementation.
6010          * - TAG & META are reserved for future uses.
6011          */
6012         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_SET) {
6013                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_DECAP    |
6014                                             MLX5_FLOW_ACTION_MARK     |
6015                                             MLX5_FLOW_ACTION_SET_TAG  |
6016                                             MLX5_FLOW_ACTION_SET_META |
6017                                             MLX5_FLOW_ACTION_DROP;
6018
6019                 if (action_flags & bad_actions_mask)
6020                         return rte_flow_error_set
6021                                         (error, EINVAL,
6022                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
6023                                         "Invalid RTE action in tunnel "
6024                                         "set decap rule");
6025                 if (!(action_flags & MLX5_FLOW_ACTION_JUMP))
6026                         return rte_flow_error_set
6027                                         (error, EINVAL,
6028                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
6029                                         "tunnel set decap rule must terminate "
6030                                         "with JUMP");
6031                 if (!attr->ingress)
6032                         return rte_flow_error_set
6033                                         (error, EINVAL,
6034                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
6035                                         "tunnel flows for ingress traffic only");
6036         }
6037         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_MATCH) {
6038                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_JUMP    |
6039                                             MLX5_FLOW_ACTION_MARK    |
6040                                             MLX5_FLOW_ACTION_SET_TAG |
6041                                             MLX5_FLOW_ACTION_SET_META;
6042
6043                 if (action_flags & bad_actions_mask)
6044                         return rte_flow_error_set
6045                                         (error, EINVAL,
6046                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
6047                                         "Invalid RTE action in tunnel "
6048                                         "set match rule");
6049         }
6050         /*
6051          * Validate the drop action mutual exclusion with other actions.
6052          * Drop action is mutually-exclusive with any other action, except for
6053          * Count action.
6054          */
6055         if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
6056             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
6057                 return rte_flow_error_set(error, EINVAL,
6058                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
6059                                           "Drop action is mutually-exclusive "
6060                                           "with any other action, except for "
6061                                           "Count action");
6062         /* Eswitch has few restrictions on using items and actions */
6063         if (attr->transfer) {
6064                 if (!mlx5_flow_ext_mreg_supported(dev) &&
6065                     action_flags & MLX5_FLOW_ACTION_FLAG)
6066                         return rte_flow_error_set(error, ENOTSUP,
6067                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6068                                                   NULL,
6069                                                   "unsupported action FLAG");
6070                 if (!mlx5_flow_ext_mreg_supported(dev) &&
6071                     action_flags & MLX5_FLOW_ACTION_MARK)
6072                         return rte_flow_error_set(error, ENOTSUP,
6073                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6074                                                   NULL,
6075                                                   "unsupported action MARK");
6076                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
6077                         return rte_flow_error_set(error, ENOTSUP,
6078                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6079                                                   NULL,
6080                                                   "unsupported action QUEUE");
6081                 if (action_flags & MLX5_FLOW_ACTION_RSS)
6082                         return rte_flow_error_set(error, ENOTSUP,
6083                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6084                                                   NULL,
6085                                                   "unsupported action RSS");
6086                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
6087                         return rte_flow_error_set(error, EINVAL,
6088                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6089                                                   actions,
6090                                                   "no fate action is found");
6091         } else {
6092                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
6093                         return rte_flow_error_set(error, EINVAL,
6094                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6095                                                   actions,
6096                                                   "no fate action is found");
6097         }
6098         /*
6099          * Continue validation for Xcap and VLAN actions.
6100          * If hairpin is working in explicit TX rule mode, there is no actions
6101          * splitting and the validation of hairpin ingress flow should be the
6102          * same as other standard flows.
6103          */
6104         if ((action_flags & (MLX5_FLOW_XCAP_ACTIONS |
6105                              MLX5_FLOW_VLAN_ACTIONS)) &&
6106             (queue_index == 0xFFFF ||
6107              mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN ||
6108              ((conf = mlx5_rxq_get_hairpin_conf(dev, queue_index)) != NULL &&
6109              conf->tx_explicit != 0))) {
6110                 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
6111                     MLX5_FLOW_XCAP_ACTIONS)
6112                         return rte_flow_error_set(error, ENOTSUP,
6113                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6114                                                   NULL, "encap and decap "
6115                                                   "combination aren't supported");
6116                 if (!attr->transfer && attr->ingress) {
6117                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
6118                                 return rte_flow_error_set
6119                                                 (error, ENOTSUP,
6120                                                  RTE_FLOW_ERROR_TYPE_ACTION,
6121                                                  NULL, "encap is not supported"
6122                                                  " for ingress traffic");
6123                         else if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
6124                                 return rte_flow_error_set
6125                                                 (error, ENOTSUP,
6126                                                  RTE_FLOW_ERROR_TYPE_ACTION,
6127                                                  NULL, "push VLAN action not "
6128                                                  "supported for ingress");
6129                         else if ((action_flags & MLX5_FLOW_VLAN_ACTIONS) ==
6130                                         MLX5_FLOW_VLAN_ACTIONS)
6131                                 return rte_flow_error_set
6132                                                 (error, ENOTSUP,
6133                                                  RTE_FLOW_ERROR_TYPE_ACTION,
6134                                                  NULL, "no support for "
6135                                                  "multiple VLAN actions");
6136                 }
6137         }
6138         /*
6139          * Hairpin flow will add one more TAG action in TX implicit mode.
6140          * In TX explicit mode, there will be no hairpin flow ID.
6141          */
6142         if (hairpin > 0)
6143                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
6144         /* extra metadata enabled: one more TAG action will be add. */
6145         if (dev_conf->dv_flow_en &&
6146             dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
6147             mlx5_flow_ext_mreg_supported(dev))
6148                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
6149         if ((uint32_t)rw_act_num >
6150                         flow_dv_modify_hdr_action_max(dev, is_root)) {
6151                 return rte_flow_error_set(error, ENOTSUP,
6152                                           RTE_FLOW_ERROR_TYPE_ACTION,
6153                                           NULL, "too many header modify"
6154                                           " actions to support");
6155         }
6156         return 0;
6157 }
6158
6159 /**
6160  * Internal preparation function. Allocates the DV flow size,
6161  * this size is constant.
6162  *
6163  * @param[in] dev
6164  *   Pointer to the rte_eth_dev structure.
6165  * @param[in] attr
6166  *   Pointer to the flow attributes.
6167  * @param[in] items
6168  *   Pointer to the list of items.
6169  * @param[in] actions
6170  *   Pointer to the list of actions.
6171  * @param[out] error
6172  *   Pointer to the error structure.
6173  *
6174  * @return
6175  *   Pointer to mlx5_flow object on success,
6176  *   otherwise NULL and rte_errno is set.
6177  */
6178 static struct mlx5_flow *
6179 flow_dv_prepare(struct rte_eth_dev *dev,
6180                 const struct rte_flow_attr *attr __rte_unused,
6181                 const struct rte_flow_item items[] __rte_unused,
6182                 const struct rte_flow_action actions[] __rte_unused,
6183                 struct rte_flow_error *error)
6184 {
6185         uint32_t handle_idx = 0;
6186         struct mlx5_flow *dev_flow;
6187         struct mlx5_flow_handle *dev_handle;
6188         struct mlx5_priv *priv = dev->data->dev_private;
6189         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
6190
6191         MLX5_ASSERT(wks);
6192         /* In case of corrupting the memory. */
6193         if (wks->flow_idx >= MLX5_NUM_MAX_DEV_FLOWS) {
6194                 rte_flow_error_set(error, ENOSPC,
6195                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6196                                    "not free temporary device flow");
6197                 return NULL;
6198         }
6199         dev_handle = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
6200                                    &handle_idx);
6201         if (!dev_handle) {
6202                 rte_flow_error_set(error, ENOMEM,
6203                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6204                                    "not enough memory to create flow handle");
6205                 return NULL;
6206         }
6207         MLX5_ASSERT(wks->flow_idx + 1 < RTE_DIM(wks->flows));
6208         dev_flow = &wks->flows[wks->flow_idx++];
6209         dev_flow->handle = dev_handle;
6210         dev_flow->handle_idx = handle_idx;
6211         /*
6212          * In some old rdma-core releases, before continuing, a check of the
6213          * length of matching parameter will be done at first. It needs to use
6214          * the length without misc4 param. If the flow has misc4 support, then
6215          * the length needs to be adjusted accordingly. Each param member is
6216          * aligned with a 64B boundary naturally.
6217          */
6218         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param) -
6219                                   MLX5_ST_SZ_BYTES(fte_match_set_misc4);
6220         /*
6221          * The matching value needs to be cleared to 0 before using. In the
6222          * past, it will be automatically cleared when using rte_*alloc
6223          * API. The time consumption will be almost the same as before.
6224          */
6225         memset(dev_flow->dv.value.buf, 0, MLX5_ST_SZ_BYTES(fte_match_param));
6226         dev_flow->ingress = attr->ingress;
6227         dev_flow->dv.transfer = attr->transfer;
6228         return dev_flow;
6229 }
6230
6231 #ifdef RTE_LIBRTE_MLX5_DEBUG
6232 /**
6233  * Sanity check for match mask and value. Similar to check_valid_spec() in
6234  * kernel driver. If unmasked bit is present in value, it returns failure.
6235  *
6236  * @param match_mask
6237  *   pointer to match mask buffer.
6238  * @param match_value
6239  *   pointer to match value buffer.
6240  *
6241  * @return
6242  *   0 if valid, -EINVAL otherwise.
6243  */
6244 static int
6245 flow_dv_check_valid_spec(void *match_mask, void *match_value)
6246 {
6247         uint8_t *m = match_mask;
6248         uint8_t *v = match_value;
6249         unsigned int i;
6250
6251         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
6252                 if (v[i] & ~m[i]) {
6253                         DRV_LOG(ERR,
6254                                 "match_value differs from match_criteria"
6255                                 " %p[%u] != %p[%u]",
6256                                 match_value, i, match_mask, i);
6257                         return -EINVAL;
6258                 }
6259         }
6260         return 0;
6261 }
6262 #endif
6263
6264 /**
6265  * Add match of ip_version.
6266  *
6267  * @param[in] group
6268  *   Flow group.
6269  * @param[in] headers_v
6270  *   Values header pointer.
6271  * @param[in] headers_m
6272  *   Masks header pointer.
6273  * @param[in] ip_version
6274  *   The IP version to set.
6275  */
6276 static inline void
6277 flow_dv_set_match_ip_version(uint32_t group,
6278                              void *headers_v,
6279                              void *headers_m,
6280                              uint8_t ip_version)
6281 {
6282         if (group == 0)
6283                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
6284         else
6285                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version,
6286                          ip_version);
6287         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, ip_version);
6288         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, 0);
6289         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype, 0);
6290 }
6291
6292 /**
6293  * Add Ethernet item to matcher and to the value.
6294  *
6295  * @param[in, out] matcher
6296  *   Flow matcher.
6297  * @param[in, out] key
6298  *   Flow matcher value.
6299  * @param[in] item
6300  *   Flow pattern to translate.
6301  * @param[in] inner
6302  *   Item is inner pattern.
6303  */
6304 static void
6305 flow_dv_translate_item_eth(void *matcher, void *key,
6306                            const struct rte_flow_item *item, int inner,
6307                            uint32_t group)
6308 {
6309         const struct rte_flow_item_eth *eth_m = item->mask;
6310         const struct rte_flow_item_eth *eth_v = item->spec;
6311         const struct rte_flow_item_eth nic_mask = {
6312                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
6313                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
6314                 .type = RTE_BE16(0xffff),
6315                 .has_vlan = 0,
6316         };
6317         void *hdrs_m;
6318         void *hdrs_v;
6319         char *l24_v;
6320         unsigned int i;
6321
6322         if (!eth_v)
6323                 return;
6324         if (!eth_m)
6325                 eth_m = &nic_mask;
6326         if (inner) {
6327                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
6328                                          inner_headers);
6329                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6330         } else {
6331                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
6332                                          outer_headers);
6333                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6334         }
6335         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, dmac_47_16),
6336                &eth_m->dst, sizeof(eth_m->dst));
6337         /* The value must be in the range of the mask. */
6338         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, dmac_47_16);
6339         for (i = 0; i < sizeof(eth_m->dst); ++i)
6340                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
6341         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, smac_47_16),
6342                &eth_m->src, sizeof(eth_m->src));
6343         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, smac_47_16);
6344         /* The value must be in the range of the mask. */
6345         for (i = 0; i < sizeof(eth_m->dst); ++i)
6346                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
6347         /*
6348          * HW supports match on one Ethertype, the Ethertype following the last
6349          * VLAN tag of the packet (see PRM).
6350          * Set match on ethertype only if ETH header is not followed by VLAN.
6351          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
6352          * ethertype, and use ip_version field instead.
6353          * eCPRI over Ether layer will use type value 0xAEFE.
6354          */
6355         if (eth_m->type == 0xFFFF) {
6356                 /* Set cvlan_tag mask for any single\multi\un-tagged case. */
6357                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
6358                 switch (eth_v->type) {
6359                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
6360                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
6361                         return;
6362                 case RTE_BE16(RTE_ETHER_TYPE_QINQ):
6363                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
6364                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
6365                         return;
6366                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
6367                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
6368                         return;
6369                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
6370                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
6371                         return;
6372                 default:
6373                         break;
6374                 }
6375         }
6376         if (eth_m->has_vlan) {
6377                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
6378                 if (eth_v->has_vlan) {
6379                         /*
6380                          * Here, when also has_more_vlan field in VLAN item is
6381                          * not set, only single-tagged packets will be matched.
6382                          */
6383                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
6384                         return;
6385                 }
6386         }
6387         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
6388                  rte_be_to_cpu_16(eth_m->type));
6389         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
6390         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
6391 }
6392
6393 /**
6394  * Add VLAN item to matcher and to the value.
6395  *
6396  * @param[in, out] dev_flow
6397  *   Flow descriptor.
6398  * @param[in, out] matcher
6399  *   Flow matcher.
6400  * @param[in, out] key
6401  *   Flow matcher value.
6402  * @param[in] item
6403  *   Flow pattern to translate.
6404  * @param[in] inner
6405  *   Item is inner pattern.
6406  */
6407 static void
6408 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
6409                             void *matcher, void *key,
6410                             const struct rte_flow_item *item,
6411                             int inner, uint32_t group)
6412 {
6413         const struct rte_flow_item_vlan *vlan_m = item->mask;
6414         const struct rte_flow_item_vlan *vlan_v = item->spec;
6415         void *hdrs_m;
6416         void *hdrs_v;
6417         uint16_t tci_m;
6418         uint16_t tci_v;
6419
6420         if (inner) {
6421                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
6422                                          inner_headers);
6423                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6424         } else {
6425                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
6426                                          outer_headers);
6427                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6428                 /*
6429                  * This is workaround, masks are not supported,
6430                  * and pre-validated.
6431                  */
6432                 if (vlan_v)
6433                         dev_flow->handle->vf_vlan.tag =
6434                                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
6435         }
6436         /*
6437          * When VLAN item exists in flow, mark packet as tagged,
6438          * even if TCI is not specified.
6439          */
6440         if (!MLX5_GET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag)) {
6441                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
6442                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
6443         }
6444         if (!vlan_v)
6445                 return;
6446         if (!vlan_m)
6447                 vlan_m = &rte_flow_item_vlan_mask;
6448         tci_m = rte_be_to_cpu_16(vlan_m->tci);
6449         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
6450         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_vid, tci_m);
6451         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_vid, tci_v);
6452         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_cfi, tci_m >> 12);
6453         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_cfi, tci_v >> 12);
6454         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_prio, tci_m >> 13);
6455         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_prio, tci_v >> 13);
6456         /*
6457          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
6458          * ethertype, and use ip_version field instead.
6459          */
6460         if (vlan_m->inner_type == 0xFFFF) {
6461                 switch (vlan_v->inner_type) {
6462                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
6463                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
6464                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
6465                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
6466                         return;
6467                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
6468                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
6469                         return;
6470                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
6471                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
6472                         return;
6473                 default:
6474                         break;
6475                 }
6476         }
6477         if (vlan_m->has_more_vlan && vlan_v->has_more_vlan) {
6478                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
6479                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
6480                 /* Only one vlan_tag bit can be set. */
6481                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
6482                 return;
6483         }
6484         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
6485                  rte_be_to_cpu_16(vlan_m->inner_type));
6486         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, ethertype,
6487                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
6488 }
6489
6490 /**
6491  * Add IPV4 item to matcher and to the value.
6492  *
6493  * @param[in, out] matcher
6494  *   Flow matcher.
6495  * @param[in, out] key
6496  *   Flow matcher value.
6497  * @param[in] item
6498  *   Flow pattern to translate.
6499  * @param[in] inner
6500  *   Item is inner pattern.
6501  * @param[in] group
6502  *   The group to insert the rule.
6503  */
6504 static void
6505 flow_dv_translate_item_ipv4(void *matcher, void *key,
6506                             const struct rte_flow_item *item,
6507                             int inner, uint32_t group)
6508 {
6509         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
6510         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
6511         const struct rte_flow_item_ipv4 nic_mask = {
6512                 .hdr = {
6513                         .src_addr = RTE_BE32(0xffffffff),
6514                         .dst_addr = RTE_BE32(0xffffffff),
6515                         .type_of_service = 0xff,
6516                         .next_proto_id = 0xff,
6517                         .time_to_live = 0xff,
6518                 },
6519         };
6520         void *headers_m;
6521         void *headers_v;
6522         char *l24_m;
6523         char *l24_v;
6524         uint8_t tos;
6525
6526         if (inner) {
6527                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6528                                          inner_headers);
6529                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6530         } else {
6531                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6532                                          outer_headers);
6533                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6534         }
6535         flow_dv_set_match_ip_version(group, headers_v, headers_m, 4);
6536         if (!ipv4_v)
6537                 return;
6538         if (!ipv4_m)
6539                 ipv4_m = &nic_mask;
6540         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
6541                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
6542         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
6543                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
6544         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
6545         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
6546         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
6547                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
6548         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
6549                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
6550         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
6551         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
6552         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
6553         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
6554                  ipv4_m->hdr.type_of_service);
6555         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
6556         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
6557                  ipv4_m->hdr.type_of_service >> 2);
6558         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
6559         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
6560                  ipv4_m->hdr.next_proto_id);
6561         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
6562                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
6563         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
6564                  ipv4_m->hdr.time_to_live);
6565         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
6566                  ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
6567         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
6568                  !!(ipv4_m->hdr.fragment_offset));
6569         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
6570                  !!(ipv4_v->hdr.fragment_offset & ipv4_m->hdr.fragment_offset));
6571 }
6572
6573 /**
6574  * Add IPV6 item to matcher and to the value.
6575  *
6576  * @param[in, out] matcher
6577  *   Flow matcher.
6578  * @param[in, out] key
6579  *   Flow matcher value.
6580  * @param[in] item
6581  *   Flow pattern to translate.
6582  * @param[in] inner
6583  *   Item is inner pattern.
6584  * @param[in] group
6585  *   The group to insert the rule.
6586  */
6587 static void
6588 flow_dv_translate_item_ipv6(void *matcher, void *key,
6589                             const struct rte_flow_item *item,
6590                             int inner, uint32_t group)
6591 {
6592         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
6593         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
6594         const struct rte_flow_item_ipv6 nic_mask = {
6595                 .hdr = {
6596                         .src_addr =
6597                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
6598                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
6599                         .dst_addr =
6600                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
6601                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
6602                         .vtc_flow = RTE_BE32(0xffffffff),
6603                         .proto = 0xff,
6604                         .hop_limits = 0xff,
6605                 },
6606         };
6607         void *headers_m;
6608         void *headers_v;
6609         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6610         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6611         char *l24_m;
6612         char *l24_v;
6613         uint32_t vtc_m;
6614         uint32_t vtc_v;
6615         int i;
6616         int size;
6617
6618         if (inner) {
6619                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6620                                          inner_headers);
6621                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6622         } else {
6623                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6624                                          outer_headers);
6625                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6626         }
6627         flow_dv_set_match_ip_version(group, headers_v, headers_m, 6);
6628         if (!ipv6_v)
6629                 return;
6630         if (!ipv6_m)
6631                 ipv6_m = &nic_mask;
6632         size = sizeof(ipv6_m->hdr.dst_addr);
6633         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
6634                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
6635         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
6636                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
6637         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
6638         for (i = 0; i < size; ++i)
6639                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
6640         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
6641                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
6642         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
6643                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
6644         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
6645         for (i = 0; i < size; ++i)
6646                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
6647         /* TOS. */
6648         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
6649         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
6650         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
6651         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
6652         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
6653         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
6654         /* Label. */
6655         if (inner) {
6656                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
6657                          vtc_m);
6658                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
6659                          vtc_v);
6660         } else {
6661                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
6662                          vtc_m);
6663                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
6664                          vtc_v);
6665         }
6666         /* Protocol. */
6667         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
6668                  ipv6_m->hdr.proto);
6669         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
6670                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
6671         /* Hop limit. */
6672         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
6673                  ipv6_m->hdr.hop_limits);
6674         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
6675                  ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
6676         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
6677                  !!(ipv6_m->has_frag_ext));
6678         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
6679                  !!(ipv6_v->has_frag_ext & ipv6_m->has_frag_ext));
6680 }
6681
6682 /**
6683  * Add IPV6 fragment extension item to matcher and to the value.
6684  *
6685  * @param[in, out] matcher
6686  *   Flow matcher.
6687  * @param[in, out] key
6688  *   Flow matcher value.
6689  * @param[in] item
6690  *   Flow pattern to translate.
6691  * @param[in] inner
6692  *   Item is inner pattern.
6693  */
6694 static void
6695 flow_dv_translate_item_ipv6_frag_ext(void *matcher, void *key,
6696                                      const struct rte_flow_item *item,
6697                                      int inner)
6698 {
6699         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_m = item->mask;
6700         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_v = item->spec;
6701         const struct rte_flow_item_ipv6_frag_ext nic_mask = {
6702                 .hdr = {
6703                         .next_header = 0xff,
6704                         .frag_data = RTE_BE16(0xffff),
6705                 },
6706         };
6707         void *headers_m;
6708         void *headers_v;
6709
6710         if (inner) {
6711                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6712                                          inner_headers);
6713                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6714         } else {
6715                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6716                                          outer_headers);
6717                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6718         }
6719         /* IPv6 fragment extension item exists, so packet is IP fragment. */
6720         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
6721         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 1);
6722         if (!ipv6_frag_ext_v)
6723                 return;
6724         if (!ipv6_frag_ext_m)
6725                 ipv6_frag_ext_m = &nic_mask;
6726         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
6727                  ipv6_frag_ext_m->hdr.next_header);
6728         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
6729                  ipv6_frag_ext_v->hdr.next_header &
6730                  ipv6_frag_ext_m->hdr.next_header);
6731 }
6732
6733 /**
6734  * Add TCP item to matcher and to the value.
6735  *
6736  * @param[in, out] matcher
6737  *   Flow matcher.
6738  * @param[in, out] key
6739  *   Flow matcher value.
6740  * @param[in] item
6741  *   Flow pattern to translate.
6742  * @param[in] inner
6743  *   Item is inner pattern.
6744  */
6745 static void
6746 flow_dv_translate_item_tcp(void *matcher, void *key,
6747                            const struct rte_flow_item *item,
6748                            int inner)
6749 {
6750         const struct rte_flow_item_tcp *tcp_m = item->mask;
6751         const struct rte_flow_item_tcp *tcp_v = item->spec;
6752         void *headers_m;
6753         void *headers_v;
6754
6755         if (inner) {
6756                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6757                                          inner_headers);
6758                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6759         } else {
6760                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6761                                          outer_headers);
6762                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6763         }
6764         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
6765         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
6766         if (!tcp_v)
6767                 return;
6768         if (!tcp_m)
6769                 tcp_m = &rte_flow_item_tcp_mask;
6770         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
6771                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
6772         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
6773                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
6774         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
6775                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
6776         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
6777                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
6778         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
6779                  tcp_m->hdr.tcp_flags);
6780         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
6781                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
6782 }
6783
6784 /**
6785  * Add UDP item to matcher and to the value.
6786  *
6787  * @param[in, out] matcher
6788  *   Flow matcher.
6789  * @param[in, out] key
6790  *   Flow matcher value.
6791  * @param[in] item
6792  *   Flow pattern to translate.
6793  * @param[in] inner
6794  *   Item is inner pattern.
6795  */
6796 static void
6797 flow_dv_translate_item_udp(void *matcher, void *key,
6798                            const struct rte_flow_item *item,
6799                            int inner)
6800 {
6801         const struct rte_flow_item_udp *udp_m = item->mask;
6802         const struct rte_flow_item_udp *udp_v = item->spec;
6803         void *headers_m;
6804         void *headers_v;
6805
6806         if (inner) {
6807                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6808                                          inner_headers);
6809                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6810         } else {
6811                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6812                                          outer_headers);
6813                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6814         }
6815         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
6816         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
6817         if (!udp_v)
6818                 return;
6819         if (!udp_m)
6820                 udp_m = &rte_flow_item_udp_mask;
6821         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
6822                  rte_be_to_cpu_16(udp_m->hdr.src_port));
6823         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
6824                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
6825         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
6826                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
6827         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
6828                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
6829 }
6830
6831 /**
6832  * Add GRE optional Key item to matcher and to the value.
6833  *
6834  * @param[in, out] matcher
6835  *   Flow matcher.
6836  * @param[in, out] key
6837  *   Flow matcher value.
6838  * @param[in] item
6839  *   Flow pattern to translate.
6840  * @param[in] inner
6841  *   Item is inner pattern.
6842  */
6843 static void
6844 flow_dv_translate_item_gre_key(void *matcher, void *key,
6845                                    const struct rte_flow_item *item)
6846 {
6847         const rte_be32_t *key_m = item->mask;
6848         const rte_be32_t *key_v = item->spec;
6849         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6850         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6851         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
6852
6853         /* GRE K bit must be on and should already be validated */
6854         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
6855         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
6856         if (!key_v)
6857                 return;
6858         if (!key_m)
6859                 key_m = &gre_key_default_mask;
6860         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
6861                  rte_be_to_cpu_32(*key_m) >> 8);
6862         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
6863                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
6864         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
6865                  rte_be_to_cpu_32(*key_m) & 0xFF);
6866         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
6867                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
6868 }
6869
6870 /**
6871  * Add GRE item to matcher and to the value.
6872  *
6873  * @param[in, out] matcher
6874  *   Flow matcher.
6875  * @param[in, out] key
6876  *   Flow matcher value.
6877  * @param[in] item
6878  *   Flow pattern to translate.
6879  * @param[in] inner
6880  *   Item is inner pattern.
6881  */
6882 static void
6883 flow_dv_translate_item_gre(void *matcher, void *key,
6884                            const struct rte_flow_item *item,
6885                            int inner)
6886 {
6887         const struct rte_flow_item_gre *gre_m = item->mask;
6888         const struct rte_flow_item_gre *gre_v = item->spec;
6889         void *headers_m;
6890         void *headers_v;
6891         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6892         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6893         struct {
6894                 union {
6895                         __extension__
6896                         struct {
6897                                 uint16_t version:3;
6898                                 uint16_t rsvd0:9;
6899                                 uint16_t s_present:1;
6900                                 uint16_t k_present:1;
6901                                 uint16_t rsvd_bit1:1;
6902                                 uint16_t c_present:1;
6903                         };
6904                         uint16_t value;
6905                 };
6906         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
6907
6908         if (inner) {
6909                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6910                                          inner_headers);
6911                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6912         } else {
6913                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6914                                          outer_headers);
6915                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6916         }
6917         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
6918         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
6919         if (!gre_v)
6920                 return;
6921         if (!gre_m)
6922                 gre_m = &rte_flow_item_gre_mask;
6923         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
6924                  rte_be_to_cpu_16(gre_m->protocol));
6925         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
6926                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
6927         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
6928         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
6929         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
6930                  gre_crks_rsvd0_ver_m.c_present);
6931         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
6932                  gre_crks_rsvd0_ver_v.c_present &
6933                  gre_crks_rsvd0_ver_m.c_present);
6934         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
6935                  gre_crks_rsvd0_ver_m.k_present);
6936         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
6937                  gre_crks_rsvd0_ver_v.k_present &
6938                  gre_crks_rsvd0_ver_m.k_present);
6939         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
6940                  gre_crks_rsvd0_ver_m.s_present);
6941         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
6942                  gre_crks_rsvd0_ver_v.s_present &
6943                  gre_crks_rsvd0_ver_m.s_present);
6944 }
6945
6946 /**
6947  * Add NVGRE item to matcher and to the value.
6948  *
6949  * @param[in, out] matcher
6950  *   Flow matcher.
6951  * @param[in, out] key
6952  *   Flow matcher value.
6953  * @param[in] item
6954  *   Flow pattern to translate.
6955  * @param[in] inner
6956  *   Item is inner pattern.
6957  */
6958 static void
6959 flow_dv_translate_item_nvgre(void *matcher, void *key,
6960                              const struct rte_flow_item *item,
6961                              int inner)
6962 {
6963         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
6964         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
6965         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6966         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6967         const char *tni_flow_id_m;
6968         const char *tni_flow_id_v;
6969         char *gre_key_m;
6970         char *gre_key_v;
6971         int size;
6972         int i;
6973
6974         /* For NVGRE, GRE header fields must be set with defined values. */
6975         const struct rte_flow_item_gre gre_spec = {
6976                 .c_rsvd0_ver = RTE_BE16(0x2000),
6977                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
6978         };
6979         const struct rte_flow_item_gre gre_mask = {
6980                 .c_rsvd0_ver = RTE_BE16(0xB000),
6981                 .protocol = RTE_BE16(UINT16_MAX),
6982         };
6983         const struct rte_flow_item gre_item = {
6984                 .spec = &gre_spec,
6985                 .mask = &gre_mask,
6986                 .last = NULL,
6987         };
6988         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
6989         if (!nvgre_v)
6990                 return;
6991         if (!nvgre_m)
6992                 nvgre_m = &rte_flow_item_nvgre_mask;
6993         tni_flow_id_m = (const char *)nvgre_m->tni;
6994         tni_flow_id_v = (const char *)nvgre_v->tni;
6995         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
6996         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
6997         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
6998         memcpy(gre_key_m, tni_flow_id_m, size);
6999         for (i = 0; i < size; ++i)
7000                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
7001 }
7002
7003 /**
7004  * Add VXLAN item to matcher and to the value.
7005  *
7006  * @param[in, out] matcher
7007  *   Flow matcher.
7008  * @param[in, out] key
7009  *   Flow matcher value.
7010  * @param[in] item
7011  *   Flow pattern to translate.
7012  * @param[in] inner
7013  *   Item is inner pattern.
7014  */
7015 static void
7016 flow_dv_translate_item_vxlan(void *matcher, void *key,
7017                              const struct rte_flow_item *item,
7018                              int inner)
7019 {
7020         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
7021         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
7022         void *headers_m;
7023         void *headers_v;
7024         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
7025         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
7026         char *vni_m;
7027         char *vni_v;
7028         uint16_t dport;
7029         int size;
7030         int i;
7031
7032         if (inner) {
7033                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7034                                          inner_headers);
7035                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
7036         } else {
7037                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7038                                          outer_headers);
7039                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
7040         }
7041         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
7042                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
7043         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
7044                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
7045                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
7046         }
7047         if (!vxlan_v)
7048                 return;
7049         if (!vxlan_m)
7050                 vxlan_m = &rte_flow_item_vxlan_mask;
7051         size = sizeof(vxlan_m->vni);
7052         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
7053         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
7054         memcpy(vni_m, vxlan_m->vni, size);
7055         for (i = 0; i < size; ++i)
7056                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
7057 }
7058
7059 /**
7060  * Add VXLAN-GPE item to matcher and to the value.
7061  *
7062  * @param[in, out] matcher
7063  *   Flow matcher.
7064  * @param[in, out] key
7065  *   Flow matcher value.
7066  * @param[in] item
7067  *   Flow pattern to translate.
7068  * @param[in] inner
7069  *   Item is inner pattern.
7070  */
7071
7072 static void
7073 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
7074                                  const struct rte_flow_item *item, int inner)
7075 {
7076         const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
7077         const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
7078         void *headers_m;
7079         void *headers_v;
7080         void *misc_m =
7081                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
7082         void *misc_v =
7083                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
7084         char *vni_m;
7085         char *vni_v;
7086         uint16_t dport;
7087         int size;
7088         int i;
7089         uint8_t flags_m = 0xff;
7090         uint8_t flags_v = 0xc;
7091
7092         if (inner) {
7093                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7094                                          inner_headers);
7095                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
7096         } else {
7097                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7098                                          outer_headers);
7099                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
7100         }
7101         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
7102                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
7103         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
7104                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
7105                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
7106         }
7107         if (!vxlan_v)
7108                 return;
7109         if (!vxlan_m)
7110                 vxlan_m = &rte_flow_item_vxlan_gpe_mask;
7111         size = sizeof(vxlan_m->vni);
7112         vni_m = MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
7113         vni_v = MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
7114         memcpy(vni_m, vxlan_m->vni, size);
7115         for (i = 0; i < size; ++i)
7116                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
7117         if (vxlan_m->flags) {
7118                 flags_m = vxlan_m->flags;
7119                 flags_v = vxlan_v->flags;
7120         }
7121         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
7122         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
7123         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_next_protocol,
7124                  vxlan_m->protocol);
7125         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_next_protocol,
7126                  vxlan_v->protocol);
7127 }
7128
7129 /**
7130  * Add Geneve item to matcher and to the value.
7131  *
7132  * @param[in, out] matcher
7133  *   Flow matcher.
7134  * @param[in, out] key
7135  *   Flow matcher value.
7136  * @param[in] item
7137  *   Flow pattern to translate.
7138  * @param[in] inner
7139  *   Item is inner pattern.
7140  */
7141
7142 static void
7143 flow_dv_translate_item_geneve(void *matcher, void *key,
7144                               const struct rte_flow_item *item, int inner)
7145 {
7146         const struct rte_flow_item_geneve *geneve_m = item->mask;
7147         const struct rte_flow_item_geneve *geneve_v = item->spec;
7148         void *headers_m;
7149         void *headers_v;
7150         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
7151         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
7152         uint16_t dport;
7153         uint16_t gbhdr_m;
7154         uint16_t gbhdr_v;
7155         char *vni_m;
7156         char *vni_v;
7157         size_t size, i;
7158
7159         if (inner) {
7160                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7161                                          inner_headers);
7162                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
7163         } else {
7164                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7165                                          outer_headers);
7166                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
7167         }
7168         dport = MLX5_UDP_PORT_GENEVE;
7169         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
7170                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
7171                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
7172         }
7173         if (!geneve_v)
7174                 return;
7175         if (!geneve_m)
7176                 geneve_m = &rte_flow_item_geneve_mask;
7177         size = sizeof(geneve_m->vni);
7178         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
7179         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
7180         memcpy(vni_m, geneve_m->vni, size);
7181         for (i = 0; i < size; ++i)
7182                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
7183         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
7184                  rte_be_to_cpu_16(geneve_m->protocol));
7185         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
7186                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
7187         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
7188         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
7189         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
7190                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
7191         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
7192                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
7193         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
7194                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
7195         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
7196                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
7197                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
7198 }
7199
7200 /**
7201  * Add MPLS item to matcher and to the value.
7202  *
7203  * @param[in, out] matcher
7204  *   Flow matcher.
7205  * @param[in, out] key
7206  *   Flow matcher value.
7207  * @param[in] item
7208  *   Flow pattern to translate.
7209  * @param[in] prev_layer
7210  *   The protocol layer indicated in previous item.
7211  * @param[in] inner
7212  *   Item is inner pattern.
7213  */
7214 static void
7215 flow_dv_translate_item_mpls(void *matcher, void *key,
7216                             const struct rte_flow_item *item,
7217                             uint64_t prev_layer,
7218                             int inner)
7219 {
7220         const uint32_t *in_mpls_m = item->mask;
7221         const uint32_t *in_mpls_v = item->spec;
7222         uint32_t *out_mpls_m = 0;
7223         uint32_t *out_mpls_v = 0;
7224         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
7225         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
7226         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
7227                                      misc_parameters_2);
7228         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
7229         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
7230         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
7231
7232         switch (prev_layer) {
7233         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
7234                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
7235                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
7236                          MLX5_UDP_PORT_MPLS);
7237                 break;
7238         case MLX5_FLOW_LAYER_GRE:
7239                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
7240                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
7241                          RTE_ETHER_TYPE_MPLS);
7242                 break;
7243         default:
7244                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
7245                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
7246                          IPPROTO_MPLS);
7247                 break;
7248         }
7249         if (!in_mpls_v)
7250                 return;
7251         if (!in_mpls_m)
7252                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
7253         switch (prev_layer) {
7254         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
7255                 out_mpls_m =
7256                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
7257                                                  outer_first_mpls_over_udp);
7258                 out_mpls_v =
7259                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
7260                                                  outer_first_mpls_over_udp);
7261                 break;
7262         case MLX5_FLOW_LAYER_GRE:
7263                 out_mpls_m =
7264                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
7265                                                  outer_first_mpls_over_gre);
7266                 out_mpls_v =
7267                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
7268                                                  outer_first_mpls_over_gre);
7269                 break;
7270         default:
7271                 /* Inner MPLS not over GRE is not supported. */
7272                 if (!inner) {
7273                         out_mpls_m =
7274                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
7275                                                          misc2_m,
7276                                                          outer_first_mpls);
7277                         out_mpls_v =
7278                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
7279                                                          misc2_v,
7280                                                          outer_first_mpls);
7281                 }
7282                 break;
7283         }
7284         if (out_mpls_m && out_mpls_v) {
7285                 *out_mpls_m = *in_mpls_m;
7286                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
7287         }
7288 }
7289
7290 /**
7291  * Add metadata register item to matcher
7292  *
7293  * @param[in, out] matcher
7294  *   Flow matcher.
7295  * @param[in, out] key
7296  *   Flow matcher value.
7297  * @param[in] reg_type
7298  *   Type of device metadata register
7299  * @param[in] value
7300  *   Register value
7301  * @param[in] mask
7302  *   Register mask
7303  */
7304 static void
7305 flow_dv_match_meta_reg(void *matcher, void *key,
7306                        enum modify_reg reg_type,
7307                        uint32_t data, uint32_t mask)
7308 {
7309         void *misc2_m =
7310                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
7311         void *misc2_v =
7312                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
7313         uint32_t temp;
7314
7315         data &= mask;
7316         switch (reg_type) {
7317         case REG_A:
7318                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
7319                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
7320                 break;
7321         case REG_B:
7322                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
7323                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
7324                 break;
7325         case REG_C_0:
7326                 /*
7327                  * The metadata register C0 field might be divided into
7328                  * source vport index and META item value, we should set
7329                  * this field according to specified mask, not as whole one.
7330                  */
7331                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
7332                 temp |= mask;
7333                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
7334                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
7335                 temp &= ~mask;
7336                 temp |= data;
7337                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
7338                 break;
7339         case REG_C_1:
7340                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
7341                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
7342                 break;
7343         case REG_C_2:
7344                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
7345                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
7346                 break;
7347         case REG_C_3:
7348                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
7349                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
7350                 break;
7351         case REG_C_4:
7352                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
7353                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
7354                 break;
7355         case REG_C_5:
7356                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
7357                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
7358                 break;
7359         case REG_C_6:
7360                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
7361                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
7362                 break;
7363         case REG_C_7:
7364                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
7365                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
7366                 break;
7367         default:
7368                 MLX5_ASSERT(false);
7369                 break;
7370         }
7371 }
7372
7373 /**
7374  * Add MARK item to matcher
7375  *
7376  * @param[in] dev
7377  *   The device to configure through.
7378  * @param[in, out] matcher
7379  *   Flow matcher.
7380  * @param[in, out] key
7381  *   Flow matcher value.
7382  * @param[in] item
7383  *   Flow pattern to translate.
7384  */
7385 static void
7386 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
7387                             void *matcher, void *key,
7388                             const struct rte_flow_item *item)
7389 {
7390         struct mlx5_priv *priv = dev->data->dev_private;
7391         const struct rte_flow_item_mark *mark;
7392         uint32_t value;
7393         uint32_t mask;
7394
7395         mark = item->mask ? (const void *)item->mask :
7396                             &rte_flow_item_mark_mask;
7397         mask = mark->id & priv->sh->dv_mark_mask;
7398         mark = (const void *)item->spec;
7399         MLX5_ASSERT(mark);
7400         value = mark->id & priv->sh->dv_mark_mask & mask;
7401         if (mask) {
7402                 enum modify_reg reg;
7403
7404                 /* Get the metadata register index for the mark. */
7405                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
7406                 MLX5_ASSERT(reg > 0);
7407                 if (reg == REG_C_0) {
7408                         struct mlx5_priv *priv = dev->data->dev_private;
7409                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
7410                         uint32_t shl_c0 = rte_bsf32(msk_c0);
7411
7412                         mask &= msk_c0;
7413                         mask <<= shl_c0;
7414                         value <<= shl_c0;
7415                 }
7416                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
7417         }
7418 }
7419
7420 /**
7421  * Add META item to matcher
7422  *
7423  * @param[in] dev
7424  *   The devich to configure through.
7425  * @param[in, out] matcher
7426  *   Flow matcher.
7427  * @param[in, out] key
7428  *   Flow matcher value.
7429  * @param[in] attr
7430  *   Attributes of flow that includes this item.
7431  * @param[in] item
7432  *   Flow pattern to translate.
7433  */
7434 static void
7435 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
7436                             void *matcher, void *key,
7437                             const struct rte_flow_attr *attr,
7438                             const struct rte_flow_item *item)
7439 {
7440         const struct rte_flow_item_meta *meta_m;
7441         const struct rte_flow_item_meta *meta_v;
7442
7443         meta_m = (const void *)item->mask;
7444         if (!meta_m)
7445                 meta_m = &rte_flow_item_meta_mask;
7446         meta_v = (const void *)item->spec;
7447         if (meta_v) {
7448                 int reg;
7449                 uint32_t value = meta_v->data;
7450                 uint32_t mask = meta_m->data;
7451
7452                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
7453                 if (reg < 0)
7454                         return;
7455                 /*
7456                  * In datapath code there is no endianness
7457                  * coversions for perfromance reasons, all
7458                  * pattern conversions are done in rte_flow.
7459                  */
7460                 value = rte_cpu_to_be_32(value);
7461                 mask = rte_cpu_to_be_32(mask);
7462                 if (reg == REG_C_0) {
7463                         struct mlx5_priv *priv = dev->data->dev_private;
7464                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
7465                         uint32_t shl_c0 = rte_bsf32(msk_c0);
7466 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
7467                         uint32_t shr_c0 = __builtin_clz(priv->sh->dv_meta_mask);
7468
7469                         value >>= shr_c0;
7470                         mask >>= shr_c0;
7471 #endif
7472                         value <<= shl_c0;
7473                         mask <<= shl_c0;
7474                         MLX5_ASSERT(msk_c0);
7475                         MLX5_ASSERT(!(~msk_c0 & mask));
7476                 }
7477                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
7478         }
7479 }
7480
7481 /**
7482  * Add vport metadata Reg C0 item to matcher
7483  *
7484  * @param[in, out] matcher
7485  *   Flow matcher.
7486  * @param[in, out] key
7487  *   Flow matcher value.
7488  * @param[in] reg
7489  *   Flow pattern to translate.
7490  */
7491 static void
7492 flow_dv_translate_item_meta_vport(void *matcher, void *key,
7493                                   uint32_t value, uint32_t mask)
7494 {
7495         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
7496 }
7497
7498 /**
7499  * Add tag item to matcher
7500  *
7501  * @param[in] dev
7502  *   The devich to configure through.
7503  * @param[in, out] matcher
7504  *   Flow matcher.
7505  * @param[in, out] key
7506  *   Flow matcher value.
7507  * @param[in] item
7508  *   Flow pattern to translate.
7509  */
7510 static void
7511 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
7512                                 void *matcher, void *key,
7513                                 const struct rte_flow_item *item)
7514 {
7515         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
7516         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
7517         uint32_t mask, value;
7518
7519         MLX5_ASSERT(tag_v);
7520         value = tag_v->data;
7521         mask = tag_m ? tag_m->data : UINT32_MAX;
7522         if (tag_v->id == REG_C_0) {
7523                 struct mlx5_priv *priv = dev->data->dev_private;
7524                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
7525                 uint32_t shl_c0 = rte_bsf32(msk_c0);
7526
7527                 mask &= msk_c0;
7528                 mask <<= shl_c0;
7529                 value <<= shl_c0;
7530         }
7531         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
7532 }
7533
7534 /**
7535  * Add TAG item to matcher
7536  *
7537  * @param[in] dev
7538  *   The devich to configure through.
7539  * @param[in, out] matcher
7540  *   Flow matcher.
7541  * @param[in, out] key
7542  *   Flow matcher value.
7543  * @param[in] item
7544  *   Flow pattern to translate.
7545  */
7546 static void
7547 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
7548                            void *matcher, void *key,
7549                            const struct rte_flow_item *item)
7550 {
7551         const struct rte_flow_item_tag *tag_v = item->spec;
7552         const struct rte_flow_item_tag *tag_m = item->mask;
7553         enum modify_reg reg;
7554
7555         MLX5_ASSERT(tag_v);
7556         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
7557         /* Get the metadata register index for the tag. */
7558         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
7559         MLX5_ASSERT(reg > 0);
7560         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
7561 }
7562
7563 /**
7564  * Add source vport match to the specified matcher.
7565  *
7566  * @param[in, out] matcher
7567  *   Flow matcher.
7568  * @param[in, out] key
7569  *   Flow matcher value.
7570  * @param[in] port
7571  *   Source vport value to match
7572  * @param[in] mask
7573  *   Mask
7574  */
7575 static void
7576 flow_dv_translate_item_source_vport(void *matcher, void *key,
7577                                     int16_t port, uint16_t mask)
7578 {
7579         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
7580         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
7581
7582         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
7583         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
7584 }
7585
7586 /**
7587  * Translate port-id item to eswitch match on  port-id.
7588  *
7589  * @param[in] dev
7590  *   The devich to configure through.
7591  * @param[in, out] matcher
7592  *   Flow matcher.
7593  * @param[in, out] key
7594  *   Flow matcher value.
7595  * @param[in] item
7596  *   Flow pattern to translate.
7597  *
7598  * @return
7599  *   0 on success, a negative errno value otherwise.
7600  */
7601 static int
7602 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
7603                                void *key, const struct rte_flow_item *item)
7604 {
7605         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
7606         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
7607         struct mlx5_priv *priv;
7608         uint16_t mask, id;
7609
7610         mask = pid_m ? pid_m->id : 0xffff;
7611         id = pid_v ? pid_v->id : dev->data->port_id;
7612         priv = mlx5_port_to_eswitch_info(id, item == NULL);
7613         if (!priv)
7614                 return -rte_errno;
7615         /* Translate to vport field or to metadata, depending on mode. */
7616         if (priv->vport_meta_mask)
7617                 flow_dv_translate_item_meta_vport(matcher, key,
7618                                                   priv->vport_meta_tag,
7619                                                   priv->vport_meta_mask);
7620         else
7621                 flow_dv_translate_item_source_vport(matcher, key,
7622                                                     priv->vport_id, mask);
7623         return 0;
7624 }
7625
7626 /**
7627  * Add ICMP6 item to matcher and to the value.
7628  *
7629  * @param[in, out] matcher
7630  *   Flow matcher.
7631  * @param[in, out] key
7632  *   Flow matcher value.
7633  * @param[in] item
7634  *   Flow pattern to translate.
7635  * @param[in] inner
7636  *   Item is inner pattern.
7637  */
7638 static void
7639 flow_dv_translate_item_icmp6(void *matcher, void *key,
7640                               const struct rte_flow_item *item,
7641                               int inner)
7642 {
7643         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
7644         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
7645         void *headers_m;
7646         void *headers_v;
7647         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
7648                                      misc_parameters_3);
7649         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
7650         if (inner) {
7651                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7652                                          inner_headers);
7653                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
7654         } else {
7655                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7656                                          outer_headers);
7657                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
7658         }
7659         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
7660         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
7661         if (!icmp6_v)
7662                 return;
7663         if (!icmp6_m)
7664                 icmp6_m = &rte_flow_item_icmp6_mask;
7665         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
7666         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
7667                  icmp6_v->type & icmp6_m->type);
7668         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
7669         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
7670                  icmp6_v->code & icmp6_m->code);
7671 }
7672
7673 /**
7674  * Add ICMP item to matcher and to the value.
7675  *
7676  * @param[in, out] matcher
7677  *   Flow matcher.
7678  * @param[in, out] key
7679  *   Flow matcher value.
7680  * @param[in] item
7681  *   Flow pattern to translate.
7682  * @param[in] inner
7683  *   Item is inner pattern.
7684  */
7685 static void
7686 flow_dv_translate_item_icmp(void *matcher, void *key,
7687                             const struct rte_flow_item *item,
7688                             int inner)
7689 {
7690         const struct rte_flow_item_icmp *icmp_m = item->mask;
7691         const struct rte_flow_item_icmp *icmp_v = item->spec;
7692         uint32_t icmp_header_data_m = 0;
7693         uint32_t icmp_header_data_v = 0;
7694         void *headers_m;
7695         void *headers_v;
7696         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
7697                                      misc_parameters_3);
7698         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
7699         if (inner) {
7700                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7701                                          inner_headers);
7702                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
7703         } else {
7704                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7705                                          outer_headers);
7706                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
7707         }
7708         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
7709         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
7710         if (!icmp_v)
7711                 return;
7712         if (!icmp_m)
7713                 icmp_m = &rte_flow_item_icmp_mask;
7714         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
7715                  icmp_m->hdr.icmp_type);
7716         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
7717                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
7718         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
7719                  icmp_m->hdr.icmp_code);
7720         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
7721                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
7722         icmp_header_data_m = rte_be_to_cpu_16(icmp_m->hdr.icmp_seq_nb);
7723         icmp_header_data_m |= rte_be_to_cpu_16(icmp_m->hdr.icmp_ident) << 16;
7724         if (icmp_header_data_m) {
7725                 icmp_header_data_v = rte_be_to_cpu_16(icmp_v->hdr.icmp_seq_nb);
7726                 icmp_header_data_v |=
7727                          rte_be_to_cpu_16(icmp_v->hdr.icmp_ident) << 16;
7728                 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_header_data,
7729                          icmp_header_data_m);
7730                 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_header_data,
7731                          icmp_header_data_v & icmp_header_data_m);
7732         }
7733 }
7734
7735 /**
7736  * Add GTP item to matcher and to the value.
7737  *
7738  * @param[in, out] matcher
7739  *   Flow matcher.
7740  * @param[in, out] key
7741  *   Flow matcher value.
7742  * @param[in] item
7743  *   Flow pattern to translate.
7744  * @param[in] inner
7745  *   Item is inner pattern.
7746  */
7747 static void
7748 flow_dv_translate_item_gtp(void *matcher, void *key,
7749                            const struct rte_flow_item *item, int inner)
7750 {
7751         const struct rte_flow_item_gtp *gtp_m = item->mask;
7752         const struct rte_flow_item_gtp *gtp_v = item->spec;
7753         void *headers_m;
7754         void *headers_v;
7755         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
7756                                      misc_parameters_3);
7757         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
7758         uint16_t dport = RTE_GTPU_UDP_PORT;
7759
7760         if (inner) {
7761                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7762                                          inner_headers);
7763                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
7764         } else {
7765                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7766                                          outer_headers);
7767                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
7768         }
7769         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
7770                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
7771                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
7772         }
7773         if (!gtp_v)
7774                 return;
7775         if (!gtp_m)
7776                 gtp_m = &rte_flow_item_gtp_mask;
7777         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags,
7778                  gtp_m->v_pt_rsv_flags);
7779         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags,
7780                  gtp_v->v_pt_rsv_flags & gtp_m->v_pt_rsv_flags);
7781         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
7782         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
7783                  gtp_v->msg_type & gtp_m->msg_type);
7784         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
7785                  rte_be_to_cpu_32(gtp_m->teid));
7786         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
7787                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
7788 }
7789
7790 /**
7791  * Add eCPRI item to matcher and to the value.
7792  *
7793  * @param[in] dev
7794  *   The devich to configure through.
7795  * @param[in, out] matcher
7796  *   Flow matcher.
7797  * @param[in, out] key
7798  *   Flow matcher value.
7799  * @param[in] item
7800  *   Flow pattern to translate.
7801  * @param[in] samples
7802  *   Sample IDs to be used in the matching.
7803  */
7804 static void
7805 flow_dv_translate_item_ecpri(struct rte_eth_dev *dev, void *matcher,
7806                              void *key, const struct rte_flow_item *item)
7807 {
7808         struct mlx5_priv *priv = dev->data->dev_private;
7809         const struct rte_flow_item_ecpri *ecpri_m = item->mask;
7810         const struct rte_flow_item_ecpri *ecpri_v = item->spec;
7811         void *misc4_m = MLX5_ADDR_OF(fte_match_param, matcher,
7812                                      misc_parameters_4);
7813         void *misc4_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_4);
7814         uint32_t *samples;
7815         void *dw_m;
7816         void *dw_v;
7817
7818         if (!ecpri_v)
7819                 return;
7820         if (!ecpri_m)
7821                 ecpri_m = &rte_flow_item_ecpri_mask;
7822         /*
7823          * Maximal four DW samples are supported in a single matching now.
7824          * Two are used now for a eCPRI matching:
7825          * 1. Type: one byte, mask should be 0x00ff0000 in network order
7826          * 2. ID of a message: one or two bytes, mask 0xffff0000 or 0xff000000
7827          *    if any.
7828          */
7829         if (!ecpri_m->hdr.common.u32)
7830                 return;
7831         samples = priv->sh->fp[MLX5_FLEX_PARSER_ECPRI_0].ids;
7832         /* Need to take the whole DW as the mask to fill the entry. */
7833         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
7834                             prog_sample_field_value_0);
7835         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
7836                             prog_sample_field_value_0);
7837         /* Already big endian (network order) in the header. */
7838         *(uint32_t *)dw_m = ecpri_m->hdr.common.u32;
7839         *(uint32_t *)dw_v = ecpri_v->hdr.common.u32;
7840         /* Sample#0, used for matching type, offset 0. */
7841         MLX5_SET(fte_match_set_misc4, misc4_m,
7842                  prog_sample_field_id_0, samples[0]);
7843         /* It makes no sense to set the sample ID in the mask field. */
7844         MLX5_SET(fte_match_set_misc4, misc4_v,
7845                  prog_sample_field_id_0, samples[0]);
7846         /*
7847          * Checking if message body part needs to be matched.
7848          * Some wildcard rules only matching type field should be supported.
7849          */
7850         if (ecpri_m->hdr.dummy[0]) {
7851                 switch (ecpri_v->hdr.common.type) {
7852                 case RTE_ECPRI_MSG_TYPE_IQ_DATA:
7853                 case RTE_ECPRI_MSG_TYPE_RTC_CTRL:
7854                 case RTE_ECPRI_MSG_TYPE_DLY_MSR:
7855                         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
7856                                             prog_sample_field_value_1);
7857                         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
7858                                             prog_sample_field_value_1);
7859                         *(uint32_t *)dw_m = ecpri_m->hdr.dummy[0];
7860                         *(uint32_t *)dw_v = ecpri_v->hdr.dummy[0];
7861                         /* Sample#1, to match message body, offset 4. */
7862                         MLX5_SET(fte_match_set_misc4, misc4_m,
7863                                  prog_sample_field_id_1, samples[1]);
7864                         MLX5_SET(fte_match_set_misc4, misc4_v,
7865                                  prog_sample_field_id_1, samples[1]);
7866                         break;
7867                 default:
7868                         /* Others, do not match any sample ID. */
7869                         break;
7870                 }
7871         }
7872 }
7873
7874 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
7875
7876 #define HEADER_IS_ZERO(match_criteria, headers)                              \
7877         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
7878                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
7879
7880 /**
7881  * Calculate flow matcher enable bitmap.
7882  *
7883  * @param match_criteria
7884  *   Pointer to flow matcher criteria.
7885  *
7886  * @return
7887  *   Bitmap of enabled fields.
7888  */
7889 static uint8_t
7890 flow_dv_matcher_enable(uint32_t *match_criteria)
7891 {
7892         uint8_t match_criteria_enable;
7893
7894         match_criteria_enable =
7895                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
7896                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
7897         match_criteria_enable |=
7898                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
7899                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
7900         match_criteria_enable |=
7901                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
7902                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
7903         match_criteria_enable |=
7904                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
7905                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
7906         match_criteria_enable |=
7907                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
7908                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
7909         match_criteria_enable |=
7910                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_4)) <<
7911                 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT;
7912         return match_criteria_enable;
7913 }
7914
7915 struct mlx5_hlist_entry *
7916 flow_dv_tbl_create_cb(struct mlx5_hlist *list, uint64_t key64, void *cb_ctx)
7917 {
7918         struct mlx5_dev_ctx_shared *sh = list->ctx;
7919         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
7920         struct rte_eth_dev *dev = ctx->dev;
7921         struct mlx5_flow_tbl_data_entry *tbl_data;
7922         struct mlx5_flow_tbl_tunnel_prm *tt_prm = ctx->data;
7923         struct rte_flow_error *error = ctx->error;
7924         union mlx5_flow_tbl_key key = { .v64 = key64 };
7925         struct mlx5_flow_tbl_resource *tbl;
7926         void *domain;
7927         uint32_t idx = 0;
7928         int ret;
7929
7930         tbl_data = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
7931         if (!tbl_data) {
7932                 rte_flow_error_set(error, ENOMEM,
7933                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7934                                    NULL,
7935                                    "cannot allocate flow table data entry");
7936                 return NULL;
7937         }
7938         tbl_data->idx = idx;
7939         tbl_data->tunnel = tt_prm->tunnel;
7940         tbl_data->group_id = tt_prm->group_id;
7941         tbl_data->external = tt_prm->external;
7942         tbl_data->tunnel_offload = is_tunnel_offload_active(dev);
7943         tbl_data->is_egress = !!key.direction;
7944         tbl = &tbl_data->tbl;
7945         if (key.dummy)
7946                 return &tbl_data->entry;
7947         if (key.domain)
7948                 domain = sh->fdb_domain;
7949         else if (key.direction)
7950                 domain = sh->tx_domain;
7951         else
7952                 domain = sh->rx_domain;
7953         ret = mlx5_flow_os_create_flow_tbl(domain, key.table_id, &tbl->obj);
7954         if (ret) {
7955                 rte_flow_error_set(error, ENOMEM,
7956                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7957                                    NULL, "cannot create flow table object");
7958                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
7959                 return NULL;
7960         }
7961         if (key.table_id) {
7962                 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
7963                                         (tbl->obj, &tbl_data->jump.action);
7964                 if (ret) {
7965                         rte_flow_error_set(error, ENOMEM,
7966                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7967                                            NULL,
7968                                            "cannot create flow jump action");
7969                         mlx5_flow_os_destroy_flow_tbl(tbl->obj);
7970                         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
7971                         return NULL;
7972                 }
7973         }
7974         MKSTR(matcher_name, "%s_%s_%u_matcher_cache",
7975               key.domain ? "FDB" : "NIC", key.direction ? "egress" : "ingress",
7976               key.table_id);
7977         mlx5_cache_list_init(&tbl_data->matchers, matcher_name, 0, sh,
7978                              flow_dv_matcher_create_cb,
7979                              flow_dv_matcher_match_cb,
7980                              flow_dv_matcher_remove_cb);
7981         return &tbl_data->entry;
7982 }
7983
7984 /**
7985  * Get a flow table.
7986  *
7987  * @param[in, out] dev
7988  *   Pointer to rte_eth_dev structure.
7989  * @param[in] table_id
7990  *   Table id to use.
7991  * @param[in] egress
7992  *   Direction of the table.
7993  * @param[in] transfer
7994  *   E-Switch or NIC flow.
7995  * @param[in] dummy
7996  *   Dummy entry for dv API.
7997  * @param[out] error
7998  *   pointer to error structure.
7999  *
8000  * @return
8001  *   Returns tables resource based on the index, NULL in case of failed.
8002  */
8003 struct mlx5_flow_tbl_resource *
8004 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
8005                          uint32_t table_id, uint8_t egress,
8006                          uint8_t transfer,
8007                          bool external,
8008                          const struct mlx5_flow_tunnel *tunnel,
8009                          uint32_t group_id, uint8_t dummy,
8010                          struct rte_flow_error *error)
8011 {
8012         struct mlx5_priv *priv = dev->data->dev_private;
8013         union mlx5_flow_tbl_key table_key = {
8014                 {
8015                         .table_id = table_id,
8016                         .dummy = dummy,
8017                         .domain = !!transfer,
8018                         .direction = !!egress,
8019                 }
8020         };
8021         struct mlx5_flow_tbl_tunnel_prm tt_prm = {
8022                 .tunnel = tunnel,
8023                 .group_id = group_id,
8024                 .external = external,
8025         };
8026         struct mlx5_flow_cb_ctx ctx = {
8027                 .dev = dev,
8028                 .error = error,
8029                 .data = &tt_prm,
8030         };
8031         struct mlx5_hlist_entry *entry;
8032         struct mlx5_flow_tbl_data_entry *tbl_data;
8033
8034         entry = mlx5_hlist_register(priv->sh->flow_tbls, table_key.v64, &ctx);
8035         if (!entry) {
8036                 rte_flow_error_set(error, ENOMEM,
8037                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8038                                    "cannot get table");
8039                 return NULL;
8040         }
8041         tbl_data = container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
8042         return &tbl_data->tbl;
8043 }
8044
8045 void
8046 flow_dv_tbl_remove_cb(struct mlx5_hlist *list,
8047                       struct mlx5_hlist_entry *entry)
8048 {
8049         struct mlx5_dev_ctx_shared *sh = list->ctx;
8050         struct mlx5_flow_tbl_data_entry *tbl_data =
8051                 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
8052
8053         MLX5_ASSERT(entry && sh);
8054         if (tbl_data->jump.action)
8055                 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
8056         if (tbl_data->tbl.obj)
8057                 mlx5_flow_os_destroy_flow_tbl(tbl_data->tbl.obj);
8058         if (tbl_data->tunnel_offload && tbl_data->external) {
8059                 struct mlx5_hlist_entry *he;
8060                 struct mlx5_hlist *tunnel_grp_hash;
8061                 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
8062                 union tunnel_tbl_key tunnel_key = {
8063                         .tunnel_id = tbl_data->tunnel ?
8064                                         tbl_data->tunnel->tunnel_id : 0,
8065                         .group = tbl_data->group_id
8066                 };
8067                 union mlx5_flow_tbl_key table_key = {
8068                         .v64 = entry->key
8069                 };
8070                 uint32_t table_id = table_key.table_id;
8071
8072                 tunnel_grp_hash = tbl_data->tunnel ?
8073                                         tbl_data->tunnel->groups :
8074                                         thub->groups;
8075                 he = mlx5_hlist_lookup(tunnel_grp_hash, tunnel_key.val, NULL);
8076                 if (he)
8077                         mlx5_hlist_unregister(tunnel_grp_hash, he);
8078                 DRV_LOG(DEBUG,
8079                         "Table_id %#x tunnel %u group %u released.",
8080                         table_id,
8081                         tbl_data->tunnel ?
8082                         tbl_data->tunnel->tunnel_id : 0,
8083                         tbl_data->group_id);
8084         }
8085         mlx5_cache_list_destroy(&tbl_data->matchers);
8086         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
8087 }
8088
8089 /**
8090  * Release a flow table.
8091  *
8092  * @param[in] sh
8093  *   Pointer to device shared structure.
8094  * @param[in] tbl
8095  *   Table resource to be released.
8096  *
8097  * @return
8098  *   Returns 0 if table was released, else return 1;
8099  */
8100 static int
8101 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
8102                              struct mlx5_flow_tbl_resource *tbl)
8103 {
8104         struct mlx5_flow_tbl_data_entry *tbl_data =
8105                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
8106
8107         if (!tbl)
8108                 return 0;
8109         return mlx5_hlist_unregister(sh->flow_tbls, &tbl_data->entry);
8110 }
8111
8112 int
8113 flow_dv_matcher_match_cb(struct mlx5_cache_list *list __rte_unused,
8114                          struct mlx5_cache_entry *entry, void *cb_ctx)
8115 {
8116         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8117         struct mlx5_flow_dv_matcher *ref = ctx->data;
8118         struct mlx5_flow_dv_matcher *cur = container_of(entry, typeof(*cur),
8119                                                         entry);
8120
8121         return cur->crc != ref->crc ||
8122                cur->priority != ref->priority ||
8123                memcmp((const void *)cur->mask.buf,
8124                       (const void *)ref->mask.buf, ref->mask.size);
8125 }
8126
8127 struct mlx5_cache_entry *
8128 flow_dv_matcher_create_cb(struct mlx5_cache_list *list,
8129                           struct mlx5_cache_entry *entry __rte_unused,
8130                           void *cb_ctx)
8131 {
8132         struct mlx5_dev_ctx_shared *sh = list->ctx;
8133         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8134         struct mlx5_flow_dv_matcher *ref = ctx->data;
8135         struct mlx5_flow_dv_matcher *cache;
8136         struct mlx5dv_flow_matcher_attr dv_attr = {
8137                 .type = IBV_FLOW_ATTR_NORMAL,
8138                 .match_mask = (void *)&ref->mask,
8139         };
8140         struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
8141                                                             typeof(*tbl), tbl);
8142         int ret;
8143
8144         cache = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*cache), 0, SOCKET_ID_ANY);
8145         if (!cache) {
8146                 rte_flow_error_set(ctx->error, ENOMEM,
8147                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8148                                    "cannot create matcher");
8149                 return NULL;
8150         }
8151         *cache = *ref;
8152         dv_attr.match_criteria_enable =
8153                 flow_dv_matcher_enable(cache->mask.buf);
8154         dv_attr.priority = ref->priority;
8155         if (tbl->is_egress)
8156                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
8157         ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->tbl.obj,
8158                                                &cache->matcher_object);
8159         if (ret) {
8160                 mlx5_free(cache);
8161                 rte_flow_error_set(ctx->error, ENOMEM,
8162                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8163                                    "cannot create matcher");
8164                 return NULL;
8165         }
8166         return &cache->entry;
8167 }
8168
8169 /**
8170  * Register the flow matcher.
8171  *
8172  * @param[in, out] dev
8173  *   Pointer to rte_eth_dev structure.
8174  * @param[in, out] matcher
8175  *   Pointer to flow matcher.
8176  * @param[in, out] key
8177  *   Pointer to flow table key.
8178  * @parm[in, out] dev_flow
8179  *   Pointer to the dev_flow.
8180  * @param[out] error
8181  *   pointer to error structure.
8182  *
8183  * @return
8184  *   0 on success otherwise -errno and errno is set.
8185  */
8186 static int
8187 flow_dv_matcher_register(struct rte_eth_dev *dev,
8188                          struct mlx5_flow_dv_matcher *ref,
8189                          union mlx5_flow_tbl_key *key,
8190                          struct mlx5_flow *dev_flow,
8191                          struct rte_flow_error *error)
8192 {
8193         struct mlx5_cache_entry *entry;
8194         struct mlx5_flow_dv_matcher *cache;
8195         struct mlx5_flow_tbl_resource *tbl;
8196         struct mlx5_flow_tbl_data_entry *tbl_data;
8197         struct mlx5_flow_cb_ctx ctx = {
8198                 .error = error,
8199                 .data = ref,
8200         };
8201
8202         tbl = flow_dv_tbl_resource_get(dev, key->table_id, key->direction,
8203                                        key->domain, false, NULL, 0, 0, error);
8204         if (!tbl)
8205                 return -rte_errno;      /* No need to refill the error info */
8206         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
8207         ref->tbl = tbl;
8208         entry = mlx5_cache_register(&tbl_data->matchers, &ctx);
8209         if (!entry) {
8210                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
8211                 return rte_flow_error_set(error, ENOMEM,
8212                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8213                                           "cannot allocate ref memory");
8214         }
8215         cache = container_of(entry, typeof(*cache), entry);
8216         dev_flow->handle->dvh.matcher = cache;
8217         return 0;
8218 }
8219
8220 struct mlx5_hlist_entry *
8221 flow_dv_tag_create_cb(struct mlx5_hlist *list, uint64_t key, void *ctx)
8222 {
8223         struct mlx5_dev_ctx_shared *sh = list->ctx;
8224         struct rte_flow_error *error = ctx;
8225         struct mlx5_flow_dv_tag_resource *entry;
8226         uint32_t idx = 0;
8227         int ret;
8228
8229         entry = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
8230         if (!entry) {
8231                 rte_flow_error_set(error, ENOMEM,
8232                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8233                                    "cannot allocate resource memory");
8234                 return NULL;
8235         }
8236         entry->idx = idx;
8237         ret = mlx5_flow_os_create_flow_action_tag(key,
8238                                                   &entry->action);
8239         if (ret) {
8240                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], idx);
8241                 rte_flow_error_set(error, ENOMEM,
8242                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8243                                    NULL, "cannot create action");
8244                 return NULL;
8245         }
8246         return &entry->entry;
8247 }
8248
8249 /**
8250  * Find existing tag resource or create and register a new one.
8251  *
8252  * @param dev[in, out]
8253  *   Pointer to rte_eth_dev structure.
8254  * @param[in, out] tag_be24
8255  *   Tag value in big endian then R-shift 8.
8256  * @parm[in, out] dev_flow
8257  *   Pointer to the dev_flow.
8258  * @param[out] error
8259  *   pointer to error structure.
8260  *
8261  * @return
8262  *   0 on success otherwise -errno and errno is set.
8263  */
8264 static int
8265 flow_dv_tag_resource_register
8266                         (struct rte_eth_dev *dev,
8267                          uint32_t tag_be24,
8268                          struct mlx5_flow *dev_flow,
8269                          struct rte_flow_error *error)
8270 {
8271         struct mlx5_priv *priv = dev->data->dev_private;
8272         struct mlx5_flow_dv_tag_resource *cache_resource;
8273         struct mlx5_hlist_entry *entry;
8274
8275         entry = mlx5_hlist_register(priv->sh->tag_table, tag_be24, error);
8276         if (entry) {
8277                 cache_resource = container_of
8278                         (entry, struct mlx5_flow_dv_tag_resource, entry);
8279                 dev_flow->handle->dvh.rix_tag = cache_resource->idx;
8280                 dev_flow->dv.tag_resource = cache_resource;
8281                 return 0;
8282         }
8283         return -rte_errno;
8284 }
8285
8286 void
8287 flow_dv_tag_remove_cb(struct mlx5_hlist *list,
8288                       struct mlx5_hlist_entry *entry)
8289 {
8290         struct mlx5_dev_ctx_shared *sh = list->ctx;
8291         struct mlx5_flow_dv_tag_resource *tag =
8292                 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
8293
8294         MLX5_ASSERT(tag && sh && tag->action);
8295         claim_zero(mlx5_flow_os_destroy_flow_action(tag->action));
8296         DRV_LOG(DEBUG, "Tag %p: removed.", (void *)tag);
8297         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
8298 }
8299
8300 /**
8301  * Release the tag.
8302  *
8303  * @param dev
8304  *   Pointer to Ethernet device.
8305  * @param tag_idx
8306  *   Tag index.
8307  *
8308  * @return
8309  *   1 while a reference on it exists, 0 when freed.
8310  */
8311 static int
8312 flow_dv_tag_release(struct rte_eth_dev *dev,
8313                     uint32_t tag_idx)
8314 {
8315         struct mlx5_priv *priv = dev->data->dev_private;
8316         struct mlx5_flow_dv_tag_resource *tag;
8317
8318         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG], tag_idx);
8319         if (!tag)
8320                 return 0;
8321         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
8322                 dev->data->port_id, (void *)tag, tag->entry.ref_cnt);
8323         return mlx5_hlist_unregister(priv->sh->tag_table, &tag->entry);
8324 }
8325
8326 /**
8327  * Translate port ID action to vport.
8328  *
8329  * @param[in] dev
8330  *   Pointer to rte_eth_dev structure.
8331  * @param[in] action
8332  *   Pointer to the port ID action.
8333  * @param[out] dst_port_id
8334  *   The target port ID.
8335  * @param[out] error
8336  *   Pointer to the error structure.
8337  *
8338  * @return
8339  *   0 on success, a negative errno value otherwise and rte_errno is set.
8340  */
8341 static int
8342 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
8343                                  const struct rte_flow_action *action,
8344                                  uint32_t *dst_port_id,
8345                                  struct rte_flow_error *error)
8346 {
8347         uint32_t port;
8348         struct mlx5_priv *priv;
8349         const struct rte_flow_action_port_id *conf =
8350                         (const struct rte_flow_action_port_id *)action->conf;
8351
8352         port = conf->original ? dev->data->port_id : conf->id;
8353         priv = mlx5_port_to_eswitch_info(port, false);
8354         if (!priv)
8355                 return rte_flow_error_set(error, -rte_errno,
8356                                           RTE_FLOW_ERROR_TYPE_ACTION,
8357                                           NULL,
8358                                           "No eswitch info was found for port");
8359 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
8360         /*
8361          * This parameter is transferred to
8362          * mlx5dv_dr_action_create_dest_ib_port().
8363          */
8364         *dst_port_id = priv->dev_port;
8365 #else
8366         /*
8367          * Legacy mode, no LAG configurations is supported.
8368          * This parameter is transferred to
8369          * mlx5dv_dr_action_create_dest_vport().
8370          */
8371         *dst_port_id = priv->vport_id;
8372 #endif
8373         return 0;
8374 }
8375
8376 /**
8377  * Create a counter with aging configuration.
8378  *
8379  * @param[in] dev
8380  *   Pointer to rte_eth_dev structure.
8381  * @param[out] count
8382  *   Pointer to the counter action configuration.
8383  * @param[in] age
8384  *   Pointer to the aging action configuration.
8385  *
8386  * @return
8387  *   Index to flow counter on success, 0 otherwise.
8388  */
8389 static uint32_t
8390 flow_dv_translate_create_counter(struct rte_eth_dev *dev,
8391                                 struct mlx5_flow *dev_flow,
8392                                 const struct rte_flow_action_count *count,
8393                                 const struct rte_flow_action_age *age)
8394 {
8395         uint32_t counter;
8396         struct mlx5_age_param *age_param;
8397
8398         if (count && count->shared)
8399                 counter = flow_dv_counter_get_shared(dev, count->id);
8400         else
8401                 counter = flow_dv_counter_alloc(dev, !!age);
8402         if (!counter || age == NULL)
8403                 return counter;
8404         age_param  = flow_dv_counter_idx_get_age(dev, counter);
8405         age_param->context = age->context ? age->context :
8406                 (void *)(uintptr_t)(dev_flow->flow_idx);
8407         age_param->timeout = age->timeout;
8408         age_param->port_id = dev->data->port_id;
8409         __atomic_store_n(&age_param->sec_since_last_hit, 0, __ATOMIC_RELAXED);
8410         __atomic_store_n(&age_param->state, AGE_CANDIDATE, __ATOMIC_RELAXED);
8411         return counter;
8412 }
8413
8414 /**
8415  * Add Tx queue matcher
8416  *
8417  * @param[in] dev
8418  *   Pointer to the dev struct.
8419  * @param[in, out] matcher
8420  *   Flow matcher.
8421  * @param[in, out] key
8422  *   Flow matcher value.
8423  * @param[in] item
8424  *   Flow pattern to translate.
8425  * @param[in] inner
8426  *   Item is inner pattern.
8427  */
8428 static void
8429 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
8430                                 void *matcher, void *key,
8431                                 const struct rte_flow_item *item)
8432 {
8433         const struct mlx5_rte_flow_item_tx_queue *queue_m;
8434         const struct mlx5_rte_flow_item_tx_queue *queue_v;
8435         void *misc_m =
8436                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8437         void *misc_v =
8438                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8439         struct mlx5_txq_ctrl *txq;
8440         uint32_t queue;
8441
8442
8443         queue_m = (const void *)item->mask;
8444         if (!queue_m)
8445                 return;
8446         queue_v = (const void *)item->spec;
8447         if (!queue_v)
8448                 return;
8449         txq = mlx5_txq_get(dev, queue_v->queue);
8450         if (!txq)
8451                 return;
8452         queue = txq->obj->sq->id;
8453         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
8454         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
8455                  queue & queue_m->queue);
8456         mlx5_txq_release(dev, queue_v->queue);
8457 }
8458
8459 /**
8460  * Set the hash fields according to the @p flow information.
8461  *
8462  * @param[in] dev_flow
8463  *   Pointer to the mlx5_flow.
8464  * @param[in] rss_desc
8465  *   Pointer to the mlx5_flow_rss_desc.
8466  */
8467 static void
8468 flow_dv_hashfields_set(struct mlx5_flow *dev_flow,
8469                        struct mlx5_flow_rss_desc *rss_desc)
8470 {
8471         uint64_t items = dev_flow->handle->layers;
8472         int rss_inner = 0;
8473         uint64_t rss_types = rte_eth_rss_hf_refine(rss_desc->types);
8474
8475         dev_flow->hash_fields = 0;
8476 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
8477         if (rss_desc->level >= 2) {
8478                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
8479                 rss_inner = 1;
8480         }
8481 #endif
8482         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
8483             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
8484                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
8485                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
8486                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
8487                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
8488                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
8489                         else
8490                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
8491                 }
8492         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
8493                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
8494                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
8495                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
8496                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
8497                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
8498                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
8499                         else
8500                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
8501                 }
8502         }
8503         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
8504             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
8505                 if (rss_types & ETH_RSS_UDP) {
8506                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
8507                                 dev_flow->hash_fields |=
8508                                                 IBV_RX_HASH_SRC_PORT_UDP;
8509                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
8510                                 dev_flow->hash_fields |=
8511                                                 IBV_RX_HASH_DST_PORT_UDP;
8512                         else
8513                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
8514                 }
8515         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
8516                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
8517                 if (rss_types & ETH_RSS_TCP) {
8518                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
8519                                 dev_flow->hash_fields |=
8520                                                 IBV_RX_HASH_SRC_PORT_TCP;
8521                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
8522                                 dev_flow->hash_fields |=
8523                                                 IBV_RX_HASH_DST_PORT_TCP;
8524                         else
8525                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
8526                 }
8527         }
8528 }
8529
8530 /**
8531  * Prepare an Rx Hash queue.
8532  *
8533  * @param dev
8534  *   Pointer to Ethernet device.
8535  * @param[in] dev_flow
8536  *   Pointer to the mlx5_flow.
8537  * @param[in] rss_desc
8538  *   Pointer to the mlx5_flow_rss_desc.
8539  * @param[out] hrxq_idx
8540  *   Hash Rx queue index.
8541  *
8542  * @return
8543  *   The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
8544  */
8545 static struct mlx5_hrxq *
8546 flow_dv_hrxq_prepare(struct rte_eth_dev *dev,
8547                      struct mlx5_flow *dev_flow,
8548                      struct mlx5_flow_rss_desc *rss_desc,
8549                      uint32_t *hrxq_idx)
8550 {
8551         struct mlx5_priv *priv = dev->data->dev_private;
8552         struct mlx5_flow_handle *dh = dev_flow->handle;
8553         struct mlx5_hrxq *hrxq;
8554
8555         MLX5_ASSERT(rss_desc->queue_num);
8556         rss_desc->key_len = MLX5_RSS_HASH_KEY_LEN;
8557         rss_desc->hash_fields = dev_flow->hash_fields;
8558         rss_desc->tunnel = !!(dh->layers & MLX5_FLOW_LAYER_TUNNEL);
8559         rss_desc->standalone = false;
8560         *hrxq_idx = mlx5_hrxq_get(dev, rss_desc);
8561         if (!*hrxq_idx)
8562                 return NULL;
8563         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
8564                               *hrxq_idx);
8565         return hrxq;
8566 }
8567
8568 /**
8569  * Release sample sub action resource.
8570  *
8571  * @param[in, out] dev
8572  *   Pointer to rte_eth_dev structure.
8573  * @param[in] act_res
8574  *   Pointer to sample sub action resource.
8575  */
8576 static void
8577 flow_dv_sample_sub_actions_release(struct rte_eth_dev *dev,
8578                                    struct mlx5_flow_sub_actions_idx *act_res)
8579 {
8580         if (act_res->rix_hrxq) {
8581                 mlx5_hrxq_release(dev, act_res->rix_hrxq);
8582                 act_res->rix_hrxq = 0;
8583         }
8584         if (act_res->rix_encap_decap) {
8585                 flow_dv_encap_decap_resource_release(dev,
8586                                                      act_res->rix_encap_decap);
8587                 act_res->rix_encap_decap = 0;
8588         }
8589         if (act_res->rix_port_id_action) {
8590                 flow_dv_port_id_action_resource_release(dev,
8591                                                 act_res->rix_port_id_action);
8592                 act_res->rix_port_id_action = 0;
8593         }
8594         if (act_res->rix_tag) {
8595                 flow_dv_tag_release(dev, act_res->rix_tag);
8596                 act_res->rix_tag = 0;
8597         }
8598         if (act_res->cnt) {
8599                 flow_dv_counter_free(dev, act_res->cnt);
8600                 act_res->cnt = 0;
8601         }
8602 }
8603
8604 int
8605 flow_dv_sample_match_cb(struct mlx5_cache_list *list __rte_unused,
8606                         struct mlx5_cache_entry *entry, void *cb_ctx)
8607 {
8608         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8609         struct rte_eth_dev *dev = ctx->dev;
8610         struct mlx5_flow_dv_sample_resource *resource = ctx->data;
8611         struct mlx5_flow_dv_sample_resource *cache_resource =
8612                         container_of(entry, typeof(*cache_resource), entry);
8613
8614         if (resource->ratio == cache_resource->ratio &&
8615             resource->ft_type == cache_resource->ft_type &&
8616             resource->ft_id == cache_resource->ft_id &&
8617             resource->set_action == cache_resource->set_action &&
8618             !memcmp((void *)&resource->sample_act,
8619                     (void *)&cache_resource->sample_act,
8620                     sizeof(struct mlx5_flow_sub_actions_list))) {
8621                 /*
8622                  * Existing sample action should release the prepared
8623                  * sub-actions reference counter.
8624                  */
8625                 flow_dv_sample_sub_actions_release(dev,
8626                                                 &resource->sample_idx);
8627                 return 0;
8628         }
8629         return 1;
8630 }
8631
8632 struct mlx5_cache_entry *
8633 flow_dv_sample_create_cb(struct mlx5_cache_list *list __rte_unused,
8634                          struct mlx5_cache_entry *entry __rte_unused,
8635                          void *cb_ctx)
8636 {
8637         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8638         struct rte_eth_dev *dev = ctx->dev;
8639         struct mlx5_flow_dv_sample_resource *resource = ctx->data;
8640         void **sample_dv_actions = resource->sub_actions;
8641         struct mlx5_flow_dv_sample_resource *cache_resource;
8642         struct mlx5dv_dr_flow_sampler_attr sampler_attr;
8643         struct mlx5_priv *priv = dev->data->dev_private;
8644         struct mlx5_dev_ctx_shared *sh = priv->sh;
8645         struct mlx5_flow_tbl_resource *tbl;
8646         uint32_t idx = 0;
8647         const uint32_t next_ft_step = 1;
8648         uint32_t next_ft_id = resource->ft_id + next_ft_step;
8649         uint8_t is_egress = 0;
8650         uint8_t is_transfer = 0;
8651         struct rte_flow_error *error = ctx->error;
8652
8653         /* Register new sample resource. */
8654         cache_resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
8655         if (!cache_resource) {
8656                 rte_flow_error_set(error, ENOMEM,
8657                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8658                                           NULL,
8659                                           "cannot allocate resource memory");
8660                 return NULL;
8661         }
8662         *cache_resource = *resource;
8663         /* Create normal path table level */
8664         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
8665                 is_transfer = 1;
8666         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
8667                 is_egress = 1;
8668         tbl = flow_dv_tbl_resource_get(dev, next_ft_id,
8669                                         is_egress, is_transfer,
8670                                         true, NULL, 0, 0, error);
8671         if (!tbl) {
8672                 rte_flow_error_set(error, ENOMEM,
8673                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8674                                           NULL,
8675                                           "fail to create normal path table "
8676                                           "for sample");
8677                 goto error;
8678         }
8679         cache_resource->normal_path_tbl = tbl;
8680         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
8681                 cache_resource->default_miss =
8682                                 mlx5_glue->dr_create_flow_action_default_miss();
8683                 if (!cache_resource->default_miss) {
8684                         rte_flow_error_set(error, ENOMEM,
8685                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8686                                                 NULL,
8687                                                 "cannot create default miss "
8688                                                 "action");
8689                         goto error;
8690                 }
8691                 sample_dv_actions[resource->sample_act.actions_num++] =
8692                                                 cache_resource->default_miss;
8693         }
8694         /* Create a DR sample action */
8695         sampler_attr.sample_ratio = cache_resource->ratio;
8696         sampler_attr.default_next_table = tbl->obj;
8697         sampler_attr.num_sample_actions = resource->sample_act.actions_num;
8698         sampler_attr.sample_actions = (struct mlx5dv_dr_action **)
8699                                                         &sample_dv_actions[0];
8700         sampler_attr.action = cache_resource->set_action;
8701         cache_resource->verbs_action =
8702                 mlx5_glue->dr_create_flow_action_sampler(&sampler_attr);
8703         if (!cache_resource->verbs_action) {
8704                 rte_flow_error_set(error, ENOMEM,
8705                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8706                                         NULL, "cannot create sample action");
8707                 goto error;
8708         }
8709         cache_resource->idx = idx;
8710         return &cache_resource->entry;
8711 error:
8712         if (cache_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB &&
8713             cache_resource->default_miss)
8714                 claim_zero(mlx5_glue->destroy_flow_action
8715                                 (cache_resource->default_miss));
8716         else
8717                 flow_dv_sample_sub_actions_release(dev,
8718                                                    &cache_resource->sample_idx);
8719         if (cache_resource->normal_path_tbl)
8720                 flow_dv_tbl_resource_release(MLX5_SH(dev),
8721                                 cache_resource->normal_path_tbl);
8722         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_SAMPLE], idx);
8723         return NULL;
8724
8725 }
8726
8727 /**
8728  * Find existing sample resource or create and register a new one.
8729  *
8730  * @param[in, out] dev
8731  *   Pointer to rte_eth_dev structure.
8732  * @param[in] resource
8733  *   Pointer to sample resource.
8734  * @parm[in, out] dev_flow
8735  *   Pointer to the dev_flow.
8736  * @param[out] error
8737  *   pointer to error structure.
8738  *
8739  * @return
8740  *   0 on success otherwise -errno and errno is set.
8741  */
8742 static int
8743 flow_dv_sample_resource_register(struct rte_eth_dev *dev,
8744                          struct mlx5_flow_dv_sample_resource *resource,
8745                          struct mlx5_flow *dev_flow,
8746                          struct rte_flow_error *error)
8747 {
8748         struct mlx5_flow_dv_sample_resource *cache_resource;
8749         struct mlx5_cache_entry *entry;
8750         struct mlx5_priv *priv = dev->data->dev_private;
8751         struct mlx5_flow_cb_ctx ctx = {
8752                 .dev = dev,
8753                 .error = error,
8754                 .data = resource,
8755         };
8756
8757         entry = mlx5_cache_register(&priv->sh->sample_action_list, &ctx);
8758         if (!entry)
8759                 return -rte_errno;
8760         cache_resource = container_of(entry, typeof(*cache_resource), entry);
8761         dev_flow->handle->dvh.rix_sample = cache_resource->idx;
8762         dev_flow->dv.sample_res = cache_resource;
8763         return 0;
8764 }
8765
8766 int
8767 flow_dv_dest_array_match_cb(struct mlx5_cache_list *list __rte_unused,
8768                             struct mlx5_cache_entry *entry, void *cb_ctx)
8769 {
8770         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8771         struct mlx5_flow_dv_dest_array_resource *resource = ctx->data;
8772         struct rte_eth_dev *dev = ctx->dev;
8773         struct mlx5_flow_dv_dest_array_resource *cache_resource =
8774                         container_of(entry, typeof(*cache_resource), entry);
8775         uint32_t idx = 0;
8776
8777         if (resource->num_of_dest == cache_resource->num_of_dest &&
8778             resource->ft_type == cache_resource->ft_type &&
8779             !memcmp((void *)cache_resource->sample_act,
8780                     (void *)resource->sample_act,
8781                    (resource->num_of_dest *
8782                    sizeof(struct mlx5_flow_sub_actions_list)))) {
8783                 /*
8784                  * Existing sample action should release the prepared
8785                  * sub-actions reference counter.
8786                  */
8787                 for (idx = 0; idx < resource->num_of_dest; idx++)
8788                         flow_dv_sample_sub_actions_release(dev,
8789                                         &resource->sample_idx[idx]);
8790                 return 0;
8791         }
8792         return 1;
8793 }
8794
8795 struct mlx5_cache_entry *
8796 flow_dv_dest_array_create_cb(struct mlx5_cache_list *list __rte_unused,
8797                          struct mlx5_cache_entry *entry __rte_unused,
8798                          void *cb_ctx)
8799 {
8800         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8801         struct rte_eth_dev *dev = ctx->dev;
8802         struct mlx5_flow_dv_dest_array_resource *cache_resource;
8803         struct mlx5_flow_dv_dest_array_resource *resource = ctx->data;
8804         struct mlx5dv_dr_action_dest_attr *dest_attr[MLX5_MAX_DEST_NUM] = { 0 };
8805         struct mlx5dv_dr_action_dest_reformat dest_reformat[MLX5_MAX_DEST_NUM];
8806         struct mlx5_priv *priv = dev->data->dev_private;
8807         struct mlx5_dev_ctx_shared *sh = priv->sh;
8808         struct mlx5_flow_sub_actions_list *sample_act;
8809         struct mlx5dv_dr_domain *domain;
8810         uint32_t idx = 0, res_idx = 0;
8811         struct rte_flow_error *error = ctx->error;
8812
8813         /* Register new destination array resource. */
8814         cache_resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
8815                                             &res_idx);
8816         if (!cache_resource) {
8817                 rte_flow_error_set(error, ENOMEM,
8818                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8819                                           NULL,
8820                                           "cannot allocate resource memory");
8821                 return NULL;
8822         }
8823         *cache_resource = *resource;
8824         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
8825                 domain = sh->fdb_domain;
8826         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
8827                 domain = sh->rx_domain;
8828         else
8829                 domain = sh->tx_domain;
8830         for (idx = 0; idx < resource->num_of_dest; idx++) {
8831                 dest_attr[idx] = (struct mlx5dv_dr_action_dest_attr *)
8832                                  mlx5_malloc(MLX5_MEM_ZERO,
8833                                  sizeof(struct mlx5dv_dr_action_dest_attr),
8834                                  0, SOCKET_ID_ANY);
8835                 if (!dest_attr[idx]) {
8836                         rte_flow_error_set(error, ENOMEM,
8837                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8838                                            NULL,
8839                                            "cannot allocate resource memory");
8840                         goto error;
8841                 }
8842                 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST;
8843                 sample_act = &resource->sample_act[idx];
8844                 if (sample_act->action_flags == MLX5_FLOW_ACTION_QUEUE) {
8845                         dest_attr[idx]->dest = sample_act->dr_queue_action;
8846                 } else if (sample_act->action_flags ==
8847                           (MLX5_FLOW_ACTION_PORT_ID | MLX5_FLOW_ACTION_ENCAP)) {
8848                         dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST_REFORMAT;
8849                         dest_attr[idx]->dest_reformat = &dest_reformat[idx];
8850                         dest_attr[idx]->dest_reformat->reformat =
8851                                         sample_act->dr_encap_action;
8852                         dest_attr[idx]->dest_reformat->dest =
8853                                         sample_act->dr_port_id_action;
8854                 } else if (sample_act->action_flags ==
8855                            MLX5_FLOW_ACTION_PORT_ID) {
8856                         dest_attr[idx]->dest = sample_act->dr_port_id_action;
8857                 }
8858         }
8859         /* create a dest array actioin */
8860         cache_resource->action = mlx5_glue->dr_create_flow_action_dest_array
8861                                                 (domain,
8862                                                  cache_resource->num_of_dest,
8863                                                  dest_attr);
8864         if (!cache_resource->action) {
8865                 rte_flow_error_set(error, ENOMEM,
8866                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8867                                    NULL,
8868                                    "cannot create destination array action");
8869                 goto error;
8870         }
8871         cache_resource->idx = res_idx;
8872         for (idx = 0; idx < resource->num_of_dest; idx++)
8873                 mlx5_free(dest_attr[idx]);
8874         return &cache_resource->entry;
8875 error:
8876         for (idx = 0; idx < resource->num_of_dest; idx++) {
8877                 struct mlx5_flow_sub_actions_idx *act_res =
8878                                         &cache_resource->sample_idx[idx];
8879                 if (act_res->rix_hrxq &&
8880                     !mlx5_hrxq_release(dev,
8881                                 act_res->rix_hrxq))
8882                         act_res->rix_hrxq = 0;
8883                 if (act_res->rix_encap_decap &&
8884                         !flow_dv_encap_decap_resource_release(dev,
8885                                 act_res->rix_encap_decap))
8886                         act_res->rix_encap_decap = 0;
8887                 if (act_res->rix_port_id_action &&
8888                         !flow_dv_port_id_action_resource_release(dev,
8889                                 act_res->rix_port_id_action))
8890                         act_res->rix_port_id_action = 0;
8891                 if (dest_attr[idx])
8892                         mlx5_free(dest_attr[idx]);
8893         }
8894
8895         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DEST_ARRAY], res_idx);
8896         return NULL;
8897 }
8898
8899 /**
8900  * Find existing destination array resource or create and register a new one.
8901  *
8902  * @param[in, out] dev
8903  *   Pointer to rte_eth_dev structure.
8904  * @param[in] resource
8905  *   Pointer to destination array resource.
8906  * @parm[in, out] dev_flow
8907  *   Pointer to the dev_flow.
8908  * @param[out] error
8909  *   pointer to error structure.
8910  *
8911  * @return
8912  *   0 on success otherwise -errno and errno is set.
8913  */
8914 static int
8915 flow_dv_dest_array_resource_register(struct rte_eth_dev *dev,
8916                          struct mlx5_flow_dv_dest_array_resource *resource,
8917                          struct mlx5_flow *dev_flow,
8918                          struct rte_flow_error *error)
8919 {
8920         struct mlx5_flow_dv_dest_array_resource *cache_resource;
8921         struct mlx5_priv *priv = dev->data->dev_private;
8922         struct mlx5_cache_entry *entry;
8923         struct mlx5_flow_cb_ctx ctx = {
8924                 .dev = dev,
8925                 .error = error,
8926                 .data = resource,
8927         };
8928
8929         entry = mlx5_cache_register(&priv->sh->dest_array_list, &ctx);
8930         if (!entry)
8931                 return -rte_errno;
8932         cache_resource = container_of(entry, typeof(*cache_resource), entry);
8933         dev_flow->handle->dvh.rix_dest_array = cache_resource->idx;
8934         dev_flow->dv.dest_array_res = cache_resource;
8935         return 0;
8936 }
8937
8938 /**
8939  * Convert Sample action to DV specification.
8940  *
8941  * @param[in] dev
8942  *   Pointer to rte_eth_dev structure.
8943  * @param[in] action
8944  *   Pointer to action structure.
8945  * @param[in, out] dev_flow
8946  *   Pointer to the mlx5_flow.
8947  * @param[in] attr
8948  *   Pointer to the flow attributes.
8949  * @param[in, out] num_of_dest
8950  *   Pointer to the num of destination.
8951  * @param[in, out] sample_actions
8952  *   Pointer to sample actions list.
8953  * @param[in, out] res
8954  *   Pointer to sample resource.
8955  * @param[out] error
8956  *   Pointer to the error structure.
8957  *
8958  * @return
8959  *   0 on success, a negative errno value otherwise and rte_errno is set.
8960  */
8961 static int
8962 flow_dv_translate_action_sample(struct rte_eth_dev *dev,
8963                                 const struct rte_flow_action *action,
8964                                 struct mlx5_flow *dev_flow,
8965                                 const struct rte_flow_attr *attr,
8966                                 uint32_t *num_of_dest,
8967                                 void **sample_actions,
8968                                 struct mlx5_flow_dv_sample_resource *res,
8969                                 struct rte_flow_error *error)
8970 {
8971         struct mlx5_priv *priv = dev->data->dev_private;
8972         const struct rte_flow_action_sample *sample_action;
8973         const struct rte_flow_action *sub_actions;
8974         const struct rte_flow_action_queue *queue;
8975         struct mlx5_flow_sub_actions_list *sample_act;
8976         struct mlx5_flow_sub_actions_idx *sample_idx;
8977         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
8978         struct mlx5_flow_rss_desc *rss_desc;
8979         uint64_t action_flags = 0;
8980
8981         MLX5_ASSERT(wks);
8982         rss_desc = &wks->rss_desc[!!wks->flow_nested_idx];
8983         sample_act = &res->sample_act;
8984         sample_idx = &res->sample_idx;
8985         sample_action = (const struct rte_flow_action_sample *)action->conf;
8986         res->ratio = sample_action->ratio;
8987         sub_actions = sample_action->actions;
8988         for (; sub_actions->type != RTE_FLOW_ACTION_TYPE_END; sub_actions++) {
8989                 int type = sub_actions->type;
8990                 uint32_t pre_rix = 0;
8991                 void *pre_r;
8992                 switch (type) {
8993                 case RTE_FLOW_ACTION_TYPE_QUEUE:
8994                 {
8995                         struct mlx5_hrxq *hrxq;
8996                         uint32_t hrxq_idx;
8997
8998                         queue = sub_actions->conf;
8999                         rss_desc->queue_num = 1;
9000                         rss_desc->queue[0] = queue->index;
9001                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
9002                                                     rss_desc, &hrxq_idx);
9003                         if (!hrxq)
9004                                 return rte_flow_error_set
9005                                         (error, rte_errno,
9006                                          RTE_FLOW_ERROR_TYPE_ACTION,
9007                                          NULL,
9008                                          "cannot create fate queue");
9009                         sample_act->dr_queue_action = hrxq->action;
9010                         sample_idx->rix_hrxq = hrxq_idx;
9011                         sample_actions[sample_act->actions_num++] =
9012                                                 hrxq->action;
9013                         (*num_of_dest)++;
9014                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
9015                         if (action_flags & MLX5_FLOW_ACTION_MARK)
9016                                 dev_flow->handle->rix_hrxq = hrxq_idx;
9017                         dev_flow->handle->fate_action =
9018                                         MLX5_FLOW_FATE_QUEUE;
9019                         break;
9020                 }
9021                 case RTE_FLOW_ACTION_TYPE_MARK:
9022                 {
9023                         uint32_t tag_be = mlx5_flow_mark_set
9024                                 (((const struct rte_flow_action_mark *)
9025                                 (sub_actions->conf))->id);
9026
9027                         dev_flow->handle->mark = 1;
9028                         pre_rix = dev_flow->handle->dvh.rix_tag;
9029                         /* Save the mark resource before sample */
9030                         pre_r = dev_flow->dv.tag_resource;
9031                         if (flow_dv_tag_resource_register(dev, tag_be,
9032                                                   dev_flow, error))
9033                                 return -rte_errno;
9034                         MLX5_ASSERT(dev_flow->dv.tag_resource);
9035                         sample_act->dr_tag_action =
9036                                 dev_flow->dv.tag_resource->action;
9037                         sample_idx->rix_tag =
9038                                 dev_flow->handle->dvh.rix_tag;
9039                         sample_actions[sample_act->actions_num++] =
9040                                                 sample_act->dr_tag_action;
9041                         /* Recover the mark resource after sample */
9042                         dev_flow->dv.tag_resource = pre_r;
9043                         dev_flow->handle->dvh.rix_tag = pre_rix;
9044                         action_flags |= MLX5_FLOW_ACTION_MARK;
9045                         break;
9046                 }
9047                 case RTE_FLOW_ACTION_TYPE_COUNT:
9048                 {
9049                         uint32_t counter;
9050
9051                         counter = flow_dv_translate_create_counter(dev,
9052                                         dev_flow, sub_actions->conf, 0);
9053                         if (!counter)
9054                                 return rte_flow_error_set
9055                                                 (error, rte_errno,
9056                                                  RTE_FLOW_ERROR_TYPE_ACTION,
9057                                                  NULL,
9058                                                  "cannot create counter"
9059                                                  " object.");
9060                         sample_idx->cnt = counter;
9061                         sample_act->dr_cnt_action =
9062                                   (flow_dv_counter_get_by_idx(dev,
9063                                   counter, NULL))->action;
9064                         sample_actions[sample_act->actions_num++] =
9065                                                 sample_act->dr_cnt_action;
9066                         action_flags |= MLX5_FLOW_ACTION_COUNT;
9067                         break;
9068                 }
9069                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
9070                 {
9071                         struct mlx5_flow_dv_port_id_action_resource
9072                                         port_id_resource;
9073                         uint32_t port_id = 0;
9074
9075                         memset(&port_id_resource, 0, sizeof(port_id_resource));
9076                         /* Save the port id resource before sample */
9077                         pre_rix = dev_flow->handle->rix_port_id_action;
9078                         pre_r = dev_flow->dv.port_id_action;
9079                         if (flow_dv_translate_action_port_id(dev, sub_actions,
9080                                                              &port_id, error))
9081                                 return -rte_errno;
9082                         port_id_resource.port_id = port_id;
9083                         if (flow_dv_port_id_action_resource_register
9084                             (dev, &port_id_resource, dev_flow, error))
9085                                 return -rte_errno;
9086                         sample_act->dr_port_id_action =
9087                                 dev_flow->dv.port_id_action->action;
9088                         sample_idx->rix_port_id_action =
9089                                 dev_flow->handle->rix_port_id_action;
9090                         sample_actions[sample_act->actions_num++] =
9091                                                 sample_act->dr_port_id_action;
9092                         /* Recover the port id resource after sample */
9093                         dev_flow->dv.port_id_action = pre_r;
9094                         dev_flow->handle->rix_port_id_action = pre_rix;
9095                         (*num_of_dest)++;
9096                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
9097                         break;
9098                 }
9099                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
9100                         /* Save the encap resource before sample */
9101                         pre_rix = dev_flow->handle->dvh.rix_encap_decap;
9102                         pre_r = dev_flow->dv.encap_decap;
9103                         if (flow_dv_create_action_l2_encap(dev, sub_actions,
9104                                                            dev_flow,
9105                                                            attr->transfer,
9106                                                            error))
9107                                 return -rte_errno;
9108                         sample_act->dr_encap_action =
9109                                 dev_flow->dv.encap_decap->action;
9110                         sample_idx->rix_encap_decap =
9111                                 dev_flow->handle->dvh.rix_encap_decap;
9112                         sample_actions[sample_act->actions_num++] =
9113                                                 sample_act->dr_encap_action;
9114                         /* Recover the encap resource after sample */
9115                         dev_flow->dv.encap_decap = pre_r;
9116                         dev_flow->handle->dvh.rix_encap_decap = pre_rix;
9117                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
9118                         break;
9119                 default:
9120                         return rte_flow_error_set(error, EINVAL,
9121                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
9122                                 NULL,
9123                                 "Not support for sampler action");
9124                 }
9125         }
9126         sample_act->action_flags = action_flags;
9127         res->ft_id = dev_flow->dv.group;
9128         if (attr->transfer) {
9129                 union {
9130                         uint32_t action_in[MLX5_ST_SZ_DW(set_action_in)];
9131                         uint64_t set_action;
9132                 } action_ctx = { .set_action = 0 };
9133
9134                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
9135                 MLX5_SET(set_action_in, action_ctx.action_in, action_type,
9136                          MLX5_MODIFICATION_TYPE_SET);
9137                 MLX5_SET(set_action_in, action_ctx.action_in, field,
9138                          MLX5_MODI_META_REG_C_0);
9139                 MLX5_SET(set_action_in, action_ctx.action_in, data,
9140                          priv->vport_meta_tag);
9141                 res->set_action = action_ctx.set_action;
9142         } else if (attr->ingress) {
9143                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
9144         } else {
9145                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_TX;
9146         }
9147         return 0;
9148 }
9149
9150 /**
9151  * Convert Sample action to DV specification.
9152  *
9153  * @param[in] dev
9154  *   Pointer to rte_eth_dev structure.
9155  * @param[in, out] dev_flow
9156  *   Pointer to the mlx5_flow.
9157  * @param[in] num_of_dest
9158  *   The num of destination.
9159  * @param[in, out] res
9160  *   Pointer to sample resource.
9161  * @param[in, out] mdest_res
9162  *   Pointer to destination array resource.
9163  * @param[in] sample_actions
9164  *   Pointer to sample path actions list.
9165  * @param[in] action_flags
9166  *   Holds the actions detected until now.
9167  * @param[out] error
9168  *   Pointer to the error structure.
9169  *
9170  * @return
9171  *   0 on success, a negative errno value otherwise and rte_errno is set.
9172  */
9173 static int
9174 flow_dv_create_action_sample(struct rte_eth_dev *dev,
9175                              struct mlx5_flow *dev_flow,
9176                              uint32_t num_of_dest,
9177                              struct mlx5_flow_dv_sample_resource *res,
9178                              struct mlx5_flow_dv_dest_array_resource *mdest_res,
9179                              void **sample_actions,
9180                              uint64_t action_flags,
9181                              struct rte_flow_error *error)
9182 {
9183         /* update normal path action resource into last index of array */
9184         uint32_t dest_index = MLX5_MAX_DEST_NUM - 1;
9185         struct mlx5_flow_sub_actions_list *sample_act =
9186                                         &mdest_res->sample_act[dest_index];
9187         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
9188         struct mlx5_flow_rss_desc *rss_desc;
9189         uint32_t normal_idx = 0;
9190         struct mlx5_hrxq *hrxq;
9191         uint32_t hrxq_idx;
9192
9193         MLX5_ASSERT(wks);
9194         rss_desc = &wks->rss_desc[!!wks->flow_nested_idx];
9195         if (num_of_dest > 1) {
9196                 if (sample_act->action_flags & MLX5_FLOW_ACTION_QUEUE) {
9197                         /* Handle QP action for mirroring */
9198                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
9199                                                     rss_desc, &hrxq_idx);
9200                         if (!hrxq)
9201                                 return rte_flow_error_set
9202                                      (error, rte_errno,
9203                                       RTE_FLOW_ERROR_TYPE_ACTION,
9204                                       NULL,
9205                                       "cannot create rx queue");
9206                         normal_idx++;
9207                         mdest_res->sample_idx[dest_index].rix_hrxq = hrxq_idx;
9208                         sample_act->dr_queue_action = hrxq->action;
9209                         if (action_flags & MLX5_FLOW_ACTION_MARK)
9210                                 dev_flow->handle->rix_hrxq = hrxq_idx;
9211                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
9212                 }
9213                 if (sample_act->action_flags & MLX5_FLOW_ACTION_ENCAP) {
9214                         normal_idx++;
9215                         mdest_res->sample_idx[dest_index].rix_encap_decap =
9216                                 dev_flow->handle->dvh.rix_encap_decap;
9217                         sample_act->dr_encap_action =
9218                                 dev_flow->dv.encap_decap->action;
9219                 }
9220                 if (sample_act->action_flags & MLX5_FLOW_ACTION_PORT_ID) {
9221                         normal_idx++;
9222                         mdest_res->sample_idx[dest_index].rix_port_id_action =
9223                                 dev_flow->handle->rix_port_id_action;
9224                         sample_act->dr_port_id_action =
9225                                 dev_flow->dv.port_id_action->action;
9226                 }
9227                 sample_act->actions_num = normal_idx;
9228                 /* update sample action resource into first index of array */
9229                 mdest_res->ft_type = res->ft_type;
9230                 memcpy(&mdest_res->sample_idx[0], &res->sample_idx,
9231                                 sizeof(struct mlx5_flow_sub_actions_idx));
9232                 memcpy(&mdest_res->sample_act[0], &res->sample_act,
9233                                 sizeof(struct mlx5_flow_sub_actions_list));
9234                 mdest_res->num_of_dest = num_of_dest;
9235                 if (flow_dv_dest_array_resource_register(dev, mdest_res,
9236                                                          dev_flow, error))
9237                         return rte_flow_error_set(error, EINVAL,
9238                                                   RTE_FLOW_ERROR_TYPE_ACTION,
9239                                                   NULL, "can't create sample "
9240                                                   "action");
9241         } else {
9242                 res->sub_actions = sample_actions;
9243                 if (flow_dv_sample_resource_register(dev, res, dev_flow, error))
9244                         return rte_flow_error_set(error, EINVAL,
9245                                                   RTE_FLOW_ERROR_TYPE_ACTION,
9246                                                   NULL,
9247                                                   "can't create sample action");
9248         }
9249         return 0;
9250 }
9251
9252 /**
9253  * Remove an ASO age action from age actions list.
9254  *
9255  * @param[in] dev
9256  *   Pointer to the Ethernet device structure.
9257  * @param[in] age
9258  *   Pointer to the aso age action handler.
9259  */
9260 static void
9261 flow_dv_aso_age_remove_from_age(struct rte_eth_dev *dev,
9262                                 struct mlx5_aso_age_action *age)
9263 {
9264         struct mlx5_age_info *age_info;
9265         struct mlx5_age_param *age_param = &age->age_params;
9266         struct mlx5_priv *priv = dev->data->dev_private;
9267         uint16_t expected = AGE_CANDIDATE;
9268
9269         age_info = GET_PORT_AGE_INFO(priv);
9270         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
9271                                          AGE_FREE, false, __ATOMIC_RELAXED,
9272                                          __ATOMIC_RELAXED)) {
9273                 /**
9274                  * We need the lock even it is age timeout,
9275                  * since age action may still in process.
9276                  */
9277                 rte_spinlock_lock(&age_info->aged_sl);
9278                 LIST_REMOVE(age, next);
9279                 rte_spinlock_unlock(&age_info->aged_sl);
9280                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
9281         }
9282 }
9283
9284 /**
9285  * Release an ASO age action.
9286  *
9287  * @param[in] dev
9288  *   Pointer to the Ethernet device structure.
9289  * @param[in] age_idx
9290  *   Index of ASO age action to release.
9291  * @param[in] flow
9292  *   True if the release operation is during flow destroy operation.
9293  *   False if the release operation is during action destroy operation.
9294  *
9295  * @return
9296  *   0 when age action was removed, otherwise the number of references.
9297  */
9298 static int
9299 flow_dv_aso_age_release(struct rte_eth_dev *dev, uint32_t age_idx)
9300 {
9301         struct mlx5_priv *priv = dev->data->dev_private;
9302         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
9303         struct mlx5_aso_age_action *age = flow_aso_age_get_by_idx(dev, age_idx);
9304         uint32_t ret = __atomic_sub_fetch(&age->refcnt, 1, __ATOMIC_RELAXED);
9305
9306         if (!ret) {
9307                 flow_dv_aso_age_remove_from_age(dev, age);
9308                 rte_spinlock_lock(&mng->free_sl);
9309                 LIST_INSERT_HEAD(&mng->free, age, next);
9310                 rte_spinlock_unlock(&mng->free_sl);
9311         }
9312         return ret;
9313 }
9314
9315 /**
9316  * Resize the ASO age pools array by MLX5_CNT_CONTAINER_RESIZE pools.
9317  *
9318  * @param[in] dev
9319  *   Pointer to the Ethernet device structure.
9320  *
9321  * @return
9322  *   0 on success, otherwise negative errno value and rte_errno is set.
9323  */
9324 static int
9325 flow_dv_aso_age_pools_resize(struct rte_eth_dev *dev)
9326 {
9327         struct mlx5_priv *priv = dev->data->dev_private;
9328         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
9329         void *old_pools = mng->pools;
9330         uint32_t resize = mng->n + MLX5_CNT_CONTAINER_RESIZE;
9331         uint32_t mem_size = sizeof(struct mlx5_aso_age_pool *) * resize;
9332         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
9333
9334         if (!pools) {
9335                 rte_errno = ENOMEM;
9336                 return -ENOMEM;
9337         }
9338         if (old_pools) {
9339                 memcpy(pools, old_pools,
9340                        mng->n * sizeof(struct mlx5_flow_counter_pool *));
9341                 mlx5_free(old_pools);
9342         } else {
9343                 /* First ASO flow hit allocation - starting ASO data-path. */
9344                 int ret = mlx5_aso_queue_start(priv->sh);
9345
9346                 if (ret)
9347                         return ret;
9348         }
9349         mng->n = resize;
9350         mng->pools = pools;
9351         return 0;
9352 }
9353
9354 /**
9355  * Create and initialize a new ASO aging pool.
9356  *
9357  * @param[in] dev
9358  *   Pointer to the Ethernet device structure.
9359  * @param[out] age_free
9360  *   Where to put the pointer of a new age action.
9361  *
9362  * @return
9363  *   The age actions pool pointer and @p age_free is set on success,
9364  *   NULL otherwise and rte_errno is set.
9365  */
9366 static struct mlx5_aso_age_pool *
9367 flow_dv_age_pool_create(struct rte_eth_dev *dev,
9368                         struct mlx5_aso_age_action **age_free)
9369 {
9370         struct mlx5_priv *priv = dev->data->dev_private;
9371         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
9372         struct mlx5_aso_age_pool *pool = NULL;
9373         struct mlx5_devx_obj *obj = NULL;
9374         uint32_t i;
9375
9376         obj = mlx5_devx_cmd_create_flow_hit_aso_obj(priv->sh->ctx,
9377                                                     priv->sh->pdn);
9378         if (!obj) {
9379                 rte_errno = ENODATA;
9380                 DRV_LOG(ERR, "Failed to create flow_hit_aso_obj using DevX.");
9381                 return NULL;
9382         }
9383         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
9384         if (!pool) {
9385                 claim_zero(mlx5_devx_cmd_destroy(obj));
9386                 rte_errno = ENOMEM;
9387                 return NULL;
9388         }
9389         pool->flow_hit_aso_obj = obj;
9390         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
9391         rte_spinlock_lock(&mng->resize_sl);
9392         pool->index = mng->next;
9393         /* Resize pools array if there is no room for the new pool in it. */
9394         if (pool->index == mng->n && flow_dv_aso_age_pools_resize(dev)) {
9395                 claim_zero(mlx5_devx_cmd_destroy(obj));
9396                 mlx5_free(pool);
9397                 rte_spinlock_unlock(&mng->resize_sl);
9398                 return NULL;
9399         }
9400         mng->pools[pool->index] = pool;
9401         mng->next++;
9402         rte_spinlock_unlock(&mng->resize_sl);
9403         /* Assign the first action in the new pool, the rest go to free list. */
9404         *age_free = &pool->actions[0];
9405         for (i = 1; i < MLX5_ASO_AGE_ACTIONS_PER_POOL; i++) {
9406                 pool->actions[i].offset = i;
9407                 LIST_INSERT_HEAD(&mng->free, &pool->actions[i], next);
9408         }
9409         return pool;
9410 }
9411
9412 /**
9413  * Allocate a ASO aging bit.
9414  *
9415  * @param[in] dev
9416  *   Pointer to the Ethernet device structure.
9417  *
9418  * @return
9419  *   Index to ASO age action on success, 0 otherwise and rte_errno is set.
9420  */
9421 static uint32_t
9422 flow_dv_aso_age_alloc(struct rte_eth_dev *dev)
9423 {
9424         struct mlx5_priv *priv = dev->data->dev_private;
9425         const struct mlx5_aso_age_pool *pool;
9426         struct mlx5_aso_age_action *age_free = NULL;
9427         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
9428
9429         MLX5_ASSERT(mng);
9430         /* Try to get the next free age action bit. */
9431         rte_spinlock_lock(&mng->free_sl);
9432         age_free = LIST_FIRST(&mng->free);
9433         if (age_free) {
9434                 LIST_REMOVE(age_free, next);
9435         } else if (!flow_dv_age_pool_create(dev, &age_free)) {
9436                 rte_spinlock_unlock(&mng->free_sl);
9437                 return 0; /* 0 is an error.*/
9438         }
9439         rte_spinlock_unlock(&mng->free_sl);
9440         pool = container_of
9441           ((const struct mlx5_aso_age_action (*)[MLX5_ASO_AGE_ACTIONS_PER_POOL])
9442                   (age_free - age_free->offset), const struct mlx5_aso_age_pool,
9443                                                                        actions);
9444         if (!age_free->dr_action) {
9445                 age_free->dr_action = mlx5_glue->dr_action_create_flow_hit
9446                                                 (pool->flow_hit_aso_obj->obj,
9447                                                  age_free->offset, REG_C_5);
9448                 if (!age_free->dr_action) {
9449                         rte_errno = errno;
9450                         rte_spinlock_lock(&mng->free_sl);
9451                         LIST_INSERT_HEAD(&mng->free, age_free, next);
9452                         rte_spinlock_unlock(&mng->free_sl);
9453                         return 0; /* 0 is an error.*/
9454                 }
9455         }
9456         __atomic_store_n(&age_free->refcnt, 1, __ATOMIC_RELAXED);
9457         return pool->index | ((age_free->offset + 1) << 16);
9458 }
9459
9460 /**
9461  * Create a age action using ASO mechanism.
9462  *
9463  * @param[in] dev
9464  *   Pointer to rte_eth_dev structure.
9465  * @param[in] age
9466  *   Pointer to the aging action configuration.
9467  *
9468  * @return
9469  *   Index to flow counter on success, 0 otherwise.
9470  */
9471 static uint32_t
9472 flow_dv_translate_create_aso_age(struct rte_eth_dev *dev,
9473                                  const struct rte_flow_action_age *age)
9474 {
9475         uint32_t age_idx = 0;
9476         struct mlx5_aso_age_action *aso_age;
9477
9478         age_idx = flow_dv_aso_age_alloc(dev);
9479         if (!age_idx)
9480                 return 0;
9481         aso_age = flow_aso_age_get_by_idx(dev, age_idx);
9482         aso_age->age_params.context = age->context;
9483         aso_age->age_params.timeout = age->timeout;
9484         aso_age->age_params.port_id = dev->data->port_id;
9485         __atomic_store_n(&aso_age->age_params.sec_since_last_hit, 0,
9486                          __ATOMIC_RELAXED);
9487         __atomic_store_n(&aso_age->age_params.state, AGE_CANDIDATE,
9488                          __ATOMIC_RELAXED);
9489         return age_idx;
9490 }
9491
9492 /**
9493  * Fill the flow with DV spec, lock free
9494  * (mutex should be acquired by caller).
9495  *
9496  * @param[in] dev
9497  *   Pointer to rte_eth_dev structure.
9498  * @param[in, out] dev_flow
9499  *   Pointer to the sub flow.
9500  * @param[in] attr
9501  *   Pointer to the flow attributes.
9502  * @param[in] items
9503  *   Pointer to the list of items.
9504  * @param[in] actions
9505  *   Pointer to the list of actions.
9506  * @param[out] error
9507  *   Pointer to the error structure.
9508  *
9509  * @return
9510  *   0 on success, a negative errno value otherwise and rte_errno is set.
9511  */
9512 static int
9513 flow_dv_translate(struct rte_eth_dev *dev,
9514                   struct mlx5_flow *dev_flow,
9515                   const struct rte_flow_attr *attr,
9516                   const struct rte_flow_item items[],
9517                   const struct rte_flow_action actions[],
9518                   struct rte_flow_error *error)
9519 {
9520         struct mlx5_priv *priv = dev->data->dev_private;
9521         struct mlx5_dev_config *dev_conf = &priv->config;
9522         struct rte_flow *flow = dev_flow->flow;
9523         struct mlx5_flow_handle *handle = dev_flow->handle;
9524         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
9525         struct mlx5_flow_rss_desc *rss_desc;
9526         uint64_t item_flags = 0;
9527         uint64_t last_item = 0;
9528         uint64_t action_flags = 0;
9529         uint64_t priority = attr->priority;
9530         struct mlx5_flow_dv_matcher matcher = {
9531                 .mask = {
9532                         .size = sizeof(matcher.mask.buf) -
9533                                 MLX5_ST_SZ_BYTES(fte_match_set_misc4),
9534                 },
9535         };
9536         int actions_n = 0;
9537         bool actions_end = false;
9538         union {
9539                 struct mlx5_flow_dv_modify_hdr_resource res;
9540                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
9541                             sizeof(struct mlx5_modification_cmd) *
9542                             (MLX5_MAX_MODIFY_NUM + 1)];
9543         } mhdr_dummy;
9544         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
9545         const struct rte_flow_action_count *count = NULL;
9546         const struct rte_flow_action_age *age = NULL;
9547         union flow_dv_attr flow_attr = { .attr = 0 };
9548         uint32_t tag_be;
9549         union mlx5_flow_tbl_key tbl_key;
9550         uint32_t modify_action_position = UINT32_MAX;
9551         void *match_mask = matcher.mask.buf;
9552         void *match_value = dev_flow->dv.value.buf;
9553         uint8_t next_protocol = 0xff;
9554         struct rte_vlan_hdr vlan = { 0 };
9555         struct mlx5_flow_dv_dest_array_resource mdest_res;
9556         struct mlx5_flow_dv_sample_resource sample_res;
9557         void *sample_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
9558         struct mlx5_flow_sub_actions_list *sample_act;
9559         uint32_t sample_act_pos = UINT32_MAX;
9560         uint32_t num_of_dest = 0;
9561         int tmp_actions_n = 0;
9562         uint32_t table;
9563         int ret = 0;
9564         const struct mlx5_flow_tunnel *tunnel;
9565         struct flow_grp_info grp_info = {
9566                 .external = !!dev_flow->external,
9567                 .transfer = !!attr->transfer,
9568                 .fdb_def_rule = !!priv->fdb_def_rule,
9569         };
9570
9571         MLX5_ASSERT(wks);
9572         rss_desc = &wks->rss_desc[!!wks->flow_nested_idx];
9573         memset(&mdest_res, 0, sizeof(struct mlx5_flow_dv_dest_array_resource));
9574         memset(&sample_res, 0, sizeof(struct mlx5_flow_dv_sample_resource));
9575         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
9576                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
9577         /* update normal path action resource into last index of array */
9578         sample_act = &mdest_res.sample_act[MLX5_MAX_DEST_NUM - 1];
9579         tunnel = is_flow_tunnel_match_rule(dev, attr, items, actions) ?
9580                  flow_items_to_tunnel(items) :
9581                  is_flow_tunnel_steer_rule(dev, attr, items, actions) ?
9582                  flow_actions_to_tunnel(actions) :
9583                  dev_flow->tunnel ? dev_flow->tunnel : NULL;
9584         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
9585                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
9586         grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
9587                                 (dev, tunnel, attr, items, actions);
9588         ret = mlx5_flow_group_to_table(dev, tunnel, attr->group, &table,
9589                                        grp_info, error);
9590         if (ret)
9591                 return ret;
9592         dev_flow->dv.group = table;
9593         if (attr->transfer)
9594                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
9595         if (priority == MLX5_FLOW_PRIO_RSVD)
9596                 priority = dev_conf->flow_prio - 1;
9597         /* number of actions must be set to 0 in case of dirty stack. */
9598         mhdr_res->actions_num = 0;
9599         if (is_flow_tunnel_match_rule(dev, attr, items, actions)) {
9600                 /*
9601                  * do not add decap action if match rule drops packet
9602                  * HW rejects rules with decap & drop
9603                  */
9604                 bool add_decap = true;
9605                 const struct rte_flow_action *ptr = actions;
9606                 struct mlx5_flow_tbl_resource *tbl;
9607
9608                 for (; ptr->type != RTE_FLOW_ACTION_TYPE_END; ptr++) {
9609                         if (ptr->type == RTE_FLOW_ACTION_TYPE_DROP) {
9610                                 add_decap = false;
9611                                 break;
9612                         }
9613                 }
9614                 if (add_decap) {
9615                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
9616                                                            attr->transfer,
9617                                                            error))
9618                                 return -rte_errno;
9619                         dev_flow->dv.actions[actions_n++] =
9620                                         dev_flow->dv.encap_decap->action;
9621                         action_flags |= MLX5_FLOW_ACTION_DECAP;
9622                 }
9623                 /*
9624                  * bind table_id with <group, table> for tunnel match rule.
9625                  * Tunnel set rule establishes that bind in JUMP action handler.
9626                  * Required for scenario when application creates tunnel match
9627                  * rule before tunnel set rule.
9628                  */
9629                 tbl = flow_dv_tbl_resource_get(dev, table, attr->egress,
9630                                                attr->transfer,
9631                                                !!dev_flow->external, tunnel,
9632                                                attr->group, 0, error);
9633                 if (!tbl)
9634                         return rte_flow_error_set
9635                                (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
9636                                actions, "cannot register tunnel group");
9637         }
9638         for (; !actions_end ; actions++) {
9639                 const struct rte_flow_action_queue *queue;
9640                 const struct rte_flow_action_rss *rss;
9641                 const struct rte_flow_action *action = actions;
9642                 const uint8_t *rss_key;
9643                 const struct rte_flow_action_meter *mtr;
9644                 struct mlx5_flow_tbl_resource *tbl;
9645                 struct mlx5_aso_age_action *age_act;
9646                 uint32_t port_id = 0;
9647                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
9648                 int action_type = actions->type;
9649                 const struct rte_flow_action *found_action = NULL;
9650                 struct mlx5_flow_meter *fm = NULL;
9651                 uint32_t jump_group = 0;
9652
9653                 if (!mlx5_flow_os_action_supported(action_type))
9654                         return rte_flow_error_set(error, ENOTSUP,
9655                                                   RTE_FLOW_ERROR_TYPE_ACTION,
9656                                                   actions,
9657                                                   "action not supported");
9658                 switch (action_type) {
9659                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
9660                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
9661                         break;
9662                 case RTE_FLOW_ACTION_TYPE_VOID:
9663                         break;
9664                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
9665                         if (flow_dv_translate_action_port_id(dev, action,
9666                                                              &port_id, error))
9667                                 return -rte_errno;
9668                         port_id_resource.port_id = port_id;
9669                         MLX5_ASSERT(!handle->rix_port_id_action);
9670                         if (flow_dv_port_id_action_resource_register
9671                             (dev, &port_id_resource, dev_flow, error))
9672                                 return -rte_errno;
9673                         dev_flow->dv.actions[actions_n++] =
9674                                         dev_flow->dv.port_id_action->action;
9675                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
9676                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_PORT_ID;
9677                         sample_act->action_flags |= MLX5_FLOW_ACTION_PORT_ID;
9678                         num_of_dest++;
9679                         break;
9680                 case RTE_FLOW_ACTION_TYPE_FLAG:
9681                         action_flags |= MLX5_FLOW_ACTION_FLAG;
9682                         dev_flow->handle->mark = 1;
9683                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
9684                                 struct rte_flow_action_mark mark = {
9685                                         .id = MLX5_FLOW_MARK_DEFAULT,
9686                                 };
9687
9688                                 if (flow_dv_convert_action_mark(dev, &mark,
9689                                                                 mhdr_res,
9690                                                                 error))
9691                                         return -rte_errno;
9692                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
9693                                 break;
9694                         }
9695                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
9696                         /*
9697                          * Only one FLAG or MARK is supported per device flow
9698                          * right now. So the pointer to the tag resource must be
9699                          * zero before the register process.
9700                          */
9701                         MLX5_ASSERT(!handle->dvh.rix_tag);
9702                         if (flow_dv_tag_resource_register(dev, tag_be,
9703                                                           dev_flow, error))
9704                                 return -rte_errno;
9705                         MLX5_ASSERT(dev_flow->dv.tag_resource);
9706                         dev_flow->dv.actions[actions_n++] =
9707                                         dev_flow->dv.tag_resource->action;
9708                         break;
9709                 case RTE_FLOW_ACTION_TYPE_MARK:
9710                         action_flags |= MLX5_FLOW_ACTION_MARK;
9711                         dev_flow->handle->mark = 1;
9712                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
9713                                 const struct rte_flow_action_mark *mark =
9714                                         (const struct rte_flow_action_mark *)
9715                                                 actions->conf;
9716
9717                                 if (flow_dv_convert_action_mark(dev, mark,
9718                                                                 mhdr_res,
9719                                                                 error))
9720                                         return -rte_errno;
9721                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
9722                                 break;
9723                         }
9724                         /* Fall-through */
9725                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
9726                         /* Legacy (non-extensive) MARK action. */
9727                         tag_be = mlx5_flow_mark_set
9728                               (((const struct rte_flow_action_mark *)
9729                                (actions->conf))->id);
9730                         MLX5_ASSERT(!handle->dvh.rix_tag);
9731                         if (flow_dv_tag_resource_register(dev, tag_be,
9732                                                           dev_flow, error))
9733                                 return -rte_errno;
9734                         MLX5_ASSERT(dev_flow->dv.tag_resource);
9735                         dev_flow->dv.actions[actions_n++] =
9736                                         dev_flow->dv.tag_resource->action;
9737                         break;
9738                 case RTE_FLOW_ACTION_TYPE_SET_META:
9739                         if (flow_dv_convert_action_set_meta
9740                                 (dev, mhdr_res, attr,
9741                                  (const struct rte_flow_action_set_meta *)
9742                                   actions->conf, error))
9743                                 return -rte_errno;
9744                         action_flags |= MLX5_FLOW_ACTION_SET_META;
9745                         break;
9746                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
9747                         if (flow_dv_convert_action_set_tag
9748                                 (dev, mhdr_res,
9749                                  (const struct rte_flow_action_set_tag *)
9750                                   actions->conf, error))
9751                                 return -rte_errno;
9752                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
9753                         break;
9754                 case RTE_FLOW_ACTION_TYPE_DROP:
9755                         action_flags |= MLX5_FLOW_ACTION_DROP;
9756                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_DROP;
9757                         break;
9758                 case RTE_FLOW_ACTION_TYPE_QUEUE:
9759                         queue = actions->conf;
9760                         rss_desc->queue_num = 1;
9761                         rss_desc->queue[0] = queue->index;
9762                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
9763                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
9764                         sample_act->action_flags |= MLX5_FLOW_ACTION_QUEUE;
9765                         num_of_dest++;
9766                         break;
9767                 case RTE_FLOW_ACTION_TYPE_RSS:
9768                         rss = actions->conf;
9769                         memcpy(rss_desc->queue, rss->queue,
9770                                rss->queue_num * sizeof(uint16_t));
9771                         rss_desc->queue_num = rss->queue_num;
9772                         /* NULL RSS key indicates default RSS key. */
9773                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
9774                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
9775                         /*
9776                          * rss->level and rss.types should be set in advance
9777                          * when expanding items for RSS.
9778                          */
9779                         action_flags |= MLX5_FLOW_ACTION_RSS;
9780                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
9781                         break;
9782                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
9783                         flow->age = (uint32_t)(uintptr_t)(action->conf);
9784                         age_act = flow_aso_age_get_by_idx(dev, flow->age);
9785                         __atomic_fetch_add(&age_act->refcnt, 1,
9786                                            __ATOMIC_RELAXED);
9787                         dev_flow->dv.actions[actions_n++] = age_act->dr_action;
9788                         action_flags |= MLX5_FLOW_ACTION_AGE;
9789                         break;
9790                 case RTE_FLOW_ACTION_TYPE_AGE:
9791                         if (priv->sh->flow_hit_aso_en && attr->group) {
9792                                 flow->age = flow_dv_translate_create_aso_age
9793                                                 (dev, action->conf);
9794                                 if (!flow->age)
9795                                         return rte_flow_error_set
9796                                                 (error, rte_errno,
9797                                                  RTE_FLOW_ERROR_TYPE_ACTION,
9798                                                  NULL,
9799                                                  "can't create ASO age action");
9800                                 dev_flow->dv.actions[actions_n++] =
9801                                           (flow_aso_age_get_by_idx
9802                                                 (dev, flow->age))->dr_action;
9803                                 action_flags |= MLX5_FLOW_ACTION_AGE;
9804                                 break;
9805                         }
9806                         /* Fall-through */
9807                 case RTE_FLOW_ACTION_TYPE_COUNT:
9808                         if (!dev_conf->devx) {
9809                                 return rte_flow_error_set
9810                                               (error, ENOTSUP,
9811                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
9812                                                NULL,
9813                                                "count action not supported");
9814                         }
9815                         /* Save information first, will apply later. */
9816                         if (actions->type == RTE_FLOW_ACTION_TYPE_COUNT)
9817                                 count = action->conf;
9818                         else
9819                                 age = action->conf;
9820                         action_flags |= MLX5_FLOW_ACTION_COUNT;
9821                         break;
9822                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
9823                         dev_flow->dv.actions[actions_n++] =
9824                                                 priv->sh->pop_vlan_action;
9825                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
9826                         break;
9827                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
9828                         if (!(action_flags &
9829                               MLX5_FLOW_ACTION_OF_SET_VLAN_VID))
9830                                 flow_dev_get_vlan_info_from_items(items, &vlan);
9831                         vlan.eth_proto = rte_be_to_cpu_16
9832                              ((((const struct rte_flow_action_of_push_vlan *)
9833                                                    actions->conf)->ethertype));
9834                         found_action = mlx5_flow_find_action
9835                                         (actions + 1,
9836                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
9837                         if (found_action)
9838                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
9839                         found_action = mlx5_flow_find_action
9840                                         (actions + 1,
9841                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
9842                         if (found_action)
9843                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
9844                         if (flow_dv_create_action_push_vlan
9845                                             (dev, attr, &vlan, dev_flow, error))
9846                                 return -rte_errno;
9847                         dev_flow->dv.actions[actions_n++] =
9848                                         dev_flow->dv.push_vlan_res->action;
9849                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
9850                         break;
9851                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
9852                         /* of_vlan_push action handled this action */
9853                         MLX5_ASSERT(action_flags &
9854                                     MLX5_FLOW_ACTION_OF_PUSH_VLAN);
9855                         break;
9856                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
9857                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
9858                                 break;
9859                         flow_dev_get_vlan_info_from_items(items, &vlan);
9860                         mlx5_update_vlan_vid_pcp(actions, &vlan);
9861                         /* If no VLAN push - this is a modify header action */
9862                         if (flow_dv_convert_action_modify_vlan_vid
9863                                                 (mhdr_res, actions, error))
9864                                 return -rte_errno;
9865                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
9866                         break;
9867                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
9868                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
9869                         if (flow_dv_create_action_l2_encap(dev, actions,
9870                                                            dev_flow,
9871                                                            attr->transfer,
9872                                                            error))
9873                                 return -rte_errno;
9874                         dev_flow->dv.actions[actions_n++] =
9875                                         dev_flow->dv.encap_decap->action;
9876                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
9877                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
9878                                 sample_act->action_flags |=
9879                                                         MLX5_FLOW_ACTION_ENCAP;
9880                         break;
9881                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
9882                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
9883                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
9884                                                            attr->transfer,
9885                                                            error))
9886                                 return -rte_errno;
9887                         dev_flow->dv.actions[actions_n++] =
9888                                         dev_flow->dv.encap_decap->action;
9889                         action_flags |= MLX5_FLOW_ACTION_DECAP;
9890                         break;
9891                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
9892                         /* Handle encap with preceding decap. */
9893                         if (action_flags & MLX5_FLOW_ACTION_DECAP) {
9894                                 if (flow_dv_create_action_raw_encap
9895                                         (dev, actions, dev_flow, attr, error))
9896                                         return -rte_errno;
9897                                 dev_flow->dv.actions[actions_n++] =
9898                                         dev_flow->dv.encap_decap->action;
9899                         } else {
9900                                 /* Handle encap without preceding decap. */
9901                                 if (flow_dv_create_action_l2_encap
9902                                     (dev, actions, dev_flow, attr->transfer,
9903                                      error))
9904                                         return -rte_errno;
9905                                 dev_flow->dv.actions[actions_n++] =
9906                                         dev_flow->dv.encap_decap->action;
9907                         }
9908                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
9909                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
9910                                 sample_act->action_flags |=
9911                                                         MLX5_FLOW_ACTION_ENCAP;
9912                         break;
9913                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
9914                         while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
9915                                 ;
9916                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
9917                                 if (flow_dv_create_action_l2_decap
9918                                     (dev, dev_flow, attr->transfer, error))
9919                                         return -rte_errno;
9920                                 dev_flow->dv.actions[actions_n++] =
9921                                         dev_flow->dv.encap_decap->action;
9922                         }
9923                         /* If decap is followed by encap, handle it at encap. */
9924                         action_flags |= MLX5_FLOW_ACTION_DECAP;
9925                         break;
9926                 case RTE_FLOW_ACTION_TYPE_JUMP:
9927                         jump_group = ((const struct rte_flow_action_jump *)
9928                                                         action->conf)->group;
9929                         grp_info.std_tbl_fix = 0;
9930                         ret = mlx5_flow_group_to_table(dev, tunnel,
9931                                                        jump_group,
9932                                                        &table,
9933                                                        grp_info, error);
9934                         if (ret)
9935                                 return ret;
9936                         tbl = flow_dv_tbl_resource_get(dev, table, attr->egress,
9937                                                        attr->transfer,
9938                                                        !!dev_flow->external,
9939                                                        tunnel, jump_group, 0,
9940                                                        error);
9941                         if (!tbl)
9942                                 return rte_flow_error_set
9943                                                 (error, errno,
9944                                                  RTE_FLOW_ERROR_TYPE_ACTION,
9945                                                  NULL,
9946                                                  "cannot create jump action.");
9947                         if (flow_dv_jump_tbl_resource_register
9948                             (dev, tbl, dev_flow, error)) {
9949                                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
9950                                 return rte_flow_error_set
9951                                                 (error, errno,
9952                                                  RTE_FLOW_ERROR_TYPE_ACTION,
9953                                                  NULL,
9954                                                  "cannot create jump action.");
9955                         }
9956                         dev_flow->dv.actions[actions_n++] =
9957                                         dev_flow->dv.jump->action;
9958                         action_flags |= MLX5_FLOW_ACTION_JUMP;
9959                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_JUMP;
9960                         break;
9961                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
9962                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
9963                         if (flow_dv_convert_action_modify_mac
9964                                         (mhdr_res, actions, error))
9965                                 return -rte_errno;
9966                         action_flags |= actions->type ==
9967                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
9968                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
9969                                         MLX5_FLOW_ACTION_SET_MAC_DST;
9970                         break;
9971                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
9972                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
9973                         if (flow_dv_convert_action_modify_ipv4
9974                                         (mhdr_res, actions, error))
9975                                 return -rte_errno;
9976                         action_flags |= actions->type ==
9977                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
9978                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
9979                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
9980                         break;
9981                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
9982                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
9983                         if (flow_dv_convert_action_modify_ipv6
9984                                         (mhdr_res, actions, error))
9985                                 return -rte_errno;
9986                         action_flags |= actions->type ==
9987                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
9988                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
9989                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
9990                         break;
9991                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
9992                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
9993                         if (flow_dv_convert_action_modify_tp
9994                                         (mhdr_res, actions, items,
9995                                          &flow_attr, dev_flow, !!(action_flags &
9996                                          MLX5_FLOW_ACTION_DECAP), error))
9997                                 return -rte_errno;
9998                         action_flags |= actions->type ==
9999                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
10000                                         MLX5_FLOW_ACTION_SET_TP_SRC :
10001                                         MLX5_FLOW_ACTION_SET_TP_DST;
10002                         break;
10003                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
10004                         if (flow_dv_convert_action_modify_dec_ttl
10005                                         (mhdr_res, items, &flow_attr, dev_flow,
10006                                          !!(action_flags &
10007                                          MLX5_FLOW_ACTION_DECAP), error))
10008                                 return -rte_errno;
10009                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
10010                         break;
10011                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
10012                         if (flow_dv_convert_action_modify_ttl
10013                                         (mhdr_res, actions, items, &flow_attr,
10014                                          dev_flow, !!(action_flags &
10015                                          MLX5_FLOW_ACTION_DECAP), error))
10016                                 return -rte_errno;
10017                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
10018                         break;
10019                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
10020                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
10021                         if (flow_dv_convert_action_modify_tcp_seq
10022                                         (mhdr_res, actions, error))
10023                                 return -rte_errno;
10024                         action_flags |= actions->type ==
10025                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
10026                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
10027                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
10028                         break;
10029
10030                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
10031                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
10032                         if (flow_dv_convert_action_modify_tcp_ack
10033                                         (mhdr_res, actions, error))
10034                                 return -rte_errno;
10035                         action_flags |= actions->type ==
10036                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
10037                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
10038                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
10039                         break;
10040                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
10041                         if (flow_dv_convert_action_set_reg
10042                                         (mhdr_res, actions, error))
10043                                 return -rte_errno;
10044                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
10045                         break;
10046                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
10047                         if (flow_dv_convert_action_copy_mreg
10048                                         (dev, mhdr_res, actions, error))
10049                                 return -rte_errno;
10050                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
10051                         break;
10052                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
10053                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
10054                         dev_flow->handle->fate_action =
10055                                         MLX5_FLOW_FATE_DEFAULT_MISS;
10056                         break;
10057                 case RTE_FLOW_ACTION_TYPE_METER:
10058                         mtr = actions->conf;
10059                         if (!flow->meter) {
10060                                 fm = mlx5_flow_meter_attach(priv, mtr->mtr_id,
10061                                                             attr, error);
10062                                 if (!fm)
10063                                         return rte_flow_error_set(error,
10064                                                 rte_errno,
10065                                                 RTE_FLOW_ERROR_TYPE_ACTION,
10066                                                 NULL,
10067                                                 "meter not found "
10068                                                 "or invalid parameters");
10069                                 flow->meter = fm->idx;
10070                         }
10071                         /* Set the meter action. */
10072                         if (!fm) {
10073                                 fm = mlx5_ipool_get(priv->sh->ipool
10074                                                 [MLX5_IPOOL_MTR], flow->meter);
10075                                 if (!fm)
10076                                         return rte_flow_error_set(error,
10077                                                 rte_errno,
10078                                                 RTE_FLOW_ERROR_TYPE_ACTION,
10079                                                 NULL,
10080                                                 "meter not found "
10081                                                 "or invalid parameters");
10082                         }
10083                         dev_flow->dv.actions[actions_n++] =
10084                                 fm->mfts->meter_action;
10085                         action_flags |= MLX5_FLOW_ACTION_METER;
10086                         break;
10087                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
10088                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
10089                                                               actions, error))
10090                                 return -rte_errno;
10091                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
10092                         break;
10093                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
10094                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
10095                                                               actions, error))
10096                                 return -rte_errno;
10097                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
10098                         break;
10099                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
10100                         sample_act_pos = actions_n;
10101                         ret = flow_dv_translate_action_sample(dev,
10102                                                               actions,
10103                                                               dev_flow, attr,
10104                                                               &num_of_dest,
10105                                                               sample_actions,
10106                                                               &sample_res,
10107                                                               error);
10108                         if (ret < 0)
10109                                 return ret;
10110                         actions_n++;
10111                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
10112                         /* put encap action into group if work with port id */
10113                         if ((action_flags & MLX5_FLOW_ACTION_ENCAP) &&
10114                             (action_flags & MLX5_FLOW_ACTION_PORT_ID))
10115                                 sample_act->action_flags |=
10116                                                         MLX5_FLOW_ACTION_ENCAP;
10117                         break;
10118                 case RTE_FLOW_ACTION_TYPE_END:
10119                         actions_end = true;
10120                         if (mhdr_res->actions_num) {
10121                                 /* create modify action if needed. */
10122                                 if (flow_dv_modify_hdr_resource_register
10123                                         (dev, mhdr_res, dev_flow, error))
10124                                         return -rte_errno;
10125                                 dev_flow->dv.actions[modify_action_position] =
10126                                         handle->dvh.modify_hdr->action;
10127                         }
10128                         if (action_flags & MLX5_FLOW_ACTION_COUNT) {
10129                                 flow->counter =
10130                                         flow_dv_translate_create_counter(dev,
10131                                                 dev_flow, count, age);
10132
10133                                 if (!flow->counter)
10134                                         return rte_flow_error_set
10135                                                 (error, rte_errno,
10136                                                 RTE_FLOW_ERROR_TYPE_ACTION,
10137                                                 NULL,
10138                                                 "cannot create counter"
10139                                                 " object.");
10140                                 dev_flow->dv.actions[actions_n] =
10141                                           (flow_dv_counter_get_by_idx(dev,
10142                                           flow->counter, NULL))->action;
10143                                 actions_n++;
10144                         }
10145                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE) {
10146                                 ret = flow_dv_create_action_sample(dev,
10147                                                           dev_flow,
10148                                                           num_of_dest,
10149                                                           &sample_res,
10150                                                           &mdest_res,
10151                                                           sample_actions,
10152                                                           action_flags,
10153                                                           error);
10154                                 if (ret < 0)
10155                                         return rte_flow_error_set
10156                                                 (error, rte_errno,
10157                                                 RTE_FLOW_ERROR_TYPE_ACTION,
10158                                                 NULL,
10159                                                 "cannot create sample action");
10160                                 if (num_of_dest > 1) {
10161                                         dev_flow->dv.actions[sample_act_pos] =
10162                                         dev_flow->dv.dest_array_res->action;
10163                                 } else {
10164                                         dev_flow->dv.actions[sample_act_pos] =
10165                                         dev_flow->dv.sample_res->verbs_action;
10166                                 }
10167                         }
10168                         break;
10169                 default:
10170                         break;
10171                 }
10172                 if (mhdr_res->actions_num &&
10173                     modify_action_position == UINT32_MAX)
10174                         modify_action_position = actions_n++;
10175         }
10176         /*
10177          * For multiple destination (sample action with ratio=1), the encap
10178          * action and port id action will be combined into group action.
10179          * So need remove the original these actions in the flow and only
10180          * use the sample action instead of.
10181          */
10182         if (num_of_dest > 1 && sample_act->dr_port_id_action) {
10183                 int i;
10184                 void *temp_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
10185
10186                 for (i = 0; i < actions_n; i++) {
10187                         if ((sample_act->dr_encap_action &&
10188                                 sample_act->dr_encap_action ==
10189                                 dev_flow->dv.actions[i]) ||
10190                                 (sample_act->dr_port_id_action &&
10191                                 sample_act->dr_port_id_action ==
10192                                 dev_flow->dv.actions[i]))
10193                                 continue;
10194                         temp_actions[tmp_actions_n++] = dev_flow->dv.actions[i];
10195                 }
10196                 memcpy((void *)dev_flow->dv.actions,
10197                                 (void *)temp_actions,
10198                                 tmp_actions_n * sizeof(void *));
10199                 actions_n = tmp_actions_n;
10200         }
10201         dev_flow->dv.actions_n = actions_n;
10202         dev_flow->act_flags = action_flags;
10203         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
10204                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
10205                 int item_type = items->type;
10206
10207                 if (!mlx5_flow_os_item_supported(item_type))
10208                         return rte_flow_error_set(error, ENOTSUP,
10209                                                   RTE_FLOW_ERROR_TYPE_ITEM,
10210                                                   NULL, "item not supported");
10211                 switch (item_type) {
10212                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
10213                         flow_dv_translate_item_port_id(dev, match_mask,
10214                                                        match_value, items);
10215                         last_item = MLX5_FLOW_ITEM_PORT_ID;
10216                         break;
10217                 case RTE_FLOW_ITEM_TYPE_ETH:
10218                         flow_dv_translate_item_eth(match_mask, match_value,
10219                                                    items, tunnel,
10220                                                    dev_flow->dv.group);
10221                         matcher.priority = action_flags &
10222                                         MLX5_FLOW_ACTION_DEFAULT_MISS &&
10223                                         !dev_flow->external ?
10224                                         MLX5_PRIORITY_MAP_L3 :
10225                                         MLX5_PRIORITY_MAP_L2;
10226                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
10227                                              MLX5_FLOW_LAYER_OUTER_L2;
10228                         break;
10229                 case RTE_FLOW_ITEM_TYPE_VLAN:
10230                         flow_dv_translate_item_vlan(dev_flow,
10231                                                     match_mask, match_value,
10232                                                     items, tunnel,
10233                                                     dev_flow->dv.group);
10234                         matcher.priority = MLX5_PRIORITY_MAP_L2;
10235                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
10236                                               MLX5_FLOW_LAYER_INNER_VLAN) :
10237                                              (MLX5_FLOW_LAYER_OUTER_L2 |
10238                                               MLX5_FLOW_LAYER_OUTER_VLAN);
10239                         break;
10240                 case RTE_FLOW_ITEM_TYPE_IPV4:
10241                         mlx5_flow_tunnel_ip_check(items, next_protocol,
10242                                                   &item_flags, &tunnel);
10243                         flow_dv_translate_item_ipv4(match_mask, match_value,
10244                                                     items, tunnel,
10245                                                     dev_flow->dv.group);
10246                         matcher.priority = MLX5_PRIORITY_MAP_L3;
10247                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
10248                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
10249                         if (items->mask != NULL &&
10250                             ((const struct rte_flow_item_ipv4 *)
10251                              items->mask)->hdr.next_proto_id) {
10252                                 next_protocol =
10253                                         ((const struct rte_flow_item_ipv4 *)
10254                                          (items->spec))->hdr.next_proto_id;
10255                                 next_protocol &=
10256                                         ((const struct rte_flow_item_ipv4 *)
10257                                          (items->mask))->hdr.next_proto_id;
10258                         } else {
10259                                 /* Reset for inner layer. */
10260                                 next_protocol = 0xff;
10261                         }
10262                         break;
10263                 case RTE_FLOW_ITEM_TYPE_IPV6:
10264                         mlx5_flow_tunnel_ip_check(items, next_protocol,
10265                                                   &item_flags, &tunnel);
10266                         flow_dv_translate_item_ipv6(match_mask, match_value,
10267                                                     items, tunnel,
10268                                                     dev_flow->dv.group);
10269                         matcher.priority = MLX5_PRIORITY_MAP_L3;
10270                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
10271                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
10272                         if (items->mask != NULL &&
10273                             ((const struct rte_flow_item_ipv6 *)
10274                              items->mask)->hdr.proto) {
10275                                 next_protocol =
10276                                         ((const struct rte_flow_item_ipv6 *)
10277                                          items->spec)->hdr.proto;
10278                                 next_protocol &=
10279                                         ((const struct rte_flow_item_ipv6 *)
10280                                          items->mask)->hdr.proto;
10281                         } else {
10282                                 /* Reset for inner layer. */
10283                                 next_protocol = 0xff;
10284                         }
10285                         break;
10286                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
10287                         flow_dv_translate_item_ipv6_frag_ext(match_mask,
10288                                                              match_value,
10289                                                              items, tunnel);
10290                         last_item = tunnel ?
10291                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
10292                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
10293                         if (items->mask != NULL &&
10294                             ((const struct rte_flow_item_ipv6_frag_ext *)
10295                              items->mask)->hdr.next_header) {
10296                                 next_protocol =
10297                                 ((const struct rte_flow_item_ipv6_frag_ext *)
10298                                  items->spec)->hdr.next_header;
10299                                 next_protocol &=
10300                                 ((const struct rte_flow_item_ipv6_frag_ext *)
10301                                  items->mask)->hdr.next_header;
10302                         } else {
10303                                 /* Reset for inner layer. */
10304                                 next_protocol = 0xff;
10305                         }
10306                         break;
10307                 case RTE_FLOW_ITEM_TYPE_TCP:
10308                         flow_dv_translate_item_tcp(match_mask, match_value,
10309                                                    items, tunnel);
10310                         matcher.priority = MLX5_PRIORITY_MAP_L4;
10311                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
10312                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
10313                         break;
10314                 case RTE_FLOW_ITEM_TYPE_UDP:
10315                         flow_dv_translate_item_udp(match_mask, match_value,
10316                                                    items, tunnel);
10317                         matcher.priority = MLX5_PRIORITY_MAP_L4;
10318                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
10319                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
10320                         break;
10321                 case RTE_FLOW_ITEM_TYPE_GRE:
10322                         flow_dv_translate_item_gre(match_mask, match_value,
10323                                                    items, tunnel);
10324                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
10325                         last_item = MLX5_FLOW_LAYER_GRE;
10326                         break;
10327                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
10328                         flow_dv_translate_item_gre_key(match_mask,
10329                                                        match_value, items);
10330                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
10331                         break;
10332                 case RTE_FLOW_ITEM_TYPE_NVGRE:
10333                         flow_dv_translate_item_nvgre(match_mask, match_value,
10334                                                      items, tunnel);
10335                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
10336                         last_item = MLX5_FLOW_LAYER_GRE;
10337                         break;
10338                 case RTE_FLOW_ITEM_TYPE_VXLAN:
10339                         flow_dv_translate_item_vxlan(match_mask, match_value,
10340                                                      items, tunnel);
10341                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
10342                         last_item = MLX5_FLOW_LAYER_VXLAN;
10343                         break;
10344                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
10345                         flow_dv_translate_item_vxlan_gpe(match_mask,
10346                                                          match_value, items,
10347                                                          tunnel);
10348                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
10349                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
10350                         break;
10351                 case RTE_FLOW_ITEM_TYPE_GENEVE:
10352                         flow_dv_translate_item_geneve(match_mask, match_value,
10353                                                       items, tunnel);
10354                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
10355                         last_item = MLX5_FLOW_LAYER_GENEVE;
10356                         break;
10357                 case RTE_FLOW_ITEM_TYPE_MPLS:
10358                         flow_dv_translate_item_mpls(match_mask, match_value,
10359                                                     items, last_item, tunnel);
10360                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
10361                         last_item = MLX5_FLOW_LAYER_MPLS;
10362                         break;
10363                 case RTE_FLOW_ITEM_TYPE_MARK:
10364                         flow_dv_translate_item_mark(dev, match_mask,
10365                                                     match_value, items);
10366                         last_item = MLX5_FLOW_ITEM_MARK;
10367                         break;
10368                 case RTE_FLOW_ITEM_TYPE_META:
10369                         flow_dv_translate_item_meta(dev, match_mask,
10370                                                     match_value, attr, items);
10371                         last_item = MLX5_FLOW_ITEM_METADATA;
10372                         break;
10373                 case RTE_FLOW_ITEM_TYPE_ICMP:
10374                         flow_dv_translate_item_icmp(match_mask, match_value,
10375                                                     items, tunnel);
10376                         last_item = MLX5_FLOW_LAYER_ICMP;
10377                         break;
10378                 case RTE_FLOW_ITEM_TYPE_ICMP6:
10379                         flow_dv_translate_item_icmp6(match_mask, match_value,
10380                                                       items, tunnel);
10381                         last_item = MLX5_FLOW_LAYER_ICMP6;
10382                         break;
10383                 case RTE_FLOW_ITEM_TYPE_TAG:
10384                         flow_dv_translate_item_tag(dev, match_mask,
10385                                                    match_value, items);
10386                         last_item = MLX5_FLOW_ITEM_TAG;
10387                         break;
10388                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
10389                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
10390                                                         match_value, items);
10391                         last_item = MLX5_FLOW_ITEM_TAG;
10392                         break;
10393                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
10394                         flow_dv_translate_item_tx_queue(dev, match_mask,
10395                                                         match_value,
10396                                                         items);
10397                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
10398                         break;
10399                 case RTE_FLOW_ITEM_TYPE_GTP:
10400                         flow_dv_translate_item_gtp(match_mask, match_value,
10401                                                    items, tunnel);
10402                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
10403                         last_item = MLX5_FLOW_LAYER_GTP;
10404                         break;
10405                 case RTE_FLOW_ITEM_TYPE_ECPRI:
10406                         if (!mlx5_flex_parser_ecpri_exist(dev)) {
10407                                 /* Create it only the first time to be used. */
10408                                 ret = mlx5_flex_parser_ecpri_alloc(dev);
10409                                 if (ret)
10410                                         return rte_flow_error_set
10411                                                 (error, -ret,
10412                                                 RTE_FLOW_ERROR_TYPE_ITEM,
10413                                                 NULL,
10414                                                 "cannot create eCPRI parser");
10415                         }
10416                         /* Adjust the length matcher and device flow value. */
10417                         matcher.mask.size = MLX5_ST_SZ_BYTES(fte_match_param);
10418                         dev_flow->dv.value.size =
10419                                         MLX5_ST_SZ_BYTES(fte_match_param);
10420                         flow_dv_translate_item_ecpri(dev, match_mask,
10421                                                      match_value, items);
10422                         /* No other protocol should follow eCPRI layer. */
10423                         last_item = MLX5_FLOW_LAYER_ECPRI;
10424                         break;
10425                 default:
10426                         break;
10427                 }
10428                 item_flags |= last_item;
10429         }
10430         /*
10431          * When E-Switch mode is enabled, we have two cases where we need to
10432          * set the source port manually.
10433          * The first one, is in case of Nic steering rule, and the second is
10434          * E-Switch rule where no port_id item was found. In both cases
10435          * the source port is set according the current port in use.
10436          */
10437         if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
10438             (priv->representor || priv->master)) {
10439                 if (flow_dv_translate_item_port_id(dev, match_mask,
10440                                                    match_value, NULL))
10441                         return -rte_errno;
10442         }
10443 #ifdef RTE_LIBRTE_MLX5_DEBUG
10444         MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
10445                                               dev_flow->dv.value.buf));
10446 #endif
10447         /*
10448          * Layers may be already initialized from prefix flow if this dev_flow
10449          * is the suffix flow.
10450          */
10451         handle->layers |= item_flags;
10452         if (action_flags & MLX5_FLOW_ACTION_RSS)
10453                 flow_dv_hashfields_set(dev_flow, rss_desc);
10454         /* Register matcher. */
10455         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
10456                                     matcher.mask.size);
10457         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
10458                                                      matcher.priority);
10459         /* reserved field no needs to be set to 0 here. */
10460         tbl_key.domain = attr->transfer;
10461         tbl_key.direction = attr->egress;
10462         tbl_key.table_id = dev_flow->dv.group;
10463         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow, error))
10464                 return -rte_errno;
10465         return 0;
10466 }
10467
10468 /**
10469  * Set hash RX queue by hash fields (see enum ibv_rx_hash_fields)
10470  * and tunnel.
10471  *
10472  * @param[in, out] action
10473  *   Shred RSS action holding hash RX queue objects.
10474  * @param[in] hash_fields
10475  *   Defines combination of packet fields to participate in RX hash.
10476  * @param[in] tunnel
10477  *   Tunnel type
10478  * @param[in] hrxq_idx
10479  *   Hash RX queue index to set.
10480  *
10481  * @return
10482  *   0 on success, otherwise negative errno value.
10483  */
10484 static int
10485 __flow_dv_action_rss_hrxq_set(struct mlx5_shared_action_rss *action,
10486                               const uint64_t hash_fields,
10487                               const int tunnel,
10488                               uint32_t hrxq_idx)
10489 {
10490         uint32_t *hrxqs = tunnel ? action->hrxq : action->hrxq_tunnel;
10491
10492         switch (hash_fields & ~IBV_RX_HASH_INNER) {
10493         case MLX5_RSS_HASH_IPV4:
10494                 hrxqs[0] = hrxq_idx;
10495                 return 0;
10496         case MLX5_RSS_HASH_IPV4_TCP:
10497                 hrxqs[1] = hrxq_idx;
10498                 return 0;
10499         case MLX5_RSS_HASH_IPV4_UDP:
10500                 hrxqs[2] = hrxq_idx;
10501                 return 0;
10502         case MLX5_RSS_HASH_IPV6:
10503                 hrxqs[3] = hrxq_idx;
10504                 return 0;
10505         case MLX5_RSS_HASH_IPV6_TCP:
10506                 hrxqs[4] = hrxq_idx;
10507                 return 0;
10508         case MLX5_RSS_HASH_IPV6_UDP:
10509                 hrxqs[5] = hrxq_idx;
10510                 return 0;
10511         case MLX5_RSS_HASH_NONE:
10512                 hrxqs[6] = hrxq_idx;
10513                 return 0;
10514         default:
10515                 return -1;
10516         }
10517 }
10518
10519 /**
10520  * Look up for hash RX queue by hash fields (see enum ibv_rx_hash_fields)
10521  * and tunnel.
10522  *
10523  * @param[in] dev
10524  *   Pointer to the Ethernet device structure.
10525  * @param[in] idx
10526  *   Shared RSS action ID holding hash RX queue objects.
10527  * @param[in] hash_fields
10528  *   Defines combination of packet fields to participate in RX hash.
10529  * @param[in] tunnel
10530  *   Tunnel type
10531  *
10532  * @return
10533  *   Valid hash RX queue index, otherwise 0.
10534  */
10535 static uint32_t
10536 __flow_dv_action_rss_hrxq_lookup(struct rte_eth_dev *dev, uint32_t idx,
10537                                  const uint64_t hash_fields,
10538                                  const int tunnel)
10539 {
10540         struct mlx5_priv *priv = dev->data->dev_private;
10541         struct mlx5_shared_action_rss *shared_rss =
10542             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
10543         const uint32_t *hrxqs = tunnel ? shared_rss->hrxq :
10544                                                         shared_rss->hrxq_tunnel;
10545
10546         switch (hash_fields & ~IBV_RX_HASH_INNER) {
10547         case MLX5_RSS_HASH_IPV4:
10548                 return hrxqs[0];
10549         case MLX5_RSS_HASH_IPV4_TCP:
10550                 return hrxqs[1];
10551         case MLX5_RSS_HASH_IPV4_UDP:
10552                 return hrxqs[2];
10553         case MLX5_RSS_HASH_IPV6:
10554                 return hrxqs[3];
10555         case MLX5_RSS_HASH_IPV6_TCP:
10556                 return hrxqs[4];
10557         case MLX5_RSS_HASH_IPV6_UDP:
10558                 return hrxqs[5];
10559         case MLX5_RSS_HASH_NONE:
10560                 return hrxqs[6];
10561         default:
10562                 return 0;
10563         }
10564 }
10565
10566 /**
10567  * Retrieves hash RX queue suitable for the *flow*.
10568  * If shared action configured for *flow* suitable hash RX queue will be
10569  * retrieved from attached shared action.
10570  *
10571  * @param[in] dev
10572  *   Pointer to the Ethernet device structure.
10573  * @param[in] flow
10574  *   Shred RSS action holding hash RX queue objects.
10575  * @param[in] dev_flow
10576  *   Pointer to the sub flow.
10577  * @param[out] hrxq
10578  *   Pointer to retrieved hash RX queue object.
10579  *
10580  * @return
10581  *   Valid hash RX queue index, otherwise 0 and rte_errno is set.
10582  */
10583 static uint32_t
10584 __flow_dv_rss_get_hrxq(struct rte_eth_dev *dev, struct rte_flow *flow,
10585                            struct mlx5_flow *dev_flow,
10586                            struct mlx5_hrxq **hrxq)
10587 {
10588         struct mlx5_priv *priv = dev->data->dev_private;
10589         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
10590         uint32_t hrxq_idx;
10591
10592         if (flow->shared_rss) {
10593                 hrxq_idx = __flow_dv_action_rss_hrxq_lookup
10594                                 (dev, flow->shared_rss, dev_flow->hash_fields,
10595                                  !!(dev_flow->handle->layers &
10596                                     MLX5_FLOW_LAYER_TUNNEL));
10597                 if (hrxq_idx) {
10598                         *hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
10599                                                hrxq_idx);
10600                         __atomic_fetch_add(&(*hrxq)->refcnt, 1,
10601                                            __ATOMIC_RELAXED);
10602                 }
10603         } else {
10604                 struct mlx5_flow_rss_desc *rss_desc =
10605                                 &wks->rss_desc[!!wks->flow_nested_idx];
10606
10607                 *hrxq = flow_dv_hrxq_prepare(dev, dev_flow, rss_desc,
10608                                              &hrxq_idx);
10609         }
10610         return hrxq_idx;
10611 }
10612
10613 /**
10614  * Apply the flow to the NIC, lock free,
10615  * (mutex should be acquired by caller).
10616  *
10617  * @param[in] dev
10618  *   Pointer to the Ethernet device structure.
10619  * @param[in, out] flow
10620  *   Pointer to flow structure.
10621  * @param[out] error
10622  *   Pointer to error structure.
10623  *
10624  * @return
10625  *   0 on success, a negative errno value otherwise and rte_errno is set.
10626  */
10627 static int
10628 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
10629               struct rte_flow_error *error)
10630 {
10631         struct mlx5_flow_dv_workspace *dv;
10632         struct mlx5_flow_handle *dh;
10633         struct mlx5_flow_handle_dv *dv_h;
10634         struct mlx5_flow *dev_flow;
10635         struct mlx5_priv *priv = dev->data->dev_private;
10636         uint32_t handle_idx;
10637         int n;
10638         int err;
10639         int idx;
10640         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
10641
10642         MLX5_ASSERT(wks);
10643         for (idx = wks->flow_idx - 1; idx >= wks->flow_nested_idx; idx--) {
10644                 dev_flow = &wks->flows[idx];
10645                 dv = &dev_flow->dv;
10646                 dh = dev_flow->handle;
10647                 dv_h = &dh->dvh;
10648                 n = dv->actions_n;
10649                 if (dh->fate_action == MLX5_FLOW_FATE_DROP) {
10650                         if (dv->transfer) {
10651                                 dv->actions[n++] = priv->sh->esw_drop_action;
10652                         } else {
10653                                 MLX5_ASSERT(priv->drop_queue.hrxq);
10654                                 dv->actions[n++] =
10655                                                 priv->drop_queue.hrxq->action;
10656                         }
10657                 } else if (dh->fate_action == MLX5_FLOW_FATE_QUEUE &&
10658                            !dv_h->rix_sample && !dv_h->rix_dest_array) {
10659                         struct mlx5_hrxq *hrxq = NULL;
10660                         uint32_t hrxq_idx = __flow_dv_rss_get_hrxq
10661                                                 (dev, flow, dev_flow, &hrxq);
10662                         if (!hrxq) {
10663                                 rte_flow_error_set
10664                                         (error, rte_errno,
10665                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10666                                          "cannot get hash queue");
10667                                 goto error;
10668                         }
10669                         dh->rix_hrxq = hrxq_idx;
10670                         dv->actions[n++] = hrxq->action;
10671                 } else if (dh->fate_action == MLX5_FLOW_FATE_DEFAULT_MISS) {
10672                         if (!priv->sh->default_miss_action) {
10673                                 rte_flow_error_set
10674                                         (error, rte_errno,
10675                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10676                                          "default miss action not be created.");
10677                                 goto error;
10678                         }
10679                         dv->actions[n++] = priv->sh->default_miss_action;
10680                 }
10681                 err = mlx5_flow_os_create_flow(dv_h->matcher->matcher_object,
10682                                                (void *)&dv->value, n,
10683                                                dv->actions, &dh->drv_flow);
10684                 if (err) {
10685                         rte_flow_error_set(error, errno,
10686                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10687                                            NULL,
10688                                            "hardware refuses to create flow");
10689                         goto error;
10690                 }
10691                 if (priv->vmwa_context &&
10692                     dh->vf_vlan.tag && !dh->vf_vlan.created) {
10693                         /*
10694                          * The rule contains the VLAN pattern.
10695                          * For VF we are going to create VLAN
10696                          * interface to make hypervisor set correct
10697                          * e-Switch vport context.
10698                          */
10699                         mlx5_vlan_vmwa_acquire(dev, &dh->vf_vlan);
10700                 }
10701         }
10702         return 0;
10703 error:
10704         err = rte_errno; /* Save rte_errno before cleanup. */
10705         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
10706                        handle_idx, dh, next) {
10707                 /* hrxq is union, don't clear it if the flag is not set. */
10708                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE && dh->rix_hrxq) {
10709                         mlx5_hrxq_release(dev, dh->rix_hrxq);
10710                         dh->rix_hrxq = 0;
10711                 }
10712                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
10713                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
10714         }
10715         rte_errno = err; /* Restore rte_errno. */
10716         return -rte_errno;
10717 }
10718
10719 void
10720 flow_dv_matcher_remove_cb(struct mlx5_cache_list *list __rte_unused,
10721                           struct mlx5_cache_entry *entry)
10722 {
10723         struct mlx5_flow_dv_matcher *cache = container_of(entry, typeof(*cache),
10724                                                           entry);
10725
10726         claim_zero(mlx5_flow_os_destroy_flow_matcher(cache->matcher_object));
10727         mlx5_free(cache);
10728 }
10729
10730 /**
10731  * Release the flow matcher.
10732  *
10733  * @param dev
10734  *   Pointer to Ethernet device.
10735  * @param handle
10736  *   Pointer to mlx5_flow_handle.
10737  *
10738  * @return
10739  *   1 while a reference on it exists, 0 when freed.
10740  */
10741 static int
10742 flow_dv_matcher_release(struct rte_eth_dev *dev,
10743                         struct mlx5_flow_handle *handle)
10744 {
10745         struct mlx5_flow_dv_matcher *matcher = handle->dvh.matcher;
10746         struct mlx5_flow_tbl_data_entry *tbl = container_of(matcher->tbl,
10747                                                             typeof(*tbl), tbl);
10748         int ret;
10749
10750         MLX5_ASSERT(matcher->matcher_object);
10751         ret = mlx5_cache_unregister(&tbl->matchers, &matcher->entry);
10752         flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl->tbl);
10753         return ret;
10754 }
10755
10756 /**
10757  * Release encap_decap resource.
10758  *
10759  * @param list
10760  *   Pointer to the hash list.
10761  * @param entry
10762  *   Pointer to exist resource entry object.
10763  */
10764 void
10765 flow_dv_encap_decap_remove_cb(struct mlx5_hlist *list,
10766                               struct mlx5_hlist_entry *entry)
10767 {
10768         struct mlx5_dev_ctx_shared *sh = list->ctx;
10769         struct mlx5_flow_dv_encap_decap_resource *res =
10770                 container_of(entry, typeof(*res), entry);
10771
10772         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
10773         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
10774 }
10775
10776 /**
10777  * Release an encap/decap resource.
10778  *
10779  * @param dev
10780  *   Pointer to Ethernet device.
10781  * @param encap_decap_idx
10782  *   Index of encap decap resource.
10783  *
10784  * @return
10785  *   1 while a reference on it exists, 0 when freed.
10786  */
10787 static int
10788 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
10789                                      uint32_t encap_decap_idx)
10790 {
10791         struct mlx5_priv *priv = dev->data->dev_private;
10792         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
10793
10794         cache_resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
10795                                         encap_decap_idx);
10796         if (!cache_resource)
10797                 return 0;
10798         MLX5_ASSERT(cache_resource->action);
10799         return mlx5_hlist_unregister(priv->sh->encaps_decaps,
10800                                      &cache_resource->entry);
10801 }
10802
10803 /**
10804  * Release an jump to table action resource.
10805  *
10806  * @param dev
10807  *   Pointer to Ethernet device.
10808  * @param handle
10809  *   Pointer to mlx5_flow_handle.
10810  *
10811  * @return
10812  *   1 while a reference on it exists, 0 when freed.
10813  */
10814 static int
10815 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
10816                                   struct mlx5_flow_handle *handle)
10817 {
10818         struct mlx5_priv *priv = dev->data->dev_private;
10819         struct mlx5_flow_tbl_data_entry *tbl_data;
10820
10821         tbl_data = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_JUMP],
10822                              handle->rix_jump);
10823         if (!tbl_data)
10824                 return 0;
10825         return flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl_data->tbl);
10826 }
10827
10828 void
10829 flow_dv_modify_remove_cb(struct mlx5_hlist *list __rte_unused,
10830                          struct mlx5_hlist_entry *entry)
10831 {
10832         struct mlx5_flow_dv_modify_hdr_resource *res =
10833                 container_of(entry, typeof(*res), entry);
10834
10835         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
10836         mlx5_free(entry);
10837 }
10838
10839 /**
10840  * Release a modify-header resource.
10841  *
10842  * @param dev
10843  *   Pointer to Ethernet device.
10844  * @param handle
10845  *   Pointer to mlx5_flow_handle.
10846  *
10847  * @return
10848  *   1 while a reference on it exists, 0 when freed.
10849  */
10850 static int
10851 flow_dv_modify_hdr_resource_release(struct rte_eth_dev *dev,
10852                                     struct mlx5_flow_handle *handle)
10853 {
10854         struct mlx5_priv *priv = dev->data->dev_private;
10855         struct mlx5_flow_dv_modify_hdr_resource *entry = handle->dvh.modify_hdr;
10856
10857         MLX5_ASSERT(entry->action);
10858         return mlx5_hlist_unregister(priv->sh->modify_cmds, &entry->entry);
10859 }
10860
10861 void
10862 flow_dv_port_id_remove_cb(struct mlx5_cache_list *list,
10863                           struct mlx5_cache_entry *entry)
10864 {
10865         struct mlx5_dev_ctx_shared *sh = list->ctx;
10866         struct mlx5_flow_dv_port_id_action_resource *cache =
10867                         container_of(entry, typeof(*cache), entry);
10868
10869         claim_zero(mlx5_flow_os_destroy_flow_action(cache->action));
10870         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], cache->idx);
10871 }
10872
10873 /**
10874  * Release port ID action resource.
10875  *
10876  * @param dev
10877  *   Pointer to Ethernet device.
10878  * @param handle
10879  *   Pointer to mlx5_flow_handle.
10880  *
10881  * @return
10882  *   1 while a reference on it exists, 0 when freed.
10883  */
10884 static int
10885 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
10886                                         uint32_t port_id)
10887 {
10888         struct mlx5_priv *priv = dev->data->dev_private;
10889         struct mlx5_flow_dv_port_id_action_resource *cache;
10890
10891         cache = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PORT_ID], port_id);
10892         if (!cache)
10893                 return 0;
10894         MLX5_ASSERT(cache->action);
10895         return mlx5_cache_unregister(&priv->sh->port_id_action_list,
10896                                      &cache->entry);
10897 }
10898
10899 void
10900 flow_dv_push_vlan_remove_cb(struct mlx5_cache_list *list,
10901                             struct mlx5_cache_entry *entry)
10902 {
10903         struct mlx5_dev_ctx_shared *sh = list->ctx;
10904         struct mlx5_flow_dv_push_vlan_action_resource *cache =
10905                         container_of(entry, typeof(*cache), entry);
10906
10907         claim_zero(mlx5_flow_os_destroy_flow_action(cache->action));
10908         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], cache->idx);
10909 }
10910
10911 /**
10912  * Release push vlan action resource.
10913  *
10914  * @param dev
10915  *   Pointer to Ethernet device.
10916  * @param handle
10917  *   Pointer to mlx5_flow_handle.
10918  *
10919  * @return
10920  *   1 while a reference on it exists, 0 when freed.
10921  */
10922 static int
10923 flow_dv_push_vlan_action_resource_release(struct rte_eth_dev *dev,
10924                                           struct mlx5_flow_handle *handle)
10925 {
10926         struct mlx5_priv *priv = dev->data->dev_private;
10927         struct mlx5_flow_dv_push_vlan_action_resource *cache;
10928         uint32_t idx = handle->dvh.rix_push_vlan;
10929
10930         cache = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
10931         if (!cache)
10932                 return 0;
10933         MLX5_ASSERT(cache->action);
10934         return mlx5_cache_unregister(&priv->sh->push_vlan_action_list,
10935                                      &cache->entry);
10936 }
10937
10938 /**
10939  * Release the fate resource.
10940  *
10941  * @param dev
10942  *   Pointer to Ethernet device.
10943  * @param handle
10944  *   Pointer to mlx5_flow_handle.
10945  */
10946 static void
10947 flow_dv_fate_resource_release(struct rte_eth_dev *dev,
10948                                struct mlx5_flow_handle *handle)
10949 {
10950         if (!handle->rix_fate)
10951                 return;
10952         switch (handle->fate_action) {
10953         case MLX5_FLOW_FATE_QUEUE:
10954                 mlx5_hrxq_release(dev, handle->rix_hrxq);
10955                 break;
10956         case MLX5_FLOW_FATE_JUMP:
10957                 flow_dv_jump_tbl_resource_release(dev, handle);
10958                 break;
10959         case MLX5_FLOW_FATE_PORT_ID:
10960                 flow_dv_port_id_action_resource_release(dev,
10961                                 handle->rix_port_id_action);
10962                 break;
10963         default:
10964                 DRV_LOG(DEBUG, "Incorrect fate action:%d", handle->fate_action);
10965                 break;
10966         }
10967         handle->rix_fate = 0;
10968 }
10969
10970 void
10971 flow_dv_sample_remove_cb(struct mlx5_cache_list *list,
10972                          struct mlx5_cache_entry *entry)
10973 {
10974         struct rte_eth_dev *dev = list->ctx;
10975         struct mlx5_priv *priv = dev->data->dev_private;
10976         struct mlx5_flow_dv_sample_resource *cache_resource =
10977                         container_of(entry, typeof(*cache_resource), entry);
10978
10979         if (cache_resource->verbs_action)
10980                 claim_zero(mlx5_glue->destroy_flow_action
10981                                 (cache_resource->verbs_action));
10982         if (cache_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
10983                 if (cache_resource->default_miss)
10984                         claim_zero(mlx5_glue->destroy_flow_action
10985                           (cache_resource->default_miss));
10986         }
10987         if (cache_resource->normal_path_tbl)
10988                 flow_dv_tbl_resource_release(MLX5_SH(dev),
10989                         cache_resource->normal_path_tbl);
10990         flow_dv_sample_sub_actions_release(dev,
10991                                 &cache_resource->sample_idx);
10992         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
10993                         cache_resource->idx);
10994         DRV_LOG(DEBUG, "sample resource %p: removed",
10995                 (void *)cache_resource);
10996 }
10997
10998 /**
10999  * Release an sample resource.
11000  *
11001  * @param dev
11002  *   Pointer to Ethernet device.
11003  * @param handle
11004  *   Pointer to mlx5_flow_handle.
11005  *
11006  * @return
11007  *   1 while a reference on it exists, 0 when freed.
11008  */
11009 static int
11010 flow_dv_sample_resource_release(struct rte_eth_dev *dev,
11011                                      struct mlx5_flow_handle *handle)
11012 {
11013         struct mlx5_priv *priv = dev->data->dev_private;
11014         struct mlx5_flow_dv_sample_resource *cache_resource;
11015
11016         cache_resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
11017                          handle->dvh.rix_sample);
11018         if (!cache_resource)
11019                 return 0;
11020         MLX5_ASSERT(cache_resource->verbs_action);
11021         return mlx5_cache_unregister(&priv->sh->sample_action_list,
11022                                      &cache_resource->entry);
11023 }
11024
11025 void
11026 flow_dv_dest_array_remove_cb(struct mlx5_cache_list *list,
11027                              struct mlx5_cache_entry *entry)
11028 {
11029         struct rte_eth_dev *dev = list->ctx;
11030         struct mlx5_priv *priv = dev->data->dev_private;
11031         struct mlx5_flow_dv_dest_array_resource *cache_resource =
11032                         container_of(entry, typeof(*cache_resource), entry);
11033         uint32_t i = 0;
11034
11035         MLX5_ASSERT(cache_resource->action);
11036         if (cache_resource->action)
11037                 claim_zero(mlx5_glue->destroy_flow_action
11038                                         (cache_resource->action));
11039         for (; i < cache_resource->num_of_dest; i++)
11040                 flow_dv_sample_sub_actions_release(dev,
11041                                 &cache_resource->sample_idx[i]);
11042         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11043                         cache_resource->idx);
11044         DRV_LOG(DEBUG, "destination array resource %p: removed",
11045                 (void *)cache_resource);
11046 }
11047
11048 /**
11049  * Release an destination array resource.
11050  *
11051  * @param dev
11052  *   Pointer to Ethernet device.
11053  * @param handle
11054  *   Pointer to mlx5_flow_handle.
11055  *
11056  * @return
11057  *   1 while a reference on it exists, 0 when freed.
11058  */
11059 static int
11060 flow_dv_dest_array_resource_release(struct rte_eth_dev *dev,
11061                                     struct mlx5_flow_handle *handle)
11062 {
11063         struct mlx5_priv *priv = dev->data->dev_private;
11064         struct mlx5_flow_dv_dest_array_resource *cache;
11065
11066         cache = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11067                                handle->dvh.rix_dest_array);
11068         if (!cache)
11069                 return 0;
11070         MLX5_ASSERT(cache->action);
11071         return mlx5_cache_unregister(&priv->sh->dest_array_list,
11072                                      &cache->entry);
11073 }
11074
11075 /**
11076  * Remove the flow from the NIC but keeps it in memory.
11077  * Lock free, (mutex should be acquired by caller).
11078  *
11079  * @param[in] dev
11080  *   Pointer to Ethernet device.
11081  * @param[in, out] flow
11082  *   Pointer to flow structure.
11083  */
11084 static void
11085 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
11086 {
11087         struct mlx5_flow_handle *dh;
11088         uint32_t handle_idx;
11089         struct mlx5_priv *priv = dev->data->dev_private;
11090
11091         if (!flow)
11092                 return;
11093         handle_idx = flow->dev_handles;
11094         while (handle_idx) {
11095                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
11096                                     handle_idx);
11097                 if (!dh)
11098                         return;
11099                 if (dh->drv_flow) {
11100                         claim_zero(mlx5_flow_os_destroy_flow(dh->drv_flow));
11101                         dh->drv_flow = NULL;
11102                 }
11103                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE)
11104                         flow_dv_fate_resource_release(dev, dh);
11105                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
11106                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
11107                 handle_idx = dh->next.next;
11108         }
11109 }
11110
11111 /**
11112  * Remove the flow from the NIC and the memory.
11113  * Lock free, (mutex should be acquired by caller).
11114  *
11115  * @param[in] dev
11116  *   Pointer to the Ethernet device structure.
11117  * @param[in, out] flow
11118  *   Pointer to flow structure.
11119  */
11120 static void
11121 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
11122 {
11123         struct mlx5_flow_handle *dev_handle;
11124         struct mlx5_priv *priv = dev->data->dev_private;
11125
11126         if (!flow)
11127                 return;
11128         flow_dv_remove(dev, flow);
11129         if (flow->shared_rss) {
11130                 struct mlx5_shared_action_rss *shared_rss = mlx5_ipool_get
11131                                 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
11132                                                               flow->shared_rss);
11133
11134                 __atomic_sub_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
11135         }
11136         if (flow->counter) {
11137                 flow_dv_counter_free(dev, flow->counter);
11138                 flow->counter = 0;
11139         }
11140         if (flow->meter) {
11141                 struct mlx5_flow_meter *fm;
11142
11143                 fm = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MTR],
11144                                     flow->meter);
11145                 if (fm)
11146                         mlx5_flow_meter_detach(fm);
11147                 flow->meter = 0;
11148         }
11149         if (flow->age)
11150                 flow_dv_aso_age_release(dev, flow->age);
11151         while (flow->dev_handles) {
11152                 uint32_t tmp_idx = flow->dev_handles;
11153
11154                 dev_handle = mlx5_ipool_get(priv->sh->ipool
11155                                             [MLX5_IPOOL_MLX5_FLOW], tmp_idx);
11156                 if (!dev_handle)
11157                         return;
11158                 flow->dev_handles = dev_handle->next.next;
11159                 if (dev_handle->dvh.matcher)
11160                         flow_dv_matcher_release(dev, dev_handle);
11161                 if (dev_handle->dvh.rix_sample)
11162                         flow_dv_sample_resource_release(dev, dev_handle);
11163                 if (dev_handle->dvh.rix_dest_array)
11164                         flow_dv_dest_array_resource_release(dev, dev_handle);
11165                 if (dev_handle->dvh.rix_encap_decap)
11166                         flow_dv_encap_decap_resource_release(dev,
11167                                 dev_handle->dvh.rix_encap_decap);
11168                 if (dev_handle->dvh.modify_hdr)
11169                         flow_dv_modify_hdr_resource_release(dev, dev_handle);
11170                 if (dev_handle->dvh.rix_push_vlan)
11171                         flow_dv_push_vlan_action_resource_release(dev,
11172                                                                   dev_handle);
11173                 if (dev_handle->dvh.rix_tag)
11174                         flow_dv_tag_release(dev,
11175                                             dev_handle->dvh.rix_tag);
11176                 flow_dv_fate_resource_release(dev, dev_handle);
11177                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
11178                            tmp_idx);
11179         }
11180 }
11181
11182 /**
11183  * Release array of hash RX queue objects.
11184  * Helper function.
11185  *
11186  * @param[in] dev
11187  *   Pointer to the Ethernet device structure.
11188  * @param[in, out] hrxqs
11189  *   Array of hash RX queue objects.
11190  *
11191  * @return
11192  *   Total number of references to hash RX queue objects in *hrxqs* array
11193  *   after this operation.
11194  */
11195 static int
11196 __flow_dv_hrxqs_release(struct rte_eth_dev *dev,
11197                         uint32_t (*hrxqs)[MLX5_RSS_HASH_FIELDS_LEN])
11198 {
11199         size_t i;
11200         int remaining = 0;
11201
11202         for (i = 0; i < RTE_DIM(*hrxqs); i++) {
11203                 int ret = mlx5_hrxq_release(dev, (*hrxqs)[i]);
11204
11205                 if (!ret)
11206                         (*hrxqs)[i] = 0;
11207                 remaining += ret;
11208         }
11209         return remaining;
11210 }
11211
11212 /**
11213  * Release all hash RX queue objects representing shared RSS action.
11214  *
11215  * @param[in] dev
11216  *   Pointer to the Ethernet device structure.
11217  * @param[in, out] action
11218  *   Shared RSS action to remove hash RX queue objects from.
11219  *
11220  * @return
11221  *   Total number of references to hash RX queue objects stored in *action*
11222  *   after this operation.
11223  *   Expected to be 0 if no external references held.
11224  */
11225 static int
11226 __flow_dv_action_rss_hrxqs_release(struct rte_eth_dev *dev,
11227                                  struct mlx5_shared_action_rss *action)
11228 {
11229         return __flow_dv_hrxqs_release(dev, &action->hrxq) +
11230                 __flow_dv_hrxqs_release(dev, &action->hrxq_tunnel);
11231 }
11232
11233 /**
11234  * Setup shared RSS action.
11235  * Prepare set of hash RX queue objects sufficient to handle all valid
11236  * hash_fields combinations (see enum ibv_rx_hash_fields).
11237  *
11238  * @param[in] dev
11239  *   Pointer to the Ethernet device structure.
11240  * @param[in, out] action
11241  *   Partially initialized shared RSS action.
11242  * @param[out] error
11243  *   Perform verbose error reporting if not NULL. Initialized in case of
11244  *   error only.
11245  *
11246  * @return
11247  *   0 on success, otherwise negative errno value.
11248  */
11249 static int
11250 __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
11251                         struct mlx5_shared_action_rss *action,
11252                         struct rte_flow_error *error)
11253 {
11254         struct mlx5_flow_rss_desc rss_desc = { 0 };
11255         size_t i;
11256         int err;
11257
11258         memcpy(rss_desc.key, action->origin.key, MLX5_RSS_HASH_KEY_LEN);
11259         rss_desc.key_len = MLX5_RSS_HASH_KEY_LEN;
11260         rss_desc.const_q = action->origin.queue;
11261         rss_desc.queue_num = action->origin.queue_num;
11262         rss_desc.standalone = true;
11263         for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
11264                 uint32_t hrxq_idx;
11265                 uint64_t hash_fields = mlx5_rss_hash_fields[i];
11266                 int tunnel;
11267
11268                 for (tunnel = 0; tunnel < 2; tunnel++) {
11269                         rss_desc.tunnel = tunnel;
11270                         rss_desc.hash_fields = hash_fields;
11271                         hrxq_idx = mlx5_hrxq_get(dev, &rss_desc);
11272                         if (!hrxq_idx) {
11273                                 rte_flow_error_set
11274                                         (error, rte_errno,
11275                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
11276                                          "cannot get hash queue");
11277                                 goto error_hrxq_new;
11278                         }
11279                         err = __flow_dv_action_rss_hrxq_set
11280                                 (action, hash_fields, tunnel, hrxq_idx);
11281                         MLX5_ASSERT(!err);
11282                 }
11283         }
11284         return 0;
11285 error_hrxq_new:
11286         err = rte_errno;
11287         __flow_dv_action_rss_hrxqs_release(dev, action);
11288         rte_errno = err;
11289         return -rte_errno;
11290 }
11291
11292 /**
11293  * Create shared RSS action.
11294  *
11295  * @param[in] dev
11296  *   Pointer to the Ethernet device structure.
11297  * @param[in] conf
11298  *   Shared action configuration.
11299  * @param[in] rss
11300  *   RSS action specification used to create shared action.
11301  * @param[out] error
11302  *   Perform verbose error reporting if not NULL. Initialized in case of
11303  *   error only.
11304  *
11305  * @return
11306  *   A valid shared action ID in case of success, 0 otherwise and
11307  *   rte_errno is set.
11308  */
11309 static uint32_t
11310 __flow_dv_action_rss_create(struct rte_eth_dev *dev,
11311                             const struct rte_flow_shared_action_conf *conf,
11312                             const struct rte_flow_action_rss *rss,
11313                             struct rte_flow_error *error)
11314 {
11315         struct mlx5_priv *priv = dev->data->dev_private;
11316         struct mlx5_shared_action_rss *shared_action = NULL;
11317         void *queue = NULL;
11318         struct rte_flow_action_rss *origin;
11319         const uint8_t *rss_key;
11320         uint32_t queue_size = rss->queue_num * sizeof(uint16_t);
11321         uint32_t idx;
11322
11323         RTE_SET_USED(conf);
11324         queue = mlx5_malloc(0, RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
11325                             0, SOCKET_ID_ANY);
11326         shared_action = mlx5_ipool_zmalloc
11327                          (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], &idx);
11328         if (!shared_action || !queue) {
11329                 rte_flow_error_set(error, ENOMEM,
11330                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
11331                                    "cannot allocate resource memory");
11332                 goto error_rss_init;
11333         }
11334         if (idx > (1u << MLX5_SHARED_ACTION_TYPE_OFFSET)) {
11335                 rte_flow_error_set(error, E2BIG,
11336                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
11337                                    "rss action number out of range");
11338                 goto error_rss_init;
11339         }
11340         shared_action->queue = queue;
11341         origin = &shared_action->origin;
11342         origin->func = rss->func;
11343         origin->level = rss->level;
11344         /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
11345         origin->types = !rss->types ? ETH_RSS_IP : rss->types;
11346         /* NULL RSS key indicates default RSS key. */
11347         rss_key = !rss->key ? rss_hash_default_key : rss->key;
11348         memcpy(shared_action->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
11349         origin->key = &shared_action->key[0];
11350         origin->key_len = MLX5_RSS_HASH_KEY_LEN;
11351         memcpy(shared_action->queue, rss->queue, queue_size);
11352         origin->queue = shared_action->queue;
11353         origin->queue_num = rss->queue_num;
11354         if (__flow_dv_action_rss_setup(dev, shared_action, error))
11355                 goto error_rss_init;
11356         __atomic_add_fetch(&shared_action->refcnt, 1, __ATOMIC_RELAXED);
11357         rte_spinlock_lock(&priv->shared_act_sl);
11358         ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
11359                      &priv->rss_shared_actions, idx, shared_action, next);
11360         rte_spinlock_unlock(&priv->shared_act_sl);
11361         return idx;
11362 error_rss_init:
11363         if (shared_action)
11364                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
11365                                 idx);
11366         if (queue)
11367                 mlx5_free(queue);
11368         return 0;
11369 }
11370
11371 /**
11372  * Destroy the shared RSS action.
11373  * Release related hash RX queue objects.
11374  *
11375  * @param[in] dev
11376  *   Pointer to the Ethernet device structure.
11377  * @param[in] idx
11378  *   The shared RSS action object ID to be removed.
11379  * @param[out] error
11380  *   Perform verbose error reporting if not NULL. Initialized in case of
11381  *   error only.
11382  *
11383  * @return
11384  *   0 on success, otherwise negative errno value.
11385  */
11386 static int
11387 __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
11388                              struct rte_flow_error *error)
11389 {
11390         struct mlx5_priv *priv = dev->data->dev_private;
11391         struct mlx5_shared_action_rss *shared_rss =
11392             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
11393         uint32_t old_refcnt = 1;
11394         int remaining;
11395
11396         if (!shared_rss)
11397                 return rte_flow_error_set(error, EINVAL,
11398                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
11399                                           "invalid shared action");
11400         remaining = __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
11401         if (remaining)
11402                 return rte_flow_error_set(error, ETOOMANYREFS,
11403                                           RTE_FLOW_ERROR_TYPE_ACTION,
11404                                           NULL,
11405                                           "shared rss hrxq has references");
11406         if (!__atomic_compare_exchange_n(&shared_rss->refcnt, &old_refcnt,
11407                                          0, 0, __ATOMIC_ACQUIRE,
11408                                          __ATOMIC_RELAXED))
11409                 return rte_flow_error_set(error, ETOOMANYREFS,
11410                                           RTE_FLOW_ERROR_TYPE_ACTION,
11411                                           NULL,
11412                                           "shared rss has references");
11413         rte_free(shared_rss->queue);
11414         rte_spinlock_lock(&priv->shared_act_sl);
11415         ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
11416                      &priv->rss_shared_actions, idx, shared_rss, next);
11417         rte_spinlock_unlock(&priv->shared_act_sl);
11418         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
11419                         idx);
11420         return 0;
11421 }
11422
11423 /**
11424  * Create shared action, lock free,
11425  * (mutex should be acquired by caller).
11426  * Dispatcher for action type specific call.
11427  *
11428  * @param[in] dev
11429  *   Pointer to the Ethernet device structure.
11430  * @param[in] conf
11431  *   Shared action configuration.
11432  * @param[in] action
11433  *   Action specification used to create shared action.
11434  * @param[out] error
11435  *   Perform verbose error reporting if not NULL. Initialized in case of
11436  *   error only.
11437  *
11438  * @return
11439  *   A valid shared action handle in case of success, NULL otherwise and
11440  *   rte_errno is set.
11441  */
11442 static struct rte_flow_shared_action *
11443 flow_dv_action_create(struct rte_eth_dev *dev,
11444                       const struct rte_flow_shared_action_conf *conf,
11445                       const struct rte_flow_action *action,
11446                       struct rte_flow_error *err)
11447 {
11448         uint32_t idx = 0;
11449         uint32_t ret = 0;
11450
11451         switch (action->type) {
11452         case RTE_FLOW_ACTION_TYPE_RSS:
11453                 ret = __flow_dv_action_rss_create(dev, conf, action->conf, err);
11454                 idx = (MLX5_SHARED_ACTION_TYPE_RSS <<
11455                        MLX5_SHARED_ACTION_TYPE_OFFSET) | ret;
11456                 break;
11457         case RTE_FLOW_ACTION_TYPE_AGE:
11458                 ret = flow_dv_translate_create_aso_age(dev, action->conf);
11459                 idx = (MLX5_SHARED_ACTION_TYPE_AGE <<
11460                        MLX5_SHARED_ACTION_TYPE_OFFSET) | ret;
11461                 if (ret) {
11462                         struct mlx5_aso_age_action *aso_age =
11463                                               flow_aso_age_get_by_idx(dev, ret);
11464
11465                         if (!aso_age->age_params.context)
11466                                 aso_age->age_params.context =
11467                                                          (void *)(uintptr_t)idx;
11468                 }
11469                 break;
11470         default:
11471                 rte_flow_error_set(err, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
11472                                    NULL, "action type not supported");
11473                 break;
11474         }
11475         return ret ? (struct rte_flow_shared_action *)(uintptr_t)idx : NULL;
11476 }
11477
11478 /**
11479  * Destroy the shared action.
11480  * Release action related resources on the NIC and the memory.
11481  * Lock free, (mutex should be acquired by caller).
11482  * Dispatcher for action type specific call.
11483  *
11484  * @param[in] dev
11485  *   Pointer to the Ethernet device structure.
11486  * @param[in] action
11487  *   The shared action object to be removed.
11488  * @param[out] error
11489  *   Perform verbose error reporting if not NULL. Initialized in case of
11490  *   error only.
11491  *
11492  * @return
11493  *   0 on success, otherwise negative errno value.
11494  */
11495 static int
11496 flow_dv_action_destroy(struct rte_eth_dev *dev,
11497                        struct rte_flow_shared_action *action,
11498                        struct rte_flow_error *error)
11499 {
11500         uint32_t act_idx = (uint32_t)(uintptr_t)action;
11501         uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
11502         uint32_t idx = act_idx & ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) - 1);
11503         int ret;
11504
11505         switch (type) {
11506         case MLX5_SHARED_ACTION_TYPE_RSS:
11507                 return __flow_dv_action_rss_release(dev, idx, error);
11508         case MLX5_SHARED_ACTION_TYPE_AGE:
11509                 ret = flow_dv_aso_age_release(dev, idx);
11510                 if (ret)
11511                         /*
11512                          * In this case, the last flow has a reference will
11513                          * actually release the age action.
11514                          */
11515                         DRV_LOG(DEBUG, "Shared age action %" PRIu32 " was"
11516                                 " released with references %d.", idx, ret);
11517                 return 0;
11518         default:
11519                 return rte_flow_error_set(error, ENOTSUP,
11520                                           RTE_FLOW_ERROR_TYPE_ACTION,
11521                                           NULL,
11522                                           "action type not supported");
11523         }
11524 }
11525
11526 /**
11527  * Updates in place shared RSS action configuration.
11528  *
11529  * @param[in] dev
11530  *   Pointer to the Ethernet device structure.
11531  * @param[in] idx
11532  *   The shared RSS action object ID to be updated.
11533  * @param[in] action_conf
11534  *   RSS action specification used to modify *shared_rss*.
11535  * @param[out] error
11536  *   Perform verbose error reporting if not NULL. Initialized in case of
11537  *   error only.
11538  *
11539  * @return
11540  *   0 on success, otherwise negative errno value.
11541  * @note: currently only support update of RSS queues.
11542  */
11543 static int
11544 __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
11545                             const struct rte_flow_action_rss *action_conf,
11546                             struct rte_flow_error *error)
11547 {
11548         struct mlx5_priv *priv = dev->data->dev_private;
11549         struct mlx5_shared_action_rss *shared_rss =
11550             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
11551         size_t i;
11552         int ret;
11553         void *queue = NULL;
11554         const uint8_t *rss_key;
11555         uint32_t rss_key_len;
11556         uint32_t queue_size = action_conf->queue_num * sizeof(uint16_t);
11557
11558         if (!shared_rss)
11559                 return rte_flow_error_set(error, EINVAL,
11560                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
11561                                           "invalid shared action to update");
11562         queue = mlx5_malloc(MLX5_MEM_ZERO,
11563                             RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
11564                             0, SOCKET_ID_ANY);
11565         if (!queue)
11566                 return rte_flow_error_set(error, ENOMEM,
11567                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11568                                           NULL,
11569                                           "cannot allocate resource memory");
11570         if (action_conf->key) {
11571                 rss_key = action_conf->key;
11572                 rss_key_len = action_conf->key_len;
11573         } else {
11574                 rss_key = rss_hash_default_key;
11575                 rss_key_len = MLX5_RSS_HASH_KEY_LEN;
11576         }
11577         for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
11578                 uint32_t hrxq_idx;
11579                 uint64_t hash_fields = mlx5_rss_hash_fields[i];
11580                 int tunnel;
11581
11582                 for (tunnel = 0; tunnel < 2; tunnel++) {
11583                         hrxq_idx = __flow_dv_action_rss_hrxq_lookup
11584                                         (dev, idx, hash_fields, tunnel);
11585                         MLX5_ASSERT(hrxq_idx);
11586                         ret = mlx5_hrxq_modify
11587                                 (dev, hrxq_idx,
11588                                  rss_key, rss_key_len,
11589                                  hash_fields,
11590                                  action_conf->queue, action_conf->queue_num);
11591                         if (ret) {
11592                                 mlx5_free(queue);
11593                                 return rte_flow_error_set
11594                                         (error, rte_errno,
11595                                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
11596                                          "cannot update hash queue");
11597                         }
11598                 }
11599         }
11600         mlx5_free(shared_rss->queue);
11601         shared_rss->queue = queue;
11602         memcpy(shared_rss->queue, action_conf->queue, queue_size);
11603         shared_rss->origin.queue = shared_rss->queue;
11604         shared_rss->origin.queue_num = action_conf->queue_num;
11605         return 0;
11606 }
11607
11608 /**
11609  * Updates in place shared action configuration, lock free,
11610  * (mutex should be acquired by caller).
11611  *
11612  * @param[in] dev
11613  *   Pointer to the Ethernet device structure.
11614  * @param[in] action
11615  *   The shared action object to be updated.
11616  * @param[in] action_conf
11617  *   Action specification used to modify *action*.
11618  *   *action_conf* should be of type correlating with type of the *action*,
11619  *   otherwise considered as invalid.
11620  * @param[out] error
11621  *   Perform verbose error reporting if not NULL. Initialized in case of
11622  *   error only.
11623  *
11624  * @return
11625  *   0 on success, otherwise negative errno value.
11626  */
11627 static int
11628 flow_dv_action_update(struct rte_eth_dev *dev,
11629                         struct rte_flow_shared_action *action,
11630                         const void *action_conf,
11631                         struct rte_flow_error *err)
11632 {
11633         uint32_t act_idx = (uint32_t)(uintptr_t)action;
11634         uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
11635         uint32_t idx = act_idx & ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) - 1);
11636
11637         switch (type) {
11638         case MLX5_SHARED_ACTION_TYPE_RSS:
11639                 return __flow_dv_action_rss_update(dev, idx, action_conf, err);
11640         default:
11641                 return rte_flow_error_set(err, ENOTSUP,
11642                                           RTE_FLOW_ERROR_TYPE_ACTION,
11643                                           NULL,
11644                                           "action type update not supported");
11645         }
11646 }
11647
11648 static int
11649 flow_dv_action_query(struct rte_eth_dev *dev,
11650                      const struct rte_flow_shared_action *action, void *data,
11651                      struct rte_flow_error *error)
11652 {
11653         struct mlx5_age_param *age_param;
11654         struct rte_flow_query_age *resp;
11655         uint32_t act_idx = (uint32_t)(uintptr_t)action;
11656         uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
11657         uint32_t idx = act_idx & ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) - 1);
11658
11659         switch (type) {
11660         case MLX5_SHARED_ACTION_TYPE_AGE:
11661                 age_param = &flow_aso_age_get_by_idx(dev, idx)->age_params;
11662                 resp = data;
11663                 resp->aged = __atomic_load_n(&age_param->state,
11664                                               __ATOMIC_RELAXED) == AGE_TMOUT ?
11665                                                                           1 : 0;
11666                 resp->sec_since_last_hit_valid = !resp->aged;
11667                 if (resp->sec_since_last_hit_valid)
11668                         resp->sec_since_last_hit = __atomic_load_n
11669                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
11670                 return 0;
11671         default:
11672                 return rte_flow_error_set(error, ENOTSUP,
11673                                           RTE_FLOW_ERROR_TYPE_ACTION,
11674                                           NULL,
11675                                           "action type query not supported");
11676         }
11677 }
11678
11679 /**
11680  * Query a dv flow  rule for its statistics via devx.
11681  *
11682  * @param[in] dev
11683  *   Pointer to Ethernet device.
11684  * @param[in] flow
11685  *   Pointer to the sub flow.
11686  * @param[out] data
11687  *   data retrieved by the query.
11688  * @param[out] error
11689  *   Perform verbose error reporting if not NULL.
11690  *
11691  * @return
11692  *   0 on success, a negative errno value otherwise and rte_errno is set.
11693  */
11694 static int
11695 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
11696                     void *data, struct rte_flow_error *error)
11697 {
11698         struct mlx5_priv *priv = dev->data->dev_private;
11699         struct rte_flow_query_count *qc = data;
11700
11701         if (!priv->config.devx)
11702                 return rte_flow_error_set(error, ENOTSUP,
11703                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11704                                           NULL,
11705                                           "counters are not supported");
11706         if (flow->counter) {
11707                 uint64_t pkts, bytes;
11708                 struct mlx5_flow_counter *cnt;
11709
11710                 cnt = flow_dv_counter_get_by_idx(dev, flow->counter,
11711                                                  NULL);
11712                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
11713                                                &bytes);
11714
11715                 if (err)
11716                         return rte_flow_error_set(error, -err,
11717                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11718                                         NULL, "cannot read counters");
11719                 qc->hits_set = 1;
11720                 qc->bytes_set = 1;
11721                 qc->hits = pkts - cnt->hits;
11722                 qc->bytes = bytes - cnt->bytes;
11723                 if (qc->reset) {
11724                         cnt->hits = pkts;
11725                         cnt->bytes = bytes;
11726                 }
11727                 return 0;
11728         }
11729         return rte_flow_error_set(error, EINVAL,
11730                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11731                                   NULL,
11732                                   "counters are not available");
11733 }
11734
11735 /**
11736  * Query a flow rule AGE action for aging information.
11737  *
11738  * @param[in] dev
11739  *   Pointer to Ethernet device.
11740  * @param[in] flow
11741  *   Pointer to the sub flow.
11742  * @param[out] data
11743  *   data retrieved by the query.
11744  * @param[out] error
11745  *   Perform verbose error reporting if not NULL.
11746  *
11747  * @return
11748  *   0 on success, a negative errno value otherwise and rte_errno is set.
11749  */
11750 static int
11751 flow_dv_query_age(struct rte_eth_dev *dev, struct rte_flow *flow,
11752                   void *data, struct rte_flow_error *error)
11753 {
11754         struct rte_flow_query_age *resp = data;
11755         struct mlx5_age_param *age_param;
11756
11757         if (flow->age) {
11758                 struct mlx5_aso_age_action *act =
11759                                      flow_aso_age_get_by_idx(dev, flow->age);
11760
11761                 age_param = &act->age_params;
11762         } else if (flow->counter) {
11763                 age_param = flow_dv_counter_idx_get_age(dev, flow->counter);
11764
11765                 if (!age_param || !age_param->timeout)
11766                         return rte_flow_error_set
11767                                         (error, EINVAL,
11768                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11769                                          NULL, "cannot read age data");
11770         } else {
11771                 return rte_flow_error_set(error, EINVAL,
11772                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11773                                           NULL, "age data not available");
11774         }
11775         resp->aged = __atomic_load_n(&age_param->state, __ATOMIC_RELAXED) ==
11776                                      AGE_TMOUT ? 1 : 0;
11777         resp->sec_since_last_hit_valid = !resp->aged;
11778         if (resp->sec_since_last_hit_valid)
11779                 resp->sec_since_last_hit = __atomic_load_n
11780                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
11781         return 0;
11782 }
11783
11784 /**
11785  * Query a flow.
11786  *
11787  * @see rte_flow_query()
11788  * @see rte_flow_ops
11789  */
11790 static int
11791 flow_dv_query(struct rte_eth_dev *dev,
11792               struct rte_flow *flow __rte_unused,
11793               const struct rte_flow_action *actions __rte_unused,
11794               void *data __rte_unused,
11795               struct rte_flow_error *error __rte_unused)
11796 {
11797         int ret = -EINVAL;
11798
11799         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
11800                 switch (actions->type) {
11801                 case RTE_FLOW_ACTION_TYPE_VOID:
11802                         break;
11803                 case RTE_FLOW_ACTION_TYPE_COUNT:
11804                         ret = flow_dv_query_count(dev, flow, data, error);
11805                         break;
11806                 case RTE_FLOW_ACTION_TYPE_AGE:
11807                         ret = flow_dv_query_age(dev, flow, data, error);
11808                         break;
11809                 default:
11810                         return rte_flow_error_set(error, ENOTSUP,
11811                                                   RTE_FLOW_ERROR_TYPE_ACTION,
11812                                                   actions,
11813                                                   "action not supported");
11814                 }
11815         }
11816         return ret;
11817 }
11818
11819 /**
11820  * Destroy the meter table set.
11821  * Lock free, (mutex should be acquired by caller).
11822  *
11823  * @param[in] dev
11824  *   Pointer to Ethernet device.
11825  * @param[in] tbl
11826  *   Pointer to the meter table set.
11827  *
11828  * @return
11829  *   Always 0.
11830  */
11831 static int
11832 flow_dv_destroy_mtr_tbl(struct rte_eth_dev *dev,
11833                         struct mlx5_meter_domains_infos *tbl)
11834 {
11835         struct mlx5_priv *priv = dev->data->dev_private;
11836         struct mlx5_meter_domains_infos *mtd =
11837                                 (struct mlx5_meter_domains_infos *)tbl;
11838
11839         if (!mtd || !priv->config.dv_flow_en)
11840                 return 0;
11841         if (mtd->ingress.policer_rules[RTE_MTR_DROPPED])
11842                 claim_zero(mlx5_flow_os_destroy_flow
11843                            (mtd->ingress.policer_rules[RTE_MTR_DROPPED]));
11844         if (mtd->egress.policer_rules[RTE_MTR_DROPPED])
11845                 claim_zero(mlx5_flow_os_destroy_flow
11846                            (mtd->egress.policer_rules[RTE_MTR_DROPPED]));
11847         if (mtd->transfer.policer_rules[RTE_MTR_DROPPED])
11848                 claim_zero(mlx5_flow_os_destroy_flow
11849                            (mtd->transfer.policer_rules[RTE_MTR_DROPPED]));
11850         if (mtd->egress.color_matcher)
11851                 claim_zero(mlx5_flow_os_destroy_flow_matcher
11852                            (mtd->egress.color_matcher));
11853         if (mtd->egress.any_matcher)
11854                 claim_zero(mlx5_flow_os_destroy_flow_matcher
11855                            (mtd->egress.any_matcher));
11856         if (mtd->egress.tbl)
11857                 flow_dv_tbl_resource_release(MLX5_SH(dev), mtd->egress.tbl);
11858         if (mtd->egress.sfx_tbl)
11859                 flow_dv_tbl_resource_release(MLX5_SH(dev), mtd->egress.sfx_tbl);
11860         if (mtd->ingress.color_matcher)
11861                 claim_zero(mlx5_flow_os_destroy_flow_matcher
11862                            (mtd->ingress.color_matcher));
11863         if (mtd->ingress.any_matcher)
11864                 claim_zero(mlx5_flow_os_destroy_flow_matcher
11865                            (mtd->ingress.any_matcher));
11866         if (mtd->ingress.tbl)
11867                 flow_dv_tbl_resource_release(MLX5_SH(dev), mtd->ingress.tbl);
11868         if (mtd->ingress.sfx_tbl)
11869                 flow_dv_tbl_resource_release(MLX5_SH(dev),
11870                                              mtd->ingress.sfx_tbl);
11871         if (mtd->transfer.color_matcher)
11872                 claim_zero(mlx5_flow_os_destroy_flow_matcher
11873                            (mtd->transfer.color_matcher));
11874         if (mtd->transfer.any_matcher)
11875                 claim_zero(mlx5_flow_os_destroy_flow_matcher
11876                            (mtd->transfer.any_matcher));
11877         if (mtd->transfer.tbl)
11878                 flow_dv_tbl_resource_release(MLX5_SH(dev), mtd->transfer.tbl);
11879         if (mtd->transfer.sfx_tbl)
11880                 flow_dv_tbl_resource_release(MLX5_SH(dev),
11881                                              mtd->transfer.sfx_tbl);
11882         if (mtd->drop_actn)
11883                 claim_zero(mlx5_flow_os_destroy_flow_action(mtd->drop_actn));
11884         mlx5_free(mtd);
11885         return 0;
11886 }
11887
11888 /* Number of meter flow actions, count and jump or count and drop. */
11889 #define METER_ACTIONS 2
11890
11891 /**
11892  * Create specify domain meter table and suffix table.
11893  *
11894  * @param[in] dev
11895  *   Pointer to Ethernet device.
11896  * @param[in,out] mtb
11897  *   Pointer to DV meter table set.
11898  * @param[in] egress
11899  *   Table attribute.
11900  * @param[in] transfer
11901  *   Table attribute.
11902  * @param[in] color_reg_c_idx
11903  *   Reg C index for color match.
11904  *
11905  * @return
11906  *   0 on success, -1 otherwise and rte_errno is set.
11907  */
11908 static int
11909 flow_dv_prepare_mtr_tables(struct rte_eth_dev *dev,
11910                            struct mlx5_meter_domains_infos *mtb,
11911                            uint8_t egress, uint8_t transfer,
11912                            uint32_t color_reg_c_idx)
11913 {
11914         struct mlx5_priv *priv = dev->data->dev_private;
11915         struct mlx5_dev_ctx_shared *sh = priv->sh;
11916         struct mlx5_flow_dv_match_params mask = {
11917                 .size = sizeof(mask.buf),
11918         };
11919         struct mlx5_flow_dv_match_params value = {
11920                 .size = sizeof(value.buf),
11921         };
11922         struct mlx5dv_flow_matcher_attr dv_attr = {
11923                 .type = IBV_FLOW_ATTR_NORMAL,
11924                 .priority = 0,
11925                 .match_criteria_enable = 0,
11926                 .match_mask = (void *)&mask,
11927         };
11928         void *actions[METER_ACTIONS];
11929         struct mlx5_meter_domain_info *dtb;
11930         struct rte_flow_error error;
11931         int i = 0;
11932         int ret;
11933
11934         if (transfer)
11935                 dtb = &mtb->transfer;
11936         else if (egress)
11937                 dtb = &mtb->egress;
11938         else
11939                 dtb = &mtb->ingress;
11940         /* Create the meter table with METER level. */
11941         dtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,
11942                                             egress, transfer, false, NULL, 0,
11943                                             0, &error);
11944         if (!dtb->tbl) {
11945                 DRV_LOG(ERR, "Failed to create meter policer table.");
11946                 return -1;
11947         }
11948         /* Create the meter suffix table with SUFFIX level. */
11949         dtb->sfx_tbl = flow_dv_tbl_resource_get(dev,
11950                                             MLX5_FLOW_TABLE_LEVEL_SUFFIX,
11951                                             egress, transfer, false, NULL, 0,
11952                                             0, &error);
11953         if (!dtb->sfx_tbl) {
11954                 DRV_LOG(ERR, "Failed to create meter suffix table.");
11955                 return -1;
11956         }
11957         /* Create matchers, Any and Color. */
11958         dv_attr.priority = 3;
11959         dv_attr.match_criteria_enable = 0;
11960         ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, dtb->tbl->obj,
11961                                                &dtb->any_matcher);
11962         if (ret) {
11963                 DRV_LOG(ERR, "Failed to create meter"
11964                              " policer default matcher.");
11965                 goto error_exit;
11966         }
11967         dv_attr.priority = 0;
11968         dv_attr.match_criteria_enable =
11969                                 1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
11970         flow_dv_match_meta_reg(mask.buf, value.buf, color_reg_c_idx,
11971                                rte_col_2_mlx5_col(RTE_COLORS), UINT8_MAX);
11972         ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, dtb->tbl->obj,
11973                                                &dtb->color_matcher);
11974         if (ret) {
11975                 DRV_LOG(ERR, "Failed to create meter policer color matcher.");
11976                 goto error_exit;
11977         }
11978         if (mtb->count_actns[RTE_MTR_DROPPED])
11979                 actions[i++] = mtb->count_actns[RTE_MTR_DROPPED];
11980         actions[i++] = mtb->drop_actn;
11981         /* Default rule: lowest priority, match any, actions: drop. */
11982         ret = mlx5_flow_os_create_flow(dtb->any_matcher, (void *)&value, i,
11983                                        actions,
11984                                        &dtb->policer_rules[RTE_MTR_DROPPED]);
11985         if (ret) {
11986                 DRV_LOG(ERR, "Failed to create meter policer drop rule.");
11987                 goto error_exit;
11988         }
11989         return 0;
11990 error_exit:
11991         return -1;
11992 }
11993
11994 /**
11995  * Create the needed meter and suffix tables.
11996  * Lock free, (mutex should be acquired by caller).
11997  *
11998  * @param[in] dev
11999  *   Pointer to Ethernet device.
12000  * @param[in] fm
12001  *   Pointer to the flow meter.
12002  *
12003  * @return
12004  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
12005  */
12006 static struct mlx5_meter_domains_infos *
12007 flow_dv_create_mtr_tbl(struct rte_eth_dev *dev,
12008                        const struct mlx5_flow_meter *fm)
12009 {
12010         struct mlx5_priv *priv = dev->data->dev_private;
12011         struct mlx5_meter_domains_infos *mtb;
12012         int ret;
12013         int i;
12014
12015         if (!priv->mtr_en) {
12016                 rte_errno = ENOTSUP;
12017                 return NULL;
12018         }
12019         mtb = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*mtb), 0, SOCKET_ID_ANY);
12020         if (!mtb) {
12021                 DRV_LOG(ERR, "Failed to allocate memory for meter.");
12022                 return NULL;
12023         }
12024         /* Create meter count actions */
12025         for (i = 0; i <= RTE_MTR_DROPPED; i++) {
12026                 struct mlx5_flow_counter *cnt;
12027                 if (!fm->policer_stats.cnt[i])
12028                         continue;
12029                 cnt = flow_dv_counter_get_by_idx(dev,
12030                       fm->policer_stats.cnt[i], NULL);
12031                 mtb->count_actns[i] = cnt->action;
12032         }
12033         /* Create drop action. */
12034         ret = mlx5_flow_os_create_flow_action_drop(&mtb->drop_actn);
12035         if (ret) {
12036                 DRV_LOG(ERR, "Failed to create drop action.");
12037                 goto error_exit;
12038         }
12039         /* Egress meter table. */
12040         ret = flow_dv_prepare_mtr_tables(dev, mtb, 1, 0, priv->mtr_color_reg);
12041         if (ret) {
12042                 DRV_LOG(ERR, "Failed to prepare egress meter table.");
12043                 goto error_exit;
12044         }
12045         /* Ingress meter table. */
12046         ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 0, priv->mtr_color_reg);
12047         if (ret) {
12048                 DRV_LOG(ERR, "Failed to prepare ingress meter table.");
12049                 goto error_exit;
12050         }
12051         /* FDB meter table. */
12052         if (priv->config.dv_esw_en) {
12053                 ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 1,
12054                                                  priv->mtr_color_reg);
12055                 if (ret) {
12056                         DRV_LOG(ERR, "Failed to prepare fdb meter table.");
12057                         goto error_exit;
12058                 }
12059         }
12060         return mtb;
12061 error_exit:
12062         flow_dv_destroy_mtr_tbl(dev, mtb);
12063         return NULL;
12064 }
12065
12066 /**
12067  * Destroy domain policer rule.
12068  *
12069  * @param[in] dt
12070  *   Pointer to domain table.
12071  */
12072 static void
12073 flow_dv_destroy_domain_policer_rule(struct mlx5_meter_domain_info *dt)
12074 {
12075         int i;
12076
12077         for (i = 0; i < RTE_MTR_DROPPED; i++) {
12078                 if (dt->policer_rules[i]) {
12079                         claim_zero(mlx5_flow_os_destroy_flow
12080                                    (dt->policer_rules[i]));
12081                         dt->policer_rules[i] = NULL;
12082                 }
12083         }
12084         if (dt->jump_actn) {
12085                 claim_zero(mlx5_flow_os_destroy_flow_action(dt->jump_actn));
12086                 dt->jump_actn = NULL;
12087         }
12088 }
12089
12090 /**
12091  * Destroy policer rules.
12092  *
12093  * @param[in] dev
12094  *   Pointer to Ethernet device.
12095  * @param[in] fm
12096  *   Pointer to flow meter structure.
12097  * @param[in] attr
12098  *   Pointer to flow attributes.
12099  *
12100  * @return
12101  *   Always 0.
12102  */
12103 static int
12104 flow_dv_destroy_policer_rules(struct rte_eth_dev *dev __rte_unused,
12105                               const struct mlx5_flow_meter *fm,
12106                               const struct rte_flow_attr *attr)
12107 {
12108         struct mlx5_meter_domains_infos *mtb = fm ? fm->mfts : NULL;
12109
12110         if (!mtb)
12111                 return 0;
12112         if (attr->egress)
12113                 flow_dv_destroy_domain_policer_rule(&mtb->egress);
12114         if (attr->ingress)
12115                 flow_dv_destroy_domain_policer_rule(&mtb->ingress);
12116         if (attr->transfer)
12117                 flow_dv_destroy_domain_policer_rule(&mtb->transfer);
12118         return 0;
12119 }
12120
12121 /**
12122  * Create specify domain meter policer rule.
12123  *
12124  * @param[in] fm
12125  *   Pointer to flow meter structure.
12126  * @param[in] mtb
12127  *   Pointer to DV meter table set.
12128  * @param[in] mtr_reg_c
12129  *   Color match REG_C.
12130  *
12131  * @return
12132  *   0 on success, -1 otherwise.
12133  */
12134 static int
12135 flow_dv_create_policer_forward_rule(struct mlx5_flow_meter *fm,
12136                                     struct mlx5_meter_domain_info *dtb,
12137                                     uint8_t mtr_reg_c)
12138 {
12139         struct mlx5_flow_dv_match_params matcher = {
12140                 .size = sizeof(matcher.buf),
12141         };
12142         struct mlx5_flow_dv_match_params value = {
12143                 .size = sizeof(value.buf),
12144         };
12145         struct mlx5_meter_domains_infos *mtb = fm->mfts;
12146         void *actions[METER_ACTIONS];
12147         int i;
12148         int ret = 0;
12149
12150         /* Create jump action. */
12151         if (!dtb->jump_actn)
12152                 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
12153                                 (dtb->sfx_tbl->obj, &dtb->jump_actn);
12154         if (ret) {
12155                 DRV_LOG(ERR, "Failed to create policer jump action.");
12156                 goto error;
12157         }
12158         for (i = 0; i < RTE_MTR_DROPPED; i++) {
12159                 int j = 0;
12160
12161                 flow_dv_match_meta_reg(matcher.buf, value.buf, mtr_reg_c,
12162                                        rte_col_2_mlx5_col(i), UINT8_MAX);
12163                 if (mtb->count_actns[i])
12164                         actions[j++] = mtb->count_actns[i];
12165                 if (fm->action[i] == MTR_POLICER_ACTION_DROP)
12166                         actions[j++] = mtb->drop_actn;
12167                 else
12168                         actions[j++] = dtb->jump_actn;
12169                 ret = mlx5_flow_os_create_flow(dtb->color_matcher,
12170                                                (void *)&value, j, actions,
12171                                                &dtb->policer_rules[i]);
12172                 if (ret) {
12173                         DRV_LOG(ERR, "Failed to create policer rule.");
12174                         goto error;
12175                 }
12176         }
12177         return 0;
12178 error:
12179         rte_errno = errno;
12180         return -1;
12181 }
12182
12183 /**
12184  * Create policer rules.
12185  *
12186  * @param[in] dev
12187  *   Pointer to Ethernet device.
12188  * @param[in] fm
12189  *   Pointer to flow meter structure.
12190  * @param[in] attr
12191  *   Pointer to flow attributes.
12192  *
12193  * @return
12194  *   0 on success, -1 otherwise.
12195  */
12196 static int
12197 flow_dv_create_policer_rules(struct rte_eth_dev *dev,
12198                              struct mlx5_flow_meter *fm,
12199                              const struct rte_flow_attr *attr)
12200 {
12201         struct mlx5_priv *priv = dev->data->dev_private;
12202         struct mlx5_meter_domains_infos *mtb = fm->mfts;
12203         int ret;
12204
12205         if (attr->egress) {
12206                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->egress,
12207                                                 priv->mtr_color_reg);
12208                 if (ret) {
12209                         DRV_LOG(ERR, "Failed to create egress policer.");
12210                         goto error;
12211                 }
12212         }
12213         if (attr->ingress) {
12214                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->ingress,
12215                                                 priv->mtr_color_reg);
12216                 if (ret) {
12217                         DRV_LOG(ERR, "Failed to create ingress policer.");
12218                         goto error;
12219                 }
12220         }
12221         if (attr->transfer) {
12222                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->transfer,
12223                                                 priv->mtr_color_reg);
12224                 if (ret) {
12225                         DRV_LOG(ERR, "Failed to create transfer policer.");
12226                         goto error;
12227                 }
12228         }
12229         return 0;
12230 error:
12231         flow_dv_destroy_policer_rules(dev, fm, attr);
12232         return -1;
12233 }
12234
12235 /**
12236  * Validate the batch counter support in root table.
12237  *
12238  * Create a simple flow with invalid counter and drop action on root table to
12239  * validate if batch counter with offset on root table is supported or not.
12240  *
12241  * @param[in] dev
12242  *   Pointer to rte_eth_dev structure.
12243  *
12244  * @return
12245  *   0 on success, a negative errno value otherwise and rte_errno is set.
12246  */
12247 int
12248 mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)
12249 {
12250         struct mlx5_priv *priv = dev->data->dev_private;
12251         struct mlx5_dev_ctx_shared *sh = priv->sh;
12252         struct mlx5_flow_dv_match_params mask = {
12253                 .size = sizeof(mask.buf),
12254         };
12255         struct mlx5_flow_dv_match_params value = {
12256                 .size = sizeof(value.buf),
12257         };
12258         struct mlx5dv_flow_matcher_attr dv_attr = {
12259                 .type = IBV_FLOW_ATTR_NORMAL,
12260                 .priority = 0,
12261                 .match_criteria_enable = 0,
12262                 .match_mask = (void *)&mask,
12263         };
12264         void *actions[2] = { 0 };
12265         struct mlx5_flow_tbl_resource *tbl = NULL, *dest_tbl = NULL;
12266         struct mlx5_devx_obj *dcs = NULL;
12267         void *matcher = NULL;
12268         void *flow = NULL;
12269         int i, ret = -1;
12270
12271         tbl = flow_dv_tbl_resource_get(dev, 0, 0, 0, false, NULL, 0, 0, NULL);
12272         if (!tbl)
12273                 goto err;
12274         dest_tbl = flow_dv_tbl_resource_get(dev, 1, 0, 0, false,
12275                                             NULL, 0, 0, NULL);
12276         if (!dest_tbl)
12277                 goto err;
12278         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
12279         if (!dcs)
12280                 goto err;
12281         ret = mlx5_flow_os_create_flow_action_count(dcs->obj, UINT16_MAX,
12282                                                     &actions[0]);
12283         if (ret)
12284                 goto err;
12285         ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
12286                                 (dest_tbl->obj, &actions[1]);
12287         if (ret)
12288                 goto err;
12289         dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
12290         ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj,
12291                                                &matcher);
12292         if (ret)
12293                 goto err;
12294         ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 2,
12295                                        actions, &flow);
12296 err:
12297         /*
12298          * If batch counter with offset is not supported, the driver will not
12299          * validate the invalid offset value, flow create should success.
12300          * In this case, it means batch counter is not supported in root table.
12301          *
12302          * Otherwise, if flow create is failed, counter offset is supported.
12303          */
12304         if (flow) {
12305                 DRV_LOG(INFO, "Batch counter is not supported in root "
12306                               "table. Switch to fallback mode.");
12307                 rte_errno = ENOTSUP;
12308                 ret = -rte_errno;
12309                 claim_zero(mlx5_flow_os_destroy_flow(flow));
12310         } else {
12311                 /* Check matcher to make sure validate fail at flow create. */
12312                 if (!matcher || (matcher && errno != EINVAL))
12313                         DRV_LOG(ERR, "Unexpected error in counter offset "
12314                                      "support detection");
12315                 ret = 0;
12316         }
12317         for (i = 0; i < 2; i++) {
12318                 if (actions[i])
12319                         claim_zero(mlx5_flow_os_destroy_flow_action
12320                                    (actions[i]));
12321         }
12322         if (matcher)
12323                 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
12324         if (tbl)
12325                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
12326         if (dest_tbl)
12327                 flow_dv_tbl_resource_release(MLX5_SH(dev), dest_tbl);
12328         if (dcs)
12329                 claim_zero(mlx5_devx_cmd_destroy(dcs));
12330         return ret;
12331 }
12332
12333 /**
12334  * Query a devx counter.
12335  *
12336  * @param[in] dev
12337  *   Pointer to the Ethernet device structure.
12338  * @param[in] cnt
12339  *   Index to the flow counter.
12340  * @param[in] clear
12341  *   Set to clear the counter statistics.
12342  * @param[out] pkts
12343  *   The statistics value of packets.
12344  * @param[out] bytes
12345  *   The statistics value of bytes.
12346  *
12347  * @return
12348  *   0 on success, otherwise return -1.
12349  */
12350 static int
12351 flow_dv_counter_query(struct rte_eth_dev *dev, uint32_t counter, bool clear,
12352                       uint64_t *pkts, uint64_t *bytes)
12353 {
12354         struct mlx5_priv *priv = dev->data->dev_private;
12355         struct mlx5_flow_counter *cnt;
12356         uint64_t inn_pkts, inn_bytes;
12357         int ret;
12358
12359         if (!priv->config.devx)
12360                 return -1;
12361
12362         ret = _flow_dv_query_count(dev, counter, &inn_pkts, &inn_bytes);
12363         if (ret)
12364                 return -1;
12365         cnt = flow_dv_counter_get_by_idx(dev, counter, NULL);
12366         *pkts = inn_pkts - cnt->hits;
12367         *bytes = inn_bytes - cnt->bytes;
12368         if (clear) {
12369                 cnt->hits = inn_pkts;
12370                 cnt->bytes = inn_bytes;
12371         }
12372         return 0;
12373 }
12374
12375 /**
12376  * Get aged-out flows.
12377  *
12378  * @param[in] dev
12379  *   Pointer to the Ethernet device structure.
12380  * @param[in] context
12381  *   The address of an array of pointers to the aged-out flows contexts.
12382  * @param[in] nb_contexts
12383  *   The length of context array pointers.
12384  * @param[out] error
12385  *   Perform verbose error reporting if not NULL. Initialized in case of
12386  *   error only.
12387  *
12388  * @return
12389  *   how many contexts get in success, otherwise negative errno value.
12390  *   if nb_contexts is 0, return the amount of all aged contexts.
12391  *   if nb_contexts is not 0 , return the amount of aged flows reported
12392  *   in the context array.
12393  * @note: only stub for now
12394  */
12395 static int
12396 flow_get_aged_flows(struct rte_eth_dev *dev,
12397                     void **context,
12398                     uint32_t nb_contexts,
12399                     struct rte_flow_error *error)
12400 {
12401         struct mlx5_priv *priv = dev->data->dev_private;
12402         struct mlx5_age_info *age_info;
12403         struct mlx5_age_param *age_param;
12404         struct mlx5_flow_counter *counter;
12405         struct mlx5_aso_age_action *act;
12406         int nb_flows = 0;
12407
12408         if (nb_contexts && !context)
12409                 return rte_flow_error_set(error, EINVAL,
12410                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12411                                           NULL, "empty context");
12412         age_info = GET_PORT_AGE_INFO(priv);
12413         rte_spinlock_lock(&age_info->aged_sl);
12414         LIST_FOREACH(act, &age_info->aged_aso, next) {
12415                 nb_flows++;
12416                 if (nb_contexts) {
12417                         context[nb_flows - 1] =
12418                                                 act->age_params.context;
12419                         if (!(--nb_contexts))
12420                                 break;
12421                 }
12422         }
12423         TAILQ_FOREACH(counter, &age_info->aged_counters, next) {
12424                 nb_flows++;
12425                 if (nb_contexts) {
12426                         age_param = MLX5_CNT_TO_AGE(counter);
12427                         context[nb_flows - 1] = age_param->context;
12428                         if (!(--nb_contexts))
12429                                 break;
12430                 }
12431         }
12432         rte_spinlock_unlock(&age_info->aged_sl);
12433         MLX5_AGE_SET(age_info, MLX5_AGE_TRIGGER);
12434         return nb_flows;
12435 }
12436
12437 /*
12438  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
12439  */
12440 static uint32_t
12441 flow_dv_counter_allocate(struct rte_eth_dev *dev)
12442 {
12443         return flow_dv_counter_alloc(dev, 0);
12444 }
12445
12446 /**
12447  * Validate shared action.
12448  * Dispatcher for action type specific validation.
12449  *
12450  * @param[in] dev
12451  *   Pointer to the Ethernet device structure.
12452  * @param[in] conf
12453  *   Shared action configuration.
12454  * @param[in] action
12455  *   The shared action object to validate.
12456  * @param[out] error
12457  *   Perform verbose error reporting if not NULL. Initialized in case of
12458  *   error only.
12459  *
12460  * @return
12461  *   0 on success, otherwise negative errno value.
12462  */
12463 static int
12464 flow_dv_action_validate(struct rte_eth_dev *dev,
12465                         const struct rte_flow_shared_action_conf *conf,
12466                         const struct rte_flow_action *action,
12467                         struct rte_flow_error *err)
12468 {
12469         struct mlx5_priv *priv = dev->data->dev_private;
12470
12471         RTE_SET_USED(conf);
12472         switch (action->type) {
12473         case RTE_FLOW_ACTION_TYPE_RSS:
12474                 return mlx5_validate_action_rss(dev, action, err);
12475         case RTE_FLOW_ACTION_TYPE_AGE:
12476                 if (!priv->sh->aso_age_mng)
12477                         return rte_flow_error_set(err, ENOTSUP,
12478                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12479                                                 NULL,
12480                                              "shared age action not supported");
12481                 return flow_dv_validate_action_age(0, action, dev, err);
12482         default:
12483                 return rte_flow_error_set(err, ENOTSUP,
12484                                           RTE_FLOW_ERROR_TYPE_ACTION,
12485                                           NULL,
12486                                           "action type not supported");
12487         }
12488 }
12489
12490 static int
12491 flow_dv_sync_domain(struct rte_eth_dev *dev, uint32_t domains, uint32_t flags)
12492 {
12493         struct mlx5_priv *priv = dev->data->dev_private;
12494         int ret = 0;
12495
12496         if ((domains & MLX5_DOMAIN_BIT_NIC_RX) && priv->sh->rx_domain != NULL) {
12497                 ret = mlx5_glue->dr_sync_domain(priv->sh->rx_domain,
12498                                                 flags);
12499                 if (ret != 0)
12500                         return ret;
12501         }
12502         if ((domains & MLX5_DOMAIN_BIT_NIC_TX) && priv->sh->tx_domain != NULL) {
12503                 ret = mlx5_glue->dr_sync_domain(priv->sh->tx_domain, flags);
12504                 if (ret != 0)
12505                         return ret;
12506         }
12507         if ((domains & MLX5_DOMAIN_BIT_FDB) && priv->sh->fdb_domain != NULL) {
12508                 ret = mlx5_glue->dr_sync_domain(priv->sh->fdb_domain, flags);
12509                 if (ret != 0)
12510                         return ret;
12511         }
12512         return 0;
12513 }
12514
12515 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
12516         .validate = flow_dv_validate,
12517         .prepare = flow_dv_prepare,
12518         .translate = flow_dv_translate,
12519         .apply = flow_dv_apply,
12520         .remove = flow_dv_remove,
12521         .destroy = flow_dv_destroy,
12522         .query = flow_dv_query,
12523         .create_mtr_tbls = flow_dv_create_mtr_tbl,
12524         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbl,
12525         .create_policer_rules = flow_dv_create_policer_rules,
12526         .destroy_policer_rules = flow_dv_destroy_policer_rules,
12527         .counter_alloc = flow_dv_counter_allocate,
12528         .counter_free = flow_dv_counter_free,
12529         .counter_query = flow_dv_counter_query,
12530         .get_aged_flows = flow_get_aged_flows,
12531         .action_validate = flow_dv_action_validate,
12532         .action_create = flow_dv_action_create,
12533         .action_destroy = flow_dv_action_destroy,
12534         .action_update = flow_dv_action_update,
12535         .action_query = flow_dv_action_query,
12536         .sync_domain = flow_dv_sync_domain,
12537 };
12538
12539 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
12540