drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 #include <rte_common.h>
  12 #include <rte_ether.h>
  13 #include <ethdev_driver.h>
  14 #include <rte_flow.h>
  15 #include <rte_flow_driver.h>
  16 #include <rte_malloc.h>
  17 #include <rte_cycles.h>
  18 #include <rte_ip.h>
  19 #include <rte_gre.h>
  20 #include <rte_vxlan.h>
  21 #include <rte_gtp.h>
  22 #include <rte_eal_paging.h>
  23 #include <rte_mpls.h>
  24 #include <rte_mtr.h>
  25 #include <rte_mtr_driver.h>
  26
  27 #include <mlx5_glue.h>
  28 #include <mlx5_devx_cmds.h>
  29 #include <mlx5_prm.h>
  30 #include <mlx5_malloc.h>
  31
  32 #include "mlx5_defs.h"
  33 #include "mlx5.h"
  34 #include "mlx5_common_os.h"
  35 #include "mlx5_flow.h"
  36 #include "mlx5_flow_os.h"
  37 #include "mlx5_rx.h"
  38 #include "mlx5_tx.h"
  39 #include "rte_pmd_mlx5.h"
  40
  41 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  42
  43 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  44 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  45 #endif
  46
  47 #ifndef HAVE_MLX5DV_DR_ESWITCH
  48 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  49 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  50 #endif
  51 #endif
  52
  53 #ifndef HAVE_MLX5DV_DR
  54 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  55 #endif
  56
  57 /* VLAN header definitions */
  58 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  59 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  60 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  61 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  62 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  63
  64 union flow_dv_attr {
  65         struct {
  66                 uint32_t valid:1;
  67                 uint32_t ipv4:1;
  68                 uint32_t ipv6:1;
  69                 uint32_t tcp:1;
  70                 uint32_t udp:1;
  71                 uint32_t reserved:27;
  72         };
  73         uint32_t attr;
  74 };
  75
  76 static int
  77 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
  78                              struct mlx5_flow_tbl_resource *tbl);
  79
  80 static int
  81 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
  82                                      uint32_t encap_decap_idx);
  83
  84 static int
  85 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
  86                                         uint32_t port_id);
  87 static void
  88 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss);
  89
  90 static int
  91 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
  92                                   uint32_t rix_jump);
  93
  94 /**
  95  * Initialize flow attributes structure according to flow items' types.
  96  *
  97  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
  98  * mode. For tunnel mode, the items to be modified are the outermost ones.
  99  *
 100  * @param[in] item
 101  *   Pointer to item specification.
 102  * @param[out] attr
 103  *   Pointer to flow attributes structure.
 104  * @param[in] dev_flow
 105  *   Pointer to the sub flow.
 106  * @param[in] tunnel_decap
 107  *   Whether action is after tunnel decapsulation.
 108  */
 109 static void
 110 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
 111                   struct mlx5_flow *dev_flow, bool tunnel_decap)
 112 {
 113         uint64_t layers = dev_flow->handle->layers;
 114
 115         /*
 116          * If layers is already initialized, it means this dev_flow is the
 117          * suffix flow, the layers flags is set by the prefix flow. Need to
 118          * use the layer flags from prefix flow as the suffix flow may not
 119          * have the user defined items as the flow is split.
 120          */
 121         if (layers) {
 122                 if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
 123                         attr->ipv4 = 1;
 124                 else if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
 125                         attr->ipv6 = 1;
 126                 if (layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
 127                         attr->tcp = 1;
 128                 else if (layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
 129                         attr->udp = 1;
 130                 attr->valid = 1;
 131                 return;
 132         }
 133         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 134                 uint8_t next_protocol = 0xff;
 135                 switch (item->type) {
 136                 case RTE_FLOW_ITEM_TYPE_GRE:
 137                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 138                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 139                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 140                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 141                 case RTE_FLOW_ITEM_TYPE_MPLS:
 142                         if (tunnel_decap)
 143                                 attr->attr = 0;
 144                         break;
 145                 case RTE_FLOW_ITEM_TYPE_IPV4:
 146                         if (!attr->ipv6)
 147                                 attr->ipv4 = 1;
 148                         if (item->mask != NULL &&
 149                             ((const struct rte_flow_item_ipv4 *)
 150                             item->mask)->hdr.next_proto_id)
 151                                 next_protocol =
 152                                     ((const struct rte_flow_item_ipv4 *)
 153                                       (item->spec))->hdr.next_proto_id &
 154                                     ((const struct rte_flow_item_ipv4 *)
 155                                       (item->mask))->hdr.next_proto_id;
 156                         if ((next_protocol == IPPROTO_IPIP ||
 157                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 158                                 attr->attr = 0;
 159                         break;
 160                 case RTE_FLOW_ITEM_TYPE_IPV6:
 161                         if (!attr->ipv4)
 162                                 attr->ipv6 = 1;
 163                         if (item->mask != NULL &&
 164                             ((const struct rte_flow_item_ipv6 *)
 165                             item->mask)->hdr.proto)
 166                                 next_protocol =
 167                                     ((const struct rte_flow_item_ipv6 *)
 168                                       (item->spec))->hdr.proto &
 169                                     ((const struct rte_flow_item_ipv6 *)
 170                                       (item->mask))->hdr.proto;
 171                         if ((next_protocol == IPPROTO_IPIP ||
 172                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 173                                 attr->attr = 0;
 174                         break;
 175                 case RTE_FLOW_ITEM_TYPE_UDP:
 176                         if (!attr->tcp)
 177                                 attr->udp = 1;
 178                         break;
 179                 case RTE_FLOW_ITEM_TYPE_TCP:
 180                         if (!attr->udp)
 181                                 attr->tcp = 1;
 182                         break;
 183                 default:
 184                         break;
 185                 }
 186         }
 187         attr->valid = 1;
 188 }
 189
 190 /**
 191  * Convert rte_mtr_color to mlx5 color.
 192  *
 193  * @param[in] rcol
 194  *   rte_mtr_color.
 195  *
 196  * @return
 197  *   mlx5 color.
 198  */
 199 static int
 200 rte_col_2_mlx5_col(enum rte_color rcol)
 201 {
 202         switch (rcol) {
 203         case RTE_COLOR_GREEN:
 204                 return MLX5_FLOW_COLOR_GREEN;
 205         case RTE_COLOR_YELLOW:
 206                 return MLX5_FLOW_COLOR_YELLOW;
 207         case RTE_COLOR_RED:
 208                 return MLX5_FLOW_COLOR_RED;
 209         default:
 210                 break;
 211         }
 212         return MLX5_FLOW_COLOR_UNDEFINED;
 213 }
 214
 215 struct field_modify_info {
 216         uint32_t size; /* Size of field in protocol header, in bytes. */
 217         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 218         enum mlx5_modification_field id;
 219 };
 220
 221 struct field_modify_info modify_eth[] = {
 222         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 223         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 224         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 225         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 226         {0, 0, 0},
 227 };
 228
 229 struct field_modify_info modify_vlan_out_first_vid[] = {
 230         /* Size in bits !!! */
 231         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 232         {0, 0, 0},
 233 };
 234
 235 struct field_modify_info modify_ipv4[] = {
 236         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 237         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 238         {4, 12, MLX5_MODI_OUT_SIPV4},
 239         {4, 16, MLX5_MODI_OUT_DIPV4},
 240         {0, 0, 0},
 241 };
 242
 243 struct field_modify_info modify_ipv6[] = {
 244         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 245         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 246         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 247         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 248         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 249         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 250         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 251         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 252         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 253         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 254         {0, 0, 0},
 255 };
 256
 257 struct field_modify_info modify_udp[] = {
 258         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 259         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 260         {0, 0, 0},
 261 };
 262
 263 struct field_modify_info modify_tcp[] = {
 264         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 265         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 266         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 267         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 268         {0, 0, 0},
 269 };
 270
 271 static const struct rte_flow_item *
 272 mlx5_flow_find_tunnel_item(const struct rte_flow_item *item)
 273 {
 274         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 275                 switch (item->type) {
 276                 default:
 277                         break;
 278                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 279                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 280                 case RTE_FLOW_ITEM_TYPE_GRE:
 281                 case RTE_FLOW_ITEM_TYPE_MPLS:
 282                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 283                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 284                         return item;
 285                 case RTE_FLOW_ITEM_TYPE_IPV4:
 286                 case RTE_FLOW_ITEM_TYPE_IPV6:
 287                         if (item[1].type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 288                             item[1].type == RTE_FLOW_ITEM_TYPE_IPV6)
 289                                 return item;
 290                         break;
 291                 }
 292         }
 293         return NULL;
 294 }
 295
 296 static void
 297 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 298                           uint8_t next_protocol, uint64_t *item_flags,
 299                           int *tunnel)
 300 {
 301         MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 302                     item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 303         if (next_protocol == IPPROTO_IPIP) {
 304                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 305                 *tunnel = 1;
 306         }
 307         if (next_protocol == IPPROTO_IPV6) {
 308                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 309                 *tunnel = 1;
 310         }
 311 }
 312
 313 /* Update VLAN's VID/PCP based on input rte_flow_action.
 314  *
 315  * @param[in] action
 316  *   Pointer to struct rte_flow_action.
 317  * @param[out] vlan
 318  *   Pointer to struct rte_vlan_hdr.
 319  */
 320 static void
 321 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 322                          struct rte_vlan_hdr *vlan)
 323 {
 324         uint16_t vlan_tci;
 325         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 326                 vlan_tci =
 327                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 328                                                action->conf)->vlan_pcp;
 329                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 330                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 331                 vlan->vlan_tci |= vlan_tci;
 332         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 333                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 334                 vlan->vlan_tci |= rte_be_to_cpu_16
 335                     (((const struct rte_flow_action_of_set_vlan_vid *)
 336                                              action->conf)->vlan_vid);
 337         }
 338 }
 339
 340 /**
 341  * Fetch 1, 2, 3 or 4 byte field from the byte array
 342  * and return as unsigned integer in host-endian format.
 343  *
 344  * @param[in] data
 345  *   Pointer to data array.
 346  * @param[in] size
 347  *   Size of field to extract.
 348  *
 349  * @return
 350  *   converted field in host endian format.
 351  */
 352 static inline uint32_t
 353 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 354 {
 355         uint32_t ret;
 356
 357         switch (size) {
 358         case 1:
 359                 ret = *data;
 360                 break;
 361         case 2:
 362                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 363                 break;
 364         case 3:
 365                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 366                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 367                 break;
 368         case 4:
 369                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 370                 break;
 371         default:
 372                 MLX5_ASSERT(false);
 373                 ret = 0;
 374                 break;
 375         }
 376         return ret;
 377 }
 378
 379 /**
 380  * Convert modify-header action to DV specification.
 381  *
 382  * Data length of each action is determined by provided field description
 383  * and the item mask. Data bit offset and width of each action is determined
 384  * by provided item mask.
 385  *
 386  * @param[in] item
 387  *   Pointer to item specification.
 388  * @param[in] field
 389  *   Pointer to field modification information.
 390  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 391  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 392  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 393  * @param[in] dcopy
 394  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 395  *   Negative offset value sets the same offset as source offset.
 396  *   size field is ignored, value is taken from source field.
 397  * @param[in,out] resource
 398  *   Pointer to the modify-header resource.
 399  * @param[in] type
 400  *   Type of modification.
 401  * @param[out] error
 402  *   Pointer to the error structure.
 403  *
 404  * @return
 405  *   0 on success, a negative errno value otherwise and rte_errno is set.
 406  */
 407 static int
 408 flow_dv_convert_modify_action(struct rte_flow_item *item,
 409                               struct field_modify_info *field,
 410                               struct field_modify_info *dcopy,
 411                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 412                               uint32_t type, struct rte_flow_error *error)
 413 {
 414         uint32_t i = resource->actions_num;
 415         struct mlx5_modification_cmd *actions = resource->actions;
 416
 417         /*
 418          * The item and mask are provided in big-endian format.
 419          * The fields should be presented as in big-endian format either.
 420          * Mask must be always present, it defines the actual field width.
 421          */
 422         MLX5_ASSERT(item->mask);
 423         MLX5_ASSERT(field->size);
 424         do {
 425                 unsigned int size_b;
 426                 unsigned int off_b;
 427                 uint32_t mask;
 428                 uint32_t data;
 429
 430                 if (i >= MLX5_MAX_MODIFY_NUM)
 431                         return rte_flow_error_set(error, EINVAL,
 432                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 433                                  "too many items to modify");
 434                 /* Fetch variable byte size mask from the array. */
 435                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 436                                            field->offset, field->size);
 437                 if (!mask) {
 438                         ++field;
 439                         continue;
 440                 }
 441                 /* Deduce actual data width in bits from mask value. */
 442                 off_b = rte_bsf32(mask);
 443                 size_b = sizeof(uint32_t) * CHAR_BIT -
 444                          off_b - __builtin_clz(mask);
 445                 MLX5_ASSERT(size_b);
 446                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 447                 actions[i] = (struct mlx5_modification_cmd) {
 448                         .action_type = type,
 449                         .field = field->id,
 450                         .offset = off_b,
 451                         .length = size_b,
 452                 };
 453                 /* Convert entire record to expected big-endian format. */
 454                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 455                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 456                         MLX5_ASSERT(dcopy);
 457                         actions[i].dst_field = dcopy->id;
 458                         actions[i].dst_offset =
 459                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 460                         /* Convert entire record to big-endian format. */
 461                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 462                         ++dcopy;
 463                 } else {
 464                         MLX5_ASSERT(item->spec);
 465                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 466                                                    field->offset, field->size);
 467                         /* Shift out the trailing masked bits from data. */
 468                         data = (data & mask) >> off_b;
 469                         actions[i].data1 = rte_cpu_to_be_32(data);
 470                 }
 471                 ++i;
 472                 ++field;
 473         } while (field->size);
 474         if (resource->actions_num == i)
 475                 return rte_flow_error_set(error, EINVAL,
 476                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 477                                           "invalid modification flow item");
 478         resource->actions_num = i;
 479         return 0;
 480 }
 481
 482 /**
 483  * Convert modify-header set IPv4 address action to DV specification.
 484  *
 485  * @param[in,out] resource
 486  *   Pointer to the modify-header resource.
 487  * @param[in] action
 488  *   Pointer to action specification.
 489  * @param[out] error
 490  *   Pointer to the error structure.
 491  *
 492  * @return
 493  *   0 on success, a negative errno value otherwise and rte_errno is set.
 494  */
 495 static int
 496 flow_dv_convert_action_modify_ipv4
 497                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 498                          const struct rte_flow_action *action,
 499                          struct rte_flow_error *error)
 500 {
 501         const struct rte_flow_action_set_ipv4 *conf =
 502                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 503         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 504         struct rte_flow_item_ipv4 ipv4;
 505         struct rte_flow_item_ipv4 ipv4_mask;
 506
 507         memset(&ipv4, 0, sizeof(ipv4));
 508         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 509         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 510                 ipv4.hdr.src_addr = conf->ipv4_addr;
 511                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 512         } else {
 513                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 514                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 515         }
 516         item.spec = &ipv4;
 517         item.mask = &ipv4_mask;
 518         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 519                                              MLX5_MODIFICATION_TYPE_SET, error);
 520 }
 521
 522 /**
 523  * Convert modify-header set IPv6 address action to DV specification.
 524  *
 525  * @param[in,out] resource
 526  *   Pointer to the modify-header resource.
 527  * @param[in] action
 528  *   Pointer to action specification.
 529  * @param[out] error
 530  *   Pointer to the error structure.
 531  *
 532  * @return
 533  *   0 on success, a negative errno value otherwise and rte_errno is set.
 534  */
 535 static int
 536 flow_dv_convert_action_modify_ipv6
 537                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 538                          const struct rte_flow_action *action,
 539                          struct rte_flow_error *error)
 540 {
 541         const struct rte_flow_action_set_ipv6 *conf =
 542                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 543         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 544         struct rte_flow_item_ipv6 ipv6;
 545         struct rte_flow_item_ipv6 ipv6_mask;
 546
 547         memset(&ipv6, 0, sizeof(ipv6));
 548         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 549         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 550                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 551                        sizeof(ipv6.hdr.src_addr));
 552                 memcpy(&ipv6_mask.hdr.src_addr,
 553                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 554                        sizeof(ipv6.hdr.src_addr));
 555         } else {
 556                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 557                        sizeof(ipv6.hdr.dst_addr));
 558                 memcpy(&ipv6_mask.hdr.dst_addr,
 559                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 560                        sizeof(ipv6.hdr.dst_addr));
 561         }
 562         item.spec = &ipv6;
 563         item.mask = &ipv6_mask;
 564         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 565                                              MLX5_MODIFICATION_TYPE_SET, error);
 566 }
 567
 568 /**
 569  * Convert modify-header set MAC address action to DV specification.
 570  *
 571  * @param[in,out] resource
 572  *   Pointer to the modify-header resource.
 573  * @param[in] action
 574  *   Pointer to action specification.
 575  * @param[out] error
 576  *   Pointer to the error structure.
 577  *
 578  * @return
 579  *   0 on success, a negative errno value otherwise and rte_errno is set.
 580  */
 581 static int
 582 flow_dv_convert_action_modify_mac
 583                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 584                          const struct rte_flow_action *action,
 585                          struct rte_flow_error *error)
 586 {
 587         const struct rte_flow_action_set_mac *conf =
 588                 (const struct rte_flow_action_set_mac *)(action->conf);
 589         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 590         struct rte_flow_item_eth eth;
 591         struct rte_flow_item_eth eth_mask;
 592
 593         memset(&eth, 0, sizeof(eth));
 594         memset(&eth_mask, 0, sizeof(eth_mask));
 595         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 596                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 597                        sizeof(eth.src.addr_bytes));
 598                 memcpy(&eth_mask.src.addr_bytes,
 599                        &rte_flow_item_eth_mask.src.addr_bytes,
 600                        sizeof(eth_mask.src.addr_bytes));
 601         } else {
 602                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 603                        sizeof(eth.dst.addr_bytes));
 604                 memcpy(&eth_mask.dst.addr_bytes,
 605                        &rte_flow_item_eth_mask.dst.addr_bytes,
 606                        sizeof(eth_mask.dst.addr_bytes));
 607         }
 608         item.spec = &eth;
 609         item.mask = &eth_mask;
 610         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 611                                              MLX5_MODIFICATION_TYPE_SET, error);
 612 }
 613
 614 /**
 615  * Convert modify-header set VLAN VID action to DV specification.
 616  *
 617  * @param[in,out] resource
 618  *   Pointer to the modify-header resource.
 619  * @param[in] action
 620  *   Pointer to action specification.
 621  * @param[out] error
 622  *   Pointer to the error structure.
 623  *
 624  * @return
 625  *   0 on success, a negative errno value otherwise and rte_errno is set.
 626  */
 627 static int
 628 flow_dv_convert_action_modify_vlan_vid
 629                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 630                          const struct rte_flow_action *action,
 631                          struct rte_flow_error *error)
 632 {
 633         const struct rte_flow_action_of_set_vlan_vid *conf =
 634                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 635         int i = resource->actions_num;
 636         struct mlx5_modification_cmd *actions = resource->actions;
 637         struct field_modify_info *field = modify_vlan_out_first_vid;
 638
 639         if (i >= MLX5_MAX_MODIFY_NUM)
 640                 return rte_flow_error_set(error, EINVAL,
 641                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 642                          "too many items to modify");
 643         actions[i] = (struct mlx5_modification_cmd) {
 644                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 645                 .field = field->id,
 646                 .length = field->size,
 647                 .offset = field->offset,
 648         };
 649         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 650         actions[i].data1 = conf->vlan_vid;
 651         actions[i].data1 = actions[i].data1 << 16;
 652         resource->actions_num = ++i;
 653         return 0;
 654 }
 655
 656 /**
 657  * Convert modify-header set TP action to DV specification.
 658  *
 659  * @param[in,out] resource
 660  *   Pointer to the modify-header resource.
 661  * @param[in] action
 662  *   Pointer to action specification.
 663  * @param[in] items
 664  *   Pointer to rte_flow_item objects list.
 665  * @param[in] attr
 666  *   Pointer to flow attributes structure.
 667  * @param[in] dev_flow
 668  *   Pointer to the sub flow.
 669  * @param[in] tunnel_decap
 670  *   Whether action is after tunnel decapsulation.
 671  * @param[out] error
 672  *   Pointer to the error structure.
 673  *
 674  * @return
 675  *   0 on success, a negative errno value otherwise and rte_errno is set.
 676  */
 677 static int
 678 flow_dv_convert_action_modify_tp
 679                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 680                          const struct rte_flow_action *action,
 681                          const struct rte_flow_item *items,
 682                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 683                          bool tunnel_decap, struct rte_flow_error *error)
 684 {
 685         const struct rte_flow_action_set_tp *conf =
 686                 (const struct rte_flow_action_set_tp *)(action->conf);
 687         struct rte_flow_item item;
 688         struct rte_flow_item_udp udp;
 689         struct rte_flow_item_udp udp_mask;
 690         struct rte_flow_item_tcp tcp;
 691         struct rte_flow_item_tcp tcp_mask;
 692         struct field_modify_info *field;
 693
 694         if (!attr->valid)
 695                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 696         if (attr->udp) {
 697                 memset(&udp, 0, sizeof(udp));
 698                 memset(&udp_mask, 0, sizeof(udp_mask));
 699                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 700                         udp.hdr.src_port = conf->port;
 701                         udp_mask.hdr.src_port =
 702                                         rte_flow_item_udp_mask.hdr.src_port;
 703                 } else {
 704                         udp.hdr.dst_port = conf->port;
 705                         udp_mask.hdr.dst_port =
 706                                         rte_flow_item_udp_mask.hdr.dst_port;
 707                 }
 708                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 709                 item.spec = &udp;
 710                 item.mask = &udp_mask;
 711                 field = modify_udp;
 712         } else {
 713                 MLX5_ASSERT(attr->tcp);
 714                 memset(&tcp, 0, sizeof(tcp));
 715                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 716                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 717                         tcp.hdr.src_port = conf->port;
 718                         tcp_mask.hdr.src_port =
 719                                         rte_flow_item_tcp_mask.hdr.src_port;
 720                 } else {
 721                         tcp.hdr.dst_port = conf->port;
 722                         tcp_mask.hdr.dst_port =
 723                                         rte_flow_item_tcp_mask.hdr.dst_port;
 724                 }
 725                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 726                 item.spec = &tcp;
 727                 item.mask = &tcp_mask;
 728                 field = modify_tcp;
 729         }
 730         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 731                                              MLX5_MODIFICATION_TYPE_SET, error);
 732 }
 733
 734 /**
 735  * Convert modify-header set TTL action to DV specification.
 736  *
 737  * @param[in,out] resource
 738  *   Pointer to the modify-header resource.
 739  * @param[in] action
 740  *   Pointer to action specification.
 741  * @param[in] items
 742  *   Pointer to rte_flow_item objects list.
 743  * @param[in] attr
 744  *   Pointer to flow attributes structure.
 745  * @param[in] dev_flow
 746  *   Pointer to the sub flow.
 747  * @param[in] tunnel_decap
 748  *   Whether action is after tunnel decapsulation.
 749  * @param[out] error
 750  *   Pointer to the error structure.
 751  *
 752  * @return
 753  *   0 on success, a negative errno value otherwise and rte_errno is set.
 754  */
 755 static int
 756 flow_dv_convert_action_modify_ttl
 757                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 758                          const struct rte_flow_action *action,
 759                          const struct rte_flow_item *items,
 760                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 761                          bool tunnel_decap, struct rte_flow_error *error)
 762 {
 763         const struct rte_flow_action_set_ttl *conf =
 764                 (const struct rte_flow_action_set_ttl *)(action->conf);
 765         struct rte_flow_item item;
 766         struct rte_flow_item_ipv4 ipv4;
 767         struct rte_flow_item_ipv4 ipv4_mask;
 768         struct rte_flow_item_ipv6 ipv6;
 769         struct rte_flow_item_ipv6 ipv6_mask;
 770         struct field_modify_info *field;
 771
 772         if (!attr->valid)
 773                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 774         if (attr->ipv4) {
 775                 memset(&ipv4, 0, sizeof(ipv4));
 776                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 777                 ipv4.hdr.time_to_live = conf->ttl_value;
 778                 ipv4_mask.hdr.time_to_live = 0xFF;
 779                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 780                 item.spec = &ipv4;
 781                 item.mask = &ipv4_mask;
 782                 field = modify_ipv4;
 783         } else {
 784                 MLX5_ASSERT(attr->ipv6);
 785                 memset(&ipv6, 0, sizeof(ipv6));
 786                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 787                 ipv6.hdr.hop_limits = conf->ttl_value;
 788                 ipv6_mask.hdr.hop_limits = 0xFF;
 789                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 790                 item.spec = &ipv6;
 791                 item.mask = &ipv6_mask;
 792                 field = modify_ipv6;
 793         }
 794         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 795                                              MLX5_MODIFICATION_TYPE_SET, error);
 796 }
 797
 798 /**
 799  * Convert modify-header decrement TTL action to DV specification.
 800  *
 801  * @param[in,out] resource
 802  *   Pointer to the modify-header resource.
 803  * @param[in] action
 804  *   Pointer to action specification.
 805  * @param[in] items
 806  *   Pointer to rte_flow_item objects list.
 807  * @param[in] attr
 808  *   Pointer to flow attributes structure.
 809  * @param[in] dev_flow
 810  *   Pointer to the sub flow.
 811  * @param[in] tunnel_decap
 812  *   Whether action is after tunnel decapsulation.
 813  * @param[out] error
 814  *   Pointer to the error structure.
 815  *
 816  * @return
 817  *   0 on success, a negative errno value otherwise and rte_errno is set.
 818  */
 819 static int
 820 flow_dv_convert_action_modify_dec_ttl
 821                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 822                          const struct rte_flow_item *items,
 823                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 824                          bool tunnel_decap, struct rte_flow_error *error)
 825 {
 826         struct rte_flow_item item;
 827         struct rte_flow_item_ipv4 ipv4;
 828         struct rte_flow_item_ipv4 ipv4_mask;
 829         struct rte_flow_item_ipv6 ipv6;
 830         struct rte_flow_item_ipv6 ipv6_mask;
 831         struct field_modify_info *field;
 832
 833         if (!attr->valid)
 834                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 835         if (attr->ipv4) {
 836                 memset(&ipv4, 0, sizeof(ipv4));
 837                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 838                 ipv4.hdr.time_to_live = 0xFF;
 839                 ipv4_mask.hdr.time_to_live = 0xFF;
 840                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 841                 item.spec = &ipv4;
 842                 item.mask = &ipv4_mask;
 843                 field = modify_ipv4;
 844         } else {
 845                 MLX5_ASSERT(attr->ipv6);
 846                 memset(&ipv6, 0, sizeof(ipv6));
 847                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 848                 ipv6.hdr.hop_limits = 0xFF;
 849                 ipv6_mask.hdr.hop_limits = 0xFF;
 850                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 851                 item.spec = &ipv6;
 852                 item.mask = &ipv6_mask;
 853                 field = modify_ipv6;
 854         }
 855         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 856                                              MLX5_MODIFICATION_TYPE_ADD, error);
 857 }
 858
 859 /**
 860  * Convert modify-header increment/decrement TCP Sequence number
 861  * to DV specification.
 862  *
 863  * @param[in,out] resource
 864  *   Pointer to the modify-header resource.
 865  * @param[in] action
 866  *   Pointer to action specification.
 867  * @param[out] error
 868  *   Pointer to the error structure.
 869  *
 870  * @return
 871  *   0 on success, a negative errno value otherwise and rte_errno is set.
 872  */
 873 static int
 874 flow_dv_convert_action_modify_tcp_seq
 875                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 876                          const struct rte_flow_action *action,
 877                          struct rte_flow_error *error)
 878 {
 879         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 880         uint64_t value = rte_be_to_cpu_32(*conf);
 881         struct rte_flow_item item;
 882         struct rte_flow_item_tcp tcp;
 883         struct rte_flow_item_tcp tcp_mask;
 884
 885         memset(&tcp, 0, sizeof(tcp));
 886         memset(&tcp_mask, 0, sizeof(tcp_mask));
 887         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 888                 /*
 889                  * The HW has no decrement operation, only increment operation.
 890                  * To simulate decrement X from Y using increment operation
 891                  * we need to add UINT32_MAX X times to Y.
 892                  * Each adding of UINT32_MAX decrements Y by 1.
 893                  */
 894                 value *= UINT32_MAX;
 895         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 896         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 897         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 898         item.spec = &tcp;
 899         item.mask = &tcp_mask;
 900         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 901                                              MLX5_MODIFICATION_TYPE_ADD, error);
 902 }
 903
 904 /**
 905  * Convert modify-header increment/decrement TCP Acknowledgment number
 906  * to DV specification.
 907  *
 908  * @param[in,out] resource
 909  *   Pointer to the modify-header resource.
 910  * @param[in] action
 911  *   Pointer to action specification.
 912  * @param[out] error
 913  *   Pointer to the error structure.
 914  *
 915  * @return
 916  *   0 on success, a negative errno value otherwise and rte_errno is set.
 917  */
 918 static int
 919 flow_dv_convert_action_modify_tcp_ack
 920                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 921                          const struct rte_flow_action *action,
 922                          struct rte_flow_error *error)
 923 {
 924         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 925         uint64_t value = rte_be_to_cpu_32(*conf);
 926         struct rte_flow_item item;
 927         struct rte_flow_item_tcp tcp;
 928         struct rte_flow_item_tcp tcp_mask;
 929
 930         memset(&tcp, 0, sizeof(tcp));
 931         memset(&tcp_mask, 0, sizeof(tcp_mask));
 932         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 933                 /*
 934                  * The HW has no decrement operation, only increment operation.
 935                  * To simulate decrement X from Y using increment operation
 936                  * we need to add UINT32_MAX X times to Y.
 937                  * Each adding of UINT32_MAX decrements Y by 1.
 938                  */
 939                 value *= UINT32_MAX;
 940         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 941         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 942         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 943         item.spec = &tcp;
 944         item.mask = &tcp_mask;
 945         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 946                                              MLX5_MODIFICATION_TYPE_ADD, error);
 947 }
 948
 949 static enum mlx5_modification_field reg_to_field[] = {
 950         [REG_NON] = MLX5_MODI_OUT_NONE,
 951         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 952         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 953         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 954         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 955         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 956         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 957         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 958         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 959         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 960         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 961 };
 962
 963 /**
 964  * Convert register set to DV specification.
 965  *
 966  * @param[in,out] resource
 967  *   Pointer to the modify-header resource.
 968  * @param[in] action
 969  *   Pointer to action specification.
 970  * @param[out] error
 971  *   Pointer to the error structure.
 972  *
 973  * @return
 974  *   0 on success, a negative errno value otherwise and rte_errno is set.
 975  */
 976 static int
 977 flow_dv_convert_action_set_reg
 978                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 979                          const struct rte_flow_action *action,
 980                          struct rte_flow_error *error)
 981 {
 982         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 983         struct mlx5_modification_cmd *actions = resource->actions;
 984         uint32_t i = resource->actions_num;
 985
 986         if (i >= MLX5_MAX_MODIFY_NUM)
 987                 return rte_flow_error_set(error, EINVAL,
 988                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 989                                           "too many items to modify");
 990         MLX5_ASSERT(conf->id != REG_NON);
 991         MLX5_ASSERT(conf->id < (enum modify_reg)RTE_DIM(reg_to_field));
 992         actions[i] = (struct mlx5_modification_cmd) {
 993                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 994                 .field = reg_to_field[conf->id],
 995                 .offset = conf->offset,
 996                 .length = conf->length,
 997         };
 998         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 999         actions[i].data1 = rte_cpu_to_be_32(conf->data);
1000         ++i;
1001         resource->actions_num = i;
1002         return 0;
1003 }
1004
1005 /**
1006  * Convert SET_TAG action to DV specification.
1007  *
1008  * @param[in] dev
1009  *   Pointer to the rte_eth_dev structure.
1010  * @param[in,out] resource
1011  *   Pointer to the modify-header resource.
1012  * @param[in] conf
1013  *   Pointer to action specification.
1014  * @param[out] error
1015  *   Pointer to the error structure.
1016  *
1017  * @return
1018  *   0 on success, a negative errno value otherwise and rte_errno is set.
1019  */
1020 static int
1021 flow_dv_convert_action_set_tag
1022                         (struct rte_eth_dev *dev,
1023                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1024                          const struct rte_flow_action_set_tag *conf,
1025                          struct rte_flow_error *error)
1026 {
1027         rte_be32_t data = rte_cpu_to_be_32(conf->data);
1028         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
1029         struct rte_flow_item item = {
1030                 .spec = &data,
1031                 .mask = &mask,
1032         };
1033         struct field_modify_info reg_c_x[] = {
1034                 [1] = {0, 0, 0},
1035         };
1036         enum mlx5_modification_field reg_type;
1037         int ret;
1038
1039         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1040         if (ret < 0)
1041                 return ret;
1042         MLX5_ASSERT(ret != REG_NON);
1043         MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1044         reg_type = reg_to_field[ret];
1045         MLX5_ASSERT(reg_type > 0);
1046         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1047         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1048                                              MLX5_MODIFICATION_TYPE_SET, error);
1049 }
1050
1051 /**
1052  * Convert internal COPY_REG action to DV specification.
1053  *
1054  * @param[in] dev
1055  *   Pointer to the rte_eth_dev structure.
1056  * @param[in,out] res
1057  *   Pointer to the modify-header resource.
1058  * @param[in] action
1059  *   Pointer to action specification.
1060  * @param[out] error
1061  *   Pointer to the error structure.
1062  *
1063  * @return
1064  *   0 on success, a negative errno value otherwise and rte_errno is set.
1065  */
1066 static int
1067 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1068                                  struct mlx5_flow_dv_modify_hdr_resource *res,
1069                                  const struct rte_flow_action *action,
1070                                  struct rte_flow_error *error)
1071 {
1072         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1073         rte_be32_t mask = RTE_BE32(UINT32_MAX);
1074         struct rte_flow_item item = {
1075                 .spec = NULL,
1076                 .mask = &mask,
1077         };
1078         struct field_modify_info reg_src[] = {
1079                 {4, 0, reg_to_field[conf->src]},
1080                 {0, 0, 0},
1081         };
1082         struct field_modify_info reg_dst = {
1083                 .offset = 0,
1084                 .id = reg_to_field[conf->dst],
1085         };
1086         /* Adjust reg_c[0] usage according to reported mask. */
1087         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1088                 struct mlx5_priv *priv = dev->data->dev_private;
1089                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1090
1091                 MLX5_ASSERT(reg_c0);
1092                 MLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1093                 if (conf->dst == REG_C_0) {
1094                         /* Copy to reg_c[0], within mask only. */
1095                         reg_dst.offset = rte_bsf32(reg_c0);
1096                         /*
1097                          * Mask is ignoring the enianness, because
1098                          * there is no conversion in datapath.
1099                          */
1100 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1101                         /* Copy from destination lower bits to reg_c[0]. */
1102                         mask = reg_c0 >> reg_dst.offset;
1103 #else
1104                         /* Copy from destination upper bits to reg_c[0]. */
1105                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1106                                           rte_fls_u32(reg_c0));
1107 #endif
1108                 } else {
1109                         mask = rte_cpu_to_be_32(reg_c0);
1110 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1111                         /* Copy from reg_c[0] to destination lower bits. */
1112                         reg_dst.offset = 0;
1113 #else
1114                         /* Copy from reg_c[0] to destination upper bits. */
1115                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1116                                          (rte_fls_u32(reg_c0) -
1117                                           rte_bsf32(reg_c0));
1118 #endif
1119                 }
1120         }
1121         return flow_dv_convert_modify_action(&item,
1122                                              reg_src, &reg_dst, res,
1123                                              MLX5_MODIFICATION_TYPE_COPY,
1124                                              error);
1125 }
1126
1127 /**
1128  * Convert MARK action to DV specification. This routine is used
1129  * in extensive metadata only and requires metadata register to be
1130  * handled. In legacy mode hardware tag resource is engaged.
1131  *
1132  * @param[in] dev
1133  *   Pointer to the rte_eth_dev structure.
1134  * @param[in] conf
1135  *   Pointer to MARK action specification.
1136  * @param[in,out] resource
1137  *   Pointer to the modify-header resource.
1138  * @param[out] error
1139  *   Pointer to the error structure.
1140  *
1141  * @return
1142  *   0 on success, a negative errno value otherwise and rte_errno is set.
1143  */
1144 static int
1145 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1146                             const struct rte_flow_action_mark *conf,
1147                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1148                             struct rte_flow_error *error)
1149 {
1150         struct mlx5_priv *priv = dev->data->dev_private;
1151         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1152                                            priv->sh->dv_mark_mask);
1153         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1154         struct rte_flow_item item = {
1155                 .spec = &data,
1156                 .mask = &mask,
1157         };
1158         struct field_modify_info reg_c_x[] = {
1159                 [1] = {0, 0, 0},
1160         };
1161         int reg;
1162
1163         if (!mask)
1164                 return rte_flow_error_set(error, EINVAL,
1165                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1166                                           NULL, "zero mark action mask");
1167         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1168         if (reg < 0)
1169                 return reg;
1170         MLX5_ASSERT(reg > 0);
1171         if (reg == REG_C_0) {
1172                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1173                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1174
1175                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1176                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1177                 mask = rte_cpu_to_be_32(mask << shl_c0);
1178         }
1179         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1180         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1181                                              MLX5_MODIFICATION_TYPE_SET, error);
1182 }
1183
1184 /**
1185  * Get metadata register index for specified steering domain.
1186  *
1187  * @param[in] dev
1188  *   Pointer to the rte_eth_dev structure.
1189  * @param[in] attr
1190  *   Attributes of flow to determine steering domain.
1191  * @param[out] error
1192  *   Pointer to the error structure.
1193  *
1194  * @return
1195  *   positive index on success, a negative errno value otherwise
1196  *   and rte_errno is set.
1197  */
1198 static enum modify_reg
1199 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1200                          const struct rte_flow_attr *attr,
1201                          struct rte_flow_error *error)
1202 {
1203         int reg =
1204                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1205                                           MLX5_METADATA_FDB :
1206                                             attr->egress ?
1207                                             MLX5_METADATA_TX :
1208                                             MLX5_METADATA_RX, 0, error);
1209         if (reg < 0)
1210                 return rte_flow_error_set(error,
1211                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1212                                           NULL, "unavailable "
1213                                           "metadata register");
1214         return reg;
1215 }
1216
1217 /**
1218  * Convert SET_META action to DV specification.
1219  *
1220  * @param[in] dev
1221  *   Pointer to the rte_eth_dev structure.
1222  * @param[in,out] resource
1223  *   Pointer to the modify-header resource.
1224  * @param[in] attr
1225  *   Attributes of flow that includes this item.
1226  * @param[in] conf
1227  *   Pointer to action specification.
1228  * @param[out] error
1229  *   Pointer to the error structure.
1230  *
1231  * @return
1232  *   0 on success, a negative errno value otherwise and rte_errno is set.
1233  */
1234 static int
1235 flow_dv_convert_action_set_meta
1236                         (struct rte_eth_dev *dev,
1237                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1238                          const struct rte_flow_attr *attr,
1239                          const struct rte_flow_action_set_meta *conf,
1240                          struct rte_flow_error *error)
1241 {
1242         uint32_t data = conf->data;
1243         uint32_t mask = conf->mask;
1244         struct rte_flow_item item = {
1245                 .spec = &data,
1246                 .mask = &mask,
1247         };
1248         struct field_modify_info reg_c_x[] = {
1249                 [1] = {0, 0, 0},
1250         };
1251         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1252
1253         if (reg < 0)
1254                 return reg;
1255         MLX5_ASSERT(reg != REG_NON);
1256         /*
1257          * In datapath code there is no endianness
1258          * coversions for perfromance reasons, all
1259          * pattern conversions are done in rte_flow.
1260          */
1261         if (reg == REG_C_0) {
1262                 struct mlx5_priv *priv = dev->data->dev_private;
1263                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1264                 uint32_t shl_c0;
1265
1266                 MLX5_ASSERT(msk_c0);
1267 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1268                 shl_c0 = rte_bsf32(msk_c0);
1269 #else
1270                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1271 #endif
1272                 mask <<= shl_c0;
1273                 data <<= shl_c0;
1274                 MLX5_ASSERT(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1275         }
1276         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1277         /* The routine expects parameters in memory as big-endian ones. */
1278         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1279                                              MLX5_MODIFICATION_TYPE_SET, error);
1280 }
1281
1282 /**
1283  * Convert modify-header set IPv4 DSCP action to DV specification.
1284  *
1285  * @param[in,out] resource
1286  *   Pointer to the modify-header resource.
1287  * @param[in] action
1288  *   Pointer to action specification.
1289  * @param[out] error
1290  *   Pointer to the error structure.
1291  *
1292  * @return
1293  *   0 on success, a negative errno value otherwise and rte_errno is set.
1294  */
1295 static int
1296 flow_dv_convert_action_modify_ipv4_dscp
1297                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1298                          const struct rte_flow_action *action,
1299                          struct rte_flow_error *error)
1300 {
1301         const struct rte_flow_action_set_dscp *conf =
1302                 (const struct rte_flow_action_set_dscp *)(action->conf);
1303         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1304         struct rte_flow_item_ipv4 ipv4;
1305         struct rte_flow_item_ipv4 ipv4_mask;
1306
1307         memset(&ipv4, 0, sizeof(ipv4));
1308         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1309         ipv4.hdr.type_of_service = conf->dscp;
1310         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1311         item.spec = &ipv4;
1312         item.mask = &ipv4_mask;
1313         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1314                                              MLX5_MODIFICATION_TYPE_SET, error);
1315 }
1316
1317 /**
1318  * Convert modify-header set IPv6 DSCP action to DV specification.
1319  *
1320  * @param[in,out] resource
1321  *   Pointer to the modify-header resource.
1322  * @param[in] action
1323  *   Pointer to action specification.
1324  * @param[out] error
1325  *   Pointer to the error structure.
1326  *
1327  * @return
1328  *   0 on success, a negative errno value otherwise and rte_errno is set.
1329  */
1330 static int
1331 flow_dv_convert_action_modify_ipv6_dscp
1332                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1333                          const struct rte_flow_action *action,
1334                          struct rte_flow_error *error)
1335 {
1336         const struct rte_flow_action_set_dscp *conf =
1337                 (const struct rte_flow_action_set_dscp *)(action->conf);
1338         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1339         struct rte_flow_item_ipv6 ipv6;
1340         struct rte_flow_item_ipv6 ipv6_mask;
1341
1342         memset(&ipv6, 0, sizeof(ipv6));
1343         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1344         /*
1345          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1346          * rdma-core only accept the DSCP bits byte aligned start from
1347          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1348          * bits in IPv6 case as rdma-core requires byte aligned value.
1349          */
1350         ipv6.hdr.vtc_flow = conf->dscp;
1351         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1352         item.spec = &ipv6;
1353         item.mask = &ipv6_mask;
1354         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1355                                              MLX5_MODIFICATION_TYPE_SET, error);
1356 }
1357
1358 static int
1359 mlx5_flow_item_field_width(enum rte_flow_field_id field)
1360 {
1361         switch (field) {
1362         case RTE_FLOW_FIELD_START:
1363                 return 32;
1364         case RTE_FLOW_FIELD_MAC_DST:
1365         case RTE_FLOW_FIELD_MAC_SRC:
1366                 return 48;
1367         case RTE_FLOW_FIELD_VLAN_TYPE:
1368                 return 16;
1369         case RTE_FLOW_FIELD_VLAN_ID:
1370                 return 12;
1371         case RTE_FLOW_FIELD_MAC_TYPE:
1372                 return 16;
1373         case RTE_FLOW_FIELD_IPV4_DSCP:
1374                 return 6;
1375         case RTE_FLOW_FIELD_IPV4_TTL:
1376                 return 8;
1377         case RTE_FLOW_FIELD_IPV4_SRC:
1378         case RTE_FLOW_FIELD_IPV4_DST:
1379                 return 32;
1380         case RTE_FLOW_FIELD_IPV6_DSCP:
1381                 return 6;
1382         case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1383                 return 8;
1384         case RTE_FLOW_FIELD_IPV6_SRC:
1385         case RTE_FLOW_FIELD_IPV6_DST:
1386                 return 128;
1387         case RTE_FLOW_FIELD_TCP_PORT_SRC:
1388         case RTE_FLOW_FIELD_TCP_PORT_DST:
1389                 return 16;
1390         case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1391         case RTE_FLOW_FIELD_TCP_ACK_NUM:
1392                 return 32;
1393         case RTE_FLOW_FIELD_TCP_FLAGS:
1394                 return 9;
1395         case RTE_FLOW_FIELD_UDP_PORT_SRC:
1396         case RTE_FLOW_FIELD_UDP_PORT_DST:
1397                 return 16;
1398         case RTE_FLOW_FIELD_VXLAN_VNI:
1399         case RTE_FLOW_FIELD_GENEVE_VNI:
1400                 return 24;
1401         case RTE_FLOW_FIELD_GTP_TEID:
1402         case RTE_FLOW_FIELD_TAG:
1403                 return 32;
1404         case RTE_FLOW_FIELD_MARK:
1405                 return 24;
1406         case RTE_FLOW_FIELD_META:
1407                 return 32;
1408         case RTE_FLOW_FIELD_POINTER:
1409         case RTE_FLOW_FIELD_VALUE:
1410                 return 64;
1411         default:
1412                 MLX5_ASSERT(false);
1413         }
1414         return 0;
1415 }
1416
1417 static void
1418 mlx5_flow_field_id_to_modify_info
1419                 (const struct rte_flow_action_modify_data *data,
1420                  struct field_modify_info *info,
1421                  uint32_t *mask, uint32_t *value,
1422                  uint32_t width, uint32_t dst_width,
1423                  struct rte_eth_dev *dev,
1424                  const struct rte_flow_attr *attr,
1425                  struct rte_flow_error *error)
1426 {
1427         uint32_t idx = 0;
1428         uint64_t val = 0;
1429         switch (data->field) {
1430         case RTE_FLOW_FIELD_START:
1431                 /* not supported yet */
1432                 MLX5_ASSERT(false);
1433                 break;
1434         case RTE_FLOW_FIELD_MAC_DST:
1435                 if (mask) {
1436                         if (data->offset < 32) {
1437                                 info[idx] = (struct field_modify_info){4, 0,
1438                                                 MLX5_MODI_OUT_DMAC_47_16};
1439                                 if (width < 32) {
1440                                         mask[idx] =
1441                                                 rte_cpu_to_be_32(0xffffffff >>
1442                                                                  (32 - width));
1443                                         width = 0;
1444                                 } else {
1445                                         mask[idx] = RTE_BE32(0xffffffff);
1446                                         width -= 32;
1447                                 }
1448                                 if (!width)
1449                                         break;
1450                                 ++idx;
1451                         }
1452                         info[idx] = (struct field_modify_info){2, 4 * idx,
1453                                                 MLX5_MODI_OUT_DMAC_15_0};
1454                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1455                 } else {
1456                         if (data->offset < 32)
1457                                 info[idx++] = (struct field_modify_info){4, 0,
1458                                                 MLX5_MODI_OUT_DMAC_47_16};
1459                         info[idx] = (struct field_modify_info){2, 0,
1460                                                 MLX5_MODI_OUT_DMAC_15_0};
1461                 }
1462                 break;
1463         case RTE_FLOW_FIELD_MAC_SRC:
1464                 if (mask) {
1465                         if (data->offset < 32) {
1466                                 info[idx] = (struct field_modify_info){4, 0,
1467                                                 MLX5_MODI_OUT_SMAC_47_16};
1468                                 if (width < 32) {
1469                                         mask[idx] =
1470                                                 rte_cpu_to_be_32(0xffffffff >>
1471                                                                 (32 - width));
1472                                         width = 0;
1473                                 } else {
1474                                         mask[idx] = RTE_BE32(0xffffffff);
1475                                         width -= 32;
1476                                 }
1477                                 if (!width)
1478                                         break;
1479                                 ++idx;
1480                         }
1481                         info[idx] = (struct field_modify_info){2, 4 * idx,
1482                                                 MLX5_MODI_OUT_SMAC_15_0};
1483                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1484                 } else {
1485                         if (data->offset < 32)
1486                                 info[idx++] = (struct field_modify_info){4, 0,
1487                                                 MLX5_MODI_OUT_SMAC_47_16};
1488                         info[idx] = (struct field_modify_info){2, 0,
1489                                                 MLX5_MODI_OUT_SMAC_15_0};
1490                 }
1491                 break;
1492         case RTE_FLOW_FIELD_VLAN_TYPE:
1493                 /* not supported yet */
1494                 break;
1495         case RTE_FLOW_FIELD_VLAN_ID:
1496                 info[idx] = (struct field_modify_info){2, 0,
1497                                         MLX5_MODI_OUT_FIRST_VID};
1498                 if (mask)
1499                         mask[idx] = rte_cpu_to_be_16(0x0fff >> (12 - width));
1500                 break;
1501         case RTE_FLOW_FIELD_MAC_TYPE:
1502                 info[idx] = (struct field_modify_info){2, 0,
1503                                         MLX5_MODI_OUT_ETHERTYPE};
1504                 if (mask)
1505                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1506                 break;
1507         case RTE_FLOW_FIELD_IPV4_DSCP:
1508                 info[idx] = (struct field_modify_info){1, 0,
1509                                         MLX5_MODI_OUT_IP_DSCP};
1510                 if (mask)
1511                         mask[idx] = 0x3f >> (6 - width);
1512                 break;
1513         case RTE_FLOW_FIELD_IPV4_TTL:
1514                 info[idx] = (struct field_modify_info){1, 0,
1515                                         MLX5_MODI_OUT_IPV4_TTL};
1516                 if (mask)
1517                         mask[idx] = 0xff >> (8 - width);
1518                 break;
1519         case RTE_FLOW_FIELD_IPV4_SRC:
1520                 info[idx] = (struct field_modify_info){4, 0,
1521                                         MLX5_MODI_OUT_SIPV4};
1522                 if (mask)
1523                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1524                                                      (32 - width));
1525                 break;
1526         case RTE_FLOW_FIELD_IPV4_DST:
1527                 info[idx] = (struct field_modify_info){4, 0,
1528                                         MLX5_MODI_OUT_DIPV4};
1529                 if (mask)
1530                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1531                                                      (32 - width));
1532                 break;
1533         case RTE_FLOW_FIELD_IPV6_DSCP:
1534                 info[idx] = (struct field_modify_info){1, 0,
1535                                         MLX5_MODI_OUT_IP_DSCP};
1536                 if (mask)
1537                         mask[idx] = 0x3f >> (6 - width);
1538                 break;
1539         case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1540                 info[idx] = (struct field_modify_info){1, 0,
1541                                         MLX5_MODI_OUT_IPV6_HOPLIMIT};
1542                 if (mask)
1543                         mask[idx] = 0xff >> (8 - width);
1544                 break;
1545         case RTE_FLOW_FIELD_IPV6_SRC:
1546                 if (mask) {
1547                         if (data->offset < 32) {
1548                                 info[idx] = (struct field_modify_info){4,
1549                                                 4 * idx,
1550                                                 MLX5_MODI_OUT_SIPV6_31_0};
1551                                 if (width < 32) {
1552                                         mask[idx] =
1553                                                 rte_cpu_to_be_32(0xffffffff >>
1554                                                                  (32 - width));
1555                                         width = 0;
1556                                 } else {
1557                                         mask[idx] = RTE_BE32(0xffffffff);
1558                                         width -= 32;
1559                                 }
1560                                 if (!width)
1561                                         break;
1562                                 ++idx;
1563                         }
1564                         if (data->offset < 64) {
1565                                 info[idx] = (struct field_modify_info){4,
1566                                                 4 * idx,
1567                                                 MLX5_MODI_OUT_SIPV6_63_32};
1568                                 if (width < 32) {
1569                                         mask[idx] =
1570                                                 rte_cpu_to_be_32(0xffffffff >>
1571                                                                  (32 - width));
1572                                         width = 0;
1573                                 } else {
1574                                         mask[idx] = RTE_BE32(0xffffffff);
1575                                         width -= 32;
1576                                 }
1577                                 if (!width)
1578                                         break;
1579                                 ++idx;
1580                         }
1581                         if (data->offset < 96) {
1582                                 info[idx] = (struct field_modify_info){4,
1583                                                 4 * idx,
1584                                                 MLX5_MODI_OUT_SIPV6_95_64};
1585                                 if (width < 32) {
1586                                         mask[idx] =
1587                                                 rte_cpu_to_be_32(0xffffffff >>
1588                                                                  (32 - width));
1589                                         width = 0;
1590                                 } else {
1591                                         mask[idx] = RTE_BE32(0xffffffff);
1592                                         width -= 32;
1593                                 }
1594                                 if (!width)
1595                                         break;
1596                                 ++idx;
1597                         }
1598                         info[idx] = (struct field_modify_info){4, 4 * idx,
1599                                                 MLX5_MODI_OUT_SIPV6_127_96};
1600                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1601                                                      (32 - width));
1602                 } else {
1603                         if (data->offset < 32)
1604                                 info[idx++] = (struct field_modify_info){4, 0,
1605                                                 MLX5_MODI_OUT_SIPV6_31_0};
1606                         if (data->offset < 64)
1607                                 info[idx++] = (struct field_modify_info){4, 0,
1608                                                 MLX5_MODI_OUT_SIPV6_63_32};
1609                         if (data->offset < 96)
1610                                 info[idx++] = (struct field_modify_info){4, 0,
1611                                                 MLX5_MODI_OUT_SIPV6_95_64};
1612                         if (data->offset < 128)
1613                                 info[idx++] = (struct field_modify_info){4, 0,
1614                                                 MLX5_MODI_OUT_SIPV6_127_96};
1615                 }
1616                 break;
1617         case RTE_FLOW_FIELD_IPV6_DST:
1618                 if (mask) {
1619                         if (data->offset < 32) {
1620                                 info[idx] = (struct field_modify_info){4,
1621                                                 4 * idx,
1622                                                 MLX5_MODI_OUT_DIPV6_31_0};
1623                                 if (width < 32) {
1624                                         mask[idx] =
1625                                                 rte_cpu_to_be_32(0xffffffff >>
1626                                                                  (32 - width));
1627                                         width = 0;
1628                                 } else {
1629                                         mask[idx] = RTE_BE32(0xffffffff);
1630                                         width -= 32;
1631                                 }
1632                                 if (!width)
1633                                         break;
1634                                 ++idx;
1635                         }
1636                         if (data->offset < 64) {
1637                                 info[idx] = (struct field_modify_info){4,
1638                                                 4 * idx,
1639                                                 MLX5_MODI_OUT_DIPV6_63_32};
1640                                 if (width < 32) {
1641                                         mask[idx] =
1642                                                 rte_cpu_to_be_32(0xffffffff >>
1643                                                                  (32 - width));
1644                                         width = 0;
1645                                 } else {
1646                                         mask[idx] = RTE_BE32(0xffffffff);
1647                                         width -= 32;
1648                                 }
1649                                 if (!width)
1650                                         break;
1651                                 ++idx;
1652                         }
1653                         if (data->offset < 96) {
1654                                 info[idx] = (struct field_modify_info){4,
1655                                                 4 * idx,
1656                                                 MLX5_MODI_OUT_DIPV6_95_64};
1657                                 if (width < 32) {
1658                                         mask[idx] =
1659                                                 rte_cpu_to_be_32(0xffffffff >>
1660                                                                  (32 - width));
1661                                         width = 0;
1662                                 } else {
1663                                         mask[idx] = RTE_BE32(0xffffffff);
1664                                         width -= 32;
1665                                 }
1666                                 if (!width)
1667                                         break;
1668                                 ++idx;
1669                         }
1670                         info[idx] = (struct field_modify_info){4, 4 * idx,
1671                                                 MLX5_MODI_OUT_DIPV6_127_96};
1672                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1673                                                      (32 - width));
1674                 } else {
1675                         if (data->offset < 32)
1676                                 info[idx++] = (struct field_modify_info){4, 0,
1677                                                 MLX5_MODI_OUT_DIPV6_31_0};
1678                         if (data->offset < 64)
1679                                 info[idx++] = (struct field_modify_info){4, 0,
1680                                                 MLX5_MODI_OUT_DIPV6_63_32};
1681                         if (data->offset < 96)
1682                                 info[idx++] = (struct field_modify_info){4, 0,
1683                                                 MLX5_MODI_OUT_DIPV6_95_64};
1684                         if (data->offset < 128)
1685                                 info[idx++] = (struct field_modify_info){4, 0,
1686                                                 MLX5_MODI_OUT_DIPV6_127_96};
1687                 }
1688                 break;
1689         case RTE_FLOW_FIELD_TCP_PORT_SRC:
1690                 info[idx] = (struct field_modify_info){2, 0,
1691                                         MLX5_MODI_OUT_TCP_SPORT};
1692                 if (mask)
1693                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1694                 break;
1695         case RTE_FLOW_FIELD_TCP_PORT_DST:
1696                 info[idx] = (struct field_modify_info){2, 0,
1697                                         MLX5_MODI_OUT_TCP_DPORT};
1698                 if (mask)
1699                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1700                 break;
1701         case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1702                 info[idx] = (struct field_modify_info){4, 0,
1703                                         MLX5_MODI_OUT_TCP_SEQ_NUM};
1704                 if (mask)
1705                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1706                                                      (32 - width));
1707                 break;
1708         case RTE_FLOW_FIELD_TCP_ACK_NUM:
1709                 info[idx] = (struct field_modify_info){4, 0,
1710                                         MLX5_MODI_OUT_TCP_ACK_NUM};
1711                 if (mask)
1712                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1713                                                      (32 - width));
1714                 break;
1715         case RTE_FLOW_FIELD_TCP_FLAGS:
1716                 info[idx] = (struct field_modify_info){2, 0,
1717                                         MLX5_MODI_OUT_TCP_FLAGS};
1718                 if (mask)
1719                         mask[idx] = rte_cpu_to_be_16(0x1ff >> (9 - width));
1720                 break;
1721         case RTE_FLOW_FIELD_UDP_PORT_SRC:
1722                 info[idx] = (struct field_modify_info){2, 0,
1723                                         MLX5_MODI_OUT_UDP_SPORT};
1724                 if (mask)
1725                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1726                 break;
1727         case RTE_FLOW_FIELD_UDP_PORT_DST:
1728                 info[idx] = (struct field_modify_info){2, 0,
1729                                         MLX5_MODI_OUT_UDP_DPORT};
1730                 if (mask)
1731                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1732                 break;
1733         case RTE_FLOW_FIELD_VXLAN_VNI:
1734                 /* not supported yet */
1735                 break;
1736         case RTE_FLOW_FIELD_GENEVE_VNI:
1737                 /* not supported yet*/
1738                 break;
1739         case RTE_FLOW_FIELD_GTP_TEID:
1740                 info[idx] = (struct field_modify_info){4, 0,
1741                                         MLX5_MODI_GTP_TEID};
1742                 if (mask)
1743                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1744                                                      (32 - width));
1745                 break;
1746         case RTE_FLOW_FIELD_TAG:
1747                 {
1748                         int reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG,
1749                                                    data->level, error);
1750                         if (reg < 0)
1751                                 return;
1752                         MLX5_ASSERT(reg != REG_NON);
1753                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1754                         info[idx] = (struct field_modify_info){4, 0,
1755                                                 reg_to_field[reg]};
1756                         if (mask)
1757                                 mask[idx] =
1758                                         rte_cpu_to_be_32(0xffffffff >>
1759                                                          (32 - width));
1760                 }
1761                 break;
1762         case RTE_FLOW_FIELD_MARK:
1763                 {
1764                         int reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK,
1765                                                        0, error);
1766                         if (reg < 0)
1767                                 return;
1768                         MLX5_ASSERT(reg != REG_NON);
1769                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1770                         info[idx] = (struct field_modify_info){4, 0,
1771                                                 reg_to_field[reg]};
1772                         if (mask)
1773                                 mask[idx] =
1774                                         rte_cpu_to_be_32(0xffffffff >>
1775                                                          (32 - width));
1776                 }
1777                 break;
1778         case RTE_FLOW_FIELD_META:
1779                 {
1780                         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1781                         if (reg < 0)
1782                                 return;
1783                         MLX5_ASSERT(reg != REG_NON);
1784                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1785                         info[idx] = (struct field_modify_info){4, 0,
1786                                                 reg_to_field[reg]};
1787                         if (mask)
1788                                 mask[idx] =
1789                                         rte_cpu_to_be_32(0xffffffff >>
1790                                                          (32 - width));
1791                 }
1792                 break;
1793         case RTE_FLOW_FIELD_POINTER:
1794         case RTE_FLOW_FIELD_VALUE:
1795                 if (data->field == RTE_FLOW_FIELD_POINTER)
1796                         memcpy(&val, (void *)(uintptr_t)data->value,
1797                                sizeof(uint64_t));
1798                 else
1799                         val = data->value;
1800                 for (idx = 0; idx < MLX5_ACT_MAX_MOD_FIELDS; idx++) {
1801                         if (mask[idx]) {
1802                                 if (dst_width > 16) {
1803                                         value[idx] = rte_cpu_to_be_32(val);
1804                                         val >>= 32;
1805                                 } else if (dst_width > 8) {
1806                                         value[idx] = rte_cpu_to_be_16(val);
1807                                         val >>= 16;
1808                                 } else {
1809                                         value[idx] = (uint8_t)val;
1810                                         val >>= 8;
1811                                 }
1812                                 if (!val)
1813                                         break;
1814                         }
1815                 }
1816                 break;
1817         default:
1818                 MLX5_ASSERT(false);
1819                 break;
1820         }
1821 }
1822
1823 /**
1824  * Convert modify_field action to DV specification.
1825  *
1826  * @param[in] dev
1827  *   Pointer to the rte_eth_dev structure.
1828  * @param[in,out] resource
1829  *   Pointer to the modify-header resource.
1830  * @param[in] action
1831  *   Pointer to action specification.
1832  * @param[in] attr
1833  *   Attributes of flow that includes this item.
1834  * @param[out] error
1835  *   Pointer to the error structure.
1836  *
1837  * @return
1838  *   0 on success, a negative errno value otherwise and rte_errno is set.
1839  */
1840 static int
1841 flow_dv_convert_action_modify_field
1842                         (struct rte_eth_dev *dev,
1843                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1844                          const struct rte_flow_action *action,
1845                          const struct rte_flow_attr *attr,
1846                          struct rte_flow_error *error)
1847 {
1848         const struct rte_flow_action_modify_field *conf =
1849                 (const struct rte_flow_action_modify_field *)(action->conf);
1850         struct rte_flow_item item;
1851         struct field_modify_info field[MLX5_ACT_MAX_MOD_FIELDS] = {
1852                                                                 {0, 0, 0} };
1853         struct field_modify_info dcopy[MLX5_ACT_MAX_MOD_FIELDS] = {
1854                                                                 {0, 0, 0} };
1855         uint32_t mask[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1856         uint32_t value[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1857         uint32_t type;
1858         uint32_t dst_width = mlx5_flow_item_field_width(conf->dst.field);
1859
1860         if (conf->src.field == RTE_FLOW_FIELD_POINTER ||
1861                 conf->src.field == RTE_FLOW_FIELD_VALUE) {
1862                 type = MLX5_MODIFICATION_TYPE_SET;
1863                 /** For SET fill the destination field (field) first. */
1864                 mlx5_flow_field_id_to_modify_info(&conf->dst, field, mask,
1865                         value, conf->width, dst_width, dev, attr, error);
1866                 /** Then copy immediate value from source as per mask. */
1867                 mlx5_flow_field_id_to_modify_info(&conf->src, dcopy, mask,
1868                         value, conf->width, dst_width, dev, attr, error);
1869                 item.spec = &value;
1870         } else {
1871                 type = MLX5_MODIFICATION_TYPE_COPY;
1872                 /** For COPY fill the destination field (dcopy) without mask. */
1873                 mlx5_flow_field_id_to_modify_info(&conf->dst, dcopy, NULL,
1874                         value, conf->width, dst_width, dev, attr, error);
1875                 /** Then construct the source field (field) with mask. */
1876                 mlx5_flow_field_id_to_modify_info(&conf->src, field, mask,
1877                         value, conf->width, dst_width, dev, attr, error);
1878         }
1879         item.mask = &mask;
1880         return flow_dv_convert_modify_action(&item,
1881                         field, dcopy, resource, type, error);
1882 }
1883
1884 /**
1885  * Validate MARK item.
1886  *
1887  * @param[in] dev
1888  *   Pointer to the rte_eth_dev structure.
1889  * @param[in] item
1890  *   Item specification.
1891  * @param[in] attr
1892  *   Attributes of flow that includes this item.
1893  * @param[out] error
1894  *   Pointer to error structure.
1895  *
1896  * @return
1897  *   0 on success, a negative errno value otherwise and rte_errno is set.
1898  */
1899 static int
1900 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1901                            const struct rte_flow_item *item,
1902                            const struct rte_flow_attr *attr __rte_unused,
1903                            struct rte_flow_error *error)
1904 {
1905         struct mlx5_priv *priv = dev->data->dev_private;
1906         struct mlx5_dev_config *config = &priv->config;
1907         const struct rte_flow_item_mark *spec = item->spec;
1908         const struct rte_flow_item_mark *mask = item->mask;
1909         const struct rte_flow_item_mark nic_mask = {
1910                 .id = priv->sh->dv_mark_mask,
1911         };
1912         int ret;
1913
1914         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1915                 return rte_flow_error_set(error, ENOTSUP,
1916                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1917                                           "extended metadata feature"
1918                                           " isn't enabled");
1919         if (!mlx5_flow_ext_mreg_supported(dev))
1920                 return rte_flow_error_set(error, ENOTSUP,
1921                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1922                                           "extended metadata register"
1923                                           " isn't supported");
1924         if (!nic_mask.id)
1925                 return rte_flow_error_set(error, ENOTSUP,
1926                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1927                                           "extended metadata register"
1928                                           " isn't available");
1929         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1930         if (ret < 0)
1931                 return ret;
1932         if (!spec)
1933                 return rte_flow_error_set(error, EINVAL,
1934                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1935                                           item->spec,
1936                                           "data cannot be empty");
1937         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1938                 return rte_flow_error_set(error, EINVAL,
1939                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1940                                           &spec->id,
1941                                           "mark id exceeds the limit");
1942         if (!mask)
1943                 mask = &nic_mask;
1944         if (!mask->id)
1945                 return rte_flow_error_set(error, EINVAL,
1946                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1947                                         "mask cannot be zero");
1948
1949         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1950                                         (const uint8_t *)&nic_mask,
1951                                         sizeof(struct rte_flow_item_mark),
1952                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1953         if (ret < 0)
1954                 return ret;
1955         return 0;
1956 }
1957
1958 /**
1959  * Validate META item.
1960  *
1961  * @param[in] dev
1962  *   Pointer to the rte_eth_dev structure.
1963  * @param[in] item
1964  *   Item specification.
1965  * @param[in] attr
1966  *   Attributes of flow that includes this item.
1967  * @param[out] error
1968  *   Pointer to error structure.
1969  *
1970  * @return
1971  *   0 on success, a negative errno value otherwise and rte_errno is set.
1972  */
1973 static int
1974 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1975                            const struct rte_flow_item *item,
1976                            const struct rte_flow_attr *attr,
1977                            struct rte_flow_error *error)
1978 {
1979         struct mlx5_priv *priv = dev->data->dev_private;
1980         struct mlx5_dev_config *config = &priv->config;
1981         const struct rte_flow_item_meta *spec = item->spec;
1982         const struct rte_flow_item_meta *mask = item->mask;
1983         struct rte_flow_item_meta nic_mask = {
1984                 .data = UINT32_MAX
1985         };
1986         int reg;
1987         int ret;
1988
1989         if (!spec)
1990                 return rte_flow_error_set(error, EINVAL,
1991                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1992                                           item->spec,
1993                                           "data cannot be empty");
1994         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1995                 if (!mlx5_flow_ext_mreg_supported(dev))
1996                         return rte_flow_error_set(error, ENOTSUP,
1997                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1998                                           "extended metadata register"
1999                                           " isn't supported");
2000                 reg = flow_dv_get_metadata_reg(dev, attr, error);
2001                 if (reg < 0)
2002                         return reg;
2003                 if (reg == REG_NON)
2004                         return rte_flow_error_set(error, ENOTSUP,
2005                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2006                                         "unavalable extended metadata register");
2007                 if (reg == REG_B)
2008                         return rte_flow_error_set(error, ENOTSUP,
2009                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2010                                           "match on reg_b "
2011                                           "isn't supported");
2012                 if (reg != REG_A)
2013                         nic_mask.data = priv->sh->dv_meta_mask;
2014         } else {
2015                 if (attr->transfer)
2016                         return rte_flow_error_set(error, ENOTSUP,
2017                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2018                                         "extended metadata feature "
2019                                         "should be enabled when "
2020                                         "meta item is requested "
2021                                         "with e-switch mode ");
2022                 if (attr->ingress)
2023                         return rte_flow_error_set(error, ENOTSUP,
2024                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2025                                         "match on metadata for ingress "
2026                                         "is not supported in legacy "
2027                                         "metadata mode");
2028         }
2029         if (!mask)
2030                 mask = &rte_flow_item_meta_mask;
2031         if (!mask->data)
2032                 return rte_flow_error_set(error, EINVAL,
2033                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2034                                         "mask cannot be zero");
2035
2036         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2037                                         (const uint8_t *)&nic_mask,
2038                                         sizeof(struct rte_flow_item_meta),
2039                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2040         return ret;
2041 }
2042
2043 /**
2044  * Validate TAG item.
2045  *
2046  * @param[in] dev
2047  *   Pointer to the rte_eth_dev structure.
2048  * @param[in] item
2049  *   Item specification.
2050  * @param[in] attr
2051  *   Attributes of flow that includes this item.
2052  * @param[out] error
2053  *   Pointer to error structure.
2054  *
2055  * @return
2056  *   0 on success, a negative errno value otherwise and rte_errno is set.
2057  */
2058 static int
2059 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
2060                           const struct rte_flow_item *item,
2061                           const struct rte_flow_attr *attr __rte_unused,
2062                           struct rte_flow_error *error)
2063 {
2064         const struct rte_flow_item_tag *spec = item->spec;
2065         const struct rte_flow_item_tag *mask = item->mask;
2066         const struct rte_flow_item_tag nic_mask = {
2067                 .data = RTE_BE32(UINT32_MAX),
2068                 .index = 0xff,
2069         };
2070         int ret;
2071
2072         if (!mlx5_flow_ext_mreg_supported(dev))
2073                 return rte_flow_error_set(error, ENOTSUP,
2074                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2075                                           "extensive metadata register"
2076                                           " isn't supported");
2077         if (!spec)
2078                 return rte_flow_error_set(error, EINVAL,
2079                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2080                                           item->spec,
2081                                           "data cannot be empty");
2082         if (!mask)
2083                 mask = &rte_flow_item_tag_mask;
2084         if (!mask->data)
2085                 return rte_flow_error_set(error, EINVAL,
2086                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2087                                         "mask cannot be zero");
2088
2089         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2090                                         (const uint8_t *)&nic_mask,
2091                                         sizeof(struct rte_flow_item_tag),
2092                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2093         if (ret < 0)
2094                 return ret;
2095         if (mask->index != 0xff)
2096                 return rte_flow_error_set(error, EINVAL,
2097                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2098                                           "partial mask for tag index"
2099                                           " is not supported");
2100         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
2101         if (ret < 0)
2102                 return ret;
2103         MLX5_ASSERT(ret != REG_NON);
2104         return 0;
2105 }
2106
2107 /**
2108  * Validate vport item.
2109  *
2110  * @param[in] dev
2111  *   Pointer to the rte_eth_dev structure.
2112  * @param[in] item
2113  *   Item specification.
2114  * @param[in] attr
2115  *   Attributes of flow that includes this item.
2116  * @param[in] item_flags
2117  *   Bit-fields that holds the items detected until now.
2118  * @param[out] error
2119  *   Pointer to error structure.
2120  *
2121  * @return
2122  *   0 on success, a negative errno value otherwise and rte_errno is set.
2123  */
2124 static int
2125 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
2126                               const struct rte_flow_item *item,
2127                               const struct rte_flow_attr *attr,
2128                               uint64_t item_flags,
2129                               struct rte_flow_error *error)
2130 {
2131         const struct rte_flow_item_port_id *spec = item->spec;
2132         const struct rte_flow_item_port_id *mask = item->mask;
2133         const struct rte_flow_item_port_id switch_mask = {
2134                         .id = 0xffffffff,
2135         };
2136         struct mlx5_priv *esw_priv;
2137         struct mlx5_priv *dev_priv;
2138         int ret;
2139
2140         if (!attr->transfer)
2141                 return rte_flow_error_set(error, EINVAL,
2142                                           RTE_FLOW_ERROR_TYPE_ITEM,
2143                                           NULL,
2144                                           "match on port id is valid only"
2145                                           " when transfer flag is enabled");
2146         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
2147                 return rte_flow_error_set(error, ENOTSUP,
2148                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2149                                           "multiple source ports are not"
2150                                           " supported");
2151         if (!mask)
2152                 mask = &switch_mask;
2153         if (mask->id != 0xffffffff)
2154                 return rte_flow_error_set(error, ENOTSUP,
2155                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2156                                            mask,
2157                                            "no support for partial mask on"
2158                                            " \"id\" field");
2159         ret = mlx5_flow_item_acceptable
2160                                 (item, (const uint8_t *)mask,
2161                                  (const uint8_t *)&rte_flow_item_port_id_mask,
2162                                  sizeof(struct rte_flow_item_port_id),
2163                                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2164         if (ret)
2165                 return ret;
2166         if (!spec)
2167                 return 0;
2168         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
2169         if (!esw_priv)
2170                 return rte_flow_error_set(error, rte_errno,
2171                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2172                                           "failed to obtain E-Switch info for"
2173                                           " port");
2174         dev_priv = mlx5_dev_to_eswitch_info(dev);
2175         if (!dev_priv)
2176                 return rte_flow_error_set(error, rte_errno,
2177                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2178                                           NULL,
2179                                           "failed to obtain E-Switch info");
2180         if (esw_priv->domain_id != dev_priv->domain_id)
2181                 return rte_flow_error_set(error, EINVAL,
2182                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2183                                           "cannot match on a port from a"
2184                                           " different E-Switch");
2185         return 0;
2186 }
2187
2188 /**
2189  * Validate VLAN item.
2190  *
2191  * @param[in] item
2192  *   Item specification.
2193  * @param[in] item_flags
2194  *   Bit-fields that holds the items detected until now.
2195  * @param[in] dev
2196  *   Ethernet device flow is being created on.
2197  * @param[out] error
2198  *   Pointer to error structure.
2199  *
2200  * @return
2201  *   0 on success, a negative errno value otherwise and rte_errno is set.
2202  */
2203 static int
2204 flow_dv_validate_item_vlan(const struct rte_flow_item *item,
2205                            uint64_t item_flags,
2206                            struct rte_eth_dev *dev,
2207                            struct rte_flow_error *error)
2208 {
2209         const struct rte_flow_item_vlan *mask = item->mask;
2210         const struct rte_flow_item_vlan nic_mask = {
2211                 .tci = RTE_BE16(UINT16_MAX),
2212                 .inner_type = RTE_BE16(UINT16_MAX),
2213                 .has_more_vlan = 1,
2214         };
2215         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2216         int ret;
2217         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2218                                         MLX5_FLOW_LAYER_INNER_L4) :
2219                                        (MLX5_FLOW_LAYER_OUTER_L3 |
2220                                         MLX5_FLOW_LAYER_OUTER_L4);
2221         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2222                                         MLX5_FLOW_LAYER_OUTER_VLAN;
2223
2224         if (item_flags & vlanm)
2225                 return rte_flow_error_set(error, EINVAL,
2226                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2227                                           "multiple VLAN layers not supported");
2228         else if ((item_flags & l34m) != 0)
2229                 return rte_flow_error_set(error, EINVAL,
2230                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2231                                           "VLAN cannot follow L3/L4 layer");
2232         if (!mask)
2233                 mask = &rte_flow_item_vlan_mask;
2234         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2235                                         (const uint8_t *)&nic_mask,
2236                                         sizeof(struct rte_flow_item_vlan),
2237                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2238         if (ret)
2239                 return ret;
2240         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2241                 struct mlx5_priv *priv = dev->data->dev_private;
2242
2243                 if (priv->vmwa_context) {
2244                         /*
2245                          * Non-NULL context means we have a virtual machine
2246                          * and SR-IOV enabled, we have to create VLAN interface
2247                          * to make hypervisor to setup E-Switch vport
2248                          * context correctly. We avoid creating the multiple
2249                          * VLAN interfaces, so we cannot support VLAN tag mask.
2250                          */
2251                         return rte_flow_error_set(error, EINVAL,
2252                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2253                                                   item,
2254                                                   "VLAN tag mask is not"
2255                                                   " supported in virtual"
2256                                                   " environment");
2257                 }
2258         }
2259         return 0;
2260 }
2261
2262 /*
2263  * GTP flags are contained in 1 byte of the format:
2264  * -------------------------------------------
2265  * | bit   | 0 - 2   | 3  | 4   | 5 | 6 | 7  |
2266  * |-----------------------------------------|
2267  * | value | Version | PT | Res | E | S | PN |
2268  * -------------------------------------------
2269  *
2270  * Matching is supported only for GTP flags E, S, PN.
2271  */
2272 #define MLX5_GTP_FLAGS_MASK     0x07
2273
2274 /**
2275  * Validate GTP item.
2276  *
2277  * @param[in] dev
2278  *   Pointer to the rte_eth_dev structure.
2279  * @param[in] item
2280  *   Item specification.
2281  * @param[in] item_flags
2282  *   Bit-fields that holds the items detected until now.
2283  * @param[out] error
2284  *   Pointer to error structure.
2285  *
2286  * @return
2287  *   0 on success, a negative errno value otherwise and rte_errno is set.
2288  */
2289 static int
2290 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
2291                           const struct rte_flow_item *item,
2292                           uint64_t item_flags,
2293                           struct rte_flow_error *error)
2294 {
2295         struct mlx5_priv *priv = dev->data->dev_private;
2296         const struct rte_flow_item_gtp *spec = item->spec;
2297         const struct rte_flow_item_gtp *mask = item->mask;
2298         const struct rte_flow_item_gtp nic_mask = {
2299                 .v_pt_rsv_flags = MLX5_GTP_FLAGS_MASK,
2300                 .msg_type = 0xff,
2301                 .teid = RTE_BE32(0xffffffff),
2302         };
2303
2304         if (!priv->config.hca_attr.tunnel_stateless_gtp)
2305                 return rte_flow_error_set(error, ENOTSUP,
2306                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2307                                           "GTP support is not enabled");
2308         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2309                 return rte_flow_error_set(error, ENOTSUP,
2310                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2311                                           "multiple tunnel layers not"
2312                                           " supported");
2313         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2314                 return rte_flow_error_set(error, EINVAL,
2315                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2316                                           "no outer UDP layer found");
2317         if (!mask)
2318                 mask = &rte_flow_item_gtp_mask;
2319         if (spec && spec->v_pt_rsv_flags & ~MLX5_GTP_FLAGS_MASK)
2320                 return rte_flow_error_set(error, ENOTSUP,
2321                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2322                                           "Match is supported for GTP"
2323                                           " flags only");
2324         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2325                                          (const uint8_t *)&nic_mask,
2326                                          sizeof(struct rte_flow_item_gtp),
2327                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2328 }
2329
2330 /**
2331  * Validate GTP PSC item.
2332  *
2333  * @param[in] item
2334  *   Item specification.
2335  * @param[in] last_item
2336  *   Previous validated item in the pattern items.
2337  * @param[in] gtp_item
2338  *   Previous GTP item specification.
2339  * @param[in] attr
2340  *   Pointer to flow attributes.
2341  * @param[out] error
2342  *   Pointer to error structure.
2343  *
2344  * @return
2345  *   0 on success, a negative errno value otherwise and rte_errno is set.
2346  */
2347 static int
2348 flow_dv_validate_item_gtp_psc(const struct rte_flow_item *item,
2349                               uint64_t last_item,
2350                               const struct rte_flow_item *gtp_item,
2351                               const struct rte_flow_attr *attr,
2352                               struct rte_flow_error *error)
2353 {
2354         const struct rte_flow_item_gtp *gtp_spec;
2355         const struct rte_flow_item_gtp *gtp_mask;
2356         const struct rte_flow_item_gtp_psc *spec;
2357         const struct rte_flow_item_gtp_psc *mask;
2358         const struct rte_flow_item_gtp_psc nic_mask = {
2359                 .pdu_type = 0xFF,
2360                 .qfi = 0xFF,
2361         };
2362
2363         if (!gtp_item || !(last_item & MLX5_FLOW_LAYER_GTP))
2364                 return rte_flow_error_set
2365                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2366                          "GTP PSC item must be preceded with GTP item");
2367         gtp_spec = gtp_item->spec;
2368         gtp_mask = gtp_item->mask ? gtp_item->mask : &rte_flow_item_gtp_mask;
2369         /* GTP spec and E flag is requested to match zero. */
2370         if (gtp_spec &&
2371                 (gtp_mask->v_pt_rsv_flags &
2372                 ~gtp_spec->v_pt_rsv_flags & MLX5_GTP_EXT_HEADER_FLAG))
2373                 return rte_flow_error_set
2374                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2375                          "GTP E flag must be 1 to match GTP PSC");
2376         /* Check the flow is not created in group zero. */
2377         if (!attr->transfer && !attr->group)
2378                 return rte_flow_error_set
2379                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2380                          "GTP PSC is not supported for group 0");
2381         /* GTP spec is here and E flag is requested to match zero. */
2382         if (!item->spec)
2383                 return 0;
2384         spec = item->spec;
2385         mask = item->mask ? item->mask : &rte_flow_item_gtp_psc_mask;
2386         if (spec->pdu_type > MLX5_GTP_EXT_MAX_PDU_TYPE)
2387                 return rte_flow_error_set
2388                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2389                          "PDU type should be smaller than 16");
2390         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2391                                          (const uint8_t *)&nic_mask,
2392                                          sizeof(struct rte_flow_item_gtp_psc),
2393                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2394 }
2395
2396 /**
2397  * Validate IPV4 item.
2398  * Use existing validation function mlx5_flow_validate_item_ipv4(), and
2399  * add specific validation of fragment_offset field,
2400  *
2401  * @param[in] item
2402  *   Item specification.
2403  * @param[in] item_flags
2404  *   Bit-fields that holds the items detected until now.
2405  * @param[out] error
2406  *   Pointer to error structure.
2407  *
2408  * @return
2409  *   0 on success, a negative errno value otherwise and rte_errno is set.
2410  */
2411 static int
2412 flow_dv_validate_item_ipv4(const struct rte_flow_item *item,
2413                            uint64_t item_flags,
2414                            uint64_t last_item,
2415                            uint16_t ether_type,
2416                            struct rte_flow_error *error)
2417 {
2418         int ret;
2419         const struct rte_flow_item_ipv4 *spec = item->spec;
2420         const struct rte_flow_item_ipv4 *last = item->last;
2421         const struct rte_flow_item_ipv4 *mask = item->mask;
2422         rte_be16_t fragment_offset_spec = 0;
2423         rte_be16_t fragment_offset_last = 0;
2424         const struct rte_flow_item_ipv4 nic_ipv4_mask = {
2425                 .hdr = {
2426                         .src_addr = RTE_BE32(0xffffffff),
2427                         .dst_addr = RTE_BE32(0xffffffff),
2428                         .type_of_service = 0xff,
2429                         .fragment_offset = RTE_BE16(0xffff),
2430                         .next_proto_id = 0xff,
2431                         .time_to_live = 0xff,
2432                 },
2433         };
2434
2435         ret = mlx5_flow_validate_item_ipv4(item, item_flags, last_item,
2436                                            ether_type, &nic_ipv4_mask,
2437                                            MLX5_ITEM_RANGE_ACCEPTED, error);
2438         if (ret < 0)
2439                 return ret;
2440         if (spec && mask)
2441                 fragment_offset_spec = spec->hdr.fragment_offset &
2442                                        mask->hdr.fragment_offset;
2443         if (!fragment_offset_spec)
2444                 return 0;
2445         /*
2446          * spec and mask are valid, enforce using full mask to make sure the
2447          * complete value is used correctly.
2448          */
2449         if ((mask->hdr.fragment_offset & RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2450                         != RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2451                 return rte_flow_error_set(error, EINVAL,
2452                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2453                                           item, "must use full mask for"
2454                                           " fragment_offset");
2455         /*
2456          * Match on fragment_offset 0x2000 means MF is 1 and frag-offset is 0,
2457          * indicating this is 1st fragment of fragmented packet.
2458          * This is not yet supported in MLX5, return appropriate error message.
2459          */
2460         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG))
2461                 return rte_flow_error_set(error, ENOTSUP,
2462                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2463                                           "match on first fragment not "
2464                                           "supported");
2465         if (fragment_offset_spec && !last)
2466                 return rte_flow_error_set(error, ENOTSUP,
2467                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2468                                           "specified value not supported");
2469         /* spec and last are valid, validate the specified range. */
2470         fragment_offset_last = last->hdr.fragment_offset &
2471                                mask->hdr.fragment_offset;
2472         /*
2473          * Match on fragment_offset spec 0x2001 and last 0x3fff
2474          * means MF is 1 and frag-offset is > 0.
2475          * This packet is fragment 2nd and onward, excluding last.
2476          * This is not yet supported in MLX5, return appropriate
2477          * error message.
2478          */
2479         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG + 1) &&
2480             fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2481                 return rte_flow_error_set(error, ENOTSUP,
2482                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2483                                           last, "match on following "
2484                                           "fragments not supported");
2485         /*
2486          * Match on fragment_offset spec 0x0001 and last 0x1fff
2487          * means MF is 0 and frag-offset is > 0.
2488          * This packet is last fragment of fragmented packet.
2489          * This is not yet supported in MLX5, return appropriate
2490          * error message.
2491          */
2492         if (fragment_offset_spec == RTE_BE16(1) &&
2493             fragment_offset_last == RTE_BE16(RTE_IPV4_HDR_OFFSET_MASK))
2494                 return rte_flow_error_set(error, ENOTSUP,
2495                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2496                                           last, "match on last "
2497                                           "fragment not supported");
2498         /*
2499          * Match on fragment_offset spec 0x0001 and last 0x3fff
2500          * means MF and/or frag-offset is not 0.
2501          * This is a fragmented packet.
2502          * Other range values are invalid and rejected.
2503          */
2504         if (!(fragment_offset_spec == RTE_BE16(1) &&
2505               fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK)))
2506                 return rte_flow_error_set(error, ENOTSUP,
2507                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2508                                           "specified range not supported");
2509         return 0;
2510 }
2511
2512 /**
2513  * Validate IPV6 fragment extension item.
2514  *
2515  * @param[in] item
2516  *   Item specification.
2517  * @param[in] item_flags
2518  *   Bit-fields that holds the items detected until now.
2519  * @param[out] error
2520  *   Pointer to error structure.
2521  *
2522  * @return
2523  *   0 on success, a negative errno value otherwise and rte_errno is set.
2524  */
2525 static int
2526 flow_dv_validate_item_ipv6_frag_ext(const struct rte_flow_item *item,
2527                                     uint64_t item_flags,
2528                                     struct rte_flow_error *error)
2529 {
2530         const struct rte_flow_item_ipv6_frag_ext *spec = item->spec;
2531         const struct rte_flow_item_ipv6_frag_ext *last = item->last;
2532         const struct rte_flow_item_ipv6_frag_ext *mask = item->mask;
2533         rte_be16_t frag_data_spec = 0;
2534         rte_be16_t frag_data_last = 0;
2535         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2536         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2537                                       MLX5_FLOW_LAYER_OUTER_L4;
2538         int ret = 0;
2539         struct rte_flow_item_ipv6_frag_ext nic_mask = {
2540                 .hdr = {
2541                         .next_header = 0xff,
2542                         .frag_data = RTE_BE16(0xffff),
2543                 },
2544         };
2545
2546         if (item_flags & l4m)
2547                 return rte_flow_error_set(error, EINVAL,
2548                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2549                                           "ipv6 fragment extension item cannot "
2550                                           "follow L4 item.");
2551         if ((tunnel && !(item_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
2552             (!tunnel && !(item_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV6)))
2553                 return rte_flow_error_set(error, EINVAL,
2554                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2555                                           "ipv6 fragment extension item must "
2556                                           "follow ipv6 item");
2557         if (spec && mask)
2558                 frag_data_spec = spec->hdr.frag_data & mask->hdr.frag_data;
2559         if (!frag_data_spec)
2560                 return 0;
2561         /*
2562          * spec and mask are valid, enforce using full mask to make sure the
2563          * complete value is used correctly.
2564          */
2565         if ((mask->hdr.frag_data & RTE_BE16(RTE_IPV6_FRAG_USED_MASK)) !=
2566                                 RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2567                 return rte_flow_error_set(error, EINVAL,
2568                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2569                                           item, "must use full mask for"
2570                                           " frag_data");
2571         /*
2572          * Match on frag_data 0x00001 means M is 1 and frag-offset is 0.
2573          * This is 1st fragment of fragmented packet.
2574          */
2575         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_MF_MASK))
2576                 return rte_flow_error_set(error, ENOTSUP,
2577                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2578                                           "match on first fragment not "
2579                                           "supported");
2580         if (frag_data_spec && !last)
2581                 return rte_flow_error_set(error, EINVAL,
2582                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2583                                           "specified value not supported");
2584         ret = mlx5_flow_item_acceptable
2585                                 (item, (const uint8_t *)mask,
2586                                  (const uint8_t *)&nic_mask,
2587                                  sizeof(struct rte_flow_item_ipv6_frag_ext),
2588                                  MLX5_ITEM_RANGE_ACCEPTED, error);
2589         if (ret)
2590                 return ret;
2591         /* spec and last are valid, validate the specified range. */
2592         frag_data_last = last->hdr.frag_data & mask->hdr.frag_data;
2593         /*
2594          * Match on frag_data spec 0x0009 and last 0xfff9
2595          * means M is 1 and frag-offset is > 0.
2596          * This packet is fragment 2nd and onward, excluding last.
2597          * This is not yet supported in MLX5, return appropriate
2598          * error message.
2599          */
2600         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN |
2601                                        RTE_IPV6_EHDR_MF_MASK) &&
2602             frag_data_last == RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2603                 return rte_flow_error_set(error, ENOTSUP,
2604                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2605                                           last, "match on following "
2606                                           "fragments not supported");
2607         /*
2608          * Match on frag_data spec 0x0008 and last 0xfff8
2609          * means M is 0 and frag-offset is > 0.
2610          * This packet is last fragment of fragmented packet.
2611          * This is not yet supported in MLX5, return appropriate
2612          * error message.
2613          */
2614         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN) &&
2615             frag_data_last == RTE_BE16(RTE_IPV6_EHDR_FO_MASK))
2616                 return rte_flow_error_set(error, ENOTSUP,
2617                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2618                                           last, "match on last "
2619                                           "fragment not supported");
2620         /* Other range values are invalid and rejected. */
2621         return rte_flow_error_set(error, EINVAL,
2622                                   RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2623                                   "specified range not supported");
2624 }
2625
2626 /*
2627  * Validate ASO CT item.
2628  *
2629  * @param[in] dev
2630  *   Pointer to the rte_eth_dev structure.
2631  * @param[in] item
2632  *   Item specification.
2633  * @param[in] item_flags
2634  *   Pointer to bit-fields that holds the items detected until now.
2635  * @param[out] error
2636  *   Pointer to error structure.
2637  *
2638  * @return
2639  *   0 on success, a negative errno value otherwise and rte_errno is set.
2640  */
2641 static int
2642 flow_dv_validate_item_aso_ct(struct rte_eth_dev *dev,
2643                              const struct rte_flow_item *item,
2644                              uint64_t *item_flags,
2645                              struct rte_flow_error *error)
2646 {
2647         const struct rte_flow_item_conntrack *spec = item->spec;
2648         const struct rte_flow_item_conntrack *mask = item->mask;
2649         RTE_SET_USED(dev);
2650         uint32_t flags;
2651
2652         if (*item_flags & MLX5_FLOW_LAYER_ASO_CT)
2653                 return rte_flow_error_set(error, EINVAL,
2654                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2655                                           "Only one CT is supported");
2656         if (!mask)
2657                 mask = &rte_flow_item_conntrack_mask;
2658         flags = spec->flags & mask->flags;
2659         if ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID) &&
2660             ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID) ||
2661              (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD) ||
2662              (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)))
2663                 return rte_flow_error_set(error, EINVAL,
2664                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2665                                           "Conflict status bits");
2666         /* State change also needs to be considered. */
2667         *item_flags |= MLX5_FLOW_LAYER_ASO_CT;
2668         return 0;
2669 }
2670
2671 /**
2672  * Validate the pop VLAN action.
2673  *
2674  * @param[in] dev
2675  *   Pointer to the rte_eth_dev structure.
2676  * @param[in] action_flags
2677  *   Holds the actions detected until now.
2678  * @param[in] action
2679  *   Pointer to the pop vlan action.
2680  * @param[in] item_flags
2681  *   The items found in this flow rule.
2682  * @param[in] attr
2683  *   Pointer to flow attributes.
2684  * @param[out] error
2685  *   Pointer to error structure.
2686  *
2687  * @return
2688  *   0 on success, a negative errno value otherwise and rte_errno is set.
2689  */
2690 static int
2691 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
2692                                  uint64_t action_flags,
2693                                  const struct rte_flow_action *action,
2694                                  uint64_t item_flags,
2695                                  const struct rte_flow_attr *attr,
2696                                  struct rte_flow_error *error)
2697 {
2698         const struct mlx5_priv *priv = dev->data->dev_private;
2699
2700         (void)action;
2701         (void)attr;
2702         if (!priv->sh->pop_vlan_action)
2703                 return rte_flow_error_set(error, ENOTSUP,
2704                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2705                                           NULL,
2706                                           "pop vlan action is not supported");
2707         if (attr->egress)
2708                 return rte_flow_error_set(error, ENOTSUP,
2709                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2710                                           NULL,
2711                                           "pop vlan action not supported for "
2712                                           "egress");
2713         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
2714                 return rte_flow_error_set(error, ENOTSUP,
2715                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2716                                           "no support for multiple VLAN "
2717                                           "actions");
2718         /* Pop VLAN with preceding Decap requires inner header with VLAN. */
2719         if ((action_flags & MLX5_FLOW_ACTION_DECAP) &&
2720             !(item_flags & MLX5_FLOW_LAYER_INNER_VLAN))
2721                 return rte_flow_error_set(error, ENOTSUP,
2722                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2723                                           NULL,
2724                                           "cannot pop vlan after decap without "
2725                                           "match on inner vlan in the flow");
2726         /* Pop VLAN without preceding Decap requires outer header with VLAN. */
2727         if (!(action_flags & MLX5_FLOW_ACTION_DECAP) &&
2728             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2729                 return rte_flow_error_set(error, ENOTSUP,
2730                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2731                                           NULL,
2732                                           "cannot pop vlan without a "
2733                                           "match on (outer) vlan in the flow");
2734         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2735                 return rte_flow_error_set(error, EINVAL,
2736                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2737                                           "wrong action order, port_id should "
2738                                           "be after pop VLAN action");
2739         if (!attr->transfer && priv->representor)
2740                 return rte_flow_error_set(error, ENOTSUP,
2741                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2742                                           "pop vlan action for VF representor "
2743                                           "not supported on NIC table");
2744         return 0;
2745 }
2746
2747 /**
2748  * Get VLAN default info from vlan match info.
2749  *
2750  * @param[in] items
2751  *   the list of item specifications.
2752  * @param[out] vlan
2753  *   pointer VLAN info to fill to.
2754  *
2755  * @return
2756  *   0 on success, a negative errno value otherwise and rte_errno is set.
2757  */
2758 static void
2759 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
2760                                   struct rte_vlan_hdr *vlan)
2761 {
2762         const struct rte_flow_item_vlan nic_mask = {
2763                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
2764                                 MLX5DV_FLOW_VLAN_VID_MASK),
2765                 .inner_type = RTE_BE16(0xffff),
2766         };
2767
2768         if (items == NULL)
2769                 return;
2770         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2771                 int type = items->type;
2772
2773                 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
2774                     type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
2775                         break;
2776         }
2777         if (items->type != RTE_FLOW_ITEM_TYPE_END) {
2778                 const struct rte_flow_item_vlan *vlan_m = items->mask;
2779                 const struct rte_flow_item_vlan *vlan_v = items->spec;
2780
2781                 /* If VLAN item in pattern doesn't contain data, return here. */
2782                 if (!vlan_v)
2783                         return;
2784                 if (!vlan_m)
2785                         vlan_m = &nic_mask;
2786                 /* Only full match values are accepted */
2787                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
2788                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
2789                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
2790                         vlan->vlan_tci |=
2791                                 rte_be_to_cpu_16(vlan_v->tci &
2792                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
2793                 }
2794                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
2795                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
2796                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
2797                         vlan->vlan_tci |=
2798                                 rte_be_to_cpu_16(vlan_v->tci &
2799                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
2800                 }
2801                 if (vlan_m->inner_type == nic_mask.inner_type)
2802                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
2803                                                            vlan_m->inner_type);
2804         }
2805 }
2806
2807 /**
2808  * Validate the push VLAN action.
2809  *
2810  * @param[in] dev
2811  *   Pointer to the rte_eth_dev structure.
2812  * @param[in] action_flags
2813  *   Holds the actions detected until now.
2814  * @param[in] item_flags
2815  *   The items found in this flow rule.
2816  * @param[in] action
2817  *   Pointer to the action structure.
2818  * @param[in] attr
2819  *   Pointer to flow attributes
2820  * @param[out] error
2821  *   Pointer to error structure.
2822  *
2823  * @return
2824  *   0 on success, a negative errno value otherwise and rte_errno is set.
2825  */
2826 static int
2827 flow_dv_validate_action_push_vlan(struct rte_eth_dev *dev,
2828                                   uint64_t action_flags,
2829                                   const struct rte_flow_item_vlan *vlan_m,
2830                                   const struct rte_flow_action *action,
2831                                   const struct rte_flow_attr *attr,
2832                                   struct rte_flow_error *error)
2833 {
2834         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
2835         const struct mlx5_priv *priv = dev->data->dev_private;
2836
2837         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
2838             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
2839                 return rte_flow_error_set(error, EINVAL,
2840                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2841                                           "invalid vlan ethertype");
2842         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2843                 return rte_flow_error_set(error, EINVAL,
2844                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2845                                           "wrong action order, port_id should "
2846                                           "be after push VLAN");
2847         if (!attr->transfer && priv->representor)
2848                 return rte_flow_error_set(error, ENOTSUP,
2849                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2850                                           "push vlan action for VF representor "
2851                                           "not supported on NIC table");
2852         if (vlan_m &&
2853             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) &&
2854             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) !=
2855                 MLX5DV_FLOW_VLAN_PCP_MASK_BE &&
2856             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP) &&
2857             !(mlx5_flow_find_action
2858                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP)))
2859                 return rte_flow_error_set(error, EINVAL,
2860                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2861                                           "not full match mask on VLAN PCP and "
2862                                           "there is no of_set_vlan_pcp action, "
2863                                           "push VLAN action cannot figure out "
2864                                           "PCP value");
2865         if (vlan_m &&
2866             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) &&
2867             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) !=
2868                 MLX5DV_FLOW_VLAN_VID_MASK_BE &&
2869             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID) &&
2870             !(mlx5_flow_find_action
2871                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID)))
2872                 return rte_flow_error_set(error, EINVAL,
2873                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2874                                           "not full match mask on VLAN VID and "
2875                                           "there is no of_set_vlan_vid action, "
2876                                           "push VLAN action cannot figure out "
2877                                           "VID value");
2878         (void)attr;
2879         return 0;
2880 }
2881
2882 /**
2883  * Validate the set VLAN PCP.
2884  *
2885  * @param[in] action_flags
2886  *   Holds the actions detected until now.
2887  * @param[in] actions
2888  *   Pointer to the list of actions remaining in the flow rule.
2889  * @param[out] error
2890  *   Pointer to error structure.
2891  *
2892  * @return
2893  *   0 on success, a negative errno value otherwise and rte_errno is set.
2894  */
2895 static int
2896 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
2897                                      const struct rte_flow_action actions[],
2898                                      struct rte_flow_error *error)
2899 {
2900         const struct rte_flow_action *action = actions;
2901         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
2902
2903         if (conf->vlan_pcp > 7)
2904                 return rte_flow_error_set(error, EINVAL,
2905                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2906                                           "VLAN PCP value is too big");
2907         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
2908                 return rte_flow_error_set(error, ENOTSUP,
2909                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2910                                           "set VLAN PCP action must follow "
2911                                           "the push VLAN action");
2912         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
2913                 return rte_flow_error_set(error, ENOTSUP,
2914                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2915                                           "Multiple VLAN PCP modification are "
2916                                           "not supported");
2917         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2918                 return rte_flow_error_set(error, EINVAL,
2919                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2920                                           "wrong action order, port_id should "
2921                                           "be after set VLAN PCP");
2922         return 0;
2923 }
2924
2925 /**
2926  * Validate the set VLAN VID.
2927  *
2928  * @param[in] item_flags
2929  *   Holds the items detected in this rule.
2930  * @param[in] action_flags
2931  *   Holds the actions detected until now.
2932  * @param[in] actions
2933  *   Pointer to the list of actions remaining in the flow rule.
2934  * @param[out] error
2935  *   Pointer to error structure.
2936  *
2937  * @return
2938  *   0 on success, a negative errno value otherwise and rte_errno is set.
2939  */
2940 static int
2941 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
2942                                      uint64_t action_flags,
2943                                      const struct rte_flow_action actions[],
2944                                      struct rte_flow_error *error)
2945 {
2946         const struct rte_flow_action *action = actions;
2947         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
2948
2949         if (rte_be_to_cpu_16(conf->vlan_vid) > 0xFFE)
2950                 return rte_flow_error_set(error, EINVAL,
2951                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2952                                           "VLAN VID value is too big");
2953         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
2954             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2955                 return rte_flow_error_set(error, ENOTSUP,
2956                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2957                                           "set VLAN VID action must follow push"
2958                                           " VLAN action or match on VLAN item");
2959         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
2960                 return rte_flow_error_set(error, ENOTSUP,
2961                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2962                                           "Multiple VLAN VID modifications are "
2963                                           "not supported");
2964         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2965                 return rte_flow_error_set(error, EINVAL,
2966                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2967                                           "wrong action order, port_id should "
2968                                           "be after set VLAN VID");
2969         return 0;
2970 }
2971
2972 /*
2973  * Validate the FLAG action.
2974  *
2975  * @param[in] dev
2976  *   Pointer to the rte_eth_dev structure.
2977  * @param[in] action_flags
2978  *   Holds the actions detected until now.
2979  * @param[in] attr
2980  *   Pointer to flow attributes
2981  * @param[out] error
2982  *   Pointer to error structure.
2983  *
2984  * @return
2985  *   0 on success, a negative errno value otherwise and rte_errno is set.
2986  */
2987 static int
2988 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
2989                              uint64_t action_flags,
2990                              const struct rte_flow_attr *attr,
2991                              struct rte_flow_error *error)
2992 {
2993         struct mlx5_priv *priv = dev->data->dev_private;
2994         struct mlx5_dev_config *config = &priv->config;
2995         int ret;
2996
2997         /* Fall back if no extended metadata register support. */
2998         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
2999                 return mlx5_flow_validate_action_flag(action_flags, attr,
3000                                                       error);
3001         /* Extensive metadata mode requires registers. */
3002         if (!mlx5_flow_ext_mreg_supported(dev))
3003                 return rte_flow_error_set(error, ENOTSUP,
3004                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3005                                           "no metadata registers "
3006                                           "to support flag action");
3007         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
3008                 return rte_flow_error_set(error, ENOTSUP,
3009                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3010                                           "extended metadata register"
3011                                           " isn't available");
3012         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3013         if (ret < 0)
3014                 return ret;
3015         MLX5_ASSERT(ret > 0);
3016         if (action_flags & MLX5_FLOW_ACTION_MARK)
3017                 return rte_flow_error_set(error, EINVAL,
3018                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3019                                           "can't mark and flag in same flow");
3020         if (action_flags & MLX5_FLOW_ACTION_FLAG)
3021                 return rte_flow_error_set(error, EINVAL,
3022                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3023                                           "can't have 2 flag"
3024                                           " actions in same flow");
3025         return 0;
3026 }
3027
3028 /**
3029  * Validate MARK action.
3030  *
3031  * @param[in] dev
3032  *   Pointer to the rte_eth_dev structure.
3033  * @param[in] action
3034  *   Pointer to action.
3035  * @param[in] action_flags
3036  *   Holds the actions detected until now.
3037  * @param[in] attr
3038  *   Pointer to flow attributes
3039  * @param[out] error
3040  *   Pointer to error structure.
3041  *
3042  * @return
3043  *   0 on success, a negative errno value otherwise and rte_errno is set.
3044  */
3045 static int
3046 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
3047                              const struct rte_flow_action *action,
3048                              uint64_t action_flags,
3049                              const struct rte_flow_attr *attr,
3050                              struct rte_flow_error *error)
3051 {
3052         struct mlx5_priv *priv = dev->data->dev_private;
3053         struct mlx5_dev_config *config = &priv->config;
3054         const struct rte_flow_action_mark *mark = action->conf;
3055         int ret;
3056
3057         if (is_tunnel_offload_active(dev))
3058                 return rte_flow_error_set(error, ENOTSUP,
3059                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3060                                           "no mark action "
3061                                           "if tunnel offload active");
3062         /* Fall back if no extended metadata register support. */
3063         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3064                 return mlx5_flow_validate_action_mark(action, action_flags,
3065                                                       attr, error);
3066         /* Extensive metadata mode requires registers. */
3067         if (!mlx5_flow_ext_mreg_supported(dev))
3068                 return rte_flow_error_set(error, ENOTSUP,
3069                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3070                                           "no metadata registers "
3071                                           "to support mark action");
3072         if (!priv->sh->dv_mark_mask)
3073                 return rte_flow_error_set(error, ENOTSUP,
3074                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3075                                           "extended metadata register"
3076                                           " isn't available");
3077         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3078         if (ret < 0)
3079                 return ret;
3080         MLX5_ASSERT(ret > 0);
3081         if (!mark)
3082                 return rte_flow_error_set(error, EINVAL,
3083                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3084                                           "configuration cannot be null");
3085         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
3086                 return rte_flow_error_set(error, EINVAL,
3087                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3088                                           &mark->id,
3089                                           "mark id exceeds the limit");
3090         if (action_flags & MLX5_FLOW_ACTION_FLAG)
3091                 return rte_flow_error_set(error, EINVAL,
3092                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3093                                           "can't flag and mark in same flow");
3094         if (action_flags & MLX5_FLOW_ACTION_MARK)
3095                 return rte_flow_error_set(error, EINVAL,
3096                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3097                                           "can't have 2 mark actions in same"
3098                                           " flow");
3099         return 0;
3100 }
3101
3102 /**
3103  * Validate SET_META action.
3104  *
3105  * @param[in] dev
3106  *   Pointer to the rte_eth_dev structure.
3107  * @param[in] action
3108  *   Pointer to the action structure.
3109  * @param[in] action_flags
3110  *   Holds the actions detected until now.
3111  * @param[in] attr
3112  *   Pointer to flow attributes
3113  * @param[out] error
3114  *   Pointer to error structure.
3115  *
3116  * @return
3117  *   0 on success, a negative errno value otherwise and rte_errno is set.
3118  */
3119 static int
3120 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
3121                                  const struct rte_flow_action *action,
3122                                  uint64_t action_flags __rte_unused,
3123                                  const struct rte_flow_attr *attr,
3124                                  struct rte_flow_error *error)
3125 {
3126         const struct rte_flow_action_set_meta *conf;
3127         uint32_t nic_mask = UINT32_MAX;
3128         int reg;
3129
3130         if (!mlx5_flow_ext_mreg_supported(dev))
3131                 return rte_flow_error_set(error, ENOTSUP,
3132                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3133                                           "extended metadata register"
3134                                           " isn't supported");
3135         reg = flow_dv_get_metadata_reg(dev, attr, error);
3136         if (reg < 0)
3137                 return reg;
3138         if (reg == REG_NON)
3139                 return rte_flow_error_set(error, ENOTSUP,
3140                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3141                                           "unavalable extended metadata register");
3142         if (reg != REG_A && reg != REG_B) {
3143                 struct mlx5_priv *priv = dev->data->dev_private;
3144
3145                 nic_mask = priv->sh->dv_meta_mask;
3146         }
3147         if (!(action->conf))
3148                 return rte_flow_error_set(error, EINVAL,
3149                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3150                                           "configuration cannot be null");
3151         conf = (const struct rte_flow_action_set_meta *)action->conf;
3152         if (!conf->mask)
3153                 return rte_flow_error_set(error, EINVAL,
3154                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3155                                           "zero mask doesn't have any effect");
3156         if (conf->mask & ~nic_mask)
3157                 return rte_flow_error_set(error, EINVAL,
3158                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3159                                           "meta data must be within reg C0");
3160         return 0;
3161 }
3162
3163 /**
3164  * Validate SET_TAG action.
3165  *
3166  * @param[in] dev
3167  *   Pointer to the rte_eth_dev structure.
3168  * @param[in] action
3169  *   Pointer to the action structure.
3170  * @param[in] action_flags
3171  *   Holds the actions detected until now.
3172  * @param[in] attr
3173  *   Pointer to flow attributes
3174  * @param[out] error
3175  *   Pointer to error structure.
3176  *
3177  * @return
3178  *   0 on success, a negative errno value otherwise and rte_errno is set.
3179  */
3180 static int
3181 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
3182                                 const struct rte_flow_action *action,
3183                                 uint64_t action_flags,
3184                                 const struct rte_flow_attr *attr,
3185                                 struct rte_flow_error *error)
3186 {
3187         const struct rte_flow_action_set_tag *conf;
3188         const uint64_t terminal_action_flags =
3189                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
3190                 MLX5_FLOW_ACTION_RSS;
3191         int ret;
3192
3193         if (!mlx5_flow_ext_mreg_supported(dev))
3194                 return rte_flow_error_set(error, ENOTSUP,
3195                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3196                                           "extensive metadata register"
3197                                           " isn't supported");
3198         if (!(action->conf))
3199                 return rte_flow_error_set(error, EINVAL,
3200                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3201                                           "configuration cannot be null");
3202         conf = (const struct rte_flow_action_set_tag *)action->conf;
3203         if (!conf->mask)
3204                 return rte_flow_error_set(error, EINVAL,
3205                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3206                                           "zero mask doesn't have any effect");
3207         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
3208         if (ret < 0)
3209                 return ret;
3210         if (!attr->transfer && attr->ingress &&
3211             (action_flags & terminal_action_flags))
3212                 return rte_flow_error_set(error, EINVAL,
3213                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3214                                           "set_tag has no effect"
3215                                           " with terminal actions");
3216         return 0;
3217 }
3218
3219 /**
3220  * Check if action counter is shared by either old or new mechanism.
3221  *
3222  * @param[in] action
3223  *   Pointer to the action structure.
3224  *
3225  * @return
3226  *   True when counter is shared, false otherwise.
3227  */
3228 static inline bool
3229 is_shared_action_count(const struct rte_flow_action *action)
3230 {
3231         const struct rte_flow_action_count *count =
3232                         (const struct rte_flow_action_count *)action->conf;
3233
3234         if ((int)action->type == MLX5_RTE_FLOW_ACTION_TYPE_COUNT)
3235                 return true;
3236         return !!(count && count->shared);
3237 }
3238
3239 /**
3240  * Validate count action.
3241  *
3242  * @param[in] dev
3243  *   Pointer to rte_eth_dev structure.
3244  * @param[in] shared
3245  *   Indicator if action is shared.
3246  * @param[in] action_flags
3247  *   Holds the actions detected until now.
3248  * @param[out] error
3249  *   Pointer to error structure.
3250  *
3251  * @return
3252  *   0 on success, a negative errno value otherwise and rte_errno is set.
3253  */
3254 static int
3255 flow_dv_validate_action_count(struct rte_eth_dev *dev, bool shared,
3256                               uint64_t action_flags,
3257                               struct rte_flow_error *error)
3258 {
3259         struct mlx5_priv *priv = dev->data->dev_private;
3260
3261         if (!priv->config.devx)
3262                 goto notsup_err;
3263         if (action_flags & MLX5_FLOW_ACTION_COUNT)
3264                 return rte_flow_error_set(error, EINVAL,
3265                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3266                                           "duplicate count actions set");
3267         if (shared && (action_flags & MLX5_FLOW_ACTION_AGE) &&
3268             !priv->sh->flow_hit_aso_en)
3269                 return rte_flow_error_set(error, EINVAL,
3270                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3271                                           "old age and shared count combination is not supported");
3272 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
3273         return 0;
3274 #endif
3275 notsup_err:
3276         return rte_flow_error_set
3277                       (error, ENOTSUP,
3278                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3279                        NULL,
3280                        "count action not supported");
3281 }
3282
3283 /**
3284  * Validate the L2 encap action.
3285  *
3286  * @param[in] dev
3287  *   Pointer to the rte_eth_dev structure.
3288  * @param[in] action_flags
3289  *   Holds the actions detected until now.
3290  * @param[in] action
3291  *   Pointer to the action structure.
3292  * @param[in] attr
3293  *   Pointer to flow attributes.
3294  * @param[out] error
3295  *   Pointer to error structure.
3296  *
3297  * @return
3298  *   0 on success, a negative errno value otherwise and rte_errno is set.
3299  */
3300 static int
3301 flow_dv_validate_action_l2_encap(struct rte_eth_dev *dev,
3302                                  uint64_t action_flags,
3303                                  const struct rte_flow_action *action,
3304                                  const struct rte_flow_attr *attr,
3305                                  struct rte_flow_error *error)
3306 {
3307         const struct mlx5_priv *priv = dev->data->dev_private;
3308
3309         if (!(action->conf))
3310                 return rte_flow_error_set(error, EINVAL,
3311                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3312                                           "configuration cannot be null");
3313         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3314                 return rte_flow_error_set(error, EINVAL,
3315                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3316                                           "can only have a single encap action "
3317                                           "in a flow");
3318         if (!attr->transfer && priv->representor)
3319                 return rte_flow_error_set(error, ENOTSUP,
3320                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3321                                           "encap action for VF representor "
3322                                           "not supported on NIC table");
3323         return 0;
3324 }
3325
3326 /**
3327  * Validate a decap action.
3328  *
3329  * @param[in] dev
3330  *   Pointer to the rte_eth_dev structure.
3331  * @param[in] action_flags
3332  *   Holds the actions detected until now.
3333  * @param[in] action
3334  *   Pointer to the action structure.
3335  * @param[in] item_flags
3336  *   Holds the items detected.
3337  * @param[in] attr
3338  *   Pointer to flow attributes
3339  * @param[out] error
3340  *   Pointer to error structure.
3341  *
3342  * @return
3343  *   0 on success, a negative errno value otherwise and rte_errno is set.
3344  */
3345 static int
3346 flow_dv_validate_action_decap(struct rte_eth_dev *dev,
3347                               uint64_t action_flags,
3348                               const struct rte_flow_action *action,
3349                               const uint64_t item_flags,
3350                               const struct rte_flow_attr *attr,
3351                               struct rte_flow_error *error)
3352 {
3353         const struct mlx5_priv *priv = dev->data->dev_private;
3354
3355         if (priv->config.hca_attr.scatter_fcs_w_decap_disable &&
3356             !priv->config.decap_en)
3357                 return rte_flow_error_set(error, ENOTSUP,
3358                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3359                                           "decap is not enabled");
3360         if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
3361                 return rte_flow_error_set(error, ENOTSUP,
3362                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3363                                           action_flags &
3364                                           MLX5_FLOW_ACTION_DECAP ? "can only "
3365                                           "have a single decap action" : "decap "
3366                                           "after encap is not supported");
3367         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
3368                 return rte_flow_error_set(error, EINVAL,
3369                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3370                                           "can't have decap action after"
3371                                           " modify action");
3372         if (attr->egress)
3373                 return rte_flow_error_set(error, ENOTSUP,
3374                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
3375                                           NULL,
3376                                           "decap action not supported for "
3377                                           "egress");
3378         if (!attr->transfer && priv->representor)
3379                 return rte_flow_error_set(error, ENOTSUP,
3380                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3381                                           "decap action for VF representor "
3382                                           "not supported on NIC table");
3383         if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_DECAP &&
3384             !(item_flags & MLX5_FLOW_LAYER_VXLAN))
3385                 return rte_flow_error_set(error, ENOTSUP,
3386                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3387                                 "VXLAN item should be present for VXLAN decap");
3388         return 0;
3389 }
3390
3391 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
3392
3393 /**
3394  * Validate the raw encap and decap actions.
3395  *
3396  * @param[in] dev
3397  *   Pointer to the rte_eth_dev structure.
3398  * @param[in] decap
3399  *   Pointer to the decap action.
3400  * @param[in] encap
3401  *   Pointer to the encap action.
3402  * @param[in] attr
3403  *   Pointer to flow attributes
3404  * @param[in/out] action_flags
3405  *   Holds the actions detected until now.
3406  * @param[out] actions_n
3407  *   pointer to the number of actions counter.
3408  * @param[in] action
3409  *   Pointer to the action structure.
3410  * @param[in] item_flags
3411  *   Holds the items detected.
3412  * @param[out] error
3413  *   Pointer to error structure.
3414  *
3415  * @return
3416  *   0 on success, a negative errno value otherwise and rte_errno is set.
3417  */
3418 static int
3419 flow_dv_validate_action_raw_encap_decap
3420         (struct rte_eth_dev *dev,
3421          const struct rte_flow_action_raw_decap *decap,
3422          const struct rte_flow_action_raw_encap *encap,
3423          const struct rte_flow_attr *attr, uint64_t *action_flags,
3424          int *actions_n, const struct rte_flow_action *action,
3425          uint64_t item_flags, struct rte_flow_error *error)
3426 {
3427         const struct mlx5_priv *priv = dev->data->dev_private;
3428         int ret;
3429
3430         if (encap && (!encap->size || !encap->data))
3431                 return rte_flow_error_set(error, EINVAL,
3432                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3433                                           "raw encap data cannot be empty");
3434         if (decap && encap) {
3435                 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
3436                     encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3437                         /* L3 encap. */
3438                         decap = NULL;
3439                 else if (encap->size <=
3440                            MLX5_ENCAPSULATION_DECISION_SIZE &&
3441                            decap->size >
3442                            MLX5_ENCAPSULATION_DECISION_SIZE)
3443                         /* L3 decap. */
3444                         encap = NULL;
3445                 else if (encap->size >
3446                            MLX5_ENCAPSULATION_DECISION_SIZE &&
3447                            decap->size >
3448                            MLX5_ENCAPSULATION_DECISION_SIZE)
3449                         /* 2 L2 actions: encap and decap. */
3450                         ;
3451                 else
3452                         return rte_flow_error_set(error,
3453                                 ENOTSUP,
3454                                 RTE_FLOW_ERROR_TYPE_ACTION,
3455                                 NULL, "unsupported too small "
3456                                 "raw decap and too small raw "
3457                                 "encap combination");
3458         }
3459         if (decap) {
3460                 ret = flow_dv_validate_action_decap(dev, *action_flags, action,
3461                                                     item_flags, attr, error);
3462                 if (ret < 0)
3463                         return ret;
3464                 *action_flags |= MLX5_FLOW_ACTION_DECAP;
3465                 ++(*actions_n);
3466         }
3467         if (encap) {
3468                 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
3469                         return rte_flow_error_set(error, ENOTSUP,
3470                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3471                                                   NULL,
3472                                                   "small raw encap size");
3473                 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
3474                         return rte_flow_error_set(error, EINVAL,
3475                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3476                                                   NULL,
3477                                                   "more than one encap action");
3478                 if (!attr->transfer && priv->representor)
3479                         return rte_flow_error_set
3480                                         (error, ENOTSUP,
3481                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3482                                          "encap action for VF representor "
3483                                          "not supported on NIC table");
3484                 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
3485                 ++(*actions_n);
3486         }
3487         return 0;
3488 }
3489
3490 /*
3491  * Validate the ASO CT action.
3492  *
3493  * @param[in] dev
3494  *   Pointer to the rte_eth_dev structure.
3495  * @param[in] action_flags
3496  *   Holds the actions detected until now.
3497  * @param[in] item_flags
3498  *   The items found in this flow rule.
3499  * @param[in] attr
3500  *   Pointer to flow attributes.
3501  * @param[out] error
3502  *   Pointer to error structure.
3503  *
3504  * @return
3505  *   0 on success, a negative errno value otherwise and rte_errno is set.
3506  */
3507 static int
3508 flow_dv_validate_action_aso_ct(struct rte_eth_dev *dev,
3509                                uint64_t action_flags,
3510                                uint64_t item_flags,
3511                                const struct rte_flow_attr *attr,
3512                                struct rte_flow_error *error)
3513 {
3514         RTE_SET_USED(dev);
3515
3516         if (attr->group == 0 && !attr->transfer)
3517                 return rte_flow_error_set(error, ENOTSUP,
3518                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3519                                           NULL,
3520                                           "Only support non-root table");
3521         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
3522                 return rte_flow_error_set(error, ENOTSUP,
3523                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3524                                           "CT cannot follow a fate action");
3525         if ((action_flags & MLX5_FLOW_ACTION_METER) ||
3526             (action_flags & MLX5_FLOW_ACTION_AGE))
3527                 return rte_flow_error_set(error, EINVAL,
3528                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3529                                           "Only one ASO action is supported");
3530         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3531                 return rte_flow_error_set(error, EINVAL,
3532                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3533                                           "Encap cannot exist before CT");
3534         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3535                 return rte_flow_error_set(error, EINVAL,
3536                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3537                                           "Not a outer TCP packet");
3538         return 0;
3539 }
3540
3541 /**
3542  * Match encap_decap resource.
3543  *
3544  * @param list
3545  *   Pointer to the hash list.
3546  * @param entry
3547  *   Pointer to exist resource entry object.
3548  * @param key
3549  *   Key of the new entry.
3550  * @param ctx_cb
3551  *   Pointer to new encap_decap resource.
3552  *
3553  * @return
3554  *   0 on matching, none-zero otherwise.
3555  */
3556 int
3557 flow_dv_encap_decap_match_cb(struct mlx5_hlist *list __rte_unused,
3558                              struct mlx5_hlist_entry *entry,
3559                              uint64_t key __rte_unused, void *cb_ctx)
3560 {
3561         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3562         struct mlx5_flow_dv_encap_decap_resource *resource = ctx->data;
3563         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
3564
3565         cache_resource = container_of(entry,
3566                                       struct mlx5_flow_dv_encap_decap_resource,
3567                                       entry);
3568         if (resource->reformat_type == cache_resource->reformat_type &&
3569             resource->ft_type == cache_resource->ft_type &&
3570             resource->flags == cache_resource->flags &&
3571             resource->size == cache_resource->size &&
3572             !memcmp((const void *)resource->buf,
3573                     (const void *)cache_resource->buf,
3574                     resource->size))
3575                 return 0;
3576         return -1;
3577 }
3578
3579 /**
3580  * Allocate encap_decap resource.
3581  *
3582  * @param list
3583  *   Pointer to the hash list.
3584  * @param entry
3585  *   Pointer to exist resource entry object.
3586  * @param ctx_cb
3587  *   Pointer to new encap_decap resource.
3588  *
3589  * @return
3590  *   0 on matching, none-zero otherwise.
3591  */
3592 struct mlx5_hlist_entry *
3593 flow_dv_encap_decap_create_cb(struct mlx5_hlist *list,
3594                               uint64_t key __rte_unused,
3595                               void *cb_ctx)
3596 {
3597         struct mlx5_dev_ctx_shared *sh = list->ctx;
3598         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3599         struct mlx5dv_dr_domain *domain;
3600         struct mlx5_flow_dv_encap_decap_resource *resource = ctx->data;
3601         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
3602         uint32_t idx;
3603         int ret;
3604
3605         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3606                 domain = sh->fdb_domain;
3607         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3608                 domain = sh->rx_domain;
3609         else
3610                 domain = sh->tx_domain;
3611         /* Register new encap/decap resource. */
3612         cache_resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
3613                                        &idx);
3614         if (!cache_resource) {
3615                 rte_flow_error_set(ctx->error, ENOMEM,
3616                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3617                                    "cannot allocate resource memory");
3618                 return NULL;
3619         }
3620         *cache_resource = *resource;
3621         cache_resource->idx = idx;
3622         ret = mlx5_flow_os_create_flow_action_packet_reformat
3623                                         (sh->ctx, domain, cache_resource,
3624                                          &cache_resource->action);
3625         if (ret) {
3626                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], idx);
3627                 rte_flow_error_set(ctx->error, ENOMEM,
3628                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3629                                    NULL, "cannot create action");
3630                 return NULL;
3631         }
3632
3633         return &cache_resource->entry;
3634 }
3635
3636 /**
3637  * Find existing encap/decap resource or create and register a new one.
3638  *
3639  * @param[in, out] dev
3640  *   Pointer to rte_eth_dev structure.
3641  * @param[in, out] resource
3642  *   Pointer to encap/decap resource.
3643  * @parm[in, out] dev_flow
3644  *   Pointer to the dev_flow.
3645  * @param[out] error
3646  *   pointer to error structure.
3647  *
3648  * @return
3649  *   0 on success otherwise -errno and errno is set.
3650  */
3651 static int
3652 flow_dv_encap_decap_resource_register
3653                         (struct rte_eth_dev *dev,
3654                          struct mlx5_flow_dv_encap_decap_resource *resource,
3655                          struct mlx5_flow *dev_flow,
3656                          struct rte_flow_error *error)
3657 {
3658         struct mlx5_priv *priv = dev->data->dev_private;
3659         struct mlx5_dev_ctx_shared *sh = priv->sh;
3660         struct mlx5_hlist_entry *entry;
3661         union {
3662                 struct {
3663                         uint32_t ft_type:8;
3664                         uint32_t refmt_type:8;
3665                         /*
3666                          * Header reformat actions can be shared between
3667                          * non-root tables. One bit to indicate non-root
3668                          * table or not.
3669                          */
3670                         uint32_t is_root:1;
3671                         uint32_t reserve:15;
3672                 };
3673                 uint32_t v32;
3674         } encap_decap_key = {
3675                 {
3676                         .ft_type = resource->ft_type,
3677                         .refmt_type = resource->reformat_type,
3678                         .is_root = !!dev_flow->dv.group,
3679                         .reserve = 0,
3680                 }
3681         };
3682         struct mlx5_flow_cb_ctx ctx = {
3683                 .error = error,
3684                 .data = resource,
3685         };
3686         uint64_t key64;
3687
3688         resource->flags = dev_flow->dv.group ? 0 : 1;
3689         key64 =  __rte_raw_cksum(&encap_decap_key.v32,
3690                                  sizeof(encap_decap_key.v32), 0);
3691         if (resource->reformat_type !=
3692             MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2 &&
3693             resource->size)
3694                 key64 = __rte_raw_cksum(resource->buf, resource->size, key64);
3695         entry = mlx5_hlist_register(sh->encaps_decaps, key64, &ctx);
3696         if (!entry)
3697                 return -rte_errno;
3698         resource = container_of(entry, typeof(*resource), entry);
3699         dev_flow->dv.encap_decap = resource;
3700         dev_flow->handle->dvh.rix_encap_decap = resource->idx;
3701         return 0;
3702 }
3703
3704 /**
3705  * Find existing table jump resource or create and register a new one.
3706  *
3707  * @param[in, out] dev
3708  *   Pointer to rte_eth_dev structure.
3709  * @param[in, out] tbl
3710  *   Pointer to flow table resource.
3711  * @parm[in, out] dev_flow
3712  *   Pointer to the dev_flow.
3713  * @param[out] error
3714  *   pointer to error structure.
3715  *
3716  * @return
3717  *   0 on success otherwise -errno and errno is set.
3718  */
3719 static int
3720 flow_dv_jump_tbl_resource_register
3721                         (struct rte_eth_dev *dev __rte_unused,
3722                          struct mlx5_flow_tbl_resource *tbl,
3723                          struct mlx5_flow *dev_flow,
3724                          struct rte_flow_error *error __rte_unused)
3725 {
3726         struct mlx5_flow_tbl_data_entry *tbl_data =
3727                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
3728
3729         MLX5_ASSERT(tbl);
3730         MLX5_ASSERT(tbl_data->jump.action);
3731         dev_flow->handle->rix_jump = tbl_data->idx;
3732         dev_flow->dv.jump = &tbl_data->jump;
3733         return 0;
3734 }
3735
3736 int
3737 flow_dv_port_id_match_cb(struct mlx5_cache_list *list __rte_unused,
3738                          struct mlx5_cache_entry *entry, void *cb_ctx)
3739 {
3740         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3741         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3742         struct mlx5_flow_dv_port_id_action_resource *res =
3743                         container_of(entry, typeof(*res), entry);
3744
3745         return ref->port_id != res->port_id;
3746 }
3747
3748 struct mlx5_cache_entry *
3749 flow_dv_port_id_create_cb(struct mlx5_cache_list *list,
3750                           struct mlx5_cache_entry *entry __rte_unused,
3751                           void *cb_ctx)
3752 {
3753         struct mlx5_dev_ctx_shared *sh = list->ctx;
3754         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3755         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3756         struct mlx5_flow_dv_port_id_action_resource *cache;
3757         uint32_t idx;
3758         int ret;
3759
3760         /* Register new port id action resource. */
3761         cache = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3762         if (!cache) {
3763                 rte_flow_error_set(ctx->error, ENOMEM,
3764                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3765                                    "cannot allocate port_id action cache memory");
3766                 return NULL;
3767         }
3768         *cache = *ref;
3769         ret = mlx5_flow_os_create_flow_action_dest_port(sh->fdb_domain,
3770                                                         ref->port_id,
3771                                                         &cache->action);
3772         if (ret) {
3773                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], idx);
3774                 rte_flow_error_set(ctx->error, ENOMEM,
3775                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3776                                    "cannot create action");
3777                 return NULL;
3778         }
3779         cache->idx = idx;
3780         return &cache->entry;
3781 }
3782
3783 /**
3784  * Find existing table port ID resource or create and register a new one.
3785  *
3786  * @param[in, out] dev
3787  *   Pointer to rte_eth_dev structure.
3788  * @param[in, out] resource
3789  *   Pointer to port ID action resource.
3790  * @parm[in, out] dev_flow
3791  *   Pointer to the dev_flow.
3792  * @param[out] error
3793  *   pointer to error structure.
3794  *
3795  * @return
3796  *   0 on success otherwise -errno and errno is set.
3797  */
3798 static int
3799 flow_dv_port_id_action_resource_register
3800                         (struct rte_eth_dev *dev,
3801                          struct mlx5_flow_dv_port_id_action_resource *resource,
3802                          struct mlx5_flow *dev_flow,
3803                          struct rte_flow_error *error)
3804 {
3805         struct mlx5_priv *priv = dev->data->dev_private;
3806         struct mlx5_cache_entry *entry;
3807         struct mlx5_flow_dv_port_id_action_resource *cache;
3808         struct mlx5_flow_cb_ctx ctx = {
3809                 .error = error,
3810                 .data = resource,
3811         };
3812
3813         entry = mlx5_cache_register(&priv->sh->port_id_action_list, &ctx);
3814         if (!entry)
3815                 return -rte_errno;
3816         cache = container_of(entry, typeof(*cache), entry);
3817         dev_flow->dv.port_id_action = cache;
3818         dev_flow->handle->rix_port_id_action = cache->idx;
3819         return 0;
3820 }
3821
3822 int
3823 flow_dv_push_vlan_match_cb(struct mlx5_cache_list *list __rte_unused,
3824                          struct mlx5_cache_entry *entry, void *cb_ctx)
3825 {
3826         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3827         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3828         struct mlx5_flow_dv_push_vlan_action_resource *res =
3829                         container_of(entry, typeof(*res), entry);
3830
3831         return ref->vlan_tag != res->vlan_tag || ref->ft_type != res->ft_type;
3832 }
3833
3834 struct mlx5_cache_entry *
3835 flow_dv_push_vlan_create_cb(struct mlx5_cache_list *list,
3836                           struct mlx5_cache_entry *entry __rte_unused,
3837                           void *cb_ctx)
3838 {
3839         struct mlx5_dev_ctx_shared *sh = list->ctx;
3840         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3841         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3842         struct mlx5_flow_dv_push_vlan_action_resource *cache;
3843         struct mlx5dv_dr_domain *domain;
3844         uint32_t idx;
3845         int ret;
3846
3847         /* Register new port id action resource. */
3848         cache = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3849         if (!cache) {
3850                 rte_flow_error_set(ctx->error, ENOMEM,
3851                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3852                                    "cannot allocate push_vlan action cache memory");
3853                 return NULL;
3854         }
3855         *cache = *ref;
3856         if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3857                 domain = sh->fdb_domain;
3858         else if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3859                 domain = sh->rx_domain;
3860         else
3861                 domain = sh->tx_domain;
3862         ret = mlx5_flow_os_create_flow_action_push_vlan(domain, ref->vlan_tag,
3863                                                         &cache->action);
3864         if (ret) {
3865                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
3866                 rte_flow_error_set(ctx->error, ENOMEM,
3867                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3868                                    "cannot create push vlan action");
3869                 return NULL;
3870         }
3871         cache->idx = idx;
3872         return &cache->entry;
3873 }
3874
3875 /**
3876  * Find existing push vlan resource or create and register a new one.
3877  *
3878  * @param [in, out] dev
3879  *   Pointer to rte_eth_dev structure.
3880  * @param[in, out] resource
3881  *   Pointer to port ID action resource.
3882  * @parm[in, out] dev_flow
3883  *   Pointer to the dev_flow.
3884  * @param[out] error
3885  *   pointer to error structure.
3886  *
3887  * @return
3888  *   0 on success otherwise -errno and errno is set.
3889  */
3890 static int
3891 flow_dv_push_vlan_action_resource_register
3892                        (struct rte_eth_dev *dev,
3893                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
3894                         struct mlx5_flow *dev_flow,
3895                         struct rte_flow_error *error)
3896 {
3897         struct mlx5_priv *priv = dev->data->dev_private;
3898         struct mlx5_flow_dv_push_vlan_action_resource *cache;
3899         struct mlx5_cache_entry *entry;
3900         struct mlx5_flow_cb_ctx ctx = {
3901                 .error = error,
3902                 .data = resource,
3903         };
3904
3905         entry = mlx5_cache_register(&priv->sh->push_vlan_action_list, &ctx);
3906         if (!entry)
3907                 return -rte_errno;
3908         cache = container_of(entry, typeof(*cache), entry);
3909
3910         dev_flow->handle->dvh.rix_push_vlan = cache->idx;
3911         dev_flow->dv.push_vlan_res = cache;
3912         return 0;
3913 }
3914
3915 /**
3916  * Get the size of specific rte_flow_item_type hdr size
3917  *
3918  * @param[in] item_type
3919  *   Tested rte_flow_item_type.
3920  *
3921  * @return
3922  *   sizeof struct item_type, 0 if void or irrelevant.
3923  */
3924 static size_t
3925 flow_dv_get_item_hdr_len(const enum rte_flow_item_type item_type)
3926 {
3927         size_t retval;
3928
3929         switch (item_type) {
3930         case RTE_FLOW_ITEM_TYPE_ETH:
3931                 retval = sizeof(struct rte_ether_hdr);
3932                 break;
3933         case RTE_FLOW_ITEM_TYPE_VLAN:
3934                 retval = sizeof(struct rte_vlan_hdr);
3935                 break;
3936         case RTE_FLOW_ITEM_TYPE_IPV4:
3937                 retval = sizeof(struct rte_ipv4_hdr);
3938                 break;
3939         case RTE_FLOW_ITEM_TYPE_IPV6:
3940                 retval = sizeof(struct rte_ipv6_hdr);
3941                 break;
3942         case RTE_FLOW_ITEM_TYPE_UDP:
3943                 retval = sizeof(struct rte_udp_hdr);
3944                 break;
3945         case RTE_FLOW_ITEM_TYPE_TCP:
3946                 retval = sizeof(struct rte_tcp_hdr);
3947                 break;
3948         case RTE_FLOW_ITEM_TYPE_VXLAN:
3949         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
3950                 retval = sizeof(struct rte_vxlan_hdr);
3951                 break;
3952         case RTE_FLOW_ITEM_TYPE_GRE:
3953         case RTE_FLOW_ITEM_TYPE_NVGRE:
3954                 retval = sizeof(struct rte_gre_hdr);
3955                 break;
3956         case RTE_FLOW_ITEM_TYPE_MPLS:
3957                 retval = sizeof(struct rte_mpls_hdr);
3958                 break;
3959         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
3960         default:
3961                 retval = 0;
3962                 break;
3963         }
3964         return retval;
3965 }
3966
3967 #define MLX5_ENCAP_IPV4_VERSION         0x40
3968 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
3969 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
3970 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
3971 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
3972 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
3973 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
3974
3975 /**
3976  * Convert the encap action data from list of rte_flow_item to raw buffer
3977  *
3978  * @param[in] items
3979  *   Pointer to rte_flow_item objects list.
3980  * @param[out] buf
3981  *   Pointer to the output buffer.
3982  * @param[out] size
3983  *   Pointer to the output buffer size.
3984  * @param[out] error
3985  *   Pointer to the error structure.
3986  *
3987  * @return
3988  *   0 on success, a negative errno value otherwise and rte_errno is set.
3989  */
3990 static int
3991 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
3992                            size_t *size, struct rte_flow_error *error)
3993 {
3994         struct rte_ether_hdr *eth = NULL;
3995         struct rte_vlan_hdr *vlan = NULL;
3996         struct rte_ipv4_hdr *ipv4 = NULL;
3997         struct rte_ipv6_hdr *ipv6 = NULL;
3998         struct rte_udp_hdr *udp = NULL;
3999         struct rte_vxlan_hdr *vxlan = NULL;
4000         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
4001         struct rte_gre_hdr *gre = NULL;
4002         size_t len;
4003         size_t temp_size = 0;
4004
4005         if (!items)
4006                 return rte_flow_error_set(error, EINVAL,
4007                                           RTE_FLOW_ERROR_TYPE_ACTION,
4008                                           NULL, "invalid empty data");
4009         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4010                 len = flow_dv_get_item_hdr_len(items->type);
4011                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
4012                         return rte_flow_error_set(error, EINVAL,
4013                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4014                                                   (void *)items->type,
4015                                                   "items total size is too big"
4016                                                   " for encap action");
4017                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
4018                 switch (items->type) {
4019                 case RTE_FLOW_ITEM_TYPE_ETH:
4020                         eth = (struct rte_ether_hdr *)&buf[temp_size];
4021                         break;
4022                 case RTE_FLOW_ITEM_TYPE_VLAN:
4023                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
4024                         if (!eth)
4025                                 return rte_flow_error_set(error, EINVAL,
4026                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4027                                                 (void *)items->type,
4028                                                 "eth header not found");
4029                         if (!eth->ether_type)
4030                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
4031                         break;
4032                 case RTE_FLOW_ITEM_TYPE_IPV4:
4033                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
4034                         if (!vlan && !eth)
4035                                 return rte_flow_error_set(error, EINVAL,
4036                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4037                                                 (void *)items->type,
4038                                                 "neither eth nor vlan"
4039                                                 " header found");
4040                         if (vlan && !vlan->eth_proto)
4041                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4042                         else if (eth && !eth->ether_type)
4043                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4044                         if (!ipv4->version_ihl)
4045                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
4046                                                     MLX5_ENCAP_IPV4_IHL_MIN;
4047                         if (!ipv4->time_to_live)
4048                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
4049                         break;
4050                 case RTE_FLOW_ITEM_TYPE_IPV6:
4051                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
4052                         if (!vlan && !eth)
4053                                 return rte_flow_error_set(error, EINVAL,
4054                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4055                                                 (void *)items->type,
4056                                                 "neither eth nor vlan"
4057                                                 " header found");
4058                         if (vlan && !vlan->eth_proto)
4059                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4060                         else if (eth && !eth->ether_type)
4061                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4062                         if (!ipv6->vtc_flow)
4063                                 ipv6->vtc_flow =
4064                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
4065                         if (!ipv6->hop_limits)
4066                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
4067                         break;
4068                 case RTE_FLOW_ITEM_TYPE_UDP:
4069                         udp = (struct rte_udp_hdr *)&buf[temp_size];
4070                         if (!ipv4 && !ipv6)
4071                                 return rte_flow_error_set(error, EINVAL,
4072                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4073                                                 (void *)items->type,
4074                                                 "ip header not found");
4075                         if (ipv4 && !ipv4->next_proto_id)
4076                                 ipv4->next_proto_id = IPPROTO_UDP;
4077                         else if (ipv6 && !ipv6->proto)
4078                                 ipv6->proto = IPPROTO_UDP;
4079                         break;
4080                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4081                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
4082                         if (!udp)
4083                                 return rte_flow_error_set(error, EINVAL,
4084                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4085                                                 (void *)items->type,
4086                                                 "udp header not found");
4087                         if (!udp->dst_port)
4088                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
4089                         if (!vxlan->vx_flags)
4090                                 vxlan->vx_flags =
4091                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
4092                         break;
4093                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4094                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
4095                         if (!udp)
4096                                 return rte_flow_error_set(error, EINVAL,
4097                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4098                                                 (void *)items->type,
4099                                                 "udp header not found");
4100                         if (!vxlan_gpe->proto)
4101                                 return rte_flow_error_set(error, EINVAL,
4102                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4103                                                 (void *)items->type,
4104                                                 "next protocol not found");
4105                         if (!udp->dst_port)
4106                                 udp->dst_port =
4107                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
4108                         if (!vxlan_gpe->vx_flags)
4109                                 vxlan_gpe->vx_flags =
4110                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
4111                         break;
4112                 case RTE_FLOW_ITEM_TYPE_GRE:
4113                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4114                         gre = (struct rte_gre_hdr *)&buf[temp_size];
4115                         if (!gre->proto)
4116                                 return rte_flow_error_set(error, EINVAL,
4117                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4118                                                 (void *)items->type,
4119                                                 "next protocol not found");
4120                         if (!ipv4 && !ipv6)
4121                                 return rte_flow_error_set(error, EINVAL,
4122                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4123                                                 (void *)items->type,
4124                                                 "ip header not found");
4125                         if (ipv4 && !ipv4->next_proto_id)
4126                                 ipv4->next_proto_id = IPPROTO_GRE;
4127                         else if (ipv6 && !ipv6->proto)
4128                                 ipv6->proto = IPPROTO_GRE;
4129                         break;
4130                 case RTE_FLOW_ITEM_TYPE_VOID:
4131                         break;
4132                 default:
4133                         return rte_flow_error_set(error, EINVAL,
4134                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4135                                                   (void *)items->type,
4136                                                   "unsupported item type");
4137                         break;
4138                 }
4139                 temp_size += len;
4140         }
4141         *size = temp_size;
4142         return 0;
4143 }
4144
4145 static int
4146 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
4147 {
4148         struct rte_ether_hdr *eth = NULL;
4149         struct rte_vlan_hdr *vlan = NULL;
4150         struct rte_ipv6_hdr *ipv6 = NULL;
4151         struct rte_udp_hdr *udp = NULL;
4152         char *next_hdr;
4153         uint16_t proto;
4154
4155         eth = (struct rte_ether_hdr *)data;
4156         next_hdr = (char *)(eth + 1);
4157         proto = RTE_BE16(eth->ether_type);
4158
4159         /* VLAN skipping */
4160         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
4161                 vlan = (struct rte_vlan_hdr *)next_hdr;
4162                 proto = RTE_BE16(vlan->eth_proto);
4163                 next_hdr += sizeof(struct rte_vlan_hdr);
4164         }
4165
4166         /* HW calculates IPv4 csum. no need to proceed */
4167         if (proto == RTE_ETHER_TYPE_IPV4)
4168                 return 0;
4169
4170         /* non IPv4/IPv6 header. not supported */
4171         if (proto != RTE_ETHER_TYPE_IPV6) {
4172                 return rte_flow_error_set(error, ENOTSUP,
4173                                           RTE_FLOW_ERROR_TYPE_ACTION,
4174                                           NULL, "Cannot offload non IPv4/IPv6");
4175         }
4176
4177         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
4178
4179         /* ignore non UDP */
4180         if (ipv6->proto != IPPROTO_UDP)
4181                 return 0;
4182
4183         udp = (struct rte_udp_hdr *)(ipv6 + 1);
4184         udp->dgram_cksum = 0;
4185
4186         return 0;
4187 }
4188
4189 /**
4190  * Convert L2 encap action to DV specification.
4191  *
4192  * @param[in] dev
4193  *   Pointer to rte_eth_dev structure.
4194  * @param[in] action
4195  *   Pointer to action structure.
4196  * @param[in, out] dev_flow
4197  *   Pointer to the mlx5_flow.
4198  * @param[in] transfer
4199  *   Mark if the flow is E-Switch flow.
4200  * @param[out] error
4201  *   Pointer to the error structure.
4202  *
4203  * @return
4204  *   0 on success, a negative errno value otherwise and rte_errno is set.
4205  */
4206 static int
4207 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
4208                                const struct rte_flow_action *action,
4209                                struct mlx5_flow *dev_flow,
4210                                uint8_t transfer,
4211                                struct rte_flow_error *error)
4212 {
4213         const struct rte_flow_item *encap_data;
4214         const struct rte_flow_action_raw_encap *raw_encap_data;
4215         struct mlx5_flow_dv_encap_decap_resource res = {
4216                 .reformat_type =
4217                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
4218                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4219                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
4220         };
4221
4222         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4223                 raw_encap_data =
4224                         (const struct rte_flow_action_raw_encap *)action->conf;
4225                 res.size = raw_encap_data->size;
4226                 memcpy(res.buf, raw_encap_data->data, res.size);
4227         } else {
4228                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
4229                         encap_data =
4230                                 ((const struct rte_flow_action_vxlan_encap *)
4231                                                 action->conf)->definition;
4232                 else
4233                         encap_data =
4234                                 ((const struct rte_flow_action_nvgre_encap *)
4235                                                 action->conf)->definition;
4236                 if (flow_dv_convert_encap_data(encap_data, res.buf,
4237                                                &res.size, error))
4238                         return -rte_errno;
4239         }
4240         if (flow_dv_zero_encap_udp_csum(res.buf, error))
4241                 return -rte_errno;
4242         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4243                 return rte_flow_error_set(error, EINVAL,
4244                                           RTE_FLOW_ERROR_TYPE_ACTION,
4245                                           NULL, "can't create L2 encap action");
4246         return 0;
4247 }
4248
4249 /**
4250  * Convert L2 decap action to DV specification.
4251  *
4252  * @param[in] dev
4253  *   Pointer to rte_eth_dev structure.
4254  * @param[in, out] dev_flow
4255  *   Pointer to the mlx5_flow.
4256  * @param[in] transfer
4257  *   Mark if the flow is E-Switch flow.
4258  * @param[out] error
4259  *   Pointer to the error structure.
4260  *
4261  * @return
4262  *   0 on success, a negative errno value otherwise and rte_errno is set.
4263  */
4264 static int
4265 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
4266                                struct mlx5_flow *dev_flow,
4267                                uint8_t transfer,
4268                                struct rte_flow_error *error)
4269 {
4270         struct mlx5_flow_dv_encap_decap_resource res = {
4271                 .size = 0,
4272                 .reformat_type =
4273                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
4274                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4275                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
4276         };
4277
4278         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4279                 return rte_flow_error_set(error, EINVAL,
4280                                           RTE_FLOW_ERROR_TYPE_ACTION,
4281                                           NULL, "can't create L2 decap action");
4282         return 0;
4283 }
4284
4285 /**
4286  * Convert raw decap/encap (L3 tunnel) action to DV specification.
4287  *
4288  * @param[in] dev
4289  *   Pointer to rte_eth_dev structure.
4290  * @param[in] action
4291  *   Pointer to action structure.
4292  * @param[in, out] dev_flow
4293  *   Pointer to the mlx5_flow.
4294  * @param[in] attr
4295  *   Pointer to the flow attributes.
4296  * @param[out] error
4297  *   Pointer to the error structure.
4298  *
4299  * @return
4300  *   0 on success, a negative errno value otherwise and rte_errno is set.
4301  */
4302 static int
4303 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
4304                                 const struct rte_flow_action *action,
4305                                 struct mlx5_flow *dev_flow,
4306                                 const struct rte_flow_attr *attr,
4307                                 struct rte_flow_error *error)
4308 {
4309         const struct rte_flow_action_raw_encap *encap_data;
4310         struct mlx5_flow_dv_encap_decap_resource res;
4311
4312         memset(&res, 0, sizeof(res));
4313         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
4314         res.size = encap_data->size;
4315         memcpy(res.buf, encap_data->data, res.size);
4316         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
4317                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
4318                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
4319         if (attr->transfer)
4320                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4321         else
4322                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4323                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4324         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4325                 return rte_flow_error_set(error, EINVAL,
4326                                           RTE_FLOW_ERROR_TYPE_ACTION,
4327                                           NULL, "can't create encap action");
4328         return 0;
4329 }
4330
4331 /**
4332  * Create action push VLAN.
4333  *
4334  * @param[in] dev
4335  *   Pointer to rte_eth_dev structure.
4336  * @param[in] attr
4337  *   Pointer to the flow attributes.
4338  * @param[in] vlan
4339  *   Pointer to the vlan to push to the Ethernet header.
4340  * @param[in, out] dev_flow
4341  *   Pointer to the mlx5_flow.
4342  * @param[out] error
4343  *   Pointer to the error structure.
4344  *
4345  * @return
4346  *   0 on success, a negative errno value otherwise and rte_errno is set.
4347  */
4348 static int
4349 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
4350                                 const struct rte_flow_attr *attr,
4351                                 const struct rte_vlan_hdr *vlan,
4352                                 struct mlx5_flow *dev_flow,
4353                                 struct rte_flow_error *error)
4354 {
4355         struct mlx5_flow_dv_push_vlan_action_resource res;
4356
4357         memset(&res, 0, sizeof(res));
4358         res.vlan_tag =
4359                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
4360                                  vlan->vlan_tci);
4361         if (attr->transfer)
4362                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4363         else
4364                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4365                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4366         return flow_dv_push_vlan_action_resource_register
4367                                             (dev, &res, dev_flow, error);
4368 }
4369
4370 /**
4371  * Validate the modify-header actions.
4372  *
4373  * @param[in] action_flags
4374  *   Holds the actions detected until now.
4375  * @param[in] action
4376  *   Pointer to the modify action.
4377  * @param[out] error
4378  *   Pointer to error structure.
4379  *
4380  * @return
4381  *   0 on success, a negative errno value otherwise and rte_errno is set.
4382  */
4383 static int
4384 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
4385                                    const struct rte_flow_action *action,
4386                                    struct rte_flow_error *error)
4387 {
4388         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
4389                 return rte_flow_error_set(error, EINVAL,
4390                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4391                                           NULL, "action configuration not set");
4392         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
4393                 return rte_flow_error_set(error, EINVAL,
4394                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4395                                           "can't have encap action before"
4396                                           " modify action");
4397         return 0;
4398 }
4399
4400 /**
4401  * Validate the modify-header MAC address actions.
4402  *
4403  * @param[in] action_flags
4404  *   Holds the actions detected until now.
4405  * @param[in] action
4406  *   Pointer to the modify action.
4407  * @param[in] item_flags
4408  *   Holds the items detected.
4409  * @param[out] error
4410  *   Pointer to error structure.
4411  *
4412  * @return
4413  *   0 on success, a negative errno value otherwise and rte_errno is set.
4414  */
4415 static int
4416 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
4417                                    const struct rte_flow_action *action,
4418                                    const uint64_t item_flags,
4419                                    struct rte_flow_error *error)
4420 {
4421         int ret = 0;
4422
4423         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4424         if (!ret) {
4425                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
4426                         return rte_flow_error_set(error, EINVAL,
4427                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4428                                                   NULL,
4429                                                   "no L2 item in pattern");
4430         }
4431         return ret;
4432 }
4433
4434 /**
4435  * Validate the modify-header IPv4 address actions.
4436  *
4437  * @param[in] action_flags
4438  *   Holds the actions detected until now.
4439  * @param[in] action
4440  *   Pointer to the modify action.
4441  * @param[in] item_flags
4442  *   Holds the items detected.
4443  * @param[out] error
4444  *   Pointer to error structure.
4445  *
4446  * @return
4447  *   0 on success, a negative errno value otherwise and rte_errno is set.
4448  */
4449 static int
4450 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
4451                                     const struct rte_flow_action *action,
4452                                     const uint64_t item_flags,
4453                                     struct rte_flow_error *error)
4454 {
4455         int ret = 0;
4456         uint64_t layer;
4457
4458         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4459         if (!ret) {
4460                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4461                                  MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4462                                  MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4463                 if (!(item_flags & layer))
4464                         return rte_flow_error_set(error, EINVAL,
4465                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4466                                                   NULL,
4467                                                   "no ipv4 item in pattern");
4468         }
4469         return ret;
4470 }
4471
4472 /**
4473  * Validate the modify-header IPv6 address actions.
4474  *
4475  * @param[in] action_flags
4476  *   Holds the actions detected until now.
4477  * @param[in] action
4478  *   Pointer to the modify action.
4479  * @param[in] item_flags
4480  *   Holds the items detected.
4481  * @param[out] error
4482  *   Pointer to error structure.
4483  *
4484  * @return
4485  *   0 on success, a negative errno value otherwise and rte_errno is set.
4486  */
4487 static int
4488 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
4489                                     const struct rte_flow_action *action,
4490                                     const uint64_t item_flags,
4491                                     struct rte_flow_error *error)
4492 {
4493         int ret = 0;
4494         uint64_t layer;
4495
4496         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4497         if (!ret) {
4498                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4499                                  MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4500                                  MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4501                 if (!(item_flags & layer))
4502                         return rte_flow_error_set(error, EINVAL,
4503                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4504                                                   NULL,
4505                                                   "no ipv6 item in pattern");
4506         }
4507         return ret;
4508 }
4509
4510 /**
4511  * Validate the modify-header TP actions.
4512  *
4513  * @param[in] action_flags
4514  *   Holds the actions detected until now.
4515  * @param[in] action
4516  *   Pointer to the modify action.
4517  * @param[in] item_flags
4518  *   Holds the items detected.
4519  * @param[out] error
4520  *   Pointer to error structure.
4521  *
4522  * @return
4523  *   0 on success, a negative errno value otherwise and rte_errno is set.
4524  */
4525 static int
4526 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
4527                                   const struct rte_flow_action *action,
4528                                   const uint64_t item_flags,
4529                                   struct rte_flow_error *error)
4530 {
4531         int ret = 0;
4532         uint64_t layer;
4533
4534         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4535         if (!ret) {
4536                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4537                                  MLX5_FLOW_LAYER_INNER_L4 :
4538                                  MLX5_FLOW_LAYER_OUTER_L4;
4539                 if (!(item_flags & layer))
4540                         return rte_flow_error_set(error, EINVAL,
4541                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4542                                                   NULL, "no transport layer "
4543                                                   "in pattern");
4544         }
4545         return ret;
4546 }
4547
4548 /**
4549  * Validate the modify-header actions of increment/decrement
4550  * TCP Sequence-number.
4551  *
4552  * @param[in] action_flags
4553  *   Holds the actions detected until now.
4554  * @param[in] action
4555  *   Pointer to the modify action.
4556  * @param[in] item_flags
4557  *   Holds the items detected.
4558  * @param[out] error
4559  *   Pointer to error structure.
4560  *
4561  * @return
4562  *   0 on success, a negative errno value otherwise and rte_errno is set.
4563  */
4564 static int
4565 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
4566                                        const struct rte_flow_action *action,
4567                                        const uint64_t item_flags,
4568                                        struct rte_flow_error *error)
4569 {
4570         int ret = 0;
4571         uint64_t layer;
4572
4573         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4574         if (!ret) {
4575                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4576                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
4577                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
4578                 if (!(item_flags & layer))
4579                         return rte_flow_error_set(error, EINVAL,
4580                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4581                                                   NULL, "no TCP item in"
4582                                                   " pattern");
4583                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
4584                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
4585                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
4586                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
4587                         return rte_flow_error_set(error, EINVAL,
4588                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4589                                                   NULL,
4590                                                   "cannot decrease and increase"
4591                                                   " TCP sequence number"
4592                                                   " at the same time");
4593         }
4594         return ret;
4595 }
4596
4597 /**
4598  * Validate the modify-header actions of increment/decrement
4599  * TCP Acknowledgment number.
4600  *
4601  * @param[in] action_flags
4602  *   Holds the actions detected until now.
4603  * @param[in] action
4604  *   Pointer to the modify action.
4605  * @param[in] item_flags
4606  *   Holds the items detected.
4607  * @param[out] error
4608  *   Pointer to error structure.
4609  *
4610  * @return
4611  *   0 on success, a negative errno value otherwise and rte_errno is set.
4612  */
4613 static int
4614 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
4615                                        const struct rte_flow_action *action,
4616                                        const uint64_t item_flags,
4617                                        struct rte_flow_error *error)
4618 {
4619         int ret = 0;
4620         uint64_t layer;
4621
4622         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4623         if (!ret) {
4624                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4625                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
4626                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
4627                 if (!(item_flags & layer))
4628                         return rte_flow_error_set(error, EINVAL,
4629                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4630                                                   NULL, "no TCP item in"
4631                                                   " pattern");
4632                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
4633                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
4634                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
4635                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
4636                         return rte_flow_error_set(error, EINVAL,
4637                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4638                                                   NULL,
4639                                                   "cannot decrease and increase"
4640                                                   " TCP acknowledgment number"
4641                                                   " at the same time");
4642         }
4643         return ret;
4644 }
4645
4646 /**
4647  * Validate the modify-header TTL actions.
4648  *
4649  * @param[in] action_flags
4650  *   Holds the actions detected until now.
4651  * @param[in] action
4652  *   Pointer to the modify action.
4653  * @param[in] item_flags
4654  *   Holds the items detected.
4655  * @param[out] error
4656  *   Pointer to error structure.
4657  *
4658  * @return
4659  *   0 on success, a negative errno value otherwise and rte_errno is set.
4660  */
4661 static int
4662 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
4663                                    const struct rte_flow_action *action,
4664                                    const uint64_t item_flags,
4665                                    struct rte_flow_error *error)
4666 {
4667         int ret = 0;
4668         uint64_t layer;
4669
4670         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4671         if (!ret) {
4672                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4673                                  MLX5_FLOW_LAYER_INNER_L3 :
4674                                  MLX5_FLOW_LAYER_OUTER_L3;
4675                 if (!(item_flags & layer))
4676                         return rte_flow_error_set(error, EINVAL,
4677                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4678                                                   NULL,
4679                                                   "no IP protocol in pattern");
4680         }
4681         return ret;
4682 }
4683
4684 /**
4685  * Validate the generic modify field actions.
4686  * @param[in] dev
4687  *   Pointer to the rte_eth_dev structure.
4688  * @param[in] action_flags
4689  *   Holds the actions detected until now.
4690  * @param[in] action
4691  *   Pointer to the modify action.
4692  * @param[in] attr
4693  *   Pointer to the flow attributes.
4694  * @param[out] error
4695  *   Pointer to error structure.
4696  *
4697  * @return
4698  *   Number of header fields to modify (0 or more) on success,
4699  *   a negative errno value otherwise and rte_errno is set.
4700  */
4701 static int
4702 flow_dv_validate_action_modify_field(struct rte_eth_dev *dev,
4703                                    const uint64_t action_flags,
4704                                    const struct rte_flow_action *action,
4705                                    const struct rte_flow_attr *attr,
4706                                    struct rte_flow_error *error)
4707 {
4708         int ret = 0;
4709         struct mlx5_priv *priv = dev->data->dev_private;
4710         struct mlx5_dev_config *config = &priv->config;
4711         const struct rte_flow_action_modify_field *action_modify_field =
4712                 action->conf;
4713         uint32_t dst_width =
4714                 mlx5_flow_item_field_width(action_modify_field->dst.field);
4715         uint32_t src_width =
4716                 mlx5_flow_item_field_width(action_modify_field->src.field);
4717
4718         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4719         if (ret)
4720                 return ret;
4721
4722         if (action_modify_field->width == 0)
4723                 return rte_flow_error_set(error, EINVAL,
4724                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4725                                 "no bits are requested to be modified");
4726         else if (action_modify_field->width > dst_width ||
4727                  action_modify_field->width > src_width)
4728                 return rte_flow_error_set(error, EINVAL,
4729                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4730                                 "cannot modify more bits than"
4731                                 " the width of a field");
4732         if (action_modify_field->dst.field != RTE_FLOW_FIELD_VALUE &&
4733             action_modify_field->dst.field != RTE_FLOW_FIELD_POINTER) {
4734                 if ((action_modify_field->dst.offset +
4735                      action_modify_field->width > dst_width) ||
4736                     (action_modify_field->dst.offset % 32))
4737                         return rte_flow_error_set(error, EINVAL,
4738                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4739                                         "destination offset is too big"
4740                                         " or not aligned to 4 bytes");
4741                 if (action_modify_field->dst.level &&
4742                     action_modify_field->dst.field != RTE_FLOW_FIELD_TAG)
4743                         return rte_flow_error_set(error, ENOTSUP,
4744                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4745                                         "inner header fields modification"
4746                                         " is not supported");
4747         }
4748         if (action_modify_field->src.field != RTE_FLOW_FIELD_VALUE &&
4749             action_modify_field->src.field != RTE_FLOW_FIELD_POINTER) {
4750                 if (!attr->transfer && !attr->group)
4751                         return rte_flow_error_set(error, ENOTSUP,
4752                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4753                                         "modify field action is not"
4754                                         " supported for group 0");
4755                 if ((action_modify_field->src.offset +
4756                      action_modify_field->width > src_width) ||
4757                     (action_modify_field->src.offset % 32))
4758                         return rte_flow_error_set(error, EINVAL,
4759                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4760                                         "source offset is too big"
4761                                         " or not aligned to 4 bytes");
4762                 if (action_modify_field->src.level &&
4763                     action_modify_field->src.field != RTE_FLOW_FIELD_TAG)
4764                         return rte_flow_error_set(error, ENOTSUP,
4765                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4766                                         "inner header fields modification"
4767                                         " is not supported");
4768         }
4769         if (action_modify_field->dst.field ==
4770             action_modify_field->src.field)
4771                 return rte_flow_error_set(error, EINVAL,
4772                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4773                                 "source and destination fields"
4774                                 " cannot be the same");
4775         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VALUE ||
4776             action_modify_field->dst.field == RTE_FLOW_FIELD_POINTER)
4777                 return rte_flow_error_set(error, EINVAL,
4778                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4779                                 "immediate value or a pointer to it"
4780                                 " cannot be used as a destination");
4781         if (action_modify_field->dst.field == RTE_FLOW_FIELD_START ||
4782             action_modify_field->src.field == RTE_FLOW_FIELD_START)
4783                 return rte_flow_error_set(error, ENOTSUP,
4784                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4785                                 "modifications of an arbitrary"
4786                                 " place in a packet is not supported");
4787         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VLAN_TYPE ||
4788             action_modify_field->src.field == RTE_FLOW_FIELD_VLAN_TYPE)
4789                 return rte_flow_error_set(error, ENOTSUP,
4790                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4791                                 "modifications of the 802.1Q Tag"
4792                                 " Identifier is not supported");
4793         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VXLAN_VNI ||
4794             action_modify_field->src.field == RTE_FLOW_FIELD_VXLAN_VNI)
4795                 return rte_flow_error_set(error, ENOTSUP,
4796                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4797                                 "modifications of the VXLAN Network"
4798                                 " Identifier is not supported");
4799         if (action_modify_field->dst.field == RTE_FLOW_FIELD_GENEVE_VNI ||
4800             action_modify_field->src.field == RTE_FLOW_FIELD_GENEVE_VNI)
4801                 return rte_flow_error_set(error, ENOTSUP,
4802                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4803                                 "modifications of the GENEVE Network"
4804                                 " Identifier is not supported");
4805         if (action_modify_field->dst.field == RTE_FLOW_FIELD_MARK ||
4806             action_modify_field->src.field == RTE_FLOW_FIELD_MARK ||
4807             action_modify_field->dst.field == RTE_FLOW_FIELD_META ||
4808             action_modify_field->src.field == RTE_FLOW_FIELD_META) {
4809                 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4810                     !mlx5_flow_ext_mreg_supported(dev))
4811                         return rte_flow_error_set(error, ENOTSUP,
4812                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4813                                         "cannot modify mark or metadata without"
4814                                         " extended metadata register support");
4815         }
4816         if (action_modify_field->operation != RTE_FLOW_MODIFY_SET)
4817                 return rte_flow_error_set(error, ENOTSUP,
4818                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4819                                 "add and sub operations"
4820                                 " are not supported");
4821         return (action_modify_field->width / 32) +
4822                !!(action_modify_field->width % 32);
4823 }
4824
4825 /**
4826  * Validate jump action.
4827  *
4828  * @param[in] action
4829  *   Pointer to the jump action.
4830  * @param[in] action_flags
4831  *   Holds the actions detected until now.
4832  * @param[in] attributes
4833  *   Pointer to flow attributes
4834  * @param[in] external
4835  *   Action belongs to flow rule created by request external to PMD.
4836  * @param[out] error
4837  *   Pointer to error structure.
4838  *
4839  * @return
4840  *   0 on success, a negative errno value otherwise and rte_errno is set.
4841  */
4842 static int
4843 flow_dv_validate_action_jump(struct rte_eth_dev *dev,
4844                              const struct mlx5_flow_tunnel *tunnel,
4845                              const struct rte_flow_action *action,
4846                              uint64_t action_flags,
4847                              const struct rte_flow_attr *attributes,
4848                              bool external, struct rte_flow_error *error)
4849 {
4850         uint32_t target_group, table;
4851         int ret = 0;
4852         struct flow_grp_info grp_info = {
4853                 .external = !!external,
4854                 .transfer = !!attributes->transfer,
4855                 .fdb_def_rule = 1,
4856                 .std_tbl_fix = 0
4857         };
4858         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
4859                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
4860                 return rte_flow_error_set(error, EINVAL,
4861                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4862                                           "can't have 2 fate actions in"
4863                                           " same flow");
4864         if (!action->conf)
4865                 return rte_flow_error_set(error, EINVAL,
4866                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4867                                           NULL, "action configuration not set");
4868         target_group =
4869                 ((const struct rte_flow_action_jump *)action->conf)->group;
4870         ret = mlx5_flow_group_to_table(dev, tunnel, target_group, &table,
4871                                        &grp_info, error);
4872         if (ret)
4873                 return ret;
4874         if (attributes->group == target_group &&
4875             !(action_flags & (MLX5_FLOW_ACTION_TUNNEL_SET |
4876                               MLX5_FLOW_ACTION_TUNNEL_MATCH)))
4877                 return rte_flow_error_set(error, EINVAL,
4878                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4879                                           "target group must be other than"
4880                                           " the current flow group");
4881         return 0;
4882 }
4883
4884 /*
4885  * Validate the port_id action.
4886  *
4887  * @param[in] dev
4888  *   Pointer to rte_eth_dev structure.
4889  * @param[in] action_flags
4890  *   Bit-fields that holds the actions detected until now.
4891  * @param[in] action
4892  *   Port_id RTE action structure.
4893  * @param[in] attr
4894  *   Attributes of flow that includes this action.
4895  * @param[out] error
4896  *   Pointer to error structure.
4897  *
4898  * @return
4899  *   0 on success, a negative errno value otherwise and rte_errno is set.
4900  */
4901 static int
4902 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
4903                                 uint64_t action_flags,
4904                                 const struct rte_flow_action *action,
4905                                 const struct rte_flow_attr *attr,
4906                                 struct rte_flow_error *error)
4907 {
4908         const struct rte_flow_action_port_id *port_id;
4909         struct mlx5_priv *act_priv;
4910         struct mlx5_priv *dev_priv;
4911         uint16_t port;
4912
4913         if (!attr->transfer)
4914                 return rte_flow_error_set(error, ENOTSUP,
4915                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4916                                           NULL,
4917                                           "port id action is valid in transfer"
4918                                           " mode only");
4919         if (!action || !action->conf)
4920                 return rte_flow_error_set(error, ENOTSUP,
4921                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4922                                           NULL,
4923                                           "port id action parameters must be"
4924                                           " specified");
4925         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
4926                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
4927                 return rte_flow_error_set(error, EINVAL,
4928                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4929                                           "can have only one fate actions in"
4930                                           " a flow");
4931         dev_priv = mlx5_dev_to_eswitch_info(dev);
4932         if (!dev_priv)
4933                 return rte_flow_error_set(error, rte_errno,
4934                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4935                                           NULL,
4936                                           "failed to obtain E-Switch info");
4937         port_id = action->conf;
4938         port = port_id->original ? dev->data->port_id : port_id->id;
4939         act_priv = mlx5_port_to_eswitch_info(port, false);
4940         if (!act_priv)
4941                 return rte_flow_error_set
4942                                 (error, rte_errno,
4943                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
4944                                  "failed to obtain E-Switch port id for port");
4945         if (act_priv->domain_id != dev_priv->domain_id)
4946                 return rte_flow_error_set
4947                                 (error, EINVAL,
4948                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4949                                  "port does not belong to"
4950                                  " E-Switch being configured");
4951         return 0;
4952 }
4953
4954 /**
4955  * Get the maximum number of modify header actions.
4956  *
4957  * @param dev
4958  *   Pointer to rte_eth_dev structure.
4959  * @param flags
4960  *   Flags bits to check if root level.
4961  *
4962  * @return
4963  *   Max number of modify header actions device can support.
4964  */
4965 static inline unsigned int
4966 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev __rte_unused,
4967                               uint64_t flags)
4968 {
4969         /*
4970          * There's no way to directly query the max capacity from FW.
4971          * The maximal value on root table should be assumed to be supported.
4972          */
4973         if (!(flags & MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL))
4974                 return MLX5_MAX_MODIFY_NUM;
4975         else
4976                 return MLX5_ROOT_TBL_MODIFY_NUM;
4977 }
4978
4979 /**
4980  * Validate the meter action.
4981  *
4982  * @param[in] dev
4983  *   Pointer to rte_eth_dev structure.
4984  * @param[in] action_flags
4985  *   Bit-fields that holds the actions detected until now.
4986  * @param[in] action
4987  *   Pointer to the meter action.
4988  * @param[in] attr
4989  *   Attributes of flow that includes this action.
4990  * @param[out] error
4991  *   Pointer to error structure.
4992  *
4993  * @return
4994  *   0 on success, a negative errno value otherwise and rte_ernno is set.
4995  */
4996 static int
4997 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
4998                                 uint64_t action_flags,
4999                                 const struct rte_flow_action *action,
5000                                 const struct rte_flow_attr *attr,
5001                                 bool *def_policy,
5002                                 struct rte_flow_error *error)
5003 {
5004         struct mlx5_priv *priv = dev->data->dev_private;
5005         const struct rte_flow_action_meter *am = action->conf;
5006         struct mlx5_flow_meter_info *fm;
5007         struct mlx5_flow_meter_policy *mtr_policy;
5008         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
5009
5010         if (!am)
5011                 return rte_flow_error_set(error, EINVAL,
5012                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5013                                           "meter action conf is NULL");
5014
5015         if (action_flags & MLX5_FLOW_ACTION_METER)
5016                 return rte_flow_error_set(error, ENOTSUP,
5017                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5018                                           "meter chaining not support");
5019         if (action_flags & MLX5_FLOW_ACTION_JUMP)
5020                 return rte_flow_error_set(error, ENOTSUP,
5021                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5022                                           "meter with jump not support");
5023         if (!priv->mtr_en)
5024                 return rte_flow_error_set(error, ENOTSUP,
5025                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5026                                           NULL,
5027                                           "meter action not supported");
5028         fm = mlx5_flow_meter_find(priv, am->mtr_id, NULL);
5029         if (!fm)
5030                 return rte_flow_error_set(error, EINVAL,
5031                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5032                                           "Meter not found");
5033         /* aso meter can always be shared by different domains */
5034         if (fm->ref_cnt && !priv->sh->meter_aso_en &&
5035             !(fm->transfer == attr->transfer ||
5036               (!fm->ingress && !attr->ingress && attr->egress) ||
5037               (!fm->egress && !attr->egress && attr->ingress)))
5038                 return rte_flow_error_set(error, EINVAL,
5039                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5040                         "Flow attributes domain are either invalid "
5041                         "or have a domain conflict with current "
5042                         "meter attributes");
5043         if (fm->def_policy) {
5044                 if (!((attr->transfer &&
5045                         mtrmng->def_policy[MLX5_MTR_DOMAIN_TRANSFER]) ||
5046                         (attr->egress &&
5047                         mtrmng->def_policy[MLX5_MTR_DOMAIN_EGRESS]) ||
5048                         (attr->ingress &&
5049                         mtrmng->def_policy[MLX5_MTR_DOMAIN_INGRESS])))
5050                         return rte_flow_error_set(error, EINVAL,
5051                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5052                                           "Flow attributes domain "
5053                                           "have a conflict with current "
5054                                           "meter domain attributes");
5055                 *def_policy = true;
5056         } else {
5057                 mtr_policy = mlx5_flow_meter_policy_find(dev,
5058                                                 fm->policy_id, NULL);
5059                 if (!mtr_policy)
5060                         return rte_flow_error_set(error, EINVAL,
5061                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5062                                           "Invalid policy id for meter ");
5063                 if (!((attr->transfer && mtr_policy->transfer) ||
5064                         (attr->egress && mtr_policy->egress) ||
5065                         (attr->ingress && mtr_policy->ingress)))
5066                         return rte_flow_error_set(error, EINVAL,
5067                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5068                                           "Flow attributes domain "
5069                                           "have a conflict with current "
5070                                           "meter domain attributes");
5071                 *def_policy = false;
5072         }
5073         return 0;
5074 }
5075
5076 /**
5077  * Validate the age action.
5078  *
5079  * @param[in] action_flags
5080  *   Holds the actions detected until now.
5081  * @param[in] action
5082  *   Pointer to the age action.
5083  * @param[in] dev
5084  *   Pointer to the Ethernet device structure.
5085  * @param[out] error
5086  *   Pointer to error structure.
5087  *
5088  * @return
5089  *   0 on success, a negative errno value otherwise and rte_errno is set.
5090  */
5091 static int
5092 flow_dv_validate_action_age(uint64_t action_flags,
5093                             const struct rte_flow_action *action,
5094                             struct rte_eth_dev *dev,
5095                             struct rte_flow_error *error)
5096 {
5097         struct mlx5_priv *priv = dev->data->dev_private;
5098         const struct rte_flow_action_age *age = action->conf;
5099
5100         if (!priv->config.devx || (priv->sh->cmng.counter_fallback &&
5101             !priv->sh->aso_age_mng))
5102                 return rte_flow_error_set(error, ENOTSUP,
5103                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5104                                           NULL,
5105                                           "age action not supported");
5106         if (!(action->conf))
5107                 return rte_flow_error_set(error, EINVAL,
5108                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5109                                           "configuration cannot be null");
5110         if (!(age->timeout))
5111                 return rte_flow_error_set(error, EINVAL,
5112                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5113                                           "invalid timeout value 0");
5114         if (action_flags & MLX5_FLOW_ACTION_AGE)
5115                 return rte_flow_error_set(error, EINVAL,
5116                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5117                                           "duplicate age actions set");
5118         return 0;
5119 }
5120
5121 /**
5122  * Validate the modify-header IPv4 DSCP actions.
5123  *
5124  * @param[in] action_flags
5125  *   Holds the actions detected until now.
5126  * @param[in] action
5127  *   Pointer to the modify action.
5128  * @param[in] item_flags
5129  *   Holds the items detected.
5130  * @param[out] error
5131  *   Pointer to error structure.
5132  *
5133  * @return
5134  *   0 on success, a negative errno value otherwise and rte_errno is set.
5135  */
5136 static int
5137 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
5138                                          const struct rte_flow_action *action,
5139                                          const uint64_t item_flags,
5140                                          struct rte_flow_error *error)
5141 {
5142         int ret = 0;
5143
5144         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5145         if (!ret) {
5146                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
5147                         return rte_flow_error_set(error, EINVAL,
5148                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5149                                                   NULL,
5150                                                   "no ipv4 item in pattern");
5151         }
5152         return ret;
5153 }
5154
5155 /**
5156  * Validate the modify-header IPv6 DSCP actions.
5157  *
5158  * @param[in] action_flags
5159  *   Holds the actions detected until now.
5160  * @param[in] action
5161  *   Pointer to the modify action.
5162  * @param[in] item_flags
5163  *   Holds the items detected.
5164  * @param[out] error
5165  *   Pointer to error structure.
5166  *
5167  * @return
5168  *   0 on success, a negative errno value otherwise and rte_errno is set.
5169  */
5170 static int
5171 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
5172                                          const struct rte_flow_action *action,
5173                                          const uint64_t item_flags,
5174                                          struct rte_flow_error *error)
5175 {
5176         int ret = 0;
5177
5178         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5179         if (!ret) {
5180                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
5181                         return rte_flow_error_set(error, EINVAL,
5182                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5183                                                   NULL,
5184                                                   "no ipv6 item in pattern");
5185         }
5186         return ret;
5187 }
5188
5189 /**
5190  * Match modify-header resource.
5191  *
5192  * @param list
5193  *   Pointer to the hash list.
5194  * @param entry
5195  *   Pointer to exist resource entry object.
5196  * @param key
5197  *   Key of the new entry.
5198  * @param ctx
5199  *   Pointer to new modify-header resource.
5200  *
5201  * @return
5202  *   0 on matching, non-zero otherwise.
5203  */
5204 int
5205 flow_dv_modify_match_cb(struct mlx5_hlist *list __rte_unused,
5206                         struct mlx5_hlist_entry *entry,
5207                         uint64_t key __rte_unused, void *cb_ctx)
5208 {
5209         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5210         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5211         struct mlx5_flow_dv_modify_hdr_resource *resource =
5212                         container_of(entry, typeof(*resource), entry);
5213         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5214
5215         key_len += ref->actions_num * sizeof(ref->actions[0]);
5216         return ref->actions_num != resource->actions_num ||
5217                memcmp(&ref->ft_type, &resource->ft_type, key_len);
5218 }
5219
5220 struct mlx5_hlist_entry *
5221 flow_dv_modify_create_cb(struct mlx5_hlist *list, uint64_t key __rte_unused,
5222                          void *cb_ctx)
5223 {
5224         struct mlx5_dev_ctx_shared *sh = list->ctx;
5225         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5226         struct mlx5dv_dr_domain *ns;
5227         struct mlx5_flow_dv_modify_hdr_resource *entry;
5228         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5229         int ret;
5230         uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5231         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5232
5233         entry = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*entry) + data_len, 0,
5234                             SOCKET_ID_ANY);
5235         if (!entry) {
5236                 rte_flow_error_set(ctx->error, ENOMEM,
5237                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5238                                    "cannot allocate resource memory");
5239                 return NULL;
5240         }
5241         rte_memcpy(&entry->ft_type,
5242                    RTE_PTR_ADD(ref, offsetof(typeof(*ref), ft_type)),
5243                    key_len + data_len);
5244         if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
5245                 ns = sh->fdb_domain;
5246         else if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
5247                 ns = sh->tx_domain;
5248         else
5249                 ns = sh->rx_domain;
5250         ret = mlx5_flow_os_create_flow_action_modify_header
5251                                         (sh->ctx, ns, entry,
5252                                          data_len, &entry->action);
5253         if (ret) {
5254                 mlx5_free(entry);
5255                 rte_flow_error_set(ctx->error, ENOMEM,
5256                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5257                                    NULL, "cannot create modification action");
5258                 return NULL;
5259         }
5260         return &entry->entry;
5261 }
5262
5263 /**
5264  * Validate the sample action.
5265  *
5266  * @param[in, out] action_flags
5267  *   Holds the actions detected until now.
5268  * @param[in] action
5269  *   Pointer to the sample action.
5270  * @param[in] dev
5271  *   Pointer to the Ethernet device structure.
5272  * @param[in] attr
5273  *   Attributes of flow that includes this action.
5274  * @param[in] item_flags
5275  *   Holds the items detected.
5276  * @param[in] rss
5277  *   Pointer to the RSS action.
5278  * @param[out] sample_rss
5279  *   Pointer to the RSS action in sample action list.
5280  * @param[out] count
5281  *   Pointer to the COUNT action in sample action list.
5282  * @param[out] fdb_mirror_limit
5283  *   Pointer to the FDB mirror limitation flag.
5284  * @param[out] error
5285  *   Pointer to error structure.
5286  *
5287  * @return
5288  *   0 on success, a negative errno value otherwise and rte_errno is set.
5289  */
5290 static int
5291 flow_dv_validate_action_sample(uint64_t *action_flags,
5292                                const struct rte_flow_action *action,
5293                                struct rte_eth_dev *dev,
5294                                const struct rte_flow_attr *attr,
5295                                uint64_t item_flags,
5296                                const struct rte_flow_action_rss *rss,
5297                                const struct rte_flow_action_rss **sample_rss,
5298                                const struct rte_flow_action_count **count,
5299                                int *fdb_mirror_limit,
5300                                struct rte_flow_error *error)
5301 {
5302         struct mlx5_priv *priv = dev->data->dev_private;
5303         struct mlx5_dev_config *dev_conf = &priv->config;
5304         const struct rte_flow_action_sample *sample = action->conf;
5305         const struct rte_flow_action *act;
5306         uint64_t sub_action_flags = 0;
5307         uint16_t queue_index = 0xFFFF;
5308         int actions_n = 0;
5309         int ret;
5310
5311         if (!sample)
5312                 return rte_flow_error_set(error, EINVAL,
5313                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5314                                           "configuration cannot be NULL");
5315         if (sample->ratio == 0)
5316                 return rte_flow_error_set(error, EINVAL,
5317                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5318                                           "ratio value starts from 1");
5319         if (!priv->config.devx || (sample->ratio > 0 && !priv->sampler_en))
5320                 return rte_flow_error_set(error, ENOTSUP,
5321                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5322                                           NULL,
5323                                           "sample action not supported");
5324         if (*action_flags & MLX5_FLOW_ACTION_SAMPLE)
5325                 return rte_flow_error_set(error, EINVAL,
5326                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5327                                           "Multiple sample actions not "
5328                                           "supported");
5329         if (*action_flags & MLX5_FLOW_ACTION_METER)
5330                 return rte_flow_error_set(error, EINVAL,
5331                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5332                                           "wrong action order, meter should "
5333                                           "be after sample action");
5334         if (*action_flags & MLX5_FLOW_ACTION_JUMP)
5335                 return rte_flow_error_set(error, EINVAL,
5336                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5337                                           "wrong action order, jump should "
5338                                           "be after sample action");
5339         act = sample->actions;
5340         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
5341                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
5342                         return rte_flow_error_set(error, ENOTSUP,
5343                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5344                                                   act, "too many actions");
5345                 switch (act->type) {
5346                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5347                         ret = mlx5_flow_validate_action_queue(act,
5348                                                               sub_action_flags,
5349                                                               dev,
5350                                                               attr, error);
5351                         if (ret < 0)
5352                                 return ret;
5353                         queue_index = ((const struct rte_flow_action_queue *)
5354                                                         (act->conf))->index;
5355                         sub_action_flags |= MLX5_FLOW_ACTION_QUEUE;
5356                         ++actions_n;
5357                         break;
5358                 case RTE_FLOW_ACTION_TYPE_RSS:
5359                         *sample_rss = act->conf;
5360                         ret = mlx5_flow_validate_action_rss(act,
5361                                                             sub_action_flags,
5362                                                             dev, attr,
5363                                                             item_flags,
5364                                                             error);
5365                         if (ret < 0)
5366                                 return ret;
5367                         if (rss && *sample_rss &&
5368                             ((*sample_rss)->level != rss->level ||
5369                             (*sample_rss)->types != rss->types))
5370                                 return rte_flow_error_set(error, ENOTSUP,
5371                                         RTE_FLOW_ERROR_TYPE_ACTION,
5372                                         NULL,
5373                                         "Can't use the different RSS types "
5374                                         "or level in the same flow");
5375                         if (*sample_rss != NULL && (*sample_rss)->queue_num)
5376                                 queue_index = (*sample_rss)->queue[0];
5377                         sub_action_flags |= MLX5_FLOW_ACTION_RSS;
5378                         ++actions_n;
5379                         break;
5380                 case RTE_FLOW_ACTION_TYPE_MARK:
5381                         ret = flow_dv_validate_action_mark(dev, act,
5382                                                            sub_action_flags,
5383                                                            attr, error);
5384                         if (ret < 0)
5385                                 return ret;
5386                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
5387                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK |
5388                                                 MLX5_FLOW_ACTION_MARK_EXT;
5389                         else
5390                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK;
5391                         ++actions_n;
5392                         break;
5393                 case RTE_FLOW_ACTION_TYPE_COUNT:
5394                         ret = flow_dv_validate_action_count
5395                                 (dev, is_shared_action_count(act),
5396                                  *action_flags | sub_action_flags,
5397                                  error);
5398                         if (ret < 0)
5399                                 return ret;
5400                         *count = act->conf;
5401                         sub_action_flags |= MLX5_FLOW_ACTION_COUNT;
5402                         *action_flags |= MLX5_FLOW_ACTION_COUNT;
5403                         ++actions_n;
5404                         break;
5405                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5406                         ret = flow_dv_validate_action_port_id(dev,
5407                                                               sub_action_flags,
5408                                                               act,
5409                                                               attr,
5410                                                               error);
5411                         if (ret)
5412                                 return ret;
5413                         sub_action_flags |= MLX5_FLOW_ACTION_PORT_ID;
5414                         ++actions_n;
5415                         break;
5416                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5417                         ret = flow_dv_validate_action_raw_encap_decap
5418                                 (dev, NULL, act->conf, attr, &sub_action_flags,
5419                                  &actions_n, action, item_flags, error);
5420                         if (ret < 0)
5421                                 return ret;
5422                         ++actions_n;
5423                         break;
5424                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5425                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5426                         ret = flow_dv_validate_action_l2_encap(dev,
5427                                                                sub_action_flags,
5428                                                                act, attr,
5429                                                                error);
5430                         if (ret < 0)
5431                                 return ret;
5432                         sub_action_flags |= MLX5_FLOW_ACTION_ENCAP;
5433                         ++actions_n;
5434                         break;
5435                 default:
5436                         return rte_flow_error_set(error, ENOTSUP,
5437                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5438                                                   NULL,
5439                                                   "Doesn't support optional "
5440                                                   "action");
5441                 }
5442         }
5443         if (attr->ingress && !attr->transfer) {
5444                 if (!(sub_action_flags & (MLX5_FLOW_ACTION_QUEUE |
5445                                           MLX5_FLOW_ACTION_RSS)))
5446                         return rte_flow_error_set(error, EINVAL,
5447                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5448                                                   NULL,
5449                                                   "Ingress must has a dest "
5450                                                   "QUEUE for Sample");
5451         } else if (attr->egress && !attr->transfer) {
5452                 return rte_flow_error_set(error, ENOTSUP,
5453                                           RTE_FLOW_ERROR_TYPE_ACTION,
5454                                           NULL,
5455                                           "Sample Only support Ingress "
5456                                           "or E-Switch");
5457         } else if (sample->actions->type != RTE_FLOW_ACTION_TYPE_END) {
5458                 MLX5_ASSERT(attr->transfer);
5459                 if (sample->ratio > 1)
5460                         return rte_flow_error_set(error, ENOTSUP,
5461                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5462                                                   NULL,
5463                                                   "E-Switch doesn't support "
5464                                                   "any optional action "
5465                                                   "for sampling");
5466                 if (sub_action_flags & MLX5_FLOW_ACTION_QUEUE)
5467                         return rte_flow_error_set(error, ENOTSUP,
5468                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5469                                                   NULL,
5470                                                   "unsupported action QUEUE");
5471                 if (sub_action_flags & MLX5_FLOW_ACTION_RSS)
5472                         return rte_flow_error_set(error, ENOTSUP,
5473                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5474                                                   NULL,
5475                                                   "unsupported action QUEUE");
5476                 if (!(sub_action_flags & MLX5_FLOW_ACTION_PORT_ID))
5477                         return rte_flow_error_set(error, EINVAL,
5478                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5479                                                   NULL,
5480                                                   "E-Switch must has a dest "
5481                                                   "port for mirroring");
5482                 if (!priv->config.hca_attr.reg_c_preserve &&
5483                      priv->representor_id != -1)
5484                         *fdb_mirror_limit = 1;
5485         }
5486         /* Continue validation for Xcap actions.*/
5487         if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) &&
5488             (queue_index == 0xFFFF ||
5489              mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
5490                 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5491                      MLX5_FLOW_XCAP_ACTIONS)
5492                         return rte_flow_error_set(error, ENOTSUP,
5493                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5494                                                   NULL, "encap and decap "
5495                                                   "combination aren't "
5496                                                   "supported");
5497                 if (!attr->transfer && attr->ingress && (sub_action_flags &
5498                                                         MLX5_FLOW_ACTION_ENCAP))
5499                         return rte_flow_error_set(error, ENOTSUP,
5500                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5501                                                   NULL, "encap is not supported"
5502                                                   " for ingress traffic");
5503         }
5504         return 0;
5505 }
5506
5507 /**
5508  * Find existing modify-header resource or create and register a new one.
5509  *
5510  * @param dev[in, out]
5511  *   Pointer to rte_eth_dev structure.
5512  * @param[in, out] resource
5513  *   Pointer to modify-header resource.
5514  * @parm[in, out] dev_flow
5515  *   Pointer to the dev_flow.
5516  * @param[out] error
5517  *   pointer to error structure.
5518  *
5519  * @return
5520  *   0 on success otherwise -errno and errno is set.
5521  */
5522 static int
5523 flow_dv_modify_hdr_resource_register
5524                         (struct rte_eth_dev *dev,
5525                          struct mlx5_flow_dv_modify_hdr_resource *resource,
5526                          struct mlx5_flow *dev_flow,
5527                          struct rte_flow_error *error)
5528 {
5529         struct mlx5_priv *priv = dev->data->dev_private;
5530         struct mlx5_dev_ctx_shared *sh = priv->sh;
5531         uint32_t key_len = sizeof(*resource) -
5532                            offsetof(typeof(*resource), ft_type) +
5533                            resource->actions_num * sizeof(resource->actions[0]);
5534         struct mlx5_hlist_entry *entry;
5535         struct mlx5_flow_cb_ctx ctx = {
5536                 .error = error,
5537                 .data = resource,
5538         };
5539         uint64_t key64;
5540
5541         resource->flags = dev_flow->dv.group ? 0 :
5542                           MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
5543         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
5544                                     resource->flags))
5545                 return rte_flow_error_set(error, EOVERFLOW,
5546                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5547                                           "too many modify header items");
5548         key64 = __rte_raw_cksum(&resource->ft_type, key_len, 0);
5549         entry = mlx5_hlist_register(sh->modify_cmds, key64, &ctx);
5550         if (!entry)
5551                 return -rte_errno;
5552         resource = container_of(entry, typeof(*resource), entry);
5553         dev_flow->handle->dvh.modify_hdr = resource;
5554         return 0;
5555 }
5556
5557 /**
5558  * Get DV flow counter by index.
5559  *
5560  * @param[in] dev
5561  *   Pointer to the Ethernet device structure.
5562  * @param[in] idx
5563  *   mlx5 flow counter index in the container.
5564  * @param[out] ppool
5565  *   mlx5 flow counter pool in the container.
5566  *
5567  * @return
5568  *   Pointer to the counter, NULL otherwise.
5569  */
5570 static struct mlx5_flow_counter *
5571 flow_dv_counter_get_by_idx(struct rte_eth_dev *dev,
5572                            uint32_t idx,
5573                            struct mlx5_flow_counter_pool **ppool)
5574 {
5575         struct mlx5_priv *priv = dev->data->dev_private;
5576         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5577         struct mlx5_flow_counter_pool *pool;
5578
5579         /* Decrease to original index and clear shared bit. */
5580         idx = (idx - 1) & (MLX5_CNT_SHARED_OFFSET - 1);
5581         MLX5_ASSERT(idx / MLX5_COUNTERS_PER_POOL < cmng->n);
5582         pool = cmng->pools[idx / MLX5_COUNTERS_PER_POOL];
5583         MLX5_ASSERT(pool);
5584         if (ppool)
5585                 *ppool = pool;
5586         return MLX5_POOL_GET_CNT(pool, idx % MLX5_COUNTERS_PER_POOL);
5587 }
5588
5589 /**
5590  * Check the devx counter belongs to the pool.
5591  *
5592  * @param[in] pool
5593  *   Pointer to the counter pool.
5594  * @param[in] id
5595  *   The counter devx ID.
5596  *
5597  * @return
5598  *   True if counter belongs to the pool, false otherwise.
5599  */
5600 static bool
5601 flow_dv_is_counter_in_pool(struct mlx5_flow_counter_pool *pool, int id)
5602 {
5603         int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
5604                    MLX5_COUNTERS_PER_POOL;
5605
5606         if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
5607                 return true;
5608         return false;
5609 }
5610
5611 /**
5612  * Get a pool by devx counter ID.
5613  *
5614  * @param[in] cmng
5615  *   Pointer to the counter management.
5616  * @param[in] id
5617  *   The counter devx ID.
5618  *
5619  * @return
5620  *   The counter pool pointer if exists, NULL otherwise,
5621  */
5622 static struct mlx5_flow_counter_pool *
5623 flow_dv_find_pool_by_id(struct mlx5_flow_counter_mng *cmng, int id)
5624 {
5625         uint32_t i;
5626         struct mlx5_flow_counter_pool *pool = NULL;
5627
5628         rte_spinlock_lock(&cmng->pool_update_sl);
5629         /* Check last used pool. */
5630         if (cmng->last_pool_idx != POOL_IDX_INVALID &&
5631             flow_dv_is_counter_in_pool(cmng->pools[cmng->last_pool_idx], id)) {
5632                 pool = cmng->pools[cmng->last_pool_idx];
5633                 goto out;
5634         }
5635         /* ID out of range means no suitable pool in the container. */
5636         if (id > cmng->max_id || id < cmng->min_id)
5637                 goto out;
5638         /*
5639          * Find the pool from the end of the container, since mostly counter
5640          * ID is sequence increasing, and the last pool should be the needed
5641          * one.
5642          */
5643         i = cmng->n_valid;
5644         while (i--) {
5645                 struct mlx5_flow_counter_pool *pool_tmp = cmng->pools[i];
5646
5647                 if (flow_dv_is_counter_in_pool(pool_tmp, id)) {
5648                         pool = pool_tmp;
5649                         break;
5650                 }
5651         }
5652 out:
5653         rte_spinlock_unlock(&cmng->pool_update_sl);
5654         return pool;
5655 }
5656
5657 /**
5658  * Resize a counter container.
5659  *
5660  * @param[in] dev
5661  *   Pointer to the Ethernet device structure.
5662  *
5663  * @return
5664  *   0 on success, otherwise negative errno value and rte_errno is set.
5665  */
5666 static int
5667 flow_dv_container_resize(struct rte_eth_dev *dev)
5668 {
5669         struct mlx5_priv *priv = dev->data->dev_private;
5670         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5671         void *old_pools = cmng->pools;
5672         uint32_t resize = cmng->n + MLX5_CNT_CONTAINER_RESIZE;
5673         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
5674         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
5675
5676         if (!pools) {
5677                 rte_errno = ENOMEM;
5678                 return -ENOMEM;
5679         }
5680         if (old_pools)
5681                 memcpy(pools, old_pools, cmng->n *
5682                                        sizeof(struct mlx5_flow_counter_pool *));
5683         cmng->n = resize;
5684         cmng->pools = pools;
5685         if (old_pools)
5686                 mlx5_free(old_pools);
5687         return 0;
5688 }
5689
5690 /**
5691  * Query a devx flow counter.
5692  *
5693  * @param[in] dev
5694  *   Pointer to the Ethernet device structure.
5695  * @param[in] counter
5696  *   Index to the flow counter.
5697  * @param[out] pkts
5698  *   The statistics value of packets.
5699  * @param[out] bytes
5700  *   The statistics value of bytes.
5701  *
5702  * @return
5703  *   0 on success, otherwise a negative errno value and rte_errno is set.
5704  */
5705 static inline int
5706 _flow_dv_query_count(struct rte_eth_dev *dev, uint32_t counter, uint64_t *pkts,
5707                      uint64_t *bytes)
5708 {
5709         struct mlx5_priv *priv = dev->data->dev_private;
5710         struct mlx5_flow_counter_pool *pool = NULL;
5711         struct mlx5_flow_counter *cnt;
5712         int offset;
5713
5714         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
5715         MLX5_ASSERT(pool);
5716         if (priv->sh->cmng.counter_fallback)
5717                 return mlx5_devx_cmd_flow_counter_query(cnt->dcs_when_active, 0,
5718                                         0, pkts, bytes, 0, NULL, NULL, 0);
5719         rte_spinlock_lock(&pool->sl);
5720         if (!pool->raw) {
5721                 *pkts = 0;
5722                 *bytes = 0;
5723         } else {
5724                 offset = MLX5_CNT_ARRAY_IDX(pool, cnt);
5725                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
5726                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
5727         }
5728         rte_spinlock_unlock(&pool->sl);
5729         return 0;
5730 }
5731
5732 /**
5733  * Create and initialize a new counter pool.
5734  *
5735  * @param[in] dev
5736  *   Pointer to the Ethernet device structure.
5737  * @param[out] dcs
5738  *   The devX counter handle.
5739  * @param[in] age
5740  *   Whether the pool is for counter that was allocated for aging.
5741  * @param[in/out] cont_cur
5742  *   Pointer to the container pointer, it will be update in pool resize.
5743  *
5744  * @return
5745  *   The pool container pointer on success, NULL otherwise and rte_errno is set.
5746  */
5747 static struct mlx5_flow_counter_pool *
5748 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
5749                     uint32_t age)
5750 {
5751         struct mlx5_priv *priv = dev->data->dev_private;
5752         struct mlx5_flow_counter_pool *pool;
5753         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5754         bool fallback = priv->sh->cmng.counter_fallback;
5755         uint32_t size = sizeof(*pool);
5756
5757         size += MLX5_COUNTERS_PER_POOL * MLX5_CNT_SIZE;
5758         size += (!age ? 0 : MLX5_COUNTERS_PER_POOL * MLX5_AGE_SIZE);
5759         pool = mlx5_malloc(MLX5_MEM_ZERO, size, 0, SOCKET_ID_ANY);
5760         if (!pool) {
5761                 rte_errno = ENOMEM;
5762                 return NULL;
5763         }
5764         pool->raw = NULL;
5765         pool->is_aged = !!age;
5766         pool->query_gen = 0;
5767         pool->min_dcs = dcs;
5768         rte_spinlock_init(&pool->sl);
5769         rte_spinlock_init(&pool->csl);
5770         TAILQ_INIT(&pool->counters[0]);
5771         TAILQ_INIT(&pool->counters[1]);
5772         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
5773         rte_spinlock_lock(&cmng->pool_update_sl);
5774         pool->index = cmng->n_valid;
5775         if (pool->index == cmng->n && flow_dv_container_resize(dev)) {
5776                 mlx5_free(pool);
5777                 rte_spinlock_unlock(&cmng->pool_update_sl);
5778                 return NULL;
5779         }
5780         cmng->pools[pool->index] = pool;
5781         cmng->n_valid++;
5782         if (unlikely(fallback)) {
5783                 int base = RTE_ALIGN_FLOOR(dcs->id, MLX5_COUNTERS_PER_POOL);
5784
5785                 if (base < cmng->min_id)
5786                         cmng->min_id = base;
5787                 if (base > cmng->max_id)
5788                         cmng->max_id = base + MLX5_COUNTERS_PER_POOL - 1;
5789                 cmng->last_pool_idx = pool->index;
5790         }
5791         rte_spinlock_unlock(&cmng->pool_update_sl);
5792         return pool;
5793 }
5794
5795 /**
5796  * Prepare a new counter and/or a new counter pool.
5797  *
5798  * @param[in] dev
5799  *   Pointer to the Ethernet device structure.
5800  * @param[out] cnt_free
5801  *   Where to put the pointer of a new counter.
5802  * @param[in] age
5803  *   Whether the pool is for counter that was allocated for aging.
5804  *
5805  * @return
5806  *   The counter pool pointer and @p cnt_free is set on success,
5807  *   NULL otherwise and rte_errno is set.
5808  */
5809 static struct mlx5_flow_counter_pool *
5810 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
5811                              struct mlx5_flow_counter **cnt_free,
5812                              uint32_t age)
5813 {
5814         struct mlx5_priv *priv = dev->data->dev_private;
5815         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5816         struct mlx5_flow_counter_pool *pool;
5817         struct mlx5_counters tmp_tq;
5818         struct mlx5_devx_obj *dcs = NULL;
5819         struct mlx5_flow_counter *cnt;
5820         enum mlx5_counter_type cnt_type =
5821                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
5822         bool fallback = priv->sh->cmng.counter_fallback;
5823         uint32_t i;
5824
5825         if (fallback) {
5826                 /* bulk_bitmap must be 0 for single counter allocation. */
5827                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
5828                 if (!dcs)
5829                         return NULL;
5830                 pool = flow_dv_find_pool_by_id(cmng, dcs->id);
5831                 if (!pool) {
5832                         pool = flow_dv_pool_create(dev, dcs, age);
5833                         if (!pool) {
5834                                 mlx5_devx_cmd_destroy(dcs);
5835                                 return NULL;
5836                         }
5837                 }
5838                 i = dcs->id % MLX5_COUNTERS_PER_POOL;
5839                 cnt = MLX5_POOL_GET_CNT(pool, i);
5840                 cnt->pool = pool;
5841                 cnt->dcs_when_free = dcs;
5842                 *cnt_free = cnt;
5843                 return pool;
5844         }
5845         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
5846         if (!dcs) {
5847                 rte_errno = ENODATA;
5848                 return NULL;
5849         }
5850         pool = flow_dv_pool_create(dev, dcs, age);
5851         if (!pool) {
5852                 mlx5_devx_cmd_destroy(dcs);
5853                 return NULL;
5854         }
5855         TAILQ_INIT(&tmp_tq);
5856         for (i = 1; i < MLX5_COUNTERS_PER_POOL; ++i) {
5857                 cnt = MLX5_POOL_GET_CNT(pool, i);
5858                 cnt->pool = pool;
5859                 TAILQ_INSERT_HEAD(&tmp_tq, cnt, next);
5860         }
5861         rte_spinlock_lock(&cmng->csl[cnt_type]);
5862         TAILQ_CONCAT(&cmng->counters[cnt_type], &tmp_tq, next);
5863         rte_spinlock_unlock(&cmng->csl[cnt_type]);
5864         *cnt_free = MLX5_POOL_GET_CNT(pool, 0);
5865         (*cnt_free)->pool = pool;
5866         return pool;
5867 }
5868
5869 /**
5870  * Allocate a flow counter.
5871  *
5872  * @param[in] dev
5873  *   Pointer to the Ethernet device structure.
5874  * @param[in] age
5875  *   Whether the counter was allocated for aging.
5876  *
5877  * @return
5878  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
5879  */
5880 static uint32_t
5881 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t age)
5882 {
5883         struct mlx5_priv *priv = dev->data->dev_private;
5884         struct mlx5_flow_counter_pool *pool = NULL;
5885         struct mlx5_flow_counter *cnt_free = NULL;
5886         bool fallback = priv->sh->cmng.counter_fallback;
5887         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5888         enum mlx5_counter_type cnt_type =
5889                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
5890         uint32_t cnt_idx;
5891
5892         if (!priv->config.devx) {
5893                 rte_errno = ENOTSUP;
5894                 return 0;
5895         }
5896         /* Get free counters from container. */
5897         rte_spinlock_lock(&cmng->csl[cnt_type]);
5898         cnt_free = TAILQ_FIRST(&cmng->counters[cnt_type]);
5899         if (cnt_free)
5900                 TAILQ_REMOVE(&cmng->counters[cnt_type], cnt_free, next);
5901         rte_spinlock_unlock(&cmng->csl[cnt_type]);
5902         if (!cnt_free && !flow_dv_counter_pool_prepare(dev, &cnt_free, age))
5903                 goto err;
5904         pool = cnt_free->pool;
5905         if (fallback)
5906                 cnt_free->dcs_when_active = cnt_free->dcs_when_free;
5907         /* Create a DV counter action only in the first time usage. */
5908         if (!cnt_free->action) {
5909                 uint16_t offset;
5910                 struct mlx5_devx_obj *dcs;
5911                 int ret;
5912
5913                 if (!fallback) {
5914                         offset = MLX5_CNT_ARRAY_IDX(pool, cnt_free);
5915                         dcs = pool->min_dcs;
5916                 } else {
5917                         offset = 0;
5918                         dcs = cnt_free->dcs_when_free;
5919                 }
5920                 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, offset,
5921                                                             &cnt_free->action);
5922                 if (ret) {
5923                         rte_errno = errno;
5924                         goto err;
5925                 }
5926         }
5927         cnt_idx = MLX5_MAKE_CNT_IDX(pool->index,
5928                                 MLX5_CNT_ARRAY_IDX(pool, cnt_free));
5929         /* Update the counter reset values. */
5930         if (_flow_dv_query_count(dev, cnt_idx, &cnt_free->hits,
5931                                  &cnt_free->bytes))
5932                 goto err;
5933         if (!fallback && !priv->sh->cmng.query_thread_on)
5934                 /* Start the asynchronous batch query by the host thread. */
5935                 mlx5_set_query_alarm(priv->sh);
5936         /*
5937          * When the count action isn't shared (by ID), shared_info field is
5938          * used for indirect action API's refcnt.
5939          * When the counter action is not shared neither by ID nor by indirect
5940          * action API, shared info must be 1.
5941          */
5942         cnt_free->shared_info.refcnt = 1;
5943         return cnt_idx;
5944 err:
5945         if (cnt_free) {
5946                 cnt_free->pool = pool;
5947                 if (fallback)
5948                         cnt_free->dcs_when_free = cnt_free->dcs_when_active;
5949                 rte_spinlock_lock(&cmng->csl[cnt_type]);
5950                 TAILQ_INSERT_TAIL(&cmng->counters[cnt_type], cnt_free, next);
5951                 rte_spinlock_unlock(&cmng->csl[cnt_type]);
5952         }
5953         return 0;
5954 }
5955
5956 /**
5957  * Allocate a shared flow counter.
5958  *
5959  * @param[in] ctx
5960  *   Pointer to the shared counter configuration.
5961  * @param[in] data
5962  *   Pointer to save the allocated counter index.
5963  *
5964  * @return
5965  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
5966  */
5967
5968 static int32_t
5969 flow_dv_counter_alloc_shared_cb(void *ctx, union mlx5_l3t_data *data)
5970 {
5971         struct mlx5_shared_counter_conf *conf = ctx;
5972         struct rte_eth_dev *dev = conf->dev;
5973         struct mlx5_flow_counter *cnt;
5974
5975         data->dword = flow_dv_counter_alloc(dev, 0);
5976         data->dword |= MLX5_CNT_SHARED_OFFSET;
5977         cnt = flow_dv_counter_get_by_idx(dev, data->dword, NULL);
5978         cnt->shared_info.id = conf->id;
5979         return 0;
5980 }
5981
5982 /**
5983  * Get a shared flow counter.
5984  *
5985  * @param[in] dev
5986  *   Pointer to the Ethernet device structure.
5987  * @param[in] id
5988  *   Counter identifier.
5989  *
5990  * @return
5991  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
5992  */
5993 static uint32_t
5994 flow_dv_counter_get_shared(struct rte_eth_dev *dev, uint32_t id)
5995 {
5996         struct mlx5_priv *priv = dev->data->dev_private;
5997         struct mlx5_shared_counter_conf conf = {
5998                 .dev = dev,
5999                 .id = id,
6000         };
6001         union mlx5_l3t_data data = {
6002                 .dword = 0,
6003         };
6004
6005         mlx5_l3t_prepare_entry(priv->sh->cnt_id_tbl, id, &data,
6006                                flow_dv_counter_alloc_shared_cb, &conf);
6007         return data.dword;
6008 }
6009
6010 /**
6011  * Get age param from counter index.
6012  *
6013  * @param[in] dev
6014  *   Pointer to the Ethernet device structure.
6015  * @param[in] counter
6016  *   Index to the counter handler.
6017  *
6018  * @return
6019  *   The aging parameter specified for the counter index.
6020  */
6021 static struct mlx5_age_param*
6022 flow_dv_counter_idx_get_age(struct rte_eth_dev *dev,
6023                                 uint32_t counter)
6024 {
6025         struct mlx5_flow_counter *cnt;
6026         struct mlx5_flow_counter_pool *pool = NULL;
6027
6028         flow_dv_counter_get_by_idx(dev, counter, &pool);
6029         counter = (counter - 1) % MLX5_COUNTERS_PER_POOL;
6030         cnt = MLX5_POOL_GET_CNT(pool, counter);
6031         return MLX5_CNT_TO_AGE(cnt);
6032 }
6033
6034 /**
6035  * Remove a flow counter from aged counter list.
6036  *
6037  * @param[in] dev
6038  *   Pointer to the Ethernet device structure.
6039  * @param[in] counter
6040  *   Index to the counter handler.
6041  * @param[in] cnt
6042  *   Pointer to the counter handler.
6043  */
6044 static void
6045 flow_dv_counter_remove_from_age(struct rte_eth_dev *dev,
6046                                 uint32_t counter, struct mlx5_flow_counter *cnt)
6047 {
6048         struct mlx5_age_info *age_info;
6049         struct mlx5_age_param *age_param;
6050         struct mlx5_priv *priv = dev->data->dev_private;
6051         uint16_t expected = AGE_CANDIDATE;
6052
6053         age_info = GET_PORT_AGE_INFO(priv);
6054         age_param = flow_dv_counter_idx_get_age(dev, counter);
6055         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
6056                                          AGE_FREE, false, __ATOMIC_RELAXED,
6057                                          __ATOMIC_RELAXED)) {
6058                 /**
6059                  * We need the lock even it is age timeout,
6060                  * since counter may still in process.
6061                  */
6062                 rte_spinlock_lock(&age_info->aged_sl);
6063                 TAILQ_REMOVE(&age_info->aged_counters, cnt, next);
6064                 rte_spinlock_unlock(&age_info->aged_sl);
6065                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
6066         }
6067 }
6068
6069 /**
6070  * Release a flow counter.
6071  *
6072  * @param[in] dev
6073  *   Pointer to the Ethernet device structure.
6074  * @param[in] counter
6075  *   Index to the counter handler.
6076  */
6077 static void
6078 flow_dv_counter_free(struct rte_eth_dev *dev, uint32_t counter)
6079 {
6080         struct mlx5_priv *priv = dev->data->dev_private;
6081         struct mlx5_flow_counter_pool *pool = NULL;
6082         struct mlx5_flow_counter *cnt;
6083         enum mlx5_counter_type cnt_type;
6084
6085         if (!counter)
6086                 return;
6087         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
6088         MLX5_ASSERT(pool);
6089         /*
6090          * If the counter action is shared by ID, the l3t_clear_entry function
6091          * reduces its references counter. If after the reduction the action is
6092          * still referenced, the function returns here and does not release it.
6093          */
6094         if (IS_LEGACY_SHARED_CNT(counter) &&
6095             mlx5_l3t_clear_entry(priv->sh->cnt_id_tbl, cnt->shared_info.id))
6096                 return;
6097         /*
6098          * If the counter action is shared by indirect action API, the atomic
6099          * function reduces its references counter. If after the reduction the
6100          * action is still referenced, the function returns here and does not
6101          * release it.
6102          * When the counter action is not shared neither by ID nor by indirect
6103          * action API, shared info is 1 before the reduction, so this condition
6104          * is failed and function doesn't return here.
6105          */
6106         if (!IS_LEGACY_SHARED_CNT(counter) &&
6107             __atomic_sub_fetch(&cnt->shared_info.refcnt, 1, __ATOMIC_RELAXED))
6108                 return;
6109         if (pool->is_aged)
6110                 flow_dv_counter_remove_from_age(dev, counter, cnt);
6111         cnt->pool = pool;
6112         /*
6113          * Put the counter back to list to be updated in none fallback mode.
6114          * Currently, we are using two list alternately, while one is in query,
6115          * add the freed counter to the other list based on the pool query_gen
6116          * value. After query finishes, add counter the list to the global
6117          * container counter list. The list changes while query starts. In
6118          * this case, lock will not be needed as query callback and release
6119          * function both operate with the different list.
6120          */
6121         if (!priv->sh->cmng.counter_fallback) {
6122                 rte_spinlock_lock(&pool->csl);
6123                 TAILQ_INSERT_TAIL(&pool->counters[pool->query_gen], cnt, next);
6124                 rte_spinlock_unlock(&pool->csl);
6125         } else {
6126                 cnt->dcs_when_free = cnt->dcs_when_active;
6127                 cnt_type = pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6128                                            MLX5_COUNTER_TYPE_ORIGIN;
6129                 rte_spinlock_lock(&priv->sh->cmng.csl[cnt_type]);
6130                 TAILQ_INSERT_TAIL(&priv->sh->cmng.counters[cnt_type],
6131                                   cnt, next);
6132                 rte_spinlock_unlock(&priv->sh->cmng.csl[cnt_type]);
6133         }
6134 }
6135
6136 /**
6137  * Resize a meter id container.
6138  *
6139  * @param[in] dev
6140  *   Pointer to the Ethernet device structure.
6141  *
6142  * @return
6143  *   0 on success, otherwise negative errno value and rte_errno is set.
6144  */
6145 static int
6146 flow_dv_mtr_container_resize(struct rte_eth_dev *dev)
6147 {
6148         struct mlx5_priv *priv = dev->data->dev_private;
6149         struct mlx5_aso_mtr_pools_mng *pools_mng =
6150                                 &priv->sh->mtrmng->pools_mng;
6151         void *old_pools = pools_mng->pools;
6152         uint32_t resize = pools_mng->n + MLX5_MTRS_CONTAINER_RESIZE;
6153         uint32_t mem_size = sizeof(struct mlx5_aso_mtr_pool *) * resize;
6154         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
6155
6156         if (!pools) {
6157                 rte_errno = ENOMEM;
6158                 return -ENOMEM;
6159         }
6160         if (!pools_mng->n)
6161                 if (mlx5_aso_queue_init(priv->sh, ASO_OPC_MOD_POLICER)) {
6162                         mlx5_free(pools);
6163                         return -ENOMEM;
6164                 }
6165         if (old_pools)
6166                 memcpy(pools, old_pools, pools_mng->n *
6167                                        sizeof(struct mlx5_aso_mtr_pool *));
6168         pools_mng->n = resize;
6169         pools_mng->pools = pools;
6170         if (old_pools)
6171                 mlx5_free(old_pools);
6172         return 0;
6173 }
6174
6175 /**
6176  * Prepare a new meter and/or a new meter pool.
6177  *
6178  * @param[in] dev
6179  *   Pointer to the Ethernet device structure.
6180  * @param[out] mtr_free
6181  *   Where to put the pointer of a new meter.g.
6182  *
6183  * @return
6184  *   The meter pool pointer and @mtr_free is set on success,
6185  *   NULL otherwise and rte_errno is set.
6186  */
6187 static struct mlx5_aso_mtr_pool *
6188 flow_dv_mtr_pool_create(struct rte_eth_dev *dev,
6189                              struct mlx5_aso_mtr **mtr_free)
6190 {
6191         struct mlx5_priv *priv = dev->data->dev_private;
6192         struct mlx5_aso_mtr_pools_mng *pools_mng =
6193                                 &priv->sh->mtrmng->pools_mng;
6194         struct mlx5_aso_mtr_pool *pool = NULL;
6195         struct mlx5_devx_obj *dcs = NULL;
6196         uint32_t i;
6197         uint32_t log_obj_size;
6198
6199         log_obj_size = rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
6200         dcs = mlx5_devx_cmd_create_flow_meter_aso_obj(priv->sh->ctx,
6201                         priv->sh->pdn, log_obj_size);
6202         if (!dcs) {
6203                 rte_errno = ENODATA;
6204                 return NULL;
6205         }
6206         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
6207         if (!pool) {
6208                 rte_errno = ENOMEM;
6209                 claim_zero(mlx5_devx_cmd_destroy(dcs));
6210                 return NULL;
6211         }
6212         pool->devx_obj = dcs;
6213         pool->index = pools_mng->n_valid;
6214         if (pool->index == pools_mng->n && flow_dv_mtr_container_resize(dev)) {
6215                 mlx5_free(pool);
6216                 claim_zero(mlx5_devx_cmd_destroy(dcs));
6217                 return NULL;
6218         }
6219         pools_mng->pools[pool->index] = pool;
6220         pools_mng->n_valid++;
6221         for (i = 1; i < MLX5_ASO_MTRS_PER_POOL; ++i) {
6222                 pool->mtrs[i].offset = i;
6223                 LIST_INSERT_HEAD(&pools_mng->meters,
6224                                                 &pool->mtrs[i], next);
6225         }
6226         pool->mtrs[0].offset = 0;
6227         *mtr_free = &pool->mtrs[0];
6228         return pool;
6229 }
6230
6231 /**
6232  * Release a flow meter into pool.
6233  *
6234  * @param[in] dev
6235  *   Pointer to the Ethernet device structure.
6236  * @param[in] mtr_idx
6237  *   Index to aso flow meter.
6238  */
6239 static void
6240 flow_dv_aso_mtr_release_to_pool(struct rte_eth_dev *dev, uint32_t mtr_idx)
6241 {
6242         struct mlx5_priv *priv = dev->data->dev_private;
6243         struct mlx5_aso_mtr_pools_mng *pools_mng =
6244                                 &priv->sh->mtrmng->pools_mng;
6245         struct mlx5_aso_mtr *aso_mtr = mlx5_aso_meter_by_idx(priv, mtr_idx);
6246
6247         MLX5_ASSERT(aso_mtr);
6248         rte_spinlock_lock(&pools_mng->mtrsl);
6249         memset(&aso_mtr->fm, 0, sizeof(struct mlx5_flow_meter_info));
6250         aso_mtr->state = ASO_METER_FREE;
6251         LIST_INSERT_HEAD(&pools_mng->meters, aso_mtr, next);
6252         rte_spinlock_unlock(&pools_mng->mtrsl);
6253 }
6254
6255 /**
6256  * Allocate a aso flow meter.
6257  *
6258  * @param[in] dev
6259  *   Pointer to the Ethernet device structure.
6260  *
6261  * @return
6262  *   Index to aso flow meter on success, 0 otherwise and rte_errno is set.
6263  */
6264 static uint32_t
6265 flow_dv_mtr_alloc(struct rte_eth_dev *dev)
6266 {
6267         struct mlx5_priv *priv = dev->data->dev_private;
6268         struct mlx5_aso_mtr *mtr_free = NULL;
6269         struct mlx5_aso_mtr_pools_mng *pools_mng =
6270                                 &priv->sh->mtrmng->pools_mng;
6271         struct mlx5_aso_mtr_pool *pool;
6272         uint32_t mtr_idx = 0;
6273
6274         if (!priv->config.devx) {
6275                 rte_errno = ENOTSUP;
6276                 return 0;
6277         }
6278         /* Allocate the flow meter memory. */
6279         /* Get free meters from management. */
6280         rte_spinlock_lock(&pools_mng->mtrsl);
6281         mtr_free = LIST_FIRST(&pools_mng->meters);
6282         if (mtr_free)
6283                 LIST_REMOVE(mtr_free, next);
6284         if (!mtr_free && !flow_dv_mtr_pool_create(dev, &mtr_free)) {
6285                 rte_spinlock_unlock(&pools_mng->mtrsl);
6286                 return 0;
6287         }
6288         mtr_free->state = ASO_METER_WAIT;
6289         rte_spinlock_unlock(&pools_mng->mtrsl);
6290         pool = container_of(mtr_free,
6291                         struct mlx5_aso_mtr_pool,
6292                         mtrs[mtr_free->offset]);
6293         mtr_idx = MLX5_MAKE_MTR_IDX(pool->index, mtr_free->offset);
6294         if (!mtr_free->fm.meter_action) {
6295 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
6296                 struct rte_flow_error error;
6297                 uint8_t reg_id;
6298
6299                 reg_id = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &error);
6300                 mtr_free->fm.meter_action =
6301                         mlx5_glue->dv_create_flow_action_aso
6302                                                 (priv->sh->rx_domain,
6303                                                  pool->devx_obj->obj,
6304                                                  mtr_free->offset,
6305                                                  (1 << MLX5_FLOW_COLOR_GREEN),
6306                                                  reg_id - REG_C_0);
6307 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
6308                 if (!mtr_free->fm.meter_action) {
6309                         flow_dv_aso_mtr_release_to_pool(dev, mtr_idx);
6310                         return 0;
6311                 }
6312         }
6313         return mtr_idx;
6314 }
6315
6316 /**
6317  * Verify the @p attributes will be correctly understood by the NIC and store
6318  * them in the @p flow if everything is correct.
6319  *
6320  * @param[in] dev
6321  *   Pointer to dev struct.
6322  * @param[in] attributes
6323  *   Pointer to flow attributes
6324  * @param[in] external
6325  *   This flow rule is created by request external to PMD.
6326  * @param[out] error
6327  *   Pointer to error structure.
6328  *
6329  * @return
6330  *   - 0 on success and non root table.
6331  *   - 1 on success and root table.
6332  *   - a negative errno value otherwise and rte_errno is set.
6333  */
6334 static int
6335 flow_dv_validate_attributes(struct rte_eth_dev *dev,
6336                             const struct mlx5_flow_tunnel *tunnel,
6337                             const struct rte_flow_attr *attributes,
6338                             const struct flow_grp_info *grp_info,
6339                             struct rte_flow_error *error)
6340 {
6341         struct mlx5_priv *priv = dev->data->dev_private;
6342         uint32_t lowest_priority = mlx5_get_lowest_priority(dev, attributes);
6343         int ret = 0;
6344
6345 #ifndef HAVE_MLX5DV_DR
6346         RTE_SET_USED(tunnel);
6347         RTE_SET_USED(grp_info);
6348         if (attributes->group)
6349                 return rte_flow_error_set(error, ENOTSUP,
6350                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6351                                           NULL,
6352                                           "groups are not supported");
6353 #else
6354         uint32_t table = 0;
6355
6356         ret = mlx5_flow_group_to_table(dev, tunnel, attributes->group, &table,
6357                                        grp_info, error);
6358         if (ret)
6359                 return ret;
6360         if (!table)
6361                 ret = MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
6362 #endif
6363         if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
6364             attributes->priority > lowest_priority)
6365                 return rte_flow_error_set(error, ENOTSUP,
6366                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
6367                                           NULL,
6368                                           "priority out of range");
6369         if (attributes->transfer) {
6370                 if (!priv->config.dv_esw_en)
6371                         return rte_flow_error_set
6372                                 (error, ENOTSUP,
6373                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6374                                  "E-Switch dr is not supported");
6375                 if (!(priv->representor || priv->master))
6376                         return rte_flow_error_set
6377                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6378                                  NULL, "E-Switch configuration can only be"
6379                                  " done by a master or a representor device");
6380                 if (attributes->egress)
6381                         return rte_flow_error_set
6382                                 (error, ENOTSUP,
6383                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
6384                                  "egress is not supported");
6385         }
6386         if (!(attributes->egress ^ attributes->ingress))
6387                 return rte_flow_error_set(error, ENOTSUP,
6388                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
6389                                           "must specify exactly one of "
6390                                           "ingress or egress");
6391         return ret;
6392 }
6393
6394 static uint16_t
6395 mlx5_flow_locate_proto_l3(const struct rte_flow_item **head,
6396                           const struct rte_flow_item *end)
6397 {
6398         const struct rte_flow_item *item = *head;
6399         uint16_t l3_protocol;
6400
6401         for (; item != end; item++) {
6402                 switch (item->type) {
6403                 default:
6404                         break;
6405                 case RTE_FLOW_ITEM_TYPE_IPV4:
6406                         l3_protocol = RTE_ETHER_TYPE_IPV4;
6407                         goto l3_ok;
6408                 case RTE_FLOW_ITEM_TYPE_IPV6:
6409                         l3_protocol = RTE_ETHER_TYPE_IPV6;
6410                         goto l3_ok;
6411                 case RTE_FLOW_ITEM_TYPE_ETH:
6412                         if (item->mask && item->spec) {
6413                                 MLX5_ETHER_TYPE_FROM_HEADER(rte_flow_item_eth,
6414                                                             type, item,
6415                                                             l3_protocol);
6416                                 if (l3_protocol == RTE_ETHER_TYPE_IPV4 ||
6417                                     l3_protocol == RTE_ETHER_TYPE_IPV6)
6418                                         goto l3_ok;
6419                         }
6420                         break;
6421                 case RTE_FLOW_ITEM_TYPE_VLAN:
6422                         if (item->mask && item->spec) {
6423                                 MLX5_ETHER_TYPE_FROM_HEADER(rte_flow_item_vlan,
6424                                                             inner_type, item,
6425                                                             l3_protocol);
6426                                 if (l3_protocol == RTE_ETHER_TYPE_IPV4 ||
6427                                     l3_protocol == RTE_ETHER_TYPE_IPV6)
6428                                         goto l3_ok;
6429                         }
6430                         break;
6431                 }
6432         }
6433         return 0;
6434 l3_ok:
6435         *head = item;
6436         return l3_protocol;
6437 }
6438
6439 static uint8_t
6440 mlx5_flow_locate_proto_l4(const struct rte_flow_item **head,
6441                           const struct rte_flow_item *end)
6442 {
6443         const struct rte_flow_item *item = *head;
6444         uint8_t l4_protocol;
6445
6446         for (; item != end; item++) {
6447                 switch (item->type) {
6448                 default:
6449                         break;
6450                 case RTE_FLOW_ITEM_TYPE_TCP:
6451                         l4_protocol = IPPROTO_TCP;
6452                         goto l4_ok;
6453                 case RTE_FLOW_ITEM_TYPE_UDP:
6454                         l4_protocol = IPPROTO_UDP;
6455                         goto l4_ok;
6456                 case RTE_FLOW_ITEM_TYPE_IPV4:
6457                         if (item->mask && item->spec) {
6458                                 const struct rte_flow_item_ipv4 *mask, *spec;
6459
6460                                 mask = (typeof(mask))item->mask;
6461                                 spec = (typeof(spec))item->spec;
6462                                 l4_protocol = mask->hdr.next_proto_id &
6463                                               spec->hdr.next_proto_id;
6464                                 if (l4_protocol == IPPROTO_TCP ||
6465                                     l4_protocol == IPPROTO_UDP)
6466                                         goto l4_ok;
6467                         }
6468                         break;
6469                 case RTE_FLOW_ITEM_TYPE_IPV6:
6470                         if (item->mask && item->spec) {
6471                                 const struct rte_flow_item_ipv6 *mask, *spec;
6472                                 mask = (typeof(mask))item->mask;
6473                                 spec = (typeof(spec))item->spec;
6474                                 l4_protocol = mask->hdr.proto & spec->hdr.proto;
6475                                 if (l4_protocol == IPPROTO_TCP ||
6476                                     l4_protocol == IPPROTO_UDP)
6477                                         goto l4_ok;
6478                         }
6479                         break;
6480                 }
6481         }
6482         return 0;
6483 l4_ok:
6484         *head = item;
6485         return l4_protocol;
6486 }
6487
6488 static int
6489 flow_dv_validate_item_integrity(struct rte_eth_dev *dev,
6490                                 const struct rte_flow_item *rule_items,
6491                                 const struct rte_flow_item *integrity_item,
6492                                 struct rte_flow_error *error)
6493 {
6494         struct mlx5_priv *priv = dev->data->dev_private;
6495         const struct rte_flow_item *tunnel_item, *end_item, *item = rule_items;
6496         const struct rte_flow_item_integrity *mask = (typeof(mask))
6497                                                      integrity_item->mask;
6498         const struct rte_flow_item_integrity *spec = (typeof(spec))
6499                                                      integrity_item->spec;
6500         uint32_t protocol;
6501
6502         if (!priv->config.hca_attr.pkt_integrity_match)
6503                 return rte_flow_error_set(error, ENOTSUP,
6504                                           RTE_FLOW_ERROR_TYPE_ITEM,
6505                                           integrity_item,
6506                                           "packet integrity integrity_item not supported");
6507         if (!mask)
6508                 mask = &rte_flow_item_integrity_mask;
6509         if (!mlx5_validate_integrity_item(mask))
6510                 return rte_flow_error_set(error, ENOTSUP,
6511                                           RTE_FLOW_ERROR_TYPE_ITEM,
6512                                           integrity_item,
6513                                           "unsupported integrity filter");
6514         tunnel_item = mlx5_flow_find_tunnel_item(rule_items);
6515         if (spec->level > 1) {
6516                 if (!tunnel_item)
6517                         return rte_flow_error_set(error, ENOTSUP,
6518                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6519                                                   integrity_item,
6520                                                   "missing tunnel item");
6521                 item = tunnel_item;
6522                 end_item = mlx5_find_end_item(tunnel_item);
6523         } else {
6524                 end_item = tunnel_item ? tunnel_item :
6525                            mlx5_find_end_item(integrity_item);
6526         }
6527         if (mask->l3_ok || mask->ipv4_csum_ok) {
6528                 protocol = mlx5_flow_locate_proto_l3(&item, end_item);
6529                 if (!protocol)
6530                         return rte_flow_error_set(error, EINVAL,
6531                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6532                                                   integrity_item,
6533                                                   "missing L3 protocol");
6534         }
6535         if (mask->l4_ok || mask->l4_csum_ok) {
6536                 protocol = mlx5_flow_locate_proto_l4(&item, end_item);
6537                 if (!protocol)
6538                         return rte_flow_error_set(error, EINVAL,
6539                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6540                                                   integrity_item,
6541                                                   "missing L4 protocol");
6542         }
6543         return 0;
6544 }
6545
6546 /**
6547  * Internal validation function. For validating both actions and items.
6548  *
6549  * @param[in] dev
6550  *   Pointer to the rte_eth_dev structure.
6551  * @param[in] attr
6552  *   Pointer to the flow attributes.
6553  * @param[in] items
6554  *   Pointer to the list of items.
6555  * @param[in] actions
6556  *   Pointer to the list of actions.
6557  * @param[in] external
6558  *   This flow rule is created by request external to PMD.
6559  * @param[in] hairpin
6560  *   Number of hairpin TX actions, 0 means classic flow.
6561  * @param[out] error
6562  *   Pointer to the error structure.
6563  *
6564  * @return
6565  *   0 on success, a negative errno value otherwise and rte_errno is set.
6566  */
6567 static int
6568 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
6569                  const struct rte_flow_item items[],
6570                  const struct rte_flow_action actions[],
6571                  bool external, int hairpin, struct rte_flow_error *error)
6572 {
6573         int ret;
6574         uint64_t action_flags = 0;
6575         uint64_t item_flags = 0;
6576         uint64_t last_item = 0;
6577         uint8_t next_protocol = 0xff;
6578         uint16_t ether_type = 0;
6579         int actions_n = 0;
6580         uint8_t item_ipv6_proto = 0;
6581         int fdb_mirror_limit = 0;
6582         int modify_after_mirror = 0;
6583         const struct rte_flow_item *geneve_item = NULL;
6584         const struct rte_flow_item *gre_item = NULL;
6585         const struct rte_flow_item *gtp_item = NULL;
6586         const struct rte_flow_action_raw_decap *decap;
6587         const struct rte_flow_action_raw_encap *encap;
6588         const struct rte_flow_action_rss *rss = NULL;
6589         const struct rte_flow_action_rss *sample_rss = NULL;
6590         const struct rte_flow_action_count *sample_count = NULL;
6591         const struct rte_flow_item_tcp nic_tcp_mask = {
6592                 .hdr = {
6593                         .tcp_flags = 0xFF,
6594                         .src_port = RTE_BE16(UINT16_MAX),
6595                         .dst_port = RTE_BE16(UINT16_MAX),
6596                 }
6597         };
6598         const struct rte_flow_item_ipv6 nic_ipv6_mask = {
6599                 .hdr = {
6600                         .src_addr =
6601                         "\xff\xff\xff\xff\xff\xff\xff\xff"
6602                         "\xff\xff\xff\xff\xff\xff\xff\xff",
6603                         .dst_addr =
6604                         "\xff\xff\xff\xff\xff\xff\xff\xff"
6605                         "\xff\xff\xff\xff\xff\xff\xff\xff",
6606                         .vtc_flow = RTE_BE32(0xffffffff),
6607                         .proto = 0xff,
6608                         .hop_limits = 0xff,
6609                 },
6610                 .has_frag_ext = 1,
6611         };
6612         const struct rte_flow_item_ecpri nic_ecpri_mask = {
6613                 .hdr = {
6614                         .common = {
6615                                 .u32 =
6616                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
6617                                         .type = 0xFF,
6618                                         }).u32),
6619                         },
6620                         .dummy[0] = 0xffffffff,
6621                 },
6622         };
6623         struct mlx5_priv *priv = dev->data->dev_private;
6624         struct mlx5_dev_config *dev_conf = &priv->config;
6625         uint16_t queue_index = 0xFFFF;
6626         const struct rte_flow_item_vlan *vlan_m = NULL;
6627         uint32_t rw_act_num = 0;
6628         uint64_t is_root;
6629         const struct mlx5_flow_tunnel *tunnel;
6630         struct flow_grp_info grp_info = {
6631                 .external = !!external,
6632                 .transfer = !!attr->transfer,
6633                 .fdb_def_rule = !!priv->fdb_def_rule,
6634         };
6635         const struct rte_eth_hairpin_conf *conf;
6636         const struct rte_flow_item *rule_items = items;
6637         bool def_policy = false;
6638
6639         if (items == NULL)
6640                 return -1;
6641         if (is_flow_tunnel_match_rule(dev, attr, items, actions)) {
6642                 tunnel = flow_items_to_tunnel(items);
6643                 action_flags |= MLX5_FLOW_ACTION_TUNNEL_MATCH |
6644                                 MLX5_FLOW_ACTION_DECAP;
6645         } else if (is_flow_tunnel_steer_rule(dev, attr, items, actions)) {
6646                 tunnel = flow_actions_to_tunnel(actions);
6647                 action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
6648         } else {
6649                 tunnel = NULL;
6650         }
6651         if (tunnel && priv->representor)
6652                 return rte_flow_error_set(error, ENOTSUP,
6653                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6654                                           "decap not supported "
6655                                           "for VF representor");
6656         grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
6657                                 (dev, tunnel, attr, items, actions);
6658         ret = flow_dv_validate_attributes(dev, tunnel, attr, &grp_info, error);
6659         if (ret < 0)
6660                 return ret;
6661         is_root = (uint64_t)ret;
6662         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
6663                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
6664                 int type = items->type;
6665
6666                 if (!mlx5_flow_os_item_supported(type))
6667                         return rte_flow_error_set(error, ENOTSUP,
6668                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6669                                                   NULL, "item not supported");
6670                 switch (type) {
6671                 case MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL:
6672                         if (items[0].type != (typeof(items[0].type))
6673                                                 MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL)
6674                                 return rte_flow_error_set
6675                                                 (error, EINVAL,
6676                                                 RTE_FLOW_ERROR_TYPE_ITEM,
6677                                                 NULL, "MLX5 private items "
6678                                                 "must be the first");
6679                         break;
6680                 case RTE_FLOW_ITEM_TYPE_VOID:
6681                         break;
6682                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
6683                         ret = flow_dv_validate_item_port_id
6684                                         (dev, items, attr, item_flags, error);
6685                         if (ret < 0)
6686                                 return ret;
6687                         last_item = MLX5_FLOW_ITEM_PORT_ID;
6688                         break;
6689                 case RTE_FLOW_ITEM_TYPE_ETH:
6690                         ret = mlx5_flow_validate_item_eth(items, item_flags,
6691                                                           true, error);
6692                         if (ret < 0)
6693                                 return ret;
6694                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
6695                                              MLX5_FLOW_LAYER_OUTER_L2;
6696                         if (items->mask != NULL && items->spec != NULL) {
6697                                 ether_type =
6698                                         ((const struct rte_flow_item_eth *)
6699                                          items->spec)->type;
6700                                 ether_type &=
6701                                         ((const struct rte_flow_item_eth *)
6702                                          items->mask)->type;
6703                                 ether_type = rte_be_to_cpu_16(ether_type);
6704                         } else {
6705                                 ether_type = 0;
6706                         }
6707                         break;
6708                 case RTE_FLOW_ITEM_TYPE_VLAN:
6709                         ret = flow_dv_validate_item_vlan(items, item_flags,
6710                                                          dev, error);
6711                         if (ret < 0)
6712                                 return ret;
6713                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
6714                                              MLX5_FLOW_LAYER_OUTER_VLAN;
6715                         if (items->mask != NULL && items->spec != NULL) {
6716                                 ether_type =
6717                                         ((const struct rte_flow_item_vlan *)
6718                                          items->spec)->inner_type;
6719                                 ether_type &=
6720                                         ((const struct rte_flow_item_vlan *)
6721                                          items->mask)->inner_type;
6722                                 ether_type = rte_be_to_cpu_16(ether_type);
6723                         } else {
6724                                 ether_type = 0;
6725                         }
6726                         /* Store outer VLAN mask for of_push_vlan action. */
6727                         if (!tunnel)
6728                                 vlan_m = items->mask;
6729                         break;
6730                 case RTE_FLOW_ITEM_TYPE_IPV4:
6731                         mlx5_flow_tunnel_ip_check(items, next_protocol,
6732                                                   &item_flags, &tunnel);
6733                         ret = flow_dv_validate_item_ipv4(items, item_flags,
6734                                                          last_item, ether_type,
6735                                                          error);
6736                         if (ret < 0)
6737                                 return ret;
6738                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
6739                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
6740                         if (items->mask != NULL &&
6741                             ((const struct rte_flow_item_ipv4 *)
6742                              items->mask)->hdr.next_proto_id) {
6743                                 next_protocol =
6744                                         ((const struct rte_flow_item_ipv4 *)
6745                                          (items->spec))->hdr.next_proto_id;
6746                                 next_protocol &=
6747                                         ((const struct rte_flow_item_ipv4 *)
6748                                          (items->mask))->hdr.next_proto_id;
6749                         } else {
6750                                 /* Reset for inner layer. */
6751                                 next_protocol = 0xff;
6752                         }
6753                         break;
6754                 case RTE_FLOW_ITEM_TYPE_IPV6:
6755                         mlx5_flow_tunnel_ip_check(items, next_protocol,
6756                                                   &item_flags, &tunnel);
6757                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
6758                                                            last_item,
6759                                                            ether_type,
6760                                                            &nic_ipv6_mask,
6761                                                            error);
6762                         if (ret < 0)
6763                                 return ret;
6764                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
6765                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
6766                         if (items->mask != NULL &&
6767                             ((const struct rte_flow_item_ipv6 *)
6768                              items->mask)->hdr.proto) {
6769                                 item_ipv6_proto =
6770                                         ((const struct rte_flow_item_ipv6 *)
6771                                          items->spec)->hdr.proto;
6772                                 next_protocol =
6773                                         ((const struct rte_flow_item_ipv6 *)
6774                                          items->spec)->hdr.proto;
6775                                 next_protocol &=
6776                                         ((const struct rte_flow_item_ipv6 *)
6777                                          items->mask)->hdr.proto;
6778                         } else {
6779                                 /* Reset for inner layer. */
6780                                 next_protocol = 0xff;
6781                         }
6782                         break;
6783                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
6784                         ret = flow_dv_validate_item_ipv6_frag_ext(items,
6785                                                                   item_flags,
6786                                                                   error);
6787                         if (ret < 0)
6788                                 return ret;
6789                         last_item = tunnel ?
6790                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
6791                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
6792                         if (items->mask != NULL &&
6793                             ((const struct rte_flow_item_ipv6_frag_ext *)
6794                              items->mask)->hdr.next_header) {
6795                                 next_protocol =
6796                                 ((const struct rte_flow_item_ipv6_frag_ext *)
6797                                  items->spec)->hdr.next_header;
6798                                 next_protocol &=
6799                                 ((const struct rte_flow_item_ipv6_frag_ext *)
6800                                  items->mask)->hdr.next_header;
6801                         } else {
6802                                 /* Reset for inner layer. */
6803                                 next_protocol = 0xff;
6804                         }
6805                         break;
6806                 case RTE_FLOW_ITEM_TYPE_TCP:
6807                         ret = mlx5_flow_validate_item_tcp
6808                                                 (items, item_flags,
6809                                                  next_protocol,
6810                                                  &nic_tcp_mask,
6811                                                  error);
6812                         if (ret < 0)
6813                                 return ret;
6814                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
6815                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
6816                         break;
6817                 case RTE_FLOW_ITEM_TYPE_UDP:
6818                         ret = mlx5_flow_validate_item_udp(items, item_flags,
6819                                                           next_protocol,
6820                                                           error);
6821                         if (ret < 0)
6822                                 return ret;
6823                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
6824                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
6825                         break;
6826                 case RTE_FLOW_ITEM_TYPE_GRE:
6827                         ret = mlx5_flow_validate_item_gre(items, item_flags,
6828                                                           next_protocol, error);
6829                         if (ret < 0)
6830                                 return ret;
6831                         gre_item = items;
6832                         last_item = MLX5_FLOW_LAYER_GRE;
6833                         break;
6834                 case RTE_FLOW_ITEM_TYPE_NVGRE:
6835                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
6836                                                             next_protocol,
6837                                                             error);
6838                         if (ret < 0)
6839                                 return ret;
6840                         last_item = MLX5_FLOW_LAYER_NVGRE;
6841                         break;
6842                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
6843                         ret = mlx5_flow_validate_item_gre_key
6844                                 (items, item_flags, gre_item, error);
6845                         if (ret < 0)
6846                                 return ret;
6847                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
6848                         break;
6849                 case RTE_FLOW_ITEM_TYPE_VXLAN:
6850                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
6851                                                             error);
6852                         if (ret < 0)
6853                                 return ret;
6854                         last_item = MLX5_FLOW_LAYER_VXLAN;
6855                         break;
6856                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
6857                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
6858                                                                 item_flags, dev,
6859                                                                 error);
6860                         if (ret < 0)
6861                                 return ret;
6862                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
6863                         break;
6864                 case RTE_FLOW_ITEM_TYPE_GENEVE:
6865                         ret = mlx5_flow_validate_item_geneve(items,
6866                                                              item_flags, dev,
6867                                                              error);
6868                         if (ret < 0)
6869                                 return ret;
6870                         geneve_item = items;
6871                         last_item = MLX5_FLOW_LAYER_GENEVE;
6872                         break;
6873                 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
6874                         ret = mlx5_flow_validate_item_geneve_opt(items,
6875                                                                  last_item,
6876                                                                  geneve_item,
6877                                                                  dev,
6878                                                                  error);
6879                         if (ret < 0)
6880                                 return ret;
6881                         last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
6882                         break;
6883                 case RTE_FLOW_ITEM_TYPE_MPLS:
6884                         ret = mlx5_flow_validate_item_mpls(dev, items,
6885                                                            item_flags,
6886                                                            last_item, error);
6887                         if (ret < 0)
6888                                 return ret;
6889                         last_item = MLX5_FLOW_LAYER_MPLS;
6890                         break;
6891
6892                 case RTE_FLOW_ITEM_TYPE_MARK:
6893                         ret = flow_dv_validate_item_mark(dev, items, attr,
6894                                                          error);
6895                         if (ret < 0)
6896                                 return ret;
6897                         last_item = MLX5_FLOW_ITEM_MARK;
6898                         break;
6899                 case RTE_FLOW_ITEM_TYPE_META:
6900                         ret = flow_dv_validate_item_meta(dev, items, attr,
6901                                                          error);
6902                         if (ret < 0)
6903                                 return ret;
6904                         last_item = MLX5_FLOW_ITEM_METADATA;
6905                         break;
6906                 case RTE_FLOW_ITEM_TYPE_ICMP:
6907                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
6908                                                            next_protocol,
6909                                                            error);
6910                         if (ret < 0)
6911                                 return ret;
6912                         last_item = MLX5_FLOW_LAYER_ICMP;
6913                         break;
6914                 case RTE_FLOW_ITEM_TYPE_ICMP6:
6915                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
6916                                                             next_protocol,
6917                                                             error);
6918                         if (ret < 0)
6919                                 return ret;
6920                         item_ipv6_proto = IPPROTO_ICMPV6;
6921                         last_item = MLX5_FLOW_LAYER_ICMP6;
6922                         break;
6923                 case RTE_FLOW_ITEM_TYPE_TAG:
6924                         ret = flow_dv_validate_item_tag(dev, items,
6925                                                         attr, error);
6926                         if (ret < 0)
6927                                 return ret;
6928                         last_item = MLX5_FLOW_ITEM_TAG;
6929                         break;
6930                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
6931                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
6932                         break;
6933                 case RTE_FLOW_ITEM_TYPE_GTP:
6934                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
6935                                                         error);
6936                         if (ret < 0)
6937                                 return ret;
6938                         gtp_item = items;
6939                         last_item = MLX5_FLOW_LAYER_GTP;
6940                         break;
6941                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
6942                         ret = flow_dv_validate_item_gtp_psc(items, last_item,
6943                                                             gtp_item, attr,
6944                                                             error);
6945                         if (ret < 0)
6946                                 return ret;
6947                         last_item = MLX5_FLOW_LAYER_GTP_PSC;
6948                         break;
6949                 case RTE_FLOW_ITEM_TYPE_ECPRI:
6950                         /* Capacity will be checked in the translate stage. */
6951                         ret = mlx5_flow_validate_item_ecpri(items, item_flags,
6952                                                             last_item,
6953                                                             ether_type,
6954                                                             &nic_ecpri_mask,
6955                                                             error);
6956                         if (ret < 0)
6957                                 return ret;
6958                         last_item = MLX5_FLOW_LAYER_ECPRI;
6959                         break;
6960                 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
6961                         if (item_flags & MLX5_FLOW_ITEM_INTEGRITY)
6962                                 return rte_flow_error_set
6963                                         (error, ENOTSUP,
6964                                          RTE_FLOW_ERROR_TYPE_ITEM,
6965                                          NULL, "multiple integrity items not supported");
6966                         ret = flow_dv_validate_item_integrity(dev, rule_items,
6967                                                               items, error);
6968                         if (ret < 0)
6969                                 return ret;
6970                         last_item = MLX5_FLOW_ITEM_INTEGRITY;
6971                         break;
6972                 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
6973                         ret = flow_dv_validate_item_aso_ct(dev, items,
6974                                                            &item_flags, error);
6975                         if (ret < 0)
6976                                 return ret;
6977                         break;
6978                 default:
6979                         return rte_flow_error_set(error, ENOTSUP,
6980                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6981                                                   NULL, "item not supported");
6982                 }
6983                 item_flags |= last_item;
6984         }
6985         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
6986                 int type = actions->type;
6987                 bool shared_count = false;
6988
6989                 if (!mlx5_flow_os_action_supported(type))
6990                         return rte_flow_error_set(error, ENOTSUP,
6991                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6992                                                   actions,
6993                                                   "action not supported");
6994                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
6995                         return rte_flow_error_set(error, ENOTSUP,
6996                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6997                                                   actions, "too many actions");
6998                 if (action_flags &
6999                         MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
7000                         return rte_flow_error_set(error, ENOTSUP,
7001                                 RTE_FLOW_ERROR_TYPE_ACTION,
7002                                 NULL, "meter action with policy "
7003                                 "must be the last action");
7004                 switch (type) {
7005                 case RTE_FLOW_ACTION_TYPE_VOID:
7006                         break;
7007                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7008                         ret = flow_dv_validate_action_port_id(dev,
7009                                                               action_flags,
7010                                                               actions,
7011                                                               attr,
7012                                                               error);
7013                         if (ret)
7014                                 return ret;
7015                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7016                         ++actions_n;
7017                         break;
7018                 case RTE_FLOW_ACTION_TYPE_FLAG:
7019                         ret = flow_dv_validate_action_flag(dev, action_flags,
7020                                                            attr, error);
7021                         if (ret < 0)
7022                                 return ret;
7023                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7024                                 /* Count all modify-header actions as one. */
7025                                 if (!(action_flags &
7026                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
7027                                         ++actions_n;
7028                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
7029                                                 MLX5_FLOW_ACTION_MARK_EXT;
7030                                 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7031                                         modify_after_mirror = 1;
7032
7033                         } else {
7034                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
7035                                 ++actions_n;
7036                         }
7037                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
7038                         break;
7039                 case RTE_FLOW_ACTION_TYPE_MARK:
7040                         ret = flow_dv_validate_action_mark(dev, actions,
7041                                                            action_flags,
7042                                                            attr, error);
7043                         if (ret < 0)
7044                                 return ret;
7045                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7046                                 /* Count all modify-header actions as one. */
7047                                 if (!(action_flags &
7048                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
7049                                         ++actions_n;
7050                                 action_flags |= MLX5_FLOW_ACTION_MARK |
7051                                                 MLX5_FLOW_ACTION_MARK_EXT;
7052                                 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7053                                         modify_after_mirror = 1;
7054                         } else {
7055                                 action_flags |= MLX5_FLOW_ACTION_MARK;
7056                                 ++actions_n;
7057                         }
7058                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
7059                         break;
7060                 case RTE_FLOW_ACTION_TYPE_SET_META:
7061                         ret = flow_dv_validate_action_set_meta(dev, actions,
7062                                                                action_flags,
7063                                                                attr, error);
7064                         if (ret < 0)
7065                                 return ret;
7066                         /* Count all modify-header actions as one action. */
7067                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7068                                 ++actions_n;
7069                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7070                                 modify_after_mirror = 1;
7071                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7072                         rw_act_num += MLX5_ACT_NUM_SET_META;
7073                         break;
7074                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7075                         ret = flow_dv_validate_action_set_tag(dev, actions,
7076                                                               action_flags,
7077                                                               attr, error);
7078                         if (ret < 0)
7079                                 return ret;
7080                         /* Count all modify-header actions as one action. */
7081                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7082                                 ++actions_n;
7083                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7084                                 modify_after_mirror = 1;
7085                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7086                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7087                         break;
7088                 case RTE_FLOW_ACTION_TYPE_DROP:
7089                         ret = mlx5_flow_validate_action_drop(action_flags,
7090                                                              attr, error);
7091                         if (ret < 0)
7092                                 return ret;
7093                         action_flags |= MLX5_FLOW_ACTION_DROP;
7094                         ++actions_n;
7095                         break;
7096                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7097                         ret = mlx5_flow_validate_action_queue(actions,
7098                                                               action_flags, dev,
7099                                                               attr, error);
7100                         if (ret < 0)
7101                                 return ret;
7102                         queue_index = ((const struct rte_flow_action_queue *)
7103                                                         (actions->conf))->index;
7104                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7105                         ++actions_n;
7106                         break;
7107                 case RTE_FLOW_ACTION_TYPE_RSS:
7108                         rss = actions->conf;
7109                         ret = mlx5_flow_validate_action_rss(actions,
7110                                                             action_flags, dev,
7111                                                             attr, item_flags,
7112                                                             error);
7113                         if (ret < 0)
7114                                 return ret;
7115                         if (rss && sample_rss &&
7116                             (sample_rss->level != rss->level ||
7117                             sample_rss->types != rss->types))
7118                                 return rte_flow_error_set(error, ENOTSUP,
7119                                         RTE_FLOW_ERROR_TYPE_ACTION,
7120                                         NULL,
7121                                         "Can't use the different RSS types "
7122                                         "or level in the same flow");
7123                         if (rss != NULL && rss->queue_num)
7124                                 queue_index = rss->queue[0];
7125                         action_flags |= MLX5_FLOW_ACTION_RSS;
7126                         ++actions_n;
7127                         break;
7128                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
7129                         ret =
7130                         mlx5_flow_validate_action_default_miss(action_flags,
7131                                         attr, error);
7132                         if (ret < 0)
7133                                 return ret;
7134                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
7135                         ++actions_n;
7136                         break;
7137                 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
7138                 case RTE_FLOW_ACTION_TYPE_COUNT:
7139                         shared_count = is_shared_action_count(actions);
7140                         ret = flow_dv_validate_action_count(dev, shared_count,
7141                                                             action_flags,
7142                                                             error);
7143                         if (ret < 0)
7144                                 return ret;
7145                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7146                         ++actions_n;
7147                         break;
7148                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7149                         if (flow_dv_validate_action_pop_vlan(dev,
7150                                                              action_flags,
7151                                                              actions,
7152                                                              item_flags, attr,
7153                                                              error))
7154                                 return -rte_errno;
7155                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7156                                 modify_after_mirror = 1;
7157                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7158                         ++actions_n;
7159                         break;
7160                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7161                         ret = flow_dv_validate_action_push_vlan(dev,
7162                                                                 action_flags,
7163                                                                 vlan_m,
7164                                                                 actions, attr,
7165                                                                 error);
7166                         if (ret < 0)
7167                                 return ret;
7168                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7169                                 modify_after_mirror = 1;
7170                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7171                         ++actions_n;
7172                         break;
7173                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7174                         ret = flow_dv_validate_action_set_vlan_pcp
7175                                                 (action_flags, actions, error);
7176                         if (ret < 0)
7177                                 return ret;
7178                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7179                                 modify_after_mirror = 1;
7180                         /* Count PCP with push_vlan command. */
7181                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
7182                         break;
7183                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7184                         ret = flow_dv_validate_action_set_vlan_vid
7185                                                 (item_flags, action_flags,
7186                                                  actions, error);
7187                         if (ret < 0)
7188                                 return ret;
7189                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7190                                 modify_after_mirror = 1;
7191                         /* Count VID with push_vlan command. */
7192                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7193                         rw_act_num += MLX5_ACT_NUM_MDF_VID;
7194                         break;
7195                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7196                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7197                         ret = flow_dv_validate_action_l2_encap(dev,
7198                                                                action_flags,
7199                                                                actions, attr,
7200                                                                error);
7201                         if (ret < 0)
7202                                 return ret;
7203                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
7204                         ++actions_n;
7205                         break;
7206                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7207                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7208                         ret = flow_dv_validate_action_decap(dev, action_flags,
7209                                                             actions, item_flags,
7210                                                             attr, error);
7211                         if (ret < 0)
7212                                 return ret;
7213                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7214                                 modify_after_mirror = 1;
7215                         action_flags |= MLX5_FLOW_ACTION_DECAP;
7216                         ++actions_n;
7217                         break;
7218                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7219                         ret = flow_dv_validate_action_raw_encap_decap
7220                                 (dev, NULL, actions->conf, attr, &action_flags,
7221                                  &actions_n, actions, item_flags, error);
7222                         if (ret < 0)
7223                                 return ret;
7224                         break;
7225                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7226                         decap = actions->conf;
7227                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
7228                                 ;
7229                         if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7230                                 encap = NULL;
7231                                 actions--;
7232                         } else {
7233                                 encap = actions->conf;
7234                         }
7235                         ret = flow_dv_validate_action_raw_encap_decap
7236                                            (dev,
7237                                             decap ? decap : &empty_decap, encap,
7238                                             attr, &action_flags, &actions_n,
7239                                             actions, item_flags, error);
7240                         if (ret < 0)
7241                                 return ret;
7242                         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7243                             (action_flags & MLX5_FLOW_ACTION_DECAP))
7244                                 modify_after_mirror = 1;
7245                         break;
7246                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7247                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7248                         ret = flow_dv_validate_action_modify_mac(action_flags,
7249                                                                  actions,
7250                                                                  item_flags,
7251                                                                  error);
7252                         if (ret < 0)
7253                                 return ret;
7254                         /* Count all modify-header actions as one action. */
7255                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7256                                 ++actions_n;
7257                         action_flags |= actions->type ==
7258                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7259                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
7260                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
7261                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7262                                 modify_after_mirror = 1;
7263                         /*
7264                          * Even if the source and destination MAC addresses have
7265                          * overlap in the header with 4B alignment, the convert
7266                          * function will handle them separately and 4 SW actions
7267                          * will be created. And 2 actions will be added each
7268                          * time no matter how many bytes of address will be set.
7269                          */
7270                         rw_act_num += MLX5_ACT_NUM_MDF_MAC;
7271                         break;
7272                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7273                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7274                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
7275                                                                   actions,
7276                                                                   item_flags,
7277                                                                   error);
7278                         if (ret < 0)
7279                                 return ret;
7280                         /* Count all modify-header actions as one action. */
7281                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7282                                 ++actions_n;
7283                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7284                                 modify_after_mirror = 1;
7285                         action_flags |= actions->type ==
7286                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7287                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
7288                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
7289                         rw_act_num += MLX5_ACT_NUM_MDF_IPV4;
7290                         break;
7291                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7292                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7293                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
7294                                                                   actions,
7295                                                                   item_flags,
7296                                                                   error);
7297                         if (ret < 0)
7298                                 return ret;
7299                         if (item_ipv6_proto == IPPROTO_ICMPV6)
7300                                 return rte_flow_error_set(error, ENOTSUP,
7301                                         RTE_FLOW_ERROR_TYPE_ACTION,
7302                                         actions,
7303                                         "Can't change header "
7304                                         "with ICMPv6 proto");
7305                         /* Count all modify-header actions as one action. */
7306                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7307                                 ++actions_n;
7308                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7309                                 modify_after_mirror = 1;
7310                         action_flags |= actions->type ==
7311                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7312                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
7313                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
7314                         rw_act_num += MLX5_ACT_NUM_MDF_IPV6;
7315                         break;
7316                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7317                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7318                         ret = flow_dv_validate_action_modify_tp(action_flags,
7319                                                                 actions,
7320                                                                 item_flags,
7321                                                                 error);
7322                         if (ret < 0)
7323                                 return ret;
7324                         /* Count all modify-header actions as one action. */
7325                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7326                                 ++actions_n;
7327                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7328                                 modify_after_mirror = 1;
7329                         action_flags |= actions->type ==
7330                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7331                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
7332                                                 MLX5_FLOW_ACTION_SET_TP_DST;
7333                         rw_act_num += MLX5_ACT_NUM_MDF_PORT;
7334                         break;
7335                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7336                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7337                         ret = flow_dv_validate_action_modify_ttl(action_flags,
7338                                                                  actions,
7339                                                                  item_flags,
7340                                                                  error);
7341                         if (ret < 0)
7342                                 return ret;
7343                         /* Count all modify-header actions as one action. */
7344                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7345                                 ++actions_n;
7346                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7347                                 modify_after_mirror = 1;
7348                         action_flags |= actions->type ==
7349                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
7350                                                 MLX5_FLOW_ACTION_SET_TTL :
7351                                                 MLX5_FLOW_ACTION_DEC_TTL;
7352                         rw_act_num += MLX5_ACT_NUM_MDF_TTL;
7353                         break;
7354                 case RTE_FLOW_ACTION_TYPE_JUMP:
7355                         ret = flow_dv_validate_action_jump(dev, tunnel, actions,
7356                                                            action_flags,
7357                                                            attr, external,
7358                                                            error);
7359                         if (ret)
7360                                 return ret;
7361                         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7362                             fdb_mirror_limit)
7363                                 return rte_flow_error_set(error, EINVAL,
7364                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7365                                                   NULL,
7366                                                   "sample and jump action combination is not supported");
7367                         ++actions_n;
7368                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7369                         break;
7370                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7371                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7372                         ret = flow_dv_validate_action_modify_tcp_seq
7373                                                                 (action_flags,
7374                                                                  actions,
7375                                                                  item_flags,
7376                                                                  error);
7377                         if (ret < 0)
7378                                 return ret;
7379                         /* Count all modify-header actions as one action. */
7380                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7381                                 ++actions_n;
7382                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7383                                 modify_after_mirror = 1;
7384                         action_flags |= actions->type ==
7385                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7386                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
7387                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7388                         rw_act_num += MLX5_ACT_NUM_MDF_TCPSEQ;
7389                         break;
7390                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7391                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7392                         ret = flow_dv_validate_action_modify_tcp_ack
7393                                                                 (action_flags,
7394                                                                  actions,
7395                                                                  item_flags,
7396                                                                  error);
7397                         if (ret < 0)
7398                                 return ret;
7399                         /* Count all modify-header actions as one action. */
7400                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7401                                 ++actions_n;
7402                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7403                                 modify_after_mirror = 1;
7404                         action_flags |= actions->type ==
7405                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7406                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
7407                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
7408                         rw_act_num += MLX5_ACT_NUM_MDF_TCPACK;
7409                         break;
7410                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7411                         break;
7412                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7413                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7414                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7415                         break;
7416                 case RTE_FLOW_ACTION_TYPE_METER:
7417                         ret = mlx5_flow_validate_action_meter(dev,
7418                                                               action_flags,
7419                                                               actions, attr,
7420                                                               &def_policy,
7421                                                               error);
7422                         if (ret < 0)
7423                                 return ret;
7424                         action_flags |= MLX5_FLOW_ACTION_METER;
7425                         if (!def_policy)
7426                                 action_flags |=
7427                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
7428                         ++actions_n;
7429                         /* Meter action will add one more TAG action. */
7430                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7431                         break;
7432                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
7433                         if (!attr->transfer && !attr->group)
7434                                 return rte_flow_error_set(error, ENOTSUP,
7435                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7436                                                                            NULL,
7437                           "Shared ASO age action is not supported for group 0");
7438                         if (action_flags & MLX5_FLOW_ACTION_AGE)
7439                                 return rte_flow_error_set
7440                                                   (error, EINVAL,
7441                                                    RTE_FLOW_ERROR_TYPE_ACTION,
7442                                                    NULL,
7443                                                    "duplicate age actions set");
7444                         action_flags |= MLX5_FLOW_ACTION_AGE;
7445                         ++actions_n;
7446                         break;
7447                 case RTE_FLOW_ACTION_TYPE_AGE:
7448                         ret = flow_dv_validate_action_age(action_flags,
7449                                                           actions, dev,
7450                                                           error);
7451                         if (ret < 0)
7452                                 return ret;
7453                         /*
7454                          * Validate the regular AGE action (using counter)
7455                          * mutual exclusion with share counter actions.
7456                          */
7457                         if (!priv->sh->flow_hit_aso_en) {
7458                                 if (shared_count)
7459                                         return rte_flow_error_set
7460                                                 (error, EINVAL,
7461                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7462                                                 NULL,
7463                                                 "old age and shared count combination is not supported");
7464                                 if (sample_count)
7465                                         return rte_flow_error_set
7466                                                 (error, EINVAL,
7467                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7468                                                 NULL,
7469                                                 "old age action and count must be in the same sub flow");
7470                         }
7471                         action_flags |= MLX5_FLOW_ACTION_AGE;
7472                         ++actions_n;
7473                         break;
7474                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7475                         ret = flow_dv_validate_action_modify_ipv4_dscp
7476                                                          (action_flags,
7477                                                           actions,
7478                                                           item_flags,
7479                                                           error);
7480                         if (ret < 0)
7481                                 return ret;
7482                         /* Count all modify-header actions as one action. */
7483                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7484                                 ++actions_n;
7485                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7486                                 modify_after_mirror = 1;
7487                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7488                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7489                         break;
7490                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7491                         ret = flow_dv_validate_action_modify_ipv6_dscp
7492                                                                 (action_flags,
7493                                                                  actions,
7494                                                                  item_flags,
7495                                                                  error);
7496                         if (ret < 0)
7497                                 return ret;
7498                         /* Count all modify-header actions as one action. */
7499                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7500                                 ++actions_n;
7501                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7502                                 modify_after_mirror = 1;
7503                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7504                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7505                         break;
7506                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
7507                         ret = flow_dv_validate_action_sample(&action_flags,
7508                                                              actions, dev,
7509                                                              attr, item_flags,
7510                                                              rss, &sample_rss,
7511                                                              &sample_count,
7512                                                              &fdb_mirror_limit,
7513                                                              error);
7514                         if (ret < 0)
7515                                 return ret;
7516                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
7517                         ++actions_n;
7518                         break;
7519                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
7520                         if (actions[0].type != (typeof(actions[0].type))
7521                                 MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET)
7522                                 return rte_flow_error_set
7523                                                 (error, EINVAL,
7524                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7525                                                 NULL, "MLX5 private action "
7526                                                 "must be the first");
7527
7528                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
7529                         break;
7530                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
7531                         ret = flow_dv_validate_action_modify_field(dev,
7532                                                                    action_flags,
7533                                                                    actions,
7534                                                                    attr,
7535                                                                    error);
7536                         if (ret < 0)
7537                                 return ret;
7538                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7539                                 modify_after_mirror = 1;
7540                         /* Count all modify-header actions as one action. */
7541                         if (!(action_flags & MLX5_FLOW_ACTION_MODIFY_FIELD))
7542                                 ++actions_n;
7543                         action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
7544                         rw_act_num += ret;
7545                         break;
7546                 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
7547                         ret = flow_dv_validate_action_aso_ct(dev, action_flags,
7548                                                              item_flags, attr,
7549                                                              error);
7550                         if (ret < 0)
7551                                 return ret;
7552                         action_flags |= MLX5_FLOW_ACTION_CT;
7553                         break;
7554                 default:
7555                         return rte_flow_error_set(error, ENOTSUP,
7556                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7557                                                   actions,
7558                                                   "action not supported");
7559                 }
7560         }
7561         /*
7562          * Validate actions in flow rules
7563          * - Explicit decap action is prohibited by the tunnel offload API.
7564          * - Drop action in tunnel steer rule is prohibited by the API.
7565          * - Application cannot use MARK action because it's value can mask
7566          *   tunnel default miss nitification.
7567          * - JUMP in tunnel match rule has no support in current PMD
7568          *   implementation.
7569          * - TAG & META are reserved for future uses.
7570          */
7571         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_SET) {
7572                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_DECAP    |
7573                                             MLX5_FLOW_ACTION_MARK     |
7574                                             MLX5_FLOW_ACTION_SET_TAG  |
7575                                             MLX5_FLOW_ACTION_SET_META |
7576                                             MLX5_FLOW_ACTION_DROP;
7577
7578                 if (action_flags & bad_actions_mask)
7579                         return rte_flow_error_set
7580                                         (error, EINVAL,
7581                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7582                                         "Invalid RTE action in tunnel "
7583                                         "set decap rule");
7584                 if (!(action_flags & MLX5_FLOW_ACTION_JUMP))
7585                         return rte_flow_error_set
7586                                         (error, EINVAL,
7587                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7588                                         "tunnel set decap rule must terminate "
7589                                         "with JUMP");
7590                 if (!attr->ingress)
7591                         return rte_flow_error_set
7592                                         (error, EINVAL,
7593                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7594                                         "tunnel flows for ingress traffic only");
7595         }
7596         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_MATCH) {
7597                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_JUMP    |
7598                                             MLX5_FLOW_ACTION_MARK    |
7599                                             MLX5_FLOW_ACTION_SET_TAG |
7600                                             MLX5_FLOW_ACTION_SET_META;
7601
7602                 if (action_flags & bad_actions_mask)
7603                         return rte_flow_error_set
7604                                         (error, EINVAL,
7605                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7606                                         "Invalid RTE action in tunnel "
7607                                         "set match rule");
7608         }
7609         /*
7610          * Validate the drop action mutual exclusion with other actions.
7611          * Drop action is mutually-exclusive with any other action, except for
7612          * Count action.
7613          * Drop action compatibility with tunnel offload was already validated.
7614          */
7615         if (action_flags & (MLX5_FLOW_ACTION_TUNNEL_MATCH |
7616                             MLX5_FLOW_ACTION_TUNNEL_MATCH));
7617         else if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
7618             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
7619                 return rte_flow_error_set(error, EINVAL,
7620                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7621                                           "Drop action is mutually-exclusive "
7622                                           "with any other action, except for "
7623                                           "Count action");
7624         /* Eswitch has few restrictions on using items and actions */
7625         if (attr->transfer) {
7626                 if (!mlx5_flow_ext_mreg_supported(dev) &&
7627                     action_flags & MLX5_FLOW_ACTION_FLAG)
7628                         return rte_flow_error_set(error, ENOTSUP,
7629                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7630                                                   NULL,
7631                                                   "unsupported action FLAG");
7632                 if (!mlx5_flow_ext_mreg_supported(dev) &&
7633                     action_flags & MLX5_FLOW_ACTION_MARK)
7634                         return rte_flow_error_set(error, ENOTSUP,
7635                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7636                                                   NULL,
7637                                                   "unsupported action MARK");
7638                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
7639                         return rte_flow_error_set(error, ENOTSUP,
7640                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7641                                                   NULL,
7642                                                   "unsupported action QUEUE");
7643                 if (action_flags & MLX5_FLOW_ACTION_RSS)
7644                         return rte_flow_error_set(error, ENOTSUP,
7645                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7646                                                   NULL,
7647                                                   "unsupported action RSS");
7648                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
7649                         return rte_flow_error_set(error, EINVAL,
7650                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7651                                                   actions,
7652                                                   "no fate action is found");
7653         } else {
7654                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
7655                         return rte_flow_error_set(error, EINVAL,
7656                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7657                                                   actions,
7658                                                   "no fate action is found");
7659         }
7660         /*
7661          * Continue validation for Xcap and VLAN actions.
7662          * If hairpin is working in explicit TX rule mode, there is no actions
7663          * splitting and the validation of hairpin ingress flow should be the
7664          * same as other standard flows.
7665          */
7666         if ((action_flags & (MLX5_FLOW_XCAP_ACTIONS |
7667                              MLX5_FLOW_VLAN_ACTIONS)) &&
7668             (queue_index == 0xFFFF ||
7669              mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN ||
7670              ((conf = mlx5_rxq_get_hairpin_conf(dev, queue_index)) != NULL &&
7671              conf->tx_explicit != 0))) {
7672                 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
7673                     MLX5_FLOW_XCAP_ACTIONS)
7674                         return rte_flow_error_set(error, ENOTSUP,
7675                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7676                                                   NULL, "encap and decap "
7677                                                   "combination aren't supported");
7678                 if (!attr->transfer && attr->ingress) {
7679                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7680                                 return rte_flow_error_set
7681                                                 (error, ENOTSUP,
7682                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7683                                                  NULL, "encap is not supported"
7684                                                  " for ingress traffic");
7685                         else if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7686                                 return rte_flow_error_set
7687                                                 (error, ENOTSUP,
7688                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7689                                                  NULL, "push VLAN action not "
7690                                                  "supported for ingress");
7691                         else if ((action_flags & MLX5_FLOW_VLAN_ACTIONS) ==
7692                                         MLX5_FLOW_VLAN_ACTIONS)
7693                                 return rte_flow_error_set
7694                                                 (error, ENOTSUP,
7695                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7696                                                  NULL, "no support for "
7697                                                  "multiple VLAN actions");
7698                 }
7699         }
7700         if (action_flags & MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY) {
7701                 if ((action_flags & (MLX5_FLOW_FATE_ACTIONS &
7702                         ~MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)) &&
7703                         attr->ingress)
7704                         return rte_flow_error_set
7705                                 (error, ENOTSUP,
7706                                 RTE_FLOW_ERROR_TYPE_ACTION,
7707                                 NULL, "fate action not supported for "
7708                                 "meter with policy");
7709                 if (attr->egress) {
7710                         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
7711                                 return rte_flow_error_set
7712                                         (error, ENOTSUP,
7713                                         RTE_FLOW_ERROR_TYPE_ACTION,
7714                                         NULL, "modify header action in egress "
7715                                         "cannot be done before meter action");
7716                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7717                                 return rte_flow_error_set
7718                                         (error, ENOTSUP,
7719                                         RTE_FLOW_ERROR_TYPE_ACTION,
7720                                         NULL, "encap action in egress "
7721                                         "cannot be done before meter action");
7722                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7723                                 return rte_flow_error_set
7724                                         (error, ENOTSUP,
7725                                         RTE_FLOW_ERROR_TYPE_ACTION,
7726                                         NULL, "push vlan action in egress "
7727                                         "cannot be done before meter action");
7728                 }
7729         }
7730         /*
7731          * Hairpin flow will add one more TAG action in TX implicit mode.
7732          * In TX explicit mode, there will be no hairpin flow ID.
7733          */
7734         if (hairpin > 0)
7735                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7736         /* extra metadata enabled: one more TAG action will be add. */
7737         if (dev_conf->dv_flow_en &&
7738             dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
7739             mlx5_flow_ext_mreg_supported(dev))
7740                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7741         if (rw_act_num >
7742                         flow_dv_modify_hdr_action_max(dev, is_root)) {
7743                 return rte_flow_error_set(error, ENOTSUP,
7744                                           RTE_FLOW_ERROR_TYPE_ACTION,
7745                                           NULL, "too many header modify"
7746                                           " actions to support");
7747         }
7748         /* Eswitch egress mirror and modify flow has limitation on CX5 */
7749         if (fdb_mirror_limit && modify_after_mirror)
7750                 return rte_flow_error_set(error, EINVAL,
7751                                 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7752                                 "sample before modify action is not supported");
7753         return 0;
7754 }
7755
7756 /**
7757  * Internal preparation function. Allocates the DV flow size,
7758  * this size is constant.
7759  *
7760  * @param[in] dev
7761  *   Pointer to the rte_eth_dev structure.
7762  * @param[in] attr
7763  *   Pointer to the flow attributes.
7764  * @param[in] items
7765  *   Pointer to the list of items.
7766  * @param[in] actions
7767  *   Pointer to the list of actions.
7768  * @param[out] error
7769  *   Pointer to the error structure.
7770  *
7771  * @return
7772  *   Pointer to mlx5_flow object on success,
7773  *   otherwise NULL and rte_errno is set.
7774  */
7775 static struct mlx5_flow *
7776 flow_dv_prepare(struct rte_eth_dev *dev,
7777                 const struct rte_flow_attr *attr __rte_unused,
7778                 const struct rte_flow_item items[] __rte_unused,
7779                 const struct rte_flow_action actions[] __rte_unused,
7780                 struct rte_flow_error *error)
7781 {
7782         uint32_t handle_idx = 0;
7783         struct mlx5_flow *dev_flow;
7784         struct mlx5_flow_handle *dev_handle;
7785         struct mlx5_priv *priv = dev->data->dev_private;
7786         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
7787
7788         MLX5_ASSERT(wks);
7789         wks->skip_matcher_reg = 0;
7790         /* In case of corrupting the memory. */
7791         if (wks->flow_idx >= MLX5_NUM_MAX_DEV_FLOWS) {
7792                 rte_flow_error_set(error, ENOSPC,
7793                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7794                                    "not free temporary device flow");
7795                 return NULL;
7796         }
7797         dev_handle = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
7798                                    &handle_idx);
7799         if (!dev_handle) {
7800                 rte_flow_error_set(error, ENOMEM,
7801                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7802                                    "not enough memory to create flow handle");
7803                 return NULL;
7804         }
7805         MLX5_ASSERT(wks->flow_idx < RTE_DIM(wks->flows));
7806         dev_flow = &wks->flows[wks->flow_idx++];
7807         memset(dev_flow, 0, sizeof(*dev_flow));
7808         dev_flow->handle = dev_handle;
7809         dev_flow->handle_idx = handle_idx;
7810         /*
7811          * In some old rdma-core releases, before continuing, a check of the
7812          * length of matching parameter will be done at first. It needs to use
7813          * the length without misc4 param. If the flow has misc4 support, then
7814          * the length needs to be adjusted accordingly. Each param member is
7815          * aligned with a 64B boundary naturally.
7816          */
7817         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param) -
7818                                   MLX5_ST_SZ_BYTES(fte_match_set_misc4);
7819         dev_flow->ingress = attr->ingress;
7820         dev_flow->dv.transfer = attr->transfer;
7821         return dev_flow;
7822 }
7823
7824 #ifdef RTE_LIBRTE_MLX5_DEBUG
7825 /**
7826  * Sanity check for match mask and value. Similar to check_valid_spec() in
7827  * kernel driver. If unmasked bit is present in value, it returns failure.
7828  *
7829  * @param match_mask
7830  *   pointer to match mask buffer.
7831  * @param match_value
7832  *   pointer to match value buffer.
7833  *
7834  * @return
7835  *   0 if valid, -EINVAL otherwise.
7836  */
7837 static int
7838 flow_dv_check_valid_spec(void *match_mask, void *match_value)
7839 {
7840         uint8_t *m = match_mask;
7841         uint8_t *v = match_value;
7842         unsigned int i;
7843
7844         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
7845                 if (v[i] & ~m[i]) {
7846                         DRV_LOG(ERR,
7847                                 "match_value differs from match_criteria"
7848                                 " %p[%u] != %p[%u]",
7849                                 match_value, i, match_mask, i);
7850                         return -EINVAL;
7851                 }
7852         }
7853         return 0;
7854 }
7855 #endif
7856
7857 /**
7858  * Add match of ip_version.
7859  *
7860  * @param[in] group
7861  *   Flow group.
7862  * @param[in] headers_v
7863  *   Values header pointer.
7864  * @param[in] headers_m
7865  *   Masks header pointer.
7866  * @param[in] ip_version
7867  *   The IP version to set.
7868  */
7869 static inline void
7870 flow_dv_set_match_ip_version(uint32_t group,
7871                              void *headers_v,
7872                              void *headers_m,
7873                              uint8_t ip_version)
7874 {
7875         if (group == 0)
7876                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
7877         else
7878                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version,
7879                          ip_version);
7880         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, ip_version);
7881         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, 0);
7882         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype, 0);
7883 }
7884
7885 /**
7886  * Add Ethernet item to matcher and to the value.
7887  *
7888  * @param[in, out] matcher
7889  *   Flow matcher.
7890  * @param[in, out] key
7891  *   Flow matcher value.
7892  * @param[in] item
7893  *   Flow pattern to translate.
7894  * @param[in] inner
7895  *   Item is inner pattern.
7896  */
7897 static void
7898 flow_dv_translate_item_eth(void *matcher, void *key,
7899                            const struct rte_flow_item *item, int inner,
7900                            uint32_t group)
7901 {
7902         const struct rte_flow_item_eth *eth_m = item->mask;
7903         const struct rte_flow_item_eth *eth_v = item->spec;
7904         const struct rte_flow_item_eth nic_mask = {
7905                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
7906                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
7907                 .type = RTE_BE16(0xffff),
7908                 .has_vlan = 0,
7909         };
7910         void *hdrs_m;
7911         void *hdrs_v;
7912         char *l24_v;
7913         unsigned int i;
7914
7915         if (!eth_v)
7916                 return;
7917         if (!eth_m)
7918                 eth_m = &nic_mask;
7919         if (inner) {
7920                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
7921                                          inner_headers);
7922                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
7923         } else {
7924                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
7925                                          outer_headers);
7926                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
7927         }
7928         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, dmac_47_16),
7929                &eth_m->dst, sizeof(eth_m->dst));
7930         /* The value must be in the range of the mask. */
7931         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, dmac_47_16);
7932         for (i = 0; i < sizeof(eth_m->dst); ++i)
7933                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
7934         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, smac_47_16),
7935                &eth_m->src, sizeof(eth_m->src));
7936         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, smac_47_16);
7937         /* The value must be in the range of the mask. */
7938         for (i = 0; i < sizeof(eth_m->dst); ++i)
7939                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
7940         /*
7941          * HW supports match on one Ethertype, the Ethertype following the last
7942          * VLAN tag of the packet (see PRM).
7943          * Set match on ethertype only if ETH header is not followed by VLAN.
7944          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
7945          * ethertype, and use ip_version field instead.
7946          * eCPRI over Ether layer will use type value 0xAEFE.
7947          */
7948         if (eth_m->type == 0xFFFF) {
7949                 /* Set cvlan_tag mask for any single\multi\un-tagged case. */
7950                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
7951                 switch (eth_v->type) {
7952                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
7953                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
7954                         return;
7955                 case RTE_BE16(RTE_ETHER_TYPE_QINQ):
7956                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
7957                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
7958                         return;
7959                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
7960                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
7961                         return;
7962                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
7963                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
7964                         return;
7965                 default:
7966                         break;
7967                 }
7968         }
7969         if (eth_m->has_vlan) {
7970                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
7971                 if (eth_v->has_vlan) {
7972                         /*
7973                          * Here, when also has_more_vlan field in VLAN item is
7974                          * not set, only single-tagged packets will be matched.
7975                          */
7976                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
7977                         return;
7978                 }
7979         }
7980         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
7981                  rte_be_to_cpu_16(eth_m->type));
7982         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
7983         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
7984 }
7985
7986 /**
7987  * Add VLAN item to matcher and to the value.
7988  *
7989  * @param[in, out] dev_flow
7990  *   Flow descriptor.
7991  * @param[in, out] matcher
7992  *   Flow matcher.
7993  * @param[in, out] key
7994  *   Flow matcher value.
7995  * @param[in] item
7996  *   Flow pattern to translate.
7997  * @param[in] inner
7998  *   Item is inner pattern.
7999  */
8000 static void
8001 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
8002                             void *matcher, void *key,
8003                             const struct rte_flow_item *item,
8004                             int inner, uint32_t group)
8005 {
8006         const struct rte_flow_item_vlan *vlan_m = item->mask;
8007         const struct rte_flow_item_vlan *vlan_v = item->spec;
8008         void *hdrs_m;
8009         void *hdrs_v;
8010         uint16_t tci_m;
8011         uint16_t tci_v;
8012
8013         if (inner) {
8014                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8015                                          inner_headers);
8016                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8017         } else {
8018                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8019                                          outer_headers);
8020                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8021                 /*
8022                  * This is workaround, masks are not supported,
8023                  * and pre-validated.
8024                  */
8025                 if (vlan_v)
8026                         dev_flow->handle->vf_vlan.tag =
8027                                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
8028         }
8029         /*
8030          * When VLAN item exists in flow, mark packet as tagged,
8031          * even if TCI is not specified.
8032          */
8033         if (!MLX5_GET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag)) {
8034                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8035                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8036         }
8037         if (!vlan_v)
8038                 return;
8039         if (!vlan_m)
8040                 vlan_m = &rte_flow_item_vlan_mask;
8041         tci_m = rte_be_to_cpu_16(vlan_m->tci);
8042         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
8043         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_vid, tci_m);
8044         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_vid, tci_v);
8045         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_cfi, tci_m >> 12);
8046         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_cfi, tci_v >> 12);
8047         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_prio, tci_m >> 13);
8048         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_prio, tci_v >> 13);
8049         /*
8050          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8051          * ethertype, and use ip_version field instead.
8052          */
8053         if (vlan_m->inner_type == 0xFFFF) {
8054                 switch (vlan_v->inner_type) {
8055                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8056                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8057                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8058                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8059                         return;
8060                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8061                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8062                         return;
8063                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8064                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8065                         return;
8066                 default:
8067                         break;
8068                 }
8069         }
8070         if (vlan_m->has_more_vlan && vlan_v->has_more_vlan) {
8071                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8072                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8073                 /* Only one vlan_tag bit can be set. */
8074                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8075                 return;
8076         }
8077         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8078                  rte_be_to_cpu_16(vlan_m->inner_type));
8079         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, ethertype,
8080                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
8081 }
8082
8083 /**
8084  * Add IPV4 item to matcher and to the value.
8085  *
8086  * @param[in, out] matcher
8087  *   Flow matcher.
8088  * @param[in, out] key
8089  *   Flow matcher value.
8090  * @param[in] item
8091  *   Flow pattern to translate.
8092  * @param[in] inner
8093  *   Item is inner pattern.
8094  * @param[in] group
8095  *   The group to insert the rule.
8096  */
8097 static void
8098 flow_dv_translate_item_ipv4(void *matcher, void *key,
8099                             const struct rte_flow_item *item,
8100                             int inner, uint32_t group)
8101 {
8102         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
8103         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
8104         const struct rte_flow_item_ipv4 nic_mask = {
8105                 .hdr = {
8106                         .src_addr = RTE_BE32(0xffffffff),
8107                         .dst_addr = RTE_BE32(0xffffffff),
8108                         .type_of_service = 0xff,
8109                         .next_proto_id = 0xff,
8110                         .time_to_live = 0xff,
8111                 },
8112         };
8113         void *headers_m;
8114         void *headers_v;
8115         char *l24_m;
8116         char *l24_v;
8117         uint8_t tos;
8118
8119         if (inner) {
8120                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8121                                          inner_headers);
8122                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8123         } else {
8124                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8125                                          outer_headers);
8126                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8127         }
8128         flow_dv_set_match_ip_version(group, headers_v, headers_m, 4);
8129         if (!ipv4_v)
8130                 return;
8131         if (!ipv4_m)
8132                 ipv4_m = &nic_mask;
8133         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8134                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8135         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8136                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8137         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
8138         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
8139         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8140                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
8141         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8142                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
8143         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
8144         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
8145         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
8146         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
8147                  ipv4_m->hdr.type_of_service);
8148         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
8149         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
8150                  ipv4_m->hdr.type_of_service >> 2);
8151         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
8152         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8153                  ipv4_m->hdr.next_proto_id);
8154         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8155                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
8156         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8157                  ipv4_m->hdr.time_to_live);
8158         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8159                  ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
8160         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8161                  !!(ipv4_m->hdr.fragment_offset));
8162         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8163                  !!(ipv4_v->hdr.fragment_offset & ipv4_m->hdr.fragment_offset));
8164 }
8165
8166 /**
8167  * Add IPV6 item to matcher and to the value.
8168  *
8169  * @param[in, out] matcher
8170  *   Flow matcher.
8171  * @param[in, out] key
8172  *   Flow matcher value.
8173  * @param[in] item
8174  *   Flow pattern to translate.
8175  * @param[in] inner
8176  *   Item is inner pattern.
8177  * @param[in] group
8178  *   The group to insert the rule.
8179  */
8180 static void
8181 flow_dv_translate_item_ipv6(void *matcher, void *key,
8182                             const struct rte_flow_item *item,
8183                             int inner, uint32_t group)
8184 {
8185         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
8186         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
8187         const struct rte_flow_item_ipv6 nic_mask = {
8188                 .hdr = {
8189                         .src_addr =
8190                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
8191                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
8192                         .dst_addr =
8193                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
8194                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
8195                         .vtc_flow = RTE_BE32(0xffffffff),
8196                         .proto = 0xff,
8197                         .hop_limits = 0xff,
8198                 },
8199         };
8200         void *headers_m;
8201         void *headers_v;
8202         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8203         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8204         char *l24_m;
8205         char *l24_v;
8206         uint32_t vtc_m;
8207         uint32_t vtc_v;
8208         int i;
8209         int size;
8210
8211         if (inner) {
8212                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8213                                          inner_headers);
8214                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8215         } else {
8216                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8217                                          outer_headers);
8218                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8219         }
8220         flow_dv_set_match_ip_version(group, headers_v, headers_m, 6);
8221         if (!ipv6_v)
8222                 return;
8223         if (!ipv6_m)
8224                 ipv6_m = &nic_mask;
8225         size = sizeof(ipv6_m->hdr.dst_addr);
8226         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8227                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8228         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8229                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8230         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
8231         for (i = 0; i < size; ++i)
8232                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
8233         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8234                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
8235         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8236                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
8237         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
8238         for (i = 0; i < size; ++i)
8239                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
8240         /* TOS. */
8241         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
8242         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
8243         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
8244         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
8245         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
8246         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
8247         /* Label. */
8248         if (inner) {
8249                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
8250                          vtc_m);
8251                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
8252                          vtc_v);
8253         } else {
8254                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
8255                          vtc_m);
8256                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
8257                          vtc_v);
8258         }
8259         /* Protocol. */
8260         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8261                  ipv6_m->hdr.proto);
8262         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8263                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
8264         /* Hop limit. */
8265         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8266                  ipv6_m->hdr.hop_limits);
8267         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8268                  ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
8269         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8270                  !!(ipv6_m->has_frag_ext));
8271         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8272                  !!(ipv6_v->has_frag_ext & ipv6_m->has_frag_ext));
8273 }
8274
8275 /**
8276  * Add IPV6 fragment extension item to matcher and to the value.
8277  *
8278  * @param[in, out] matcher
8279  *   Flow matcher.
8280  * @param[in, out] key
8281  *   Flow matcher value.
8282  * @param[in] item
8283  *   Flow pattern to translate.
8284  * @param[in] inner
8285  *   Item is inner pattern.
8286  */
8287 static void
8288 flow_dv_translate_item_ipv6_frag_ext(void *matcher, void *key,
8289                                      const struct rte_flow_item *item,
8290                                      int inner)
8291 {
8292         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_m = item->mask;
8293         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_v = item->spec;
8294         const struct rte_flow_item_ipv6_frag_ext nic_mask = {
8295                 .hdr = {
8296                         .next_header = 0xff,
8297                         .frag_data = RTE_BE16(0xffff),
8298                 },
8299         };
8300         void *headers_m;
8301         void *headers_v;
8302
8303         if (inner) {
8304                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8305                                          inner_headers);
8306                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8307         } else {
8308                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8309                                          outer_headers);
8310                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8311         }
8312         /* IPv6 fragment extension item exists, so packet is IP fragment. */
8313         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
8314         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 1);
8315         if (!ipv6_frag_ext_v)
8316                 return;
8317         if (!ipv6_frag_ext_m)
8318                 ipv6_frag_ext_m = &nic_mask;
8319         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8320                  ipv6_frag_ext_m->hdr.next_header);
8321         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8322                  ipv6_frag_ext_v->hdr.next_header &
8323                  ipv6_frag_ext_m->hdr.next_header);
8324 }
8325
8326 /**
8327  * Add TCP item to matcher and to the value.
8328  *
8329  * @param[in, out] matcher
8330  *   Flow matcher.
8331  * @param[in, out] key
8332  *   Flow matcher value.
8333  * @param[in] item
8334  *   Flow pattern to translate.
8335  * @param[in] inner
8336  *   Item is inner pattern.
8337  */
8338 static void
8339 flow_dv_translate_item_tcp(void *matcher, void *key,
8340                            const struct rte_flow_item *item,
8341                            int inner)
8342 {
8343         const struct rte_flow_item_tcp *tcp_m = item->mask;
8344         const struct rte_flow_item_tcp *tcp_v = item->spec;
8345         void *headers_m;
8346         void *headers_v;
8347
8348         if (inner) {
8349                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8350                                          inner_headers);
8351                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8352         } else {
8353                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8354                                          outer_headers);
8355                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8356         }
8357         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8358         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
8359         if (!tcp_v)
8360                 return;
8361         if (!tcp_m)
8362                 tcp_m = &rte_flow_item_tcp_mask;
8363         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
8364                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
8365         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
8366                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
8367         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
8368                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
8369         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
8370                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
8371         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
8372                  tcp_m->hdr.tcp_flags);
8373         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
8374                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
8375 }
8376
8377 /**
8378  * Add UDP item to matcher and to the value.
8379  *
8380  * @param[in, out] matcher
8381  *   Flow matcher.
8382  * @param[in, out] key
8383  *   Flow matcher value.
8384  * @param[in] item
8385  *   Flow pattern to translate.
8386  * @param[in] inner
8387  *   Item is inner pattern.
8388  */
8389 static void
8390 flow_dv_translate_item_udp(void *matcher, void *key,
8391                            const struct rte_flow_item *item,
8392                            int inner)
8393 {
8394         const struct rte_flow_item_udp *udp_m = item->mask;
8395         const struct rte_flow_item_udp *udp_v = item->spec;
8396         void *headers_m;
8397         void *headers_v;
8398
8399         if (inner) {
8400                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8401                                          inner_headers);
8402                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8403         } else {
8404                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8405                                          outer_headers);
8406                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8407         }
8408         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8409         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
8410         if (!udp_v)
8411                 return;
8412         if (!udp_m)
8413                 udp_m = &rte_flow_item_udp_mask;
8414         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
8415                  rte_be_to_cpu_16(udp_m->hdr.src_port));
8416         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
8417                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
8418         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
8419                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
8420         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
8421                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
8422 }
8423
8424 /**
8425  * Add GRE optional Key item to matcher and to the value.
8426  *
8427  * @param[in, out] matcher
8428  *   Flow matcher.
8429  * @param[in, out] key
8430  *   Flow matcher value.
8431  * @param[in] item
8432  *   Flow pattern to translate.
8433  * @param[in] inner
8434  *   Item is inner pattern.
8435  */
8436 static void
8437 flow_dv_translate_item_gre_key(void *matcher, void *key,
8438                                    const struct rte_flow_item *item)
8439 {
8440         const rte_be32_t *key_m = item->mask;
8441         const rte_be32_t *key_v = item->spec;
8442         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8443         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8444         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
8445
8446         /* GRE K bit must be on and should already be validated */
8447         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
8448         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
8449         if (!key_v)
8450                 return;
8451         if (!key_m)
8452                 key_m = &gre_key_default_mask;
8453         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
8454                  rte_be_to_cpu_32(*key_m) >> 8);
8455         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
8456                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
8457         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
8458                  rte_be_to_cpu_32(*key_m) & 0xFF);
8459         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
8460                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
8461 }
8462
8463 /**
8464  * Add GRE item to matcher and to the value.
8465  *
8466  * @param[in, out] matcher
8467  *   Flow matcher.
8468  * @param[in, out] key
8469  *   Flow matcher value.
8470  * @param[in] item
8471  *   Flow pattern to translate.
8472  * @param[in] inner
8473  *   Item is inner pattern.
8474  */
8475 static void
8476 flow_dv_translate_item_gre(void *matcher, void *key,
8477                            const struct rte_flow_item *item,
8478                            int inner)
8479 {
8480         const struct rte_flow_item_gre *gre_m = item->mask;
8481         const struct rte_flow_item_gre *gre_v = item->spec;
8482         void *headers_m;
8483         void *headers_v;
8484         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8485         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8486         struct {
8487                 union {
8488                         __extension__
8489                         struct {
8490                                 uint16_t version:3;
8491                                 uint16_t rsvd0:9;
8492                                 uint16_t s_present:1;
8493                                 uint16_t k_present:1;
8494                                 uint16_t rsvd_bit1:1;
8495                                 uint16_t c_present:1;
8496                         };
8497                         uint16_t value;
8498                 };
8499         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
8500
8501         if (inner) {
8502                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8503                                          inner_headers);
8504                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8505         } else {
8506                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8507                                          outer_headers);
8508                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8509         }
8510         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8511         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
8512         if (!gre_v)
8513                 return;
8514         if (!gre_m)
8515                 gre_m = &rte_flow_item_gre_mask;
8516         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
8517                  rte_be_to_cpu_16(gre_m->protocol));
8518         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
8519                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
8520         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
8521         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
8522         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
8523                  gre_crks_rsvd0_ver_m.c_present);
8524         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
8525                  gre_crks_rsvd0_ver_v.c_present &
8526                  gre_crks_rsvd0_ver_m.c_present);
8527         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
8528                  gre_crks_rsvd0_ver_m.k_present);
8529         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
8530                  gre_crks_rsvd0_ver_v.k_present &
8531                  gre_crks_rsvd0_ver_m.k_present);
8532         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
8533                  gre_crks_rsvd0_ver_m.s_present);
8534         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
8535                  gre_crks_rsvd0_ver_v.s_present &
8536                  gre_crks_rsvd0_ver_m.s_present);
8537 }
8538
8539 /**
8540  * Add NVGRE item to matcher and to the value.
8541  *
8542  * @param[in, out] matcher
8543  *   Flow matcher.
8544  * @param[in, out] key
8545  *   Flow matcher value.
8546  * @param[in] item
8547  *   Flow pattern to translate.
8548  * @param[in] inner
8549  *   Item is inner pattern.
8550  */
8551 static void
8552 flow_dv_translate_item_nvgre(void *matcher, void *key,
8553                              const struct rte_flow_item *item,
8554                              int inner)
8555 {
8556         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
8557         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
8558         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8559         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8560         const char *tni_flow_id_m;
8561         const char *tni_flow_id_v;
8562         char *gre_key_m;
8563         char *gre_key_v;
8564         int size;
8565         int i;
8566
8567         /* For NVGRE, GRE header fields must be set with defined values. */
8568         const struct rte_flow_item_gre gre_spec = {
8569                 .c_rsvd0_ver = RTE_BE16(0x2000),
8570                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
8571         };
8572         const struct rte_flow_item_gre gre_mask = {
8573                 .c_rsvd0_ver = RTE_BE16(0xB000),
8574                 .protocol = RTE_BE16(UINT16_MAX),
8575         };
8576         const struct rte_flow_item gre_item = {
8577                 .spec = &gre_spec,
8578                 .mask = &gre_mask,
8579                 .last = NULL,
8580         };
8581         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
8582         if (!nvgre_v)
8583                 return;
8584         if (!nvgre_m)
8585                 nvgre_m = &rte_flow_item_nvgre_mask;
8586         tni_flow_id_m = (const char *)nvgre_m->tni;
8587         tni_flow_id_v = (const char *)nvgre_v->tni;
8588         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
8589         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
8590         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
8591         memcpy(gre_key_m, tni_flow_id_m, size);
8592         for (i = 0; i < size; ++i)
8593                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
8594 }
8595
8596 /**
8597  * Add VXLAN item to matcher and to the value.
8598  *
8599  * @param[in, out] matcher
8600  *   Flow matcher.
8601  * @param[in, out] key
8602  *   Flow matcher value.
8603  * @param[in] item
8604  *   Flow pattern to translate.
8605  * @param[in] inner
8606  *   Item is inner pattern.
8607  */
8608 static void
8609 flow_dv_translate_item_vxlan(void *matcher, void *key,
8610                              const struct rte_flow_item *item,
8611                              int inner)
8612 {
8613         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
8614         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
8615         void *headers_m;
8616         void *headers_v;
8617         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8618         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8619         char *vni_m;
8620         char *vni_v;
8621         uint16_t dport;
8622         int size;
8623         int i;
8624
8625         if (inner) {
8626                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8627                                          inner_headers);
8628                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8629         } else {
8630                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8631                                          outer_headers);
8632                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8633         }
8634         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
8635                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
8636         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8637                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8638                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8639         }
8640         if (!vxlan_v)
8641                 return;
8642         if (!vxlan_m)
8643                 vxlan_m = &rte_flow_item_vxlan_mask;
8644         size = sizeof(vxlan_m->vni);
8645         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
8646         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
8647         memcpy(vni_m, vxlan_m->vni, size);
8648         for (i = 0; i < size; ++i)
8649                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
8650 }
8651
8652 /**
8653  * Add VXLAN-GPE item to matcher and to the value.
8654  *
8655  * @param[in, out] matcher
8656  *   Flow matcher.
8657  * @param[in, out] key
8658  *   Flow matcher value.
8659  * @param[in] item
8660  *   Flow pattern to translate.
8661  * @param[in] inner
8662  *   Item is inner pattern.
8663  */
8664
8665 static void
8666 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
8667                                  const struct rte_flow_item *item, int inner)
8668 {
8669         const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
8670         const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
8671         void *headers_m;
8672         void *headers_v;
8673         void *misc_m =
8674                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
8675         void *misc_v =
8676                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
8677         char *vni_m;
8678         char *vni_v;
8679         uint16_t dport;
8680         int size;
8681         int i;
8682         uint8_t flags_m = 0xff;
8683         uint8_t flags_v = 0xc;
8684
8685         if (inner) {
8686                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8687                                          inner_headers);
8688                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8689         } else {
8690                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8691                                          outer_headers);
8692                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8693         }
8694         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
8695                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
8696         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8697                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8698                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8699         }
8700         if (!vxlan_v)
8701                 return;
8702         if (!vxlan_m)
8703                 vxlan_m = &rte_flow_item_vxlan_gpe_mask;
8704         size = sizeof(vxlan_m->vni);
8705         vni_m = MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
8706         vni_v = MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
8707         memcpy(vni_m, vxlan_m->vni, size);
8708         for (i = 0; i < size; ++i)
8709                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
8710         if (vxlan_m->flags) {
8711                 flags_m = vxlan_m->flags;
8712                 flags_v = vxlan_v->flags;
8713         }
8714         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
8715         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
8716         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_next_protocol,
8717                  vxlan_m->protocol);
8718         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_next_protocol,
8719                  vxlan_v->protocol);
8720 }
8721
8722 /**
8723  * Add Geneve item to matcher and to the value.
8724  *
8725  * @param[in, out] matcher
8726  *   Flow matcher.
8727  * @param[in, out] key
8728  *   Flow matcher value.
8729  * @param[in] item
8730  *   Flow pattern to translate.
8731  * @param[in] inner
8732  *   Item is inner pattern.
8733  */
8734
8735 static void
8736 flow_dv_translate_item_geneve(void *matcher, void *key,
8737                               const struct rte_flow_item *item, int inner)
8738 {
8739         const struct rte_flow_item_geneve *geneve_m = item->mask;
8740         const struct rte_flow_item_geneve *geneve_v = item->spec;
8741         void *headers_m;
8742         void *headers_v;
8743         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8744         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8745         uint16_t dport;
8746         uint16_t gbhdr_m;
8747         uint16_t gbhdr_v;
8748         char *vni_m;
8749         char *vni_v;
8750         size_t size, i;
8751
8752         if (inner) {
8753                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8754                                          inner_headers);
8755                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8756         } else {
8757                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8758                                          outer_headers);
8759                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8760         }
8761         dport = MLX5_UDP_PORT_GENEVE;
8762         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8763                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8764                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8765         }
8766         if (!geneve_v)
8767                 return;
8768         if (!geneve_m)
8769                 geneve_m = &rte_flow_item_geneve_mask;
8770         size = sizeof(geneve_m->vni);
8771         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
8772         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
8773         memcpy(vni_m, geneve_m->vni, size);
8774         for (i = 0; i < size; ++i)
8775                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
8776         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
8777                  rte_be_to_cpu_16(geneve_m->protocol));
8778         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
8779                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
8780         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
8781         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
8782         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
8783                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
8784         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
8785                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
8786         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
8787                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
8788         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
8789                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
8790                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
8791 }
8792
8793 /**
8794  * Create Geneve TLV option resource.
8795  *
8796  * @param dev[in, out]
8797  *   Pointer to rte_eth_dev structure.
8798  * @param[in, out] tag_be24
8799  *   Tag value in big endian then R-shift 8.
8800  * @parm[in, out] dev_flow
8801  *   Pointer to the dev_flow.
8802  * @param[out] error
8803  *   pointer to error structure.
8804  *
8805  * @return
8806  *   0 on success otherwise -errno and errno is set.
8807  */
8808
8809 int
8810 flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev,
8811                                              const struct rte_flow_item *item,
8812                                              struct rte_flow_error *error)
8813 {
8814         struct mlx5_priv *priv = dev->data->dev_private;
8815         struct mlx5_dev_ctx_shared *sh = priv->sh;
8816         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
8817                         sh->geneve_tlv_option_resource;
8818         struct mlx5_devx_obj *obj;
8819         const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
8820         int ret = 0;
8821
8822         if (!geneve_opt_v)
8823                 return -1;
8824         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
8825         if (geneve_opt_resource != NULL) {
8826                 if (geneve_opt_resource->option_class ==
8827                         geneve_opt_v->option_class &&
8828                         geneve_opt_resource->option_type ==
8829                         geneve_opt_v->option_type &&
8830                         geneve_opt_resource->length ==
8831                         geneve_opt_v->option_len) {
8832                         /* We already have GENVE TLV option obj allocated. */
8833                         __atomic_fetch_add(&geneve_opt_resource->refcnt, 1,
8834                                            __ATOMIC_RELAXED);
8835                 } else {
8836                         ret = rte_flow_error_set(error, ENOMEM,
8837                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8838                                 "Only one GENEVE TLV option supported");
8839                         goto exit;
8840                 }
8841         } else {
8842                 /* Create a GENEVE TLV object and resource. */
8843                 obj = mlx5_devx_cmd_create_geneve_tlv_option(sh->ctx,
8844                                 geneve_opt_v->option_class,
8845                                 geneve_opt_v->option_type,
8846                                 geneve_opt_v->option_len);
8847                 if (!obj) {
8848                         ret = rte_flow_error_set(error, ENODATA,
8849                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8850                                 "Failed to create GENEVE TLV Devx object");
8851                         goto exit;
8852                 }
8853                 sh->geneve_tlv_option_resource =
8854                                 mlx5_malloc(MLX5_MEM_ZERO,
8855                                                 sizeof(*geneve_opt_resource),
8856                                                 0, SOCKET_ID_ANY);
8857                 if (!sh->geneve_tlv_option_resource) {
8858                         claim_zero(mlx5_devx_cmd_destroy(obj));
8859                         ret = rte_flow_error_set(error, ENOMEM,
8860                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8861                                 "GENEVE TLV object memory allocation failed");
8862                         goto exit;
8863                 }
8864                 geneve_opt_resource = sh->geneve_tlv_option_resource;
8865                 geneve_opt_resource->obj = obj;
8866                 geneve_opt_resource->option_class = geneve_opt_v->option_class;
8867                 geneve_opt_resource->option_type = geneve_opt_v->option_type;
8868                 geneve_opt_resource->length = geneve_opt_v->option_len;
8869                 __atomic_store_n(&geneve_opt_resource->refcnt, 1,
8870                                 __ATOMIC_RELAXED);
8871         }
8872 exit:
8873         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
8874         return ret;
8875 }
8876
8877 /**
8878  * Add Geneve TLV option item to matcher.
8879  *
8880  * @param[in, out] dev
8881  *   Pointer to rte_eth_dev structure.
8882  * @param[in, out] matcher
8883  *   Flow matcher.
8884  * @param[in, out] key
8885  *   Flow matcher value.
8886  * @param[in] item
8887  *   Flow pattern to translate.
8888  * @param[out] error
8889  *   Pointer to error structure.
8890  */
8891 static int
8892 flow_dv_translate_item_geneve_opt(struct rte_eth_dev *dev, void *matcher,
8893                                   void *key, const struct rte_flow_item *item,
8894                                   struct rte_flow_error *error)
8895 {
8896         const struct rte_flow_item_geneve_opt *geneve_opt_m = item->mask;
8897         const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
8898         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8899         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8900         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
8901                         misc_parameters_3);
8902         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
8903         rte_be32_t opt_data_key = 0, opt_data_mask = 0;
8904         int ret = 0;
8905
8906         if (!geneve_opt_v)
8907                 return -1;
8908         if (!geneve_opt_m)
8909                 geneve_opt_m = &rte_flow_item_geneve_opt_mask;
8910         ret = flow_dev_geneve_tlv_option_resource_register(dev, item,
8911                                                            error);
8912         if (ret) {
8913                 DRV_LOG(ERR, "Failed to create geneve_tlv_obj");
8914                 return ret;
8915         }
8916         /*
8917          * Set the option length in GENEVE header if not requested.
8918          * The GENEVE TLV option length is expressed by the option length field
8919          * in the GENEVE header.
8920          * If the option length was not requested but the GENEVE TLV option item
8921          * is present we set the option length field implicitly.
8922          */
8923         if (!MLX5_GET16(fte_match_set_misc, misc_m, geneve_opt_len)) {
8924                 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
8925                          MLX5_GENEVE_OPTLEN_MASK);
8926                 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
8927                          geneve_opt_v->option_len + 1);
8928         }
8929         /* Set the data. */
8930         if (geneve_opt_v->data) {
8931                 memcpy(&opt_data_key, geneve_opt_v->data,
8932                         RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
8933                                 sizeof(opt_data_key)));
8934                 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
8935                                 sizeof(opt_data_key));
8936                 memcpy(&opt_data_mask, geneve_opt_m->data,
8937                         RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
8938                                 sizeof(opt_data_mask)));
8939                 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
8940                                 sizeof(opt_data_mask));
8941                 MLX5_SET(fte_match_set_misc3, misc3_m,
8942                                 geneve_tlv_option_0_data,
8943                                 rte_be_to_cpu_32(opt_data_mask));
8944                 MLX5_SET(fte_match_set_misc3, misc3_v,
8945                                 geneve_tlv_option_0_data,
8946                         rte_be_to_cpu_32(opt_data_key & opt_data_mask));
8947         }
8948         return ret;
8949 }
8950
8951 /**
8952  * Add MPLS item to matcher and to the value.
8953  *
8954  * @param[in, out] matcher
8955  *   Flow matcher.
8956  * @param[in, out] key
8957  *   Flow matcher value.
8958  * @param[in] item
8959  *   Flow pattern to translate.
8960  * @param[in] prev_layer
8961  *   The protocol layer indicated in previous item.
8962  * @param[in] inner
8963  *   Item is inner pattern.
8964  */
8965 static void
8966 flow_dv_translate_item_mpls(void *matcher, void *key,
8967                             const struct rte_flow_item *item,
8968                             uint64_t prev_layer,
8969                             int inner)
8970 {
8971         const uint32_t *in_mpls_m = item->mask;
8972         const uint32_t *in_mpls_v = item->spec;
8973         uint32_t *out_mpls_m = 0;
8974         uint32_t *out_mpls_v = 0;
8975         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8976         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8977         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
8978                                      misc_parameters_2);
8979         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
8980         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
8981         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8982
8983         switch (prev_layer) {
8984         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
8985                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
8986                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
8987                          MLX5_UDP_PORT_MPLS);
8988                 break;
8989         case MLX5_FLOW_LAYER_GRE:
8990                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
8991                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
8992                          RTE_ETHER_TYPE_MPLS);
8993                 break;
8994         default:
8995                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8996                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8997                          IPPROTO_MPLS);
8998                 break;
8999         }
9000         if (!in_mpls_v)
9001                 return;
9002         if (!in_mpls_m)
9003                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
9004         switch (prev_layer) {
9005         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9006                 out_mpls_m =
9007                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9008                                                  outer_first_mpls_over_udp);
9009                 out_mpls_v =
9010                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9011                                                  outer_first_mpls_over_udp);
9012                 break;
9013         case MLX5_FLOW_LAYER_GRE:
9014                 out_mpls_m =
9015                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9016                                                  outer_first_mpls_over_gre);
9017                 out_mpls_v =
9018                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9019                                                  outer_first_mpls_over_gre);
9020                 break;
9021         default:
9022                 /* Inner MPLS not over GRE is not supported. */
9023                 if (!inner) {
9024                         out_mpls_m =
9025                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9026                                                          misc2_m,
9027                                                          outer_first_mpls);
9028                         out_mpls_v =
9029                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9030                                                          misc2_v,
9031                                                          outer_first_mpls);
9032                 }
9033                 break;
9034         }
9035         if (out_mpls_m && out_mpls_v) {
9036                 *out_mpls_m = *in_mpls_m;
9037                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
9038         }
9039 }
9040
9041 /**
9042  * Add metadata register item to matcher
9043  *
9044  * @param[in, out] matcher
9045  *   Flow matcher.
9046  * @param[in, out] key
9047  *   Flow matcher value.
9048  * @param[in] reg_type
9049  *   Type of device metadata register
9050  * @param[in] value
9051  *   Register value
9052  * @param[in] mask
9053  *   Register mask
9054  */
9055 static void
9056 flow_dv_match_meta_reg(void *matcher, void *key,
9057                        enum modify_reg reg_type,
9058                        uint32_t data, uint32_t mask)
9059 {
9060         void *misc2_m =
9061                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
9062         void *misc2_v =
9063                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9064         uint32_t temp;
9065
9066         data &= mask;
9067         switch (reg_type) {
9068         case REG_A:
9069                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
9070                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
9071                 break;
9072         case REG_B:
9073                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
9074                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
9075                 break;
9076         case REG_C_0:
9077                 /*
9078                  * The metadata register C0 field might be divided into
9079                  * source vport index and META item value, we should set
9080                  * this field according to specified mask, not as whole one.
9081                  */
9082                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
9083                 temp |= mask;
9084                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
9085                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
9086                 temp &= ~mask;
9087                 temp |= data;
9088                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
9089                 break;
9090         case REG_C_1:
9091                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
9092                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
9093                 break;
9094         case REG_C_2:
9095                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
9096                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
9097                 break;
9098         case REG_C_3:
9099                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
9100                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
9101                 break;
9102         case REG_C_4:
9103                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
9104                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
9105                 break;
9106         case REG_C_5:
9107                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
9108                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
9109                 break;
9110         case REG_C_6:
9111                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
9112                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
9113                 break;
9114         case REG_C_7:
9115                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
9116                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
9117                 break;
9118         default:
9119                 MLX5_ASSERT(false);
9120                 break;
9121         }
9122 }
9123
9124 /**
9125  * Add MARK item to matcher
9126  *
9127  * @param[in] dev
9128  *   The device to configure through.
9129  * @param[in, out] matcher
9130  *   Flow matcher.
9131  * @param[in, out] key
9132  *   Flow matcher value.
9133  * @param[in] item
9134  *   Flow pattern to translate.
9135  */
9136 static void
9137 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
9138                             void *matcher, void *key,
9139                             const struct rte_flow_item *item)
9140 {
9141         struct mlx5_priv *priv = dev->data->dev_private;
9142         const struct rte_flow_item_mark *mark;
9143         uint32_t value;
9144         uint32_t mask;
9145
9146         mark = item->mask ? (const void *)item->mask :
9147                             &rte_flow_item_mark_mask;
9148         mask = mark->id & priv->sh->dv_mark_mask;
9149         mark = (const void *)item->spec;
9150         MLX5_ASSERT(mark);
9151         value = mark->id & priv->sh->dv_mark_mask & mask;
9152         if (mask) {
9153                 enum modify_reg reg;
9154
9155                 /* Get the metadata register index for the mark. */
9156                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
9157                 MLX5_ASSERT(reg > 0);
9158                 if (reg == REG_C_0) {
9159                         struct mlx5_priv *priv = dev->data->dev_private;
9160                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9161                         uint32_t shl_c0 = rte_bsf32(msk_c0);
9162
9163                         mask &= msk_c0;
9164                         mask <<= shl_c0;
9165                         value <<= shl_c0;
9166                 }
9167                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9168         }
9169 }
9170
9171 /**
9172  * Add META item to matcher
9173  *
9174  * @param[in] dev
9175  *   The devich to configure through.
9176  * @param[in, out] matcher
9177  *   Flow matcher.
9178  * @param[in, out] key
9179  *   Flow matcher value.
9180  * @param[in] attr
9181  *   Attributes of flow that includes this item.
9182  * @param[in] item
9183  *   Flow pattern to translate.
9184  */
9185 static void
9186 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
9187                             void *matcher, void *key,
9188                             const struct rte_flow_attr *attr,
9189                             const struct rte_flow_item *item)
9190 {
9191         const struct rte_flow_item_meta *meta_m;
9192         const struct rte_flow_item_meta *meta_v;
9193
9194         meta_m = (const void *)item->mask;
9195         if (!meta_m)
9196                 meta_m = &rte_flow_item_meta_mask;
9197         meta_v = (const void *)item->spec;
9198         if (meta_v) {
9199                 int reg;
9200                 uint32_t value = meta_v->data;
9201                 uint32_t mask = meta_m->data;
9202
9203                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
9204                 if (reg < 0)
9205                         return;
9206                 MLX5_ASSERT(reg != REG_NON);
9207                 /*
9208                  * In datapath code there is no endianness
9209                  * coversions for perfromance reasons, all
9210                  * pattern conversions are done in rte_flow.
9211                  */
9212                 value = rte_cpu_to_be_32(value);
9213                 mask = rte_cpu_to_be_32(mask);
9214                 if (reg == REG_C_0) {
9215                         struct mlx5_priv *priv = dev->data->dev_private;
9216                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9217                         uint32_t shl_c0 = rte_bsf32(msk_c0);
9218 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
9219                         uint32_t shr_c0 = __builtin_clz(priv->sh->dv_meta_mask);
9220
9221                         value >>= shr_c0;
9222                         mask >>= shr_c0;
9223 #endif
9224                         value <<= shl_c0;
9225                         mask <<= shl_c0;
9226                         MLX5_ASSERT(msk_c0);
9227                         MLX5_ASSERT(!(~msk_c0 & mask));
9228                 }
9229                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9230         }
9231 }
9232
9233 /**
9234  * Add vport metadata Reg C0 item to matcher
9235  *
9236  * @param[in, out] matcher
9237  *   Flow matcher.
9238  * @param[in, out] key
9239  *   Flow matcher value.
9240  * @param[in] reg
9241  *   Flow pattern to translate.
9242  */
9243 static void
9244 flow_dv_translate_item_meta_vport(void *matcher, void *key,
9245                                   uint32_t value, uint32_t mask)
9246 {
9247         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
9248 }
9249
9250 /**
9251  * Add tag item to matcher
9252  *
9253  * @param[in] dev
9254  *   The devich to configure through.
9255  * @param[in, out] matcher
9256  *   Flow matcher.
9257  * @param[in, out] key
9258  *   Flow matcher value.
9259  * @param[in] item
9260  *   Flow pattern to translate.
9261  */
9262 static void
9263 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
9264                                 void *matcher, void *key,
9265                                 const struct rte_flow_item *item)
9266 {
9267         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
9268         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
9269         uint32_t mask, value;
9270
9271         MLX5_ASSERT(tag_v);
9272         value = tag_v->data;
9273         mask = tag_m ? tag_m->data : UINT32_MAX;
9274         if (tag_v->id == REG_C_0) {
9275                 struct mlx5_priv *priv = dev->data->dev_private;
9276                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9277                 uint32_t shl_c0 = rte_bsf32(msk_c0);
9278
9279                 mask &= msk_c0;
9280                 mask <<= shl_c0;
9281                 value <<= shl_c0;
9282         }
9283         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
9284 }
9285
9286 /**
9287  * Add TAG item to matcher
9288  *
9289  * @param[in] dev
9290  *   The devich to configure through.
9291  * @param[in, out] matcher
9292  *   Flow matcher.
9293  * @param[in, out] key
9294  *   Flow matcher value.
9295  * @param[in] item
9296  *   Flow pattern to translate.
9297  */
9298 static void
9299 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
9300                            void *matcher, void *key,
9301                            const struct rte_flow_item *item)
9302 {
9303         const struct rte_flow_item_tag *tag_v = item->spec;
9304         const struct rte_flow_item_tag *tag_m = item->mask;
9305         enum modify_reg reg;
9306
9307         MLX5_ASSERT(tag_v);
9308         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
9309         /* Get the metadata register index for the tag. */
9310         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
9311         MLX5_ASSERT(reg > 0);
9312         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
9313 }
9314
9315 /**
9316  * Add source vport match to the specified matcher.
9317  *
9318  * @param[in, out] matcher
9319  *   Flow matcher.
9320  * @param[in, out] key
9321  *   Flow matcher value.
9322  * @param[in] port
9323  *   Source vport value to match
9324  * @param[in] mask
9325  *   Mask
9326  */
9327 static void
9328 flow_dv_translate_item_source_vport(void *matcher, void *key,
9329                                     int16_t port, uint16_t mask)
9330 {
9331         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9332         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9333
9334         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
9335         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
9336 }
9337
9338 /**
9339  * Translate port-id item to eswitch match on  port-id.
9340  *
9341  * @param[in] dev
9342  *   The devich to configure through.
9343  * @param[in, out] matcher
9344  *   Flow matcher.
9345  * @param[in, out] key
9346  *   Flow matcher value.
9347  * @param[in] item
9348  *   Flow pattern to translate.
9349  * @param[in]
9350  *   Flow attributes.
9351  *
9352  * @return
9353  *   0 on success, a negative errno value otherwise.
9354  */
9355 static int
9356 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
9357                                void *key, const struct rte_flow_item *item,
9358                                const struct rte_flow_attr *attr)
9359 {
9360         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
9361         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
9362         struct mlx5_priv *priv;
9363         uint16_t mask, id;
9364
9365         mask = pid_m ? pid_m->id : 0xffff;
9366         id = pid_v ? pid_v->id : dev->data->port_id;
9367         priv = mlx5_port_to_eswitch_info(id, item == NULL);
9368         if (!priv)
9369                 return -rte_errno;
9370         /*
9371          * Translate to vport field or to metadata, depending on mode.
9372          * Kernel can use either misc.source_port or half of C0 metadata
9373          * register.
9374          */
9375         if (priv->vport_meta_mask) {
9376                 /*
9377                  * Provide the hint for SW steering library
9378                  * to insert the flow into ingress domain and
9379                  * save the extra vport match.
9380                  */
9381                 if (mask == 0xffff && priv->vport_id == 0xffff &&
9382                     priv->pf_bond < 0 && attr->transfer)
9383                         flow_dv_translate_item_source_vport
9384                                 (matcher, key, priv->vport_id, mask);
9385                 /*
9386                  * We should always set the vport metadata register,
9387                  * otherwise the SW steering library can drop
9388                  * the rule if wire vport metadata value is not zero,
9389                  * it depends on kernel configuration.
9390                  */
9391                 flow_dv_translate_item_meta_vport(matcher, key,
9392                                                   priv->vport_meta_tag,
9393                                                   priv->vport_meta_mask);
9394         } else {
9395                 flow_dv_translate_item_source_vport(matcher, key,
9396                                                     priv->vport_id, mask);
9397         }
9398         return 0;
9399 }
9400
9401 /**
9402  * Add ICMP6 item to matcher and to the value.
9403  *
9404  * @param[in, out] matcher
9405  *   Flow matcher.
9406  * @param[in, out] key
9407  *   Flow matcher value.
9408  * @param[in] item
9409  *   Flow pattern to translate.
9410  * @param[in] inner
9411  *   Item is inner pattern.
9412  */
9413 static void
9414 flow_dv_translate_item_icmp6(void *matcher, void *key,
9415                               const struct rte_flow_item *item,
9416                               int inner)
9417 {
9418         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
9419         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
9420         void *headers_m;
9421         void *headers_v;
9422         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9423                                      misc_parameters_3);
9424         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9425         if (inner) {
9426                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9427                                          inner_headers);
9428                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9429         } else {
9430                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9431                                          outer_headers);
9432                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9433         }
9434         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9435         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
9436         if (!icmp6_v)
9437                 return;
9438         if (!icmp6_m)
9439                 icmp6_m = &rte_flow_item_icmp6_mask;
9440         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
9441         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
9442                  icmp6_v->type & icmp6_m->type);
9443         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
9444         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
9445                  icmp6_v->code & icmp6_m->code);
9446 }
9447
9448 /**
9449  * Add ICMP item to matcher and to the value.
9450  *
9451  * @param[in, out] matcher
9452  *   Flow matcher.
9453  * @param[in, out] key
9454  *   Flow matcher value.
9455  * @param[in] item
9456  *   Flow pattern to translate.
9457  * @param[in] inner
9458  *   Item is inner pattern.
9459  */
9460 static void
9461 flow_dv_translate_item_icmp(void *matcher, void *key,
9462                             const struct rte_flow_item *item,
9463                             int inner)
9464 {
9465         const struct rte_flow_item_icmp *icmp_m = item->mask;
9466         const struct rte_flow_item_icmp *icmp_v = item->spec;
9467         uint32_t icmp_header_data_m = 0;
9468         uint32_t icmp_header_data_v = 0;
9469         void *headers_m;
9470         void *headers_v;
9471         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9472                                      misc_parameters_3);
9473         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9474         if (inner) {
9475                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9476                                          inner_headers);
9477                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9478         } else {
9479                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9480                                          outer_headers);
9481                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9482         }
9483         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9484         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
9485         if (!icmp_v)
9486                 return;
9487         if (!icmp_m)
9488                 icmp_m = &rte_flow_item_icmp_mask;
9489         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
9490                  icmp_m->hdr.icmp_type);
9491         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
9492                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
9493         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
9494                  icmp_m->hdr.icmp_code);
9495         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
9496                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
9497         icmp_header_data_m = rte_be_to_cpu_16(icmp_m->hdr.icmp_seq_nb);
9498         icmp_header_data_m |= rte_be_to_cpu_16(icmp_m->hdr.icmp_ident) << 16;
9499         if (icmp_header_data_m) {
9500                 icmp_header_data_v = rte_be_to_cpu_16(icmp_v->hdr.icmp_seq_nb);
9501                 icmp_header_data_v |=
9502                          rte_be_to_cpu_16(icmp_v->hdr.icmp_ident) << 16;
9503                 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_header_data,
9504                          icmp_header_data_m);
9505                 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_header_data,
9506                          icmp_header_data_v & icmp_header_data_m);
9507         }
9508 }
9509
9510 /**
9511  * Add GTP item to matcher and to the value.
9512  *
9513  * @param[in, out] matcher
9514  *   Flow matcher.
9515  * @param[in, out] key
9516  *   Flow matcher value.
9517  * @param[in] item
9518  *   Flow pattern to translate.
9519  * @param[in] inner
9520  *   Item is inner pattern.
9521  */
9522 static void
9523 flow_dv_translate_item_gtp(void *matcher, void *key,
9524                            const struct rte_flow_item *item, int inner)
9525 {
9526         const struct rte_flow_item_gtp *gtp_m = item->mask;
9527         const struct rte_flow_item_gtp *gtp_v = item->spec;
9528         void *headers_m;
9529         void *headers_v;
9530         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9531                                      misc_parameters_3);
9532         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9533         uint16_t dport = RTE_GTPU_UDP_PORT;
9534
9535         if (inner) {
9536                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9537                                          inner_headers);
9538                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9539         } else {
9540                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9541                                          outer_headers);
9542                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9543         }
9544         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9545                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9546                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9547         }
9548         if (!gtp_v)
9549                 return;
9550         if (!gtp_m)
9551                 gtp_m = &rte_flow_item_gtp_mask;
9552         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags,
9553                  gtp_m->v_pt_rsv_flags);
9554         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags,
9555                  gtp_v->v_pt_rsv_flags & gtp_m->v_pt_rsv_flags);
9556         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
9557         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
9558                  gtp_v->msg_type & gtp_m->msg_type);
9559         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
9560                  rte_be_to_cpu_32(gtp_m->teid));
9561         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
9562                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
9563 }
9564
9565 /**
9566  * Add GTP PSC item to matcher.
9567  *
9568  * @param[in, out] matcher
9569  *   Flow matcher.
9570  * @param[in, out] key
9571  *   Flow matcher value.
9572  * @param[in] item
9573  *   Flow pattern to translate.
9574  */
9575 static int
9576 flow_dv_translate_item_gtp_psc(void *matcher, void *key,
9577                                const struct rte_flow_item *item)
9578 {
9579         const struct rte_flow_item_gtp_psc *gtp_psc_m = item->mask;
9580         const struct rte_flow_item_gtp_psc *gtp_psc_v = item->spec;
9581         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9582                         misc_parameters_3);
9583         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9584         union {
9585                 uint32_t w32;
9586                 struct {
9587                         uint16_t seq_num;
9588                         uint8_t npdu_num;
9589                         uint8_t next_ext_header_type;
9590                 };
9591         } dw_2;
9592         uint8_t gtp_flags;
9593
9594         /* Always set E-flag match on one, regardless of GTP item settings. */
9595         gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_m, gtpu_msg_flags);
9596         gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9597         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags, gtp_flags);
9598         gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_v, gtpu_msg_flags);
9599         gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9600         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags, gtp_flags);
9601         /*Set next extension header type. */
9602         dw_2.seq_num = 0;
9603         dw_2.npdu_num = 0;
9604         dw_2.next_ext_header_type = 0xff;
9605         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_dw_2,
9606                  rte_cpu_to_be_32(dw_2.w32));
9607         dw_2.seq_num = 0;
9608         dw_2.npdu_num = 0;
9609         dw_2.next_ext_header_type = 0x85;
9610         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_dw_2,
9611                  rte_cpu_to_be_32(dw_2.w32));
9612         if (gtp_psc_v) {
9613                 union {
9614                         uint32_t w32;
9615                         struct {
9616                                 uint8_t len;
9617                                 uint8_t type_flags;
9618                                 uint8_t qfi;
9619                                 uint8_t reserved;
9620                         };
9621                 } dw_0;
9622
9623                 /*Set extension header PDU type and Qos. */
9624                 if (!gtp_psc_m)
9625                         gtp_psc_m = &rte_flow_item_gtp_psc_mask;
9626                 dw_0.w32 = 0;
9627                 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_m->pdu_type);
9628                 dw_0.qfi = gtp_psc_m->qfi;
9629                 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_first_ext_dw_0,
9630                          rte_cpu_to_be_32(dw_0.w32));
9631                 dw_0.w32 = 0;
9632                 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_v->pdu_type &
9633                                                         gtp_psc_m->pdu_type);
9634                 dw_0.qfi = gtp_psc_v->qfi & gtp_psc_m->qfi;
9635                 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_first_ext_dw_0,
9636                          rte_cpu_to_be_32(dw_0.w32));
9637         }
9638         return 0;
9639 }
9640
9641 /**
9642  * Add eCPRI item to matcher and to the value.
9643  *
9644  * @param[in] dev
9645  *   The devich to configure through.
9646  * @param[in, out] matcher
9647  *   Flow matcher.
9648  * @param[in, out] key
9649  *   Flow matcher value.
9650  * @param[in] item
9651  *   Flow pattern to translate.
9652  * @param[in] samples
9653  *   Sample IDs to be used in the matching.
9654  */
9655 static void
9656 flow_dv_translate_item_ecpri(struct rte_eth_dev *dev, void *matcher,
9657                              void *key, const struct rte_flow_item *item)
9658 {
9659         struct mlx5_priv *priv = dev->data->dev_private;
9660         const struct rte_flow_item_ecpri *ecpri_m = item->mask;
9661         const struct rte_flow_item_ecpri *ecpri_v = item->spec;
9662         struct rte_ecpri_common_hdr common;
9663         void *misc4_m = MLX5_ADDR_OF(fte_match_param, matcher,
9664                                      misc_parameters_4);
9665         void *misc4_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_4);
9666         uint32_t *samples;
9667         void *dw_m;
9668         void *dw_v;
9669
9670         if (!ecpri_v)
9671                 return;
9672         if (!ecpri_m)
9673                 ecpri_m = &rte_flow_item_ecpri_mask;
9674         /*
9675          * Maximal four DW samples are supported in a single matching now.
9676          * Two are used now for a eCPRI matching:
9677          * 1. Type: one byte, mask should be 0x00ff0000 in network order
9678          * 2. ID of a message: one or two bytes, mask 0xffff0000 or 0xff000000
9679          *    if any.
9680          */
9681         if (!ecpri_m->hdr.common.u32)
9682                 return;
9683         samples = priv->sh->fp[MLX5_FLEX_PARSER_ECPRI_0].ids;
9684         /* Need to take the whole DW as the mask to fill the entry. */
9685         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
9686                             prog_sample_field_value_0);
9687         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
9688                             prog_sample_field_value_0);
9689         /* Already big endian (network order) in the header. */
9690         *(uint32_t *)dw_m = ecpri_m->hdr.common.u32;
9691         *(uint32_t *)dw_v = ecpri_v->hdr.common.u32 & ecpri_m->hdr.common.u32;
9692         /* Sample#0, used for matching type, offset 0. */
9693         MLX5_SET(fte_match_set_misc4, misc4_m,
9694                  prog_sample_field_id_0, samples[0]);
9695         /* It makes no sense to set the sample ID in the mask field. */
9696         MLX5_SET(fte_match_set_misc4, misc4_v,
9697                  prog_sample_field_id_0, samples[0]);
9698         /*
9699          * Checking if message body part needs to be matched.
9700          * Some wildcard rules only matching type field should be supported.
9701          */
9702         if (ecpri_m->hdr.dummy[0]) {
9703                 common.u32 = rte_be_to_cpu_32(ecpri_v->hdr.common.u32);
9704                 switch (common.type) {
9705                 case RTE_ECPRI_MSG_TYPE_IQ_DATA:
9706                 case RTE_ECPRI_MSG_TYPE_RTC_CTRL:
9707                 case RTE_ECPRI_MSG_TYPE_DLY_MSR:
9708                         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
9709                                             prog_sample_field_value_1);
9710                         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
9711                                             prog_sample_field_value_1);
9712                         *(uint32_t *)dw_m = ecpri_m->hdr.dummy[0];
9713                         *(uint32_t *)dw_v = ecpri_v->hdr.dummy[0] &
9714                                             ecpri_m->hdr.dummy[0];
9715                         /* Sample#1, to match message body, offset 4. */
9716                         MLX5_SET(fte_match_set_misc4, misc4_m,
9717                                  prog_sample_field_id_1, samples[1]);
9718                         MLX5_SET(fte_match_set_misc4, misc4_v,
9719                                  prog_sample_field_id_1, samples[1]);
9720                         break;
9721                 default:
9722                         /* Others, do not match any sample ID. */
9723                         break;
9724                 }
9725         }
9726 }
9727
9728 /*
9729  * Add connection tracking status item to matcher
9730  *
9731  * @param[in] dev
9732  *   The devich to configure through.
9733  * @param[in, out] matcher
9734  *   Flow matcher.
9735  * @param[in, out] key
9736  *   Flow matcher value.
9737  * @param[in] item
9738  *   Flow pattern to translate.
9739  */
9740 static void
9741 flow_dv_translate_item_aso_ct(struct rte_eth_dev *dev,
9742                               void *matcher, void *key,
9743                               const struct rte_flow_item *item)
9744 {
9745         uint32_t reg_value = 0;
9746         int reg_id;
9747         /* 8LSB 0b 11/0000/11, middle 4 bits are reserved. */
9748         uint32_t reg_mask = 0;
9749         const struct rte_flow_item_conntrack *spec = item->spec;
9750         const struct rte_flow_item_conntrack *mask = item->mask;
9751         uint32_t flags;
9752         struct rte_flow_error error;
9753
9754         if (!mask)
9755                 mask = &rte_flow_item_conntrack_mask;
9756         if (!spec || !mask->flags)
9757                 return;
9758         flags = spec->flags & mask->flags;
9759         /* The conflict should be checked in the validation. */
9760         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID)
9761                 reg_value |= MLX5_CT_SYNDROME_VALID;
9762         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
9763                 reg_value |= MLX5_CT_SYNDROME_STATE_CHANGE;
9764         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID)
9765                 reg_value |= MLX5_CT_SYNDROME_INVALID;
9766         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)
9767                 reg_value |= MLX5_CT_SYNDROME_TRAP;
9768         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
9769                 reg_value |= MLX5_CT_SYNDROME_BAD_PACKET;
9770         if (mask->flags & (RTE_FLOW_CONNTRACK_PKT_STATE_VALID |
9771                            RTE_FLOW_CONNTRACK_PKT_STATE_INVALID |
9772                            RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED))
9773                 reg_mask |= 0xc0;
9774         if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
9775                 reg_mask |= MLX5_CT_SYNDROME_STATE_CHANGE;
9776         if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
9777                 reg_mask |= MLX5_CT_SYNDROME_BAD_PACKET;
9778         /* The REG_C_x value could be saved during startup. */
9779         reg_id = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, &error);
9780         if (reg_id == REG_NON)
9781                 return;
9782         flow_dv_match_meta_reg(matcher, key, (enum modify_reg)reg_id,
9783                                reg_value, reg_mask);
9784 }
9785
9786 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
9787
9788 #define HEADER_IS_ZERO(match_criteria, headers)                              \
9789         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
9790                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
9791
9792 /**
9793  * Calculate flow matcher enable bitmap.
9794  *
9795  * @param match_criteria
9796  *   Pointer to flow matcher criteria.
9797  *
9798  * @return
9799  *   Bitmap of enabled fields.
9800  */
9801 static uint8_t
9802 flow_dv_matcher_enable(uint32_t *match_criteria)
9803 {
9804         uint8_t match_criteria_enable;
9805
9806         match_criteria_enable =
9807                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
9808                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
9809         match_criteria_enable |=
9810                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
9811                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
9812         match_criteria_enable |=
9813                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
9814                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
9815         match_criteria_enable |=
9816                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
9817                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
9818         match_criteria_enable |=
9819                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
9820                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
9821         match_criteria_enable |=
9822                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_4)) <<
9823                 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT;
9824         return match_criteria_enable;
9825 }
9826
9827 struct mlx5_hlist_entry *
9828 flow_dv_tbl_create_cb(struct mlx5_hlist *list, uint64_t key64, void *cb_ctx)
9829 {
9830         struct mlx5_dev_ctx_shared *sh = list->ctx;
9831         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
9832         struct rte_eth_dev *dev = ctx->dev;
9833         struct mlx5_flow_tbl_data_entry *tbl_data;
9834         struct mlx5_flow_tbl_tunnel_prm *tt_prm = ctx->data;
9835         struct rte_flow_error *error = ctx->error;
9836         union mlx5_flow_tbl_key key = { .v64 = key64 };
9837         struct mlx5_flow_tbl_resource *tbl;
9838         void *domain;
9839         uint32_t idx = 0;
9840         int ret;
9841
9842         tbl_data = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
9843         if (!tbl_data) {
9844                 rte_flow_error_set(error, ENOMEM,
9845                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
9846                                    NULL,
9847                                    "cannot allocate flow table data entry");
9848                 return NULL;
9849         }
9850         tbl_data->idx = idx;
9851         tbl_data->tunnel = tt_prm->tunnel;
9852         tbl_data->group_id = tt_prm->group_id;
9853         tbl_data->external = !!tt_prm->external;
9854         tbl_data->tunnel_offload = is_tunnel_offload_active(dev);
9855         tbl_data->is_egress = !!key.is_egress;
9856         tbl_data->is_transfer = !!key.is_fdb;
9857         tbl_data->dummy = !!key.dummy;
9858         tbl_data->level = key.level;
9859         tbl_data->id = key.id;
9860         tbl = &tbl_data->tbl;
9861         if (key.dummy)
9862                 return &tbl_data->entry;
9863         if (key.is_fdb)
9864                 domain = sh->fdb_domain;
9865         else if (key.is_egress)
9866                 domain = sh->tx_domain;
9867         else
9868                 domain = sh->rx_domain;
9869         ret = mlx5_flow_os_create_flow_tbl(domain, key.level, &tbl->obj);
9870         if (ret) {
9871                 rte_flow_error_set(error, ENOMEM,
9872                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
9873                                    NULL, "cannot create flow table object");
9874                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
9875                 return NULL;
9876         }
9877         if (key.level != 0) {
9878                 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
9879                                         (tbl->obj, &tbl_data->jump.action);
9880                 if (ret) {
9881                         rte_flow_error_set(error, ENOMEM,
9882                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
9883                                            NULL,
9884                                            "cannot create flow jump action");
9885                         mlx5_flow_os_destroy_flow_tbl(tbl->obj);
9886                         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
9887                         return NULL;
9888                 }
9889         }
9890         MKSTR(matcher_name, "%s_%s_%u_%u_matcher_cache",
9891               key.is_fdb ? "FDB" : "NIC", key.is_egress ? "egress" : "ingress",
9892               key.level, key.id);
9893         mlx5_cache_list_init(&tbl_data->matchers, matcher_name, 0, sh,
9894                              flow_dv_matcher_create_cb,
9895                              flow_dv_matcher_match_cb,
9896                              flow_dv_matcher_remove_cb);
9897         return &tbl_data->entry;
9898 }
9899
9900 int
9901 flow_dv_tbl_match_cb(struct mlx5_hlist *list __rte_unused,
9902                      struct mlx5_hlist_entry *entry, uint64_t key64,
9903                      void *cb_ctx __rte_unused)
9904 {
9905         struct mlx5_flow_tbl_data_entry *tbl_data =
9906                 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
9907         union mlx5_flow_tbl_key key = { .v64 = key64 };
9908
9909         return tbl_data->level != key.level ||
9910                tbl_data->id != key.id ||
9911                tbl_data->dummy != key.dummy ||
9912                tbl_data->is_transfer != !!key.is_fdb ||
9913                tbl_data->is_egress != !!key.is_egress;
9914 }
9915
9916 /**
9917  * Get a flow table.
9918  *
9919  * @param[in, out] dev
9920  *   Pointer to rte_eth_dev structure.
9921  * @param[in] table_level
9922  *   Table level to use.
9923  * @param[in] egress
9924  *   Direction of the table.
9925  * @param[in] transfer
9926  *   E-Switch or NIC flow.
9927  * @param[in] dummy
9928  *   Dummy entry for dv API.
9929  * @param[in] table_id
9930  *   Table id to use.
9931  * @param[out] error
9932  *   pointer to error structure.
9933  *
9934  * @return
9935  *   Returns tables resource based on the index, NULL in case of failed.
9936  */
9937 struct mlx5_flow_tbl_resource *
9938 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
9939                          uint32_t table_level, uint8_t egress,
9940                          uint8_t transfer,
9941                          bool external,
9942                          const struct mlx5_flow_tunnel *tunnel,
9943                          uint32_t group_id, uint8_t dummy,
9944                          uint32_t table_id,
9945                          struct rte_flow_error *error)
9946 {
9947         struct mlx5_priv *priv = dev->data->dev_private;
9948         union mlx5_flow_tbl_key table_key = {
9949                 {
9950                         .level = table_level,
9951                         .id = table_id,
9952                         .reserved = 0,
9953                         .dummy = !!dummy,
9954                         .is_fdb = !!transfer,
9955                         .is_egress = !!egress,
9956                 }
9957         };
9958         struct mlx5_flow_tbl_tunnel_prm tt_prm = {
9959                 .tunnel = tunnel,
9960                 .group_id = group_id,
9961                 .external = external,
9962         };
9963         struct mlx5_flow_cb_ctx ctx = {
9964                 .dev = dev,
9965                 .error = error,
9966                 .data = &tt_prm,
9967         };
9968         struct mlx5_hlist_entry *entry;
9969         struct mlx5_flow_tbl_data_entry *tbl_data;
9970
9971         entry = mlx5_hlist_register(priv->sh->flow_tbls, table_key.v64, &ctx);
9972         if (!entry) {
9973                 rte_flow_error_set(error, ENOMEM,
9974                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9975                                    "cannot get table");
9976                 return NULL;
9977         }
9978         DRV_LOG(DEBUG, "table_level %u table_id %u "
9979                 "tunnel %u group %u registered.",
9980                 table_level, table_id,
9981                 tunnel ? tunnel->tunnel_id : 0, group_id);
9982         tbl_data = container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
9983         return &tbl_data->tbl;
9984 }
9985
9986 void
9987 flow_dv_tbl_remove_cb(struct mlx5_hlist *list,
9988                       struct mlx5_hlist_entry *entry)
9989 {
9990         struct mlx5_dev_ctx_shared *sh = list->ctx;
9991         struct mlx5_flow_tbl_data_entry *tbl_data =
9992                 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
9993
9994         MLX5_ASSERT(entry && sh);
9995         if (tbl_data->jump.action)
9996                 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
9997         if (tbl_data->tbl.obj)
9998                 mlx5_flow_os_destroy_flow_tbl(tbl_data->tbl.obj);
9999         if (tbl_data->tunnel_offload && tbl_data->external) {
10000                 struct mlx5_hlist_entry *he;
10001                 struct mlx5_hlist *tunnel_grp_hash;
10002                 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
10003                 union tunnel_tbl_key tunnel_key = {
10004                         .tunnel_id = tbl_data->tunnel ?
10005                                         tbl_data->tunnel->tunnel_id : 0,
10006                         .group = tbl_data->group_id
10007                 };
10008                 uint32_t table_level = tbl_data->level;
10009
10010                 tunnel_grp_hash = tbl_data->tunnel ?
10011                                         tbl_data->tunnel->groups :
10012                                         thub->groups;
10013                 he = mlx5_hlist_lookup(tunnel_grp_hash, tunnel_key.val, NULL);
10014                 if (he)
10015                         mlx5_hlist_unregister(tunnel_grp_hash, he);
10016                 DRV_LOG(DEBUG,
10017                         "table_level %u id %u tunnel %u group %u released.",
10018                         table_level,
10019                         tbl_data->id,
10020                         tbl_data->tunnel ?
10021                         tbl_data->tunnel->tunnel_id : 0,
10022                         tbl_data->group_id);
10023         }
10024         mlx5_cache_list_destroy(&tbl_data->matchers);
10025         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10026 }
10027
10028 /**
10029  * Release a flow table.
10030  *
10031  * @param[in] sh
10032  *   Pointer to device shared structure.
10033  * @param[in] tbl
10034  *   Table resource to be released.
10035  *
10036  * @return
10037  *   Returns 0 if table was released, else return 1;
10038  */
10039 static int
10040 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
10041                              struct mlx5_flow_tbl_resource *tbl)
10042 {
10043         struct mlx5_flow_tbl_data_entry *tbl_data =
10044                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10045
10046         if (!tbl)
10047                 return 0;
10048         return mlx5_hlist_unregister(sh->flow_tbls, &tbl_data->entry);
10049 }
10050
10051 int
10052 flow_dv_matcher_match_cb(struct mlx5_cache_list *list __rte_unused,
10053                          struct mlx5_cache_entry *entry, void *cb_ctx)
10054 {
10055         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10056         struct mlx5_flow_dv_matcher *ref = ctx->data;
10057         struct mlx5_flow_dv_matcher *cur = container_of(entry, typeof(*cur),
10058                                                         entry);
10059
10060         return cur->crc != ref->crc ||
10061                cur->priority != ref->priority ||
10062                memcmp((const void *)cur->mask.buf,
10063                       (const void *)ref->mask.buf, ref->mask.size);
10064 }
10065
10066 struct mlx5_cache_entry *
10067 flow_dv_matcher_create_cb(struct mlx5_cache_list *list,
10068                           struct mlx5_cache_entry *entry __rte_unused,
10069                           void *cb_ctx)
10070 {
10071         struct mlx5_dev_ctx_shared *sh = list->ctx;
10072         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10073         struct mlx5_flow_dv_matcher *ref = ctx->data;
10074         struct mlx5_flow_dv_matcher *cache;
10075         struct mlx5dv_flow_matcher_attr dv_attr = {
10076                 .type = IBV_FLOW_ATTR_NORMAL,
10077                 .match_mask = (void *)&ref->mask,
10078         };
10079         struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10080                                                             typeof(*tbl), tbl);
10081         int ret;
10082
10083         cache = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*cache), 0, SOCKET_ID_ANY);
10084         if (!cache) {
10085                 rte_flow_error_set(ctx->error, ENOMEM,
10086                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10087                                    "cannot create matcher");
10088                 return NULL;
10089         }
10090         *cache = *ref;
10091         dv_attr.match_criteria_enable =
10092                 flow_dv_matcher_enable(cache->mask.buf);
10093         dv_attr.priority = ref->priority;
10094         if (tbl->is_egress)
10095                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
10096         ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->tbl.obj,
10097                                                &cache->matcher_object);
10098         if (ret) {
10099                 mlx5_free(cache);
10100                 rte_flow_error_set(ctx->error, ENOMEM,
10101                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10102                                    "cannot create matcher");
10103                 return NULL;
10104         }
10105         return &cache->entry;
10106 }
10107
10108 /**
10109  * Register the flow matcher.
10110  *
10111  * @param[in, out] dev
10112  *   Pointer to rte_eth_dev structure.
10113  * @param[in, out] matcher
10114  *   Pointer to flow matcher.
10115  * @param[in, out] key
10116  *   Pointer to flow table key.
10117  * @parm[in, out] dev_flow
10118  *   Pointer to the dev_flow.
10119  * @param[out] error
10120  *   pointer to error structure.
10121  *
10122  * @return
10123  *   0 on success otherwise -errno and errno is set.
10124  */
10125 static int
10126 flow_dv_matcher_register(struct rte_eth_dev *dev,
10127                          struct mlx5_flow_dv_matcher *ref,
10128                          union mlx5_flow_tbl_key *key,
10129                          struct mlx5_flow *dev_flow,
10130                          const struct mlx5_flow_tunnel *tunnel,
10131                          uint32_t group_id,
10132                          struct rte_flow_error *error)
10133 {
10134         struct mlx5_cache_entry *entry;
10135         struct mlx5_flow_dv_matcher *cache;
10136         struct mlx5_flow_tbl_resource *tbl;
10137         struct mlx5_flow_tbl_data_entry *tbl_data;
10138         struct mlx5_flow_cb_ctx ctx = {
10139                 .error = error,
10140                 .data = ref,
10141         };
10142
10143         /**
10144          * tunnel offload API requires this registration for cases when
10145          * tunnel match rule was inserted before tunnel set rule.
10146          */
10147         tbl = flow_dv_tbl_resource_get(dev, key->level,
10148                                        key->is_egress, key->is_fdb,
10149                                        dev_flow->external, tunnel,
10150                                        group_id, 0, key->id, error);
10151         if (!tbl)
10152                 return -rte_errno;      /* No need to refill the error info */
10153         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10154         ref->tbl = tbl;
10155         entry = mlx5_cache_register(&tbl_data->matchers, &ctx);
10156         if (!entry) {
10157                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
10158                 return rte_flow_error_set(error, ENOMEM,
10159                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10160                                           "cannot allocate ref memory");
10161         }
10162         cache = container_of(entry, typeof(*cache), entry);
10163         dev_flow->handle->dvh.matcher = cache;
10164         return 0;
10165 }
10166
10167 struct mlx5_hlist_entry *
10168 flow_dv_tag_create_cb(struct mlx5_hlist *list, uint64_t key, void *ctx)
10169 {
10170         struct mlx5_dev_ctx_shared *sh = list->ctx;
10171         struct rte_flow_error *error = ctx;
10172         struct mlx5_flow_dv_tag_resource *entry;
10173         uint32_t idx = 0;
10174         int ret;
10175
10176         entry = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10177         if (!entry) {
10178                 rte_flow_error_set(error, ENOMEM,
10179                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10180                                    "cannot allocate resource memory");
10181                 return NULL;
10182         }
10183         entry->idx = idx;
10184         entry->tag_id = key;
10185         ret = mlx5_flow_os_create_flow_action_tag(key,
10186                                                   &entry->action);
10187         if (ret) {
10188                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], idx);
10189                 rte_flow_error_set(error, ENOMEM,
10190                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10191                                    NULL, "cannot create action");
10192                 return NULL;
10193         }
10194         return &entry->entry;
10195 }
10196
10197 int
10198 flow_dv_tag_match_cb(struct mlx5_hlist *list __rte_unused,
10199                      struct mlx5_hlist_entry *entry, uint64_t key,
10200                      void *cb_ctx __rte_unused)
10201 {
10202         struct mlx5_flow_dv_tag_resource *tag =
10203                 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10204
10205         return key != tag->tag_id;
10206 }
10207
10208 /**
10209  * Find existing tag resource or create and register a new one.
10210  *
10211  * @param dev[in, out]
10212  *   Pointer to rte_eth_dev structure.
10213  * @param[in, out] tag_be24
10214  *   Tag value in big endian then R-shift 8.
10215  * @parm[in, out] dev_flow
10216  *   Pointer to the dev_flow.
10217  * @param[out] error
10218  *   pointer to error structure.
10219  *
10220  * @return
10221  *   0 on success otherwise -errno and errno is set.
10222  */
10223 static int
10224 flow_dv_tag_resource_register
10225                         (struct rte_eth_dev *dev,
10226                          uint32_t tag_be24,
10227                          struct mlx5_flow *dev_flow,
10228                          struct rte_flow_error *error)
10229 {
10230         struct mlx5_priv *priv = dev->data->dev_private;
10231         struct mlx5_flow_dv_tag_resource *cache_resource;
10232         struct mlx5_hlist_entry *entry;
10233
10234         entry = mlx5_hlist_register(priv->sh->tag_table, tag_be24, error);
10235         if (entry) {
10236                 cache_resource = container_of
10237                         (entry, struct mlx5_flow_dv_tag_resource, entry);
10238                 dev_flow->handle->dvh.rix_tag = cache_resource->idx;
10239                 dev_flow->dv.tag_resource = cache_resource;
10240                 return 0;
10241         }
10242         return -rte_errno;
10243 }
10244
10245 void
10246 flow_dv_tag_remove_cb(struct mlx5_hlist *list,
10247                       struct mlx5_hlist_entry *entry)
10248 {
10249         struct mlx5_dev_ctx_shared *sh = list->ctx;
10250         struct mlx5_flow_dv_tag_resource *tag =
10251                 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10252
10253         MLX5_ASSERT(tag && sh && tag->action);
10254         claim_zero(mlx5_flow_os_destroy_flow_action(tag->action));
10255         DRV_LOG(DEBUG, "Tag %p: removed.", (void *)tag);
10256         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10257 }
10258
10259 /**
10260  * Release the tag.
10261  *
10262  * @param dev
10263  *   Pointer to Ethernet device.
10264  * @param tag_idx
10265  *   Tag index.
10266  *
10267  * @return
10268  *   1 while a reference on it exists, 0 when freed.
10269  */
10270 static int
10271 flow_dv_tag_release(struct rte_eth_dev *dev,
10272                     uint32_t tag_idx)
10273 {
10274         struct mlx5_priv *priv = dev->data->dev_private;
10275         struct mlx5_flow_dv_tag_resource *tag;
10276
10277         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG], tag_idx);
10278         if (!tag)
10279                 return 0;
10280         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
10281                 dev->data->port_id, (void *)tag, tag->entry.ref_cnt);
10282         return mlx5_hlist_unregister(priv->sh->tag_table, &tag->entry);
10283 }
10284
10285 /**
10286  * Translate port ID action to vport.
10287  *
10288  * @param[in] dev
10289  *   Pointer to rte_eth_dev structure.
10290  * @param[in] action
10291  *   Pointer to the port ID action.
10292  * @param[out] dst_port_id
10293  *   The target port ID.
10294  * @param[out] error
10295  *   Pointer to the error structure.
10296  *
10297  * @return
10298  *   0 on success, a negative errno value otherwise and rte_errno is set.
10299  */
10300 static int
10301 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
10302                                  const struct rte_flow_action *action,
10303                                  uint32_t *dst_port_id,
10304                                  struct rte_flow_error *error)
10305 {
10306         uint32_t port;
10307         struct mlx5_priv *priv;
10308         const struct rte_flow_action_port_id *conf =
10309                         (const struct rte_flow_action_port_id *)action->conf;
10310
10311         port = conf->original ? dev->data->port_id : conf->id;
10312         priv = mlx5_port_to_eswitch_info(port, false);
10313         if (!priv)
10314                 return rte_flow_error_set(error, -rte_errno,
10315                                           RTE_FLOW_ERROR_TYPE_ACTION,
10316                                           NULL,
10317                                           "No eswitch info was found for port");
10318 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
10319         /*
10320          * This parameter is transferred to
10321          * mlx5dv_dr_action_create_dest_ib_port().
10322          */
10323         *dst_port_id = priv->dev_port;
10324 #else
10325         /*
10326          * Legacy mode, no LAG configurations is supported.
10327          * This parameter is transferred to
10328          * mlx5dv_dr_action_create_dest_vport().
10329          */
10330         *dst_port_id = priv->vport_id;
10331 #endif
10332         return 0;
10333 }
10334
10335 /**
10336  * Create a counter with aging configuration.
10337  *
10338  * @param[in] dev
10339  *   Pointer to rte_eth_dev structure.
10340  * @param[in] dev_flow
10341  *   Pointer to the mlx5_flow.
10342  * @param[out] count
10343  *   Pointer to the counter action configuration.
10344  * @param[in] age
10345  *   Pointer to the aging action configuration.
10346  *
10347  * @return
10348  *   Index to flow counter on success, 0 otherwise.
10349  */
10350 static uint32_t
10351 flow_dv_translate_create_counter(struct rte_eth_dev *dev,
10352                                 struct mlx5_flow *dev_flow,
10353                                 const struct rte_flow_action_count *count,
10354                                 const struct rte_flow_action_age *age)
10355 {
10356         uint32_t counter;
10357         struct mlx5_age_param *age_param;
10358
10359         if (count && count->shared)
10360                 counter = flow_dv_counter_get_shared(dev, count->id);
10361         else
10362                 counter = flow_dv_counter_alloc(dev, !!age);
10363         if (!counter || age == NULL)
10364                 return counter;
10365         age_param = flow_dv_counter_idx_get_age(dev, counter);
10366         age_param->context = age->context ? age->context :
10367                 (void *)(uintptr_t)(dev_flow->flow_idx);
10368         age_param->timeout = age->timeout;
10369         age_param->port_id = dev->data->port_id;
10370         __atomic_store_n(&age_param->sec_since_last_hit, 0, __ATOMIC_RELAXED);
10371         __atomic_store_n(&age_param->state, AGE_CANDIDATE, __ATOMIC_RELAXED);
10372         return counter;
10373 }
10374
10375 /**
10376  * Add Tx queue matcher
10377  *
10378  * @param[in] dev
10379  *   Pointer to the dev struct.
10380  * @param[in, out] matcher
10381  *   Flow matcher.
10382  * @param[in, out] key
10383  *   Flow matcher value.
10384  * @param[in] item
10385  *   Flow pattern to translate.
10386  * @param[in] inner
10387  *   Item is inner pattern.
10388  */
10389 static void
10390 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
10391                                 void *matcher, void *key,
10392                                 const struct rte_flow_item *item)
10393 {
10394         const struct mlx5_rte_flow_item_tx_queue *queue_m;
10395         const struct mlx5_rte_flow_item_tx_queue *queue_v;
10396         void *misc_m =
10397                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
10398         void *misc_v =
10399                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
10400         struct mlx5_txq_ctrl *txq;
10401         uint32_t queue;
10402
10403
10404         queue_m = (const void *)item->mask;
10405         if (!queue_m)
10406                 return;
10407         queue_v = (const void *)item->spec;
10408         if (!queue_v)
10409                 return;
10410         txq = mlx5_txq_get(dev, queue_v->queue);
10411         if (!txq)
10412                 return;
10413         queue = txq->obj->sq->id;
10414         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
10415         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
10416                  queue & queue_m->queue);
10417         mlx5_txq_release(dev, queue_v->queue);
10418 }
10419
10420 /**
10421  * Set the hash fields according to the @p flow information.
10422  *
10423  * @param[in] dev_flow
10424  *   Pointer to the mlx5_flow.
10425  * @param[in] rss_desc
10426  *   Pointer to the mlx5_flow_rss_desc.
10427  */
10428 static void
10429 flow_dv_hashfields_set(struct mlx5_flow *dev_flow,
10430                        struct mlx5_flow_rss_desc *rss_desc)
10431 {
10432         uint64_t items = dev_flow->handle->layers;
10433         int rss_inner = 0;
10434         uint64_t rss_types = rte_eth_rss_hf_refine(rss_desc->types);
10435
10436         dev_flow->hash_fields = 0;
10437 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
10438         if (rss_desc->level >= 2) {
10439                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
10440                 rss_inner = 1;
10441         }
10442 #endif
10443         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
10444             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
10445                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
10446                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
10447                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
10448                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
10449                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
10450                         else
10451                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
10452                 }
10453         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
10454                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
10455                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
10456                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
10457                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
10458                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
10459                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
10460                         else
10461                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
10462                 }
10463         }
10464         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
10465             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
10466                 if (rss_types & ETH_RSS_UDP) {
10467                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
10468                                 dev_flow->hash_fields |=
10469                                                 IBV_RX_HASH_SRC_PORT_UDP;
10470                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
10471                                 dev_flow->hash_fields |=
10472                                                 IBV_RX_HASH_DST_PORT_UDP;
10473                         else
10474                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
10475                 }
10476         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
10477                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
10478                 if (rss_types & ETH_RSS_TCP) {
10479                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
10480                                 dev_flow->hash_fields |=
10481                                                 IBV_RX_HASH_SRC_PORT_TCP;
10482                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
10483                                 dev_flow->hash_fields |=
10484                                                 IBV_RX_HASH_DST_PORT_TCP;
10485                         else
10486                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
10487                 }
10488         }
10489 }
10490
10491 /**
10492  * Prepare an Rx Hash queue.
10493  *
10494  * @param dev
10495  *   Pointer to Ethernet device.
10496  * @param[in] dev_flow
10497  *   Pointer to the mlx5_flow.
10498  * @param[in] rss_desc
10499  *   Pointer to the mlx5_flow_rss_desc.
10500  * @param[out] hrxq_idx
10501  *   Hash Rx queue index.
10502  *
10503  * @return
10504  *   The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
10505  */
10506 static struct mlx5_hrxq *
10507 flow_dv_hrxq_prepare(struct rte_eth_dev *dev,
10508                      struct mlx5_flow *dev_flow,
10509                      struct mlx5_flow_rss_desc *rss_desc,
10510                      uint32_t *hrxq_idx)
10511 {
10512         struct mlx5_priv *priv = dev->data->dev_private;
10513         struct mlx5_flow_handle *dh = dev_flow->handle;
10514         struct mlx5_hrxq *hrxq;
10515
10516         MLX5_ASSERT(rss_desc->queue_num);
10517         rss_desc->key_len = MLX5_RSS_HASH_KEY_LEN;
10518         rss_desc->hash_fields = dev_flow->hash_fields;
10519         rss_desc->tunnel = !!(dh->layers & MLX5_FLOW_LAYER_TUNNEL);
10520         rss_desc->shared_rss = 0;
10521         *hrxq_idx = mlx5_hrxq_get(dev, rss_desc);
10522         if (!*hrxq_idx)
10523                 return NULL;
10524         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
10525                               *hrxq_idx);
10526         return hrxq;
10527 }
10528
10529 /**
10530  * Release sample sub action resource.
10531  *
10532  * @param[in, out] dev
10533  *   Pointer to rte_eth_dev structure.
10534  * @param[in] act_res
10535  *   Pointer to sample sub action resource.
10536  */
10537 static void
10538 flow_dv_sample_sub_actions_release(struct rte_eth_dev *dev,
10539                                    struct mlx5_flow_sub_actions_idx *act_res)
10540 {
10541         if (act_res->rix_hrxq) {
10542                 mlx5_hrxq_release(dev, act_res->rix_hrxq);
10543                 act_res->rix_hrxq = 0;
10544         }
10545         if (act_res->rix_encap_decap) {
10546                 flow_dv_encap_decap_resource_release(dev,
10547                                                      act_res->rix_encap_decap);
10548                 act_res->rix_encap_decap = 0;
10549         }
10550         if (act_res->rix_port_id_action) {
10551                 flow_dv_port_id_action_resource_release(dev,
10552                                                 act_res->rix_port_id_action);
10553                 act_res->rix_port_id_action = 0;
10554         }
10555         if (act_res->rix_tag) {
10556                 flow_dv_tag_release(dev, act_res->rix_tag);
10557                 act_res->rix_tag = 0;
10558         }
10559         if (act_res->rix_jump) {
10560                 flow_dv_jump_tbl_resource_release(dev, act_res->rix_jump);
10561                 act_res->rix_jump = 0;
10562         }
10563 }
10564
10565 int
10566 flow_dv_sample_match_cb(struct mlx5_cache_list *list __rte_unused,
10567                         struct mlx5_cache_entry *entry, void *cb_ctx)
10568 {
10569         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10570         struct rte_eth_dev *dev = ctx->dev;
10571         struct mlx5_flow_dv_sample_resource *resource = ctx->data;
10572         struct mlx5_flow_dv_sample_resource *cache_resource =
10573                         container_of(entry, typeof(*cache_resource), entry);
10574
10575         if (resource->ratio == cache_resource->ratio &&
10576             resource->ft_type == cache_resource->ft_type &&
10577             resource->ft_id == cache_resource->ft_id &&
10578             resource->set_action == cache_resource->set_action &&
10579             !memcmp((void *)&resource->sample_act,
10580                     (void *)&cache_resource->sample_act,
10581                     sizeof(struct mlx5_flow_sub_actions_list))) {
10582                 /*
10583                  * Existing sample action should release the prepared
10584                  * sub-actions reference counter.
10585                  */
10586                 flow_dv_sample_sub_actions_release(dev,
10587                                                 &resource->sample_idx);
10588                 return 0;
10589         }
10590         return 1;
10591 }
10592
10593 struct mlx5_cache_entry *
10594 flow_dv_sample_create_cb(struct mlx5_cache_list *list __rte_unused,
10595                          struct mlx5_cache_entry *entry __rte_unused,
10596                          void *cb_ctx)
10597 {
10598         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10599         struct rte_eth_dev *dev = ctx->dev;
10600         struct mlx5_flow_dv_sample_resource *resource = ctx->data;
10601         void **sample_dv_actions = resource->sub_actions;
10602         struct mlx5_flow_dv_sample_resource *cache_resource;
10603         struct mlx5dv_dr_flow_sampler_attr sampler_attr;
10604         struct mlx5_priv *priv = dev->data->dev_private;
10605         struct mlx5_dev_ctx_shared *sh = priv->sh;
10606         struct mlx5_flow_tbl_resource *tbl;
10607         uint32_t idx = 0;
10608         const uint32_t next_ft_step = 1;
10609         uint32_t next_ft_id = resource->ft_id + next_ft_step;
10610         uint8_t is_egress = 0;
10611         uint8_t is_transfer = 0;
10612         struct rte_flow_error *error = ctx->error;
10613
10614         /* Register new sample resource. */
10615         cache_resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
10616         if (!cache_resource) {
10617                 rte_flow_error_set(error, ENOMEM,
10618                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10619                                           NULL,
10620                                           "cannot allocate resource memory");
10621                 return NULL;
10622         }
10623         *cache_resource = *resource;
10624         /* Create normal path table level */
10625         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
10626                 is_transfer = 1;
10627         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
10628                 is_egress = 1;
10629         tbl = flow_dv_tbl_resource_get(dev, next_ft_id,
10630                                         is_egress, is_transfer,
10631                                         true, NULL, 0, 0, 0, error);
10632         if (!tbl) {
10633                 rte_flow_error_set(error, ENOMEM,
10634                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10635                                           NULL,
10636                                           "fail to create normal path table "
10637                                           "for sample");
10638                 goto error;
10639         }
10640         cache_resource->normal_path_tbl = tbl;
10641         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
10642                 if (!sh->default_miss_action) {
10643                         rte_flow_error_set(error, ENOMEM,
10644                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10645                                                 NULL,
10646                                                 "default miss action was not "
10647                                                 "created");
10648                         goto error;
10649                 }
10650                 sample_dv_actions[resource->sample_act.actions_num++] =
10651                                                 sh->default_miss_action;
10652         }
10653         /* Create a DR sample action */
10654         sampler_attr.sample_ratio = cache_resource->ratio;
10655         sampler_attr.default_next_table = tbl->obj;
10656         sampler_attr.num_sample_actions = resource->sample_act.actions_num;
10657         sampler_attr.sample_actions = (struct mlx5dv_dr_action **)
10658                                                         &sample_dv_actions[0];
10659         sampler_attr.action = cache_resource->set_action;
10660         if (mlx5_os_flow_dr_create_flow_action_sampler
10661                         (&sampler_attr, &cache_resource->verbs_action)) {
10662                 rte_flow_error_set(error, ENOMEM,
10663                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10664                                         NULL, "cannot create sample action");
10665                 goto error;
10666         }
10667         cache_resource->idx = idx;
10668         cache_resource->dev = dev;
10669         return &cache_resource->entry;
10670 error:
10671         if (cache_resource->ft_type != MLX5DV_FLOW_TABLE_TYPE_FDB)
10672                 flow_dv_sample_sub_actions_release(dev,
10673                                                    &cache_resource->sample_idx);
10674         if (cache_resource->normal_path_tbl)
10675                 flow_dv_tbl_resource_release(MLX5_SH(dev),
10676                                 cache_resource->normal_path_tbl);
10677         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_SAMPLE], idx);
10678         return NULL;
10679
10680 }
10681
10682 /**
10683  * Find existing sample resource or create and register a new one.
10684  *
10685  * @param[in, out] dev
10686  *   Pointer to rte_eth_dev structure.
10687  * @param[in] resource
10688  *   Pointer to sample resource.
10689  * @parm[in, out] dev_flow
10690  *   Pointer to the dev_flow.
10691  * @param[out] error
10692  *   pointer to error structure.
10693  *
10694  * @return
10695  *   0 on success otherwise -errno and errno is set.
10696  */
10697 static int
10698 flow_dv_sample_resource_register(struct rte_eth_dev *dev,
10699                          struct mlx5_flow_dv_sample_resource *resource,
10700                          struct mlx5_flow *dev_flow,
10701                          struct rte_flow_error *error)
10702 {
10703         struct mlx5_flow_dv_sample_resource *cache_resource;
10704         struct mlx5_cache_entry *entry;
10705         struct mlx5_priv *priv = dev->data->dev_private;
10706         struct mlx5_flow_cb_ctx ctx = {
10707                 .dev = dev,
10708                 .error = error,
10709                 .data = resource,
10710         };
10711
10712         entry = mlx5_cache_register(&priv->sh->sample_action_list, &ctx);
10713         if (!entry)
10714                 return -rte_errno;
10715         cache_resource = container_of(entry, typeof(*cache_resource), entry);
10716         dev_flow->handle->dvh.rix_sample = cache_resource->idx;
10717         dev_flow->dv.sample_res = cache_resource;
10718         return 0;
10719 }
10720
10721 int
10722 flow_dv_dest_array_match_cb(struct mlx5_cache_list *list __rte_unused,
10723                             struct mlx5_cache_entry *entry, void *cb_ctx)
10724 {
10725         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10726         struct mlx5_flow_dv_dest_array_resource *resource = ctx->data;
10727         struct rte_eth_dev *dev = ctx->dev;
10728         struct mlx5_flow_dv_dest_array_resource *cache_resource =
10729                         container_of(entry, typeof(*cache_resource), entry);
10730         uint32_t idx = 0;
10731
10732         if (resource->num_of_dest == cache_resource->num_of_dest &&
10733             resource->ft_type == cache_resource->ft_type &&
10734             !memcmp((void *)cache_resource->sample_act,
10735                     (void *)resource->sample_act,
10736                    (resource->num_of_dest *
10737                    sizeof(struct mlx5_flow_sub_actions_list)))) {
10738                 /*
10739                  * Existing sample action should release the prepared
10740                  * sub-actions reference counter.
10741                  */
10742                 for (idx = 0; idx < resource->num_of_dest; idx++)
10743                         flow_dv_sample_sub_actions_release(dev,
10744                                         &resource->sample_idx[idx]);
10745                 return 0;
10746         }
10747         return 1;
10748 }
10749
10750 struct mlx5_cache_entry *
10751 flow_dv_dest_array_create_cb(struct mlx5_cache_list *list __rte_unused,
10752                          struct mlx5_cache_entry *entry __rte_unused,
10753                          void *cb_ctx)
10754 {
10755         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10756         struct rte_eth_dev *dev = ctx->dev;
10757         struct mlx5_flow_dv_dest_array_resource *cache_resource;
10758         struct mlx5_flow_dv_dest_array_resource *resource = ctx->data;
10759         struct mlx5dv_dr_action_dest_attr *dest_attr[MLX5_MAX_DEST_NUM] = { 0 };
10760         struct mlx5dv_dr_action_dest_reformat dest_reformat[MLX5_MAX_DEST_NUM];
10761         struct mlx5_priv *priv = dev->data->dev_private;
10762         struct mlx5_dev_ctx_shared *sh = priv->sh;
10763         struct mlx5_flow_sub_actions_list *sample_act;
10764         struct mlx5dv_dr_domain *domain;
10765         uint32_t idx = 0, res_idx = 0;
10766         struct rte_flow_error *error = ctx->error;
10767         uint64_t action_flags;
10768         int ret;
10769
10770         /* Register new destination array resource. */
10771         cache_resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
10772                                             &res_idx);
10773         if (!cache_resource) {
10774                 rte_flow_error_set(error, ENOMEM,
10775                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10776                                           NULL,
10777                                           "cannot allocate resource memory");
10778                 return NULL;
10779         }
10780         *cache_resource = *resource;
10781         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
10782                 domain = sh->fdb_domain;
10783         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
10784                 domain = sh->rx_domain;
10785         else
10786                 domain = sh->tx_domain;
10787         for (idx = 0; idx < resource->num_of_dest; idx++) {
10788                 dest_attr[idx] = (struct mlx5dv_dr_action_dest_attr *)
10789                                  mlx5_malloc(MLX5_MEM_ZERO,
10790                                  sizeof(struct mlx5dv_dr_action_dest_attr),
10791                                  0, SOCKET_ID_ANY);
10792                 if (!dest_attr[idx]) {
10793                         rte_flow_error_set(error, ENOMEM,
10794                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10795                                            NULL,
10796                                            "cannot allocate resource memory");
10797                         goto error;
10798                 }
10799                 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST;
10800                 sample_act = &resource->sample_act[idx];
10801                 action_flags = sample_act->action_flags;
10802                 switch (action_flags) {
10803                 case MLX5_FLOW_ACTION_QUEUE:
10804                         dest_attr[idx]->dest = sample_act->dr_queue_action;
10805                         break;
10806                 case (MLX5_FLOW_ACTION_PORT_ID | MLX5_FLOW_ACTION_ENCAP):
10807                         dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST_REFORMAT;
10808                         dest_attr[idx]->dest_reformat = &dest_reformat[idx];
10809                         dest_attr[idx]->dest_reformat->reformat =
10810                                         sample_act->dr_encap_action;
10811                         dest_attr[idx]->dest_reformat->dest =
10812                                         sample_act->dr_port_id_action;
10813                         break;
10814                 case MLX5_FLOW_ACTION_PORT_ID:
10815                         dest_attr[idx]->dest = sample_act->dr_port_id_action;
10816                         break;
10817                 case MLX5_FLOW_ACTION_JUMP:
10818                         dest_attr[idx]->dest = sample_act->dr_jump_action;
10819                         break;
10820                 default:
10821                         rte_flow_error_set(error, EINVAL,
10822                                            RTE_FLOW_ERROR_TYPE_ACTION,
10823                                            NULL,
10824                                            "unsupported actions type");
10825                         goto error;
10826                 }
10827         }
10828         /* create a dest array actioin */
10829         ret = mlx5_os_flow_dr_create_flow_action_dest_array
10830                                                 (domain,
10831                                                  cache_resource->num_of_dest,
10832                                                  dest_attr,
10833                                                  &cache_resource->action);
10834         if (ret) {
10835                 rte_flow_error_set(error, ENOMEM,
10836                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10837                                    NULL,
10838                                    "cannot create destination array action");
10839                 goto error;
10840         }
10841         cache_resource->idx = res_idx;
10842         cache_resource->dev = dev;
10843         for (idx = 0; idx < resource->num_of_dest; idx++)
10844                 mlx5_free(dest_attr[idx]);
10845         return &cache_resource->entry;
10846 error:
10847         for (idx = 0; idx < resource->num_of_dest; idx++) {
10848                 flow_dv_sample_sub_actions_release(dev,
10849                                 &cache_resource->sample_idx[idx]);
10850                 if (dest_attr[idx])
10851                         mlx5_free(dest_attr[idx]);
10852         }
10853
10854         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DEST_ARRAY], res_idx);
10855         return NULL;
10856 }
10857
10858 /**
10859  * Find existing destination array resource or create and register a new one.
10860  *
10861  * @param[in, out] dev
10862  *   Pointer to rte_eth_dev structure.
10863  * @param[in] resource
10864  *   Pointer to destination array resource.
10865  * @parm[in, out] dev_flow
10866  *   Pointer to the dev_flow.
10867  * @param[out] error
10868  *   pointer to error structure.
10869  *
10870  * @return
10871  *   0 on success otherwise -errno and errno is set.
10872  */
10873 static int
10874 flow_dv_dest_array_resource_register(struct rte_eth_dev *dev,
10875                          struct mlx5_flow_dv_dest_array_resource *resource,
10876                          struct mlx5_flow *dev_flow,
10877                          struct rte_flow_error *error)
10878 {
10879         struct mlx5_flow_dv_dest_array_resource *cache_resource;
10880         struct mlx5_priv *priv = dev->data->dev_private;
10881         struct mlx5_cache_entry *entry;
10882         struct mlx5_flow_cb_ctx ctx = {
10883                 .dev = dev,
10884                 .error = error,
10885                 .data = resource,
10886         };
10887
10888         entry = mlx5_cache_register(&priv->sh->dest_array_list, &ctx);
10889         if (!entry)
10890                 return -rte_errno;
10891         cache_resource = container_of(entry, typeof(*cache_resource), entry);
10892         dev_flow->handle->dvh.rix_dest_array = cache_resource->idx;
10893         dev_flow->dv.dest_array_res = cache_resource;
10894         return 0;
10895 }
10896
10897 /**
10898  * Convert Sample action to DV specification.
10899  *
10900  * @param[in] dev
10901  *   Pointer to rte_eth_dev structure.
10902  * @param[in] action
10903  *   Pointer to sample action structure.
10904  * @param[in, out] dev_flow
10905  *   Pointer to the mlx5_flow.
10906  * @param[in] attr
10907  *   Pointer to the flow attributes.
10908  * @param[in, out] num_of_dest
10909  *   Pointer to the num of destination.
10910  * @param[in, out] sample_actions
10911  *   Pointer to sample actions list.
10912  * @param[in, out] res
10913  *   Pointer to sample resource.
10914  * @param[out] error
10915  *   Pointer to the error structure.
10916  *
10917  * @return
10918  *   0 on success, a negative errno value otherwise and rte_errno is set.
10919  */
10920 static int
10921 flow_dv_translate_action_sample(struct rte_eth_dev *dev,
10922                                 const struct rte_flow_action_sample *action,
10923                                 struct mlx5_flow *dev_flow,
10924                                 const struct rte_flow_attr *attr,
10925                                 uint32_t *num_of_dest,
10926                                 void **sample_actions,
10927                                 struct mlx5_flow_dv_sample_resource *res,
10928                                 struct rte_flow_error *error)
10929 {
10930         struct mlx5_priv *priv = dev->data->dev_private;
10931         const struct rte_flow_action *sub_actions;
10932         struct mlx5_flow_sub_actions_list *sample_act;
10933         struct mlx5_flow_sub_actions_idx *sample_idx;
10934         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
10935         struct rte_flow *flow = dev_flow->flow;
10936         struct mlx5_flow_rss_desc *rss_desc;
10937         uint64_t action_flags = 0;
10938
10939         MLX5_ASSERT(wks);
10940         rss_desc = &wks->rss_desc;
10941         sample_act = &res->sample_act;
10942         sample_idx = &res->sample_idx;
10943         res->ratio = action->ratio;
10944         sub_actions = action->actions;
10945         for (; sub_actions->type != RTE_FLOW_ACTION_TYPE_END; sub_actions++) {
10946                 int type = sub_actions->type;
10947                 uint32_t pre_rix = 0;
10948                 void *pre_r;
10949                 switch (type) {
10950                 case RTE_FLOW_ACTION_TYPE_QUEUE:
10951                 {
10952                         const struct rte_flow_action_queue *queue;
10953                         struct mlx5_hrxq *hrxq;
10954                         uint32_t hrxq_idx;
10955
10956                         queue = sub_actions->conf;
10957                         rss_desc->queue_num = 1;
10958                         rss_desc->queue[0] = queue->index;
10959                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
10960                                                     rss_desc, &hrxq_idx);
10961                         if (!hrxq)
10962                                 return rte_flow_error_set
10963                                         (error, rte_errno,
10964                                          RTE_FLOW_ERROR_TYPE_ACTION,
10965                                          NULL,
10966                                          "cannot create fate queue");
10967                         sample_act->dr_queue_action = hrxq->action;
10968                         sample_idx->rix_hrxq = hrxq_idx;
10969                         sample_actions[sample_act->actions_num++] =
10970                                                 hrxq->action;
10971                         (*num_of_dest)++;
10972                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
10973                         if (action_flags & MLX5_FLOW_ACTION_MARK)
10974                                 dev_flow->handle->rix_hrxq = hrxq_idx;
10975                         dev_flow->handle->fate_action =
10976                                         MLX5_FLOW_FATE_QUEUE;
10977                         break;
10978                 }
10979                 case RTE_FLOW_ACTION_TYPE_RSS:
10980                 {
10981                         struct mlx5_hrxq *hrxq;
10982                         uint32_t hrxq_idx;
10983                         const struct rte_flow_action_rss *rss;
10984                         const uint8_t *rss_key;
10985
10986                         rss = sub_actions->conf;
10987                         memcpy(rss_desc->queue, rss->queue,
10988                                rss->queue_num * sizeof(uint16_t));
10989                         rss_desc->queue_num = rss->queue_num;
10990                         /* NULL RSS key indicates default RSS key. */
10991                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
10992                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
10993                         /*
10994                          * rss->level and rss.types should be set in advance
10995                          * when expanding items for RSS.
10996                          */
10997                         flow_dv_hashfields_set(dev_flow, rss_desc);
10998                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
10999                                                     rss_desc, &hrxq_idx);
11000                         if (!hrxq)
11001                                 return rte_flow_error_set
11002                                         (error, rte_errno,
11003                                          RTE_FLOW_ERROR_TYPE_ACTION,
11004                                          NULL,
11005                                          "cannot create fate queue");
11006                         sample_act->dr_queue_action = hrxq->action;
11007                         sample_idx->rix_hrxq = hrxq_idx;
11008                         sample_actions[sample_act->actions_num++] =
11009                                                 hrxq->action;
11010                         (*num_of_dest)++;
11011                         action_flags |= MLX5_FLOW_ACTION_RSS;
11012                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11013                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11014                         dev_flow->handle->fate_action =
11015                                         MLX5_FLOW_FATE_QUEUE;
11016                         break;
11017                 }
11018                 case RTE_FLOW_ACTION_TYPE_MARK:
11019                 {
11020                         uint32_t tag_be = mlx5_flow_mark_set
11021                                 (((const struct rte_flow_action_mark *)
11022                                 (sub_actions->conf))->id);
11023
11024                         dev_flow->handle->mark = 1;
11025                         pre_rix = dev_flow->handle->dvh.rix_tag;
11026                         /* Save the mark resource before sample */
11027                         pre_r = dev_flow->dv.tag_resource;
11028                         if (flow_dv_tag_resource_register(dev, tag_be,
11029                                                   dev_flow, error))
11030                                 return -rte_errno;
11031                         MLX5_ASSERT(dev_flow->dv.tag_resource);
11032                         sample_act->dr_tag_action =
11033                                 dev_flow->dv.tag_resource->action;
11034                         sample_idx->rix_tag =
11035                                 dev_flow->handle->dvh.rix_tag;
11036                         sample_actions[sample_act->actions_num++] =
11037                                                 sample_act->dr_tag_action;
11038                         /* Recover the mark resource after sample */
11039                         dev_flow->dv.tag_resource = pre_r;
11040                         dev_flow->handle->dvh.rix_tag = pre_rix;
11041                         action_flags |= MLX5_FLOW_ACTION_MARK;
11042                         break;
11043                 }
11044                 case RTE_FLOW_ACTION_TYPE_COUNT:
11045                 {
11046                         if (!flow->counter) {
11047                                 flow->counter =
11048                                         flow_dv_translate_create_counter(dev,
11049                                                 dev_flow, sub_actions->conf,
11050                                                 0);
11051                                 if (!flow->counter)
11052                                         return rte_flow_error_set
11053                                                 (error, rte_errno,
11054                                                 RTE_FLOW_ERROR_TYPE_ACTION,
11055                                                 NULL,
11056                                                 "cannot create counter"
11057                                                 " object.");
11058                         }
11059                         sample_act->dr_cnt_action =
11060                                   (flow_dv_counter_get_by_idx(dev,
11061                                   flow->counter, NULL))->action;
11062                         sample_actions[sample_act->actions_num++] =
11063                                                 sample_act->dr_cnt_action;
11064                         action_flags |= MLX5_FLOW_ACTION_COUNT;
11065                         break;
11066                 }
11067                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
11068                 {
11069                         struct mlx5_flow_dv_port_id_action_resource
11070                                         port_id_resource;
11071                         uint32_t port_id = 0;
11072
11073                         memset(&port_id_resource, 0, sizeof(port_id_resource));
11074                         /* Save the port id resource before sample */
11075                         pre_rix = dev_flow->handle->rix_port_id_action;
11076                         pre_r = dev_flow->dv.port_id_action;
11077                         if (flow_dv_translate_action_port_id(dev, sub_actions,
11078                                                              &port_id, error))
11079                                 return -rte_errno;
11080                         port_id_resource.port_id = port_id;
11081                         if (flow_dv_port_id_action_resource_register
11082                             (dev, &port_id_resource, dev_flow, error))
11083                                 return -rte_errno;
11084                         sample_act->dr_port_id_action =
11085                                 dev_flow->dv.port_id_action->action;
11086                         sample_idx->rix_port_id_action =
11087                                 dev_flow->handle->rix_port_id_action;
11088                         sample_actions[sample_act->actions_num++] =
11089                                                 sample_act->dr_port_id_action;
11090                         /* Recover the port id resource after sample */
11091                         dev_flow->dv.port_id_action = pre_r;
11092                         dev_flow->handle->rix_port_id_action = pre_rix;
11093                         (*num_of_dest)++;
11094                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
11095                         break;
11096                 }
11097                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
11098                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
11099                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
11100                         /* Save the encap resource before sample */
11101                         pre_rix = dev_flow->handle->dvh.rix_encap_decap;
11102                         pre_r = dev_flow->dv.encap_decap;
11103                         if (flow_dv_create_action_l2_encap(dev, sub_actions,
11104                                                            dev_flow,
11105                                                            attr->transfer,
11106                                                            error))
11107                                 return -rte_errno;
11108                         sample_act->dr_encap_action =
11109                                 dev_flow->dv.encap_decap->action;
11110                         sample_idx->rix_encap_decap =
11111                                 dev_flow->handle->dvh.rix_encap_decap;
11112                         sample_actions[sample_act->actions_num++] =
11113                                                 sample_act->dr_encap_action;
11114                         /* Recover the encap resource after sample */
11115                         dev_flow->dv.encap_decap = pre_r;
11116                         dev_flow->handle->dvh.rix_encap_decap = pre_rix;
11117                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
11118                         break;
11119                 default:
11120                         return rte_flow_error_set(error, EINVAL,
11121                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11122                                 NULL,
11123                                 "Not support for sampler action");
11124                 }
11125         }
11126         sample_act->action_flags = action_flags;
11127         res->ft_id = dev_flow->dv.group;
11128         if (attr->transfer) {
11129                 union {
11130                         uint32_t action_in[MLX5_ST_SZ_DW(set_action_in)];
11131                         uint64_t set_action;
11132                 } action_ctx = { .set_action = 0 };
11133
11134                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
11135                 MLX5_SET(set_action_in, action_ctx.action_in, action_type,
11136                          MLX5_MODIFICATION_TYPE_SET);
11137                 MLX5_SET(set_action_in, action_ctx.action_in, field,
11138                          MLX5_MODI_META_REG_C_0);
11139                 MLX5_SET(set_action_in, action_ctx.action_in, data,
11140                          priv->vport_meta_tag);
11141                 res->set_action = action_ctx.set_action;
11142         } else if (attr->ingress) {
11143                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
11144         } else {
11145                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_TX;
11146         }
11147         return 0;
11148 }
11149
11150 /**
11151  * Convert Sample action to DV specification.
11152  *
11153  * @param[in] dev
11154  *   Pointer to rte_eth_dev structure.
11155  * @param[in, out] dev_flow
11156  *   Pointer to the mlx5_flow.
11157  * @param[in] num_of_dest
11158  *   The num of destination.
11159  * @param[in, out] res
11160  *   Pointer to sample resource.
11161  * @param[in, out] mdest_res
11162  *   Pointer to destination array resource.
11163  * @param[in] sample_actions
11164  *   Pointer to sample path actions list.
11165  * @param[in] action_flags
11166  *   Holds the actions detected until now.
11167  * @param[out] error
11168  *   Pointer to the error structure.
11169  *
11170  * @return
11171  *   0 on success, a negative errno value otherwise and rte_errno is set.
11172  */
11173 static int
11174 flow_dv_create_action_sample(struct rte_eth_dev *dev,
11175                              struct mlx5_flow *dev_flow,
11176                              uint32_t num_of_dest,
11177                              struct mlx5_flow_dv_sample_resource *res,
11178                              struct mlx5_flow_dv_dest_array_resource *mdest_res,
11179                              void **sample_actions,
11180                              uint64_t action_flags,
11181                              struct rte_flow_error *error)
11182 {
11183         /* update normal path action resource into last index of array */
11184         uint32_t dest_index = MLX5_MAX_DEST_NUM - 1;
11185         struct mlx5_flow_sub_actions_list *sample_act =
11186                                         &mdest_res->sample_act[dest_index];
11187         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11188         struct mlx5_flow_rss_desc *rss_desc;
11189         uint32_t normal_idx = 0;
11190         struct mlx5_hrxq *hrxq;
11191         uint32_t hrxq_idx;
11192
11193         MLX5_ASSERT(wks);
11194         rss_desc = &wks->rss_desc;
11195         if (num_of_dest > 1) {
11196                 if (sample_act->action_flags & MLX5_FLOW_ACTION_QUEUE) {
11197                         /* Handle QP action for mirroring */
11198                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11199                                                     rss_desc, &hrxq_idx);
11200                         if (!hrxq)
11201                                 return rte_flow_error_set
11202                                      (error, rte_errno,
11203                                       RTE_FLOW_ERROR_TYPE_ACTION,
11204                                       NULL,
11205                                       "cannot create rx queue");
11206                         normal_idx++;
11207                         mdest_res->sample_idx[dest_index].rix_hrxq = hrxq_idx;
11208                         sample_act->dr_queue_action = hrxq->action;
11209                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11210                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11211                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
11212                 }
11213                 if (sample_act->action_flags & MLX5_FLOW_ACTION_ENCAP) {
11214                         normal_idx++;
11215                         mdest_res->sample_idx[dest_index].rix_encap_decap =
11216                                 dev_flow->handle->dvh.rix_encap_decap;
11217                         sample_act->dr_encap_action =
11218                                 dev_flow->dv.encap_decap->action;
11219                         dev_flow->handle->dvh.rix_encap_decap = 0;
11220                 }
11221                 if (sample_act->action_flags & MLX5_FLOW_ACTION_PORT_ID) {
11222                         normal_idx++;
11223                         mdest_res->sample_idx[dest_index].rix_port_id_action =
11224                                 dev_flow->handle->rix_port_id_action;
11225                         sample_act->dr_port_id_action =
11226                                 dev_flow->dv.port_id_action->action;
11227                         dev_flow->handle->rix_port_id_action = 0;
11228                 }
11229                 if (sample_act->action_flags & MLX5_FLOW_ACTION_JUMP) {
11230                         normal_idx++;
11231                         mdest_res->sample_idx[dest_index].rix_jump =
11232                                 dev_flow->handle->rix_jump;
11233                         sample_act->dr_jump_action =
11234                                 dev_flow->dv.jump->action;
11235                         dev_flow->handle->rix_jump = 0;
11236                 }
11237                 sample_act->actions_num = normal_idx;
11238                 /* update sample action resource into first index of array */
11239                 mdest_res->ft_type = res->ft_type;
11240                 memcpy(&mdest_res->sample_idx[0], &res->sample_idx,
11241                                 sizeof(struct mlx5_flow_sub_actions_idx));
11242                 memcpy(&mdest_res->sample_act[0], &res->sample_act,
11243                                 sizeof(struct mlx5_flow_sub_actions_list));
11244                 mdest_res->num_of_dest = num_of_dest;
11245                 if (flow_dv_dest_array_resource_register(dev, mdest_res,
11246                                                          dev_flow, error))
11247                         return rte_flow_error_set(error, EINVAL,
11248                                                   RTE_FLOW_ERROR_TYPE_ACTION,
11249                                                   NULL, "can't create sample "
11250                                                   "action");
11251         } else {
11252                 res->sub_actions = sample_actions;
11253                 if (flow_dv_sample_resource_register(dev, res, dev_flow, error))
11254                         return rte_flow_error_set(error, EINVAL,
11255                                                   RTE_FLOW_ERROR_TYPE_ACTION,
11256                                                   NULL,
11257                                                   "can't create sample action");
11258         }
11259         return 0;
11260 }
11261
11262 /**
11263  * Remove an ASO age action from age actions list.
11264  *
11265  * @param[in] dev
11266  *   Pointer to the Ethernet device structure.
11267  * @param[in] age
11268  *   Pointer to the aso age action handler.
11269  */
11270 static void
11271 flow_dv_aso_age_remove_from_age(struct rte_eth_dev *dev,
11272                                 struct mlx5_aso_age_action *age)
11273 {
11274         struct mlx5_age_info *age_info;
11275         struct mlx5_age_param *age_param = &age->age_params;
11276         struct mlx5_priv *priv = dev->data->dev_private;
11277         uint16_t expected = AGE_CANDIDATE;
11278
11279         age_info = GET_PORT_AGE_INFO(priv);
11280         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
11281                                          AGE_FREE, false, __ATOMIC_RELAXED,
11282                                          __ATOMIC_RELAXED)) {
11283                 /**
11284                  * We need the lock even it is age timeout,
11285                  * since age action may still in process.
11286                  */
11287                 rte_spinlock_lock(&age_info->aged_sl);
11288                 LIST_REMOVE(age, next);
11289                 rte_spinlock_unlock(&age_info->aged_sl);
11290                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
11291         }
11292 }
11293
11294 /**
11295  * Release an ASO age action.
11296  *
11297  * @param[in] dev
11298  *   Pointer to the Ethernet device structure.
11299  * @param[in] age_idx
11300  *   Index of ASO age action to release.
11301  * @param[in] flow
11302  *   True if the release operation is during flow destroy operation.
11303  *   False if the release operation is during action destroy operation.
11304  *
11305  * @return
11306  *   0 when age action was removed, otherwise the number of references.
11307  */
11308 static int
11309 flow_dv_aso_age_release(struct rte_eth_dev *dev, uint32_t age_idx)
11310 {
11311         struct mlx5_priv *priv = dev->data->dev_private;
11312         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11313         struct mlx5_aso_age_action *age = flow_aso_age_get_by_idx(dev, age_idx);
11314         uint32_t ret = __atomic_sub_fetch(&age->refcnt, 1, __ATOMIC_RELAXED);
11315
11316         if (!ret) {
11317                 flow_dv_aso_age_remove_from_age(dev, age);
11318                 rte_spinlock_lock(&mng->free_sl);
11319                 LIST_INSERT_HEAD(&mng->free, age, next);
11320                 rte_spinlock_unlock(&mng->free_sl);
11321         }
11322         return ret;
11323 }
11324
11325 /**
11326  * Resize the ASO age pools array by MLX5_CNT_CONTAINER_RESIZE pools.
11327  *
11328  * @param[in] dev
11329  *   Pointer to the Ethernet device structure.
11330  *
11331  * @return
11332  *   0 on success, otherwise negative errno value and rte_errno is set.
11333  */
11334 static int
11335 flow_dv_aso_age_pools_resize(struct rte_eth_dev *dev)
11336 {
11337         struct mlx5_priv *priv = dev->data->dev_private;
11338         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11339         void *old_pools = mng->pools;
11340         uint32_t resize = mng->n + MLX5_CNT_CONTAINER_RESIZE;
11341         uint32_t mem_size = sizeof(struct mlx5_aso_age_pool *) * resize;
11342         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
11343
11344         if (!pools) {
11345                 rte_errno = ENOMEM;
11346                 return -ENOMEM;
11347         }
11348         if (old_pools) {
11349                 memcpy(pools, old_pools,
11350                        mng->n * sizeof(struct mlx5_flow_counter_pool *));
11351                 mlx5_free(old_pools);
11352         } else {
11353                 /* First ASO flow hit allocation - starting ASO data-path. */
11354                 int ret = mlx5_aso_flow_hit_queue_poll_start(priv->sh);
11355
11356                 if (ret) {
11357                         mlx5_free(pools);
11358                         return ret;
11359                 }
11360         }
11361         mng->n = resize;
11362         mng->pools = pools;
11363         return 0;
11364 }
11365
11366 /**
11367  * Create and initialize a new ASO aging pool.
11368  *
11369  * @param[in] dev
11370  *   Pointer to the Ethernet device structure.
11371  * @param[out] age_free
11372  *   Where to put the pointer of a new age action.
11373  *
11374  * @return
11375  *   The age actions pool pointer and @p age_free is set on success,
11376  *   NULL otherwise and rte_errno is set.
11377  */
11378 static struct mlx5_aso_age_pool *
11379 flow_dv_age_pool_create(struct rte_eth_dev *dev,
11380                         struct mlx5_aso_age_action **age_free)
11381 {
11382         struct mlx5_priv *priv = dev->data->dev_private;
11383         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11384         struct mlx5_aso_age_pool *pool = NULL;
11385         struct mlx5_devx_obj *obj = NULL;
11386         uint32_t i;
11387
11388         obj = mlx5_devx_cmd_create_flow_hit_aso_obj(priv->sh->ctx,
11389                                                     priv->sh->pdn);
11390         if (!obj) {
11391                 rte_errno = ENODATA;
11392                 DRV_LOG(ERR, "Failed to create flow_hit_aso_obj using DevX.");
11393                 return NULL;
11394         }
11395         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
11396         if (!pool) {
11397                 claim_zero(mlx5_devx_cmd_destroy(obj));
11398                 rte_errno = ENOMEM;
11399                 return NULL;
11400         }
11401         pool->flow_hit_aso_obj = obj;
11402         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
11403         rte_spinlock_lock(&mng->resize_sl);
11404         pool->index = mng->next;
11405         /* Resize pools array if there is no room for the new pool in it. */
11406         if (pool->index == mng->n && flow_dv_aso_age_pools_resize(dev)) {
11407                 claim_zero(mlx5_devx_cmd_destroy(obj));
11408                 mlx5_free(pool);
11409                 rte_spinlock_unlock(&mng->resize_sl);
11410                 return NULL;
11411         }
11412         mng->pools[pool->index] = pool;
11413         mng->next++;
11414         rte_spinlock_unlock(&mng->resize_sl);
11415         /* Assign the first action in the new pool, the rest go to free list. */
11416         *age_free = &pool->actions[0];
11417         for (i = 1; i < MLX5_ASO_AGE_ACTIONS_PER_POOL; i++) {
11418                 pool->actions[i].offset = i;
11419                 LIST_INSERT_HEAD(&mng->free, &pool->actions[i], next);
11420         }
11421         return pool;
11422 }
11423
11424 /**
11425  * Allocate a ASO aging bit.
11426  *
11427  * @param[in] dev
11428  *   Pointer to the Ethernet device structure.
11429  * @param[out] error
11430  *   Pointer to the error structure.
11431  *
11432  * @return
11433  *   Index to ASO age action on success, 0 otherwise and rte_errno is set.
11434  */
11435 static uint32_t
11436 flow_dv_aso_age_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
11437 {
11438         struct mlx5_priv *priv = dev->data->dev_private;
11439         const struct mlx5_aso_age_pool *pool;
11440         struct mlx5_aso_age_action *age_free = NULL;
11441         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11442
11443         MLX5_ASSERT(mng);
11444         /* Try to get the next free age action bit. */
11445         rte_spinlock_lock(&mng->free_sl);
11446         age_free = LIST_FIRST(&mng->free);
11447         if (age_free) {
11448                 LIST_REMOVE(age_free, next);
11449         } else if (!flow_dv_age_pool_create(dev, &age_free)) {
11450                 rte_spinlock_unlock(&mng->free_sl);
11451                 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
11452                                    NULL, "failed to create ASO age pool");
11453                 return 0; /* 0 is an error. */
11454         }
11455         rte_spinlock_unlock(&mng->free_sl);
11456         pool = container_of
11457           ((const struct mlx5_aso_age_action (*)[MLX5_ASO_AGE_ACTIONS_PER_POOL])
11458                   (age_free - age_free->offset), const struct mlx5_aso_age_pool,
11459                                                                        actions);
11460         if (!age_free->dr_action) {
11461                 int reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_FLOW_HIT, 0,
11462                                                  error);
11463
11464                 if (reg_c < 0) {
11465                         rte_flow_error_set(error, rte_errno,
11466                                            RTE_FLOW_ERROR_TYPE_ACTION,
11467                                            NULL, "failed to get reg_c "
11468                                            "for ASO flow hit");
11469                         return 0; /* 0 is an error. */
11470                 }
11471 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
11472                 age_free->dr_action = mlx5_glue->dv_create_flow_action_aso
11473                                 (priv->sh->rx_domain,
11474                                  pool->flow_hit_aso_obj->obj, age_free->offset,
11475                                  MLX5DV_DR_ACTION_FLAGS_ASO_FIRST_HIT_SET,
11476                                  (reg_c - REG_C_0));
11477 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
11478                 if (!age_free->dr_action) {
11479                         rte_errno = errno;
11480                         rte_spinlock_lock(&mng->free_sl);
11481                         LIST_INSERT_HEAD(&mng->free, age_free, next);
11482                         rte_spinlock_unlock(&mng->free_sl);
11483                         rte_flow_error_set(error, rte_errno,
11484                                            RTE_FLOW_ERROR_TYPE_ACTION,
11485                                            NULL, "failed to create ASO "
11486                                            "flow hit action");
11487                         return 0; /* 0 is an error. */
11488                 }
11489         }
11490         __atomic_store_n(&age_free->refcnt, 1, __ATOMIC_RELAXED);
11491         return pool->index | ((age_free->offset + 1) << 16);
11492 }
11493
11494 /**
11495  * Create a age action using ASO mechanism.
11496  *
11497  * @param[in] dev
11498  *   Pointer to rte_eth_dev structure.
11499  * @param[in] age
11500  *   Pointer to the aging action configuration.
11501  * @param[out] error
11502  *   Pointer to the error structure.
11503  *
11504  * @return
11505  *   Index to flow counter on success, 0 otherwise.
11506  */
11507 static uint32_t
11508 flow_dv_translate_create_aso_age(struct rte_eth_dev *dev,
11509                                  const struct rte_flow_action_age *age,
11510                                  struct rte_flow_error *error)
11511 {
11512         uint32_t age_idx = 0;
11513         struct mlx5_aso_age_action *aso_age;
11514
11515         age_idx = flow_dv_aso_age_alloc(dev, error);
11516         if (!age_idx)
11517                 return 0;
11518         aso_age = flow_aso_age_get_by_idx(dev, age_idx);
11519         aso_age->age_params.context = age->context;
11520         aso_age->age_params.timeout = age->timeout;
11521         aso_age->age_params.port_id = dev->data->port_id;
11522         __atomic_store_n(&aso_age->age_params.sec_since_last_hit, 0,
11523                          __ATOMIC_RELAXED);
11524         __atomic_store_n(&aso_age->age_params.state, AGE_CANDIDATE,
11525                          __ATOMIC_RELAXED);
11526         return age_idx;
11527 }
11528
11529 static void
11530 flow_dv_translate_integrity_l4(const struct rte_flow_item_integrity *mask,
11531                                const struct rte_flow_item_integrity *value,
11532                                void *headers_m, void *headers_v)
11533 {
11534         if (mask->l4_ok) {
11535                 /* application l4_ok filter aggregates all hardware l4 filters
11536                  * therefore hw l4_checksum_ok must be implicitly added here.
11537                  */
11538                 struct rte_flow_item_integrity local_item;
11539
11540                 local_item.l4_csum_ok = 1;
11541                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
11542                          local_item.l4_csum_ok);
11543                 if (value->l4_ok) {
11544                         /* application l4_ok = 1 matches sets both hw flags
11545                          * l4_ok and l4_checksum_ok flags to 1.
11546                          */
11547                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
11548                                  l4_checksum_ok, local_item.l4_csum_ok);
11549                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_ok,
11550                                  mask->l4_ok);
11551                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_ok,
11552                                  value->l4_ok);
11553                 } else {
11554                         /* application l4_ok = 0 matches on hw flag
11555                          * l4_checksum_ok = 0 only.
11556                          */
11557                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
11558                                  l4_checksum_ok, 0);
11559                 }
11560         } else if (mask->l4_csum_ok) {
11561                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
11562                          mask->l4_csum_ok);
11563                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_checksum_ok,
11564                          value->l4_csum_ok);
11565         }
11566 }
11567
11568 static void
11569 flow_dv_translate_integrity_l3(const struct rte_flow_item_integrity *mask,
11570                                const struct rte_flow_item_integrity *value,
11571                                void *headers_m, void *headers_v,
11572                                bool is_ipv4)
11573 {
11574         if (mask->l3_ok) {
11575                 /* application l3_ok filter aggregates all hardware l3 filters
11576                  * therefore hw ipv4_checksum_ok must be implicitly added here.
11577                  */
11578                 struct rte_flow_item_integrity local_item;
11579
11580                 local_item.ipv4_csum_ok = !!is_ipv4;
11581                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
11582                          local_item.ipv4_csum_ok);
11583                 if (value->l3_ok) {
11584                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
11585                                  ipv4_checksum_ok, local_item.ipv4_csum_ok);
11586                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, l3_ok,
11587                                  mask->l3_ok);
11588                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, l3_ok,
11589                                  value->l3_ok);
11590                 } else {
11591                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
11592                                  ipv4_checksum_ok, 0);
11593                 }
11594         } else if (mask->ipv4_csum_ok) {
11595                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
11596                          mask->ipv4_csum_ok);
11597                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_checksum_ok,
11598                          value->ipv4_csum_ok);
11599         }
11600 }
11601
11602 static void
11603 flow_dv_translate_item_integrity(void *matcher, void *key,
11604                                  const struct rte_flow_item *head_item,
11605                                  const struct rte_flow_item *integrity_item)
11606 {
11607         const struct rte_flow_item_integrity *mask = integrity_item->mask;
11608         const struct rte_flow_item_integrity *value = integrity_item->spec;
11609         const struct rte_flow_item *tunnel_item, *end_item, *item;
11610         void *headers_m;
11611         void *headers_v;
11612         uint32_t l3_protocol;
11613
11614         if (!value)
11615                 return;
11616         if (!mask)
11617                 mask = &rte_flow_item_integrity_mask;
11618         if (value->level > 1) {
11619                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
11620                                          inner_headers);
11621                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
11622         } else {
11623                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
11624                                          outer_headers);
11625                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
11626         }
11627         tunnel_item = mlx5_flow_find_tunnel_item(head_item);
11628         if (value->level > 1) {
11629                 /* tunnel item was verified during the item validation */
11630                 item = tunnel_item;
11631                 end_item = mlx5_find_end_item(tunnel_item);
11632         } else {
11633                 item = head_item;
11634                 end_item = tunnel_item ? tunnel_item :
11635                            mlx5_find_end_item(integrity_item);
11636         }
11637         l3_protocol = mask->l3_ok ?
11638                       mlx5_flow_locate_proto_l3(&item, end_item) : 0;
11639         flow_dv_translate_integrity_l3(mask, value, headers_m, headers_v,
11640                                        l3_protocol == RTE_ETHER_TYPE_IPV4);
11641         flow_dv_translate_integrity_l4(mask, value, headers_m, headers_v);
11642 }
11643
11644 /**
11645  * Prepares DV flow counter with aging configuration.
11646  * Gets it by index when exists, creates a new one when doesn't.
11647  *
11648  * @param[in] dev
11649  *   Pointer to rte_eth_dev structure.
11650  * @param[in] dev_flow
11651  *   Pointer to the mlx5_flow.
11652  * @param[in, out] flow
11653  *   Pointer to the sub flow.
11654  * @param[in] count
11655  *   Pointer to the counter action configuration.
11656  * @param[in] age
11657  *   Pointer to the aging action configuration.
11658  * @param[out] error
11659  *   Pointer to the error structure.
11660  *
11661  * @return
11662  *   Pointer to the counter, NULL otherwise.
11663  */
11664 static struct mlx5_flow_counter *
11665 flow_dv_prepare_counter(struct rte_eth_dev *dev,
11666                         struct mlx5_flow *dev_flow,
11667                         struct rte_flow *flow,
11668                         const struct rte_flow_action_count *count,
11669                         const struct rte_flow_action_age *age,
11670                         struct rte_flow_error *error)
11671 {
11672         if (!flow->counter) {
11673                 flow->counter = flow_dv_translate_create_counter(dev, dev_flow,
11674                                                                  count, age);
11675                 if (!flow->counter) {
11676                         rte_flow_error_set(error, rte_errno,
11677                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
11678                                            "cannot create counter object.");
11679                         return NULL;
11680                 }
11681         }
11682         return flow_dv_counter_get_by_idx(dev, flow->counter, NULL);
11683 }
11684
11685 /*
11686  * Release an ASO CT action.
11687  *
11688  * @param[in] dev
11689  *   Pointer to the Ethernet device structure.
11690  * @param[in] idx
11691  *   Index of ASO CT action to release.
11692  *
11693  * @return
11694  *   0 when CT action was removed, otherwise the number of references.
11695  */
11696 static inline int
11697 flow_dv_aso_ct_release(struct rte_eth_dev *dev, uint32_t idx)
11698 {
11699         struct mlx5_priv *priv = dev->data->dev_private;
11700         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
11701         uint32_t ret;
11702         struct mlx5_aso_ct_action *ct = flow_aso_ct_get_by_idx(dev, idx);
11703         enum mlx5_aso_ct_state state =
11704                         __atomic_load_n(&ct->state, __ATOMIC_RELAXED);
11705
11706         /* Cannot release when CT is in the ASO SQ. */
11707         if (state == ASO_CONNTRACK_WAIT || state == ASO_CONNTRACK_QUERY)
11708                 return -1;
11709         ret = __atomic_sub_fetch(&ct->refcnt, 1, __ATOMIC_RELAXED);
11710         if (!ret) {
11711                 if (ct->dr_action_orig) {
11712 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
11713                         claim_zero(mlx5_glue->destroy_flow_action
11714                                         (ct->dr_action_orig));
11715 #endif
11716                         ct->dr_action_orig = NULL;
11717                 }
11718                 if (ct->dr_action_rply) {
11719 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
11720                         claim_zero(mlx5_glue->destroy_flow_action
11721                                         (ct->dr_action_rply));
11722 #endif
11723                         ct->dr_action_rply = NULL;
11724                 }
11725                 /* Clear the state to free, no need in 1st allocation. */
11726                 MLX5_ASO_CT_UPDATE_STATE(ct, ASO_CONNTRACK_FREE);
11727                 rte_spinlock_lock(&mng->ct_sl);
11728                 LIST_INSERT_HEAD(&mng->free_cts, ct, next);
11729                 rte_spinlock_unlock(&mng->ct_sl);
11730         }
11731         return ret;
11732 }
11733
11734 /*
11735  * Resize the ASO CT pools array by 64 pools.
11736  *
11737  * @param[in] dev
11738  *   Pointer to the Ethernet device structure.
11739  *
11740  * @return
11741  *   0 on success, otherwise negative errno value and rte_errno is set.
11742  */
11743 static int
11744 flow_dv_aso_ct_pools_resize(struct rte_eth_dev *dev)
11745 {
11746         struct mlx5_priv *priv = dev->data->dev_private;
11747         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
11748         void *old_pools = mng->pools;
11749         /* Magic number now, need a macro. */
11750         uint32_t resize = mng->n + 64;
11751         uint32_t mem_size = sizeof(struct mlx5_aso_ct_pool *) * resize;
11752         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
11753
11754         if (!pools) {
11755                 rte_errno = ENOMEM;
11756                 return -rte_errno;
11757         }
11758         rte_rwlock_write_lock(&mng->resize_rwl);
11759         /* ASO SQ/QP was already initialized in the startup. */
11760         if (old_pools) {
11761                 /* Realloc could be an alternative choice. */
11762                 rte_memcpy(pools, old_pools,
11763                            mng->n * sizeof(struct mlx5_aso_ct_pool *));
11764                 mlx5_free(old_pools);
11765         }
11766         mng->n = resize;
11767         mng->pools = pools;
11768         rte_rwlock_write_unlock(&mng->resize_rwl);
11769         return 0;
11770 }
11771
11772 /*
11773  * Create and initialize a new ASO CT pool.
11774  *
11775  * @param[in] dev
11776  *   Pointer to the Ethernet device structure.
11777  * @param[out] ct_free
11778  *   Where to put the pointer of a new CT action.
11779  *
11780  * @return
11781  *   The CT actions pool pointer and @p ct_free is set on success,
11782  *   NULL otherwise and rte_errno is set.
11783  */
11784 static struct mlx5_aso_ct_pool *
11785 flow_dv_ct_pool_create(struct rte_eth_dev *dev,
11786                        struct mlx5_aso_ct_action **ct_free)
11787 {
11788         struct mlx5_priv *priv = dev->data->dev_private;
11789         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
11790         struct mlx5_aso_ct_pool *pool = NULL;
11791         struct mlx5_devx_obj *obj = NULL;
11792         uint32_t i;
11793         uint32_t log_obj_size = rte_log2_u32(MLX5_ASO_CT_ACTIONS_PER_POOL);
11794
11795         obj = mlx5_devx_cmd_create_conn_track_offload_obj(priv->sh->ctx,
11796                                                 priv->sh->pdn, log_obj_size);
11797         if (!obj) {
11798                 rte_errno = ENODATA;
11799                 DRV_LOG(ERR, "Failed to create conn_track_offload_obj using DevX.");
11800                 return NULL;
11801         }
11802         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
11803         if (!pool) {
11804                 rte_errno = ENOMEM;
11805                 claim_zero(mlx5_devx_cmd_destroy(obj));
11806                 return NULL;
11807         }
11808         pool->devx_obj = obj;
11809         pool->index = mng->next;
11810         /* Resize pools array if there is no room for the new pool in it. */
11811         if (pool->index == mng->n && flow_dv_aso_ct_pools_resize(dev)) {
11812                 claim_zero(mlx5_devx_cmd_destroy(obj));
11813                 mlx5_free(pool);
11814                 return NULL;
11815         }
11816         mng->pools[pool->index] = pool;
11817         mng->next++;
11818         /* Assign the first action in the new pool, the rest go to free list. */
11819         *ct_free = &pool->actions[0];
11820         /* Lock outside, the list operation is safe here. */
11821         for (i = 1; i < MLX5_ASO_CT_ACTIONS_PER_POOL; i++) {
11822                 /* refcnt is 0 when allocating the memory. */
11823                 pool->actions[i].offset = i;
11824                 LIST_INSERT_HEAD(&mng->free_cts, &pool->actions[i], next);
11825         }
11826         return pool;
11827 }
11828
11829 /*
11830  * Allocate a ASO CT action from free list.
11831  *
11832  * @param[in] dev
11833  *   Pointer to the Ethernet device structure.
11834  * @param[out] error
11835  *   Pointer to the error structure.
11836  *
11837  * @return
11838  *   Index to ASO CT action on success, 0 otherwise and rte_errno is set.
11839  */
11840 static uint32_t
11841 flow_dv_aso_ct_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
11842 {
11843         struct mlx5_priv *priv = dev->data->dev_private;
11844         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
11845         struct mlx5_aso_ct_action *ct = NULL;
11846         struct mlx5_aso_ct_pool *pool;
11847         uint8_t reg_c;
11848         uint32_t ct_idx;
11849
11850         MLX5_ASSERT(mng);
11851         if (!priv->config.devx) {
11852                 rte_errno = ENOTSUP;
11853                 return 0;
11854         }
11855         /* Get a free CT action, if no, a new pool will be created. */
11856         rte_spinlock_lock(&mng->ct_sl);
11857         ct = LIST_FIRST(&mng->free_cts);
11858         if (ct) {
11859                 LIST_REMOVE(ct, next);
11860         } else if (!flow_dv_ct_pool_create(dev, &ct)) {
11861                 rte_spinlock_unlock(&mng->ct_sl);
11862                 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
11863                                    NULL, "failed to create ASO CT pool");
11864                 return 0;
11865         }
11866         rte_spinlock_unlock(&mng->ct_sl);
11867         pool = container_of(ct, struct mlx5_aso_ct_pool, actions[ct->offset]);
11868         ct_idx = MLX5_MAKE_CT_IDX(pool->index, ct->offset);
11869         /* 0: inactive, 1: created, 2+: used by flows. */
11870         __atomic_store_n(&ct->refcnt, 1, __ATOMIC_RELAXED);
11871         reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, error);
11872         if (!ct->dr_action_orig) {
11873 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
11874                 ct->dr_action_orig = mlx5_glue->dv_create_flow_action_aso
11875                         (priv->sh->rx_domain, pool->devx_obj->obj,
11876                          ct->offset,
11877                          MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_INITIATOR,
11878                          reg_c - REG_C_0);
11879 #else
11880                 RTE_SET_USED(reg_c);
11881 #endif
11882                 if (!ct->dr_action_orig) {
11883                         flow_dv_aso_ct_release(dev, ct_idx);
11884                         rte_flow_error_set(error, rte_errno,
11885                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
11886                                            "failed to create ASO CT action");
11887                         return 0;
11888                 }
11889         }
11890         if (!ct->dr_action_rply) {
11891 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
11892                 ct->dr_action_rply = mlx5_glue->dv_create_flow_action_aso
11893                         (priv->sh->rx_domain, pool->devx_obj->obj,
11894                          ct->offset,
11895                          MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_RESPONDER,
11896                          reg_c - REG_C_0);
11897 #endif
11898                 if (!ct->dr_action_rply) {
11899                         flow_dv_aso_ct_release(dev, ct_idx);
11900                         rte_flow_error_set(error, rte_errno,
11901                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
11902                                            "failed to create ASO CT action");
11903                         return 0;
11904                 }
11905         }
11906         return ct_idx;
11907 }
11908
11909 /*
11910  * Create a conntrack object with context and actions by using ASO mechanism.
11911  *
11912  * @param[in] dev
11913  *   Pointer to rte_eth_dev structure.
11914  * @param[in] pro
11915  *   Pointer to conntrack information profile.
11916  * @param[out] error
11917  *   Pointer to the error structure.
11918  *
11919  * @return
11920  *   Index to conntrack object on success, 0 otherwise.
11921  */
11922 static uint32_t
11923 flow_dv_translate_create_conntrack(struct rte_eth_dev *dev,
11924                                    const struct rte_flow_action_conntrack *pro,
11925                                    struct rte_flow_error *error)
11926 {
11927         struct mlx5_priv *priv = dev->data->dev_private;
11928         struct mlx5_dev_ctx_shared *sh = priv->sh;
11929         struct mlx5_aso_ct_action *ct;
11930         uint32_t idx;
11931
11932         if (!sh->ct_aso_en)
11933                 return rte_flow_error_set(error, ENOTSUP,
11934                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
11935                                           "Connection is not supported");
11936         idx = flow_dv_aso_ct_alloc(dev, error);
11937         if (!idx)
11938                 return rte_flow_error_set(error, rte_errno,
11939                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
11940                                           "Failed to allocate CT object");
11941         ct = flow_aso_ct_get_by_idx(dev, idx);
11942         if (mlx5_aso_ct_update_by_wqe(sh, ct, pro))
11943                 return rte_flow_error_set(error, EBUSY,
11944                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
11945                                           "Failed to update CT");
11946         ct->is_original = !!pro->is_original_dir;
11947         return idx;
11948 }
11949
11950 /**
11951  * Fill the flow with DV spec, lock free
11952  * (mutex should be acquired by caller).
11953  *
11954  * @param[in] dev
11955  *   Pointer to rte_eth_dev structure.
11956  * @param[in, out] dev_flow
11957  *   Pointer to the sub flow.
11958  * @param[in] attr
11959  *   Pointer to the flow attributes.
11960  * @param[in] items
11961  *   Pointer to the list of items.
11962  * @param[in] actions
11963  *   Pointer to the list of actions.
11964  * @param[out] error
11965  *   Pointer to the error structure.
11966  *
11967  * @return
11968  *   0 on success, a negative errno value otherwise and rte_errno is set.
11969  */
11970 static int
11971 flow_dv_translate(struct rte_eth_dev *dev,
11972                   struct mlx5_flow *dev_flow,
11973                   const struct rte_flow_attr *attr,
11974                   const struct rte_flow_item items[],
11975                   const struct rte_flow_action actions[],
11976                   struct rte_flow_error *error)
11977 {
11978         struct mlx5_priv *priv = dev->data->dev_private;
11979         struct mlx5_dev_config *dev_conf = &priv->config;
11980         struct rte_flow *flow = dev_flow->flow;
11981         struct mlx5_flow_handle *handle = dev_flow->handle;
11982         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11983         struct mlx5_flow_rss_desc *rss_desc;
11984         uint64_t item_flags = 0;
11985         uint64_t last_item = 0;
11986         uint64_t action_flags = 0;
11987         struct mlx5_flow_dv_matcher matcher = {
11988                 .mask = {
11989                         .size = sizeof(matcher.mask.buf) -
11990                                 MLX5_ST_SZ_BYTES(fte_match_set_misc4),
11991                 },
11992         };
11993         int actions_n = 0;
11994         bool actions_end = false;
11995         union {
11996                 struct mlx5_flow_dv_modify_hdr_resource res;
11997                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
11998                             sizeof(struct mlx5_modification_cmd) *
11999                             (MLX5_MAX_MODIFY_NUM + 1)];
12000         } mhdr_dummy;
12001         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
12002         const struct rte_flow_action_count *count = NULL;
12003         const struct rte_flow_action_age *non_shared_age = NULL;
12004         union flow_dv_attr flow_attr = { .attr = 0 };
12005         uint32_t tag_be;
12006         union mlx5_flow_tbl_key tbl_key;
12007         uint32_t modify_action_position = UINT32_MAX;
12008         void *match_mask = matcher.mask.buf;
12009         void *match_value = dev_flow->dv.value.buf;
12010         uint8_t next_protocol = 0xff;
12011         struct rte_vlan_hdr vlan = { 0 };
12012         struct mlx5_flow_dv_dest_array_resource mdest_res;
12013         struct mlx5_flow_dv_sample_resource sample_res;
12014         void *sample_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
12015         const struct rte_flow_action_sample *sample = NULL;
12016         struct mlx5_flow_sub_actions_list *sample_act;
12017         uint32_t sample_act_pos = UINT32_MAX;
12018         uint32_t age_act_pos = UINT32_MAX;
12019         uint32_t num_of_dest = 0;
12020         int tmp_actions_n = 0;
12021         uint32_t table;
12022         int ret = 0;
12023         const struct mlx5_flow_tunnel *tunnel;
12024         struct flow_grp_info grp_info = {
12025                 .external = !!dev_flow->external,
12026                 .transfer = !!attr->transfer,
12027                 .fdb_def_rule = !!priv->fdb_def_rule,
12028                 .skip_scale = dev_flow->skip_scale &
12029                         (1 << MLX5_SCALE_FLOW_GROUP_BIT),
12030         };
12031         const struct rte_flow_item *head_item = items;
12032
12033         if (!wks)
12034                 return rte_flow_error_set(error, ENOMEM,
12035                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12036                                           NULL,
12037                                           "failed to push flow workspace");
12038         rss_desc = &wks->rss_desc;
12039         memset(&mdest_res, 0, sizeof(struct mlx5_flow_dv_dest_array_resource));
12040         memset(&sample_res, 0, sizeof(struct mlx5_flow_dv_sample_resource));
12041         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12042                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12043         /* update normal path action resource into last index of array */
12044         sample_act = &mdest_res.sample_act[MLX5_MAX_DEST_NUM - 1];
12045         tunnel = is_flow_tunnel_match_rule(dev, attr, items, actions) ?
12046                  flow_items_to_tunnel(items) :
12047                  is_flow_tunnel_steer_rule(dev, attr, items, actions) ?
12048                  flow_actions_to_tunnel(actions) :
12049                  dev_flow->tunnel ? dev_flow->tunnel : NULL;
12050         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12051                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12052         grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
12053                                 (dev, tunnel, attr, items, actions);
12054         ret = mlx5_flow_group_to_table(dev, tunnel, attr->group, &table,
12055                                        &grp_info, error);
12056         if (ret)
12057                 return ret;
12058         dev_flow->dv.group = table;
12059         if (attr->transfer)
12060                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
12061         /* number of actions must be set to 0 in case of dirty stack. */
12062         mhdr_res->actions_num = 0;
12063         if (is_flow_tunnel_match_rule(dev, attr, items, actions)) {
12064                 /*
12065                  * do not add decap action if match rule drops packet
12066                  * HW rejects rules with decap & drop
12067                  *
12068                  * if tunnel match rule was inserted before matching tunnel set
12069                  * rule flow table used in the match rule must be registered.
12070                  * current implementation handles that in the
12071                  * flow_dv_match_register() at the function end.
12072                  */
12073                 bool add_decap = true;
12074                 const struct rte_flow_action *ptr = actions;
12075
12076                 for (; ptr->type != RTE_FLOW_ACTION_TYPE_END; ptr++) {
12077                         if (ptr->type == RTE_FLOW_ACTION_TYPE_DROP) {
12078                                 add_decap = false;
12079                                 break;
12080                         }
12081                 }
12082                 if (add_decap) {
12083                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
12084                                                            attr->transfer,
12085                                                            error))
12086                                 return -rte_errno;
12087                         dev_flow->dv.actions[actions_n++] =
12088                                         dev_flow->dv.encap_decap->action;
12089                         action_flags |= MLX5_FLOW_ACTION_DECAP;
12090                 }
12091         }
12092         for (; !actions_end ; actions++) {
12093                 const struct rte_flow_action_queue *queue;
12094                 const struct rte_flow_action_rss *rss;
12095                 const struct rte_flow_action *action = actions;
12096                 const uint8_t *rss_key;
12097                 struct mlx5_flow_tbl_resource *tbl;
12098                 struct mlx5_aso_age_action *age_act;
12099                 struct mlx5_flow_counter *cnt_act;
12100                 uint32_t port_id = 0;
12101                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
12102                 int action_type = actions->type;
12103                 const struct rte_flow_action *found_action = NULL;
12104                 uint32_t jump_group = 0;
12105                 uint32_t ct_idx;
12106                 struct mlx5_aso_ct_action *ct;
12107
12108                 if (!mlx5_flow_os_action_supported(action_type))
12109                         return rte_flow_error_set(error, ENOTSUP,
12110                                                   RTE_FLOW_ERROR_TYPE_ACTION,
12111                                                   actions,
12112                                                   "action not supported");
12113                 switch (action_type) {
12114                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
12115                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
12116                         break;
12117                 case RTE_FLOW_ACTION_TYPE_VOID:
12118                         break;
12119                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
12120                         if (flow_dv_translate_action_port_id(dev, action,
12121                                                              &port_id, error))
12122                                 return -rte_errno;
12123                         port_id_resource.port_id = port_id;
12124                         MLX5_ASSERT(!handle->rix_port_id_action);
12125                         if (flow_dv_port_id_action_resource_register
12126                             (dev, &port_id_resource, dev_flow, error))
12127                                 return -rte_errno;
12128                         dev_flow->dv.actions[actions_n++] =
12129                                         dev_flow->dv.port_id_action->action;
12130                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12131                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_PORT_ID;
12132                         sample_act->action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12133                         num_of_dest++;
12134                         break;
12135                 case RTE_FLOW_ACTION_TYPE_FLAG:
12136                         action_flags |= MLX5_FLOW_ACTION_FLAG;
12137                         dev_flow->handle->mark = 1;
12138                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12139                                 struct rte_flow_action_mark mark = {
12140                                         .id = MLX5_FLOW_MARK_DEFAULT,
12141                                 };
12142
12143                                 if (flow_dv_convert_action_mark(dev, &mark,
12144                                                                 mhdr_res,
12145                                                                 error))
12146                                         return -rte_errno;
12147                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12148                                 break;
12149                         }
12150                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
12151                         /*
12152                          * Only one FLAG or MARK is supported per device flow
12153                          * right now. So the pointer to the tag resource must be
12154                          * zero before the register process.
12155                          */
12156                         MLX5_ASSERT(!handle->dvh.rix_tag);
12157                         if (flow_dv_tag_resource_register(dev, tag_be,
12158                                                           dev_flow, error))
12159                                 return -rte_errno;
12160                         MLX5_ASSERT(dev_flow->dv.tag_resource);
12161                         dev_flow->dv.actions[actions_n++] =
12162                                         dev_flow->dv.tag_resource->action;
12163                         break;
12164                 case RTE_FLOW_ACTION_TYPE_MARK:
12165                         action_flags |= MLX5_FLOW_ACTION_MARK;
12166                         dev_flow->handle->mark = 1;
12167                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12168                                 const struct rte_flow_action_mark *mark =
12169                                         (const struct rte_flow_action_mark *)
12170                                                 actions->conf;
12171
12172                                 if (flow_dv_convert_action_mark(dev, mark,
12173                                                                 mhdr_res,
12174                                                                 error))
12175                                         return -rte_errno;
12176                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12177                                 break;
12178                         }
12179                         /* Fall-through */
12180                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
12181                         /* Legacy (non-extensive) MARK action. */
12182                         tag_be = mlx5_flow_mark_set
12183                               (((const struct rte_flow_action_mark *)
12184                                (actions->conf))->id);
12185                         MLX5_ASSERT(!handle->dvh.rix_tag);
12186                         if (flow_dv_tag_resource_register(dev, tag_be,
12187                                                           dev_flow, error))
12188                                 return -rte_errno;
12189                         MLX5_ASSERT(dev_flow->dv.tag_resource);
12190                         dev_flow->dv.actions[actions_n++] =
12191                                         dev_flow->dv.tag_resource->action;
12192                         break;
12193                 case RTE_FLOW_ACTION_TYPE_SET_META:
12194                         if (flow_dv_convert_action_set_meta
12195                                 (dev, mhdr_res, attr,
12196                                  (const struct rte_flow_action_set_meta *)
12197                                   actions->conf, error))
12198                                 return -rte_errno;
12199                         action_flags |= MLX5_FLOW_ACTION_SET_META;
12200                         break;
12201                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
12202                         if (flow_dv_convert_action_set_tag
12203                                 (dev, mhdr_res,
12204                                  (const struct rte_flow_action_set_tag *)
12205                                   actions->conf, error))
12206                                 return -rte_errno;
12207                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
12208                         break;
12209                 case RTE_FLOW_ACTION_TYPE_DROP:
12210                         action_flags |= MLX5_FLOW_ACTION_DROP;
12211                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_DROP;
12212                         break;
12213                 case RTE_FLOW_ACTION_TYPE_QUEUE:
12214                         queue = actions->conf;
12215                         rss_desc->queue_num = 1;
12216                         rss_desc->queue[0] = queue->index;
12217                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
12218                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
12219                         sample_act->action_flags |= MLX5_FLOW_ACTION_QUEUE;
12220                         num_of_dest++;
12221                         break;
12222                 case RTE_FLOW_ACTION_TYPE_RSS:
12223                         rss = actions->conf;
12224                         memcpy(rss_desc->queue, rss->queue,
12225                                rss->queue_num * sizeof(uint16_t));
12226                         rss_desc->queue_num = rss->queue_num;
12227                         /* NULL RSS key indicates default RSS key. */
12228                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
12229                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
12230                         /*
12231                          * rss->level and rss.types should be set in advance
12232                          * when expanding items for RSS.
12233                          */
12234                         action_flags |= MLX5_FLOW_ACTION_RSS;
12235                         dev_flow->handle->fate_action = rss_desc->shared_rss ?
12236                                 MLX5_FLOW_FATE_SHARED_RSS :
12237                                 MLX5_FLOW_FATE_QUEUE;
12238                         break;
12239                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
12240                         flow->age = (uint32_t)(uintptr_t)(action->conf);
12241                         age_act = flow_aso_age_get_by_idx(dev, flow->age);
12242                         __atomic_fetch_add(&age_act->refcnt, 1,
12243                                            __ATOMIC_RELAXED);
12244                         age_act_pos = actions_n++;
12245                         action_flags |= MLX5_FLOW_ACTION_AGE;
12246                         break;
12247                 case RTE_FLOW_ACTION_TYPE_AGE:
12248                         non_shared_age = action->conf;
12249                         age_act_pos = actions_n++;
12250                         action_flags |= MLX5_FLOW_ACTION_AGE;
12251                         break;
12252                 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
12253                         flow->counter = (uint32_t)(uintptr_t)(action->conf);
12254                         cnt_act = flow_dv_counter_get_by_idx(dev, flow->counter,
12255                                                              NULL);
12256                         __atomic_fetch_add(&cnt_act->shared_info.refcnt, 1,
12257                                            __ATOMIC_RELAXED);
12258                         /* Save information first, will apply later. */
12259                         action_flags |= MLX5_FLOW_ACTION_COUNT;
12260                         break;
12261                 case RTE_FLOW_ACTION_TYPE_COUNT:
12262                         if (!dev_conf->devx) {
12263                                 return rte_flow_error_set
12264                                               (error, ENOTSUP,
12265                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12266                                                NULL,
12267                                                "count action not supported");
12268                         }
12269                         /* Save information first, will apply later. */
12270                         count = action->conf;
12271                         action_flags |= MLX5_FLOW_ACTION_COUNT;
12272                         break;
12273                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
12274                         dev_flow->dv.actions[actions_n++] =
12275                                                 priv->sh->pop_vlan_action;
12276                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
12277                         break;
12278                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
12279                         if (!(action_flags &
12280                               MLX5_FLOW_ACTION_OF_SET_VLAN_VID))
12281                                 flow_dev_get_vlan_info_from_items(items, &vlan);
12282                         vlan.eth_proto = rte_be_to_cpu_16
12283                              ((((const struct rte_flow_action_of_push_vlan *)
12284                                                    actions->conf)->ethertype));
12285                         found_action = mlx5_flow_find_action
12286                                         (actions + 1,
12287                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
12288                         if (found_action)
12289                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12290                         found_action = mlx5_flow_find_action
12291                                         (actions + 1,
12292                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
12293                         if (found_action)
12294                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12295                         if (flow_dv_create_action_push_vlan
12296                                             (dev, attr, &vlan, dev_flow, error))
12297                                 return -rte_errno;
12298                         dev_flow->dv.actions[actions_n++] =
12299                                         dev_flow->dv.push_vlan_res->action;
12300                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
12301                         break;
12302                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
12303                         /* of_vlan_push action handled this action */
12304                         MLX5_ASSERT(action_flags &
12305                                     MLX5_FLOW_ACTION_OF_PUSH_VLAN);
12306                         break;
12307                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
12308                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
12309                                 break;
12310                         flow_dev_get_vlan_info_from_items(items, &vlan);
12311                         mlx5_update_vlan_vid_pcp(actions, &vlan);
12312                         /* If no VLAN push - this is a modify header action */
12313                         if (flow_dv_convert_action_modify_vlan_vid
12314                                                 (mhdr_res, actions, error))
12315                                 return -rte_errno;
12316                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
12317                         break;
12318                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
12319                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
12320                         if (flow_dv_create_action_l2_encap(dev, actions,
12321                                                            dev_flow,
12322                                                            attr->transfer,
12323                                                            error))
12324                                 return -rte_errno;
12325                         dev_flow->dv.actions[actions_n++] =
12326                                         dev_flow->dv.encap_decap->action;
12327                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
12328                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12329                                 sample_act->action_flags |=
12330                                                         MLX5_FLOW_ACTION_ENCAP;
12331                         break;
12332                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
12333                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
12334                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
12335                                                            attr->transfer,
12336                                                            error))
12337                                 return -rte_errno;
12338                         dev_flow->dv.actions[actions_n++] =
12339                                         dev_flow->dv.encap_decap->action;
12340                         action_flags |= MLX5_FLOW_ACTION_DECAP;
12341                         break;
12342                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
12343                         /* Handle encap with preceding decap. */
12344                         if (action_flags & MLX5_FLOW_ACTION_DECAP) {
12345                                 if (flow_dv_create_action_raw_encap
12346                                         (dev, actions, dev_flow, attr, error))
12347                                         return -rte_errno;
12348                                 dev_flow->dv.actions[actions_n++] =
12349                                         dev_flow->dv.encap_decap->action;
12350                         } else {
12351                                 /* Handle encap without preceding decap. */
12352                                 if (flow_dv_create_action_l2_encap
12353                                     (dev, actions, dev_flow, attr->transfer,
12354                                      error))
12355                                         return -rte_errno;
12356                                 dev_flow->dv.actions[actions_n++] =
12357                                         dev_flow->dv.encap_decap->action;
12358                         }
12359                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
12360                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12361                                 sample_act->action_flags |=
12362                                                         MLX5_FLOW_ACTION_ENCAP;
12363                         break;
12364                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
12365                         while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
12366                                 ;
12367                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
12368                                 if (flow_dv_create_action_l2_decap
12369                                     (dev, dev_flow, attr->transfer, error))
12370                                         return -rte_errno;
12371                                 dev_flow->dv.actions[actions_n++] =
12372                                         dev_flow->dv.encap_decap->action;
12373                         }
12374                         /* If decap is followed by encap, handle it at encap. */
12375                         action_flags |= MLX5_FLOW_ACTION_DECAP;
12376                         break;
12377                 case MLX5_RTE_FLOW_ACTION_TYPE_JUMP:
12378                         dev_flow->dv.actions[actions_n++] =
12379                                 (void *)(uintptr_t)action->conf;
12380                         action_flags |= MLX5_FLOW_ACTION_JUMP;
12381                         break;
12382                 case RTE_FLOW_ACTION_TYPE_JUMP:
12383                         jump_group = ((const struct rte_flow_action_jump *)
12384                                                         action->conf)->group;
12385                         grp_info.std_tbl_fix = 0;
12386                         if (dev_flow->skip_scale &
12387                                 (1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT))
12388                                 grp_info.skip_scale = 1;
12389                         else
12390                                 grp_info.skip_scale = 0;
12391                         ret = mlx5_flow_group_to_table(dev, tunnel,
12392                                                        jump_group,
12393                                                        &table,
12394                                                        &grp_info, error);
12395                         if (ret)
12396                                 return ret;
12397                         tbl = flow_dv_tbl_resource_get(dev, table, attr->egress,
12398                                                        attr->transfer,
12399                                                        !!dev_flow->external,
12400                                                        tunnel, jump_group, 0,
12401                                                        0, error);
12402                         if (!tbl)
12403                                 return rte_flow_error_set
12404                                                 (error, errno,
12405                                                  RTE_FLOW_ERROR_TYPE_ACTION,
12406                                                  NULL,
12407                                                  "cannot create jump action.");
12408                         if (flow_dv_jump_tbl_resource_register
12409                             (dev, tbl, dev_flow, error)) {
12410                                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
12411                                 return rte_flow_error_set
12412                                                 (error, errno,
12413                                                  RTE_FLOW_ERROR_TYPE_ACTION,
12414                                                  NULL,
12415                                                  "cannot create jump action.");
12416                         }
12417                         dev_flow->dv.actions[actions_n++] =
12418                                         dev_flow->dv.jump->action;
12419                         action_flags |= MLX5_FLOW_ACTION_JUMP;
12420                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_JUMP;
12421                         sample_act->action_flags |= MLX5_FLOW_ACTION_JUMP;
12422                         num_of_dest++;
12423                         break;
12424                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
12425                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
12426                         if (flow_dv_convert_action_modify_mac
12427                                         (mhdr_res, actions, error))
12428                                 return -rte_errno;
12429                         action_flags |= actions->type ==
12430                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
12431                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
12432                                         MLX5_FLOW_ACTION_SET_MAC_DST;
12433                         break;
12434                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
12435                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
12436                         if (flow_dv_convert_action_modify_ipv4
12437                                         (mhdr_res, actions, error))
12438                                 return -rte_errno;
12439                         action_flags |= actions->type ==
12440                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
12441                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
12442                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
12443                         break;
12444                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
12445                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
12446                         if (flow_dv_convert_action_modify_ipv6
12447                                         (mhdr_res, actions, error))
12448                                 return -rte_errno;
12449                         action_flags |= actions->type ==
12450                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
12451                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
12452                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
12453                         break;
12454                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
12455                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
12456                         if (flow_dv_convert_action_modify_tp
12457                                         (mhdr_res, actions, items,
12458                                          &flow_attr, dev_flow, !!(action_flags &
12459                                          MLX5_FLOW_ACTION_DECAP), error))
12460                                 return -rte_errno;
12461                         action_flags |= actions->type ==
12462                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
12463                                         MLX5_FLOW_ACTION_SET_TP_SRC :
12464                                         MLX5_FLOW_ACTION_SET_TP_DST;
12465                         break;
12466                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
12467                         if (flow_dv_convert_action_modify_dec_ttl
12468                                         (mhdr_res, items, &flow_attr, dev_flow,
12469                                          !!(action_flags &
12470                                          MLX5_FLOW_ACTION_DECAP), error))
12471                                 return -rte_errno;
12472                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
12473                         break;
12474                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
12475                         if (flow_dv_convert_action_modify_ttl
12476                                         (mhdr_res, actions, items, &flow_attr,
12477                                          dev_flow, !!(action_flags &
12478                                          MLX5_FLOW_ACTION_DECAP), error))
12479                                 return -rte_errno;
12480                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
12481                         break;
12482                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
12483                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
12484                         if (flow_dv_convert_action_modify_tcp_seq
12485                                         (mhdr_res, actions, error))
12486                                 return -rte_errno;
12487                         action_flags |= actions->type ==
12488                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
12489                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
12490                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
12491                         break;
12492
12493                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
12494                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
12495                         if (flow_dv_convert_action_modify_tcp_ack
12496                                         (mhdr_res, actions, error))
12497                                 return -rte_errno;
12498                         action_flags |= actions->type ==
12499                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
12500                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
12501                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
12502                         break;
12503                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
12504                         if (flow_dv_convert_action_set_reg
12505                                         (mhdr_res, actions, error))
12506                                 return -rte_errno;
12507                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
12508                         break;
12509                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
12510                         if (flow_dv_convert_action_copy_mreg
12511                                         (dev, mhdr_res, actions, error))
12512                                 return -rte_errno;
12513                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
12514                         break;
12515                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
12516                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
12517                         dev_flow->handle->fate_action =
12518                                         MLX5_FLOW_FATE_DEFAULT_MISS;
12519                         break;
12520                 case RTE_FLOW_ACTION_TYPE_METER:
12521                         if (!wks->fm)
12522                                 return rte_flow_error_set(error, rte_errno,
12523                                         RTE_FLOW_ERROR_TYPE_ACTION,
12524                                         NULL, "Failed to get meter in flow.");
12525                         /* Set the meter action. */
12526                         dev_flow->dv.actions[actions_n++] =
12527                                 wks->fm->meter_action;
12528                         action_flags |= MLX5_FLOW_ACTION_METER;
12529                         break;
12530                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
12531                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
12532                                                               actions, error))
12533                                 return -rte_errno;
12534                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
12535                         break;
12536                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
12537                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
12538                                                               actions, error))
12539                                 return -rte_errno;
12540                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
12541                         break;
12542                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
12543                         sample_act_pos = actions_n;
12544                         sample = (const struct rte_flow_action_sample *)
12545                                  action->conf;
12546                         actions_n++;
12547                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
12548                         /* put encap action into group if work with port id */
12549                         if ((action_flags & MLX5_FLOW_ACTION_ENCAP) &&
12550                             (action_flags & MLX5_FLOW_ACTION_PORT_ID))
12551                                 sample_act->action_flags |=
12552                                                         MLX5_FLOW_ACTION_ENCAP;
12553                         break;
12554                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
12555                         if (flow_dv_convert_action_modify_field
12556                                         (dev, mhdr_res, actions, attr, error))
12557                                 return -rte_errno;
12558                         action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
12559                         break;
12560                 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
12561                         ct_idx = (uint32_t)(uintptr_t)action->conf;
12562                         ct = flow_aso_ct_get_by_idx(dev, ct_idx);
12563                         if (mlx5_aso_ct_available(priv->sh, ct))
12564                                 return rte_flow_error_set(error, rte_errno,
12565                                                 RTE_FLOW_ERROR_TYPE_ACTION,
12566                                                 NULL,
12567                                                 "CT is unavailable.");
12568                         if (ct->is_original)
12569                                 dev_flow->dv.actions[actions_n] =
12570                                                         ct->dr_action_orig;
12571                         else
12572                                 dev_flow->dv.actions[actions_n] =
12573                                                         ct->dr_action_rply;
12574                         flow->indirect_type = MLX5_INDIRECT_ACTION_TYPE_CT;
12575                         flow->ct = ct_idx;
12576                         __atomic_fetch_add(&ct->refcnt, 1, __ATOMIC_RELAXED);
12577                         actions_n++;
12578                         action_flags |= MLX5_FLOW_ACTION_CT;
12579                         break;
12580                 case RTE_FLOW_ACTION_TYPE_END:
12581                         actions_end = true;
12582                         if (mhdr_res->actions_num) {
12583                                 /* create modify action if needed. */
12584                                 if (flow_dv_modify_hdr_resource_register
12585                                         (dev, mhdr_res, dev_flow, error))
12586                                         return -rte_errno;
12587                                 dev_flow->dv.actions[modify_action_position] =
12588                                         handle->dvh.modify_hdr->action;
12589                         }
12590                         /*
12591                          * Handle AGE and COUNT action by single HW counter
12592                          * when they are not shared.
12593                          */
12594                         if (action_flags & MLX5_FLOW_ACTION_AGE) {
12595                                 if ((non_shared_age &&
12596                                      count && !count->shared) ||
12597                                     !(priv->sh->flow_hit_aso_en &&
12598                                       attr->group)) {
12599                                         /* Creates age by counters. */
12600                                         cnt_act = flow_dv_prepare_counter
12601                                                                 (dev, dev_flow,
12602                                                                  flow, count,
12603                                                                  non_shared_age,
12604                                                                  error);
12605                                         if (!cnt_act)
12606                                                 return -rte_errno;
12607                                         dev_flow->dv.actions[age_act_pos] =
12608                                                                 cnt_act->action;
12609                                         break;
12610                                 }
12611                                 if (!flow->age && non_shared_age) {
12612                                         flow->age =
12613                                                 flow_dv_translate_create_aso_age
12614                                                                 (dev,
12615                                                                  non_shared_age,
12616                                                                  error);
12617                                         if (!flow->age)
12618                                                 return rte_flow_error_set
12619                                                     (error, rte_errno,
12620                                                      RTE_FLOW_ERROR_TYPE_ACTION,
12621                                                      NULL,
12622                                                      "can't create ASO age action");
12623                                 }
12624                                 age_act = flow_aso_age_get_by_idx(dev,
12625                                                                   flow->age);
12626                                 dev_flow->dv.actions[age_act_pos] =
12627                                                              age_act->dr_action;
12628                         }
12629                         if (action_flags & MLX5_FLOW_ACTION_COUNT) {
12630                                 /*
12631                                  * Create one count action, to be used
12632                                  * by all sub-flows.
12633                                  */
12634                                 cnt_act = flow_dv_prepare_counter(dev, dev_flow,
12635                                                                   flow, count,
12636                                                                   NULL, error);
12637                                 if (!cnt_act)
12638                                         return -rte_errno;
12639                                 dev_flow->dv.actions[actions_n++] =
12640                                                                 cnt_act->action;
12641                         }
12642                 default:
12643                         break;
12644                 }
12645                 if (mhdr_res->actions_num &&
12646                     modify_action_position == UINT32_MAX)
12647                         modify_action_position = actions_n++;
12648         }
12649         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
12650                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
12651                 int item_type = items->type;
12652
12653                 if (!mlx5_flow_os_item_supported(item_type))
12654                         return rte_flow_error_set(error, ENOTSUP,
12655                                                   RTE_FLOW_ERROR_TYPE_ITEM,
12656                                                   NULL, "item not supported");
12657                 switch (item_type) {
12658                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
12659                         flow_dv_translate_item_port_id
12660                                 (dev, match_mask, match_value, items, attr);
12661                         last_item = MLX5_FLOW_ITEM_PORT_ID;
12662                         break;
12663                 case RTE_FLOW_ITEM_TYPE_ETH:
12664                         flow_dv_translate_item_eth(match_mask, match_value,
12665                                                    items, tunnel,
12666                                                    dev_flow->dv.group);
12667                         matcher.priority = action_flags &
12668                                         MLX5_FLOW_ACTION_DEFAULT_MISS &&
12669                                         !dev_flow->external ?
12670                                         MLX5_PRIORITY_MAP_L3 :
12671                                         MLX5_PRIORITY_MAP_L2;
12672                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
12673                                              MLX5_FLOW_LAYER_OUTER_L2;
12674                         break;
12675                 case RTE_FLOW_ITEM_TYPE_VLAN:
12676                         flow_dv_translate_item_vlan(dev_flow,
12677                                                     match_mask, match_value,
12678                                                     items, tunnel,
12679                                                     dev_flow->dv.group);
12680                         matcher.priority = MLX5_PRIORITY_MAP_L2;
12681                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
12682                                               MLX5_FLOW_LAYER_INNER_VLAN) :
12683                                              (MLX5_FLOW_LAYER_OUTER_L2 |
12684                                               MLX5_FLOW_LAYER_OUTER_VLAN);
12685                         break;
12686                 case RTE_FLOW_ITEM_TYPE_IPV4:
12687                         mlx5_flow_tunnel_ip_check(items, next_protocol,
12688                                                   &item_flags, &tunnel);
12689                         flow_dv_translate_item_ipv4(match_mask, match_value,
12690                                                     items, tunnel,
12691                                                     dev_flow->dv.group);
12692                         matcher.priority = MLX5_PRIORITY_MAP_L3;
12693                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
12694                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
12695                         if (items->mask != NULL &&
12696                             ((const struct rte_flow_item_ipv4 *)
12697                              items->mask)->hdr.next_proto_id) {
12698                                 next_protocol =
12699                                         ((const struct rte_flow_item_ipv4 *)
12700                                          (items->spec))->hdr.next_proto_id;
12701                                 next_protocol &=
12702                                         ((const struct rte_flow_item_ipv4 *)
12703                                          (items->mask))->hdr.next_proto_id;
12704                         } else {
12705                                 /* Reset for inner layer. */
12706                                 next_protocol = 0xff;
12707                         }
12708                         break;
12709                 case RTE_FLOW_ITEM_TYPE_IPV6:
12710                         mlx5_flow_tunnel_ip_check(items, next_protocol,
12711                                                   &item_flags, &tunnel);
12712                         flow_dv_translate_item_ipv6(match_mask, match_value,
12713                                                     items, tunnel,
12714                                                     dev_flow->dv.group);
12715                         matcher.priority = MLX5_PRIORITY_MAP_L3;
12716                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
12717                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
12718                         if (items->mask != NULL &&
12719                             ((const struct rte_flow_item_ipv6 *)
12720                              items->mask)->hdr.proto) {
12721                                 next_protocol =
12722                                         ((const struct rte_flow_item_ipv6 *)
12723                                          items->spec)->hdr.proto;
12724                                 next_protocol &=
12725                                         ((const struct rte_flow_item_ipv6 *)
12726                                          items->mask)->hdr.proto;
12727                         } else {
12728                                 /* Reset for inner layer. */
12729                                 next_protocol = 0xff;
12730                         }
12731                         break;
12732                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
12733                         flow_dv_translate_item_ipv6_frag_ext(match_mask,
12734                                                              match_value,
12735                                                              items, tunnel);
12736                         last_item = tunnel ?
12737                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
12738                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
12739                         if (items->mask != NULL &&
12740                             ((const struct rte_flow_item_ipv6_frag_ext *)
12741                              items->mask)->hdr.next_header) {
12742                                 next_protocol =
12743                                 ((const struct rte_flow_item_ipv6_frag_ext *)
12744                                  items->spec)->hdr.next_header;
12745                                 next_protocol &=
12746                                 ((const struct rte_flow_item_ipv6_frag_ext *)
12747                                  items->mask)->hdr.next_header;
12748                         } else {
12749                                 /* Reset for inner layer. */
12750                                 next_protocol = 0xff;
12751                         }
12752                         break;
12753                 case RTE_FLOW_ITEM_TYPE_TCP:
12754                         flow_dv_translate_item_tcp(match_mask, match_value,
12755                                                    items, tunnel);
12756                         matcher.priority = MLX5_PRIORITY_MAP_L4;
12757                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
12758                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
12759                         break;
12760                 case RTE_FLOW_ITEM_TYPE_UDP:
12761                         flow_dv_translate_item_udp(match_mask, match_value,
12762                                                    items, tunnel);
12763                         matcher.priority = MLX5_PRIORITY_MAP_L4;
12764                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
12765                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
12766                         break;
12767                 case RTE_FLOW_ITEM_TYPE_GRE:
12768                         flow_dv_translate_item_gre(match_mask, match_value,
12769                                                    items, tunnel);
12770                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
12771                         last_item = MLX5_FLOW_LAYER_GRE;
12772                         break;
12773                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
12774                         flow_dv_translate_item_gre_key(match_mask,
12775                                                        match_value, items);
12776                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
12777                         break;
12778                 case RTE_FLOW_ITEM_TYPE_NVGRE:
12779                         flow_dv_translate_item_nvgre(match_mask, match_value,
12780                                                      items, tunnel);
12781                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
12782                         last_item = MLX5_FLOW_LAYER_GRE;
12783                         break;
12784                 case RTE_FLOW_ITEM_TYPE_VXLAN:
12785                         flow_dv_translate_item_vxlan(match_mask, match_value,
12786                                                      items, tunnel);
12787                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
12788                         last_item = MLX5_FLOW_LAYER_VXLAN;
12789                         break;
12790                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
12791                         flow_dv_translate_item_vxlan_gpe(match_mask,
12792                                                          match_value, items,
12793                                                          tunnel);
12794                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
12795                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
12796                         break;
12797                 case RTE_FLOW_ITEM_TYPE_GENEVE:
12798                         flow_dv_translate_item_geneve(match_mask, match_value,
12799                                                       items, tunnel);
12800                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
12801                         last_item = MLX5_FLOW_LAYER_GENEVE;
12802                         break;
12803                 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
12804                         ret = flow_dv_translate_item_geneve_opt(dev, match_mask,
12805                                                           match_value,
12806                                                           items, error);
12807                         if (ret)
12808                                 return rte_flow_error_set(error, -ret,
12809                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
12810                                         "cannot create GENEVE TLV option");
12811                         flow->geneve_tlv_option = 1;
12812                         last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
12813                         break;
12814                 case RTE_FLOW_ITEM_TYPE_MPLS:
12815                         flow_dv_translate_item_mpls(match_mask, match_value,
12816                                                     items, last_item, tunnel);
12817                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
12818                         last_item = MLX5_FLOW_LAYER_MPLS;
12819                         break;
12820                 case RTE_FLOW_ITEM_TYPE_MARK:
12821                         flow_dv_translate_item_mark(dev, match_mask,
12822                                                     match_value, items);
12823                         last_item = MLX5_FLOW_ITEM_MARK;
12824                         break;
12825                 case RTE_FLOW_ITEM_TYPE_META:
12826                         flow_dv_translate_item_meta(dev, match_mask,
12827                                                     match_value, attr, items);
12828                         last_item = MLX5_FLOW_ITEM_METADATA;
12829                         break;
12830                 case RTE_FLOW_ITEM_TYPE_ICMP:
12831                         flow_dv_translate_item_icmp(match_mask, match_value,
12832                                                     items, tunnel);
12833                         last_item = MLX5_FLOW_LAYER_ICMP;
12834                         break;
12835                 case RTE_FLOW_ITEM_TYPE_ICMP6:
12836                         flow_dv_translate_item_icmp6(match_mask, match_value,
12837                                                       items, tunnel);
12838                         last_item = MLX5_FLOW_LAYER_ICMP6;
12839                         break;
12840                 case RTE_FLOW_ITEM_TYPE_TAG:
12841                         flow_dv_translate_item_tag(dev, match_mask,
12842                                                    match_value, items);
12843                         last_item = MLX5_FLOW_ITEM_TAG;
12844                         break;
12845                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
12846                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
12847                                                         match_value, items);
12848                         last_item = MLX5_FLOW_ITEM_TAG;
12849                         break;
12850                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
12851                         flow_dv_translate_item_tx_queue(dev, match_mask,
12852                                                         match_value,
12853                                                         items);
12854                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
12855                         break;
12856                 case RTE_FLOW_ITEM_TYPE_GTP:
12857                         flow_dv_translate_item_gtp(match_mask, match_value,
12858                                                    items, tunnel);
12859                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
12860                         last_item = MLX5_FLOW_LAYER_GTP;
12861                         break;
12862                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
12863                         ret = flow_dv_translate_item_gtp_psc(match_mask,
12864                                                           match_value,
12865                                                           items);
12866                         if (ret)
12867                                 return rte_flow_error_set(error, -ret,
12868                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
12869                                         "cannot create GTP PSC item");
12870                         last_item = MLX5_FLOW_LAYER_GTP_PSC;
12871                         break;
12872                 case RTE_FLOW_ITEM_TYPE_ECPRI:
12873                         if (!mlx5_flex_parser_ecpri_exist(dev)) {
12874                                 /* Create it only the first time to be used. */
12875                                 ret = mlx5_flex_parser_ecpri_alloc(dev);
12876                                 if (ret)
12877                                         return rte_flow_error_set
12878                                                 (error, -ret,
12879                                                 RTE_FLOW_ERROR_TYPE_ITEM,
12880                                                 NULL,
12881                                                 "cannot create eCPRI parser");
12882                         }
12883                         /* Adjust the length matcher and device flow value. */
12884                         matcher.mask.size = MLX5_ST_SZ_BYTES(fte_match_param);
12885                         dev_flow->dv.value.size =
12886                                         MLX5_ST_SZ_BYTES(fte_match_param);
12887                         flow_dv_translate_item_ecpri(dev, match_mask,
12888                                                      match_value, items);
12889                         /* No other protocol should follow eCPRI layer. */
12890                         last_item = MLX5_FLOW_LAYER_ECPRI;
12891                         break;
12892                 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
12893                         flow_dv_translate_item_integrity(match_mask,
12894                                                          match_value,
12895                                                          head_item, items);
12896                         break;
12897                 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
12898                         flow_dv_translate_item_aso_ct(dev, match_mask,
12899                                                       match_value, items);
12900                         break;
12901                 default:
12902                         break;
12903                 }
12904                 item_flags |= last_item;
12905         }
12906         /*
12907          * When E-Switch mode is enabled, we have two cases where we need to
12908          * set the source port manually.
12909          * The first one, is in case of Nic steering rule, and the second is
12910          * E-Switch rule where no port_id item was found. In both cases
12911          * the source port is set according the current port in use.
12912          */
12913         if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
12914             (priv->representor || priv->master)) {
12915                 if (flow_dv_translate_item_port_id(dev, match_mask,
12916                                                    match_value, NULL, attr))
12917                         return -rte_errno;
12918         }
12919 #ifdef RTE_LIBRTE_MLX5_DEBUG
12920         MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
12921                                               dev_flow->dv.value.buf));
12922 #endif
12923         /*
12924          * Layers may be already initialized from prefix flow if this dev_flow
12925          * is the suffix flow.
12926          */
12927         handle->layers |= item_flags;
12928         if (action_flags & MLX5_FLOW_ACTION_RSS)
12929                 flow_dv_hashfields_set(dev_flow, rss_desc);
12930         /* If has RSS action in the sample action, the Sample/Mirror resource
12931          * should be registered after the hash filed be update.
12932          */
12933         if (action_flags & MLX5_FLOW_ACTION_SAMPLE) {
12934                 ret = flow_dv_translate_action_sample(dev,
12935                                                       sample,
12936                                                       dev_flow, attr,
12937                                                       &num_of_dest,
12938                                                       sample_actions,
12939                                                       &sample_res,
12940                                                       error);
12941                 if (ret < 0)
12942                         return ret;
12943                 ret = flow_dv_create_action_sample(dev,
12944                                                    dev_flow,
12945                                                    num_of_dest,
12946                                                    &sample_res,
12947                                                    &mdest_res,
12948                                                    sample_actions,
12949                                                    action_flags,
12950                                                    error);
12951                 if (ret < 0)
12952                         return rte_flow_error_set
12953                                                 (error, rte_errno,
12954                                                 RTE_FLOW_ERROR_TYPE_ACTION,
12955                                                 NULL,
12956                                                 "cannot create sample action");
12957                 if (num_of_dest > 1) {
12958                         dev_flow->dv.actions[sample_act_pos] =
12959                         dev_flow->dv.dest_array_res->action;
12960                 } else {
12961                         dev_flow->dv.actions[sample_act_pos] =
12962                         dev_flow->dv.sample_res->verbs_action;
12963                 }
12964         }
12965         /*
12966          * For multiple destination (sample action with ratio=1), the encap
12967          * action and port id action will be combined into group action.
12968          * So need remove the original these actions in the flow and only
12969          * use the sample action instead of.
12970          */
12971         if (num_of_dest > 1 &&
12972             (sample_act->dr_port_id_action || sample_act->dr_jump_action)) {
12973                 int i;
12974                 void *temp_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
12975
12976                 for (i = 0; i < actions_n; i++) {
12977                         if ((sample_act->dr_encap_action &&
12978                                 sample_act->dr_encap_action ==
12979                                 dev_flow->dv.actions[i]) ||
12980                                 (sample_act->dr_port_id_action &&
12981                                 sample_act->dr_port_id_action ==
12982                                 dev_flow->dv.actions[i]) ||
12983                                 (sample_act->dr_jump_action &&
12984                                 sample_act->dr_jump_action ==
12985                                 dev_flow->dv.actions[i]))
12986                                 continue;
12987                         temp_actions[tmp_actions_n++] = dev_flow->dv.actions[i];
12988                 }
12989                 memcpy((void *)dev_flow->dv.actions,
12990                                 (void *)temp_actions,
12991                                 tmp_actions_n * sizeof(void *));
12992                 actions_n = tmp_actions_n;
12993         }
12994         dev_flow->dv.actions_n = actions_n;
12995         dev_flow->act_flags = action_flags;
12996         if (wks->skip_matcher_reg)
12997                 return 0;
12998         /* Register matcher. */
12999         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
13000                                     matcher.mask.size);
13001         matcher.priority = mlx5_get_matcher_priority(dev, attr,
13002                                         matcher.priority);
13003         /* reserved field no needs to be set to 0 here. */
13004         tbl_key.is_fdb = attr->transfer;
13005         tbl_key.is_egress = attr->egress;
13006         tbl_key.level = dev_flow->dv.group;
13007         tbl_key.id = dev_flow->dv.table_id;
13008         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow,
13009                                      tunnel, attr->group, error))
13010                 return -rte_errno;
13011         return 0;
13012 }
13013
13014 /**
13015  * Set hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13016  * and tunnel.
13017  *
13018  * @param[in, out] action
13019  *   Shred RSS action holding hash RX queue objects.
13020  * @param[in] hash_fields
13021  *   Defines combination of packet fields to participate in RX hash.
13022  * @param[in] tunnel
13023  *   Tunnel type
13024  * @param[in] hrxq_idx
13025  *   Hash RX queue index to set.
13026  *
13027  * @return
13028  *   0 on success, otherwise negative errno value.
13029  */
13030 static int
13031 __flow_dv_action_rss_hrxq_set(struct mlx5_shared_action_rss *action,
13032                               const uint64_t hash_fields,
13033                               uint32_t hrxq_idx)
13034 {
13035         uint32_t *hrxqs = action->hrxq;
13036
13037         switch (hash_fields & ~IBV_RX_HASH_INNER) {
13038         case MLX5_RSS_HASH_IPV4:
13039                 /* fall-through. */
13040         case MLX5_RSS_HASH_IPV4_DST_ONLY:
13041                 /* fall-through. */
13042         case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13043                 hrxqs[0] = hrxq_idx;
13044                 return 0;
13045         case MLX5_RSS_HASH_IPV4_TCP:
13046                 /* fall-through. */
13047         case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13048                 /* fall-through. */
13049         case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13050                 hrxqs[1] = hrxq_idx;
13051                 return 0;
13052         case MLX5_RSS_HASH_IPV4_UDP:
13053                 /* fall-through. */
13054         case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13055                 /* fall-through. */
13056         case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13057                 hrxqs[2] = hrxq_idx;
13058                 return 0;
13059         case MLX5_RSS_HASH_IPV6:
13060                 /* fall-through. */
13061         case MLX5_RSS_HASH_IPV6_DST_ONLY:
13062                 /* fall-through. */
13063         case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13064                 hrxqs[3] = hrxq_idx;
13065                 return 0;
13066         case MLX5_RSS_HASH_IPV6_TCP:
13067                 /* fall-through. */
13068         case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13069                 /* fall-through. */
13070         case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13071                 hrxqs[4] = hrxq_idx;
13072                 return 0;
13073         case MLX5_RSS_HASH_IPV6_UDP:
13074                 /* fall-through. */
13075         case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13076                 /* fall-through. */
13077         case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13078                 hrxqs[5] = hrxq_idx;
13079                 return 0;
13080         case MLX5_RSS_HASH_NONE:
13081                 hrxqs[6] = hrxq_idx;
13082                 return 0;
13083         default:
13084                 return -1;
13085         }
13086 }
13087
13088 /**
13089  * Look up for hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13090  * and tunnel.
13091  *
13092  * @param[in] dev
13093  *   Pointer to the Ethernet device structure.
13094  * @param[in] idx
13095  *   Shared RSS action ID holding hash RX queue objects.
13096  * @param[in] hash_fields
13097  *   Defines combination of packet fields to participate in RX hash.
13098  * @param[in] tunnel
13099  *   Tunnel type
13100  *
13101  * @return
13102  *   Valid hash RX queue index, otherwise 0.
13103  */
13104 static uint32_t
13105 __flow_dv_action_rss_hrxq_lookup(struct rte_eth_dev *dev, uint32_t idx,
13106                                  const uint64_t hash_fields)
13107 {
13108         struct mlx5_priv *priv = dev->data->dev_private;
13109         struct mlx5_shared_action_rss *shared_rss =
13110             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
13111         const uint32_t *hrxqs = shared_rss->hrxq;
13112
13113         switch (hash_fields & ~IBV_RX_HASH_INNER) {
13114         case MLX5_RSS_HASH_IPV4:
13115                 /* fall-through. */
13116         case MLX5_RSS_HASH_IPV4_DST_ONLY:
13117                 /* fall-through. */
13118         case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13119                 return hrxqs[0];
13120         case MLX5_RSS_HASH_IPV4_TCP:
13121                 /* fall-through. */
13122         case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13123                 /* fall-through. */
13124         case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13125                 return hrxqs[1];
13126         case MLX5_RSS_HASH_IPV4_UDP:
13127                 /* fall-through. */
13128         case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13129                 /* fall-through. */
13130         case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13131                 return hrxqs[2];
13132         case MLX5_RSS_HASH_IPV6:
13133                 /* fall-through. */
13134         case MLX5_RSS_HASH_IPV6_DST_ONLY:
13135                 /* fall-through. */
13136         case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13137                 return hrxqs[3];
13138         case MLX5_RSS_HASH_IPV6_TCP:
13139                 /* fall-through. */
13140         case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13141                 /* fall-through. */
13142         case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13143                 return hrxqs[4];
13144         case MLX5_RSS_HASH_IPV6_UDP:
13145                 /* fall-through. */
13146         case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13147                 /* fall-through. */
13148         case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13149                 return hrxqs[5];
13150         case MLX5_RSS_HASH_NONE:
13151                 return hrxqs[6];
13152         default:
13153                 return 0;
13154         }
13155
13156 }
13157
13158 /**
13159  * Apply the flow to the NIC, lock free,
13160  * (mutex should be acquired by caller).
13161  *
13162  * @param[in] dev
13163  *   Pointer to the Ethernet device structure.
13164  * @param[in, out] flow
13165  *   Pointer to flow structure.
13166  * @param[out] error
13167  *   Pointer to error structure.
13168  *
13169  * @return
13170  *   0 on success, a negative errno value otherwise and rte_errno is set.
13171  */
13172 static int
13173 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
13174               struct rte_flow_error *error)
13175 {
13176         struct mlx5_flow_dv_workspace *dv;
13177         struct mlx5_flow_handle *dh;
13178         struct mlx5_flow_handle_dv *dv_h;
13179         struct mlx5_flow *dev_flow;
13180         struct mlx5_priv *priv = dev->data->dev_private;
13181         uint32_t handle_idx;
13182         int n;
13183         int err;
13184         int idx;
13185         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
13186         struct mlx5_flow_rss_desc *rss_desc = &wks->rss_desc;
13187
13188         MLX5_ASSERT(wks);
13189         for (idx = wks->flow_idx - 1; idx >= 0; idx--) {
13190                 dev_flow = &wks->flows[idx];
13191                 dv = &dev_flow->dv;
13192                 dh = dev_flow->handle;
13193                 dv_h = &dh->dvh;
13194                 n = dv->actions_n;
13195                 if (dh->fate_action == MLX5_FLOW_FATE_DROP) {
13196                         if (dv->transfer) {
13197                                 MLX5_ASSERT(priv->sh->dr_drop_action);
13198                                 dv->actions[n++] = priv->sh->dr_drop_action;
13199                         } else {
13200 #ifdef HAVE_MLX5DV_DR
13201                                 /* DR supports drop action placeholder. */
13202                                 MLX5_ASSERT(priv->sh->dr_drop_action);
13203                                 dv->actions[n++] = priv->sh->dr_drop_action;
13204 #else
13205                                 /* For DV we use the explicit drop queue. */
13206                                 MLX5_ASSERT(priv->drop_queue.hrxq);
13207                                 dv->actions[n++] =
13208                                                 priv->drop_queue.hrxq->action;
13209 #endif
13210                         }
13211                 } else if ((dh->fate_action == MLX5_FLOW_FATE_QUEUE &&
13212                            !dv_h->rix_sample && !dv_h->rix_dest_array)) {
13213                         struct mlx5_hrxq *hrxq;
13214                         uint32_t hrxq_idx;
13215
13216                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow, rss_desc,
13217                                                     &hrxq_idx);
13218                         if (!hrxq) {
13219                                 rte_flow_error_set
13220                                         (error, rte_errno,
13221                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13222                                          "cannot get hash queue");
13223                                 goto error;
13224                         }
13225                         dh->rix_hrxq = hrxq_idx;
13226                         dv->actions[n++] = hrxq->action;
13227                 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13228                         struct mlx5_hrxq *hrxq = NULL;
13229                         uint32_t hrxq_idx;
13230
13231                         hrxq_idx = __flow_dv_action_rss_hrxq_lookup(dev,
13232                                                 rss_desc->shared_rss,
13233                                                 dev_flow->hash_fields);
13234                         if (hrxq_idx)
13235                                 hrxq = mlx5_ipool_get
13236                                         (priv->sh->ipool[MLX5_IPOOL_HRXQ],
13237                                          hrxq_idx);
13238                         if (!hrxq) {
13239                                 rte_flow_error_set
13240                                         (error, rte_errno,
13241                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13242                                          "cannot get hash queue");
13243                                 goto error;
13244                         }
13245                         dh->rix_srss = rss_desc->shared_rss;
13246                         dv->actions[n++] = hrxq->action;
13247                 } else if (dh->fate_action == MLX5_FLOW_FATE_DEFAULT_MISS) {
13248                         if (!priv->sh->default_miss_action) {
13249                                 rte_flow_error_set
13250                                         (error, rte_errno,
13251                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13252                                          "default miss action not be created.");
13253                                 goto error;
13254                         }
13255                         dv->actions[n++] = priv->sh->default_miss_action;
13256                 }
13257                 err = mlx5_flow_os_create_flow(dv_h->matcher->matcher_object,
13258                                                (void *)&dv->value, n,
13259                                                dv->actions, &dh->drv_flow);
13260                 if (err) {
13261                         rte_flow_error_set(error, errno,
13262                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
13263                                            NULL,
13264                                            "hardware refuses to create flow");
13265                         goto error;
13266                 }
13267                 if (priv->vmwa_context &&
13268                     dh->vf_vlan.tag && !dh->vf_vlan.created) {
13269                         /*
13270                          * The rule contains the VLAN pattern.
13271                          * For VF we are going to create VLAN
13272                          * interface to make hypervisor set correct
13273                          * e-Switch vport context.
13274                          */
13275                         mlx5_vlan_vmwa_acquire(dev, &dh->vf_vlan);
13276                 }
13277         }
13278         return 0;
13279 error:
13280         err = rte_errno; /* Save rte_errno before cleanup. */
13281         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
13282                        handle_idx, dh, next) {
13283                 /* hrxq is union, don't clear it if the flag is not set. */
13284                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE && dh->rix_hrxq) {
13285                         mlx5_hrxq_release(dev, dh->rix_hrxq);
13286                         dh->rix_hrxq = 0;
13287                 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13288                         dh->rix_srss = 0;
13289                 }
13290                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
13291                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
13292         }
13293         rte_errno = err; /* Restore rte_errno. */
13294         return -rte_errno;
13295 }
13296
13297 void
13298 flow_dv_matcher_remove_cb(struct mlx5_cache_list *list __rte_unused,
13299                           struct mlx5_cache_entry *entry)
13300 {
13301         struct mlx5_flow_dv_matcher *cache = container_of(entry, typeof(*cache),
13302                                                           entry);
13303
13304         claim_zero(mlx5_flow_os_destroy_flow_matcher(cache->matcher_object));
13305         mlx5_free(cache);
13306 }
13307
13308 /**
13309  * Release the flow matcher.
13310  *
13311  * @param dev
13312  *   Pointer to Ethernet device.
13313  * @param port_id
13314  *   Index to port ID action resource.
13315  *
13316  * @return
13317  *   1 while a reference on it exists, 0 when freed.
13318  */
13319 static int
13320 flow_dv_matcher_release(struct rte_eth_dev *dev,
13321                         struct mlx5_flow_handle *handle)
13322 {
13323         struct mlx5_flow_dv_matcher *matcher = handle->dvh.matcher;
13324         struct mlx5_flow_tbl_data_entry *tbl = container_of(matcher->tbl,
13325                                                             typeof(*tbl), tbl);
13326         int ret;
13327
13328         MLX5_ASSERT(matcher->matcher_object);
13329         ret = mlx5_cache_unregister(&tbl->matchers, &matcher->entry);
13330         flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl->tbl);
13331         return ret;
13332 }
13333
13334 /**
13335  * Release encap_decap resource.
13336  *
13337  * @param list
13338  *   Pointer to the hash list.
13339  * @param entry
13340  *   Pointer to exist resource entry object.
13341  */
13342 void
13343 flow_dv_encap_decap_remove_cb(struct mlx5_hlist *list,
13344                               struct mlx5_hlist_entry *entry)
13345 {
13346         struct mlx5_dev_ctx_shared *sh = list->ctx;
13347         struct mlx5_flow_dv_encap_decap_resource *res =
13348                 container_of(entry, typeof(*res), entry);
13349
13350         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
13351         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
13352 }
13353
13354 /**
13355  * Release an encap/decap resource.
13356  *
13357  * @param dev
13358  *   Pointer to Ethernet device.
13359  * @param encap_decap_idx
13360  *   Index of encap decap resource.
13361  *
13362  * @return
13363  *   1 while a reference on it exists, 0 when freed.
13364  */
13365 static int
13366 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
13367                                      uint32_t encap_decap_idx)
13368 {
13369         struct mlx5_priv *priv = dev->data->dev_private;
13370         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
13371
13372         cache_resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
13373                                         encap_decap_idx);
13374         if (!cache_resource)
13375                 return 0;
13376         MLX5_ASSERT(cache_resource->action);
13377         return mlx5_hlist_unregister(priv->sh->encaps_decaps,
13378                                      &cache_resource->entry);
13379 }
13380
13381 /**
13382  * Release an jump to table action resource.
13383  *
13384  * @param dev
13385  *   Pointer to Ethernet device.
13386  * @param rix_jump
13387  *   Index to the jump action resource.
13388  *
13389  * @return
13390  *   1 while a reference on it exists, 0 when freed.
13391  */
13392 static int
13393 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
13394                                   uint32_t rix_jump)
13395 {
13396         struct mlx5_priv *priv = dev->data->dev_private;
13397         struct mlx5_flow_tbl_data_entry *tbl_data;
13398
13399         tbl_data = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_JUMP],
13400                                   rix_jump);
13401         if (!tbl_data)
13402                 return 0;
13403         return flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl_data->tbl);
13404 }
13405
13406 void
13407 flow_dv_modify_remove_cb(struct mlx5_hlist *list __rte_unused,
13408                          struct mlx5_hlist_entry *entry)
13409 {
13410         struct mlx5_flow_dv_modify_hdr_resource *res =
13411                 container_of(entry, typeof(*res), entry);
13412
13413         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
13414         mlx5_free(entry);
13415 }
13416
13417 /**
13418  * Release a modify-header resource.
13419  *
13420  * @param dev
13421  *   Pointer to Ethernet device.
13422  * @param handle
13423  *   Pointer to mlx5_flow_handle.
13424  *
13425  * @return
13426  *   1 while a reference on it exists, 0 when freed.
13427  */
13428 static int
13429 flow_dv_modify_hdr_resource_release(struct rte_eth_dev *dev,
13430                                     struct mlx5_flow_handle *handle)
13431 {
13432         struct mlx5_priv *priv = dev->data->dev_private;
13433         struct mlx5_flow_dv_modify_hdr_resource *entry = handle->dvh.modify_hdr;
13434
13435         MLX5_ASSERT(entry->action);
13436         return mlx5_hlist_unregister(priv->sh->modify_cmds, &entry->entry);
13437 }
13438
13439 void
13440 flow_dv_port_id_remove_cb(struct mlx5_cache_list *list,
13441                           struct mlx5_cache_entry *entry)
13442 {
13443         struct mlx5_dev_ctx_shared *sh = list->ctx;
13444         struct mlx5_flow_dv_port_id_action_resource *cache =
13445                         container_of(entry, typeof(*cache), entry);
13446
13447         claim_zero(mlx5_flow_os_destroy_flow_action(cache->action));
13448         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], cache->idx);
13449 }
13450
13451 /**
13452  * Release port ID action resource.
13453  *
13454  * @param dev
13455  *   Pointer to Ethernet device.
13456  * @param handle
13457  *   Pointer to mlx5_flow_handle.
13458  *
13459  * @return
13460  *   1 while a reference on it exists, 0 when freed.
13461  */
13462 static int
13463 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
13464                                         uint32_t port_id)
13465 {
13466         struct mlx5_priv *priv = dev->data->dev_private;
13467         struct mlx5_flow_dv_port_id_action_resource *cache;
13468
13469         cache = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PORT_ID], port_id);
13470         if (!cache)
13471                 return 0;
13472         MLX5_ASSERT(cache->action);
13473         return mlx5_cache_unregister(&priv->sh->port_id_action_list,
13474                                      &cache->entry);
13475 }
13476
13477 /**
13478  * Release shared RSS action resource.
13479  *
13480  * @param dev
13481  *   Pointer to Ethernet device.
13482  * @param srss
13483  *   Shared RSS action index.
13484  */
13485 static void
13486 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss)
13487 {
13488         struct mlx5_priv *priv = dev->data->dev_private;
13489         struct mlx5_shared_action_rss *shared_rss;
13490
13491         shared_rss = mlx5_ipool_get
13492                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], srss);
13493         __atomic_sub_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
13494 }
13495
13496 void
13497 flow_dv_push_vlan_remove_cb(struct mlx5_cache_list *list,
13498                             struct mlx5_cache_entry *entry)
13499 {
13500         struct mlx5_dev_ctx_shared *sh = list->ctx;
13501         struct mlx5_flow_dv_push_vlan_action_resource *cache =
13502                         container_of(entry, typeof(*cache), entry);
13503
13504         claim_zero(mlx5_flow_os_destroy_flow_action(cache->action));
13505         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], cache->idx);
13506 }
13507
13508 /**
13509  * Release push vlan action resource.
13510  *
13511  * @param dev
13512  *   Pointer to Ethernet device.
13513  * @param handle
13514  *   Pointer to mlx5_flow_handle.
13515  *
13516  * @return
13517  *   1 while a reference on it exists, 0 when freed.
13518  */
13519 static int
13520 flow_dv_push_vlan_action_resource_release(struct rte_eth_dev *dev,
13521                                           struct mlx5_flow_handle *handle)
13522 {
13523         struct mlx5_priv *priv = dev->data->dev_private;
13524         struct mlx5_flow_dv_push_vlan_action_resource *cache;
13525         uint32_t idx = handle->dvh.rix_push_vlan;
13526
13527         cache = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
13528         if (!cache)
13529                 return 0;
13530         MLX5_ASSERT(cache->action);
13531         return mlx5_cache_unregister(&priv->sh->push_vlan_action_list,
13532                                      &cache->entry);
13533 }
13534
13535 /**
13536  * Release the fate resource.
13537  *
13538  * @param dev
13539  *   Pointer to Ethernet device.
13540  * @param handle
13541  *   Pointer to mlx5_flow_handle.
13542  */
13543 static void
13544 flow_dv_fate_resource_release(struct rte_eth_dev *dev,
13545                                struct mlx5_flow_handle *handle)
13546 {
13547         if (!handle->rix_fate)
13548                 return;
13549         switch (handle->fate_action) {
13550         case MLX5_FLOW_FATE_QUEUE:
13551                 if (!handle->dvh.rix_sample && !handle->dvh.rix_dest_array)
13552                         mlx5_hrxq_release(dev, handle->rix_hrxq);
13553                 break;
13554         case MLX5_FLOW_FATE_JUMP:
13555                 flow_dv_jump_tbl_resource_release(dev, handle->rix_jump);
13556                 break;
13557         case MLX5_FLOW_FATE_PORT_ID:
13558                 flow_dv_port_id_action_resource_release(dev,
13559                                 handle->rix_port_id_action);
13560                 break;
13561         default:
13562                 DRV_LOG(DEBUG, "Incorrect fate action:%d", handle->fate_action);
13563                 break;
13564         }
13565         handle->rix_fate = 0;
13566 }
13567
13568 void
13569 flow_dv_sample_remove_cb(struct mlx5_cache_list *list __rte_unused,
13570                          struct mlx5_cache_entry *entry)
13571 {
13572         struct mlx5_flow_dv_sample_resource *cache_resource =
13573                         container_of(entry, typeof(*cache_resource), entry);
13574         struct rte_eth_dev *dev = cache_resource->dev;
13575         struct mlx5_priv *priv = dev->data->dev_private;
13576
13577         if (cache_resource->verbs_action)
13578                 claim_zero(mlx5_flow_os_destroy_flow_action
13579                                 (cache_resource->verbs_action));
13580         if (cache_resource->normal_path_tbl)
13581                 flow_dv_tbl_resource_release(MLX5_SH(dev),
13582                         cache_resource->normal_path_tbl);
13583         flow_dv_sample_sub_actions_release(dev,
13584                                 &cache_resource->sample_idx);
13585         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
13586                         cache_resource->idx);
13587         DRV_LOG(DEBUG, "sample resource %p: removed",
13588                 (void *)cache_resource);
13589 }
13590
13591 /**
13592  * Release an sample resource.
13593  *
13594  * @param dev
13595  *   Pointer to Ethernet device.
13596  * @param handle
13597  *   Pointer to mlx5_flow_handle.
13598  *
13599  * @return
13600  *   1 while a reference on it exists, 0 when freed.
13601  */
13602 static int
13603 flow_dv_sample_resource_release(struct rte_eth_dev *dev,
13604                                      struct mlx5_flow_handle *handle)
13605 {
13606         struct mlx5_priv *priv = dev->data->dev_private;
13607         struct mlx5_flow_dv_sample_resource *cache_resource;
13608
13609         cache_resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
13610                          handle->dvh.rix_sample);
13611         if (!cache_resource)
13612                 return 0;
13613         MLX5_ASSERT(cache_resource->verbs_action);
13614         return mlx5_cache_unregister(&priv->sh->sample_action_list,
13615                                      &cache_resource->entry);
13616 }
13617
13618 void
13619 flow_dv_dest_array_remove_cb(struct mlx5_cache_list *list __rte_unused,
13620                              struct mlx5_cache_entry *entry)
13621 {
13622         struct mlx5_flow_dv_dest_array_resource *cache_resource =
13623                         container_of(entry, typeof(*cache_resource), entry);
13624         struct rte_eth_dev *dev = cache_resource->dev;
13625         struct mlx5_priv *priv = dev->data->dev_private;
13626         uint32_t i = 0;
13627
13628         MLX5_ASSERT(cache_resource->action);
13629         if (cache_resource->action)
13630                 claim_zero(mlx5_flow_os_destroy_flow_action
13631                                         (cache_resource->action));
13632         for (; i < cache_resource->num_of_dest; i++)
13633                 flow_dv_sample_sub_actions_release(dev,
13634                                 &cache_resource->sample_idx[i]);
13635         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
13636                         cache_resource->idx);
13637         DRV_LOG(DEBUG, "destination array resource %p: removed",
13638                 (void *)cache_resource);
13639 }
13640
13641 /**
13642  * Release an destination array resource.
13643  *
13644  * @param dev
13645  *   Pointer to Ethernet device.
13646  * @param handle
13647  *   Pointer to mlx5_flow_handle.
13648  *
13649  * @return
13650  *   1 while a reference on it exists, 0 when freed.
13651  */
13652 static int
13653 flow_dv_dest_array_resource_release(struct rte_eth_dev *dev,
13654                                     struct mlx5_flow_handle *handle)
13655 {
13656         struct mlx5_priv *priv = dev->data->dev_private;
13657         struct mlx5_flow_dv_dest_array_resource *cache;
13658
13659         cache = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
13660                                handle->dvh.rix_dest_array);
13661         if (!cache)
13662                 return 0;
13663         MLX5_ASSERT(cache->action);
13664         return mlx5_cache_unregister(&priv->sh->dest_array_list,
13665                                      &cache->entry);
13666 }
13667
13668 static void
13669 flow_dv_geneve_tlv_option_resource_release(struct rte_eth_dev *dev)
13670 {
13671         struct mlx5_priv *priv = dev->data->dev_private;
13672         struct mlx5_dev_ctx_shared *sh = priv->sh;
13673         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
13674                                 sh->geneve_tlv_option_resource;
13675         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
13676         if (geneve_opt_resource) {
13677                 if (!(__atomic_sub_fetch(&geneve_opt_resource->refcnt, 1,
13678                                          __ATOMIC_RELAXED))) {
13679                         claim_zero(mlx5_devx_cmd_destroy
13680                                         (geneve_opt_resource->obj));
13681                         mlx5_free(sh->geneve_tlv_option_resource);
13682                         sh->geneve_tlv_option_resource = NULL;
13683                 }
13684         }
13685         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
13686 }
13687
13688 /**
13689  * Remove the flow from the NIC but keeps it in memory.
13690  * Lock free, (mutex should be acquired by caller).
13691  *
13692  * @param[in] dev
13693  *   Pointer to Ethernet device.
13694  * @param[in, out] flow
13695  *   Pointer to flow structure.
13696  */
13697 static void
13698 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
13699 {
13700         struct mlx5_flow_handle *dh;
13701         uint32_t handle_idx;
13702         struct mlx5_priv *priv = dev->data->dev_private;
13703
13704         if (!flow)
13705                 return;
13706         handle_idx = flow->dev_handles;
13707         while (handle_idx) {
13708                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
13709                                     handle_idx);
13710                 if (!dh)
13711                         return;
13712                 if (dh->drv_flow) {
13713                         claim_zero(mlx5_flow_os_destroy_flow(dh->drv_flow));
13714                         dh->drv_flow = NULL;
13715                 }
13716                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE)
13717                         flow_dv_fate_resource_release(dev, dh);
13718                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
13719                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
13720                 handle_idx = dh->next.next;
13721         }
13722 }
13723
13724 /**
13725  * Remove the flow from the NIC and the memory.
13726  * Lock free, (mutex should be acquired by caller).
13727  *
13728  * @param[in] dev
13729  *   Pointer to the Ethernet device structure.
13730  * @param[in, out] flow
13731  *   Pointer to flow structure.
13732  */
13733 static void
13734 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
13735 {
13736         struct mlx5_flow_handle *dev_handle;
13737         struct mlx5_priv *priv = dev->data->dev_private;
13738         struct mlx5_flow_meter_info *fm = NULL;
13739         uint32_t srss = 0;
13740
13741         if (!flow)
13742                 return;
13743         flow_dv_remove(dev, flow);
13744         if (flow->counter) {
13745                 flow_dv_counter_free(dev, flow->counter);
13746                 flow->counter = 0;
13747         }
13748         if (flow->meter) {
13749                 fm = flow_dv_meter_find_by_idx(priv, flow->meter);
13750                 if (fm)
13751                         mlx5_flow_meter_detach(priv, fm);
13752                 flow->meter = 0;
13753         }
13754         /* Keep the current age handling by default. */
13755         if (flow->indirect_type == MLX5_INDIRECT_ACTION_TYPE_CT && flow->ct)
13756                 flow_dv_aso_ct_release(dev, flow->ct);
13757         else if (flow->age)
13758                 flow_dv_aso_age_release(dev, flow->age);
13759         if (flow->geneve_tlv_option) {
13760                 flow_dv_geneve_tlv_option_resource_release(dev);
13761                 flow->geneve_tlv_option = 0;
13762         }
13763         while (flow->dev_handles) {
13764                 uint32_t tmp_idx = flow->dev_handles;
13765
13766                 dev_handle = mlx5_ipool_get(priv->sh->ipool
13767                                             [MLX5_IPOOL_MLX5_FLOW], tmp_idx);
13768                 if (!dev_handle)
13769                         return;
13770                 flow->dev_handles = dev_handle->next.next;
13771                 if (dev_handle->dvh.matcher)
13772                         flow_dv_matcher_release(dev, dev_handle);
13773                 if (dev_handle->dvh.rix_sample)
13774                         flow_dv_sample_resource_release(dev, dev_handle);
13775                 if (dev_handle->dvh.rix_dest_array)
13776                         flow_dv_dest_array_resource_release(dev, dev_handle);
13777                 if (dev_handle->dvh.rix_encap_decap)
13778                         flow_dv_encap_decap_resource_release(dev,
13779                                 dev_handle->dvh.rix_encap_decap);
13780                 if (dev_handle->dvh.modify_hdr)
13781                         flow_dv_modify_hdr_resource_release(dev, dev_handle);
13782                 if (dev_handle->dvh.rix_push_vlan)
13783                         flow_dv_push_vlan_action_resource_release(dev,
13784                                                                   dev_handle);
13785                 if (dev_handle->dvh.rix_tag)
13786                         flow_dv_tag_release(dev,
13787                                             dev_handle->dvh.rix_tag);
13788                 if (dev_handle->fate_action != MLX5_FLOW_FATE_SHARED_RSS)
13789                         flow_dv_fate_resource_release(dev, dev_handle);
13790                 else if (!srss)
13791                         srss = dev_handle->rix_srss;
13792                 if (fm && dev_handle->is_meter_flow_id &&
13793                     dev_handle->split_flow_id)
13794                         mlx5_ipool_free(fm->flow_ipool,
13795                                         dev_handle->split_flow_id);
13796                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
13797                            tmp_idx);
13798         }
13799         if (srss)
13800                 flow_dv_shared_rss_action_release(dev, srss);
13801 }
13802
13803 /**
13804  * Release array of hash RX queue objects.
13805  * Helper function.
13806  *
13807  * @param[in] dev
13808  *   Pointer to the Ethernet device structure.
13809  * @param[in, out] hrxqs
13810  *   Array of hash RX queue objects.
13811  *
13812  * @return
13813  *   Total number of references to hash RX queue objects in *hrxqs* array
13814  *   after this operation.
13815  */
13816 static int
13817 __flow_dv_hrxqs_release(struct rte_eth_dev *dev,
13818                         uint32_t (*hrxqs)[MLX5_RSS_HASH_FIELDS_LEN])
13819 {
13820         size_t i;
13821         int remaining = 0;
13822
13823         for (i = 0; i < RTE_DIM(*hrxqs); i++) {
13824                 int ret = mlx5_hrxq_release(dev, (*hrxqs)[i]);
13825
13826                 if (!ret)
13827                         (*hrxqs)[i] = 0;
13828                 remaining += ret;
13829         }
13830         return remaining;
13831 }
13832
13833 /**
13834  * Release all hash RX queue objects representing shared RSS action.
13835  *
13836  * @param[in] dev
13837  *   Pointer to the Ethernet device structure.
13838  * @param[in, out] action
13839  *   Shared RSS action to remove hash RX queue objects from.
13840  *
13841  * @return
13842  *   Total number of references to hash RX queue objects stored in *action*
13843  *   after this operation.
13844  *   Expected to be 0 if no external references held.
13845  */
13846 static int
13847 __flow_dv_action_rss_hrxqs_release(struct rte_eth_dev *dev,
13848                                  struct mlx5_shared_action_rss *shared_rss)
13849 {
13850         return __flow_dv_hrxqs_release(dev, &shared_rss->hrxq);
13851 }
13852
13853 /**
13854  * Adjust L3/L4 hash value of pre-created shared RSS hrxq according to
13855  * user input.
13856  *
13857  * Only one hash value is available for one L3+L4 combination:
13858  * for example:
13859  * MLX5_RSS_HASH_IPV4, MLX5_RSS_HASH_IPV4_SRC_ONLY, and
13860  * MLX5_RSS_HASH_IPV4_DST_ONLY are mutually exclusive so they can share
13861  * same slot in mlx5_rss_hash_fields.
13862  *
13863  * @param[in] rss
13864  *   Pointer to the shared action RSS conf.
13865  * @param[in, out] hash_field
13866  *   hash_field variable needed to be adjusted.
13867  *
13868  * @return
13869  *   void
13870  */
13871 static void
13872 __flow_dv_action_rss_l34_hash_adjust(struct mlx5_shared_action_rss *rss,
13873                                      uint64_t *hash_field)
13874 {
13875         uint64_t rss_types = rss->origin.types;
13876
13877         switch (*hash_field & ~IBV_RX_HASH_INNER) {
13878         case MLX5_RSS_HASH_IPV4:
13879                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
13880                         *hash_field &= ~MLX5_RSS_HASH_IPV4;
13881                         if (rss_types & ETH_RSS_L3_DST_ONLY)
13882                                 *hash_field |= IBV_RX_HASH_DST_IPV4;
13883                         else if (rss_types & ETH_RSS_L3_SRC_ONLY)
13884                                 *hash_field |= IBV_RX_HASH_SRC_IPV4;
13885                         else
13886                                 *hash_field |= MLX5_RSS_HASH_IPV4;
13887                 }
13888                 return;
13889         case MLX5_RSS_HASH_IPV6:
13890                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
13891                         *hash_field &= ~MLX5_RSS_HASH_IPV6;
13892                         if (rss_types & ETH_RSS_L3_DST_ONLY)
13893                                 *hash_field |= IBV_RX_HASH_DST_IPV6;
13894                         else if (rss_types & ETH_RSS_L3_SRC_ONLY)
13895                                 *hash_field |= IBV_RX_HASH_SRC_IPV6;
13896                         else
13897                                 *hash_field |= MLX5_RSS_HASH_IPV6;
13898                 }
13899                 return;
13900         case MLX5_RSS_HASH_IPV4_UDP:
13901                 /* fall-through. */
13902         case MLX5_RSS_HASH_IPV6_UDP:
13903                 if (rss_types & ETH_RSS_UDP) {
13904                         *hash_field &= ~MLX5_UDP_IBV_RX_HASH;
13905                         if (rss_types & ETH_RSS_L4_DST_ONLY)
13906                                 *hash_field |= IBV_RX_HASH_DST_PORT_UDP;
13907                         else if (rss_types & ETH_RSS_L4_SRC_ONLY)
13908                                 *hash_field |= IBV_RX_HASH_SRC_PORT_UDP;
13909                         else
13910                                 *hash_field |= MLX5_UDP_IBV_RX_HASH;
13911                 }
13912                 return;
13913         case MLX5_RSS_HASH_IPV4_TCP:
13914                 /* fall-through. */
13915         case MLX5_RSS_HASH_IPV6_TCP:
13916                 if (rss_types & ETH_RSS_TCP) {
13917                         *hash_field &= ~MLX5_TCP_IBV_RX_HASH;
13918                         if (rss_types & ETH_RSS_L4_DST_ONLY)
13919                                 *hash_field |= IBV_RX_HASH_DST_PORT_TCP;
13920                         else if (rss_types & ETH_RSS_L4_SRC_ONLY)
13921                                 *hash_field |= IBV_RX_HASH_SRC_PORT_TCP;
13922                         else
13923                                 *hash_field |= MLX5_TCP_IBV_RX_HASH;
13924                 }
13925                 return;
13926         default:
13927                 return;
13928         }
13929 }
13930
13931 /**
13932  * Setup shared RSS action.
13933  * Prepare set of hash RX queue objects sufficient to handle all valid
13934  * hash_fields combinations (see enum ibv_rx_hash_fields).
13935  *
13936  * @param[in] dev
13937  *   Pointer to the Ethernet device structure.
13938  * @param[in] action_idx
13939  *   Shared RSS action ipool index.
13940  * @param[in, out] action
13941  *   Partially initialized shared RSS action.
13942  * @param[out] error
13943  *   Perform verbose error reporting if not NULL. Initialized in case of
13944  *   error only.
13945  *
13946  * @return
13947  *   0 on success, otherwise negative errno value.
13948  */
13949 static int
13950 __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
13951                            uint32_t action_idx,
13952                            struct mlx5_shared_action_rss *shared_rss,
13953                            struct rte_flow_error *error)
13954 {
13955         struct mlx5_flow_rss_desc rss_desc = { 0 };
13956         size_t i;
13957         int err;
13958
13959         if (mlx5_ind_table_obj_setup(dev, shared_rss->ind_tbl)) {
13960                 return rte_flow_error_set(error, rte_errno,
13961                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13962                                           "cannot setup indirection table");
13963         }
13964         memcpy(rss_desc.key, shared_rss->origin.key, MLX5_RSS_HASH_KEY_LEN);
13965         rss_desc.key_len = MLX5_RSS_HASH_KEY_LEN;
13966         rss_desc.const_q = shared_rss->origin.queue;
13967         rss_desc.queue_num = shared_rss->origin.queue_num;
13968         /* Set non-zero value to indicate a shared RSS. */
13969         rss_desc.shared_rss = action_idx;
13970         rss_desc.ind_tbl = shared_rss->ind_tbl;
13971         for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
13972                 uint32_t hrxq_idx;
13973                 uint64_t hash_fields = mlx5_rss_hash_fields[i];
13974                 int tunnel = 0;
13975
13976                 __flow_dv_action_rss_l34_hash_adjust(shared_rss, &hash_fields);
13977                 if (shared_rss->origin.level > 1) {
13978                         hash_fields |= IBV_RX_HASH_INNER;
13979                         tunnel = 1;
13980                 }
13981                 rss_desc.tunnel = tunnel;
13982                 rss_desc.hash_fields = hash_fields;
13983                 hrxq_idx = mlx5_hrxq_get(dev, &rss_desc);
13984                 if (!hrxq_idx) {
13985                         rte_flow_error_set
13986                                 (error, rte_errno,
13987                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13988                                  "cannot get hash queue");
13989                         goto error_hrxq_new;
13990                 }
13991                 err = __flow_dv_action_rss_hrxq_set
13992                         (shared_rss, hash_fields, hrxq_idx);
13993                 MLX5_ASSERT(!err);
13994         }
13995         return 0;
13996 error_hrxq_new:
13997         err = rte_errno;
13998         __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
13999         if (!mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true))
14000                 shared_rss->ind_tbl = NULL;
14001         rte_errno = err;
14002         return -rte_errno;
14003 }
14004
14005 /**
14006  * Create shared RSS action.
14007  *
14008  * @param[in] dev
14009  *   Pointer to the Ethernet device structure.
14010  * @param[in] conf
14011  *   Shared action configuration.
14012  * @param[in] rss
14013  *   RSS action specification used to create shared action.
14014  * @param[out] error
14015  *   Perform verbose error reporting if not NULL. Initialized in case of
14016  *   error only.
14017  *
14018  * @return
14019  *   A valid shared action ID in case of success, 0 otherwise and
14020  *   rte_errno is set.
14021  */
14022 static uint32_t
14023 __flow_dv_action_rss_create(struct rte_eth_dev *dev,
14024                             const struct rte_flow_indir_action_conf *conf,
14025                             const struct rte_flow_action_rss *rss,
14026                             struct rte_flow_error *error)
14027 {
14028         struct mlx5_priv *priv = dev->data->dev_private;
14029         struct mlx5_shared_action_rss *shared_rss = NULL;
14030         void *queue = NULL;
14031         struct rte_flow_action_rss *origin;
14032         const uint8_t *rss_key;
14033         uint32_t queue_size = rss->queue_num * sizeof(uint16_t);
14034         uint32_t idx;
14035
14036         RTE_SET_USED(conf);
14037         queue = mlx5_malloc(0, RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14038                             0, SOCKET_ID_ANY);
14039         shared_rss = mlx5_ipool_zmalloc
14040                          (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], &idx);
14041         if (!shared_rss || !queue) {
14042                 rte_flow_error_set(error, ENOMEM,
14043                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14044                                    "cannot allocate resource memory");
14045                 goto error_rss_init;
14046         }
14047         if (idx > (1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET)) {
14048                 rte_flow_error_set(error, E2BIG,
14049                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14050                                    "rss action number out of range");
14051                 goto error_rss_init;
14052         }
14053         shared_rss->ind_tbl = mlx5_malloc(MLX5_MEM_ZERO,
14054                                           sizeof(*shared_rss->ind_tbl),
14055                                           0, SOCKET_ID_ANY);
14056         if (!shared_rss->ind_tbl) {
14057                 rte_flow_error_set(error, ENOMEM,
14058                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14059                                    "cannot allocate resource memory");
14060                 goto error_rss_init;
14061         }
14062         memcpy(queue, rss->queue, queue_size);
14063         shared_rss->ind_tbl->queues = queue;
14064         shared_rss->ind_tbl->queues_n = rss->queue_num;
14065         origin = &shared_rss->origin;
14066         origin->func = rss->func;
14067         origin->level = rss->level;
14068         /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
14069         origin->types = !rss->types ? ETH_RSS_IP : rss->types;
14070         /* NULL RSS key indicates default RSS key. */
14071         rss_key = !rss->key ? rss_hash_default_key : rss->key;
14072         memcpy(shared_rss->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
14073         origin->key = &shared_rss->key[0];
14074         origin->key_len = MLX5_RSS_HASH_KEY_LEN;
14075         origin->queue = queue;
14076         origin->queue_num = rss->queue_num;
14077         if (__flow_dv_action_rss_setup(dev, idx, shared_rss, error))
14078                 goto error_rss_init;
14079         rte_spinlock_init(&shared_rss->action_rss_sl);
14080         __atomic_add_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14081         rte_spinlock_lock(&priv->shared_act_sl);
14082         ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14083                      &priv->rss_shared_actions, idx, shared_rss, next);
14084         rte_spinlock_unlock(&priv->shared_act_sl);
14085         return idx;
14086 error_rss_init:
14087         if (shared_rss) {
14088                 if (shared_rss->ind_tbl)
14089                         mlx5_free(shared_rss->ind_tbl);
14090                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14091                                 idx);
14092         }
14093         if (queue)
14094                 mlx5_free(queue);
14095         return 0;
14096 }
14097
14098 /**
14099  * Destroy the shared RSS action.
14100  * Release related hash RX queue objects.
14101  *
14102  * @param[in] dev
14103  *   Pointer to the Ethernet device structure.
14104  * @param[in] idx
14105  *   The shared RSS action object ID to be removed.
14106  * @param[out] error
14107  *   Perform verbose error reporting if not NULL. Initialized in case of
14108  *   error only.
14109  *
14110  * @return
14111  *   0 on success, otherwise negative errno value.
14112  */
14113 static int
14114 __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
14115                              struct rte_flow_error *error)
14116 {
14117         struct mlx5_priv *priv = dev->data->dev_private;
14118         struct mlx5_shared_action_rss *shared_rss =
14119             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14120         uint32_t old_refcnt = 1;
14121         int remaining;
14122         uint16_t *queue = NULL;
14123
14124         if (!shared_rss)
14125                 return rte_flow_error_set(error, EINVAL,
14126                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14127                                           "invalid shared action");
14128         remaining = __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14129         if (remaining)
14130                 return rte_flow_error_set(error, EBUSY,
14131                                           RTE_FLOW_ERROR_TYPE_ACTION,
14132                                           NULL,
14133                                           "shared rss hrxq has references");
14134         if (!__atomic_compare_exchange_n(&shared_rss->refcnt, &old_refcnt,
14135                                          0, 0, __ATOMIC_ACQUIRE,
14136                                          __ATOMIC_RELAXED))
14137                 return rte_flow_error_set(error, EBUSY,
14138                                           RTE_FLOW_ERROR_TYPE_ACTION,
14139                                           NULL,
14140                                           "shared rss has references");
14141         queue = shared_rss->ind_tbl->queues;
14142         remaining = mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true);
14143         if (remaining)
14144                 return rte_flow_error_set(error, EBUSY,
14145                                           RTE_FLOW_ERROR_TYPE_ACTION,
14146                                           NULL,
14147                                           "shared rss indirection table has"
14148                                           " references");
14149         mlx5_free(queue);
14150         rte_spinlock_lock(&priv->shared_act_sl);
14151         ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14152                      &priv->rss_shared_actions, idx, shared_rss, next);
14153         rte_spinlock_unlock(&priv->shared_act_sl);
14154         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14155                         idx);
14156         return 0;
14157 }
14158
14159 /**
14160  * Create indirect action, lock free,
14161  * (mutex should be acquired by caller).
14162  * Dispatcher for action type specific call.
14163  *
14164  * @param[in] dev
14165  *   Pointer to the Ethernet device structure.
14166  * @param[in] conf
14167  *   Shared action configuration.
14168  * @param[in] action
14169  *   Action specification used to create indirect action.
14170  * @param[out] error
14171  *   Perform verbose error reporting if not NULL. Initialized in case of
14172  *   error only.
14173  *
14174  * @return
14175  *   A valid shared action handle in case of success, NULL otherwise and
14176  *   rte_errno is set.
14177  */
14178 static struct rte_flow_action_handle *
14179 flow_dv_action_create(struct rte_eth_dev *dev,
14180                       const struct rte_flow_indir_action_conf *conf,
14181                       const struct rte_flow_action *action,
14182                       struct rte_flow_error *err)
14183 {
14184         uint32_t idx = 0;
14185         uint32_t ret = 0;
14186
14187         switch (action->type) {
14188         case RTE_FLOW_ACTION_TYPE_RSS:
14189                 ret = __flow_dv_action_rss_create(dev, conf, action->conf, err);
14190                 idx = (MLX5_INDIRECT_ACTION_TYPE_RSS <<
14191                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14192                 break;
14193         case RTE_FLOW_ACTION_TYPE_AGE:
14194                 ret = flow_dv_translate_create_aso_age(dev, action->conf, err);
14195                 idx = (MLX5_INDIRECT_ACTION_TYPE_AGE <<
14196                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14197                 if (ret) {
14198                         struct mlx5_aso_age_action *aso_age =
14199                                               flow_aso_age_get_by_idx(dev, ret);
14200
14201                         if (!aso_age->age_params.context)
14202                                 aso_age->age_params.context =
14203                                                          (void *)(uintptr_t)idx;
14204                 }
14205                 break;
14206         case RTE_FLOW_ACTION_TYPE_COUNT:
14207                 ret = flow_dv_translate_create_counter(dev, NULL, NULL, NULL);
14208                 idx = (MLX5_INDIRECT_ACTION_TYPE_COUNT <<
14209                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14210                 break;
14211         case RTE_FLOW_ACTION_TYPE_CONNTRACK:
14212                 ret = flow_dv_translate_create_conntrack(dev, action->conf,
14213                                                          err);
14214                 idx = (MLX5_INDIRECT_ACTION_TYPE_CT <<
14215                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14216                 break;
14217         default:
14218                 rte_flow_error_set(err, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
14219                                    NULL, "action type not supported");
14220                 break;
14221         }
14222         return ret ? (struct rte_flow_action_handle *)(uintptr_t)idx : NULL;
14223 }
14224
14225 /**
14226  * Destroy the indirect action.
14227  * Release action related resources on the NIC and the memory.
14228  * Lock free, (mutex should be acquired by caller).
14229  * Dispatcher for action type specific call.
14230  *
14231  * @param[in] dev
14232  *   Pointer to the Ethernet device structure.
14233  * @param[in] handle
14234  *   The indirect action object handle to be removed.
14235  * @param[out] error
14236  *   Perform verbose error reporting if not NULL. Initialized in case of
14237  *   error only.
14238  *
14239  * @return
14240  *   0 on success, otherwise negative errno value.
14241  */
14242 static int
14243 flow_dv_action_destroy(struct rte_eth_dev *dev,
14244                        struct rte_flow_action_handle *handle,
14245                        struct rte_flow_error *error)
14246 {
14247         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
14248         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
14249         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
14250         struct mlx5_flow_counter *cnt;
14251         uint32_t no_flow_refcnt = 1;
14252         int ret;
14253
14254         switch (type) {
14255         case MLX5_INDIRECT_ACTION_TYPE_RSS:
14256                 return __flow_dv_action_rss_release(dev, idx, error);
14257         case MLX5_INDIRECT_ACTION_TYPE_COUNT:
14258                 cnt = flow_dv_counter_get_by_idx(dev, idx, NULL);
14259                 if (!__atomic_compare_exchange_n(&cnt->shared_info.refcnt,
14260                                                  &no_flow_refcnt, 1, false,
14261                                                  __ATOMIC_ACQUIRE,
14262                                                  __ATOMIC_RELAXED))
14263                         return rte_flow_error_set(error, EBUSY,
14264                                                   RTE_FLOW_ERROR_TYPE_ACTION,
14265                                                   NULL,
14266                                                   "Indirect count action has references");
14267                 flow_dv_counter_free(dev, idx);
14268                 return 0;
14269         case MLX5_INDIRECT_ACTION_TYPE_AGE:
14270                 ret = flow_dv_aso_age_release(dev, idx);
14271                 if (ret)
14272                         /*
14273                          * In this case, the last flow has a reference will
14274                          * actually release the age action.
14275                          */
14276                         DRV_LOG(DEBUG, "Indirect age action %" PRIu32 " was"
14277                                 " released with references %d.", idx, ret);
14278                 return 0;
14279         case MLX5_INDIRECT_ACTION_TYPE_CT:
14280                 ret = flow_dv_aso_ct_release(dev, idx);
14281                 if (ret)
14282                         DRV_LOG(DEBUG, "Connection tracking object %u still "
14283                                 "has references %d.", idx, ret);
14284                 return 0;
14285         default:
14286                 return rte_flow_error_set(error, ENOTSUP,
14287                                           RTE_FLOW_ERROR_TYPE_ACTION,
14288                                           NULL,
14289                                           "action type not supported");
14290         }
14291 }
14292
14293 /**
14294  * Updates in place shared RSS action configuration.
14295  *
14296  * @param[in] dev
14297  *   Pointer to the Ethernet device structure.
14298  * @param[in] idx
14299  *   The shared RSS action object ID to be updated.
14300  * @param[in] action_conf
14301  *   RSS action specification used to modify *shared_rss*.
14302  * @param[out] error
14303  *   Perform verbose error reporting if not NULL. Initialized in case of
14304  *   error only.
14305  *
14306  * @return
14307  *   0 on success, otherwise negative errno value.
14308  * @note: currently only support update of RSS queues.
14309  */
14310 static int
14311 __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
14312                             const struct rte_flow_action_rss *action_conf,
14313                             struct rte_flow_error *error)
14314 {
14315         struct mlx5_priv *priv = dev->data->dev_private;
14316         struct mlx5_shared_action_rss *shared_rss =
14317             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14318         int ret = 0;
14319         void *queue = NULL;
14320         uint16_t *queue_old = NULL;
14321         uint32_t queue_size = action_conf->queue_num * sizeof(uint16_t);
14322
14323         if (!shared_rss)
14324                 return rte_flow_error_set(error, EINVAL,
14325                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14326                                           "invalid shared action to update");
14327         if (priv->obj_ops.ind_table_modify == NULL)
14328                 return rte_flow_error_set(error, ENOTSUP,
14329                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14330                                           "cannot modify indirection table");
14331         queue = mlx5_malloc(MLX5_MEM_ZERO,
14332                             RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14333                             0, SOCKET_ID_ANY);
14334         if (!queue)
14335                 return rte_flow_error_set(error, ENOMEM,
14336                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14337                                           NULL,
14338                                           "cannot allocate resource memory");
14339         memcpy(queue, action_conf->queue, queue_size);
14340         MLX5_ASSERT(shared_rss->ind_tbl);
14341         rte_spinlock_lock(&shared_rss->action_rss_sl);
14342         queue_old = shared_rss->ind_tbl->queues;
14343         ret = mlx5_ind_table_obj_modify(dev, shared_rss->ind_tbl,
14344                                         queue, action_conf->queue_num, true);
14345         if (ret) {
14346                 mlx5_free(queue);
14347                 ret = rte_flow_error_set(error, rte_errno,
14348                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14349                                           "cannot update indirection table");
14350         } else {
14351                 mlx5_free(queue_old);
14352                 shared_rss->origin.queue = queue;
14353                 shared_rss->origin.queue_num = action_conf->queue_num;
14354         }
14355         rte_spinlock_unlock(&shared_rss->action_rss_sl);
14356         return ret;
14357 }
14358
14359 /*
14360  * Updates in place conntrack context or direction.
14361  * Context update should be synchronized.
14362  *
14363  * @param[in] dev
14364  *   Pointer to the Ethernet device structure.
14365  * @param[in] idx
14366  *   The conntrack object ID to be updated.
14367  * @param[in] update
14368  *   Pointer to the structure of information to update.
14369  * @param[out] error
14370  *   Perform verbose error reporting if not NULL. Initialized in case of
14371  *   error only.
14372  *
14373  * @return
14374  *   0 on success, otherwise negative errno value.
14375  */
14376 static int
14377 __flow_dv_action_ct_update(struct rte_eth_dev *dev, uint32_t idx,
14378                            const struct rte_flow_modify_conntrack *update,
14379                            struct rte_flow_error *error)
14380 {
14381         struct mlx5_priv *priv = dev->data->dev_private;
14382         struct mlx5_aso_ct_action *ct;
14383         const struct rte_flow_action_conntrack *new_prf;
14384         int ret = 0;
14385
14386         ct = flow_aso_ct_get_by_idx(dev, idx);
14387         if (!ct->refcnt)
14388                 return rte_flow_error_set(error, ENOMEM,
14389                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14390                                           NULL,
14391                                           "CT object is inactive");
14392         new_prf = &update->new_ct;
14393         if (update->direction)
14394                 ct->is_original = !!new_prf->is_original_dir;
14395         if (update->state) {
14396                 /* Only validate the profile when it needs to be updated. */
14397                 ret = mlx5_validate_action_ct(dev, new_prf, error);
14398                 if (ret)
14399                         return ret;
14400                 ret = mlx5_aso_ct_update_by_wqe(priv->sh, ct, new_prf);
14401                 if (ret)
14402                         return rte_flow_error_set(error, EIO,
14403                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14404                                         NULL,
14405                                         "Failed to send CT context update WQE");
14406                 /* Block until ready or a failure. */
14407                 ret = mlx5_aso_ct_available(priv->sh, ct);
14408                 if (ret)
14409                         rte_flow_error_set(error, rte_errno,
14410                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14411                                            NULL,
14412                                            "Timeout to get the CT update");
14413         }
14414         return ret;
14415 }
14416
14417 /**
14418  * Updates in place shared action configuration, lock free,
14419  * (mutex should be acquired by caller).
14420  *
14421  * @param[in] dev
14422  *   Pointer to the Ethernet device structure.
14423  * @param[in] handle
14424  *   The indirect action object handle to be updated.
14425  * @param[in] update
14426  *   Action specification used to modify the action pointed by *handle*.
14427  *   *update* could be of same type with the action pointed by the *handle*
14428  *   handle argument, or some other structures like a wrapper, depending on
14429  *   the indirect action type.
14430  * @param[out] error
14431  *   Perform verbose error reporting if not NULL. Initialized in case of
14432  *   error only.
14433  *
14434  * @return
14435  *   0 on success, otherwise negative errno value.
14436  */
14437 static int
14438 flow_dv_action_update(struct rte_eth_dev *dev,
14439                         struct rte_flow_action_handle *handle,
14440                         const void *update,
14441                         struct rte_flow_error *err)
14442 {
14443         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
14444         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
14445         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
14446         const void *action_conf;
14447
14448         switch (type) {
14449         case MLX5_INDIRECT_ACTION_TYPE_RSS:
14450                 action_conf = ((const struct rte_flow_action *)update)->conf;
14451                 return __flow_dv_action_rss_update(dev, idx, action_conf, err);
14452         case MLX5_INDIRECT_ACTION_TYPE_CT:
14453                 return __flow_dv_action_ct_update(dev, idx, update, err);
14454         default:
14455                 return rte_flow_error_set(err, ENOTSUP,
14456                                           RTE_FLOW_ERROR_TYPE_ACTION,
14457                                           NULL,
14458                                           "action type update not supported");
14459         }
14460 }
14461
14462 /**
14463  * Destroy the meter sub policy table rules.
14464  * Lock free, (mutex should be acquired by caller).
14465  *
14466  * @param[in] dev
14467  *   Pointer to Ethernet device.
14468  * @param[in] sub_policy
14469  *   Pointer to meter sub policy table.
14470  */
14471 static void
14472 __flow_dv_destroy_sub_policy_rules(struct rte_eth_dev *dev,
14473                              struct mlx5_flow_meter_sub_policy *sub_policy)
14474 {
14475         struct mlx5_flow_tbl_data_entry *tbl;
14476         int i;
14477
14478         for (i = 0; i < RTE_COLORS; i++) {
14479                 if (sub_policy->color_rule[i]) {
14480                         claim_zero(mlx5_flow_os_destroy_flow
14481                                 (sub_policy->color_rule[i]));
14482                         sub_policy->color_rule[i] = NULL;
14483                 }
14484                 if (sub_policy->color_matcher[i]) {
14485                         tbl = container_of(sub_policy->color_matcher[i]->tbl,
14486                                 typeof(*tbl), tbl);
14487                         mlx5_cache_unregister(&tbl->matchers,
14488                                       &sub_policy->color_matcher[i]->entry);
14489                         sub_policy->color_matcher[i] = NULL;
14490                 }
14491         }
14492         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
14493                 if (sub_policy->rix_hrxq[i]) {
14494                         mlx5_hrxq_release(dev, sub_policy->rix_hrxq[i]);
14495                         sub_policy->rix_hrxq[i] = 0;
14496                 }
14497                 if (sub_policy->jump_tbl[i]) {
14498                         flow_dv_tbl_resource_release(MLX5_SH(dev),
14499                         sub_policy->jump_tbl[i]);
14500                         sub_policy->jump_tbl[i] = NULL;
14501                 }
14502         }
14503         if (sub_policy->tbl_rsc) {
14504                 flow_dv_tbl_resource_release(MLX5_SH(dev),
14505                         sub_policy->tbl_rsc);
14506                 sub_policy->tbl_rsc = NULL;
14507         }
14508 }
14509
14510 /**
14511  * Destroy policy rules, lock free,
14512  * (mutex should be acquired by caller).
14513  * Dispatcher for action type specific call.
14514  *
14515  * @param[in] dev
14516  *   Pointer to the Ethernet device structure.
14517  * @param[in] mtr_policy
14518  *   Meter policy struct.
14519  */
14520 static void
14521 flow_dv_destroy_policy_rules(struct rte_eth_dev *dev,
14522                       struct mlx5_flow_meter_policy *mtr_policy)
14523 {
14524         uint32_t i, j;
14525         struct mlx5_flow_meter_sub_policy *sub_policy;
14526         uint16_t sub_policy_num;
14527
14528         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
14529                 sub_policy_num = (mtr_policy->sub_policy_num >>
14530                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
14531                         MLX5_MTR_SUB_POLICY_NUM_MASK;
14532                 for (j = 0; j < sub_policy_num; j++) {
14533                         sub_policy = mtr_policy->sub_policys[i][j];
14534                         if (sub_policy)
14535                                 __flow_dv_destroy_sub_policy_rules
14536                                                 (dev, sub_policy);
14537                 }
14538         }
14539 }
14540
14541 /**
14542  * Destroy policy action, lock free,
14543  * (mutex should be acquired by caller).
14544  * Dispatcher for action type specific call.
14545  *
14546  * @param[in] dev
14547  *   Pointer to the Ethernet device structure.
14548  * @param[in] mtr_policy
14549  *   Meter policy struct.
14550  */
14551 static void
14552 flow_dv_destroy_mtr_policy_acts(struct rte_eth_dev *dev,
14553                       struct mlx5_flow_meter_policy *mtr_policy)
14554 {
14555         struct rte_flow_action *rss_action;
14556         struct mlx5_flow_handle dev_handle;
14557         uint32_t i, j;
14558
14559         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
14560                 if (mtr_policy->act_cnt[i].rix_mark) {
14561                         flow_dv_tag_release(dev,
14562                                 mtr_policy->act_cnt[i].rix_mark);
14563                         mtr_policy->act_cnt[i].rix_mark = 0;
14564                 }
14565                 if (mtr_policy->act_cnt[i].modify_hdr) {
14566                         dev_handle.dvh.modify_hdr =
14567                                 mtr_policy->act_cnt[i].modify_hdr;
14568                         flow_dv_modify_hdr_resource_release(dev, &dev_handle);
14569                 }
14570                 switch (mtr_policy->act_cnt[i].fate_action) {
14571                 case MLX5_FLOW_FATE_SHARED_RSS:
14572                         rss_action = mtr_policy->act_cnt[i].rss;
14573                         mlx5_free(rss_action);
14574                         break;
14575                 case MLX5_FLOW_FATE_PORT_ID:
14576                         if (mtr_policy->act_cnt[i].rix_port_id_action) {
14577                                 flow_dv_port_id_action_resource_release(dev,
14578                                 mtr_policy->act_cnt[i].rix_port_id_action);
14579                                 mtr_policy->act_cnt[i].rix_port_id_action = 0;
14580                         }
14581                         break;
14582                 case MLX5_FLOW_FATE_DROP:
14583                 case MLX5_FLOW_FATE_JUMP:
14584                         for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
14585                                 mtr_policy->act_cnt[i].dr_jump_action[j] =
14586                                                 NULL;
14587                         break;
14588                 default:
14589                         /*Queue action do nothing*/
14590                         break;
14591                 }
14592         }
14593         for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
14594                 mtr_policy->dr_drop_action[j] = NULL;
14595 }
14596
14597 /**
14598  * Create policy action per domain, lock free,
14599  * (mutex should be acquired by caller).
14600  * Dispatcher for action type specific call.
14601  *
14602  * @param[in] dev
14603  *   Pointer to the Ethernet device structure.
14604  * @param[in] mtr_policy
14605  *   Meter policy struct.
14606  * @param[in] action
14607  *   Action specification used to create meter actions.
14608  * @param[out] error
14609  *   Perform verbose error reporting if not NULL. Initialized in case of
14610  *   error only.
14611  *
14612  * @return
14613  *   0 on success, otherwise negative errno value.
14614  */
14615 static int
14616 __flow_dv_create_domain_policy_acts(struct rte_eth_dev *dev,
14617                         struct mlx5_flow_meter_policy *mtr_policy,
14618                         const struct rte_flow_action *actions[RTE_COLORS],
14619                         enum mlx5_meter_domain domain,
14620                         struct rte_mtr_error *error)
14621 {
14622         struct mlx5_priv *priv = dev->data->dev_private;
14623         struct rte_flow_error flow_err;
14624         const struct rte_flow_action *act;
14625         uint64_t action_flags = 0;
14626         struct mlx5_flow_handle dh;
14627         struct mlx5_flow dev_flow;
14628         struct mlx5_flow_dv_port_id_action_resource port_id_action;
14629         int i, ret;
14630         uint8_t egress, transfer;
14631         struct mlx5_meter_policy_action_container *act_cnt = NULL;
14632         union {
14633                 struct mlx5_flow_dv_modify_hdr_resource res;
14634                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
14635                             sizeof(struct mlx5_modification_cmd) *
14636                             (MLX5_MAX_MODIFY_NUM + 1)];
14637         } mhdr_dummy;
14638
14639         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
14640         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
14641         memset(&dh, 0, sizeof(struct mlx5_flow_handle));
14642         memset(&dev_flow, 0, sizeof(struct mlx5_flow));
14643         memset(&port_id_action, 0,
14644                 sizeof(struct mlx5_flow_dv_port_id_action_resource));
14645         dev_flow.handle = &dh;
14646         dev_flow.dv.port_id_action = &port_id_action;
14647         dev_flow.external = true;
14648         for (i = 0; i < RTE_COLORS; i++) {
14649                 if (i < MLX5_MTR_RTE_COLORS)
14650                         act_cnt = &mtr_policy->act_cnt[i];
14651                 for (act = actions[i];
14652                         act && act->type != RTE_FLOW_ACTION_TYPE_END;
14653                         act++) {
14654                         switch (act->type) {
14655                         case RTE_FLOW_ACTION_TYPE_MARK:
14656                         {
14657                                 uint32_t tag_be = mlx5_flow_mark_set
14658                                         (((const struct rte_flow_action_mark *)
14659                                         (act->conf))->id);
14660
14661                                 if (i >= MLX5_MTR_RTE_COLORS)
14662                                         return -rte_mtr_error_set(error,
14663                                           ENOTSUP,
14664                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
14665                                           NULL,
14666                                           "cannot create policy "
14667                                           "mark action for this color");
14668                                 dev_flow.handle->mark = 1;
14669                                 if (flow_dv_tag_resource_register(dev, tag_be,
14670                                                   &dev_flow, &flow_err))
14671                                         return -rte_mtr_error_set(error,
14672                                         ENOTSUP,
14673                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14674                                         NULL,
14675                                         "cannot setup policy mark action");
14676                                 MLX5_ASSERT(dev_flow.dv.tag_resource);
14677                                 act_cnt->rix_mark =
14678                                         dev_flow.handle->dvh.rix_tag;
14679                                 if (action_flags & MLX5_FLOW_ACTION_QUEUE) {
14680                                         dev_flow.handle->rix_hrxq =
14681                         mtr_policy->sub_policys[domain][0]->rix_hrxq[i];
14682                                         flow_drv_rxq_flags_set(dev,
14683                                                 dev_flow.handle);
14684                                 }
14685                                 action_flags |= MLX5_FLOW_ACTION_MARK;
14686                                 break;
14687                         }
14688                         case RTE_FLOW_ACTION_TYPE_SET_TAG:
14689                         {
14690                                 struct mlx5_flow_dv_modify_hdr_resource
14691                                         *mhdr_res = &mhdr_dummy.res;
14692
14693                                 if (i >= MLX5_MTR_RTE_COLORS)
14694                                         return -rte_mtr_error_set(error,
14695                                           ENOTSUP,
14696                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
14697                                           NULL,
14698                                           "cannot create policy "
14699                                           "set tag action for this color");
14700                                 memset(mhdr_res, 0, sizeof(*mhdr_res));
14701                                 mhdr_res->ft_type = transfer ?
14702                                         MLX5DV_FLOW_TABLE_TYPE_FDB :
14703                                         egress ?
14704                                         MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
14705                                         MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
14706                                 if (flow_dv_convert_action_set_tag
14707                                 (dev, mhdr_res,
14708                                 (const struct rte_flow_action_set_tag *)
14709                                 act->conf,  &flow_err))
14710                                         return -rte_mtr_error_set(error,
14711                                         ENOTSUP,
14712                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14713                                         NULL, "cannot convert policy "
14714                                         "set tag action");
14715                                 if (!mhdr_res->actions_num)
14716                                         return -rte_mtr_error_set(error,
14717                                         ENOTSUP,
14718                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14719                                         NULL, "cannot find policy "
14720                                         "set tag action");
14721                                 /* create modify action if needed. */
14722                                 dev_flow.dv.group = 1;
14723                                 if (flow_dv_modify_hdr_resource_register
14724                                         (dev, mhdr_res, &dev_flow, &flow_err))
14725                                         return -rte_mtr_error_set(error,
14726                                         ENOTSUP,
14727                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14728                                         NULL, "cannot register policy "
14729                                         "set tag action");
14730                                 act_cnt->modify_hdr =
14731                                 dev_flow.handle->dvh.modify_hdr;
14732                                 if (action_flags & MLX5_FLOW_ACTION_QUEUE) {
14733                                         dev_flow.handle->rix_hrxq =
14734                                 mtr_policy->sub_policys[domain][0]->rix_hrxq[i];
14735                                         flow_drv_rxq_flags_set(dev,
14736                                                 dev_flow.handle);
14737                                 }
14738                                 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
14739                                 break;
14740                         }
14741                         case RTE_FLOW_ACTION_TYPE_DROP:
14742                         {
14743                                 struct mlx5_flow_mtr_mng *mtrmng =
14744                                                 priv->sh->mtrmng;
14745                                 struct mlx5_flow_tbl_data_entry *tbl_data;
14746
14747                                 /*
14748                                  * Create the drop table with
14749                                  * METER DROP level.
14750                                  */
14751                                 if (!mtrmng->drop_tbl[domain]) {
14752                                         mtrmng->drop_tbl[domain] =
14753                                         flow_dv_tbl_resource_get(dev,
14754                                         MLX5_FLOW_TABLE_LEVEL_METER,
14755                                         egress, transfer, false, NULL, 0,
14756                                         0, MLX5_MTR_TABLE_ID_DROP, &flow_err);
14757                                         if (!mtrmng->drop_tbl[domain])
14758                                                 return -rte_mtr_error_set
14759                                         (error, ENOTSUP,
14760                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14761                                         NULL,
14762                                         "Failed to create meter drop table");
14763                                 }
14764                                 tbl_data = container_of
14765                                 (mtrmng->drop_tbl[domain],
14766                                 struct mlx5_flow_tbl_data_entry, tbl);
14767                                 if (i < MLX5_MTR_RTE_COLORS) {
14768                                         act_cnt->dr_jump_action[domain] =
14769                                                 tbl_data->jump.action;
14770                                         act_cnt->fate_action =
14771                                                 MLX5_FLOW_FATE_DROP;
14772                                 }
14773                                 if (i == RTE_COLOR_RED)
14774                                         mtr_policy->dr_drop_action[domain] =
14775                                                 tbl_data->jump.action;
14776                                 action_flags |= MLX5_FLOW_ACTION_DROP;
14777                                 break;
14778                         }
14779                         case RTE_FLOW_ACTION_TYPE_QUEUE:
14780                         {
14781                                 struct mlx5_hrxq *hrxq;
14782                                 uint32_t hrxq_idx;
14783                                 struct mlx5_flow_rss_desc rss_desc;
14784                                 struct mlx5_flow_meter_sub_policy *sub_policy =
14785                                 mtr_policy->sub_policys[domain][0];
14786
14787                                 if (i >= MLX5_MTR_RTE_COLORS)
14788                                         return -rte_mtr_error_set(error,
14789                                         ENOTSUP,
14790                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14791                                         NULL, "cannot create policy "
14792                                         "fate queue for this color");
14793                                 memset(&rss_desc, 0,
14794                                         sizeof(struct mlx5_flow_rss_desc));
14795                                 rss_desc.queue_num = 1;
14796                                 rss_desc.const_q = act->conf;
14797                                 hrxq = flow_dv_hrxq_prepare(dev, &dev_flow,
14798                                                     &rss_desc, &hrxq_idx);
14799                                 if (!hrxq)
14800                                         return -rte_mtr_error_set(error,
14801                                         ENOTSUP,
14802                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14803                                         NULL,
14804                                         "cannot create policy fate queue");
14805                                 sub_policy->rix_hrxq[i] = hrxq_idx;
14806                                 act_cnt->fate_action =
14807                                         MLX5_FLOW_FATE_QUEUE;
14808                                 dev_flow.handle->fate_action =
14809                                         MLX5_FLOW_FATE_QUEUE;
14810                                 if (action_flags & MLX5_FLOW_ACTION_MARK ||
14811                                     action_flags & MLX5_FLOW_ACTION_SET_TAG) {
14812                                         dev_flow.handle->rix_hrxq = hrxq_idx;
14813                                         flow_drv_rxq_flags_set(dev,
14814                                                 dev_flow.handle);
14815                                 }
14816                                 action_flags |= MLX5_FLOW_ACTION_QUEUE;
14817                                 break;
14818                         }
14819                         case RTE_FLOW_ACTION_TYPE_RSS:
14820                         {
14821                                 int rss_size;
14822
14823                                 if (i >= MLX5_MTR_RTE_COLORS)
14824                                         return -rte_mtr_error_set(error,
14825                                           ENOTSUP,
14826                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
14827                                           NULL,
14828                                           "cannot create policy "
14829                                           "rss action for this color");
14830                                 /*
14831                                  * Save RSS conf into policy struct
14832                                  * for translate stage.
14833                                  */
14834                                 rss_size = (int)rte_flow_conv
14835                                         (RTE_FLOW_CONV_OP_ACTION,
14836                                         NULL, 0, act, &flow_err);
14837                                 if (rss_size <= 0)
14838                                         return -rte_mtr_error_set(error,
14839                                           ENOTSUP,
14840                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
14841                                           NULL, "Get the wrong "
14842                                           "rss action struct size");
14843                                 act_cnt->rss = mlx5_malloc(MLX5_MEM_ZERO,
14844                                                 rss_size, 0, SOCKET_ID_ANY);
14845                                 if (!act_cnt->rss)
14846                                         return -rte_mtr_error_set(error,
14847                                           ENOTSUP,
14848                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
14849                                           NULL,
14850                                           "Fail to malloc rss action memory");
14851                                 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ACTION,
14852                                         act_cnt->rss, rss_size,
14853                                         act, &flow_err);
14854                                 if (ret < 0)
14855                                         return -rte_mtr_error_set(error,
14856                                           ENOTSUP,
14857                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
14858                                           NULL, "Fail to save "
14859                                           "rss action into policy struct");
14860                                 act_cnt->fate_action =
14861                                         MLX5_FLOW_FATE_SHARED_RSS;
14862                                 action_flags |= MLX5_FLOW_ACTION_RSS;
14863                                 break;
14864                         }
14865                         case RTE_FLOW_ACTION_TYPE_PORT_ID:
14866                         {
14867                                 struct mlx5_flow_dv_port_id_action_resource
14868                                         port_id_resource;
14869                                 uint32_t port_id = 0;
14870
14871                                 if (i >= MLX5_MTR_RTE_COLORS)
14872                                         return -rte_mtr_error_set(error,
14873                                         ENOTSUP,
14874                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14875                                         NULL, "cannot create policy "
14876                                         "port action for this color");
14877                                 memset(&port_id_resource, 0,
14878                                         sizeof(port_id_resource));
14879                                 if (flow_dv_translate_action_port_id(dev, act,
14880                                                 &port_id, &flow_err))
14881                                         return -rte_mtr_error_set(error,
14882                                         ENOTSUP,
14883                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14884                                         NULL, "cannot translate "
14885                                         "policy port action");
14886                                 port_id_resource.port_id = port_id;
14887                                 if (flow_dv_port_id_action_resource_register
14888                                         (dev, &port_id_resource,
14889                                         &dev_flow, &flow_err))
14890                                         return -rte_mtr_error_set(error,
14891                                         ENOTSUP,
14892                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14893                                         NULL, "cannot setup "
14894                                         "policy port action");
14895                                 act_cnt->rix_port_id_action =
14896                                         dev_flow.handle->rix_port_id_action;
14897                                 act_cnt->fate_action =
14898                                         MLX5_FLOW_FATE_PORT_ID;
14899                                 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
14900                                 break;
14901                         }
14902                         case RTE_FLOW_ACTION_TYPE_JUMP:
14903                         {
14904                                 uint32_t jump_group = 0;
14905                                 uint32_t table = 0;
14906                                 struct mlx5_flow_tbl_data_entry *tbl_data;
14907                                 struct flow_grp_info grp_info = {
14908                                         .external = !!dev_flow.external,
14909                                         .transfer = !!transfer,
14910                                         .fdb_def_rule = !!priv->fdb_def_rule,
14911                                         .std_tbl_fix = 0,
14912                                         .skip_scale = dev_flow.skip_scale &
14913                                         (1 << MLX5_SCALE_FLOW_GROUP_BIT),
14914                                 };
14915                                 struct mlx5_flow_meter_sub_policy *sub_policy =
14916                                 mtr_policy->sub_policys[domain][0];
14917
14918                                 if (i >= MLX5_MTR_RTE_COLORS)
14919                                         return -rte_mtr_error_set(error,
14920                                           ENOTSUP,
14921                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
14922                                           NULL,
14923                                           "cannot create policy "
14924                                           "jump action for this color");
14925                                 jump_group =
14926                                 ((const struct rte_flow_action_jump *)
14927                                                         act->conf)->group;
14928                                 if (mlx5_flow_group_to_table(dev, NULL,
14929                                                        jump_group,
14930                                                        &table,
14931                                                        &grp_info, &flow_err))
14932                                         return -rte_mtr_error_set(error,
14933                                         ENOTSUP,
14934                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14935                                         NULL, "cannot setup "
14936                                         "policy jump action");
14937                                 sub_policy->jump_tbl[i] =
14938                                 flow_dv_tbl_resource_get(dev,
14939                                         table, egress,
14940                                         transfer,
14941                                         !!dev_flow.external,
14942                                         NULL, jump_group, 0,
14943                                         0, &flow_err);
14944                                 if
14945                                 (!sub_policy->jump_tbl[i])
14946                                         return  -rte_mtr_error_set(error,
14947                                         ENOTSUP,
14948                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14949                                         NULL, "cannot create jump action.");
14950                                 tbl_data = container_of
14951                                 (sub_policy->jump_tbl[i],
14952                                 struct mlx5_flow_tbl_data_entry, tbl);
14953                                 act_cnt->dr_jump_action[domain] =
14954                                         tbl_data->jump.action;
14955                                 act_cnt->fate_action =
14956                                         MLX5_FLOW_FATE_JUMP;
14957                                 action_flags |= MLX5_FLOW_ACTION_JUMP;
14958                                 break;
14959                         }
14960                         default:
14961                                 return -rte_mtr_error_set(error, ENOTSUP,
14962                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
14963                                           NULL, "action type not supported");
14964                         }
14965                 }
14966         }
14967         return 0;
14968 }
14969
14970 /**
14971  * Create policy action per domain, lock free,
14972  * (mutex should be acquired by caller).
14973  * Dispatcher for action type specific call.
14974  *
14975  * @param[in] dev
14976  *   Pointer to the Ethernet device structure.
14977  * @param[in] mtr_policy
14978  *   Meter policy struct.
14979  * @param[in] action
14980  *   Action specification used to create meter actions.
14981  * @param[out] error
14982  *   Perform verbose error reporting if not NULL. Initialized in case of
14983  *   error only.
14984  *
14985  * @return
14986  *   0 on success, otherwise negative errno value.
14987  */
14988 static int
14989 flow_dv_create_mtr_policy_acts(struct rte_eth_dev *dev,
14990                       struct mlx5_flow_meter_policy *mtr_policy,
14991                       const struct rte_flow_action *actions[RTE_COLORS],
14992                       struct rte_mtr_error *error)
14993 {
14994         int ret, i;
14995         uint16_t sub_policy_num;
14996
14997         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
14998                 sub_policy_num = (mtr_policy->sub_policy_num >>
14999                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15000                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15001                 if (sub_policy_num) {
15002                         ret = __flow_dv_create_domain_policy_acts(dev,
15003                                 mtr_policy, actions,
15004                                 (enum mlx5_meter_domain)i, error);
15005                         if (ret)
15006                                 return ret;
15007                 }
15008         }
15009         return 0;
15010 }
15011
15012 /**
15013  * Query a DV flow rule for its statistics via DevX.
15014  *
15015  * @param[in] dev
15016  *   Pointer to Ethernet device.
15017  * @param[in] cnt_idx
15018  *   Index to the flow counter.
15019  * @param[out] data
15020  *   Data retrieved by the query.
15021  * @param[out] error
15022  *   Perform verbose error reporting if not NULL.
15023  *
15024  * @return
15025  *   0 on success, a negative errno value otherwise and rte_errno is set.
15026  */
15027 static int
15028 flow_dv_query_count(struct rte_eth_dev *dev, uint32_t cnt_idx, void *data,
15029                     struct rte_flow_error *error)
15030 {
15031         struct mlx5_priv *priv = dev->data->dev_private;
15032         struct rte_flow_query_count *qc = data;
15033
15034         if (!priv->config.devx)
15035                 return rte_flow_error_set(error, ENOTSUP,
15036                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15037                                           NULL,
15038                                           "counters are not supported");
15039         if (cnt_idx) {
15040                 uint64_t pkts, bytes;
15041                 struct mlx5_flow_counter *cnt;
15042                 int err = _flow_dv_query_count(dev, cnt_idx, &pkts, &bytes);
15043
15044                 if (err)
15045                         return rte_flow_error_set(error, -err,
15046                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15047                                         NULL, "cannot read counters");
15048                 cnt = flow_dv_counter_get_by_idx(dev, cnt_idx, NULL);
15049                 qc->hits_set = 1;
15050                 qc->bytes_set = 1;
15051                 qc->hits = pkts - cnt->hits;
15052                 qc->bytes = bytes - cnt->bytes;
15053                 if (qc->reset) {
15054                         cnt->hits = pkts;
15055                         cnt->bytes = bytes;
15056                 }
15057                 return 0;
15058         }
15059         return rte_flow_error_set(error, EINVAL,
15060                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15061                                   NULL,
15062                                   "counters are not available");
15063 }
15064
15065 static int
15066 flow_dv_action_query(struct rte_eth_dev *dev,
15067                      const struct rte_flow_action_handle *handle, void *data,
15068                      struct rte_flow_error *error)
15069 {
15070         struct mlx5_age_param *age_param;
15071         struct rte_flow_query_age *resp;
15072         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15073         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15074         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15075         struct mlx5_priv *priv = dev->data->dev_private;
15076         struct mlx5_aso_ct_action *ct;
15077
15078         switch (type) {
15079         case MLX5_INDIRECT_ACTION_TYPE_AGE:
15080                 age_param = &flow_aso_age_get_by_idx(dev, idx)->age_params;
15081                 resp = data;
15082                 resp->aged = __atomic_load_n(&age_param->state,
15083                                               __ATOMIC_RELAXED) == AGE_TMOUT ?
15084                                                                           1 : 0;
15085                 resp->sec_since_last_hit_valid = !resp->aged;
15086                 if (resp->sec_since_last_hit_valid)
15087                         resp->sec_since_last_hit = __atomic_load_n
15088                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15089                 return 0;
15090         case MLX5_INDIRECT_ACTION_TYPE_COUNT:
15091                 return flow_dv_query_count(dev, idx, data, error);
15092         case MLX5_INDIRECT_ACTION_TYPE_CT:
15093                 ct = flow_aso_ct_get_by_idx(dev, idx);
15094                 if (!ct->refcnt)
15095                         return rte_flow_error_set(error, EFAULT,
15096                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15097                                         NULL,
15098                                         "CT object is inactive");
15099                 ((struct rte_flow_action_conntrack *)data)->peer_port =
15100                                                         ct->peer;
15101                 ((struct rte_flow_action_conntrack *)data)->is_original_dir =
15102                                                         ct->is_original;
15103                 if (mlx5_aso_ct_query_by_wqe(priv->sh, ct, data))
15104                         return rte_flow_error_set(error, EIO,
15105                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15106                                         NULL,
15107                                         "Failed to query CT context");
15108                 return 0;
15109         default:
15110                 return rte_flow_error_set(error, ENOTSUP,
15111                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15112                                           "action type query not supported");
15113         }
15114 }
15115
15116 /**
15117  * Query a flow rule AGE action for aging information.
15118  *
15119  * @param[in] dev
15120  *   Pointer to Ethernet device.
15121  * @param[in] flow
15122  *   Pointer to the sub flow.
15123  * @param[out] data
15124  *   data retrieved by the query.
15125  * @param[out] error
15126  *   Perform verbose error reporting if not NULL.
15127  *
15128  * @return
15129  *   0 on success, a negative errno value otherwise and rte_errno is set.
15130  */
15131 static int
15132 flow_dv_query_age(struct rte_eth_dev *dev, struct rte_flow *flow,
15133                   void *data, struct rte_flow_error *error)
15134 {
15135         struct rte_flow_query_age *resp = data;
15136         struct mlx5_age_param *age_param;
15137
15138         if (flow->age) {
15139                 struct mlx5_aso_age_action *act =
15140                                      flow_aso_age_get_by_idx(dev, flow->age);
15141
15142                 age_param = &act->age_params;
15143         } else if (flow->counter) {
15144                 age_param = flow_dv_counter_idx_get_age(dev, flow->counter);
15145
15146                 if (!age_param || !age_param->timeout)
15147                         return rte_flow_error_set
15148                                         (error, EINVAL,
15149                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15150                                          NULL, "cannot read age data");
15151         } else {
15152                 return rte_flow_error_set(error, EINVAL,
15153                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15154                                           NULL, "age data not available");
15155         }
15156         resp->aged = __atomic_load_n(&age_param->state, __ATOMIC_RELAXED) ==
15157                                      AGE_TMOUT ? 1 : 0;
15158         resp->sec_since_last_hit_valid = !resp->aged;
15159         if (resp->sec_since_last_hit_valid)
15160                 resp->sec_since_last_hit = __atomic_load_n
15161                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15162         return 0;
15163 }
15164
15165 /**
15166  * Query a flow.
15167  *
15168  * @see rte_flow_query()
15169  * @see rte_flow_ops
15170  */
15171 static int
15172 flow_dv_query(struct rte_eth_dev *dev,
15173               struct rte_flow *flow __rte_unused,
15174               const struct rte_flow_action *actions __rte_unused,
15175               void *data __rte_unused,
15176               struct rte_flow_error *error __rte_unused)
15177 {
15178         int ret = -EINVAL;
15179
15180         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
15181                 switch (actions->type) {
15182                 case RTE_FLOW_ACTION_TYPE_VOID:
15183                         break;
15184                 case RTE_FLOW_ACTION_TYPE_COUNT:
15185                         ret = flow_dv_query_count(dev, flow->counter, data,
15186                                                   error);
15187                         break;
15188                 case RTE_FLOW_ACTION_TYPE_AGE:
15189                         ret = flow_dv_query_age(dev, flow, data, error);
15190                         break;
15191                 default:
15192                         return rte_flow_error_set(error, ENOTSUP,
15193                                                   RTE_FLOW_ERROR_TYPE_ACTION,
15194                                                   actions,
15195                                                   "action not supported");
15196                 }
15197         }
15198         return ret;
15199 }
15200
15201 /**
15202  * Destroy the meter table set.
15203  * Lock free, (mutex should be acquired by caller).
15204  *
15205  * @param[in] dev
15206  *   Pointer to Ethernet device.
15207  * @param[in] fm
15208  *   Meter information table.
15209  */
15210 static void
15211 flow_dv_destroy_mtr_tbls(struct rte_eth_dev *dev,
15212                         struct mlx5_flow_meter_info *fm)
15213 {
15214         struct mlx5_priv *priv = dev->data->dev_private;
15215         int i;
15216
15217         if (!fm || !priv->config.dv_flow_en)
15218                 return;
15219         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15220                 if (fm->drop_rule[i]) {
15221                         claim_zero(mlx5_flow_os_destroy_flow(fm->drop_rule[i]));
15222                         fm->drop_rule[i] = NULL;
15223                 }
15224         }
15225 }
15226
15227 static void
15228 flow_dv_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
15229 {
15230         struct mlx5_priv *priv = dev->data->dev_private;
15231         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
15232         struct mlx5_flow_tbl_data_entry *tbl;
15233         int i, j;
15234
15235         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15236                 if (mtrmng->def_rule[i]) {
15237                         claim_zero(mlx5_flow_os_destroy_flow
15238                                         (mtrmng->def_rule[i]));
15239                         mtrmng->def_rule[i] = NULL;
15240                 }
15241                 if (mtrmng->def_matcher[i]) {
15242                         tbl = container_of(mtrmng->def_matcher[i]->tbl,
15243                                 struct mlx5_flow_tbl_data_entry, tbl);
15244                         mlx5_cache_unregister(&tbl->matchers,
15245                                       &mtrmng->def_matcher[i]->entry);
15246                         mtrmng->def_matcher[i] = NULL;
15247                 }
15248                 for (j = 0; j < MLX5_REG_BITS; j++) {
15249                         if (mtrmng->drop_matcher[i][j]) {
15250                                 tbl =
15251                                 container_of(mtrmng->drop_matcher[i][j]->tbl,
15252                                              struct mlx5_flow_tbl_data_entry,
15253                                              tbl);
15254                                 mlx5_cache_unregister(&tbl->matchers,
15255                                         &mtrmng->drop_matcher[i][j]->entry);
15256                                 mtrmng->drop_matcher[i][j] = NULL;
15257                         }
15258                 }
15259                 if (mtrmng->drop_tbl[i]) {
15260                         flow_dv_tbl_resource_release(MLX5_SH(dev),
15261                                 mtrmng->drop_tbl[i]);
15262                         mtrmng->drop_tbl[i] = NULL;
15263                 }
15264         }
15265 }
15266
15267 /* Number of meter flow actions, count and jump or count and drop. */
15268 #define METER_ACTIONS 2
15269
15270 static void
15271 __flow_dv_destroy_domain_def_policy(struct rte_eth_dev *dev,
15272                               enum mlx5_meter_domain domain)
15273 {
15274         struct mlx5_priv *priv = dev->data->dev_private;
15275         struct mlx5_flow_meter_def_policy *def_policy =
15276                         priv->sh->mtrmng->def_policy[domain];
15277
15278         __flow_dv_destroy_sub_policy_rules(dev, &def_policy->sub_policy);
15279         mlx5_free(def_policy);
15280         priv->sh->mtrmng->def_policy[domain] = NULL;
15281 }
15282
15283 /**
15284  * Destroy the default policy table set.
15285  *
15286  * @param[in] dev
15287  *   Pointer to Ethernet device.
15288  */
15289 static void
15290 flow_dv_destroy_def_policy(struct rte_eth_dev *dev)
15291 {
15292         struct mlx5_priv *priv = dev->data->dev_private;
15293         int i;
15294
15295         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++)
15296                 if (priv->sh->mtrmng->def_policy[i])
15297                         __flow_dv_destroy_domain_def_policy(dev,
15298                                         (enum mlx5_meter_domain)i);
15299         priv->sh->mtrmng->def_policy_id = MLX5_INVALID_POLICY_ID;
15300 }
15301
15302 static int
15303 __flow_dv_create_policy_flow(struct rte_eth_dev *dev,
15304                         uint32_t color_reg_c_idx,
15305                         enum rte_color color, void *matcher_object,
15306                         int actions_n, void *actions,
15307                         bool is_default_policy, void **rule,
15308                         const struct rte_flow_attr *attr)
15309 {
15310         int ret;
15311         struct mlx5_flow_dv_match_params value = {
15312                 .size = sizeof(value.buf) -
15313                         MLX5_ST_SZ_BYTES(fte_match_set_misc4),
15314         };
15315         struct mlx5_flow_dv_match_params matcher = {
15316                 .size = sizeof(matcher.buf) -
15317                         MLX5_ST_SZ_BYTES(fte_match_set_misc4),
15318         };
15319         struct mlx5_priv *priv = dev->data->dev_private;
15320
15321         if (!is_default_policy && (priv->representor || priv->master)) {
15322                 if (flow_dv_translate_item_port_id(dev, matcher.buf,
15323                                                    value.buf, NULL, attr)) {
15324                         DRV_LOG(ERR,
15325                         "Failed to create meter policy flow with port.");
15326                         return -1;
15327                 }
15328         }
15329         flow_dv_match_meta_reg(matcher.buf, value.buf,
15330                                 (enum modify_reg)color_reg_c_idx,
15331                                 rte_col_2_mlx5_col(color),
15332                                 UINT32_MAX);
15333         ret = mlx5_flow_os_create_flow(matcher_object,
15334                         (void *)&value, actions_n, actions, rule);
15335         if (ret) {
15336                 DRV_LOG(ERR, "Failed to create meter policy flow.");
15337                 return -1;
15338         }
15339         return 0;
15340 }
15341
15342 static int
15343 __flow_dv_create_policy_matcher(struct rte_eth_dev *dev,
15344                         uint32_t color_reg_c_idx,
15345                         uint16_t priority,
15346                         struct mlx5_flow_meter_sub_policy *sub_policy,
15347                         const struct rte_flow_attr *attr,
15348                         bool is_default_policy,
15349                         struct rte_flow_error *error)
15350 {
15351         struct mlx5_cache_entry *entry;
15352         struct mlx5_flow_tbl_resource *tbl_rsc = sub_policy->tbl_rsc;
15353         struct mlx5_flow_dv_matcher matcher = {
15354                 .mask = {
15355                         .size = sizeof(matcher.mask.buf) -
15356                                 MLX5_ST_SZ_BYTES(fte_match_set_misc4),
15357                 },
15358                 .tbl = tbl_rsc,
15359         };
15360         struct mlx5_flow_dv_match_params value = {
15361                 .size = sizeof(value.buf) -
15362                         MLX5_ST_SZ_BYTES(fte_match_set_misc4),
15363         };
15364         struct mlx5_flow_cb_ctx ctx = {
15365                 .error = error,
15366                 .data = &matcher,
15367         };
15368         struct mlx5_flow_tbl_data_entry *tbl_data;
15369         struct mlx5_priv *priv = dev->data->dev_private;
15370         uint32_t color_mask = (UINT32_C(1) << MLX5_MTR_COLOR_BITS) - 1;
15371
15372         if (!is_default_policy && (priv->representor || priv->master)) {
15373                 if (flow_dv_translate_item_port_id(dev, matcher.mask.buf,
15374                                                    value.buf, NULL, attr)) {
15375                         DRV_LOG(ERR,
15376                         "Failed to register meter drop matcher with port.");
15377                         return -1;
15378                 }
15379         }
15380         tbl_data = container_of(tbl_rsc, struct mlx5_flow_tbl_data_entry, tbl);
15381         if (priority < RTE_COLOR_RED)
15382                 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
15383                         (enum modify_reg)color_reg_c_idx, 0, color_mask);
15384         matcher.priority = priority;
15385         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
15386                                         matcher.mask.size);
15387         entry = mlx5_cache_register(&tbl_data->matchers, &ctx);
15388         if (!entry) {
15389                 DRV_LOG(ERR, "Failed to register meter drop matcher.");
15390                 return -1;
15391         }
15392         sub_policy->color_matcher[priority] =
15393                 container_of(entry, struct mlx5_flow_dv_matcher, entry);
15394         return 0;
15395 }
15396
15397 /**
15398  * Create the policy rules per domain.
15399  *
15400  * @param[in] dev
15401  *   Pointer to Ethernet device.
15402  * @param[in] sub_policy
15403  *    Pointer to sub policy table..
15404  * @param[in] egress
15405  *   Direction of the table.
15406  * @param[in] transfer
15407  *   E-Switch or NIC flow.
15408  * @param[in] acts
15409  *   Pointer to policy action list per color.
15410  *
15411  * @return
15412  *   0 on success, -1 otherwise.
15413  */
15414 static int
15415 __flow_dv_create_domain_policy_rules(struct rte_eth_dev *dev,
15416                 struct mlx5_flow_meter_sub_policy *sub_policy,
15417                 uint8_t egress, uint8_t transfer, bool is_default_policy,
15418                 struct mlx5_meter_policy_acts acts[RTE_COLORS])
15419 {
15420         struct rte_flow_error flow_err;
15421         uint32_t color_reg_c_idx;
15422         struct rte_flow_attr attr = {
15423                 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
15424                 .priority = 0,
15425                 .ingress = 0,
15426                 .egress = !!egress,
15427                 .transfer = !!transfer,
15428                 .reserved = 0,
15429         };
15430         int i;
15431         int ret = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &flow_err);
15432
15433         if (ret < 0)
15434                 return -1;
15435         /* Create policy table with POLICY level. */
15436         if (!sub_policy->tbl_rsc)
15437                 sub_policy->tbl_rsc = flow_dv_tbl_resource_get(dev,
15438                                 MLX5_FLOW_TABLE_LEVEL_POLICY,
15439                                 egress, transfer, false, NULL, 0, 0,
15440                                 sub_policy->idx, &flow_err);
15441         if (!sub_policy->tbl_rsc) {
15442                 DRV_LOG(ERR,
15443                         "Failed to create meter sub policy table.");
15444                 return -1;
15445         }
15446         /* Prepare matchers. */
15447         color_reg_c_idx = ret;
15448         for (i = 0; i < RTE_COLORS; i++) {
15449                 if (i == RTE_COLOR_YELLOW || !acts[i].actions_n)
15450                         continue;
15451                 attr.priority = i;
15452                 if (!sub_policy->color_matcher[i]) {
15453                         /* Create matchers for Color. */
15454                         if (__flow_dv_create_policy_matcher(dev,
15455                                 color_reg_c_idx, i, sub_policy,
15456                                 &attr, is_default_policy, &flow_err))
15457                                 return -1;
15458                 }
15459                 /* Create flow, matching color. */
15460                 if (acts[i].actions_n)
15461                         if (__flow_dv_create_policy_flow(dev,
15462                                 color_reg_c_idx, (enum rte_color)i,
15463                                 sub_policy->color_matcher[i]->matcher_object,
15464                                 acts[i].actions_n,
15465                                 acts[i].dv_actions,
15466                                 is_default_policy,
15467                                 &sub_policy->color_rule[i],
15468                                 &attr))
15469                                 return -1;
15470         }
15471         return 0;
15472 }
15473
15474 static int
15475 __flow_dv_create_policy_acts_rules(struct rte_eth_dev *dev,
15476                         struct mlx5_flow_meter_policy *mtr_policy,
15477                         struct mlx5_flow_meter_sub_policy *sub_policy,
15478                         uint32_t domain)
15479 {
15480         struct mlx5_priv *priv = dev->data->dev_private;
15481         struct mlx5_meter_policy_acts acts[RTE_COLORS];
15482         struct mlx5_flow_dv_tag_resource *tag;
15483         struct mlx5_flow_dv_port_id_action_resource *port_action;
15484         struct mlx5_hrxq *hrxq;
15485         uint8_t egress, transfer;
15486         int i;
15487
15488         for (i = 0; i < RTE_COLORS; i++) {
15489                 acts[i].actions_n = 0;
15490                 if (i == RTE_COLOR_YELLOW)
15491                         continue;
15492                 if (i == RTE_COLOR_RED) {
15493                         /* Only support drop on red. */
15494                         acts[i].dv_actions[0] =
15495                         mtr_policy->dr_drop_action[domain];
15496                         acts[i].actions_n = 1;
15497                         continue;
15498                 }
15499                 if (mtr_policy->act_cnt[i].rix_mark) {
15500                         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG],
15501                                         mtr_policy->act_cnt[i].rix_mark);
15502                         if (!tag) {
15503                                 DRV_LOG(ERR, "Failed to find "
15504                                 "mark action for policy.");
15505                                 return -1;
15506                         }
15507                         acts[i].dv_actions[acts[i].actions_n] =
15508                                                 tag->action;
15509                         acts[i].actions_n++;
15510                 }
15511                 if (mtr_policy->act_cnt[i].modify_hdr) {
15512                         acts[i].dv_actions[acts[i].actions_n] =
15513                         mtr_policy->act_cnt[i].modify_hdr->action;
15514                         acts[i].actions_n++;
15515                 }
15516                 if (mtr_policy->act_cnt[i].fate_action) {
15517                         switch (mtr_policy->act_cnt[i].fate_action) {
15518                         case MLX5_FLOW_FATE_PORT_ID:
15519                                 port_action = mlx5_ipool_get
15520                                         (priv->sh->ipool[MLX5_IPOOL_PORT_ID],
15521                                 mtr_policy->act_cnt[i].rix_port_id_action);
15522                                 if (!port_action) {
15523                                         DRV_LOG(ERR, "Failed to find "
15524                                                 "port action for policy.");
15525                                         return -1;
15526                                 }
15527                                 acts[i].dv_actions[acts[i].actions_n] =
15528                                 port_action->action;
15529                                 acts[i].actions_n++;
15530                                 break;
15531                         case MLX5_FLOW_FATE_DROP:
15532                         case MLX5_FLOW_FATE_JUMP:
15533                                 acts[i].dv_actions[acts[i].actions_n] =
15534                                 mtr_policy->act_cnt[i].dr_jump_action[domain];
15535                                 acts[i].actions_n++;
15536                                 break;
15537                         case MLX5_FLOW_FATE_SHARED_RSS:
15538                         case MLX5_FLOW_FATE_QUEUE:
15539                                 hrxq = mlx5_ipool_get
15540                                 (priv->sh->ipool[MLX5_IPOOL_HRXQ],
15541                                 sub_policy->rix_hrxq[i]);
15542                                 if (!hrxq) {
15543                                         DRV_LOG(ERR, "Failed to find "
15544                                                 "queue action for policy.");
15545                                         return -1;
15546                                 }
15547                                 acts[i].dv_actions[acts[i].actions_n] =
15548                                 hrxq->action;
15549                                 acts[i].actions_n++;
15550                                 break;
15551                         default:
15552                                 /*Queue action do nothing*/
15553                                 break;
15554                         }
15555                 }
15556         }
15557         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15558         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15559         if (__flow_dv_create_domain_policy_rules(dev, sub_policy,
15560                                 egress, transfer, false, acts)) {
15561                 DRV_LOG(ERR,
15562                 "Failed to create policy rules per domain.");
15563                 return -1;
15564         }
15565         return 0;
15566 }
15567
15568 /**
15569  * Create the policy rules.
15570  *
15571  * @param[in] dev
15572  *   Pointer to Ethernet device.
15573  * @param[in,out] mtr_policy
15574  *   Pointer to meter policy table.
15575  *
15576  * @return
15577  *   0 on success, -1 otherwise.
15578  */
15579 static int
15580 flow_dv_create_policy_rules(struct rte_eth_dev *dev,
15581                              struct mlx5_flow_meter_policy *mtr_policy)
15582 {
15583         int i;
15584         uint16_t sub_policy_num;
15585
15586         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15587                 sub_policy_num = (mtr_policy->sub_policy_num >>
15588                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15589                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15590                 if (!sub_policy_num)
15591                         continue;
15592                 /* Prepare actions list and create policy rules. */
15593                 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
15594                         mtr_policy->sub_policys[i][0], i)) {
15595                         DRV_LOG(ERR,
15596                         "Failed to create policy action list per domain.");
15597                         return -1;
15598                 }
15599         }
15600         return 0;
15601 }
15602
15603 static int
15604 __flow_dv_create_domain_def_policy(struct rte_eth_dev *dev, uint32_t domain)
15605 {
15606         struct mlx5_priv *priv = dev->data->dev_private;
15607         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
15608         struct mlx5_flow_meter_def_policy *def_policy;
15609         struct mlx5_flow_tbl_resource *jump_tbl;
15610         struct mlx5_flow_tbl_data_entry *tbl_data;
15611         uint8_t egress, transfer;
15612         struct rte_flow_error error;
15613         struct mlx5_meter_policy_acts acts[RTE_COLORS];
15614         int ret;
15615
15616         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15617         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15618         def_policy = mtrmng->def_policy[domain];
15619         if (!def_policy) {
15620                 def_policy = mlx5_malloc(MLX5_MEM_ZERO,
15621                         sizeof(struct mlx5_flow_meter_def_policy),
15622                         RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
15623                 if (!def_policy) {
15624                         DRV_LOG(ERR, "Failed to alloc "
15625                                         "default policy table.");
15626                         goto def_policy_error;
15627                 }
15628                 mtrmng->def_policy[domain] = def_policy;
15629                 /* Create the meter suffix table with SUFFIX level. */
15630                 jump_tbl = flow_dv_tbl_resource_get(dev,
15631                                 MLX5_FLOW_TABLE_LEVEL_METER,
15632                                 egress, transfer, false, NULL, 0,
15633                                 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
15634                 if (!jump_tbl) {
15635                         DRV_LOG(ERR,
15636                                 "Failed to create meter suffix table.");
15637                         goto def_policy_error;
15638                 }
15639                 def_policy->sub_policy.jump_tbl[RTE_COLOR_GREEN] = jump_tbl;
15640                 tbl_data = container_of(jump_tbl,
15641                                 struct mlx5_flow_tbl_data_entry, tbl);
15642                 def_policy->dr_jump_action[RTE_COLOR_GREEN] =
15643                                                 tbl_data->jump.action;
15644                 acts[RTE_COLOR_GREEN].dv_actions[0] =
15645                                                 tbl_data->jump.action;
15646                 acts[RTE_COLOR_GREEN].actions_n = 1;
15647                 /* Create jump action to the drop table. */
15648                 if (!mtrmng->drop_tbl[domain]) {
15649                         mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get
15650                                 (dev, MLX5_FLOW_TABLE_LEVEL_METER,
15651                                 egress, transfer, false, NULL, 0,
15652                                 0, MLX5_MTR_TABLE_ID_DROP, &error);
15653                         if (!mtrmng->drop_tbl[domain]) {
15654                                 DRV_LOG(ERR, "Failed to create "
15655                                 "meter drop table for default policy.");
15656                                 goto def_policy_error;
15657                         }
15658                 }
15659                 tbl_data = container_of(mtrmng->drop_tbl[domain],
15660                                 struct mlx5_flow_tbl_data_entry, tbl);
15661                 def_policy->dr_jump_action[RTE_COLOR_RED] =
15662                                                 tbl_data->jump.action;
15663                 acts[RTE_COLOR_RED].dv_actions[0] = tbl_data->jump.action;
15664                 acts[RTE_COLOR_RED].actions_n = 1;
15665                 /* Create default policy rules. */
15666                 ret = __flow_dv_create_domain_policy_rules(dev,
15667                                         &def_policy->sub_policy,
15668                                         egress, transfer, true, acts);
15669                 if (ret) {
15670                         DRV_LOG(ERR, "Failed to create "
15671                                 "default policy rules.");
15672                                 goto def_policy_error;
15673                 }
15674         }
15675         return 0;
15676 def_policy_error:
15677         __flow_dv_destroy_domain_def_policy(dev,
15678                         (enum mlx5_meter_domain)domain);
15679         return -1;
15680 }
15681
15682 /**
15683  * Create the default policy table set.
15684  *
15685  * @param[in] dev
15686  *   Pointer to Ethernet device.
15687  * @return
15688  *   0 on success, -1 otherwise.
15689  */
15690 static int
15691 flow_dv_create_def_policy(struct rte_eth_dev *dev)
15692 {
15693         struct mlx5_priv *priv = dev->data->dev_private;
15694         int i;
15695
15696         /* Non-termination policy table. */
15697         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15698                 if (!priv->config.dv_esw_en && i == MLX5_MTR_DOMAIN_TRANSFER)
15699                         continue;
15700                 if (__flow_dv_create_domain_def_policy(dev, i)) {
15701                         DRV_LOG(ERR,
15702                         "Failed to create default policy");
15703                         return -1;
15704                 }
15705         }
15706         return 0;
15707 }
15708
15709 /**
15710  * Create the needed meter tables.
15711  * Lock free, (mutex should be acquired by caller).
15712  *
15713  * @param[in] dev
15714  *   Pointer to Ethernet device.
15715  * @param[in] fm
15716  *   Meter information table.
15717  * @param[in] mtr_idx
15718  *   Meter index.
15719  * @param[in] domain_bitmap
15720  *   Domain bitmap.
15721  * @return
15722  *   0 on success, -1 otherwise.
15723  */
15724 static int
15725 flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,
15726                         struct mlx5_flow_meter_info *fm,
15727                         uint32_t mtr_idx,
15728                         uint8_t domain_bitmap)
15729 {
15730         struct mlx5_priv *priv = dev->data->dev_private;
15731         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
15732         struct rte_flow_error error;
15733         struct mlx5_flow_tbl_data_entry *tbl_data;
15734         uint8_t egress, transfer;
15735         void *actions[METER_ACTIONS];
15736         int domain, ret, i;
15737         struct mlx5_flow_counter *cnt;
15738         struct mlx5_flow_dv_match_params value = {
15739                 .size = sizeof(value.buf) -
15740                 MLX5_ST_SZ_BYTES(fte_match_set_misc4),
15741         };
15742         struct mlx5_flow_dv_match_params matcher_para = {
15743                 .size = sizeof(matcher_para.buf) -
15744                 MLX5_ST_SZ_BYTES(fte_match_set_misc4),
15745         };
15746         int mtr_id_reg_c = mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
15747                                                      0, &error);
15748         uint32_t mtr_id_mask = (UINT32_C(1) << mtrmng->max_mtr_bits) - 1;
15749         uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
15750         struct mlx5_cache_entry *entry;
15751         struct mlx5_flow_dv_matcher matcher = {
15752                 .mask = {
15753                         .size = sizeof(matcher.mask.buf) -
15754                         MLX5_ST_SZ_BYTES(fte_match_set_misc4),
15755                 },
15756         };
15757         struct mlx5_flow_dv_matcher *drop_matcher;
15758         struct mlx5_flow_cb_ctx ctx = {
15759                 .error = &error,
15760                 .data = &matcher,
15761         };
15762
15763         if (!priv->mtr_en || mtr_id_reg_c < 0) {
15764                 rte_errno = ENOTSUP;
15765                 return -1;
15766         }
15767         for (domain = 0; domain < MLX5_MTR_DOMAIN_MAX; domain++) {
15768                 if (!(domain_bitmap & (1 << domain)) ||
15769                         (mtrmng->def_rule[domain] && !fm->drop_cnt))
15770                         continue;
15771                 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15772                 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15773                 /* Create the drop table with METER DROP level. */
15774                 if (!mtrmng->drop_tbl[domain]) {
15775                         mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get(dev,
15776                                         MLX5_FLOW_TABLE_LEVEL_METER,
15777                                         egress, transfer, false, NULL, 0,
15778                                         0, MLX5_MTR_TABLE_ID_DROP, &error);
15779                         if (!mtrmng->drop_tbl[domain]) {
15780                                 DRV_LOG(ERR, "Failed to create meter drop table.");
15781                                 goto policy_error;
15782                         }
15783                 }
15784                 /* Create default matcher in drop table. */
15785                 matcher.tbl = mtrmng->drop_tbl[domain],
15786                 tbl_data = container_of(mtrmng->drop_tbl[domain],
15787                                 struct mlx5_flow_tbl_data_entry, tbl);
15788                 if (!mtrmng->def_matcher[domain]) {
15789                         flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
15790                                        (enum modify_reg)mtr_id_reg_c,
15791                                        0, 0);
15792                         matcher.priority = MLX5_MTRS_DEFAULT_RULE_PRIORITY;
15793                         matcher.crc = rte_raw_cksum
15794                                         ((const void *)matcher.mask.buf,
15795                                         matcher.mask.size);
15796                         entry = mlx5_cache_register(&tbl_data->matchers, &ctx);
15797                         if (!entry) {
15798                                 DRV_LOG(ERR, "Failed to register meter "
15799                                 "drop default matcher.");
15800                                 goto policy_error;
15801                         }
15802                         mtrmng->def_matcher[domain] = container_of(entry,
15803                         struct mlx5_flow_dv_matcher, entry);
15804                 }
15805                 /* Create default rule in drop table. */
15806                 if (!mtrmng->def_rule[domain]) {
15807                         i = 0;
15808                         actions[i++] = priv->sh->dr_drop_action;
15809                         flow_dv_match_meta_reg(matcher_para.buf, value.buf,
15810                                 (enum modify_reg)mtr_id_reg_c, 0, 0);
15811                         ret = mlx5_flow_os_create_flow
15812                                 (mtrmng->def_matcher[domain]->matcher_object,
15813                                 (void *)&value, i, actions,
15814                                 &mtrmng->def_rule[domain]);
15815                         if (ret) {
15816                                 DRV_LOG(ERR, "Failed to create meter "
15817                                 "default drop rule for drop table.");
15818                                 goto policy_error;
15819                         }
15820                 }
15821                 if (!fm->drop_cnt)
15822                         continue;
15823                 MLX5_ASSERT(mtrmng->max_mtr_bits);
15824                 if (!mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1]) {
15825                         /* Create matchers for Drop. */
15826                         flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
15827                                         (enum modify_reg)mtr_id_reg_c, 0,
15828                                         (mtr_id_mask << mtr_id_offset));
15829                         matcher.priority = MLX5_REG_BITS - mtrmng->max_mtr_bits;
15830                         matcher.crc = rte_raw_cksum
15831                                         ((const void *)matcher.mask.buf,
15832                                         matcher.mask.size);
15833                         entry = mlx5_cache_register(&tbl_data->matchers, &ctx);
15834                         if (!entry) {
15835                                 DRV_LOG(ERR,
15836                                 "Failed to register meter drop matcher.");
15837                                 goto policy_error;
15838                         }
15839                         mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1] =
15840                                 container_of(entry, struct mlx5_flow_dv_matcher,
15841                                              entry);
15842                 }
15843                 drop_matcher =
15844                         mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1];
15845                 /* Create drop rule, matching meter_id only. */
15846                 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
15847                                 (enum modify_reg)mtr_id_reg_c,
15848                                 (mtr_idx << mtr_id_offset), UINT32_MAX);
15849                 i = 0;
15850                 cnt = flow_dv_counter_get_by_idx(dev,
15851                                         fm->drop_cnt, NULL);
15852                 actions[i++] = cnt->action;
15853                 actions[i++] = priv->sh->dr_drop_action;
15854                 ret = mlx5_flow_os_create_flow(drop_matcher->matcher_object,
15855                                                (void *)&value, i, actions,
15856                                                &fm->drop_rule[domain]);
15857                 if (ret) {
15858                         DRV_LOG(ERR, "Failed to create meter "
15859                                 "drop rule for drop table.");
15860                                 goto policy_error;
15861                 }
15862         }
15863         return 0;
15864 policy_error:
15865         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15866                 if (fm->drop_rule[i]) {
15867                         claim_zero(mlx5_flow_os_destroy_flow
15868                                 (fm->drop_rule[i]));
15869                         fm->drop_rule[i] = NULL;
15870                 }
15871         }
15872         return -1;
15873 }
15874
15875 /**
15876  * Find the policy table for prefix table with RSS.
15877  *
15878  * @param[in] dev
15879  *   Pointer to Ethernet device.
15880  * @param[in] mtr_policy
15881  *   Pointer to meter policy table.
15882  * @param[in] rss_desc
15883  *   Pointer to rss_desc
15884  * @return
15885  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
15886  */
15887 static struct mlx5_flow_meter_sub_policy *
15888 flow_dv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
15889                 struct mlx5_flow_meter_policy *mtr_policy,
15890                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
15891 {
15892         struct mlx5_priv *priv = dev->data->dev_private;
15893         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
15894         uint32_t sub_policy_idx = 0;
15895         uint32_t hrxq_idx[MLX5_MTR_RTE_COLORS] = {0};
15896         uint32_t i, j;
15897         struct mlx5_hrxq *hrxq;
15898         struct mlx5_flow_handle dh;
15899         struct mlx5_meter_policy_action_container *act_cnt;
15900         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
15901         uint16_t sub_policy_num;
15902
15903         rte_spinlock_lock(&mtr_policy->sl);
15904         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15905                 if (!rss_desc[i])
15906                         continue;
15907                 hrxq_idx[i] = mlx5_hrxq_get(dev, rss_desc[i]);
15908                 if (!hrxq_idx[i]) {
15909                         rte_spinlock_unlock(&mtr_policy->sl);
15910                         return NULL;
15911                 }
15912         }
15913         sub_policy_num = (mtr_policy->sub_policy_num >>
15914                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
15915                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15916         for (i = 0; i < sub_policy_num;
15917                 i++) {
15918                 for (j = 0; j < MLX5_MTR_RTE_COLORS; j++) {
15919                         if (rss_desc[j] &&
15920                                 hrxq_idx[j] !=
15921                         mtr_policy->sub_policys[domain][i]->rix_hrxq[j])
15922                                 break;
15923                 }
15924                 if (j >= MLX5_MTR_RTE_COLORS) {
15925                         /*
15926                          * Found the sub policy table with
15927                          * the same queue per color
15928                          */
15929                         rte_spinlock_unlock(&mtr_policy->sl);
15930                         for (j = 0; j < MLX5_MTR_RTE_COLORS; j++)
15931                                 mlx5_hrxq_release(dev, hrxq_idx[j]);
15932                         return mtr_policy->sub_policys[domain][i];
15933                 }
15934         }
15935         /* Create sub policy. */
15936         if (!mtr_policy->sub_policys[domain][0]->rix_hrxq[0]) {
15937                 /* Reuse the first dummy sub_policy*/
15938                 sub_policy = mtr_policy->sub_policys[domain][0];
15939                 sub_policy_idx = sub_policy->idx;
15940         } else {
15941                 sub_policy = mlx5_ipool_zmalloc
15942                                 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
15943                                 &sub_policy_idx);
15944                 if (!sub_policy ||
15945                         sub_policy_idx > MLX5_MAX_SUB_POLICY_TBL_NUM) {
15946                         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
15947                                 mlx5_hrxq_release(dev, hrxq_idx[i]);
15948                         goto rss_sub_policy_error;
15949                 }
15950                 sub_policy->idx = sub_policy_idx;
15951                 sub_policy->main_policy = mtr_policy;
15952         }
15953         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15954                 if (!rss_desc[i])
15955                         continue;
15956                 sub_policy->rix_hrxq[i] = hrxq_idx[i];
15957                 /*
15958                  * Overwrite the last action from
15959                  * RSS action to Queue action.
15960                  */
15961                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
15962                               hrxq_idx[i]);
15963                 if (!hrxq) {
15964                         DRV_LOG(ERR, "Failed to create policy hrxq");
15965                         goto rss_sub_policy_error;
15966                 }
15967                 act_cnt = &mtr_policy->act_cnt[i];
15968                 if (act_cnt->rix_mark || act_cnt->modify_hdr) {
15969                         memset(&dh, 0, sizeof(struct mlx5_flow_handle));
15970                         if (act_cnt->rix_mark)
15971                                 dh.mark = 1;
15972                         dh.fate_action = MLX5_FLOW_FATE_QUEUE;
15973                         dh.rix_hrxq = hrxq_idx[i];
15974                         flow_drv_rxq_flags_set(dev, &dh);
15975                 }
15976         }
15977         if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
15978                 sub_policy, domain)) {
15979                 DRV_LOG(ERR, "Failed to create policy "
15980                         "rules per domain.");
15981                 goto rss_sub_policy_error;
15982         }
15983         if (sub_policy != mtr_policy->sub_policys[domain][0]) {
15984                 i = (mtr_policy->sub_policy_num >>
15985                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
15986                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15987                 mtr_policy->sub_policys[domain][i] = sub_policy;
15988                 i++;
15989                 if (i > MLX5_MTR_RSS_MAX_SUB_POLICY)
15990                         goto rss_sub_policy_error;
15991                 mtr_policy->sub_policy_num &= ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
15992                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
15993                 mtr_policy->sub_policy_num |=
15994                         (i & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
15995                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
15996         }
15997         rte_spinlock_unlock(&mtr_policy->sl);
15998         return sub_policy;
15999 rss_sub_policy_error:
16000         if (sub_policy) {
16001                 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16002                 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16003                         i = (mtr_policy->sub_policy_num >>
16004                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16005                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16006                         mtr_policy->sub_policys[domain][i] = NULL;
16007                         mlx5_ipool_free
16008                         (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16009                                         sub_policy->idx);
16010                 }
16011         }
16012         if (sub_policy_idx)
16013                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16014                         sub_policy_idx);
16015         rte_spinlock_unlock(&mtr_policy->sl);
16016         return NULL;
16017 }
16018
16019 /**
16020  * Validate the batch counter support in root table.
16021  *
16022  * Create a simple flow with invalid counter and drop action on root table to
16023  * validate if batch counter with offset on root table is supported or not.
16024  *
16025  * @param[in] dev
16026  *   Pointer to rte_eth_dev structure.
16027  *
16028  * @return
16029  *   0 on success, a negative errno value otherwise and rte_errno is set.
16030  */
16031 int
16032 mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)
16033 {
16034         struct mlx5_priv *priv = dev->data->dev_private;
16035         struct mlx5_dev_ctx_shared *sh = priv->sh;
16036         struct mlx5_flow_dv_match_params mask = {
16037                 .size = sizeof(mask.buf),
16038         };
16039         struct mlx5_flow_dv_match_params value = {
16040                 .size = sizeof(value.buf),
16041         };
16042         struct mlx5dv_flow_matcher_attr dv_attr = {
16043                 .type = IBV_FLOW_ATTR_NORMAL,
16044                 .priority = 0,
16045                 .match_criteria_enable = 0,
16046                 .match_mask = (void *)&mask,
16047         };
16048         void *actions[2] = { 0 };
16049         struct mlx5_flow_tbl_resource *tbl = NULL;
16050         struct mlx5_devx_obj *dcs = NULL;
16051         void *matcher = NULL;
16052         void *flow = NULL;
16053         int ret = -1;
16054
16055         tbl = flow_dv_tbl_resource_get(dev, 0, 0, 0, false, NULL,
16056                                         0, 0, 0, NULL);
16057         if (!tbl)
16058                 goto err;
16059         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
16060         if (!dcs)
16061                 goto err;
16062         ret = mlx5_flow_os_create_flow_action_count(dcs->obj, UINT16_MAX,
16063                                                     &actions[0]);
16064         if (ret)
16065                 goto err;
16066         actions[1] = sh->dr_drop_action ? sh->dr_drop_action :
16067                                           priv->drop_queue.hrxq->action;
16068         dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
16069         ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj,
16070                                                &matcher);
16071         if (ret)
16072                 goto err;
16073         ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 2,
16074                                        actions, &flow);
16075 err:
16076         /*
16077          * If batch counter with offset is not supported, the driver will not
16078          * validate the invalid offset value, flow create should success.
16079          * In this case, it means batch counter is not supported in root table.
16080          *
16081          * Otherwise, if flow create is failed, counter offset is supported.
16082          */
16083         if (flow) {
16084                 DRV_LOG(INFO, "Batch counter is not supported in root "
16085                               "table. Switch to fallback mode.");
16086                 rte_errno = ENOTSUP;
16087                 ret = -rte_errno;
16088                 claim_zero(mlx5_flow_os_destroy_flow(flow));
16089         } else {
16090                 /* Check matcher to make sure validate fail at flow create. */
16091                 if (!matcher || (matcher && errno != EINVAL))
16092                         DRV_LOG(ERR, "Unexpected error in counter offset "
16093                                      "support detection");
16094                 ret = 0;
16095         }
16096         if (actions[0])
16097                 claim_zero(mlx5_flow_os_destroy_flow_action(actions[0]));
16098         if (matcher)
16099                 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
16100         if (tbl)
16101                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
16102         if (dcs)
16103                 claim_zero(mlx5_devx_cmd_destroy(dcs));
16104         return ret;
16105 }
16106
16107 /**
16108  * Query a devx counter.
16109  *
16110  * @param[in] dev
16111  *   Pointer to the Ethernet device structure.
16112  * @param[in] cnt
16113  *   Index to the flow counter.
16114  * @param[in] clear
16115  *   Set to clear the counter statistics.
16116  * @param[out] pkts
16117  *   The statistics value of packets.
16118  * @param[out] bytes
16119  *   The statistics value of bytes.
16120  *
16121  * @return
16122  *   0 on success, otherwise return -1.
16123  */
16124 static int
16125 flow_dv_counter_query(struct rte_eth_dev *dev, uint32_t counter, bool clear,
16126                       uint64_t *pkts, uint64_t *bytes)
16127 {
16128         struct mlx5_priv *priv = dev->data->dev_private;
16129         struct mlx5_flow_counter *cnt;
16130         uint64_t inn_pkts, inn_bytes;
16131         int ret;
16132
16133         if (!priv->config.devx)
16134                 return -1;
16135
16136         ret = _flow_dv_query_count(dev, counter, &inn_pkts, &inn_bytes);
16137         if (ret)
16138                 return -1;
16139         cnt = flow_dv_counter_get_by_idx(dev, counter, NULL);
16140         *pkts = inn_pkts - cnt->hits;
16141         *bytes = inn_bytes - cnt->bytes;
16142         if (clear) {
16143                 cnt->hits = inn_pkts;
16144                 cnt->bytes = inn_bytes;
16145         }
16146         return 0;
16147 }
16148
16149 /**
16150  * Get aged-out flows.
16151  *
16152  * @param[in] dev
16153  *   Pointer to the Ethernet device structure.
16154  * @param[in] context
16155  *   The address of an array of pointers to the aged-out flows contexts.
16156  * @param[in] nb_contexts
16157  *   The length of context array pointers.
16158  * @param[out] error
16159  *   Perform verbose error reporting if not NULL. Initialized in case of
16160  *   error only.
16161  *
16162  * @return
16163  *   how many contexts get in success, otherwise negative errno value.
16164  *   if nb_contexts is 0, return the amount of all aged contexts.
16165  *   if nb_contexts is not 0 , return the amount of aged flows reported
16166  *   in the context array.
16167  * @note: only stub for now
16168  */
16169 static int
16170 flow_get_aged_flows(struct rte_eth_dev *dev,
16171                     void **context,
16172                     uint32_t nb_contexts,
16173                     struct rte_flow_error *error)
16174 {
16175         struct mlx5_priv *priv = dev->data->dev_private;
16176         struct mlx5_age_info *age_info;
16177         struct mlx5_age_param *age_param;
16178         struct mlx5_flow_counter *counter;
16179         struct mlx5_aso_age_action *act;
16180         int nb_flows = 0;
16181
16182         if (nb_contexts && !context)
16183                 return rte_flow_error_set(error, EINVAL,
16184                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16185                                           NULL, "empty context");
16186         age_info = GET_PORT_AGE_INFO(priv);
16187         rte_spinlock_lock(&age_info->aged_sl);
16188         LIST_FOREACH(act, &age_info->aged_aso, next) {
16189                 nb_flows++;
16190                 if (nb_contexts) {
16191                         context[nb_flows - 1] =
16192                                                 act->age_params.context;
16193                         if (!(--nb_contexts))
16194                                 break;
16195                 }
16196         }
16197         TAILQ_FOREACH(counter, &age_info->aged_counters, next) {
16198                 nb_flows++;
16199                 if (nb_contexts) {
16200                         age_param = MLX5_CNT_TO_AGE(counter);
16201                         context[nb_flows - 1] = age_param->context;
16202                         if (!(--nb_contexts))
16203                                 break;
16204                 }
16205         }
16206         rte_spinlock_unlock(&age_info->aged_sl);
16207         MLX5_AGE_SET(age_info, MLX5_AGE_TRIGGER);
16208         return nb_flows;
16209 }
16210
16211 /*
16212  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
16213  */
16214 static uint32_t
16215 flow_dv_counter_allocate(struct rte_eth_dev *dev)
16216 {
16217         return flow_dv_counter_alloc(dev, 0);
16218 }
16219
16220 /**
16221  * Validate indirect action.
16222  * Dispatcher for action type specific validation.
16223  *
16224  * @param[in] dev
16225  *   Pointer to the Ethernet device structure.
16226  * @param[in] conf
16227  *   Indirect action configuration.
16228  * @param[in] action
16229  *   The indirect action object to validate.
16230  * @param[out] error
16231  *   Perform verbose error reporting if not NULL. Initialized in case of
16232  *   error only.
16233  *
16234  * @return
16235  *   0 on success, otherwise negative errno value.
16236  */
16237 static int
16238 flow_dv_action_validate(struct rte_eth_dev *dev,
16239                         const struct rte_flow_indir_action_conf *conf,
16240                         const struct rte_flow_action *action,
16241                         struct rte_flow_error *err)
16242 {
16243         struct mlx5_priv *priv = dev->data->dev_private;
16244
16245         RTE_SET_USED(conf);
16246         switch (action->type) {
16247         case RTE_FLOW_ACTION_TYPE_RSS:
16248                 /*
16249                  * priv->obj_ops is set according to driver capabilities.
16250                  * When DevX capabilities are
16251                  * sufficient, it is set to devx_obj_ops.
16252                  * Otherwise, it is set to ibv_obj_ops.
16253                  * ibv_obj_ops doesn't support ind_table_modify operation.
16254                  * In this case the indirect RSS action can't be used.
16255                  */
16256                 if (priv->obj_ops.ind_table_modify == NULL)
16257                         return rte_flow_error_set
16258                                         (err, ENOTSUP,
16259                                          RTE_FLOW_ERROR_TYPE_ACTION,
16260                                          NULL,
16261                                          "Indirect RSS action not supported");
16262                 return mlx5_validate_action_rss(dev, action, err);
16263         case RTE_FLOW_ACTION_TYPE_AGE:
16264                 if (!priv->sh->aso_age_mng)
16265                         return rte_flow_error_set(err, ENOTSUP,
16266                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16267                                                 NULL,
16268                                                 "Indirect age action not supported");
16269                 return flow_dv_validate_action_age(0, action, dev, err);
16270         case RTE_FLOW_ACTION_TYPE_COUNT:
16271                 /*
16272                  * There are two mechanisms to share the action count.
16273                  * The old mechanism uses the shared field to share, while the
16274                  * new mechanism uses the indirect action API.
16275                  * This validation comes to make sure that the two mechanisms
16276                  * are not combined.
16277                  */
16278                 if (is_shared_action_count(action))
16279                         return rte_flow_error_set(err, ENOTSUP,
16280                                                   RTE_FLOW_ERROR_TYPE_ACTION,
16281                                                   NULL,
16282                                                   "Mix shared and indirect counter is not supported");
16283                 return flow_dv_validate_action_count(dev, true, 0, err);
16284         case RTE_FLOW_ACTION_TYPE_CONNTRACK:
16285                 if (!priv->sh->ct_aso_en)
16286                         return rte_flow_error_set(err, ENOTSUP,
16287                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
16288                                         "ASO CT is not supported");
16289                 return mlx5_validate_action_ct(dev, action->conf, err);
16290         default:
16291                 return rte_flow_error_set(err, ENOTSUP,
16292                                           RTE_FLOW_ERROR_TYPE_ACTION,
16293                                           NULL,
16294                                           "action type not supported");
16295         }
16296 }
16297
16298 /**
16299  * Validate meter policy actions.
16300  * Dispatcher for action type specific validation.
16301  *
16302  * @param[in] dev
16303  *   Pointer to the Ethernet device structure.
16304  * @param[in] action
16305  *   The meter policy action object to validate.
16306  * @param[in] attr
16307  *   Attributes of flow to determine steering domain.
16308  * @param[out] error
16309  *   Perform verbose error reporting if not NULL. Initialized in case of
16310  *   error only.
16311  *
16312  * @return
16313  *   0 on success, otherwise negative errno value.
16314  */
16315 static int
16316 flow_dv_validate_mtr_policy_acts(struct rte_eth_dev *dev,
16317                         const struct rte_flow_action *actions[RTE_COLORS],
16318                         struct rte_flow_attr *attr,
16319                         bool *is_rss,
16320                         uint8_t *domain_bitmap,
16321                         bool *is_def_policy,
16322                         struct rte_mtr_error *error)
16323 {
16324         struct mlx5_priv *priv = dev->data->dev_private;
16325         struct mlx5_dev_config *dev_conf = &priv->config;
16326         const struct rte_flow_action *act;
16327         uint64_t action_flags = 0;
16328         int actions_n;
16329         int i, ret;
16330         struct rte_flow_error flow_err;
16331         uint8_t domain_color[RTE_COLORS] = {0};
16332         uint8_t def_domain = MLX5_MTR_ALL_DOMAIN_BIT;
16333
16334         if (!priv->config.dv_esw_en)
16335                 def_domain &= ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
16336         *domain_bitmap = def_domain;
16337         if (actions[RTE_COLOR_YELLOW] &&
16338                 actions[RTE_COLOR_YELLOW]->type != RTE_FLOW_ACTION_TYPE_END)
16339                 return -rte_mtr_error_set(error, ENOTSUP,
16340                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
16341                                 NULL,
16342                                 "Yellow color does not support any action.");
16343         if (actions[RTE_COLOR_YELLOW] &&
16344                 actions[RTE_COLOR_YELLOW]->type != RTE_FLOW_ACTION_TYPE_DROP)
16345                 return -rte_mtr_error_set(error, ENOTSUP,
16346                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
16347                                 NULL, "Red color only supports drop action.");
16348         /*
16349          * Check default policy actions:
16350          * Green/Yellow: no action, Red: drop action
16351          */
16352         if ((!actions[RTE_COLOR_GREEN] ||
16353                 actions[RTE_COLOR_GREEN]->type == RTE_FLOW_ACTION_TYPE_END)) {
16354                 *is_def_policy = true;
16355                 return 0;
16356         }
16357         flow_err.message = NULL;
16358         for (i = 0; i < RTE_COLORS; i++) {
16359                 act = actions[i];
16360                 for (action_flags = 0, actions_n = 0;
16361                         act && act->type != RTE_FLOW_ACTION_TYPE_END;
16362                         act++) {
16363                         if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
16364                                 return -rte_mtr_error_set(error, ENOTSUP,
16365                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
16366                                           NULL, "too many actions");
16367                         switch (act->type) {
16368                         case RTE_FLOW_ACTION_TYPE_PORT_ID:
16369                                 if (!priv->config.dv_esw_en)
16370                                         return -rte_mtr_error_set(error,
16371                                         ENOTSUP,
16372                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16373                                         NULL, "PORT action validate check"
16374                                         " fail for ESW disable");
16375                                 ret = flow_dv_validate_action_port_id(dev,
16376                                                 action_flags,
16377                                                 act, attr, &flow_err);
16378                                 if (ret)
16379                                         return -rte_mtr_error_set(error,
16380                                         ENOTSUP,
16381                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16382                                         NULL, flow_err.message ?
16383                                         flow_err.message :
16384                                         "PORT action validate check fail");
16385                                 ++actions_n;
16386                                 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
16387                                 break;
16388                         case RTE_FLOW_ACTION_TYPE_MARK:
16389                                 ret = flow_dv_validate_action_mark(dev, act,
16390                                                            action_flags,
16391                                                            attr, &flow_err);
16392                                 if (ret < 0)
16393                                         return -rte_mtr_error_set(error,
16394                                         ENOTSUP,
16395                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16396                                         NULL, flow_err.message ?
16397                                         flow_err.message :
16398                                         "Mark action validate check fail");
16399                                 if (dev_conf->dv_xmeta_en !=
16400                                         MLX5_XMETA_MODE_LEGACY)
16401                                         return -rte_mtr_error_set(error,
16402                                         ENOTSUP,
16403                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16404                                         NULL, "Extend MARK action is "
16405                                         "not supported. Please try use "
16406                                         "default policy for meter.");
16407                                 action_flags |= MLX5_FLOW_ACTION_MARK;
16408                                 ++actions_n;
16409                                 break;
16410                         case RTE_FLOW_ACTION_TYPE_SET_TAG:
16411                                 ret = flow_dv_validate_action_set_tag(dev,
16412                                                         act, action_flags,
16413                                                         attr, &flow_err);
16414                                 if (ret)
16415                                         return -rte_mtr_error_set(error,
16416                                         ENOTSUP,
16417                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16418                                         NULL, flow_err.message ?
16419                                         flow_err.message :
16420                                         "Set tag action validate check fail");
16421                                 /*
16422                                  * Count all modify-header actions
16423                                  * as one action.
16424                                  */
16425                                 if (!(action_flags &
16426                                         MLX5_FLOW_MODIFY_HDR_ACTIONS))
16427                                         ++actions_n;
16428                                 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
16429                                 break;
16430                         case RTE_FLOW_ACTION_TYPE_DROP:
16431                                 ret = mlx5_flow_validate_action_drop
16432                                         (action_flags,
16433                                         attr, &flow_err);
16434                                 if (ret < 0)
16435                                         return -rte_mtr_error_set(error,
16436                                         ENOTSUP,
16437                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16438                                         NULL, flow_err.message ?
16439                                         flow_err.message :
16440                                         "Drop action validate check fail");
16441                                 action_flags |= MLX5_FLOW_ACTION_DROP;
16442                                 ++actions_n;
16443                                 break;
16444                         case RTE_FLOW_ACTION_TYPE_QUEUE:
16445                                 /*
16446                                  * Check whether extensive
16447                                  * metadata feature is engaged.
16448                                  */
16449                                 if (dev_conf->dv_flow_en &&
16450                                         (dev_conf->dv_xmeta_en !=
16451                                         MLX5_XMETA_MODE_LEGACY) &&
16452                                         mlx5_flow_ext_mreg_supported(dev))
16453                                         return -rte_mtr_error_set(error,
16454                                           ENOTSUP,
16455                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
16456                                           NULL, "Queue action with meta "
16457                                           "is not supported. Please try use "
16458                                           "default policy for meter.");
16459                                 ret = mlx5_flow_validate_action_queue(act,
16460                                                         action_flags, dev,
16461                                                         attr, &flow_err);
16462                                 if (ret < 0)
16463                                         return -rte_mtr_error_set(error,
16464                                           ENOTSUP,
16465                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
16466                                           NULL, flow_err.message ?
16467                                           flow_err.message :
16468                                           "Queue action validate check fail");
16469                                 action_flags |= MLX5_FLOW_ACTION_QUEUE;
16470                                 ++actions_n;
16471                                 break;
16472                         case RTE_FLOW_ACTION_TYPE_RSS:
16473                                 if (dev_conf->dv_flow_en &&
16474                                         (dev_conf->dv_xmeta_en !=
16475                                         MLX5_XMETA_MODE_LEGACY) &&
16476                                         mlx5_flow_ext_mreg_supported(dev))
16477                                         return -rte_mtr_error_set(error,
16478                                           ENOTSUP,
16479                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
16480                                           NULL, "RSS action with meta "
16481                                           "is not supported. Please try use "
16482                                           "default policy for meter.");
16483                                 ret = mlx5_validate_action_rss(dev, act,
16484                                                 &flow_err);
16485                                 if (ret < 0)
16486                                         return -rte_mtr_error_set(error,
16487                                           ENOTSUP,
16488                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
16489                                           NULL, flow_err.message ?
16490                                           flow_err.message :
16491                                           "RSS action validate check fail");
16492                                 action_flags |= MLX5_FLOW_ACTION_RSS;
16493                                 ++actions_n;
16494                                 *is_rss = true;
16495                                 break;
16496                         case RTE_FLOW_ACTION_TYPE_JUMP:
16497                                 ret = flow_dv_validate_action_jump(dev,
16498                                         NULL, act, action_flags,
16499                                         attr, true, &flow_err);
16500                                 if (ret)
16501                                         return -rte_mtr_error_set(error,
16502                                           ENOTSUP,
16503                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
16504                                           NULL, flow_err.message ?
16505                                           flow_err.message :
16506                                           "Jump action validate check fail");
16507                                 ++actions_n;
16508                                 action_flags |= MLX5_FLOW_ACTION_JUMP;
16509                                 break;
16510                         default:
16511                                 return -rte_mtr_error_set(error, ENOTSUP,
16512                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16513                                         NULL,
16514                                         "Doesn't support optional action");
16515                         }
16516                 }
16517                 /* Yellow is not supported, just skip. */
16518                 if (i == RTE_COLOR_YELLOW)
16519                         continue;
16520                 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
16521                         domain_color[i] = MLX5_MTR_DOMAIN_TRANSFER_BIT;
16522                 else if ((action_flags &
16523                         (MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_QUEUE)) ||
16524                         (action_flags & MLX5_FLOW_ACTION_MARK))
16525                         /*
16526                          * Only support MLX5_XMETA_MODE_LEGACY
16527                          * so MARK action only in ingress domain.
16528                          */
16529                         domain_color[i] = MLX5_MTR_DOMAIN_INGRESS_BIT;
16530                 else
16531                         domain_color[i] = def_domain;
16532                 /*
16533                  * Validate the drop action mutual exclusion
16534                  * with other actions. Drop action is mutually-exclusive
16535                  * with any other action, except for Count action.
16536                  */
16537                 if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
16538                         (action_flags & ~MLX5_FLOW_ACTION_DROP)) {
16539                         return -rte_mtr_error_set(error, ENOTSUP,
16540                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
16541                                 NULL, "Drop action is mutually-exclusive "
16542                                 "with any other action");
16543                 }
16544                 /* Eswitch has few restrictions on using items and actions */
16545                 if (domain_color[i] & MLX5_MTR_DOMAIN_TRANSFER_BIT) {
16546                         if (!mlx5_flow_ext_mreg_supported(dev) &&
16547                                 action_flags & MLX5_FLOW_ACTION_MARK)
16548                                 return -rte_mtr_error_set(error, ENOTSUP,
16549                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16550                                         NULL, "unsupported action MARK");
16551                         if (action_flags & MLX5_FLOW_ACTION_QUEUE)
16552                                 return -rte_mtr_error_set(error, ENOTSUP,
16553                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16554                                         NULL, "unsupported action QUEUE");
16555                         if (action_flags & MLX5_FLOW_ACTION_RSS)
16556                                 return -rte_mtr_error_set(error, ENOTSUP,
16557                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16558                                         NULL, "unsupported action RSS");
16559                         if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
16560                                 return -rte_mtr_error_set(error, ENOTSUP,
16561                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16562                                         NULL, "no fate action is found");
16563                 } else {
16564                         if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) &&
16565                                 (domain_color[i] &
16566                                 MLX5_MTR_DOMAIN_INGRESS_BIT)) {
16567                                 if ((domain_color[i] &
16568                                         MLX5_MTR_DOMAIN_EGRESS_BIT))
16569                                         domain_color[i] =
16570                                         MLX5_MTR_DOMAIN_EGRESS_BIT;
16571                                 else
16572                                         return -rte_mtr_error_set(error,
16573                                         ENOTSUP,
16574                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16575                                         NULL, "no fate action is found");
16576                         }
16577                 }
16578                 if (domain_color[i] != def_domain)
16579                         *domain_bitmap = domain_color[i];
16580         }
16581         return 0;
16582 }
16583
16584 static int
16585 flow_dv_sync_domain(struct rte_eth_dev *dev, uint32_t domains, uint32_t flags)
16586 {
16587         struct mlx5_priv *priv = dev->data->dev_private;
16588         int ret = 0;
16589
16590         if ((domains & MLX5_DOMAIN_BIT_NIC_RX) && priv->sh->rx_domain != NULL) {
16591                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->rx_domain,
16592                                                 flags);
16593                 if (ret != 0)
16594                         return ret;
16595         }
16596         if ((domains & MLX5_DOMAIN_BIT_NIC_TX) && priv->sh->tx_domain != NULL) {
16597                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->tx_domain, flags);
16598                 if (ret != 0)
16599                         return ret;
16600         }
16601         if ((domains & MLX5_DOMAIN_BIT_FDB) && priv->sh->fdb_domain != NULL) {
16602                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->fdb_domain, flags);
16603                 if (ret != 0)
16604                         return ret;
16605         }
16606         return 0;
16607 }
16608
16609 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
16610         .validate = flow_dv_validate,
16611         .prepare = flow_dv_prepare,
16612         .translate = flow_dv_translate,
16613         .apply = flow_dv_apply,
16614         .remove = flow_dv_remove,
16615         .destroy = flow_dv_destroy,
16616         .query = flow_dv_query,
16617         .create_mtr_tbls = flow_dv_create_mtr_tbls,
16618         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbls,
16619         .destroy_mtr_drop_tbls = flow_dv_destroy_mtr_drop_tbls,
16620         .create_meter = flow_dv_mtr_alloc,
16621         .free_meter = flow_dv_aso_mtr_release_to_pool,
16622         .validate_mtr_acts = flow_dv_validate_mtr_policy_acts,
16623         .create_mtr_acts = flow_dv_create_mtr_policy_acts,
16624         .destroy_mtr_acts = flow_dv_destroy_mtr_policy_acts,
16625         .create_policy_rules = flow_dv_create_policy_rules,
16626         .destroy_policy_rules = flow_dv_destroy_policy_rules,
16627         .create_def_policy = flow_dv_create_def_policy,
16628         .destroy_def_policy = flow_dv_destroy_def_policy,
16629         .meter_sub_policy_rss_prepare = flow_dv_meter_sub_policy_rss_prepare,
16630         .counter_alloc = flow_dv_counter_allocate,
16631         .counter_free = flow_dv_counter_free,
16632         .counter_query = flow_dv_counter_query,
16633         .get_aged_flows = flow_get_aged_flows,
16634         .action_validate = flow_dv_action_validate,
16635         .action_create = flow_dv_action_create,
16636         .action_destroy = flow_dv_action_destroy,
16637         .action_update = flow_dv_action_update,
16638         .action_query = flow_dv_action_query,
16639         .sync_domain = flow_dv_sync_domain,
16640 };
16641
16642 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
16643