1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2018 Mellanox Technologies, Ltd
11 #include <rte_common.h>
12 #include <rte_ether.h>
13 #include <ethdev_driver.h>
15 #include <rte_flow_driver.h>
16 #include <rte_malloc.h>
17 #include <rte_cycles.h>
20 #include <rte_vxlan.h>
22 #include <rte_eal_paging.h>
25 #include <rte_mtr_driver.h>
26 #include <rte_tailq.h>
28 #include <mlx5_glue.h>
29 #include <mlx5_devx_cmds.h>
31 #include <mlx5_malloc.h>
33 #include "mlx5_defs.h"
35 #include "mlx5_common_os.h"
36 #include "mlx5_flow.h"
37 #include "mlx5_flow_os.h"
40 #include "rte_pmd_mlx5.h"
42 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
44 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
45 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
48 #ifndef HAVE_MLX5DV_DR_ESWITCH
49 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
50 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
54 #ifndef HAVE_MLX5DV_DR
55 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
58 /* VLAN header definitions */
59 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
60 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
61 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
62 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
63 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
78 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
79 struct mlx5_flow_tbl_resource *tbl);
82 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
83 uint32_t encap_decap_idx);
86 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
89 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss);
92 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
96 * Initialize flow attributes structure according to flow items' types.
98 * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
99 * mode. For tunnel mode, the items to be modified are the outermost ones.
102 * Pointer to item specification.
104 * Pointer to flow attributes structure.
105 * @param[in] dev_flow
106 * Pointer to the sub flow.
107 * @param[in] tunnel_decap
108 * Whether action is after tunnel decapsulation.
111 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
112 struct mlx5_flow *dev_flow, bool tunnel_decap)
114 uint64_t layers = dev_flow->handle->layers;
117 * If layers is already initialized, it means this dev_flow is the
118 * suffix flow, the layers flags is set by the prefix flow. Need to
119 * use the layer flags from prefix flow as the suffix flow may not
120 * have the user defined items as the flow is split.
123 if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
125 else if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
127 if (layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
129 else if (layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
134 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
135 uint8_t next_protocol = 0xff;
136 switch (item->type) {
137 case RTE_FLOW_ITEM_TYPE_GRE:
138 case RTE_FLOW_ITEM_TYPE_NVGRE:
139 case RTE_FLOW_ITEM_TYPE_VXLAN:
140 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
141 case RTE_FLOW_ITEM_TYPE_GENEVE:
142 case RTE_FLOW_ITEM_TYPE_MPLS:
146 case RTE_FLOW_ITEM_TYPE_IPV4:
149 if (item->mask != NULL &&
150 ((const struct rte_flow_item_ipv4 *)
151 item->mask)->hdr.next_proto_id)
153 ((const struct rte_flow_item_ipv4 *)
154 (item->spec))->hdr.next_proto_id &
155 ((const struct rte_flow_item_ipv4 *)
156 (item->mask))->hdr.next_proto_id;
157 if ((next_protocol == IPPROTO_IPIP ||
158 next_protocol == IPPROTO_IPV6) && tunnel_decap)
161 case RTE_FLOW_ITEM_TYPE_IPV6:
164 if (item->mask != NULL &&
165 ((const struct rte_flow_item_ipv6 *)
166 item->mask)->hdr.proto)
168 ((const struct rte_flow_item_ipv6 *)
169 (item->spec))->hdr.proto &
170 ((const struct rte_flow_item_ipv6 *)
171 (item->mask))->hdr.proto;
172 if ((next_protocol == IPPROTO_IPIP ||
173 next_protocol == IPPROTO_IPV6) && tunnel_decap)
176 case RTE_FLOW_ITEM_TYPE_UDP:
180 case RTE_FLOW_ITEM_TYPE_TCP:
192 * Convert rte_mtr_color to mlx5 color.
201 rte_col_2_mlx5_col(enum rte_color rcol)
204 case RTE_COLOR_GREEN:
205 return MLX5_FLOW_COLOR_GREEN;
206 case RTE_COLOR_YELLOW:
207 return MLX5_FLOW_COLOR_YELLOW;
209 return MLX5_FLOW_COLOR_RED;
213 return MLX5_FLOW_COLOR_UNDEFINED;
216 struct field_modify_info {
217 uint32_t size; /* Size of field in protocol header, in bytes. */
218 uint32_t offset; /* Offset of field in protocol header, in bytes. */
219 enum mlx5_modification_field id;
222 struct field_modify_info modify_eth[] = {
223 {4, 0, MLX5_MODI_OUT_DMAC_47_16},
224 {2, 4, MLX5_MODI_OUT_DMAC_15_0},
225 {4, 6, MLX5_MODI_OUT_SMAC_47_16},
226 {2, 10, MLX5_MODI_OUT_SMAC_15_0},
230 struct field_modify_info modify_vlan_out_first_vid[] = {
231 /* Size in bits !!! */
232 {12, 0, MLX5_MODI_OUT_FIRST_VID},
236 struct field_modify_info modify_ipv4[] = {
237 {1, 1, MLX5_MODI_OUT_IP_DSCP},
238 {1, 8, MLX5_MODI_OUT_IPV4_TTL},
239 {4, 12, MLX5_MODI_OUT_SIPV4},
240 {4, 16, MLX5_MODI_OUT_DIPV4},
244 struct field_modify_info modify_ipv6[] = {
245 {1, 0, MLX5_MODI_OUT_IP_DSCP},
246 {1, 7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
247 {4, 8, MLX5_MODI_OUT_SIPV6_127_96},
248 {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
249 {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
250 {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
251 {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
252 {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
253 {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
254 {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
258 struct field_modify_info modify_udp[] = {
259 {2, 0, MLX5_MODI_OUT_UDP_SPORT},
260 {2, 2, MLX5_MODI_OUT_UDP_DPORT},
264 struct field_modify_info modify_tcp[] = {
265 {2, 0, MLX5_MODI_OUT_TCP_SPORT},
266 {2, 2, MLX5_MODI_OUT_TCP_DPORT},
267 {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
268 {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
272 static const struct rte_flow_item *
273 mlx5_flow_find_tunnel_item(const struct rte_flow_item *item)
275 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
276 switch (item->type) {
279 case RTE_FLOW_ITEM_TYPE_VXLAN:
280 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
281 case RTE_FLOW_ITEM_TYPE_GRE:
282 case RTE_FLOW_ITEM_TYPE_MPLS:
283 case RTE_FLOW_ITEM_TYPE_NVGRE:
284 case RTE_FLOW_ITEM_TYPE_GENEVE:
286 case RTE_FLOW_ITEM_TYPE_IPV4:
287 case RTE_FLOW_ITEM_TYPE_IPV6:
288 if (item[1].type == RTE_FLOW_ITEM_TYPE_IPV4 ||
289 item[1].type == RTE_FLOW_ITEM_TYPE_IPV6)
298 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
299 uint8_t next_protocol, uint64_t *item_flags,
302 MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
303 item->type == RTE_FLOW_ITEM_TYPE_IPV6);
304 if (next_protocol == IPPROTO_IPIP) {
305 *item_flags |= MLX5_FLOW_LAYER_IPIP;
308 if (next_protocol == IPPROTO_IPV6) {
309 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
314 static inline struct mlx5_hlist *
315 flow_dv_hlist_prepare(struct mlx5_dev_ctx_shared *sh, struct mlx5_hlist **phl,
316 const char *name, uint32_t size, bool direct_key,
317 bool lcores_share, void *ctx,
318 mlx5_list_create_cb cb_create,
319 mlx5_list_match_cb cb_match,
320 mlx5_list_remove_cb cb_remove,
321 mlx5_list_clone_cb cb_clone,
322 mlx5_list_clone_free_cb cb_clone_free)
324 struct mlx5_hlist *hl;
325 struct mlx5_hlist *expected = NULL;
326 char s[MLX5_NAME_SIZE];
328 hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
331 snprintf(s, sizeof(s), "%s_%s", sh->ibdev_name, name);
332 hl = mlx5_hlist_create(s, size, direct_key, lcores_share,
333 ctx, cb_create, cb_match, cb_remove, cb_clone,
336 DRV_LOG(ERR, "%s hash creation failed", name);
340 if (!__atomic_compare_exchange_n(phl, &expected, hl, false,
343 mlx5_hlist_destroy(hl);
344 hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
349 /* Update VLAN's VID/PCP based on input rte_flow_action.
352 * Pointer to struct rte_flow_action.
354 * Pointer to struct rte_vlan_hdr.
357 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
358 struct rte_vlan_hdr *vlan)
361 if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
363 ((const struct rte_flow_action_of_set_vlan_pcp *)
364 action->conf)->vlan_pcp;
365 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
366 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
367 vlan->vlan_tci |= vlan_tci;
368 } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
369 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
370 vlan->vlan_tci |= rte_be_to_cpu_16
371 (((const struct rte_flow_action_of_set_vlan_vid *)
372 action->conf)->vlan_vid);
377 * Fetch 1, 2, 3 or 4 byte field from the byte array
378 * and return as unsigned integer in host-endian format.
381 * Pointer to data array.
383 * Size of field to extract.
386 * converted field in host endian format.
388 static inline uint32_t
389 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
398 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
401 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
402 ret = (ret << 8) | *(data + sizeof(uint16_t));
405 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
416 * Convert modify-header action to DV specification.
418 * Data length of each action is determined by provided field description
419 * and the item mask. Data bit offset and width of each action is determined
420 * by provided item mask.
423 * Pointer to item specification.
425 * Pointer to field modification information.
426 * For MLX5_MODIFICATION_TYPE_SET specifies destination field.
427 * For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
428 * For MLX5_MODIFICATION_TYPE_COPY specifies source field.
430 * Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
431 * Negative offset value sets the same offset as source offset.
432 * size field is ignored, value is taken from source field.
433 * @param[in,out] resource
434 * Pointer to the modify-header resource.
436 * Type of modification.
438 * Pointer to the error structure.
441 * 0 on success, a negative errno value otherwise and rte_errno is set.
444 flow_dv_convert_modify_action(struct rte_flow_item *item,
445 struct field_modify_info *field,
446 struct field_modify_info *dcopy,
447 struct mlx5_flow_dv_modify_hdr_resource *resource,
448 uint32_t type, struct rte_flow_error *error)
450 uint32_t i = resource->actions_num;
451 struct mlx5_modification_cmd *actions = resource->actions;
452 uint32_t carry_b = 0;
455 * The item and mask are provided in big-endian format.
456 * The fields should be presented as in big-endian format either.
457 * Mask must be always present, it defines the actual field width.
459 MLX5_ASSERT(item->mask);
460 MLX5_ASSERT(field->size);
466 bool next_field = true;
467 bool next_dcopy = true;
469 if (i >= MLX5_MAX_MODIFY_NUM)
470 return rte_flow_error_set(error, EINVAL,
471 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
472 "too many items to modify");
473 /* Fetch variable byte size mask from the array. */
474 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
475 field->offset, field->size);
480 /* Deduce actual data width in bits from mask value. */
481 off_b = rte_bsf32(mask) + carry_b;
482 size_b = sizeof(uint32_t) * CHAR_BIT -
483 off_b - __builtin_clz(mask);
485 actions[i] = (struct mlx5_modification_cmd) {
489 .length = (size_b == sizeof(uint32_t) * CHAR_BIT) ?
492 if (type == MLX5_MODIFICATION_TYPE_COPY) {
494 actions[i].dst_field = dcopy->id;
495 actions[i].dst_offset =
496 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
497 /* Convert entire record to big-endian format. */
498 actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
500 * Destination field overflow. Copy leftovers of
501 * a source field to the next destination field.
504 if ((size_b > dcopy->size * CHAR_BIT - dcopy->offset) &&
507 dcopy->size * CHAR_BIT - dcopy->offset;
508 carry_b = actions[i].length;
512 * Not enough bits in a source filed to fill a
513 * destination field. Switch to the next source.
515 if ((size_b < dcopy->size * CHAR_BIT - dcopy->offset) &&
516 (size_b == field->size * CHAR_BIT - off_b)) {
518 field->size * CHAR_BIT - off_b;
519 dcopy->offset += actions[i].length;
525 MLX5_ASSERT(item->spec);
526 data = flow_dv_fetch_field((const uint8_t *)item->spec +
527 field->offset, field->size);
528 /* Shift out the trailing masked bits from data. */
529 data = (data & mask) >> off_b;
530 actions[i].data1 = rte_cpu_to_be_32(data);
532 /* Convert entire record to expected big-endian format. */
533 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
537 } while (field->size);
538 if (resource->actions_num == i)
539 return rte_flow_error_set(error, EINVAL,
540 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
541 "invalid modification flow item");
542 resource->actions_num = i;
547 * Convert modify-header set IPv4 address action to DV specification.
549 * @param[in,out] resource
550 * Pointer to the modify-header resource.
552 * Pointer to action specification.
554 * Pointer to the error structure.
557 * 0 on success, a negative errno value otherwise and rte_errno is set.
560 flow_dv_convert_action_modify_ipv4
561 (struct mlx5_flow_dv_modify_hdr_resource *resource,
562 const struct rte_flow_action *action,
563 struct rte_flow_error *error)
565 const struct rte_flow_action_set_ipv4 *conf =
566 (const struct rte_flow_action_set_ipv4 *)(action->conf);
567 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
568 struct rte_flow_item_ipv4 ipv4;
569 struct rte_flow_item_ipv4 ipv4_mask;
571 memset(&ipv4, 0, sizeof(ipv4));
572 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
573 if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
574 ipv4.hdr.src_addr = conf->ipv4_addr;
575 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
577 ipv4.hdr.dst_addr = conf->ipv4_addr;
578 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
581 item.mask = &ipv4_mask;
582 return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
583 MLX5_MODIFICATION_TYPE_SET, error);
587 * Convert modify-header set IPv6 address action to DV specification.
589 * @param[in,out] resource
590 * Pointer to the modify-header resource.
592 * Pointer to action specification.
594 * Pointer to the error structure.
597 * 0 on success, a negative errno value otherwise and rte_errno is set.
600 flow_dv_convert_action_modify_ipv6
601 (struct mlx5_flow_dv_modify_hdr_resource *resource,
602 const struct rte_flow_action *action,
603 struct rte_flow_error *error)
605 const struct rte_flow_action_set_ipv6 *conf =
606 (const struct rte_flow_action_set_ipv6 *)(action->conf);
607 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
608 struct rte_flow_item_ipv6 ipv6;
609 struct rte_flow_item_ipv6 ipv6_mask;
611 memset(&ipv6, 0, sizeof(ipv6));
612 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
613 if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
614 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
615 sizeof(ipv6.hdr.src_addr));
616 memcpy(&ipv6_mask.hdr.src_addr,
617 &rte_flow_item_ipv6_mask.hdr.src_addr,
618 sizeof(ipv6.hdr.src_addr));
620 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
621 sizeof(ipv6.hdr.dst_addr));
622 memcpy(&ipv6_mask.hdr.dst_addr,
623 &rte_flow_item_ipv6_mask.hdr.dst_addr,
624 sizeof(ipv6.hdr.dst_addr));
627 item.mask = &ipv6_mask;
628 return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
629 MLX5_MODIFICATION_TYPE_SET, error);
633 * Convert modify-header set MAC address action to DV specification.
635 * @param[in,out] resource
636 * Pointer to the modify-header resource.
638 * Pointer to action specification.
640 * Pointer to the error structure.
643 * 0 on success, a negative errno value otherwise and rte_errno is set.
646 flow_dv_convert_action_modify_mac
647 (struct mlx5_flow_dv_modify_hdr_resource *resource,
648 const struct rte_flow_action *action,
649 struct rte_flow_error *error)
651 const struct rte_flow_action_set_mac *conf =
652 (const struct rte_flow_action_set_mac *)(action->conf);
653 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
654 struct rte_flow_item_eth eth;
655 struct rte_flow_item_eth eth_mask;
657 memset(ð, 0, sizeof(eth));
658 memset(ð_mask, 0, sizeof(eth_mask));
659 if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
660 memcpy(ð.src.addr_bytes, &conf->mac_addr,
661 sizeof(eth.src.addr_bytes));
662 memcpy(ð_mask.src.addr_bytes,
663 &rte_flow_item_eth_mask.src.addr_bytes,
664 sizeof(eth_mask.src.addr_bytes));
666 memcpy(ð.dst.addr_bytes, &conf->mac_addr,
667 sizeof(eth.dst.addr_bytes));
668 memcpy(ð_mask.dst.addr_bytes,
669 &rte_flow_item_eth_mask.dst.addr_bytes,
670 sizeof(eth_mask.dst.addr_bytes));
673 item.mask = ð_mask;
674 return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
675 MLX5_MODIFICATION_TYPE_SET, error);
679 * Convert modify-header set VLAN VID action to DV specification.
681 * @param[in,out] resource
682 * Pointer to the modify-header resource.
684 * Pointer to action specification.
686 * Pointer to the error structure.
689 * 0 on success, a negative errno value otherwise and rte_errno is set.
692 flow_dv_convert_action_modify_vlan_vid
693 (struct mlx5_flow_dv_modify_hdr_resource *resource,
694 const struct rte_flow_action *action,
695 struct rte_flow_error *error)
697 const struct rte_flow_action_of_set_vlan_vid *conf =
698 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
699 int i = resource->actions_num;
700 struct mlx5_modification_cmd *actions = resource->actions;
701 struct field_modify_info *field = modify_vlan_out_first_vid;
703 if (i >= MLX5_MAX_MODIFY_NUM)
704 return rte_flow_error_set(error, EINVAL,
705 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
706 "too many items to modify");
707 actions[i] = (struct mlx5_modification_cmd) {
708 .action_type = MLX5_MODIFICATION_TYPE_SET,
710 .length = field->size,
711 .offset = field->offset,
713 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
714 actions[i].data1 = conf->vlan_vid;
715 actions[i].data1 = actions[i].data1 << 16;
716 resource->actions_num = ++i;
721 * Convert modify-header set TP action to DV specification.
723 * @param[in,out] resource
724 * Pointer to the modify-header resource.
726 * Pointer to action specification.
728 * Pointer to rte_flow_item objects list.
730 * Pointer to flow attributes structure.
731 * @param[in] dev_flow
732 * Pointer to the sub flow.
733 * @param[in] tunnel_decap
734 * Whether action is after tunnel decapsulation.
736 * Pointer to the error structure.
739 * 0 on success, a negative errno value otherwise and rte_errno is set.
742 flow_dv_convert_action_modify_tp
743 (struct mlx5_flow_dv_modify_hdr_resource *resource,
744 const struct rte_flow_action *action,
745 const struct rte_flow_item *items,
746 union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
747 bool tunnel_decap, struct rte_flow_error *error)
749 const struct rte_flow_action_set_tp *conf =
750 (const struct rte_flow_action_set_tp *)(action->conf);
751 struct rte_flow_item item;
752 struct rte_flow_item_udp udp;
753 struct rte_flow_item_udp udp_mask;
754 struct rte_flow_item_tcp tcp;
755 struct rte_flow_item_tcp tcp_mask;
756 struct field_modify_info *field;
759 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
761 memset(&udp, 0, sizeof(udp));
762 memset(&udp_mask, 0, sizeof(udp_mask));
763 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
764 udp.hdr.src_port = conf->port;
765 udp_mask.hdr.src_port =
766 rte_flow_item_udp_mask.hdr.src_port;
768 udp.hdr.dst_port = conf->port;
769 udp_mask.hdr.dst_port =
770 rte_flow_item_udp_mask.hdr.dst_port;
772 item.type = RTE_FLOW_ITEM_TYPE_UDP;
774 item.mask = &udp_mask;
777 MLX5_ASSERT(attr->tcp);
778 memset(&tcp, 0, sizeof(tcp));
779 memset(&tcp_mask, 0, sizeof(tcp_mask));
780 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
781 tcp.hdr.src_port = conf->port;
782 tcp_mask.hdr.src_port =
783 rte_flow_item_tcp_mask.hdr.src_port;
785 tcp.hdr.dst_port = conf->port;
786 tcp_mask.hdr.dst_port =
787 rte_flow_item_tcp_mask.hdr.dst_port;
789 item.type = RTE_FLOW_ITEM_TYPE_TCP;
791 item.mask = &tcp_mask;
794 return flow_dv_convert_modify_action(&item, field, NULL, resource,
795 MLX5_MODIFICATION_TYPE_SET, error);
799 * Convert modify-header set TTL action to DV specification.
801 * @param[in,out] resource
802 * Pointer to the modify-header resource.
804 * Pointer to action specification.
806 * Pointer to rte_flow_item objects list.
808 * Pointer to flow attributes structure.
809 * @param[in] dev_flow
810 * Pointer to the sub flow.
811 * @param[in] tunnel_decap
812 * Whether action is after tunnel decapsulation.
814 * Pointer to the error structure.
817 * 0 on success, a negative errno value otherwise and rte_errno is set.
820 flow_dv_convert_action_modify_ttl
821 (struct mlx5_flow_dv_modify_hdr_resource *resource,
822 const struct rte_flow_action *action,
823 const struct rte_flow_item *items,
824 union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
825 bool tunnel_decap, struct rte_flow_error *error)
827 const struct rte_flow_action_set_ttl *conf =
828 (const struct rte_flow_action_set_ttl *)(action->conf);
829 struct rte_flow_item item;
830 struct rte_flow_item_ipv4 ipv4;
831 struct rte_flow_item_ipv4 ipv4_mask;
832 struct rte_flow_item_ipv6 ipv6;
833 struct rte_flow_item_ipv6 ipv6_mask;
834 struct field_modify_info *field;
837 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
839 memset(&ipv4, 0, sizeof(ipv4));
840 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
841 ipv4.hdr.time_to_live = conf->ttl_value;
842 ipv4_mask.hdr.time_to_live = 0xFF;
843 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
845 item.mask = &ipv4_mask;
848 MLX5_ASSERT(attr->ipv6);
849 memset(&ipv6, 0, sizeof(ipv6));
850 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
851 ipv6.hdr.hop_limits = conf->ttl_value;
852 ipv6_mask.hdr.hop_limits = 0xFF;
853 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
855 item.mask = &ipv6_mask;
858 return flow_dv_convert_modify_action(&item, field, NULL, resource,
859 MLX5_MODIFICATION_TYPE_SET, error);
863 * Convert modify-header decrement TTL action to DV specification.
865 * @param[in,out] resource
866 * Pointer to the modify-header resource.
868 * Pointer to action specification.
870 * Pointer to rte_flow_item objects list.
872 * Pointer to flow attributes structure.
873 * @param[in] dev_flow
874 * Pointer to the sub flow.
875 * @param[in] tunnel_decap
876 * Whether action is after tunnel decapsulation.
878 * Pointer to the error structure.
881 * 0 on success, a negative errno value otherwise and rte_errno is set.
884 flow_dv_convert_action_modify_dec_ttl
885 (struct mlx5_flow_dv_modify_hdr_resource *resource,
886 const struct rte_flow_item *items,
887 union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
888 bool tunnel_decap, struct rte_flow_error *error)
890 struct rte_flow_item item;
891 struct rte_flow_item_ipv4 ipv4;
892 struct rte_flow_item_ipv4 ipv4_mask;
893 struct rte_flow_item_ipv6 ipv6;
894 struct rte_flow_item_ipv6 ipv6_mask;
895 struct field_modify_info *field;
898 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
900 memset(&ipv4, 0, sizeof(ipv4));
901 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
902 ipv4.hdr.time_to_live = 0xFF;
903 ipv4_mask.hdr.time_to_live = 0xFF;
904 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
906 item.mask = &ipv4_mask;
909 MLX5_ASSERT(attr->ipv6);
910 memset(&ipv6, 0, sizeof(ipv6));
911 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
912 ipv6.hdr.hop_limits = 0xFF;
913 ipv6_mask.hdr.hop_limits = 0xFF;
914 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
916 item.mask = &ipv6_mask;
919 return flow_dv_convert_modify_action(&item, field, NULL, resource,
920 MLX5_MODIFICATION_TYPE_ADD, error);
924 * Convert modify-header increment/decrement TCP Sequence number
925 * to DV specification.
927 * @param[in,out] resource
928 * Pointer to the modify-header resource.
930 * Pointer to action specification.
932 * Pointer to the error structure.
935 * 0 on success, a negative errno value otherwise and rte_errno is set.
938 flow_dv_convert_action_modify_tcp_seq
939 (struct mlx5_flow_dv_modify_hdr_resource *resource,
940 const struct rte_flow_action *action,
941 struct rte_flow_error *error)
943 const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
944 uint64_t value = rte_be_to_cpu_32(*conf);
945 struct rte_flow_item item;
946 struct rte_flow_item_tcp tcp;
947 struct rte_flow_item_tcp tcp_mask;
949 memset(&tcp, 0, sizeof(tcp));
950 memset(&tcp_mask, 0, sizeof(tcp_mask));
951 if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
953 * The HW has no decrement operation, only increment operation.
954 * To simulate decrement X from Y using increment operation
955 * we need to add UINT32_MAX X times to Y.
956 * Each adding of UINT32_MAX decrements Y by 1.
959 tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
960 tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
961 item.type = RTE_FLOW_ITEM_TYPE_TCP;
963 item.mask = &tcp_mask;
964 return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
965 MLX5_MODIFICATION_TYPE_ADD, error);
969 * Convert modify-header increment/decrement TCP Acknowledgment number
970 * to DV specification.
972 * @param[in,out] resource
973 * Pointer to the modify-header resource.
975 * Pointer to action specification.
977 * Pointer to the error structure.
980 * 0 on success, a negative errno value otherwise and rte_errno is set.
983 flow_dv_convert_action_modify_tcp_ack
984 (struct mlx5_flow_dv_modify_hdr_resource *resource,
985 const struct rte_flow_action *action,
986 struct rte_flow_error *error)
988 const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
989 uint64_t value = rte_be_to_cpu_32(*conf);
990 struct rte_flow_item item;
991 struct rte_flow_item_tcp tcp;
992 struct rte_flow_item_tcp tcp_mask;
994 memset(&tcp, 0, sizeof(tcp));
995 memset(&tcp_mask, 0, sizeof(tcp_mask));
996 if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
998 * The HW has no decrement operation, only increment operation.
999 * To simulate decrement X from Y using increment operation
1000 * we need to add UINT32_MAX X times to Y.
1001 * Each adding of UINT32_MAX decrements Y by 1.
1003 value *= UINT32_MAX;
1004 tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
1005 tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
1006 item.type = RTE_FLOW_ITEM_TYPE_TCP;
1008 item.mask = &tcp_mask;
1009 return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
1010 MLX5_MODIFICATION_TYPE_ADD, error);
1013 static enum mlx5_modification_field reg_to_field[] = {
1014 [REG_NON] = MLX5_MODI_OUT_NONE,
1015 [REG_A] = MLX5_MODI_META_DATA_REG_A,
1016 [REG_B] = MLX5_MODI_META_DATA_REG_B,
1017 [REG_C_0] = MLX5_MODI_META_REG_C_0,
1018 [REG_C_1] = MLX5_MODI_META_REG_C_1,
1019 [REG_C_2] = MLX5_MODI_META_REG_C_2,
1020 [REG_C_3] = MLX5_MODI_META_REG_C_3,
1021 [REG_C_4] = MLX5_MODI_META_REG_C_4,
1022 [REG_C_5] = MLX5_MODI_META_REG_C_5,
1023 [REG_C_6] = MLX5_MODI_META_REG_C_6,
1024 [REG_C_7] = MLX5_MODI_META_REG_C_7,
1028 * Convert register set to DV specification.
1030 * @param[in,out] resource
1031 * Pointer to the modify-header resource.
1033 * Pointer to action specification.
1035 * Pointer to the error structure.
1038 * 0 on success, a negative errno value otherwise and rte_errno is set.
1041 flow_dv_convert_action_set_reg
1042 (struct mlx5_flow_dv_modify_hdr_resource *resource,
1043 const struct rte_flow_action *action,
1044 struct rte_flow_error *error)
1046 const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
1047 struct mlx5_modification_cmd *actions = resource->actions;
1048 uint32_t i = resource->actions_num;
1050 if (i >= MLX5_MAX_MODIFY_NUM)
1051 return rte_flow_error_set(error, EINVAL,
1052 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1053 "too many items to modify");
1054 MLX5_ASSERT(conf->id != REG_NON);
1055 MLX5_ASSERT(conf->id < (enum modify_reg)RTE_DIM(reg_to_field));
1056 actions[i] = (struct mlx5_modification_cmd) {
1057 .action_type = MLX5_MODIFICATION_TYPE_SET,
1058 .field = reg_to_field[conf->id],
1059 .offset = conf->offset,
1060 .length = conf->length,
1062 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
1063 actions[i].data1 = rte_cpu_to_be_32(conf->data);
1065 resource->actions_num = i;
1070 * Convert SET_TAG action to DV specification.
1073 * Pointer to the rte_eth_dev structure.
1074 * @param[in,out] resource
1075 * Pointer to the modify-header resource.
1077 * Pointer to action specification.
1079 * Pointer to the error structure.
1082 * 0 on success, a negative errno value otherwise and rte_errno is set.
1085 flow_dv_convert_action_set_tag
1086 (struct rte_eth_dev *dev,
1087 struct mlx5_flow_dv_modify_hdr_resource *resource,
1088 const struct rte_flow_action_set_tag *conf,
1089 struct rte_flow_error *error)
1091 rte_be32_t data = rte_cpu_to_be_32(conf->data);
1092 rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
1093 struct rte_flow_item item = {
1097 struct field_modify_info reg_c_x[] = {
1100 enum mlx5_modification_field reg_type;
1103 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1106 MLX5_ASSERT(ret != REG_NON);
1107 MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1108 reg_type = reg_to_field[ret];
1109 MLX5_ASSERT(reg_type > 0);
1110 reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1111 return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1112 MLX5_MODIFICATION_TYPE_SET, error);
1116 * Convert internal COPY_REG action to DV specification.
1119 * Pointer to the rte_eth_dev structure.
1120 * @param[in,out] res
1121 * Pointer to the modify-header resource.
1123 * Pointer to action specification.
1125 * Pointer to the error structure.
1128 * 0 on success, a negative errno value otherwise and rte_errno is set.
1131 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1132 struct mlx5_flow_dv_modify_hdr_resource *res,
1133 const struct rte_flow_action *action,
1134 struct rte_flow_error *error)
1136 const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1137 rte_be32_t mask = RTE_BE32(UINT32_MAX);
1138 struct rte_flow_item item = {
1142 struct field_modify_info reg_src[] = {
1143 {4, 0, reg_to_field[conf->src]},
1146 struct field_modify_info reg_dst = {
1148 .id = reg_to_field[conf->dst],
1150 /* Adjust reg_c[0] usage according to reported mask. */
1151 if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1152 struct mlx5_priv *priv = dev->data->dev_private;
1153 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1155 MLX5_ASSERT(reg_c0);
1156 MLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1157 if (conf->dst == REG_C_0) {
1158 /* Copy to reg_c[0], within mask only. */
1159 reg_dst.offset = rte_bsf32(reg_c0);
1160 mask = rte_cpu_to_be_32(reg_c0 >> reg_dst.offset);
1163 mask = rte_cpu_to_be_32(reg_c0);
1166 return flow_dv_convert_modify_action(&item,
1167 reg_src, ®_dst, res,
1168 MLX5_MODIFICATION_TYPE_COPY,
1173 * Convert MARK action to DV specification. This routine is used
1174 * in extensive metadata only and requires metadata register to be
1175 * handled. In legacy mode hardware tag resource is engaged.
1178 * Pointer to the rte_eth_dev structure.
1180 * Pointer to MARK action specification.
1181 * @param[in,out] resource
1182 * Pointer to the modify-header resource.
1184 * Pointer to the error structure.
1187 * 0 on success, a negative errno value otherwise and rte_errno is set.
1190 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1191 const struct rte_flow_action_mark *conf,
1192 struct mlx5_flow_dv_modify_hdr_resource *resource,
1193 struct rte_flow_error *error)
1195 struct mlx5_priv *priv = dev->data->dev_private;
1196 rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1197 priv->sh->dv_mark_mask);
1198 rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1199 struct rte_flow_item item = {
1203 struct field_modify_info reg_c_x[] = {
1209 return rte_flow_error_set(error, EINVAL,
1210 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1211 NULL, "zero mark action mask");
1212 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1215 MLX5_ASSERT(reg > 0);
1216 if (reg == REG_C_0) {
1217 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1218 uint32_t shl_c0 = rte_bsf32(msk_c0);
1220 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1221 mask = rte_cpu_to_be_32(mask) & msk_c0;
1222 mask = rte_cpu_to_be_32(mask << shl_c0);
1224 reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1225 return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1226 MLX5_MODIFICATION_TYPE_SET, error);
1230 * Get metadata register index for specified steering domain.
1233 * Pointer to the rte_eth_dev structure.
1235 * Attributes of flow to determine steering domain.
1237 * Pointer to the error structure.
1240 * positive index on success, a negative errno value otherwise
1241 * and rte_errno is set.
1243 static enum modify_reg
1244 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1245 const struct rte_flow_attr *attr,
1246 struct rte_flow_error *error)
1249 mlx5_flow_get_reg_id(dev, attr->transfer ?
1253 MLX5_METADATA_RX, 0, error);
1255 return rte_flow_error_set(error,
1256 ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1257 NULL, "unavailable "
1258 "metadata register");
1263 * Convert SET_META action to DV specification.
1266 * Pointer to the rte_eth_dev structure.
1267 * @param[in,out] resource
1268 * Pointer to the modify-header resource.
1270 * Attributes of flow that includes this item.
1272 * Pointer to action specification.
1274 * Pointer to the error structure.
1277 * 0 on success, a negative errno value otherwise and rte_errno is set.
1280 flow_dv_convert_action_set_meta
1281 (struct rte_eth_dev *dev,
1282 struct mlx5_flow_dv_modify_hdr_resource *resource,
1283 const struct rte_flow_attr *attr,
1284 const struct rte_flow_action_set_meta *conf,
1285 struct rte_flow_error *error)
1287 uint32_t mask = rte_cpu_to_be_32(conf->mask);
1288 uint32_t data = rte_cpu_to_be_32(conf->data) & mask;
1289 struct rte_flow_item item = {
1293 struct field_modify_info reg_c_x[] = {
1296 int reg = flow_dv_get_metadata_reg(dev, attr, error);
1300 MLX5_ASSERT(reg != REG_NON);
1301 if (reg == REG_C_0) {
1302 struct mlx5_priv *priv = dev->data->dev_private;
1303 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1304 uint32_t shl_c0 = rte_bsf32(msk_c0);
1306 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1307 mask = rte_cpu_to_be_32(mask) & msk_c0;
1308 mask = rte_cpu_to_be_32(mask << shl_c0);
1310 reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1311 /* The routine expects parameters in memory as big-endian ones. */
1312 return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1313 MLX5_MODIFICATION_TYPE_SET, error);
1317 * Convert modify-header set IPv4 DSCP action to DV specification.
1319 * @param[in,out] resource
1320 * Pointer to the modify-header resource.
1322 * Pointer to action specification.
1324 * Pointer to the error structure.
1327 * 0 on success, a negative errno value otherwise and rte_errno is set.
1330 flow_dv_convert_action_modify_ipv4_dscp
1331 (struct mlx5_flow_dv_modify_hdr_resource *resource,
1332 const struct rte_flow_action *action,
1333 struct rte_flow_error *error)
1335 const struct rte_flow_action_set_dscp *conf =
1336 (const struct rte_flow_action_set_dscp *)(action->conf);
1337 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1338 struct rte_flow_item_ipv4 ipv4;
1339 struct rte_flow_item_ipv4 ipv4_mask;
1341 memset(&ipv4, 0, sizeof(ipv4));
1342 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1343 ipv4.hdr.type_of_service = conf->dscp;
1344 ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1346 item.mask = &ipv4_mask;
1347 return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1348 MLX5_MODIFICATION_TYPE_SET, error);
1352 * Convert modify-header set IPv6 DSCP action to DV specification.
1354 * @param[in,out] resource
1355 * Pointer to the modify-header resource.
1357 * Pointer to action specification.
1359 * Pointer to the error structure.
1362 * 0 on success, a negative errno value otherwise and rte_errno is set.
1365 flow_dv_convert_action_modify_ipv6_dscp
1366 (struct mlx5_flow_dv_modify_hdr_resource *resource,
1367 const struct rte_flow_action *action,
1368 struct rte_flow_error *error)
1370 const struct rte_flow_action_set_dscp *conf =
1371 (const struct rte_flow_action_set_dscp *)(action->conf);
1372 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1373 struct rte_flow_item_ipv6 ipv6;
1374 struct rte_flow_item_ipv6 ipv6_mask;
1376 memset(&ipv6, 0, sizeof(ipv6));
1377 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1379 * Even though the DSCP bits offset of IPv6 is not byte aligned,
1380 * rdma-core only accept the DSCP bits byte aligned start from
1381 * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1382 * bits in IPv6 case as rdma-core requires byte aligned value.
1384 ipv6.hdr.vtc_flow = conf->dscp;
1385 ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1387 item.mask = &ipv6_mask;
1388 return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1389 MLX5_MODIFICATION_TYPE_SET, error);
1393 mlx5_flow_item_field_width(struct mlx5_priv *priv,
1394 enum rte_flow_field_id field)
1397 case RTE_FLOW_FIELD_START:
1399 case RTE_FLOW_FIELD_MAC_DST:
1400 case RTE_FLOW_FIELD_MAC_SRC:
1402 case RTE_FLOW_FIELD_VLAN_TYPE:
1404 case RTE_FLOW_FIELD_VLAN_ID:
1406 case RTE_FLOW_FIELD_MAC_TYPE:
1408 case RTE_FLOW_FIELD_IPV4_DSCP:
1410 case RTE_FLOW_FIELD_IPV4_TTL:
1412 case RTE_FLOW_FIELD_IPV4_SRC:
1413 case RTE_FLOW_FIELD_IPV4_DST:
1415 case RTE_FLOW_FIELD_IPV6_DSCP:
1417 case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1419 case RTE_FLOW_FIELD_IPV6_SRC:
1420 case RTE_FLOW_FIELD_IPV6_DST:
1422 case RTE_FLOW_FIELD_TCP_PORT_SRC:
1423 case RTE_FLOW_FIELD_TCP_PORT_DST:
1425 case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1426 case RTE_FLOW_FIELD_TCP_ACK_NUM:
1428 case RTE_FLOW_FIELD_TCP_FLAGS:
1430 case RTE_FLOW_FIELD_UDP_PORT_SRC:
1431 case RTE_FLOW_FIELD_UDP_PORT_DST:
1433 case RTE_FLOW_FIELD_VXLAN_VNI:
1434 case RTE_FLOW_FIELD_GENEVE_VNI:
1436 case RTE_FLOW_FIELD_GTP_TEID:
1437 case RTE_FLOW_FIELD_TAG:
1439 case RTE_FLOW_FIELD_MARK:
1440 return __builtin_popcount(priv->sh->dv_mark_mask);
1441 case RTE_FLOW_FIELD_META:
1442 return __builtin_popcount(priv->sh->dv_meta_mask);
1443 case RTE_FLOW_FIELD_POINTER:
1444 case RTE_FLOW_FIELD_VALUE:
1453 mlx5_flow_field_id_to_modify_info
1454 (const struct rte_flow_action_modify_data *data,
1455 struct field_modify_info *info,
1456 uint32_t *mask, uint32_t *value,
1457 uint32_t width, uint32_t dst_width,
1458 uint32_t *shift, struct rte_eth_dev *dev,
1459 const struct rte_flow_attr *attr,
1460 struct rte_flow_error *error)
1462 struct mlx5_priv *priv = dev->data->dev_private;
1466 switch (data->field) {
1467 case RTE_FLOW_FIELD_START:
1468 /* not supported yet */
1471 case RTE_FLOW_FIELD_MAC_DST:
1472 off = data->offset > 16 ? data->offset - 16 : 0;
1474 if (data->offset < 16) {
1475 info[idx] = (struct field_modify_info){2, 0,
1476 MLX5_MODI_OUT_DMAC_15_0};
1478 mask[idx] = rte_cpu_to_be_16(0xffff >>
1482 mask[idx] = RTE_BE16(0xffff);
1489 info[idx] = (struct field_modify_info){4, 4 * idx,
1490 MLX5_MODI_OUT_DMAC_47_16};
1491 mask[idx] = rte_cpu_to_be_32((0xffffffff >>
1492 (32 - width)) << off);
1494 if (data->offset < 16)
1495 info[idx++] = (struct field_modify_info){2, 0,
1496 MLX5_MODI_OUT_DMAC_15_0};
1497 info[idx] = (struct field_modify_info){4, off,
1498 MLX5_MODI_OUT_DMAC_47_16};
1501 case RTE_FLOW_FIELD_MAC_SRC:
1502 off = data->offset > 16 ? data->offset - 16 : 0;
1504 if (data->offset < 16) {
1505 info[idx] = (struct field_modify_info){2, 0,
1506 MLX5_MODI_OUT_SMAC_15_0};
1508 mask[idx] = rte_cpu_to_be_16(0xffff >>
1512 mask[idx] = RTE_BE16(0xffff);
1519 info[idx] = (struct field_modify_info){4, 4 * idx,
1520 MLX5_MODI_OUT_SMAC_47_16};
1521 mask[idx] = rte_cpu_to_be_32((0xffffffff >>
1522 (32 - width)) << off);
1524 if (data->offset < 16)
1525 info[idx++] = (struct field_modify_info){2, 0,
1526 MLX5_MODI_OUT_SMAC_15_0};
1527 info[idx] = (struct field_modify_info){4, off,
1528 MLX5_MODI_OUT_SMAC_47_16};
1531 case RTE_FLOW_FIELD_VLAN_TYPE:
1532 /* not supported yet */
1534 case RTE_FLOW_FIELD_VLAN_ID:
1535 info[idx] = (struct field_modify_info){2, 0,
1536 MLX5_MODI_OUT_FIRST_VID};
1538 mask[idx] = rte_cpu_to_be_16(0x0fff >> (12 - width));
1540 case RTE_FLOW_FIELD_MAC_TYPE:
1541 info[idx] = (struct field_modify_info){2, 0,
1542 MLX5_MODI_OUT_ETHERTYPE};
1544 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1546 case RTE_FLOW_FIELD_IPV4_DSCP:
1547 info[idx] = (struct field_modify_info){1, 0,
1548 MLX5_MODI_OUT_IP_DSCP};
1550 mask[idx] = 0x3f >> (6 - width);
1552 case RTE_FLOW_FIELD_IPV4_TTL:
1553 info[idx] = (struct field_modify_info){1, 0,
1554 MLX5_MODI_OUT_IPV4_TTL};
1556 mask[idx] = 0xff >> (8 - width);
1558 case RTE_FLOW_FIELD_IPV4_SRC:
1559 info[idx] = (struct field_modify_info){4, 0,
1560 MLX5_MODI_OUT_SIPV4};
1562 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1565 case RTE_FLOW_FIELD_IPV4_DST:
1566 info[idx] = (struct field_modify_info){4, 0,
1567 MLX5_MODI_OUT_DIPV4};
1569 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1572 case RTE_FLOW_FIELD_IPV6_DSCP:
1573 info[idx] = (struct field_modify_info){1, 0,
1574 MLX5_MODI_OUT_IP_DSCP};
1576 mask[idx] = 0x3f >> (6 - width);
1578 case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1579 info[idx] = (struct field_modify_info){1, 0,
1580 MLX5_MODI_OUT_IPV6_HOPLIMIT};
1582 mask[idx] = 0xff >> (8 - width);
1584 case RTE_FLOW_FIELD_IPV6_SRC:
1586 if (data->offset < 32) {
1587 info[idx] = (struct field_modify_info){4,
1589 MLX5_MODI_OUT_SIPV6_31_0};
1592 rte_cpu_to_be_32(0xffffffff >>
1596 mask[idx] = RTE_BE32(0xffffffff);
1603 if (data->offset < 64) {
1604 info[idx] = (struct field_modify_info){4,
1606 MLX5_MODI_OUT_SIPV6_63_32};
1609 rte_cpu_to_be_32(0xffffffff >>
1613 mask[idx] = RTE_BE32(0xffffffff);
1620 if (data->offset < 96) {
1621 info[idx] = (struct field_modify_info){4,
1623 MLX5_MODI_OUT_SIPV6_95_64};
1626 rte_cpu_to_be_32(0xffffffff >>
1630 mask[idx] = RTE_BE32(0xffffffff);
1637 info[idx] = (struct field_modify_info){4, 4 * idx,
1638 MLX5_MODI_OUT_SIPV6_127_96};
1639 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1642 if (data->offset < 32)
1643 info[idx++] = (struct field_modify_info){4, 0,
1644 MLX5_MODI_OUT_SIPV6_31_0};
1645 if (data->offset < 64)
1646 info[idx++] = (struct field_modify_info){4, 0,
1647 MLX5_MODI_OUT_SIPV6_63_32};
1648 if (data->offset < 96)
1649 info[idx++] = (struct field_modify_info){4, 0,
1650 MLX5_MODI_OUT_SIPV6_95_64};
1651 if (data->offset < 128)
1652 info[idx++] = (struct field_modify_info){4, 0,
1653 MLX5_MODI_OUT_SIPV6_127_96};
1656 case RTE_FLOW_FIELD_IPV6_DST:
1658 if (data->offset < 32) {
1659 info[idx] = (struct field_modify_info){4,
1661 MLX5_MODI_OUT_DIPV6_31_0};
1664 rte_cpu_to_be_32(0xffffffff >>
1668 mask[idx] = RTE_BE32(0xffffffff);
1675 if (data->offset < 64) {
1676 info[idx] = (struct field_modify_info){4,
1678 MLX5_MODI_OUT_DIPV6_63_32};
1681 rte_cpu_to_be_32(0xffffffff >>
1685 mask[idx] = RTE_BE32(0xffffffff);
1692 if (data->offset < 96) {
1693 info[idx] = (struct field_modify_info){4,
1695 MLX5_MODI_OUT_DIPV6_95_64};
1698 rte_cpu_to_be_32(0xffffffff >>
1702 mask[idx] = RTE_BE32(0xffffffff);
1709 info[idx] = (struct field_modify_info){4, 4 * idx,
1710 MLX5_MODI_OUT_DIPV6_127_96};
1711 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1714 if (data->offset < 32)
1715 info[idx++] = (struct field_modify_info){4, 0,
1716 MLX5_MODI_OUT_DIPV6_31_0};
1717 if (data->offset < 64)
1718 info[idx++] = (struct field_modify_info){4, 0,
1719 MLX5_MODI_OUT_DIPV6_63_32};
1720 if (data->offset < 96)
1721 info[idx++] = (struct field_modify_info){4, 0,
1722 MLX5_MODI_OUT_DIPV6_95_64};
1723 if (data->offset < 128)
1724 info[idx++] = (struct field_modify_info){4, 0,
1725 MLX5_MODI_OUT_DIPV6_127_96};
1728 case RTE_FLOW_FIELD_TCP_PORT_SRC:
1729 info[idx] = (struct field_modify_info){2, 0,
1730 MLX5_MODI_OUT_TCP_SPORT};
1732 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1734 case RTE_FLOW_FIELD_TCP_PORT_DST:
1735 info[idx] = (struct field_modify_info){2, 0,
1736 MLX5_MODI_OUT_TCP_DPORT};
1738 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1740 case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1741 info[idx] = (struct field_modify_info){4, 0,
1742 MLX5_MODI_OUT_TCP_SEQ_NUM};
1744 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1747 case RTE_FLOW_FIELD_TCP_ACK_NUM:
1748 info[idx] = (struct field_modify_info){4, 0,
1749 MLX5_MODI_OUT_TCP_ACK_NUM};
1751 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1754 case RTE_FLOW_FIELD_TCP_FLAGS:
1755 info[idx] = (struct field_modify_info){2, 0,
1756 MLX5_MODI_OUT_TCP_FLAGS};
1758 mask[idx] = rte_cpu_to_be_16(0x1ff >> (9 - width));
1760 case RTE_FLOW_FIELD_UDP_PORT_SRC:
1761 info[idx] = (struct field_modify_info){2, 0,
1762 MLX5_MODI_OUT_UDP_SPORT};
1764 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1766 case RTE_FLOW_FIELD_UDP_PORT_DST:
1767 info[idx] = (struct field_modify_info){2, 0,
1768 MLX5_MODI_OUT_UDP_DPORT};
1770 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1772 case RTE_FLOW_FIELD_VXLAN_VNI:
1773 /* not supported yet */
1775 case RTE_FLOW_FIELD_GENEVE_VNI:
1776 /* not supported yet*/
1778 case RTE_FLOW_FIELD_GTP_TEID:
1779 info[idx] = (struct field_modify_info){4, 0,
1780 MLX5_MODI_GTP_TEID};
1782 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1785 case RTE_FLOW_FIELD_TAG:
1787 int reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG,
1788 data->level, error);
1791 MLX5_ASSERT(reg != REG_NON);
1792 MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1793 info[idx] = (struct field_modify_info){4, 0,
1797 rte_cpu_to_be_32(0xffffffff >>
1801 case RTE_FLOW_FIELD_MARK:
1803 uint32_t mark_mask = priv->sh->dv_mark_mask;
1804 uint32_t mark_count = __builtin_popcount(mark_mask);
1805 int reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK,
1809 MLX5_ASSERT(reg != REG_NON);
1810 MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1811 info[idx] = (struct field_modify_info){4, 0,
1814 mask[idx] = rte_cpu_to_be_32((mark_mask >>
1815 (mark_count - width)) & mark_mask);
1818 case RTE_FLOW_FIELD_META:
1820 uint32_t meta_mask = priv->sh->dv_meta_mask;
1821 uint32_t meta_count = __builtin_popcount(meta_mask);
1823 rte_cpu_to_be_32(priv->sh->dv_regc0_mask);
1824 uint32_t shl_c0 = rte_bsf32(msk_c0);
1825 int reg = flow_dv_get_metadata_reg(dev, attr, error);
1828 MLX5_ASSERT(reg != REG_NON);
1829 MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1832 info[idx] = (struct field_modify_info){4, 0,
1835 mask[idx] = rte_cpu_to_be_32((meta_mask >>
1836 (meta_count - width)) & meta_mask);
1839 case RTE_FLOW_FIELD_POINTER:
1840 case RTE_FLOW_FIELD_VALUE:
1841 if (data->field == RTE_FLOW_FIELD_POINTER)
1842 memcpy(&val, (void *)(uintptr_t)data->value,
1846 for (idx = 0; idx < MLX5_ACT_MAX_MOD_FIELDS; idx++) {
1848 if (dst_width == 48) {
1849 /*special case for MAC addresses */
1850 value[idx] = rte_cpu_to_be_16(val);
1853 } else if (dst_width > 16) {
1854 value[idx] = rte_cpu_to_be_32(val);
1856 } else if (dst_width > 8) {
1857 value[idx] = rte_cpu_to_be_16(val);
1860 value[idx] = (uint8_t)val;
1864 value[idx] <<= *shift;
1877 * Convert modify_field action to DV specification.
1880 * Pointer to the rte_eth_dev structure.
1881 * @param[in,out] resource
1882 * Pointer to the modify-header resource.
1884 * Pointer to action specification.
1886 * Attributes of flow that includes this item.
1888 * Pointer to the error structure.
1891 * 0 on success, a negative errno value otherwise and rte_errno is set.
1894 flow_dv_convert_action_modify_field
1895 (struct rte_eth_dev *dev,
1896 struct mlx5_flow_dv_modify_hdr_resource *resource,
1897 const struct rte_flow_action *action,
1898 const struct rte_flow_attr *attr,
1899 struct rte_flow_error *error)
1901 struct mlx5_priv *priv = dev->data->dev_private;
1902 const struct rte_flow_action_modify_field *conf =
1903 (const struct rte_flow_action_modify_field *)(action->conf);
1904 struct rte_flow_item item;
1905 struct field_modify_info field[MLX5_ACT_MAX_MOD_FIELDS] = {
1907 struct field_modify_info dcopy[MLX5_ACT_MAX_MOD_FIELDS] = {
1909 uint32_t mask[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1910 uint32_t value[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1913 uint32_t dst_width = mlx5_flow_item_field_width(priv, conf->dst.field);
1915 if (conf->src.field == RTE_FLOW_FIELD_POINTER ||
1916 conf->src.field == RTE_FLOW_FIELD_VALUE) {
1917 type = MLX5_MODIFICATION_TYPE_SET;
1918 /** For SET fill the destination field (field) first. */
1919 mlx5_flow_field_id_to_modify_info(&conf->dst, field, mask,
1920 value, conf->width, dst_width,
1921 &shift, dev, attr, error);
1922 /** Then copy immediate value from source as per mask. */
1923 mlx5_flow_field_id_to_modify_info(&conf->src, dcopy, mask,
1924 value, conf->width, dst_width,
1925 &shift, dev, attr, error);
1928 type = MLX5_MODIFICATION_TYPE_COPY;
1929 /** For COPY fill the destination field (dcopy) without mask. */
1930 mlx5_flow_field_id_to_modify_info(&conf->dst, dcopy, NULL,
1931 value, conf->width, dst_width,
1932 &shift, dev, attr, error);
1933 /** Then construct the source field (field) with mask. */
1934 mlx5_flow_field_id_to_modify_info(&conf->src, field, mask,
1935 value, conf->width, dst_width,
1936 &shift, dev, attr, error);
1939 return flow_dv_convert_modify_action(&item,
1940 field, dcopy, resource, type, error);
1944 * Validate MARK item.
1947 * Pointer to the rte_eth_dev structure.
1949 * Item specification.
1951 * Attributes of flow that includes this item.
1953 * Pointer to error structure.
1956 * 0 on success, a negative errno value otherwise and rte_errno is set.
1959 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1960 const struct rte_flow_item *item,
1961 const struct rte_flow_attr *attr __rte_unused,
1962 struct rte_flow_error *error)
1964 struct mlx5_priv *priv = dev->data->dev_private;
1965 struct mlx5_dev_config *config = &priv->config;
1966 const struct rte_flow_item_mark *spec = item->spec;
1967 const struct rte_flow_item_mark *mask = item->mask;
1968 const struct rte_flow_item_mark nic_mask = {
1969 .id = priv->sh->dv_mark_mask,
1973 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1974 return rte_flow_error_set(error, ENOTSUP,
1975 RTE_FLOW_ERROR_TYPE_ITEM, item,
1976 "extended metadata feature"
1978 if (!mlx5_flow_ext_mreg_supported(dev))
1979 return rte_flow_error_set(error, ENOTSUP,
1980 RTE_FLOW_ERROR_TYPE_ITEM, item,
1981 "extended metadata register"
1982 " isn't supported");
1984 return rte_flow_error_set(error, ENOTSUP,
1985 RTE_FLOW_ERROR_TYPE_ITEM, item,
1986 "extended metadata register"
1987 " isn't available");
1988 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1992 return rte_flow_error_set(error, EINVAL,
1993 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1995 "data cannot be empty");
1996 if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1997 return rte_flow_error_set(error, EINVAL,
1998 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2000 "mark id exceeds the limit");
2004 return rte_flow_error_set(error, EINVAL,
2005 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2006 "mask cannot be zero");
2008 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2009 (const uint8_t *)&nic_mask,
2010 sizeof(struct rte_flow_item_mark),
2011 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2018 * Validate META item.
2021 * Pointer to the rte_eth_dev structure.
2023 * Item specification.
2025 * Attributes of flow that includes this item.
2027 * Pointer to error structure.
2030 * 0 on success, a negative errno value otherwise and rte_errno is set.
2033 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
2034 const struct rte_flow_item *item,
2035 const struct rte_flow_attr *attr,
2036 struct rte_flow_error *error)
2038 struct mlx5_priv *priv = dev->data->dev_private;
2039 struct mlx5_dev_config *config = &priv->config;
2040 const struct rte_flow_item_meta *spec = item->spec;
2041 const struct rte_flow_item_meta *mask = item->mask;
2042 struct rte_flow_item_meta nic_mask = {
2049 return rte_flow_error_set(error, EINVAL,
2050 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2052 "data cannot be empty");
2053 if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2054 if (!mlx5_flow_ext_mreg_supported(dev))
2055 return rte_flow_error_set(error, ENOTSUP,
2056 RTE_FLOW_ERROR_TYPE_ITEM, item,
2057 "extended metadata register"
2058 " isn't supported");
2059 reg = flow_dv_get_metadata_reg(dev, attr, error);
2063 return rte_flow_error_set(error, ENOTSUP,
2064 RTE_FLOW_ERROR_TYPE_ITEM, item,
2065 "unavalable extended metadata register");
2067 return rte_flow_error_set(error, ENOTSUP,
2068 RTE_FLOW_ERROR_TYPE_ITEM, item,
2072 nic_mask.data = priv->sh->dv_meta_mask;
2075 return rte_flow_error_set(error, ENOTSUP,
2076 RTE_FLOW_ERROR_TYPE_ITEM, item,
2077 "extended metadata feature "
2078 "should be enabled when "
2079 "meta item is requested "
2080 "with e-switch mode ");
2082 return rte_flow_error_set(error, ENOTSUP,
2083 RTE_FLOW_ERROR_TYPE_ITEM, item,
2084 "match on metadata for ingress "
2085 "is not supported in legacy "
2089 mask = &rte_flow_item_meta_mask;
2091 return rte_flow_error_set(error, EINVAL,
2092 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2093 "mask cannot be zero");
2095 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2096 (const uint8_t *)&nic_mask,
2097 sizeof(struct rte_flow_item_meta),
2098 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2103 * Validate TAG item.
2106 * Pointer to the rte_eth_dev structure.
2108 * Item specification.
2110 * Attributes of flow that includes this item.
2112 * Pointer to error structure.
2115 * 0 on success, a negative errno value otherwise and rte_errno is set.
2118 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
2119 const struct rte_flow_item *item,
2120 const struct rte_flow_attr *attr __rte_unused,
2121 struct rte_flow_error *error)
2123 const struct rte_flow_item_tag *spec = item->spec;
2124 const struct rte_flow_item_tag *mask = item->mask;
2125 const struct rte_flow_item_tag nic_mask = {
2126 .data = RTE_BE32(UINT32_MAX),
2131 if (!mlx5_flow_ext_mreg_supported(dev))
2132 return rte_flow_error_set(error, ENOTSUP,
2133 RTE_FLOW_ERROR_TYPE_ITEM, item,
2134 "extensive metadata register"
2135 " isn't supported");
2137 return rte_flow_error_set(error, EINVAL,
2138 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2140 "data cannot be empty");
2142 mask = &rte_flow_item_tag_mask;
2144 return rte_flow_error_set(error, EINVAL,
2145 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2146 "mask cannot be zero");
2148 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2149 (const uint8_t *)&nic_mask,
2150 sizeof(struct rte_flow_item_tag),
2151 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2154 if (mask->index != 0xff)
2155 return rte_flow_error_set(error, EINVAL,
2156 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2157 "partial mask for tag index"
2158 " is not supported");
2159 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
2162 MLX5_ASSERT(ret != REG_NON);
2167 * Validate vport item.
2170 * Pointer to the rte_eth_dev structure.
2172 * Item specification.
2174 * Attributes of flow that includes this item.
2175 * @param[in] item_flags
2176 * Bit-fields that holds the items detected until now.
2178 * Pointer to error structure.
2181 * 0 on success, a negative errno value otherwise and rte_errno is set.
2184 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
2185 const struct rte_flow_item *item,
2186 const struct rte_flow_attr *attr,
2187 uint64_t item_flags,
2188 struct rte_flow_error *error)
2190 const struct rte_flow_item_port_id *spec = item->spec;
2191 const struct rte_flow_item_port_id *mask = item->mask;
2192 const struct rte_flow_item_port_id switch_mask = {
2195 struct mlx5_priv *esw_priv;
2196 struct mlx5_priv *dev_priv;
2199 if (!attr->transfer)
2200 return rte_flow_error_set(error, EINVAL,
2201 RTE_FLOW_ERROR_TYPE_ITEM,
2203 "match on port id is valid only"
2204 " when transfer flag is enabled");
2205 if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
2206 return rte_flow_error_set(error, ENOTSUP,
2207 RTE_FLOW_ERROR_TYPE_ITEM, item,
2208 "multiple source ports are not"
2211 mask = &switch_mask;
2212 if (mask->id != 0xffffffff)
2213 return rte_flow_error_set(error, ENOTSUP,
2214 RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2216 "no support for partial mask on"
2218 ret = mlx5_flow_item_acceptable
2219 (item, (const uint8_t *)mask,
2220 (const uint8_t *)&rte_flow_item_port_id_mask,
2221 sizeof(struct rte_flow_item_port_id),
2222 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2227 esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
2229 return rte_flow_error_set(error, rte_errno,
2230 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2231 "failed to obtain E-Switch info for"
2233 dev_priv = mlx5_dev_to_eswitch_info(dev);
2235 return rte_flow_error_set(error, rte_errno,
2236 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2238 "failed to obtain E-Switch info");
2239 if (esw_priv->domain_id != dev_priv->domain_id)
2240 return rte_flow_error_set(error, EINVAL,
2241 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2242 "cannot match on a port from a"
2243 " different E-Switch");
2248 * Validate VLAN item.
2251 * Item specification.
2252 * @param[in] item_flags
2253 * Bit-fields that holds the items detected until now.
2255 * Ethernet device flow is being created on.
2257 * Pointer to error structure.
2260 * 0 on success, a negative errno value otherwise and rte_errno is set.
2263 flow_dv_validate_item_vlan(const struct rte_flow_item *item,
2264 uint64_t item_flags,
2265 struct rte_eth_dev *dev,
2266 struct rte_flow_error *error)
2268 const struct rte_flow_item_vlan *mask = item->mask;
2269 const struct rte_flow_item_vlan nic_mask = {
2270 .tci = RTE_BE16(UINT16_MAX),
2271 .inner_type = RTE_BE16(UINT16_MAX),
2274 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2276 const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2277 MLX5_FLOW_LAYER_INNER_L4) :
2278 (MLX5_FLOW_LAYER_OUTER_L3 |
2279 MLX5_FLOW_LAYER_OUTER_L4);
2280 const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2281 MLX5_FLOW_LAYER_OUTER_VLAN;
2283 if (item_flags & vlanm)
2284 return rte_flow_error_set(error, EINVAL,
2285 RTE_FLOW_ERROR_TYPE_ITEM, item,
2286 "multiple VLAN layers not supported");
2287 else if ((item_flags & l34m) != 0)
2288 return rte_flow_error_set(error, EINVAL,
2289 RTE_FLOW_ERROR_TYPE_ITEM, item,
2290 "VLAN cannot follow L3/L4 layer");
2292 mask = &rte_flow_item_vlan_mask;
2293 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2294 (const uint8_t *)&nic_mask,
2295 sizeof(struct rte_flow_item_vlan),
2296 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2299 if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2300 struct mlx5_priv *priv = dev->data->dev_private;
2302 if (priv->vmwa_context) {
2304 * Non-NULL context means we have a virtual machine
2305 * and SR-IOV enabled, we have to create VLAN interface
2306 * to make hypervisor to setup E-Switch vport
2307 * context correctly. We avoid creating the multiple
2308 * VLAN interfaces, so we cannot support VLAN tag mask.
2310 return rte_flow_error_set(error, EINVAL,
2311 RTE_FLOW_ERROR_TYPE_ITEM,
2313 "VLAN tag mask is not"
2314 " supported in virtual"
2322 * GTP flags are contained in 1 byte of the format:
2323 * -------------------------------------------
2324 * | bit | 0 - 2 | 3 | 4 | 5 | 6 | 7 |
2325 * |-----------------------------------------|
2326 * | value | Version | PT | Res | E | S | PN |
2327 * -------------------------------------------
2329 * Matching is supported only for GTP flags E, S, PN.
2331 #define MLX5_GTP_FLAGS_MASK 0x07
2334 * Validate GTP item.
2337 * Pointer to the rte_eth_dev structure.
2339 * Item specification.
2340 * @param[in] item_flags
2341 * Bit-fields that holds the items detected until now.
2343 * Pointer to error structure.
2346 * 0 on success, a negative errno value otherwise and rte_errno is set.
2349 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
2350 const struct rte_flow_item *item,
2351 uint64_t item_flags,
2352 struct rte_flow_error *error)
2354 struct mlx5_priv *priv = dev->data->dev_private;
2355 const struct rte_flow_item_gtp *spec = item->spec;
2356 const struct rte_flow_item_gtp *mask = item->mask;
2357 const struct rte_flow_item_gtp nic_mask = {
2358 .v_pt_rsv_flags = MLX5_GTP_FLAGS_MASK,
2360 .teid = RTE_BE32(0xffffffff),
2363 if (!priv->config.hca_attr.tunnel_stateless_gtp)
2364 return rte_flow_error_set(error, ENOTSUP,
2365 RTE_FLOW_ERROR_TYPE_ITEM, item,
2366 "GTP support is not enabled");
2367 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2368 return rte_flow_error_set(error, ENOTSUP,
2369 RTE_FLOW_ERROR_TYPE_ITEM, item,
2370 "multiple tunnel layers not"
2372 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2373 return rte_flow_error_set(error, EINVAL,
2374 RTE_FLOW_ERROR_TYPE_ITEM, item,
2375 "no outer UDP layer found");
2377 mask = &rte_flow_item_gtp_mask;
2378 if (spec && spec->v_pt_rsv_flags & ~MLX5_GTP_FLAGS_MASK)
2379 return rte_flow_error_set(error, ENOTSUP,
2380 RTE_FLOW_ERROR_TYPE_ITEM, item,
2381 "Match is supported for GTP"
2383 return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2384 (const uint8_t *)&nic_mask,
2385 sizeof(struct rte_flow_item_gtp),
2386 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2390 * Validate GTP PSC item.
2393 * Item specification.
2394 * @param[in] last_item
2395 * Previous validated item in the pattern items.
2396 * @param[in] gtp_item
2397 * Previous GTP item specification.
2399 * Pointer to flow attributes.
2401 * Pointer to error structure.
2404 * 0 on success, a negative errno value otherwise and rte_errno is set.
2407 flow_dv_validate_item_gtp_psc(const struct rte_flow_item *item,
2409 const struct rte_flow_item *gtp_item,
2410 const struct rte_flow_attr *attr,
2411 struct rte_flow_error *error)
2413 const struct rte_flow_item_gtp *gtp_spec;
2414 const struct rte_flow_item_gtp *gtp_mask;
2415 const struct rte_flow_item_gtp_psc *spec;
2416 const struct rte_flow_item_gtp_psc *mask;
2417 const struct rte_flow_item_gtp_psc nic_mask = {
2422 if (!gtp_item || !(last_item & MLX5_FLOW_LAYER_GTP))
2423 return rte_flow_error_set
2424 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2425 "GTP PSC item must be preceded with GTP item");
2426 gtp_spec = gtp_item->spec;
2427 gtp_mask = gtp_item->mask ? gtp_item->mask : &rte_flow_item_gtp_mask;
2428 /* GTP spec and E flag is requested to match zero. */
2430 (gtp_mask->v_pt_rsv_flags &
2431 ~gtp_spec->v_pt_rsv_flags & MLX5_GTP_EXT_HEADER_FLAG))
2432 return rte_flow_error_set
2433 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2434 "GTP E flag must be 1 to match GTP PSC");
2435 /* Check the flow is not created in group zero. */
2436 if (!attr->transfer && !attr->group)
2437 return rte_flow_error_set
2438 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2439 "GTP PSC is not supported for group 0");
2440 /* GTP spec is here and E flag is requested to match zero. */
2444 mask = item->mask ? item->mask : &rte_flow_item_gtp_psc_mask;
2445 if (spec->pdu_type > MLX5_GTP_EXT_MAX_PDU_TYPE)
2446 return rte_flow_error_set
2447 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2448 "PDU type should be smaller than 16");
2449 return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2450 (const uint8_t *)&nic_mask,
2451 sizeof(struct rte_flow_item_gtp_psc),
2452 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2456 * Validate IPV4 item.
2457 * Use existing validation function mlx5_flow_validate_item_ipv4(), and
2458 * add specific validation of fragment_offset field,
2461 * Item specification.
2462 * @param[in] item_flags
2463 * Bit-fields that holds the items detected until now.
2465 * Pointer to error structure.
2468 * 0 on success, a negative errno value otherwise and rte_errno is set.
2471 flow_dv_validate_item_ipv4(struct rte_eth_dev *dev,
2472 const struct rte_flow_item *item,
2473 uint64_t item_flags, uint64_t last_item,
2474 uint16_t ether_type, struct rte_flow_error *error)
2477 struct mlx5_priv *priv = dev->data->dev_private;
2478 const struct rte_flow_item_ipv4 *spec = item->spec;
2479 const struct rte_flow_item_ipv4 *last = item->last;
2480 const struct rte_flow_item_ipv4 *mask = item->mask;
2481 rte_be16_t fragment_offset_spec = 0;
2482 rte_be16_t fragment_offset_last = 0;
2483 struct rte_flow_item_ipv4 nic_ipv4_mask = {
2485 .src_addr = RTE_BE32(0xffffffff),
2486 .dst_addr = RTE_BE32(0xffffffff),
2487 .type_of_service = 0xff,
2488 .fragment_offset = RTE_BE16(0xffff),
2489 .next_proto_id = 0xff,
2490 .time_to_live = 0xff,
2494 if (mask && (mask->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK)) {
2495 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2496 bool ihl_cap = !tunnel ? priv->config.hca_attr.outer_ipv4_ihl :
2497 priv->config.hca_attr.inner_ipv4_ihl;
2499 return rte_flow_error_set(error, ENOTSUP,
2500 RTE_FLOW_ERROR_TYPE_ITEM,
2502 "IPV4 ihl offload not supported");
2503 nic_ipv4_mask.hdr.version_ihl = mask->hdr.version_ihl;
2505 ret = mlx5_flow_validate_item_ipv4(item, item_flags, last_item,
2506 ether_type, &nic_ipv4_mask,
2507 MLX5_ITEM_RANGE_ACCEPTED, error);
2511 fragment_offset_spec = spec->hdr.fragment_offset &
2512 mask->hdr.fragment_offset;
2513 if (!fragment_offset_spec)
2516 * spec and mask are valid, enforce using full mask to make sure the
2517 * complete value is used correctly.
2519 if ((mask->hdr.fragment_offset & RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2520 != RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2521 return rte_flow_error_set(error, EINVAL,
2522 RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2523 item, "must use full mask for"
2524 " fragment_offset");
2526 * Match on fragment_offset 0x2000 means MF is 1 and frag-offset is 0,
2527 * indicating this is 1st fragment of fragmented packet.
2528 * This is not yet supported in MLX5, return appropriate error message.
2530 if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG))
2531 return rte_flow_error_set(error, ENOTSUP,
2532 RTE_FLOW_ERROR_TYPE_ITEM, item,
2533 "match on first fragment not "
2535 if (fragment_offset_spec && !last)
2536 return rte_flow_error_set(error, ENOTSUP,
2537 RTE_FLOW_ERROR_TYPE_ITEM, item,
2538 "specified value not supported");
2539 /* spec and last are valid, validate the specified range. */
2540 fragment_offset_last = last->hdr.fragment_offset &
2541 mask->hdr.fragment_offset;
2543 * Match on fragment_offset spec 0x2001 and last 0x3fff
2544 * means MF is 1 and frag-offset is > 0.
2545 * This packet is fragment 2nd and onward, excluding last.
2546 * This is not yet supported in MLX5, return appropriate
2549 if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG + 1) &&
2550 fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2551 return rte_flow_error_set(error, ENOTSUP,
2552 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2553 last, "match on following "
2554 "fragments not supported");
2556 * Match on fragment_offset spec 0x0001 and last 0x1fff
2557 * means MF is 0 and frag-offset is > 0.
2558 * This packet is last fragment of fragmented packet.
2559 * This is not yet supported in MLX5, return appropriate
2562 if (fragment_offset_spec == RTE_BE16(1) &&
2563 fragment_offset_last == RTE_BE16(RTE_IPV4_HDR_OFFSET_MASK))
2564 return rte_flow_error_set(error, ENOTSUP,
2565 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2566 last, "match on last "
2567 "fragment not supported");
2569 * Match on fragment_offset spec 0x0001 and last 0x3fff
2570 * means MF and/or frag-offset is not 0.
2571 * This is a fragmented packet.
2572 * Other range values are invalid and rejected.
2574 if (!(fragment_offset_spec == RTE_BE16(1) &&
2575 fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK)))
2576 return rte_flow_error_set(error, ENOTSUP,
2577 RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2578 "specified range not supported");
2583 * Validate IPV6 fragment extension item.
2586 * Item specification.
2587 * @param[in] item_flags
2588 * Bit-fields that holds the items detected until now.
2590 * Pointer to error structure.
2593 * 0 on success, a negative errno value otherwise and rte_errno is set.
2596 flow_dv_validate_item_ipv6_frag_ext(const struct rte_flow_item *item,
2597 uint64_t item_flags,
2598 struct rte_flow_error *error)
2600 const struct rte_flow_item_ipv6_frag_ext *spec = item->spec;
2601 const struct rte_flow_item_ipv6_frag_ext *last = item->last;
2602 const struct rte_flow_item_ipv6_frag_ext *mask = item->mask;
2603 rte_be16_t frag_data_spec = 0;
2604 rte_be16_t frag_data_last = 0;
2605 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2606 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2607 MLX5_FLOW_LAYER_OUTER_L4;
2609 struct rte_flow_item_ipv6_frag_ext nic_mask = {
2611 .next_header = 0xff,
2612 .frag_data = RTE_BE16(0xffff),
2616 if (item_flags & l4m)
2617 return rte_flow_error_set(error, EINVAL,
2618 RTE_FLOW_ERROR_TYPE_ITEM, item,
2619 "ipv6 fragment extension item cannot "
2621 if ((tunnel && !(item_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
2622 (!tunnel && !(item_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV6)))
2623 return rte_flow_error_set(error, EINVAL,
2624 RTE_FLOW_ERROR_TYPE_ITEM, item,
2625 "ipv6 fragment extension item must "
2626 "follow ipv6 item");
2628 frag_data_spec = spec->hdr.frag_data & mask->hdr.frag_data;
2629 if (!frag_data_spec)
2632 * spec and mask are valid, enforce using full mask to make sure the
2633 * complete value is used correctly.
2635 if ((mask->hdr.frag_data & RTE_BE16(RTE_IPV6_FRAG_USED_MASK)) !=
2636 RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2637 return rte_flow_error_set(error, EINVAL,
2638 RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2639 item, "must use full mask for"
2642 * Match on frag_data 0x00001 means M is 1 and frag-offset is 0.
2643 * This is 1st fragment of fragmented packet.
2645 if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_MF_MASK))
2646 return rte_flow_error_set(error, ENOTSUP,
2647 RTE_FLOW_ERROR_TYPE_ITEM, item,
2648 "match on first fragment not "
2650 if (frag_data_spec && !last)
2651 return rte_flow_error_set(error, EINVAL,
2652 RTE_FLOW_ERROR_TYPE_ITEM, item,
2653 "specified value not supported");
2654 ret = mlx5_flow_item_acceptable
2655 (item, (const uint8_t *)mask,
2656 (const uint8_t *)&nic_mask,
2657 sizeof(struct rte_flow_item_ipv6_frag_ext),
2658 MLX5_ITEM_RANGE_ACCEPTED, error);
2661 /* spec and last are valid, validate the specified range. */
2662 frag_data_last = last->hdr.frag_data & mask->hdr.frag_data;
2664 * Match on frag_data spec 0x0009 and last 0xfff9
2665 * means M is 1 and frag-offset is > 0.
2666 * This packet is fragment 2nd and onward, excluding last.
2667 * This is not yet supported in MLX5, return appropriate
2670 if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN |
2671 RTE_IPV6_EHDR_MF_MASK) &&
2672 frag_data_last == RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2673 return rte_flow_error_set(error, ENOTSUP,
2674 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2675 last, "match on following "
2676 "fragments not supported");
2678 * Match on frag_data spec 0x0008 and last 0xfff8
2679 * means M is 0 and frag-offset is > 0.
2680 * This packet is last fragment of fragmented packet.
2681 * This is not yet supported in MLX5, return appropriate
2684 if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN) &&
2685 frag_data_last == RTE_BE16(RTE_IPV6_EHDR_FO_MASK))
2686 return rte_flow_error_set(error, ENOTSUP,
2687 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2688 last, "match on last "
2689 "fragment not supported");
2690 /* Other range values are invalid and rejected. */
2691 return rte_flow_error_set(error, EINVAL,
2692 RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2693 "specified range not supported");
2697 * Validate ASO CT item.
2700 * Pointer to the rte_eth_dev structure.
2702 * Item specification.
2703 * @param[in] item_flags
2704 * Pointer to bit-fields that holds the items detected until now.
2706 * Pointer to error structure.
2709 * 0 on success, a negative errno value otherwise and rte_errno is set.
2712 flow_dv_validate_item_aso_ct(struct rte_eth_dev *dev,
2713 const struct rte_flow_item *item,
2714 uint64_t *item_flags,
2715 struct rte_flow_error *error)
2717 const struct rte_flow_item_conntrack *spec = item->spec;
2718 const struct rte_flow_item_conntrack *mask = item->mask;
2722 if (*item_flags & MLX5_FLOW_LAYER_ASO_CT)
2723 return rte_flow_error_set(error, EINVAL,
2724 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2725 "Only one CT is supported");
2727 mask = &rte_flow_item_conntrack_mask;
2728 flags = spec->flags & mask->flags;
2729 if ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID) &&
2730 ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID) ||
2731 (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD) ||
2732 (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)))
2733 return rte_flow_error_set(error, EINVAL,
2734 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2735 "Conflict status bits");
2736 /* State change also needs to be considered. */
2737 *item_flags |= MLX5_FLOW_LAYER_ASO_CT;
2742 * Validate the pop VLAN action.
2745 * Pointer to the rte_eth_dev structure.
2746 * @param[in] action_flags
2747 * Holds the actions detected until now.
2749 * Pointer to the pop vlan action.
2750 * @param[in] item_flags
2751 * The items found in this flow rule.
2753 * Pointer to flow attributes.
2755 * Pointer to error structure.
2758 * 0 on success, a negative errno value otherwise and rte_errno is set.
2761 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
2762 uint64_t action_flags,
2763 const struct rte_flow_action *action,
2764 uint64_t item_flags,
2765 const struct rte_flow_attr *attr,
2766 struct rte_flow_error *error)
2768 const struct mlx5_priv *priv = dev->data->dev_private;
2769 struct mlx5_dev_ctx_shared *sh = priv->sh;
2770 bool direction_error = false;
2772 if (!priv->sh->pop_vlan_action)
2773 return rte_flow_error_set(error, ENOTSUP,
2774 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2776 "pop vlan action is not supported");
2777 /* Pop VLAN is not supported in egress except for CX6 FDB mode. */
2778 if (attr->transfer) {
2779 bool fdb_tx = priv->representor_id != UINT16_MAX;
2780 bool is_cx5 = sh->steering_format_version ==
2781 MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2783 if (fdb_tx && is_cx5)
2784 direction_error = true;
2785 } else if (attr->egress) {
2786 direction_error = true;
2788 if (direction_error)
2789 return rte_flow_error_set(error, ENOTSUP,
2790 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2792 "pop vlan action not supported for egress");
2793 if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
2794 return rte_flow_error_set(error, ENOTSUP,
2795 RTE_FLOW_ERROR_TYPE_ACTION, action,
2796 "no support for multiple VLAN "
2798 /* Pop VLAN with preceding Decap requires inner header with VLAN. */
2799 if ((action_flags & MLX5_FLOW_ACTION_DECAP) &&
2800 !(item_flags & MLX5_FLOW_LAYER_INNER_VLAN))
2801 return rte_flow_error_set(error, ENOTSUP,
2802 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2804 "cannot pop vlan after decap without "
2805 "match on inner vlan in the flow");
2806 /* Pop VLAN without preceding Decap requires outer header with VLAN. */
2807 if (!(action_flags & MLX5_FLOW_ACTION_DECAP) &&
2808 !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2809 return rte_flow_error_set(error, ENOTSUP,
2810 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2812 "cannot pop vlan without a "
2813 "match on (outer) vlan in the flow");
2814 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2815 return rte_flow_error_set(error, EINVAL,
2816 RTE_FLOW_ERROR_TYPE_ACTION, action,
2817 "wrong action order, port_id should "
2818 "be after pop VLAN action");
2819 if (!attr->transfer && priv->representor)
2820 return rte_flow_error_set(error, ENOTSUP,
2821 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2822 "pop vlan action for VF representor "
2823 "not supported on NIC table");
2828 * Get VLAN default info from vlan match info.
2831 * the list of item specifications.
2833 * pointer VLAN info to fill to.
2836 * 0 on success, a negative errno value otherwise and rte_errno is set.
2839 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
2840 struct rte_vlan_hdr *vlan)
2842 const struct rte_flow_item_vlan nic_mask = {
2843 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
2844 MLX5DV_FLOW_VLAN_VID_MASK),
2845 .inner_type = RTE_BE16(0xffff),
2850 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2851 int type = items->type;
2853 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
2854 type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
2857 if (items->type != RTE_FLOW_ITEM_TYPE_END) {
2858 const struct rte_flow_item_vlan *vlan_m = items->mask;
2859 const struct rte_flow_item_vlan *vlan_v = items->spec;
2861 /* If VLAN item in pattern doesn't contain data, return here. */
2866 /* Only full match values are accepted */
2867 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
2868 MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
2869 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
2871 rte_be_to_cpu_16(vlan_v->tci &
2872 MLX5DV_FLOW_VLAN_PCP_MASK_BE);
2874 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
2875 MLX5DV_FLOW_VLAN_VID_MASK_BE) {
2876 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
2878 rte_be_to_cpu_16(vlan_v->tci &
2879 MLX5DV_FLOW_VLAN_VID_MASK_BE);
2881 if (vlan_m->inner_type == nic_mask.inner_type)
2882 vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
2883 vlan_m->inner_type);
2888 * Validate the push VLAN action.
2891 * Pointer to the rte_eth_dev structure.
2892 * @param[in] action_flags
2893 * Holds the actions detected until now.
2894 * @param[in] item_flags
2895 * The items found in this flow rule.
2897 * Pointer to the action structure.
2899 * Pointer to flow attributes
2901 * Pointer to error structure.
2904 * 0 on success, a negative errno value otherwise and rte_errno is set.
2907 flow_dv_validate_action_push_vlan(struct rte_eth_dev *dev,
2908 uint64_t action_flags,
2909 const struct rte_flow_item_vlan *vlan_m,
2910 const struct rte_flow_action *action,
2911 const struct rte_flow_attr *attr,
2912 struct rte_flow_error *error)
2914 const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
2915 const struct mlx5_priv *priv = dev->data->dev_private;
2916 struct mlx5_dev_ctx_shared *sh = priv->sh;
2917 bool direction_error = false;
2919 if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
2920 push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
2921 return rte_flow_error_set(error, EINVAL,
2922 RTE_FLOW_ERROR_TYPE_ACTION, action,
2923 "invalid vlan ethertype");
2924 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2925 return rte_flow_error_set(error, EINVAL,
2926 RTE_FLOW_ERROR_TYPE_ACTION, action,
2927 "wrong action order, port_id should "
2928 "be after push VLAN");
2929 /* Push VLAN is not supported in ingress except for CX6 FDB mode. */
2930 if (attr->transfer) {
2931 bool fdb_tx = priv->representor_id != UINT16_MAX;
2932 bool is_cx5 = sh->steering_format_version ==
2933 MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2935 if (!fdb_tx && is_cx5)
2936 direction_error = true;
2937 } else if (attr->ingress) {
2938 direction_error = true;
2940 if (direction_error)
2941 return rte_flow_error_set(error, ENOTSUP,
2942 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2944 "push vlan action not supported for ingress");
2945 if (!attr->transfer && priv->representor)
2946 return rte_flow_error_set(error, ENOTSUP,
2947 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2948 "push vlan action for VF representor "
2949 "not supported on NIC table");
2951 (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) &&
2952 (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) !=
2953 MLX5DV_FLOW_VLAN_PCP_MASK_BE &&
2954 !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP) &&
2955 !(mlx5_flow_find_action
2956 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP)))
2957 return rte_flow_error_set(error, EINVAL,
2958 RTE_FLOW_ERROR_TYPE_ACTION, action,
2959 "not full match mask on VLAN PCP and "
2960 "there is no of_set_vlan_pcp action, "
2961 "push VLAN action cannot figure out "
2964 (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) &&
2965 (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) !=
2966 MLX5DV_FLOW_VLAN_VID_MASK_BE &&
2967 !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID) &&
2968 !(mlx5_flow_find_action
2969 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID)))
2970 return rte_flow_error_set(error, EINVAL,
2971 RTE_FLOW_ERROR_TYPE_ACTION, action,
2972 "not full match mask on VLAN VID and "
2973 "there is no of_set_vlan_vid action, "
2974 "push VLAN action cannot figure out "
2981 * Validate the set VLAN PCP.
2983 * @param[in] action_flags
2984 * Holds the actions detected until now.
2985 * @param[in] actions
2986 * Pointer to the list of actions remaining in the flow rule.
2988 * Pointer to error structure.
2991 * 0 on success, a negative errno value otherwise and rte_errno is set.
2994 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
2995 const struct rte_flow_action actions[],
2996 struct rte_flow_error *error)
2998 const struct rte_flow_action *action = actions;
2999 const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
3001 if (conf->vlan_pcp > 7)
3002 return rte_flow_error_set(error, EINVAL,
3003 RTE_FLOW_ERROR_TYPE_ACTION, action,
3004 "VLAN PCP value is too big");
3005 if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
3006 return rte_flow_error_set(error, ENOTSUP,
3007 RTE_FLOW_ERROR_TYPE_ACTION, action,
3008 "set VLAN PCP action must follow "
3009 "the push VLAN action");
3010 if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
3011 return rte_flow_error_set(error, ENOTSUP,
3012 RTE_FLOW_ERROR_TYPE_ACTION, action,
3013 "Multiple VLAN PCP modification are "
3015 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
3016 return rte_flow_error_set(error, EINVAL,
3017 RTE_FLOW_ERROR_TYPE_ACTION, action,
3018 "wrong action order, port_id should "
3019 "be after set VLAN PCP");
3024 * Validate the set VLAN VID.
3026 * @param[in] item_flags
3027 * Holds the items detected in this rule.
3028 * @param[in] action_flags
3029 * Holds the actions detected until now.
3030 * @param[in] actions
3031 * Pointer to the list of actions remaining in the flow rule.
3033 * Pointer to error structure.
3036 * 0 on success, a negative errno value otherwise and rte_errno is set.
3039 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
3040 uint64_t action_flags,
3041 const struct rte_flow_action actions[],
3042 struct rte_flow_error *error)
3044 const struct rte_flow_action *action = actions;
3045 const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
3047 if (rte_be_to_cpu_16(conf->vlan_vid) > 0xFFE)
3048 return rte_flow_error_set(error, EINVAL,
3049 RTE_FLOW_ERROR_TYPE_ACTION, action,
3050 "VLAN VID value is too big");
3051 if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
3052 !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
3053 return rte_flow_error_set(error, ENOTSUP,
3054 RTE_FLOW_ERROR_TYPE_ACTION, action,
3055 "set VLAN VID action must follow push"
3056 " VLAN action or match on VLAN item");
3057 if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
3058 return rte_flow_error_set(error, ENOTSUP,
3059 RTE_FLOW_ERROR_TYPE_ACTION, action,
3060 "Multiple VLAN VID modifications are "
3062 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
3063 return rte_flow_error_set(error, EINVAL,
3064 RTE_FLOW_ERROR_TYPE_ACTION, action,
3065 "wrong action order, port_id should "
3066 "be after set VLAN VID");
3071 * Validate the FLAG action.
3074 * Pointer to the rte_eth_dev structure.
3075 * @param[in] action_flags
3076 * Holds the actions detected until now.
3078 * Pointer to flow attributes
3080 * Pointer to error structure.
3083 * 0 on success, a negative errno value otherwise and rte_errno is set.
3086 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
3087 uint64_t action_flags,
3088 const struct rte_flow_attr *attr,
3089 struct rte_flow_error *error)
3091 struct mlx5_priv *priv = dev->data->dev_private;
3092 struct mlx5_dev_config *config = &priv->config;
3095 /* Fall back if no extended metadata register support. */
3096 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3097 return mlx5_flow_validate_action_flag(action_flags, attr,
3099 /* Extensive metadata mode requires registers. */
3100 if (!mlx5_flow_ext_mreg_supported(dev))
3101 return rte_flow_error_set(error, ENOTSUP,
3102 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3103 "no metadata registers "
3104 "to support flag action");
3105 if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
3106 return rte_flow_error_set(error, ENOTSUP,
3107 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3108 "extended metadata register"
3109 " isn't available");
3110 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3113 MLX5_ASSERT(ret > 0);
3114 if (action_flags & MLX5_FLOW_ACTION_MARK)
3115 return rte_flow_error_set(error, EINVAL,
3116 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3117 "can't mark and flag in same flow");
3118 if (action_flags & MLX5_FLOW_ACTION_FLAG)
3119 return rte_flow_error_set(error, EINVAL,
3120 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3122 " actions in same flow");
3127 * Validate MARK action.
3130 * Pointer to the rte_eth_dev structure.
3132 * Pointer to action.
3133 * @param[in] action_flags
3134 * Holds the actions detected until now.
3136 * Pointer to flow attributes
3138 * Pointer to error structure.
3141 * 0 on success, a negative errno value otherwise and rte_errno is set.
3144 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
3145 const struct rte_flow_action *action,
3146 uint64_t action_flags,
3147 const struct rte_flow_attr *attr,
3148 struct rte_flow_error *error)
3150 struct mlx5_priv *priv = dev->data->dev_private;
3151 struct mlx5_dev_config *config = &priv->config;
3152 const struct rte_flow_action_mark *mark = action->conf;
3155 if (is_tunnel_offload_active(dev))
3156 return rte_flow_error_set(error, ENOTSUP,
3157 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3159 "if tunnel offload active");
3160 /* Fall back if no extended metadata register support. */
3161 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3162 return mlx5_flow_validate_action_mark(action, action_flags,
3164 /* Extensive metadata mode requires registers. */
3165 if (!mlx5_flow_ext_mreg_supported(dev))
3166 return rte_flow_error_set(error, ENOTSUP,
3167 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3168 "no metadata registers "
3169 "to support mark action");
3170 if (!priv->sh->dv_mark_mask)
3171 return rte_flow_error_set(error, ENOTSUP,
3172 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3173 "extended metadata register"
3174 " isn't available");
3175 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3178 MLX5_ASSERT(ret > 0);
3180 return rte_flow_error_set(error, EINVAL,
3181 RTE_FLOW_ERROR_TYPE_ACTION, action,
3182 "configuration cannot be null");
3183 if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
3184 return rte_flow_error_set(error, EINVAL,
3185 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3187 "mark id exceeds the limit");
3188 if (action_flags & MLX5_FLOW_ACTION_FLAG)
3189 return rte_flow_error_set(error, EINVAL,
3190 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3191 "can't flag and mark in same flow");
3192 if (action_flags & MLX5_FLOW_ACTION_MARK)
3193 return rte_flow_error_set(error, EINVAL,
3194 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3195 "can't have 2 mark actions in same"
3201 * Validate SET_META action.
3204 * Pointer to the rte_eth_dev structure.
3206 * Pointer to the action structure.
3207 * @param[in] action_flags
3208 * Holds the actions detected until now.
3210 * Pointer to flow attributes
3212 * Pointer to error structure.
3215 * 0 on success, a negative errno value otherwise and rte_errno is set.
3218 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
3219 const struct rte_flow_action *action,
3220 uint64_t action_flags __rte_unused,
3221 const struct rte_flow_attr *attr,
3222 struct rte_flow_error *error)
3224 const struct rte_flow_action_set_meta *conf;
3225 uint32_t nic_mask = UINT32_MAX;
3228 if (!mlx5_flow_ext_mreg_supported(dev))
3229 return rte_flow_error_set(error, ENOTSUP,
3230 RTE_FLOW_ERROR_TYPE_ACTION, action,
3231 "extended metadata register"
3232 " isn't supported");
3233 reg = flow_dv_get_metadata_reg(dev, attr, error);
3237 return rte_flow_error_set(error, ENOTSUP,
3238 RTE_FLOW_ERROR_TYPE_ACTION, action,
3239 "unavalable extended metadata register");
3240 if (reg != REG_A && reg != REG_B) {
3241 struct mlx5_priv *priv = dev->data->dev_private;
3243 nic_mask = priv->sh->dv_meta_mask;
3245 if (!(action->conf))
3246 return rte_flow_error_set(error, EINVAL,
3247 RTE_FLOW_ERROR_TYPE_ACTION, action,
3248 "configuration cannot be null");
3249 conf = (const struct rte_flow_action_set_meta *)action->conf;
3251 return rte_flow_error_set(error, EINVAL,
3252 RTE_FLOW_ERROR_TYPE_ACTION, action,
3253 "zero mask doesn't have any effect");
3254 if (conf->mask & ~nic_mask)
3255 return rte_flow_error_set(error, EINVAL,
3256 RTE_FLOW_ERROR_TYPE_ACTION, action,
3257 "meta data must be within reg C0");
3262 * Validate SET_TAG action.
3265 * Pointer to the rte_eth_dev structure.
3267 * Pointer to the action structure.
3268 * @param[in] action_flags
3269 * Holds the actions detected until now.
3271 * Pointer to flow attributes
3273 * Pointer to error structure.
3276 * 0 on success, a negative errno value otherwise and rte_errno is set.
3279 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
3280 const struct rte_flow_action *action,
3281 uint64_t action_flags,
3282 const struct rte_flow_attr *attr,
3283 struct rte_flow_error *error)
3285 const struct rte_flow_action_set_tag *conf;
3286 const uint64_t terminal_action_flags =
3287 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
3288 MLX5_FLOW_ACTION_RSS;
3291 if (!mlx5_flow_ext_mreg_supported(dev))
3292 return rte_flow_error_set(error, ENOTSUP,
3293 RTE_FLOW_ERROR_TYPE_ACTION, action,
3294 "extensive metadata register"
3295 " isn't supported");
3296 if (!(action->conf))
3297 return rte_flow_error_set(error, EINVAL,
3298 RTE_FLOW_ERROR_TYPE_ACTION, action,
3299 "configuration cannot be null");
3300 conf = (const struct rte_flow_action_set_tag *)action->conf;
3302 return rte_flow_error_set(error, EINVAL,
3303 RTE_FLOW_ERROR_TYPE_ACTION, action,
3304 "zero mask doesn't have any effect");
3305 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
3308 if (!attr->transfer && attr->ingress &&
3309 (action_flags & terminal_action_flags))
3310 return rte_flow_error_set(error, EINVAL,
3311 RTE_FLOW_ERROR_TYPE_ACTION, action,
3312 "set_tag has no effect"
3313 " with terminal actions");
3318 * Check if action counter is shared by either old or new mechanism.
3321 * Pointer to the action structure.
3324 * True when counter is shared, false otherwise.
3327 is_shared_action_count(const struct rte_flow_action *action)
3329 const struct rte_flow_action_count *count =
3330 (const struct rte_flow_action_count *)action->conf;
3332 if ((int)action->type == MLX5_RTE_FLOW_ACTION_TYPE_COUNT)
3334 return !!(count && count->shared);
3338 * Validate count action.
3341 * Pointer to rte_eth_dev structure.
3343 * Indicator if action is shared.
3344 * @param[in] action_flags
3345 * Holds the actions detected until now.
3347 * Pointer to error structure.
3350 * 0 on success, a negative errno value otherwise and rte_errno is set.
3353 flow_dv_validate_action_count(struct rte_eth_dev *dev, bool shared,
3354 uint64_t action_flags,
3355 struct rte_flow_error *error)
3357 struct mlx5_priv *priv = dev->data->dev_private;
3359 if (!priv->config.devx)
3361 if (action_flags & MLX5_FLOW_ACTION_COUNT)
3362 return rte_flow_error_set(error, EINVAL,
3363 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3364 "duplicate count actions set");
3365 if (shared && (action_flags & MLX5_FLOW_ACTION_AGE) &&
3366 !priv->sh->flow_hit_aso_en)
3367 return rte_flow_error_set(error, EINVAL,
3368 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3369 "old age and shared count combination is not supported");
3370 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
3374 return rte_flow_error_set
3376 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3378 "count action not supported");
3382 * Validate the L2 encap action.
3385 * Pointer to the rte_eth_dev structure.
3386 * @param[in] action_flags
3387 * Holds the actions detected until now.
3389 * Pointer to the action structure.
3391 * Pointer to flow attributes.
3393 * Pointer to error structure.
3396 * 0 on success, a negative errno value otherwise and rte_errno is set.
3399 flow_dv_validate_action_l2_encap(struct rte_eth_dev *dev,
3400 uint64_t action_flags,
3401 const struct rte_flow_action *action,
3402 const struct rte_flow_attr *attr,
3403 struct rte_flow_error *error)
3405 const struct mlx5_priv *priv = dev->data->dev_private;
3407 if (!(action->conf))
3408 return rte_flow_error_set(error, EINVAL,
3409 RTE_FLOW_ERROR_TYPE_ACTION, action,
3410 "configuration cannot be null");
3411 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3412 return rte_flow_error_set(error, EINVAL,
3413 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3414 "can only have a single encap action "
3416 if (!attr->transfer && priv->representor)
3417 return rte_flow_error_set(error, ENOTSUP,
3418 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3419 "encap action for VF representor "
3420 "not supported on NIC table");
3425 * Validate a decap action.
3428 * Pointer to the rte_eth_dev structure.
3429 * @param[in] action_flags
3430 * Holds the actions detected until now.
3432 * Pointer to the action structure.
3433 * @param[in] item_flags
3434 * Holds the items detected.
3436 * Pointer to flow attributes
3438 * Pointer to error structure.
3441 * 0 on success, a negative errno value otherwise and rte_errno is set.
3444 flow_dv_validate_action_decap(struct rte_eth_dev *dev,
3445 uint64_t action_flags,
3446 const struct rte_flow_action *action,
3447 const uint64_t item_flags,
3448 const struct rte_flow_attr *attr,
3449 struct rte_flow_error *error)
3451 const struct mlx5_priv *priv = dev->data->dev_private;
3453 if (priv->config.hca_attr.scatter_fcs_w_decap_disable &&
3454 !priv->config.decap_en)
3455 return rte_flow_error_set(error, ENOTSUP,
3456 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3457 "decap is not enabled");
3458 if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
3459 return rte_flow_error_set(error, ENOTSUP,
3460 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3462 MLX5_FLOW_ACTION_DECAP ? "can only "
3463 "have a single decap action" : "decap "
3464 "after encap is not supported");
3465 if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
3466 return rte_flow_error_set(error, EINVAL,
3467 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3468 "can't have decap action after"
3471 return rte_flow_error_set(error, ENOTSUP,
3472 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
3474 "decap action not supported for "
3476 if (!attr->transfer && priv->representor)
3477 return rte_flow_error_set(error, ENOTSUP,
3478 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3479 "decap action for VF representor "
3480 "not supported on NIC table");
3481 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_DECAP &&
3482 !(item_flags & MLX5_FLOW_LAYER_VXLAN))
3483 return rte_flow_error_set(error, ENOTSUP,
3484 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3485 "VXLAN item should be present for VXLAN decap");
3489 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
3492 * Validate the raw encap and decap actions.
3495 * Pointer to the rte_eth_dev structure.
3497 * Pointer to the decap action.
3499 * Pointer to the encap action.
3501 * Pointer to flow attributes
3502 * @param[in/out] action_flags
3503 * Holds the actions detected until now.
3504 * @param[out] actions_n
3505 * pointer to the number of actions counter.
3507 * Pointer to the action structure.
3508 * @param[in] item_flags
3509 * Holds the items detected.
3511 * Pointer to error structure.
3514 * 0 on success, a negative errno value otherwise and rte_errno is set.
3517 flow_dv_validate_action_raw_encap_decap
3518 (struct rte_eth_dev *dev,
3519 const struct rte_flow_action_raw_decap *decap,
3520 const struct rte_flow_action_raw_encap *encap,
3521 const struct rte_flow_attr *attr, uint64_t *action_flags,
3522 int *actions_n, const struct rte_flow_action *action,
3523 uint64_t item_flags, struct rte_flow_error *error)
3525 const struct mlx5_priv *priv = dev->data->dev_private;
3528 if (encap && (!encap->size || !encap->data))
3529 return rte_flow_error_set(error, EINVAL,
3530 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3531 "raw encap data cannot be empty");
3532 if (decap && encap) {
3533 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
3534 encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3537 else if (encap->size <=
3538 MLX5_ENCAPSULATION_DECISION_SIZE &&
3540 MLX5_ENCAPSULATION_DECISION_SIZE)
3543 else if (encap->size >
3544 MLX5_ENCAPSULATION_DECISION_SIZE &&
3546 MLX5_ENCAPSULATION_DECISION_SIZE)
3547 /* 2 L2 actions: encap and decap. */
3550 return rte_flow_error_set(error,
3552 RTE_FLOW_ERROR_TYPE_ACTION,
3553 NULL, "unsupported too small "
3554 "raw decap and too small raw "
3555 "encap combination");
3558 ret = flow_dv_validate_action_decap(dev, *action_flags, action,
3559 item_flags, attr, error);
3562 *action_flags |= MLX5_FLOW_ACTION_DECAP;
3566 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
3567 return rte_flow_error_set(error, ENOTSUP,
3568 RTE_FLOW_ERROR_TYPE_ACTION,
3570 "small raw encap size");
3571 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
3572 return rte_flow_error_set(error, EINVAL,
3573 RTE_FLOW_ERROR_TYPE_ACTION,
3575 "more than one encap action");
3576 if (!attr->transfer && priv->representor)
3577 return rte_flow_error_set
3579 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3580 "encap action for VF representor "
3581 "not supported on NIC table");
3582 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
3589 * Validate the ASO CT action.
3592 * Pointer to the rte_eth_dev structure.
3593 * @param[in] action_flags
3594 * Holds the actions detected until now.
3595 * @param[in] item_flags
3596 * The items found in this flow rule.
3598 * Pointer to flow attributes.
3600 * Pointer to error structure.
3603 * 0 on success, a negative errno value otherwise and rte_errno is set.
3606 flow_dv_validate_action_aso_ct(struct rte_eth_dev *dev,
3607 uint64_t action_flags,
3608 uint64_t item_flags,
3609 const struct rte_flow_attr *attr,
3610 struct rte_flow_error *error)
3614 if (attr->group == 0 && !attr->transfer)
3615 return rte_flow_error_set(error, ENOTSUP,
3616 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3618 "Only support non-root table");
3619 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
3620 return rte_flow_error_set(error, ENOTSUP,
3621 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3622 "CT cannot follow a fate action");
3623 if ((action_flags & MLX5_FLOW_ACTION_METER) ||
3624 (action_flags & MLX5_FLOW_ACTION_AGE))
3625 return rte_flow_error_set(error, EINVAL,
3626 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3627 "Only one ASO action is supported");
3628 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3629 return rte_flow_error_set(error, EINVAL,
3630 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3631 "Encap cannot exist before CT");
3632 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3633 return rte_flow_error_set(error, EINVAL,
3634 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3635 "Not a outer TCP packet");
3640 flow_dv_encap_decap_match_cb(void *tool_ctx __rte_unused,
3641 struct mlx5_list_entry *entry, void *cb_ctx)
3643 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3644 struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3645 struct mlx5_flow_dv_encap_decap_resource *resource;
3647 resource = container_of(entry, struct mlx5_flow_dv_encap_decap_resource,
3649 if (resource->reformat_type == ctx_resource->reformat_type &&
3650 resource->ft_type == ctx_resource->ft_type &&
3651 resource->flags == ctx_resource->flags &&
3652 resource->size == ctx_resource->size &&
3653 !memcmp((const void *)resource->buf,
3654 (const void *)ctx_resource->buf,
3660 struct mlx5_list_entry *
3661 flow_dv_encap_decap_create_cb(void *tool_ctx, void *cb_ctx)
3663 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3664 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3665 struct mlx5dv_dr_domain *domain;
3666 struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3667 struct mlx5_flow_dv_encap_decap_resource *resource;
3671 if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3672 domain = sh->fdb_domain;
3673 else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3674 domain = sh->rx_domain;
3676 domain = sh->tx_domain;
3677 /* Register new encap/decap resource. */
3678 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], &idx);
3680 rte_flow_error_set(ctx->error, ENOMEM,
3681 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3682 "cannot allocate resource memory");
3685 *resource = *ctx_resource;
3686 resource->idx = idx;
3687 ret = mlx5_flow_os_create_flow_action_packet_reformat(sh->ctx, domain,
3691 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], idx);
3692 rte_flow_error_set(ctx->error, ENOMEM,
3693 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3694 NULL, "cannot create action");
3698 return &resource->entry;
3701 struct mlx5_list_entry *
3702 flow_dv_encap_decap_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
3705 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3706 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3707 struct mlx5_flow_dv_encap_decap_resource *cache_resource;
3710 cache_resource = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
3712 if (!cache_resource) {
3713 rte_flow_error_set(ctx->error, ENOMEM,
3714 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3715 "cannot allocate resource memory");
3718 memcpy(cache_resource, oentry, sizeof(*cache_resource));
3719 cache_resource->idx = idx;
3720 return &cache_resource->entry;
3724 flow_dv_encap_decap_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3726 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3727 struct mlx5_flow_dv_encap_decap_resource *res =
3728 container_of(entry, typeof(*res), entry);
3730 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
3734 * Find existing encap/decap resource or create and register a new one.
3736 * @param[in, out] dev
3737 * Pointer to rte_eth_dev structure.
3738 * @param[in, out] resource
3739 * Pointer to encap/decap resource.
3740 * @parm[in, out] dev_flow
3741 * Pointer to the dev_flow.
3743 * pointer to error structure.
3746 * 0 on success otherwise -errno and errno is set.
3749 flow_dv_encap_decap_resource_register
3750 (struct rte_eth_dev *dev,
3751 struct mlx5_flow_dv_encap_decap_resource *resource,
3752 struct mlx5_flow *dev_flow,
3753 struct rte_flow_error *error)
3755 struct mlx5_priv *priv = dev->data->dev_private;
3756 struct mlx5_dev_ctx_shared *sh = priv->sh;
3757 struct mlx5_list_entry *entry;
3761 uint32_t refmt_type:8;
3763 * Header reformat actions can be shared between
3764 * non-root tables. One bit to indicate non-root
3768 uint32_t reserve:15;
3771 } encap_decap_key = {
3773 .ft_type = resource->ft_type,
3774 .refmt_type = resource->reformat_type,
3775 .is_root = !!dev_flow->dv.group,
3779 struct mlx5_flow_cb_ctx ctx = {
3783 struct mlx5_hlist *encaps_decaps;
3786 encaps_decaps = flow_dv_hlist_prepare(sh, &sh->encaps_decaps,
3788 MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
3790 flow_dv_encap_decap_create_cb,
3791 flow_dv_encap_decap_match_cb,
3792 flow_dv_encap_decap_remove_cb,
3793 flow_dv_encap_decap_clone_cb,
3794 flow_dv_encap_decap_clone_free_cb);
3795 if (unlikely(!encaps_decaps))
3797 resource->flags = dev_flow->dv.group ? 0 : 1;
3798 key64 = __rte_raw_cksum(&encap_decap_key.v32,
3799 sizeof(encap_decap_key.v32), 0);
3800 if (resource->reformat_type !=
3801 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2 &&
3803 key64 = __rte_raw_cksum(resource->buf, resource->size, key64);
3804 entry = mlx5_hlist_register(encaps_decaps, key64, &ctx);
3807 resource = container_of(entry, typeof(*resource), entry);
3808 dev_flow->dv.encap_decap = resource;
3809 dev_flow->handle->dvh.rix_encap_decap = resource->idx;
3814 * Find existing table jump resource or create and register a new one.
3816 * @param[in, out] dev
3817 * Pointer to rte_eth_dev structure.
3818 * @param[in, out] tbl
3819 * Pointer to flow table resource.
3820 * @parm[in, out] dev_flow
3821 * Pointer to the dev_flow.
3823 * pointer to error structure.
3826 * 0 on success otherwise -errno and errno is set.
3829 flow_dv_jump_tbl_resource_register
3830 (struct rte_eth_dev *dev __rte_unused,
3831 struct mlx5_flow_tbl_resource *tbl,
3832 struct mlx5_flow *dev_flow,
3833 struct rte_flow_error *error __rte_unused)
3835 struct mlx5_flow_tbl_data_entry *tbl_data =
3836 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
3839 MLX5_ASSERT(tbl_data->jump.action);
3840 dev_flow->handle->rix_jump = tbl_data->idx;
3841 dev_flow->dv.jump = &tbl_data->jump;
3846 flow_dv_port_id_match_cb(void *tool_ctx __rte_unused,
3847 struct mlx5_list_entry *entry, void *cb_ctx)
3849 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3850 struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3851 struct mlx5_flow_dv_port_id_action_resource *res =
3852 container_of(entry, typeof(*res), entry);
3854 return ref->port_id != res->port_id;
3857 struct mlx5_list_entry *
3858 flow_dv_port_id_create_cb(void *tool_ctx, void *cb_ctx)
3860 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3861 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3862 struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3863 struct mlx5_flow_dv_port_id_action_resource *resource;
3867 /* Register new port id action resource. */
3868 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3870 rte_flow_error_set(ctx->error, ENOMEM,
3871 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3872 "cannot allocate port_id action memory");
3876 ret = mlx5_flow_os_create_flow_action_dest_port(sh->fdb_domain,
3880 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], idx);
3881 rte_flow_error_set(ctx->error, ENOMEM,
3882 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3883 "cannot create action");
3886 resource->idx = idx;
3887 return &resource->entry;
3890 struct mlx5_list_entry *
3891 flow_dv_port_id_clone_cb(void *tool_ctx,
3892 struct mlx5_list_entry *entry __rte_unused,
3895 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3896 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3897 struct mlx5_flow_dv_port_id_action_resource *resource;
3900 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3902 rte_flow_error_set(ctx->error, ENOMEM,
3903 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3904 "cannot allocate port_id action memory");
3907 memcpy(resource, entry, sizeof(*resource));
3908 resource->idx = idx;
3909 return &resource->entry;
3913 flow_dv_port_id_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3915 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3916 struct mlx5_flow_dv_port_id_action_resource *resource =
3917 container_of(entry, typeof(*resource), entry);
3919 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
3923 * Find existing table port ID resource or create and register a new one.
3925 * @param[in, out] dev
3926 * Pointer to rte_eth_dev structure.
3927 * @param[in, out] ref
3928 * Pointer to port ID action resource reference.
3929 * @parm[in, out] dev_flow
3930 * Pointer to the dev_flow.
3932 * pointer to error structure.
3935 * 0 on success otherwise -errno and errno is set.
3938 flow_dv_port_id_action_resource_register
3939 (struct rte_eth_dev *dev,
3940 struct mlx5_flow_dv_port_id_action_resource *ref,
3941 struct mlx5_flow *dev_flow,
3942 struct rte_flow_error *error)
3944 struct mlx5_priv *priv = dev->data->dev_private;
3945 struct mlx5_list_entry *entry;
3946 struct mlx5_flow_dv_port_id_action_resource *resource;
3947 struct mlx5_flow_cb_ctx ctx = {
3952 entry = mlx5_list_register(priv->sh->port_id_action_list, &ctx);
3955 resource = container_of(entry, typeof(*resource), entry);
3956 dev_flow->dv.port_id_action = resource;
3957 dev_flow->handle->rix_port_id_action = resource->idx;
3962 flow_dv_push_vlan_match_cb(void *tool_ctx __rte_unused,
3963 struct mlx5_list_entry *entry, void *cb_ctx)
3965 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3966 struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3967 struct mlx5_flow_dv_push_vlan_action_resource *res =
3968 container_of(entry, typeof(*res), entry);
3970 return ref->vlan_tag != res->vlan_tag || ref->ft_type != res->ft_type;
3973 struct mlx5_list_entry *
3974 flow_dv_push_vlan_create_cb(void *tool_ctx, void *cb_ctx)
3976 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3977 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3978 struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3979 struct mlx5_flow_dv_push_vlan_action_resource *resource;
3980 struct mlx5dv_dr_domain *domain;
3984 /* Register new port id action resource. */
3985 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3987 rte_flow_error_set(ctx->error, ENOMEM,
3988 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3989 "cannot allocate push_vlan action memory");
3993 if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3994 domain = sh->fdb_domain;
3995 else if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3996 domain = sh->rx_domain;
3998 domain = sh->tx_domain;
3999 ret = mlx5_flow_os_create_flow_action_push_vlan(domain, ref->vlan_tag,
4002 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
4003 rte_flow_error_set(ctx->error, ENOMEM,
4004 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4005 "cannot create push vlan action");
4008 resource->idx = idx;
4009 return &resource->entry;
4012 struct mlx5_list_entry *
4013 flow_dv_push_vlan_clone_cb(void *tool_ctx,
4014 struct mlx5_list_entry *entry __rte_unused,
4017 struct mlx5_dev_ctx_shared *sh = tool_ctx;
4018 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4019 struct mlx5_flow_dv_push_vlan_action_resource *resource;
4022 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
4024 rte_flow_error_set(ctx->error, ENOMEM,
4025 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4026 "cannot allocate push_vlan action memory");
4029 memcpy(resource, entry, sizeof(*resource));
4030 resource->idx = idx;
4031 return &resource->entry;
4035 flow_dv_push_vlan_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4037 struct mlx5_dev_ctx_shared *sh = tool_ctx;
4038 struct mlx5_flow_dv_push_vlan_action_resource *resource =
4039 container_of(entry, typeof(*resource), entry);
4041 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
4045 * Find existing push vlan resource or create and register a new one.
4047 * @param [in, out] dev
4048 * Pointer to rte_eth_dev structure.
4049 * @param[in, out] ref
4050 * Pointer to port ID action resource reference.
4051 * @parm[in, out] dev_flow
4052 * Pointer to the dev_flow.
4054 * pointer to error structure.
4057 * 0 on success otherwise -errno and errno is set.
4060 flow_dv_push_vlan_action_resource_register
4061 (struct rte_eth_dev *dev,
4062 struct mlx5_flow_dv_push_vlan_action_resource *ref,
4063 struct mlx5_flow *dev_flow,
4064 struct rte_flow_error *error)
4066 struct mlx5_priv *priv = dev->data->dev_private;
4067 struct mlx5_flow_dv_push_vlan_action_resource *resource;
4068 struct mlx5_list_entry *entry;
4069 struct mlx5_flow_cb_ctx ctx = {
4074 entry = mlx5_list_register(priv->sh->push_vlan_action_list, &ctx);
4077 resource = container_of(entry, typeof(*resource), entry);
4079 dev_flow->handle->dvh.rix_push_vlan = resource->idx;
4080 dev_flow->dv.push_vlan_res = resource;
4085 * Get the size of specific rte_flow_item_type hdr size
4087 * @param[in] item_type
4088 * Tested rte_flow_item_type.
4091 * sizeof struct item_type, 0 if void or irrelevant.
4094 flow_dv_get_item_hdr_len(const enum rte_flow_item_type item_type)
4098 switch (item_type) {
4099 case RTE_FLOW_ITEM_TYPE_ETH:
4100 retval = sizeof(struct rte_ether_hdr);
4102 case RTE_FLOW_ITEM_TYPE_VLAN:
4103 retval = sizeof(struct rte_vlan_hdr);
4105 case RTE_FLOW_ITEM_TYPE_IPV4:
4106 retval = sizeof(struct rte_ipv4_hdr);
4108 case RTE_FLOW_ITEM_TYPE_IPV6:
4109 retval = sizeof(struct rte_ipv6_hdr);
4111 case RTE_FLOW_ITEM_TYPE_UDP:
4112 retval = sizeof(struct rte_udp_hdr);
4114 case RTE_FLOW_ITEM_TYPE_TCP:
4115 retval = sizeof(struct rte_tcp_hdr);
4117 case RTE_FLOW_ITEM_TYPE_VXLAN:
4118 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4119 retval = sizeof(struct rte_vxlan_hdr);
4121 case RTE_FLOW_ITEM_TYPE_GRE:
4122 case RTE_FLOW_ITEM_TYPE_NVGRE:
4123 retval = sizeof(struct rte_gre_hdr);
4125 case RTE_FLOW_ITEM_TYPE_MPLS:
4126 retval = sizeof(struct rte_mpls_hdr);
4128 case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
4136 #define MLX5_ENCAP_IPV4_VERSION 0x40
4137 #define MLX5_ENCAP_IPV4_IHL_MIN 0x05
4138 #define MLX5_ENCAP_IPV4_TTL_DEF 0x40
4139 #define MLX5_ENCAP_IPV6_VTC_FLOW 0x60000000
4140 #define MLX5_ENCAP_IPV6_HOP_LIMIT 0xff
4141 #define MLX5_ENCAP_VXLAN_FLAGS 0x08000000
4142 #define MLX5_ENCAP_VXLAN_GPE_FLAGS 0x04
4145 * Convert the encap action data from list of rte_flow_item to raw buffer
4148 * Pointer to rte_flow_item objects list.
4150 * Pointer to the output buffer.
4152 * Pointer to the output buffer size.
4154 * Pointer to the error structure.
4157 * 0 on success, a negative errno value otherwise and rte_errno is set.
4160 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
4161 size_t *size, struct rte_flow_error *error)
4163 struct rte_ether_hdr *eth = NULL;
4164 struct rte_vlan_hdr *vlan = NULL;
4165 struct rte_ipv4_hdr *ipv4 = NULL;
4166 struct rte_ipv6_hdr *ipv6 = NULL;
4167 struct rte_udp_hdr *udp = NULL;
4168 struct rte_vxlan_hdr *vxlan = NULL;
4169 struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
4170 struct rte_gre_hdr *gre = NULL;
4172 size_t temp_size = 0;
4175 return rte_flow_error_set(error, EINVAL,
4176 RTE_FLOW_ERROR_TYPE_ACTION,
4177 NULL, "invalid empty data");
4178 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4179 len = flow_dv_get_item_hdr_len(items->type);
4180 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
4181 return rte_flow_error_set(error, EINVAL,
4182 RTE_FLOW_ERROR_TYPE_ACTION,
4183 (void *)items->type,
4184 "items total size is too big"
4185 " for encap action");
4186 rte_memcpy((void *)&buf[temp_size], items->spec, len);
4187 switch (items->type) {
4188 case RTE_FLOW_ITEM_TYPE_ETH:
4189 eth = (struct rte_ether_hdr *)&buf[temp_size];
4191 case RTE_FLOW_ITEM_TYPE_VLAN:
4192 vlan = (struct rte_vlan_hdr *)&buf[temp_size];
4194 return rte_flow_error_set(error, EINVAL,
4195 RTE_FLOW_ERROR_TYPE_ACTION,
4196 (void *)items->type,
4197 "eth header not found");
4198 if (!eth->ether_type)
4199 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
4201 case RTE_FLOW_ITEM_TYPE_IPV4:
4202 ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
4204 return rte_flow_error_set(error, EINVAL,
4205 RTE_FLOW_ERROR_TYPE_ACTION,
4206 (void *)items->type,
4207 "neither eth nor vlan"
4209 if (vlan && !vlan->eth_proto)
4210 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4211 else if (eth && !eth->ether_type)
4212 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4213 if (!ipv4->version_ihl)
4214 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
4215 MLX5_ENCAP_IPV4_IHL_MIN;
4216 if (!ipv4->time_to_live)
4217 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
4219 case RTE_FLOW_ITEM_TYPE_IPV6:
4220 ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
4222 return rte_flow_error_set(error, EINVAL,
4223 RTE_FLOW_ERROR_TYPE_ACTION,
4224 (void *)items->type,
4225 "neither eth nor vlan"
4227 if (vlan && !vlan->eth_proto)
4228 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4229 else if (eth && !eth->ether_type)
4230 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4231 if (!ipv6->vtc_flow)
4233 RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
4234 if (!ipv6->hop_limits)
4235 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
4237 case RTE_FLOW_ITEM_TYPE_UDP:
4238 udp = (struct rte_udp_hdr *)&buf[temp_size];
4240 return rte_flow_error_set(error, EINVAL,
4241 RTE_FLOW_ERROR_TYPE_ACTION,
4242 (void *)items->type,
4243 "ip header not found");
4244 if (ipv4 && !ipv4->next_proto_id)
4245 ipv4->next_proto_id = IPPROTO_UDP;
4246 else if (ipv6 && !ipv6->proto)
4247 ipv6->proto = IPPROTO_UDP;
4249 case RTE_FLOW_ITEM_TYPE_VXLAN:
4250 vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
4252 return rte_flow_error_set(error, EINVAL,
4253 RTE_FLOW_ERROR_TYPE_ACTION,
4254 (void *)items->type,
4255 "udp header not found");
4257 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
4258 if (!vxlan->vx_flags)
4260 RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
4262 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4263 vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
4265 return rte_flow_error_set(error, EINVAL,
4266 RTE_FLOW_ERROR_TYPE_ACTION,
4267 (void *)items->type,
4268 "udp header not found");
4269 if (!vxlan_gpe->proto)
4270 return rte_flow_error_set(error, EINVAL,
4271 RTE_FLOW_ERROR_TYPE_ACTION,
4272 (void *)items->type,
4273 "next protocol not found");
4276 RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
4277 if (!vxlan_gpe->vx_flags)
4278 vxlan_gpe->vx_flags =
4279 MLX5_ENCAP_VXLAN_GPE_FLAGS;
4281 case RTE_FLOW_ITEM_TYPE_GRE:
4282 case RTE_FLOW_ITEM_TYPE_NVGRE:
4283 gre = (struct rte_gre_hdr *)&buf[temp_size];
4285 return rte_flow_error_set(error, EINVAL,
4286 RTE_FLOW_ERROR_TYPE_ACTION,
4287 (void *)items->type,
4288 "next protocol not found");
4290 return rte_flow_error_set(error, EINVAL,
4291 RTE_FLOW_ERROR_TYPE_ACTION,
4292 (void *)items->type,
4293 "ip header not found");
4294 if (ipv4 && !ipv4->next_proto_id)
4295 ipv4->next_proto_id = IPPROTO_GRE;
4296 else if (ipv6 && !ipv6->proto)
4297 ipv6->proto = IPPROTO_GRE;
4299 case RTE_FLOW_ITEM_TYPE_VOID:
4302 return rte_flow_error_set(error, EINVAL,
4303 RTE_FLOW_ERROR_TYPE_ACTION,
4304 (void *)items->type,
4305 "unsupported item type");
4315 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
4317 struct rte_ether_hdr *eth = NULL;
4318 struct rte_vlan_hdr *vlan = NULL;
4319 struct rte_ipv6_hdr *ipv6 = NULL;
4320 struct rte_udp_hdr *udp = NULL;
4324 eth = (struct rte_ether_hdr *)data;
4325 next_hdr = (char *)(eth + 1);
4326 proto = RTE_BE16(eth->ether_type);
4329 while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
4330 vlan = (struct rte_vlan_hdr *)next_hdr;
4331 proto = RTE_BE16(vlan->eth_proto);
4332 next_hdr += sizeof(struct rte_vlan_hdr);
4335 /* HW calculates IPv4 csum. no need to proceed */
4336 if (proto == RTE_ETHER_TYPE_IPV4)
4339 /* non IPv4/IPv6 header. not supported */
4340 if (proto != RTE_ETHER_TYPE_IPV6) {
4341 return rte_flow_error_set(error, ENOTSUP,
4342 RTE_FLOW_ERROR_TYPE_ACTION,
4343 NULL, "Cannot offload non IPv4/IPv6");
4346 ipv6 = (struct rte_ipv6_hdr *)next_hdr;
4348 /* ignore non UDP */
4349 if (ipv6->proto != IPPROTO_UDP)
4352 udp = (struct rte_udp_hdr *)(ipv6 + 1);
4353 udp->dgram_cksum = 0;
4359 * Convert L2 encap action to DV specification.
4362 * Pointer to rte_eth_dev structure.
4364 * Pointer to action structure.
4365 * @param[in, out] dev_flow
4366 * Pointer to the mlx5_flow.
4367 * @param[in] transfer
4368 * Mark if the flow is E-Switch flow.
4370 * Pointer to the error structure.
4373 * 0 on success, a negative errno value otherwise and rte_errno is set.
4376 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
4377 const struct rte_flow_action *action,
4378 struct mlx5_flow *dev_flow,
4380 struct rte_flow_error *error)
4382 const struct rte_flow_item *encap_data;
4383 const struct rte_flow_action_raw_encap *raw_encap_data;
4384 struct mlx5_flow_dv_encap_decap_resource res = {
4386 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
4387 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4388 MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
4391 if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4393 (const struct rte_flow_action_raw_encap *)action->conf;
4394 res.size = raw_encap_data->size;
4395 memcpy(res.buf, raw_encap_data->data, res.size);
4397 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
4399 ((const struct rte_flow_action_vxlan_encap *)
4400 action->conf)->definition;
4403 ((const struct rte_flow_action_nvgre_encap *)
4404 action->conf)->definition;
4405 if (flow_dv_convert_encap_data(encap_data, res.buf,
4409 if (flow_dv_zero_encap_udp_csum(res.buf, error))
4411 if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4412 return rte_flow_error_set(error, EINVAL,
4413 RTE_FLOW_ERROR_TYPE_ACTION,
4414 NULL, "can't create L2 encap action");
4419 * Convert L2 decap action to DV specification.
4422 * Pointer to rte_eth_dev structure.
4423 * @param[in, out] dev_flow
4424 * Pointer to the mlx5_flow.
4425 * @param[in] transfer
4426 * Mark if the flow is E-Switch flow.
4428 * Pointer to the error structure.
4431 * 0 on success, a negative errno value otherwise and rte_errno is set.
4434 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
4435 struct mlx5_flow *dev_flow,
4437 struct rte_flow_error *error)
4439 struct mlx5_flow_dv_encap_decap_resource res = {
4442 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
4443 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4444 MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
4447 if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4448 return rte_flow_error_set(error, EINVAL,
4449 RTE_FLOW_ERROR_TYPE_ACTION,
4450 NULL, "can't create L2 decap action");
4455 * Convert raw decap/encap (L3 tunnel) action to DV specification.
4458 * Pointer to rte_eth_dev structure.
4460 * Pointer to action structure.
4461 * @param[in, out] dev_flow
4462 * Pointer to the mlx5_flow.
4464 * Pointer to the flow attributes.
4466 * Pointer to the error structure.
4469 * 0 on success, a negative errno value otherwise and rte_errno is set.
4472 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
4473 const struct rte_flow_action *action,
4474 struct mlx5_flow *dev_flow,
4475 const struct rte_flow_attr *attr,
4476 struct rte_flow_error *error)
4478 const struct rte_flow_action_raw_encap *encap_data;
4479 struct mlx5_flow_dv_encap_decap_resource res;
4481 memset(&res, 0, sizeof(res));
4482 encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
4483 res.size = encap_data->size;
4484 memcpy(res.buf, encap_data->data, res.size);
4485 res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
4486 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
4487 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
4489 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4491 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4492 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4493 if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4494 return rte_flow_error_set(error, EINVAL,
4495 RTE_FLOW_ERROR_TYPE_ACTION,
4496 NULL, "can't create encap action");
4501 * Create action push VLAN.
4504 * Pointer to rte_eth_dev structure.
4506 * Pointer to the flow attributes.
4508 * Pointer to the vlan to push to the Ethernet header.
4509 * @param[in, out] dev_flow
4510 * Pointer to the mlx5_flow.
4512 * Pointer to the error structure.
4515 * 0 on success, a negative errno value otherwise and rte_errno is set.
4518 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
4519 const struct rte_flow_attr *attr,
4520 const struct rte_vlan_hdr *vlan,
4521 struct mlx5_flow *dev_flow,
4522 struct rte_flow_error *error)
4524 struct mlx5_flow_dv_push_vlan_action_resource res;
4526 memset(&res, 0, sizeof(res));
4528 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
4531 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4533 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4534 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4535 return flow_dv_push_vlan_action_resource_register
4536 (dev, &res, dev_flow, error);
4540 * Validate the modify-header actions.
4542 * @param[in] action_flags
4543 * Holds the actions detected until now.
4545 * Pointer to the modify action.
4547 * Pointer to error structure.
4550 * 0 on success, a negative errno value otherwise and rte_errno is set.
4553 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
4554 const struct rte_flow_action *action,
4555 struct rte_flow_error *error)
4557 if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
4558 return rte_flow_error_set(error, EINVAL,
4559 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4560 NULL, "action configuration not set");
4561 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
4562 return rte_flow_error_set(error, EINVAL,
4563 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4564 "can't have encap action before"
4570 * Validate the modify-header MAC address actions.
4572 * @param[in] action_flags
4573 * Holds the actions detected until now.
4575 * Pointer to the modify action.
4576 * @param[in] item_flags
4577 * Holds the items detected.
4579 * Pointer to error structure.
4582 * 0 on success, a negative errno value otherwise and rte_errno is set.
4585 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
4586 const struct rte_flow_action *action,
4587 const uint64_t item_flags,
4588 struct rte_flow_error *error)
4592 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4594 if (!(item_flags & MLX5_FLOW_LAYER_L2))
4595 return rte_flow_error_set(error, EINVAL,
4596 RTE_FLOW_ERROR_TYPE_ACTION,
4598 "no L2 item in pattern");
4604 * Validate the modify-header IPv4 address actions.
4606 * @param[in] action_flags
4607 * Holds the actions detected until now.
4609 * Pointer to the modify action.
4610 * @param[in] item_flags
4611 * Holds the items detected.
4613 * Pointer to error structure.
4616 * 0 on success, a negative errno value otherwise and rte_errno is set.
4619 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
4620 const struct rte_flow_action *action,
4621 const uint64_t item_flags,
4622 struct rte_flow_error *error)
4627 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4629 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4630 MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4631 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4632 if (!(item_flags & layer))
4633 return rte_flow_error_set(error, EINVAL,
4634 RTE_FLOW_ERROR_TYPE_ACTION,
4636 "no ipv4 item in pattern");
4642 * Validate the modify-header IPv6 address actions.
4644 * @param[in] action_flags
4645 * Holds the actions detected until now.
4647 * Pointer to the modify action.
4648 * @param[in] item_flags
4649 * Holds the items detected.
4651 * Pointer to error structure.
4654 * 0 on success, a negative errno value otherwise and rte_errno is set.
4657 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
4658 const struct rte_flow_action *action,
4659 const uint64_t item_flags,
4660 struct rte_flow_error *error)
4665 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4667 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4668 MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4669 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4670 if (!(item_flags & layer))
4671 return rte_flow_error_set(error, EINVAL,
4672 RTE_FLOW_ERROR_TYPE_ACTION,
4674 "no ipv6 item in pattern");
4680 * Validate the modify-header TP actions.
4682 * @param[in] action_flags
4683 * Holds the actions detected until now.
4685 * Pointer to the modify action.
4686 * @param[in] item_flags
4687 * Holds the items detected.
4689 * Pointer to error structure.
4692 * 0 on success, a negative errno value otherwise and rte_errno is set.
4695 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
4696 const struct rte_flow_action *action,
4697 const uint64_t item_flags,
4698 struct rte_flow_error *error)
4703 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4705 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4706 MLX5_FLOW_LAYER_INNER_L4 :
4707 MLX5_FLOW_LAYER_OUTER_L4;
4708 if (!(item_flags & layer))
4709 return rte_flow_error_set(error, EINVAL,
4710 RTE_FLOW_ERROR_TYPE_ACTION,
4711 NULL, "no transport layer "
4718 * Validate the modify-header actions of increment/decrement
4719 * TCP Sequence-number.
4721 * @param[in] action_flags
4722 * Holds the actions detected until now.
4724 * Pointer to the modify action.
4725 * @param[in] item_flags
4726 * Holds the items detected.
4728 * Pointer to error structure.
4731 * 0 on success, a negative errno value otherwise and rte_errno is set.
4734 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
4735 const struct rte_flow_action *action,
4736 const uint64_t item_flags,
4737 struct rte_flow_error *error)
4742 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4744 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4745 MLX5_FLOW_LAYER_INNER_L4_TCP :
4746 MLX5_FLOW_LAYER_OUTER_L4_TCP;
4747 if (!(item_flags & layer))
4748 return rte_flow_error_set(error, EINVAL,
4749 RTE_FLOW_ERROR_TYPE_ACTION,
4750 NULL, "no TCP item in"
4752 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
4753 (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
4754 (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
4755 (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
4756 return rte_flow_error_set(error, EINVAL,
4757 RTE_FLOW_ERROR_TYPE_ACTION,
4759 "cannot decrease and increase"
4760 " TCP sequence number"
4761 " at the same time");
4767 * Validate the modify-header actions of increment/decrement
4768 * TCP Acknowledgment number.
4770 * @param[in] action_flags
4771 * Holds the actions detected until now.
4773 * Pointer to the modify action.
4774 * @param[in] item_flags
4775 * Holds the items detected.
4777 * Pointer to error structure.
4780 * 0 on success, a negative errno value otherwise and rte_errno is set.
4783 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
4784 const struct rte_flow_action *action,
4785 const uint64_t item_flags,
4786 struct rte_flow_error *error)
4791 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4793 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4794 MLX5_FLOW_LAYER_INNER_L4_TCP :
4795 MLX5_FLOW_LAYER_OUTER_L4_TCP;
4796 if (!(item_flags & layer))
4797 return rte_flow_error_set(error, EINVAL,
4798 RTE_FLOW_ERROR_TYPE_ACTION,
4799 NULL, "no TCP item in"
4801 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
4802 (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
4803 (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
4804 (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
4805 return rte_flow_error_set(error, EINVAL,
4806 RTE_FLOW_ERROR_TYPE_ACTION,
4808 "cannot decrease and increase"
4809 " TCP acknowledgment number"
4810 " at the same time");
4816 * Validate the modify-header TTL actions.
4818 * @param[in] action_flags
4819 * Holds the actions detected until now.
4821 * Pointer to the modify action.
4822 * @param[in] item_flags
4823 * Holds the items detected.
4825 * Pointer to error structure.
4828 * 0 on success, a negative errno value otherwise and rte_errno is set.
4831 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
4832 const struct rte_flow_action *action,
4833 const uint64_t item_flags,
4834 struct rte_flow_error *error)
4839 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4841 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4842 MLX5_FLOW_LAYER_INNER_L3 :
4843 MLX5_FLOW_LAYER_OUTER_L3;
4844 if (!(item_flags & layer))
4845 return rte_flow_error_set(error, EINVAL,
4846 RTE_FLOW_ERROR_TYPE_ACTION,
4848 "no IP protocol in pattern");
4854 * Validate the generic modify field actions.
4856 * Pointer to the rte_eth_dev structure.
4857 * @param[in] action_flags
4858 * Holds the actions detected until now.
4860 * Pointer to the modify action.
4862 * Pointer to the flow attributes.
4864 * Pointer to error structure.
4867 * Number of header fields to modify (0 or more) on success,
4868 * a negative errno value otherwise and rte_errno is set.
4871 flow_dv_validate_action_modify_field(struct rte_eth_dev *dev,
4872 const uint64_t action_flags,
4873 const struct rte_flow_action *action,
4874 const struct rte_flow_attr *attr,
4875 struct rte_flow_error *error)
4878 struct mlx5_priv *priv = dev->data->dev_private;
4879 struct mlx5_dev_config *config = &priv->config;
4880 const struct rte_flow_action_modify_field *action_modify_field =
4882 uint32_t dst_width = mlx5_flow_item_field_width(priv,
4883 action_modify_field->dst.field);
4884 uint32_t src_width = mlx5_flow_item_field_width(priv,
4885 action_modify_field->src.field);
4887 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4891 if (action_modify_field->width == 0)
4892 return rte_flow_error_set(error, EINVAL,
4893 RTE_FLOW_ERROR_TYPE_ACTION, action,
4894 "no bits are requested to be modified");
4895 else if (action_modify_field->width > dst_width ||
4896 action_modify_field->width > src_width)
4897 return rte_flow_error_set(error, EINVAL,
4898 RTE_FLOW_ERROR_TYPE_ACTION, action,
4899 "cannot modify more bits than"
4900 " the width of a field");
4901 if (action_modify_field->dst.field != RTE_FLOW_FIELD_VALUE &&
4902 action_modify_field->dst.field != RTE_FLOW_FIELD_POINTER) {
4903 if ((action_modify_field->dst.offset +
4904 action_modify_field->width > dst_width) ||
4905 (action_modify_field->dst.offset % 32))
4906 return rte_flow_error_set(error, EINVAL,
4907 RTE_FLOW_ERROR_TYPE_ACTION, action,
4908 "destination offset is too big"
4909 " or not aligned to 4 bytes");
4910 if (action_modify_field->dst.level &&
4911 action_modify_field->dst.field != RTE_FLOW_FIELD_TAG)
4912 return rte_flow_error_set(error, ENOTSUP,
4913 RTE_FLOW_ERROR_TYPE_ACTION, action,
4914 "inner header fields modification"
4915 " is not supported");
4917 if (action_modify_field->src.field != RTE_FLOW_FIELD_VALUE &&
4918 action_modify_field->src.field != RTE_FLOW_FIELD_POINTER) {
4919 if (!attr->transfer && !attr->group)
4920 return rte_flow_error_set(error, ENOTSUP,
4921 RTE_FLOW_ERROR_TYPE_ACTION, action,
4922 "modify field action is not"
4923 " supported for group 0");
4924 if ((action_modify_field->src.offset +
4925 action_modify_field->width > src_width) ||
4926 (action_modify_field->src.offset % 32))
4927 return rte_flow_error_set(error, EINVAL,
4928 RTE_FLOW_ERROR_TYPE_ACTION, action,
4929 "source offset is too big"
4930 " or not aligned to 4 bytes");
4931 if (action_modify_field->src.level &&
4932 action_modify_field->src.field != RTE_FLOW_FIELD_TAG)
4933 return rte_flow_error_set(error, ENOTSUP,
4934 RTE_FLOW_ERROR_TYPE_ACTION, action,
4935 "inner header fields modification"
4936 " is not supported");
4938 if ((action_modify_field->dst.field ==
4939 action_modify_field->src.field) &&
4940 (action_modify_field->dst.level ==
4941 action_modify_field->src.level))
4942 return rte_flow_error_set(error, EINVAL,
4943 RTE_FLOW_ERROR_TYPE_ACTION, action,
4944 "source and destination fields"
4945 " cannot be the same");
4946 if (action_modify_field->dst.field == RTE_FLOW_FIELD_VALUE ||
4947 action_modify_field->dst.field == RTE_FLOW_FIELD_POINTER ||
4948 action_modify_field->dst.field == RTE_FLOW_FIELD_MARK)
4949 return rte_flow_error_set(error, EINVAL,
4950 RTE_FLOW_ERROR_TYPE_ACTION, action,
4951 "mark, immediate value or a pointer to it"
4952 " cannot be used as a destination");
4953 if (action_modify_field->dst.field == RTE_FLOW_FIELD_START ||
4954 action_modify_field->src.field == RTE_FLOW_FIELD_START)
4955 return rte_flow_error_set(error, ENOTSUP,
4956 RTE_FLOW_ERROR_TYPE_ACTION, action,
4957 "modifications of an arbitrary"
4958 " place in a packet is not supported");
4959 if (action_modify_field->dst.field == RTE_FLOW_FIELD_VLAN_TYPE ||
4960 action_modify_field->src.field == RTE_FLOW_FIELD_VLAN_TYPE)
4961 return rte_flow_error_set(error, ENOTSUP,
4962 RTE_FLOW_ERROR_TYPE_ACTION, action,
4963 "modifications of the 802.1Q Tag"
4964 " Identifier is not supported");
4965 if (action_modify_field->dst.field == RTE_FLOW_FIELD_VXLAN_VNI ||
4966 action_modify_field->src.field == RTE_FLOW_FIELD_VXLAN_VNI)
4967 return rte_flow_error_set(error, ENOTSUP,
4968 RTE_FLOW_ERROR_TYPE_ACTION, action,
4969 "modifications of the VXLAN Network"
4970 " Identifier is not supported");
4971 if (action_modify_field->dst.field == RTE_FLOW_FIELD_GENEVE_VNI ||
4972 action_modify_field->src.field == RTE_FLOW_FIELD_GENEVE_VNI)
4973 return rte_flow_error_set(error, ENOTSUP,
4974 RTE_FLOW_ERROR_TYPE_ACTION, action,
4975 "modifications of the GENEVE Network"
4976 " Identifier is not supported");
4977 if (action_modify_field->dst.field == RTE_FLOW_FIELD_MARK ||
4978 action_modify_field->src.field == RTE_FLOW_FIELD_MARK ||
4979 action_modify_field->dst.field == RTE_FLOW_FIELD_META ||
4980 action_modify_field->src.field == RTE_FLOW_FIELD_META) {
4981 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4982 !mlx5_flow_ext_mreg_supported(dev))
4983 return rte_flow_error_set(error, ENOTSUP,
4984 RTE_FLOW_ERROR_TYPE_ACTION, action,
4985 "cannot modify mark or metadata without"
4986 " extended metadata register support");
4988 if (action_modify_field->operation != RTE_FLOW_MODIFY_SET)
4989 return rte_flow_error_set(error, ENOTSUP,
4990 RTE_FLOW_ERROR_TYPE_ACTION, action,
4991 "add and sub operations"
4992 " are not supported");
4993 return (action_modify_field->width / 32) +
4994 !!(action_modify_field->width % 32);
4998 * Validate jump action.
5001 * Pointer to the jump action.
5002 * @param[in] action_flags
5003 * Holds the actions detected until now.
5004 * @param[in] attributes
5005 * Pointer to flow attributes
5006 * @param[in] external
5007 * Action belongs to flow rule created by request external to PMD.
5009 * Pointer to error structure.
5012 * 0 on success, a negative errno value otherwise and rte_errno is set.
5015 flow_dv_validate_action_jump(struct rte_eth_dev *dev,
5016 const struct mlx5_flow_tunnel *tunnel,
5017 const struct rte_flow_action *action,
5018 uint64_t action_flags,
5019 const struct rte_flow_attr *attributes,
5020 bool external, struct rte_flow_error *error)
5022 uint32_t target_group, table;
5024 struct flow_grp_info grp_info = {
5025 .external = !!external,
5026 .transfer = !!attributes->transfer,
5030 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
5031 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5032 return rte_flow_error_set(error, EINVAL,
5033 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5034 "can't have 2 fate actions in"
5037 return rte_flow_error_set(error, EINVAL,
5038 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5039 NULL, "action configuration not set");
5041 ((const struct rte_flow_action_jump *)action->conf)->group;
5042 ret = mlx5_flow_group_to_table(dev, tunnel, target_group, &table,
5046 if (attributes->group == target_group &&
5047 !(action_flags & (MLX5_FLOW_ACTION_TUNNEL_SET |
5048 MLX5_FLOW_ACTION_TUNNEL_MATCH)))
5049 return rte_flow_error_set(error, EINVAL,
5050 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5051 "target group must be other than"
5052 " the current flow group");
5057 * Validate the port_id action.
5060 * Pointer to rte_eth_dev structure.
5061 * @param[in] action_flags
5062 * Bit-fields that holds the actions detected until now.
5064 * Port_id RTE action structure.
5066 * Attributes of flow that includes this action.
5068 * Pointer to error structure.
5071 * 0 on success, a negative errno value otherwise and rte_errno is set.
5074 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
5075 uint64_t action_flags,
5076 const struct rte_flow_action *action,
5077 const struct rte_flow_attr *attr,
5078 struct rte_flow_error *error)
5080 const struct rte_flow_action_port_id *port_id;
5081 struct mlx5_priv *act_priv;
5082 struct mlx5_priv *dev_priv;
5085 if (!attr->transfer)
5086 return rte_flow_error_set(error, ENOTSUP,
5087 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5089 "port id action is valid in transfer"
5091 if (!action || !action->conf)
5092 return rte_flow_error_set(error, ENOTSUP,
5093 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5095 "port id action parameters must be"
5097 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
5098 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5099 return rte_flow_error_set(error, EINVAL,
5100 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5101 "can have only one fate actions in"
5103 dev_priv = mlx5_dev_to_eswitch_info(dev);
5105 return rte_flow_error_set(error, rte_errno,
5106 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5108 "failed to obtain E-Switch info");
5109 port_id = action->conf;
5110 port = port_id->original ? dev->data->port_id : port_id->id;
5111 act_priv = mlx5_port_to_eswitch_info(port, false);
5113 return rte_flow_error_set
5115 RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
5116 "failed to obtain E-Switch port id for port");
5117 if (act_priv->domain_id != dev_priv->domain_id)
5118 return rte_flow_error_set
5120 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5121 "port does not belong to"
5122 " E-Switch being configured");
5127 * Get the maximum number of modify header actions.
5130 * Pointer to rte_eth_dev structure.
5132 * Whether action is on root table.
5135 * Max number of modify header actions device can support.
5137 static inline unsigned int
5138 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev __rte_unused,
5142 * There's no way to directly query the max capacity from FW.
5143 * The maximal value on root table should be assumed to be supported.
5146 return MLX5_MAX_MODIFY_NUM;
5148 return MLX5_ROOT_TBL_MODIFY_NUM;
5152 * Validate the meter action.
5155 * Pointer to rte_eth_dev structure.
5156 * @param[in] action_flags
5157 * Bit-fields that holds the actions detected until now.
5159 * Pointer to the meter action.
5161 * Attributes of flow that includes this action.
5162 * @param[in] port_id_item
5163 * Pointer to item indicating port id.
5165 * Pointer to error structure.
5168 * 0 on success, a negative errno value otherwise and rte_ernno is set.
5171 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
5172 uint64_t action_flags,
5173 const struct rte_flow_action *action,
5174 const struct rte_flow_attr *attr,
5175 const struct rte_flow_item *port_id_item,
5177 struct rte_flow_error *error)
5179 struct mlx5_priv *priv = dev->data->dev_private;
5180 const struct rte_flow_action_meter *am = action->conf;
5181 struct mlx5_flow_meter_info *fm;
5182 struct mlx5_flow_meter_policy *mtr_policy;
5183 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
5186 return rte_flow_error_set(error, EINVAL,
5187 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5188 "meter action conf is NULL");
5190 if (action_flags & MLX5_FLOW_ACTION_METER)
5191 return rte_flow_error_set(error, ENOTSUP,
5192 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5193 "meter chaining not support");
5194 if (action_flags & MLX5_FLOW_ACTION_JUMP)
5195 return rte_flow_error_set(error, ENOTSUP,
5196 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5197 "meter with jump not support");
5199 return rte_flow_error_set(error, ENOTSUP,
5200 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5202 "meter action not supported");
5203 fm = mlx5_flow_meter_find(priv, am->mtr_id, NULL);
5205 return rte_flow_error_set(error, EINVAL,
5206 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5208 /* aso meter can always be shared by different domains */
5209 if (fm->ref_cnt && !priv->sh->meter_aso_en &&
5210 !(fm->transfer == attr->transfer ||
5211 (!fm->ingress && !attr->ingress && attr->egress) ||
5212 (!fm->egress && !attr->egress && attr->ingress)))
5213 return rte_flow_error_set(error, EINVAL,
5214 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5215 "Flow attributes domain are either invalid "
5216 "or have a domain conflict with current "
5217 "meter attributes");
5218 if (fm->def_policy) {
5219 if (!((attr->transfer &&
5220 mtrmng->def_policy[MLX5_MTR_DOMAIN_TRANSFER]) ||
5222 mtrmng->def_policy[MLX5_MTR_DOMAIN_EGRESS]) ||
5224 mtrmng->def_policy[MLX5_MTR_DOMAIN_INGRESS])))
5225 return rte_flow_error_set(error, EINVAL,
5226 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5227 "Flow attributes domain "
5228 "have a conflict with current "
5229 "meter domain attributes");
5232 mtr_policy = mlx5_flow_meter_policy_find(dev,
5233 fm->policy_id, NULL);
5235 return rte_flow_error_set(error, EINVAL,
5236 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5237 "Invalid policy id for meter ");
5238 if (!((attr->transfer && mtr_policy->transfer) ||
5239 (attr->egress && mtr_policy->egress) ||
5240 (attr->ingress && mtr_policy->ingress)))
5241 return rte_flow_error_set(error, EINVAL,
5242 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5243 "Flow attributes domain "
5244 "have a conflict with current "
5245 "meter domain attributes");
5246 if (attr->transfer && mtr_policy->dev) {
5248 * When policy has fate action of port_id,
5249 * the flow should have the same src port as policy.
5251 struct mlx5_priv *policy_port_priv =
5252 mtr_policy->dev->data->dev_private;
5253 int32_t flow_src_port = priv->representor_id;
5256 const struct rte_flow_item_port_id *spec =
5258 struct mlx5_priv *port_priv =
5259 mlx5_port_to_eswitch_info(spec->id,
5262 return rte_flow_error_set(error,
5264 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5266 "Failed to get port info.");
5267 flow_src_port = port_priv->representor_id;
5269 if (flow_src_port != policy_port_priv->representor_id)
5270 return rte_flow_error_set(error,
5272 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5274 "Flow and meter policy "
5275 "have different src port.");
5277 *def_policy = false;
5283 * Validate the age action.
5285 * @param[in] action_flags
5286 * Holds the actions detected until now.
5288 * Pointer to the age action.
5290 * Pointer to the Ethernet device structure.
5292 * Pointer to error structure.
5295 * 0 on success, a negative errno value otherwise and rte_errno is set.
5298 flow_dv_validate_action_age(uint64_t action_flags,
5299 const struct rte_flow_action *action,
5300 struct rte_eth_dev *dev,
5301 struct rte_flow_error *error)
5303 struct mlx5_priv *priv = dev->data->dev_private;
5304 const struct rte_flow_action_age *age = action->conf;
5306 if (!priv->config.devx || (priv->sh->cmng.counter_fallback &&
5307 !priv->sh->aso_age_mng))
5308 return rte_flow_error_set(error, ENOTSUP,
5309 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5311 "age action not supported");
5312 if (!(action->conf))
5313 return rte_flow_error_set(error, EINVAL,
5314 RTE_FLOW_ERROR_TYPE_ACTION, action,
5315 "configuration cannot be null");
5316 if (!(age->timeout))
5317 return rte_flow_error_set(error, EINVAL,
5318 RTE_FLOW_ERROR_TYPE_ACTION, action,
5319 "invalid timeout value 0");
5320 if (action_flags & MLX5_FLOW_ACTION_AGE)
5321 return rte_flow_error_set(error, EINVAL,
5322 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5323 "duplicate age actions set");
5328 * Validate the modify-header IPv4 DSCP actions.
5330 * @param[in] action_flags
5331 * Holds the actions detected until now.
5333 * Pointer to the modify action.
5334 * @param[in] item_flags
5335 * Holds the items detected.
5337 * Pointer to error structure.
5340 * 0 on success, a negative errno value otherwise and rte_errno is set.
5343 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
5344 const struct rte_flow_action *action,
5345 const uint64_t item_flags,
5346 struct rte_flow_error *error)
5350 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5352 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
5353 return rte_flow_error_set(error, EINVAL,
5354 RTE_FLOW_ERROR_TYPE_ACTION,
5356 "no ipv4 item in pattern");
5362 * Validate the modify-header IPv6 DSCP actions.
5364 * @param[in] action_flags
5365 * Holds the actions detected until now.
5367 * Pointer to the modify action.
5368 * @param[in] item_flags
5369 * Holds the items detected.
5371 * Pointer to error structure.
5374 * 0 on success, a negative errno value otherwise and rte_errno is set.
5377 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
5378 const struct rte_flow_action *action,
5379 const uint64_t item_flags,
5380 struct rte_flow_error *error)
5384 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5386 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
5387 return rte_flow_error_set(error, EINVAL,
5388 RTE_FLOW_ERROR_TYPE_ACTION,
5390 "no ipv6 item in pattern");
5396 flow_dv_modify_match_cb(void *tool_ctx __rte_unused,
5397 struct mlx5_list_entry *entry, void *cb_ctx)
5399 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5400 struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5401 struct mlx5_flow_dv_modify_hdr_resource *resource =
5402 container_of(entry, typeof(*resource), entry);
5403 uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5405 key_len += ref->actions_num * sizeof(ref->actions[0]);
5406 return ref->actions_num != resource->actions_num ||
5407 memcmp(&ref->ft_type, &resource->ft_type, key_len);
5410 static struct mlx5_indexed_pool *
5411 flow_dv_modify_ipool_get(struct mlx5_dev_ctx_shared *sh, uint8_t index)
5413 struct mlx5_indexed_pool *ipool = __atomic_load_n
5414 (&sh->mdh_ipools[index], __ATOMIC_SEQ_CST);
5417 struct mlx5_indexed_pool *expected = NULL;
5418 struct mlx5_indexed_pool_config cfg =
5419 (struct mlx5_indexed_pool_config) {
5420 .size = sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
5422 sizeof(struct mlx5_modification_cmd),
5427 .release_mem_en = !!sh->reclaim_mode,
5428 .per_core_cache = sh->reclaim_mode ? 0 : (1 << 16),
5429 .malloc = mlx5_malloc,
5431 .type = "mlx5_modify_action_resource",
5434 cfg.size = RTE_ALIGN(cfg.size, sizeof(ipool));
5435 ipool = mlx5_ipool_create(&cfg);
5438 if (!__atomic_compare_exchange_n(&sh->mdh_ipools[index],
5439 &expected, ipool, false,
5441 __ATOMIC_SEQ_CST)) {
5442 mlx5_ipool_destroy(ipool);
5443 ipool = __atomic_load_n(&sh->mdh_ipools[index],
5450 struct mlx5_list_entry *
5451 flow_dv_modify_create_cb(void *tool_ctx, void *cb_ctx)
5453 struct mlx5_dev_ctx_shared *sh = tool_ctx;
5454 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5455 struct mlx5dv_dr_domain *ns;
5456 struct mlx5_flow_dv_modify_hdr_resource *entry;
5457 struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5458 struct mlx5_indexed_pool *ipool = flow_dv_modify_ipool_get(sh,
5459 ref->actions_num - 1);
5461 uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5462 uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5465 if (unlikely(!ipool)) {
5466 rte_flow_error_set(ctx->error, ENOMEM,
5467 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5468 NULL, "cannot allocate modify ipool");
5471 entry = mlx5_ipool_zmalloc(ipool, &idx);
5473 rte_flow_error_set(ctx->error, ENOMEM,
5474 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5475 "cannot allocate resource memory");
5478 rte_memcpy(&entry->ft_type,
5479 RTE_PTR_ADD(ref, offsetof(typeof(*ref), ft_type)),
5480 key_len + data_len);
5481 if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
5482 ns = sh->fdb_domain;
5483 else if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
5487 ret = mlx5_flow_os_create_flow_action_modify_header
5488 (sh->ctx, ns, entry,
5489 data_len, &entry->action);
5491 mlx5_ipool_free(sh->mdh_ipools[ref->actions_num - 1], idx);
5492 rte_flow_error_set(ctx->error, ENOMEM,
5493 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5494 NULL, "cannot create modification action");
5498 return &entry->entry;
5501 struct mlx5_list_entry *
5502 flow_dv_modify_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
5505 struct mlx5_dev_ctx_shared *sh = tool_ctx;
5506 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5507 struct mlx5_flow_dv_modify_hdr_resource *entry;
5508 struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5509 uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5512 entry = mlx5_ipool_malloc(sh->mdh_ipools[ref->actions_num - 1],
5515 rte_flow_error_set(ctx->error, ENOMEM,
5516 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5517 "cannot allocate resource memory");
5520 memcpy(entry, oentry, sizeof(*entry) + data_len);
5522 return &entry->entry;
5526 flow_dv_modify_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
5528 struct mlx5_dev_ctx_shared *sh = tool_ctx;
5529 struct mlx5_flow_dv_modify_hdr_resource *res =
5530 container_of(entry, typeof(*res), entry);
5532 mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
5536 * Validate the sample action.
5538 * @param[in, out] action_flags
5539 * Holds the actions detected until now.
5541 * Pointer to the sample action.
5543 * Pointer to the Ethernet device structure.
5545 * Attributes of flow that includes this action.
5546 * @param[in] item_flags
5547 * Holds the items detected.
5549 * Pointer to the RSS action.
5550 * @param[out] sample_rss
5551 * Pointer to the RSS action in sample action list.
5553 * Pointer to the COUNT action in sample action list.
5554 * @param[out] fdb_mirror_limit
5555 * Pointer to the FDB mirror limitation flag.
5557 * Pointer to error structure.
5560 * 0 on success, a negative errno value otherwise and rte_errno is set.
5563 flow_dv_validate_action_sample(uint64_t *action_flags,
5564 const struct rte_flow_action *action,
5565 struct rte_eth_dev *dev,
5566 const struct rte_flow_attr *attr,
5567 uint64_t item_flags,
5568 const struct rte_flow_action_rss *rss,
5569 const struct rte_flow_action_rss **sample_rss,
5570 const struct rte_flow_action_count **count,
5571 int *fdb_mirror_limit,
5572 struct rte_flow_error *error)
5574 struct mlx5_priv *priv = dev->data->dev_private;
5575 struct mlx5_dev_config *dev_conf = &priv->config;
5576 const struct rte_flow_action_sample *sample = action->conf;
5577 const struct rte_flow_action *act;
5578 uint64_t sub_action_flags = 0;
5579 uint16_t queue_index = 0xFFFF;
5584 return rte_flow_error_set(error, EINVAL,
5585 RTE_FLOW_ERROR_TYPE_ACTION, action,
5586 "configuration cannot be NULL");
5587 if (sample->ratio == 0)
5588 return rte_flow_error_set(error, EINVAL,
5589 RTE_FLOW_ERROR_TYPE_ACTION, action,
5590 "ratio value starts from 1");
5591 if (!priv->config.devx || (sample->ratio > 0 && !priv->sampler_en))
5592 return rte_flow_error_set(error, ENOTSUP,
5593 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5595 "sample action not supported");
5596 if (*action_flags & MLX5_FLOW_ACTION_SAMPLE)
5597 return rte_flow_error_set(error, EINVAL,
5598 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5599 "Multiple sample actions not "
5601 if (*action_flags & MLX5_FLOW_ACTION_METER)
5602 return rte_flow_error_set(error, EINVAL,
5603 RTE_FLOW_ERROR_TYPE_ACTION, action,
5604 "wrong action order, meter should "
5605 "be after sample action");
5606 if (*action_flags & MLX5_FLOW_ACTION_JUMP)
5607 return rte_flow_error_set(error, EINVAL,
5608 RTE_FLOW_ERROR_TYPE_ACTION, action,
5609 "wrong action order, jump should "
5610 "be after sample action");
5611 act = sample->actions;
5612 for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
5613 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
5614 return rte_flow_error_set(error, ENOTSUP,
5615 RTE_FLOW_ERROR_TYPE_ACTION,
5616 act, "too many actions");
5617 switch (act->type) {
5618 case RTE_FLOW_ACTION_TYPE_QUEUE:
5619 ret = mlx5_flow_validate_action_queue(act,
5625 queue_index = ((const struct rte_flow_action_queue *)
5626 (act->conf))->index;
5627 sub_action_flags |= MLX5_FLOW_ACTION_QUEUE;
5630 case RTE_FLOW_ACTION_TYPE_RSS:
5631 *sample_rss = act->conf;
5632 ret = mlx5_flow_validate_action_rss(act,
5639 if (rss && *sample_rss &&
5640 ((*sample_rss)->level != rss->level ||
5641 (*sample_rss)->types != rss->types))
5642 return rte_flow_error_set(error, ENOTSUP,
5643 RTE_FLOW_ERROR_TYPE_ACTION,
5645 "Can't use the different RSS types "
5646 "or level in the same flow");
5647 if (*sample_rss != NULL && (*sample_rss)->queue_num)
5648 queue_index = (*sample_rss)->queue[0];
5649 sub_action_flags |= MLX5_FLOW_ACTION_RSS;
5652 case RTE_FLOW_ACTION_TYPE_MARK:
5653 ret = flow_dv_validate_action_mark(dev, act,
5658 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
5659 sub_action_flags |= MLX5_FLOW_ACTION_MARK |
5660 MLX5_FLOW_ACTION_MARK_EXT;
5662 sub_action_flags |= MLX5_FLOW_ACTION_MARK;
5665 case RTE_FLOW_ACTION_TYPE_COUNT:
5666 ret = flow_dv_validate_action_count
5667 (dev, is_shared_action_count(act),
5668 *action_flags | sub_action_flags,
5673 sub_action_flags |= MLX5_FLOW_ACTION_COUNT;
5674 *action_flags |= MLX5_FLOW_ACTION_COUNT;
5677 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5678 ret = flow_dv_validate_action_port_id(dev,
5685 sub_action_flags |= MLX5_FLOW_ACTION_PORT_ID;
5688 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5689 ret = flow_dv_validate_action_raw_encap_decap
5690 (dev, NULL, act->conf, attr, &sub_action_flags,
5691 &actions_n, action, item_flags, error);
5696 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5697 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5698 ret = flow_dv_validate_action_l2_encap(dev,
5704 sub_action_flags |= MLX5_FLOW_ACTION_ENCAP;
5708 return rte_flow_error_set(error, ENOTSUP,
5709 RTE_FLOW_ERROR_TYPE_ACTION,
5711 "Doesn't support optional "
5715 if (attr->ingress && !attr->transfer) {
5716 if (!(sub_action_flags & (MLX5_FLOW_ACTION_QUEUE |
5717 MLX5_FLOW_ACTION_RSS)))
5718 return rte_flow_error_set(error, EINVAL,
5719 RTE_FLOW_ERROR_TYPE_ACTION,
5721 "Ingress must has a dest "
5722 "QUEUE for Sample");
5723 } else if (attr->egress && !attr->transfer) {
5724 return rte_flow_error_set(error, ENOTSUP,
5725 RTE_FLOW_ERROR_TYPE_ACTION,
5727 "Sample Only support Ingress "
5729 } else if (sample->actions->type != RTE_FLOW_ACTION_TYPE_END) {
5730 MLX5_ASSERT(attr->transfer);
5731 if (sample->ratio > 1)
5732 return rte_flow_error_set(error, ENOTSUP,
5733 RTE_FLOW_ERROR_TYPE_ACTION,
5735 "E-Switch doesn't support "
5736 "any optional action "
5738 if (sub_action_flags & MLX5_FLOW_ACTION_QUEUE)
5739 return rte_flow_error_set(error, ENOTSUP,
5740 RTE_FLOW_ERROR_TYPE_ACTION,
5742 "unsupported action QUEUE");
5743 if (sub_action_flags & MLX5_FLOW_ACTION_RSS)
5744 return rte_flow_error_set(error, ENOTSUP,
5745 RTE_FLOW_ERROR_TYPE_ACTION,
5747 "unsupported action QUEUE");
5748 if (!(sub_action_flags & MLX5_FLOW_ACTION_PORT_ID))
5749 return rte_flow_error_set(error, EINVAL,
5750 RTE_FLOW_ERROR_TYPE_ACTION,
5752 "E-Switch must has a dest "
5753 "port for mirroring");
5754 if (!priv->config.hca_attr.reg_c_preserve &&
5755 priv->representor_id != UINT16_MAX)
5756 *fdb_mirror_limit = 1;
5758 /* Continue validation for Xcap actions.*/
5759 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) &&
5760 (queue_index == 0xFFFF ||
5761 mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
5762 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5763 MLX5_FLOW_XCAP_ACTIONS)
5764 return rte_flow_error_set(error, ENOTSUP,
5765 RTE_FLOW_ERROR_TYPE_ACTION,
5766 NULL, "encap and decap "
5767 "combination aren't "
5769 if (!attr->transfer && attr->ingress && (sub_action_flags &
5770 MLX5_FLOW_ACTION_ENCAP))
5771 return rte_flow_error_set(error, ENOTSUP,
5772 RTE_FLOW_ERROR_TYPE_ACTION,
5773 NULL, "encap is not supported"
5774 " for ingress traffic");
5780 * Find existing modify-header resource or create and register a new one.
5782 * @param dev[in, out]
5783 * Pointer to rte_eth_dev structure.
5784 * @param[in, out] resource
5785 * Pointer to modify-header resource.
5786 * @parm[in, out] dev_flow
5787 * Pointer to the dev_flow.
5789 * pointer to error structure.
5792 * 0 on success otherwise -errno and errno is set.
5795 flow_dv_modify_hdr_resource_register
5796 (struct rte_eth_dev *dev,
5797 struct mlx5_flow_dv_modify_hdr_resource *resource,
5798 struct mlx5_flow *dev_flow,
5799 struct rte_flow_error *error)
5801 struct mlx5_priv *priv = dev->data->dev_private;
5802 struct mlx5_dev_ctx_shared *sh = priv->sh;
5803 uint32_t key_len = sizeof(*resource) -
5804 offsetof(typeof(*resource), ft_type) +
5805 resource->actions_num * sizeof(resource->actions[0]);
5806 struct mlx5_list_entry *entry;
5807 struct mlx5_flow_cb_ctx ctx = {
5811 struct mlx5_hlist *modify_cmds;
5814 modify_cmds = flow_dv_hlist_prepare(sh, &sh->modify_cmds,
5816 MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
5818 flow_dv_modify_create_cb,
5819 flow_dv_modify_match_cb,
5820 flow_dv_modify_remove_cb,
5821 flow_dv_modify_clone_cb,
5822 flow_dv_modify_clone_free_cb);
5823 if (unlikely(!modify_cmds))
5825 resource->root = !dev_flow->dv.group;
5826 if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
5828 return rte_flow_error_set(error, EOVERFLOW,
5829 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5830 "too many modify header items");
5831 key64 = __rte_raw_cksum(&resource->ft_type, key_len, 0);
5832 entry = mlx5_hlist_register(modify_cmds, key64, &ctx);
5835 resource = container_of(entry, typeof(*resource), entry);
5836 dev_flow->handle->dvh.modify_hdr = resource;
5841 * Get DV flow counter by index.
5844 * Pointer to the Ethernet device structure.
5846 * mlx5 flow counter index in the container.
5848 * mlx5 flow counter pool in the container.
5851 * Pointer to the counter, NULL otherwise.
5853 static struct mlx5_flow_counter *
5854 flow_dv_counter_get_by_idx(struct rte_eth_dev *dev,
5856 struct mlx5_flow_counter_pool **ppool)
5858 struct mlx5_priv *priv = dev->data->dev_private;
5859 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5860 struct mlx5_flow_counter_pool *pool;
5862 /* Decrease to original index and clear shared bit. */
5863 idx = (idx - 1) & (MLX5_CNT_SHARED_OFFSET - 1);
5864 MLX5_ASSERT(idx / MLX5_COUNTERS_PER_POOL < cmng->n);
5865 pool = cmng->pools[idx / MLX5_COUNTERS_PER_POOL];
5869 return MLX5_POOL_GET_CNT(pool, idx % MLX5_COUNTERS_PER_POOL);
5873 * Check the devx counter belongs to the pool.
5876 * Pointer to the counter pool.
5878 * The counter devx ID.
5881 * True if counter belongs to the pool, false otherwise.
5884 flow_dv_is_counter_in_pool(struct mlx5_flow_counter_pool *pool, int id)
5886 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
5887 MLX5_COUNTERS_PER_POOL;
5889 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
5895 * Get a pool by devx counter ID.
5898 * Pointer to the counter management.
5900 * The counter devx ID.
5903 * The counter pool pointer if exists, NULL otherwise,
5905 static struct mlx5_flow_counter_pool *
5906 flow_dv_find_pool_by_id(struct mlx5_flow_counter_mng *cmng, int id)
5909 struct mlx5_flow_counter_pool *pool = NULL;
5911 rte_spinlock_lock(&cmng->pool_update_sl);
5912 /* Check last used pool. */
5913 if (cmng->last_pool_idx != POOL_IDX_INVALID &&
5914 flow_dv_is_counter_in_pool(cmng->pools[cmng->last_pool_idx], id)) {
5915 pool = cmng->pools[cmng->last_pool_idx];
5918 /* ID out of range means no suitable pool in the container. */
5919 if (id > cmng->max_id || id < cmng->min_id)
5922 * Find the pool from the end of the container, since mostly counter
5923 * ID is sequence increasing, and the last pool should be the needed
5928 struct mlx5_flow_counter_pool *pool_tmp = cmng->pools[i];
5930 if (flow_dv_is_counter_in_pool(pool_tmp, id)) {
5936 rte_spinlock_unlock(&cmng->pool_update_sl);
5941 * Resize a counter container.
5944 * Pointer to the Ethernet device structure.
5947 * 0 on success, otherwise negative errno value and rte_errno is set.
5950 flow_dv_container_resize(struct rte_eth_dev *dev)
5952 struct mlx5_priv *priv = dev->data->dev_private;
5953 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5954 void *old_pools = cmng->pools;
5955 uint32_t resize = cmng->n + MLX5_CNT_CONTAINER_RESIZE;
5956 uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
5957 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
5964 memcpy(pools, old_pools, cmng->n *
5965 sizeof(struct mlx5_flow_counter_pool *));
5967 cmng->pools = pools;
5969 mlx5_free(old_pools);
5974 * Query a devx flow counter.
5977 * Pointer to the Ethernet device structure.
5978 * @param[in] counter
5979 * Index to the flow counter.
5981 * The statistics value of packets.
5983 * The statistics value of bytes.
5986 * 0 on success, otherwise a negative errno value and rte_errno is set.
5989 _flow_dv_query_count(struct rte_eth_dev *dev, uint32_t counter, uint64_t *pkts,
5992 struct mlx5_priv *priv = dev->data->dev_private;
5993 struct mlx5_flow_counter_pool *pool = NULL;
5994 struct mlx5_flow_counter *cnt;
5997 cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
5999 if (priv->sh->cmng.counter_fallback)
6000 return mlx5_devx_cmd_flow_counter_query(cnt->dcs_when_active, 0,
6001 0, pkts, bytes, 0, NULL, NULL, 0);
6002 rte_spinlock_lock(&pool->sl);
6007 offset = MLX5_CNT_ARRAY_IDX(pool, cnt);
6008 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
6009 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
6011 rte_spinlock_unlock(&pool->sl);
6016 * Create and initialize a new counter pool.
6019 * Pointer to the Ethernet device structure.
6021 * The devX counter handle.
6023 * Whether the pool is for counter that was allocated for aging.
6024 * @param[in/out] cont_cur
6025 * Pointer to the container pointer, it will be update in pool resize.
6028 * The pool container pointer on success, NULL otherwise and rte_errno is set.
6030 static struct mlx5_flow_counter_pool *
6031 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
6034 struct mlx5_priv *priv = dev->data->dev_private;
6035 struct mlx5_flow_counter_pool *pool;
6036 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6037 bool fallback = priv->sh->cmng.counter_fallback;
6038 uint32_t size = sizeof(*pool);
6040 size += MLX5_COUNTERS_PER_POOL * MLX5_CNT_SIZE;
6041 size += (!age ? 0 : MLX5_COUNTERS_PER_POOL * MLX5_AGE_SIZE);
6042 pool = mlx5_malloc(MLX5_MEM_ZERO, size, 0, SOCKET_ID_ANY);
6048 pool->is_aged = !!age;
6049 pool->query_gen = 0;
6050 pool->min_dcs = dcs;
6051 rte_spinlock_init(&pool->sl);
6052 rte_spinlock_init(&pool->csl);
6053 TAILQ_INIT(&pool->counters[0]);
6054 TAILQ_INIT(&pool->counters[1]);
6055 pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
6056 rte_spinlock_lock(&cmng->pool_update_sl);
6057 pool->index = cmng->n_valid;
6058 if (pool->index == cmng->n && flow_dv_container_resize(dev)) {
6060 rte_spinlock_unlock(&cmng->pool_update_sl);
6063 cmng->pools[pool->index] = pool;
6065 if (unlikely(fallback)) {
6066 int base = RTE_ALIGN_FLOOR(dcs->id, MLX5_COUNTERS_PER_POOL);
6068 if (base < cmng->min_id)
6069 cmng->min_id = base;
6070 if (base > cmng->max_id)
6071 cmng->max_id = base + MLX5_COUNTERS_PER_POOL - 1;
6072 cmng->last_pool_idx = pool->index;
6074 rte_spinlock_unlock(&cmng->pool_update_sl);
6079 * Prepare a new counter and/or a new counter pool.
6082 * Pointer to the Ethernet device structure.
6083 * @param[out] cnt_free
6084 * Where to put the pointer of a new counter.
6086 * Whether the pool is for counter that was allocated for aging.
6089 * The counter pool pointer and @p cnt_free is set on success,
6090 * NULL otherwise and rte_errno is set.
6092 static struct mlx5_flow_counter_pool *
6093 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
6094 struct mlx5_flow_counter **cnt_free,
6097 struct mlx5_priv *priv = dev->data->dev_private;
6098 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6099 struct mlx5_flow_counter_pool *pool;
6100 struct mlx5_counters tmp_tq;
6101 struct mlx5_devx_obj *dcs = NULL;
6102 struct mlx5_flow_counter *cnt;
6103 enum mlx5_counter_type cnt_type =
6104 age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6105 bool fallback = priv->sh->cmng.counter_fallback;
6109 /* bulk_bitmap must be 0 for single counter allocation. */
6110 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
6113 pool = flow_dv_find_pool_by_id(cmng, dcs->id);
6115 pool = flow_dv_pool_create(dev, dcs, age);
6117 mlx5_devx_cmd_destroy(dcs);
6121 i = dcs->id % MLX5_COUNTERS_PER_POOL;
6122 cnt = MLX5_POOL_GET_CNT(pool, i);
6124 cnt->dcs_when_free = dcs;
6128 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
6130 rte_errno = ENODATA;
6133 pool = flow_dv_pool_create(dev, dcs, age);
6135 mlx5_devx_cmd_destroy(dcs);
6138 TAILQ_INIT(&tmp_tq);
6139 for (i = 1; i < MLX5_COUNTERS_PER_POOL; ++i) {
6140 cnt = MLX5_POOL_GET_CNT(pool, i);
6142 TAILQ_INSERT_HEAD(&tmp_tq, cnt, next);
6144 rte_spinlock_lock(&cmng->csl[cnt_type]);
6145 TAILQ_CONCAT(&cmng->counters[cnt_type], &tmp_tq, next);
6146 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6147 *cnt_free = MLX5_POOL_GET_CNT(pool, 0);
6148 (*cnt_free)->pool = pool;
6153 * Allocate a flow counter.
6156 * Pointer to the Ethernet device structure.
6158 * Whether the counter was allocated for aging.
6161 * Index to flow counter on success, 0 otherwise and rte_errno is set.
6164 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t age)
6166 struct mlx5_priv *priv = dev->data->dev_private;
6167 struct mlx5_flow_counter_pool *pool = NULL;
6168 struct mlx5_flow_counter *cnt_free = NULL;
6169 bool fallback = priv->sh->cmng.counter_fallback;
6170 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6171 enum mlx5_counter_type cnt_type =
6172 age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6175 if (!priv->config.devx) {
6176 rte_errno = ENOTSUP;
6179 /* Get free counters from container. */
6180 rte_spinlock_lock(&cmng->csl[cnt_type]);
6181 cnt_free = TAILQ_FIRST(&cmng->counters[cnt_type]);
6183 TAILQ_REMOVE(&cmng->counters[cnt_type], cnt_free, next);
6184 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6185 if (!cnt_free && !flow_dv_counter_pool_prepare(dev, &cnt_free, age))
6187 pool = cnt_free->pool;
6189 cnt_free->dcs_when_active = cnt_free->dcs_when_free;
6190 /* Create a DV counter action only in the first time usage. */
6191 if (!cnt_free->action) {
6193 struct mlx5_devx_obj *dcs;
6197 offset = MLX5_CNT_ARRAY_IDX(pool, cnt_free);
6198 dcs = pool->min_dcs;
6201 dcs = cnt_free->dcs_when_free;
6203 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, offset,
6210 cnt_idx = MLX5_MAKE_CNT_IDX(pool->index,
6211 MLX5_CNT_ARRAY_IDX(pool, cnt_free));
6212 /* Update the counter reset values. */
6213 if (_flow_dv_query_count(dev, cnt_idx, &cnt_free->hits,
6216 if (!fallback && !priv->sh->cmng.query_thread_on)
6217 /* Start the asynchronous batch query by the host thread. */
6218 mlx5_set_query_alarm(priv->sh);
6220 * When the count action isn't shared (by ID), shared_info field is
6221 * used for indirect action API's refcnt.
6222 * When the counter action is not shared neither by ID nor by indirect
6223 * action API, shared info must be 1.
6225 cnt_free->shared_info.refcnt = 1;
6229 cnt_free->pool = pool;
6231 cnt_free->dcs_when_free = cnt_free->dcs_when_active;
6232 rte_spinlock_lock(&cmng->csl[cnt_type]);
6233 TAILQ_INSERT_TAIL(&cmng->counters[cnt_type], cnt_free, next);
6234 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6240 * Allocate a shared flow counter.
6243 * Pointer to the shared counter configuration.
6245 * Pointer to save the allocated counter index.
6248 * Index to flow counter on success, 0 otherwise and rte_errno is set.
6252 flow_dv_counter_alloc_shared_cb(void *ctx, union mlx5_l3t_data *data)
6254 struct mlx5_shared_counter_conf *conf = ctx;
6255 struct rte_eth_dev *dev = conf->dev;
6256 struct mlx5_flow_counter *cnt;
6258 data->dword = flow_dv_counter_alloc(dev, 0);
6259 data->dword |= MLX5_CNT_SHARED_OFFSET;
6260 cnt = flow_dv_counter_get_by_idx(dev, data->dword, NULL);
6261 cnt->shared_info.id = conf->id;
6266 * Get a shared flow counter.
6269 * Pointer to the Ethernet device structure.
6271 * Counter identifier.
6274 * Index to flow counter on success, 0 otherwise and rte_errno is set.
6277 flow_dv_counter_get_shared(struct rte_eth_dev *dev, uint32_t id)
6279 struct mlx5_priv *priv = dev->data->dev_private;
6280 struct mlx5_shared_counter_conf conf = {
6284 union mlx5_l3t_data data = {
6288 mlx5_l3t_prepare_entry(priv->sh->cnt_id_tbl, id, &data,
6289 flow_dv_counter_alloc_shared_cb, &conf);
6294 * Get age param from counter index.
6297 * Pointer to the Ethernet device structure.
6298 * @param[in] counter
6299 * Index to the counter handler.
6302 * The aging parameter specified for the counter index.
6304 static struct mlx5_age_param*
6305 flow_dv_counter_idx_get_age(struct rte_eth_dev *dev,
6308 struct mlx5_flow_counter *cnt;
6309 struct mlx5_flow_counter_pool *pool = NULL;
6311 flow_dv_counter_get_by_idx(dev, counter, &pool);
6312 counter = (counter - 1) % MLX5_COUNTERS_PER_POOL;
6313 cnt = MLX5_POOL_GET_CNT(pool, counter);
6314 return MLX5_CNT_TO_AGE(cnt);
6318 * Remove a flow counter from aged counter list.
6321 * Pointer to the Ethernet device structure.
6322 * @param[in] counter
6323 * Index to the counter handler.
6325 * Pointer to the counter handler.
6328 flow_dv_counter_remove_from_age(struct rte_eth_dev *dev,
6329 uint32_t counter, struct mlx5_flow_counter *cnt)
6331 struct mlx5_age_info *age_info;
6332 struct mlx5_age_param *age_param;
6333 struct mlx5_priv *priv = dev->data->dev_private;
6334 uint16_t expected = AGE_CANDIDATE;
6336 age_info = GET_PORT_AGE_INFO(priv);
6337 age_param = flow_dv_counter_idx_get_age(dev, counter);
6338 if (!__atomic_compare_exchange_n(&age_param->state, &expected,
6339 AGE_FREE, false, __ATOMIC_RELAXED,
6340 __ATOMIC_RELAXED)) {
6342 * We need the lock even it is age timeout,
6343 * since counter may still in process.
6345 rte_spinlock_lock(&age_info->aged_sl);
6346 TAILQ_REMOVE(&age_info->aged_counters, cnt, next);
6347 rte_spinlock_unlock(&age_info->aged_sl);
6348 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
6353 * Release a flow counter.
6356 * Pointer to the Ethernet device structure.
6357 * @param[in] counter
6358 * Index to the counter handler.
6361 flow_dv_counter_free(struct rte_eth_dev *dev, uint32_t counter)
6363 struct mlx5_priv *priv = dev->data->dev_private;
6364 struct mlx5_flow_counter_pool *pool = NULL;
6365 struct mlx5_flow_counter *cnt;
6366 enum mlx5_counter_type cnt_type;
6370 cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
6372 if (pool->is_aged) {
6373 flow_dv_counter_remove_from_age(dev, counter, cnt);
6376 * If the counter action is shared by ID, the l3t_clear_entry
6377 * function reduces its references counter. If after the
6378 * reduction the action is still referenced, the function
6379 * returns here and does not release it.
6381 if (IS_LEGACY_SHARED_CNT(counter) &&
6382 mlx5_l3t_clear_entry(priv->sh->cnt_id_tbl,
6383 cnt->shared_info.id))
6386 * If the counter action is shared by indirect action API,
6387 * the atomic function reduces its references counter.
6388 * If after the reduction the action is still referenced, the
6389 * function returns here and does not release it.
6390 * When the counter action is not shared neither by ID nor by
6391 * indirect action API, shared info is 1 before the reduction,
6392 * so this condition is failed and function doesn't return here.
6394 if (!IS_LEGACY_SHARED_CNT(counter) &&
6395 __atomic_sub_fetch(&cnt->shared_info.refcnt, 1,
6401 * Put the counter back to list to be updated in none fallback mode.
6402 * Currently, we are using two list alternately, while one is in query,
6403 * add the freed counter to the other list based on the pool query_gen
6404 * value. After query finishes, add counter the list to the global
6405 * container counter list. The list changes while query starts. In
6406 * this case, lock will not be needed as query callback and release
6407 * function both operate with the different list.
6409 if (!priv->sh->cmng.counter_fallback) {
6410 rte_spinlock_lock(&pool->csl);
6411 TAILQ_INSERT_TAIL(&pool->counters[pool->query_gen], cnt, next);
6412 rte_spinlock_unlock(&pool->csl);
6414 cnt->dcs_when_free = cnt->dcs_when_active;
6415 cnt_type = pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6416 MLX5_COUNTER_TYPE_ORIGIN;
6417 rte_spinlock_lock(&priv->sh->cmng.csl[cnt_type]);
6418 TAILQ_INSERT_TAIL(&priv->sh->cmng.counters[cnt_type],
6420 rte_spinlock_unlock(&priv->sh->cmng.csl[cnt_type]);
6425 * Resize a meter id container.
6428 * Pointer to the Ethernet device structure.
6431 * 0 on success, otherwise negative errno value and rte_errno is set.
6434 flow_dv_mtr_container_resize(struct rte_eth_dev *dev)
6436 struct mlx5_priv *priv = dev->data->dev_private;
6437 struct mlx5_aso_mtr_pools_mng *pools_mng =
6438 &priv->sh->mtrmng->pools_mng;
6439 void *old_pools = pools_mng->pools;
6440 uint32_t resize = pools_mng->n + MLX5_MTRS_CONTAINER_RESIZE;
6441 uint32_t mem_size = sizeof(struct mlx5_aso_mtr_pool *) * resize;
6442 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
6449 if (mlx5_aso_queue_init(priv->sh, ASO_OPC_MOD_POLICER)) {
6454 memcpy(pools, old_pools, pools_mng->n *
6455 sizeof(struct mlx5_aso_mtr_pool *));
6456 pools_mng->n = resize;
6457 pools_mng->pools = pools;
6459 mlx5_free(old_pools);
6464 * Prepare a new meter and/or a new meter pool.
6467 * Pointer to the Ethernet device structure.
6468 * @param[out] mtr_free
6469 * Where to put the pointer of a new meter.g.
6472 * The meter pool pointer and @mtr_free is set on success,
6473 * NULL otherwise and rte_errno is set.
6475 static struct mlx5_aso_mtr_pool *
6476 flow_dv_mtr_pool_create(struct rte_eth_dev *dev,
6477 struct mlx5_aso_mtr **mtr_free)
6479 struct mlx5_priv *priv = dev->data->dev_private;
6480 struct mlx5_aso_mtr_pools_mng *pools_mng =
6481 &priv->sh->mtrmng->pools_mng;
6482 struct mlx5_aso_mtr_pool *pool = NULL;
6483 struct mlx5_devx_obj *dcs = NULL;
6485 uint32_t log_obj_size;
6487 log_obj_size = rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
6488 dcs = mlx5_devx_cmd_create_flow_meter_aso_obj(priv->sh->ctx,
6489 priv->sh->pdn, log_obj_size);
6491 rte_errno = ENODATA;
6494 pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
6497 claim_zero(mlx5_devx_cmd_destroy(dcs));
6500 pool->devx_obj = dcs;
6501 pool->index = pools_mng->n_valid;
6502 if (pool->index == pools_mng->n && flow_dv_mtr_container_resize(dev)) {
6504 claim_zero(mlx5_devx_cmd_destroy(dcs));
6507 pools_mng->pools[pool->index] = pool;
6508 pools_mng->n_valid++;
6509 for (i = 1; i < MLX5_ASO_MTRS_PER_POOL; ++i) {
6510 pool->mtrs[i].offset = i;
6511 LIST_INSERT_HEAD(&pools_mng->meters,
6512 &pool->mtrs[i], next);
6514 pool->mtrs[0].offset = 0;
6515 *mtr_free = &pool->mtrs[0];
6520 * Release a flow meter into pool.
6523 * Pointer to the Ethernet device structure.
6524 * @param[in] mtr_idx
6525 * Index to aso flow meter.
6528 flow_dv_aso_mtr_release_to_pool(struct rte_eth_dev *dev, uint32_t mtr_idx)
6530 struct mlx5_priv *priv = dev->data->dev_private;
6531 struct mlx5_aso_mtr_pools_mng *pools_mng =
6532 &priv->sh->mtrmng->pools_mng;
6533 struct mlx5_aso_mtr *aso_mtr = mlx5_aso_meter_by_idx(priv, mtr_idx);
6535 MLX5_ASSERT(aso_mtr);
6536 rte_spinlock_lock(&pools_mng->mtrsl);
6537 memset(&aso_mtr->fm, 0, sizeof(struct mlx5_flow_meter_info));
6538 aso_mtr->state = ASO_METER_FREE;
6539 LIST_INSERT_HEAD(&pools_mng->meters, aso_mtr, next);
6540 rte_spinlock_unlock(&pools_mng->mtrsl);
6544 * Allocate a aso flow meter.
6547 * Pointer to the Ethernet device structure.
6550 * Index to aso flow meter on success, 0 otherwise and rte_errno is set.
6553 flow_dv_mtr_alloc(struct rte_eth_dev *dev)
6555 struct mlx5_priv *priv = dev->data->dev_private;
6556 struct mlx5_aso_mtr *mtr_free = NULL;
6557 struct mlx5_aso_mtr_pools_mng *pools_mng =
6558 &priv->sh->mtrmng->pools_mng;
6559 struct mlx5_aso_mtr_pool *pool;
6560 uint32_t mtr_idx = 0;
6562 if (!priv->config.devx) {
6563 rte_errno = ENOTSUP;
6566 /* Allocate the flow meter memory. */
6567 /* Get free meters from management. */
6568 rte_spinlock_lock(&pools_mng->mtrsl);
6569 mtr_free = LIST_FIRST(&pools_mng->meters);
6571 LIST_REMOVE(mtr_free, next);
6572 if (!mtr_free && !flow_dv_mtr_pool_create(dev, &mtr_free)) {
6573 rte_spinlock_unlock(&pools_mng->mtrsl);
6576 mtr_free->state = ASO_METER_WAIT;
6577 rte_spinlock_unlock(&pools_mng->mtrsl);
6578 pool = container_of(mtr_free,
6579 struct mlx5_aso_mtr_pool,
6580 mtrs[mtr_free->offset]);
6581 mtr_idx = MLX5_MAKE_MTR_IDX(pool->index, mtr_free->offset);
6582 if (!mtr_free->fm.meter_action) {
6583 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
6584 struct rte_flow_error error;
6587 reg_id = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &error);
6588 mtr_free->fm.meter_action =
6589 mlx5_glue->dv_create_flow_action_aso
6590 (priv->sh->rx_domain,
6591 pool->devx_obj->obj,
6593 (1 << MLX5_FLOW_COLOR_GREEN),
6595 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
6596 if (!mtr_free->fm.meter_action) {
6597 flow_dv_aso_mtr_release_to_pool(dev, mtr_idx);
6605 * Verify the @p attributes will be correctly understood by the NIC and store
6606 * them in the @p flow if everything is correct.
6609 * Pointer to dev struct.
6610 * @param[in] attributes
6611 * Pointer to flow attributes
6612 * @param[in] external
6613 * This flow rule is created by request external to PMD.
6615 * Pointer to error structure.
6618 * - 0 on success and non root table.
6619 * - 1 on success and root table.
6620 * - a negative errno value otherwise and rte_errno is set.
6623 flow_dv_validate_attributes(struct rte_eth_dev *dev,
6624 const struct mlx5_flow_tunnel *tunnel,
6625 const struct rte_flow_attr *attributes,
6626 const struct flow_grp_info *grp_info,
6627 struct rte_flow_error *error)
6629 struct mlx5_priv *priv = dev->data->dev_private;
6630 uint32_t lowest_priority = mlx5_get_lowest_priority(dev, attributes);
6633 #ifndef HAVE_MLX5DV_DR
6634 RTE_SET_USED(tunnel);
6635 RTE_SET_USED(grp_info);
6636 if (attributes->group)
6637 return rte_flow_error_set(error, ENOTSUP,
6638 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6640 "groups are not supported");
6644 ret = mlx5_flow_group_to_table(dev, tunnel, attributes->group, &table,
6649 ret = MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
6651 if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
6652 attributes->priority > lowest_priority)
6653 return rte_flow_error_set(error, ENOTSUP,
6654 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
6656 "priority out of range");
6657 if (attributes->transfer) {
6658 if (!priv->config.dv_esw_en)
6659 return rte_flow_error_set
6661 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6662 "E-Switch dr is not supported");
6663 if (!(priv->representor || priv->master))
6664 return rte_flow_error_set
6665 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6666 NULL, "E-Switch configuration can only be"
6667 " done by a master or a representor device");
6668 if (attributes->egress)
6669 return rte_flow_error_set
6671 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
6672 "egress is not supported");
6674 if (!(attributes->egress ^ attributes->ingress))
6675 return rte_flow_error_set(error, ENOTSUP,
6676 RTE_FLOW_ERROR_TYPE_ATTR, NULL,
6677 "must specify exactly one of "
6678 "ingress or egress");
6683 mlx5_flow_locate_proto_l3(const struct rte_flow_item **head,
6684 const struct rte_flow_item *end)
6686 const struct rte_flow_item *item = *head;
6687 uint16_t l3_protocol;
6689 for (; item != end; item++) {
6690 switch (item->type) {
6693 case RTE_FLOW_ITEM_TYPE_IPV4:
6694 l3_protocol = RTE_ETHER_TYPE_IPV4;
6696 case RTE_FLOW_ITEM_TYPE_IPV6:
6697 l3_protocol = RTE_ETHER_TYPE_IPV6;
6699 case RTE_FLOW_ITEM_TYPE_ETH:
6700 if (item->mask && item->spec) {
6701 MLX5_ETHER_TYPE_FROM_HEADER(rte_flow_item_eth,
6704 if (l3_protocol == RTE_ETHER_TYPE_IPV4 ||
6705 l3_protocol == RTE_ETHER_TYPE_IPV6)
6709 case RTE_FLOW_ITEM_TYPE_VLAN:
6710 if (item->mask && item->spec) {
6711 MLX5_ETHER_TYPE_FROM_HEADER(rte_flow_item_vlan,
6714 if (l3_protocol == RTE_ETHER_TYPE_IPV4 ||
6715 l3_protocol == RTE_ETHER_TYPE_IPV6)
6728 mlx5_flow_locate_proto_l4(const struct rte_flow_item **head,
6729 const struct rte_flow_item *end)
6731 const struct rte_flow_item *item = *head;
6732 uint8_t l4_protocol;
6734 for (; item != end; item++) {
6735 switch (item->type) {
6738 case RTE_FLOW_ITEM_TYPE_TCP:
6739 l4_protocol = IPPROTO_TCP;
6741 case RTE_FLOW_ITEM_TYPE_UDP:
6742 l4_protocol = IPPROTO_UDP;
6744 case RTE_FLOW_ITEM_TYPE_IPV4:
6745 if (item->mask && item->spec) {
6746 const struct rte_flow_item_ipv4 *mask, *spec;
6748 mask = (typeof(mask))item->mask;
6749 spec = (typeof(spec))item->spec;
6750 l4_protocol = mask->hdr.next_proto_id &
6751 spec->hdr.next_proto_id;
6752 if (l4_protocol == IPPROTO_TCP ||
6753 l4_protocol == IPPROTO_UDP)
6757 case RTE_FLOW_ITEM_TYPE_IPV6:
6758 if (item->mask && item->spec) {
6759 const struct rte_flow_item_ipv6 *mask, *spec;
6760 mask = (typeof(mask))item->mask;
6761 spec = (typeof(spec))item->spec;
6762 l4_protocol = mask->hdr.proto & spec->hdr.proto;
6763 if (l4_protocol == IPPROTO_TCP ||
6764 l4_protocol == IPPROTO_UDP)
6777 flow_dv_validate_item_integrity(struct rte_eth_dev *dev,
6778 const struct rte_flow_item *rule_items,
6779 const struct rte_flow_item *integrity_item,
6780 struct rte_flow_error *error)
6782 struct mlx5_priv *priv = dev->data->dev_private;
6783 const struct rte_flow_item *tunnel_item, *end_item, *item = rule_items;
6784 const struct rte_flow_item_integrity *mask = (typeof(mask))
6785 integrity_item->mask;
6786 const struct rte_flow_item_integrity *spec = (typeof(spec))
6787 integrity_item->spec;
6790 if (!priv->config.hca_attr.pkt_integrity_match)
6791 return rte_flow_error_set(error, ENOTSUP,
6792 RTE_FLOW_ERROR_TYPE_ITEM,
6794 "packet integrity integrity_item not supported");
6796 mask = &rte_flow_item_integrity_mask;
6797 if (!mlx5_validate_integrity_item(mask))
6798 return rte_flow_error_set(error, ENOTSUP,
6799 RTE_FLOW_ERROR_TYPE_ITEM,
6801 "unsupported integrity filter");
6802 tunnel_item = mlx5_flow_find_tunnel_item(rule_items);
6803 if (spec->level > 1) {
6805 return rte_flow_error_set(error, ENOTSUP,
6806 RTE_FLOW_ERROR_TYPE_ITEM,
6808 "missing tunnel item");
6810 end_item = mlx5_find_end_item(tunnel_item);
6812 end_item = tunnel_item ? tunnel_item :
6813 mlx5_find_end_item(integrity_item);
6815 if (mask->l3_ok || mask->ipv4_csum_ok) {
6816 protocol = mlx5_flow_locate_proto_l3(&item, end_item);
6818 return rte_flow_error_set(error, EINVAL,
6819 RTE_FLOW_ERROR_TYPE_ITEM,
6821 "missing L3 protocol");
6823 if (mask->l4_ok || mask->l4_csum_ok) {
6824 protocol = mlx5_flow_locate_proto_l4(&item, end_item);
6826 return rte_flow_error_set(error, EINVAL,
6827 RTE_FLOW_ERROR_TYPE_ITEM,
6829 "missing L4 protocol");
6835 * Internal validation function. For validating both actions and items.
6838 * Pointer to the rte_eth_dev structure.
6840 * Pointer to the flow attributes.
6842 * Pointer to the list of items.
6843 * @param[in] actions
6844 * Pointer to the list of actions.
6845 * @param[in] external
6846 * This flow rule is created by request external to PMD.
6847 * @param[in] hairpin
6848 * Number of hairpin TX actions, 0 means classic flow.
6850 * Pointer to the error structure.
6853 * 0 on success, a negative errno value otherwise and rte_errno is set.
6856 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
6857 const struct rte_flow_item items[],
6858 const struct rte_flow_action actions[],
6859 bool external, int hairpin, struct rte_flow_error *error)
6862 uint64_t action_flags = 0;
6863 uint64_t item_flags = 0;
6864 uint64_t last_item = 0;
6865 uint8_t next_protocol = 0xff;
6866 uint16_t ether_type = 0;
6868 uint8_t item_ipv6_proto = 0;
6869 int fdb_mirror_limit = 0;
6870 int modify_after_mirror = 0;
6871 const struct rte_flow_item *geneve_item = NULL;
6872 const struct rte_flow_item *gre_item = NULL;
6873 const struct rte_flow_item *gtp_item = NULL;
6874 const struct rte_flow_action_raw_decap *decap;
6875 const struct rte_flow_action_raw_encap *encap;
6876 const struct rte_flow_action_rss *rss = NULL;
6877 const struct rte_flow_action_rss *sample_rss = NULL;
6878 const struct rte_flow_action_count *sample_count = NULL;
6879 const struct rte_flow_item_tcp nic_tcp_mask = {
6882 .src_port = RTE_BE16(UINT16_MAX),
6883 .dst_port = RTE_BE16(UINT16_MAX),
6886 const struct rte_flow_item_ipv6 nic_ipv6_mask = {
6889 "\xff\xff\xff\xff\xff\xff\xff\xff"
6890 "\xff\xff\xff\xff\xff\xff\xff\xff",
6892 "\xff\xff\xff\xff\xff\xff\xff\xff"
6893 "\xff\xff\xff\xff\xff\xff\xff\xff",
6894 .vtc_flow = RTE_BE32(0xffffffff),
6900 const struct rte_flow_item_ecpri nic_ecpri_mask = {
6904 RTE_BE32(((const struct rte_ecpri_common_hdr) {
6908 .dummy[0] = 0xffffffff,
6911 struct mlx5_priv *priv = dev->data->dev_private;
6912 struct mlx5_dev_config *dev_conf = &priv->config;
6913 uint16_t queue_index = 0xFFFF;
6914 const struct rte_flow_item_vlan *vlan_m = NULL;
6915 uint32_t rw_act_num = 0;
6917 const struct mlx5_flow_tunnel *tunnel;
6918 enum mlx5_tof_rule_type tof_rule_type;
6919 struct flow_grp_info grp_info = {
6920 .external = !!external,
6921 .transfer = !!attr->transfer,
6922 .fdb_def_rule = !!priv->fdb_def_rule,
6923 .std_tbl_fix = true,
6925 const struct rte_eth_hairpin_conf *conf;
6926 const struct rte_flow_item *rule_items = items;
6927 const struct rte_flow_item *port_id_item = NULL;
6928 bool def_policy = false;
6929 uint16_t udp_dport = 0;
6933 tunnel = is_tunnel_offload_active(dev) ?
6934 mlx5_get_tof(items, actions, &tof_rule_type) : NULL;
6936 if (priv->representor)
6937 return rte_flow_error_set
6939 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6940 NULL, "decap not supported for VF representor");
6941 if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_SET_RULE)
6942 action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
6943 else if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_MATCH_RULE)
6944 action_flags |= MLX5_FLOW_ACTION_TUNNEL_MATCH |
6945 MLX5_FLOW_ACTION_DECAP;
6946 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
6947 (dev, attr, tunnel, tof_rule_type);
6949 ret = flow_dv_validate_attributes(dev, tunnel, attr, &grp_info, error);
6952 is_root = (uint64_t)ret;
6953 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
6954 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
6955 int type = items->type;
6957 if (!mlx5_flow_os_item_supported(type))
6958 return rte_flow_error_set(error, ENOTSUP,
6959 RTE_FLOW_ERROR_TYPE_ITEM,
6960 NULL, "item not supported");
6962 case RTE_FLOW_ITEM_TYPE_VOID:
6964 case RTE_FLOW_ITEM_TYPE_PORT_ID:
6965 ret = flow_dv_validate_item_port_id
6966 (dev, items, attr, item_flags, error);
6969 last_item = MLX5_FLOW_ITEM_PORT_ID;
6970 port_id_item = items;
6972 case RTE_FLOW_ITEM_TYPE_ETH:
6973 ret = mlx5_flow_validate_item_eth(items, item_flags,
6977 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
6978 MLX5_FLOW_LAYER_OUTER_L2;
6979 if (items->mask != NULL && items->spec != NULL) {
6981 ((const struct rte_flow_item_eth *)
6984 ((const struct rte_flow_item_eth *)
6986 ether_type = rte_be_to_cpu_16(ether_type);
6991 case RTE_FLOW_ITEM_TYPE_VLAN:
6992 ret = flow_dv_validate_item_vlan(items, item_flags,
6996 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
6997 MLX5_FLOW_LAYER_OUTER_VLAN;
6998 if (items->mask != NULL && items->spec != NULL) {
7000 ((const struct rte_flow_item_vlan *)
7001 items->spec)->inner_type;
7003 ((const struct rte_flow_item_vlan *)
7004 items->mask)->inner_type;
7005 ether_type = rte_be_to_cpu_16(ether_type);
7009 /* Store outer VLAN mask for of_push_vlan action. */
7011 vlan_m = items->mask;
7013 case RTE_FLOW_ITEM_TYPE_IPV4:
7014 mlx5_flow_tunnel_ip_check(items, next_protocol,
7015 &item_flags, &tunnel);
7016 ret = flow_dv_validate_item_ipv4(dev, items, item_flags,
7017 last_item, ether_type,
7021 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7022 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7023 if (items->mask != NULL &&
7024 ((const struct rte_flow_item_ipv4 *)
7025 items->mask)->hdr.next_proto_id) {
7027 ((const struct rte_flow_item_ipv4 *)
7028 (items->spec))->hdr.next_proto_id;
7030 ((const struct rte_flow_item_ipv4 *)
7031 (items->mask))->hdr.next_proto_id;
7033 /* Reset for inner layer. */
7034 next_protocol = 0xff;
7037 case RTE_FLOW_ITEM_TYPE_IPV6:
7038 mlx5_flow_tunnel_ip_check(items, next_protocol,
7039 &item_flags, &tunnel);
7040 ret = mlx5_flow_validate_item_ipv6(items, item_flags,
7047 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7048 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7049 if (items->mask != NULL &&
7050 ((const struct rte_flow_item_ipv6 *)
7051 items->mask)->hdr.proto) {
7053 ((const struct rte_flow_item_ipv6 *)
7054 items->spec)->hdr.proto;
7056 ((const struct rte_flow_item_ipv6 *)
7057 items->spec)->hdr.proto;
7059 ((const struct rte_flow_item_ipv6 *)
7060 items->mask)->hdr.proto;
7062 /* Reset for inner layer. */
7063 next_protocol = 0xff;
7066 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
7067 ret = flow_dv_validate_item_ipv6_frag_ext(items,
7072 last_item = tunnel ?
7073 MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
7074 MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
7075 if (items->mask != NULL &&
7076 ((const struct rte_flow_item_ipv6_frag_ext *)
7077 items->mask)->hdr.next_header) {
7079 ((const struct rte_flow_item_ipv6_frag_ext *)
7080 items->spec)->hdr.next_header;
7082 ((const struct rte_flow_item_ipv6_frag_ext *)
7083 items->mask)->hdr.next_header;
7085 /* Reset for inner layer. */
7086 next_protocol = 0xff;
7089 case RTE_FLOW_ITEM_TYPE_TCP:
7090 ret = mlx5_flow_validate_item_tcp
7097 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7098 MLX5_FLOW_LAYER_OUTER_L4_TCP;
7100 case RTE_FLOW_ITEM_TYPE_UDP:
7101 ret = mlx5_flow_validate_item_udp(items, item_flags,
7104 const struct rte_flow_item_udp *spec = items->spec;
7105 const struct rte_flow_item_udp *mask = items->mask;
7107 mask = &rte_flow_item_udp_mask;
7109 udp_dport = rte_be_to_cpu_16
7110 (spec->hdr.dst_port &
7111 mask->hdr.dst_port);
7114 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7115 MLX5_FLOW_LAYER_OUTER_L4_UDP;
7117 case RTE_FLOW_ITEM_TYPE_GRE:
7118 ret = mlx5_flow_validate_item_gre(items, item_flags,
7119 next_protocol, error);
7123 last_item = MLX5_FLOW_LAYER_GRE;
7125 case RTE_FLOW_ITEM_TYPE_NVGRE:
7126 ret = mlx5_flow_validate_item_nvgre(items, item_flags,
7131 last_item = MLX5_FLOW_LAYER_NVGRE;
7133 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7134 ret = mlx5_flow_validate_item_gre_key
7135 (items, item_flags, gre_item, error);
7138 last_item = MLX5_FLOW_LAYER_GRE_KEY;
7140 case RTE_FLOW_ITEM_TYPE_VXLAN:
7141 ret = mlx5_flow_validate_item_vxlan(dev, udp_dport,
7146 last_item = MLX5_FLOW_LAYER_VXLAN;
7148 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7149 ret = mlx5_flow_validate_item_vxlan_gpe(items,
7154 last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7156 case RTE_FLOW_ITEM_TYPE_GENEVE:
7157 ret = mlx5_flow_validate_item_geneve(items,
7162 geneve_item = items;
7163 last_item = MLX5_FLOW_LAYER_GENEVE;
7165 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
7166 ret = mlx5_flow_validate_item_geneve_opt(items,
7173 last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
7175 case RTE_FLOW_ITEM_TYPE_MPLS:
7176 ret = mlx5_flow_validate_item_mpls(dev, items,
7181 last_item = MLX5_FLOW_LAYER_MPLS;
7184 case RTE_FLOW_ITEM_TYPE_MARK:
7185 ret = flow_dv_validate_item_mark(dev, items, attr,
7189 last_item = MLX5_FLOW_ITEM_MARK;
7191 case RTE_FLOW_ITEM_TYPE_META:
7192 ret = flow_dv_validate_item_meta(dev, items, attr,
7196 last_item = MLX5_FLOW_ITEM_METADATA;
7198 case RTE_FLOW_ITEM_TYPE_ICMP:
7199 ret = mlx5_flow_validate_item_icmp(items, item_flags,
7204 last_item = MLX5_FLOW_LAYER_ICMP;
7206 case RTE_FLOW_ITEM_TYPE_ICMP6:
7207 ret = mlx5_flow_validate_item_icmp6(items, item_flags,
7212 item_ipv6_proto = IPPROTO_ICMPV6;
7213 last_item = MLX5_FLOW_LAYER_ICMP6;
7215 case RTE_FLOW_ITEM_TYPE_TAG:
7216 ret = flow_dv_validate_item_tag(dev, items,
7220 last_item = MLX5_FLOW_ITEM_TAG;
7222 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7223 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7225 case RTE_FLOW_ITEM_TYPE_GTP:
7226 ret = flow_dv_validate_item_gtp(dev, items, item_flags,
7231 last_item = MLX5_FLOW_LAYER_GTP;
7233 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
7234 ret = flow_dv_validate_item_gtp_psc(items, last_item,
7239 last_item = MLX5_FLOW_LAYER_GTP_PSC;
7241 case RTE_FLOW_ITEM_TYPE_ECPRI:
7242 /* Capacity will be checked in the translate stage. */
7243 ret = mlx5_flow_validate_item_ecpri(items, item_flags,
7250 last_item = MLX5_FLOW_LAYER_ECPRI;
7252 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
7253 if (item_flags & MLX5_FLOW_ITEM_INTEGRITY)
7254 return rte_flow_error_set
7256 RTE_FLOW_ERROR_TYPE_ITEM,
7257 NULL, "multiple integrity items not supported");
7258 ret = flow_dv_validate_item_integrity(dev, rule_items,
7262 last_item = MLX5_FLOW_ITEM_INTEGRITY;
7264 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
7265 ret = flow_dv_validate_item_aso_ct(dev, items,
7266 &item_flags, error);
7270 case MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL:
7271 /* tunnel offload item was processed before
7272 * list it here as a supported type
7276 return rte_flow_error_set(error, ENOTSUP,
7277 RTE_FLOW_ERROR_TYPE_ITEM,
7278 NULL, "item not supported");
7280 item_flags |= last_item;
7282 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
7283 int type = actions->type;
7284 bool shared_count = false;
7286 if (!mlx5_flow_os_action_supported(type))
7287 return rte_flow_error_set(error, ENOTSUP,
7288 RTE_FLOW_ERROR_TYPE_ACTION,
7290 "action not supported");
7291 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
7292 return rte_flow_error_set(error, ENOTSUP,
7293 RTE_FLOW_ERROR_TYPE_ACTION,
7294 actions, "too many actions");
7296 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
7297 return rte_flow_error_set(error, ENOTSUP,
7298 RTE_FLOW_ERROR_TYPE_ACTION,
7299 NULL, "meter action with policy "
7300 "must be the last action");
7302 case RTE_FLOW_ACTION_TYPE_VOID:
7304 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7305 ret = flow_dv_validate_action_port_id(dev,
7312 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7315 case RTE_FLOW_ACTION_TYPE_FLAG:
7316 ret = flow_dv_validate_action_flag(dev, action_flags,
7320 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7321 /* Count all modify-header actions as one. */
7322 if (!(action_flags &
7323 MLX5_FLOW_MODIFY_HDR_ACTIONS))
7325 action_flags |= MLX5_FLOW_ACTION_FLAG |
7326 MLX5_FLOW_ACTION_MARK_EXT;
7327 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7328 modify_after_mirror = 1;
7331 action_flags |= MLX5_FLOW_ACTION_FLAG;
7334 rw_act_num += MLX5_ACT_NUM_SET_MARK;
7336 case RTE_FLOW_ACTION_TYPE_MARK:
7337 ret = flow_dv_validate_action_mark(dev, actions,
7342 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7343 /* Count all modify-header actions as one. */
7344 if (!(action_flags &
7345 MLX5_FLOW_MODIFY_HDR_ACTIONS))
7347 action_flags |= MLX5_FLOW_ACTION_MARK |
7348 MLX5_FLOW_ACTION_MARK_EXT;
7349 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7350 modify_after_mirror = 1;
7352 action_flags |= MLX5_FLOW_ACTION_MARK;
7355 rw_act_num += MLX5_ACT_NUM_SET_MARK;
7357 case RTE_FLOW_ACTION_TYPE_SET_META:
7358 ret = flow_dv_validate_action_set_meta(dev, actions,
7363 /* Count all modify-header actions as one action. */
7364 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7366 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7367 modify_after_mirror = 1;
7368 action_flags |= MLX5_FLOW_ACTION_SET_META;
7369 rw_act_num += MLX5_ACT_NUM_SET_META;
7371 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7372 ret = flow_dv_validate_action_set_tag(dev, actions,
7377 /* Count all modify-header actions as one action. */
7378 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7380 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7381 modify_after_mirror = 1;
7382 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7383 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7385 case RTE_FLOW_ACTION_TYPE_DROP:
7386 ret = mlx5_flow_validate_action_drop(action_flags,
7390 action_flags |= MLX5_FLOW_ACTION_DROP;
7393 case RTE_FLOW_ACTION_TYPE_QUEUE:
7394 ret = mlx5_flow_validate_action_queue(actions,
7399 queue_index = ((const struct rte_flow_action_queue *)
7400 (actions->conf))->index;
7401 action_flags |= MLX5_FLOW_ACTION_QUEUE;
7404 case RTE_FLOW_ACTION_TYPE_RSS:
7405 rss = actions->conf;
7406 ret = mlx5_flow_validate_action_rss(actions,
7412 if (rss && sample_rss &&
7413 (sample_rss->level != rss->level ||
7414 sample_rss->types != rss->types))
7415 return rte_flow_error_set(error, ENOTSUP,
7416 RTE_FLOW_ERROR_TYPE_ACTION,
7418 "Can't use the different RSS types "
7419 "or level in the same flow");
7420 if (rss != NULL && rss->queue_num)
7421 queue_index = rss->queue[0];
7422 action_flags |= MLX5_FLOW_ACTION_RSS;
7425 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
7427 mlx5_flow_validate_action_default_miss(action_flags,
7431 action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
7434 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
7435 case RTE_FLOW_ACTION_TYPE_COUNT:
7436 shared_count = is_shared_action_count(actions);
7437 ret = flow_dv_validate_action_count(dev, shared_count,
7442 action_flags |= MLX5_FLOW_ACTION_COUNT;
7445 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7446 if (flow_dv_validate_action_pop_vlan(dev,
7452 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7453 modify_after_mirror = 1;
7454 action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7457 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7458 ret = flow_dv_validate_action_push_vlan(dev,
7465 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7466 modify_after_mirror = 1;
7467 action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7470 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7471 ret = flow_dv_validate_action_set_vlan_pcp
7472 (action_flags, actions, error);
7475 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7476 modify_after_mirror = 1;
7477 /* Count PCP with push_vlan command. */
7478 action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
7480 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7481 ret = flow_dv_validate_action_set_vlan_vid
7482 (item_flags, action_flags,
7486 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7487 modify_after_mirror = 1;
7488 /* Count VID with push_vlan command. */
7489 action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7490 rw_act_num += MLX5_ACT_NUM_MDF_VID;
7492 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7493 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7494 ret = flow_dv_validate_action_l2_encap(dev,
7500 action_flags |= MLX5_FLOW_ACTION_ENCAP;
7503 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7504 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7505 ret = flow_dv_validate_action_decap(dev, action_flags,
7506 actions, item_flags,
7510 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7511 modify_after_mirror = 1;
7512 action_flags |= MLX5_FLOW_ACTION_DECAP;
7515 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7516 ret = flow_dv_validate_action_raw_encap_decap
7517 (dev, NULL, actions->conf, attr, &action_flags,
7518 &actions_n, actions, item_flags, error);
7522 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7523 decap = actions->conf;
7524 while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
7526 if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7530 encap = actions->conf;
7532 ret = flow_dv_validate_action_raw_encap_decap
7534 decap ? decap : &empty_decap, encap,
7535 attr, &action_flags, &actions_n,
7536 actions, item_flags, error);
7539 if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7540 (action_flags & MLX5_FLOW_ACTION_DECAP))
7541 modify_after_mirror = 1;
7543 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7544 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7545 ret = flow_dv_validate_action_modify_mac(action_flags,
7551 /* Count all modify-header actions as one action. */
7552 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7554 action_flags |= actions->type ==
7555 RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7556 MLX5_FLOW_ACTION_SET_MAC_SRC :
7557 MLX5_FLOW_ACTION_SET_MAC_DST;
7558 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7559 modify_after_mirror = 1;
7561 * Even if the source and destination MAC addresses have
7562 * overlap in the header with 4B alignment, the convert
7563 * function will handle them separately and 4 SW actions
7564 * will be created. And 2 actions will be added each
7565 * time no matter how many bytes of address will be set.
7567 rw_act_num += MLX5_ACT_NUM_MDF_MAC;
7569 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7570 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7571 ret = flow_dv_validate_action_modify_ipv4(action_flags,
7577 /* Count all modify-header actions as one action. */
7578 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7580 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7581 modify_after_mirror = 1;
7582 action_flags |= actions->type ==
7583 RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7584 MLX5_FLOW_ACTION_SET_IPV4_SRC :
7585 MLX5_FLOW_ACTION_SET_IPV4_DST;
7586 rw_act_num += MLX5_ACT_NUM_MDF_IPV4;
7588 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7589 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7590 ret = flow_dv_validate_action_modify_ipv6(action_flags,
7596 if (item_ipv6_proto == IPPROTO_ICMPV6)
7597 return rte_flow_error_set(error, ENOTSUP,
7598 RTE_FLOW_ERROR_TYPE_ACTION,
7600 "Can't change header "
7601 "with ICMPv6 proto");
7602 /* Count all modify-header actions as one action. */
7603 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7605 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7606 modify_after_mirror = 1;
7607 action_flags |= actions->type ==
7608 RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7609 MLX5_FLOW_ACTION_SET_IPV6_SRC :
7610 MLX5_FLOW_ACTION_SET_IPV6_DST;
7611 rw_act_num += MLX5_ACT_NUM_MDF_IPV6;
7613 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7614 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7615 ret = flow_dv_validate_action_modify_tp(action_flags,
7621 /* Count all modify-header actions as one action. */
7622 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7624 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7625 modify_after_mirror = 1;
7626 action_flags |= actions->type ==
7627 RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7628 MLX5_FLOW_ACTION_SET_TP_SRC :
7629 MLX5_FLOW_ACTION_SET_TP_DST;
7630 rw_act_num += MLX5_ACT_NUM_MDF_PORT;
7632 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7633 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7634 ret = flow_dv_validate_action_modify_ttl(action_flags,
7640 /* Count all modify-header actions as one action. */
7641 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7643 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7644 modify_after_mirror = 1;
7645 action_flags |= actions->type ==
7646 RTE_FLOW_ACTION_TYPE_SET_TTL ?
7647 MLX5_FLOW_ACTION_SET_TTL :
7648 MLX5_FLOW_ACTION_DEC_TTL;
7649 rw_act_num += MLX5_ACT_NUM_MDF_TTL;
7651 case RTE_FLOW_ACTION_TYPE_JUMP:
7652 ret = flow_dv_validate_action_jump(dev, tunnel, actions,
7658 if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7660 return rte_flow_error_set(error, EINVAL,
7661 RTE_FLOW_ERROR_TYPE_ACTION,
7663 "sample and jump action combination is not supported");
7665 action_flags |= MLX5_FLOW_ACTION_JUMP;
7667 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7668 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7669 ret = flow_dv_validate_action_modify_tcp_seq
7676 /* Count all modify-header actions as one action. */
7677 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7679 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7680 modify_after_mirror = 1;
7681 action_flags |= actions->type ==
7682 RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7683 MLX5_FLOW_ACTION_INC_TCP_SEQ :
7684 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7685 rw_act_num += MLX5_ACT_NUM_MDF_TCPSEQ;
7687 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7688 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7689 ret = flow_dv_validate_action_modify_tcp_ack
7696 /* Count all modify-header actions as one action. */
7697 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7699 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7700 modify_after_mirror = 1;
7701 action_flags |= actions->type ==
7702 RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7703 MLX5_FLOW_ACTION_INC_TCP_ACK :
7704 MLX5_FLOW_ACTION_DEC_TCP_ACK;
7705 rw_act_num += MLX5_ACT_NUM_MDF_TCPACK;
7707 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7709 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7710 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7711 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7713 case RTE_FLOW_ACTION_TYPE_METER:
7714 ret = mlx5_flow_validate_action_meter(dev,
7722 action_flags |= MLX5_FLOW_ACTION_METER;
7725 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
7727 /* Meter action will add one more TAG action. */
7728 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7730 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
7731 if (!attr->transfer && !attr->group)
7732 return rte_flow_error_set(error, ENOTSUP,
7733 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7735 "Shared ASO age action is not supported for group 0");
7736 if (action_flags & MLX5_FLOW_ACTION_AGE)
7737 return rte_flow_error_set
7739 RTE_FLOW_ERROR_TYPE_ACTION,
7741 "duplicate age actions set");
7742 action_flags |= MLX5_FLOW_ACTION_AGE;
7745 case RTE_FLOW_ACTION_TYPE_AGE:
7746 ret = flow_dv_validate_action_age(action_flags,
7752 * Validate the regular AGE action (using counter)
7753 * mutual exclusion with share counter actions.
7755 if (!priv->sh->flow_hit_aso_en) {
7757 return rte_flow_error_set
7759 RTE_FLOW_ERROR_TYPE_ACTION,
7761 "old age and shared count combination is not supported");
7763 return rte_flow_error_set
7765 RTE_FLOW_ERROR_TYPE_ACTION,
7767 "old age action and count must be in the same sub flow");
7769 action_flags |= MLX5_FLOW_ACTION_AGE;
7772 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7773 ret = flow_dv_validate_action_modify_ipv4_dscp
7780 /* Count all modify-header actions as one action. */
7781 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7783 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7784 modify_after_mirror = 1;
7785 action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7786 rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7788 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7789 ret = flow_dv_validate_action_modify_ipv6_dscp
7796 /* Count all modify-header actions as one action. */
7797 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7799 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7800 modify_after_mirror = 1;
7801 action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7802 rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7804 case RTE_FLOW_ACTION_TYPE_SAMPLE:
7805 ret = flow_dv_validate_action_sample(&action_flags,
7814 action_flags |= MLX5_FLOW_ACTION_SAMPLE;
7817 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
7818 ret = flow_dv_validate_action_modify_field(dev,
7825 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7826 modify_after_mirror = 1;
7827 /* Count all modify-header actions as one action. */
7828 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7830 action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
7833 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
7834 ret = flow_dv_validate_action_aso_ct(dev, action_flags,
7839 action_flags |= MLX5_FLOW_ACTION_CT;
7841 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
7842 /* tunnel offload action was processed before
7843 * list it here as a supported type
7847 return rte_flow_error_set(error, ENOTSUP,
7848 RTE_FLOW_ERROR_TYPE_ACTION,
7850 "action not supported");
7854 * Validate actions in flow rules
7855 * - Explicit decap action is prohibited by the tunnel offload API.
7856 * - Drop action in tunnel steer rule is prohibited by the API.
7857 * - Application cannot use MARK action because it's value can mask
7858 * tunnel default miss nitification.
7859 * - JUMP in tunnel match rule has no support in current PMD
7861 * - TAG & META are reserved for future uses.
7863 if (action_flags & MLX5_FLOW_ACTION_TUNNEL_SET) {
7864 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_DECAP |
7865 MLX5_FLOW_ACTION_MARK |
7866 MLX5_FLOW_ACTION_SET_TAG |
7867 MLX5_FLOW_ACTION_SET_META |
7868 MLX5_FLOW_ACTION_DROP;
7870 if (action_flags & bad_actions_mask)
7871 return rte_flow_error_set
7873 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7874 "Invalid RTE action in tunnel "
7876 if (!(action_flags & MLX5_FLOW_ACTION_JUMP))
7877 return rte_flow_error_set
7879 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7880 "tunnel set decap rule must terminate "
7883 return rte_flow_error_set
7885 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7886 "tunnel flows for ingress traffic only");
7888 if (action_flags & MLX5_FLOW_ACTION_TUNNEL_MATCH) {
7889 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_JUMP |
7890 MLX5_FLOW_ACTION_MARK |
7891 MLX5_FLOW_ACTION_SET_TAG |
7892 MLX5_FLOW_ACTION_SET_META;
7894 if (action_flags & bad_actions_mask)
7895 return rte_flow_error_set
7897 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7898 "Invalid RTE action in tunnel "
7902 * Validate the drop action mutual exclusion with other actions.
7903 * Drop action is mutually-exclusive with any other action, except for
7905 * Drop action compatibility with tunnel offload was already validated.
7907 if (action_flags & (MLX5_FLOW_ACTION_TUNNEL_MATCH |
7908 MLX5_FLOW_ACTION_TUNNEL_MATCH));
7909 else if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
7910 (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
7911 return rte_flow_error_set(error, EINVAL,
7912 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7913 "Drop action is mutually-exclusive "
7914 "with any other action, except for "
7916 /* Eswitch has few restrictions on using items and actions */
7917 if (attr->transfer) {
7918 if (!mlx5_flow_ext_mreg_supported(dev) &&
7919 action_flags & MLX5_FLOW_ACTION_FLAG)
7920 return rte_flow_error_set(error, ENOTSUP,
7921 RTE_FLOW_ERROR_TYPE_ACTION,
7923 "unsupported action FLAG");
7924 if (!mlx5_flow_ext_mreg_supported(dev) &&
7925 action_flags & MLX5_FLOW_ACTION_MARK)
7926 return rte_flow_error_set(error, ENOTSUP,
7927 RTE_FLOW_ERROR_TYPE_ACTION,
7929 "unsupported action MARK");
7930 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
7931 return rte_flow_error_set(error, ENOTSUP,
7932 RTE_FLOW_ERROR_TYPE_ACTION,
7934 "unsupported action QUEUE");
7935 if (action_flags & MLX5_FLOW_ACTION_RSS)
7936 return rte_flow_error_set(error, ENOTSUP,
7937 RTE_FLOW_ERROR_TYPE_ACTION,
7939 "unsupported action RSS");
7940 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
7941 return rte_flow_error_set(error, EINVAL,
7942 RTE_FLOW_ERROR_TYPE_ACTION,
7944 "no fate action is found");
7946 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
7947 return rte_flow_error_set(error, EINVAL,
7948 RTE_FLOW_ERROR_TYPE_ACTION,
7950 "no fate action is found");
7953 * Continue validation for Xcap and VLAN actions.
7954 * If hairpin is working in explicit TX rule mode, there is no actions
7955 * splitting and the validation of hairpin ingress flow should be the
7956 * same as other standard flows.
7958 if ((action_flags & (MLX5_FLOW_XCAP_ACTIONS |
7959 MLX5_FLOW_VLAN_ACTIONS)) &&
7960 (queue_index == 0xFFFF ||
7961 mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN ||
7962 ((conf = mlx5_rxq_get_hairpin_conf(dev, queue_index)) != NULL &&
7963 conf->tx_explicit != 0))) {
7964 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
7965 MLX5_FLOW_XCAP_ACTIONS)
7966 return rte_flow_error_set(error, ENOTSUP,
7967 RTE_FLOW_ERROR_TYPE_ACTION,
7968 NULL, "encap and decap "
7969 "combination aren't supported");
7970 if (!attr->transfer && attr->ingress) {
7971 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7972 return rte_flow_error_set
7974 RTE_FLOW_ERROR_TYPE_ACTION,
7975 NULL, "encap is not supported"
7976 " for ingress traffic");
7977 else if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7978 return rte_flow_error_set
7980 RTE_FLOW_ERROR_TYPE_ACTION,
7981 NULL, "push VLAN action not "
7982 "supported for ingress");
7983 else if ((action_flags & MLX5_FLOW_VLAN_ACTIONS) ==
7984 MLX5_FLOW_VLAN_ACTIONS)
7985 return rte_flow_error_set
7987 RTE_FLOW_ERROR_TYPE_ACTION,
7988 NULL, "no support for "
7989 "multiple VLAN actions");
7992 if (action_flags & MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY) {
7993 if ((action_flags & (MLX5_FLOW_FATE_ACTIONS &
7994 ~MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)) &&
7996 return rte_flow_error_set
7998 RTE_FLOW_ERROR_TYPE_ACTION,
7999 NULL, "fate action not supported for "
8000 "meter with policy");
8002 if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
8003 return rte_flow_error_set
8005 RTE_FLOW_ERROR_TYPE_ACTION,
8006 NULL, "modify header action in egress "
8007 "cannot be done before meter action");
8008 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
8009 return rte_flow_error_set
8011 RTE_FLOW_ERROR_TYPE_ACTION,
8012 NULL, "encap action in egress "
8013 "cannot be done before meter action");
8014 if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
8015 return rte_flow_error_set
8017 RTE_FLOW_ERROR_TYPE_ACTION,
8018 NULL, "push vlan action in egress "
8019 "cannot be done before meter action");
8023 * Hairpin flow will add one more TAG action in TX implicit mode.
8024 * In TX explicit mode, there will be no hairpin flow ID.
8027 rw_act_num += MLX5_ACT_NUM_SET_TAG;
8028 /* extra metadata enabled: one more TAG action will be add. */
8029 if (dev_conf->dv_flow_en &&
8030 dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
8031 mlx5_flow_ext_mreg_supported(dev))
8032 rw_act_num += MLX5_ACT_NUM_SET_TAG;
8034 flow_dv_modify_hdr_action_max(dev, is_root)) {
8035 return rte_flow_error_set(error, ENOTSUP,
8036 RTE_FLOW_ERROR_TYPE_ACTION,
8037 NULL, "too many header modify"
8038 " actions to support");
8040 /* Eswitch egress mirror and modify flow has limitation on CX5 */
8041 if (fdb_mirror_limit && modify_after_mirror)
8042 return rte_flow_error_set(error, EINVAL,
8043 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
8044 "sample before modify action is not supported");
8049 * Internal preparation function. Allocates the DV flow size,
8050 * this size is constant.
8053 * Pointer to the rte_eth_dev structure.
8055 * Pointer to the flow attributes.
8057 * Pointer to the list of items.
8058 * @param[in] actions
8059 * Pointer to the list of actions.
8061 * Pointer to the error structure.
8064 * Pointer to mlx5_flow object on success,
8065 * otherwise NULL and rte_errno is set.
8067 static struct mlx5_flow *
8068 flow_dv_prepare(struct rte_eth_dev *dev,
8069 const struct rte_flow_attr *attr __rte_unused,
8070 const struct rte_flow_item items[] __rte_unused,
8071 const struct rte_flow_action actions[] __rte_unused,
8072 struct rte_flow_error *error)
8074 uint32_t handle_idx = 0;
8075 struct mlx5_flow *dev_flow;
8076 struct mlx5_flow_handle *dev_handle;
8077 struct mlx5_priv *priv = dev->data->dev_private;
8078 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
8081 wks->skip_matcher_reg = 0;
8083 wks->final_policy = NULL;
8084 /* In case of corrupting the memory. */
8085 if (wks->flow_idx >= MLX5_NUM_MAX_DEV_FLOWS) {
8086 rte_flow_error_set(error, ENOSPC,
8087 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8088 "not free temporary device flow");
8091 dev_handle = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
8094 rte_flow_error_set(error, ENOMEM,
8095 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8096 "not enough memory to create flow handle");
8099 MLX5_ASSERT(wks->flow_idx < RTE_DIM(wks->flows));
8100 dev_flow = &wks->flows[wks->flow_idx++];
8101 memset(dev_flow, 0, sizeof(*dev_flow));
8102 dev_flow->handle = dev_handle;
8103 dev_flow->handle_idx = handle_idx;
8104 dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
8105 dev_flow->ingress = attr->ingress;
8106 dev_flow->dv.transfer = attr->transfer;
8110 #ifdef RTE_LIBRTE_MLX5_DEBUG
8112 * Sanity check for match mask and value. Similar to check_valid_spec() in
8113 * kernel driver. If unmasked bit is present in value, it returns failure.
8116 * pointer to match mask buffer.
8117 * @param match_value
8118 * pointer to match value buffer.
8121 * 0 if valid, -EINVAL otherwise.
8124 flow_dv_check_valid_spec(void *match_mask, void *match_value)
8126 uint8_t *m = match_mask;
8127 uint8_t *v = match_value;
8130 for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
8133 "match_value differs from match_criteria"
8134 " %p[%u] != %p[%u]",
8135 match_value, i, match_mask, i);
8144 * Add match of ip_version.
8148 * @param[in] headers_v
8149 * Values header pointer.
8150 * @param[in] headers_m
8151 * Masks header pointer.
8152 * @param[in] ip_version
8153 * The IP version to set.
8156 flow_dv_set_match_ip_version(uint32_t group,
8162 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
8164 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version,
8166 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, ip_version);
8167 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, 0);
8168 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype, 0);
8172 * Add Ethernet item to matcher and to the value.
8174 * @param[in, out] matcher
8176 * @param[in, out] key
8177 * Flow matcher value.
8179 * Flow pattern to translate.
8181 * Item is inner pattern.
8184 flow_dv_translate_item_eth(void *matcher, void *key,
8185 const struct rte_flow_item *item, int inner,
8188 const struct rte_flow_item_eth *eth_m = item->mask;
8189 const struct rte_flow_item_eth *eth_v = item->spec;
8190 const struct rte_flow_item_eth nic_mask = {
8191 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8192 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8193 .type = RTE_BE16(0xffff),
8206 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8208 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8210 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8212 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8214 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, dmac_47_16),
8215 ð_m->dst, sizeof(eth_m->dst));
8216 /* The value must be in the range of the mask. */
8217 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, dmac_47_16);
8218 for (i = 0; i < sizeof(eth_m->dst); ++i)
8219 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
8220 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, smac_47_16),
8221 ð_m->src, sizeof(eth_m->src));
8222 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, smac_47_16);
8223 /* The value must be in the range of the mask. */
8224 for (i = 0; i < sizeof(eth_m->dst); ++i)
8225 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
8227 * HW supports match on one Ethertype, the Ethertype following the last
8228 * VLAN tag of the packet (see PRM).
8229 * Set match on ethertype only if ETH header is not followed by VLAN.
8230 * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8231 * ethertype, and use ip_version field instead.
8232 * eCPRI over Ether layer will use type value 0xAEFE.
8234 if (eth_m->type == 0xFFFF) {
8235 /* Set cvlan_tag mask for any single\multi\un-tagged case. */
8236 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8237 switch (eth_v->type) {
8238 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8239 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8241 case RTE_BE16(RTE_ETHER_TYPE_QINQ):
8242 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8243 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8245 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8246 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8248 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8249 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8255 if (eth_m->has_vlan) {
8256 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8257 if (eth_v->has_vlan) {
8259 * Here, when also has_more_vlan field in VLAN item is
8260 * not set, only single-tagged packets will be matched.
8262 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8266 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8267 rte_be_to_cpu_16(eth_m->type));
8268 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
8269 *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
8273 * Add VLAN item to matcher and to the value.
8275 * @param[in, out] dev_flow
8277 * @param[in, out] matcher
8279 * @param[in, out] key
8280 * Flow matcher value.
8282 * Flow pattern to translate.
8284 * Item is inner pattern.
8287 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
8288 void *matcher, void *key,
8289 const struct rte_flow_item *item,
8290 int inner, uint32_t group)
8292 const struct rte_flow_item_vlan *vlan_m = item->mask;
8293 const struct rte_flow_item_vlan *vlan_v = item->spec;
8300 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8302 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8304 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8306 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8308 * This is workaround, masks are not supported,
8309 * and pre-validated.
8312 dev_flow->handle->vf_vlan.tag =
8313 rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
8316 * When VLAN item exists in flow, mark packet as tagged,
8317 * even if TCI is not specified.
8319 if (!MLX5_GET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag)) {
8320 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8321 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8326 vlan_m = &rte_flow_item_vlan_mask;
8327 tci_m = rte_be_to_cpu_16(vlan_m->tci);
8328 tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
8329 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_vid, tci_m);
8330 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_vid, tci_v);
8331 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_cfi, tci_m >> 12);
8332 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_cfi, tci_v >> 12);
8333 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_prio, tci_m >> 13);
8334 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_prio, tci_v >> 13);
8336 * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8337 * ethertype, and use ip_version field instead.
8339 if (vlan_m->inner_type == 0xFFFF) {
8340 switch (vlan_v->inner_type) {
8341 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8342 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8343 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8344 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8346 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8347 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8349 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8350 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8356 if (vlan_m->has_more_vlan && vlan_v->has_more_vlan) {
8357 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8358 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8359 /* Only one vlan_tag bit can be set. */
8360 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8363 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8364 rte_be_to_cpu_16(vlan_m->inner_type));
8365 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, ethertype,
8366 rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
8370 * Add IPV4 item to matcher and to the value.
8372 * @param[in, out] matcher
8374 * @param[in, out] key
8375 * Flow matcher value.
8377 * Flow pattern to translate.
8379 * Item is inner pattern.
8381 * The group to insert the rule.
8384 flow_dv_translate_item_ipv4(void *matcher, void *key,
8385 const struct rte_flow_item *item,
8386 int inner, uint32_t group)
8388 const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
8389 const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
8390 const struct rte_flow_item_ipv4 nic_mask = {
8392 .src_addr = RTE_BE32(0xffffffff),
8393 .dst_addr = RTE_BE32(0xffffffff),
8394 .type_of_service = 0xff,
8395 .next_proto_id = 0xff,
8396 .time_to_live = 0xff,
8403 uint8_t tos, ihl_m, ihl_v;
8406 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8408 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8410 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8412 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8414 flow_dv_set_match_ip_version(group, headers_v, headers_m, 4);
8419 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8420 dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8421 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8422 dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8423 *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
8424 *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
8425 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8426 src_ipv4_src_ipv6.ipv4_layout.ipv4);
8427 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8428 src_ipv4_src_ipv6.ipv4_layout.ipv4);
8429 *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
8430 *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
8431 tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
8432 ihl_m = ipv4_m->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8433 ihl_v = ipv4_v->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8434 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_ihl, ihl_m);
8435 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_ihl, ihl_m & ihl_v);
8436 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
8437 ipv4_m->hdr.type_of_service);
8438 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
8439 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
8440 ipv4_m->hdr.type_of_service >> 2);
8441 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
8442 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8443 ipv4_m->hdr.next_proto_id);
8444 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8445 ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
8446 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8447 ipv4_m->hdr.time_to_live);
8448 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8449 ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
8450 MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8451 !!(ipv4_m->hdr.fragment_offset));
8452 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8453 !!(ipv4_v->hdr.fragment_offset & ipv4_m->hdr.fragment_offset));
8457 * Add IPV6 item to matcher and to the value.
8459 * @param[in, out] matcher
8461 * @param[in, out] key
8462 * Flow matcher value.
8464 * Flow pattern to translate.
8466 * Item is inner pattern.
8468 * The group to insert the rule.
8471 flow_dv_translate_item_ipv6(void *matcher, void *key,
8472 const struct rte_flow_item *item,
8473 int inner, uint32_t group)
8475 const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
8476 const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
8477 const struct rte_flow_item_ipv6 nic_mask = {
8480 "\xff\xff\xff\xff\xff\xff\xff\xff"
8481 "\xff\xff\xff\xff\xff\xff\xff\xff",
8483 "\xff\xff\xff\xff\xff\xff\xff\xff"
8484 "\xff\xff\xff\xff\xff\xff\xff\xff",
8485 .vtc_flow = RTE_BE32(0xffffffff),
8492 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8493 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8502 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8504 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8506 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8508 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8510 flow_dv_set_match_ip_version(group, headers_v, headers_m, 6);
8515 size = sizeof(ipv6_m->hdr.dst_addr);
8516 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8517 dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8518 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8519 dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8520 memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
8521 for (i = 0; i < size; ++i)
8522 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
8523 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8524 src_ipv4_src_ipv6.ipv6_layout.ipv6);
8525 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8526 src_ipv4_src_ipv6.ipv6_layout.ipv6);
8527 memcpy(l24_m, ipv6_m->hdr.src_addr, size);
8528 for (i = 0; i < size; ++i)
8529 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
8531 vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
8532 vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
8533 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
8534 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
8535 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
8536 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
8539 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
8541 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
8544 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
8546 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
8550 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8552 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8553 ipv6_v->hdr.proto & ipv6_m->hdr.proto);
8555 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8556 ipv6_m->hdr.hop_limits);
8557 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8558 ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
8559 MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8560 !!(ipv6_m->has_frag_ext));
8561 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8562 !!(ipv6_v->has_frag_ext & ipv6_m->has_frag_ext));
8566 * Add IPV6 fragment extension item to matcher and to the value.
8568 * @param[in, out] matcher
8570 * @param[in, out] key
8571 * Flow matcher value.
8573 * Flow pattern to translate.
8575 * Item is inner pattern.
8578 flow_dv_translate_item_ipv6_frag_ext(void *matcher, void *key,
8579 const struct rte_flow_item *item,
8582 const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_m = item->mask;
8583 const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_v = item->spec;
8584 const struct rte_flow_item_ipv6_frag_ext nic_mask = {
8586 .next_header = 0xff,
8587 .frag_data = RTE_BE16(0xffff),
8594 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8596 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8598 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8600 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8602 /* IPv6 fragment extension item exists, so packet is IP fragment. */
8603 MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
8604 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 1);
8605 if (!ipv6_frag_ext_v)
8607 if (!ipv6_frag_ext_m)
8608 ipv6_frag_ext_m = &nic_mask;
8609 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8610 ipv6_frag_ext_m->hdr.next_header);
8611 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8612 ipv6_frag_ext_v->hdr.next_header &
8613 ipv6_frag_ext_m->hdr.next_header);
8617 * Add TCP item to matcher and to the value.
8619 * @param[in, out] matcher
8621 * @param[in, out] key
8622 * Flow matcher value.
8624 * Flow pattern to translate.
8626 * Item is inner pattern.
8629 flow_dv_translate_item_tcp(void *matcher, void *key,
8630 const struct rte_flow_item *item,
8633 const struct rte_flow_item_tcp *tcp_m = item->mask;
8634 const struct rte_flow_item_tcp *tcp_v = item->spec;
8639 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8641 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8643 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8645 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8647 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8648 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
8652 tcp_m = &rte_flow_item_tcp_mask;
8653 MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
8654 rte_be_to_cpu_16(tcp_m->hdr.src_port));
8655 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
8656 rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
8657 MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
8658 rte_be_to_cpu_16(tcp_m->hdr.dst_port));
8659 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
8660 rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
8661 MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
8662 tcp_m->hdr.tcp_flags);
8663 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
8664 (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
8668 * Add UDP item to matcher and to the value.
8670 * @param[in, out] matcher
8672 * @param[in, out] key
8673 * Flow matcher value.
8675 * Flow pattern to translate.
8677 * Item is inner pattern.
8680 flow_dv_translate_item_udp(void *matcher, void *key,
8681 const struct rte_flow_item *item,
8684 const struct rte_flow_item_udp *udp_m = item->mask;
8685 const struct rte_flow_item_udp *udp_v = item->spec;
8690 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8692 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8694 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8696 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8698 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8699 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
8703 udp_m = &rte_flow_item_udp_mask;
8704 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
8705 rte_be_to_cpu_16(udp_m->hdr.src_port));
8706 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
8707 rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
8708 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
8709 rte_be_to_cpu_16(udp_m->hdr.dst_port));
8710 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
8711 rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
8715 * Add GRE optional Key item to matcher and to the value.
8717 * @param[in, out] matcher
8719 * @param[in, out] key
8720 * Flow matcher value.
8722 * Flow pattern to translate.
8724 * Item is inner pattern.
8727 flow_dv_translate_item_gre_key(void *matcher, void *key,
8728 const struct rte_flow_item *item)
8730 const rte_be32_t *key_m = item->mask;
8731 const rte_be32_t *key_v = item->spec;
8732 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8733 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8734 rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
8736 /* GRE K bit must be on and should already be validated */
8737 MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
8738 MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
8742 key_m = &gre_key_default_mask;
8743 MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
8744 rte_be_to_cpu_32(*key_m) >> 8);
8745 MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
8746 rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
8747 MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
8748 rte_be_to_cpu_32(*key_m) & 0xFF);
8749 MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
8750 rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
8754 * Add GRE item to matcher and to the value.
8756 * @param[in, out] matcher
8758 * @param[in, out] key
8759 * Flow matcher value.
8761 * Flow pattern to translate.
8763 * Item is inner pattern.
8766 flow_dv_translate_item_gre(void *matcher, void *key,
8767 const struct rte_flow_item *item,
8770 const struct rte_flow_item_gre *gre_m = item->mask;
8771 const struct rte_flow_item_gre *gre_v = item->spec;
8774 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8775 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8782 uint16_t s_present:1;
8783 uint16_t k_present:1;
8784 uint16_t rsvd_bit1:1;
8785 uint16_t c_present:1;
8789 } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
8792 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8794 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8796 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8798 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8800 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8801 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
8805 gre_m = &rte_flow_item_gre_mask;
8806 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
8807 rte_be_to_cpu_16(gre_m->protocol));
8808 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
8809 rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
8810 gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
8811 gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
8812 MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
8813 gre_crks_rsvd0_ver_m.c_present);
8814 MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
8815 gre_crks_rsvd0_ver_v.c_present &
8816 gre_crks_rsvd0_ver_m.c_present);
8817 MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
8818 gre_crks_rsvd0_ver_m.k_present);
8819 MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
8820 gre_crks_rsvd0_ver_v.k_present &
8821 gre_crks_rsvd0_ver_m.k_present);
8822 MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
8823 gre_crks_rsvd0_ver_m.s_present);
8824 MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
8825 gre_crks_rsvd0_ver_v.s_present &
8826 gre_crks_rsvd0_ver_m.s_present);
8830 * Add NVGRE item to matcher and to the value.
8832 * @param[in, out] matcher
8834 * @param[in, out] key
8835 * Flow matcher value.
8837 * Flow pattern to translate.
8839 * Item is inner pattern.
8842 flow_dv_translate_item_nvgre(void *matcher, void *key,
8843 const struct rte_flow_item *item,
8846 const struct rte_flow_item_nvgre *nvgre_m = item->mask;
8847 const struct rte_flow_item_nvgre *nvgre_v = item->spec;
8848 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8849 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8850 const char *tni_flow_id_m;
8851 const char *tni_flow_id_v;
8857 /* For NVGRE, GRE header fields must be set with defined values. */
8858 const struct rte_flow_item_gre gre_spec = {
8859 .c_rsvd0_ver = RTE_BE16(0x2000),
8860 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
8862 const struct rte_flow_item_gre gre_mask = {
8863 .c_rsvd0_ver = RTE_BE16(0xB000),
8864 .protocol = RTE_BE16(UINT16_MAX),
8866 const struct rte_flow_item gre_item = {
8871 flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
8875 nvgre_m = &rte_flow_item_nvgre_mask;
8876 tni_flow_id_m = (const char *)nvgre_m->tni;
8877 tni_flow_id_v = (const char *)nvgre_v->tni;
8878 size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
8879 gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
8880 gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
8881 memcpy(gre_key_m, tni_flow_id_m, size);
8882 for (i = 0; i < size; ++i)
8883 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
8887 * Add VXLAN item to matcher and to the value.
8890 * Pointer to the Ethernet device structure.
8892 * Flow rule attributes.
8893 * @param[in, out] matcher
8895 * @param[in, out] key
8896 * Flow matcher value.
8898 * Flow pattern to translate.
8900 * Item is inner pattern.
8903 flow_dv_translate_item_vxlan(struct rte_eth_dev *dev,
8904 const struct rte_flow_attr *attr,
8905 void *matcher, void *key,
8906 const struct rte_flow_item *item,
8909 const struct rte_flow_item_vxlan *vxlan_m = item->mask;
8910 const struct rte_flow_item_vxlan *vxlan_v = item->spec;
8915 uint32_t *tunnel_header_v;
8916 uint32_t *tunnel_header_m;
8918 struct mlx5_priv *priv = dev->data->dev_private;
8919 const struct rte_flow_item_vxlan nic_mask = {
8920 .vni = "\xff\xff\xff",
8925 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8927 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8929 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8931 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8933 dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
8934 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
8935 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8936 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8937 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8939 dport = MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport);
8943 if ((!attr->group && !priv->sh->tunnel_header_0_1) ||
8944 (attr->group && !priv->sh->misc5_cap))
8945 vxlan_m = &rte_flow_item_vxlan_mask;
8947 vxlan_m = &nic_mask;
8949 if ((priv->sh->steering_format_version ==
8950 MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5 &&
8951 dport != MLX5_UDP_PORT_VXLAN) ||
8952 (!attr->group && !attr->transfer && !priv->sh->tunnel_header_0_1) ||
8953 ((attr->group || attr->transfer) && !priv->sh->misc5_cap)) {
8960 misc_m = MLX5_ADDR_OF(fte_match_param,
8961 matcher, misc_parameters);
8962 misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8963 size = sizeof(vxlan_m->vni);
8964 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
8965 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
8966 memcpy(vni_m, vxlan_m->vni, size);
8967 for (i = 0; i < size; ++i)
8968 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
8971 misc5_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_5);
8972 misc5_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_5);
8973 tunnel_header_v = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8976 tunnel_header_m = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8979 *tunnel_header_v = (vxlan_v->vni[0] & vxlan_m->vni[0]) |
8980 (vxlan_v->vni[1] & vxlan_m->vni[1]) << 8 |
8981 (vxlan_v->vni[2] & vxlan_m->vni[2]) << 16;
8982 if (*tunnel_header_v)
8983 *tunnel_header_m = vxlan_m->vni[0] |
8984 vxlan_m->vni[1] << 8 |
8985 vxlan_m->vni[2] << 16;
8987 *tunnel_header_m = 0x0;
8988 *tunnel_header_v |= (vxlan_v->rsvd1 & vxlan_m->rsvd1) << 24;
8989 if (vxlan_v->rsvd1 & vxlan_m->rsvd1)
8990 *tunnel_header_m |= vxlan_m->rsvd1 << 24;
8994 * Add VXLAN-GPE item to matcher and to the value.
8996 * @param[in, out] matcher
8998 * @param[in, out] key
8999 * Flow matcher value.
9001 * Flow pattern to translate.
9003 * Item is inner pattern.
9007 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
9008 const struct rte_flow_item *item, int inner)
9010 const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
9011 const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
9015 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
9017 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9023 uint8_t flags_m = 0xff;
9024 uint8_t flags_v = 0xc;
9027 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9029 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9031 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9033 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9035 dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
9036 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
9037 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9038 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9039 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9044 vxlan_m = &rte_flow_item_vxlan_gpe_mask;
9045 size = sizeof(vxlan_m->vni);
9046 vni_m = MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
9047 vni_v = MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
9048 memcpy(vni_m, vxlan_m->vni, size);
9049 for (i = 0; i < size; ++i)
9050 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
9051 if (vxlan_m->flags) {
9052 flags_m = vxlan_m->flags;
9053 flags_v = vxlan_v->flags;
9055 MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
9056 MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
9057 MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_next_protocol,
9059 MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_next_protocol,
9064 * Add Geneve item to matcher and to the value.
9066 * @param[in, out] matcher
9068 * @param[in, out] key
9069 * Flow matcher value.
9071 * Flow pattern to translate.
9073 * Item is inner pattern.
9077 flow_dv_translate_item_geneve(void *matcher, void *key,
9078 const struct rte_flow_item *item, int inner)
9080 const struct rte_flow_item_geneve *geneve_m = item->mask;
9081 const struct rte_flow_item_geneve *geneve_v = item->spec;
9084 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9085 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9094 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9096 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9098 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9100 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9102 dport = MLX5_UDP_PORT_GENEVE;
9103 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9104 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9105 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9110 geneve_m = &rte_flow_item_geneve_mask;
9111 size = sizeof(geneve_m->vni);
9112 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
9113 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
9114 memcpy(vni_m, geneve_m->vni, size);
9115 for (i = 0; i < size; ++i)
9116 vni_v[i] = vni_m[i] & geneve_v->vni[i];
9117 MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
9118 rte_be_to_cpu_16(geneve_m->protocol));
9119 MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
9120 rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
9121 gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
9122 gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
9123 MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
9124 MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9125 MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
9126 MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9127 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9128 MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9129 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9130 MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
9131 MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9135 * Create Geneve TLV option resource.
9137 * @param dev[in, out]
9138 * Pointer to rte_eth_dev structure.
9139 * @param[in, out] tag_be24
9140 * Tag value in big endian then R-shift 8.
9141 * @parm[in, out] dev_flow
9142 * Pointer to the dev_flow.
9144 * pointer to error structure.
9147 * 0 on success otherwise -errno and errno is set.
9151 flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev,
9152 const struct rte_flow_item *item,
9153 struct rte_flow_error *error)
9155 struct mlx5_priv *priv = dev->data->dev_private;
9156 struct mlx5_dev_ctx_shared *sh = priv->sh;
9157 struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
9158 sh->geneve_tlv_option_resource;
9159 struct mlx5_devx_obj *obj;
9160 const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9165 rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
9166 if (geneve_opt_resource != NULL) {
9167 if (geneve_opt_resource->option_class ==
9168 geneve_opt_v->option_class &&
9169 geneve_opt_resource->option_type ==
9170 geneve_opt_v->option_type &&
9171 geneve_opt_resource->length ==
9172 geneve_opt_v->option_len) {
9173 /* We already have GENVE TLV option obj allocated. */
9174 __atomic_fetch_add(&geneve_opt_resource->refcnt, 1,
9177 ret = rte_flow_error_set(error, ENOMEM,
9178 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9179 "Only one GENEVE TLV option supported");
9183 /* Create a GENEVE TLV object and resource. */
9184 obj = mlx5_devx_cmd_create_geneve_tlv_option(sh->ctx,
9185 geneve_opt_v->option_class,
9186 geneve_opt_v->option_type,
9187 geneve_opt_v->option_len);
9189 ret = rte_flow_error_set(error, ENODATA,
9190 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9191 "Failed to create GENEVE TLV Devx object");
9194 sh->geneve_tlv_option_resource =
9195 mlx5_malloc(MLX5_MEM_ZERO,
9196 sizeof(*geneve_opt_resource),
9198 if (!sh->geneve_tlv_option_resource) {
9199 claim_zero(mlx5_devx_cmd_destroy(obj));
9200 ret = rte_flow_error_set(error, ENOMEM,
9201 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9202 "GENEVE TLV object memory allocation failed");
9205 geneve_opt_resource = sh->geneve_tlv_option_resource;
9206 geneve_opt_resource->obj = obj;
9207 geneve_opt_resource->option_class = geneve_opt_v->option_class;
9208 geneve_opt_resource->option_type = geneve_opt_v->option_type;
9209 geneve_opt_resource->length = geneve_opt_v->option_len;
9210 __atomic_store_n(&geneve_opt_resource->refcnt, 1,
9214 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
9219 * Add Geneve TLV option item to matcher.
9221 * @param[in, out] dev
9222 * Pointer to rte_eth_dev structure.
9223 * @param[in, out] matcher
9225 * @param[in, out] key
9226 * Flow matcher value.
9228 * Flow pattern to translate.
9230 * Pointer to error structure.
9233 flow_dv_translate_item_geneve_opt(struct rte_eth_dev *dev, void *matcher,
9234 void *key, const struct rte_flow_item *item,
9235 struct rte_flow_error *error)
9237 const struct rte_flow_item_geneve_opt *geneve_opt_m = item->mask;
9238 const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9239 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9240 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9241 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9243 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9244 rte_be32_t opt_data_key = 0, opt_data_mask = 0;
9250 geneve_opt_m = &rte_flow_item_geneve_opt_mask;
9251 ret = flow_dev_geneve_tlv_option_resource_register(dev, item,
9254 DRV_LOG(ERR, "Failed to create geneve_tlv_obj");
9258 * Set the option length in GENEVE header if not requested.
9259 * The GENEVE TLV option length is expressed by the option length field
9260 * in the GENEVE header.
9261 * If the option length was not requested but the GENEVE TLV option item
9262 * is present we set the option length field implicitly.
9264 if (!MLX5_GET16(fte_match_set_misc, misc_m, geneve_opt_len)) {
9265 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9266 MLX5_GENEVE_OPTLEN_MASK);
9267 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9268 geneve_opt_v->option_len + 1);
9271 if (geneve_opt_v->data) {
9272 memcpy(&opt_data_key, geneve_opt_v->data,
9273 RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9274 sizeof(opt_data_key)));
9275 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9276 sizeof(opt_data_key));
9277 memcpy(&opt_data_mask, geneve_opt_m->data,
9278 RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9279 sizeof(opt_data_mask)));
9280 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9281 sizeof(opt_data_mask));
9282 MLX5_SET(fte_match_set_misc3, misc3_m,
9283 geneve_tlv_option_0_data,
9284 rte_be_to_cpu_32(opt_data_mask));
9285 MLX5_SET(fte_match_set_misc3, misc3_v,
9286 geneve_tlv_option_0_data,
9287 rte_be_to_cpu_32(opt_data_key & opt_data_mask));
9293 * Add MPLS item to matcher and to the value.
9295 * @param[in, out] matcher
9297 * @param[in, out] key
9298 * Flow matcher value.
9300 * Flow pattern to translate.
9301 * @param[in] prev_layer
9302 * The protocol layer indicated in previous item.
9304 * Item is inner pattern.
9307 flow_dv_translate_item_mpls(void *matcher, void *key,
9308 const struct rte_flow_item *item,
9309 uint64_t prev_layer,
9312 const uint32_t *in_mpls_m = item->mask;
9313 const uint32_t *in_mpls_v = item->spec;
9314 uint32_t *out_mpls_m = 0;
9315 uint32_t *out_mpls_v = 0;
9316 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9317 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9318 void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
9320 void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9321 void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9322 void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9324 switch (prev_layer) {
9325 case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9326 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
9327 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9328 MLX5_UDP_PORT_MPLS);
9330 case MLX5_FLOW_LAYER_GRE:
9332 case MLX5_FLOW_LAYER_GRE_KEY:
9333 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
9334 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
9335 RTE_ETHER_TYPE_MPLS);
9343 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
9344 switch (prev_layer) {
9345 case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9347 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9348 outer_first_mpls_over_udp);
9350 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9351 outer_first_mpls_over_udp);
9353 case MLX5_FLOW_LAYER_GRE:
9355 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9356 outer_first_mpls_over_gre);
9358 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9359 outer_first_mpls_over_gre);
9362 /* Inner MPLS not over GRE is not supported. */
9365 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9369 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9375 if (out_mpls_m && out_mpls_v) {
9376 *out_mpls_m = *in_mpls_m;
9377 *out_mpls_v = *in_mpls_v & *in_mpls_m;
9382 * Add metadata register item to matcher
9384 * @param[in, out] matcher
9386 * @param[in, out] key
9387 * Flow matcher value.
9388 * @param[in] reg_type
9389 * Type of device metadata register
9396 flow_dv_match_meta_reg(void *matcher, void *key,
9397 enum modify_reg reg_type,
9398 uint32_t data, uint32_t mask)
9401 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
9403 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9409 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
9410 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
9413 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
9414 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
9418 * The metadata register C0 field might be divided into
9419 * source vport index and META item value, we should set
9420 * this field according to specified mask, not as whole one.
9422 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
9424 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
9425 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
9428 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
9431 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
9432 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
9435 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
9436 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
9439 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
9440 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
9443 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
9444 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
9447 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
9448 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
9451 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
9452 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
9455 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
9456 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
9465 * Add MARK item to matcher
9468 * The device to configure through.
9469 * @param[in, out] matcher
9471 * @param[in, out] key
9472 * Flow matcher value.
9474 * Flow pattern to translate.
9477 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
9478 void *matcher, void *key,
9479 const struct rte_flow_item *item)
9481 struct mlx5_priv *priv = dev->data->dev_private;
9482 const struct rte_flow_item_mark *mark;
9486 mark = item->mask ? (const void *)item->mask :
9487 &rte_flow_item_mark_mask;
9488 mask = mark->id & priv->sh->dv_mark_mask;
9489 mark = (const void *)item->spec;
9491 value = mark->id & priv->sh->dv_mark_mask & mask;
9493 enum modify_reg reg;
9495 /* Get the metadata register index for the mark. */
9496 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
9497 MLX5_ASSERT(reg > 0);
9498 if (reg == REG_C_0) {
9499 struct mlx5_priv *priv = dev->data->dev_private;
9500 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9501 uint32_t shl_c0 = rte_bsf32(msk_c0);
9507 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9512 * Add META item to matcher
9515 * The devich to configure through.
9516 * @param[in, out] matcher
9518 * @param[in, out] key
9519 * Flow matcher value.
9521 * Attributes of flow that includes this item.
9523 * Flow pattern to translate.
9526 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
9527 void *matcher, void *key,
9528 const struct rte_flow_attr *attr,
9529 const struct rte_flow_item *item)
9531 const struct rte_flow_item_meta *meta_m;
9532 const struct rte_flow_item_meta *meta_v;
9534 meta_m = (const void *)item->mask;
9536 meta_m = &rte_flow_item_meta_mask;
9537 meta_v = (const void *)item->spec;
9540 uint32_t value = meta_v->data;
9541 uint32_t mask = meta_m->data;
9543 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
9546 MLX5_ASSERT(reg != REG_NON);
9547 if (reg == REG_C_0) {
9548 struct mlx5_priv *priv = dev->data->dev_private;
9549 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9550 uint32_t shl_c0 = rte_bsf32(msk_c0);
9556 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9561 * Add vport metadata Reg C0 item to matcher
9563 * @param[in, out] matcher
9565 * @param[in, out] key
9566 * Flow matcher value.
9568 * Flow pattern to translate.
9571 flow_dv_translate_item_meta_vport(void *matcher, void *key,
9572 uint32_t value, uint32_t mask)
9574 flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
9578 * Add tag item to matcher
9581 * The devich to configure through.
9582 * @param[in, out] matcher
9584 * @param[in, out] key
9585 * Flow matcher value.
9587 * Flow pattern to translate.
9590 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
9591 void *matcher, void *key,
9592 const struct rte_flow_item *item)
9594 const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
9595 const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
9596 uint32_t mask, value;
9599 value = tag_v->data;
9600 mask = tag_m ? tag_m->data : UINT32_MAX;
9601 if (tag_v->id == REG_C_0) {
9602 struct mlx5_priv *priv = dev->data->dev_private;
9603 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9604 uint32_t shl_c0 = rte_bsf32(msk_c0);
9610 flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
9614 * Add TAG item to matcher
9617 * The devich to configure through.
9618 * @param[in, out] matcher
9620 * @param[in, out] key
9621 * Flow matcher value.
9623 * Flow pattern to translate.
9626 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
9627 void *matcher, void *key,
9628 const struct rte_flow_item *item)
9630 const struct rte_flow_item_tag *tag_v = item->spec;
9631 const struct rte_flow_item_tag *tag_m = item->mask;
9632 enum modify_reg reg;
9635 tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
9636 /* Get the metadata register index for the tag. */
9637 reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
9638 MLX5_ASSERT(reg > 0);
9639 flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
9643 * Add source vport match to the specified matcher.
9645 * @param[in, out] matcher
9647 * @param[in, out] key
9648 * Flow matcher value.
9650 * Source vport value to match
9655 flow_dv_translate_item_source_vport(void *matcher, void *key,
9656 int16_t port, uint16_t mask)
9658 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9659 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9661 MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
9662 MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
9666 * Translate port-id item to eswitch match on port-id.
9669 * The devich to configure through.
9670 * @param[in, out] matcher
9672 * @param[in, out] key
9673 * Flow matcher value.
9675 * Flow pattern to translate.
9680 * 0 on success, a negative errno value otherwise.
9683 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
9684 void *key, const struct rte_flow_item *item,
9685 const struct rte_flow_attr *attr)
9687 const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
9688 const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
9689 struct mlx5_priv *priv;
9692 mask = pid_m ? pid_m->id : 0xffff;
9693 id = pid_v ? pid_v->id : dev->data->port_id;
9694 priv = mlx5_port_to_eswitch_info(id, item == NULL);
9698 * Translate to vport field or to metadata, depending on mode.
9699 * Kernel can use either misc.source_port or half of C0 metadata
9702 if (priv->vport_meta_mask) {
9704 * Provide the hint for SW steering library
9705 * to insert the flow into ingress domain and
9706 * save the extra vport match.
9708 if (mask == 0xffff && priv->vport_id == 0xffff &&
9709 priv->pf_bond < 0 && attr->transfer)
9710 flow_dv_translate_item_source_vport
9711 (matcher, key, priv->vport_id, mask);
9713 * We should always set the vport metadata register,
9714 * otherwise the SW steering library can drop
9715 * the rule if wire vport metadata value is not zero,
9716 * it depends on kernel configuration.
9718 flow_dv_translate_item_meta_vport(matcher, key,
9719 priv->vport_meta_tag,
9720 priv->vport_meta_mask);
9722 flow_dv_translate_item_source_vport(matcher, key,
9723 priv->vport_id, mask);
9729 * Add ICMP6 item to matcher and to the value.
9731 * @param[in, out] matcher
9733 * @param[in, out] key
9734 * Flow matcher value.
9736 * Flow pattern to translate.
9738 * Item is inner pattern.
9741 flow_dv_translate_item_icmp6(void *matcher, void *key,
9742 const struct rte_flow_item *item,
9745 const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
9746 const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
9749 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9751 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9753 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9755 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9757 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9759 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9761 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9762 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
9766 icmp6_m = &rte_flow_item_icmp6_mask;
9767 MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
9768 MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
9769 icmp6_v->type & icmp6_m->type);
9770 MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
9771 MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
9772 icmp6_v->code & icmp6_m->code);
9776 * Add ICMP item to matcher and to the value.
9778 * @param[in, out] matcher
9780 * @param[in, out] key
9781 * Flow matcher value.
9783 * Flow pattern to translate.
9785 * Item is inner pattern.
9788 flow_dv_translate_item_icmp(void *matcher, void *key,
9789 const struct rte_flow_item *item,
9792 const struct rte_flow_item_icmp *icmp_m = item->mask;
9793 const struct rte_flow_item_icmp *icmp_v = item->spec;
9794 uint32_t icmp_header_data_m = 0;
9795 uint32_t icmp_header_data_v = 0;
9798 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9800 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9802 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9804 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9806 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9808 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9810 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9811 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
9815 icmp_m = &rte_flow_item_icmp_mask;
9816 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
9817 icmp_m->hdr.icmp_type);
9818 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
9819 icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
9820 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
9821 icmp_m->hdr.icmp_code);
9822 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
9823 icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
9824 icmp_header_data_m = rte_be_to_cpu_16(icmp_m->hdr.icmp_seq_nb);
9825 icmp_header_data_m |= rte_be_to_cpu_16(icmp_m->hdr.icmp_ident) << 16;
9826 if (icmp_header_data_m) {
9827 icmp_header_data_v = rte_be_to_cpu_16(icmp_v->hdr.icmp_seq_nb);
9828 icmp_header_data_v |=
9829 rte_be_to_cpu_16(icmp_v->hdr.icmp_ident) << 16;
9830 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_header_data,
9831 icmp_header_data_m);
9832 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_header_data,
9833 icmp_header_data_v & icmp_header_data_m);
9838 * Add GTP item to matcher and to the value.
9840 * @param[in, out] matcher
9842 * @param[in, out] key
9843 * Flow matcher value.
9845 * Flow pattern to translate.
9847 * Item is inner pattern.
9850 flow_dv_translate_item_gtp(void *matcher, void *key,
9851 const struct rte_flow_item *item, int inner)
9853 const struct rte_flow_item_gtp *gtp_m = item->mask;
9854 const struct rte_flow_item_gtp *gtp_v = item->spec;
9857 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9859 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9860 uint16_t dport = RTE_GTPU_UDP_PORT;
9863 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9865 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9867 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9869 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9871 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9872 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9873 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9878 gtp_m = &rte_flow_item_gtp_mask;
9879 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags,
9880 gtp_m->v_pt_rsv_flags);
9881 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags,
9882 gtp_v->v_pt_rsv_flags & gtp_m->v_pt_rsv_flags);
9883 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
9884 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
9885 gtp_v->msg_type & gtp_m->msg_type);
9886 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
9887 rte_be_to_cpu_32(gtp_m->teid));
9888 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
9889 rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
9893 * Add GTP PSC item to matcher.
9895 * @param[in, out] matcher
9897 * @param[in, out] key
9898 * Flow matcher value.
9900 * Flow pattern to translate.
9903 flow_dv_translate_item_gtp_psc(void *matcher, void *key,
9904 const struct rte_flow_item *item)
9906 const struct rte_flow_item_gtp_psc *gtp_psc_m = item->mask;
9907 const struct rte_flow_item_gtp_psc *gtp_psc_v = item->spec;
9908 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9910 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9916 uint8_t next_ext_header_type;
9921 /* Always set E-flag match on one, regardless of GTP item settings. */
9922 gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_m, gtpu_msg_flags);
9923 gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9924 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags, gtp_flags);
9925 gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_v, gtpu_msg_flags);
9926 gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9927 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags, gtp_flags);
9928 /*Set next extension header type. */
9931 dw_2.next_ext_header_type = 0xff;
9932 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_dw_2,
9933 rte_cpu_to_be_32(dw_2.w32));
9936 dw_2.next_ext_header_type = 0x85;
9937 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_dw_2,
9938 rte_cpu_to_be_32(dw_2.w32));
9950 /*Set extension header PDU type and Qos. */
9952 gtp_psc_m = &rte_flow_item_gtp_psc_mask;
9954 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_m->pdu_type);
9955 dw_0.qfi = gtp_psc_m->qfi;
9956 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_first_ext_dw_0,
9957 rte_cpu_to_be_32(dw_0.w32));
9959 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_v->pdu_type &
9960 gtp_psc_m->pdu_type);
9961 dw_0.qfi = gtp_psc_v->qfi & gtp_psc_m->qfi;
9962 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_first_ext_dw_0,
9963 rte_cpu_to_be_32(dw_0.w32));
9969 * Add eCPRI item to matcher and to the value.
9972 * The devich to configure through.
9973 * @param[in, out] matcher
9975 * @param[in, out] key
9976 * Flow matcher value.
9978 * Flow pattern to translate.
9979 * @param[in] samples
9980 * Sample IDs to be used in the matching.
9983 flow_dv_translate_item_ecpri(struct rte_eth_dev *dev, void *matcher,
9984 void *key, const struct rte_flow_item *item)
9986 struct mlx5_priv *priv = dev->data->dev_private;
9987 const struct rte_flow_item_ecpri *ecpri_m = item->mask;
9988 const struct rte_flow_item_ecpri *ecpri_v = item->spec;
9989 struct rte_ecpri_common_hdr common;
9990 void *misc4_m = MLX5_ADDR_OF(fte_match_param, matcher,
9992 void *misc4_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_4);
10000 ecpri_m = &rte_flow_item_ecpri_mask;
10002 * Maximal four DW samples are supported in a single matching now.
10003 * Two are used now for a eCPRI matching:
10004 * 1. Type: one byte, mask should be 0x00ff0000 in network order
10005 * 2. ID of a message: one or two bytes, mask 0xffff0000 or 0xff000000
10008 if (!ecpri_m->hdr.common.u32)
10010 samples = priv->sh->fp[MLX5_FLEX_PARSER_ECPRI_0].ids;
10011 /* Need to take the whole DW as the mask to fill the entry. */
10012 dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
10013 prog_sample_field_value_0);
10014 dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
10015 prog_sample_field_value_0);
10016 /* Already big endian (network order) in the header. */
10017 *(uint32_t *)dw_m = ecpri_m->hdr.common.u32;
10018 *(uint32_t *)dw_v = ecpri_v->hdr.common.u32 & ecpri_m->hdr.common.u32;
10019 /* Sample#0, used for matching type, offset 0. */
10020 MLX5_SET(fte_match_set_misc4, misc4_m,
10021 prog_sample_field_id_0, samples[0]);
10022 /* It makes no sense to set the sample ID in the mask field. */
10023 MLX5_SET(fte_match_set_misc4, misc4_v,
10024 prog_sample_field_id_0, samples[0]);
10026 * Checking if message body part needs to be matched.
10027 * Some wildcard rules only matching type field should be supported.
10029 if (ecpri_m->hdr.dummy[0]) {
10030 common.u32 = rte_be_to_cpu_32(ecpri_v->hdr.common.u32);
10031 switch (common.type) {
10032 case RTE_ECPRI_MSG_TYPE_IQ_DATA:
10033 case RTE_ECPRI_MSG_TYPE_RTC_CTRL:
10034 case RTE_ECPRI_MSG_TYPE_DLY_MSR:
10035 dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
10036 prog_sample_field_value_1);
10037 dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
10038 prog_sample_field_value_1);
10039 *(uint32_t *)dw_m = ecpri_m->hdr.dummy[0];
10040 *(uint32_t *)dw_v = ecpri_v->hdr.dummy[0] &
10041 ecpri_m->hdr.dummy[0];
10042 /* Sample#1, to match message body, offset 4. */
10043 MLX5_SET(fte_match_set_misc4, misc4_m,
10044 prog_sample_field_id_1, samples[1]);
10045 MLX5_SET(fte_match_set_misc4, misc4_v,
10046 prog_sample_field_id_1, samples[1]);
10049 /* Others, do not match any sample ID. */
10056 * Add connection tracking status item to matcher
10059 * The devich to configure through.
10060 * @param[in, out] matcher
10062 * @param[in, out] key
10063 * Flow matcher value.
10065 * Flow pattern to translate.
10068 flow_dv_translate_item_aso_ct(struct rte_eth_dev *dev,
10069 void *matcher, void *key,
10070 const struct rte_flow_item *item)
10072 uint32_t reg_value = 0;
10074 /* 8LSB 0b 11/0000/11, middle 4 bits are reserved. */
10075 uint32_t reg_mask = 0;
10076 const struct rte_flow_item_conntrack *spec = item->spec;
10077 const struct rte_flow_item_conntrack *mask = item->mask;
10079 struct rte_flow_error error;
10082 mask = &rte_flow_item_conntrack_mask;
10083 if (!spec || !mask->flags)
10085 flags = spec->flags & mask->flags;
10086 /* The conflict should be checked in the validation. */
10087 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID)
10088 reg_value |= MLX5_CT_SYNDROME_VALID;
10089 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10090 reg_value |= MLX5_CT_SYNDROME_STATE_CHANGE;
10091 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID)
10092 reg_value |= MLX5_CT_SYNDROME_INVALID;
10093 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)
10094 reg_value |= MLX5_CT_SYNDROME_TRAP;
10095 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10096 reg_value |= MLX5_CT_SYNDROME_BAD_PACKET;
10097 if (mask->flags & (RTE_FLOW_CONNTRACK_PKT_STATE_VALID |
10098 RTE_FLOW_CONNTRACK_PKT_STATE_INVALID |
10099 RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED))
10101 if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10102 reg_mask |= MLX5_CT_SYNDROME_STATE_CHANGE;
10103 if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10104 reg_mask |= MLX5_CT_SYNDROME_BAD_PACKET;
10105 /* The REG_C_x value could be saved during startup. */
10106 reg_id = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, &error);
10107 if (reg_id == REG_NON)
10109 flow_dv_match_meta_reg(matcher, key, (enum modify_reg)reg_id,
10110 reg_value, reg_mask);
10113 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
10115 #define HEADER_IS_ZERO(match_criteria, headers) \
10116 !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers), \
10117 matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
10120 * Calculate flow matcher enable bitmap.
10122 * @param match_criteria
10123 * Pointer to flow matcher criteria.
10126 * Bitmap of enabled fields.
10129 flow_dv_matcher_enable(uint32_t *match_criteria)
10131 uint8_t match_criteria_enable;
10133 match_criteria_enable =
10134 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
10135 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
10136 match_criteria_enable |=
10137 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
10138 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
10139 match_criteria_enable |=
10140 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
10141 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
10142 match_criteria_enable |=
10143 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
10144 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
10145 match_criteria_enable |=
10146 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
10147 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
10148 match_criteria_enable |=
10149 (!HEADER_IS_ZERO(match_criteria, misc_parameters_4)) <<
10150 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT;
10151 match_criteria_enable |=
10152 (!HEADER_IS_ZERO(match_criteria, misc_parameters_5)) <<
10153 MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT;
10154 return match_criteria_enable;
10158 __flow_dv_adjust_buf_size(size_t *size, uint8_t match_criteria)
10161 * Check flow matching criteria first, subtract misc5/4 length if flow
10162 * doesn't own misc5/4 parameters. In some old rdma-core releases,
10163 * misc5/4 are not supported, and matcher creation failure is expected
10164 * w/o subtration. If misc5 is provided, misc4 must be counted in since
10165 * misc5 is right after misc4.
10167 if (!(match_criteria & (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT))) {
10168 *size = MLX5_ST_SZ_BYTES(fte_match_param) -
10169 MLX5_ST_SZ_BYTES(fte_match_set_misc5);
10170 if (!(match_criteria & (1 <<
10171 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT))) {
10172 *size -= MLX5_ST_SZ_BYTES(fte_match_set_misc4);
10177 static struct mlx5_list_entry *
10178 flow_dv_matcher_clone_cb(void *tool_ctx __rte_unused,
10179 struct mlx5_list_entry *entry, void *cb_ctx)
10181 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10182 struct mlx5_flow_dv_matcher *ref = ctx->data;
10183 struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10184 typeof(*tbl), tbl);
10185 struct mlx5_flow_dv_matcher *resource = mlx5_malloc(MLX5_MEM_ANY,
10190 rte_flow_error_set(ctx->error, ENOMEM,
10191 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10192 "cannot create matcher");
10195 memcpy(resource, entry, sizeof(*resource));
10196 resource->tbl = &tbl->tbl;
10197 return &resource->entry;
10201 flow_dv_matcher_clone_free_cb(void *tool_ctx __rte_unused,
10202 struct mlx5_list_entry *entry)
10207 struct mlx5_list_entry *
10208 flow_dv_tbl_create_cb(void *tool_ctx, void *cb_ctx)
10210 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10211 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10212 struct rte_eth_dev *dev = ctx->dev;
10213 struct mlx5_flow_tbl_data_entry *tbl_data;
10214 struct mlx5_flow_tbl_tunnel_prm *tt_prm = ctx->data2;
10215 struct rte_flow_error *error = ctx->error;
10216 union mlx5_flow_tbl_key key = { .v64 = *(uint64_t *)(ctx->data) };
10217 struct mlx5_flow_tbl_resource *tbl;
10222 tbl_data = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10224 rte_flow_error_set(error, ENOMEM,
10225 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10227 "cannot allocate flow table data entry");
10230 tbl_data->idx = idx;
10231 tbl_data->tunnel = tt_prm->tunnel;
10232 tbl_data->group_id = tt_prm->group_id;
10233 tbl_data->external = !!tt_prm->external;
10234 tbl_data->tunnel_offload = is_tunnel_offload_active(dev);
10235 tbl_data->is_egress = !!key.is_egress;
10236 tbl_data->is_transfer = !!key.is_fdb;
10237 tbl_data->dummy = !!key.dummy;
10238 tbl_data->level = key.level;
10239 tbl_data->id = key.id;
10240 tbl = &tbl_data->tbl;
10242 return &tbl_data->entry;
10244 domain = sh->fdb_domain;
10245 else if (key.is_egress)
10246 domain = sh->tx_domain;
10248 domain = sh->rx_domain;
10249 ret = mlx5_flow_os_create_flow_tbl(domain, key.level, &tbl->obj);
10251 rte_flow_error_set(error, ENOMEM,
10252 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10253 NULL, "cannot create flow table object");
10254 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10257 if (key.level != 0) {
10258 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
10259 (tbl->obj, &tbl_data->jump.action);
10261 rte_flow_error_set(error, ENOMEM,
10262 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10264 "cannot create flow jump action");
10265 mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10266 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10270 MKSTR(matcher_name, "%s_%s_%u_%u_matcher_list",
10271 key.is_fdb ? "FDB" : "NIC", key.is_egress ? "egress" : "ingress",
10272 key.level, key.id);
10273 tbl_data->matchers = mlx5_list_create(matcher_name, sh, true,
10274 flow_dv_matcher_create_cb,
10275 flow_dv_matcher_match_cb,
10276 flow_dv_matcher_remove_cb,
10277 flow_dv_matcher_clone_cb,
10278 flow_dv_matcher_clone_free_cb);
10279 if (!tbl_data->matchers) {
10280 rte_flow_error_set(error, ENOMEM,
10281 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10283 "cannot create tbl matcher list");
10284 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10285 mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10286 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10289 return &tbl_data->entry;
10293 flow_dv_tbl_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10296 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10297 struct mlx5_flow_tbl_data_entry *tbl_data =
10298 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10299 union mlx5_flow_tbl_key key = { .v64 = *(uint64_t *)(ctx->data) };
10301 return tbl_data->level != key.level ||
10302 tbl_data->id != key.id ||
10303 tbl_data->dummy != key.dummy ||
10304 tbl_data->is_transfer != !!key.is_fdb ||
10305 tbl_data->is_egress != !!key.is_egress;
10308 struct mlx5_list_entry *
10309 flow_dv_tbl_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10312 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10313 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10314 struct mlx5_flow_tbl_data_entry *tbl_data;
10315 struct rte_flow_error *error = ctx->error;
10318 tbl_data = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10320 rte_flow_error_set(error, ENOMEM,
10321 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10323 "cannot allocate flow table data entry");
10326 memcpy(tbl_data, oentry, sizeof(*tbl_data));
10327 tbl_data->idx = idx;
10328 return &tbl_data->entry;
10332 flow_dv_tbl_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10334 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10335 struct mlx5_flow_tbl_data_entry *tbl_data =
10336 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10338 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10342 * Get a flow table.
10344 * @param[in, out] dev
10345 * Pointer to rte_eth_dev structure.
10346 * @param[in] table_level
10347 * Table level to use.
10348 * @param[in] egress
10349 * Direction of the table.
10350 * @param[in] transfer
10351 * E-Switch or NIC flow.
10353 * Dummy entry for dv API.
10354 * @param[in] table_id
10356 * @param[out] error
10357 * pointer to error structure.
10360 * Returns tables resource based on the index, NULL in case of failed.
10362 struct mlx5_flow_tbl_resource *
10363 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
10364 uint32_t table_level, uint8_t egress,
10367 const struct mlx5_flow_tunnel *tunnel,
10368 uint32_t group_id, uint8_t dummy,
10370 struct rte_flow_error *error)
10372 struct mlx5_priv *priv = dev->data->dev_private;
10373 union mlx5_flow_tbl_key table_key = {
10375 .level = table_level,
10379 .is_fdb = !!transfer,
10380 .is_egress = !!egress,
10383 struct mlx5_flow_tbl_tunnel_prm tt_prm = {
10385 .group_id = group_id,
10386 .external = external,
10388 struct mlx5_flow_cb_ctx ctx = {
10391 .data = &table_key.v64,
10394 struct mlx5_list_entry *entry;
10395 struct mlx5_flow_tbl_data_entry *tbl_data;
10397 entry = mlx5_hlist_register(priv->sh->flow_tbls, table_key.v64, &ctx);
10399 rte_flow_error_set(error, ENOMEM,
10400 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10401 "cannot get table");
10404 DRV_LOG(DEBUG, "table_level %u table_id %u "
10405 "tunnel %u group %u registered.",
10406 table_level, table_id,
10407 tunnel ? tunnel->tunnel_id : 0, group_id);
10408 tbl_data = container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10409 return &tbl_data->tbl;
10413 flow_dv_tbl_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10415 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10416 struct mlx5_flow_tbl_data_entry *tbl_data =
10417 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10419 MLX5_ASSERT(entry && sh);
10420 if (tbl_data->jump.action)
10421 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10422 if (tbl_data->tbl.obj)
10423 mlx5_flow_os_destroy_flow_tbl(tbl_data->tbl.obj);
10424 if (tbl_data->tunnel_offload && tbl_data->external) {
10425 struct mlx5_list_entry *he;
10426 struct mlx5_hlist *tunnel_grp_hash;
10427 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
10428 union tunnel_tbl_key tunnel_key = {
10429 .tunnel_id = tbl_data->tunnel ?
10430 tbl_data->tunnel->tunnel_id : 0,
10431 .group = tbl_data->group_id
10433 uint32_t table_level = tbl_data->level;
10434 struct mlx5_flow_cb_ctx ctx = {
10435 .data = (void *)&tunnel_key.val,
10438 tunnel_grp_hash = tbl_data->tunnel ?
10439 tbl_data->tunnel->groups :
10441 he = mlx5_hlist_lookup(tunnel_grp_hash, tunnel_key.val, &ctx);
10443 mlx5_hlist_unregister(tunnel_grp_hash, he);
10445 "table_level %u id %u tunnel %u group %u released.",
10449 tbl_data->tunnel->tunnel_id : 0,
10450 tbl_data->group_id);
10452 mlx5_list_destroy(tbl_data->matchers);
10453 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10457 * Release a flow table.
10460 * Pointer to device shared structure.
10462 * Table resource to be released.
10465 * Returns 0 if table was released, else return 1;
10468 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
10469 struct mlx5_flow_tbl_resource *tbl)
10471 struct mlx5_flow_tbl_data_entry *tbl_data =
10472 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10476 return mlx5_hlist_unregister(sh->flow_tbls, &tbl_data->entry);
10480 flow_dv_matcher_match_cb(void *tool_ctx __rte_unused,
10481 struct mlx5_list_entry *entry, void *cb_ctx)
10483 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10484 struct mlx5_flow_dv_matcher *ref = ctx->data;
10485 struct mlx5_flow_dv_matcher *cur = container_of(entry, typeof(*cur),
10488 return cur->crc != ref->crc ||
10489 cur->priority != ref->priority ||
10490 memcmp((const void *)cur->mask.buf,
10491 (const void *)ref->mask.buf, ref->mask.size);
10494 struct mlx5_list_entry *
10495 flow_dv_matcher_create_cb(void *tool_ctx, void *cb_ctx)
10497 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10498 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10499 struct mlx5_flow_dv_matcher *ref = ctx->data;
10500 struct mlx5_flow_dv_matcher *resource;
10501 struct mlx5dv_flow_matcher_attr dv_attr = {
10502 .type = IBV_FLOW_ATTR_NORMAL,
10503 .match_mask = (void *)&ref->mask,
10505 struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10506 typeof(*tbl), tbl);
10509 resource = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*resource), 0,
10512 rte_flow_error_set(ctx->error, ENOMEM,
10513 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10514 "cannot create matcher");
10518 dv_attr.match_criteria_enable =
10519 flow_dv_matcher_enable(resource->mask.buf);
10520 __flow_dv_adjust_buf_size(&ref->mask.size,
10521 dv_attr.match_criteria_enable);
10522 dv_attr.priority = ref->priority;
10523 if (tbl->is_egress)
10524 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
10525 ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->tbl.obj,
10526 &resource->matcher_object);
10528 mlx5_free(resource);
10529 rte_flow_error_set(ctx->error, ENOMEM,
10530 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10531 "cannot create matcher");
10534 return &resource->entry;
10538 * Register the flow matcher.
10540 * @param[in, out] dev
10541 * Pointer to rte_eth_dev structure.
10542 * @param[in, out] matcher
10543 * Pointer to flow matcher.
10544 * @param[in, out] key
10545 * Pointer to flow table key.
10546 * @parm[in, out] dev_flow
10547 * Pointer to the dev_flow.
10548 * @param[out] error
10549 * pointer to error structure.
10552 * 0 on success otherwise -errno and errno is set.
10555 flow_dv_matcher_register(struct rte_eth_dev *dev,
10556 struct mlx5_flow_dv_matcher *ref,
10557 union mlx5_flow_tbl_key *key,
10558 struct mlx5_flow *dev_flow,
10559 const struct mlx5_flow_tunnel *tunnel,
10561 struct rte_flow_error *error)
10563 struct mlx5_list_entry *entry;
10564 struct mlx5_flow_dv_matcher *resource;
10565 struct mlx5_flow_tbl_resource *tbl;
10566 struct mlx5_flow_tbl_data_entry *tbl_data;
10567 struct mlx5_flow_cb_ctx ctx = {
10572 * tunnel offload API requires this registration for cases when
10573 * tunnel match rule was inserted before tunnel set rule.
10575 tbl = flow_dv_tbl_resource_get(dev, key->level,
10576 key->is_egress, key->is_fdb,
10577 dev_flow->external, tunnel,
10578 group_id, 0, key->id, error);
10580 return -rte_errno; /* No need to refill the error info */
10581 tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10583 entry = mlx5_list_register(tbl_data->matchers, &ctx);
10585 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
10586 return rte_flow_error_set(error, ENOMEM,
10587 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10588 "cannot allocate ref memory");
10590 resource = container_of(entry, typeof(*resource), entry);
10591 dev_flow->handle->dvh.matcher = resource;
10595 struct mlx5_list_entry *
10596 flow_dv_tag_create_cb(void *tool_ctx, void *cb_ctx)
10598 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10599 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10600 struct mlx5_flow_dv_tag_resource *entry;
10604 entry = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10606 rte_flow_error_set(ctx->error, ENOMEM,
10607 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10608 "cannot allocate resource memory");
10612 entry->tag_id = *(uint32_t *)(ctx->data);
10613 ret = mlx5_flow_os_create_flow_action_tag(entry->tag_id,
10616 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], idx);
10617 rte_flow_error_set(ctx->error, ENOMEM,
10618 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10619 NULL, "cannot create action");
10622 return &entry->entry;
10626 flow_dv_tag_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10629 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10630 struct mlx5_flow_dv_tag_resource *tag =
10631 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10633 return *(uint32_t *)(ctx->data) != tag->tag_id;
10636 struct mlx5_list_entry *
10637 flow_dv_tag_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10640 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10641 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10642 struct mlx5_flow_dv_tag_resource *entry;
10645 entry = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10647 rte_flow_error_set(ctx->error, ENOMEM,
10648 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10649 "cannot allocate tag resource memory");
10652 memcpy(entry, oentry, sizeof(*entry));
10654 return &entry->entry;
10658 flow_dv_tag_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10660 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10661 struct mlx5_flow_dv_tag_resource *tag =
10662 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10664 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10668 * Find existing tag resource or create and register a new one.
10670 * @param dev[in, out]
10671 * Pointer to rte_eth_dev structure.
10672 * @param[in, out] tag_be24
10673 * Tag value in big endian then R-shift 8.
10674 * @parm[in, out] dev_flow
10675 * Pointer to the dev_flow.
10676 * @param[out] error
10677 * pointer to error structure.
10680 * 0 on success otherwise -errno and errno is set.
10683 flow_dv_tag_resource_register
10684 (struct rte_eth_dev *dev,
10686 struct mlx5_flow *dev_flow,
10687 struct rte_flow_error *error)
10689 struct mlx5_priv *priv = dev->data->dev_private;
10690 struct mlx5_flow_dv_tag_resource *resource;
10691 struct mlx5_list_entry *entry;
10692 struct mlx5_flow_cb_ctx ctx = {
10696 struct mlx5_hlist *tag_table;
10698 tag_table = flow_dv_hlist_prepare(priv->sh, &priv->sh->tag_table,
10700 MLX5_TAGS_HLIST_ARRAY_SIZE,
10701 false, false, priv->sh,
10702 flow_dv_tag_create_cb,
10703 flow_dv_tag_match_cb,
10704 flow_dv_tag_remove_cb,
10705 flow_dv_tag_clone_cb,
10706 flow_dv_tag_clone_free_cb);
10707 if (unlikely(!tag_table))
10709 entry = mlx5_hlist_register(tag_table, tag_be24, &ctx);
10711 resource = container_of(entry, struct mlx5_flow_dv_tag_resource,
10713 dev_flow->handle->dvh.rix_tag = resource->idx;
10714 dev_flow->dv.tag_resource = resource;
10721 flow_dv_tag_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10723 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10724 struct mlx5_flow_dv_tag_resource *tag =
10725 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10727 MLX5_ASSERT(tag && sh && tag->action);
10728 claim_zero(mlx5_flow_os_destroy_flow_action(tag->action));
10729 DRV_LOG(DEBUG, "Tag %p: removed.", (void *)tag);
10730 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10737 * Pointer to Ethernet device.
10742 * 1 while a reference on it exists, 0 when freed.
10745 flow_dv_tag_release(struct rte_eth_dev *dev,
10748 struct mlx5_priv *priv = dev->data->dev_private;
10749 struct mlx5_flow_dv_tag_resource *tag;
10751 tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG], tag_idx);
10754 DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
10755 dev->data->port_id, (void *)tag, tag->entry.ref_cnt);
10756 return mlx5_hlist_unregister(priv->sh->tag_table, &tag->entry);
10760 * Translate port ID action to vport.
10763 * Pointer to rte_eth_dev structure.
10764 * @param[in] action
10765 * Pointer to the port ID action.
10766 * @param[out] dst_port_id
10767 * The target port ID.
10768 * @param[out] error
10769 * Pointer to the error structure.
10772 * 0 on success, a negative errno value otherwise and rte_errno is set.
10775 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
10776 const struct rte_flow_action *action,
10777 uint32_t *dst_port_id,
10778 struct rte_flow_error *error)
10781 struct mlx5_priv *priv;
10782 const struct rte_flow_action_port_id *conf =
10783 (const struct rte_flow_action_port_id *)action->conf;
10785 port = conf->original ? dev->data->port_id : conf->id;
10786 priv = mlx5_port_to_eswitch_info(port, false);
10788 return rte_flow_error_set(error, -rte_errno,
10789 RTE_FLOW_ERROR_TYPE_ACTION,
10791 "No eswitch info was found for port");
10792 #ifdef HAVE_MLX5DV_DR_CREATE_DEST_IB_PORT
10794 * This parameter is transferred to
10795 * mlx5dv_dr_action_create_dest_ib_port().
10797 *dst_port_id = priv->dev_port;
10800 * Legacy mode, no LAG configurations is supported.
10801 * This parameter is transferred to
10802 * mlx5dv_dr_action_create_dest_vport().
10804 *dst_port_id = priv->vport_id;
10810 * Create a counter with aging configuration.
10813 * Pointer to rte_eth_dev structure.
10814 * @param[in] dev_flow
10815 * Pointer to the mlx5_flow.
10816 * @param[out] count
10817 * Pointer to the counter action configuration.
10819 * Pointer to the aging action configuration.
10822 * Index to flow counter on success, 0 otherwise.
10825 flow_dv_translate_create_counter(struct rte_eth_dev *dev,
10826 struct mlx5_flow *dev_flow,
10827 const struct rte_flow_action_count *count,
10828 const struct rte_flow_action_age *age)
10831 struct mlx5_age_param *age_param;
10833 if (count && count->shared)
10834 counter = flow_dv_counter_get_shared(dev, count->id);
10836 counter = flow_dv_counter_alloc(dev, !!age);
10837 if (!counter || age == NULL)
10839 age_param = flow_dv_counter_idx_get_age(dev, counter);
10840 age_param->context = age->context ? age->context :
10841 (void *)(uintptr_t)(dev_flow->flow_idx);
10842 age_param->timeout = age->timeout;
10843 age_param->port_id = dev->data->port_id;
10844 __atomic_store_n(&age_param->sec_since_last_hit, 0, __ATOMIC_RELAXED);
10845 __atomic_store_n(&age_param->state, AGE_CANDIDATE, __ATOMIC_RELAXED);
10850 * Add Tx queue matcher
10853 * Pointer to the dev struct.
10854 * @param[in, out] matcher
10856 * @param[in, out] key
10857 * Flow matcher value.
10859 * Flow pattern to translate.
10861 * Item is inner pattern.
10864 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
10865 void *matcher, void *key,
10866 const struct rte_flow_item *item)
10868 const struct mlx5_rte_flow_item_tx_queue *queue_m;
10869 const struct mlx5_rte_flow_item_tx_queue *queue_v;
10871 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
10873 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
10874 struct mlx5_txq_ctrl *txq;
10878 queue_m = (const void *)item->mask;
10881 queue_v = (const void *)item->spec;
10884 txq = mlx5_txq_get(dev, queue_v->queue);
10887 queue = txq->obj->sq->id;
10888 MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
10889 MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
10890 queue & queue_m->queue);
10891 mlx5_txq_release(dev, queue_v->queue);
10895 * Set the hash fields according to the @p flow information.
10897 * @param[in] dev_flow
10898 * Pointer to the mlx5_flow.
10899 * @param[in] rss_desc
10900 * Pointer to the mlx5_flow_rss_desc.
10903 flow_dv_hashfields_set(struct mlx5_flow *dev_flow,
10904 struct mlx5_flow_rss_desc *rss_desc)
10906 uint64_t items = dev_flow->handle->layers;
10908 uint64_t rss_types = rte_eth_rss_hf_refine(rss_desc->types);
10910 dev_flow->hash_fields = 0;
10911 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
10912 if (rss_desc->level >= 2)
10915 if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
10916 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
10917 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
10918 if (rss_types & ETH_RSS_L3_SRC_ONLY)
10919 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
10920 else if (rss_types & ETH_RSS_L3_DST_ONLY)
10921 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
10923 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
10925 } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
10926 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
10927 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
10928 if (rss_types & ETH_RSS_L3_SRC_ONLY)
10929 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
10930 else if (rss_types & ETH_RSS_L3_DST_ONLY)
10931 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
10933 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
10936 if (dev_flow->hash_fields == 0)
10938 * There is no match between the RSS types and the
10939 * L3 protocol (IPv4/IPv6) defined in the flow rule.
10942 if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
10943 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
10944 if (rss_types & ETH_RSS_UDP) {
10945 if (rss_types & ETH_RSS_L4_SRC_ONLY)
10946 dev_flow->hash_fields |=
10947 IBV_RX_HASH_SRC_PORT_UDP;
10948 else if (rss_types & ETH_RSS_L4_DST_ONLY)
10949 dev_flow->hash_fields |=
10950 IBV_RX_HASH_DST_PORT_UDP;
10952 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
10954 } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
10955 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
10956 if (rss_types & ETH_RSS_TCP) {
10957 if (rss_types & ETH_RSS_L4_SRC_ONLY)
10958 dev_flow->hash_fields |=
10959 IBV_RX_HASH_SRC_PORT_TCP;
10960 else if (rss_types & ETH_RSS_L4_DST_ONLY)
10961 dev_flow->hash_fields |=
10962 IBV_RX_HASH_DST_PORT_TCP;
10964 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
10968 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
10972 * Prepare an Rx Hash queue.
10975 * Pointer to Ethernet device.
10976 * @param[in] dev_flow
10977 * Pointer to the mlx5_flow.
10978 * @param[in] rss_desc
10979 * Pointer to the mlx5_flow_rss_desc.
10980 * @param[out] hrxq_idx
10981 * Hash Rx queue index.
10984 * The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
10986 static struct mlx5_hrxq *
10987 flow_dv_hrxq_prepare(struct rte_eth_dev *dev,
10988 struct mlx5_flow *dev_flow,
10989 struct mlx5_flow_rss_desc *rss_desc,
10990 uint32_t *hrxq_idx)
10992 struct mlx5_priv *priv = dev->data->dev_private;
10993 struct mlx5_flow_handle *dh = dev_flow->handle;
10994 struct mlx5_hrxq *hrxq;
10996 MLX5_ASSERT(rss_desc->queue_num);
10997 rss_desc->key_len = MLX5_RSS_HASH_KEY_LEN;
10998 rss_desc->hash_fields = dev_flow->hash_fields;
10999 rss_desc->tunnel = !!(dh->layers & MLX5_FLOW_LAYER_TUNNEL);
11000 rss_desc->shared_rss = 0;
11001 if (rss_desc->hash_fields == 0)
11002 rss_desc->queue_num = 1;
11003 *hrxq_idx = mlx5_hrxq_get(dev, rss_desc);
11006 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
11012 * Release sample sub action resource.
11014 * @param[in, out] dev
11015 * Pointer to rte_eth_dev structure.
11016 * @param[in] act_res
11017 * Pointer to sample sub action resource.
11020 flow_dv_sample_sub_actions_release(struct rte_eth_dev *dev,
11021 struct mlx5_flow_sub_actions_idx *act_res)
11023 if (act_res->rix_hrxq) {
11024 mlx5_hrxq_release(dev, act_res->rix_hrxq);
11025 act_res->rix_hrxq = 0;
11027 if (act_res->rix_encap_decap) {
11028 flow_dv_encap_decap_resource_release(dev,
11029 act_res->rix_encap_decap);
11030 act_res->rix_encap_decap = 0;
11032 if (act_res->rix_port_id_action) {
11033 flow_dv_port_id_action_resource_release(dev,
11034 act_res->rix_port_id_action);
11035 act_res->rix_port_id_action = 0;
11037 if (act_res->rix_tag) {
11038 flow_dv_tag_release(dev, act_res->rix_tag);
11039 act_res->rix_tag = 0;
11041 if (act_res->rix_jump) {
11042 flow_dv_jump_tbl_resource_release(dev, act_res->rix_jump);
11043 act_res->rix_jump = 0;
11048 flow_dv_sample_match_cb(void *tool_ctx __rte_unused,
11049 struct mlx5_list_entry *entry, void *cb_ctx)
11051 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11052 struct rte_eth_dev *dev = ctx->dev;
11053 struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11054 struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
11058 if (ctx_resource->ratio == resource->ratio &&
11059 ctx_resource->ft_type == resource->ft_type &&
11060 ctx_resource->ft_id == resource->ft_id &&
11061 ctx_resource->set_action == resource->set_action &&
11062 !memcmp((void *)&ctx_resource->sample_act,
11063 (void *)&resource->sample_act,
11064 sizeof(struct mlx5_flow_sub_actions_list))) {
11066 * Existing sample action should release the prepared
11067 * sub-actions reference counter.
11069 flow_dv_sample_sub_actions_release(dev,
11070 &ctx_resource->sample_idx);
11076 struct mlx5_list_entry *
11077 flow_dv_sample_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11079 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11080 struct rte_eth_dev *dev = ctx->dev;
11081 struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11082 void **sample_dv_actions = ctx_resource->sub_actions;
11083 struct mlx5_flow_dv_sample_resource *resource;
11084 struct mlx5dv_dr_flow_sampler_attr sampler_attr;
11085 struct mlx5_priv *priv = dev->data->dev_private;
11086 struct mlx5_dev_ctx_shared *sh = priv->sh;
11087 struct mlx5_flow_tbl_resource *tbl;
11089 const uint32_t next_ft_step = 1;
11090 uint32_t next_ft_id = ctx_resource->ft_id + next_ft_step;
11091 uint8_t is_egress = 0;
11092 uint8_t is_transfer = 0;
11093 struct rte_flow_error *error = ctx->error;
11095 /* Register new sample resource. */
11096 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11098 rte_flow_error_set(error, ENOMEM,
11099 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11101 "cannot allocate resource memory");
11104 *resource = *ctx_resource;
11105 /* Create normal path table level */
11106 if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11108 else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
11110 tbl = flow_dv_tbl_resource_get(dev, next_ft_id,
11111 is_egress, is_transfer,
11112 true, NULL, 0, 0, 0, error);
11114 rte_flow_error_set(error, ENOMEM,
11115 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11117 "fail to create normal path table "
11121 resource->normal_path_tbl = tbl;
11122 if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
11123 if (!sh->default_miss_action) {
11124 rte_flow_error_set(error, ENOMEM,
11125 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11127 "default miss action was not "
11131 sample_dv_actions[ctx_resource->sample_act.actions_num++] =
11132 sh->default_miss_action;
11134 /* Create a DR sample action */
11135 sampler_attr.sample_ratio = resource->ratio;
11136 sampler_attr.default_next_table = tbl->obj;
11137 sampler_attr.num_sample_actions = ctx_resource->sample_act.actions_num;
11138 sampler_attr.sample_actions = (struct mlx5dv_dr_action **)
11139 &sample_dv_actions[0];
11140 sampler_attr.action = resource->set_action;
11141 if (mlx5_os_flow_dr_create_flow_action_sampler
11142 (&sampler_attr, &resource->verbs_action)) {
11143 rte_flow_error_set(error, ENOMEM,
11144 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11145 NULL, "cannot create sample action");
11148 resource->idx = idx;
11149 resource->dev = dev;
11150 return &resource->entry;
11152 if (resource->ft_type != MLX5DV_FLOW_TABLE_TYPE_FDB)
11153 flow_dv_sample_sub_actions_release(dev,
11154 &resource->sample_idx);
11155 if (resource->normal_path_tbl)
11156 flow_dv_tbl_resource_release(MLX5_SH(dev),
11157 resource->normal_path_tbl);
11158 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_SAMPLE], idx);
11163 struct mlx5_list_entry *
11164 flow_dv_sample_clone_cb(void *tool_ctx __rte_unused,
11165 struct mlx5_list_entry *entry __rte_unused,
11168 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11169 struct rte_eth_dev *dev = ctx->dev;
11170 struct mlx5_flow_dv_sample_resource *resource;
11171 struct mlx5_priv *priv = dev->data->dev_private;
11172 struct mlx5_dev_ctx_shared *sh = priv->sh;
11175 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11177 rte_flow_error_set(ctx->error, ENOMEM,
11178 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11180 "cannot allocate resource memory");
11183 memcpy(resource, entry, sizeof(*resource));
11184 resource->idx = idx;
11185 resource->dev = dev;
11186 return &resource->entry;
11190 flow_dv_sample_clone_free_cb(void *tool_ctx __rte_unused,
11191 struct mlx5_list_entry *entry)
11193 struct mlx5_flow_dv_sample_resource *resource =
11194 container_of(entry, typeof(*resource), entry);
11195 struct rte_eth_dev *dev = resource->dev;
11196 struct mlx5_priv *priv = dev->data->dev_private;
11198 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
11202 * Find existing sample resource or create and register a new one.
11204 * @param[in, out] dev
11205 * Pointer to rte_eth_dev structure.
11207 * Pointer to sample resource reference.
11208 * @parm[in, out] dev_flow
11209 * Pointer to the dev_flow.
11210 * @param[out] error
11211 * pointer to error structure.
11214 * 0 on success otherwise -errno and errno is set.
11217 flow_dv_sample_resource_register(struct rte_eth_dev *dev,
11218 struct mlx5_flow_dv_sample_resource *ref,
11219 struct mlx5_flow *dev_flow,
11220 struct rte_flow_error *error)
11222 struct mlx5_flow_dv_sample_resource *resource;
11223 struct mlx5_list_entry *entry;
11224 struct mlx5_priv *priv = dev->data->dev_private;
11225 struct mlx5_flow_cb_ctx ctx = {
11231 entry = mlx5_list_register(priv->sh->sample_action_list, &ctx);
11234 resource = container_of(entry, typeof(*resource), entry);
11235 dev_flow->handle->dvh.rix_sample = resource->idx;
11236 dev_flow->dv.sample_res = resource;
11241 flow_dv_dest_array_match_cb(void *tool_ctx __rte_unused,
11242 struct mlx5_list_entry *entry, void *cb_ctx)
11244 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11245 struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11246 struct rte_eth_dev *dev = ctx->dev;
11247 struct mlx5_flow_dv_dest_array_resource *resource =
11248 container_of(entry, typeof(*resource), entry);
11251 if (ctx_resource->num_of_dest == resource->num_of_dest &&
11252 ctx_resource->ft_type == resource->ft_type &&
11253 !memcmp((void *)resource->sample_act,
11254 (void *)ctx_resource->sample_act,
11255 (ctx_resource->num_of_dest *
11256 sizeof(struct mlx5_flow_sub_actions_list)))) {
11258 * Existing sample action should release the prepared
11259 * sub-actions reference counter.
11261 for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11262 flow_dv_sample_sub_actions_release(dev,
11263 &ctx_resource->sample_idx[idx]);
11269 struct mlx5_list_entry *
11270 flow_dv_dest_array_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11272 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11273 struct rte_eth_dev *dev = ctx->dev;
11274 struct mlx5_flow_dv_dest_array_resource *resource;
11275 struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11276 struct mlx5dv_dr_action_dest_attr *dest_attr[MLX5_MAX_DEST_NUM] = { 0 };
11277 struct mlx5dv_dr_action_dest_reformat dest_reformat[MLX5_MAX_DEST_NUM];
11278 struct mlx5_priv *priv = dev->data->dev_private;
11279 struct mlx5_dev_ctx_shared *sh = priv->sh;
11280 struct mlx5_flow_sub_actions_list *sample_act;
11281 struct mlx5dv_dr_domain *domain;
11282 uint32_t idx = 0, res_idx = 0;
11283 struct rte_flow_error *error = ctx->error;
11284 uint64_t action_flags;
11287 /* Register new destination array resource. */
11288 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11291 rte_flow_error_set(error, ENOMEM,
11292 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11294 "cannot allocate resource memory");
11297 *resource = *ctx_resource;
11298 if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11299 domain = sh->fdb_domain;
11300 else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
11301 domain = sh->rx_domain;
11303 domain = sh->tx_domain;
11304 for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11305 dest_attr[idx] = (struct mlx5dv_dr_action_dest_attr *)
11306 mlx5_malloc(MLX5_MEM_ZERO,
11307 sizeof(struct mlx5dv_dr_action_dest_attr),
11309 if (!dest_attr[idx]) {
11310 rte_flow_error_set(error, ENOMEM,
11311 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11313 "cannot allocate resource memory");
11316 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST;
11317 sample_act = &ctx_resource->sample_act[idx];
11318 action_flags = sample_act->action_flags;
11319 switch (action_flags) {
11320 case MLX5_FLOW_ACTION_QUEUE:
11321 dest_attr[idx]->dest = sample_act->dr_queue_action;
11323 case (MLX5_FLOW_ACTION_PORT_ID | MLX5_FLOW_ACTION_ENCAP):
11324 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST_REFORMAT;
11325 dest_attr[idx]->dest_reformat = &dest_reformat[idx];
11326 dest_attr[idx]->dest_reformat->reformat =
11327 sample_act->dr_encap_action;
11328 dest_attr[idx]->dest_reformat->dest =
11329 sample_act->dr_port_id_action;
11331 case MLX5_FLOW_ACTION_PORT_ID:
11332 dest_attr[idx]->dest = sample_act->dr_port_id_action;
11334 case MLX5_FLOW_ACTION_JUMP:
11335 dest_attr[idx]->dest = sample_act->dr_jump_action;
11338 rte_flow_error_set(error, EINVAL,
11339 RTE_FLOW_ERROR_TYPE_ACTION,
11341 "unsupported actions type");
11345 /* create a dest array actioin */
11346 ret = mlx5_os_flow_dr_create_flow_action_dest_array
11348 resource->num_of_dest,
11350 &resource->action);
11352 rte_flow_error_set(error, ENOMEM,
11353 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11355 "cannot create destination array action");
11358 resource->idx = res_idx;
11359 resource->dev = dev;
11360 for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11361 mlx5_free(dest_attr[idx]);
11362 return &resource->entry;
11364 for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11365 flow_dv_sample_sub_actions_release(dev,
11366 &resource->sample_idx[idx]);
11367 if (dest_attr[idx])
11368 mlx5_free(dest_attr[idx]);
11370 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DEST_ARRAY], res_idx);
11374 struct mlx5_list_entry *
11375 flow_dv_dest_array_clone_cb(void *tool_ctx __rte_unused,
11376 struct mlx5_list_entry *entry __rte_unused,
11379 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11380 struct rte_eth_dev *dev = ctx->dev;
11381 struct mlx5_flow_dv_dest_array_resource *resource;
11382 struct mlx5_priv *priv = dev->data->dev_private;
11383 struct mlx5_dev_ctx_shared *sh = priv->sh;
11384 uint32_t res_idx = 0;
11385 struct rte_flow_error *error = ctx->error;
11387 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11390 rte_flow_error_set(error, ENOMEM,
11391 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11393 "cannot allocate dest-array memory");
11396 memcpy(resource, entry, sizeof(*resource));
11397 resource->idx = res_idx;
11398 resource->dev = dev;
11399 return &resource->entry;
11403 flow_dv_dest_array_clone_free_cb(void *tool_ctx __rte_unused,
11404 struct mlx5_list_entry *entry)
11406 struct mlx5_flow_dv_dest_array_resource *resource =
11407 container_of(entry, typeof(*resource), entry);
11408 struct rte_eth_dev *dev = resource->dev;
11409 struct mlx5_priv *priv = dev->data->dev_private;
11411 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
11415 * Find existing destination array resource or create and register a new one.
11417 * @param[in, out] dev
11418 * Pointer to rte_eth_dev structure.
11420 * Pointer to destination array resource reference.
11421 * @parm[in, out] dev_flow
11422 * Pointer to the dev_flow.
11423 * @param[out] error
11424 * pointer to error structure.
11427 * 0 on success otherwise -errno and errno is set.
11430 flow_dv_dest_array_resource_register(struct rte_eth_dev *dev,
11431 struct mlx5_flow_dv_dest_array_resource *ref,
11432 struct mlx5_flow *dev_flow,
11433 struct rte_flow_error *error)
11435 struct mlx5_flow_dv_dest_array_resource *resource;
11436 struct mlx5_priv *priv = dev->data->dev_private;
11437 struct mlx5_list_entry *entry;
11438 struct mlx5_flow_cb_ctx ctx = {
11444 entry = mlx5_list_register(priv->sh->dest_array_list, &ctx);
11447 resource = container_of(entry, typeof(*resource), entry);
11448 dev_flow->handle->dvh.rix_dest_array = resource->idx;
11449 dev_flow->dv.dest_array_res = resource;
11454 * Convert Sample action to DV specification.
11457 * Pointer to rte_eth_dev structure.
11458 * @param[in] action
11459 * Pointer to sample action structure.
11460 * @param[in, out] dev_flow
11461 * Pointer to the mlx5_flow.
11463 * Pointer to the flow attributes.
11464 * @param[in, out] num_of_dest
11465 * Pointer to the num of destination.
11466 * @param[in, out] sample_actions
11467 * Pointer to sample actions list.
11468 * @param[in, out] res
11469 * Pointer to sample resource.
11470 * @param[out] error
11471 * Pointer to the error structure.
11474 * 0 on success, a negative errno value otherwise and rte_errno is set.
11477 flow_dv_translate_action_sample(struct rte_eth_dev *dev,
11478 const struct rte_flow_action_sample *action,
11479 struct mlx5_flow *dev_flow,
11480 const struct rte_flow_attr *attr,
11481 uint32_t *num_of_dest,
11482 void **sample_actions,
11483 struct mlx5_flow_dv_sample_resource *res,
11484 struct rte_flow_error *error)
11486 struct mlx5_priv *priv = dev->data->dev_private;
11487 const struct rte_flow_action *sub_actions;
11488 struct mlx5_flow_sub_actions_list *sample_act;
11489 struct mlx5_flow_sub_actions_idx *sample_idx;
11490 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11491 struct rte_flow *flow = dev_flow->flow;
11492 struct mlx5_flow_rss_desc *rss_desc;
11493 uint64_t action_flags = 0;
11496 rss_desc = &wks->rss_desc;
11497 sample_act = &res->sample_act;
11498 sample_idx = &res->sample_idx;
11499 res->ratio = action->ratio;
11500 sub_actions = action->actions;
11501 for (; sub_actions->type != RTE_FLOW_ACTION_TYPE_END; sub_actions++) {
11502 int type = sub_actions->type;
11503 uint32_t pre_rix = 0;
11506 case RTE_FLOW_ACTION_TYPE_QUEUE:
11508 const struct rte_flow_action_queue *queue;
11509 struct mlx5_hrxq *hrxq;
11512 queue = sub_actions->conf;
11513 rss_desc->queue_num = 1;
11514 rss_desc->queue[0] = queue->index;
11515 hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11516 rss_desc, &hrxq_idx);
11518 return rte_flow_error_set
11520 RTE_FLOW_ERROR_TYPE_ACTION,
11522 "cannot create fate queue");
11523 sample_act->dr_queue_action = hrxq->action;
11524 sample_idx->rix_hrxq = hrxq_idx;
11525 sample_actions[sample_act->actions_num++] =
11528 action_flags |= MLX5_FLOW_ACTION_QUEUE;
11529 if (action_flags & MLX5_FLOW_ACTION_MARK)
11530 dev_flow->handle->rix_hrxq = hrxq_idx;
11531 dev_flow->handle->fate_action =
11532 MLX5_FLOW_FATE_QUEUE;
11535 case RTE_FLOW_ACTION_TYPE_RSS:
11537 struct mlx5_hrxq *hrxq;
11539 const struct rte_flow_action_rss *rss;
11540 const uint8_t *rss_key;
11542 rss = sub_actions->conf;
11543 memcpy(rss_desc->queue, rss->queue,
11544 rss->queue_num * sizeof(uint16_t));
11545 rss_desc->queue_num = rss->queue_num;
11546 /* NULL RSS key indicates default RSS key. */
11547 rss_key = !rss->key ? rss_hash_default_key : rss->key;
11548 memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
11550 * rss->level and rss.types should be set in advance
11551 * when expanding items for RSS.
11553 flow_dv_hashfields_set(dev_flow, rss_desc);
11554 hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11555 rss_desc, &hrxq_idx);
11557 return rte_flow_error_set
11559 RTE_FLOW_ERROR_TYPE_ACTION,
11561 "cannot create fate queue");
11562 sample_act->dr_queue_action = hrxq->action;
11563 sample_idx->rix_hrxq = hrxq_idx;
11564 sample_actions[sample_act->actions_num++] =
11567 action_flags |= MLX5_FLOW_ACTION_RSS;
11568 if (action_flags & MLX5_FLOW_ACTION_MARK)
11569 dev_flow->handle->rix_hrxq = hrxq_idx;
11570 dev_flow->handle->fate_action =
11571 MLX5_FLOW_FATE_QUEUE;
11574 case RTE_FLOW_ACTION_TYPE_MARK:
11576 uint32_t tag_be = mlx5_flow_mark_set
11577 (((const struct rte_flow_action_mark *)
11578 (sub_actions->conf))->id);
11580 dev_flow->handle->mark = 1;
11581 pre_rix = dev_flow->handle->dvh.rix_tag;
11582 /* Save the mark resource before sample */
11583 pre_r = dev_flow->dv.tag_resource;
11584 if (flow_dv_tag_resource_register(dev, tag_be,
11587 MLX5_ASSERT(dev_flow->dv.tag_resource);
11588 sample_act->dr_tag_action =
11589 dev_flow->dv.tag_resource->action;
11590 sample_idx->rix_tag =
11591 dev_flow->handle->dvh.rix_tag;
11592 sample_actions[sample_act->actions_num++] =
11593 sample_act->dr_tag_action;
11594 /* Recover the mark resource after sample */
11595 dev_flow->dv.tag_resource = pre_r;
11596 dev_flow->handle->dvh.rix_tag = pre_rix;
11597 action_flags |= MLX5_FLOW_ACTION_MARK;
11600 case RTE_FLOW_ACTION_TYPE_COUNT:
11602 if (!flow->counter) {
11604 flow_dv_translate_create_counter(dev,
11605 dev_flow, sub_actions->conf,
11607 if (!flow->counter)
11608 return rte_flow_error_set
11610 RTE_FLOW_ERROR_TYPE_ACTION,
11612 "cannot create counter"
11615 sample_act->dr_cnt_action =
11616 (flow_dv_counter_get_by_idx(dev,
11617 flow->counter, NULL))->action;
11618 sample_actions[sample_act->actions_num++] =
11619 sample_act->dr_cnt_action;
11620 action_flags |= MLX5_FLOW_ACTION_COUNT;
11623 case RTE_FLOW_ACTION_TYPE_PORT_ID:
11625 struct mlx5_flow_dv_port_id_action_resource
11627 uint32_t port_id = 0;
11629 memset(&port_id_resource, 0, sizeof(port_id_resource));
11630 /* Save the port id resource before sample */
11631 pre_rix = dev_flow->handle->rix_port_id_action;
11632 pre_r = dev_flow->dv.port_id_action;
11633 if (flow_dv_translate_action_port_id(dev, sub_actions,
11636 port_id_resource.port_id = port_id;
11637 if (flow_dv_port_id_action_resource_register
11638 (dev, &port_id_resource, dev_flow, error))
11640 sample_act->dr_port_id_action =
11641 dev_flow->dv.port_id_action->action;
11642 sample_idx->rix_port_id_action =
11643 dev_flow->handle->rix_port_id_action;
11644 sample_actions[sample_act->actions_num++] =
11645 sample_act->dr_port_id_action;
11646 /* Recover the port id resource after sample */
11647 dev_flow->dv.port_id_action = pre_r;
11648 dev_flow->handle->rix_port_id_action = pre_rix;
11650 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
11653 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
11654 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
11655 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
11656 /* Save the encap resource before sample */
11657 pre_rix = dev_flow->handle->dvh.rix_encap_decap;
11658 pre_r = dev_flow->dv.encap_decap;
11659 if (flow_dv_create_action_l2_encap(dev, sub_actions,
11664 sample_act->dr_encap_action =
11665 dev_flow->dv.encap_decap->action;
11666 sample_idx->rix_encap_decap =
11667 dev_flow->handle->dvh.rix_encap_decap;
11668 sample_actions[sample_act->actions_num++] =
11669 sample_act->dr_encap_action;
11670 /* Recover the encap resource after sample */
11671 dev_flow->dv.encap_decap = pre_r;
11672 dev_flow->handle->dvh.rix_encap_decap = pre_rix;
11673 action_flags |= MLX5_FLOW_ACTION_ENCAP;
11676 return rte_flow_error_set(error, EINVAL,
11677 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11679 "Not support for sampler action");
11682 sample_act->action_flags = action_flags;
11683 res->ft_id = dev_flow->dv.group;
11684 if (attr->transfer) {
11686 uint32_t action_in[MLX5_ST_SZ_DW(set_action_in)];
11687 uint64_t set_action;
11688 } action_ctx = { .set_action = 0 };
11690 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
11691 MLX5_SET(set_action_in, action_ctx.action_in, action_type,
11692 MLX5_MODIFICATION_TYPE_SET);
11693 MLX5_SET(set_action_in, action_ctx.action_in, field,
11694 MLX5_MODI_META_REG_C_0);
11695 MLX5_SET(set_action_in, action_ctx.action_in, data,
11696 priv->vport_meta_tag);
11697 res->set_action = action_ctx.set_action;
11698 } else if (attr->ingress) {
11699 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
11701 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_TX;
11707 * Convert Sample action to DV specification.
11710 * Pointer to rte_eth_dev structure.
11711 * @param[in, out] dev_flow
11712 * Pointer to the mlx5_flow.
11713 * @param[in] num_of_dest
11714 * The num of destination.
11715 * @param[in, out] res
11716 * Pointer to sample resource.
11717 * @param[in, out] mdest_res
11718 * Pointer to destination array resource.
11719 * @param[in] sample_actions
11720 * Pointer to sample path actions list.
11721 * @param[in] action_flags
11722 * Holds the actions detected until now.
11723 * @param[out] error
11724 * Pointer to the error structure.
11727 * 0 on success, a negative errno value otherwise and rte_errno is set.
11730 flow_dv_create_action_sample(struct rte_eth_dev *dev,
11731 struct mlx5_flow *dev_flow,
11732 uint32_t num_of_dest,
11733 struct mlx5_flow_dv_sample_resource *res,
11734 struct mlx5_flow_dv_dest_array_resource *mdest_res,
11735 void **sample_actions,
11736 uint64_t action_flags,
11737 struct rte_flow_error *error)
11739 /* update normal path action resource into last index of array */
11740 uint32_t dest_index = MLX5_MAX_DEST_NUM - 1;
11741 struct mlx5_flow_sub_actions_list *sample_act =
11742 &mdest_res->sample_act[dest_index];
11743 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11744 struct mlx5_flow_rss_desc *rss_desc;
11745 uint32_t normal_idx = 0;
11746 struct mlx5_hrxq *hrxq;
11750 rss_desc = &wks->rss_desc;
11751 if (num_of_dest > 1) {
11752 if (sample_act->action_flags & MLX5_FLOW_ACTION_QUEUE) {
11753 /* Handle QP action for mirroring */
11754 hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11755 rss_desc, &hrxq_idx);
11757 return rte_flow_error_set
11759 RTE_FLOW_ERROR_TYPE_ACTION,
11761 "cannot create rx queue");
11763 mdest_res->sample_idx[dest_index].rix_hrxq = hrxq_idx;
11764 sample_act->dr_queue_action = hrxq->action;
11765 if (action_flags & MLX5_FLOW_ACTION_MARK)
11766 dev_flow->handle->rix_hrxq = hrxq_idx;
11767 dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
11769 if (sample_act->action_flags & MLX5_FLOW_ACTION_ENCAP) {
11771 mdest_res->sample_idx[dest_index].rix_encap_decap =
11772 dev_flow->handle->dvh.rix_encap_decap;
11773 sample_act->dr_encap_action =
11774 dev_flow->dv.encap_decap->action;
11775 dev_flow->handle->dvh.rix_encap_decap = 0;
11777 if (sample_act->action_flags & MLX5_FLOW_ACTION_PORT_ID) {
11779 mdest_res->sample_idx[dest_index].rix_port_id_action =
11780 dev_flow->handle->rix_port_id_action;
11781 sample_act->dr_port_id_action =
11782 dev_flow->dv.port_id_action->action;
11783 dev_flow->handle->rix_port_id_action = 0;
11785 if (sample_act->action_flags & MLX5_FLOW_ACTION_JUMP) {
11787 mdest_res->sample_idx[dest_index].rix_jump =
11788 dev_flow->handle->rix_jump;
11789 sample_act->dr_jump_action =
11790 dev_flow->dv.jump->action;
11791 dev_flow->handle->rix_jump = 0;
11793 sample_act->actions_num = normal_idx;
11794 /* update sample action resource into first index of array */
11795 mdest_res->ft_type = res->ft_type;
11796 memcpy(&mdest_res->sample_idx[0], &res->sample_idx,
11797 sizeof(struct mlx5_flow_sub_actions_idx));
11798 memcpy(&mdest_res->sample_act[0], &res->sample_act,
11799 sizeof(struct mlx5_flow_sub_actions_list));
11800 mdest_res->num_of_dest = num_of_dest;
11801 if (flow_dv_dest_array_resource_register(dev, mdest_res,
11803 return rte_flow_error_set(error, EINVAL,
11804 RTE_FLOW_ERROR_TYPE_ACTION,
11805 NULL, "can't create sample "
11808 res->sub_actions = sample_actions;
11809 if (flow_dv_sample_resource_register(dev, res, dev_flow, error))
11810 return rte_flow_error_set(error, EINVAL,
11811 RTE_FLOW_ERROR_TYPE_ACTION,
11813 "can't create sample action");
11819 * Remove an ASO age action from age actions list.
11822 * Pointer to the Ethernet device structure.
11824 * Pointer to the aso age action handler.
11827 flow_dv_aso_age_remove_from_age(struct rte_eth_dev *dev,
11828 struct mlx5_aso_age_action *age)
11830 struct mlx5_age_info *age_info;
11831 struct mlx5_age_param *age_param = &age->age_params;
11832 struct mlx5_priv *priv = dev->data->dev_private;
11833 uint16_t expected = AGE_CANDIDATE;
11835 age_info = GET_PORT_AGE_INFO(priv);
11836 if (!__atomic_compare_exchange_n(&age_param->state, &expected,
11837 AGE_FREE, false, __ATOMIC_RELAXED,
11838 __ATOMIC_RELAXED)) {
11840 * We need the lock even it is age timeout,
11841 * since age action may still in process.
11843 rte_spinlock_lock(&age_info->aged_sl);
11844 LIST_REMOVE(age, next);
11845 rte_spinlock_unlock(&age_info->aged_sl);
11846 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
11851 * Release an ASO age action.
11854 * Pointer to the Ethernet device structure.
11855 * @param[in] age_idx
11856 * Index of ASO age action to release.
11858 * True if the release operation is during flow destroy operation.
11859 * False if the release operation is during action destroy operation.
11862 * 0 when age action was removed, otherwise the number of references.
11865 flow_dv_aso_age_release(struct rte_eth_dev *dev, uint32_t age_idx)
11867 struct mlx5_priv *priv = dev->data->dev_private;
11868 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11869 struct mlx5_aso_age_action *age = flow_aso_age_get_by_idx(dev, age_idx);
11870 uint32_t ret = __atomic_sub_fetch(&age->refcnt, 1, __ATOMIC_RELAXED);
11873 flow_dv_aso_age_remove_from_age(dev, age);
11874 rte_spinlock_lock(&mng->free_sl);
11875 LIST_INSERT_HEAD(&mng->free, age, next);
11876 rte_spinlock_unlock(&mng->free_sl);
11882 * Resize the ASO age pools array by MLX5_CNT_CONTAINER_RESIZE pools.
11885 * Pointer to the Ethernet device structure.
11888 * 0 on success, otherwise negative errno value and rte_errno is set.
11891 flow_dv_aso_age_pools_resize(struct rte_eth_dev *dev)
11893 struct mlx5_priv *priv = dev->data->dev_private;
11894 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11895 void *old_pools = mng->pools;
11896 uint32_t resize = mng->n + MLX5_CNT_CONTAINER_RESIZE;
11897 uint32_t mem_size = sizeof(struct mlx5_aso_age_pool *) * resize;
11898 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
11901 rte_errno = ENOMEM;
11905 memcpy(pools, old_pools,
11906 mng->n * sizeof(struct mlx5_flow_counter_pool *));
11907 mlx5_free(old_pools);
11909 /* First ASO flow hit allocation - starting ASO data-path. */
11910 int ret = mlx5_aso_flow_hit_queue_poll_start(priv->sh);
11918 mng->pools = pools;
11923 * Create and initialize a new ASO aging pool.
11926 * Pointer to the Ethernet device structure.
11927 * @param[out] age_free
11928 * Where to put the pointer of a new age action.
11931 * The age actions pool pointer and @p age_free is set on success,
11932 * NULL otherwise and rte_errno is set.
11934 static struct mlx5_aso_age_pool *
11935 flow_dv_age_pool_create(struct rte_eth_dev *dev,
11936 struct mlx5_aso_age_action **age_free)
11938 struct mlx5_priv *priv = dev->data->dev_private;
11939 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11940 struct mlx5_aso_age_pool *pool = NULL;
11941 struct mlx5_devx_obj *obj = NULL;
11944 obj = mlx5_devx_cmd_create_flow_hit_aso_obj(priv->sh->ctx,
11947 rte_errno = ENODATA;
11948 DRV_LOG(ERR, "Failed to create flow_hit_aso_obj using DevX.");
11951 pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
11953 claim_zero(mlx5_devx_cmd_destroy(obj));
11954 rte_errno = ENOMEM;
11957 pool->flow_hit_aso_obj = obj;
11958 pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
11959 rte_spinlock_lock(&mng->resize_sl);
11960 pool->index = mng->next;
11961 /* Resize pools array if there is no room for the new pool in it. */
11962 if (pool->index == mng->n && flow_dv_aso_age_pools_resize(dev)) {
11963 claim_zero(mlx5_devx_cmd_destroy(obj));
11965 rte_spinlock_unlock(&mng->resize_sl);
11968 mng->pools[pool->index] = pool;
11970 rte_spinlock_unlock(&mng->resize_sl);
11971 /* Assign the first action in the new pool, the rest go to free list. */
11972 *age_free = &pool->actions[0];
11973 for (i = 1; i < MLX5_ASO_AGE_ACTIONS_PER_POOL; i++) {
11974 pool->actions[i].offset = i;
11975 LIST_INSERT_HEAD(&mng->free, &pool->actions[i], next);
11981 * Allocate a ASO aging bit.
11984 * Pointer to the Ethernet device structure.
11985 * @param[out] error
11986 * Pointer to the error structure.
11989 * Index to ASO age action on success, 0 otherwise and rte_errno is set.
11992 flow_dv_aso_age_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
11994 struct mlx5_priv *priv = dev->data->dev_private;
11995 const struct mlx5_aso_age_pool *pool;
11996 struct mlx5_aso_age_action *age_free = NULL;
11997 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
12000 /* Try to get the next free age action bit. */
12001 rte_spinlock_lock(&mng->free_sl);
12002 age_free = LIST_FIRST(&mng->free);
12004 LIST_REMOVE(age_free, next);
12005 } else if (!flow_dv_age_pool_create(dev, &age_free)) {
12006 rte_spinlock_unlock(&mng->free_sl);
12007 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12008 NULL, "failed to create ASO age pool");
12009 return 0; /* 0 is an error. */
12011 rte_spinlock_unlock(&mng->free_sl);
12012 pool = container_of
12013 ((const struct mlx5_aso_age_action (*)[MLX5_ASO_AGE_ACTIONS_PER_POOL])
12014 (age_free - age_free->offset), const struct mlx5_aso_age_pool,
12016 if (!age_free->dr_action) {
12017 int reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_FLOW_HIT, 0,
12021 rte_flow_error_set(error, rte_errno,
12022 RTE_FLOW_ERROR_TYPE_ACTION,
12023 NULL, "failed to get reg_c "
12024 "for ASO flow hit");
12025 return 0; /* 0 is an error. */
12027 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
12028 age_free->dr_action = mlx5_glue->dv_create_flow_action_aso
12029 (priv->sh->rx_domain,
12030 pool->flow_hit_aso_obj->obj, age_free->offset,
12031 MLX5DV_DR_ACTION_FLAGS_ASO_FIRST_HIT_SET,
12032 (reg_c - REG_C_0));
12033 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
12034 if (!age_free->dr_action) {
12036 rte_spinlock_lock(&mng->free_sl);
12037 LIST_INSERT_HEAD(&mng->free, age_free, next);
12038 rte_spinlock_unlock(&mng->free_sl);
12039 rte_flow_error_set(error, rte_errno,
12040 RTE_FLOW_ERROR_TYPE_ACTION,
12041 NULL, "failed to create ASO "
12042 "flow hit action");
12043 return 0; /* 0 is an error. */
12046 __atomic_store_n(&age_free->refcnt, 1, __ATOMIC_RELAXED);
12047 return pool->index | ((age_free->offset + 1) << 16);
12051 * Initialize flow ASO age parameters.
12054 * Pointer to rte_eth_dev structure.
12055 * @param[in] age_idx
12056 * Index of ASO age action.
12057 * @param[in] context
12058 * Pointer to flow counter age context.
12059 * @param[in] timeout
12060 * Aging timeout in seconds.
12064 flow_dv_aso_age_params_init(struct rte_eth_dev *dev,
12069 struct mlx5_aso_age_action *aso_age;
12071 aso_age = flow_aso_age_get_by_idx(dev, age_idx);
12072 MLX5_ASSERT(aso_age);
12073 aso_age->age_params.context = context;
12074 aso_age->age_params.timeout = timeout;
12075 aso_age->age_params.port_id = dev->data->port_id;
12076 __atomic_store_n(&aso_age->age_params.sec_since_last_hit, 0,
12078 __atomic_store_n(&aso_age->age_params.state, AGE_CANDIDATE,
12083 flow_dv_translate_integrity_l4(const struct rte_flow_item_integrity *mask,
12084 const struct rte_flow_item_integrity *value,
12085 void *headers_m, void *headers_v)
12088 /* application l4_ok filter aggregates all hardware l4 filters
12089 * therefore hw l4_checksum_ok must be implicitly added here.
12091 struct rte_flow_item_integrity local_item;
12093 local_item.l4_csum_ok = 1;
12094 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
12095 local_item.l4_csum_ok);
12096 if (value->l4_ok) {
12097 /* application l4_ok = 1 matches sets both hw flags
12098 * l4_ok and l4_checksum_ok flags to 1.
12100 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12101 l4_checksum_ok, local_item.l4_csum_ok);
12102 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_ok,
12104 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_ok,
12107 /* application l4_ok = 0 matches on hw flag
12108 * l4_checksum_ok = 0 only.
12110 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12111 l4_checksum_ok, 0);
12113 } else if (mask->l4_csum_ok) {
12114 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
12116 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_checksum_ok,
12117 value->l4_csum_ok);
12122 flow_dv_translate_integrity_l3(const struct rte_flow_item_integrity *mask,
12123 const struct rte_flow_item_integrity *value,
12124 void *headers_m, void *headers_v,
12128 /* application l3_ok filter aggregates all hardware l3 filters
12129 * therefore hw ipv4_checksum_ok must be implicitly added here.
12131 struct rte_flow_item_integrity local_item;
12133 local_item.ipv4_csum_ok = !!is_ipv4;
12134 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
12135 local_item.ipv4_csum_ok);
12136 if (value->l3_ok) {
12137 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12138 ipv4_checksum_ok, local_item.ipv4_csum_ok);
12139 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l3_ok,
12141 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l3_ok,
12144 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12145 ipv4_checksum_ok, 0);
12147 } else if (mask->ipv4_csum_ok) {
12148 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
12149 mask->ipv4_csum_ok);
12150 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_checksum_ok,
12151 value->ipv4_csum_ok);
12156 flow_dv_translate_item_integrity(void *matcher, void *key,
12157 const struct rte_flow_item *head_item,
12158 const struct rte_flow_item *integrity_item)
12160 const struct rte_flow_item_integrity *mask = integrity_item->mask;
12161 const struct rte_flow_item_integrity *value = integrity_item->spec;
12162 const struct rte_flow_item *tunnel_item, *end_item, *item;
12165 uint32_t l3_protocol;
12170 mask = &rte_flow_item_integrity_mask;
12171 if (value->level > 1) {
12172 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12174 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
12176 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12178 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
12180 tunnel_item = mlx5_flow_find_tunnel_item(head_item);
12181 if (value->level > 1) {
12182 /* tunnel item was verified during the item validation */
12183 item = tunnel_item;
12184 end_item = mlx5_find_end_item(tunnel_item);
12187 end_item = tunnel_item ? tunnel_item :
12188 mlx5_find_end_item(integrity_item);
12190 l3_protocol = mask->l3_ok ?
12191 mlx5_flow_locate_proto_l3(&item, end_item) : 0;
12192 flow_dv_translate_integrity_l3(mask, value, headers_m, headers_v,
12193 l3_protocol == RTE_ETHER_TYPE_IPV4);
12194 flow_dv_translate_integrity_l4(mask, value, headers_m, headers_v);
12198 * Prepares DV flow counter with aging configuration.
12199 * Gets it by index when exists, creates a new one when doesn't.
12202 * Pointer to rte_eth_dev structure.
12203 * @param[in] dev_flow
12204 * Pointer to the mlx5_flow.
12205 * @param[in, out] flow
12206 * Pointer to the sub flow.
12208 * Pointer to the counter action configuration.
12210 * Pointer to the aging action configuration.
12211 * @param[out] error
12212 * Pointer to the error structure.
12215 * Pointer to the counter, NULL otherwise.
12217 static struct mlx5_flow_counter *
12218 flow_dv_prepare_counter(struct rte_eth_dev *dev,
12219 struct mlx5_flow *dev_flow,
12220 struct rte_flow *flow,
12221 const struct rte_flow_action_count *count,
12222 const struct rte_flow_action_age *age,
12223 struct rte_flow_error *error)
12225 if (!flow->counter) {
12226 flow->counter = flow_dv_translate_create_counter(dev, dev_flow,
12228 if (!flow->counter) {
12229 rte_flow_error_set(error, rte_errno,
12230 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12231 "cannot create counter object.");
12235 return flow_dv_counter_get_by_idx(dev, flow->counter, NULL);
12239 * Release an ASO CT action by its own device.
12242 * Pointer to the Ethernet device structure.
12244 * Index of ASO CT action to release.
12247 * 0 when CT action was removed, otherwise the number of references.
12250 flow_dv_aso_ct_dev_release(struct rte_eth_dev *dev, uint32_t idx)
12252 struct mlx5_priv *priv = dev->data->dev_private;
12253 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12255 struct mlx5_aso_ct_action *ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12256 enum mlx5_aso_ct_state state =
12257 __atomic_load_n(&ct->state, __ATOMIC_RELAXED);
12259 /* Cannot release when CT is in the ASO SQ. */
12260 if (state == ASO_CONNTRACK_WAIT || state == ASO_CONNTRACK_QUERY)
12262 ret = __atomic_sub_fetch(&ct->refcnt, 1, __ATOMIC_RELAXED);
12264 if (ct->dr_action_orig) {
12265 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12266 claim_zero(mlx5_glue->destroy_flow_action
12267 (ct->dr_action_orig));
12269 ct->dr_action_orig = NULL;
12271 if (ct->dr_action_rply) {
12272 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12273 claim_zero(mlx5_glue->destroy_flow_action
12274 (ct->dr_action_rply));
12276 ct->dr_action_rply = NULL;
12278 /* Clear the state to free, no need in 1st allocation. */
12279 MLX5_ASO_CT_UPDATE_STATE(ct, ASO_CONNTRACK_FREE);
12280 rte_spinlock_lock(&mng->ct_sl);
12281 LIST_INSERT_HEAD(&mng->free_cts, ct, next);
12282 rte_spinlock_unlock(&mng->ct_sl);
12288 flow_dv_aso_ct_release(struct rte_eth_dev *dev, uint32_t own_idx)
12290 uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(own_idx);
12291 uint32_t idx = MLX5_INDIRECT_ACT_CT_GET_IDX(own_idx);
12292 struct rte_eth_dev *owndev = &rte_eth_devices[owner];
12295 MLX5_ASSERT(owner < RTE_MAX_ETHPORTS);
12296 if (dev->data->dev_started != 1)
12298 return flow_dv_aso_ct_dev_release(owndev, idx);
12302 * Resize the ASO CT pools array by 64 pools.
12305 * Pointer to the Ethernet device structure.
12308 * 0 on success, otherwise negative errno value and rte_errno is set.
12311 flow_dv_aso_ct_pools_resize(struct rte_eth_dev *dev)
12313 struct mlx5_priv *priv = dev->data->dev_private;
12314 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12315 void *old_pools = mng->pools;
12316 /* Magic number now, need a macro. */
12317 uint32_t resize = mng->n + 64;
12318 uint32_t mem_size = sizeof(struct mlx5_aso_ct_pool *) * resize;
12319 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
12322 rte_errno = ENOMEM;
12325 rte_rwlock_write_lock(&mng->resize_rwl);
12326 /* ASO SQ/QP was already initialized in the startup. */
12328 /* Realloc could be an alternative choice. */
12329 rte_memcpy(pools, old_pools,
12330 mng->n * sizeof(struct mlx5_aso_ct_pool *));
12331 mlx5_free(old_pools);
12334 mng->pools = pools;
12335 rte_rwlock_write_unlock(&mng->resize_rwl);
12340 * Create and initialize a new ASO CT pool.
12343 * Pointer to the Ethernet device structure.
12344 * @param[out] ct_free
12345 * Where to put the pointer of a new CT action.
12348 * The CT actions pool pointer and @p ct_free is set on success,
12349 * NULL otherwise and rte_errno is set.
12351 static struct mlx5_aso_ct_pool *
12352 flow_dv_ct_pool_create(struct rte_eth_dev *dev,
12353 struct mlx5_aso_ct_action **ct_free)
12355 struct mlx5_priv *priv = dev->data->dev_private;
12356 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12357 struct mlx5_aso_ct_pool *pool = NULL;
12358 struct mlx5_devx_obj *obj = NULL;
12360 uint32_t log_obj_size = rte_log2_u32(MLX5_ASO_CT_ACTIONS_PER_POOL);
12362 obj = mlx5_devx_cmd_create_conn_track_offload_obj(priv->sh->ctx,
12363 priv->sh->pdn, log_obj_size);
12365 rte_errno = ENODATA;
12366 DRV_LOG(ERR, "Failed to create conn_track_offload_obj using DevX.");
12369 pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
12371 rte_errno = ENOMEM;
12372 claim_zero(mlx5_devx_cmd_destroy(obj));
12375 pool->devx_obj = obj;
12376 pool->index = mng->next;
12377 /* Resize pools array if there is no room for the new pool in it. */
12378 if (pool->index == mng->n && flow_dv_aso_ct_pools_resize(dev)) {
12379 claim_zero(mlx5_devx_cmd_destroy(obj));
12383 mng->pools[pool->index] = pool;
12385 /* Assign the first action in the new pool, the rest go to free list. */
12386 *ct_free = &pool->actions[0];
12387 /* Lock outside, the list operation is safe here. */
12388 for (i = 1; i < MLX5_ASO_CT_ACTIONS_PER_POOL; i++) {
12389 /* refcnt is 0 when allocating the memory. */
12390 pool->actions[i].offset = i;
12391 LIST_INSERT_HEAD(&mng->free_cts, &pool->actions[i], next);
12397 * Allocate a ASO CT action from free list.
12400 * Pointer to the Ethernet device structure.
12401 * @param[out] error
12402 * Pointer to the error structure.
12405 * Index to ASO CT action on success, 0 otherwise and rte_errno is set.
12408 flow_dv_aso_ct_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
12410 struct mlx5_priv *priv = dev->data->dev_private;
12411 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12412 struct mlx5_aso_ct_action *ct = NULL;
12413 struct mlx5_aso_ct_pool *pool;
12418 if (!priv->config.devx) {
12419 rte_errno = ENOTSUP;
12422 /* Get a free CT action, if no, a new pool will be created. */
12423 rte_spinlock_lock(&mng->ct_sl);
12424 ct = LIST_FIRST(&mng->free_cts);
12426 LIST_REMOVE(ct, next);
12427 } else if (!flow_dv_ct_pool_create(dev, &ct)) {
12428 rte_spinlock_unlock(&mng->ct_sl);
12429 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12430 NULL, "failed to create ASO CT pool");
12433 rte_spinlock_unlock(&mng->ct_sl);
12434 pool = container_of(ct, struct mlx5_aso_ct_pool, actions[ct->offset]);
12435 ct_idx = MLX5_MAKE_CT_IDX(pool->index, ct->offset);
12436 /* 0: inactive, 1: created, 2+: used by flows. */
12437 __atomic_store_n(&ct->refcnt, 1, __ATOMIC_RELAXED);
12438 reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, error);
12439 if (!ct->dr_action_orig) {
12440 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12441 ct->dr_action_orig = mlx5_glue->dv_create_flow_action_aso
12442 (priv->sh->rx_domain, pool->devx_obj->obj,
12444 MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_INITIATOR,
12447 RTE_SET_USED(reg_c);
12449 if (!ct->dr_action_orig) {
12450 flow_dv_aso_ct_dev_release(dev, ct_idx);
12451 rte_flow_error_set(error, rte_errno,
12452 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12453 "failed to create ASO CT action");
12457 if (!ct->dr_action_rply) {
12458 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12459 ct->dr_action_rply = mlx5_glue->dv_create_flow_action_aso
12460 (priv->sh->rx_domain, pool->devx_obj->obj,
12462 MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_RESPONDER,
12465 if (!ct->dr_action_rply) {
12466 flow_dv_aso_ct_dev_release(dev, ct_idx);
12467 rte_flow_error_set(error, rte_errno,
12468 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12469 "failed to create ASO CT action");
12477 * Create a conntrack object with context and actions by using ASO mechanism.
12480 * Pointer to rte_eth_dev structure.
12482 * Pointer to conntrack information profile.
12483 * @param[out] error
12484 * Pointer to the error structure.
12487 * Index to conntrack object on success, 0 otherwise.
12490 flow_dv_translate_create_conntrack(struct rte_eth_dev *dev,
12491 const struct rte_flow_action_conntrack *pro,
12492 struct rte_flow_error *error)
12494 struct mlx5_priv *priv = dev->data->dev_private;
12495 struct mlx5_dev_ctx_shared *sh = priv->sh;
12496 struct mlx5_aso_ct_action *ct;
12499 if (!sh->ct_aso_en)
12500 return rte_flow_error_set(error, ENOTSUP,
12501 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12502 "Connection is not supported");
12503 idx = flow_dv_aso_ct_alloc(dev, error);
12505 return rte_flow_error_set(error, rte_errno,
12506 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12507 "Failed to allocate CT object");
12508 ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12509 if (mlx5_aso_ct_update_by_wqe(sh, ct, pro))
12510 return rte_flow_error_set(error, EBUSY,
12511 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12512 "Failed to update CT");
12513 ct->is_original = !!pro->is_original_dir;
12514 ct->peer = pro->peer_port;
12519 * Fill the flow with DV spec, lock free
12520 * (mutex should be acquired by caller).
12523 * Pointer to rte_eth_dev structure.
12524 * @param[in, out] dev_flow
12525 * Pointer to the sub flow.
12527 * Pointer to the flow attributes.
12529 * Pointer to the list of items.
12530 * @param[in] actions
12531 * Pointer to the list of actions.
12532 * @param[out] error
12533 * Pointer to the error structure.
12536 * 0 on success, a negative errno value otherwise and rte_errno is set.
12539 flow_dv_translate(struct rte_eth_dev *dev,
12540 struct mlx5_flow *dev_flow,
12541 const struct rte_flow_attr *attr,
12542 const struct rte_flow_item items[],
12543 const struct rte_flow_action actions[],
12544 struct rte_flow_error *error)
12546 struct mlx5_priv *priv = dev->data->dev_private;
12547 struct mlx5_dev_config *dev_conf = &priv->config;
12548 struct rte_flow *flow = dev_flow->flow;
12549 struct mlx5_flow_handle *handle = dev_flow->handle;
12550 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
12551 struct mlx5_flow_rss_desc *rss_desc;
12552 uint64_t item_flags = 0;
12553 uint64_t last_item = 0;
12554 uint64_t action_flags = 0;
12555 struct mlx5_flow_dv_matcher matcher = {
12557 .size = sizeof(matcher.mask.buf),
12561 bool actions_end = false;
12563 struct mlx5_flow_dv_modify_hdr_resource res;
12564 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
12565 sizeof(struct mlx5_modification_cmd) *
12566 (MLX5_MAX_MODIFY_NUM + 1)];
12568 struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
12569 const struct rte_flow_action_count *count = NULL;
12570 const struct rte_flow_action_age *non_shared_age = NULL;
12571 union flow_dv_attr flow_attr = { .attr = 0 };
12573 union mlx5_flow_tbl_key tbl_key;
12574 uint32_t modify_action_position = UINT32_MAX;
12575 void *match_mask = matcher.mask.buf;
12576 void *match_value = dev_flow->dv.value.buf;
12577 uint8_t next_protocol = 0xff;
12578 struct rte_vlan_hdr vlan = { 0 };
12579 struct mlx5_flow_dv_dest_array_resource mdest_res;
12580 struct mlx5_flow_dv_sample_resource sample_res;
12581 void *sample_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
12582 const struct rte_flow_action_sample *sample = NULL;
12583 struct mlx5_flow_sub_actions_list *sample_act;
12584 uint32_t sample_act_pos = UINT32_MAX;
12585 uint32_t age_act_pos = UINT32_MAX;
12586 uint32_t num_of_dest = 0;
12587 int tmp_actions_n = 0;
12590 const struct mlx5_flow_tunnel *tunnel = NULL;
12591 struct flow_grp_info grp_info = {
12592 .external = !!dev_flow->external,
12593 .transfer = !!attr->transfer,
12594 .fdb_def_rule = !!priv->fdb_def_rule,
12595 .skip_scale = dev_flow->skip_scale &
12596 (1 << MLX5_SCALE_FLOW_GROUP_BIT),
12597 .std_tbl_fix = true,
12599 const struct rte_flow_item *head_item = items;
12602 return rte_flow_error_set(error, ENOMEM,
12603 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12605 "failed to push flow workspace");
12606 rss_desc = &wks->rss_desc;
12607 memset(&mdest_res, 0, sizeof(struct mlx5_flow_dv_dest_array_resource));
12608 memset(&sample_res, 0, sizeof(struct mlx5_flow_dv_sample_resource));
12609 mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12610 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12611 /* update normal path action resource into last index of array */
12612 sample_act = &mdest_res.sample_act[MLX5_MAX_DEST_NUM - 1];
12613 if (is_tunnel_offload_active(dev)) {
12614 if (dev_flow->tunnel) {
12615 RTE_VERIFY(dev_flow->tof_type ==
12616 MLX5_TUNNEL_OFFLOAD_MISS_RULE);
12617 tunnel = dev_flow->tunnel;
12619 tunnel = mlx5_get_tof(items, actions,
12620 &dev_flow->tof_type);
12621 dev_flow->tunnel = tunnel;
12623 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
12624 (dev, attr, tunnel, dev_flow->tof_type);
12626 mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12627 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12628 ret = mlx5_flow_group_to_table(dev, tunnel, attr->group, &table,
12632 dev_flow->dv.group = table;
12633 if (attr->transfer)
12634 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
12635 /* number of actions must be set to 0 in case of dirty stack. */
12636 mhdr_res->actions_num = 0;
12637 if (is_flow_tunnel_match_rule(dev_flow->tof_type)) {
12639 * do not add decap action if match rule drops packet
12640 * HW rejects rules with decap & drop
12642 * if tunnel match rule was inserted before matching tunnel set
12643 * rule flow table used in the match rule must be registered.
12644 * current implementation handles that in the
12645 * flow_dv_match_register() at the function end.
12647 bool add_decap = true;
12648 const struct rte_flow_action *ptr = actions;
12650 for (; ptr->type != RTE_FLOW_ACTION_TYPE_END; ptr++) {
12651 if (ptr->type == RTE_FLOW_ACTION_TYPE_DROP) {
12657 if (flow_dv_create_action_l2_decap(dev, dev_flow,
12661 dev_flow->dv.actions[actions_n++] =
12662 dev_flow->dv.encap_decap->action;
12663 action_flags |= MLX5_FLOW_ACTION_DECAP;
12666 for (; !actions_end ; actions++) {
12667 const struct rte_flow_action_queue *queue;
12668 const struct rte_flow_action_rss *rss;
12669 const struct rte_flow_action *action = actions;
12670 const uint8_t *rss_key;
12671 struct mlx5_flow_tbl_resource *tbl;
12672 struct mlx5_aso_age_action *age_act;
12673 struct mlx5_flow_counter *cnt_act;
12674 uint32_t port_id = 0;
12675 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
12676 int action_type = actions->type;
12677 const struct rte_flow_action *found_action = NULL;
12678 uint32_t jump_group = 0;
12679 uint32_t owner_idx;
12680 struct mlx5_aso_ct_action *ct;
12682 if (!mlx5_flow_os_action_supported(action_type))
12683 return rte_flow_error_set(error, ENOTSUP,
12684 RTE_FLOW_ERROR_TYPE_ACTION,
12686 "action not supported");
12687 switch (action_type) {
12688 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
12689 action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
12691 case RTE_FLOW_ACTION_TYPE_VOID:
12693 case RTE_FLOW_ACTION_TYPE_PORT_ID:
12694 if (flow_dv_translate_action_port_id(dev, action,
12697 port_id_resource.port_id = port_id;
12698 MLX5_ASSERT(!handle->rix_port_id_action);
12699 if (flow_dv_port_id_action_resource_register
12700 (dev, &port_id_resource, dev_flow, error))
12702 dev_flow->dv.actions[actions_n++] =
12703 dev_flow->dv.port_id_action->action;
12704 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12705 dev_flow->handle->fate_action = MLX5_FLOW_FATE_PORT_ID;
12706 sample_act->action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12709 case RTE_FLOW_ACTION_TYPE_FLAG:
12710 action_flags |= MLX5_FLOW_ACTION_FLAG;
12711 dev_flow->handle->mark = 1;
12712 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12713 struct rte_flow_action_mark mark = {
12714 .id = MLX5_FLOW_MARK_DEFAULT,
12717 if (flow_dv_convert_action_mark(dev, &mark,
12721 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12724 tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
12726 * Only one FLAG or MARK is supported per device flow
12727 * right now. So the pointer to the tag resource must be
12728 * zero before the register process.
12730 MLX5_ASSERT(!handle->dvh.rix_tag);
12731 if (flow_dv_tag_resource_register(dev, tag_be,
12734 MLX5_ASSERT(dev_flow->dv.tag_resource);
12735 dev_flow->dv.actions[actions_n++] =
12736 dev_flow->dv.tag_resource->action;
12738 case RTE_FLOW_ACTION_TYPE_MARK:
12739 action_flags |= MLX5_FLOW_ACTION_MARK;
12740 dev_flow->handle->mark = 1;
12741 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12742 const struct rte_flow_action_mark *mark =
12743 (const struct rte_flow_action_mark *)
12746 if (flow_dv_convert_action_mark(dev, mark,
12750 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12754 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
12755 /* Legacy (non-extensive) MARK action. */
12756 tag_be = mlx5_flow_mark_set
12757 (((const struct rte_flow_action_mark *)
12758 (actions->conf))->id);
12759 MLX5_ASSERT(!handle->dvh.rix_tag);
12760 if (flow_dv_tag_resource_register(dev, tag_be,
12763 MLX5_ASSERT(dev_flow->dv.tag_resource);
12764 dev_flow->dv.actions[actions_n++] =
12765 dev_flow->dv.tag_resource->action;
12767 case RTE_FLOW_ACTION_TYPE_SET_META:
12768 if (flow_dv_convert_action_set_meta
12769 (dev, mhdr_res, attr,
12770 (const struct rte_flow_action_set_meta *)
12771 actions->conf, error))
12773 action_flags |= MLX5_FLOW_ACTION_SET_META;
12775 case RTE_FLOW_ACTION_TYPE_SET_TAG:
12776 if (flow_dv_convert_action_set_tag
12778 (const struct rte_flow_action_set_tag *)
12779 actions->conf, error))
12781 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
12783 case RTE_FLOW_ACTION_TYPE_DROP:
12784 action_flags |= MLX5_FLOW_ACTION_DROP;
12785 dev_flow->handle->fate_action = MLX5_FLOW_FATE_DROP;
12787 case RTE_FLOW_ACTION_TYPE_QUEUE:
12788 queue = actions->conf;
12789 rss_desc->queue_num = 1;
12790 rss_desc->queue[0] = queue->index;
12791 action_flags |= MLX5_FLOW_ACTION_QUEUE;
12792 dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
12793 sample_act->action_flags |= MLX5_FLOW_ACTION_QUEUE;
12796 case RTE_FLOW_ACTION_TYPE_RSS:
12797 rss = actions->conf;
12798 memcpy(rss_desc->queue, rss->queue,
12799 rss->queue_num * sizeof(uint16_t));
12800 rss_desc->queue_num = rss->queue_num;
12801 /* NULL RSS key indicates default RSS key. */
12802 rss_key = !rss->key ? rss_hash_default_key : rss->key;
12803 memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
12805 * rss->level and rss.types should be set in advance
12806 * when expanding items for RSS.
12808 action_flags |= MLX5_FLOW_ACTION_RSS;
12809 dev_flow->handle->fate_action = rss_desc->shared_rss ?
12810 MLX5_FLOW_FATE_SHARED_RSS :
12811 MLX5_FLOW_FATE_QUEUE;
12813 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
12814 flow->age = (uint32_t)(uintptr_t)(action->conf);
12815 age_act = flow_aso_age_get_by_idx(dev, flow->age);
12816 __atomic_fetch_add(&age_act->refcnt, 1,
12818 age_act_pos = actions_n++;
12819 action_flags |= MLX5_FLOW_ACTION_AGE;
12821 case RTE_FLOW_ACTION_TYPE_AGE:
12822 non_shared_age = action->conf;
12823 age_act_pos = actions_n++;
12824 action_flags |= MLX5_FLOW_ACTION_AGE;
12826 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
12827 flow->counter = (uint32_t)(uintptr_t)(action->conf);
12828 cnt_act = flow_dv_counter_get_by_idx(dev, flow->counter,
12830 __atomic_fetch_add(&cnt_act->shared_info.refcnt, 1,
12832 /* Save information first, will apply later. */
12833 action_flags |= MLX5_FLOW_ACTION_COUNT;
12835 case RTE_FLOW_ACTION_TYPE_COUNT:
12836 if (!dev_conf->devx) {
12837 return rte_flow_error_set
12839 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12841 "count action not supported");
12843 /* Save information first, will apply later. */
12844 count = action->conf;
12845 action_flags |= MLX5_FLOW_ACTION_COUNT;
12847 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
12848 dev_flow->dv.actions[actions_n++] =
12849 priv->sh->pop_vlan_action;
12850 action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
12852 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
12853 if (!(action_flags &
12854 MLX5_FLOW_ACTION_OF_SET_VLAN_VID))
12855 flow_dev_get_vlan_info_from_items(items, &vlan);
12856 vlan.eth_proto = rte_be_to_cpu_16
12857 ((((const struct rte_flow_action_of_push_vlan *)
12858 actions->conf)->ethertype));
12859 found_action = mlx5_flow_find_action
12861 RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
12863 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12864 found_action = mlx5_flow_find_action
12866 RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
12868 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12869 if (flow_dv_create_action_push_vlan
12870 (dev, attr, &vlan, dev_flow, error))
12872 dev_flow->dv.actions[actions_n++] =
12873 dev_flow->dv.push_vlan_res->action;
12874 action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
12876 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
12877 /* of_vlan_push action handled this action */
12878 MLX5_ASSERT(action_flags &
12879 MLX5_FLOW_ACTION_OF_PUSH_VLAN);
12881 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
12882 if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
12884 flow_dev_get_vlan_info_from_items(items, &vlan);
12885 mlx5_update_vlan_vid_pcp(actions, &vlan);
12886 /* If no VLAN push - this is a modify header action */
12887 if (flow_dv_convert_action_modify_vlan_vid
12888 (mhdr_res, actions, error))
12890 action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
12892 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
12893 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
12894 if (flow_dv_create_action_l2_encap(dev, actions,
12899 dev_flow->dv.actions[actions_n++] =
12900 dev_flow->dv.encap_decap->action;
12901 action_flags |= MLX5_FLOW_ACTION_ENCAP;
12902 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12903 sample_act->action_flags |=
12904 MLX5_FLOW_ACTION_ENCAP;
12906 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
12907 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
12908 if (flow_dv_create_action_l2_decap(dev, dev_flow,
12912 dev_flow->dv.actions[actions_n++] =
12913 dev_flow->dv.encap_decap->action;
12914 action_flags |= MLX5_FLOW_ACTION_DECAP;
12916 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
12917 /* Handle encap with preceding decap. */
12918 if (action_flags & MLX5_FLOW_ACTION_DECAP) {
12919 if (flow_dv_create_action_raw_encap
12920 (dev, actions, dev_flow, attr, error))
12922 dev_flow->dv.actions[actions_n++] =
12923 dev_flow->dv.encap_decap->action;
12925 /* Handle encap without preceding decap. */
12926 if (flow_dv_create_action_l2_encap
12927 (dev, actions, dev_flow, attr->transfer,
12930 dev_flow->dv.actions[actions_n++] =
12931 dev_flow->dv.encap_decap->action;
12933 action_flags |= MLX5_FLOW_ACTION_ENCAP;
12934 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12935 sample_act->action_flags |=
12936 MLX5_FLOW_ACTION_ENCAP;
12938 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
12939 while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
12941 if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
12942 if (flow_dv_create_action_l2_decap
12943 (dev, dev_flow, attr->transfer, error))
12945 dev_flow->dv.actions[actions_n++] =
12946 dev_flow->dv.encap_decap->action;
12948 /* If decap is followed by encap, handle it at encap. */
12949 action_flags |= MLX5_FLOW_ACTION_DECAP;
12951 case MLX5_RTE_FLOW_ACTION_TYPE_JUMP:
12952 dev_flow->dv.actions[actions_n++] =
12953 (void *)(uintptr_t)action->conf;
12954 action_flags |= MLX5_FLOW_ACTION_JUMP;
12956 case RTE_FLOW_ACTION_TYPE_JUMP:
12957 jump_group = ((const struct rte_flow_action_jump *)
12958 action->conf)->group;
12959 grp_info.std_tbl_fix = 0;
12960 if (dev_flow->skip_scale &
12961 (1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT))
12962 grp_info.skip_scale = 1;
12964 grp_info.skip_scale = 0;
12965 ret = mlx5_flow_group_to_table(dev, tunnel,
12971 tbl = flow_dv_tbl_resource_get(dev, table, attr->egress,
12973 !!dev_flow->external,
12974 tunnel, jump_group, 0,
12977 return rte_flow_error_set
12979 RTE_FLOW_ERROR_TYPE_ACTION,
12981 "cannot create jump action.");
12982 if (flow_dv_jump_tbl_resource_register
12983 (dev, tbl, dev_flow, error)) {
12984 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
12985 return rte_flow_error_set
12987 RTE_FLOW_ERROR_TYPE_ACTION,
12989 "cannot create jump action.");
12991 dev_flow->dv.actions[actions_n++] =
12992 dev_flow->dv.jump->action;
12993 action_flags |= MLX5_FLOW_ACTION_JUMP;
12994 dev_flow->handle->fate_action = MLX5_FLOW_FATE_JUMP;
12995 sample_act->action_flags |= MLX5_FLOW_ACTION_JUMP;
12998 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
12999 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
13000 if (flow_dv_convert_action_modify_mac
13001 (mhdr_res, actions, error))
13003 action_flags |= actions->type ==
13004 RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
13005 MLX5_FLOW_ACTION_SET_MAC_SRC :
13006 MLX5_FLOW_ACTION_SET_MAC_DST;
13008 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
13009 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
13010 if (flow_dv_convert_action_modify_ipv4
13011 (mhdr_res, actions, error))
13013 action_flags |= actions->type ==
13014 RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
13015 MLX5_FLOW_ACTION_SET_IPV4_SRC :
13016 MLX5_FLOW_ACTION_SET_IPV4_DST;
13018 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
13019 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
13020 if (flow_dv_convert_action_modify_ipv6
13021 (mhdr_res, actions, error))
13023 action_flags |= actions->type ==
13024 RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
13025 MLX5_FLOW_ACTION_SET_IPV6_SRC :
13026 MLX5_FLOW_ACTION_SET_IPV6_DST;
13028 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
13029 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
13030 if (flow_dv_convert_action_modify_tp
13031 (mhdr_res, actions, items,
13032 &flow_attr, dev_flow, !!(action_flags &
13033 MLX5_FLOW_ACTION_DECAP), error))
13035 action_flags |= actions->type ==
13036 RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
13037 MLX5_FLOW_ACTION_SET_TP_SRC :
13038 MLX5_FLOW_ACTION_SET_TP_DST;
13040 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
13041 if (flow_dv_convert_action_modify_dec_ttl
13042 (mhdr_res, items, &flow_attr, dev_flow,
13044 MLX5_FLOW_ACTION_DECAP), error))
13046 action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
13048 case RTE_FLOW_ACTION_TYPE_SET_TTL:
13049 if (flow_dv_convert_action_modify_ttl
13050 (mhdr_res, actions, items, &flow_attr,
13051 dev_flow, !!(action_flags &
13052 MLX5_FLOW_ACTION_DECAP), error))
13054 action_flags |= MLX5_FLOW_ACTION_SET_TTL;
13056 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
13057 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
13058 if (flow_dv_convert_action_modify_tcp_seq
13059 (mhdr_res, actions, error))
13061 action_flags |= actions->type ==
13062 RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
13063 MLX5_FLOW_ACTION_INC_TCP_SEQ :
13064 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
13067 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
13068 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
13069 if (flow_dv_convert_action_modify_tcp_ack
13070 (mhdr_res, actions, error))
13072 action_flags |= actions->type ==
13073 RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
13074 MLX5_FLOW_ACTION_INC_TCP_ACK :
13075 MLX5_FLOW_ACTION_DEC_TCP_ACK;
13077 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
13078 if (flow_dv_convert_action_set_reg
13079 (mhdr_res, actions, error))
13081 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13083 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
13084 if (flow_dv_convert_action_copy_mreg
13085 (dev, mhdr_res, actions, error))
13087 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13089 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
13090 action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
13091 dev_flow->handle->fate_action =
13092 MLX5_FLOW_FATE_DEFAULT_MISS;
13094 case RTE_FLOW_ACTION_TYPE_METER:
13096 return rte_flow_error_set(error, rte_errno,
13097 RTE_FLOW_ERROR_TYPE_ACTION,
13098 NULL, "Failed to get meter in flow.");
13099 /* Set the meter action. */
13100 dev_flow->dv.actions[actions_n++] =
13101 wks->fm->meter_action;
13102 action_flags |= MLX5_FLOW_ACTION_METER;
13104 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
13105 if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
13108 action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
13110 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
13111 if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
13114 action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
13116 case RTE_FLOW_ACTION_TYPE_SAMPLE:
13117 sample_act_pos = actions_n;
13118 sample = (const struct rte_flow_action_sample *)
13121 action_flags |= MLX5_FLOW_ACTION_SAMPLE;
13122 /* put encap action into group if work with port id */
13123 if ((action_flags & MLX5_FLOW_ACTION_ENCAP) &&
13124 (action_flags & MLX5_FLOW_ACTION_PORT_ID))
13125 sample_act->action_flags |=
13126 MLX5_FLOW_ACTION_ENCAP;
13128 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
13129 if (flow_dv_convert_action_modify_field
13130 (dev, mhdr_res, actions, attr, error))
13132 action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
13134 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
13135 owner_idx = (uint32_t)(uintptr_t)action->conf;
13136 ct = flow_aso_ct_get_by_idx(dev, owner_idx);
13138 return rte_flow_error_set(error, EINVAL,
13139 RTE_FLOW_ERROR_TYPE_ACTION,
13141 "Failed to get CT object.");
13142 if (mlx5_aso_ct_available(priv->sh, ct))
13143 return rte_flow_error_set(error, rte_errno,
13144 RTE_FLOW_ERROR_TYPE_ACTION,
13146 "CT is unavailable.");
13147 if (ct->is_original)
13148 dev_flow->dv.actions[actions_n] =
13149 ct->dr_action_orig;
13151 dev_flow->dv.actions[actions_n] =
13152 ct->dr_action_rply;
13153 flow->indirect_type = MLX5_INDIRECT_ACTION_TYPE_CT;
13154 flow->ct = owner_idx;
13155 __atomic_fetch_add(&ct->refcnt, 1, __ATOMIC_RELAXED);
13157 action_flags |= MLX5_FLOW_ACTION_CT;
13159 case RTE_FLOW_ACTION_TYPE_END:
13160 actions_end = true;
13161 if (mhdr_res->actions_num) {
13162 /* create modify action if needed. */
13163 if (flow_dv_modify_hdr_resource_register
13164 (dev, mhdr_res, dev_flow, error))
13166 dev_flow->dv.actions[modify_action_position] =
13167 handle->dvh.modify_hdr->action;
13170 * Handle AGE and COUNT action by single HW counter
13171 * when they are not shared.
13173 if (action_flags & MLX5_FLOW_ACTION_AGE) {
13174 if ((non_shared_age &&
13175 count && !count->shared) ||
13176 !(priv->sh->flow_hit_aso_en &&
13177 (attr->group || attr->transfer))) {
13178 /* Creates age by counters. */
13179 cnt_act = flow_dv_prepare_counter
13186 dev_flow->dv.actions[age_act_pos] =
13190 if (!flow->age && non_shared_age) {
13191 flow->age = flow_dv_aso_age_alloc
13195 flow_dv_aso_age_params_init
13197 non_shared_age->context ?
13198 non_shared_age->context :
13199 (void *)(uintptr_t)
13200 (dev_flow->flow_idx),
13201 non_shared_age->timeout);
13203 age_act = flow_aso_age_get_by_idx(dev,
13205 dev_flow->dv.actions[age_act_pos] =
13206 age_act->dr_action;
13208 if (action_flags & MLX5_FLOW_ACTION_COUNT) {
13210 * Create one count action, to be used
13211 * by all sub-flows.
13213 cnt_act = flow_dv_prepare_counter(dev, dev_flow,
13218 dev_flow->dv.actions[actions_n++] =
13224 if (mhdr_res->actions_num &&
13225 modify_action_position == UINT32_MAX)
13226 modify_action_position = actions_n++;
13228 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
13229 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
13230 int item_type = items->type;
13232 if (!mlx5_flow_os_item_supported(item_type))
13233 return rte_flow_error_set(error, ENOTSUP,
13234 RTE_FLOW_ERROR_TYPE_ITEM,
13235 NULL, "item not supported");
13236 switch (item_type) {
13237 case RTE_FLOW_ITEM_TYPE_PORT_ID:
13238 flow_dv_translate_item_port_id
13239 (dev, match_mask, match_value, items, attr);
13240 last_item = MLX5_FLOW_ITEM_PORT_ID;
13242 case RTE_FLOW_ITEM_TYPE_ETH:
13243 flow_dv_translate_item_eth(match_mask, match_value,
13245 dev_flow->dv.group);
13246 matcher.priority = action_flags &
13247 MLX5_FLOW_ACTION_DEFAULT_MISS &&
13248 !dev_flow->external ?
13249 MLX5_PRIORITY_MAP_L3 :
13250 MLX5_PRIORITY_MAP_L2;
13251 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
13252 MLX5_FLOW_LAYER_OUTER_L2;
13254 case RTE_FLOW_ITEM_TYPE_VLAN:
13255 flow_dv_translate_item_vlan(dev_flow,
13256 match_mask, match_value,
13258 dev_flow->dv.group);
13259 matcher.priority = MLX5_PRIORITY_MAP_L2;
13260 last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
13261 MLX5_FLOW_LAYER_INNER_VLAN) :
13262 (MLX5_FLOW_LAYER_OUTER_L2 |
13263 MLX5_FLOW_LAYER_OUTER_VLAN);
13265 case RTE_FLOW_ITEM_TYPE_IPV4:
13266 mlx5_flow_tunnel_ip_check(items, next_protocol,
13267 &item_flags, &tunnel);
13268 flow_dv_translate_item_ipv4(match_mask, match_value,
13270 dev_flow->dv.group);
13271 matcher.priority = MLX5_PRIORITY_MAP_L3;
13272 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
13273 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
13274 if (items->mask != NULL &&
13275 ((const struct rte_flow_item_ipv4 *)
13276 items->mask)->hdr.next_proto_id) {
13278 ((const struct rte_flow_item_ipv4 *)
13279 (items->spec))->hdr.next_proto_id;
13281 ((const struct rte_flow_item_ipv4 *)
13282 (items->mask))->hdr.next_proto_id;
13284 /* Reset for inner layer. */
13285 next_protocol = 0xff;
13288 case RTE_FLOW_ITEM_TYPE_IPV6:
13289 mlx5_flow_tunnel_ip_check(items, next_protocol,
13290 &item_flags, &tunnel);
13291 flow_dv_translate_item_ipv6(match_mask, match_value,
13293 dev_flow->dv.group);
13294 matcher.priority = MLX5_PRIORITY_MAP_L3;
13295 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
13296 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
13297 if (items->mask != NULL &&
13298 ((const struct rte_flow_item_ipv6 *)
13299 items->mask)->hdr.proto) {
13301 ((const struct rte_flow_item_ipv6 *)
13302 items->spec)->hdr.proto;
13304 ((const struct rte_flow_item_ipv6 *)
13305 items->mask)->hdr.proto;
13307 /* Reset for inner layer. */
13308 next_protocol = 0xff;
13311 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
13312 flow_dv_translate_item_ipv6_frag_ext(match_mask,
13315 last_item = tunnel ?
13316 MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
13317 MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
13318 if (items->mask != NULL &&
13319 ((const struct rte_flow_item_ipv6_frag_ext *)
13320 items->mask)->hdr.next_header) {
13322 ((const struct rte_flow_item_ipv6_frag_ext *)
13323 items->spec)->hdr.next_header;
13325 ((const struct rte_flow_item_ipv6_frag_ext *)
13326 items->mask)->hdr.next_header;
13328 /* Reset for inner layer. */
13329 next_protocol = 0xff;
13332 case RTE_FLOW_ITEM_TYPE_TCP:
13333 flow_dv_translate_item_tcp(match_mask, match_value,
13335 matcher.priority = MLX5_PRIORITY_MAP_L4;
13336 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
13337 MLX5_FLOW_LAYER_OUTER_L4_TCP;
13339 case RTE_FLOW_ITEM_TYPE_UDP:
13340 flow_dv_translate_item_udp(match_mask, match_value,
13342 matcher.priority = MLX5_PRIORITY_MAP_L4;
13343 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
13344 MLX5_FLOW_LAYER_OUTER_L4_UDP;
13346 case RTE_FLOW_ITEM_TYPE_GRE:
13347 flow_dv_translate_item_gre(match_mask, match_value,
13349 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13350 last_item = MLX5_FLOW_LAYER_GRE;
13352 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
13353 flow_dv_translate_item_gre_key(match_mask,
13354 match_value, items);
13355 last_item = MLX5_FLOW_LAYER_GRE_KEY;
13357 case RTE_FLOW_ITEM_TYPE_NVGRE:
13358 flow_dv_translate_item_nvgre(match_mask, match_value,
13360 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13361 last_item = MLX5_FLOW_LAYER_GRE;
13363 case RTE_FLOW_ITEM_TYPE_VXLAN:
13364 flow_dv_translate_item_vxlan(dev, attr,
13365 match_mask, match_value,
13367 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13368 last_item = MLX5_FLOW_LAYER_VXLAN;
13370 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
13371 flow_dv_translate_item_vxlan_gpe(match_mask,
13372 match_value, items,
13374 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13375 last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
13377 case RTE_FLOW_ITEM_TYPE_GENEVE:
13378 flow_dv_translate_item_geneve(match_mask, match_value,
13380 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13381 last_item = MLX5_FLOW_LAYER_GENEVE;
13383 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
13384 ret = flow_dv_translate_item_geneve_opt(dev, match_mask,
13388 return rte_flow_error_set(error, -ret,
13389 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13390 "cannot create GENEVE TLV option");
13391 flow->geneve_tlv_option = 1;
13392 last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
13394 case RTE_FLOW_ITEM_TYPE_MPLS:
13395 flow_dv_translate_item_mpls(match_mask, match_value,
13396 items, last_item, tunnel);
13397 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13398 last_item = MLX5_FLOW_LAYER_MPLS;
13400 case RTE_FLOW_ITEM_TYPE_MARK:
13401 flow_dv_translate_item_mark(dev, match_mask,
13402 match_value, items);
13403 last_item = MLX5_FLOW_ITEM_MARK;
13405 case RTE_FLOW_ITEM_TYPE_META:
13406 flow_dv_translate_item_meta(dev, match_mask,
13407 match_value, attr, items);
13408 last_item = MLX5_FLOW_ITEM_METADATA;
13410 case RTE_FLOW_ITEM_TYPE_ICMP:
13411 flow_dv_translate_item_icmp(match_mask, match_value,
13413 last_item = MLX5_FLOW_LAYER_ICMP;
13415 case RTE_FLOW_ITEM_TYPE_ICMP6:
13416 flow_dv_translate_item_icmp6(match_mask, match_value,
13418 last_item = MLX5_FLOW_LAYER_ICMP6;
13420 case RTE_FLOW_ITEM_TYPE_TAG:
13421 flow_dv_translate_item_tag(dev, match_mask,
13422 match_value, items);
13423 last_item = MLX5_FLOW_ITEM_TAG;
13425 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
13426 flow_dv_translate_mlx5_item_tag(dev, match_mask,
13427 match_value, items);
13428 last_item = MLX5_FLOW_ITEM_TAG;
13430 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
13431 flow_dv_translate_item_tx_queue(dev, match_mask,
13434 last_item = MLX5_FLOW_ITEM_TX_QUEUE;
13436 case RTE_FLOW_ITEM_TYPE_GTP:
13437 flow_dv_translate_item_gtp(match_mask, match_value,
13439 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13440 last_item = MLX5_FLOW_LAYER_GTP;
13442 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
13443 ret = flow_dv_translate_item_gtp_psc(match_mask,
13447 return rte_flow_error_set(error, -ret,
13448 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13449 "cannot create GTP PSC item");
13450 last_item = MLX5_FLOW_LAYER_GTP_PSC;
13452 case RTE_FLOW_ITEM_TYPE_ECPRI:
13453 if (!mlx5_flex_parser_ecpri_exist(dev)) {
13454 /* Create it only the first time to be used. */
13455 ret = mlx5_flex_parser_ecpri_alloc(dev);
13457 return rte_flow_error_set
13459 RTE_FLOW_ERROR_TYPE_ITEM,
13461 "cannot create eCPRI parser");
13463 flow_dv_translate_item_ecpri(dev, match_mask,
13464 match_value, items);
13465 /* No other protocol should follow eCPRI layer. */
13466 last_item = MLX5_FLOW_LAYER_ECPRI;
13468 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
13469 flow_dv_translate_item_integrity(match_mask,
13473 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
13474 flow_dv_translate_item_aso_ct(dev, match_mask,
13475 match_value, items);
13480 item_flags |= last_item;
13483 * When E-Switch mode is enabled, we have two cases where we need to
13484 * set the source port manually.
13485 * The first one, is in case of Nic steering rule, and the second is
13486 * E-Switch rule where no port_id item was found. In both cases
13487 * the source port is set according the current port in use.
13489 if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
13490 (priv->representor || priv->master)) {
13491 if (flow_dv_translate_item_port_id(dev, match_mask,
13492 match_value, NULL, attr))
13495 #ifdef RTE_LIBRTE_MLX5_DEBUG
13496 MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
13497 dev_flow->dv.value.buf));
13500 * Layers may be already initialized from prefix flow if this dev_flow
13501 * is the suffix flow.
13503 handle->layers |= item_flags;
13504 if (action_flags & MLX5_FLOW_ACTION_RSS)
13505 flow_dv_hashfields_set(dev_flow, rss_desc);
13506 /* If has RSS action in the sample action, the Sample/Mirror resource
13507 * should be registered after the hash filed be update.
13509 if (action_flags & MLX5_FLOW_ACTION_SAMPLE) {
13510 ret = flow_dv_translate_action_sample(dev,
13519 ret = flow_dv_create_action_sample(dev,
13528 return rte_flow_error_set
13530 RTE_FLOW_ERROR_TYPE_ACTION,
13532 "cannot create sample action");
13533 if (num_of_dest > 1) {
13534 dev_flow->dv.actions[sample_act_pos] =
13535 dev_flow->dv.dest_array_res->action;
13537 dev_flow->dv.actions[sample_act_pos] =
13538 dev_flow->dv.sample_res->verbs_action;
13542 * For multiple destination (sample action with ratio=1), the encap
13543 * action and port id action will be combined into group action.
13544 * So need remove the original these actions in the flow and only
13545 * use the sample action instead of.
13547 if (num_of_dest > 1 &&
13548 (sample_act->dr_port_id_action || sample_act->dr_jump_action)) {
13550 void *temp_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
13552 for (i = 0; i < actions_n; i++) {
13553 if ((sample_act->dr_encap_action &&
13554 sample_act->dr_encap_action ==
13555 dev_flow->dv.actions[i]) ||
13556 (sample_act->dr_port_id_action &&
13557 sample_act->dr_port_id_action ==
13558 dev_flow->dv.actions[i]) ||
13559 (sample_act->dr_jump_action &&
13560 sample_act->dr_jump_action ==
13561 dev_flow->dv.actions[i]))
13563 temp_actions[tmp_actions_n++] = dev_flow->dv.actions[i];
13565 memcpy((void *)dev_flow->dv.actions,
13566 (void *)temp_actions,
13567 tmp_actions_n * sizeof(void *));
13568 actions_n = tmp_actions_n;
13570 dev_flow->dv.actions_n = actions_n;
13571 dev_flow->act_flags = action_flags;
13572 if (wks->skip_matcher_reg)
13574 /* Register matcher. */
13575 matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
13576 matcher.mask.size);
13577 matcher.priority = mlx5_get_matcher_priority(dev, attr,
13580 * When creating meter drop flow in drop table, using original
13581 * 5-tuple match, the matcher priority should be lower than
13584 if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
13585 dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP &&
13586 matcher.priority <= MLX5_REG_BITS)
13587 matcher.priority += MLX5_REG_BITS;
13588 /* reserved field no needs to be set to 0 here. */
13589 tbl_key.is_fdb = attr->transfer;
13590 tbl_key.is_egress = attr->egress;
13591 tbl_key.level = dev_flow->dv.group;
13592 tbl_key.id = dev_flow->dv.table_id;
13593 if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow,
13594 tunnel, attr->group, error))
13600 * Set hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13603 * @param[in, out] action
13604 * Shred RSS action holding hash RX queue objects.
13605 * @param[in] hash_fields
13606 * Defines combination of packet fields to participate in RX hash.
13607 * @param[in] tunnel
13609 * @param[in] hrxq_idx
13610 * Hash RX queue index to set.
13613 * 0 on success, otherwise negative errno value.
13616 __flow_dv_action_rss_hrxq_set(struct mlx5_shared_action_rss *action,
13617 const uint64_t hash_fields,
13620 uint32_t *hrxqs = action->hrxq;
13622 switch (hash_fields & ~IBV_RX_HASH_INNER) {
13623 case MLX5_RSS_HASH_IPV4:
13624 /* fall-through. */
13625 case MLX5_RSS_HASH_IPV4_DST_ONLY:
13626 /* fall-through. */
13627 case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13628 hrxqs[0] = hrxq_idx;
13630 case MLX5_RSS_HASH_IPV4_TCP:
13631 /* fall-through. */
13632 case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13633 /* fall-through. */
13634 case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13635 hrxqs[1] = hrxq_idx;
13637 case MLX5_RSS_HASH_IPV4_UDP:
13638 /* fall-through. */
13639 case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13640 /* fall-through. */
13641 case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13642 hrxqs[2] = hrxq_idx;
13644 case MLX5_RSS_HASH_IPV6:
13645 /* fall-through. */
13646 case MLX5_RSS_HASH_IPV6_DST_ONLY:
13647 /* fall-through. */
13648 case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13649 hrxqs[3] = hrxq_idx;
13651 case MLX5_RSS_HASH_IPV6_TCP:
13652 /* fall-through. */
13653 case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13654 /* fall-through. */
13655 case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13656 hrxqs[4] = hrxq_idx;
13658 case MLX5_RSS_HASH_IPV6_UDP:
13659 /* fall-through. */
13660 case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13661 /* fall-through. */
13662 case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13663 hrxqs[5] = hrxq_idx;
13665 case MLX5_RSS_HASH_NONE:
13666 hrxqs[6] = hrxq_idx;
13674 * Look up for hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13678 * Pointer to the Ethernet device structure.
13680 * Shared RSS action ID holding hash RX queue objects.
13681 * @param[in] hash_fields
13682 * Defines combination of packet fields to participate in RX hash.
13683 * @param[in] tunnel
13687 * Valid hash RX queue index, otherwise 0.
13690 __flow_dv_action_rss_hrxq_lookup(struct rte_eth_dev *dev, uint32_t idx,
13691 const uint64_t hash_fields)
13693 struct mlx5_priv *priv = dev->data->dev_private;
13694 struct mlx5_shared_action_rss *shared_rss =
13695 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
13696 const uint32_t *hrxqs = shared_rss->hrxq;
13698 switch (hash_fields & ~IBV_RX_HASH_INNER) {
13699 case MLX5_RSS_HASH_IPV4:
13700 /* fall-through. */
13701 case MLX5_RSS_HASH_IPV4_DST_ONLY:
13702 /* fall-through. */
13703 case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13705 case MLX5_RSS_HASH_IPV4_TCP:
13706 /* fall-through. */
13707 case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13708 /* fall-through. */
13709 case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13711 case MLX5_RSS_HASH_IPV4_UDP:
13712 /* fall-through. */
13713 case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13714 /* fall-through. */
13715 case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13717 case MLX5_RSS_HASH_IPV6:
13718 /* fall-through. */
13719 case MLX5_RSS_HASH_IPV6_DST_ONLY:
13720 /* fall-through. */
13721 case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13723 case MLX5_RSS_HASH_IPV6_TCP:
13724 /* fall-through. */
13725 case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13726 /* fall-through. */
13727 case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13729 case MLX5_RSS_HASH_IPV6_UDP:
13730 /* fall-through. */
13731 case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13732 /* fall-through. */
13733 case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13735 case MLX5_RSS_HASH_NONE:
13744 * Apply the flow to the NIC, lock free,
13745 * (mutex should be acquired by caller).
13748 * Pointer to the Ethernet device structure.
13749 * @param[in, out] flow
13750 * Pointer to flow structure.
13751 * @param[out] error
13752 * Pointer to error structure.
13755 * 0 on success, a negative errno value otherwise and rte_errno is set.
13758 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
13759 struct rte_flow_error *error)
13761 struct mlx5_flow_dv_workspace *dv;
13762 struct mlx5_flow_handle *dh;
13763 struct mlx5_flow_handle_dv *dv_h;
13764 struct mlx5_flow *dev_flow;
13765 struct mlx5_priv *priv = dev->data->dev_private;
13766 uint32_t handle_idx;
13770 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
13771 struct mlx5_flow_rss_desc *rss_desc = &wks->rss_desc;
13775 for (idx = wks->flow_idx - 1; idx >= 0; idx--) {
13776 dev_flow = &wks->flows[idx];
13777 dv = &dev_flow->dv;
13778 dh = dev_flow->handle;
13781 if (dh->fate_action == MLX5_FLOW_FATE_DROP) {
13782 if (dv->transfer) {
13783 MLX5_ASSERT(priv->sh->dr_drop_action);
13784 dv->actions[n++] = priv->sh->dr_drop_action;
13786 #ifdef HAVE_MLX5DV_DR
13787 /* DR supports drop action placeholder. */
13788 MLX5_ASSERT(priv->sh->dr_drop_action);
13789 dv->actions[n++] = dv->group ?
13790 priv->sh->dr_drop_action :
13791 priv->root_drop_action;
13793 /* For DV we use the explicit drop queue. */
13794 MLX5_ASSERT(priv->drop_queue.hrxq);
13796 priv->drop_queue.hrxq->action;
13799 } else if ((dh->fate_action == MLX5_FLOW_FATE_QUEUE &&
13800 !dv_h->rix_sample && !dv_h->rix_dest_array)) {
13801 struct mlx5_hrxq *hrxq;
13804 hrxq = flow_dv_hrxq_prepare(dev, dev_flow, rss_desc,
13809 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13810 "cannot get hash queue");
13813 dh->rix_hrxq = hrxq_idx;
13814 dv->actions[n++] = hrxq->action;
13815 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13816 struct mlx5_hrxq *hrxq = NULL;
13819 hrxq_idx = __flow_dv_action_rss_hrxq_lookup(dev,
13820 rss_desc->shared_rss,
13821 dev_flow->hash_fields);
13823 hrxq = mlx5_ipool_get
13824 (priv->sh->ipool[MLX5_IPOOL_HRXQ],
13829 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13830 "cannot get hash queue");
13833 dh->rix_srss = rss_desc->shared_rss;
13834 dv->actions[n++] = hrxq->action;
13835 } else if (dh->fate_action == MLX5_FLOW_FATE_DEFAULT_MISS) {
13836 if (!priv->sh->default_miss_action) {
13839 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13840 "default miss action not be created.");
13843 dv->actions[n++] = priv->sh->default_miss_action;
13845 misc_mask = flow_dv_matcher_enable(dv->value.buf);
13846 __flow_dv_adjust_buf_size(&dv->value.size, misc_mask);
13847 err = mlx5_flow_os_create_flow(dv_h->matcher->matcher_object,
13848 (void *)&dv->value, n,
13849 dv->actions, &dh->drv_flow);
13853 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
13855 (!priv->config.allow_duplicate_pattern &&
13857 "duplicating pattern is not allowed" :
13858 "hardware refuses to create flow");
13861 if (priv->vmwa_context &&
13862 dh->vf_vlan.tag && !dh->vf_vlan.created) {
13864 * The rule contains the VLAN pattern.
13865 * For VF we are going to create VLAN
13866 * interface to make hypervisor set correct
13867 * e-Switch vport context.
13869 mlx5_vlan_vmwa_acquire(dev, &dh->vf_vlan);
13874 err = rte_errno; /* Save rte_errno before cleanup. */
13875 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
13876 handle_idx, dh, next) {
13877 /* hrxq is union, don't clear it if the flag is not set. */
13878 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE && dh->rix_hrxq) {
13879 mlx5_hrxq_release(dev, dh->rix_hrxq);
13881 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13884 if (dh->vf_vlan.tag && dh->vf_vlan.created)
13885 mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
13887 rte_errno = err; /* Restore rte_errno. */
13892 flow_dv_matcher_remove_cb(void *tool_ctx __rte_unused,
13893 struct mlx5_list_entry *entry)
13895 struct mlx5_flow_dv_matcher *resource = container_of(entry,
13899 claim_zero(mlx5_flow_os_destroy_flow_matcher(resource->matcher_object));
13900 mlx5_free(resource);
13904 * Release the flow matcher.
13907 * Pointer to Ethernet device.
13909 * Index to port ID action resource.
13912 * 1 while a reference on it exists, 0 when freed.
13915 flow_dv_matcher_release(struct rte_eth_dev *dev,
13916 struct mlx5_flow_handle *handle)
13918 struct mlx5_flow_dv_matcher *matcher = handle->dvh.matcher;
13919 struct mlx5_flow_tbl_data_entry *tbl = container_of(matcher->tbl,
13920 typeof(*tbl), tbl);
13923 MLX5_ASSERT(matcher->matcher_object);
13924 ret = mlx5_list_unregister(tbl->matchers, &matcher->entry);
13925 flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl->tbl);
13930 flow_dv_encap_decap_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
13932 struct mlx5_dev_ctx_shared *sh = tool_ctx;
13933 struct mlx5_flow_dv_encap_decap_resource *res =
13934 container_of(entry, typeof(*res), entry);
13936 claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
13937 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
13941 * Release an encap/decap resource.
13944 * Pointer to Ethernet device.
13945 * @param encap_decap_idx
13946 * Index of encap decap resource.
13949 * 1 while a reference on it exists, 0 when freed.
13952 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
13953 uint32_t encap_decap_idx)
13955 struct mlx5_priv *priv = dev->data->dev_private;
13956 struct mlx5_flow_dv_encap_decap_resource *resource;
13958 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
13962 MLX5_ASSERT(resource->action);
13963 return mlx5_hlist_unregister(priv->sh->encaps_decaps, &resource->entry);
13967 * Release an jump to table action resource.
13970 * Pointer to Ethernet device.
13972 * Index to the jump action resource.
13975 * 1 while a reference on it exists, 0 when freed.
13978 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
13981 struct mlx5_priv *priv = dev->data->dev_private;
13982 struct mlx5_flow_tbl_data_entry *tbl_data;
13984 tbl_data = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_JUMP],
13988 return flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl_data->tbl);
13992 flow_dv_modify_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
13994 struct mlx5_flow_dv_modify_hdr_resource *res =
13995 container_of(entry, typeof(*res), entry);
13996 struct mlx5_dev_ctx_shared *sh = tool_ctx;
13998 claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
13999 mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
14003 * Release a modify-header resource.
14006 * Pointer to Ethernet device.
14008 * Pointer to mlx5_flow_handle.
14011 * 1 while a reference on it exists, 0 when freed.
14014 flow_dv_modify_hdr_resource_release(struct rte_eth_dev *dev,
14015 struct mlx5_flow_handle *handle)
14017 struct mlx5_priv *priv = dev->data->dev_private;
14018 struct mlx5_flow_dv_modify_hdr_resource *entry = handle->dvh.modify_hdr;
14020 MLX5_ASSERT(entry->action);
14021 return mlx5_hlist_unregister(priv->sh->modify_cmds, &entry->entry);
14025 flow_dv_port_id_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14027 struct mlx5_dev_ctx_shared *sh = tool_ctx;
14028 struct mlx5_flow_dv_port_id_action_resource *resource =
14029 container_of(entry, typeof(*resource), entry);
14031 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14032 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
14036 * Release port ID action resource.
14039 * Pointer to Ethernet device.
14041 * Pointer to mlx5_flow_handle.
14044 * 1 while a reference on it exists, 0 when freed.
14047 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
14050 struct mlx5_priv *priv = dev->data->dev_private;
14051 struct mlx5_flow_dv_port_id_action_resource *resource;
14053 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PORT_ID], port_id);
14056 MLX5_ASSERT(resource->action);
14057 return mlx5_list_unregister(priv->sh->port_id_action_list,
14062 * Release shared RSS action resource.
14065 * Pointer to Ethernet device.
14067 * Shared RSS action index.
14070 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss)
14072 struct mlx5_priv *priv = dev->data->dev_private;
14073 struct mlx5_shared_action_rss *shared_rss;
14075 shared_rss = mlx5_ipool_get
14076 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], srss);
14077 __atomic_sub_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14081 flow_dv_push_vlan_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14083 struct mlx5_dev_ctx_shared *sh = tool_ctx;
14084 struct mlx5_flow_dv_push_vlan_action_resource *resource =
14085 container_of(entry, typeof(*resource), entry);
14087 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14088 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
14092 * Release push vlan action resource.
14095 * Pointer to Ethernet device.
14097 * Pointer to mlx5_flow_handle.
14100 * 1 while a reference on it exists, 0 when freed.
14103 flow_dv_push_vlan_action_resource_release(struct rte_eth_dev *dev,
14104 struct mlx5_flow_handle *handle)
14106 struct mlx5_priv *priv = dev->data->dev_private;
14107 struct mlx5_flow_dv_push_vlan_action_resource *resource;
14108 uint32_t idx = handle->dvh.rix_push_vlan;
14110 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
14113 MLX5_ASSERT(resource->action);
14114 return mlx5_list_unregister(priv->sh->push_vlan_action_list,
14119 * Release the fate resource.
14122 * Pointer to Ethernet device.
14124 * Pointer to mlx5_flow_handle.
14127 flow_dv_fate_resource_release(struct rte_eth_dev *dev,
14128 struct mlx5_flow_handle *handle)
14130 if (!handle->rix_fate)
14132 switch (handle->fate_action) {
14133 case MLX5_FLOW_FATE_QUEUE:
14134 if (!handle->dvh.rix_sample && !handle->dvh.rix_dest_array)
14135 mlx5_hrxq_release(dev, handle->rix_hrxq);
14137 case MLX5_FLOW_FATE_JUMP:
14138 flow_dv_jump_tbl_resource_release(dev, handle->rix_jump);
14140 case MLX5_FLOW_FATE_PORT_ID:
14141 flow_dv_port_id_action_resource_release(dev,
14142 handle->rix_port_id_action);
14145 DRV_LOG(DEBUG, "Incorrect fate action:%d", handle->fate_action);
14148 handle->rix_fate = 0;
14152 flow_dv_sample_remove_cb(void *tool_ctx __rte_unused,
14153 struct mlx5_list_entry *entry)
14155 struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
14158 struct rte_eth_dev *dev = resource->dev;
14159 struct mlx5_priv *priv = dev->data->dev_private;
14161 if (resource->verbs_action)
14162 claim_zero(mlx5_flow_os_destroy_flow_action
14163 (resource->verbs_action));
14164 if (resource->normal_path_tbl)
14165 flow_dv_tbl_resource_release(MLX5_SH(dev),
14166 resource->normal_path_tbl);
14167 flow_dv_sample_sub_actions_release(dev, &resource->sample_idx);
14168 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
14169 DRV_LOG(DEBUG, "sample resource %p: removed", (void *)resource);
14173 * Release an sample resource.
14176 * Pointer to Ethernet device.
14178 * Pointer to mlx5_flow_handle.
14181 * 1 while a reference on it exists, 0 when freed.
14184 flow_dv_sample_resource_release(struct rte_eth_dev *dev,
14185 struct mlx5_flow_handle *handle)
14187 struct mlx5_priv *priv = dev->data->dev_private;
14188 struct mlx5_flow_dv_sample_resource *resource;
14190 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
14191 handle->dvh.rix_sample);
14194 MLX5_ASSERT(resource->verbs_action);
14195 return mlx5_list_unregister(priv->sh->sample_action_list,
14200 flow_dv_dest_array_remove_cb(void *tool_ctx __rte_unused,
14201 struct mlx5_list_entry *entry)
14203 struct mlx5_flow_dv_dest_array_resource *resource =
14204 container_of(entry, typeof(*resource), entry);
14205 struct rte_eth_dev *dev = resource->dev;
14206 struct mlx5_priv *priv = dev->data->dev_private;
14209 MLX5_ASSERT(resource->action);
14210 if (resource->action)
14211 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14212 for (; i < resource->num_of_dest; i++)
14213 flow_dv_sample_sub_actions_release(dev,
14214 &resource->sample_idx[i]);
14215 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
14216 DRV_LOG(DEBUG, "destination array resource %p: removed",
14221 * Release an destination array resource.
14224 * Pointer to Ethernet device.
14226 * Pointer to mlx5_flow_handle.
14229 * 1 while a reference on it exists, 0 when freed.
14232 flow_dv_dest_array_resource_release(struct rte_eth_dev *dev,
14233 struct mlx5_flow_handle *handle)
14235 struct mlx5_priv *priv = dev->data->dev_private;
14236 struct mlx5_flow_dv_dest_array_resource *resource;
14238 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
14239 handle->dvh.rix_dest_array);
14242 MLX5_ASSERT(resource->action);
14243 return mlx5_list_unregister(priv->sh->dest_array_list,
14248 flow_dv_geneve_tlv_option_resource_release(struct rte_eth_dev *dev)
14250 struct mlx5_priv *priv = dev->data->dev_private;
14251 struct mlx5_dev_ctx_shared *sh = priv->sh;
14252 struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
14253 sh->geneve_tlv_option_resource;
14254 rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
14255 if (geneve_opt_resource) {
14256 if (!(__atomic_sub_fetch(&geneve_opt_resource->refcnt, 1,
14257 __ATOMIC_RELAXED))) {
14258 claim_zero(mlx5_devx_cmd_destroy
14259 (geneve_opt_resource->obj));
14260 mlx5_free(sh->geneve_tlv_option_resource);
14261 sh->geneve_tlv_option_resource = NULL;
14264 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
14268 * Remove the flow from the NIC but keeps it in memory.
14269 * Lock free, (mutex should be acquired by caller).
14272 * Pointer to Ethernet device.
14273 * @param[in, out] flow
14274 * Pointer to flow structure.
14277 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
14279 struct mlx5_flow_handle *dh;
14280 uint32_t handle_idx;
14281 struct mlx5_priv *priv = dev->data->dev_private;
14285 handle_idx = flow->dev_handles;
14286 while (handle_idx) {
14287 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14291 if (dh->drv_flow) {
14292 claim_zero(mlx5_flow_os_destroy_flow(dh->drv_flow));
14293 dh->drv_flow = NULL;
14295 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE)
14296 flow_dv_fate_resource_release(dev, dh);
14297 if (dh->vf_vlan.tag && dh->vf_vlan.created)
14298 mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
14299 handle_idx = dh->next.next;
14304 * Remove the flow from the NIC and the memory.
14305 * Lock free, (mutex should be acquired by caller).
14308 * Pointer to the Ethernet device structure.
14309 * @param[in, out] flow
14310 * Pointer to flow structure.
14313 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
14315 struct mlx5_flow_handle *dev_handle;
14316 struct mlx5_priv *priv = dev->data->dev_private;
14317 struct mlx5_flow_meter_info *fm = NULL;
14322 flow_dv_remove(dev, flow);
14323 if (flow->counter) {
14324 flow_dv_counter_free(dev, flow->counter);
14328 fm = flow_dv_meter_find_by_idx(priv, flow->meter);
14330 mlx5_flow_meter_detach(priv, fm);
14333 /* Keep the current age handling by default. */
14334 if (flow->indirect_type == MLX5_INDIRECT_ACTION_TYPE_CT && flow->ct)
14335 flow_dv_aso_ct_release(dev, flow->ct);
14336 else if (flow->age)
14337 flow_dv_aso_age_release(dev, flow->age);
14338 if (flow->geneve_tlv_option) {
14339 flow_dv_geneve_tlv_option_resource_release(dev);
14340 flow->geneve_tlv_option = 0;
14342 while (flow->dev_handles) {
14343 uint32_t tmp_idx = flow->dev_handles;
14345 dev_handle = mlx5_ipool_get(priv->sh->ipool
14346 [MLX5_IPOOL_MLX5_FLOW], tmp_idx);
14349 flow->dev_handles = dev_handle->next.next;
14350 if (dev_handle->dvh.matcher)
14351 flow_dv_matcher_release(dev, dev_handle);
14352 if (dev_handle->dvh.rix_sample)
14353 flow_dv_sample_resource_release(dev, dev_handle);
14354 if (dev_handle->dvh.rix_dest_array)
14355 flow_dv_dest_array_resource_release(dev, dev_handle);
14356 if (dev_handle->dvh.rix_encap_decap)
14357 flow_dv_encap_decap_resource_release(dev,
14358 dev_handle->dvh.rix_encap_decap);
14359 if (dev_handle->dvh.modify_hdr)
14360 flow_dv_modify_hdr_resource_release(dev, dev_handle);
14361 if (dev_handle->dvh.rix_push_vlan)
14362 flow_dv_push_vlan_action_resource_release(dev,
14364 if (dev_handle->dvh.rix_tag)
14365 flow_dv_tag_release(dev,
14366 dev_handle->dvh.rix_tag);
14367 if (dev_handle->fate_action != MLX5_FLOW_FATE_SHARED_RSS)
14368 flow_dv_fate_resource_release(dev, dev_handle);
14370 srss = dev_handle->rix_srss;
14371 if (fm && dev_handle->is_meter_flow_id &&
14372 dev_handle->split_flow_id)
14373 mlx5_ipool_free(fm->flow_ipool,
14374 dev_handle->split_flow_id);
14375 else if (dev_handle->split_flow_id &&
14376 !dev_handle->is_meter_flow_id)
14377 mlx5_ipool_free(priv->sh->ipool
14378 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
14379 dev_handle->split_flow_id);
14380 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14384 flow_dv_shared_rss_action_release(dev, srss);
14388 * Release array of hash RX queue objects.
14392 * Pointer to the Ethernet device structure.
14393 * @param[in, out] hrxqs
14394 * Array of hash RX queue objects.
14397 * Total number of references to hash RX queue objects in *hrxqs* array
14398 * after this operation.
14401 __flow_dv_hrxqs_release(struct rte_eth_dev *dev,
14402 uint32_t (*hrxqs)[MLX5_RSS_HASH_FIELDS_LEN])
14407 for (i = 0; i < RTE_DIM(*hrxqs); i++) {
14408 int ret = mlx5_hrxq_release(dev, (*hrxqs)[i]);
14418 * Release all hash RX queue objects representing shared RSS action.
14421 * Pointer to the Ethernet device structure.
14422 * @param[in, out] action
14423 * Shared RSS action to remove hash RX queue objects from.
14426 * Total number of references to hash RX queue objects stored in *action*
14427 * after this operation.
14428 * Expected to be 0 if no external references held.
14431 __flow_dv_action_rss_hrxqs_release(struct rte_eth_dev *dev,
14432 struct mlx5_shared_action_rss *shared_rss)
14434 return __flow_dv_hrxqs_release(dev, &shared_rss->hrxq);
14438 * Adjust L3/L4 hash value of pre-created shared RSS hrxq according to
14441 * Only one hash value is available for one L3+L4 combination:
14443 * MLX5_RSS_HASH_IPV4, MLX5_RSS_HASH_IPV4_SRC_ONLY, and
14444 * MLX5_RSS_HASH_IPV4_DST_ONLY are mutually exclusive so they can share
14445 * same slot in mlx5_rss_hash_fields.
14448 * Pointer to the shared action RSS conf.
14449 * @param[in, out] hash_field
14450 * hash_field variable needed to be adjusted.
14456 __flow_dv_action_rss_l34_hash_adjust(struct mlx5_shared_action_rss *rss,
14457 uint64_t *hash_field)
14459 uint64_t rss_types = rss->origin.types;
14461 switch (*hash_field & ~IBV_RX_HASH_INNER) {
14462 case MLX5_RSS_HASH_IPV4:
14463 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
14464 *hash_field &= ~MLX5_RSS_HASH_IPV4;
14465 if (rss_types & ETH_RSS_L3_DST_ONLY)
14466 *hash_field |= IBV_RX_HASH_DST_IPV4;
14467 else if (rss_types & ETH_RSS_L3_SRC_ONLY)
14468 *hash_field |= IBV_RX_HASH_SRC_IPV4;
14470 *hash_field |= MLX5_RSS_HASH_IPV4;
14473 case MLX5_RSS_HASH_IPV6:
14474 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
14475 *hash_field &= ~MLX5_RSS_HASH_IPV6;
14476 if (rss_types & ETH_RSS_L3_DST_ONLY)
14477 *hash_field |= IBV_RX_HASH_DST_IPV6;
14478 else if (rss_types & ETH_RSS_L3_SRC_ONLY)
14479 *hash_field |= IBV_RX_HASH_SRC_IPV6;
14481 *hash_field |= MLX5_RSS_HASH_IPV6;
14484 case MLX5_RSS_HASH_IPV4_UDP:
14485 /* fall-through. */
14486 case MLX5_RSS_HASH_IPV6_UDP:
14487 if (rss_types & ETH_RSS_UDP) {
14488 *hash_field &= ~MLX5_UDP_IBV_RX_HASH;
14489 if (rss_types & ETH_RSS_L4_DST_ONLY)
14490 *hash_field |= IBV_RX_HASH_DST_PORT_UDP;
14491 else if (rss_types & ETH_RSS_L4_SRC_ONLY)
14492 *hash_field |= IBV_RX_HASH_SRC_PORT_UDP;
14494 *hash_field |= MLX5_UDP_IBV_RX_HASH;
14497 case MLX5_RSS_HASH_IPV4_TCP:
14498 /* fall-through. */
14499 case MLX5_RSS_HASH_IPV6_TCP:
14500 if (rss_types & ETH_RSS_TCP) {
14501 *hash_field &= ~MLX5_TCP_IBV_RX_HASH;
14502 if (rss_types & ETH_RSS_L4_DST_ONLY)
14503 *hash_field |= IBV_RX_HASH_DST_PORT_TCP;
14504 else if (rss_types & ETH_RSS_L4_SRC_ONLY)
14505 *hash_field |= IBV_RX_HASH_SRC_PORT_TCP;
14507 *hash_field |= MLX5_TCP_IBV_RX_HASH;
14516 * Setup shared RSS action.
14517 * Prepare set of hash RX queue objects sufficient to handle all valid
14518 * hash_fields combinations (see enum ibv_rx_hash_fields).
14521 * Pointer to the Ethernet device structure.
14522 * @param[in] action_idx
14523 * Shared RSS action ipool index.
14524 * @param[in, out] action
14525 * Partially initialized shared RSS action.
14526 * @param[out] error
14527 * Perform verbose error reporting if not NULL. Initialized in case of
14531 * 0 on success, otherwise negative errno value.
14534 __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
14535 uint32_t action_idx,
14536 struct mlx5_shared_action_rss *shared_rss,
14537 struct rte_flow_error *error)
14539 struct mlx5_flow_rss_desc rss_desc = { 0 };
14543 if (mlx5_ind_table_obj_setup(dev, shared_rss->ind_tbl)) {
14544 return rte_flow_error_set(error, rte_errno,
14545 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14546 "cannot setup indirection table");
14548 memcpy(rss_desc.key, shared_rss->origin.key, MLX5_RSS_HASH_KEY_LEN);
14549 rss_desc.key_len = MLX5_RSS_HASH_KEY_LEN;
14550 rss_desc.const_q = shared_rss->origin.queue;
14551 rss_desc.queue_num = shared_rss->origin.queue_num;
14552 /* Set non-zero value to indicate a shared RSS. */
14553 rss_desc.shared_rss = action_idx;
14554 rss_desc.ind_tbl = shared_rss->ind_tbl;
14555 for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
14557 uint64_t hash_fields = mlx5_rss_hash_fields[i];
14560 __flow_dv_action_rss_l34_hash_adjust(shared_rss, &hash_fields);
14561 if (shared_rss->origin.level > 1) {
14562 hash_fields |= IBV_RX_HASH_INNER;
14565 rss_desc.tunnel = tunnel;
14566 rss_desc.hash_fields = hash_fields;
14567 hrxq_idx = mlx5_hrxq_get(dev, &rss_desc);
14571 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14572 "cannot get hash queue");
14573 goto error_hrxq_new;
14575 err = __flow_dv_action_rss_hrxq_set
14576 (shared_rss, hash_fields, hrxq_idx);
14582 __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14583 if (!mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true))
14584 shared_rss->ind_tbl = NULL;
14590 * Create shared RSS action.
14593 * Pointer to the Ethernet device structure.
14595 * Shared action configuration.
14597 * RSS action specification used to create shared action.
14598 * @param[out] error
14599 * Perform verbose error reporting if not NULL. Initialized in case of
14603 * A valid shared action ID in case of success, 0 otherwise and
14604 * rte_errno is set.
14607 __flow_dv_action_rss_create(struct rte_eth_dev *dev,
14608 const struct rte_flow_indir_action_conf *conf,
14609 const struct rte_flow_action_rss *rss,
14610 struct rte_flow_error *error)
14612 struct mlx5_priv *priv = dev->data->dev_private;
14613 struct mlx5_shared_action_rss *shared_rss = NULL;
14614 void *queue = NULL;
14615 struct rte_flow_action_rss *origin;
14616 const uint8_t *rss_key;
14617 uint32_t queue_size = rss->queue_num * sizeof(uint16_t);
14620 RTE_SET_USED(conf);
14621 queue = mlx5_malloc(0, RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14623 shared_rss = mlx5_ipool_zmalloc
14624 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], &idx);
14625 if (!shared_rss || !queue) {
14626 rte_flow_error_set(error, ENOMEM,
14627 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14628 "cannot allocate resource memory");
14629 goto error_rss_init;
14631 if (idx > (1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET)) {
14632 rte_flow_error_set(error, E2BIG,
14633 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14634 "rss action number out of range");
14635 goto error_rss_init;
14637 shared_rss->ind_tbl = mlx5_malloc(MLX5_MEM_ZERO,
14638 sizeof(*shared_rss->ind_tbl),
14640 if (!shared_rss->ind_tbl) {
14641 rte_flow_error_set(error, ENOMEM,
14642 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14643 "cannot allocate resource memory");
14644 goto error_rss_init;
14646 memcpy(queue, rss->queue, queue_size);
14647 shared_rss->ind_tbl->queues = queue;
14648 shared_rss->ind_tbl->queues_n = rss->queue_num;
14649 origin = &shared_rss->origin;
14650 origin->func = rss->func;
14651 origin->level = rss->level;
14652 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
14653 origin->types = !rss->types ? ETH_RSS_IP : rss->types;
14654 /* NULL RSS key indicates default RSS key. */
14655 rss_key = !rss->key ? rss_hash_default_key : rss->key;
14656 memcpy(shared_rss->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
14657 origin->key = &shared_rss->key[0];
14658 origin->key_len = MLX5_RSS_HASH_KEY_LEN;
14659 origin->queue = queue;
14660 origin->queue_num = rss->queue_num;
14661 if (__flow_dv_action_rss_setup(dev, idx, shared_rss, error))
14662 goto error_rss_init;
14663 rte_spinlock_init(&shared_rss->action_rss_sl);
14664 __atomic_add_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14665 rte_spinlock_lock(&priv->shared_act_sl);
14666 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14667 &priv->rss_shared_actions, idx, shared_rss, next);
14668 rte_spinlock_unlock(&priv->shared_act_sl);
14672 if (shared_rss->ind_tbl)
14673 mlx5_free(shared_rss->ind_tbl);
14674 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14683 * Destroy the shared RSS action.
14684 * Release related hash RX queue objects.
14687 * Pointer to the Ethernet device structure.
14689 * The shared RSS action object ID to be removed.
14690 * @param[out] error
14691 * Perform verbose error reporting if not NULL. Initialized in case of
14695 * 0 on success, otherwise negative errno value.
14698 __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
14699 struct rte_flow_error *error)
14701 struct mlx5_priv *priv = dev->data->dev_private;
14702 struct mlx5_shared_action_rss *shared_rss =
14703 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14704 uint32_t old_refcnt = 1;
14706 uint16_t *queue = NULL;
14709 return rte_flow_error_set(error, EINVAL,
14710 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14711 "invalid shared action");
14712 remaining = __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14714 return rte_flow_error_set(error, EBUSY,
14715 RTE_FLOW_ERROR_TYPE_ACTION,
14717 "shared rss hrxq has references");
14718 if (!__atomic_compare_exchange_n(&shared_rss->refcnt, &old_refcnt,
14719 0, 0, __ATOMIC_ACQUIRE,
14721 return rte_flow_error_set(error, EBUSY,
14722 RTE_FLOW_ERROR_TYPE_ACTION,
14724 "shared rss has references");
14725 queue = shared_rss->ind_tbl->queues;
14726 remaining = mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true);
14728 return rte_flow_error_set(error, EBUSY,
14729 RTE_FLOW_ERROR_TYPE_ACTION,
14731 "shared rss indirection table has"
14734 rte_spinlock_lock(&priv->shared_act_sl);
14735 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14736 &priv->rss_shared_actions, idx, shared_rss, next);
14737 rte_spinlock_unlock(&priv->shared_act_sl);
14738 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14744 * Create indirect action, lock free,
14745 * (mutex should be acquired by caller).
14746 * Dispatcher for action type specific call.
14749 * Pointer to the Ethernet device structure.
14751 * Shared action configuration.
14752 * @param[in] action
14753 * Action specification used to create indirect action.
14754 * @param[out] error
14755 * Perform verbose error reporting if not NULL. Initialized in case of
14759 * A valid shared action handle in case of success, NULL otherwise and
14760 * rte_errno is set.
14762 static struct rte_flow_action_handle *
14763 flow_dv_action_create(struct rte_eth_dev *dev,
14764 const struct rte_flow_indir_action_conf *conf,
14765 const struct rte_flow_action *action,
14766 struct rte_flow_error *err)
14768 struct mlx5_priv *priv = dev->data->dev_private;
14769 uint32_t age_idx = 0;
14773 switch (action->type) {
14774 case RTE_FLOW_ACTION_TYPE_RSS:
14775 ret = __flow_dv_action_rss_create(dev, conf, action->conf, err);
14776 idx = (MLX5_INDIRECT_ACTION_TYPE_RSS <<
14777 MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14779 case RTE_FLOW_ACTION_TYPE_AGE:
14780 age_idx = flow_dv_aso_age_alloc(dev, err);
14785 idx = (MLX5_INDIRECT_ACTION_TYPE_AGE <<
14786 MLX5_INDIRECT_ACTION_TYPE_OFFSET) | age_idx;
14787 flow_dv_aso_age_params_init(dev, age_idx,
14788 ((const struct rte_flow_action_age *)
14789 action->conf)->context ?
14790 ((const struct rte_flow_action_age *)
14791 action->conf)->context :
14792 (void *)(uintptr_t)idx,
14793 ((const struct rte_flow_action_age *)
14794 action->conf)->timeout);
14797 case RTE_FLOW_ACTION_TYPE_COUNT:
14798 ret = flow_dv_translate_create_counter(dev, NULL, NULL, NULL);
14799 idx = (MLX5_INDIRECT_ACTION_TYPE_COUNT <<
14800 MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14802 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
14803 ret = flow_dv_translate_create_conntrack(dev, action->conf,
14805 idx = MLX5_INDIRECT_ACT_CT_GEN_IDX(PORT_ID(priv), ret);
14808 rte_flow_error_set(err, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
14809 NULL, "action type not supported");
14812 return ret ? (struct rte_flow_action_handle *)(uintptr_t)idx : NULL;
14816 * Destroy the indirect action.
14817 * Release action related resources on the NIC and the memory.
14818 * Lock free, (mutex should be acquired by caller).
14819 * Dispatcher for action type specific call.
14822 * Pointer to the Ethernet device structure.
14823 * @param[in] handle
14824 * The indirect action object handle to be removed.
14825 * @param[out] error
14826 * Perform verbose error reporting if not NULL. Initialized in case of
14830 * 0 on success, otherwise negative errno value.
14833 flow_dv_action_destroy(struct rte_eth_dev *dev,
14834 struct rte_flow_action_handle *handle,
14835 struct rte_flow_error *error)
14837 uint32_t act_idx = (uint32_t)(uintptr_t)handle;
14838 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
14839 uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
14840 struct mlx5_flow_counter *cnt;
14841 uint32_t no_flow_refcnt = 1;
14845 case MLX5_INDIRECT_ACTION_TYPE_RSS:
14846 return __flow_dv_action_rss_release(dev, idx, error);
14847 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
14848 cnt = flow_dv_counter_get_by_idx(dev, idx, NULL);
14849 if (!__atomic_compare_exchange_n(&cnt->shared_info.refcnt,
14850 &no_flow_refcnt, 1, false,
14853 return rte_flow_error_set(error, EBUSY,
14854 RTE_FLOW_ERROR_TYPE_ACTION,
14856 "Indirect count action has references");
14857 flow_dv_counter_free(dev, idx);
14859 case MLX5_INDIRECT_ACTION_TYPE_AGE:
14860 ret = flow_dv_aso_age_release(dev, idx);
14863 * In this case, the last flow has a reference will
14864 * actually release the age action.
14866 DRV_LOG(DEBUG, "Indirect age action %" PRIu32 " was"
14867 " released with references %d.", idx, ret);
14869 case MLX5_INDIRECT_ACTION_TYPE_CT:
14870 ret = flow_dv_aso_ct_release(dev, idx);
14874 DRV_LOG(DEBUG, "Connection tracking object %u still "
14875 "has references %d.", idx, ret);
14878 return rte_flow_error_set(error, ENOTSUP,
14879 RTE_FLOW_ERROR_TYPE_ACTION,
14881 "action type not supported");
14886 * Updates in place shared RSS action configuration.
14889 * Pointer to the Ethernet device structure.
14891 * The shared RSS action object ID to be updated.
14892 * @param[in] action_conf
14893 * RSS action specification used to modify *shared_rss*.
14894 * @param[out] error
14895 * Perform verbose error reporting if not NULL. Initialized in case of
14899 * 0 on success, otherwise negative errno value.
14900 * @note: currently only support update of RSS queues.
14903 __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
14904 const struct rte_flow_action_rss *action_conf,
14905 struct rte_flow_error *error)
14907 struct mlx5_priv *priv = dev->data->dev_private;
14908 struct mlx5_shared_action_rss *shared_rss =
14909 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14911 void *queue = NULL;
14912 uint16_t *queue_old = NULL;
14913 uint32_t queue_size = action_conf->queue_num * sizeof(uint16_t);
14916 return rte_flow_error_set(error, EINVAL,
14917 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14918 "invalid shared action to update");
14919 if (priv->obj_ops.ind_table_modify == NULL)
14920 return rte_flow_error_set(error, ENOTSUP,
14921 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14922 "cannot modify indirection table");
14923 queue = mlx5_malloc(MLX5_MEM_ZERO,
14924 RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14927 return rte_flow_error_set(error, ENOMEM,
14928 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14930 "cannot allocate resource memory");
14931 memcpy(queue, action_conf->queue, queue_size);
14932 MLX5_ASSERT(shared_rss->ind_tbl);
14933 rte_spinlock_lock(&shared_rss->action_rss_sl);
14934 queue_old = shared_rss->ind_tbl->queues;
14935 ret = mlx5_ind_table_obj_modify(dev, shared_rss->ind_tbl,
14936 queue, action_conf->queue_num, true);
14939 ret = rte_flow_error_set(error, rte_errno,
14940 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14941 "cannot update indirection table");
14943 mlx5_free(queue_old);
14944 shared_rss->origin.queue = queue;
14945 shared_rss->origin.queue_num = action_conf->queue_num;
14947 rte_spinlock_unlock(&shared_rss->action_rss_sl);
14952 * Updates in place conntrack context or direction.
14953 * Context update should be synchronized.
14956 * Pointer to the Ethernet device structure.
14958 * The conntrack object ID to be updated.
14959 * @param[in] update
14960 * Pointer to the structure of information to update.
14961 * @param[out] error
14962 * Perform verbose error reporting if not NULL. Initialized in case of
14966 * 0 on success, otherwise negative errno value.
14969 __flow_dv_action_ct_update(struct rte_eth_dev *dev, uint32_t idx,
14970 const struct rte_flow_modify_conntrack *update,
14971 struct rte_flow_error *error)
14973 struct mlx5_priv *priv = dev->data->dev_private;
14974 struct mlx5_aso_ct_action *ct;
14975 const struct rte_flow_action_conntrack *new_prf;
14977 uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
14980 if (PORT_ID(priv) != owner)
14981 return rte_flow_error_set(error, EACCES,
14982 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14984 "CT object owned by another port");
14985 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
14986 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
14988 return rte_flow_error_set(error, ENOMEM,
14989 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14991 "CT object is inactive");
14992 new_prf = &update->new_ct;
14993 if (update->direction)
14994 ct->is_original = !!new_prf->is_original_dir;
14995 if (update->state) {
14996 /* Only validate the profile when it needs to be updated. */
14997 ret = mlx5_validate_action_ct(dev, new_prf, error);
15000 ret = mlx5_aso_ct_update_by_wqe(priv->sh, ct, new_prf);
15002 return rte_flow_error_set(error, EIO,
15003 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15005 "Failed to send CT context update WQE");
15006 /* Block until ready or a failure. */
15007 ret = mlx5_aso_ct_available(priv->sh, ct);
15009 rte_flow_error_set(error, rte_errno,
15010 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15012 "Timeout to get the CT update");
15018 * Updates in place shared action configuration, lock free,
15019 * (mutex should be acquired by caller).
15022 * Pointer to the Ethernet device structure.
15023 * @param[in] handle
15024 * The indirect action object handle to be updated.
15025 * @param[in] update
15026 * Action specification used to modify the action pointed by *handle*.
15027 * *update* could be of same type with the action pointed by the *handle*
15028 * handle argument, or some other structures like a wrapper, depending on
15029 * the indirect action type.
15030 * @param[out] error
15031 * Perform verbose error reporting if not NULL. Initialized in case of
15035 * 0 on success, otherwise negative errno value.
15038 flow_dv_action_update(struct rte_eth_dev *dev,
15039 struct rte_flow_action_handle *handle,
15040 const void *update,
15041 struct rte_flow_error *err)
15043 uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15044 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15045 uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15046 const void *action_conf;
15049 case MLX5_INDIRECT_ACTION_TYPE_RSS:
15050 action_conf = ((const struct rte_flow_action *)update)->conf;
15051 return __flow_dv_action_rss_update(dev, idx, action_conf, err);
15052 case MLX5_INDIRECT_ACTION_TYPE_CT:
15053 return __flow_dv_action_ct_update(dev, idx, update, err);
15055 return rte_flow_error_set(err, ENOTSUP,
15056 RTE_FLOW_ERROR_TYPE_ACTION,
15058 "action type update not supported");
15063 * Destroy the meter sub policy table rules.
15064 * Lock free, (mutex should be acquired by caller).
15067 * Pointer to Ethernet device.
15068 * @param[in] sub_policy
15069 * Pointer to meter sub policy table.
15072 __flow_dv_destroy_sub_policy_rules(struct rte_eth_dev *dev,
15073 struct mlx5_flow_meter_sub_policy *sub_policy)
15075 struct mlx5_priv *priv = dev->data->dev_private;
15076 struct mlx5_flow_tbl_data_entry *tbl;
15077 struct mlx5_flow_meter_policy *policy = sub_policy->main_policy;
15078 struct mlx5_flow_meter_info *next_fm;
15079 struct mlx5_sub_policy_color_rule *color_rule;
15083 for (i = 0; i < RTE_COLORS; i++) {
15085 if (i == RTE_COLOR_GREEN && policy &&
15086 policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR)
15087 next_fm = mlx5_flow_meter_find(priv,
15088 policy->act_cnt[i].next_mtr_id, NULL);
15089 TAILQ_FOREACH_SAFE(color_rule, &sub_policy->color_rules[i],
15091 claim_zero(mlx5_flow_os_destroy_flow(color_rule->rule));
15092 tbl = container_of(color_rule->matcher->tbl,
15093 typeof(*tbl), tbl);
15094 mlx5_list_unregister(tbl->matchers,
15095 &color_rule->matcher->entry);
15096 TAILQ_REMOVE(&sub_policy->color_rules[i],
15097 color_rule, next_port);
15098 mlx5_free(color_rule);
15100 mlx5_flow_meter_detach(priv, next_fm);
15103 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15104 if (sub_policy->rix_hrxq[i]) {
15105 if (policy && !policy->is_hierarchy)
15106 mlx5_hrxq_release(dev, sub_policy->rix_hrxq[i]);
15107 sub_policy->rix_hrxq[i] = 0;
15109 if (sub_policy->jump_tbl[i]) {
15110 flow_dv_tbl_resource_release(MLX5_SH(dev),
15111 sub_policy->jump_tbl[i]);
15112 sub_policy->jump_tbl[i] = NULL;
15115 if (sub_policy->tbl_rsc) {
15116 flow_dv_tbl_resource_release(MLX5_SH(dev),
15117 sub_policy->tbl_rsc);
15118 sub_policy->tbl_rsc = NULL;
15123 * Destroy policy rules, lock free,
15124 * (mutex should be acquired by caller).
15125 * Dispatcher for action type specific call.
15128 * Pointer to the Ethernet device structure.
15129 * @param[in] mtr_policy
15130 * Meter policy struct.
15133 flow_dv_destroy_policy_rules(struct rte_eth_dev *dev,
15134 struct mlx5_flow_meter_policy *mtr_policy)
15137 struct mlx5_flow_meter_sub_policy *sub_policy;
15138 uint16_t sub_policy_num;
15140 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15141 sub_policy_num = (mtr_policy->sub_policy_num >>
15142 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15143 MLX5_MTR_SUB_POLICY_NUM_MASK;
15144 for (j = 0; j < sub_policy_num; j++) {
15145 sub_policy = mtr_policy->sub_policys[i][j];
15147 __flow_dv_destroy_sub_policy_rules(dev,
15154 * Destroy policy action, lock free,
15155 * (mutex should be acquired by caller).
15156 * Dispatcher for action type specific call.
15159 * Pointer to the Ethernet device structure.
15160 * @param[in] mtr_policy
15161 * Meter policy struct.
15164 flow_dv_destroy_mtr_policy_acts(struct rte_eth_dev *dev,
15165 struct mlx5_flow_meter_policy *mtr_policy)
15167 struct rte_flow_action *rss_action;
15168 struct mlx5_flow_handle dev_handle;
15171 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15172 if (mtr_policy->act_cnt[i].rix_mark) {
15173 flow_dv_tag_release(dev,
15174 mtr_policy->act_cnt[i].rix_mark);
15175 mtr_policy->act_cnt[i].rix_mark = 0;
15177 if (mtr_policy->act_cnt[i].modify_hdr) {
15178 dev_handle.dvh.modify_hdr =
15179 mtr_policy->act_cnt[i].modify_hdr;
15180 flow_dv_modify_hdr_resource_release(dev, &dev_handle);
15182 switch (mtr_policy->act_cnt[i].fate_action) {
15183 case MLX5_FLOW_FATE_SHARED_RSS:
15184 rss_action = mtr_policy->act_cnt[i].rss;
15185 mlx5_free(rss_action);
15187 case MLX5_FLOW_FATE_PORT_ID:
15188 if (mtr_policy->act_cnt[i].rix_port_id_action) {
15189 flow_dv_port_id_action_resource_release(dev,
15190 mtr_policy->act_cnt[i].rix_port_id_action);
15191 mtr_policy->act_cnt[i].rix_port_id_action = 0;
15194 case MLX5_FLOW_FATE_DROP:
15195 case MLX5_FLOW_FATE_JUMP:
15196 for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15197 mtr_policy->act_cnt[i].dr_jump_action[j] =
15201 /*Queue action do nothing*/
15205 for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15206 mtr_policy->dr_drop_action[j] = NULL;
15210 * Create policy action per domain, lock free,
15211 * (mutex should be acquired by caller).
15212 * Dispatcher for action type specific call.
15215 * Pointer to the Ethernet device structure.
15216 * @param[in] mtr_policy
15217 * Meter policy struct.
15218 * @param[in] action
15219 * Action specification used to create meter actions.
15220 * @param[out] error
15221 * Perform verbose error reporting if not NULL. Initialized in case of
15225 * 0 on success, otherwise negative errno value.
15228 __flow_dv_create_domain_policy_acts(struct rte_eth_dev *dev,
15229 struct mlx5_flow_meter_policy *mtr_policy,
15230 const struct rte_flow_action *actions[RTE_COLORS],
15231 enum mlx5_meter_domain domain,
15232 struct rte_mtr_error *error)
15234 struct mlx5_priv *priv = dev->data->dev_private;
15235 struct rte_flow_error flow_err;
15236 const struct rte_flow_action *act;
15237 uint64_t action_flags;
15238 struct mlx5_flow_handle dh;
15239 struct mlx5_flow dev_flow;
15240 struct mlx5_flow_dv_port_id_action_resource port_id_action;
15242 uint8_t egress, transfer;
15243 struct mlx5_meter_policy_action_container *act_cnt = NULL;
15245 struct mlx5_flow_dv_modify_hdr_resource res;
15246 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
15247 sizeof(struct mlx5_modification_cmd) *
15248 (MLX5_MAX_MODIFY_NUM + 1)];
15250 struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
15252 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15253 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15254 memset(&dh, 0, sizeof(struct mlx5_flow_handle));
15255 memset(&dev_flow, 0, sizeof(struct mlx5_flow));
15256 memset(&port_id_action, 0,
15257 sizeof(struct mlx5_flow_dv_port_id_action_resource));
15258 memset(mhdr_res, 0, sizeof(*mhdr_res));
15259 mhdr_res->ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
15260 (egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
15261 MLX5DV_FLOW_TABLE_TYPE_NIC_RX);
15262 dev_flow.handle = &dh;
15263 dev_flow.dv.port_id_action = &port_id_action;
15264 dev_flow.external = true;
15265 for (i = 0; i < RTE_COLORS; i++) {
15266 if (i < MLX5_MTR_RTE_COLORS)
15267 act_cnt = &mtr_policy->act_cnt[i];
15268 /* Skip the color policy actions creation. */
15269 if ((i == RTE_COLOR_YELLOW && mtr_policy->skip_y) ||
15270 (i == RTE_COLOR_GREEN && mtr_policy->skip_g))
15273 for (act = actions[i];
15274 act && act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
15275 switch (act->type) {
15276 case RTE_FLOW_ACTION_TYPE_MARK:
15278 uint32_t tag_be = mlx5_flow_mark_set
15279 (((const struct rte_flow_action_mark *)
15282 if (i >= MLX5_MTR_RTE_COLORS)
15283 return -rte_mtr_error_set(error,
15285 RTE_MTR_ERROR_TYPE_METER_POLICY,
15287 "cannot create policy "
15288 "mark action for this color");
15289 dev_flow.handle->mark = 1;
15290 if (flow_dv_tag_resource_register(dev, tag_be,
15291 &dev_flow, &flow_err))
15292 return -rte_mtr_error_set(error,
15294 RTE_MTR_ERROR_TYPE_METER_POLICY,
15296 "cannot setup policy mark action");
15297 MLX5_ASSERT(dev_flow.dv.tag_resource);
15298 act_cnt->rix_mark =
15299 dev_flow.handle->dvh.rix_tag;
15300 action_flags |= MLX5_FLOW_ACTION_MARK;
15303 case RTE_FLOW_ACTION_TYPE_SET_TAG:
15304 if (i >= MLX5_MTR_RTE_COLORS)
15305 return -rte_mtr_error_set(error,
15307 RTE_MTR_ERROR_TYPE_METER_POLICY,
15309 "cannot create policy "
15310 "set tag action for this color");
15311 if (flow_dv_convert_action_set_tag
15313 (const struct rte_flow_action_set_tag *)
15314 act->conf, &flow_err))
15315 return -rte_mtr_error_set(error,
15317 RTE_MTR_ERROR_TYPE_METER_POLICY,
15318 NULL, "cannot convert policy "
15320 if (!mhdr_res->actions_num)
15321 return -rte_mtr_error_set(error,
15323 RTE_MTR_ERROR_TYPE_METER_POLICY,
15324 NULL, "cannot find policy "
15326 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
15328 case RTE_FLOW_ACTION_TYPE_DROP:
15330 struct mlx5_flow_mtr_mng *mtrmng =
15332 struct mlx5_flow_tbl_data_entry *tbl_data;
15335 * Create the drop table with
15336 * METER DROP level.
15338 if (!mtrmng->drop_tbl[domain]) {
15339 mtrmng->drop_tbl[domain] =
15340 flow_dv_tbl_resource_get(dev,
15341 MLX5_FLOW_TABLE_LEVEL_METER,
15342 egress, transfer, false, NULL, 0,
15343 0, MLX5_MTR_TABLE_ID_DROP, &flow_err);
15344 if (!mtrmng->drop_tbl[domain])
15345 return -rte_mtr_error_set
15347 RTE_MTR_ERROR_TYPE_METER_POLICY,
15349 "Failed to create meter drop table");
15351 tbl_data = container_of
15352 (mtrmng->drop_tbl[domain],
15353 struct mlx5_flow_tbl_data_entry, tbl);
15354 if (i < MLX5_MTR_RTE_COLORS) {
15355 act_cnt->dr_jump_action[domain] =
15356 tbl_data->jump.action;
15357 act_cnt->fate_action =
15358 MLX5_FLOW_FATE_DROP;
15360 if (i == RTE_COLOR_RED)
15361 mtr_policy->dr_drop_action[domain] =
15362 tbl_data->jump.action;
15363 action_flags |= MLX5_FLOW_ACTION_DROP;
15366 case RTE_FLOW_ACTION_TYPE_QUEUE:
15368 if (i >= MLX5_MTR_RTE_COLORS)
15369 return -rte_mtr_error_set(error,
15371 RTE_MTR_ERROR_TYPE_METER_POLICY,
15372 NULL, "cannot create policy "
15373 "fate queue for this color");
15375 ((const struct rte_flow_action_queue *)
15376 (act->conf))->index;
15377 act_cnt->fate_action =
15378 MLX5_FLOW_FATE_QUEUE;
15379 dev_flow.handle->fate_action =
15380 MLX5_FLOW_FATE_QUEUE;
15381 mtr_policy->is_queue = 1;
15382 action_flags |= MLX5_FLOW_ACTION_QUEUE;
15385 case RTE_FLOW_ACTION_TYPE_RSS:
15389 if (i >= MLX5_MTR_RTE_COLORS)
15390 return -rte_mtr_error_set(error,
15392 RTE_MTR_ERROR_TYPE_METER_POLICY,
15394 "cannot create policy "
15395 "rss action for this color");
15397 * Save RSS conf into policy struct
15398 * for translate stage.
15400 rss_size = (int)rte_flow_conv
15401 (RTE_FLOW_CONV_OP_ACTION,
15402 NULL, 0, act, &flow_err);
15404 return -rte_mtr_error_set(error,
15406 RTE_MTR_ERROR_TYPE_METER_POLICY,
15407 NULL, "Get the wrong "
15408 "rss action struct size");
15409 act_cnt->rss = mlx5_malloc(MLX5_MEM_ZERO,
15410 rss_size, 0, SOCKET_ID_ANY);
15412 return -rte_mtr_error_set(error,
15414 RTE_MTR_ERROR_TYPE_METER_POLICY,
15416 "Fail to malloc rss action memory");
15417 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ACTION,
15418 act_cnt->rss, rss_size,
15421 return -rte_mtr_error_set(error,
15423 RTE_MTR_ERROR_TYPE_METER_POLICY,
15424 NULL, "Fail to save "
15425 "rss action into policy struct");
15426 act_cnt->fate_action =
15427 MLX5_FLOW_FATE_SHARED_RSS;
15428 action_flags |= MLX5_FLOW_ACTION_RSS;
15431 case RTE_FLOW_ACTION_TYPE_PORT_ID:
15433 struct mlx5_flow_dv_port_id_action_resource
15435 uint32_t port_id = 0;
15437 if (i >= MLX5_MTR_RTE_COLORS)
15438 return -rte_mtr_error_set(error,
15440 RTE_MTR_ERROR_TYPE_METER_POLICY,
15441 NULL, "cannot create policy "
15442 "port action for this color");
15443 memset(&port_id_resource, 0,
15444 sizeof(port_id_resource));
15445 if (flow_dv_translate_action_port_id(dev, act,
15446 &port_id, &flow_err))
15447 return -rte_mtr_error_set(error,
15449 RTE_MTR_ERROR_TYPE_METER_POLICY,
15450 NULL, "cannot translate "
15451 "policy port action");
15452 port_id_resource.port_id = port_id;
15453 if (flow_dv_port_id_action_resource_register
15454 (dev, &port_id_resource,
15455 &dev_flow, &flow_err))
15456 return -rte_mtr_error_set(error,
15458 RTE_MTR_ERROR_TYPE_METER_POLICY,
15459 NULL, "cannot setup "
15460 "policy port action");
15461 act_cnt->rix_port_id_action =
15462 dev_flow.handle->rix_port_id_action;
15463 act_cnt->fate_action =
15464 MLX5_FLOW_FATE_PORT_ID;
15465 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
15468 case RTE_FLOW_ACTION_TYPE_JUMP:
15470 uint32_t jump_group = 0;
15471 uint32_t table = 0;
15472 struct mlx5_flow_tbl_data_entry *tbl_data;
15473 struct flow_grp_info grp_info = {
15474 .external = !!dev_flow.external,
15475 .transfer = !!transfer,
15476 .fdb_def_rule = !!priv->fdb_def_rule,
15478 .skip_scale = dev_flow.skip_scale &
15479 (1 << MLX5_SCALE_FLOW_GROUP_BIT),
15481 struct mlx5_flow_meter_sub_policy *sub_policy =
15482 mtr_policy->sub_policys[domain][0];
15484 if (i >= MLX5_MTR_RTE_COLORS)
15485 return -rte_mtr_error_set(error,
15487 RTE_MTR_ERROR_TYPE_METER_POLICY,
15489 "cannot create policy "
15490 "jump action for this color");
15492 ((const struct rte_flow_action_jump *)
15494 if (mlx5_flow_group_to_table(dev, NULL,
15497 &grp_info, &flow_err))
15498 return -rte_mtr_error_set(error,
15500 RTE_MTR_ERROR_TYPE_METER_POLICY,
15501 NULL, "cannot setup "
15502 "policy jump action");
15503 sub_policy->jump_tbl[i] =
15504 flow_dv_tbl_resource_get(dev,
15507 !!dev_flow.external,
15508 NULL, jump_group, 0,
15511 (!sub_policy->jump_tbl[i])
15512 return -rte_mtr_error_set(error,
15514 RTE_MTR_ERROR_TYPE_METER_POLICY,
15515 NULL, "cannot create jump action.");
15516 tbl_data = container_of
15517 (sub_policy->jump_tbl[i],
15518 struct mlx5_flow_tbl_data_entry, tbl);
15519 act_cnt->dr_jump_action[domain] =
15520 tbl_data->jump.action;
15521 act_cnt->fate_action =
15522 MLX5_FLOW_FATE_JUMP;
15523 action_flags |= MLX5_FLOW_ACTION_JUMP;
15527 * No need to check meter hierarchy for Y or R colors
15528 * here since it is done in the validation stage.
15530 case RTE_FLOW_ACTION_TYPE_METER:
15532 const struct rte_flow_action_meter *mtr;
15533 struct mlx5_flow_meter_info *next_fm;
15534 struct mlx5_flow_meter_policy *next_policy;
15535 struct rte_flow_action tag_action;
15536 struct mlx5_rte_flow_action_set_tag set_tag;
15537 uint32_t next_mtr_idx = 0;
15540 next_fm = mlx5_flow_meter_find(priv,
15544 return -rte_mtr_error_set(error, EINVAL,
15545 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15546 "Fail to find next meter.");
15547 if (next_fm->def_policy)
15548 return -rte_mtr_error_set(error, EINVAL,
15549 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15550 "Hierarchy only supports termination meter.");
15551 next_policy = mlx5_flow_meter_policy_find(dev,
15552 next_fm->policy_id, NULL);
15553 MLX5_ASSERT(next_policy);
15554 if (next_fm->drop_cnt) {
15557 mlx5_flow_get_reg_id(dev,
15560 (struct rte_flow_error *)error);
15561 set_tag.offset = (priv->mtr_reg_share ?
15562 MLX5_MTR_COLOR_BITS : 0);
15563 set_tag.length = (priv->mtr_reg_share ?
15564 MLX5_MTR_IDLE_BITS_IN_COLOR_REG :
15566 set_tag.data = next_mtr_idx;
15568 (enum rte_flow_action_type)
15569 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
15570 tag_action.conf = &set_tag;
15571 if (flow_dv_convert_action_set_reg
15572 (mhdr_res, &tag_action,
15573 (struct rte_flow_error *)error))
15576 MLX5_FLOW_ACTION_SET_TAG;
15578 act_cnt->fate_action = MLX5_FLOW_FATE_MTR;
15579 act_cnt->next_mtr_id = next_fm->meter_id;
15580 act_cnt->next_sub_policy = NULL;
15581 mtr_policy->is_hierarchy = 1;
15582 mtr_policy->dev = next_policy->dev;
15584 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
15588 return -rte_mtr_error_set(error, ENOTSUP,
15589 RTE_MTR_ERROR_TYPE_METER_POLICY,
15590 NULL, "action type not supported");
15592 if (action_flags & MLX5_FLOW_ACTION_SET_TAG) {
15593 /* create modify action if needed. */
15594 dev_flow.dv.group = 1;
15595 if (flow_dv_modify_hdr_resource_register
15596 (dev, mhdr_res, &dev_flow, &flow_err))
15597 return -rte_mtr_error_set(error,
15599 RTE_MTR_ERROR_TYPE_METER_POLICY,
15600 NULL, "cannot register policy "
15602 act_cnt->modify_hdr =
15603 dev_flow.handle->dvh.modify_hdr;
15611 * Create policy action per domain, lock free,
15612 * (mutex should be acquired by caller).
15613 * Dispatcher for action type specific call.
15616 * Pointer to the Ethernet device structure.
15617 * @param[in] mtr_policy
15618 * Meter policy struct.
15619 * @param[in] action
15620 * Action specification used to create meter actions.
15621 * @param[out] error
15622 * Perform verbose error reporting if not NULL. Initialized in case of
15626 * 0 on success, otherwise negative errno value.
15629 flow_dv_create_mtr_policy_acts(struct rte_eth_dev *dev,
15630 struct mlx5_flow_meter_policy *mtr_policy,
15631 const struct rte_flow_action *actions[RTE_COLORS],
15632 struct rte_mtr_error *error)
15635 uint16_t sub_policy_num;
15637 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15638 sub_policy_num = (mtr_policy->sub_policy_num >>
15639 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15640 MLX5_MTR_SUB_POLICY_NUM_MASK;
15641 if (sub_policy_num) {
15642 ret = __flow_dv_create_domain_policy_acts(dev,
15643 mtr_policy, actions,
15644 (enum mlx5_meter_domain)i, error);
15645 /* Cleaning resource is done in the caller level. */
15654 * Query a DV flow rule for its statistics via DevX.
15657 * Pointer to Ethernet device.
15658 * @param[in] cnt_idx
15659 * Index to the flow counter.
15661 * Data retrieved by the query.
15662 * @param[out] error
15663 * Perform verbose error reporting if not NULL.
15666 * 0 on success, a negative errno value otherwise and rte_errno is set.
15669 flow_dv_query_count(struct rte_eth_dev *dev, uint32_t cnt_idx, void *data,
15670 struct rte_flow_error *error)
15672 struct mlx5_priv *priv = dev->data->dev_private;
15673 struct rte_flow_query_count *qc = data;
15675 if (!priv->config.devx)
15676 return rte_flow_error_set(error, ENOTSUP,
15677 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15679 "counters are not supported");
15681 uint64_t pkts, bytes;
15682 struct mlx5_flow_counter *cnt;
15683 int err = _flow_dv_query_count(dev, cnt_idx, &pkts, &bytes);
15686 return rte_flow_error_set(error, -err,
15687 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15688 NULL, "cannot read counters");
15689 cnt = flow_dv_counter_get_by_idx(dev, cnt_idx, NULL);
15692 qc->hits = pkts - cnt->hits;
15693 qc->bytes = bytes - cnt->bytes;
15696 cnt->bytes = bytes;
15700 return rte_flow_error_set(error, EINVAL,
15701 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15703 "counters are not available");
15707 flow_dv_action_query(struct rte_eth_dev *dev,
15708 const struct rte_flow_action_handle *handle, void *data,
15709 struct rte_flow_error *error)
15711 struct mlx5_age_param *age_param;
15712 struct rte_flow_query_age *resp;
15713 uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15714 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15715 uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15716 struct mlx5_priv *priv = dev->data->dev_private;
15717 struct mlx5_aso_ct_action *ct;
15722 case MLX5_INDIRECT_ACTION_TYPE_AGE:
15723 age_param = &flow_aso_age_get_by_idx(dev, idx)->age_params;
15725 resp->aged = __atomic_load_n(&age_param->state,
15726 __ATOMIC_RELAXED) == AGE_TMOUT ?
15728 resp->sec_since_last_hit_valid = !resp->aged;
15729 if (resp->sec_since_last_hit_valid)
15730 resp->sec_since_last_hit = __atomic_load_n
15731 (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15733 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
15734 return flow_dv_query_count(dev, idx, data, error);
15735 case MLX5_INDIRECT_ACTION_TYPE_CT:
15736 owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
15737 if (owner != PORT_ID(priv))
15738 return rte_flow_error_set(error, EACCES,
15739 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15741 "CT object owned by another port");
15742 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
15743 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
15746 return rte_flow_error_set(error, EFAULT,
15747 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15749 "CT object is inactive");
15750 ((struct rte_flow_action_conntrack *)data)->peer_port =
15752 ((struct rte_flow_action_conntrack *)data)->is_original_dir =
15754 if (mlx5_aso_ct_query_by_wqe(priv->sh, ct, data))
15755 return rte_flow_error_set(error, EIO,
15756 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15758 "Failed to query CT context");
15761 return rte_flow_error_set(error, ENOTSUP,
15762 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15763 "action type query not supported");
15768 * Query a flow rule AGE action for aging information.
15771 * Pointer to Ethernet device.
15773 * Pointer to the sub flow.
15775 * data retrieved by the query.
15776 * @param[out] error
15777 * Perform verbose error reporting if not NULL.
15780 * 0 on success, a negative errno value otherwise and rte_errno is set.
15783 flow_dv_query_age(struct rte_eth_dev *dev, struct rte_flow *flow,
15784 void *data, struct rte_flow_error *error)
15786 struct rte_flow_query_age *resp = data;
15787 struct mlx5_age_param *age_param;
15790 struct mlx5_aso_age_action *act =
15791 flow_aso_age_get_by_idx(dev, flow->age);
15793 age_param = &act->age_params;
15794 } else if (flow->counter) {
15795 age_param = flow_dv_counter_idx_get_age(dev, flow->counter);
15797 if (!age_param || !age_param->timeout)
15798 return rte_flow_error_set
15800 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15801 NULL, "cannot read age data");
15803 return rte_flow_error_set(error, EINVAL,
15804 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15805 NULL, "age data not available");
15807 resp->aged = __atomic_load_n(&age_param->state, __ATOMIC_RELAXED) ==
15809 resp->sec_since_last_hit_valid = !resp->aged;
15810 if (resp->sec_since_last_hit_valid)
15811 resp->sec_since_last_hit = __atomic_load_n
15812 (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15819 * @see rte_flow_query()
15820 * @see rte_flow_ops
15823 flow_dv_query(struct rte_eth_dev *dev,
15824 struct rte_flow *flow __rte_unused,
15825 const struct rte_flow_action *actions __rte_unused,
15826 void *data __rte_unused,
15827 struct rte_flow_error *error __rte_unused)
15831 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
15832 switch (actions->type) {
15833 case RTE_FLOW_ACTION_TYPE_VOID:
15835 case RTE_FLOW_ACTION_TYPE_COUNT:
15836 ret = flow_dv_query_count(dev, flow->counter, data,
15839 case RTE_FLOW_ACTION_TYPE_AGE:
15840 ret = flow_dv_query_age(dev, flow, data, error);
15843 return rte_flow_error_set(error, ENOTSUP,
15844 RTE_FLOW_ERROR_TYPE_ACTION,
15846 "action not supported");
15853 * Destroy the meter table set.
15854 * Lock free, (mutex should be acquired by caller).
15857 * Pointer to Ethernet device.
15859 * Meter information table.
15862 flow_dv_destroy_mtr_tbls(struct rte_eth_dev *dev,
15863 struct mlx5_flow_meter_info *fm)
15865 struct mlx5_priv *priv = dev->data->dev_private;
15868 if (!fm || !priv->config.dv_flow_en)
15870 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15871 if (fm->drop_rule[i]) {
15872 claim_zero(mlx5_flow_os_destroy_flow(fm->drop_rule[i]));
15873 fm->drop_rule[i] = NULL;
15879 flow_dv_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
15881 struct mlx5_priv *priv = dev->data->dev_private;
15882 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
15883 struct mlx5_flow_tbl_data_entry *tbl;
15886 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15887 if (mtrmng->def_rule[i]) {
15888 claim_zero(mlx5_flow_os_destroy_flow
15889 (mtrmng->def_rule[i]));
15890 mtrmng->def_rule[i] = NULL;
15892 if (mtrmng->def_matcher[i]) {
15893 tbl = container_of(mtrmng->def_matcher[i]->tbl,
15894 struct mlx5_flow_tbl_data_entry, tbl);
15895 mlx5_list_unregister(tbl->matchers,
15896 &mtrmng->def_matcher[i]->entry);
15897 mtrmng->def_matcher[i] = NULL;
15899 for (j = 0; j < MLX5_REG_BITS; j++) {
15900 if (mtrmng->drop_matcher[i][j]) {
15902 container_of(mtrmng->drop_matcher[i][j]->tbl,
15903 struct mlx5_flow_tbl_data_entry,
15905 mlx5_list_unregister(tbl->matchers,
15906 &mtrmng->drop_matcher[i][j]->entry);
15907 mtrmng->drop_matcher[i][j] = NULL;
15910 if (mtrmng->drop_tbl[i]) {
15911 flow_dv_tbl_resource_release(MLX5_SH(dev),
15912 mtrmng->drop_tbl[i]);
15913 mtrmng->drop_tbl[i] = NULL;
15918 /* Number of meter flow actions, count and jump or count and drop. */
15919 #define METER_ACTIONS 2
15922 __flow_dv_destroy_domain_def_policy(struct rte_eth_dev *dev,
15923 enum mlx5_meter_domain domain)
15925 struct mlx5_priv *priv = dev->data->dev_private;
15926 struct mlx5_flow_meter_def_policy *def_policy =
15927 priv->sh->mtrmng->def_policy[domain];
15929 __flow_dv_destroy_sub_policy_rules(dev, &def_policy->sub_policy);
15930 mlx5_free(def_policy);
15931 priv->sh->mtrmng->def_policy[domain] = NULL;
15935 * Destroy the default policy table set.
15938 * Pointer to Ethernet device.
15941 flow_dv_destroy_def_policy(struct rte_eth_dev *dev)
15943 struct mlx5_priv *priv = dev->data->dev_private;
15946 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++)
15947 if (priv->sh->mtrmng->def_policy[i])
15948 __flow_dv_destroy_domain_def_policy(dev,
15949 (enum mlx5_meter_domain)i);
15950 priv->sh->mtrmng->def_policy_id = MLX5_INVALID_POLICY_ID;
15954 __flow_dv_create_policy_flow(struct rte_eth_dev *dev,
15955 uint32_t color_reg_c_idx,
15956 enum rte_color color, void *matcher_object,
15957 int actions_n, void *actions,
15958 bool match_src_port, const struct rte_flow_item *item,
15959 void **rule, const struct rte_flow_attr *attr)
15962 struct mlx5_flow_dv_match_params value = {
15963 .size = sizeof(value.buf),
15965 struct mlx5_flow_dv_match_params matcher = {
15966 .size = sizeof(matcher.buf),
15968 struct mlx5_priv *priv = dev->data->dev_private;
15971 if (match_src_port && (priv->representor || priv->master)) {
15972 if (flow_dv_translate_item_port_id(dev, matcher.buf,
15973 value.buf, item, attr)) {
15974 DRV_LOG(ERR, "Failed to create meter policy%d flow's"
15975 " value with port.", color);
15979 flow_dv_match_meta_reg(matcher.buf, value.buf,
15980 (enum modify_reg)color_reg_c_idx,
15981 rte_col_2_mlx5_col(color), UINT32_MAX);
15982 misc_mask = flow_dv_matcher_enable(value.buf);
15983 __flow_dv_adjust_buf_size(&value.size, misc_mask);
15984 ret = mlx5_flow_os_create_flow(matcher_object, (void *)&value,
15985 actions_n, actions, rule);
15987 DRV_LOG(ERR, "Failed to create meter policy%d flow.", color);
15994 __flow_dv_create_policy_matcher(struct rte_eth_dev *dev,
15995 uint32_t color_reg_c_idx,
15997 struct mlx5_flow_meter_sub_policy *sub_policy,
15998 const struct rte_flow_attr *attr,
15999 bool match_src_port,
16000 const struct rte_flow_item *item,
16001 struct mlx5_flow_dv_matcher **policy_matcher,
16002 struct rte_flow_error *error)
16004 struct mlx5_list_entry *entry;
16005 struct mlx5_flow_tbl_resource *tbl_rsc = sub_policy->tbl_rsc;
16006 struct mlx5_flow_dv_matcher matcher = {
16008 .size = sizeof(matcher.mask.buf),
16012 struct mlx5_flow_dv_match_params value = {
16013 .size = sizeof(value.buf),
16015 struct mlx5_flow_cb_ctx ctx = {
16019 struct mlx5_flow_tbl_data_entry *tbl_data;
16020 struct mlx5_priv *priv = dev->data->dev_private;
16021 const uint32_t color_mask = (UINT32_C(1) << MLX5_MTR_COLOR_BITS) - 1;
16023 if (match_src_port && (priv->representor || priv->master)) {
16024 if (flow_dv_translate_item_port_id(dev, matcher.mask.buf,
16025 value.buf, item, attr)) {
16026 DRV_LOG(ERR, "Failed to register meter policy%d matcher"
16027 " with port.", priority);
16031 tbl_data = container_of(tbl_rsc, struct mlx5_flow_tbl_data_entry, tbl);
16032 if (priority < RTE_COLOR_RED)
16033 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16034 (enum modify_reg)color_reg_c_idx, 0, color_mask);
16035 matcher.priority = priority;
16036 matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
16037 matcher.mask.size);
16038 entry = mlx5_list_register(tbl_data->matchers, &ctx);
16040 DRV_LOG(ERR, "Failed to register meter drop matcher.");
16044 container_of(entry, struct mlx5_flow_dv_matcher, entry);
16049 * Create the policy rules per domain.
16052 * Pointer to Ethernet device.
16053 * @param[in] sub_policy
16054 * Pointer to sub policy table..
16055 * @param[in] egress
16056 * Direction of the table.
16057 * @param[in] transfer
16058 * E-Switch or NIC flow.
16060 * Pointer to policy action list per color.
16063 * 0 on success, -1 otherwise.
16066 __flow_dv_create_domain_policy_rules(struct rte_eth_dev *dev,
16067 struct mlx5_flow_meter_sub_policy *sub_policy,
16068 uint8_t egress, uint8_t transfer, bool match_src_port,
16069 struct mlx5_meter_policy_acts acts[RTE_COLORS])
16071 struct mlx5_priv *priv = dev->data->dev_private;
16072 struct rte_flow_error flow_err;
16073 uint32_t color_reg_c_idx;
16074 struct rte_flow_attr attr = {
16075 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
16078 .egress = !!egress,
16079 .transfer = !!transfer,
16083 int ret = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &flow_err);
16084 struct mlx5_sub_policy_color_rule *color_rule;
16086 struct mlx5_sub_policy_color_rule *tmp_rules[RTE_COLORS] = {NULL};
16090 /* Create policy table with POLICY level. */
16091 if (!sub_policy->tbl_rsc)
16092 sub_policy->tbl_rsc = flow_dv_tbl_resource_get(dev,
16093 MLX5_FLOW_TABLE_LEVEL_POLICY,
16094 egress, transfer, false, NULL, 0, 0,
16095 sub_policy->idx, &flow_err);
16096 if (!sub_policy->tbl_rsc) {
16098 "Failed to create meter sub policy table.");
16101 /* Prepare matchers. */
16102 color_reg_c_idx = ret;
16103 for (i = 0; i < RTE_COLORS; i++) {
16104 TAILQ_INIT(&sub_policy->color_rules[i]);
16105 if (!acts[i].actions_n)
16107 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
16108 sizeof(struct mlx5_sub_policy_color_rule),
16111 DRV_LOG(ERR, "No memory to create color rule.");
16114 tmp_rules[i] = color_rule;
16115 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
16116 color_rule, next_port);
16117 color_rule->src_port = priv->representor_id;
16120 /* Create matchers for colors. */
16121 svport_match = (i != RTE_COLOR_RED) ? match_src_port : false;
16122 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
16123 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
16124 &attr, svport_match, NULL,
16125 &color_rule->matcher, &flow_err)) {
16126 DRV_LOG(ERR, "Failed to create color%u matcher.", i);
16129 /* Create flow, matching color. */
16130 if (__flow_dv_create_policy_flow(dev,
16131 color_reg_c_idx, (enum rte_color)i,
16132 color_rule->matcher->matcher_object,
16133 acts[i].actions_n, acts[i].dv_actions,
16134 svport_match, NULL, &color_rule->rule,
16136 DRV_LOG(ERR, "Failed to create color%u rule.", i);
16142 /* All the policy rules will be cleared. */
16144 color_rule = tmp_rules[i];
16146 if (color_rule->rule)
16147 mlx5_flow_os_destroy_flow(color_rule->rule);
16148 if (color_rule->matcher) {
16149 struct mlx5_flow_tbl_data_entry *tbl =
16150 container_of(color_rule->matcher->tbl,
16151 typeof(*tbl), tbl);
16152 mlx5_list_unregister(tbl->matchers,
16153 &color_rule->matcher->entry);
16155 TAILQ_REMOVE(&sub_policy->color_rules[i],
16156 color_rule, next_port);
16157 mlx5_free(color_rule);
16164 __flow_dv_create_policy_acts_rules(struct rte_eth_dev *dev,
16165 struct mlx5_flow_meter_policy *mtr_policy,
16166 struct mlx5_flow_meter_sub_policy *sub_policy,
16169 struct mlx5_priv *priv = dev->data->dev_private;
16170 struct mlx5_meter_policy_acts acts[RTE_COLORS];
16171 struct mlx5_flow_dv_tag_resource *tag;
16172 struct mlx5_flow_dv_port_id_action_resource *port_action;
16173 struct mlx5_hrxq *hrxq;
16174 struct mlx5_flow_meter_info *next_fm = NULL;
16175 struct mlx5_flow_meter_policy *next_policy;
16176 struct mlx5_flow_meter_sub_policy *next_sub_policy;
16177 struct mlx5_flow_tbl_data_entry *tbl_data;
16178 struct rte_flow_error error;
16179 uint8_t egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16180 uint8_t transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16181 bool mtr_first = egress || (transfer && priv->representor_id != UINT16_MAX);
16182 bool match_src_port = false;
16185 /* If RSS or Queue, no previous actions / rules is created. */
16186 for (i = 0; i < RTE_COLORS; i++) {
16187 acts[i].actions_n = 0;
16188 if (i == RTE_COLOR_RED) {
16189 /* Only support drop on red. */
16190 acts[i].dv_actions[0] =
16191 mtr_policy->dr_drop_action[domain];
16192 acts[i].actions_n = 1;
16195 if (i == RTE_COLOR_GREEN &&
16196 mtr_policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR) {
16197 struct rte_flow_attr attr = {
16198 .transfer = transfer
16201 next_fm = mlx5_flow_meter_find(priv,
16202 mtr_policy->act_cnt[i].next_mtr_id,
16206 "Failed to get next hierarchy meter.");
16209 if (mlx5_flow_meter_attach(priv, next_fm,
16211 DRV_LOG(ERR, "%s", error.message);
16215 /* Meter action must be the first for TX. */
16217 acts[i].dv_actions[acts[i].actions_n] =
16218 next_fm->meter_action;
16219 acts[i].actions_n++;
16222 if (mtr_policy->act_cnt[i].rix_mark) {
16223 tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG],
16224 mtr_policy->act_cnt[i].rix_mark);
16226 DRV_LOG(ERR, "Failed to find "
16227 "mark action for policy.");
16230 acts[i].dv_actions[acts[i].actions_n] = tag->action;
16231 acts[i].actions_n++;
16233 if (mtr_policy->act_cnt[i].modify_hdr) {
16234 acts[i].dv_actions[acts[i].actions_n] =
16235 mtr_policy->act_cnt[i].modify_hdr->action;
16236 acts[i].actions_n++;
16238 if (mtr_policy->act_cnt[i].fate_action) {
16239 switch (mtr_policy->act_cnt[i].fate_action) {
16240 case MLX5_FLOW_FATE_PORT_ID:
16241 port_action = mlx5_ipool_get
16242 (priv->sh->ipool[MLX5_IPOOL_PORT_ID],
16243 mtr_policy->act_cnt[i].rix_port_id_action);
16244 if (!port_action) {
16245 DRV_LOG(ERR, "Failed to find "
16246 "port action for policy.");
16249 acts[i].dv_actions[acts[i].actions_n] =
16250 port_action->action;
16251 acts[i].actions_n++;
16252 mtr_policy->dev = dev;
16253 match_src_port = true;
16255 case MLX5_FLOW_FATE_DROP:
16256 case MLX5_FLOW_FATE_JUMP:
16257 acts[i].dv_actions[acts[i].actions_n] =
16258 mtr_policy->act_cnt[i].dr_jump_action[domain];
16259 acts[i].actions_n++;
16261 case MLX5_FLOW_FATE_SHARED_RSS:
16262 case MLX5_FLOW_FATE_QUEUE:
16263 hrxq = mlx5_ipool_get
16264 (priv->sh->ipool[MLX5_IPOOL_HRXQ],
16265 sub_policy->rix_hrxq[i]);
16267 DRV_LOG(ERR, "Failed to find "
16268 "queue action for policy.");
16271 acts[i].dv_actions[acts[i].actions_n] =
16273 acts[i].actions_n++;
16275 case MLX5_FLOW_FATE_MTR:
16278 "No next hierarchy meter.");
16282 acts[i].dv_actions[acts[i].actions_n] =
16283 next_fm->meter_action;
16284 acts[i].actions_n++;
16286 if (mtr_policy->act_cnt[i].next_sub_policy) {
16288 mtr_policy->act_cnt[i].next_sub_policy;
16291 mlx5_flow_meter_policy_find(dev,
16292 next_fm->policy_id, NULL);
16293 MLX5_ASSERT(next_policy);
16295 next_policy->sub_policys[domain][0];
16298 container_of(next_sub_policy->tbl_rsc,
16299 struct mlx5_flow_tbl_data_entry, tbl);
16300 acts[i].dv_actions[acts[i].actions_n++] =
16301 tbl_data->jump.action;
16302 if (mtr_policy->act_cnt[i].modify_hdr)
16303 match_src_port = !!transfer;
16306 /*Queue action do nothing*/
16311 if (__flow_dv_create_domain_policy_rules(dev, sub_policy,
16312 egress, transfer, match_src_port, acts)) {
16314 "Failed to create policy rules per domain.");
16320 mlx5_flow_meter_detach(priv, next_fm);
16325 * Create the policy rules.
16328 * Pointer to Ethernet device.
16329 * @param[in,out] mtr_policy
16330 * Pointer to meter policy table.
16333 * 0 on success, -1 otherwise.
16336 flow_dv_create_policy_rules(struct rte_eth_dev *dev,
16337 struct mlx5_flow_meter_policy *mtr_policy)
16340 uint16_t sub_policy_num;
16342 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16343 sub_policy_num = (mtr_policy->sub_policy_num >>
16344 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
16345 MLX5_MTR_SUB_POLICY_NUM_MASK;
16346 if (!sub_policy_num)
16348 /* Prepare actions list and create policy rules. */
16349 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16350 mtr_policy->sub_policys[i][0], i)) {
16351 DRV_LOG(ERR, "Failed to create policy action "
16352 "list per domain.");
16360 __flow_dv_create_domain_def_policy(struct rte_eth_dev *dev, uint32_t domain)
16362 struct mlx5_priv *priv = dev->data->dev_private;
16363 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16364 struct mlx5_flow_meter_def_policy *def_policy;
16365 struct mlx5_flow_tbl_resource *jump_tbl;
16366 struct mlx5_flow_tbl_data_entry *tbl_data;
16367 uint8_t egress, transfer;
16368 struct rte_flow_error error;
16369 struct mlx5_meter_policy_acts acts[RTE_COLORS];
16372 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16373 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16374 def_policy = mtrmng->def_policy[domain];
16376 def_policy = mlx5_malloc(MLX5_MEM_ZERO,
16377 sizeof(struct mlx5_flow_meter_def_policy),
16378 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
16380 DRV_LOG(ERR, "Failed to alloc default policy table.");
16381 goto def_policy_error;
16383 mtrmng->def_policy[domain] = def_policy;
16384 /* Create the meter suffix table with SUFFIX level. */
16385 jump_tbl = flow_dv_tbl_resource_get(dev,
16386 MLX5_FLOW_TABLE_LEVEL_METER,
16387 egress, transfer, false, NULL, 0,
16388 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16391 "Failed to create meter suffix table.");
16392 goto def_policy_error;
16394 def_policy->sub_policy.jump_tbl[RTE_COLOR_GREEN] = jump_tbl;
16395 tbl_data = container_of(jump_tbl,
16396 struct mlx5_flow_tbl_data_entry, tbl);
16397 def_policy->dr_jump_action[RTE_COLOR_GREEN] =
16398 tbl_data->jump.action;
16399 acts[RTE_COLOR_GREEN].dv_actions[0] = tbl_data->jump.action;
16400 acts[RTE_COLOR_GREEN].actions_n = 1;
16402 * YELLOW has the same default policy as GREEN does.
16403 * G & Y share the same table and action. The 2nd time of table
16404 * resource getting is just to update the reference count for
16405 * the releasing stage.
16407 jump_tbl = flow_dv_tbl_resource_get(dev,
16408 MLX5_FLOW_TABLE_LEVEL_METER,
16409 egress, transfer, false, NULL, 0,
16410 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16413 "Failed to get meter suffix table.");
16414 goto def_policy_error;
16416 def_policy->sub_policy.jump_tbl[RTE_COLOR_YELLOW] = jump_tbl;
16417 tbl_data = container_of(jump_tbl,
16418 struct mlx5_flow_tbl_data_entry, tbl);
16419 def_policy->dr_jump_action[RTE_COLOR_YELLOW] =
16420 tbl_data->jump.action;
16421 acts[RTE_COLOR_YELLOW].dv_actions[0] = tbl_data->jump.action;
16422 acts[RTE_COLOR_YELLOW].actions_n = 1;
16423 /* Create jump action to the drop table. */
16424 if (!mtrmng->drop_tbl[domain]) {
16425 mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get
16426 (dev, MLX5_FLOW_TABLE_LEVEL_METER,
16427 egress, transfer, false, NULL, 0,
16428 0, MLX5_MTR_TABLE_ID_DROP, &error);
16429 if (!mtrmng->drop_tbl[domain]) {
16430 DRV_LOG(ERR, "Failed to create meter "
16431 "drop table for default policy.");
16432 goto def_policy_error;
16435 /* all RED: unique Drop table for jump action. */
16436 tbl_data = container_of(mtrmng->drop_tbl[domain],
16437 struct mlx5_flow_tbl_data_entry, tbl);
16438 def_policy->dr_jump_action[RTE_COLOR_RED] =
16439 tbl_data->jump.action;
16440 acts[RTE_COLOR_RED].dv_actions[0] = tbl_data->jump.action;
16441 acts[RTE_COLOR_RED].actions_n = 1;
16442 /* Create default policy rules. */
16443 ret = __flow_dv_create_domain_policy_rules(dev,
16444 &def_policy->sub_policy,
16445 egress, transfer, false, acts);
16447 DRV_LOG(ERR, "Failed to create default policy rules.");
16448 goto def_policy_error;
16453 __flow_dv_destroy_domain_def_policy(dev,
16454 (enum mlx5_meter_domain)domain);
16459 * Create the default policy table set.
16462 * Pointer to Ethernet device.
16464 * 0 on success, -1 otherwise.
16467 flow_dv_create_def_policy(struct rte_eth_dev *dev)
16469 struct mlx5_priv *priv = dev->data->dev_private;
16472 /* Non-termination policy table. */
16473 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16474 if (!priv->config.dv_esw_en && i == MLX5_MTR_DOMAIN_TRANSFER)
16476 if (__flow_dv_create_domain_def_policy(dev, i)) {
16477 DRV_LOG(ERR, "Failed to create default policy");
16478 /* Rollback the created default policies for others. */
16479 flow_dv_destroy_def_policy(dev);
16487 * Create the needed meter tables.
16488 * Lock free, (mutex should be acquired by caller).
16491 * Pointer to Ethernet device.
16493 * Meter information table.
16494 * @param[in] mtr_idx
16496 * @param[in] domain_bitmap
16499 * 0 on success, -1 otherwise.
16502 flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,
16503 struct mlx5_flow_meter_info *fm,
16505 uint8_t domain_bitmap)
16507 struct mlx5_priv *priv = dev->data->dev_private;
16508 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16509 struct rte_flow_error error;
16510 struct mlx5_flow_tbl_data_entry *tbl_data;
16511 uint8_t egress, transfer;
16512 void *actions[METER_ACTIONS];
16513 int domain, ret, i;
16514 struct mlx5_flow_counter *cnt;
16515 struct mlx5_flow_dv_match_params value = {
16516 .size = sizeof(value.buf),
16518 struct mlx5_flow_dv_match_params matcher_para = {
16519 .size = sizeof(matcher_para.buf),
16521 int mtr_id_reg_c = mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
16523 uint32_t mtr_id_mask = (UINT32_C(1) << mtrmng->max_mtr_bits) - 1;
16524 uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
16525 struct mlx5_list_entry *entry;
16526 struct mlx5_flow_dv_matcher matcher = {
16528 .size = sizeof(matcher.mask.buf),
16531 struct mlx5_flow_dv_matcher *drop_matcher;
16532 struct mlx5_flow_cb_ctx ctx = {
16538 if (!priv->mtr_en || mtr_id_reg_c < 0) {
16539 rte_errno = ENOTSUP;
16542 for (domain = 0; domain < MLX5_MTR_DOMAIN_MAX; domain++) {
16543 if (!(domain_bitmap & (1 << domain)) ||
16544 (mtrmng->def_rule[domain] && !fm->drop_cnt))
16546 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16547 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16548 /* Create the drop table with METER DROP level. */
16549 if (!mtrmng->drop_tbl[domain]) {
16550 mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get(dev,
16551 MLX5_FLOW_TABLE_LEVEL_METER,
16552 egress, transfer, false, NULL, 0,
16553 0, MLX5_MTR_TABLE_ID_DROP, &error);
16554 if (!mtrmng->drop_tbl[domain]) {
16555 DRV_LOG(ERR, "Failed to create meter drop table.");
16559 /* Create default matcher in drop table. */
16560 matcher.tbl = mtrmng->drop_tbl[domain],
16561 tbl_data = container_of(mtrmng->drop_tbl[domain],
16562 struct mlx5_flow_tbl_data_entry, tbl);
16563 if (!mtrmng->def_matcher[domain]) {
16564 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16565 (enum modify_reg)mtr_id_reg_c,
16567 matcher.priority = MLX5_MTRS_DEFAULT_RULE_PRIORITY;
16568 matcher.crc = rte_raw_cksum
16569 ((const void *)matcher.mask.buf,
16570 matcher.mask.size);
16571 entry = mlx5_list_register(tbl_data->matchers, &ctx);
16573 DRV_LOG(ERR, "Failed to register meter "
16574 "drop default matcher.");
16577 mtrmng->def_matcher[domain] = container_of(entry,
16578 struct mlx5_flow_dv_matcher, entry);
16580 /* Create default rule in drop table. */
16581 if (!mtrmng->def_rule[domain]) {
16583 actions[i++] = priv->sh->dr_drop_action;
16584 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16585 (enum modify_reg)mtr_id_reg_c, 0, 0);
16586 misc_mask = flow_dv_matcher_enable(value.buf);
16587 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16588 ret = mlx5_flow_os_create_flow
16589 (mtrmng->def_matcher[domain]->matcher_object,
16590 (void *)&value, i, actions,
16591 &mtrmng->def_rule[domain]);
16593 DRV_LOG(ERR, "Failed to create meter "
16594 "default drop rule for drop table.");
16600 MLX5_ASSERT(mtrmng->max_mtr_bits);
16601 if (!mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1]) {
16602 /* Create matchers for Drop. */
16603 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16604 (enum modify_reg)mtr_id_reg_c, 0,
16605 (mtr_id_mask << mtr_id_offset));
16606 matcher.priority = MLX5_REG_BITS - mtrmng->max_mtr_bits;
16607 matcher.crc = rte_raw_cksum
16608 ((const void *)matcher.mask.buf,
16609 matcher.mask.size);
16610 entry = mlx5_list_register(tbl_data->matchers, &ctx);
16613 "Failed to register meter drop matcher.");
16616 mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1] =
16617 container_of(entry, struct mlx5_flow_dv_matcher,
16621 mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1];
16622 /* Create drop rule, matching meter_id only. */
16623 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16624 (enum modify_reg)mtr_id_reg_c,
16625 (mtr_idx << mtr_id_offset), UINT32_MAX);
16627 cnt = flow_dv_counter_get_by_idx(dev,
16628 fm->drop_cnt, NULL);
16629 actions[i++] = cnt->action;
16630 actions[i++] = priv->sh->dr_drop_action;
16631 misc_mask = flow_dv_matcher_enable(value.buf);
16632 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16633 ret = mlx5_flow_os_create_flow(drop_matcher->matcher_object,
16634 (void *)&value, i, actions,
16635 &fm->drop_rule[domain]);
16637 DRV_LOG(ERR, "Failed to create meter "
16638 "drop rule for drop table.");
16644 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16645 if (fm->drop_rule[i]) {
16646 claim_zero(mlx5_flow_os_destroy_flow
16647 (fm->drop_rule[i]));
16648 fm->drop_rule[i] = NULL;
16654 static struct mlx5_flow_meter_sub_policy *
16655 __flow_dv_meter_get_rss_sub_policy(struct rte_eth_dev *dev,
16656 struct mlx5_flow_meter_policy *mtr_policy,
16657 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS],
16658 struct mlx5_flow_meter_sub_policy *next_sub_policy,
16661 struct mlx5_priv *priv = dev->data->dev_private;
16662 struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16663 uint32_t sub_policy_idx = 0;
16664 uint32_t hrxq_idx[MLX5_MTR_RTE_COLORS] = {0};
16666 struct mlx5_hrxq *hrxq;
16667 struct mlx5_flow_handle dh;
16668 struct mlx5_meter_policy_action_container *act_cnt;
16669 uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16670 uint16_t sub_policy_num;
16672 rte_spinlock_lock(&mtr_policy->sl);
16673 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16676 hrxq_idx[i] = mlx5_hrxq_get(dev, rss_desc[i]);
16677 if (!hrxq_idx[i]) {
16678 rte_spinlock_unlock(&mtr_policy->sl);
16682 sub_policy_num = (mtr_policy->sub_policy_num >>
16683 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16684 MLX5_MTR_SUB_POLICY_NUM_MASK;
16685 for (j = 0; j < sub_policy_num; j++) {
16686 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16689 mtr_policy->sub_policys[domain][j]->rix_hrxq[i])
16692 if (i >= MLX5_MTR_RTE_COLORS) {
16694 * Found the sub policy table with
16695 * the same queue per color.
16697 rte_spinlock_unlock(&mtr_policy->sl);
16698 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16699 mlx5_hrxq_release(dev, hrxq_idx[i]);
16701 return mtr_policy->sub_policys[domain][j];
16704 /* Create sub policy. */
16705 if (!mtr_policy->sub_policys[domain][0]->rix_hrxq[0]) {
16706 /* Reuse the first pre-allocated sub_policy. */
16707 sub_policy = mtr_policy->sub_policys[domain][0];
16708 sub_policy_idx = sub_policy->idx;
16710 sub_policy = mlx5_ipool_zmalloc
16711 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16714 sub_policy_idx > MLX5_MAX_SUB_POLICY_TBL_NUM) {
16715 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16716 mlx5_hrxq_release(dev, hrxq_idx[i]);
16717 goto rss_sub_policy_error;
16719 sub_policy->idx = sub_policy_idx;
16720 sub_policy->main_policy = mtr_policy;
16722 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16725 sub_policy->rix_hrxq[i] = hrxq_idx[i];
16726 if (mtr_policy->is_hierarchy) {
16727 act_cnt = &mtr_policy->act_cnt[i];
16728 act_cnt->next_sub_policy = next_sub_policy;
16729 mlx5_hrxq_release(dev, hrxq_idx[i]);
16732 * Overwrite the last action from
16733 * RSS action to Queue action.
16735 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
16738 DRV_LOG(ERR, "Failed to get policy hrxq");
16739 goto rss_sub_policy_error;
16741 act_cnt = &mtr_policy->act_cnt[i];
16742 if (act_cnt->rix_mark || act_cnt->modify_hdr) {
16743 memset(&dh, 0, sizeof(struct mlx5_flow_handle));
16744 if (act_cnt->rix_mark)
16746 dh.fate_action = MLX5_FLOW_FATE_QUEUE;
16747 dh.rix_hrxq = hrxq_idx[i];
16748 flow_drv_rxq_flags_set(dev, &dh);
16752 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16753 sub_policy, domain)) {
16754 DRV_LOG(ERR, "Failed to create policy "
16755 "rules for ingress domain.");
16756 goto rss_sub_policy_error;
16758 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16759 i = (mtr_policy->sub_policy_num >>
16760 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16761 MLX5_MTR_SUB_POLICY_NUM_MASK;
16762 if (i >= MLX5_MTR_RSS_MAX_SUB_POLICY) {
16763 DRV_LOG(ERR, "No free sub-policy slot.");
16764 goto rss_sub_policy_error;
16766 mtr_policy->sub_policys[domain][i] = sub_policy;
16768 mtr_policy->sub_policy_num &= ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16769 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
16770 mtr_policy->sub_policy_num |=
16771 (i & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16772 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
16774 rte_spinlock_unlock(&mtr_policy->sl);
16777 rss_sub_policy_error:
16779 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16780 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16781 i = (mtr_policy->sub_policy_num >>
16782 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16783 MLX5_MTR_SUB_POLICY_NUM_MASK;
16784 mtr_policy->sub_policys[domain][i] = NULL;
16785 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16789 rte_spinlock_unlock(&mtr_policy->sl);
16794 * Find the policy table for prefix table with RSS.
16797 * Pointer to Ethernet device.
16798 * @param[in] mtr_policy
16799 * Pointer to meter policy table.
16800 * @param[in] rss_desc
16801 * Pointer to rss_desc
16803 * Pointer to table set on success, NULL otherwise and rte_errno is set.
16805 static struct mlx5_flow_meter_sub_policy *
16806 flow_dv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
16807 struct mlx5_flow_meter_policy *mtr_policy,
16808 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
16810 struct mlx5_priv *priv = dev->data->dev_private;
16811 struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16812 struct mlx5_flow_meter_info *next_fm;
16813 struct mlx5_flow_meter_policy *next_policy;
16814 struct mlx5_flow_meter_sub_policy *next_sub_policy = NULL;
16815 struct mlx5_flow_meter_policy *policies[MLX5_MTR_CHAIN_MAX_NUM];
16816 struct mlx5_flow_meter_sub_policy *sub_policies[MLX5_MTR_CHAIN_MAX_NUM];
16817 uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16818 bool reuse_sub_policy;
16823 /* Iterate hierarchy to get all policies in this hierarchy. */
16824 policies[i++] = mtr_policy;
16825 if (!mtr_policy->is_hierarchy)
16827 if (i >= MLX5_MTR_CHAIN_MAX_NUM) {
16828 DRV_LOG(ERR, "Exceed max meter number in hierarchy.");
16831 next_fm = mlx5_flow_meter_find(priv,
16832 mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
16834 DRV_LOG(ERR, "Failed to get next meter in hierarchy.");
16838 mlx5_flow_meter_policy_find(dev, next_fm->policy_id,
16840 MLX5_ASSERT(next_policy);
16841 mtr_policy = next_policy;
16845 * From last policy to the first one in hierarchy,
16846 * create / get the sub policy for each of them.
16848 sub_policy = __flow_dv_meter_get_rss_sub_policy(dev,
16852 &reuse_sub_policy);
16854 DRV_LOG(ERR, "Failed to get the sub policy.");
16857 if (!reuse_sub_policy)
16858 sub_policies[j++] = sub_policy;
16859 next_sub_policy = sub_policy;
16864 uint16_t sub_policy_num;
16866 sub_policy = sub_policies[--j];
16867 mtr_policy = sub_policy->main_policy;
16868 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16869 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16870 sub_policy_num = (mtr_policy->sub_policy_num >>
16871 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16872 MLX5_MTR_SUB_POLICY_NUM_MASK;
16873 mtr_policy->sub_policys[domain][sub_policy_num - 1] =
16876 mtr_policy->sub_policy_num &=
16877 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16878 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i));
16879 mtr_policy->sub_policy_num |=
16880 (sub_policy_num & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16881 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i);
16882 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16890 * Create the sub policy tag rule for all meters in hierarchy.
16893 * Pointer to Ethernet device.
16895 * Meter information table.
16896 * @param[in] src_port
16897 * The src port this extra rule should use.
16899 * The src port match item.
16900 * @param[out] error
16901 * Perform verbose error reporting if not NULL.
16903 * 0 on success, a negative errno value otherwise and rte_errno is set.
16906 flow_dv_meter_hierarchy_rule_create(struct rte_eth_dev *dev,
16907 struct mlx5_flow_meter_info *fm,
16909 const struct rte_flow_item *item,
16910 struct rte_flow_error *error)
16912 struct mlx5_priv *priv = dev->data->dev_private;
16913 struct mlx5_flow_meter_policy *mtr_policy;
16914 struct mlx5_flow_meter_sub_policy *sub_policy;
16915 struct mlx5_flow_meter_info *next_fm = NULL;
16916 struct mlx5_flow_meter_policy *next_policy;
16917 struct mlx5_flow_meter_sub_policy *next_sub_policy;
16918 struct mlx5_flow_tbl_data_entry *tbl_data;
16919 struct mlx5_sub_policy_color_rule *color_rule;
16920 struct mlx5_meter_policy_acts acts;
16921 uint32_t color_reg_c_idx;
16922 bool mtr_first = (src_port != UINT16_MAX) ? true : false;
16923 struct rte_flow_attr attr = {
16924 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
16931 uint32_t domain = MLX5_MTR_DOMAIN_TRANSFER;
16934 mtr_policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
16935 MLX5_ASSERT(mtr_policy);
16936 if (!mtr_policy->is_hierarchy)
16938 next_fm = mlx5_flow_meter_find(priv,
16939 mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
16941 return rte_flow_error_set(error, EINVAL,
16942 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
16943 "Failed to find next meter in hierarchy.");
16945 if (!next_fm->drop_cnt)
16947 color_reg_c_idx = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, error);
16948 sub_policy = mtr_policy->sub_policys[domain][0];
16949 for (i = 0; i < RTE_COLORS; i++) {
16950 bool rule_exist = false;
16951 struct mlx5_meter_policy_action_container *act_cnt;
16953 if (i >= RTE_COLOR_YELLOW)
16955 TAILQ_FOREACH(color_rule,
16956 &sub_policy->color_rules[i], next_port)
16957 if (color_rule->src_port == src_port) {
16963 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
16964 sizeof(struct mlx5_sub_policy_color_rule),
16967 return rte_flow_error_set(error, ENOMEM,
16968 RTE_FLOW_ERROR_TYPE_ACTION,
16969 NULL, "No memory to create tag color rule.");
16970 color_rule->src_port = src_port;
16972 next_policy = mlx5_flow_meter_policy_find(dev,
16973 next_fm->policy_id, NULL);
16974 MLX5_ASSERT(next_policy);
16975 next_sub_policy = next_policy->sub_policys[domain][0];
16976 tbl_data = container_of(next_sub_policy->tbl_rsc,
16977 struct mlx5_flow_tbl_data_entry, tbl);
16978 act_cnt = &mtr_policy->act_cnt[i];
16980 acts.dv_actions[0] = next_fm->meter_action;
16981 acts.dv_actions[1] = act_cnt->modify_hdr->action;
16983 acts.dv_actions[0] = act_cnt->modify_hdr->action;
16984 acts.dv_actions[1] = next_fm->meter_action;
16986 acts.dv_actions[2] = tbl_data->jump.action;
16987 acts.actions_n = 3;
16988 if (mlx5_flow_meter_attach(priv, next_fm, &attr, error)) {
16992 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
16993 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
16995 &color_rule->matcher, error)) {
16996 rte_flow_error_set(error, errno,
16997 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
16998 "Failed to create hierarchy meter matcher.");
17001 if (__flow_dv_create_policy_flow(dev, color_reg_c_idx,
17003 color_rule->matcher->matcher_object,
17004 acts.actions_n, acts.dv_actions,
17006 &color_rule->rule, &attr)) {
17007 rte_flow_error_set(error, errno,
17008 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17009 "Failed to create hierarchy meter rule.");
17012 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
17013 color_rule, next_port);
17017 * Recursive call to iterate all meters in hierarchy and
17018 * create needed rules.
17020 return flow_dv_meter_hierarchy_rule_create(dev, next_fm,
17021 src_port, item, error);
17024 if (color_rule->rule)
17025 mlx5_flow_os_destroy_flow(color_rule->rule);
17026 if (color_rule->matcher) {
17027 struct mlx5_flow_tbl_data_entry *tbl =
17028 container_of(color_rule->matcher->tbl,
17029 typeof(*tbl), tbl);
17030 mlx5_list_unregister(tbl->matchers,
17031 &color_rule->matcher->entry);
17033 mlx5_free(color_rule);
17036 mlx5_flow_meter_detach(priv, next_fm);
17041 * Destroy the sub policy table with RX queue.
17044 * Pointer to Ethernet device.
17045 * @param[in] mtr_policy
17046 * Pointer to meter policy table.
17049 flow_dv_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
17050 struct mlx5_flow_meter_policy *mtr_policy)
17052 struct mlx5_priv *priv = dev->data->dev_private;
17053 struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
17054 uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
17056 uint16_t sub_policy_num, new_policy_num;
17058 rte_spinlock_lock(&mtr_policy->sl);
17059 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
17060 switch (mtr_policy->act_cnt[i].fate_action) {
17061 case MLX5_FLOW_FATE_SHARED_RSS:
17062 sub_policy_num = (mtr_policy->sub_policy_num >>
17063 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17064 MLX5_MTR_SUB_POLICY_NUM_MASK;
17065 new_policy_num = sub_policy_num;
17066 for (j = 0; j < sub_policy_num; j++) {
17068 mtr_policy->sub_policys[domain][j];
17070 __flow_dv_destroy_sub_policy_rules(dev,
17073 mtr_policy->sub_policys[domain][0]) {
17074 mtr_policy->sub_policys[domain][j] =
17077 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17083 if (new_policy_num != sub_policy_num) {
17084 mtr_policy->sub_policy_num &=
17085 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17086 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
17087 mtr_policy->sub_policy_num |=
17089 MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17090 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
17093 case MLX5_FLOW_FATE_QUEUE:
17094 sub_policy = mtr_policy->sub_policys[domain][0];
17095 __flow_dv_destroy_sub_policy_rules(dev,
17099 /*Other actions without queue and do nothing*/
17103 rte_spinlock_unlock(&mtr_policy->sl);
17106 * Check whether the DR drop action is supported on the root table or not.
17108 * Create a simple flow with DR drop action on root table to validate
17109 * if DR drop action on root table is supported or not.
17112 * Pointer to rte_eth_dev structure.
17115 * 0 on success, a negative errno value otherwise and rte_errno is set.
17118 mlx5_flow_discover_dr_action_support(struct rte_eth_dev *dev)
17120 struct mlx5_priv *priv = dev->data->dev_private;
17121 struct mlx5_dev_ctx_shared *sh = priv->sh;
17122 struct mlx5_flow_dv_match_params mask = {
17123 .size = sizeof(mask.buf),
17125 struct mlx5_flow_dv_match_params value = {
17126 .size = sizeof(value.buf),
17128 struct mlx5dv_flow_matcher_attr dv_attr = {
17129 .type = IBV_FLOW_ATTR_NORMAL,
17131 .match_criteria_enable = 0,
17132 .match_mask = (void *)&mask,
17134 struct mlx5_flow_tbl_resource *tbl = NULL;
17135 void *matcher = NULL;
17139 tbl = flow_dv_tbl_resource_get(dev, 0, 0, 0, false, NULL,
17143 dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17144 __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17145 ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj,
17149 __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17150 ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17151 &sh->dr_drop_action, &flow);
17154 * If DR drop action is not supported on root table, flow create will
17155 * be failed with EOPNOTSUPP or EPROTONOSUPPORT.
17159 (errno == EPROTONOSUPPORT || errno == EOPNOTSUPP))
17160 DRV_LOG(INFO, "DR drop action is not supported in root table.");
17162 DRV_LOG(ERR, "Unexpected error in DR drop action support detection");
17165 claim_zero(mlx5_flow_os_destroy_flow(flow));
17168 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17170 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17175 * Validate the batch counter support in root table.
17177 * Create a simple flow with invalid counter and drop action on root table to
17178 * validate if batch counter with offset on root table is supported or not.
17181 * Pointer to rte_eth_dev structure.
17184 * 0 on success, a negative errno value otherwise and rte_errno is set.
17187 mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)
17189 struct mlx5_priv *priv = dev->data->dev_private;
17190 struct mlx5_dev_ctx_shared *sh = priv->sh;
17191 struct mlx5_flow_dv_match_params mask = {
17192 .size = sizeof(mask.buf),
17194 struct mlx5_flow_dv_match_params value = {
17195 .size = sizeof(value.buf),
17197 struct mlx5dv_flow_matcher_attr dv_attr = {
17198 .type = IBV_FLOW_ATTR_NORMAL | IBV_FLOW_ATTR_FLAGS_EGRESS,
17200 .match_criteria_enable = 0,
17201 .match_mask = (void *)&mask,
17203 void *actions[2] = { 0 };
17204 struct mlx5_flow_tbl_resource *tbl = NULL;
17205 struct mlx5_devx_obj *dcs = NULL;
17206 void *matcher = NULL;
17210 tbl = flow_dv_tbl_resource_get(dev, 0, 1, 0, false, NULL,
17214 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
17217 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, UINT16_MAX,
17221 dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17222 __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17223 ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj,
17227 __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17228 ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17232 * If batch counter with offset is not supported, the driver will not
17233 * validate the invalid offset value, flow create should success.
17234 * In this case, it means batch counter is not supported in root table.
17236 * Otherwise, if flow create is failed, counter offset is supported.
17239 DRV_LOG(INFO, "Batch counter is not supported in root "
17240 "table. Switch to fallback mode.");
17241 rte_errno = ENOTSUP;
17243 claim_zero(mlx5_flow_os_destroy_flow(flow));
17245 /* Check matcher to make sure validate fail at flow create. */
17246 if (!matcher || (matcher && errno != EINVAL))
17247 DRV_LOG(ERR, "Unexpected error in counter offset "
17248 "support detection");
17252 claim_zero(mlx5_flow_os_destroy_flow_action(actions[0]));
17254 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17256 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17258 claim_zero(mlx5_devx_cmd_destroy(dcs));
17263 * Query a devx counter.
17266 * Pointer to the Ethernet device structure.
17268 * Index to the flow counter.
17270 * Set to clear the counter statistics.
17272 * The statistics value of packets.
17273 * @param[out] bytes
17274 * The statistics value of bytes.
17277 * 0 on success, otherwise return -1.
17280 flow_dv_counter_query(struct rte_eth_dev *dev, uint32_t counter, bool clear,
17281 uint64_t *pkts, uint64_t *bytes)
17283 struct mlx5_priv *priv = dev->data->dev_private;
17284 struct mlx5_flow_counter *cnt;
17285 uint64_t inn_pkts, inn_bytes;
17288 if (!priv->config.devx)
17291 ret = _flow_dv_query_count(dev, counter, &inn_pkts, &inn_bytes);
17294 cnt = flow_dv_counter_get_by_idx(dev, counter, NULL);
17295 *pkts = inn_pkts - cnt->hits;
17296 *bytes = inn_bytes - cnt->bytes;
17298 cnt->hits = inn_pkts;
17299 cnt->bytes = inn_bytes;
17305 * Get aged-out flows.
17308 * Pointer to the Ethernet device structure.
17309 * @param[in] context
17310 * The address of an array of pointers to the aged-out flows contexts.
17311 * @param[in] nb_contexts
17312 * The length of context array pointers.
17313 * @param[out] error
17314 * Perform verbose error reporting if not NULL. Initialized in case of
17318 * how many contexts get in success, otherwise negative errno value.
17319 * if nb_contexts is 0, return the amount of all aged contexts.
17320 * if nb_contexts is not 0 , return the amount of aged flows reported
17321 * in the context array.
17322 * @note: only stub for now
17325 flow_dv_get_aged_flows(struct rte_eth_dev *dev,
17327 uint32_t nb_contexts,
17328 struct rte_flow_error *error)
17330 struct mlx5_priv *priv = dev->data->dev_private;
17331 struct mlx5_age_info *age_info;
17332 struct mlx5_age_param *age_param;
17333 struct mlx5_flow_counter *counter;
17334 struct mlx5_aso_age_action *act;
17337 if (nb_contexts && !context)
17338 return rte_flow_error_set(error, EINVAL,
17339 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17340 NULL, "empty context");
17341 age_info = GET_PORT_AGE_INFO(priv);
17342 rte_spinlock_lock(&age_info->aged_sl);
17343 LIST_FOREACH(act, &age_info->aged_aso, next) {
17346 context[nb_flows - 1] =
17347 act->age_params.context;
17348 if (!(--nb_contexts))
17352 TAILQ_FOREACH(counter, &age_info->aged_counters, next) {
17355 age_param = MLX5_CNT_TO_AGE(counter);
17356 context[nb_flows - 1] = age_param->context;
17357 if (!(--nb_contexts))
17361 rte_spinlock_unlock(&age_info->aged_sl);
17362 MLX5_AGE_SET(age_info, MLX5_AGE_TRIGGER);
17367 * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
17370 flow_dv_counter_allocate(struct rte_eth_dev *dev)
17372 return flow_dv_counter_alloc(dev, 0);
17376 * Validate indirect action.
17377 * Dispatcher for action type specific validation.
17380 * Pointer to the Ethernet device structure.
17382 * Indirect action configuration.
17383 * @param[in] action
17384 * The indirect action object to validate.
17385 * @param[out] error
17386 * Perform verbose error reporting if not NULL. Initialized in case of
17390 * 0 on success, otherwise negative errno value.
17393 flow_dv_action_validate(struct rte_eth_dev *dev,
17394 const struct rte_flow_indir_action_conf *conf,
17395 const struct rte_flow_action *action,
17396 struct rte_flow_error *err)
17398 struct mlx5_priv *priv = dev->data->dev_private;
17400 RTE_SET_USED(conf);
17401 switch (action->type) {
17402 case RTE_FLOW_ACTION_TYPE_RSS:
17404 * priv->obj_ops is set according to driver capabilities.
17405 * When DevX capabilities are
17406 * sufficient, it is set to devx_obj_ops.
17407 * Otherwise, it is set to ibv_obj_ops.
17408 * ibv_obj_ops doesn't support ind_table_modify operation.
17409 * In this case the indirect RSS action can't be used.
17411 if (priv->obj_ops.ind_table_modify == NULL)
17412 return rte_flow_error_set
17414 RTE_FLOW_ERROR_TYPE_ACTION,
17416 "Indirect RSS action not supported");
17417 return mlx5_validate_action_rss(dev, action, err);
17418 case RTE_FLOW_ACTION_TYPE_AGE:
17419 if (!priv->sh->aso_age_mng)
17420 return rte_flow_error_set(err, ENOTSUP,
17421 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17423 "Indirect age action not supported");
17424 return flow_dv_validate_action_age(0, action, dev, err);
17425 case RTE_FLOW_ACTION_TYPE_COUNT:
17427 * There are two mechanisms to share the action count.
17428 * The old mechanism uses the shared field to share, while the
17429 * new mechanism uses the indirect action API.
17430 * This validation comes to make sure that the two mechanisms
17431 * are not combined.
17433 if (is_shared_action_count(action))
17434 return rte_flow_error_set(err, ENOTSUP,
17435 RTE_FLOW_ERROR_TYPE_ACTION,
17437 "Mix shared and indirect counter is not supported");
17438 return flow_dv_validate_action_count(dev, true, 0, err);
17439 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
17440 if (!priv->sh->ct_aso_en)
17441 return rte_flow_error_set(err, ENOTSUP,
17442 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17443 "ASO CT is not supported");
17444 return mlx5_validate_action_ct(dev, action->conf, err);
17446 return rte_flow_error_set(err, ENOTSUP,
17447 RTE_FLOW_ERROR_TYPE_ACTION,
17449 "action type not supported");
17454 * Check if the RSS configurations for colors of a meter policy match
17455 * each other, except the queues.
17458 * Pointer to the first RSS flow action.
17460 * Pointer to the second RSS flow action.
17463 * 0 on match, 1 on conflict.
17466 flow_dv_mtr_policy_rss_compare(const struct rte_flow_action_rss *r1,
17467 const struct rte_flow_action_rss *r2)
17471 if (r1->func != r2->func || r1->level != r2->level ||
17472 r1->types != r2->types || r1->key_len != r2->key_len ||
17473 memcmp(r1->key, r2->key, r1->key_len))
17479 * Validate the meter hierarchy chain for meter policy.
17482 * Pointer to the Ethernet device structure.
17483 * @param[in] meter_id
17485 * @param[in] action_flags
17486 * Holds the actions detected until now.
17487 * @param[out] is_rss
17489 * @param[out] hierarchy_domain
17490 * The domain bitmap for hierarchy policy.
17491 * @param[out] error
17492 * Perform verbose error reporting if not NULL. Initialized in case of
17496 * 0 on success, otherwise negative errno value with error set.
17499 flow_dv_validate_policy_mtr_hierarchy(struct rte_eth_dev *dev,
17501 uint64_t action_flags,
17503 uint8_t *hierarchy_domain,
17504 struct rte_mtr_error *error)
17506 struct mlx5_priv *priv = dev->data->dev_private;
17507 struct mlx5_flow_meter_info *fm;
17508 struct mlx5_flow_meter_policy *policy;
17511 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
17512 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17513 return -rte_mtr_error_set(error, EINVAL,
17514 RTE_MTR_ERROR_TYPE_POLICER_ACTION_GREEN,
17516 "Multiple fate actions not supported.");
17518 fm = mlx5_flow_meter_find(priv, meter_id, NULL);
17520 return -rte_mtr_error_set(error, EINVAL,
17521 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17522 "Meter not found in meter hierarchy.");
17523 if (fm->def_policy)
17524 return -rte_mtr_error_set(error, EINVAL,
17525 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17526 "Non termination meter not supported in hierarchy.");
17527 policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
17528 MLX5_ASSERT(policy);
17529 if (!policy->is_hierarchy) {
17530 if (policy->transfer)
17531 *hierarchy_domain |=
17532 MLX5_MTR_DOMAIN_TRANSFER_BIT;
17533 if (policy->ingress)
17534 *hierarchy_domain |=
17535 MLX5_MTR_DOMAIN_INGRESS_BIT;
17536 if (policy->egress)
17537 *hierarchy_domain |= MLX5_MTR_DOMAIN_EGRESS_BIT;
17538 *is_rss = policy->is_rss;
17541 meter_id = policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id;
17542 if (++cnt >= MLX5_MTR_CHAIN_MAX_NUM)
17543 return -rte_mtr_error_set(error, EINVAL,
17544 RTE_MTR_ERROR_TYPE_METER_POLICY, NULL,
17545 "Exceed max hierarchy meter number.");
17551 * Validate meter policy actions.
17552 * Dispatcher for action type specific validation.
17555 * Pointer to the Ethernet device structure.
17556 * @param[in] action
17557 * The meter policy action object to validate.
17559 * Attributes of flow to determine steering domain.
17560 * @param[out] error
17561 * Perform verbose error reporting if not NULL. Initialized in case of
17565 * 0 on success, otherwise negative errno value.
17568 flow_dv_validate_mtr_policy_acts(struct rte_eth_dev *dev,
17569 const struct rte_flow_action *actions[RTE_COLORS],
17570 struct rte_flow_attr *attr,
17572 uint8_t *domain_bitmap,
17573 uint8_t *policy_mode,
17574 struct rte_mtr_error *error)
17576 struct mlx5_priv *priv = dev->data->dev_private;
17577 struct mlx5_dev_config *dev_conf = &priv->config;
17578 const struct rte_flow_action *act;
17579 uint64_t action_flags[RTE_COLORS] = {0};
17582 struct rte_flow_error flow_err;
17583 uint8_t domain_color[RTE_COLORS] = {0};
17584 uint8_t def_domain = MLX5_MTR_ALL_DOMAIN_BIT;
17585 uint8_t hierarchy_domain = 0;
17586 const struct rte_flow_action_meter *mtr;
17587 bool def_green = false;
17588 bool def_yellow = false;
17589 const struct rte_flow_action_rss *rss_color[RTE_COLORS] = {NULL};
17591 if (!priv->config.dv_esw_en)
17592 def_domain &= ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
17593 *domain_bitmap = def_domain;
17594 /* Red color could only support DROP action. */
17595 if (!actions[RTE_COLOR_RED] ||
17596 actions[RTE_COLOR_RED]->type != RTE_FLOW_ACTION_TYPE_DROP)
17597 return -rte_mtr_error_set(error, ENOTSUP,
17598 RTE_MTR_ERROR_TYPE_METER_POLICY,
17599 NULL, "Red color only supports drop action.");
17601 * Check default policy actions:
17602 * Green / Yellow: no action, Red: drop action
17603 * Either G or Y will trigger default policy actions to be created.
17605 if (!actions[RTE_COLOR_GREEN] ||
17606 actions[RTE_COLOR_GREEN]->type == RTE_FLOW_ACTION_TYPE_END)
17608 if (!actions[RTE_COLOR_YELLOW] ||
17609 actions[RTE_COLOR_YELLOW]->type == RTE_FLOW_ACTION_TYPE_END)
17611 if (def_green && def_yellow) {
17612 *policy_mode = MLX5_MTR_POLICY_MODE_DEF;
17614 } else if (!def_green && def_yellow) {
17615 *policy_mode = MLX5_MTR_POLICY_MODE_OG;
17616 } else if (def_green && !def_yellow) {
17617 *policy_mode = MLX5_MTR_POLICY_MODE_OY;
17619 /* Set to empty string in case of NULL pointer access by user. */
17620 flow_err.message = "";
17621 for (i = 0; i < RTE_COLORS; i++) {
17623 for (action_flags[i] = 0, actions_n = 0;
17624 act && act->type != RTE_FLOW_ACTION_TYPE_END;
17626 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
17627 return -rte_mtr_error_set(error, ENOTSUP,
17628 RTE_MTR_ERROR_TYPE_METER_POLICY,
17629 NULL, "too many actions");
17630 switch (act->type) {
17631 case RTE_FLOW_ACTION_TYPE_PORT_ID:
17632 if (!priv->config.dv_esw_en)
17633 return -rte_mtr_error_set(error,
17635 RTE_MTR_ERROR_TYPE_METER_POLICY,
17636 NULL, "PORT action validate check"
17637 " fail for ESW disable");
17638 ret = flow_dv_validate_action_port_id(dev,
17640 act, attr, &flow_err);
17642 return -rte_mtr_error_set(error,
17644 RTE_MTR_ERROR_TYPE_METER_POLICY,
17645 NULL, flow_err.message ?
17647 "PORT action validate check fail");
17649 action_flags[i] |= MLX5_FLOW_ACTION_PORT_ID;
17651 case RTE_FLOW_ACTION_TYPE_MARK:
17652 ret = flow_dv_validate_action_mark(dev, act,
17656 return -rte_mtr_error_set(error,
17658 RTE_MTR_ERROR_TYPE_METER_POLICY,
17659 NULL, flow_err.message ?
17661 "Mark action validate check fail");
17662 if (dev_conf->dv_xmeta_en !=
17663 MLX5_XMETA_MODE_LEGACY)
17664 return -rte_mtr_error_set(error,
17666 RTE_MTR_ERROR_TYPE_METER_POLICY,
17667 NULL, "Extend MARK action is "
17668 "not supported. Please try use "
17669 "default policy for meter.");
17670 action_flags[i] |= MLX5_FLOW_ACTION_MARK;
17673 case RTE_FLOW_ACTION_TYPE_SET_TAG:
17674 ret = flow_dv_validate_action_set_tag(dev,
17675 act, action_flags[i],
17678 return -rte_mtr_error_set(error,
17680 RTE_MTR_ERROR_TYPE_METER_POLICY,
17681 NULL, flow_err.message ?
17683 "Set tag action validate check fail");
17684 action_flags[i] |= MLX5_FLOW_ACTION_SET_TAG;
17687 case RTE_FLOW_ACTION_TYPE_DROP:
17688 ret = mlx5_flow_validate_action_drop
17689 (action_flags[i], attr, &flow_err);
17691 return -rte_mtr_error_set(error,
17693 RTE_MTR_ERROR_TYPE_METER_POLICY,
17694 NULL, flow_err.message ?
17696 "Drop action validate check fail");
17697 action_flags[i] |= MLX5_FLOW_ACTION_DROP;
17700 case RTE_FLOW_ACTION_TYPE_QUEUE:
17702 * Check whether extensive
17703 * metadata feature is engaged.
17705 if (dev_conf->dv_flow_en &&
17706 (dev_conf->dv_xmeta_en !=
17707 MLX5_XMETA_MODE_LEGACY) &&
17708 mlx5_flow_ext_mreg_supported(dev))
17709 return -rte_mtr_error_set(error,
17711 RTE_MTR_ERROR_TYPE_METER_POLICY,
17712 NULL, "Queue action with meta "
17713 "is not supported. Please try use "
17714 "default policy for meter.");
17715 ret = mlx5_flow_validate_action_queue(act,
17716 action_flags[i], dev,
17719 return -rte_mtr_error_set(error,
17721 RTE_MTR_ERROR_TYPE_METER_POLICY,
17722 NULL, flow_err.message ?
17724 "Queue action validate check fail");
17725 action_flags[i] |= MLX5_FLOW_ACTION_QUEUE;
17728 case RTE_FLOW_ACTION_TYPE_RSS:
17729 if (dev_conf->dv_flow_en &&
17730 (dev_conf->dv_xmeta_en !=
17731 MLX5_XMETA_MODE_LEGACY) &&
17732 mlx5_flow_ext_mreg_supported(dev))
17733 return -rte_mtr_error_set(error,
17735 RTE_MTR_ERROR_TYPE_METER_POLICY,
17736 NULL, "RSS action with meta "
17737 "is not supported. Please try use "
17738 "default policy for meter.");
17739 ret = mlx5_validate_action_rss(dev, act,
17742 return -rte_mtr_error_set(error,
17744 RTE_MTR_ERROR_TYPE_METER_POLICY,
17745 NULL, flow_err.message ?
17747 "RSS action validate check fail");
17748 action_flags[i] |= MLX5_FLOW_ACTION_RSS;
17750 /* Either G or Y will set the RSS. */
17751 rss_color[i] = act->conf;
17753 case RTE_FLOW_ACTION_TYPE_JUMP:
17754 ret = flow_dv_validate_action_jump(dev,
17755 NULL, act, action_flags[i],
17756 attr, true, &flow_err);
17758 return -rte_mtr_error_set(error,
17760 RTE_MTR_ERROR_TYPE_METER_POLICY,
17761 NULL, flow_err.message ?
17763 "Jump action validate check fail");
17765 action_flags[i] |= MLX5_FLOW_ACTION_JUMP;
17768 * Only the last meter in the hierarchy will support
17769 * the YELLOW color steering. Then in the meter policy
17770 * actions list, there should be no other meter inside.
17772 case RTE_FLOW_ACTION_TYPE_METER:
17773 if (i != RTE_COLOR_GREEN)
17774 return -rte_mtr_error_set(error,
17776 RTE_MTR_ERROR_TYPE_METER_POLICY,
17778 "Meter hierarchy only supports GREEN color.");
17779 if (*policy_mode != MLX5_MTR_POLICY_MODE_OG)
17780 return -rte_mtr_error_set(error,
17782 RTE_MTR_ERROR_TYPE_METER_POLICY,
17784 "No yellow policy should be provided in meter hierarchy.");
17786 ret = flow_dv_validate_policy_mtr_hierarchy(dev,
17796 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
17799 return -rte_mtr_error_set(error, ENOTSUP,
17800 RTE_MTR_ERROR_TYPE_METER_POLICY,
17802 "Doesn't support optional action");
17805 if (action_flags[i] & MLX5_FLOW_ACTION_PORT_ID)
17806 domain_color[i] = MLX5_MTR_DOMAIN_TRANSFER_BIT;
17807 else if ((action_flags[i] &
17808 (MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_QUEUE)) ||
17809 (action_flags[i] & MLX5_FLOW_ACTION_MARK))
17811 * Only support MLX5_XMETA_MODE_LEGACY
17812 * so MARK action is only in ingress domain.
17814 domain_color[i] = MLX5_MTR_DOMAIN_INGRESS_BIT;
17815 else if (action_flags[i] &
17816 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
17817 domain_color[i] = hierarchy_domain;
17819 domain_color[i] = def_domain;
17821 * Non-termination actions only support NIC Tx domain.
17822 * The adjustion should be skipped when there is no
17823 * action or only END is provided. The default domains
17824 * bit-mask is set to find the MIN intersection.
17825 * The action flags checking should also be skipped.
17827 if ((def_green && i == RTE_COLOR_GREEN) ||
17828 (def_yellow && i == RTE_COLOR_YELLOW))
17831 * Validate the drop action mutual exclusion
17832 * with other actions. Drop action is mutually-exclusive
17833 * with any other action, except for Count action.
17835 if ((action_flags[i] & MLX5_FLOW_ACTION_DROP) &&
17836 (action_flags[i] & ~MLX5_FLOW_ACTION_DROP)) {
17837 return -rte_mtr_error_set(error, ENOTSUP,
17838 RTE_MTR_ERROR_TYPE_METER_POLICY,
17839 NULL, "Drop action is mutually-exclusive "
17840 "with any other action");
17842 /* Eswitch has few restrictions on using items and actions */
17843 if (domain_color[i] & MLX5_MTR_DOMAIN_TRANSFER_BIT) {
17844 if (!mlx5_flow_ext_mreg_supported(dev) &&
17845 action_flags[i] & MLX5_FLOW_ACTION_MARK)
17846 return -rte_mtr_error_set(error, ENOTSUP,
17847 RTE_MTR_ERROR_TYPE_METER_POLICY,
17848 NULL, "unsupported action MARK");
17849 if (action_flags[i] & MLX5_FLOW_ACTION_QUEUE)
17850 return -rte_mtr_error_set(error, ENOTSUP,
17851 RTE_MTR_ERROR_TYPE_METER_POLICY,
17852 NULL, "unsupported action QUEUE");
17853 if (action_flags[i] & MLX5_FLOW_ACTION_RSS)
17854 return -rte_mtr_error_set(error, ENOTSUP,
17855 RTE_MTR_ERROR_TYPE_METER_POLICY,
17856 NULL, "unsupported action RSS");
17857 if (!(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17858 return -rte_mtr_error_set(error, ENOTSUP,
17859 RTE_MTR_ERROR_TYPE_METER_POLICY,
17860 NULL, "no fate action is found");
17862 if (!(action_flags[i] & MLX5_FLOW_FATE_ACTIONS) &&
17863 (domain_color[i] & MLX5_MTR_DOMAIN_INGRESS_BIT)) {
17864 if ((domain_color[i] &
17865 MLX5_MTR_DOMAIN_EGRESS_BIT))
17867 MLX5_MTR_DOMAIN_EGRESS_BIT;
17869 return -rte_mtr_error_set(error,
17871 RTE_MTR_ERROR_TYPE_METER_POLICY,
17873 "no fate action is found");
17877 /* If both colors have RSS, the attributes should be the same. */
17878 if (flow_dv_mtr_policy_rss_compare(rss_color[RTE_COLOR_GREEN],
17879 rss_color[RTE_COLOR_YELLOW]))
17880 return -rte_mtr_error_set(error, EINVAL,
17881 RTE_MTR_ERROR_TYPE_METER_POLICY,
17882 NULL, "policy RSS attr conflict");
17883 if (rss_color[RTE_COLOR_GREEN] || rss_color[RTE_COLOR_YELLOW])
17885 /* "domain_color[C]" is non-zero for each color, default is ALL. */
17886 if (!def_green && !def_yellow &&
17887 domain_color[RTE_COLOR_GREEN] != domain_color[RTE_COLOR_YELLOW] &&
17888 !(action_flags[RTE_COLOR_GREEN] & MLX5_FLOW_ACTION_DROP) &&
17889 !(action_flags[RTE_COLOR_YELLOW] & MLX5_FLOW_ACTION_DROP))
17890 return -rte_mtr_error_set(error, EINVAL,
17891 RTE_MTR_ERROR_TYPE_METER_POLICY,
17892 NULL, "policy domains conflict");
17894 * At least one color policy is listed in the actions, the domains
17895 * to be supported should be the intersection.
17897 *domain_bitmap = domain_color[RTE_COLOR_GREEN] &
17898 domain_color[RTE_COLOR_YELLOW];
17903 flow_dv_sync_domain(struct rte_eth_dev *dev, uint32_t domains, uint32_t flags)
17905 struct mlx5_priv *priv = dev->data->dev_private;
17908 if ((domains & MLX5_DOMAIN_BIT_NIC_RX) && priv->sh->rx_domain != NULL) {
17909 ret = mlx5_os_flow_dr_sync_domain(priv->sh->rx_domain,
17914 if ((domains & MLX5_DOMAIN_BIT_NIC_TX) && priv->sh->tx_domain != NULL) {
17915 ret = mlx5_os_flow_dr_sync_domain(priv->sh->tx_domain, flags);
17919 if ((domains & MLX5_DOMAIN_BIT_FDB) && priv->sh->fdb_domain != NULL) {
17920 ret = mlx5_os_flow_dr_sync_domain(priv->sh->fdb_domain, flags);
17927 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
17928 .validate = flow_dv_validate,
17929 .prepare = flow_dv_prepare,
17930 .translate = flow_dv_translate,
17931 .apply = flow_dv_apply,
17932 .remove = flow_dv_remove,
17933 .destroy = flow_dv_destroy,
17934 .query = flow_dv_query,
17935 .create_mtr_tbls = flow_dv_create_mtr_tbls,
17936 .destroy_mtr_tbls = flow_dv_destroy_mtr_tbls,
17937 .destroy_mtr_drop_tbls = flow_dv_destroy_mtr_drop_tbls,
17938 .create_meter = flow_dv_mtr_alloc,
17939 .free_meter = flow_dv_aso_mtr_release_to_pool,
17940 .validate_mtr_acts = flow_dv_validate_mtr_policy_acts,
17941 .create_mtr_acts = flow_dv_create_mtr_policy_acts,
17942 .destroy_mtr_acts = flow_dv_destroy_mtr_policy_acts,
17943 .create_policy_rules = flow_dv_create_policy_rules,
17944 .destroy_policy_rules = flow_dv_destroy_policy_rules,
17945 .create_def_policy = flow_dv_create_def_policy,
17946 .destroy_def_policy = flow_dv_destroy_def_policy,
17947 .meter_sub_policy_rss_prepare = flow_dv_meter_sub_policy_rss_prepare,
17948 .meter_hierarchy_rule_create = flow_dv_meter_hierarchy_rule_create,
17949 .destroy_sub_policy_with_rxq = flow_dv_destroy_sub_policy_with_rxq,
17950 .counter_alloc = flow_dv_counter_allocate,
17951 .counter_free = flow_dv_counter_free,
17952 .counter_query = flow_dv_counter_query,
17953 .get_aged_flows = flow_dv_get_aged_flows,
17954 .action_validate = flow_dv_action_validate,
17955 .action_create = flow_dv_action_create,
17956 .action_destroy = flow_dv_action_destroy,
17957 .action_update = flow_dv_action_update,
17958 .action_query = flow_dv_action_query,
17959 .sync_domain = flow_dv_sync_domain,
17962 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */