drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 #include <rte_common.h>
  12 #include <rte_ether.h>
  13 #include <rte_ethdev_driver.h>
  14 #include <rte_flow.h>
  15 #include <rte_flow_driver.h>
  16 #include <rte_malloc.h>
  17 #include <rte_cycles.h>
  18 #include <rte_ip.h>
  19 #include <rte_gre.h>
  20 #include <rte_vxlan.h>
  21 #include <rte_gtp.h>
  22 #include <rte_eal_paging.h>
  23 #include <rte_mpls.h>
  24
  25 #include <mlx5_glue.h>
  26 #include <mlx5_devx_cmds.h>
  27 #include <mlx5_prm.h>
  28 #include <mlx5_malloc.h>
  29
  30 #include "mlx5_defs.h"
  31 #include "mlx5.h"
  32 #include "mlx5_common_os.h"
  33 #include "mlx5_flow.h"
  34 #include "mlx5_flow_os.h"
  35 #include "mlx5_rxtx.h"
  36 #include "rte_pmd_mlx5.h"
  37
  38 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  39
  40 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  41 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  42 #endif
  43
  44 #ifndef HAVE_MLX5DV_DR_ESWITCH
  45 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  46 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  47 #endif
  48 #endif
  49
  50 #ifndef HAVE_MLX5DV_DR
  51 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  52 #endif
  53
  54 /* VLAN header definitions */
  55 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  56 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  57 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  58 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  59 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  60
  61 union flow_dv_attr {
  62         struct {
  63                 uint32_t valid:1;
  64                 uint32_t ipv4:1;
  65                 uint32_t ipv6:1;
  66                 uint32_t tcp:1;
  67                 uint32_t udp:1;
  68                 uint32_t reserved:27;
  69         };
  70         uint32_t attr;
  71 };
  72
  73 static int
  74 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
  75                              struct mlx5_flow_tbl_resource *tbl);
  76
  77 static int
  78 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
  79                                       uint32_t encap_decap_idx);
  80
  81 static int
  82 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
  83                                         uint32_t port_id);
  84
  85 /**
  86  * Initialize flow attributes structure according to flow items' types.
  87  *
  88  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
  89  * mode. For tunnel mode, the items to be modified are the outermost ones.
  90  *
  91  * @param[in] item
  92  *   Pointer to item specification.
  93  * @param[out] attr
  94  *   Pointer to flow attributes structure.
  95  * @param[in] dev_flow
  96  *   Pointer to the sub flow.
  97  * @param[in] tunnel_decap
  98  *   Whether action is after tunnel decapsulation.
  99  */
 100 static void
 101 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
 102                   struct mlx5_flow *dev_flow, bool tunnel_decap)
 103 {
 104         uint64_t layers = dev_flow->handle->layers;
 105
 106         /*
 107          * If layers is already initialized, it means this dev_flow is the
 108          * suffix flow, the layers flags is set by the prefix flow. Need to
 109          * use the layer flags from prefix flow as the suffix flow may not
 110          * have the user defined items as the flow is split.
 111          */
 112         if (layers) {
 113                 if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
 114                         attr->ipv4 = 1;
 115                 else if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
 116                         attr->ipv6 = 1;
 117                 if (layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
 118                         attr->tcp = 1;
 119                 else if (layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
 120                         attr->udp = 1;
 121                 attr->valid = 1;
 122                 return;
 123         }
 124         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 125                 uint8_t next_protocol = 0xff;
 126                 switch (item->type) {
 127                 case RTE_FLOW_ITEM_TYPE_GRE:
 128                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 129                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 130                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 131                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 132                 case RTE_FLOW_ITEM_TYPE_MPLS:
 133                         if (tunnel_decap)
 134                                 attr->attr = 0;
 135                         break;
 136                 case RTE_FLOW_ITEM_TYPE_IPV4:
 137                         if (!attr->ipv6)
 138                                 attr->ipv4 = 1;
 139                         if (item->mask != NULL &&
 140                             ((const struct rte_flow_item_ipv4 *)
 141                             item->mask)->hdr.next_proto_id)
 142                                 next_protocol =
 143                                     ((const struct rte_flow_item_ipv4 *)
 144                                       (item->spec))->hdr.next_proto_id &
 145                                     ((const struct rte_flow_item_ipv4 *)
 146                                       (item->mask))->hdr.next_proto_id;
 147                         if ((next_protocol == IPPROTO_IPIP ||
 148                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 149                                 attr->attr = 0;
 150                         break;
 151                 case RTE_FLOW_ITEM_TYPE_IPV6:
 152                         if (!attr->ipv4)
 153                                 attr->ipv6 = 1;
 154                         if (item->mask != NULL &&
 155                             ((const struct rte_flow_item_ipv6 *)
 156                             item->mask)->hdr.proto)
 157                                 next_protocol =
 158                                     ((const struct rte_flow_item_ipv6 *)
 159                                       (item->spec))->hdr.proto &
 160                                     ((const struct rte_flow_item_ipv6 *)
 161                                       (item->mask))->hdr.proto;
 162                         if ((next_protocol == IPPROTO_IPIP ||
 163                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 164                                 attr->attr = 0;
 165                         break;
 166                 case RTE_FLOW_ITEM_TYPE_UDP:
 167                         if (!attr->tcp)
 168                                 attr->udp = 1;
 169                         break;
 170                 case RTE_FLOW_ITEM_TYPE_TCP:
 171                         if (!attr->udp)
 172                                 attr->tcp = 1;
 173                         break;
 174                 default:
 175                         break;
 176                 }
 177         }
 178         attr->valid = 1;
 179 }
 180
 181 /**
 182  * Convert rte_mtr_color to mlx5 color.
 183  *
 184  * @param[in] rcol
 185  *   rte_mtr_color.
 186  *
 187  * @return
 188  *   mlx5 color.
 189  */
 190 static int
 191 rte_col_2_mlx5_col(enum rte_color rcol)
 192 {
 193         switch (rcol) {
 194         case RTE_COLOR_GREEN:
 195                 return MLX5_FLOW_COLOR_GREEN;
 196         case RTE_COLOR_YELLOW:
 197                 return MLX5_FLOW_COLOR_YELLOW;
 198         case RTE_COLOR_RED:
 199                 return MLX5_FLOW_COLOR_RED;
 200         default:
 201                 break;
 202         }
 203         return MLX5_FLOW_COLOR_UNDEFINED;
 204 }
 205
 206 struct field_modify_info {
 207         uint32_t size; /* Size of field in protocol header, in bytes. */
 208         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 209         enum mlx5_modification_field id;
 210 };
 211
 212 struct field_modify_info modify_eth[] = {
 213         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 214         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 215         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 216         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 217         {0, 0, 0},
 218 };
 219
 220 struct field_modify_info modify_vlan_out_first_vid[] = {
 221         /* Size in bits !!! */
 222         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 223         {0, 0, 0},
 224 };
 225
 226 struct field_modify_info modify_ipv4[] = {
 227         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 228         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 229         {4, 12, MLX5_MODI_OUT_SIPV4},
 230         {4, 16, MLX5_MODI_OUT_DIPV4},
 231         {0, 0, 0},
 232 };
 233
 234 struct field_modify_info modify_ipv6[] = {
 235         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 236         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 237         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 238         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 239         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 240         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 241         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 242         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 243         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 244         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 245         {0, 0, 0},
 246 };
 247
 248 struct field_modify_info modify_udp[] = {
 249         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 250         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 251         {0, 0, 0},
 252 };
 253
 254 struct field_modify_info modify_tcp[] = {
 255         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 256         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 257         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 258         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 259         {0, 0, 0},
 260 };
 261
 262 static void
 263 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 264                           uint8_t next_protocol, uint64_t *item_flags,
 265                           int *tunnel)
 266 {
 267         MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 268                     item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 269         if (next_protocol == IPPROTO_IPIP) {
 270                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 271                 *tunnel = 1;
 272         }
 273         if (next_protocol == IPPROTO_IPV6) {
 274                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 275                 *tunnel = 1;
 276         }
 277 }
 278
 279 /* Update VLAN's VID/PCP based on input rte_flow_action.
 280  *
 281  * @param[in] action
 282  *   Pointer to struct rte_flow_action.
 283  * @param[out] vlan
 284  *   Pointer to struct rte_vlan_hdr.
 285  */
 286 static void
 287 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 288                          struct rte_vlan_hdr *vlan)
 289 {
 290         uint16_t vlan_tci;
 291         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 292                 vlan_tci =
 293                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 294                                                action->conf)->vlan_pcp;
 295                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 296                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 297                 vlan->vlan_tci |= vlan_tci;
 298         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 299                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 300                 vlan->vlan_tci |= rte_be_to_cpu_16
 301                     (((const struct rte_flow_action_of_set_vlan_vid *)
 302                                              action->conf)->vlan_vid);
 303         }
 304 }
 305
 306 /**
 307  * Fetch 1, 2, 3 or 4 byte field from the byte array
 308  * and return as unsigned integer in host-endian format.
 309  *
 310  * @param[in] data
 311  *   Pointer to data array.
 312  * @param[in] size
 313  *   Size of field to extract.
 314  *
 315  * @return
 316  *   converted field in host endian format.
 317  */
 318 static inline uint32_t
 319 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 320 {
 321         uint32_t ret;
 322
 323         switch (size) {
 324         case 1:
 325                 ret = *data;
 326                 break;
 327         case 2:
 328                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 329                 break;
 330         case 3:
 331                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 332                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 333                 break;
 334         case 4:
 335                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 336                 break;
 337         default:
 338                 MLX5_ASSERT(false);
 339                 ret = 0;
 340                 break;
 341         }
 342         return ret;
 343 }
 344
 345 /**
 346  * Convert modify-header action to DV specification.
 347  *
 348  * Data length of each action is determined by provided field description
 349  * and the item mask. Data bit offset and width of each action is determined
 350  * by provided item mask.
 351  *
 352  * @param[in] item
 353  *   Pointer to item specification.
 354  * @param[in] field
 355  *   Pointer to field modification information.
 356  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 357  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 358  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 359  * @param[in] dcopy
 360  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 361  *   Negative offset value sets the same offset as source offset.
 362  *   size field is ignored, value is taken from source field.
 363  * @param[in,out] resource
 364  *   Pointer to the modify-header resource.
 365  * @param[in] type
 366  *   Type of modification.
 367  * @param[out] error
 368  *   Pointer to the error structure.
 369  *
 370  * @return
 371  *   0 on success, a negative errno value otherwise and rte_errno is set.
 372  */
 373 static int
 374 flow_dv_convert_modify_action(struct rte_flow_item *item,
 375                               struct field_modify_info *field,
 376                               struct field_modify_info *dcopy,
 377                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 378                               uint32_t type, struct rte_flow_error *error)
 379 {
 380         uint32_t i = resource->actions_num;
 381         struct mlx5_modification_cmd *actions = resource->actions;
 382
 383         /*
 384          * The item and mask are provided in big-endian format.
 385          * The fields should be presented as in big-endian format either.
 386          * Mask must be always present, it defines the actual field width.
 387          */
 388         MLX5_ASSERT(item->mask);
 389         MLX5_ASSERT(field->size);
 390         do {
 391                 unsigned int size_b;
 392                 unsigned int off_b;
 393                 uint32_t mask;
 394                 uint32_t data;
 395
 396                 if (i >= MLX5_MAX_MODIFY_NUM)
 397                         return rte_flow_error_set(error, EINVAL,
 398                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 399                                  "too many items to modify");
 400                 /* Fetch variable byte size mask from the array. */
 401                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 402                                            field->offset, field->size);
 403                 if (!mask) {
 404                         ++field;
 405                         continue;
 406                 }
 407                 /* Deduce actual data width in bits from mask value. */
 408                 off_b = rte_bsf32(mask);
 409                 size_b = sizeof(uint32_t) * CHAR_BIT -
 410                          off_b - __builtin_clz(mask);
 411                 MLX5_ASSERT(size_b);
 412                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 413                 actions[i] = (struct mlx5_modification_cmd) {
 414                         .action_type = type,
 415                         .field = field->id,
 416                         .offset = off_b,
 417                         .length = size_b,
 418                 };
 419                 /* Convert entire record to expected big-endian format. */
 420                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 421                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 422                         MLX5_ASSERT(dcopy);
 423                         actions[i].dst_field = dcopy->id;
 424                         actions[i].dst_offset =
 425                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 426                         /* Convert entire record to big-endian format. */
 427                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 428                 } else {
 429                         MLX5_ASSERT(item->spec);
 430                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 431                                                    field->offset, field->size);
 432                         /* Shift out the trailing masked bits from data. */
 433                         data = (data & mask) >> off_b;
 434                         actions[i].data1 = rte_cpu_to_be_32(data);
 435                 }
 436                 ++i;
 437                 ++field;
 438         } while (field->size);
 439         if (resource->actions_num == i)
 440                 return rte_flow_error_set(error, EINVAL,
 441                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 442                                           "invalid modification flow item");
 443         resource->actions_num = i;
 444         return 0;
 445 }
 446
 447 /**
 448  * Convert modify-header set IPv4 address action to DV specification.
 449  *
 450  * @param[in,out] resource
 451  *   Pointer to the modify-header resource.
 452  * @param[in] action
 453  *   Pointer to action specification.
 454  * @param[out] error
 455  *   Pointer to the error structure.
 456  *
 457  * @return
 458  *   0 on success, a negative errno value otherwise and rte_errno is set.
 459  */
 460 static int
 461 flow_dv_convert_action_modify_ipv4
 462                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 463                          const struct rte_flow_action *action,
 464                          struct rte_flow_error *error)
 465 {
 466         const struct rte_flow_action_set_ipv4 *conf =
 467                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 468         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 469         struct rte_flow_item_ipv4 ipv4;
 470         struct rte_flow_item_ipv4 ipv4_mask;
 471
 472         memset(&ipv4, 0, sizeof(ipv4));
 473         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 474         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 475                 ipv4.hdr.src_addr = conf->ipv4_addr;
 476                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 477         } else {
 478                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 479                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 480         }
 481         item.spec = &ipv4;
 482         item.mask = &ipv4_mask;
 483         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 484                                              MLX5_MODIFICATION_TYPE_SET, error);
 485 }
 486
 487 /**
 488  * Convert modify-header set IPv6 address action to DV specification.
 489  *
 490  * @param[in,out] resource
 491  *   Pointer to the modify-header resource.
 492  * @param[in] action
 493  *   Pointer to action specification.
 494  * @param[out] error
 495  *   Pointer to the error structure.
 496  *
 497  * @return
 498  *   0 on success, a negative errno value otherwise and rte_errno is set.
 499  */
 500 static int
 501 flow_dv_convert_action_modify_ipv6
 502                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 503                          const struct rte_flow_action *action,
 504                          struct rte_flow_error *error)
 505 {
 506         const struct rte_flow_action_set_ipv6 *conf =
 507                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 508         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 509         struct rte_flow_item_ipv6 ipv6;
 510         struct rte_flow_item_ipv6 ipv6_mask;
 511
 512         memset(&ipv6, 0, sizeof(ipv6));
 513         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 514         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 515                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 516                        sizeof(ipv6.hdr.src_addr));
 517                 memcpy(&ipv6_mask.hdr.src_addr,
 518                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 519                        sizeof(ipv6.hdr.src_addr));
 520         } else {
 521                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 522                        sizeof(ipv6.hdr.dst_addr));
 523                 memcpy(&ipv6_mask.hdr.dst_addr,
 524                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 525                        sizeof(ipv6.hdr.dst_addr));
 526         }
 527         item.spec = &ipv6;
 528         item.mask = &ipv6_mask;
 529         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 530                                              MLX5_MODIFICATION_TYPE_SET, error);
 531 }
 532
 533 /**
 534  * Convert modify-header set MAC address action to DV specification.
 535  *
 536  * @param[in,out] resource
 537  *   Pointer to the modify-header resource.
 538  * @param[in] action
 539  *   Pointer to action specification.
 540  * @param[out] error
 541  *   Pointer to the error structure.
 542  *
 543  * @return
 544  *   0 on success, a negative errno value otherwise and rte_errno is set.
 545  */
 546 static int
 547 flow_dv_convert_action_modify_mac
 548                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 549                          const struct rte_flow_action *action,
 550                          struct rte_flow_error *error)
 551 {
 552         const struct rte_flow_action_set_mac *conf =
 553                 (const struct rte_flow_action_set_mac *)(action->conf);
 554         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 555         struct rte_flow_item_eth eth;
 556         struct rte_flow_item_eth eth_mask;
 557
 558         memset(&eth, 0, sizeof(eth));
 559         memset(&eth_mask, 0, sizeof(eth_mask));
 560         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 561                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 562                        sizeof(eth.src.addr_bytes));
 563                 memcpy(&eth_mask.src.addr_bytes,
 564                        &rte_flow_item_eth_mask.src.addr_bytes,
 565                        sizeof(eth_mask.src.addr_bytes));
 566         } else {
 567                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 568                        sizeof(eth.dst.addr_bytes));
 569                 memcpy(&eth_mask.dst.addr_bytes,
 570                        &rte_flow_item_eth_mask.dst.addr_bytes,
 571                        sizeof(eth_mask.dst.addr_bytes));
 572         }
 573         item.spec = &eth;
 574         item.mask = &eth_mask;
 575         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 576                                              MLX5_MODIFICATION_TYPE_SET, error);
 577 }
 578
 579 /**
 580  * Convert modify-header set VLAN VID action to DV specification.
 581  *
 582  * @param[in,out] resource
 583  *   Pointer to the modify-header resource.
 584  * @param[in] action
 585  *   Pointer to action specification.
 586  * @param[out] error
 587  *   Pointer to the error structure.
 588  *
 589  * @return
 590  *   0 on success, a negative errno value otherwise and rte_errno is set.
 591  */
 592 static int
 593 flow_dv_convert_action_modify_vlan_vid
 594                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 595                          const struct rte_flow_action *action,
 596                          struct rte_flow_error *error)
 597 {
 598         const struct rte_flow_action_of_set_vlan_vid *conf =
 599                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 600         int i = resource->actions_num;
 601         struct mlx5_modification_cmd *actions = resource->actions;
 602         struct field_modify_info *field = modify_vlan_out_first_vid;
 603
 604         if (i >= MLX5_MAX_MODIFY_NUM)
 605                 return rte_flow_error_set(error, EINVAL,
 606                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 607                          "too many items to modify");
 608         actions[i] = (struct mlx5_modification_cmd) {
 609                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 610                 .field = field->id,
 611                 .length = field->size,
 612                 .offset = field->offset,
 613         };
 614         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 615         actions[i].data1 = conf->vlan_vid;
 616         actions[i].data1 = actions[i].data1 << 16;
 617         resource->actions_num = ++i;
 618         return 0;
 619 }
 620
 621 /**
 622  * Convert modify-header set TP action to DV specification.
 623  *
 624  * @param[in,out] resource
 625  *   Pointer to the modify-header resource.
 626  * @param[in] action
 627  *   Pointer to action specification.
 628  * @param[in] items
 629  *   Pointer to rte_flow_item objects list.
 630  * @param[in] attr
 631  *   Pointer to flow attributes structure.
 632  * @param[in] dev_flow
 633  *   Pointer to the sub flow.
 634  * @param[in] tunnel_decap
 635  *   Whether action is after tunnel decapsulation.
 636  * @param[out] error
 637  *   Pointer to the error structure.
 638  *
 639  * @return
 640  *   0 on success, a negative errno value otherwise and rte_errno is set.
 641  */
 642 static int
 643 flow_dv_convert_action_modify_tp
 644                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 645                          const struct rte_flow_action *action,
 646                          const struct rte_flow_item *items,
 647                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 648                          bool tunnel_decap, struct rte_flow_error *error)
 649 {
 650         const struct rte_flow_action_set_tp *conf =
 651                 (const struct rte_flow_action_set_tp *)(action->conf);
 652         struct rte_flow_item item;
 653         struct rte_flow_item_udp udp;
 654         struct rte_flow_item_udp udp_mask;
 655         struct rte_flow_item_tcp tcp;
 656         struct rte_flow_item_tcp tcp_mask;
 657         struct field_modify_info *field;
 658
 659         if (!attr->valid)
 660                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 661         if (attr->udp) {
 662                 memset(&udp, 0, sizeof(udp));
 663                 memset(&udp_mask, 0, sizeof(udp_mask));
 664                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 665                         udp.hdr.src_port = conf->port;
 666                         udp_mask.hdr.src_port =
 667                                         rte_flow_item_udp_mask.hdr.src_port;
 668                 } else {
 669                         udp.hdr.dst_port = conf->port;
 670                         udp_mask.hdr.dst_port =
 671                                         rte_flow_item_udp_mask.hdr.dst_port;
 672                 }
 673                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 674                 item.spec = &udp;
 675                 item.mask = &udp_mask;
 676                 field = modify_udp;
 677         } else {
 678                 MLX5_ASSERT(attr->tcp);
 679                 memset(&tcp, 0, sizeof(tcp));
 680                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 681                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 682                         tcp.hdr.src_port = conf->port;
 683                         tcp_mask.hdr.src_port =
 684                                         rte_flow_item_tcp_mask.hdr.src_port;
 685                 } else {
 686                         tcp.hdr.dst_port = conf->port;
 687                         tcp_mask.hdr.dst_port =
 688                                         rte_flow_item_tcp_mask.hdr.dst_port;
 689                 }
 690                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 691                 item.spec = &tcp;
 692                 item.mask = &tcp_mask;
 693                 field = modify_tcp;
 694         }
 695         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 696                                              MLX5_MODIFICATION_TYPE_SET, error);
 697 }
 698
 699 /**
 700  * Convert modify-header set TTL action to DV specification.
 701  *
 702  * @param[in,out] resource
 703  *   Pointer to the modify-header resource.
 704  * @param[in] action
 705  *   Pointer to action specification.
 706  * @param[in] items
 707  *   Pointer to rte_flow_item objects list.
 708  * @param[in] attr
 709  *   Pointer to flow attributes structure.
 710  * @param[in] dev_flow
 711  *   Pointer to the sub flow.
 712  * @param[in] tunnel_decap
 713  *   Whether action is after tunnel decapsulation.
 714  * @param[out] error
 715  *   Pointer to the error structure.
 716  *
 717  * @return
 718  *   0 on success, a negative errno value otherwise and rte_errno is set.
 719  */
 720 static int
 721 flow_dv_convert_action_modify_ttl
 722                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 723                          const struct rte_flow_action *action,
 724                          const struct rte_flow_item *items,
 725                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 726                          bool tunnel_decap, struct rte_flow_error *error)
 727 {
 728         const struct rte_flow_action_set_ttl *conf =
 729                 (const struct rte_flow_action_set_ttl *)(action->conf);
 730         struct rte_flow_item item;
 731         struct rte_flow_item_ipv4 ipv4;
 732         struct rte_flow_item_ipv4 ipv4_mask;
 733         struct rte_flow_item_ipv6 ipv6;
 734         struct rte_flow_item_ipv6 ipv6_mask;
 735         struct field_modify_info *field;
 736
 737         if (!attr->valid)
 738                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 739         if (attr->ipv4) {
 740                 memset(&ipv4, 0, sizeof(ipv4));
 741                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 742                 ipv4.hdr.time_to_live = conf->ttl_value;
 743                 ipv4_mask.hdr.time_to_live = 0xFF;
 744                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 745                 item.spec = &ipv4;
 746                 item.mask = &ipv4_mask;
 747                 field = modify_ipv4;
 748         } else {
 749                 MLX5_ASSERT(attr->ipv6);
 750                 memset(&ipv6, 0, sizeof(ipv6));
 751                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 752                 ipv6.hdr.hop_limits = conf->ttl_value;
 753                 ipv6_mask.hdr.hop_limits = 0xFF;
 754                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 755                 item.spec = &ipv6;
 756                 item.mask = &ipv6_mask;
 757                 field = modify_ipv6;
 758         }
 759         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 760                                              MLX5_MODIFICATION_TYPE_SET, error);
 761 }
 762
 763 /**
 764  * Convert modify-header decrement TTL action to DV specification.
 765  *
 766  * @param[in,out] resource
 767  *   Pointer to the modify-header resource.
 768  * @param[in] action
 769  *   Pointer to action specification.
 770  * @param[in] items
 771  *   Pointer to rte_flow_item objects list.
 772  * @param[in] attr
 773  *   Pointer to flow attributes structure.
 774  * @param[in] dev_flow
 775  *   Pointer to the sub flow.
 776  * @param[in] tunnel_decap
 777  *   Whether action is after tunnel decapsulation.
 778  * @param[out] error
 779  *   Pointer to the error structure.
 780  *
 781  * @return
 782  *   0 on success, a negative errno value otherwise and rte_errno is set.
 783  */
 784 static int
 785 flow_dv_convert_action_modify_dec_ttl
 786                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 787                          const struct rte_flow_item *items,
 788                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 789                          bool tunnel_decap, struct rte_flow_error *error)
 790 {
 791         struct rte_flow_item item;
 792         struct rte_flow_item_ipv4 ipv4;
 793         struct rte_flow_item_ipv4 ipv4_mask;
 794         struct rte_flow_item_ipv6 ipv6;
 795         struct rte_flow_item_ipv6 ipv6_mask;
 796         struct field_modify_info *field;
 797
 798         if (!attr->valid)
 799                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 800         if (attr->ipv4) {
 801                 memset(&ipv4, 0, sizeof(ipv4));
 802                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 803                 ipv4.hdr.time_to_live = 0xFF;
 804                 ipv4_mask.hdr.time_to_live = 0xFF;
 805                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 806                 item.spec = &ipv4;
 807                 item.mask = &ipv4_mask;
 808                 field = modify_ipv4;
 809         } else {
 810                 MLX5_ASSERT(attr->ipv6);
 811                 memset(&ipv6, 0, sizeof(ipv6));
 812                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 813                 ipv6.hdr.hop_limits = 0xFF;
 814                 ipv6_mask.hdr.hop_limits = 0xFF;
 815                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 816                 item.spec = &ipv6;
 817                 item.mask = &ipv6_mask;
 818                 field = modify_ipv6;
 819         }
 820         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 821                                              MLX5_MODIFICATION_TYPE_ADD, error);
 822 }
 823
 824 /**
 825  * Convert modify-header increment/decrement TCP Sequence number
 826  * to DV specification.
 827  *
 828  * @param[in,out] resource
 829  *   Pointer to the modify-header resource.
 830  * @param[in] action
 831  *   Pointer to action specification.
 832  * @param[out] error
 833  *   Pointer to the error structure.
 834  *
 835  * @return
 836  *   0 on success, a negative errno value otherwise and rte_errno is set.
 837  */
 838 static int
 839 flow_dv_convert_action_modify_tcp_seq
 840                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 841                          const struct rte_flow_action *action,
 842                          struct rte_flow_error *error)
 843 {
 844         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 845         uint64_t value = rte_be_to_cpu_32(*conf);
 846         struct rte_flow_item item;
 847         struct rte_flow_item_tcp tcp;
 848         struct rte_flow_item_tcp tcp_mask;
 849
 850         memset(&tcp, 0, sizeof(tcp));
 851         memset(&tcp_mask, 0, sizeof(tcp_mask));
 852         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 853                 /*
 854                  * The HW has no decrement operation, only increment operation.
 855                  * To simulate decrement X from Y using increment operation
 856                  * we need to add UINT32_MAX X times to Y.
 857                  * Each adding of UINT32_MAX decrements Y by 1.
 858                  */
 859                 value *= UINT32_MAX;
 860         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 861         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 862         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 863         item.spec = &tcp;
 864         item.mask = &tcp_mask;
 865         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 866                                              MLX5_MODIFICATION_TYPE_ADD, error);
 867 }
 868
 869 /**
 870  * Convert modify-header increment/decrement TCP Acknowledgment number
 871  * to DV specification.
 872  *
 873  * @param[in,out] resource
 874  *   Pointer to the modify-header resource.
 875  * @param[in] action
 876  *   Pointer to action specification.
 877  * @param[out] error
 878  *   Pointer to the error structure.
 879  *
 880  * @return
 881  *   0 on success, a negative errno value otherwise and rte_errno is set.
 882  */
 883 static int
 884 flow_dv_convert_action_modify_tcp_ack
 885                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 886                          const struct rte_flow_action *action,
 887                          struct rte_flow_error *error)
 888 {
 889         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 890         uint64_t value = rte_be_to_cpu_32(*conf);
 891         struct rte_flow_item item;
 892         struct rte_flow_item_tcp tcp;
 893         struct rte_flow_item_tcp tcp_mask;
 894
 895         memset(&tcp, 0, sizeof(tcp));
 896         memset(&tcp_mask, 0, sizeof(tcp_mask));
 897         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 898                 /*
 899                  * The HW has no decrement operation, only increment operation.
 900                  * To simulate decrement X from Y using increment operation
 901                  * we need to add UINT32_MAX X times to Y.
 902                  * Each adding of UINT32_MAX decrements Y by 1.
 903                  */
 904                 value *= UINT32_MAX;
 905         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 906         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 907         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 908         item.spec = &tcp;
 909         item.mask = &tcp_mask;
 910         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 911                                              MLX5_MODIFICATION_TYPE_ADD, error);
 912 }
 913
 914 static enum mlx5_modification_field reg_to_field[] = {
 915         [REG_NON] = MLX5_MODI_OUT_NONE,
 916         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 917         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 918         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 919         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 920         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 921         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 922         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 923         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 924         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 925         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 926 };
 927
 928 /**
 929  * Convert register set to DV specification.
 930  *
 931  * @param[in,out] resource
 932  *   Pointer to the modify-header resource.
 933  * @param[in] action
 934  *   Pointer to action specification.
 935  * @param[out] error
 936  *   Pointer to the error structure.
 937  *
 938  * @return
 939  *   0 on success, a negative errno value otherwise and rte_errno is set.
 940  */
 941 static int
 942 flow_dv_convert_action_set_reg
 943                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 944                          const struct rte_flow_action *action,
 945                          struct rte_flow_error *error)
 946 {
 947         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 948         struct mlx5_modification_cmd *actions = resource->actions;
 949         uint32_t i = resource->actions_num;
 950
 951         if (i >= MLX5_MAX_MODIFY_NUM)
 952                 return rte_flow_error_set(error, EINVAL,
 953                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 954                                           "too many items to modify");
 955         MLX5_ASSERT(conf->id != REG_NON);
 956         MLX5_ASSERT(conf->id < RTE_DIM(reg_to_field));
 957         actions[i] = (struct mlx5_modification_cmd) {
 958                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 959                 .field = reg_to_field[conf->id],
 960         };
 961         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 962         actions[i].data1 = rte_cpu_to_be_32(conf->data);
 963         ++i;
 964         resource->actions_num = i;
 965         return 0;
 966 }
 967
 968 /**
 969  * Convert SET_TAG action to DV specification.
 970  *
 971  * @param[in] dev
 972  *   Pointer to the rte_eth_dev structure.
 973  * @param[in,out] resource
 974  *   Pointer to the modify-header resource.
 975  * @param[in] conf
 976  *   Pointer to action specification.
 977  * @param[out] error
 978  *   Pointer to the error structure.
 979  *
 980  * @return
 981  *   0 on success, a negative errno value otherwise and rte_errno is set.
 982  */
 983 static int
 984 flow_dv_convert_action_set_tag
 985                         (struct rte_eth_dev *dev,
 986                          struct mlx5_flow_dv_modify_hdr_resource *resource,
 987                          const struct rte_flow_action_set_tag *conf,
 988                          struct rte_flow_error *error)
 989 {
 990         rte_be32_t data = rte_cpu_to_be_32(conf->data);
 991         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
 992         struct rte_flow_item item = {
 993                 .spec = &data,
 994                 .mask = &mask,
 995         };
 996         struct field_modify_info reg_c_x[] = {
 997                 [1] = {0, 0, 0},
 998         };
 999         enum mlx5_modification_field reg_type;
1000         int ret;
1001
1002         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1003         if (ret < 0)
1004                 return ret;
1005         MLX5_ASSERT(ret != REG_NON);
1006         MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1007         reg_type = reg_to_field[ret];
1008         MLX5_ASSERT(reg_type > 0);
1009         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1010         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1011                                              MLX5_MODIFICATION_TYPE_SET, error);
1012 }
1013
1014 /**
1015  * Convert internal COPY_REG action to DV specification.
1016  *
1017  * @param[in] dev
1018  *   Pointer to the rte_eth_dev structure.
1019  * @param[in,out] res
1020  *   Pointer to the modify-header resource.
1021  * @param[in] action
1022  *   Pointer to action specification.
1023  * @param[out] error
1024  *   Pointer to the error structure.
1025  *
1026  * @return
1027  *   0 on success, a negative errno value otherwise and rte_errno is set.
1028  */
1029 static int
1030 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1031                                  struct mlx5_flow_dv_modify_hdr_resource *res,
1032                                  const struct rte_flow_action *action,
1033                                  struct rte_flow_error *error)
1034 {
1035         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1036         rte_be32_t mask = RTE_BE32(UINT32_MAX);
1037         struct rte_flow_item item = {
1038                 .spec = NULL,
1039                 .mask = &mask,
1040         };
1041         struct field_modify_info reg_src[] = {
1042                 {4, 0, reg_to_field[conf->src]},
1043                 {0, 0, 0},
1044         };
1045         struct field_modify_info reg_dst = {
1046                 .offset = 0,
1047                 .id = reg_to_field[conf->dst],
1048         };
1049         /* Adjust reg_c[0] usage according to reported mask. */
1050         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1051                 struct mlx5_priv *priv = dev->data->dev_private;
1052                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1053
1054                 MLX5_ASSERT(reg_c0);
1055                 MLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1056                 if (conf->dst == REG_C_0) {
1057                         /* Copy to reg_c[0], within mask only. */
1058                         reg_dst.offset = rte_bsf32(reg_c0);
1059                         /*
1060                          * Mask is ignoring the enianness, because
1061                          * there is no conversion in datapath.
1062                          */
1063 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1064                         /* Copy from destination lower bits to reg_c[0]. */
1065                         mask = reg_c0 >> reg_dst.offset;
1066 #else
1067                         /* Copy from destination upper bits to reg_c[0]. */
1068                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1069                                           rte_fls_u32(reg_c0));
1070 #endif
1071                 } else {
1072                         mask = rte_cpu_to_be_32(reg_c0);
1073 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1074                         /* Copy from reg_c[0] to destination lower bits. */
1075                         reg_dst.offset = 0;
1076 #else
1077                         /* Copy from reg_c[0] to destination upper bits. */
1078                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1079                                          (rte_fls_u32(reg_c0) -
1080                                           rte_bsf32(reg_c0));
1081 #endif
1082                 }
1083         }
1084         return flow_dv_convert_modify_action(&item,
1085                                              reg_src, &reg_dst, res,
1086                                              MLX5_MODIFICATION_TYPE_COPY,
1087                                              error);
1088 }
1089
1090 /**
1091  * Convert MARK action to DV specification. This routine is used
1092  * in extensive metadata only and requires metadata register to be
1093  * handled. In legacy mode hardware tag resource is engaged.
1094  *
1095  * @param[in] dev
1096  *   Pointer to the rte_eth_dev structure.
1097  * @param[in] conf
1098  *   Pointer to MARK action specification.
1099  * @param[in,out] resource
1100  *   Pointer to the modify-header resource.
1101  * @param[out] error
1102  *   Pointer to the error structure.
1103  *
1104  * @return
1105  *   0 on success, a negative errno value otherwise and rte_errno is set.
1106  */
1107 static int
1108 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1109                             const struct rte_flow_action_mark *conf,
1110                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1111                             struct rte_flow_error *error)
1112 {
1113         struct mlx5_priv *priv = dev->data->dev_private;
1114         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1115                                            priv->sh->dv_mark_mask);
1116         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1117         struct rte_flow_item item = {
1118                 .spec = &data,
1119                 .mask = &mask,
1120         };
1121         struct field_modify_info reg_c_x[] = {
1122                 [1] = {0, 0, 0},
1123         };
1124         int reg;
1125
1126         if (!mask)
1127                 return rte_flow_error_set(error, EINVAL,
1128                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1129                                           NULL, "zero mark action mask");
1130         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1131         if (reg < 0)
1132                 return reg;
1133         MLX5_ASSERT(reg > 0);
1134         if (reg == REG_C_0) {
1135                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1136                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1137
1138                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1139                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1140                 mask = rte_cpu_to_be_32(mask << shl_c0);
1141         }
1142         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1143         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1144                                              MLX5_MODIFICATION_TYPE_SET, error);
1145 }
1146
1147 /**
1148  * Get metadata register index for specified steering domain.
1149  *
1150  * @param[in] dev
1151  *   Pointer to the rte_eth_dev structure.
1152  * @param[in] attr
1153  *   Attributes of flow to determine steering domain.
1154  * @param[out] error
1155  *   Pointer to the error structure.
1156  *
1157  * @return
1158  *   positive index on success, a negative errno value otherwise
1159  *   and rte_errno is set.
1160  */
1161 static enum modify_reg
1162 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1163                          const struct rte_flow_attr *attr,
1164                          struct rte_flow_error *error)
1165 {
1166         int reg =
1167                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1168                                           MLX5_METADATA_FDB :
1169                                             attr->egress ?
1170                                             MLX5_METADATA_TX :
1171                                             MLX5_METADATA_RX, 0, error);
1172         if (reg < 0)
1173                 return rte_flow_error_set(error,
1174                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1175                                           NULL, "unavailable "
1176                                           "metadata register");
1177         return reg;
1178 }
1179
1180 /**
1181  * Convert SET_META action to DV specification.
1182  *
1183  * @param[in] dev
1184  *   Pointer to the rte_eth_dev structure.
1185  * @param[in,out] resource
1186  *   Pointer to the modify-header resource.
1187  * @param[in] attr
1188  *   Attributes of flow that includes this item.
1189  * @param[in] conf
1190  *   Pointer to action specification.
1191  * @param[out] error
1192  *   Pointer to the error structure.
1193  *
1194  * @return
1195  *   0 on success, a negative errno value otherwise and rte_errno is set.
1196  */
1197 static int
1198 flow_dv_convert_action_set_meta
1199                         (struct rte_eth_dev *dev,
1200                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1201                          const struct rte_flow_attr *attr,
1202                          const struct rte_flow_action_set_meta *conf,
1203                          struct rte_flow_error *error)
1204 {
1205         uint32_t data = conf->data;
1206         uint32_t mask = conf->mask;
1207         struct rte_flow_item item = {
1208                 .spec = &data,
1209                 .mask = &mask,
1210         };
1211         struct field_modify_info reg_c_x[] = {
1212                 [1] = {0, 0, 0},
1213         };
1214         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1215
1216         if (reg < 0)
1217                 return reg;
1218         /*
1219          * In datapath code there is no endianness
1220          * coversions for perfromance reasons, all
1221          * pattern conversions are done in rte_flow.
1222          */
1223         if (reg == REG_C_0) {
1224                 struct mlx5_priv *priv = dev->data->dev_private;
1225                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1226                 uint32_t shl_c0;
1227
1228                 MLX5_ASSERT(msk_c0);
1229 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1230                 shl_c0 = rte_bsf32(msk_c0);
1231 #else
1232                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1233 #endif
1234                 mask <<= shl_c0;
1235                 data <<= shl_c0;
1236                 MLX5_ASSERT(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1237         }
1238         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1239         /* The routine expects parameters in memory as big-endian ones. */
1240         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1241                                              MLX5_MODIFICATION_TYPE_SET, error);
1242 }
1243
1244 /**
1245  * Convert modify-header set IPv4 DSCP action to DV specification.
1246  *
1247  * @param[in,out] resource
1248  *   Pointer to the modify-header resource.
1249  * @param[in] action
1250  *   Pointer to action specification.
1251  * @param[out] error
1252  *   Pointer to the error structure.
1253  *
1254  * @return
1255  *   0 on success, a negative errno value otherwise and rte_errno is set.
1256  */
1257 static int
1258 flow_dv_convert_action_modify_ipv4_dscp
1259                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1260                          const struct rte_flow_action *action,
1261                          struct rte_flow_error *error)
1262 {
1263         const struct rte_flow_action_set_dscp *conf =
1264                 (const struct rte_flow_action_set_dscp *)(action->conf);
1265         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1266         struct rte_flow_item_ipv4 ipv4;
1267         struct rte_flow_item_ipv4 ipv4_mask;
1268
1269         memset(&ipv4, 0, sizeof(ipv4));
1270         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1271         ipv4.hdr.type_of_service = conf->dscp;
1272         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1273         item.spec = &ipv4;
1274         item.mask = &ipv4_mask;
1275         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1276                                              MLX5_MODIFICATION_TYPE_SET, error);
1277 }
1278
1279 /**
1280  * Convert modify-header set IPv6 DSCP action to DV specification.
1281  *
1282  * @param[in,out] resource
1283  *   Pointer to the modify-header resource.
1284  * @param[in] action
1285  *   Pointer to action specification.
1286  * @param[out] error
1287  *   Pointer to the error structure.
1288  *
1289  * @return
1290  *   0 on success, a negative errno value otherwise and rte_errno is set.
1291  */
1292 static int
1293 flow_dv_convert_action_modify_ipv6_dscp
1294                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1295                          const struct rte_flow_action *action,
1296                          struct rte_flow_error *error)
1297 {
1298         const struct rte_flow_action_set_dscp *conf =
1299                 (const struct rte_flow_action_set_dscp *)(action->conf);
1300         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1301         struct rte_flow_item_ipv6 ipv6;
1302         struct rte_flow_item_ipv6 ipv6_mask;
1303
1304         memset(&ipv6, 0, sizeof(ipv6));
1305         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1306         /*
1307          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1308          * rdma-core only accept the DSCP bits byte aligned start from
1309          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1310          * bits in IPv6 case as rdma-core requires byte aligned value.
1311          */
1312         ipv6.hdr.vtc_flow = conf->dscp;
1313         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1314         item.spec = &ipv6;
1315         item.mask = &ipv6_mask;
1316         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1317                                              MLX5_MODIFICATION_TYPE_SET, error);
1318 }
1319
1320 /**
1321  * Validate MARK item.
1322  *
1323  * @param[in] dev
1324  *   Pointer to the rte_eth_dev structure.
1325  * @param[in] item
1326  *   Item specification.
1327  * @param[in] attr
1328  *   Attributes of flow that includes this item.
1329  * @param[out] error
1330  *   Pointer to error structure.
1331  *
1332  * @return
1333  *   0 on success, a negative errno value otherwise and rte_errno is set.
1334  */
1335 static int
1336 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1337                            const struct rte_flow_item *item,
1338                            const struct rte_flow_attr *attr __rte_unused,
1339                            struct rte_flow_error *error)
1340 {
1341         struct mlx5_priv *priv = dev->data->dev_private;
1342         struct mlx5_dev_config *config = &priv->config;
1343         const struct rte_flow_item_mark *spec = item->spec;
1344         const struct rte_flow_item_mark *mask = item->mask;
1345         const struct rte_flow_item_mark nic_mask = {
1346                 .id = priv->sh->dv_mark_mask,
1347         };
1348         int ret;
1349
1350         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1351                 return rte_flow_error_set(error, ENOTSUP,
1352                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1353                                           "extended metadata feature"
1354                                           " isn't enabled");
1355         if (!mlx5_flow_ext_mreg_supported(dev))
1356                 return rte_flow_error_set(error, ENOTSUP,
1357                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1358                                           "extended metadata register"
1359                                           " isn't supported");
1360         if (!nic_mask.id)
1361                 return rte_flow_error_set(error, ENOTSUP,
1362                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1363                                           "extended metadata register"
1364                                           " isn't available");
1365         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1366         if (ret < 0)
1367                 return ret;
1368         if (!spec)
1369                 return rte_flow_error_set(error, EINVAL,
1370                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1371                                           item->spec,
1372                                           "data cannot be empty");
1373         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1374                 return rte_flow_error_set(error, EINVAL,
1375                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1376                                           &spec->id,
1377                                           "mark id exceeds the limit");
1378         if (!mask)
1379                 mask = &nic_mask;
1380         if (!mask->id)
1381                 return rte_flow_error_set(error, EINVAL,
1382                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1383                                         "mask cannot be zero");
1384
1385         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1386                                         (const uint8_t *)&nic_mask,
1387                                         sizeof(struct rte_flow_item_mark),
1388                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1389         if (ret < 0)
1390                 return ret;
1391         return 0;
1392 }
1393
1394 /**
1395  * Validate META item.
1396  *
1397  * @param[in] dev
1398  *   Pointer to the rte_eth_dev structure.
1399  * @param[in] item
1400  *   Item specification.
1401  * @param[in] attr
1402  *   Attributes of flow that includes this item.
1403  * @param[out] error
1404  *   Pointer to error structure.
1405  *
1406  * @return
1407  *   0 on success, a negative errno value otherwise and rte_errno is set.
1408  */
1409 static int
1410 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1411                            const struct rte_flow_item *item,
1412                            const struct rte_flow_attr *attr,
1413                            struct rte_flow_error *error)
1414 {
1415         struct mlx5_priv *priv = dev->data->dev_private;
1416         struct mlx5_dev_config *config = &priv->config;
1417         const struct rte_flow_item_meta *spec = item->spec;
1418         const struct rte_flow_item_meta *mask = item->mask;
1419         struct rte_flow_item_meta nic_mask = {
1420                 .data = UINT32_MAX
1421         };
1422         int reg;
1423         int ret;
1424
1425         if (!spec)
1426                 return rte_flow_error_set(error, EINVAL,
1427                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1428                                           item->spec,
1429                                           "data cannot be empty");
1430         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1431                 if (!mlx5_flow_ext_mreg_supported(dev))
1432                         return rte_flow_error_set(error, ENOTSUP,
1433                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1434                                           "extended metadata register"
1435                                           " isn't supported");
1436                 reg = flow_dv_get_metadata_reg(dev, attr, error);
1437                 if (reg < 0)
1438                         return reg;
1439                 if (reg == REG_B)
1440                         return rte_flow_error_set(error, ENOTSUP,
1441                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1442                                           "match on reg_b "
1443                                           "isn't supported");
1444                 if (reg != REG_A)
1445                         nic_mask.data = priv->sh->dv_meta_mask;
1446         } else if (attr->transfer) {
1447                 return rte_flow_error_set(error, ENOTSUP,
1448                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
1449                                         "extended metadata feature "
1450                                         "should be enabled when "
1451                                         "meta item is requested "
1452                                         "with e-switch mode ");
1453         }
1454         if (!mask)
1455                 mask = &rte_flow_item_meta_mask;
1456         if (!mask->data)
1457                 return rte_flow_error_set(error, EINVAL,
1458                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1459                                         "mask cannot be zero");
1460
1461         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1462                                         (const uint8_t *)&nic_mask,
1463                                         sizeof(struct rte_flow_item_meta),
1464                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1465         return ret;
1466 }
1467
1468 /**
1469  * Validate TAG item.
1470  *
1471  * @param[in] dev
1472  *   Pointer to the rte_eth_dev structure.
1473  * @param[in] item
1474  *   Item specification.
1475  * @param[in] attr
1476  *   Attributes of flow that includes this item.
1477  * @param[out] error
1478  *   Pointer to error structure.
1479  *
1480  * @return
1481  *   0 on success, a negative errno value otherwise and rte_errno is set.
1482  */
1483 static int
1484 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
1485                           const struct rte_flow_item *item,
1486                           const struct rte_flow_attr *attr __rte_unused,
1487                           struct rte_flow_error *error)
1488 {
1489         const struct rte_flow_item_tag *spec = item->spec;
1490         const struct rte_flow_item_tag *mask = item->mask;
1491         const struct rte_flow_item_tag nic_mask = {
1492                 .data = RTE_BE32(UINT32_MAX),
1493                 .index = 0xff,
1494         };
1495         int ret;
1496
1497         if (!mlx5_flow_ext_mreg_supported(dev))
1498                 return rte_flow_error_set(error, ENOTSUP,
1499                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1500                                           "extensive metadata register"
1501                                           " isn't supported");
1502         if (!spec)
1503                 return rte_flow_error_set(error, EINVAL,
1504                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1505                                           item->spec,
1506                                           "data cannot be empty");
1507         if (!mask)
1508                 mask = &rte_flow_item_tag_mask;
1509         if (!mask->data)
1510                 return rte_flow_error_set(error, EINVAL,
1511                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1512                                         "mask cannot be zero");
1513
1514         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1515                                         (const uint8_t *)&nic_mask,
1516                                         sizeof(struct rte_flow_item_tag),
1517                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1518         if (ret < 0)
1519                 return ret;
1520         if (mask->index != 0xff)
1521                 return rte_flow_error_set(error, EINVAL,
1522                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1523                                           "partial mask for tag index"
1524                                           " is not supported");
1525         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
1526         if (ret < 0)
1527                 return ret;
1528         MLX5_ASSERT(ret != REG_NON);
1529         return 0;
1530 }
1531
1532 /**
1533  * Validate vport item.
1534  *
1535  * @param[in] dev
1536  *   Pointer to the rte_eth_dev structure.
1537  * @param[in] item
1538  *   Item specification.
1539  * @param[in] attr
1540  *   Attributes of flow that includes this item.
1541  * @param[in] item_flags
1542  *   Bit-fields that holds the items detected until now.
1543  * @param[out] error
1544  *   Pointer to error structure.
1545  *
1546  * @return
1547  *   0 on success, a negative errno value otherwise and rte_errno is set.
1548  */
1549 static int
1550 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
1551                               const struct rte_flow_item *item,
1552                               const struct rte_flow_attr *attr,
1553                               uint64_t item_flags,
1554                               struct rte_flow_error *error)
1555 {
1556         const struct rte_flow_item_port_id *spec = item->spec;
1557         const struct rte_flow_item_port_id *mask = item->mask;
1558         const struct rte_flow_item_port_id switch_mask = {
1559                         .id = 0xffffffff,
1560         };
1561         struct mlx5_priv *esw_priv;
1562         struct mlx5_priv *dev_priv;
1563         int ret;
1564
1565         if (!attr->transfer)
1566                 return rte_flow_error_set(error, EINVAL,
1567                                           RTE_FLOW_ERROR_TYPE_ITEM,
1568                                           NULL,
1569                                           "match on port id is valid only"
1570                                           " when transfer flag is enabled");
1571         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
1572                 return rte_flow_error_set(error, ENOTSUP,
1573                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1574                                           "multiple source ports are not"
1575                                           " supported");
1576         if (!mask)
1577                 mask = &switch_mask;
1578         if (mask->id != 0xffffffff)
1579                 return rte_flow_error_set(error, ENOTSUP,
1580                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1581                                            mask,
1582                                            "no support for partial mask on"
1583                                            " \"id\" field");
1584         ret = mlx5_flow_item_acceptable
1585                                 (item, (const uint8_t *)mask,
1586                                  (const uint8_t *)&rte_flow_item_port_id_mask,
1587                                  sizeof(struct rte_flow_item_port_id),
1588                                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1589         if (ret)
1590                 return ret;
1591         if (!spec)
1592                 return 0;
1593         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
1594         if (!esw_priv)
1595                 return rte_flow_error_set(error, rte_errno,
1596                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1597                                           "failed to obtain E-Switch info for"
1598                                           " port");
1599         dev_priv = mlx5_dev_to_eswitch_info(dev);
1600         if (!dev_priv)
1601                 return rte_flow_error_set(error, rte_errno,
1602                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1603                                           NULL,
1604                                           "failed to obtain E-Switch info");
1605         if (esw_priv->domain_id != dev_priv->domain_id)
1606                 return rte_flow_error_set(error, EINVAL,
1607                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1608                                           "cannot match on a port from a"
1609                                           " different E-Switch");
1610         return 0;
1611 }
1612
1613 /**
1614  * Validate VLAN item.
1615  *
1616  * @param[in] item
1617  *   Item specification.
1618  * @param[in] item_flags
1619  *   Bit-fields that holds the items detected until now.
1620  * @param[in] dev
1621  *   Ethernet device flow is being created on.
1622  * @param[out] error
1623  *   Pointer to error structure.
1624  *
1625  * @return
1626  *   0 on success, a negative errno value otherwise and rte_errno is set.
1627  */
1628 static int
1629 flow_dv_validate_item_vlan(const struct rte_flow_item *item,
1630                            uint64_t item_flags,
1631                            struct rte_eth_dev *dev,
1632                            struct rte_flow_error *error)
1633 {
1634         const struct rte_flow_item_vlan *mask = item->mask;
1635         const struct rte_flow_item_vlan nic_mask = {
1636                 .tci = RTE_BE16(UINT16_MAX),
1637                 .inner_type = RTE_BE16(UINT16_MAX),
1638                 .has_more_vlan = 1,
1639         };
1640         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1641         int ret;
1642         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1643                                         MLX5_FLOW_LAYER_INNER_L4) :
1644                                        (MLX5_FLOW_LAYER_OUTER_L3 |
1645                                         MLX5_FLOW_LAYER_OUTER_L4);
1646         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1647                                         MLX5_FLOW_LAYER_OUTER_VLAN;
1648
1649         if (item_flags & vlanm)
1650                 return rte_flow_error_set(error, EINVAL,
1651                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1652                                           "multiple VLAN layers not supported");
1653         else if ((item_flags & l34m) != 0)
1654                 return rte_flow_error_set(error, EINVAL,
1655                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1656                                           "VLAN cannot follow L3/L4 layer");
1657         if (!mask)
1658                 mask = &rte_flow_item_vlan_mask;
1659         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1660                                         (const uint8_t *)&nic_mask,
1661                                         sizeof(struct rte_flow_item_vlan),
1662                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1663         if (ret)
1664                 return ret;
1665         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
1666                 struct mlx5_priv *priv = dev->data->dev_private;
1667
1668                 if (priv->vmwa_context) {
1669                         /*
1670                          * Non-NULL context means we have a virtual machine
1671                          * and SR-IOV enabled, we have to create VLAN interface
1672                          * to make hypervisor to setup E-Switch vport
1673                          * context correctly. We avoid creating the multiple
1674                          * VLAN interfaces, so we cannot support VLAN tag mask.
1675                          */
1676                         return rte_flow_error_set(error, EINVAL,
1677                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1678                                                   item,
1679                                                   "VLAN tag mask is not"
1680                                                   " supported in virtual"
1681                                                   " environment");
1682                 }
1683         }
1684         return 0;
1685 }
1686
1687 /*
1688  * GTP flags are contained in 1 byte of the format:
1689  * -------------------------------------------
1690  * | bit   | 0 - 2   | 3  | 4   | 5 | 6 | 7  |
1691  * |-----------------------------------------|
1692  * | value | Version | PT | Res | E | S | PN |
1693  * -------------------------------------------
1694  *
1695  * Matching is supported only for GTP flags E, S, PN.
1696  */
1697 #define MLX5_GTP_FLAGS_MASK     0x07
1698
1699 /**
1700  * Validate GTP item.
1701  *
1702  * @param[in] dev
1703  *   Pointer to the rte_eth_dev structure.
1704  * @param[in] item
1705  *   Item specification.
1706  * @param[in] item_flags
1707  *   Bit-fields that holds the items detected until now.
1708  * @param[out] error
1709  *   Pointer to error structure.
1710  *
1711  * @return
1712  *   0 on success, a negative errno value otherwise and rte_errno is set.
1713  */
1714 static int
1715 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
1716                           const struct rte_flow_item *item,
1717                           uint64_t item_flags,
1718                           struct rte_flow_error *error)
1719 {
1720         struct mlx5_priv *priv = dev->data->dev_private;
1721         const struct rte_flow_item_gtp *spec = item->spec;
1722         const struct rte_flow_item_gtp *mask = item->mask;
1723         const struct rte_flow_item_gtp nic_mask = {
1724                 .v_pt_rsv_flags = MLX5_GTP_FLAGS_MASK,
1725                 .msg_type = 0xff,
1726                 .teid = RTE_BE32(0xffffffff),
1727         };
1728
1729         if (!priv->config.hca_attr.tunnel_stateless_gtp)
1730                 return rte_flow_error_set(error, ENOTSUP,
1731                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1732                                           "GTP support is not enabled");
1733         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1734                 return rte_flow_error_set(error, ENOTSUP,
1735                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1736                                           "multiple tunnel layers not"
1737                                           " supported");
1738         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1739                 return rte_flow_error_set(error, EINVAL,
1740                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1741                                           "no outer UDP layer found");
1742         if (!mask)
1743                 mask = &rte_flow_item_gtp_mask;
1744         if (spec && spec->v_pt_rsv_flags & ~MLX5_GTP_FLAGS_MASK)
1745                 return rte_flow_error_set(error, ENOTSUP,
1746                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1747                                           "Match is supported for GTP"
1748                                           " flags only");
1749         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1750                                          (const uint8_t *)&nic_mask,
1751                                          sizeof(struct rte_flow_item_gtp),
1752                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1753 }
1754
1755 /**
1756  * Validate IPV4 item.
1757  * Use existing validation function mlx5_flow_validate_item_ipv4(), and
1758  * add specific validation of fragment_offset field,
1759  *
1760  * @param[in] item
1761  *   Item specification.
1762  * @param[in] item_flags
1763  *   Bit-fields that holds the items detected until now.
1764  * @param[out] error
1765  *   Pointer to error structure.
1766  *
1767  * @return
1768  *   0 on success, a negative errno value otherwise and rte_errno is set.
1769  */
1770 static int
1771 flow_dv_validate_item_ipv4(const struct rte_flow_item *item,
1772                            uint64_t item_flags,
1773                            uint64_t last_item,
1774                            uint16_t ether_type,
1775                            struct rte_flow_error *error)
1776 {
1777         int ret;
1778         const struct rte_flow_item_ipv4 *spec = item->spec;
1779         const struct rte_flow_item_ipv4 *last = item->last;
1780         const struct rte_flow_item_ipv4 *mask = item->mask;
1781         rte_be16_t fragment_offset_spec = 0;
1782         rte_be16_t fragment_offset_last = 0;
1783         const struct rte_flow_item_ipv4 nic_ipv4_mask = {
1784                 .hdr = {
1785                         .src_addr = RTE_BE32(0xffffffff),
1786                         .dst_addr = RTE_BE32(0xffffffff),
1787                         .type_of_service = 0xff,
1788                         .fragment_offset = RTE_BE16(0xffff),
1789                         .next_proto_id = 0xff,
1790                         .time_to_live = 0xff,
1791                 },
1792         };
1793
1794         ret = mlx5_flow_validate_item_ipv4(item, item_flags, last_item,
1795                                            ether_type, &nic_ipv4_mask,
1796                                            MLX5_ITEM_RANGE_ACCEPTED, error);
1797         if (ret < 0)
1798                 return ret;
1799         if (spec && mask)
1800                 fragment_offset_spec = spec->hdr.fragment_offset &
1801                                        mask->hdr.fragment_offset;
1802         if (!fragment_offset_spec)
1803                 return 0;
1804         /*
1805          * spec and mask are valid, enforce using full mask to make sure the
1806          * complete value is used correctly.
1807          */
1808         if ((mask->hdr.fragment_offset & RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
1809                         != RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
1810                 return rte_flow_error_set(error, EINVAL,
1811                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1812                                           item, "must use full mask for"
1813                                           " fragment_offset");
1814         /*
1815          * Match on fragment_offset 0x2000 means MF is 1 and frag-offset is 0,
1816          * indicating this is 1st fragment of fragmented packet.
1817          * This is not yet supported in MLX5, return appropriate error message.
1818          */
1819         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG))
1820                 return rte_flow_error_set(error, ENOTSUP,
1821                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1822                                           "match on first fragment not "
1823                                           "supported");
1824         if (fragment_offset_spec && !last)
1825                 return rte_flow_error_set(error, ENOTSUP,
1826                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1827                                           "specified value not supported");
1828         /* spec and last are valid, validate the specified range. */
1829         fragment_offset_last = last->hdr.fragment_offset &
1830                                mask->hdr.fragment_offset;
1831         /*
1832          * Match on fragment_offset spec 0x2001 and last 0x3fff
1833          * means MF is 1 and frag-offset is > 0.
1834          * This packet is fragment 2nd and onward, excluding last.
1835          * This is not yet supported in MLX5, return appropriate
1836          * error message.
1837          */
1838         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG + 1) &&
1839             fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
1840                 return rte_flow_error_set(error, ENOTSUP,
1841                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
1842                                           last, "match on following "
1843                                           "fragments not supported");
1844         /*
1845          * Match on fragment_offset spec 0x0001 and last 0x1fff
1846          * means MF is 0 and frag-offset is > 0.
1847          * This packet is last fragment of fragmented packet.
1848          * This is not yet supported in MLX5, return appropriate
1849          * error message.
1850          */
1851         if (fragment_offset_spec == RTE_BE16(1) &&
1852             fragment_offset_last == RTE_BE16(RTE_IPV4_HDR_OFFSET_MASK))
1853                 return rte_flow_error_set(error, ENOTSUP,
1854                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
1855                                           last, "match on last "
1856                                           "fragment not supported");
1857         /*
1858          * Match on fragment_offset spec 0x0001 and last 0x3fff
1859          * means MF and/or frag-offset is not 0.
1860          * This is a fragmented packet.
1861          * Other range values are invalid and rejected.
1862          */
1863         if (!(fragment_offset_spec == RTE_BE16(1) &&
1864               fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK)))
1865                 return rte_flow_error_set(error, ENOTSUP,
1866                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
1867                                           "specified range not supported");
1868         return 0;
1869 }
1870
1871 /**
1872  * Validate IPV6 fragment extension item.
1873  *
1874  * @param[in] item
1875  *   Item specification.
1876  * @param[in] item_flags
1877  *   Bit-fields that holds the items detected until now.
1878  * @param[out] error
1879  *   Pointer to error structure.
1880  *
1881  * @return
1882  *   0 on success, a negative errno value otherwise and rte_errno is set.
1883  */
1884 static int
1885 flow_dv_validate_item_ipv6_frag_ext(const struct rte_flow_item *item,
1886                                     uint64_t item_flags,
1887                                     struct rte_flow_error *error)
1888 {
1889         const struct rte_flow_item_ipv6_frag_ext *spec = item->spec;
1890         const struct rte_flow_item_ipv6_frag_ext *last = item->last;
1891         const struct rte_flow_item_ipv6_frag_ext *mask = item->mask;
1892         rte_be16_t frag_data_spec = 0;
1893         rte_be16_t frag_data_last = 0;
1894         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1895         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1896                                       MLX5_FLOW_LAYER_OUTER_L4;
1897         int ret = 0;
1898         struct rte_flow_item_ipv6_frag_ext nic_mask = {
1899                 .hdr = {
1900                         .next_header = 0xff,
1901                         .frag_data = RTE_BE16(0xffff),
1902                 },
1903         };
1904
1905         if (item_flags & l4m)
1906                 return rte_flow_error_set(error, EINVAL,
1907                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1908                                           "ipv6 fragment extension item cannot "
1909                                           "follow L4 item.");
1910         if ((tunnel && !(item_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
1911             (!tunnel && !(item_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV6)))
1912                 return rte_flow_error_set(error, EINVAL,
1913                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1914                                           "ipv6 fragment extension item must "
1915                                           "follow ipv6 item");
1916         if (spec && mask)
1917                 frag_data_spec = spec->hdr.frag_data & mask->hdr.frag_data;
1918         if (!frag_data_spec)
1919                 return 0;
1920         /*
1921          * spec and mask are valid, enforce using full mask to make sure the
1922          * complete value is used correctly.
1923          */
1924         if ((mask->hdr.frag_data & RTE_BE16(RTE_IPV6_FRAG_USED_MASK)) !=
1925                                 RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
1926                 return rte_flow_error_set(error, EINVAL,
1927                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1928                                           item, "must use full mask for"
1929                                           " frag_data");
1930         /*
1931          * Match on frag_data 0x00001 means M is 1 and frag-offset is 0.
1932          * This is 1st fragment of fragmented packet.
1933          */
1934         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_MF_MASK))
1935                 return rte_flow_error_set(error, ENOTSUP,
1936                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1937                                           "match on first fragment not "
1938                                           "supported");
1939         if (frag_data_spec && !last)
1940                 return rte_flow_error_set(error, EINVAL,
1941                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1942                                           "specified value not supported");
1943         ret = mlx5_flow_item_acceptable
1944                                 (item, (const uint8_t *)mask,
1945                                  (const uint8_t *)&nic_mask,
1946                                  sizeof(struct rte_flow_item_ipv6_frag_ext),
1947                                  MLX5_ITEM_RANGE_ACCEPTED, error);
1948         if (ret)
1949                 return ret;
1950         /* spec and last are valid, validate the specified range. */
1951         frag_data_last = last->hdr.frag_data & mask->hdr.frag_data;
1952         /*
1953          * Match on frag_data spec 0x0009 and last 0xfff9
1954          * means M is 1 and frag-offset is > 0.
1955          * This packet is fragment 2nd and onward, excluding last.
1956          * This is not yet supported in MLX5, return appropriate
1957          * error message.
1958          */
1959         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN |
1960                                        RTE_IPV6_EHDR_MF_MASK) &&
1961             frag_data_last == RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
1962                 return rte_flow_error_set(error, ENOTSUP,
1963                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
1964                                           last, "match on following "
1965                                           "fragments not supported");
1966         /*
1967          * Match on frag_data spec 0x0008 and last 0xfff8
1968          * means M is 0 and frag-offset is > 0.
1969          * This packet is last fragment of fragmented packet.
1970          * This is not yet supported in MLX5, return appropriate
1971          * error message.
1972          */
1973         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN) &&
1974             frag_data_last == RTE_BE16(RTE_IPV6_EHDR_FO_MASK))
1975                 return rte_flow_error_set(error, ENOTSUP,
1976                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
1977                                           last, "match on last "
1978                                           "fragment not supported");
1979         /* Other range values are invalid and rejected. */
1980         return rte_flow_error_set(error, EINVAL,
1981                                   RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
1982                                   "specified range not supported");
1983 }
1984
1985 /**
1986  * Validate the pop VLAN action.
1987  *
1988  * @param[in] dev
1989  *   Pointer to the rte_eth_dev structure.
1990  * @param[in] action_flags
1991  *   Holds the actions detected until now.
1992  * @param[in] action
1993  *   Pointer to the pop vlan action.
1994  * @param[in] item_flags
1995  *   The items found in this flow rule.
1996  * @param[in] attr
1997  *   Pointer to flow attributes.
1998  * @param[out] error
1999  *   Pointer to error structure.
2000  *
2001  * @return
2002  *   0 on success, a negative errno value otherwise and rte_errno is set.
2003  */
2004 static int
2005 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
2006                                  uint64_t action_flags,
2007                                  const struct rte_flow_action *action,
2008                                  uint64_t item_flags,
2009                                  const struct rte_flow_attr *attr,
2010                                  struct rte_flow_error *error)
2011 {
2012         const struct mlx5_priv *priv = dev->data->dev_private;
2013
2014         (void)action;
2015         (void)attr;
2016         if (!priv->sh->pop_vlan_action)
2017                 return rte_flow_error_set(error, ENOTSUP,
2018                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2019                                           NULL,
2020                                           "pop vlan action is not supported");
2021         if (attr->egress)
2022                 return rte_flow_error_set(error, ENOTSUP,
2023                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2024                                           NULL,
2025                                           "pop vlan action not supported for "
2026                                           "egress");
2027         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
2028                 return rte_flow_error_set(error, ENOTSUP,
2029                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2030                                           "no support for multiple VLAN "
2031                                           "actions");
2032         /* Pop VLAN with preceding Decap requires inner header with VLAN. */
2033         if ((action_flags & MLX5_FLOW_ACTION_DECAP) &&
2034             !(item_flags & MLX5_FLOW_LAYER_INNER_VLAN))
2035                 return rte_flow_error_set(error, ENOTSUP,
2036                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2037                                           NULL,
2038                                           "cannot pop vlan after decap without "
2039                                           "match on inner vlan in the flow");
2040         /* Pop VLAN without preceding Decap requires outer header with VLAN. */
2041         if (!(action_flags & MLX5_FLOW_ACTION_DECAP) &&
2042             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2043                 return rte_flow_error_set(error, ENOTSUP,
2044                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2045                                           NULL,
2046                                           "cannot pop vlan without a "
2047                                           "match on (outer) vlan in the flow");
2048         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2049                 return rte_flow_error_set(error, EINVAL,
2050                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2051                                           "wrong action order, port_id should "
2052                                           "be after pop VLAN action");
2053         if (!attr->transfer && priv->representor)
2054                 return rte_flow_error_set(error, ENOTSUP,
2055                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2056                                           "pop vlan action for VF representor "
2057                                           "not supported on NIC table");
2058         return 0;
2059 }
2060
2061 /**
2062  * Get VLAN default info from vlan match info.
2063  *
2064  * @param[in] items
2065  *   the list of item specifications.
2066  * @param[out] vlan
2067  *   pointer VLAN info to fill to.
2068  *
2069  * @return
2070  *   0 on success, a negative errno value otherwise and rte_errno is set.
2071  */
2072 static void
2073 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
2074                                   struct rte_vlan_hdr *vlan)
2075 {
2076         const struct rte_flow_item_vlan nic_mask = {
2077                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
2078                                 MLX5DV_FLOW_VLAN_VID_MASK),
2079                 .inner_type = RTE_BE16(0xffff),
2080         };
2081
2082         if (items == NULL)
2083                 return;
2084         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2085                 int type = items->type;
2086
2087                 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
2088                     type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
2089                         break;
2090         }
2091         if (items->type != RTE_FLOW_ITEM_TYPE_END) {
2092                 const struct rte_flow_item_vlan *vlan_m = items->mask;
2093                 const struct rte_flow_item_vlan *vlan_v = items->spec;
2094
2095                 /* If VLAN item in pattern doesn't contain data, return here. */
2096                 if (!vlan_v)
2097                         return;
2098                 if (!vlan_m)
2099                         vlan_m = &nic_mask;
2100                 /* Only full match values are accepted */
2101                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
2102                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
2103                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
2104                         vlan->vlan_tci |=
2105                                 rte_be_to_cpu_16(vlan_v->tci &
2106                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
2107                 }
2108                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
2109                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
2110                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
2111                         vlan->vlan_tci |=
2112                                 rte_be_to_cpu_16(vlan_v->tci &
2113                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
2114                 }
2115                 if (vlan_m->inner_type == nic_mask.inner_type)
2116                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
2117                                                            vlan_m->inner_type);
2118         }
2119 }
2120
2121 /**
2122  * Validate the push VLAN action.
2123  *
2124  * @param[in] dev
2125  *   Pointer to the rte_eth_dev structure.
2126  * @param[in] action_flags
2127  *   Holds the actions detected until now.
2128  * @param[in] item_flags
2129  *   The items found in this flow rule.
2130  * @param[in] action
2131  *   Pointer to the action structure.
2132  * @param[in] attr
2133  *   Pointer to flow attributes
2134  * @param[out] error
2135  *   Pointer to error structure.
2136  *
2137  * @return
2138  *   0 on success, a negative errno value otherwise and rte_errno is set.
2139  */
2140 static int
2141 flow_dv_validate_action_push_vlan(struct rte_eth_dev *dev,
2142                                   uint64_t action_flags,
2143                                   const struct rte_flow_item_vlan *vlan_m,
2144                                   const struct rte_flow_action *action,
2145                                   const struct rte_flow_attr *attr,
2146                                   struct rte_flow_error *error)
2147 {
2148         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
2149         const struct mlx5_priv *priv = dev->data->dev_private;
2150
2151         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
2152             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
2153                 return rte_flow_error_set(error, EINVAL,
2154                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2155                                           "invalid vlan ethertype");
2156         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2157                 return rte_flow_error_set(error, EINVAL,
2158                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2159                                           "wrong action order, port_id should "
2160                                           "be after push VLAN");
2161         if (!attr->transfer && priv->representor)
2162                 return rte_flow_error_set(error, ENOTSUP,
2163                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2164                                           "push vlan action for VF representor "
2165                                           "not supported on NIC table");
2166         if (vlan_m &&
2167             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) &&
2168             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) !=
2169                 MLX5DV_FLOW_VLAN_PCP_MASK_BE &&
2170             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP) &&
2171             !(mlx5_flow_find_action
2172                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP)))
2173                 return rte_flow_error_set(error, EINVAL,
2174                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2175                                           "not full match mask on VLAN PCP and "
2176                                           "there is no of_set_vlan_pcp action, "
2177                                           "push VLAN action cannot figure out "
2178                                           "PCP value");
2179         if (vlan_m &&
2180             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) &&
2181             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) !=
2182                 MLX5DV_FLOW_VLAN_VID_MASK_BE &&
2183             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID) &&
2184             !(mlx5_flow_find_action
2185                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID)))
2186                 return rte_flow_error_set(error, EINVAL,
2187                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2188                                           "not full match mask on VLAN VID and "
2189                                           "there is no of_set_vlan_vid action, "
2190                                           "push VLAN action cannot figure out "
2191                                           "VID value");
2192         (void)attr;
2193         return 0;
2194 }
2195
2196 /**
2197  * Validate the set VLAN PCP.
2198  *
2199  * @param[in] action_flags
2200  *   Holds the actions detected until now.
2201  * @param[in] actions
2202  *   Pointer to the list of actions remaining in the flow rule.
2203  * @param[out] error
2204  *   Pointer to error structure.
2205  *
2206  * @return
2207  *   0 on success, a negative errno value otherwise and rte_errno is set.
2208  */
2209 static int
2210 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
2211                                      const struct rte_flow_action actions[],
2212                                      struct rte_flow_error *error)
2213 {
2214         const struct rte_flow_action *action = actions;
2215         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
2216
2217         if (conf->vlan_pcp > 7)
2218                 return rte_flow_error_set(error, EINVAL,
2219                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2220                                           "VLAN PCP value is too big");
2221         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
2222                 return rte_flow_error_set(error, ENOTSUP,
2223                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2224                                           "set VLAN PCP action must follow "
2225                                           "the push VLAN action");
2226         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
2227                 return rte_flow_error_set(error, ENOTSUP,
2228                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2229                                           "Multiple VLAN PCP modification are "
2230                                           "not supported");
2231         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2232                 return rte_flow_error_set(error, EINVAL,
2233                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2234                                           "wrong action order, port_id should "
2235                                           "be after set VLAN PCP");
2236         return 0;
2237 }
2238
2239 /**
2240  * Validate the set VLAN VID.
2241  *
2242  * @param[in] item_flags
2243  *   Holds the items detected in this rule.
2244  * @param[in] action_flags
2245  *   Holds the actions detected until now.
2246  * @param[in] actions
2247  *   Pointer to the list of actions remaining in the flow rule.
2248  * @param[out] error
2249  *   Pointer to error structure.
2250  *
2251  * @return
2252  *   0 on success, a negative errno value otherwise and rte_errno is set.
2253  */
2254 static int
2255 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
2256                                      uint64_t action_flags,
2257                                      const struct rte_flow_action actions[],
2258                                      struct rte_flow_error *error)
2259 {
2260         const struct rte_flow_action *action = actions;
2261         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
2262
2263         if (rte_be_to_cpu_16(conf->vlan_vid) > 0xFFE)
2264                 return rte_flow_error_set(error, EINVAL,
2265                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2266                                           "VLAN VID value is too big");
2267         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
2268             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2269                 return rte_flow_error_set(error, ENOTSUP,
2270                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2271                                           "set VLAN VID action must follow push"
2272                                           " VLAN action or match on VLAN item");
2273         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
2274                 return rte_flow_error_set(error, ENOTSUP,
2275                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2276                                           "Multiple VLAN VID modifications are "
2277                                           "not supported");
2278         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2279                 return rte_flow_error_set(error, EINVAL,
2280                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2281                                           "wrong action order, port_id should "
2282                                           "be after set VLAN VID");
2283         return 0;
2284 }
2285
2286 /*
2287  * Validate the FLAG action.
2288  *
2289  * @param[in] dev
2290  *   Pointer to the rte_eth_dev structure.
2291  * @param[in] action_flags
2292  *   Holds the actions detected until now.
2293  * @param[in] attr
2294  *   Pointer to flow attributes
2295  * @param[out] error
2296  *   Pointer to error structure.
2297  *
2298  * @return
2299  *   0 on success, a negative errno value otherwise and rte_errno is set.
2300  */
2301 static int
2302 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
2303                              uint64_t action_flags,
2304                              const struct rte_flow_attr *attr,
2305                              struct rte_flow_error *error)
2306 {
2307         struct mlx5_priv *priv = dev->data->dev_private;
2308         struct mlx5_dev_config *config = &priv->config;
2309         int ret;
2310
2311         /* Fall back if no extended metadata register support. */
2312         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
2313                 return mlx5_flow_validate_action_flag(action_flags, attr,
2314                                                       error);
2315         /* Extensive metadata mode requires registers. */
2316         if (!mlx5_flow_ext_mreg_supported(dev))
2317                 return rte_flow_error_set(error, ENOTSUP,
2318                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2319                                           "no metadata registers "
2320                                           "to support flag action");
2321         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
2322                 return rte_flow_error_set(error, ENOTSUP,
2323                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2324                                           "extended metadata register"
2325                                           " isn't available");
2326         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
2327         if (ret < 0)
2328                 return ret;
2329         MLX5_ASSERT(ret > 0);
2330         if (action_flags & MLX5_FLOW_ACTION_MARK)
2331                 return rte_flow_error_set(error, EINVAL,
2332                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2333                                           "can't mark and flag in same flow");
2334         if (action_flags & MLX5_FLOW_ACTION_FLAG)
2335                 return rte_flow_error_set(error, EINVAL,
2336                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2337                                           "can't have 2 flag"
2338                                           " actions in same flow");
2339         return 0;
2340 }
2341
2342 /**
2343  * Validate MARK action.
2344  *
2345  * @param[in] dev
2346  *   Pointer to the rte_eth_dev structure.
2347  * @param[in] action
2348  *   Pointer to action.
2349  * @param[in] action_flags
2350  *   Holds the actions detected until now.
2351  * @param[in] attr
2352  *   Pointer to flow attributes
2353  * @param[out] error
2354  *   Pointer to error structure.
2355  *
2356  * @return
2357  *   0 on success, a negative errno value otherwise and rte_errno is set.
2358  */
2359 static int
2360 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
2361                              const struct rte_flow_action *action,
2362                              uint64_t action_flags,
2363                              const struct rte_flow_attr *attr,
2364                              struct rte_flow_error *error)
2365 {
2366         struct mlx5_priv *priv = dev->data->dev_private;
2367         struct mlx5_dev_config *config = &priv->config;
2368         const struct rte_flow_action_mark *mark = action->conf;
2369         int ret;
2370
2371         /* Fall back if no extended metadata register support. */
2372         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
2373                 return mlx5_flow_validate_action_mark(action, action_flags,
2374                                                       attr, error);
2375         /* Extensive metadata mode requires registers. */
2376         if (!mlx5_flow_ext_mreg_supported(dev))
2377                 return rte_flow_error_set(error, ENOTSUP,
2378                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2379                                           "no metadata registers "
2380                                           "to support mark action");
2381         if (!priv->sh->dv_mark_mask)
2382                 return rte_flow_error_set(error, ENOTSUP,
2383                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2384                                           "extended metadata register"
2385                                           " isn't available");
2386         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
2387         if (ret < 0)
2388                 return ret;
2389         MLX5_ASSERT(ret > 0);
2390         if (!mark)
2391                 return rte_flow_error_set(error, EINVAL,
2392                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2393                                           "configuration cannot be null");
2394         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
2395                 return rte_flow_error_set(error, EINVAL,
2396                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2397                                           &mark->id,
2398                                           "mark id exceeds the limit");
2399         if (action_flags & MLX5_FLOW_ACTION_FLAG)
2400                 return rte_flow_error_set(error, EINVAL,
2401                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2402                                           "can't flag and mark in same flow");
2403         if (action_flags & MLX5_FLOW_ACTION_MARK)
2404                 return rte_flow_error_set(error, EINVAL,
2405                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2406                                           "can't have 2 mark actions in same"
2407                                           " flow");
2408         return 0;
2409 }
2410
2411 /**
2412  * Validate SET_META action.
2413  *
2414  * @param[in] dev
2415  *   Pointer to the rte_eth_dev structure.
2416  * @param[in] action
2417  *   Pointer to the action structure.
2418  * @param[in] action_flags
2419  *   Holds the actions detected until now.
2420  * @param[in] attr
2421  *   Pointer to flow attributes
2422  * @param[out] error
2423  *   Pointer to error structure.
2424  *
2425  * @return
2426  *   0 on success, a negative errno value otherwise and rte_errno is set.
2427  */
2428 static int
2429 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
2430                                  const struct rte_flow_action *action,
2431                                  uint64_t action_flags __rte_unused,
2432                                  const struct rte_flow_attr *attr,
2433                                  struct rte_flow_error *error)
2434 {
2435         const struct rte_flow_action_set_meta *conf;
2436         uint32_t nic_mask = UINT32_MAX;
2437         int reg;
2438
2439         if (!mlx5_flow_ext_mreg_supported(dev))
2440                 return rte_flow_error_set(error, ENOTSUP,
2441                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2442                                           "extended metadata register"
2443                                           " isn't supported");
2444         reg = flow_dv_get_metadata_reg(dev, attr, error);
2445         if (reg < 0)
2446                 return reg;
2447         if (reg != REG_A && reg != REG_B) {
2448                 struct mlx5_priv *priv = dev->data->dev_private;
2449
2450                 nic_mask = priv->sh->dv_meta_mask;
2451         }
2452         if (!(action->conf))
2453                 return rte_flow_error_set(error, EINVAL,
2454                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2455                                           "configuration cannot be null");
2456         conf = (const struct rte_flow_action_set_meta *)action->conf;
2457         if (!conf->mask)
2458                 return rte_flow_error_set(error, EINVAL,
2459                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2460                                           "zero mask doesn't have any effect");
2461         if (conf->mask & ~nic_mask)
2462                 return rte_flow_error_set(error, EINVAL,
2463                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2464                                           "meta data must be within reg C0");
2465         return 0;
2466 }
2467
2468 /**
2469  * Validate SET_TAG action.
2470  *
2471  * @param[in] dev
2472  *   Pointer to the rte_eth_dev structure.
2473  * @param[in] action
2474  *   Pointer to the action structure.
2475  * @param[in] action_flags
2476  *   Holds the actions detected until now.
2477  * @param[in] attr
2478  *   Pointer to flow attributes
2479  * @param[out] error
2480  *   Pointer to error structure.
2481  *
2482  * @return
2483  *   0 on success, a negative errno value otherwise and rte_errno is set.
2484  */
2485 static int
2486 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
2487                                 const struct rte_flow_action *action,
2488                                 uint64_t action_flags,
2489                                 const struct rte_flow_attr *attr,
2490                                 struct rte_flow_error *error)
2491 {
2492         const struct rte_flow_action_set_tag *conf;
2493         const uint64_t terminal_action_flags =
2494                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
2495                 MLX5_FLOW_ACTION_RSS;
2496         int ret;
2497
2498         if (!mlx5_flow_ext_mreg_supported(dev))
2499                 return rte_flow_error_set(error, ENOTSUP,
2500                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2501                                           "extensive metadata register"
2502                                           " isn't supported");
2503         if (!(action->conf))
2504                 return rte_flow_error_set(error, EINVAL,
2505                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2506                                           "configuration cannot be null");
2507         conf = (const struct rte_flow_action_set_tag *)action->conf;
2508         if (!conf->mask)
2509                 return rte_flow_error_set(error, EINVAL,
2510                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2511                                           "zero mask doesn't have any effect");
2512         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
2513         if (ret < 0)
2514                 return ret;
2515         if (!attr->transfer && attr->ingress &&
2516             (action_flags & terminal_action_flags))
2517                 return rte_flow_error_set(error, EINVAL,
2518                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2519                                           "set_tag has no effect"
2520                                           " with terminal actions");
2521         return 0;
2522 }
2523
2524 /**
2525  * Validate count action.
2526  *
2527  * @param[in] dev
2528  *   Pointer to rte_eth_dev structure.
2529  * @param[out] error
2530  *   Pointer to error structure.
2531  *
2532  * @return
2533  *   0 on success, a negative errno value otherwise and rte_errno is set.
2534  */
2535 static int
2536 flow_dv_validate_action_count(struct rte_eth_dev *dev,
2537                               struct rte_flow_error *error)
2538 {
2539         struct mlx5_priv *priv = dev->data->dev_private;
2540
2541         if (!priv->config.devx)
2542                 goto notsup_err;
2543 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
2544         return 0;
2545 #endif
2546 notsup_err:
2547         return rte_flow_error_set
2548                       (error, ENOTSUP,
2549                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2550                        NULL,
2551                        "count action not supported");
2552 }
2553
2554 /**
2555  * Validate the L2 encap action.
2556  *
2557  * @param[in] dev
2558  *   Pointer to the rte_eth_dev structure.
2559  * @param[in] action_flags
2560  *   Holds the actions detected until now.
2561  * @param[in] action
2562  *   Pointer to the action structure.
2563  * @param[in] attr
2564  *   Pointer to flow attributes.
2565  * @param[out] error
2566  *   Pointer to error structure.
2567  *
2568  * @return
2569  *   0 on success, a negative errno value otherwise and rte_errno is set.
2570  */
2571 static int
2572 flow_dv_validate_action_l2_encap(struct rte_eth_dev *dev,
2573                                  uint64_t action_flags,
2574                                  const struct rte_flow_action *action,
2575                                  const struct rte_flow_attr *attr,
2576                                  struct rte_flow_error *error)
2577 {
2578         const struct mlx5_priv *priv = dev->data->dev_private;
2579
2580         if (!(action->conf))
2581                 return rte_flow_error_set(error, EINVAL,
2582                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2583                                           "configuration cannot be null");
2584         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
2585                 return rte_flow_error_set(error, EINVAL,
2586                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2587                                           "can only have a single encap action "
2588                                           "in a flow");
2589         if (!attr->transfer && priv->representor)
2590                 return rte_flow_error_set(error, ENOTSUP,
2591                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2592                                           "encap action for VF representor "
2593                                           "not supported on NIC table");
2594         return 0;
2595 }
2596
2597 /**
2598  * Validate a decap action.
2599  *
2600  * @param[in] dev
2601  *   Pointer to the rte_eth_dev structure.
2602  * @param[in] action_flags
2603  *   Holds the actions detected until now.
2604  * @param[in] attr
2605  *   Pointer to flow attributes
2606  * @param[out] error
2607  *   Pointer to error structure.
2608  *
2609  * @return
2610  *   0 on success, a negative errno value otherwise and rte_errno is set.
2611  */
2612 static int
2613 flow_dv_validate_action_decap(struct rte_eth_dev *dev,
2614                               uint64_t action_flags,
2615                               const struct rte_flow_attr *attr,
2616                               struct rte_flow_error *error)
2617 {
2618         const struct mlx5_priv *priv = dev->data->dev_private;
2619
2620         if (priv->config.hca_attr.scatter_fcs_w_decap_disable &&
2621             !priv->config.decap_en)
2622                 return rte_flow_error_set(error, ENOTSUP,
2623                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2624                                           "decap is not enabled");
2625         if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
2626                 return rte_flow_error_set(error, ENOTSUP,
2627                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2628                                           action_flags &
2629                                           MLX5_FLOW_ACTION_DECAP ? "can only "
2630                                           "have a single decap action" : "decap "
2631                                           "after encap is not supported");
2632         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2633                 return rte_flow_error_set(error, EINVAL,
2634                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2635                                           "can't have decap action after"
2636                                           " modify action");
2637         if (attr->egress)
2638                 return rte_flow_error_set(error, ENOTSUP,
2639                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2640                                           NULL,
2641                                           "decap action not supported for "
2642                                           "egress");
2643         if (!attr->transfer && priv->representor)
2644                 return rte_flow_error_set(error, ENOTSUP,
2645                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2646                                           "decap action for VF representor "
2647                                           "not supported on NIC table");
2648         return 0;
2649 }
2650
2651 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
2652
2653 /**
2654  * Validate the raw encap and decap actions.
2655  *
2656  * @param[in] dev
2657  *   Pointer to the rte_eth_dev structure.
2658  * @param[in] decap
2659  *   Pointer to the decap action.
2660  * @param[in] encap
2661  *   Pointer to the encap action.
2662  * @param[in] attr
2663  *   Pointer to flow attributes
2664  * @param[in/out] action_flags
2665  *   Holds the actions detected until now.
2666  * @param[out] actions_n
2667  *   pointer to the number of actions counter.
2668  * @param[out] error
2669  *   Pointer to error structure.
2670  *
2671  * @return
2672  *   0 on success, a negative errno value otherwise and rte_errno is set.
2673  */
2674 static int
2675 flow_dv_validate_action_raw_encap_decap
2676         (struct rte_eth_dev *dev,
2677          const struct rte_flow_action_raw_decap *decap,
2678          const struct rte_flow_action_raw_encap *encap,
2679          const struct rte_flow_attr *attr, uint64_t *action_flags,
2680          int *actions_n, struct rte_flow_error *error)
2681 {
2682         const struct mlx5_priv *priv = dev->data->dev_private;
2683         int ret;
2684
2685         if (encap && (!encap->size || !encap->data))
2686                 return rte_flow_error_set(error, EINVAL,
2687                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2688                                           "raw encap data cannot be empty");
2689         if (decap && encap) {
2690                 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
2691                     encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
2692                         /* L3 encap. */
2693                         decap = NULL;
2694                 else if (encap->size <=
2695                            MLX5_ENCAPSULATION_DECISION_SIZE &&
2696                            decap->size >
2697                            MLX5_ENCAPSULATION_DECISION_SIZE)
2698                         /* L3 decap. */
2699                         encap = NULL;
2700                 else if (encap->size >
2701                            MLX5_ENCAPSULATION_DECISION_SIZE &&
2702                            decap->size >
2703                            MLX5_ENCAPSULATION_DECISION_SIZE)
2704                         /* 2 L2 actions: encap and decap. */
2705                         ;
2706                 else
2707                         return rte_flow_error_set(error,
2708                                 ENOTSUP,
2709                                 RTE_FLOW_ERROR_TYPE_ACTION,
2710                                 NULL, "unsupported too small "
2711                                 "raw decap and too small raw "
2712                                 "encap combination");
2713         }
2714         if (decap) {
2715                 ret = flow_dv_validate_action_decap(dev, *action_flags, attr,
2716                                                     error);
2717                 if (ret < 0)
2718                         return ret;
2719                 *action_flags |= MLX5_FLOW_ACTION_DECAP;
2720                 ++(*actions_n);
2721         }
2722         if (encap) {
2723                 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
2724                         return rte_flow_error_set(error, ENOTSUP,
2725                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2726                                                   NULL,
2727                                                   "small raw encap size");
2728                 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
2729                         return rte_flow_error_set(error, EINVAL,
2730                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2731                                                   NULL,
2732                                                   "more than one encap action");
2733                 if (!attr->transfer && priv->representor)
2734                         return rte_flow_error_set
2735                                         (error, ENOTSUP,
2736                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2737                                          "encap action for VF representor "
2738                                          "not supported on NIC table");
2739                 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
2740                 ++(*actions_n);
2741         }
2742         return 0;
2743 }
2744
2745 /**
2746  * Match encap_decap resource.
2747  *
2748  * @param list
2749  *   Pointer to the hash list.
2750  * @param entry
2751  *   Pointer to exist resource entry object.
2752  * @param key
2753  *   Key of the new entry.
2754  * @param ctx_cb
2755  *   Pointer to new encap_decap resource.
2756  *
2757  * @return
2758  *   0 on matching, none-zero otherwise.
2759  */
2760 int
2761 flow_dv_encap_decap_match_cb(struct mlx5_hlist *list __rte_unused,
2762                              struct mlx5_hlist_entry *entry,
2763                              uint64_t key __rte_unused, void *cb_ctx)
2764 {
2765         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2766         struct mlx5_flow_dv_encap_decap_resource *resource = ctx->data;
2767         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2768
2769         cache_resource = container_of(entry,
2770                                       struct mlx5_flow_dv_encap_decap_resource,
2771                                       entry);
2772         if (resource->entry.key == cache_resource->entry.key &&
2773             resource->reformat_type == cache_resource->reformat_type &&
2774             resource->ft_type == cache_resource->ft_type &&
2775             resource->flags == cache_resource->flags &&
2776             resource->size == cache_resource->size &&
2777             !memcmp((const void *)resource->buf,
2778                     (const void *)cache_resource->buf,
2779                     resource->size))
2780                 return 0;
2781         return -1;
2782 }
2783
2784 /**
2785  * Allocate encap_decap resource.
2786  *
2787  * @param list
2788  *   Pointer to the hash list.
2789  * @param entry
2790  *   Pointer to exist resource entry object.
2791  * @param ctx_cb
2792  *   Pointer to new encap_decap resource.
2793  *
2794  * @return
2795  *   0 on matching, none-zero otherwise.
2796  */
2797 struct mlx5_hlist_entry *
2798 flow_dv_encap_decap_create_cb(struct mlx5_hlist *list,
2799                               uint64_t key __rte_unused,
2800                               void *cb_ctx)
2801 {
2802         struct mlx5_dev_ctx_shared *sh = list->ctx;
2803         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2804         struct mlx5dv_dr_domain *domain;
2805         struct mlx5_flow_dv_encap_decap_resource *resource = ctx->data;
2806         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2807         uint32_t idx;
2808         int ret;
2809
2810         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2811                 domain = sh->fdb_domain;
2812         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2813                 domain = sh->rx_domain;
2814         else
2815                 domain = sh->tx_domain;
2816         /* Register new encap/decap resource. */
2817         cache_resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
2818                                        &idx);
2819         if (!cache_resource) {
2820                 rte_flow_error_set(ctx->error, ENOMEM,
2821                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2822                                    "cannot allocate resource memory");
2823                 return NULL;
2824         }
2825         *cache_resource = *resource;
2826         cache_resource->idx = idx;
2827         ret = mlx5_flow_os_create_flow_action_packet_reformat
2828                                         (sh->ctx, domain, cache_resource,
2829                                          &cache_resource->action);
2830         if (ret) {
2831                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], idx);
2832                 rte_flow_error_set(ctx->error, ENOMEM,
2833                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2834                                    NULL, "cannot create action");
2835                 return NULL;
2836         }
2837
2838         return &cache_resource->entry;
2839 }
2840
2841 /**
2842  * Find existing encap/decap resource or create and register a new one.
2843  *
2844  * @param[in, out] dev
2845  *   Pointer to rte_eth_dev structure.
2846  * @param[in, out] resource
2847  *   Pointer to encap/decap resource.
2848  * @parm[in, out] dev_flow
2849  *   Pointer to the dev_flow.
2850  * @param[out] error
2851  *   pointer to error structure.
2852  *
2853  * @return
2854  *   0 on success otherwise -errno and errno is set.
2855  */
2856 static int
2857 flow_dv_encap_decap_resource_register
2858                         (struct rte_eth_dev *dev,
2859                          struct mlx5_flow_dv_encap_decap_resource *resource,
2860                          struct mlx5_flow *dev_flow,
2861                          struct rte_flow_error *error)
2862 {
2863         struct mlx5_priv *priv = dev->data->dev_private;
2864         struct mlx5_dev_ctx_shared *sh = priv->sh;
2865         struct mlx5_hlist_entry *entry;
2866         union mlx5_flow_encap_decap_key encap_decap_key = {
2867                 {
2868                         .ft_type = resource->ft_type,
2869                         .refmt_type = resource->reformat_type,
2870                         .buf_size = resource->size,
2871                         .table_level = !!dev_flow->dv.group,
2872                         .cksum = 0,
2873                 }
2874         };
2875         struct mlx5_flow_cb_ctx ctx = {
2876                 .error = error,
2877                 .data = resource,
2878         };
2879
2880         resource->flags = dev_flow->dv.group ? 0 : 1;
2881         encap_decap_key.cksum = __rte_raw_cksum(resource->buf,
2882                                                 resource->size, 0);
2883         resource->entry.key = encap_decap_key.v64;
2884         entry = mlx5_hlist_register(sh->encaps_decaps, resource->entry.key,
2885                                     &ctx);
2886         if (!entry)
2887                 return -rte_errno;
2888         resource = container_of(entry, typeof(*resource), entry);
2889         dev_flow->dv.encap_decap = resource;
2890         dev_flow->handle->dvh.rix_encap_decap = resource->idx;
2891         return 0;
2892 }
2893
2894 /**
2895  * Find existing table jump resource or create and register a new one.
2896  *
2897  * @param[in, out] dev
2898  *   Pointer to rte_eth_dev structure.
2899  * @param[in, out] tbl
2900  *   Pointer to flow table resource.
2901  * @parm[in, out] dev_flow
2902  *   Pointer to the dev_flow.
2903  * @param[out] error
2904  *   pointer to error structure.
2905  *
2906  * @return
2907  *   0 on success otherwise -errno and errno is set.
2908  */
2909 static int
2910 flow_dv_jump_tbl_resource_register
2911                         (struct rte_eth_dev *dev __rte_unused,
2912                          struct mlx5_flow_tbl_resource *tbl,
2913                          struct mlx5_flow *dev_flow,
2914                          struct rte_flow_error *error __rte_unused)
2915 {
2916         struct mlx5_flow_tbl_data_entry *tbl_data =
2917                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
2918
2919         MLX5_ASSERT(tbl);
2920         MLX5_ASSERT(tbl_data->jump.action);
2921         dev_flow->handle->rix_jump = tbl_data->idx;
2922         dev_flow->dv.jump = &tbl_data->jump;
2923         return 0;
2924 }
2925
2926 int
2927 flow_dv_port_id_match_cb(struct mlx5_cache_list *list __rte_unused,
2928                          struct mlx5_cache_entry *entry, void *cb_ctx)
2929 {
2930         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2931         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
2932         struct mlx5_flow_dv_port_id_action_resource *res =
2933                         container_of(entry, typeof(*res), entry);
2934
2935         return ref->port_id != res->port_id;
2936 }
2937
2938 struct mlx5_cache_entry *
2939 flow_dv_port_id_create_cb(struct mlx5_cache_list *list,
2940                           struct mlx5_cache_entry *entry __rte_unused,
2941                           void *cb_ctx)
2942 {
2943         struct mlx5_dev_ctx_shared *sh = list->ctx;
2944         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2945         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
2946         struct mlx5_flow_dv_port_id_action_resource *cache;
2947         uint32_t idx;
2948         int ret;
2949
2950         /* Register new port id action resource. */
2951         cache = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
2952         if (!cache) {
2953                 rte_flow_error_set(ctx->error, ENOMEM,
2954                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2955                                    "cannot allocate port_id action cache memory");
2956                 return NULL;
2957         }
2958         *cache = *ref;
2959         ret = mlx5_flow_os_create_flow_action_dest_port(sh->fdb_domain,
2960                                                         ref->port_id,
2961                                                         &cache->action);
2962         if (ret) {
2963                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], idx);
2964                 rte_flow_error_set(ctx->error, ENOMEM,
2965                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2966                                    "cannot create action");
2967                 return NULL;
2968         }
2969         return &cache->entry;
2970 }
2971
2972 /**
2973  * Find existing table port ID resource or create and register a new one.
2974  *
2975  * @param[in, out] dev
2976  *   Pointer to rte_eth_dev structure.
2977  * @param[in, out] resource
2978  *   Pointer to port ID action resource.
2979  * @parm[in, out] dev_flow
2980  *   Pointer to the dev_flow.
2981  * @param[out] error
2982  *   pointer to error structure.
2983  *
2984  * @return
2985  *   0 on success otherwise -errno and errno is set.
2986  */
2987 static int
2988 flow_dv_port_id_action_resource_register
2989                         (struct rte_eth_dev *dev,
2990                          struct mlx5_flow_dv_port_id_action_resource *resource,
2991                          struct mlx5_flow *dev_flow,
2992                          struct rte_flow_error *error)
2993 {
2994         struct mlx5_priv *priv = dev->data->dev_private;
2995         struct mlx5_cache_entry *entry;
2996         struct mlx5_flow_dv_port_id_action_resource *cache;
2997         struct mlx5_flow_cb_ctx ctx = {
2998                 .error = error,
2999                 .data = resource,
3000         };
3001
3002         entry = mlx5_cache_register(&priv->sh->port_id_action_list, &ctx);
3003         if (!entry)
3004                 return -rte_errno;
3005         cache = container_of(entry, typeof(*cache), entry);
3006         dev_flow->dv.port_id_action = cache;
3007         dev_flow->handle->rix_port_id_action = cache->idx;
3008         return 0;
3009 }
3010
3011 int
3012 flow_dv_push_vlan_match_cb(struct mlx5_cache_list *list __rte_unused,
3013                          struct mlx5_cache_entry *entry, void *cb_ctx)
3014 {
3015         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3016         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3017         struct mlx5_flow_dv_push_vlan_action_resource *res =
3018                         container_of(entry, typeof(*res), entry);
3019
3020         return ref->vlan_tag != res->vlan_tag || ref->ft_type != res->ft_type;
3021 }
3022
3023 struct mlx5_cache_entry *
3024 flow_dv_push_vlan_create_cb(struct mlx5_cache_list *list,
3025                           struct mlx5_cache_entry *entry __rte_unused,
3026                           void *cb_ctx)
3027 {
3028         struct mlx5_dev_ctx_shared *sh = list->ctx;
3029         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3030         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3031         struct mlx5_flow_dv_push_vlan_action_resource *cache;
3032         struct mlx5dv_dr_domain *domain;
3033         uint32_t idx;
3034         int ret;
3035
3036         /* Register new port id action resource. */
3037         cache = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3038         if (!cache) {
3039                 rte_flow_error_set(ctx->error, ENOMEM,
3040                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3041                                    "cannot allocate push_vlan action cache memory");
3042                 return NULL;
3043         }
3044         *cache = *ref;
3045         if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3046                 domain = sh->fdb_domain;
3047         else if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3048                 domain = sh->rx_domain;
3049         else
3050                 domain = sh->tx_domain;
3051         ret = mlx5_flow_os_create_flow_action_push_vlan(domain, ref->vlan_tag,
3052                                                         &cache->action);
3053         if (ret) {
3054                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
3055                 rte_flow_error_set(ctx->error, ENOMEM,
3056                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3057                                    "cannot create push vlan action");
3058                 return NULL;
3059         }
3060         return &cache->entry;
3061 }
3062
3063 /**
3064  * Find existing push vlan resource or create and register a new one.
3065  *
3066  * @param [in, out] dev
3067  *   Pointer to rte_eth_dev structure.
3068  * @param[in, out] resource
3069  *   Pointer to port ID action resource.
3070  * @parm[in, out] dev_flow
3071  *   Pointer to the dev_flow.
3072  * @param[out] error
3073  *   pointer to error structure.
3074  *
3075  * @return
3076  *   0 on success otherwise -errno and errno is set.
3077  */
3078 static int
3079 flow_dv_push_vlan_action_resource_register
3080                        (struct rte_eth_dev *dev,
3081                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
3082                         struct mlx5_flow *dev_flow,
3083                         struct rte_flow_error *error)
3084 {
3085         struct mlx5_priv *priv = dev->data->dev_private;
3086         struct mlx5_flow_dv_push_vlan_action_resource *cache;
3087         struct mlx5_cache_entry *entry;
3088         struct mlx5_flow_cb_ctx ctx = {
3089                 .error = error,
3090                 .data = resource,
3091         };
3092
3093         entry = mlx5_cache_register(&priv->sh->push_vlan_action_list, &ctx);
3094         if (!entry)
3095                 return -rte_errno;
3096         cache = container_of(entry, typeof(*cache), entry);
3097
3098         dev_flow->handle->dvh.rix_push_vlan = cache->idx;
3099         dev_flow->dv.push_vlan_res = cache;
3100         return 0;
3101 }
3102
3103 /**
3104  * Get the size of specific rte_flow_item_type hdr size
3105  *
3106  * @param[in] item_type
3107  *   Tested rte_flow_item_type.
3108  *
3109  * @return
3110  *   sizeof struct item_type, 0 if void or irrelevant.
3111  */
3112 static size_t
3113 flow_dv_get_item_hdr_len(const enum rte_flow_item_type item_type)
3114 {
3115         size_t retval;
3116
3117         switch (item_type) {
3118         case RTE_FLOW_ITEM_TYPE_ETH:
3119                 retval = sizeof(struct rte_ether_hdr);
3120                 break;
3121         case RTE_FLOW_ITEM_TYPE_VLAN:
3122                 retval = sizeof(struct rte_vlan_hdr);
3123                 break;
3124         case RTE_FLOW_ITEM_TYPE_IPV4:
3125                 retval = sizeof(struct rte_ipv4_hdr);
3126                 break;
3127         case RTE_FLOW_ITEM_TYPE_IPV6:
3128                 retval = sizeof(struct rte_ipv6_hdr);
3129                 break;
3130         case RTE_FLOW_ITEM_TYPE_UDP:
3131                 retval = sizeof(struct rte_udp_hdr);
3132                 break;
3133         case RTE_FLOW_ITEM_TYPE_TCP:
3134                 retval = sizeof(struct rte_tcp_hdr);
3135                 break;
3136         case RTE_FLOW_ITEM_TYPE_VXLAN:
3137         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
3138                 retval = sizeof(struct rte_vxlan_hdr);
3139                 break;
3140         case RTE_FLOW_ITEM_TYPE_GRE:
3141         case RTE_FLOW_ITEM_TYPE_NVGRE:
3142                 retval = sizeof(struct rte_gre_hdr);
3143                 break;
3144         case RTE_FLOW_ITEM_TYPE_MPLS:
3145                 retval = sizeof(struct rte_mpls_hdr);
3146                 break;
3147         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
3148         default:
3149                 retval = 0;
3150                 break;
3151         }
3152         return retval;
3153 }
3154
3155 #define MLX5_ENCAP_IPV4_VERSION         0x40
3156 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
3157 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
3158 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
3159 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
3160 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
3161 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
3162
3163 /**
3164  * Convert the encap action data from list of rte_flow_item to raw buffer
3165  *
3166  * @param[in] items
3167  *   Pointer to rte_flow_item objects list.
3168  * @param[out] buf
3169  *   Pointer to the output buffer.
3170  * @param[out] size
3171  *   Pointer to the output buffer size.
3172  * @param[out] error
3173  *   Pointer to the error structure.
3174  *
3175  * @return
3176  *   0 on success, a negative errno value otherwise and rte_errno is set.
3177  */
3178 static int
3179 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
3180                            size_t *size, struct rte_flow_error *error)
3181 {
3182         struct rte_ether_hdr *eth = NULL;
3183         struct rte_vlan_hdr *vlan = NULL;
3184         struct rte_ipv4_hdr *ipv4 = NULL;
3185         struct rte_ipv6_hdr *ipv6 = NULL;
3186         struct rte_udp_hdr *udp = NULL;
3187         struct rte_vxlan_hdr *vxlan = NULL;
3188         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
3189         struct rte_gre_hdr *gre = NULL;
3190         size_t len;
3191         size_t temp_size = 0;
3192
3193         if (!items)
3194                 return rte_flow_error_set(error, EINVAL,
3195                                           RTE_FLOW_ERROR_TYPE_ACTION,
3196                                           NULL, "invalid empty data");
3197         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
3198                 len = flow_dv_get_item_hdr_len(items->type);
3199                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
3200                         return rte_flow_error_set(error, EINVAL,
3201                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3202                                                   (void *)items->type,
3203                                                   "items total size is too big"
3204                                                   " for encap action");
3205                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
3206                 switch (items->type) {
3207                 case RTE_FLOW_ITEM_TYPE_ETH:
3208                         eth = (struct rte_ether_hdr *)&buf[temp_size];
3209                         break;
3210                 case RTE_FLOW_ITEM_TYPE_VLAN:
3211                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
3212                         if (!eth)
3213                                 return rte_flow_error_set(error, EINVAL,
3214                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3215                                                 (void *)items->type,
3216                                                 "eth header not found");
3217                         if (!eth->ether_type)
3218                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
3219                         break;
3220                 case RTE_FLOW_ITEM_TYPE_IPV4:
3221                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
3222                         if (!vlan && !eth)
3223                                 return rte_flow_error_set(error, EINVAL,
3224                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3225                                                 (void *)items->type,
3226                                                 "neither eth nor vlan"
3227                                                 " header found");
3228                         if (vlan && !vlan->eth_proto)
3229                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
3230                         else if (eth && !eth->ether_type)
3231                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
3232                         if (!ipv4->version_ihl)
3233                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
3234                                                     MLX5_ENCAP_IPV4_IHL_MIN;
3235                         if (!ipv4->time_to_live)
3236                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
3237                         break;
3238                 case RTE_FLOW_ITEM_TYPE_IPV6:
3239                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
3240                         if (!vlan && !eth)
3241                                 return rte_flow_error_set(error, EINVAL,
3242                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3243                                                 (void *)items->type,
3244                                                 "neither eth nor vlan"
3245                                                 " header found");
3246                         if (vlan && !vlan->eth_proto)
3247                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
3248                         else if (eth && !eth->ether_type)
3249                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
3250                         if (!ipv6->vtc_flow)
3251                                 ipv6->vtc_flow =
3252                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
3253                         if (!ipv6->hop_limits)
3254                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
3255                         break;
3256                 case RTE_FLOW_ITEM_TYPE_UDP:
3257                         udp = (struct rte_udp_hdr *)&buf[temp_size];
3258                         if (!ipv4 && !ipv6)
3259                                 return rte_flow_error_set(error, EINVAL,
3260                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3261                                                 (void *)items->type,
3262                                                 "ip header not found");
3263                         if (ipv4 && !ipv4->next_proto_id)
3264                                 ipv4->next_proto_id = IPPROTO_UDP;
3265                         else if (ipv6 && !ipv6->proto)
3266                                 ipv6->proto = IPPROTO_UDP;
3267                         break;
3268                 case RTE_FLOW_ITEM_TYPE_VXLAN:
3269                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
3270                         if (!udp)
3271                                 return rte_flow_error_set(error, EINVAL,
3272                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3273                                                 (void *)items->type,
3274                                                 "udp header not found");
3275                         if (!udp->dst_port)
3276                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
3277                         if (!vxlan->vx_flags)
3278                                 vxlan->vx_flags =
3279                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
3280                         break;
3281                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
3282                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
3283                         if (!udp)
3284                                 return rte_flow_error_set(error, EINVAL,
3285                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3286                                                 (void *)items->type,
3287                                                 "udp header not found");
3288                         if (!vxlan_gpe->proto)
3289                                 return rte_flow_error_set(error, EINVAL,
3290                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3291                                                 (void *)items->type,
3292                                                 "next protocol not found");
3293                         if (!udp->dst_port)
3294                                 udp->dst_port =
3295                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
3296                         if (!vxlan_gpe->vx_flags)
3297                                 vxlan_gpe->vx_flags =
3298                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
3299                         break;
3300                 case RTE_FLOW_ITEM_TYPE_GRE:
3301                 case RTE_FLOW_ITEM_TYPE_NVGRE:
3302                         gre = (struct rte_gre_hdr *)&buf[temp_size];
3303                         if (!gre->proto)
3304                                 return rte_flow_error_set(error, EINVAL,
3305                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3306                                                 (void *)items->type,
3307                                                 "next protocol not found");
3308                         if (!ipv4 && !ipv6)
3309                                 return rte_flow_error_set(error, EINVAL,
3310                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3311                                                 (void *)items->type,
3312                                                 "ip header not found");
3313                         if (ipv4 && !ipv4->next_proto_id)
3314                                 ipv4->next_proto_id = IPPROTO_GRE;
3315                         else if (ipv6 && !ipv6->proto)
3316                                 ipv6->proto = IPPROTO_GRE;
3317                         break;
3318                 case RTE_FLOW_ITEM_TYPE_VOID:
3319                         break;
3320                 default:
3321                         return rte_flow_error_set(error, EINVAL,
3322                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3323                                                   (void *)items->type,
3324                                                   "unsupported item type");
3325                         break;
3326                 }
3327                 temp_size += len;
3328         }
3329         *size = temp_size;
3330         return 0;
3331 }
3332
3333 static int
3334 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
3335 {
3336         struct rte_ether_hdr *eth = NULL;
3337         struct rte_vlan_hdr *vlan = NULL;
3338         struct rte_ipv6_hdr *ipv6 = NULL;
3339         struct rte_udp_hdr *udp = NULL;
3340         char *next_hdr;
3341         uint16_t proto;
3342
3343         eth = (struct rte_ether_hdr *)data;
3344         next_hdr = (char *)(eth + 1);
3345         proto = RTE_BE16(eth->ether_type);
3346
3347         /* VLAN skipping */
3348         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
3349                 vlan = (struct rte_vlan_hdr *)next_hdr;
3350                 proto = RTE_BE16(vlan->eth_proto);
3351                 next_hdr += sizeof(struct rte_vlan_hdr);
3352         }
3353
3354         /* HW calculates IPv4 csum. no need to proceed */
3355         if (proto == RTE_ETHER_TYPE_IPV4)
3356                 return 0;
3357
3358         /* non IPv4/IPv6 header. not supported */
3359         if (proto != RTE_ETHER_TYPE_IPV6) {
3360                 return rte_flow_error_set(error, ENOTSUP,
3361                                           RTE_FLOW_ERROR_TYPE_ACTION,
3362                                           NULL, "Cannot offload non IPv4/IPv6");
3363         }
3364
3365         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
3366
3367         /* ignore non UDP */
3368         if (ipv6->proto != IPPROTO_UDP)
3369                 return 0;
3370
3371         udp = (struct rte_udp_hdr *)(ipv6 + 1);
3372         udp->dgram_cksum = 0;
3373
3374         return 0;
3375 }
3376
3377 /**
3378  * Convert L2 encap action to DV specification.
3379  *
3380  * @param[in] dev
3381  *   Pointer to rte_eth_dev structure.
3382  * @param[in] action
3383  *   Pointer to action structure.
3384  * @param[in, out] dev_flow
3385  *   Pointer to the mlx5_flow.
3386  * @param[in] transfer
3387  *   Mark if the flow is E-Switch flow.
3388  * @param[out] error
3389  *   Pointer to the error structure.
3390  *
3391  * @return
3392  *   0 on success, a negative errno value otherwise and rte_errno is set.
3393  */
3394 static int
3395 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
3396                                const struct rte_flow_action *action,
3397                                struct mlx5_flow *dev_flow,
3398                                uint8_t transfer,
3399                                struct rte_flow_error *error)
3400 {
3401         const struct rte_flow_item *encap_data;
3402         const struct rte_flow_action_raw_encap *raw_encap_data;
3403         struct mlx5_flow_dv_encap_decap_resource res = {
3404                 .reformat_type =
3405                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
3406                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
3407                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
3408         };
3409
3410         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
3411                 raw_encap_data =
3412                         (const struct rte_flow_action_raw_encap *)action->conf;
3413                 res.size = raw_encap_data->size;
3414                 memcpy(res.buf, raw_encap_data->data, res.size);
3415         } else {
3416                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
3417                         encap_data =
3418                                 ((const struct rte_flow_action_vxlan_encap *)
3419                                                 action->conf)->definition;
3420                 else
3421                         encap_data =
3422                                 ((const struct rte_flow_action_nvgre_encap *)
3423                                                 action->conf)->definition;
3424                 if (flow_dv_convert_encap_data(encap_data, res.buf,
3425                                                &res.size, error))
3426                         return -rte_errno;
3427         }
3428         if (flow_dv_zero_encap_udp_csum(res.buf, error))
3429                 return -rte_errno;
3430         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
3431                 return rte_flow_error_set(error, EINVAL,
3432                                           RTE_FLOW_ERROR_TYPE_ACTION,
3433                                           NULL, "can't create L2 encap action");
3434         return 0;
3435 }
3436
3437 /**
3438  * Convert L2 decap action to DV specification.
3439  *
3440  * @param[in] dev
3441  *   Pointer to rte_eth_dev structure.
3442  * @param[in, out] dev_flow
3443  *   Pointer to the mlx5_flow.
3444  * @param[in] transfer
3445  *   Mark if the flow is E-Switch flow.
3446  * @param[out] error
3447  *   Pointer to the error structure.
3448  *
3449  * @return
3450  *   0 on success, a negative errno value otherwise and rte_errno is set.
3451  */
3452 static int
3453 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
3454                                struct mlx5_flow *dev_flow,
3455                                uint8_t transfer,
3456                                struct rte_flow_error *error)
3457 {
3458         struct mlx5_flow_dv_encap_decap_resource res = {
3459                 .size = 0,
3460                 .reformat_type =
3461                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
3462                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
3463                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
3464         };
3465
3466         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
3467                 return rte_flow_error_set(error, EINVAL,
3468                                           RTE_FLOW_ERROR_TYPE_ACTION,
3469                                           NULL, "can't create L2 decap action");
3470         return 0;
3471 }
3472
3473 /**
3474  * Convert raw decap/encap (L3 tunnel) action to DV specification.
3475  *
3476  * @param[in] dev
3477  *   Pointer to rte_eth_dev structure.
3478  * @param[in] action
3479  *   Pointer to action structure.
3480  * @param[in, out] dev_flow
3481  *   Pointer to the mlx5_flow.
3482  * @param[in] attr
3483  *   Pointer to the flow attributes.
3484  * @param[out] error
3485  *   Pointer to the error structure.
3486  *
3487  * @return
3488  *   0 on success, a negative errno value otherwise and rte_errno is set.
3489  */
3490 static int
3491 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
3492                                 const struct rte_flow_action *action,
3493                                 struct mlx5_flow *dev_flow,
3494                                 const struct rte_flow_attr *attr,
3495                                 struct rte_flow_error *error)
3496 {
3497         const struct rte_flow_action_raw_encap *encap_data;
3498         struct mlx5_flow_dv_encap_decap_resource res;
3499
3500         memset(&res, 0, sizeof(res));
3501         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
3502         res.size = encap_data->size;
3503         memcpy(res.buf, encap_data->data, res.size);
3504         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
3505                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
3506                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
3507         if (attr->transfer)
3508                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3509         else
3510                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3511                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3512         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
3513                 return rte_flow_error_set(error, EINVAL,
3514                                           RTE_FLOW_ERROR_TYPE_ACTION,
3515                                           NULL, "can't create encap action");
3516         return 0;
3517 }
3518
3519 /**
3520  * Create action push VLAN.
3521  *
3522  * @param[in] dev
3523  *   Pointer to rte_eth_dev structure.
3524  * @param[in] attr
3525  *   Pointer to the flow attributes.
3526  * @param[in] vlan
3527  *   Pointer to the vlan to push to the Ethernet header.
3528  * @param[in, out] dev_flow
3529  *   Pointer to the mlx5_flow.
3530  * @param[out] error
3531  *   Pointer to the error structure.
3532  *
3533  * @return
3534  *   0 on success, a negative errno value otherwise and rte_errno is set.
3535  */
3536 static int
3537 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
3538                                 const struct rte_flow_attr *attr,
3539                                 const struct rte_vlan_hdr *vlan,
3540                                 struct mlx5_flow *dev_flow,
3541                                 struct rte_flow_error *error)
3542 {
3543         struct mlx5_flow_dv_push_vlan_action_resource res;
3544
3545         memset(&res, 0, sizeof(res));
3546         res.vlan_tag =
3547                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
3548                                  vlan->vlan_tci);
3549         if (attr->transfer)
3550                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3551         else
3552                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3553                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3554         return flow_dv_push_vlan_action_resource_register
3555                                             (dev, &res, dev_flow, error);
3556 }
3557
3558 static int fdb_mirror;
3559
3560 /**
3561  * Validate the modify-header actions.
3562  *
3563  * @param[in] action_flags
3564  *   Holds the actions detected until now.
3565  * @param[in] action
3566  *   Pointer to the modify action.
3567  * @param[out] error
3568  *   Pointer to error structure.
3569  *
3570  * @return
3571  *   0 on success, a negative errno value otherwise and rte_errno is set.
3572  */
3573 static int
3574 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
3575                                    const struct rte_flow_action *action,
3576                                    struct rte_flow_error *error)
3577 {
3578         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
3579                 return rte_flow_error_set(error, EINVAL,
3580                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3581                                           NULL, "action configuration not set");
3582         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3583                 return rte_flow_error_set(error, EINVAL,
3584                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3585                                           "can't have encap action before"
3586                                           " modify action");
3587         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) && fdb_mirror)
3588                 return rte_flow_error_set(error, EINVAL,
3589                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3590                                           "can't support sample action before"
3591                                           " modify action for E-Switch"
3592                                           " mirroring");
3593         return 0;
3594 }
3595
3596 /**
3597  * Validate the modify-header MAC address actions.
3598  *
3599  * @param[in] action_flags
3600  *   Holds the actions detected until now.
3601  * @param[in] action
3602  *   Pointer to the modify action.
3603  * @param[in] item_flags
3604  *   Holds the items detected.
3605  * @param[out] error
3606  *   Pointer to error structure.
3607  *
3608  * @return
3609  *   0 on success, a negative errno value otherwise and rte_errno is set.
3610  */
3611 static int
3612 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
3613                                    const struct rte_flow_action *action,
3614                                    const uint64_t item_flags,
3615                                    struct rte_flow_error *error)
3616 {
3617         int ret = 0;
3618
3619         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3620         if (!ret) {
3621                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
3622                         return rte_flow_error_set(error, EINVAL,
3623                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3624                                                   NULL,
3625                                                   "no L2 item in pattern");
3626         }
3627         return ret;
3628 }
3629
3630 /**
3631  * Validate the modify-header IPv4 address actions.
3632  *
3633  * @param[in] action_flags
3634  *   Holds the actions detected until now.
3635  * @param[in] action
3636  *   Pointer to the modify action.
3637  * @param[in] item_flags
3638  *   Holds the items detected.
3639  * @param[out] error
3640  *   Pointer to error structure.
3641  *
3642  * @return
3643  *   0 on success, a negative errno value otherwise and rte_errno is set.
3644  */
3645 static int
3646 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
3647                                     const struct rte_flow_action *action,
3648                                     const uint64_t item_flags,
3649                                     struct rte_flow_error *error)
3650 {
3651         int ret = 0;
3652         uint64_t layer;
3653
3654         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3655         if (!ret) {
3656                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3657                                  MLX5_FLOW_LAYER_INNER_L3_IPV4 :
3658                                  MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3659                 if (!(item_flags & layer))
3660                         return rte_flow_error_set(error, EINVAL,
3661                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3662                                                   NULL,
3663                                                   "no ipv4 item in pattern");
3664         }
3665         return ret;
3666 }
3667
3668 /**
3669  * Validate the modify-header IPv6 address actions.
3670  *
3671  * @param[in] action_flags
3672  *   Holds the actions detected until now.
3673  * @param[in] action
3674  *   Pointer to the modify action.
3675  * @param[in] item_flags
3676  *   Holds the items detected.
3677  * @param[out] error
3678  *   Pointer to error structure.
3679  *
3680  * @return
3681  *   0 on success, a negative errno value otherwise and rte_errno is set.
3682  */
3683 static int
3684 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
3685                                     const struct rte_flow_action *action,
3686                                     const uint64_t item_flags,
3687                                     struct rte_flow_error *error)
3688 {
3689         int ret = 0;
3690         uint64_t layer;
3691
3692         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3693         if (!ret) {
3694                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3695                                  MLX5_FLOW_LAYER_INNER_L3_IPV6 :
3696                                  MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3697                 if (!(item_flags & layer))
3698                         return rte_flow_error_set(error, EINVAL,
3699                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3700                                                   NULL,
3701                                                   "no ipv6 item in pattern");
3702         }
3703         return ret;
3704 }
3705
3706 /**
3707  * Validate the modify-header TP actions.
3708  *
3709  * @param[in] action_flags
3710  *   Holds the actions detected until now.
3711  * @param[in] action
3712  *   Pointer to the modify action.
3713  * @param[in] item_flags
3714  *   Holds the items detected.
3715  * @param[out] error
3716  *   Pointer to error structure.
3717  *
3718  * @return
3719  *   0 on success, a negative errno value otherwise and rte_errno is set.
3720  */
3721 static int
3722 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
3723                                   const struct rte_flow_action *action,
3724                                   const uint64_t item_flags,
3725                                   struct rte_flow_error *error)
3726 {
3727         int ret = 0;
3728         uint64_t layer;
3729
3730         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3731         if (!ret) {
3732                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3733                                  MLX5_FLOW_LAYER_INNER_L4 :
3734                                  MLX5_FLOW_LAYER_OUTER_L4;
3735                 if (!(item_flags & layer))
3736                         return rte_flow_error_set(error, EINVAL,
3737                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3738                                                   NULL, "no transport layer "
3739                                                   "in pattern");
3740         }
3741         return ret;
3742 }
3743
3744 /**
3745  * Validate the modify-header actions of increment/decrement
3746  * TCP Sequence-number.
3747  *
3748  * @param[in] action_flags
3749  *   Holds the actions detected until now.
3750  * @param[in] action
3751  *   Pointer to the modify action.
3752  * @param[in] item_flags
3753  *   Holds the items detected.
3754  * @param[out] error
3755  *   Pointer to error structure.
3756  *
3757  * @return
3758  *   0 on success, a negative errno value otherwise and rte_errno is set.
3759  */
3760 static int
3761 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
3762                                        const struct rte_flow_action *action,
3763                                        const uint64_t item_flags,
3764                                        struct rte_flow_error *error)
3765 {
3766         int ret = 0;
3767         uint64_t layer;
3768
3769         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3770         if (!ret) {
3771                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3772                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
3773                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
3774                 if (!(item_flags & layer))
3775                         return rte_flow_error_set(error, EINVAL,
3776                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3777                                                   NULL, "no TCP item in"
3778                                                   " pattern");
3779                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
3780                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
3781                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
3782                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
3783                         return rte_flow_error_set(error, EINVAL,
3784                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3785                                                   NULL,
3786                                                   "cannot decrease and increase"
3787                                                   " TCP sequence number"
3788                                                   " at the same time");
3789         }
3790         return ret;
3791 }
3792
3793 /**
3794  * Validate the modify-header actions of increment/decrement
3795  * TCP Acknowledgment number.
3796  *
3797  * @param[in] action_flags
3798  *   Holds the actions detected until now.
3799  * @param[in] action
3800  *   Pointer to the modify action.
3801  * @param[in] item_flags
3802  *   Holds the items detected.
3803  * @param[out] error
3804  *   Pointer to error structure.
3805  *
3806  * @return
3807  *   0 on success, a negative errno value otherwise and rte_errno is set.
3808  */
3809 static int
3810 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
3811                                        const struct rte_flow_action *action,
3812                                        const uint64_t item_flags,
3813                                        struct rte_flow_error *error)
3814 {
3815         int ret = 0;
3816         uint64_t layer;
3817
3818         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3819         if (!ret) {
3820                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3821                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
3822                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
3823                 if (!(item_flags & layer))
3824                         return rte_flow_error_set(error, EINVAL,
3825                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3826                                                   NULL, "no TCP item in"
3827                                                   " pattern");
3828                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
3829                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
3830                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
3831                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
3832                         return rte_flow_error_set(error, EINVAL,
3833                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3834                                                   NULL,
3835                                                   "cannot decrease and increase"
3836                                                   " TCP acknowledgment number"
3837                                                   " at the same time");
3838         }
3839         return ret;
3840 }
3841
3842 /**
3843  * Validate the modify-header TTL actions.
3844  *
3845  * @param[in] action_flags
3846  *   Holds the actions detected until now.
3847  * @param[in] action
3848  *   Pointer to the modify action.
3849  * @param[in] item_flags
3850  *   Holds the items detected.
3851  * @param[out] error
3852  *   Pointer to error structure.
3853  *
3854  * @return
3855  *   0 on success, a negative errno value otherwise and rte_errno is set.
3856  */
3857 static int
3858 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
3859                                    const struct rte_flow_action *action,
3860                                    const uint64_t item_flags,
3861                                    struct rte_flow_error *error)
3862 {
3863         int ret = 0;
3864         uint64_t layer;
3865
3866         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3867         if (!ret) {
3868                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3869                                  MLX5_FLOW_LAYER_INNER_L3 :
3870                                  MLX5_FLOW_LAYER_OUTER_L3;
3871                 if (!(item_flags & layer))
3872                         return rte_flow_error_set(error, EINVAL,
3873                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3874                                                   NULL,
3875                                                   "no IP protocol in pattern");
3876         }
3877         return ret;
3878 }
3879
3880 /**
3881  * Validate jump action.
3882  *
3883  * @param[in] action
3884  *   Pointer to the jump action.
3885  * @param[in] action_flags
3886  *   Holds the actions detected until now.
3887  * @param[in] attributes
3888  *   Pointer to flow attributes
3889  * @param[in] external
3890  *   Action belongs to flow rule created by request external to PMD.
3891  * @param[out] error
3892  *   Pointer to error structure.
3893  *
3894  * @return
3895  *   0 on success, a negative errno value otherwise and rte_errno is set.
3896  */
3897 static int
3898 flow_dv_validate_action_jump(struct rte_eth_dev *dev,
3899                              const struct mlx5_flow_tunnel *tunnel,
3900                              const struct rte_flow_action *action,
3901                              uint64_t action_flags,
3902                              const struct rte_flow_attr *attributes,
3903                              bool external, struct rte_flow_error *error)
3904 {
3905         uint32_t target_group, table;
3906         int ret = 0;
3907         struct flow_grp_info grp_info = {
3908                 .external = !!external,
3909                 .transfer = !!attributes->transfer,
3910                 .fdb_def_rule = 1,
3911                 .std_tbl_fix = 0
3912         };
3913         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3914                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3915                 return rte_flow_error_set(error, EINVAL,
3916                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3917                                           "can't have 2 fate actions in"
3918                                           " same flow");
3919         if (action_flags & MLX5_FLOW_ACTION_METER)
3920                 return rte_flow_error_set(error, ENOTSUP,
3921                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3922                                           "jump with meter not support");
3923         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) && fdb_mirror)
3924                 return rte_flow_error_set(error, EINVAL,
3925                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3926                                           "E-Switch mirroring can't support"
3927                                           " Sample action and jump action in"
3928                                           " same flow now");
3929         if (!action->conf)
3930                 return rte_flow_error_set(error, EINVAL,
3931                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3932                                           NULL, "action configuration not set");
3933         target_group =
3934                 ((const struct rte_flow_action_jump *)action->conf)->group;
3935         ret = mlx5_flow_group_to_table(dev, tunnel, target_group, &table,
3936                                        grp_info, error);
3937         if (ret)
3938                 return ret;
3939         if (attributes->group == target_group &&
3940             !(action_flags & (MLX5_FLOW_ACTION_TUNNEL_SET |
3941                               MLX5_FLOW_ACTION_TUNNEL_MATCH)))
3942                 return rte_flow_error_set(error, EINVAL,
3943                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3944                                           "target group must be other than"
3945                                           " the current flow group");
3946         return 0;
3947 }
3948
3949 /*
3950  * Validate the port_id action.
3951  *
3952  * @param[in] dev
3953  *   Pointer to rte_eth_dev structure.
3954  * @param[in] action_flags
3955  *   Bit-fields that holds the actions detected until now.
3956  * @param[in] action
3957  *   Port_id RTE action structure.
3958  * @param[in] attr
3959  *   Attributes of flow that includes this action.
3960  * @param[out] error
3961  *   Pointer to error structure.
3962  *
3963  * @return
3964  *   0 on success, a negative errno value otherwise and rte_errno is set.
3965  */
3966 static int
3967 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
3968                                 uint64_t action_flags,
3969                                 const struct rte_flow_action *action,
3970                                 const struct rte_flow_attr *attr,
3971                                 struct rte_flow_error *error)
3972 {
3973         const struct rte_flow_action_port_id *port_id;
3974         struct mlx5_priv *act_priv;
3975         struct mlx5_priv *dev_priv;
3976         uint16_t port;
3977
3978         if (!attr->transfer)
3979                 return rte_flow_error_set(error, ENOTSUP,
3980                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3981                                           NULL,
3982                                           "port id action is valid in transfer"
3983                                           " mode only");
3984         if (!action || !action->conf)
3985                 return rte_flow_error_set(error, ENOTSUP,
3986                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3987                                           NULL,
3988                                           "port id action parameters must be"
3989                                           " specified");
3990         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3991                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3992                 return rte_flow_error_set(error, EINVAL,
3993                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3994                                           "can have only one fate actions in"
3995                                           " a flow");
3996         dev_priv = mlx5_dev_to_eswitch_info(dev);
3997         if (!dev_priv)
3998                 return rte_flow_error_set(error, rte_errno,
3999                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4000                                           NULL,
4001                                           "failed to obtain E-Switch info");
4002         port_id = action->conf;
4003         port = port_id->original ? dev->data->port_id : port_id->id;
4004         act_priv = mlx5_port_to_eswitch_info(port, false);
4005         if (!act_priv)
4006                 return rte_flow_error_set
4007                                 (error, rte_errno,
4008                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
4009                                  "failed to obtain E-Switch port id for port");
4010         if (act_priv->domain_id != dev_priv->domain_id)
4011                 return rte_flow_error_set
4012                                 (error, EINVAL,
4013                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4014                                  "port does not belong to"
4015                                  " E-Switch being configured");
4016         return 0;
4017 }
4018
4019 /**
4020  * Get the maximum number of modify header actions.
4021  *
4022  * @param dev
4023  *   Pointer to rte_eth_dev structure.
4024  * @param flags
4025  *   Flags bits to check if root level.
4026  *
4027  * @return
4028  *   Max number of modify header actions device can support.
4029  */
4030 static inline unsigned int
4031 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev __rte_unused,
4032                               uint64_t flags)
4033 {
4034         /*
4035          * There's no way to directly query the max capacity from FW.
4036          * The maximal value on root table should be assumed to be supported.
4037          */
4038         if (!(flags & MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL))
4039                 return MLX5_MAX_MODIFY_NUM;
4040         else
4041                 return MLX5_ROOT_TBL_MODIFY_NUM;
4042 }
4043
4044 /**
4045  * Validate the meter action.
4046  *
4047  * @param[in] dev
4048  *   Pointer to rte_eth_dev structure.
4049  * @param[in] action_flags
4050  *   Bit-fields that holds the actions detected until now.
4051  * @param[in] action
4052  *   Pointer to the meter action.
4053  * @param[in] attr
4054  *   Attributes of flow that includes this action.
4055  * @param[out] error
4056  *   Pointer to error structure.
4057  *
4058  * @return
4059  *   0 on success, a negative errno value otherwise and rte_ernno is set.
4060  */
4061 static int
4062 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
4063                                 uint64_t action_flags,
4064                                 const struct rte_flow_action *action,
4065                                 const struct rte_flow_attr *attr,
4066                                 struct rte_flow_error *error)
4067 {
4068         struct mlx5_priv *priv = dev->data->dev_private;
4069         const struct rte_flow_action_meter *am = action->conf;
4070         struct mlx5_flow_meter *fm;
4071
4072         if (!am)
4073                 return rte_flow_error_set(error, EINVAL,
4074                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4075                                           "meter action conf is NULL");
4076
4077         if (action_flags & MLX5_FLOW_ACTION_METER)
4078                 return rte_flow_error_set(error, ENOTSUP,
4079                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4080                                           "meter chaining not support");
4081         if (action_flags & MLX5_FLOW_ACTION_JUMP)
4082                 return rte_flow_error_set(error, ENOTSUP,
4083                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4084                                           "meter with jump not support");
4085         if (!priv->mtr_en)
4086                 return rte_flow_error_set(error, ENOTSUP,
4087                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4088                                           NULL,
4089                                           "meter action not supported");
4090         fm = mlx5_flow_meter_find(priv, am->mtr_id);
4091         if (!fm)
4092                 return rte_flow_error_set(error, EINVAL,
4093                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4094                                           "Meter not found");
4095         if (fm->ref_cnt && (!(fm->transfer == attr->transfer ||
4096               (!fm->ingress && !attr->ingress && attr->egress) ||
4097               (!fm->egress && !attr->egress && attr->ingress))))
4098                 return rte_flow_error_set(error, EINVAL,
4099                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4100                                           "Flow attributes are either invalid "
4101                                           "or have a conflict with current "
4102                                           "meter attributes");
4103         return 0;
4104 }
4105
4106 /**
4107  * Validate the age action.
4108  *
4109  * @param[in] action_flags
4110  *   Holds the actions detected until now.
4111  * @param[in] action
4112  *   Pointer to the age action.
4113  * @param[in] dev
4114  *   Pointer to the Ethernet device structure.
4115  * @param[out] error
4116  *   Pointer to error structure.
4117  *
4118  * @return
4119  *   0 on success, a negative errno value otherwise and rte_errno is set.
4120  */
4121 static int
4122 flow_dv_validate_action_age(uint64_t action_flags,
4123                             const struct rte_flow_action *action,
4124                             struct rte_eth_dev *dev,
4125                             struct rte_flow_error *error)
4126 {
4127         struct mlx5_priv *priv = dev->data->dev_private;
4128         const struct rte_flow_action_age *age = action->conf;
4129
4130         if (!priv->config.devx || (priv->sh->cmng.counter_fallback &&
4131             !priv->sh->aso_age_mng))
4132                 return rte_flow_error_set(error, ENOTSUP,
4133                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4134                                           NULL,
4135                                           "age action not supported");
4136         if (!(action->conf))
4137                 return rte_flow_error_set(error, EINVAL,
4138                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
4139                                           "configuration cannot be null");
4140         if (!(age->timeout))
4141                 return rte_flow_error_set(error, EINVAL,
4142                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
4143                                           "invalid timeout value 0");
4144         if (action_flags & MLX5_FLOW_ACTION_AGE)
4145                 return rte_flow_error_set(error, EINVAL,
4146                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4147                                           "duplicate age actions set");
4148         return 0;
4149 }
4150
4151 /**
4152  * Validate the modify-header IPv4 DSCP actions.
4153  *
4154  * @param[in] action_flags
4155  *   Holds the actions detected until now.
4156  * @param[in] action
4157  *   Pointer to the modify action.
4158  * @param[in] item_flags
4159  *   Holds the items detected.
4160  * @param[out] error
4161  *   Pointer to error structure.
4162  *
4163  * @return
4164  *   0 on success, a negative errno value otherwise and rte_errno is set.
4165  */
4166 static int
4167 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
4168                                          const struct rte_flow_action *action,
4169                                          const uint64_t item_flags,
4170                                          struct rte_flow_error *error)
4171 {
4172         int ret = 0;
4173
4174         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4175         if (!ret) {
4176                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
4177                         return rte_flow_error_set(error, EINVAL,
4178                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4179                                                   NULL,
4180                                                   "no ipv4 item in pattern");
4181         }
4182         return ret;
4183 }
4184
4185 /**
4186  * Validate the modify-header IPv6 DSCP actions.
4187  *
4188  * @param[in] action_flags
4189  *   Holds the actions detected until now.
4190  * @param[in] action
4191  *   Pointer to the modify action.
4192  * @param[in] item_flags
4193  *   Holds the items detected.
4194  * @param[out] error
4195  *   Pointer to error structure.
4196  *
4197  * @return
4198  *   0 on success, a negative errno value otherwise and rte_errno is set.
4199  */
4200 static int
4201 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
4202                                          const struct rte_flow_action *action,
4203                                          const uint64_t item_flags,
4204                                          struct rte_flow_error *error)
4205 {
4206         int ret = 0;
4207
4208         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4209         if (!ret) {
4210                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
4211                         return rte_flow_error_set(error, EINVAL,
4212                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4213                                                   NULL,
4214                                                   "no ipv6 item in pattern");
4215         }
4216         return ret;
4217 }
4218
4219 /**
4220  * Match modify-header resource.
4221  *
4222  * @param list
4223  *   Pointer to the hash list.
4224  * @param entry
4225  *   Pointer to exist resource entry object.
4226  * @param key
4227  *   Key of the new entry.
4228  * @param ctx
4229  *   Pointer to new modify-header resource.
4230  *
4231  * @return
4232  *   0 on matching, non-zero otherwise.
4233  */
4234 int
4235 flow_dv_modify_match_cb(struct mlx5_hlist *list __rte_unused,
4236                         struct mlx5_hlist_entry *entry,
4237                         uint64_t key __rte_unused, void *cb_ctx)
4238 {
4239         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4240         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
4241         struct mlx5_flow_dv_modify_hdr_resource *resource =
4242                         container_of(entry, typeof(*resource), entry);
4243         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
4244
4245         key_len += ref->actions_num * sizeof(ref->actions[0]);
4246         return ref->actions_num != resource->actions_num ||
4247                memcmp(&ref->ft_type, &resource->ft_type, key_len);
4248 }
4249
4250 struct mlx5_hlist_entry *
4251 flow_dv_modify_create_cb(struct mlx5_hlist *list, uint64_t key __rte_unused,
4252                          void *cb_ctx)
4253 {
4254         struct mlx5_dev_ctx_shared *sh = list->ctx;
4255         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4256         struct mlx5dv_dr_domain *ns;
4257         struct mlx5_flow_dv_modify_hdr_resource *entry;
4258         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
4259         int ret;
4260         uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
4261         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
4262
4263         entry = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*entry) + data_len, 0,
4264                             SOCKET_ID_ANY);
4265         if (!entry) {
4266                 rte_flow_error_set(ctx->error, ENOMEM,
4267                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4268                                    "cannot allocate resource memory");
4269                 return NULL;
4270         }
4271         rte_memcpy(&entry->ft_type,
4272                    RTE_PTR_ADD(ref, offsetof(typeof(*ref), ft_type)),
4273                    key_len + data_len);
4274         if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
4275                 ns = sh->fdb_domain;
4276         else if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
4277                 ns = sh->tx_domain;
4278         else
4279                 ns = sh->rx_domain;
4280         ret = mlx5_flow_os_create_flow_action_modify_header
4281                                         (sh->ctx, ns, entry,
4282                                          data_len, &entry->action);
4283         if (ret) {
4284                 mlx5_free(entry);
4285                 rte_flow_error_set(ctx->error, ENOMEM,
4286                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4287                                    NULL, "cannot create modification action");
4288                 return NULL;
4289         }
4290         return &entry->entry;
4291 }
4292
4293 /**
4294  * Validate the sample action.
4295  *
4296  * @param[in] action_flags
4297  *   Holds the actions detected until now.
4298  * @param[in] action
4299  *   Pointer to the sample action.
4300  * @param[in] dev
4301  *   Pointer to the Ethernet device structure.
4302  * @param[in] attr
4303  *   Attributes of flow that includes this action.
4304  * @param[out] error
4305  *   Pointer to error structure.
4306  *
4307  * @return
4308  *   0 on success, a negative errno value otherwise and rte_errno is set.
4309  */
4310 static int
4311 flow_dv_validate_action_sample(uint64_t action_flags,
4312                                const struct rte_flow_action *action,
4313                                struct rte_eth_dev *dev,
4314                                const struct rte_flow_attr *attr,
4315                                struct rte_flow_error *error)
4316 {
4317         struct mlx5_priv *priv = dev->data->dev_private;
4318         struct mlx5_dev_config *dev_conf = &priv->config;
4319         const struct rte_flow_action_sample *sample = action->conf;
4320         const struct rte_flow_action *act;
4321         uint64_t sub_action_flags = 0;
4322         uint16_t queue_index = 0xFFFF;
4323         int actions_n = 0;
4324         int ret;
4325         fdb_mirror = 0;
4326
4327         if (!sample)
4328                 return rte_flow_error_set(error, EINVAL,
4329                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
4330                                           "configuration cannot be NULL");
4331         if (sample->ratio == 0)
4332                 return rte_flow_error_set(error, EINVAL,
4333                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
4334                                           "ratio value starts from 1");
4335         if (!priv->config.devx || (sample->ratio > 0 && !priv->sampler_en))
4336                 return rte_flow_error_set(error, ENOTSUP,
4337                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4338                                           NULL,
4339                                           "sample action not supported");
4340         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
4341                 return rte_flow_error_set(error, EINVAL,
4342                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4343                                           "Multiple sample actions not "
4344                                           "supported");
4345         if (action_flags & MLX5_FLOW_ACTION_METER)
4346                 return rte_flow_error_set(error, EINVAL,
4347                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
4348                                           "wrong action order, meter should "
4349                                           "be after sample action");
4350         if (action_flags & MLX5_FLOW_ACTION_JUMP)
4351                 return rte_flow_error_set(error, EINVAL,
4352                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
4353                                           "wrong action order, jump should "
4354                                           "be after sample action");
4355         act = sample->actions;
4356         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
4357                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
4358                         return rte_flow_error_set(error, ENOTSUP,
4359                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4360                                                   act, "too many actions");
4361                 switch (act->type) {
4362                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4363                         ret = mlx5_flow_validate_action_queue(act,
4364                                                               sub_action_flags,
4365                                                               dev,
4366                                                               attr, error);
4367                         if (ret < 0)
4368                                 return ret;
4369                         queue_index = ((const struct rte_flow_action_queue *)
4370                                                         (act->conf))->index;
4371                         sub_action_flags |= MLX5_FLOW_ACTION_QUEUE;
4372                         ++actions_n;
4373                         break;
4374                 case RTE_FLOW_ACTION_TYPE_MARK:
4375                         ret = flow_dv_validate_action_mark(dev, act,
4376                                                            sub_action_flags,
4377                                                            attr, error);
4378                         if (ret < 0)
4379                                 return ret;
4380                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
4381                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK |
4382                                                 MLX5_FLOW_ACTION_MARK_EXT;
4383                         else
4384                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK;
4385                         ++actions_n;
4386                         break;
4387                 case RTE_FLOW_ACTION_TYPE_COUNT:
4388                         ret = flow_dv_validate_action_count(dev, error);
4389                         if (ret < 0)
4390                                 return ret;
4391                         sub_action_flags |= MLX5_FLOW_ACTION_COUNT;
4392                         ++actions_n;
4393                         break;
4394                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4395                         ret = flow_dv_validate_action_port_id(dev,
4396                                                               sub_action_flags,
4397                                                               act,
4398                                                               attr,
4399                                                               error);
4400                         if (ret)
4401                                 return ret;
4402                         sub_action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4403                         ++actions_n;
4404                         break;
4405                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4406                         ret = flow_dv_validate_action_raw_encap_decap
4407                                 (dev, NULL, act->conf, attr, &sub_action_flags,
4408                                  &actions_n, error);
4409                         if (ret < 0)
4410                                 return ret;
4411                         ++actions_n;
4412                         break;
4413                 default:
4414                         return rte_flow_error_set(error, ENOTSUP,
4415                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4416                                                   NULL,
4417                                                   "Doesn't support optional "
4418                                                   "action");
4419                 }
4420         }
4421         if (attr->ingress && !attr->transfer) {
4422                 if (!(sub_action_flags & MLX5_FLOW_ACTION_QUEUE))
4423                         return rte_flow_error_set(error, EINVAL,
4424                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4425                                                   NULL,
4426                                                   "Ingress must has a dest "
4427                                                   "QUEUE for Sample");
4428         } else if (attr->egress && !attr->transfer) {
4429                 return rte_flow_error_set(error, ENOTSUP,
4430                                           RTE_FLOW_ERROR_TYPE_ACTION,
4431                                           NULL,
4432                                           "Sample Only support Ingress "
4433                                           "or E-Switch");
4434         } else if (sample->actions->type != RTE_FLOW_ACTION_TYPE_END) {
4435                 MLX5_ASSERT(attr->transfer);
4436                 if (sample->ratio > 1)
4437                         return rte_flow_error_set(error, ENOTSUP,
4438                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4439                                                   NULL,
4440                                                   "E-Switch doesn't support "
4441                                                   "any optional action "
4442                                                   "for sampling");
4443                 fdb_mirror = 1;
4444                 if (sub_action_flags & MLX5_FLOW_ACTION_QUEUE)
4445                         return rte_flow_error_set(error, ENOTSUP,
4446                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4447                                                   NULL,
4448                                                   "unsupported action QUEUE");
4449                 if (!(sub_action_flags & MLX5_FLOW_ACTION_PORT_ID))
4450                         return rte_flow_error_set(error, EINVAL,
4451                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4452                                                   NULL,
4453                                                   "E-Switch must has a dest "
4454                                                   "port for mirroring");
4455         }
4456         /* Continue validation for Xcap actions.*/
4457         if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) &&
4458             (queue_index == 0xFFFF ||
4459              mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
4460                 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
4461                      MLX5_FLOW_XCAP_ACTIONS)
4462                         return rte_flow_error_set(error, ENOTSUP,
4463                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4464                                                   NULL, "encap and decap "
4465                                                   "combination aren't "
4466                                                   "supported");
4467                 if (!attr->transfer && attr->ingress && (sub_action_flags &
4468                                                         MLX5_FLOW_ACTION_ENCAP))
4469                         return rte_flow_error_set(error, ENOTSUP,
4470                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4471                                                   NULL, "encap is not supported"
4472                                                   " for ingress traffic");
4473         }
4474         return 0;
4475 }
4476
4477 /**
4478  * Find existing modify-header resource or create and register a new one.
4479  *
4480  * @param dev[in, out]
4481  *   Pointer to rte_eth_dev structure.
4482  * @param[in, out] resource
4483  *   Pointer to modify-header resource.
4484  * @parm[in, out] dev_flow
4485  *   Pointer to the dev_flow.
4486  * @param[out] error
4487  *   pointer to error structure.
4488  *
4489  * @return
4490  *   0 on success otherwise -errno and errno is set.
4491  */
4492 static int
4493 flow_dv_modify_hdr_resource_register
4494                         (struct rte_eth_dev *dev,
4495                          struct mlx5_flow_dv_modify_hdr_resource *resource,
4496                          struct mlx5_flow *dev_flow,
4497                          struct rte_flow_error *error)
4498 {
4499         struct mlx5_priv *priv = dev->data->dev_private;
4500         struct mlx5_dev_ctx_shared *sh = priv->sh;
4501         uint32_t key_len = sizeof(*resource) -
4502                            offsetof(typeof(*resource), ft_type) +
4503                            resource->actions_num * sizeof(resource->actions[0]);
4504         struct mlx5_hlist_entry *entry;
4505         struct mlx5_flow_cb_ctx ctx = {
4506                 .error = error,
4507                 .data = resource,
4508         };
4509
4510         resource->flags = dev_flow->dv.group ? 0 :
4511                           MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
4512         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
4513                                     resource->flags))
4514                 return rte_flow_error_set(error, EOVERFLOW,
4515                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4516                                           "too many modify header items");
4517         resource->entry.key = __rte_raw_cksum(&resource->ft_type, key_len, 0);
4518         entry = mlx5_hlist_register(sh->modify_cmds, resource->entry.key, &ctx);
4519         if (!entry)
4520                 return -rte_errno;
4521         resource = container_of(entry, typeof(*resource), entry);
4522         dev_flow->handle->dvh.modify_hdr = resource;
4523         return 0;
4524 }
4525
4526 /**
4527  * Get DV flow counter by index.
4528  *
4529  * @param[in] dev
4530  *   Pointer to the Ethernet device structure.
4531  * @param[in] idx
4532  *   mlx5 flow counter index in the container.
4533  * @param[out] ppool
4534  *   mlx5 flow counter pool in the container,
4535  *
4536  * @return
4537  *   Pointer to the counter, NULL otherwise.
4538  */
4539 static struct mlx5_flow_counter *
4540 flow_dv_counter_get_by_idx(struct rte_eth_dev *dev,
4541                            uint32_t idx,
4542                            struct mlx5_flow_counter_pool **ppool)
4543 {
4544         struct mlx5_priv *priv = dev->data->dev_private;
4545         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
4546         struct mlx5_flow_counter_pool *pool;
4547
4548         /* Decrease to original index and clear shared bit. */
4549         idx = (idx - 1) & (MLX5_CNT_SHARED_OFFSET - 1);
4550         MLX5_ASSERT(idx / MLX5_COUNTERS_PER_POOL < cmng->n);
4551         pool = cmng->pools[idx / MLX5_COUNTERS_PER_POOL];
4552         MLX5_ASSERT(pool);
4553         if (ppool)
4554                 *ppool = pool;
4555         return MLX5_POOL_GET_CNT(pool, idx % MLX5_COUNTERS_PER_POOL);
4556 }
4557
4558 /**
4559  * Check the devx counter belongs to the pool.
4560  *
4561  * @param[in] pool
4562  *   Pointer to the counter pool.
4563  * @param[in] id
4564  *   The counter devx ID.
4565  *
4566  * @return
4567  *   True if counter belongs to the pool, false otherwise.
4568  */
4569 static bool
4570 flow_dv_is_counter_in_pool(struct mlx5_flow_counter_pool *pool, int id)
4571 {
4572         int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
4573                    MLX5_COUNTERS_PER_POOL;
4574
4575         if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
4576                 return true;
4577         return false;
4578 }
4579
4580 /**
4581  * Get a pool by devx counter ID.
4582  *
4583  * @param[in] cmng
4584  *   Pointer to the counter management.
4585  * @param[in] id
4586  *   The counter devx ID.
4587  *
4588  * @return
4589  *   The counter pool pointer if exists, NULL otherwise,
4590  */
4591 static struct mlx5_flow_counter_pool *
4592 flow_dv_find_pool_by_id(struct mlx5_flow_counter_mng *cmng, int id)
4593 {
4594         uint32_t i;
4595         struct mlx5_flow_counter_pool *pool = NULL;
4596
4597         rte_spinlock_lock(&cmng->pool_update_sl);
4598         /* Check last used pool. */
4599         if (cmng->last_pool_idx != POOL_IDX_INVALID &&
4600             flow_dv_is_counter_in_pool(cmng->pools[cmng->last_pool_idx], id)) {
4601                 pool = cmng->pools[cmng->last_pool_idx];
4602                 goto out;
4603         }
4604         /* ID out of range means no suitable pool in the container. */
4605         if (id > cmng->max_id || id < cmng->min_id)
4606                 goto out;
4607         /*
4608          * Find the pool from the end of the container, since mostly counter
4609          * ID is sequence increasing, and the last pool should be the needed
4610          * one.
4611          */
4612         i = cmng->n_valid;
4613         while (i--) {
4614                 struct mlx5_flow_counter_pool *pool_tmp = cmng->pools[i];
4615
4616                 if (flow_dv_is_counter_in_pool(pool_tmp, id)) {
4617                         pool = pool_tmp;
4618                         break;
4619                 }
4620         }
4621 out:
4622         rte_spinlock_unlock(&cmng->pool_update_sl);
4623         return pool;
4624 }
4625
4626 /**
4627  * Resize a counter container.
4628  *
4629  * @param[in] dev
4630  *   Pointer to the Ethernet device structure.
4631  *
4632  * @return
4633  *   0 on success, otherwise negative errno value and rte_errno is set.
4634  */
4635 static int
4636 flow_dv_container_resize(struct rte_eth_dev *dev)
4637 {
4638         struct mlx5_priv *priv = dev->data->dev_private;
4639         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
4640         void *old_pools = cmng->pools;
4641         uint32_t resize = cmng->n + MLX5_CNT_CONTAINER_RESIZE;
4642         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
4643         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
4644
4645         if (!pools) {
4646                 rte_errno = ENOMEM;
4647                 return -ENOMEM;
4648         }
4649         if (old_pools)
4650                 memcpy(pools, old_pools, cmng->n *
4651                                        sizeof(struct mlx5_flow_counter_pool *));
4652         cmng->n = resize;
4653         cmng->pools = pools;
4654         if (old_pools)
4655                 mlx5_free(old_pools);
4656         return 0;
4657 }
4658
4659 /**
4660  * Query a devx flow counter.
4661  *
4662  * @param[in] dev
4663  *   Pointer to the Ethernet device structure.
4664  * @param[in] cnt
4665  *   Index to the flow counter.
4666  * @param[out] pkts
4667  *   The statistics value of packets.
4668  * @param[out] bytes
4669  *   The statistics value of bytes.
4670  *
4671  * @return
4672  *   0 on success, otherwise a negative errno value and rte_errno is set.
4673  */
4674 static inline int
4675 _flow_dv_query_count(struct rte_eth_dev *dev, uint32_t counter, uint64_t *pkts,
4676                      uint64_t *bytes)
4677 {
4678         struct mlx5_priv *priv = dev->data->dev_private;
4679         struct mlx5_flow_counter_pool *pool = NULL;
4680         struct mlx5_flow_counter *cnt;
4681         int offset;
4682
4683         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
4684         MLX5_ASSERT(pool);
4685         if (priv->sh->cmng.counter_fallback)
4686                 return mlx5_devx_cmd_flow_counter_query(cnt->dcs_when_active, 0,
4687                                         0, pkts, bytes, 0, NULL, NULL, 0);
4688         rte_spinlock_lock(&pool->sl);
4689         if (!pool->raw) {
4690                 *pkts = 0;
4691                 *bytes = 0;
4692         } else {
4693                 offset = MLX5_CNT_ARRAY_IDX(pool, cnt);
4694                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
4695                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
4696         }
4697         rte_spinlock_unlock(&pool->sl);
4698         return 0;
4699 }
4700
4701 /**
4702  * Create and initialize a new counter pool.
4703  *
4704  * @param[in] dev
4705  *   Pointer to the Ethernet device structure.
4706  * @param[out] dcs
4707  *   The devX counter handle.
4708  * @param[in] age
4709  *   Whether the pool is for counter that was allocated for aging.
4710  * @param[in/out] cont_cur
4711  *   Pointer to the container pointer, it will be update in pool resize.
4712  *
4713  * @return
4714  *   The pool container pointer on success, NULL otherwise and rte_errno is set.
4715  */
4716 static struct mlx5_flow_counter_pool *
4717 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
4718                     uint32_t age)
4719 {
4720         struct mlx5_priv *priv = dev->data->dev_private;
4721         struct mlx5_flow_counter_pool *pool;
4722         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
4723         bool fallback = priv->sh->cmng.counter_fallback;
4724         uint32_t size = sizeof(*pool);
4725
4726         size += MLX5_COUNTERS_PER_POOL * MLX5_CNT_SIZE;
4727         size += (!age ? 0 : MLX5_COUNTERS_PER_POOL * MLX5_AGE_SIZE);
4728         pool = mlx5_malloc(MLX5_MEM_ZERO, size, 0, SOCKET_ID_ANY);
4729         if (!pool) {
4730                 rte_errno = ENOMEM;
4731                 return NULL;
4732         }
4733         pool->raw = NULL;
4734         pool->is_aged = !!age;
4735         pool->query_gen = 0;
4736         pool->min_dcs = dcs;
4737         rte_spinlock_init(&pool->sl);
4738         rte_spinlock_init(&pool->csl);
4739         TAILQ_INIT(&pool->counters[0]);
4740         TAILQ_INIT(&pool->counters[1]);
4741         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
4742         rte_spinlock_lock(&cmng->pool_update_sl);
4743         pool->index = cmng->n_valid;
4744         if (pool->index == cmng->n && flow_dv_container_resize(dev)) {
4745                 mlx5_free(pool);
4746                 rte_spinlock_unlock(&cmng->pool_update_sl);
4747                 return NULL;
4748         }
4749         cmng->pools[pool->index] = pool;
4750         cmng->n_valid++;
4751         if (unlikely(fallback)) {
4752                 int base = RTE_ALIGN_FLOOR(dcs->id, MLX5_COUNTERS_PER_POOL);
4753
4754                 if (base < cmng->min_id)
4755                         cmng->min_id = base;
4756                 if (base > cmng->max_id)
4757                         cmng->max_id = base + MLX5_COUNTERS_PER_POOL - 1;
4758                 cmng->last_pool_idx = pool->index;
4759         }
4760         rte_spinlock_unlock(&cmng->pool_update_sl);
4761         return pool;
4762 }
4763
4764 /**
4765  * Prepare a new counter and/or a new counter pool.
4766  *
4767  * @param[in] dev
4768  *   Pointer to the Ethernet device structure.
4769  * @param[out] cnt_free
4770  *   Where to put the pointer of a new counter.
4771  * @param[in] age
4772  *   Whether the pool is for counter that was allocated for aging.
4773  *
4774  * @return
4775  *   The counter pool pointer and @p cnt_free is set on success,
4776  *   NULL otherwise and rte_errno is set.
4777  */
4778 static struct mlx5_flow_counter_pool *
4779 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
4780                              struct mlx5_flow_counter **cnt_free,
4781                              uint32_t age)
4782 {
4783         struct mlx5_priv *priv = dev->data->dev_private;
4784         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
4785         struct mlx5_flow_counter_pool *pool;
4786         struct mlx5_counters tmp_tq;
4787         struct mlx5_devx_obj *dcs = NULL;
4788         struct mlx5_flow_counter *cnt;
4789         enum mlx5_counter_type cnt_type =
4790                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
4791         bool fallback = priv->sh->cmng.counter_fallback;
4792         uint32_t i;
4793
4794         if (fallback) {
4795                 /* bulk_bitmap must be 0 for single counter allocation. */
4796                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
4797                 if (!dcs)
4798                         return NULL;
4799                 pool = flow_dv_find_pool_by_id(cmng, dcs->id);
4800                 if (!pool) {
4801                         pool = flow_dv_pool_create(dev, dcs, age);
4802                         if (!pool) {
4803                                 mlx5_devx_cmd_destroy(dcs);
4804                                 return NULL;
4805                         }
4806                 }
4807                 i = dcs->id % MLX5_COUNTERS_PER_POOL;
4808                 cnt = MLX5_POOL_GET_CNT(pool, i);
4809                 cnt->pool = pool;
4810                 cnt->dcs_when_free = dcs;
4811                 *cnt_free = cnt;
4812                 return pool;
4813         }
4814         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
4815         if (!dcs) {
4816                 rte_errno = ENODATA;
4817                 return NULL;
4818         }
4819         pool = flow_dv_pool_create(dev, dcs, age);
4820         if (!pool) {
4821                 mlx5_devx_cmd_destroy(dcs);
4822                 return NULL;
4823         }
4824         TAILQ_INIT(&tmp_tq);
4825         for (i = 1; i < MLX5_COUNTERS_PER_POOL; ++i) {
4826                 cnt = MLX5_POOL_GET_CNT(pool, i);
4827                 cnt->pool = pool;
4828                 TAILQ_INSERT_HEAD(&tmp_tq, cnt, next);
4829         }
4830         rte_spinlock_lock(&cmng->csl[cnt_type]);
4831         TAILQ_CONCAT(&cmng->counters[cnt_type], &tmp_tq, next);
4832         rte_spinlock_unlock(&cmng->csl[cnt_type]);
4833         *cnt_free = MLX5_POOL_GET_CNT(pool, 0);
4834         (*cnt_free)->pool = pool;
4835         return pool;
4836 }
4837
4838 /**
4839  * Allocate a flow counter.
4840  *
4841  * @param[in] dev
4842  *   Pointer to the Ethernet device structure.
4843  * @param[in] age
4844  *   Whether the counter was allocated for aging.
4845  *
4846  * @return
4847  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
4848  */
4849 static uint32_t
4850 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t age)
4851 {
4852         struct mlx5_priv *priv = dev->data->dev_private;
4853         struct mlx5_flow_counter_pool *pool = NULL;
4854         struct mlx5_flow_counter *cnt_free = NULL;
4855         bool fallback = priv->sh->cmng.counter_fallback;
4856         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
4857         enum mlx5_counter_type cnt_type =
4858                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
4859         uint32_t cnt_idx;
4860
4861         if (!priv->config.devx) {
4862                 rte_errno = ENOTSUP;
4863                 return 0;
4864         }
4865         /* Get free counters from container. */
4866         rte_spinlock_lock(&cmng->csl[cnt_type]);
4867         cnt_free = TAILQ_FIRST(&cmng->counters[cnt_type]);
4868         if (cnt_free)
4869                 TAILQ_REMOVE(&cmng->counters[cnt_type], cnt_free, next);
4870         rte_spinlock_unlock(&cmng->csl[cnt_type]);
4871         if (!cnt_free && !flow_dv_counter_pool_prepare(dev, &cnt_free, age))
4872                 goto err;
4873         pool = cnt_free->pool;
4874         if (fallback)
4875                 cnt_free->dcs_when_active = cnt_free->dcs_when_free;
4876         /* Create a DV counter action only in the first time usage. */
4877         if (!cnt_free->action) {
4878                 uint16_t offset;
4879                 struct mlx5_devx_obj *dcs;
4880                 int ret;
4881
4882                 if (!fallback) {
4883                         offset = MLX5_CNT_ARRAY_IDX(pool, cnt_free);
4884                         dcs = pool->min_dcs;
4885                 } else {
4886                         offset = 0;
4887                         dcs = cnt_free->dcs_when_free;
4888                 }
4889                 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, offset,
4890                                                             &cnt_free->action);
4891                 if (ret) {
4892                         rte_errno = errno;
4893                         goto err;
4894                 }
4895         }
4896         cnt_idx = MLX5_MAKE_CNT_IDX(pool->index,
4897                                 MLX5_CNT_ARRAY_IDX(pool, cnt_free));
4898         /* Update the counter reset values. */
4899         if (_flow_dv_query_count(dev, cnt_idx, &cnt_free->hits,
4900                                  &cnt_free->bytes))
4901                 goto err;
4902         if (!fallback && !priv->sh->cmng.query_thread_on)
4903                 /* Start the asynchronous batch query by the host thread. */
4904                 mlx5_set_query_alarm(priv->sh);
4905         return cnt_idx;
4906 err:
4907         if (cnt_free) {
4908                 cnt_free->pool = pool;
4909                 if (fallback)
4910                         cnt_free->dcs_when_free = cnt_free->dcs_when_active;
4911                 rte_spinlock_lock(&cmng->csl[cnt_type]);
4912                 TAILQ_INSERT_TAIL(&cmng->counters[cnt_type], cnt_free, next);
4913                 rte_spinlock_unlock(&cmng->csl[cnt_type]);
4914         }
4915         return 0;
4916 }
4917
4918 /**
4919  * Allocate a shared flow counter.
4920  *
4921  * @param[in] ctx
4922  *   Pointer to the shared counter configuration.
4923  * @param[in] data
4924  *   Pointer to save the allocated counter index.
4925  *
4926  * @return
4927  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
4928  */
4929
4930 static int32_t
4931 flow_dv_counter_alloc_shared_cb(void *ctx, union mlx5_l3t_data *data)
4932 {
4933         struct mlx5_shared_counter_conf *conf = ctx;
4934         struct rte_eth_dev *dev = conf->dev;
4935         struct mlx5_flow_counter *cnt;
4936
4937         data->dword = flow_dv_counter_alloc(dev, 0);
4938         data->dword |= MLX5_CNT_SHARED_OFFSET;
4939         cnt = flow_dv_counter_get_by_idx(dev, data->dword, NULL);
4940         cnt->shared_info.id = conf->id;
4941         return 0;
4942 }
4943
4944 /**
4945  * Get a shared flow counter.
4946  *
4947  * @param[in] dev
4948  *   Pointer to the Ethernet device structure.
4949  * @param[in] id
4950  *   Counter identifier.
4951  *
4952  * @return
4953  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
4954  */
4955 static uint32_t
4956 flow_dv_counter_get_shared(struct rte_eth_dev *dev, uint32_t id)
4957 {
4958         struct mlx5_priv *priv = dev->data->dev_private;
4959         struct mlx5_shared_counter_conf conf = {
4960                 .dev = dev,
4961                 .id = id,
4962         };
4963         union mlx5_l3t_data data = {
4964                 .dword = 0,
4965         };
4966
4967         mlx5_l3t_prepare_entry(priv->sh->cnt_id_tbl, id, &data,
4968                                flow_dv_counter_alloc_shared_cb, &conf);
4969         return data.dword;
4970 }
4971
4972 /**
4973  * Get age param from counter index.
4974  *
4975  * @param[in] dev
4976  *   Pointer to the Ethernet device structure.
4977  * @param[in] counter
4978  *   Index to the counter handler.
4979  *
4980  * @return
4981  *   The aging parameter specified for the counter index.
4982  */
4983 static struct mlx5_age_param*
4984 flow_dv_counter_idx_get_age(struct rte_eth_dev *dev,
4985                                 uint32_t counter)
4986 {
4987         struct mlx5_flow_counter *cnt;
4988         struct mlx5_flow_counter_pool *pool = NULL;
4989
4990         flow_dv_counter_get_by_idx(dev, counter, &pool);
4991         counter = (counter - 1) % MLX5_COUNTERS_PER_POOL;
4992         cnt = MLX5_POOL_GET_CNT(pool, counter);
4993         return MLX5_CNT_TO_AGE(cnt);
4994 }
4995
4996 /**
4997  * Remove a flow counter from aged counter list.
4998  *
4999  * @param[in] dev
5000  *   Pointer to the Ethernet device structure.
5001  * @param[in] counter
5002  *   Index to the counter handler.
5003  * @param[in] cnt
5004  *   Pointer to the counter handler.
5005  */
5006 static void
5007 flow_dv_counter_remove_from_age(struct rte_eth_dev *dev,
5008                                 uint32_t counter, struct mlx5_flow_counter *cnt)
5009 {
5010         struct mlx5_age_info *age_info;
5011         struct mlx5_age_param *age_param;
5012         struct mlx5_priv *priv = dev->data->dev_private;
5013         uint16_t expected = AGE_CANDIDATE;
5014
5015         age_info = GET_PORT_AGE_INFO(priv);
5016         age_param = flow_dv_counter_idx_get_age(dev, counter);
5017         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
5018                                          AGE_FREE, false, __ATOMIC_RELAXED,
5019                                          __ATOMIC_RELAXED)) {
5020                 /**
5021                  * We need the lock even it is age timeout,
5022                  * since counter may still in process.
5023                  */
5024                 rte_spinlock_lock(&age_info->aged_sl);
5025                 TAILQ_REMOVE(&age_info->aged_counters, cnt, next);
5026                 rte_spinlock_unlock(&age_info->aged_sl);
5027                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
5028         }
5029 }
5030
5031 /**
5032  * Release a flow counter.
5033  *
5034  * @param[in] dev
5035  *   Pointer to the Ethernet device structure.
5036  * @param[in] counter
5037  *   Index to the counter handler.
5038  */
5039 static void
5040 flow_dv_counter_free(struct rte_eth_dev *dev, uint32_t counter)
5041 {
5042         struct mlx5_priv *priv = dev->data->dev_private;
5043         struct mlx5_flow_counter_pool *pool = NULL;
5044         struct mlx5_flow_counter *cnt;
5045         enum mlx5_counter_type cnt_type;
5046
5047         if (!counter)
5048                 return;
5049         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
5050         MLX5_ASSERT(pool);
5051         if (IS_SHARED_CNT(counter) &&
5052             mlx5_l3t_clear_entry(priv->sh->cnt_id_tbl, cnt->shared_info.id))
5053                 return;
5054         if (pool->is_aged)
5055                 flow_dv_counter_remove_from_age(dev, counter, cnt);
5056         cnt->pool = pool;
5057         /*
5058          * Put the counter back to list to be updated in none fallback mode.
5059          * Currently, we are using two list alternately, while one is in query,
5060          * add the freed counter to the other list based on the pool query_gen
5061          * value. After query finishes, add counter the list to the global
5062          * container counter list. The list changes while query starts. In
5063          * this case, lock will not be needed as query callback and release
5064          * function both operate with the different list.
5065          *
5066          */
5067         if (!priv->sh->cmng.counter_fallback) {
5068                 rte_spinlock_lock(&pool->csl);
5069                 TAILQ_INSERT_TAIL(&pool->counters[pool->query_gen], cnt, next);
5070                 rte_spinlock_unlock(&pool->csl);
5071         } else {
5072                 cnt->dcs_when_free = cnt->dcs_when_active;
5073                 cnt_type = pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
5074                                            MLX5_COUNTER_TYPE_ORIGIN;
5075                 rte_spinlock_lock(&priv->sh->cmng.csl[cnt_type]);
5076                 TAILQ_INSERT_TAIL(&priv->sh->cmng.counters[cnt_type],
5077                                   cnt, next);
5078                 rte_spinlock_unlock(&priv->sh->cmng.csl[cnt_type]);
5079         }
5080 }
5081
5082 /**
5083  * Verify the @p attributes will be correctly understood by the NIC and store
5084  * them in the @p flow if everything is correct.
5085  *
5086  * @param[in] dev
5087  *   Pointer to dev struct.
5088  * @param[in] attributes
5089  *   Pointer to flow attributes
5090  * @param[in] external
5091  *   This flow rule is created by request external to PMD.
5092  * @param[out] error
5093  *   Pointer to error structure.
5094  *
5095  * @return
5096  *   - 0 on success and non root table.
5097  *   - 1 on success and root table.
5098  *   - a negative errno value otherwise and rte_errno is set.
5099  */
5100 static int
5101 flow_dv_validate_attributes(struct rte_eth_dev *dev,
5102                             const struct mlx5_flow_tunnel *tunnel,
5103                             const struct rte_flow_attr *attributes,
5104                             struct flow_grp_info grp_info,
5105                             struct rte_flow_error *error)
5106 {
5107         struct mlx5_priv *priv = dev->data->dev_private;
5108         uint32_t priority_max = priv->config.flow_prio - 1;
5109         int ret = 0;
5110
5111 #ifndef HAVE_MLX5DV_DR
5112         RTE_SET_USED(tunnel);
5113         RTE_SET_USED(grp_info);
5114         if (attributes->group)
5115                 return rte_flow_error_set(error, ENOTSUP,
5116                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
5117                                           NULL,
5118                                           "groups are not supported");
5119 #else
5120         uint32_t table = 0;
5121
5122         ret = mlx5_flow_group_to_table(dev, tunnel, attributes->group, &table,
5123                                        grp_info, error);
5124         if (ret)
5125                 return ret;
5126         if (!table)
5127                 ret = MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
5128 #endif
5129         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
5130             attributes->priority >= priority_max)
5131                 return rte_flow_error_set(error, ENOTSUP,
5132                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
5133                                           NULL,
5134                                           "priority out of range");
5135         if (attributes->transfer) {
5136                 if (!priv->config.dv_esw_en)
5137                         return rte_flow_error_set
5138                                 (error, ENOTSUP,
5139                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5140                                  "E-Switch dr is not supported");
5141                 if (!(priv->representor || priv->master))
5142                         return rte_flow_error_set
5143                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5144                                  NULL, "E-Switch configuration can only be"
5145                                  " done by a master or a representor device");
5146                 if (attributes->egress)
5147                         return rte_flow_error_set
5148                                 (error, ENOTSUP,
5149                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
5150                                  "egress is not supported");
5151         }
5152         if (!(attributes->egress ^ attributes->ingress))
5153                 return rte_flow_error_set(error, ENOTSUP,
5154                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
5155                                           "must specify exactly one of "
5156                                           "ingress or egress");
5157         return ret;
5158 }
5159
5160 /**
5161  * Internal validation function. For validating both actions and items.
5162  *
5163  * @param[in] dev
5164  *   Pointer to the rte_eth_dev structure.
5165  * @param[in] attr
5166  *   Pointer to the flow attributes.
5167  * @param[in] items
5168  *   Pointer to the list of items.
5169  * @param[in] actions
5170  *   Pointer to the list of actions.
5171  * @param[in] external
5172  *   This flow rule is created by request external to PMD.
5173  * @param[in] hairpin
5174  *   Number of hairpin TX actions, 0 means classic flow.
5175  * @param[out] error
5176  *   Pointer to the error structure.
5177  *
5178  * @return
5179  *   0 on success, a negative errno value otherwise and rte_errno is set.
5180  */
5181 static int
5182 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
5183                  const struct rte_flow_item items[],
5184                  const struct rte_flow_action actions[],
5185                  bool external, int hairpin, struct rte_flow_error *error)
5186 {
5187         int ret;
5188         uint64_t action_flags = 0;
5189         uint64_t item_flags = 0;
5190         uint64_t last_item = 0;
5191         uint8_t next_protocol = 0xff;
5192         uint16_t ether_type = 0;
5193         int actions_n = 0;
5194         uint8_t item_ipv6_proto = 0;
5195         const struct rte_flow_item *gre_item = NULL;
5196         const struct rte_flow_action_raw_decap *decap;
5197         const struct rte_flow_action_raw_encap *encap;
5198         const struct rte_flow_action_rss *rss;
5199         const struct rte_flow_item_tcp nic_tcp_mask = {
5200                 .hdr = {
5201                         .tcp_flags = 0xFF,
5202                         .src_port = RTE_BE16(UINT16_MAX),
5203                         .dst_port = RTE_BE16(UINT16_MAX),
5204                 }
5205         };
5206         const struct rte_flow_item_ipv6 nic_ipv6_mask = {
5207                 .hdr = {
5208                         .src_addr =
5209                         "\xff\xff\xff\xff\xff\xff\xff\xff"
5210                         "\xff\xff\xff\xff\xff\xff\xff\xff",
5211                         .dst_addr =
5212                         "\xff\xff\xff\xff\xff\xff\xff\xff"
5213                         "\xff\xff\xff\xff\xff\xff\xff\xff",
5214                         .vtc_flow = RTE_BE32(0xffffffff),
5215                         .proto = 0xff,
5216                         .hop_limits = 0xff,
5217                 },
5218                 .has_frag_ext = 1,
5219         };
5220         const struct rte_flow_item_ecpri nic_ecpri_mask = {
5221                 .hdr = {
5222                         .common = {
5223                                 .u32 =
5224                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
5225                                         .type = 0xFF,
5226                                         }).u32),
5227                         },
5228                         .dummy[0] = 0xffffffff,
5229                 },
5230         };
5231         struct mlx5_priv *priv = dev->data->dev_private;
5232         struct mlx5_dev_config *dev_conf = &priv->config;
5233         uint16_t queue_index = 0xFFFF;
5234         const struct rte_flow_item_vlan *vlan_m = NULL;
5235         int16_t rw_act_num = 0;
5236         uint64_t is_root;
5237         const struct mlx5_flow_tunnel *tunnel;
5238         struct flow_grp_info grp_info = {
5239                 .external = !!external,
5240                 .transfer = !!attr->transfer,
5241                 .fdb_def_rule = !!priv->fdb_def_rule,
5242         };
5243         const struct rte_eth_hairpin_conf *conf;
5244
5245         if (items == NULL)
5246                 return -1;
5247         if (is_flow_tunnel_match_rule(dev, attr, items, actions)) {
5248                 tunnel = flow_items_to_tunnel(items);
5249                 action_flags |= MLX5_FLOW_ACTION_TUNNEL_MATCH |
5250                                 MLX5_FLOW_ACTION_DECAP;
5251         } else if (is_flow_tunnel_steer_rule(dev, attr, items, actions)) {
5252                 tunnel = flow_actions_to_tunnel(actions);
5253                 action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
5254         } else {
5255                 tunnel = NULL;
5256         }
5257         grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
5258                                 (dev, tunnel, attr, items, actions);
5259         ret = flow_dv_validate_attributes(dev, tunnel, attr, grp_info, error);
5260         if (ret < 0)
5261                 return ret;
5262         is_root = (uint64_t)ret;
5263         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
5264                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
5265                 int type = items->type;
5266
5267                 if (!mlx5_flow_os_item_supported(type))
5268                         return rte_flow_error_set(error, ENOTSUP,
5269                                                   RTE_FLOW_ERROR_TYPE_ITEM,
5270                                                   NULL, "item not supported");
5271                 switch (type) {
5272                 case MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL:
5273                         if (items[0].type != (typeof(items[0].type))
5274                                                 MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL)
5275                                 return rte_flow_error_set
5276                                                 (error, EINVAL,
5277                                                 RTE_FLOW_ERROR_TYPE_ITEM,
5278                                                 NULL, "MLX5 private items "
5279                                                 "must be the first");
5280                         break;
5281                 case RTE_FLOW_ITEM_TYPE_VOID:
5282                         break;
5283                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
5284                         ret = flow_dv_validate_item_port_id
5285                                         (dev, items, attr, item_flags, error);
5286                         if (ret < 0)
5287                                 return ret;
5288                         last_item = MLX5_FLOW_ITEM_PORT_ID;
5289                         break;
5290                 case RTE_FLOW_ITEM_TYPE_ETH:
5291                         ret = mlx5_flow_validate_item_eth(items, item_flags,
5292                                                           true, error);
5293                         if (ret < 0)
5294                                 return ret;
5295                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
5296                                              MLX5_FLOW_LAYER_OUTER_L2;
5297                         if (items->mask != NULL && items->spec != NULL) {
5298                                 ether_type =
5299                                         ((const struct rte_flow_item_eth *)
5300                                          items->spec)->type;
5301                                 ether_type &=
5302                                         ((const struct rte_flow_item_eth *)
5303                                          items->mask)->type;
5304                                 ether_type = rte_be_to_cpu_16(ether_type);
5305                         } else {
5306                                 ether_type = 0;
5307                         }
5308                         break;
5309                 case RTE_FLOW_ITEM_TYPE_VLAN:
5310                         ret = flow_dv_validate_item_vlan(items, item_flags,
5311                                                          dev, error);
5312                         if (ret < 0)
5313                                 return ret;
5314                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
5315                                              MLX5_FLOW_LAYER_OUTER_VLAN;
5316                         if (items->mask != NULL && items->spec != NULL) {
5317                                 ether_type =
5318                                         ((const struct rte_flow_item_vlan *)
5319                                          items->spec)->inner_type;
5320                                 ether_type &=
5321                                         ((const struct rte_flow_item_vlan *)
5322                                          items->mask)->inner_type;
5323                                 ether_type = rte_be_to_cpu_16(ether_type);
5324                         } else {
5325                                 ether_type = 0;
5326                         }
5327                         /* Store outer VLAN mask for of_push_vlan action. */
5328                         if (!tunnel)
5329                                 vlan_m = items->mask;
5330                         break;
5331                 case RTE_FLOW_ITEM_TYPE_IPV4:
5332                         mlx5_flow_tunnel_ip_check(items, next_protocol,
5333                                                   &item_flags, &tunnel);
5334                         ret = flow_dv_validate_item_ipv4(items, item_flags,
5335                                                          last_item, ether_type,
5336                                                          error);
5337                         if (ret < 0)
5338                                 return ret;
5339                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
5340                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
5341                         if (items->mask != NULL &&
5342                             ((const struct rte_flow_item_ipv4 *)
5343                              items->mask)->hdr.next_proto_id) {
5344                                 next_protocol =
5345                                         ((const struct rte_flow_item_ipv4 *)
5346                                          (items->spec))->hdr.next_proto_id;
5347                                 next_protocol &=
5348                                         ((const struct rte_flow_item_ipv4 *)
5349                                          (items->mask))->hdr.next_proto_id;
5350                         } else {
5351                                 /* Reset for inner layer. */
5352                                 next_protocol = 0xff;
5353                         }
5354                         break;
5355                 case RTE_FLOW_ITEM_TYPE_IPV6:
5356                         mlx5_flow_tunnel_ip_check(items, next_protocol,
5357                                                   &item_flags, &tunnel);
5358                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
5359                                                            last_item,
5360                                                            ether_type,
5361                                                            &nic_ipv6_mask,
5362                                                            error);
5363                         if (ret < 0)
5364                                 return ret;
5365                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
5366                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
5367                         if (items->mask != NULL &&
5368                             ((const struct rte_flow_item_ipv6 *)
5369                              items->mask)->hdr.proto) {
5370                                 item_ipv6_proto =
5371                                         ((const struct rte_flow_item_ipv6 *)
5372                                          items->spec)->hdr.proto;
5373                                 next_protocol =
5374                                         ((const struct rte_flow_item_ipv6 *)
5375                                          items->spec)->hdr.proto;
5376                                 next_protocol &=
5377                                         ((const struct rte_flow_item_ipv6 *)
5378                                          items->mask)->hdr.proto;
5379                         } else {
5380                                 /* Reset for inner layer. */
5381                                 next_protocol = 0xff;
5382                         }
5383                         break;
5384                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
5385                         ret = flow_dv_validate_item_ipv6_frag_ext(items,
5386                                                                   item_flags,
5387                                                                   error);
5388                         if (ret < 0)
5389                                 return ret;
5390                         last_item = tunnel ?
5391                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
5392                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
5393                         if (items->mask != NULL &&
5394                             ((const struct rte_flow_item_ipv6_frag_ext *)
5395                              items->mask)->hdr.next_header) {
5396                                 next_protocol =
5397                                 ((const struct rte_flow_item_ipv6_frag_ext *)
5398                                  items->spec)->hdr.next_header;
5399                                 next_protocol &=
5400                                 ((const struct rte_flow_item_ipv6_frag_ext *)
5401                                  items->mask)->hdr.next_header;
5402                         } else {
5403                                 /* Reset for inner layer. */
5404                                 next_protocol = 0xff;
5405                         }
5406                         break;
5407                 case RTE_FLOW_ITEM_TYPE_TCP:
5408                         ret = mlx5_flow_validate_item_tcp
5409                                                 (items, item_flags,
5410                                                  next_protocol,
5411                                                  &nic_tcp_mask,
5412                                                  error);
5413                         if (ret < 0)
5414                                 return ret;
5415                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
5416                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
5417                         break;
5418                 case RTE_FLOW_ITEM_TYPE_UDP:
5419                         ret = mlx5_flow_validate_item_udp(items, item_flags,
5420                                                           next_protocol,
5421                                                           error);
5422                         if (ret < 0)
5423                                 return ret;
5424                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
5425                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
5426                         break;
5427                 case RTE_FLOW_ITEM_TYPE_GRE:
5428                         ret = mlx5_flow_validate_item_gre(items, item_flags,
5429                                                           next_protocol, error);
5430                         if (ret < 0)
5431                                 return ret;
5432                         gre_item = items;
5433                         last_item = MLX5_FLOW_LAYER_GRE;
5434                         break;
5435                 case RTE_FLOW_ITEM_TYPE_NVGRE:
5436                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
5437                                                             next_protocol,
5438                                                             error);
5439                         if (ret < 0)
5440                                 return ret;
5441                         last_item = MLX5_FLOW_LAYER_NVGRE;
5442                         break;
5443                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
5444                         ret = mlx5_flow_validate_item_gre_key
5445                                 (items, item_flags, gre_item, error);
5446                         if (ret < 0)
5447                                 return ret;
5448                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
5449                         break;
5450                 case RTE_FLOW_ITEM_TYPE_VXLAN:
5451                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
5452                                                             error);
5453                         if (ret < 0)
5454                                 return ret;
5455                         last_item = MLX5_FLOW_LAYER_VXLAN;
5456                         break;
5457                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
5458                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
5459                                                                 item_flags, dev,
5460                                                                 error);
5461                         if (ret < 0)
5462                                 return ret;
5463                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
5464                         break;
5465                 case RTE_FLOW_ITEM_TYPE_GENEVE:
5466                         ret = mlx5_flow_validate_item_geneve(items,
5467                                                              item_flags, dev,
5468                                                              error);
5469                         if (ret < 0)
5470                                 return ret;
5471                         last_item = MLX5_FLOW_LAYER_GENEVE;
5472                         break;
5473                 case RTE_FLOW_ITEM_TYPE_MPLS:
5474                         ret = mlx5_flow_validate_item_mpls(dev, items,
5475                                                            item_flags,
5476                                                            last_item, error);
5477                         if (ret < 0)
5478                                 return ret;
5479                         last_item = MLX5_FLOW_LAYER_MPLS;
5480                         break;
5481
5482                 case RTE_FLOW_ITEM_TYPE_MARK:
5483                         ret = flow_dv_validate_item_mark(dev, items, attr,
5484                                                          error);
5485                         if (ret < 0)
5486                                 return ret;
5487                         last_item = MLX5_FLOW_ITEM_MARK;
5488                         break;
5489                 case RTE_FLOW_ITEM_TYPE_META:
5490                         ret = flow_dv_validate_item_meta(dev, items, attr,
5491                                                          error);
5492                         if (ret < 0)
5493                                 return ret;
5494                         last_item = MLX5_FLOW_ITEM_METADATA;
5495                         break;
5496                 case RTE_FLOW_ITEM_TYPE_ICMP:
5497                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
5498                                                            next_protocol,
5499                                                            error);
5500                         if (ret < 0)
5501                                 return ret;
5502                         last_item = MLX5_FLOW_LAYER_ICMP;
5503                         break;
5504                 case RTE_FLOW_ITEM_TYPE_ICMP6:
5505                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
5506                                                             next_protocol,
5507                                                             error);
5508                         if (ret < 0)
5509                                 return ret;
5510                         item_ipv6_proto = IPPROTO_ICMPV6;
5511                         last_item = MLX5_FLOW_LAYER_ICMP6;
5512                         break;
5513                 case RTE_FLOW_ITEM_TYPE_TAG:
5514                         ret = flow_dv_validate_item_tag(dev, items,
5515                                                         attr, error);
5516                         if (ret < 0)
5517                                 return ret;
5518                         last_item = MLX5_FLOW_ITEM_TAG;
5519                         break;
5520                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
5521                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
5522                         break;
5523                 case RTE_FLOW_ITEM_TYPE_GTP:
5524                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
5525                                                         error);
5526                         if (ret < 0)
5527                                 return ret;
5528                         last_item = MLX5_FLOW_LAYER_GTP;
5529                         break;
5530                 case RTE_FLOW_ITEM_TYPE_ECPRI:
5531                         /* Capacity will be checked in the translate stage. */
5532                         ret = mlx5_flow_validate_item_ecpri(items, item_flags,
5533                                                             last_item,
5534                                                             ether_type,
5535                                                             &nic_ecpri_mask,
5536                                                             error);
5537                         if (ret < 0)
5538                                 return ret;
5539                         last_item = MLX5_FLOW_LAYER_ECPRI;
5540                         break;
5541                 default:
5542                         return rte_flow_error_set(error, ENOTSUP,
5543                                                   RTE_FLOW_ERROR_TYPE_ITEM,
5544                                                   NULL, "item not supported");
5545                 }
5546                 item_flags |= last_item;
5547         }
5548         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5549                 int type = actions->type;
5550
5551                 if (!mlx5_flow_os_action_supported(type))
5552                         return rte_flow_error_set(error, ENOTSUP,
5553                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5554                                                   actions,
5555                                                   "action not supported");
5556                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
5557                         return rte_flow_error_set(error, ENOTSUP,
5558                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5559                                                   actions, "too many actions");
5560                 switch (type) {
5561                 case RTE_FLOW_ACTION_TYPE_VOID:
5562                         break;
5563                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5564                         ret = flow_dv_validate_action_port_id(dev,
5565                                                               action_flags,
5566                                                               actions,
5567                                                               attr,
5568                                                               error);
5569                         if (ret)
5570                                 return ret;
5571                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
5572                         ++actions_n;
5573                         break;
5574                 case RTE_FLOW_ACTION_TYPE_FLAG:
5575                         ret = flow_dv_validate_action_flag(dev, action_flags,
5576                                                            attr, error);
5577                         if (ret < 0)
5578                                 return ret;
5579                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
5580                                 /* Count all modify-header actions as one. */
5581                                 if (!(action_flags &
5582                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
5583                                         ++actions_n;
5584                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
5585                                                 MLX5_FLOW_ACTION_MARK_EXT;
5586                         } else {
5587                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
5588                                 ++actions_n;
5589                         }
5590                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
5591                         break;
5592                 case RTE_FLOW_ACTION_TYPE_MARK:
5593                         ret = flow_dv_validate_action_mark(dev, actions,
5594                                                            action_flags,
5595                                                            attr, error);
5596                         if (ret < 0)
5597                                 return ret;
5598                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
5599                                 /* Count all modify-header actions as one. */
5600                                 if (!(action_flags &
5601                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
5602                                         ++actions_n;
5603                                 action_flags |= MLX5_FLOW_ACTION_MARK |
5604                                                 MLX5_FLOW_ACTION_MARK_EXT;
5605                         } else {
5606                                 action_flags |= MLX5_FLOW_ACTION_MARK;
5607                                 ++actions_n;
5608                         }
5609                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
5610                         break;
5611                 case RTE_FLOW_ACTION_TYPE_SET_META:
5612                         ret = flow_dv_validate_action_set_meta(dev, actions,
5613                                                                action_flags,
5614                                                                attr, error);
5615                         if (ret < 0)
5616                                 return ret;
5617                         /* Count all modify-header actions as one action. */
5618                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5619                                 ++actions_n;
5620                         action_flags |= MLX5_FLOW_ACTION_SET_META;
5621                         rw_act_num += MLX5_ACT_NUM_SET_META;
5622                         break;
5623                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
5624                         ret = flow_dv_validate_action_set_tag(dev, actions,
5625                                                               action_flags,
5626                                                               attr, error);
5627                         if (ret < 0)
5628                                 return ret;
5629                         /* Count all modify-header actions as one action. */
5630                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5631                                 ++actions_n;
5632                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
5633                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
5634                         break;
5635                 case RTE_FLOW_ACTION_TYPE_DROP:
5636                         ret = mlx5_flow_validate_action_drop(action_flags,
5637                                                              attr, error);
5638                         if (ret < 0)
5639                                 return ret;
5640                         action_flags |= MLX5_FLOW_ACTION_DROP;
5641                         ++actions_n;
5642                         break;
5643                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5644                         ret = mlx5_flow_validate_action_queue(actions,
5645                                                               action_flags, dev,
5646                                                               attr, error);
5647                         if (ret < 0)
5648                                 return ret;
5649                         queue_index = ((const struct rte_flow_action_queue *)
5650                                                         (actions->conf))->index;
5651                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
5652                         ++actions_n;
5653                         break;
5654                 case RTE_FLOW_ACTION_TYPE_RSS:
5655                         rss = actions->conf;
5656                         ret = mlx5_flow_validate_action_rss(actions,
5657                                                             action_flags, dev,
5658                                                             attr, item_flags,
5659                                                             error);
5660                         if (ret < 0)
5661                                 return ret;
5662                         if (rss != NULL && rss->queue_num)
5663                                 queue_index = rss->queue[0];
5664                         action_flags |= MLX5_FLOW_ACTION_RSS;
5665                         ++actions_n;
5666                         break;
5667                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
5668                         ret =
5669                         mlx5_flow_validate_action_default_miss(action_flags,
5670                                         attr, error);
5671                         if (ret < 0)
5672                                 return ret;
5673                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
5674                         ++actions_n;
5675                         break;
5676                 case RTE_FLOW_ACTION_TYPE_COUNT:
5677                         ret = flow_dv_validate_action_count(dev, error);
5678                         if (ret < 0)
5679                                 return ret;
5680                         action_flags |= MLX5_FLOW_ACTION_COUNT;
5681                         ++actions_n;
5682                         break;
5683                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
5684                         if (flow_dv_validate_action_pop_vlan(dev,
5685                                                              action_flags,
5686                                                              actions,
5687                                                              item_flags, attr,
5688                                                              error))
5689                                 return -rte_errno;
5690                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
5691                         ++actions_n;
5692                         break;
5693                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5694                         ret = flow_dv_validate_action_push_vlan(dev,
5695                                                                 action_flags,
5696                                                                 vlan_m,
5697                                                                 actions, attr,
5698                                                                 error);
5699                         if (ret < 0)
5700                                 return ret;
5701                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
5702                         ++actions_n;
5703                         break;
5704                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
5705                         ret = flow_dv_validate_action_set_vlan_pcp
5706                                                 (action_flags, actions, error);
5707                         if (ret < 0)
5708                                 return ret;
5709                         /* Count PCP with push_vlan command. */
5710                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
5711                         break;
5712                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
5713                         ret = flow_dv_validate_action_set_vlan_vid
5714                                                 (item_flags, action_flags,
5715                                                  actions, error);
5716                         if (ret < 0)
5717                                 return ret;
5718                         /* Count VID with push_vlan command. */
5719                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
5720                         rw_act_num += MLX5_ACT_NUM_MDF_VID;
5721                         break;
5722                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5723                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5724                         ret = flow_dv_validate_action_l2_encap(dev,
5725                                                                action_flags,
5726                                                                actions, attr,
5727                                                                error);
5728                         if (ret < 0)
5729                                 return ret;
5730                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
5731                         ++actions_n;
5732                         break;
5733                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5734                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5735                         ret = flow_dv_validate_action_decap(dev, action_flags,
5736                                                             attr, error);
5737                         if (ret < 0)
5738                                 return ret;
5739                         action_flags |= MLX5_FLOW_ACTION_DECAP;
5740                         ++actions_n;
5741                         break;
5742                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5743                         ret = flow_dv_validate_action_raw_encap_decap
5744                                 (dev, NULL, actions->conf, attr, &action_flags,
5745                                  &actions_n, error);
5746                         if (ret < 0)
5747                                 return ret;
5748                         break;
5749                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5750                         decap = actions->conf;
5751                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
5752                                 ;
5753                         if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
5754                                 encap = NULL;
5755                                 actions--;
5756                         } else {
5757                                 encap = actions->conf;
5758                         }
5759                         ret = flow_dv_validate_action_raw_encap_decap
5760                                            (dev,
5761                                             decap ? decap : &empty_decap, encap,
5762                                             attr, &action_flags, &actions_n,
5763                                             error);
5764                         if (ret < 0)
5765                                 return ret;
5766                         break;
5767                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
5768                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
5769                         ret = flow_dv_validate_action_modify_mac(action_flags,
5770                                                                  actions,
5771                                                                  item_flags,
5772                                                                  error);
5773                         if (ret < 0)
5774                                 return ret;
5775                         /* Count all modify-header actions as one action. */
5776                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5777                                 ++actions_n;
5778                         action_flags |= actions->type ==
5779                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
5780                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
5781                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
5782                         /*
5783                          * Even if the source and destination MAC addresses have
5784                          * overlap in the header with 4B alignment, the convert
5785                          * function will handle them separately and 4 SW actions
5786                          * will be created. And 2 actions will be added each
5787                          * time no matter how many bytes of address will be set.
5788                          */
5789                         rw_act_num += MLX5_ACT_NUM_MDF_MAC;
5790                         break;
5791                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
5792                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
5793                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
5794                                                                   actions,
5795                                                                   item_flags,
5796                                                                   error);
5797                         if (ret < 0)
5798                                 return ret;
5799                         /* Count all modify-header actions as one action. */
5800                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5801                                 ++actions_n;
5802                         action_flags |= actions->type ==
5803                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
5804                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
5805                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
5806                         rw_act_num += MLX5_ACT_NUM_MDF_IPV4;
5807                         break;
5808                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
5809                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
5810                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
5811                                                                   actions,
5812                                                                   item_flags,
5813                                                                   error);
5814                         if (ret < 0)
5815                                 return ret;
5816                         if (item_ipv6_proto == IPPROTO_ICMPV6)
5817                                 return rte_flow_error_set(error, ENOTSUP,
5818                                         RTE_FLOW_ERROR_TYPE_ACTION,
5819                                         actions,
5820                                         "Can't change header "
5821                                         "with ICMPv6 proto");
5822                         /* Count all modify-header actions as one action. */
5823                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5824                                 ++actions_n;
5825                         action_flags |= actions->type ==
5826                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
5827                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
5828                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
5829                         rw_act_num += MLX5_ACT_NUM_MDF_IPV6;
5830                         break;
5831                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
5832                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
5833                         ret = flow_dv_validate_action_modify_tp(action_flags,
5834                                                                 actions,
5835                                                                 item_flags,
5836                                                                 error);
5837                         if (ret < 0)
5838                                 return ret;
5839                         /* Count all modify-header actions as one action. */
5840                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5841                                 ++actions_n;
5842                         action_flags |= actions->type ==
5843                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
5844                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
5845                                                 MLX5_FLOW_ACTION_SET_TP_DST;
5846                         rw_act_num += MLX5_ACT_NUM_MDF_PORT;
5847                         break;
5848                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
5849                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
5850                         ret = flow_dv_validate_action_modify_ttl(action_flags,
5851                                                                  actions,
5852                                                                  item_flags,
5853                                                                  error);
5854                         if (ret < 0)
5855                                 return ret;
5856                         /* Count all modify-header actions as one action. */
5857                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5858                                 ++actions_n;
5859                         action_flags |= actions->type ==
5860                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
5861                                                 MLX5_FLOW_ACTION_SET_TTL :
5862                                                 MLX5_FLOW_ACTION_DEC_TTL;
5863                         rw_act_num += MLX5_ACT_NUM_MDF_TTL;
5864                         break;
5865                 case RTE_FLOW_ACTION_TYPE_JUMP:
5866                         ret = flow_dv_validate_action_jump(dev, tunnel, actions,
5867                                                            action_flags,
5868                                                            attr, external,
5869                                                            error);
5870                         if (ret)
5871                                 return ret;
5872                         ++actions_n;
5873                         action_flags |= MLX5_FLOW_ACTION_JUMP;
5874                         break;
5875                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
5876                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
5877                         ret = flow_dv_validate_action_modify_tcp_seq
5878                                                                 (action_flags,
5879                                                                  actions,
5880                                                                  item_flags,
5881                                                                  error);
5882                         if (ret < 0)
5883                                 return ret;
5884                         /* Count all modify-header actions as one action. */
5885                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5886                                 ++actions_n;
5887                         action_flags |= actions->type ==
5888                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
5889                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
5890                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
5891                         rw_act_num += MLX5_ACT_NUM_MDF_TCPSEQ;
5892                         break;
5893                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5894                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5895                         ret = flow_dv_validate_action_modify_tcp_ack
5896                                                                 (action_flags,
5897                                                                  actions,
5898                                                                  item_flags,
5899                                                                  error);
5900                         if (ret < 0)
5901                                 return ret;
5902                         /* Count all modify-header actions as one action. */
5903                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5904                                 ++actions_n;
5905                         action_flags |= actions->type ==
5906                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
5907                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
5908                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
5909                         rw_act_num += MLX5_ACT_NUM_MDF_TCPACK;
5910                         break;
5911                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
5912                         break;
5913                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
5914                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
5915                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
5916                         break;
5917                 case RTE_FLOW_ACTION_TYPE_METER:
5918                         ret = mlx5_flow_validate_action_meter(dev,
5919                                                               action_flags,
5920                                                               actions, attr,
5921                                                               error);
5922                         if (ret < 0)
5923                                 return ret;
5924                         action_flags |= MLX5_FLOW_ACTION_METER;
5925                         ++actions_n;
5926                         /* Meter action will add one more TAG action. */
5927                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
5928                         break;
5929                 case RTE_FLOW_ACTION_TYPE_AGE:
5930                         ret = flow_dv_validate_action_age(action_flags,
5931                                                           actions, dev,
5932                                                           error);
5933                         if (ret < 0)
5934                                 return ret;
5935                         action_flags |= MLX5_FLOW_ACTION_AGE;
5936                         ++actions_n;
5937                         break;
5938                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5939                         ret = flow_dv_validate_action_modify_ipv4_dscp
5940                                                          (action_flags,
5941                                                           actions,
5942                                                           item_flags,
5943                                                           error);
5944                         if (ret < 0)
5945                                 return ret;
5946                         /* Count all modify-header actions as one action. */
5947                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5948                                 ++actions_n;
5949                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
5950                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
5951                         break;
5952                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5953                         ret = flow_dv_validate_action_modify_ipv6_dscp
5954                                                                 (action_flags,
5955                                                                  actions,
5956                                                                  item_flags,
5957                                                                  error);
5958                         if (ret < 0)
5959                                 return ret;
5960                         /* Count all modify-header actions as one action. */
5961                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5962                                 ++actions_n;
5963                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
5964                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
5965                         break;
5966                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
5967                         ret = flow_dv_validate_action_sample(action_flags,
5968                                                              actions, dev,
5969                                                              attr, error);
5970                         if (ret < 0)
5971                                 return ret;
5972                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
5973                         ++actions_n;
5974                         break;
5975                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
5976                         if (actions[0].type != (typeof(actions[0].type))
5977                                 MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET)
5978                                 return rte_flow_error_set
5979                                                 (error, EINVAL,
5980                                                 RTE_FLOW_ERROR_TYPE_ACTION,
5981                                                 NULL, "MLX5 private action "
5982                                                 "must be the first");
5983
5984                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
5985                         break;
5986                 default:
5987                         return rte_flow_error_set(error, ENOTSUP,
5988                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5989                                                   actions,
5990                                                   "action not supported");
5991                 }
5992         }
5993         /*
5994          * Validate actions in flow rules
5995          * - Explicit decap action is prohibited by the tunnel offload API.
5996          * - Drop action in tunnel steer rule is prohibited by the API.
5997          * - Application cannot use MARK action because it's value can mask
5998          *   tunnel default miss nitification.
5999          * - JUMP in tunnel match rule has no support in current PMD
6000          *   implementation.
6001          * - TAG & META are reserved for future uses.
6002          */
6003         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_SET) {
6004                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_DECAP    |
6005                                             MLX5_FLOW_ACTION_MARK     |
6006                                             MLX5_FLOW_ACTION_SET_TAG  |
6007                                             MLX5_FLOW_ACTION_SET_META |
6008                                             MLX5_FLOW_ACTION_DROP;
6009
6010                 if (action_flags & bad_actions_mask)
6011                         return rte_flow_error_set
6012                                         (error, EINVAL,
6013                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
6014                                         "Invalid RTE action in tunnel "
6015                                         "set decap rule");
6016                 if (!(action_flags & MLX5_FLOW_ACTION_JUMP))
6017                         return rte_flow_error_set
6018                                         (error, EINVAL,
6019                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
6020                                         "tunnel set decap rule must terminate "
6021                                         "with JUMP");
6022                 if (!attr->ingress)
6023                         return rte_flow_error_set
6024                                         (error, EINVAL,
6025                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
6026                                         "tunnel flows for ingress traffic only");
6027         }
6028         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_MATCH) {
6029                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_JUMP    |
6030                                             MLX5_FLOW_ACTION_MARK    |
6031                                             MLX5_FLOW_ACTION_SET_TAG |
6032                                             MLX5_FLOW_ACTION_SET_META;
6033
6034                 if (action_flags & bad_actions_mask)
6035                         return rte_flow_error_set
6036                                         (error, EINVAL,
6037                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
6038                                         "Invalid RTE action in tunnel "
6039                                         "set match rule");
6040         }
6041         /*
6042          * Validate the drop action mutual exclusion with other actions.
6043          * Drop action is mutually-exclusive with any other action, except for
6044          * Count action.
6045          */
6046         if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
6047             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
6048                 return rte_flow_error_set(error, EINVAL,
6049                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
6050                                           "Drop action is mutually-exclusive "
6051                                           "with any other action, except for "
6052                                           "Count action");
6053         /* Eswitch has few restrictions on using items and actions */
6054         if (attr->transfer) {
6055                 if (!mlx5_flow_ext_mreg_supported(dev) &&
6056                     action_flags & MLX5_FLOW_ACTION_FLAG)
6057                         return rte_flow_error_set(error, ENOTSUP,
6058                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6059                                                   NULL,
6060                                                   "unsupported action FLAG");
6061                 if (!mlx5_flow_ext_mreg_supported(dev) &&
6062                     action_flags & MLX5_FLOW_ACTION_MARK)
6063                         return rte_flow_error_set(error, ENOTSUP,
6064                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6065                                                   NULL,
6066                                                   "unsupported action MARK");
6067                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
6068                         return rte_flow_error_set(error, ENOTSUP,
6069                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6070                                                   NULL,
6071                                                   "unsupported action QUEUE");
6072                 if (action_flags & MLX5_FLOW_ACTION_RSS)
6073                         return rte_flow_error_set(error, ENOTSUP,
6074                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6075                                                   NULL,
6076                                                   "unsupported action RSS");
6077                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
6078                         return rte_flow_error_set(error, EINVAL,
6079                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6080                                                   actions,
6081                                                   "no fate action is found");
6082         } else {
6083                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
6084                         return rte_flow_error_set(error, EINVAL,
6085                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6086                                                   actions,
6087                                                   "no fate action is found");
6088         }
6089         /*
6090          * Continue validation for Xcap and VLAN actions.
6091          * If hairpin is working in explicit TX rule mode, there is no actions
6092          * splitting and the validation of hairpin ingress flow should be the
6093          * same as other standard flows.
6094          */
6095         if ((action_flags & (MLX5_FLOW_XCAP_ACTIONS |
6096                              MLX5_FLOW_VLAN_ACTIONS)) &&
6097             (queue_index == 0xFFFF ||
6098              mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN ||
6099              ((conf = mlx5_rxq_get_hairpin_conf(dev, queue_index)) != NULL &&
6100              conf->tx_explicit != 0))) {
6101                 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
6102                     MLX5_FLOW_XCAP_ACTIONS)
6103                         return rte_flow_error_set(error, ENOTSUP,
6104                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6105                                                   NULL, "encap and decap "
6106                                                   "combination aren't supported");
6107                 if (!attr->transfer && attr->ingress) {
6108                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
6109                                 return rte_flow_error_set
6110                                                 (error, ENOTSUP,
6111                                                  RTE_FLOW_ERROR_TYPE_ACTION,
6112                                                  NULL, "encap is not supported"
6113                                                  " for ingress traffic");
6114                         else if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
6115                                 return rte_flow_error_set
6116                                                 (error, ENOTSUP,
6117                                                  RTE_FLOW_ERROR_TYPE_ACTION,
6118                                                  NULL, "push VLAN action not "
6119                                                  "supported for ingress");
6120                         else if ((action_flags & MLX5_FLOW_VLAN_ACTIONS) ==
6121                                         MLX5_FLOW_VLAN_ACTIONS)
6122                                 return rte_flow_error_set
6123                                                 (error, ENOTSUP,
6124                                                  RTE_FLOW_ERROR_TYPE_ACTION,
6125                                                  NULL, "no support for "
6126                                                  "multiple VLAN actions");
6127                 }
6128         }
6129         /*
6130          * Hairpin flow will add one more TAG action in TX implicit mode.
6131          * In TX explicit mode, there will be no hairpin flow ID.
6132          */
6133         if (hairpin > 0)
6134                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
6135         /* extra metadata enabled: one more TAG action will be add. */
6136         if (dev_conf->dv_flow_en &&
6137             dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
6138             mlx5_flow_ext_mreg_supported(dev))
6139                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
6140         if ((uint32_t)rw_act_num >
6141                         flow_dv_modify_hdr_action_max(dev, is_root)) {
6142                 return rte_flow_error_set(error, ENOTSUP,
6143                                           RTE_FLOW_ERROR_TYPE_ACTION,
6144                                           NULL, "too many header modify"
6145                                           " actions to support");
6146         }
6147         return 0;
6148 }
6149
6150 /**
6151  * Internal preparation function. Allocates the DV flow size,
6152  * this size is constant.
6153  *
6154  * @param[in] dev
6155  *   Pointer to the rte_eth_dev structure.
6156  * @param[in] attr
6157  *   Pointer to the flow attributes.
6158  * @param[in] items
6159  *   Pointer to the list of items.
6160  * @param[in] actions
6161  *   Pointer to the list of actions.
6162  * @param[out] error
6163  *   Pointer to the error structure.
6164  *
6165  * @return
6166  *   Pointer to mlx5_flow object on success,
6167  *   otherwise NULL and rte_errno is set.
6168  */
6169 static struct mlx5_flow *
6170 flow_dv_prepare(struct rte_eth_dev *dev,
6171                 const struct rte_flow_attr *attr __rte_unused,
6172                 const struct rte_flow_item items[] __rte_unused,
6173                 const struct rte_flow_action actions[] __rte_unused,
6174                 struct rte_flow_error *error)
6175 {
6176         uint32_t handle_idx = 0;
6177         struct mlx5_flow *dev_flow;
6178         struct mlx5_flow_handle *dev_handle;
6179         struct mlx5_priv *priv = dev->data->dev_private;
6180         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
6181
6182         MLX5_ASSERT(wks);
6183         /* In case of corrupting the memory. */
6184         if (wks->flow_idx >= MLX5_NUM_MAX_DEV_FLOWS) {
6185                 rte_flow_error_set(error, ENOSPC,
6186                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6187                                    "not free temporary device flow");
6188                 return NULL;
6189         }
6190         dev_handle = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
6191                                    &handle_idx);
6192         if (!dev_handle) {
6193                 rte_flow_error_set(error, ENOMEM,
6194                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6195                                    "not enough memory to create flow handle");
6196                 return NULL;
6197         }
6198         MLX5_ASSERT(wks->flow_idx + 1 < RTE_DIM(wks->flows));
6199         dev_flow = &wks->flows[wks->flow_idx++];
6200         dev_flow->handle = dev_handle;
6201         dev_flow->handle_idx = handle_idx;
6202         /*
6203          * In some old rdma-core releases, before continuing, a check of the
6204          * length of matching parameter will be done at first. It needs to use
6205          * the length without misc4 param. If the flow has misc4 support, then
6206          * the length needs to be adjusted accordingly. Each param member is
6207          * aligned with a 64B boundary naturally.
6208          */
6209         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param) -
6210                                   MLX5_ST_SZ_BYTES(fte_match_set_misc4);
6211         /*
6212          * The matching value needs to be cleared to 0 before using. In the
6213          * past, it will be automatically cleared when using rte_*alloc
6214          * API. The time consumption will be almost the same as before.
6215          */
6216         memset(dev_flow->dv.value.buf, 0, MLX5_ST_SZ_BYTES(fte_match_param));
6217         dev_flow->ingress = attr->ingress;
6218         dev_flow->dv.transfer = attr->transfer;
6219         return dev_flow;
6220 }
6221
6222 #ifdef RTE_LIBRTE_MLX5_DEBUG
6223 /**
6224  * Sanity check for match mask and value. Similar to check_valid_spec() in
6225  * kernel driver. If unmasked bit is present in value, it returns failure.
6226  *
6227  * @param match_mask
6228  *   pointer to match mask buffer.
6229  * @param match_value
6230  *   pointer to match value buffer.
6231  *
6232  * @return
6233  *   0 if valid, -EINVAL otherwise.
6234  */
6235 static int
6236 flow_dv_check_valid_spec(void *match_mask, void *match_value)
6237 {
6238         uint8_t *m = match_mask;
6239         uint8_t *v = match_value;
6240         unsigned int i;
6241
6242         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
6243                 if (v[i] & ~m[i]) {
6244                         DRV_LOG(ERR,
6245                                 "match_value differs from match_criteria"
6246                                 " %p[%u] != %p[%u]",
6247                                 match_value, i, match_mask, i);
6248                         return -EINVAL;
6249                 }
6250         }
6251         return 0;
6252 }
6253 #endif
6254
6255 /**
6256  * Add match of ip_version.
6257  *
6258  * @param[in] group
6259  *   Flow group.
6260  * @param[in] headers_v
6261  *   Values header pointer.
6262  * @param[in] headers_m
6263  *   Masks header pointer.
6264  * @param[in] ip_version
6265  *   The IP version to set.
6266  */
6267 static inline void
6268 flow_dv_set_match_ip_version(uint32_t group,
6269                              void *headers_v,
6270                              void *headers_m,
6271                              uint8_t ip_version)
6272 {
6273         if (group == 0)
6274                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
6275         else
6276                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version,
6277                          ip_version);
6278         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, ip_version);
6279         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, 0);
6280         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype, 0);
6281 }
6282
6283 /**
6284  * Add Ethernet item to matcher and to the value.
6285  *
6286  * @param[in, out] matcher
6287  *   Flow matcher.
6288  * @param[in, out] key
6289  *   Flow matcher value.
6290  * @param[in] item
6291  *   Flow pattern to translate.
6292  * @param[in] inner
6293  *   Item is inner pattern.
6294  */
6295 static void
6296 flow_dv_translate_item_eth(void *matcher, void *key,
6297                            const struct rte_flow_item *item, int inner,
6298                            uint32_t group)
6299 {
6300         const struct rte_flow_item_eth *eth_m = item->mask;
6301         const struct rte_flow_item_eth *eth_v = item->spec;
6302         const struct rte_flow_item_eth nic_mask = {
6303                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
6304                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
6305                 .type = RTE_BE16(0xffff),
6306                 .has_vlan = 0,
6307         };
6308         void *hdrs_m;
6309         void *hdrs_v;
6310         char *l24_v;
6311         unsigned int i;
6312
6313         if (!eth_v)
6314                 return;
6315         if (!eth_m)
6316                 eth_m = &nic_mask;
6317         if (inner) {
6318                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
6319                                          inner_headers);
6320                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6321         } else {
6322                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
6323                                          outer_headers);
6324                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6325         }
6326         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, dmac_47_16),
6327                &eth_m->dst, sizeof(eth_m->dst));
6328         /* The value must be in the range of the mask. */
6329         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, dmac_47_16);
6330         for (i = 0; i < sizeof(eth_m->dst); ++i)
6331                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
6332         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, smac_47_16),
6333                &eth_m->src, sizeof(eth_m->src));
6334         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, smac_47_16);
6335         /* The value must be in the range of the mask. */
6336         for (i = 0; i < sizeof(eth_m->dst); ++i)
6337                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
6338         /*
6339          * HW supports match on one Ethertype, the Ethertype following the last
6340          * VLAN tag of the packet (see PRM).
6341          * Set match on ethertype only if ETH header is not followed by VLAN.
6342          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
6343          * ethertype, and use ip_version field instead.
6344          * eCPRI over Ether layer will use type value 0xAEFE.
6345          */
6346         if (eth_m->type == 0xFFFF) {
6347                 /* Set cvlan_tag mask for any single\multi\un-tagged case. */
6348                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
6349                 switch (eth_v->type) {
6350                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
6351                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
6352                         return;
6353                 case RTE_BE16(RTE_ETHER_TYPE_QINQ):
6354                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
6355                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
6356                         return;
6357                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
6358                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
6359                         return;
6360                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
6361                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
6362                         return;
6363                 default:
6364                         break;
6365                 }
6366         }
6367         if (eth_m->has_vlan) {
6368                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
6369                 if (eth_v->has_vlan) {
6370                         /*
6371                          * Here, when also has_more_vlan field in VLAN item is
6372                          * not set, only single-tagged packets will be matched.
6373                          */
6374                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
6375                         return;
6376                 }
6377         }
6378         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
6379                  rte_be_to_cpu_16(eth_m->type));
6380         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
6381         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
6382 }
6383
6384 /**
6385  * Add VLAN item to matcher and to the value.
6386  *
6387  * @param[in, out] dev_flow
6388  *   Flow descriptor.
6389  * @param[in, out] matcher
6390  *   Flow matcher.
6391  * @param[in, out] key
6392  *   Flow matcher value.
6393  * @param[in] item
6394  *   Flow pattern to translate.
6395  * @param[in] inner
6396  *   Item is inner pattern.
6397  */
6398 static void
6399 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
6400                             void *matcher, void *key,
6401                             const struct rte_flow_item *item,
6402                             int inner, uint32_t group)
6403 {
6404         const struct rte_flow_item_vlan *vlan_m = item->mask;
6405         const struct rte_flow_item_vlan *vlan_v = item->spec;
6406         void *hdrs_m;
6407         void *hdrs_v;
6408         uint16_t tci_m;
6409         uint16_t tci_v;
6410
6411         if (inner) {
6412                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
6413                                          inner_headers);
6414                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6415         } else {
6416                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
6417                                          outer_headers);
6418                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6419                 /*
6420                  * This is workaround, masks are not supported,
6421                  * and pre-validated.
6422                  */
6423                 if (vlan_v)
6424                         dev_flow->handle->vf_vlan.tag =
6425                                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
6426         }
6427         /*
6428          * When VLAN item exists in flow, mark packet as tagged,
6429          * even if TCI is not specified.
6430          */
6431         if (!MLX5_GET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag)) {
6432                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
6433                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
6434         }
6435         if (!vlan_v)
6436                 return;
6437         if (!vlan_m)
6438                 vlan_m = &rte_flow_item_vlan_mask;
6439         tci_m = rte_be_to_cpu_16(vlan_m->tci);
6440         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
6441         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_vid, tci_m);
6442         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_vid, tci_v);
6443         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_cfi, tci_m >> 12);
6444         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_cfi, tci_v >> 12);
6445         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_prio, tci_m >> 13);
6446         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_prio, tci_v >> 13);
6447         /*
6448          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
6449          * ethertype, and use ip_version field instead.
6450          */
6451         if (vlan_m->inner_type == 0xFFFF) {
6452                 switch (vlan_v->inner_type) {
6453                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
6454                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
6455                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
6456                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
6457                         return;
6458                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
6459                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
6460                         return;
6461                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
6462                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
6463                         return;
6464                 default:
6465                         break;
6466                 }
6467         }
6468         if (vlan_m->has_more_vlan && vlan_v->has_more_vlan) {
6469                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
6470                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
6471                 /* Only one vlan_tag bit can be set. */
6472                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
6473                 return;
6474         }
6475         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
6476                  rte_be_to_cpu_16(vlan_m->inner_type));
6477         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, ethertype,
6478                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
6479 }
6480
6481 /**
6482  * Add IPV4 item to matcher and to the value.
6483  *
6484  * @param[in, out] matcher
6485  *   Flow matcher.
6486  * @param[in, out] key
6487  *   Flow matcher value.
6488  * @param[in] item
6489  *   Flow pattern to translate.
6490  * @param[in] inner
6491  *   Item is inner pattern.
6492  * @param[in] group
6493  *   The group to insert the rule.
6494  */
6495 static void
6496 flow_dv_translate_item_ipv4(void *matcher, void *key,
6497                             const struct rte_flow_item *item,
6498                             int inner, uint32_t group)
6499 {
6500         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
6501         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
6502         const struct rte_flow_item_ipv4 nic_mask = {
6503                 .hdr = {
6504                         .src_addr = RTE_BE32(0xffffffff),
6505                         .dst_addr = RTE_BE32(0xffffffff),
6506                         .type_of_service = 0xff,
6507                         .next_proto_id = 0xff,
6508                         .time_to_live = 0xff,
6509                 },
6510         };
6511         void *headers_m;
6512         void *headers_v;
6513         char *l24_m;
6514         char *l24_v;
6515         uint8_t tos;
6516
6517         if (inner) {
6518                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6519                                          inner_headers);
6520                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6521         } else {
6522                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6523                                          outer_headers);
6524                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6525         }
6526         flow_dv_set_match_ip_version(group, headers_v, headers_m, 4);
6527         if (!ipv4_v)
6528                 return;
6529         if (!ipv4_m)
6530                 ipv4_m = &nic_mask;
6531         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
6532                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
6533         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
6534                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
6535         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
6536         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
6537         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
6538                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
6539         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
6540                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
6541         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
6542         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
6543         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
6544         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
6545                  ipv4_m->hdr.type_of_service);
6546         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
6547         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
6548                  ipv4_m->hdr.type_of_service >> 2);
6549         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
6550         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
6551                  ipv4_m->hdr.next_proto_id);
6552         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
6553                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
6554         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
6555                  ipv4_m->hdr.time_to_live);
6556         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
6557                  ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
6558         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
6559                  !!(ipv4_m->hdr.fragment_offset));
6560         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
6561                  !!(ipv4_v->hdr.fragment_offset & ipv4_m->hdr.fragment_offset));
6562 }
6563
6564 /**
6565  * Add IPV6 item to matcher and to the value.
6566  *
6567  * @param[in, out] matcher
6568  *   Flow matcher.
6569  * @param[in, out] key
6570  *   Flow matcher value.
6571  * @param[in] item
6572  *   Flow pattern to translate.
6573  * @param[in] inner
6574  *   Item is inner pattern.
6575  * @param[in] group
6576  *   The group to insert the rule.
6577  */
6578 static void
6579 flow_dv_translate_item_ipv6(void *matcher, void *key,
6580                             const struct rte_flow_item *item,
6581                             int inner, uint32_t group)
6582 {
6583         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
6584         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
6585         const struct rte_flow_item_ipv6 nic_mask = {
6586                 .hdr = {
6587                         .src_addr =
6588                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
6589                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
6590                         .dst_addr =
6591                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
6592                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
6593                         .vtc_flow = RTE_BE32(0xffffffff),
6594                         .proto = 0xff,
6595                         .hop_limits = 0xff,
6596                 },
6597         };
6598         void *headers_m;
6599         void *headers_v;
6600         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6601         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6602         char *l24_m;
6603         char *l24_v;
6604         uint32_t vtc_m;
6605         uint32_t vtc_v;
6606         int i;
6607         int size;
6608
6609         if (inner) {
6610                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6611                                          inner_headers);
6612                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6613         } else {
6614                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6615                                          outer_headers);
6616                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6617         }
6618         flow_dv_set_match_ip_version(group, headers_v, headers_m, 6);
6619         if (!ipv6_v)
6620                 return;
6621         if (!ipv6_m)
6622                 ipv6_m = &nic_mask;
6623         size = sizeof(ipv6_m->hdr.dst_addr);
6624         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
6625                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
6626         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
6627                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
6628         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
6629         for (i = 0; i < size; ++i)
6630                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
6631         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
6632                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
6633         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
6634                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
6635         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
6636         for (i = 0; i < size; ++i)
6637                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
6638         /* TOS. */
6639         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
6640         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
6641         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
6642         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
6643         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
6644         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
6645         /* Label. */
6646         if (inner) {
6647                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
6648                          vtc_m);
6649                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
6650                          vtc_v);
6651         } else {
6652                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
6653                          vtc_m);
6654                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
6655                          vtc_v);
6656         }
6657         /* Protocol. */
6658         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
6659                  ipv6_m->hdr.proto);
6660         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
6661                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
6662         /* Hop limit. */
6663         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
6664                  ipv6_m->hdr.hop_limits);
6665         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
6666                  ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
6667         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
6668                  !!(ipv6_m->has_frag_ext));
6669         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
6670                  !!(ipv6_v->has_frag_ext & ipv6_m->has_frag_ext));
6671 }
6672
6673 /**
6674  * Add IPV6 fragment extension item to matcher and to the value.
6675  *
6676  * @param[in, out] matcher
6677  *   Flow matcher.
6678  * @param[in, out] key
6679  *   Flow matcher value.
6680  * @param[in] item
6681  *   Flow pattern to translate.
6682  * @param[in] inner
6683  *   Item is inner pattern.
6684  */
6685 static void
6686 flow_dv_translate_item_ipv6_frag_ext(void *matcher, void *key,
6687                                      const struct rte_flow_item *item,
6688                                      int inner)
6689 {
6690         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_m = item->mask;
6691         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_v = item->spec;
6692         const struct rte_flow_item_ipv6_frag_ext nic_mask = {
6693                 .hdr = {
6694                         .next_header = 0xff,
6695                         .frag_data = RTE_BE16(0xffff),
6696                 },
6697         };
6698         void *headers_m;
6699         void *headers_v;
6700
6701         if (inner) {
6702                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6703                                          inner_headers);
6704                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6705         } else {
6706                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6707                                          outer_headers);
6708                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6709         }
6710         /* IPv6 fragment extension item exists, so packet is IP fragment. */
6711         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
6712         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 1);
6713         if (!ipv6_frag_ext_v)
6714                 return;
6715         if (!ipv6_frag_ext_m)
6716                 ipv6_frag_ext_m = &nic_mask;
6717         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
6718                  ipv6_frag_ext_m->hdr.next_header);
6719         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
6720                  ipv6_frag_ext_v->hdr.next_header &
6721                  ipv6_frag_ext_m->hdr.next_header);
6722 }
6723
6724 /**
6725  * Add TCP item to matcher and to the value.
6726  *
6727  * @param[in, out] matcher
6728  *   Flow matcher.
6729  * @param[in, out] key
6730  *   Flow matcher value.
6731  * @param[in] item
6732  *   Flow pattern to translate.
6733  * @param[in] inner
6734  *   Item is inner pattern.
6735  */
6736 static void
6737 flow_dv_translate_item_tcp(void *matcher, void *key,
6738                            const struct rte_flow_item *item,
6739                            int inner)
6740 {
6741         const struct rte_flow_item_tcp *tcp_m = item->mask;
6742         const struct rte_flow_item_tcp *tcp_v = item->spec;
6743         void *headers_m;
6744         void *headers_v;
6745
6746         if (inner) {
6747                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6748                                          inner_headers);
6749                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6750         } else {
6751                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6752                                          outer_headers);
6753                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6754         }
6755         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
6756         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
6757         if (!tcp_v)
6758                 return;
6759         if (!tcp_m)
6760                 tcp_m = &rte_flow_item_tcp_mask;
6761         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
6762                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
6763         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
6764                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
6765         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
6766                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
6767         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
6768                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
6769         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
6770                  tcp_m->hdr.tcp_flags);
6771         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
6772                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
6773 }
6774
6775 /**
6776  * Add UDP item to matcher and to the value.
6777  *
6778  * @param[in, out] matcher
6779  *   Flow matcher.
6780  * @param[in, out] key
6781  *   Flow matcher value.
6782  * @param[in] item
6783  *   Flow pattern to translate.
6784  * @param[in] inner
6785  *   Item is inner pattern.
6786  */
6787 static void
6788 flow_dv_translate_item_udp(void *matcher, void *key,
6789                            const struct rte_flow_item *item,
6790                            int inner)
6791 {
6792         const struct rte_flow_item_udp *udp_m = item->mask;
6793         const struct rte_flow_item_udp *udp_v = item->spec;
6794         void *headers_m;
6795         void *headers_v;
6796
6797         if (inner) {
6798                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6799                                          inner_headers);
6800                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6801         } else {
6802                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6803                                          outer_headers);
6804                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6805         }
6806         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
6807         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
6808         if (!udp_v)
6809                 return;
6810         if (!udp_m)
6811                 udp_m = &rte_flow_item_udp_mask;
6812         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
6813                  rte_be_to_cpu_16(udp_m->hdr.src_port));
6814         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
6815                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
6816         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
6817                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
6818         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
6819                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
6820 }
6821
6822 /**
6823  * Add GRE optional Key item to matcher and to the value.
6824  *
6825  * @param[in, out] matcher
6826  *   Flow matcher.
6827  * @param[in, out] key
6828  *   Flow matcher value.
6829  * @param[in] item
6830  *   Flow pattern to translate.
6831  * @param[in] inner
6832  *   Item is inner pattern.
6833  */
6834 static void
6835 flow_dv_translate_item_gre_key(void *matcher, void *key,
6836                                    const struct rte_flow_item *item)
6837 {
6838         const rte_be32_t *key_m = item->mask;
6839         const rte_be32_t *key_v = item->spec;
6840         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6841         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6842         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
6843
6844         /* GRE K bit must be on and should already be validated */
6845         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
6846         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
6847         if (!key_v)
6848                 return;
6849         if (!key_m)
6850                 key_m = &gre_key_default_mask;
6851         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
6852                  rte_be_to_cpu_32(*key_m) >> 8);
6853         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
6854                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
6855         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
6856                  rte_be_to_cpu_32(*key_m) & 0xFF);
6857         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
6858                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
6859 }
6860
6861 /**
6862  * Add GRE item to matcher and to the value.
6863  *
6864  * @param[in, out] matcher
6865  *   Flow matcher.
6866  * @param[in, out] key
6867  *   Flow matcher value.
6868  * @param[in] item
6869  *   Flow pattern to translate.
6870  * @param[in] inner
6871  *   Item is inner pattern.
6872  */
6873 static void
6874 flow_dv_translate_item_gre(void *matcher, void *key,
6875                            const struct rte_flow_item *item,
6876                            int inner)
6877 {
6878         const struct rte_flow_item_gre *gre_m = item->mask;
6879         const struct rte_flow_item_gre *gre_v = item->spec;
6880         void *headers_m;
6881         void *headers_v;
6882         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6883         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6884         struct {
6885                 union {
6886                         __extension__
6887                         struct {
6888                                 uint16_t version:3;
6889                                 uint16_t rsvd0:9;
6890                                 uint16_t s_present:1;
6891                                 uint16_t k_present:1;
6892                                 uint16_t rsvd_bit1:1;
6893                                 uint16_t c_present:1;
6894                         };
6895                         uint16_t value;
6896                 };
6897         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
6898
6899         if (inner) {
6900                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6901                                          inner_headers);
6902                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6903         } else {
6904                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6905                                          outer_headers);
6906                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6907         }
6908         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
6909         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
6910         if (!gre_v)
6911                 return;
6912         if (!gre_m)
6913                 gre_m = &rte_flow_item_gre_mask;
6914         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
6915                  rte_be_to_cpu_16(gre_m->protocol));
6916         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
6917                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
6918         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
6919         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
6920         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
6921                  gre_crks_rsvd0_ver_m.c_present);
6922         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
6923                  gre_crks_rsvd0_ver_v.c_present &
6924                  gre_crks_rsvd0_ver_m.c_present);
6925         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
6926                  gre_crks_rsvd0_ver_m.k_present);
6927         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
6928                  gre_crks_rsvd0_ver_v.k_present &
6929                  gre_crks_rsvd0_ver_m.k_present);
6930         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
6931                  gre_crks_rsvd0_ver_m.s_present);
6932         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
6933                  gre_crks_rsvd0_ver_v.s_present &
6934                  gre_crks_rsvd0_ver_m.s_present);
6935 }
6936
6937 /**
6938  * Add NVGRE item to matcher and to the value.
6939  *
6940  * @param[in, out] matcher
6941  *   Flow matcher.
6942  * @param[in, out] key
6943  *   Flow matcher value.
6944  * @param[in] item
6945  *   Flow pattern to translate.
6946  * @param[in] inner
6947  *   Item is inner pattern.
6948  */
6949 static void
6950 flow_dv_translate_item_nvgre(void *matcher, void *key,
6951                              const struct rte_flow_item *item,
6952                              int inner)
6953 {
6954         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
6955         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
6956         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6957         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6958         const char *tni_flow_id_m;
6959         const char *tni_flow_id_v;
6960         char *gre_key_m;
6961         char *gre_key_v;
6962         int size;
6963         int i;
6964
6965         /* For NVGRE, GRE header fields must be set with defined values. */
6966         const struct rte_flow_item_gre gre_spec = {
6967                 .c_rsvd0_ver = RTE_BE16(0x2000),
6968                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
6969         };
6970         const struct rte_flow_item_gre gre_mask = {
6971                 .c_rsvd0_ver = RTE_BE16(0xB000),
6972                 .protocol = RTE_BE16(UINT16_MAX),
6973         };
6974         const struct rte_flow_item gre_item = {
6975                 .spec = &gre_spec,
6976                 .mask = &gre_mask,
6977                 .last = NULL,
6978         };
6979         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
6980         if (!nvgre_v)
6981                 return;
6982         if (!nvgre_m)
6983                 nvgre_m = &rte_flow_item_nvgre_mask;
6984         tni_flow_id_m = (const char *)nvgre_m->tni;
6985         tni_flow_id_v = (const char *)nvgre_v->tni;
6986         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
6987         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
6988         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
6989         memcpy(gre_key_m, tni_flow_id_m, size);
6990         for (i = 0; i < size; ++i)
6991                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
6992 }
6993
6994 /**
6995  * Add VXLAN item to matcher and to the value.
6996  *
6997  * @param[in, out] matcher
6998  *   Flow matcher.
6999  * @param[in, out] key
7000  *   Flow matcher value.
7001  * @param[in] item
7002  *   Flow pattern to translate.
7003  * @param[in] inner
7004  *   Item is inner pattern.
7005  */
7006 static void
7007 flow_dv_translate_item_vxlan(void *matcher, void *key,
7008                              const struct rte_flow_item *item,
7009                              int inner)
7010 {
7011         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
7012         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
7013         void *headers_m;
7014         void *headers_v;
7015         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
7016         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
7017         char *vni_m;
7018         char *vni_v;
7019         uint16_t dport;
7020         int size;
7021         int i;
7022
7023         if (inner) {
7024                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7025                                          inner_headers);
7026                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
7027         } else {
7028                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7029                                          outer_headers);
7030                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
7031         }
7032         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
7033                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
7034         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
7035                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
7036                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
7037         }
7038         if (!vxlan_v)
7039                 return;
7040         if (!vxlan_m)
7041                 vxlan_m = &rte_flow_item_vxlan_mask;
7042         size = sizeof(vxlan_m->vni);
7043         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
7044         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
7045         memcpy(vni_m, vxlan_m->vni, size);
7046         for (i = 0; i < size; ++i)
7047                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
7048 }
7049
7050 /**
7051  * Add VXLAN-GPE item to matcher and to the value.
7052  *
7053  * @param[in, out] matcher
7054  *   Flow matcher.
7055  * @param[in, out] key
7056  *   Flow matcher value.
7057  * @param[in] item
7058  *   Flow pattern to translate.
7059  * @param[in] inner
7060  *   Item is inner pattern.
7061  */
7062
7063 static void
7064 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
7065                                  const struct rte_flow_item *item, int inner)
7066 {
7067         const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
7068         const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
7069         void *headers_m;
7070         void *headers_v;
7071         void *misc_m =
7072                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
7073         void *misc_v =
7074                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
7075         char *vni_m;
7076         char *vni_v;
7077         uint16_t dport;
7078         int size;
7079         int i;
7080         uint8_t flags_m = 0xff;
7081         uint8_t flags_v = 0xc;
7082
7083         if (inner) {
7084                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7085                                          inner_headers);
7086                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
7087         } else {
7088                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7089                                          outer_headers);
7090                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
7091         }
7092         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
7093                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
7094         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
7095                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
7096                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
7097         }
7098         if (!vxlan_v)
7099                 return;
7100         if (!vxlan_m)
7101                 vxlan_m = &rte_flow_item_vxlan_gpe_mask;
7102         size = sizeof(vxlan_m->vni);
7103         vni_m = MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
7104         vni_v = MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
7105         memcpy(vni_m, vxlan_m->vni, size);
7106         for (i = 0; i < size; ++i)
7107                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
7108         if (vxlan_m->flags) {
7109                 flags_m = vxlan_m->flags;
7110                 flags_v = vxlan_v->flags;
7111         }
7112         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
7113         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
7114         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_next_protocol,
7115                  vxlan_m->protocol);
7116         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_next_protocol,
7117                  vxlan_v->protocol);
7118 }
7119
7120 /**
7121  * Add Geneve item to matcher and to the value.
7122  *
7123  * @param[in, out] matcher
7124  *   Flow matcher.
7125  * @param[in, out] key
7126  *   Flow matcher value.
7127  * @param[in] item
7128  *   Flow pattern to translate.
7129  * @param[in] inner
7130  *   Item is inner pattern.
7131  */
7132
7133 static void
7134 flow_dv_translate_item_geneve(void *matcher, void *key,
7135                               const struct rte_flow_item *item, int inner)
7136 {
7137         const struct rte_flow_item_geneve *geneve_m = item->mask;
7138         const struct rte_flow_item_geneve *geneve_v = item->spec;
7139         void *headers_m;
7140         void *headers_v;
7141         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
7142         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
7143         uint16_t dport;
7144         uint16_t gbhdr_m;
7145         uint16_t gbhdr_v;
7146         char *vni_m;
7147         char *vni_v;
7148         size_t size, i;
7149
7150         if (inner) {
7151                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7152                                          inner_headers);
7153                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
7154         } else {
7155                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7156                                          outer_headers);
7157                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
7158         }
7159         dport = MLX5_UDP_PORT_GENEVE;
7160         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
7161                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
7162                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
7163         }
7164         if (!geneve_v)
7165                 return;
7166         if (!geneve_m)
7167                 geneve_m = &rte_flow_item_geneve_mask;
7168         size = sizeof(geneve_m->vni);
7169         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
7170         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
7171         memcpy(vni_m, geneve_m->vni, size);
7172         for (i = 0; i < size; ++i)
7173                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
7174         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
7175                  rte_be_to_cpu_16(geneve_m->protocol));
7176         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
7177                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
7178         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
7179         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
7180         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
7181                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
7182         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
7183                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
7184         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
7185                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
7186         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
7187                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
7188                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
7189 }
7190
7191 /**
7192  * Add MPLS item to matcher and to the value.
7193  *
7194  * @param[in, out] matcher
7195  *   Flow matcher.
7196  * @param[in, out] key
7197  *   Flow matcher value.
7198  * @param[in] item
7199  *   Flow pattern to translate.
7200  * @param[in] prev_layer
7201  *   The protocol layer indicated in previous item.
7202  * @param[in] inner
7203  *   Item is inner pattern.
7204  */
7205 static void
7206 flow_dv_translate_item_mpls(void *matcher, void *key,
7207                             const struct rte_flow_item *item,
7208                             uint64_t prev_layer,
7209                             int inner)
7210 {
7211         const uint32_t *in_mpls_m = item->mask;
7212         const uint32_t *in_mpls_v = item->spec;
7213         uint32_t *out_mpls_m = 0;
7214         uint32_t *out_mpls_v = 0;
7215         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
7216         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
7217         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
7218                                      misc_parameters_2);
7219         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
7220         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
7221         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
7222
7223         switch (prev_layer) {
7224         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
7225                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
7226                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
7227                          MLX5_UDP_PORT_MPLS);
7228                 break;
7229         case MLX5_FLOW_LAYER_GRE:
7230                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
7231                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
7232                          RTE_ETHER_TYPE_MPLS);
7233                 break;
7234         default:
7235                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
7236                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
7237                          IPPROTO_MPLS);
7238                 break;
7239         }
7240         if (!in_mpls_v)
7241                 return;
7242         if (!in_mpls_m)
7243                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
7244         switch (prev_layer) {
7245         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
7246                 out_mpls_m =
7247                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
7248                                                  outer_first_mpls_over_udp);
7249                 out_mpls_v =
7250                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
7251                                                  outer_first_mpls_over_udp);
7252                 break;
7253         case MLX5_FLOW_LAYER_GRE:
7254                 out_mpls_m =
7255                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
7256                                                  outer_first_mpls_over_gre);
7257                 out_mpls_v =
7258                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
7259                                                  outer_first_mpls_over_gre);
7260                 break;
7261         default:
7262                 /* Inner MPLS not over GRE is not supported. */
7263                 if (!inner) {
7264                         out_mpls_m =
7265                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
7266                                                          misc2_m,
7267                                                          outer_first_mpls);
7268                         out_mpls_v =
7269                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
7270                                                          misc2_v,
7271                                                          outer_first_mpls);
7272                 }
7273                 break;
7274         }
7275         if (out_mpls_m && out_mpls_v) {
7276                 *out_mpls_m = *in_mpls_m;
7277                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
7278         }
7279 }
7280
7281 /**
7282  * Add metadata register item to matcher
7283  *
7284  * @param[in, out] matcher
7285  *   Flow matcher.
7286  * @param[in, out] key
7287  *   Flow matcher value.
7288  * @param[in] reg_type
7289  *   Type of device metadata register
7290  * @param[in] value
7291  *   Register value
7292  * @param[in] mask
7293  *   Register mask
7294  */
7295 static void
7296 flow_dv_match_meta_reg(void *matcher, void *key,
7297                        enum modify_reg reg_type,
7298                        uint32_t data, uint32_t mask)
7299 {
7300         void *misc2_m =
7301                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
7302         void *misc2_v =
7303                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
7304         uint32_t temp;
7305
7306         data &= mask;
7307         switch (reg_type) {
7308         case REG_A:
7309                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
7310                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
7311                 break;
7312         case REG_B:
7313                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
7314                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
7315                 break;
7316         case REG_C_0:
7317                 /*
7318                  * The metadata register C0 field might be divided into
7319                  * source vport index and META item value, we should set
7320                  * this field according to specified mask, not as whole one.
7321                  */
7322                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
7323                 temp |= mask;
7324                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
7325                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
7326                 temp &= ~mask;
7327                 temp |= data;
7328                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
7329                 break;
7330         case REG_C_1:
7331                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
7332                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
7333                 break;
7334         case REG_C_2:
7335                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
7336                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
7337                 break;
7338         case REG_C_3:
7339                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
7340                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
7341                 break;
7342         case REG_C_4:
7343                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
7344                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
7345                 break;
7346         case REG_C_5:
7347                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
7348                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
7349                 break;
7350         case REG_C_6:
7351                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
7352                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
7353                 break;
7354         case REG_C_7:
7355                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
7356                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
7357                 break;
7358         default:
7359                 MLX5_ASSERT(false);
7360                 break;
7361         }
7362 }
7363
7364 /**
7365  * Add MARK item to matcher
7366  *
7367  * @param[in] dev
7368  *   The device to configure through.
7369  * @param[in, out] matcher
7370  *   Flow matcher.
7371  * @param[in, out] key
7372  *   Flow matcher value.
7373  * @param[in] item
7374  *   Flow pattern to translate.
7375  */
7376 static void
7377 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
7378                             void *matcher, void *key,
7379                             const struct rte_flow_item *item)
7380 {
7381         struct mlx5_priv *priv = dev->data->dev_private;
7382         const struct rte_flow_item_mark *mark;
7383         uint32_t value;
7384         uint32_t mask;
7385
7386         mark = item->mask ? (const void *)item->mask :
7387                             &rte_flow_item_mark_mask;
7388         mask = mark->id & priv->sh->dv_mark_mask;
7389         mark = (const void *)item->spec;
7390         MLX5_ASSERT(mark);
7391         value = mark->id & priv->sh->dv_mark_mask & mask;
7392         if (mask) {
7393                 enum modify_reg reg;
7394
7395                 /* Get the metadata register index for the mark. */
7396                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
7397                 MLX5_ASSERT(reg > 0);
7398                 if (reg == REG_C_0) {
7399                         struct mlx5_priv *priv = dev->data->dev_private;
7400                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
7401                         uint32_t shl_c0 = rte_bsf32(msk_c0);
7402
7403                         mask &= msk_c0;
7404                         mask <<= shl_c0;
7405                         value <<= shl_c0;
7406                 }
7407                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
7408         }
7409 }
7410
7411 /**
7412  * Add META item to matcher
7413  *
7414  * @param[in] dev
7415  *   The devich to configure through.
7416  * @param[in, out] matcher
7417  *   Flow matcher.
7418  * @param[in, out] key
7419  *   Flow matcher value.
7420  * @param[in] attr
7421  *   Attributes of flow that includes this item.
7422  * @param[in] item
7423  *   Flow pattern to translate.
7424  */
7425 static void
7426 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
7427                             void *matcher, void *key,
7428                             const struct rte_flow_attr *attr,
7429                             const struct rte_flow_item *item)
7430 {
7431         const struct rte_flow_item_meta *meta_m;
7432         const struct rte_flow_item_meta *meta_v;
7433
7434         meta_m = (const void *)item->mask;
7435         if (!meta_m)
7436                 meta_m = &rte_flow_item_meta_mask;
7437         meta_v = (const void *)item->spec;
7438         if (meta_v) {
7439                 int reg;
7440                 uint32_t value = meta_v->data;
7441                 uint32_t mask = meta_m->data;
7442
7443                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
7444                 if (reg < 0)
7445                         return;
7446                 /*
7447                  * In datapath code there is no endianness
7448                  * coversions for perfromance reasons, all
7449                  * pattern conversions are done in rte_flow.
7450                  */
7451                 value = rte_cpu_to_be_32(value);
7452                 mask = rte_cpu_to_be_32(mask);
7453                 if (reg == REG_C_0) {
7454                         struct mlx5_priv *priv = dev->data->dev_private;
7455                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
7456                         uint32_t shl_c0 = rte_bsf32(msk_c0);
7457 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
7458                         uint32_t shr_c0 = __builtin_clz(priv->sh->dv_meta_mask);
7459
7460                         value >>= shr_c0;
7461                         mask >>= shr_c0;
7462 #endif
7463                         value <<= shl_c0;
7464                         mask <<= shl_c0;
7465                         MLX5_ASSERT(msk_c0);
7466                         MLX5_ASSERT(!(~msk_c0 & mask));
7467                 }
7468                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
7469         }
7470 }
7471
7472 /**
7473  * Add vport metadata Reg C0 item to matcher
7474  *
7475  * @param[in, out] matcher
7476  *   Flow matcher.
7477  * @param[in, out] key
7478  *   Flow matcher value.
7479  * @param[in] reg
7480  *   Flow pattern to translate.
7481  */
7482 static void
7483 flow_dv_translate_item_meta_vport(void *matcher, void *key,
7484                                   uint32_t value, uint32_t mask)
7485 {
7486         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
7487 }
7488
7489 /**
7490  * Add tag item to matcher
7491  *
7492  * @param[in] dev
7493  *   The devich to configure through.
7494  * @param[in, out] matcher
7495  *   Flow matcher.
7496  * @param[in, out] key
7497  *   Flow matcher value.
7498  * @param[in] item
7499  *   Flow pattern to translate.
7500  */
7501 static void
7502 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
7503                                 void *matcher, void *key,
7504                                 const struct rte_flow_item *item)
7505 {
7506         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
7507         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
7508         uint32_t mask, value;
7509
7510         MLX5_ASSERT(tag_v);
7511         value = tag_v->data;
7512         mask = tag_m ? tag_m->data : UINT32_MAX;
7513         if (tag_v->id == REG_C_0) {
7514                 struct mlx5_priv *priv = dev->data->dev_private;
7515                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
7516                 uint32_t shl_c0 = rte_bsf32(msk_c0);
7517
7518                 mask &= msk_c0;
7519                 mask <<= shl_c0;
7520                 value <<= shl_c0;
7521         }
7522         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
7523 }
7524
7525 /**
7526  * Add TAG item to matcher
7527  *
7528  * @param[in] dev
7529  *   The devich to configure through.
7530  * @param[in, out] matcher
7531  *   Flow matcher.
7532  * @param[in, out] key
7533  *   Flow matcher value.
7534  * @param[in] item
7535  *   Flow pattern to translate.
7536  */
7537 static void
7538 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
7539                            void *matcher, void *key,
7540                            const struct rte_flow_item *item)
7541 {
7542         const struct rte_flow_item_tag *tag_v = item->spec;
7543         const struct rte_flow_item_tag *tag_m = item->mask;
7544         enum modify_reg reg;
7545
7546         MLX5_ASSERT(tag_v);
7547         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
7548         /* Get the metadata register index for the tag. */
7549         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
7550         MLX5_ASSERT(reg > 0);
7551         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
7552 }
7553
7554 /**
7555  * Add source vport match to the specified matcher.
7556  *
7557  * @param[in, out] matcher
7558  *   Flow matcher.
7559  * @param[in, out] key
7560  *   Flow matcher value.
7561  * @param[in] port
7562  *   Source vport value to match
7563  * @param[in] mask
7564  *   Mask
7565  */
7566 static void
7567 flow_dv_translate_item_source_vport(void *matcher, void *key,
7568                                     int16_t port, uint16_t mask)
7569 {
7570         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
7571         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
7572
7573         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
7574         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
7575 }
7576
7577 /**
7578  * Translate port-id item to eswitch match on  port-id.
7579  *
7580  * @param[in] dev
7581  *   The devich to configure through.
7582  * @param[in, out] matcher
7583  *   Flow matcher.
7584  * @param[in, out] key
7585  *   Flow matcher value.
7586  * @param[in] item
7587  *   Flow pattern to translate.
7588  *
7589  * @return
7590  *   0 on success, a negative errno value otherwise.
7591  */
7592 static int
7593 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
7594                                void *key, const struct rte_flow_item *item)
7595 {
7596         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
7597         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
7598         struct mlx5_priv *priv;
7599         uint16_t mask, id;
7600
7601         mask = pid_m ? pid_m->id : 0xffff;
7602         id = pid_v ? pid_v->id : dev->data->port_id;
7603         priv = mlx5_port_to_eswitch_info(id, item == NULL);
7604         if (!priv)
7605                 return -rte_errno;
7606         /* Translate to vport field or to metadata, depending on mode. */
7607         if (priv->vport_meta_mask)
7608                 flow_dv_translate_item_meta_vport(matcher, key,
7609                                                   priv->vport_meta_tag,
7610                                                   priv->vport_meta_mask);
7611         else
7612                 flow_dv_translate_item_source_vport(matcher, key,
7613                                                     priv->vport_id, mask);
7614         return 0;
7615 }
7616
7617 /**
7618  * Add ICMP6 item to matcher and to the value.
7619  *
7620  * @param[in, out] matcher
7621  *   Flow matcher.
7622  * @param[in, out] key
7623  *   Flow matcher value.
7624  * @param[in] item
7625  *   Flow pattern to translate.
7626  * @param[in] inner
7627  *   Item is inner pattern.
7628  */
7629 static void
7630 flow_dv_translate_item_icmp6(void *matcher, void *key,
7631                               const struct rte_flow_item *item,
7632                               int inner)
7633 {
7634         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
7635         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
7636         void *headers_m;
7637         void *headers_v;
7638         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
7639                                      misc_parameters_3);
7640         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
7641         if (inner) {
7642                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7643                                          inner_headers);
7644                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
7645         } else {
7646                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7647                                          outer_headers);
7648                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
7649         }
7650         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
7651         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
7652         if (!icmp6_v)
7653                 return;
7654         if (!icmp6_m)
7655                 icmp6_m = &rte_flow_item_icmp6_mask;
7656         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
7657         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
7658                  icmp6_v->type & icmp6_m->type);
7659         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
7660         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
7661                  icmp6_v->code & icmp6_m->code);
7662 }
7663
7664 /**
7665  * Add ICMP item to matcher and to the value.
7666  *
7667  * @param[in, out] matcher
7668  *   Flow matcher.
7669  * @param[in, out] key
7670  *   Flow matcher value.
7671  * @param[in] item
7672  *   Flow pattern to translate.
7673  * @param[in] inner
7674  *   Item is inner pattern.
7675  */
7676 static void
7677 flow_dv_translate_item_icmp(void *matcher, void *key,
7678                             const struct rte_flow_item *item,
7679                             int inner)
7680 {
7681         const struct rte_flow_item_icmp *icmp_m = item->mask;
7682         const struct rte_flow_item_icmp *icmp_v = item->spec;
7683         uint32_t icmp_header_data_m = 0;
7684         uint32_t icmp_header_data_v = 0;
7685         void *headers_m;
7686         void *headers_v;
7687         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
7688                                      misc_parameters_3);
7689         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
7690         if (inner) {
7691                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7692                                          inner_headers);
7693                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
7694         } else {
7695                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7696                                          outer_headers);
7697                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
7698         }
7699         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
7700         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
7701         if (!icmp_v)
7702                 return;
7703         if (!icmp_m)
7704                 icmp_m = &rte_flow_item_icmp_mask;
7705         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
7706                  icmp_m->hdr.icmp_type);
7707         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
7708                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
7709         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
7710                  icmp_m->hdr.icmp_code);
7711         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
7712                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
7713         icmp_header_data_m = rte_be_to_cpu_16(icmp_m->hdr.icmp_seq_nb);
7714         icmp_header_data_m |= rte_be_to_cpu_16(icmp_m->hdr.icmp_ident) << 16;
7715         if (icmp_header_data_m) {
7716                 icmp_header_data_v = rte_be_to_cpu_16(icmp_v->hdr.icmp_seq_nb);
7717                 icmp_header_data_v |=
7718                          rte_be_to_cpu_16(icmp_v->hdr.icmp_ident) << 16;
7719                 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_header_data,
7720                          icmp_header_data_m);
7721                 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_header_data,
7722                          icmp_header_data_v & icmp_header_data_m);
7723         }
7724 }
7725
7726 /**
7727  * Add GTP item to matcher and to the value.
7728  *
7729  * @param[in, out] matcher
7730  *   Flow matcher.
7731  * @param[in, out] key
7732  *   Flow matcher value.
7733  * @param[in] item
7734  *   Flow pattern to translate.
7735  * @param[in] inner
7736  *   Item is inner pattern.
7737  */
7738 static void
7739 flow_dv_translate_item_gtp(void *matcher, void *key,
7740                            const struct rte_flow_item *item, int inner)
7741 {
7742         const struct rte_flow_item_gtp *gtp_m = item->mask;
7743         const struct rte_flow_item_gtp *gtp_v = item->spec;
7744         void *headers_m;
7745         void *headers_v;
7746         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
7747                                      misc_parameters_3);
7748         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
7749         uint16_t dport = RTE_GTPU_UDP_PORT;
7750
7751         if (inner) {
7752                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7753                                          inner_headers);
7754                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
7755         } else {
7756                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7757                                          outer_headers);
7758                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
7759         }
7760         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
7761                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
7762                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
7763         }
7764         if (!gtp_v)
7765                 return;
7766         if (!gtp_m)
7767                 gtp_m = &rte_flow_item_gtp_mask;
7768         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags,
7769                  gtp_m->v_pt_rsv_flags);
7770         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags,
7771                  gtp_v->v_pt_rsv_flags & gtp_m->v_pt_rsv_flags);
7772         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
7773         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
7774                  gtp_v->msg_type & gtp_m->msg_type);
7775         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
7776                  rte_be_to_cpu_32(gtp_m->teid));
7777         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
7778                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
7779 }
7780
7781 /**
7782  * Add eCPRI item to matcher and to the value.
7783  *
7784  * @param[in] dev
7785  *   The devich to configure through.
7786  * @param[in, out] matcher
7787  *   Flow matcher.
7788  * @param[in, out] key
7789  *   Flow matcher value.
7790  * @param[in] item
7791  *   Flow pattern to translate.
7792  * @param[in] samples
7793  *   Sample IDs to be used in the matching.
7794  */
7795 static void
7796 flow_dv_translate_item_ecpri(struct rte_eth_dev *dev, void *matcher,
7797                              void *key, const struct rte_flow_item *item)
7798 {
7799         struct mlx5_priv *priv = dev->data->dev_private;
7800         const struct rte_flow_item_ecpri *ecpri_m = item->mask;
7801         const struct rte_flow_item_ecpri *ecpri_v = item->spec;
7802         void *misc4_m = MLX5_ADDR_OF(fte_match_param, matcher,
7803                                      misc_parameters_4);
7804         void *misc4_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_4);
7805         uint32_t *samples;
7806         void *dw_m;
7807         void *dw_v;
7808
7809         if (!ecpri_v)
7810                 return;
7811         if (!ecpri_m)
7812                 ecpri_m = &rte_flow_item_ecpri_mask;
7813         /*
7814          * Maximal four DW samples are supported in a single matching now.
7815          * Two are used now for a eCPRI matching:
7816          * 1. Type: one byte, mask should be 0x00ff0000 in network order
7817          * 2. ID of a message: one or two bytes, mask 0xffff0000 or 0xff000000
7818          *    if any.
7819          */
7820         if (!ecpri_m->hdr.common.u32)
7821                 return;
7822         samples = priv->sh->fp[MLX5_FLEX_PARSER_ECPRI_0].ids;
7823         /* Need to take the whole DW as the mask to fill the entry. */
7824         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
7825                             prog_sample_field_value_0);
7826         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
7827                             prog_sample_field_value_0);
7828         /* Already big endian (network order) in the header. */
7829         *(uint32_t *)dw_m = ecpri_m->hdr.common.u32;
7830         *(uint32_t *)dw_v = ecpri_v->hdr.common.u32;
7831         /* Sample#0, used for matching type, offset 0. */
7832         MLX5_SET(fte_match_set_misc4, misc4_m,
7833                  prog_sample_field_id_0, samples[0]);
7834         /* It makes no sense to set the sample ID in the mask field. */
7835         MLX5_SET(fte_match_set_misc4, misc4_v,
7836                  prog_sample_field_id_0, samples[0]);
7837         /*
7838          * Checking if message body part needs to be matched.
7839          * Some wildcard rules only matching type field should be supported.
7840          */
7841         if (ecpri_m->hdr.dummy[0]) {
7842                 switch (ecpri_v->hdr.common.type) {
7843                 case RTE_ECPRI_MSG_TYPE_IQ_DATA:
7844                 case RTE_ECPRI_MSG_TYPE_RTC_CTRL:
7845                 case RTE_ECPRI_MSG_TYPE_DLY_MSR:
7846                         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
7847                                             prog_sample_field_value_1);
7848                         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
7849                                             prog_sample_field_value_1);
7850                         *(uint32_t *)dw_m = ecpri_m->hdr.dummy[0];
7851                         *(uint32_t *)dw_v = ecpri_v->hdr.dummy[0];
7852                         /* Sample#1, to match message body, offset 4. */
7853                         MLX5_SET(fte_match_set_misc4, misc4_m,
7854                                  prog_sample_field_id_1, samples[1]);
7855                         MLX5_SET(fte_match_set_misc4, misc4_v,
7856                                  prog_sample_field_id_1, samples[1]);
7857                         break;
7858                 default:
7859                         /* Others, do not match any sample ID. */
7860                         break;
7861                 }
7862         }
7863 }
7864
7865 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
7866
7867 #define HEADER_IS_ZERO(match_criteria, headers)                              \
7868         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
7869                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
7870
7871 /**
7872  * Calculate flow matcher enable bitmap.
7873  *
7874  * @param match_criteria
7875  *   Pointer to flow matcher criteria.
7876  *
7877  * @return
7878  *   Bitmap of enabled fields.
7879  */
7880 static uint8_t
7881 flow_dv_matcher_enable(uint32_t *match_criteria)
7882 {
7883         uint8_t match_criteria_enable;
7884
7885         match_criteria_enable =
7886                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
7887                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
7888         match_criteria_enable |=
7889                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
7890                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
7891         match_criteria_enable |=
7892                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
7893                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
7894         match_criteria_enable |=
7895                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
7896                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
7897         match_criteria_enable |=
7898                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
7899                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
7900         match_criteria_enable |=
7901                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_4)) <<
7902                 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT;
7903         return match_criteria_enable;
7904 }
7905
7906 struct mlx5_hlist_entry *
7907 flow_dv_tbl_create_cb(struct mlx5_hlist *list, uint64_t key64, void *cb_ctx)
7908 {
7909         struct mlx5_dev_ctx_shared *sh = list->ctx;
7910         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
7911         struct rte_eth_dev *dev = ctx->dev;
7912         struct mlx5_flow_tbl_data_entry *tbl_data;
7913         struct mlx5_flow_tbl_tunnel_prm *tt_prm = ctx->data;
7914         struct rte_flow_error *error = ctx->error;
7915         union mlx5_flow_tbl_key key = { .v64 = key64 };
7916         struct mlx5_flow_tbl_resource *tbl;
7917         void *domain;
7918         uint32_t idx = 0;
7919         int ret;
7920
7921         tbl_data = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
7922         if (!tbl_data) {
7923                 rte_flow_error_set(error, ENOMEM,
7924                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7925                                    NULL,
7926                                    "cannot allocate flow table data entry");
7927                 return NULL;
7928         }
7929         tbl_data->idx = idx;
7930         tbl_data->tunnel = tt_prm->tunnel;
7931         tbl_data->group_id = tt_prm->group_id;
7932         tbl_data->external = tt_prm->external;
7933         tbl_data->tunnel_offload = is_tunnel_offload_active(dev);
7934         tbl_data->is_egress = !!key.direction;
7935         tbl = &tbl_data->tbl;
7936         if (key.dummy)
7937                 return &tbl_data->entry;
7938         if (key.domain)
7939                 domain = sh->fdb_domain;
7940         else if (key.direction)
7941                 domain = sh->tx_domain;
7942         else
7943                 domain = sh->rx_domain;
7944         ret = mlx5_flow_os_create_flow_tbl(domain, key.table_id, &tbl->obj);
7945         if (ret) {
7946                 rte_flow_error_set(error, ENOMEM,
7947                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7948                                    NULL, "cannot create flow table object");
7949                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
7950                 return NULL;
7951         }
7952         if (key.table_id) {
7953                 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
7954                                         (tbl->obj, &tbl_data->jump.action);
7955                 if (ret) {
7956                         rte_flow_error_set(error, ENOMEM,
7957                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7958                                            NULL,
7959                                            "cannot create flow jump action");
7960                         mlx5_flow_os_destroy_flow_tbl(tbl->obj);
7961                         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
7962                         return NULL;
7963                 }
7964         }
7965         MKSTR(matcher_name, "%s_%s_%u_matcher_cache",
7966               key.domain ? "FDB" : "NIC", key.direction ? "egress" : "ingress",
7967               key.table_id);
7968         mlx5_cache_list_init(&tbl_data->matchers, matcher_name, 0, sh,
7969                              flow_dv_matcher_create_cb,
7970                              flow_dv_matcher_match_cb,
7971                              flow_dv_matcher_remove_cb);
7972         return &tbl_data->entry;
7973 }
7974
7975 /**
7976  * Get a flow table.
7977  *
7978  * @param[in, out] dev
7979  *   Pointer to rte_eth_dev structure.
7980  * @param[in] table_id
7981  *   Table id to use.
7982  * @param[in] egress
7983  *   Direction of the table.
7984  * @param[in] transfer
7985  *   E-Switch or NIC flow.
7986  * @param[in] dummy
7987  *   Dummy entry for dv API.
7988  * @param[out] error
7989  *   pointer to error structure.
7990  *
7991  * @return
7992  *   Returns tables resource based on the index, NULL in case of failed.
7993  */
7994 struct mlx5_flow_tbl_resource *
7995 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
7996                          uint32_t table_id, uint8_t egress,
7997                          uint8_t transfer,
7998                          bool external,
7999                          const struct mlx5_flow_tunnel *tunnel,
8000                          uint32_t group_id, uint8_t dummy,
8001                          struct rte_flow_error *error)
8002 {
8003         struct mlx5_priv *priv = dev->data->dev_private;
8004         union mlx5_flow_tbl_key table_key = {
8005                 {
8006                         .table_id = table_id,
8007                         .dummy = dummy,
8008                         .domain = !!transfer,
8009                         .direction = !!egress,
8010                 }
8011         };
8012         struct mlx5_flow_tbl_tunnel_prm tt_prm = {
8013                 .tunnel = tunnel,
8014                 .group_id = group_id,
8015                 .external = external,
8016         };
8017         struct mlx5_flow_cb_ctx ctx = {
8018                 .dev = dev,
8019                 .error = error,
8020                 .data = &tt_prm,
8021         };
8022         struct mlx5_hlist_entry *entry;
8023         struct mlx5_flow_tbl_data_entry *tbl_data;
8024
8025         entry = mlx5_hlist_register(priv->sh->flow_tbls, table_key.v64, &ctx);
8026         if (!entry) {
8027                 rte_flow_error_set(error, ENOMEM,
8028                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8029                                    "cannot get table");
8030                 return NULL;
8031         }
8032         tbl_data = container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
8033         return &tbl_data->tbl;
8034 }
8035
8036 void
8037 flow_dv_tbl_remove_cb(struct mlx5_hlist *list,
8038                       struct mlx5_hlist_entry *entry)
8039 {
8040         struct mlx5_dev_ctx_shared *sh = list->ctx;
8041         struct mlx5_flow_tbl_data_entry *tbl_data =
8042                 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
8043
8044         MLX5_ASSERT(entry && sh);
8045         if (tbl_data->jump.action)
8046                 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
8047         if (tbl_data->tbl.obj)
8048                 mlx5_flow_os_destroy_flow_tbl(tbl_data->tbl.obj);
8049         if (tbl_data->tunnel_offload && tbl_data->external) {
8050                 struct mlx5_hlist_entry *he;
8051                 struct mlx5_hlist *tunnel_grp_hash;
8052                 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
8053                 union tunnel_tbl_key tunnel_key = {
8054                         .tunnel_id = tbl_data->tunnel ?
8055                                         tbl_data->tunnel->tunnel_id : 0,
8056                         .group = tbl_data->group_id
8057                 };
8058                 union mlx5_flow_tbl_key table_key = {
8059                         .v64 = entry->key
8060                 };
8061                 uint32_t table_id = table_key.table_id;
8062
8063                 tunnel_grp_hash = tbl_data->tunnel ?
8064                                         tbl_data->tunnel->groups :
8065                                         thub->groups;
8066                 he = mlx5_hlist_lookup(tunnel_grp_hash, tunnel_key.val, NULL);
8067                 if (he)
8068                         mlx5_hlist_unregister(tunnel_grp_hash, he);
8069                 DRV_LOG(DEBUG,
8070                         "Table_id %#x tunnel %u group %u released.",
8071                         table_id,
8072                         tbl_data->tunnel ?
8073                         tbl_data->tunnel->tunnel_id : 0,
8074                         tbl_data->group_id);
8075         }
8076         mlx5_cache_list_destroy(&tbl_data->matchers);
8077         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
8078 }
8079
8080 /**
8081  * Release a flow table.
8082  *
8083  * @param[in] sh
8084  *   Pointer to device shared structure.
8085  * @param[in] tbl
8086  *   Table resource to be released.
8087  *
8088  * @return
8089  *   Returns 0 if table was released, else return 1;
8090  */
8091 static int
8092 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
8093                              struct mlx5_flow_tbl_resource *tbl)
8094 {
8095         struct mlx5_flow_tbl_data_entry *tbl_data =
8096                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
8097
8098         if (!tbl)
8099                 return 0;
8100         return mlx5_hlist_unregister(sh->flow_tbls, &tbl_data->entry);
8101 }
8102
8103 int
8104 flow_dv_matcher_match_cb(struct mlx5_cache_list *list __rte_unused,
8105                          struct mlx5_cache_entry *entry, void *cb_ctx)
8106 {
8107         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8108         struct mlx5_flow_dv_matcher *ref = ctx->data;
8109         struct mlx5_flow_dv_matcher *cur = container_of(entry, typeof(*cur),
8110                                                         entry);
8111
8112         return cur->crc != ref->crc ||
8113                cur->priority != ref->priority ||
8114                memcmp((const void *)cur->mask.buf,
8115                       (const void *)ref->mask.buf, ref->mask.size);
8116 }
8117
8118 struct mlx5_cache_entry *
8119 flow_dv_matcher_create_cb(struct mlx5_cache_list *list,
8120                           struct mlx5_cache_entry *entry __rte_unused,
8121                           void *cb_ctx)
8122 {
8123         struct mlx5_dev_ctx_shared *sh = list->ctx;
8124         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8125         struct mlx5_flow_dv_matcher *ref = ctx->data;
8126         struct mlx5_flow_dv_matcher *cache;
8127         struct mlx5dv_flow_matcher_attr dv_attr = {
8128                 .type = IBV_FLOW_ATTR_NORMAL,
8129                 .match_mask = (void *)&ref->mask,
8130         };
8131         struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
8132                                                             typeof(*tbl), tbl);
8133         int ret;
8134
8135         cache = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*cache), 0, SOCKET_ID_ANY);
8136         if (!cache) {
8137                 rte_flow_error_set(ctx->error, ENOMEM,
8138                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8139                                    "cannot create matcher");
8140                 return NULL;
8141         }
8142         *cache = *ref;
8143         dv_attr.match_criteria_enable =
8144                 flow_dv_matcher_enable(cache->mask.buf);
8145         dv_attr.priority = ref->priority;
8146         if (tbl->is_egress)
8147                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
8148         ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->tbl.obj,
8149                                                &cache->matcher_object);
8150         if (ret) {
8151                 mlx5_free(cache);
8152                 rte_flow_error_set(ctx->error, ENOMEM,
8153                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8154                                    "cannot create matcher");
8155                 return NULL;
8156         }
8157         return &cache->entry;
8158 }
8159
8160 /**
8161  * Register the flow matcher.
8162  *
8163  * @param[in, out] dev
8164  *   Pointer to rte_eth_dev structure.
8165  * @param[in, out] matcher
8166  *   Pointer to flow matcher.
8167  * @param[in, out] key
8168  *   Pointer to flow table key.
8169  * @parm[in, out] dev_flow
8170  *   Pointer to the dev_flow.
8171  * @param[out] error
8172  *   pointer to error structure.
8173  *
8174  * @return
8175  *   0 on success otherwise -errno and errno is set.
8176  */
8177 static int
8178 flow_dv_matcher_register(struct rte_eth_dev *dev,
8179                          struct mlx5_flow_dv_matcher *ref,
8180                          union mlx5_flow_tbl_key *key,
8181                          struct mlx5_flow *dev_flow,
8182                          struct rte_flow_error *error)
8183 {
8184         struct mlx5_cache_entry *entry;
8185         struct mlx5_flow_dv_matcher *cache;
8186         struct mlx5_flow_tbl_resource *tbl;
8187         struct mlx5_flow_tbl_data_entry *tbl_data;
8188         struct mlx5_flow_cb_ctx ctx = {
8189                 .error = error,
8190                 .data = ref,
8191         };
8192
8193         tbl = flow_dv_tbl_resource_get(dev, key->table_id, key->direction,
8194                                        key->domain, false, NULL, 0, 0, error);
8195         if (!tbl)
8196                 return -rte_errno;      /* No need to refill the error info */
8197         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
8198         ref->tbl = tbl;
8199         entry = mlx5_cache_register(&tbl_data->matchers, &ctx);
8200         if (!entry) {
8201                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
8202                 return rte_flow_error_set(error, ENOMEM,
8203                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8204                                           "cannot allocate ref memory");
8205         }
8206         cache = container_of(entry, typeof(*cache), entry);
8207         dev_flow->handle->dvh.matcher = cache;
8208         return 0;
8209 }
8210
8211 struct mlx5_hlist_entry *
8212 flow_dv_tag_create_cb(struct mlx5_hlist *list, uint64_t key, void *ctx)
8213 {
8214         struct mlx5_dev_ctx_shared *sh = list->ctx;
8215         struct rte_flow_error *error = ctx;
8216         struct mlx5_flow_dv_tag_resource *entry;
8217         uint32_t idx = 0;
8218         int ret;
8219
8220         entry = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
8221         if (!entry) {
8222                 rte_flow_error_set(error, ENOMEM,
8223                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8224                                    "cannot allocate resource memory");
8225                 return NULL;
8226         }
8227         entry->idx = idx;
8228         ret = mlx5_flow_os_create_flow_action_tag(key,
8229                                                   &entry->action);
8230         if (ret) {
8231                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], idx);
8232                 rte_flow_error_set(error, ENOMEM,
8233                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8234                                    NULL, "cannot create action");
8235                 return NULL;
8236         }
8237         return &entry->entry;
8238 }
8239
8240 /**
8241  * Find existing tag resource or create and register a new one.
8242  *
8243  * @param dev[in, out]
8244  *   Pointer to rte_eth_dev structure.
8245  * @param[in, out] tag_be24
8246  *   Tag value in big endian then R-shift 8.
8247  * @parm[in, out] dev_flow
8248  *   Pointer to the dev_flow.
8249  * @param[out] error
8250  *   pointer to error structure.
8251  *
8252  * @return
8253  *   0 on success otherwise -errno and errno is set.
8254  */
8255 static int
8256 flow_dv_tag_resource_register
8257                         (struct rte_eth_dev *dev,
8258                          uint32_t tag_be24,
8259                          struct mlx5_flow *dev_flow,
8260                          struct rte_flow_error *error)
8261 {
8262         struct mlx5_priv *priv = dev->data->dev_private;
8263         struct mlx5_flow_dv_tag_resource *cache_resource;
8264         struct mlx5_hlist_entry *entry;
8265
8266         entry = mlx5_hlist_register(priv->sh->tag_table, tag_be24, error);
8267         if (entry) {
8268                 cache_resource = container_of
8269                         (entry, struct mlx5_flow_dv_tag_resource, entry);
8270                 dev_flow->handle->dvh.rix_tag = cache_resource->idx;
8271                 dev_flow->dv.tag_resource = cache_resource;
8272                 return 0;
8273         }
8274         return -rte_errno;
8275 }
8276
8277 void
8278 flow_dv_tag_remove_cb(struct mlx5_hlist *list,
8279                       struct mlx5_hlist_entry *entry)
8280 {
8281         struct mlx5_dev_ctx_shared *sh = list->ctx;
8282         struct mlx5_flow_dv_tag_resource *tag =
8283                 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
8284
8285         MLX5_ASSERT(tag && sh && tag->action);
8286         claim_zero(mlx5_flow_os_destroy_flow_action(tag->action));
8287         DRV_LOG(DEBUG, "Tag %p: removed.", (void *)tag);
8288         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
8289 }
8290
8291 /**
8292  * Release the tag.
8293  *
8294  * @param dev
8295  *   Pointer to Ethernet device.
8296  * @param tag_idx
8297  *   Tag index.
8298  *
8299  * @return
8300  *   1 while a reference on it exists, 0 when freed.
8301  */
8302 static int
8303 flow_dv_tag_release(struct rte_eth_dev *dev,
8304                     uint32_t tag_idx)
8305 {
8306         struct mlx5_priv *priv = dev->data->dev_private;
8307         struct mlx5_flow_dv_tag_resource *tag;
8308
8309         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG], tag_idx);
8310         if (!tag)
8311                 return 0;
8312         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
8313                 dev->data->port_id, (void *)tag, tag->entry.ref_cnt);
8314         return mlx5_hlist_unregister(priv->sh->tag_table, &tag->entry);
8315 }
8316
8317 /**
8318  * Translate port ID action to vport.
8319  *
8320  * @param[in] dev
8321  *   Pointer to rte_eth_dev structure.
8322  * @param[in] action
8323  *   Pointer to the port ID action.
8324  * @param[out] dst_port_id
8325  *   The target port ID.
8326  * @param[out] error
8327  *   Pointer to the error structure.
8328  *
8329  * @return
8330  *   0 on success, a negative errno value otherwise and rte_errno is set.
8331  */
8332 static int
8333 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
8334                                  const struct rte_flow_action *action,
8335                                  uint32_t *dst_port_id,
8336                                  struct rte_flow_error *error)
8337 {
8338         uint32_t port;
8339         struct mlx5_priv *priv;
8340         const struct rte_flow_action_port_id *conf =
8341                         (const struct rte_flow_action_port_id *)action->conf;
8342
8343         port = conf->original ? dev->data->port_id : conf->id;
8344         priv = mlx5_port_to_eswitch_info(port, false);
8345         if (!priv)
8346                 return rte_flow_error_set(error, -rte_errno,
8347                                           RTE_FLOW_ERROR_TYPE_ACTION,
8348                                           NULL,
8349                                           "No eswitch info was found for port");
8350 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
8351         /*
8352          * This parameter is transferred to
8353          * mlx5dv_dr_action_create_dest_ib_port().
8354          */
8355         *dst_port_id = priv->dev_port;
8356 #else
8357         /*
8358          * Legacy mode, no LAG configurations is supported.
8359          * This parameter is transferred to
8360          * mlx5dv_dr_action_create_dest_vport().
8361          */
8362         *dst_port_id = priv->vport_id;
8363 #endif
8364         return 0;
8365 }
8366
8367 /**
8368  * Create a counter with aging configuration.
8369  *
8370  * @param[in] dev
8371  *   Pointer to rte_eth_dev structure.
8372  * @param[out] count
8373  *   Pointer to the counter action configuration.
8374  * @param[in] age
8375  *   Pointer to the aging action configuration.
8376  *
8377  * @return
8378  *   Index to flow counter on success, 0 otherwise.
8379  */
8380 static uint32_t
8381 flow_dv_translate_create_counter(struct rte_eth_dev *dev,
8382                                 struct mlx5_flow *dev_flow,
8383                                 const struct rte_flow_action_count *count,
8384                                 const struct rte_flow_action_age *age)
8385 {
8386         uint32_t counter;
8387         struct mlx5_age_param *age_param;
8388
8389         if (count && count->shared)
8390                 counter = flow_dv_counter_get_shared(dev, count->id);
8391         else
8392                 counter = flow_dv_counter_alloc(dev, !!age);
8393         if (!counter || age == NULL)
8394                 return counter;
8395         age_param  = flow_dv_counter_idx_get_age(dev, counter);
8396         age_param->context = age->context ? age->context :
8397                 (void *)(uintptr_t)(dev_flow->flow_idx);
8398         age_param->timeout = age->timeout;
8399         age_param->port_id = dev->data->port_id;
8400         __atomic_store_n(&age_param->sec_since_last_hit, 0, __ATOMIC_RELAXED);
8401         __atomic_store_n(&age_param->state, AGE_CANDIDATE, __ATOMIC_RELAXED);
8402         return counter;
8403 }
8404
8405 /**
8406  * Add Tx queue matcher
8407  *
8408  * @param[in] dev
8409  *   Pointer to the dev struct.
8410  * @param[in, out] matcher
8411  *   Flow matcher.
8412  * @param[in, out] key
8413  *   Flow matcher value.
8414  * @param[in] item
8415  *   Flow pattern to translate.
8416  * @param[in] inner
8417  *   Item is inner pattern.
8418  */
8419 static void
8420 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
8421                                 void *matcher, void *key,
8422                                 const struct rte_flow_item *item)
8423 {
8424         const struct mlx5_rte_flow_item_tx_queue *queue_m;
8425         const struct mlx5_rte_flow_item_tx_queue *queue_v;
8426         void *misc_m =
8427                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8428         void *misc_v =
8429                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8430         struct mlx5_txq_ctrl *txq;
8431         uint32_t queue;
8432
8433
8434         queue_m = (const void *)item->mask;
8435         if (!queue_m)
8436                 return;
8437         queue_v = (const void *)item->spec;
8438         if (!queue_v)
8439                 return;
8440         txq = mlx5_txq_get(dev, queue_v->queue);
8441         if (!txq)
8442                 return;
8443         queue = txq->obj->sq->id;
8444         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
8445         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
8446                  queue & queue_m->queue);
8447         mlx5_txq_release(dev, queue_v->queue);
8448 }
8449
8450 /**
8451  * Set the hash fields according to the @p flow information.
8452  *
8453  * @param[in] dev_flow
8454  *   Pointer to the mlx5_flow.
8455  * @param[in] rss_desc
8456  *   Pointer to the mlx5_flow_rss_desc.
8457  */
8458 static void
8459 flow_dv_hashfields_set(struct mlx5_flow *dev_flow,
8460                        struct mlx5_flow_rss_desc *rss_desc)
8461 {
8462         uint64_t items = dev_flow->handle->layers;
8463         int rss_inner = 0;
8464         uint64_t rss_types = rte_eth_rss_hf_refine(rss_desc->types);
8465
8466         dev_flow->hash_fields = 0;
8467 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
8468         if (rss_desc->level >= 2) {
8469                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
8470                 rss_inner = 1;
8471         }
8472 #endif
8473         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
8474             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
8475                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
8476                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
8477                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
8478                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
8479                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
8480                         else
8481                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
8482                 }
8483         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
8484                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
8485                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
8486                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
8487                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
8488                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
8489                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
8490                         else
8491                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
8492                 }
8493         }
8494         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
8495             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
8496                 if (rss_types & ETH_RSS_UDP) {
8497                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
8498                                 dev_flow->hash_fields |=
8499                                                 IBV_RX_HASH_SRC_PORT_UDP;
8500                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
8501                                 dev_flow->hash_fields |=
8502                                                 IBV_RX_HASH_DST_PORT_UDP;
8503                         else
8504                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
8505                 }
8506         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
8507                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
8508                 if (rss_types & ETH_RSS_TCP) {
8509                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
8510                                 dev_flow->hash_fields |=
8511                                                 IBV_RX_HASH_SRC_PORT_TCP;
8512                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
8513                                 dev_flow->hash_fields |=
8514                                                 IBV_RX_HASH_DST_PORT_TCP;
8515                         else
8516                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
8517                 }
8518         }
8519 }
8520
8521 /**
8522  * Prepare an Rx Hash queue.
8523  *
8524  * @param dev
8525  *   Pointer to Ethernet device.
8526  * @param[in] dev_flow
8527  *   Pointer to the mlx5_flow.
8528  * @param[in] rss_desc
8529  *   Pointer to the mlx5_flow_rss_desc.
8530  * @param[out] hrxq_idx
8531  *   Hash Rx queue index.
8532  *
8533  * @return
8534  *   The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
8535  */
8536 static struct mlx5_hrxq *
8537 flow_dv_hrxq_prepare(struct rte_eth_dev *dev,
8538                      struct mlx5_flow *dev_flow,
8539                      struct mlx5_flow_rss_desc *rss_desc,
8540                      uint32_t *hrxq_idx)
8541 {
8542         struct mlx5_priv *priv = dev->data->dev_private;
8543         struct mlx5_flow_handle *dh = dev_flow->handle;
8544         struct mlx5_hrxq *hrxq;
8545
8546         MLX5_ASSERT(rss_desc->queue_num);
8547         rss_desc->key_len = MLX5_RSS_HASH_KEY_LEN;
8548         rss_desc->hash_fields = dev_flow->hash_fields;
8549         rss_desc->tunnel = !!(dh->layers & MLX5_FLOW_LAYER_TUNNEL);
8550         rss_desc->standalone = false;
8551         *hrxq_idx = mlx5_hrxq_get(dev, rss_desc);
8552         if (!*hrxq_idx)
8553                 return NULL;
8554         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
8555                               *hrxq_idx);
8556         return hrxq;
8557 }
8558
8559 /**
8560  * Release sample sub action resource.
8561  *
8562  * @param[in, out] dev
8563  *   Pointer to rte_eth_dev structure.
8564  * @param[in] act_res
8565  *   Pointer to sample sub action resource.
8566  */
8567 static void
8568 flow_dv_sample_sub_actions_release(struct rte_eth_dev *dev,
8569                                    struct mlx5_flow_sub_actions_idx *act_res)
8570 {
8571         if (act_res->rix_hrxq) {
8572                 mlx5_hrxq_release(dev, act_res->rix_hrxq);
8573                 act_res->rix_hrxq = 0;
8574         }
8575         if (act_res->rix_encap_decap) {
8576                 flow_dv_encap_decap_resource_release(dev,
8577                                                      act_res->rix_encap_decap);
8578                 act_res->rix_encap_decap = 0;
8579         }
8580         if (act_res->rix_port_id_action) {
8581                 flow_dv_port_id_action_resource_release(dev,
8582                                                 act_res->rix_port_id_action);
8583                 act_res->rix_port_id_action = 0;
8584         }
8585         if (act_res->rix_tag) {
8586                 flow_dv_tag_release(dev, act_res->rix_tag);
8587                 act_res->rix_tag = 0;
8588         }
8589         if (act_res->cnt) {
8590                 flow_dv_counter_free(dev, act_res->cnt);
8591                 act_res->cnt = 0;
8592         }
8593 }
8594
8595 int
8596 flow_dv_sample_match_cb(struct mlx5_cache_list *list __rte_unused,
8597                         struct mlx5_cache_entry *entry, void *cb_ctx)
8598 {
8599         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8600         struct rte_eth_dev *dev = ctx->dev;
8601         struct mlx5_flow_dv_sample_resource *resource = ctx->data;
8602         struct mlx5_flow_dv_sample_resource *cache_resource =
8603                         container_of(entry, typeof(*cache_resource), entry);
8604
8605         if (resource->ratio == cache_resource->ratio &&
8606             resource->ft_type == cache_resource->ft_type &&
8607             resource->ft_id == cache_resource->ft_id &&
8608             resource->set_action == cache_resource->set_action &&
8609             !memcmp((void *)&resource->sample_act,
8610                     (void *)&cache_resource->sample_act,
8611                     sizeof(struct mlx5_flow_sub_actions_list))) {
8612                 /*
8613                  * Existing sample action should release the prepared
8614                  * sub-actions reference counter.
8615                  */
8616                 flow_dv_sample_sub_actions_release(dev,
8617                                                 &resource->sample_idx);
8618                 return 0;
8619         }
8620         return 1;
8621 }
8622
8623 struct mlx5_cache_entry *
8624 flow_dv_sample_create_cb(struct mlx5_cache_list *list __rte_unused,
8625                          struct mlx5_cache_entry *entry __rte_unused,
8626                          void *cb_ctx)
8627 {
8628         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8629         struct rte_eth_dev *dev = ctx->dev;
8630         struct mlx5_flow_dv_sample_resource *resource = ctx->data;
8631         void **sample_dv_actions = resource->sub_actions;
8632         struct mlx5_flow_dv_sample_resource *cache_resource;
8633         struct mlx5dv_dr_flow_sampler_attr sampler_attr;
8634         struct mlx5_priv *priv = dev->data->dev_private;
8635         struct mlx5_dev_ctx_shared *sh = priv->sh;
8636         struct mlx5_flow_tbl_resource *tbl;
8637         uint32_t idx = 0;
8638         const uint32_t next_ft_step = 1;
8639         uint32_t next_ft_id = resource->ft_id + next_ft_step;
8640         uint8_t is_egress = 0;
8641         uint8_t is_transfer = 0;
8642         struct rte_flow_error *error = ctx->error;
8643
8644         /* Register new sample resource. */
8645         cache_resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
8646         if (!cache_resource) {
8647                 rte_flow_error_set(error, ENOMEM,
8648                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8649                                           NULL,
8650                                           "cannot allocate resource memory");
8651                 return NULL;
8652         }
8653         *cache_resource = *resource;
8654         /* Create normal path table level */
8655         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
8656                 is_transfer = 1;
8657         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
8658                 is_egress = 1;
8659         tbl = flow_dv_tbl_resource_get(dev, next_ft_id,
8660                                         is_egress, is_transfer,
8661                                         true, NULL, 0, 0, error);
8662         if (!tbl) {
8663                 rte_flow_error_set(error, ENOMEM,
8664                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8665                                           NULL,
8666                                           "fail to create normal path table "
8667                                           "for sample");
8668                 goto error;
8669         }
8670         cache_resource->normal_path_tbl = tbl;
8671         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
8672                 cache_resource->default_miss =
8673                                 mlx5_glue->dr_create_flow_action_default_miss();
8674                 if (!cache_resource->default_miss) {
8675                         rte_flow_error_set(error, ENOMEM,
8676                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8677                                                 NULL,
8678                                                 "cannot create default miss "
8679                                                 "action");
8680                         goto error;
8681                 }
8682                 sample_dv_actions[resource->sample_act.actions_num++] =
8683                                                 cache_resource->default_miss;
8684         }
8685         /* Create a DR sample action */
8686         sampler_attr.sample_ratio = cache_resource->ratio;
8687         sampler_attr.default_next_table = tbl->obj;
8688         sampler_attr.num_sample_actions = resource->sample_act.actions_num;
8689         sampler_attr.sample_actions = (struct mlx5dv_dr_action **)
8690                                                         &sample_dv_actions[0];
8691         sampler_attr.action = cache_resource->set_action;
8692         cache_resource->verbs_action =
8693                 mlx5_glue->dr_create_flow_action_sampler(&sampler_attr);
8694         if (!cache_resource->verbs_action) {
8695                 rte_flow_error_set(error, ENOMEM,
8696                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8697                                         NULL, "cannot create sample action");
8698                 goto error;
8699         }
8700         cache_resource->idx = idx;
8701         return &cache_resource->entry;
8702 error:
8703         if (cache_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB &&
8704             cache_resource->default_miss)
8705                 claim_zero(mlx5_glue->destroy_flow_action
8706                                 (cache_resource->default_miss));
8707         else
8708                 flow_dv_sample_sub_actions_release(dev,
8709                                                    &cache_resource->sample_idx);
8710         if (cache_resource->normal_path_tbl)
8711                 flow_dv_tbl_resource_release(MLX5_SH(dev),
8712                                 cache_resource->normal_path_tbl);
8713         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_SAMPLE], idx);
8714         return NULL;
8715
8716 }
8717
8718 /**
8719  * Find existing sample resource or create and register a new one.
8720  *
8721  * @param[in, out] dev
8722  *   Pointer to rte_eth_dev structure.
8723  * @param[in] resource
8724  *   Pointer to sample resource.
8725  * @parm[in, out] dev_flow
8726  *   Pointer to the dev_flow.
8727  * @param[out] error
8728  *   pointer to error structure.
8729  *
8730  * @return
8731  *   0 on success otherwise -errno and errno is set.
8732  */
8733 static int
8734 flow_dv_sample_resource_register(struct rte_eth_dev *dev,
8735                          struct mlx5_flow_dv_sample_resource *resource,
8736                          struct mlx5_flow *dev_flow,
8737                          struct rte_flow_error *error)
8738 {
8739         struct mlx5_flow_dv_sample_resource *cache_resource;
8740         struct mlx5_cache_entry *entry;
8741         struct mlx5_priv *priv = dev->data->dev_private;
8742         struct mlx5_flow_cb_ctx ctx = {
8743                 .dev = dev,
8744                 .error = error,
8745                 .data = resource,
8746         };
8747
8748         entry = mlx5_cache_register(&priv->sh->sample_action_list, &ctx);
8749         if (!entry)
8750                 return -rte_errno;
8751         cache_resource = container_of(entry, typeof(*cache_resource), entry);
8752         dev_flow->handle->dvh.rix_sample = cache_resource->idx;
8753         dev_flow->dv.sample_res = cache_resource;
8754         return 0;
8755 }
8756
8757 int
8758 flow_dv_dest_array_match_cb(struct mlx5_cache_list *list __rte_unused,
8759                             struct mlx5_cache_entry *entry, void *cb_ctx)
8760 {
8761         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8762         struct mlx5_flow_dv_dest_array_resource *resource = ctx->data;
8763         struct rte_eth_dev *dev = ctx->dev;
8764         struct mlx5_flow_dv_dest_array_resource *cache_resource =
8765                         container_of(entry, typeof(*cache_resource), entry);
8766         uint32_t idx = 0;
8767
8768         if (resource->num_of_dest == cache_resource->num_of_dest &&
8769             resource->ft_type == cache_resource->ft_type &&
8770             !memcmp((void *)cache_resource->sample_act,
8771                     (void *)resource->sample_act,
8772                    (resource->num_of_dest *
8773                    sizeof(struct mlx5_flow_sub_actions_list)))) {
8774                 /*
8775                  * Existing sample action should release the prepared
8776                  * sub-actions reference counter.
8777                  */
8778                 for (idx = 0; idx < resource->num_of_dest; idx++)
8779                         flow_dv_sample_sub_actions_release(dev,
8780                                         &resource->sample_idx[idx]);
8781                 return 0;
8782         }
8783         return 1;
8784 }
8785
8786 struct mlx5_cache_entry *
8787 flow_dv_dest_array_create_cb(struct mlx5_cache_list *list __rte_unused,
8788                          struct mlx5_cache_entry *entry __rte_unused,
8789                          void *cb_ctx)
8790 {
8791         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8792         struct rte_eth_dev *dev = ctx->dev;
8793         struct mlx5_flow_dv_dest_array_resource *cache_resource;
8794         struct mlx5_flow_dv_dest_array_resource *resource = ctx->data;
8795         struct mlx5dv_dr_action_dest_attr *dest_attr[MLX5_MAX_DEST_NUM] = { 0 };
8796         struct mlx5dv_dr_action_dest_reformat dest_reformat[MLX5_MAX_DEST_NUM];
8797         struct mlx5_priv *priv = dev->data->dev_private;
8798         struct mlx5_dev_ctx_shared *sh = priv->sh;
8799         struct mlx5_flow_sub_actions_list *sample_act;
8800         struct mlx5dv_dr_domain *domain;
8801         uint32_t idx = 0, res_idx = 0;
8802         struct rte_flow_error *error = ctx->error;
8803
8804         /* Register new destination array resource. */
8805         cache_resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
8806                                             &res_idx);
8807         if (!cache_resource) {
8808                 rte_flow_error_set(error, ENOMEM,
8809                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8810                                           NULL,
8811                                           "cannot allocate resource memory");
8812                 return NULL;
8813         }
8814         *cache_resource = *resource;
8815         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
8816                 domain = sh->fdb_domain;
8817         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
8818                 domain = sh->rx_domain;
8819         else
8820                 domain = sh->tx_domain;
8821         for (idx = 0; idx < resource->num_of_dest; idx++) {
8822                 dest_attr[idx] = (struct mlx5dv_dr_action_dest_attr *)
8823                                  mlx5_malloc(MLX5_MEM_ZERO,
8824                                  sizeof(struct mlx5dv_dr_action_dest_attr),
8825                                  0, SOCKET_ID_ANY);
8826                 if (!dest_attr[idx]) {
8827                         rte_flow_error_set(error, ENOMEM,
8828                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8829                                            NULL,
8830                                            "cannot allocate resource memory");
8831                         goto error;
8832                 }
8833                 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST;
8834                 sample_act = &resource->sample_act[idx];
8835                 if (sample_act->action_flags == MLX5_FLOW_ACTION_QUEUE) {
8836                         dest_attr[idx]->dest = sample_act->dr_queue_action;
8837                 } else if (sample_act->action_flags ==
8838                           (MLX5_FLOW_ACTION_PORT_ID | MLX5_FLOW_ACTION_ENCAP)) {
8839                         dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST_REFORMAT;
8840                         dest_attr[idx]->dest_reformat = &dest_reformat[idx];
8841                         dest_attr[idx]->dest_reformat->reformat =
8842                                         sample_act->dr_encap_action;
8843                         dest_attr[idx]->dest_reformat->dest =
8844                                         sample_act->dr_port_id_action;
8845                 } else if (sample_act->action_flags ==
8846                            MLX5_FLOW_ACTION_PORT_ID) {
8847                         dest_attr[idx]->dest = sample_act->dr_port_id_action;
8848                 }
8849         }
8850         /* create a dest array actioin */
8851         cache_resource->action = mlx5_glue->dr_create_flow_action_dest_array
8852                                                 (domain,
8853                                                  cache_resource->num_of_dest,
8854                                                  dest_attr);
8855         if (!cache_resource->action) {
8856                 rte_flow_error_set(error, ENOMEM,
8857                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8858                                    NULL,
8859                                    "cannot create destination array action");
8860                 goto error;
8861         }
8862         cache_resource->idx = res_idx;
8863         for (idx = 0; idx < resource->num_of_dest; idx++)
8864                 mlx5_free(dest_attr[idx]);
8865         return &cache_resource->entry;
8866 error:
8867         for (idx = 0; idx < resource->num_of_dest; idx++) {
8868                 struct mlx5_flow_sub_actions_idx *act_res =
8869                                         &cache_resource->sample_idx[idx];
8870                 if (act_res->rix_hrxq &&
8871                     !mlx5_hrxq_release(dev,
8872                                 act_res->rix_hrxq))
8873                         act_res->rix_hrxq = 0;
8874                 if (act_res->rix_encap_decap &&
8875                         !flow_dv_encap_decap_resource_release(dev,
8876                                 act_res->rix_encap_decap))
8877                         act_res->rix_encap_decap = 0;
8878                 if (act_res->rix_port_id_action &&
8879                         !flow_dv_port_id_action_resource_release(dev,
8880                                 act_res->rix_port_id_action))
8881                         act_res->rix_port_id_action = 0;
8882                 if (dest_attr[idx])
8883                         mlx5_free(dest_attr[idx]);
8884         }
8885
8886         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DEST_ARRAY], res_idx);
8887         return NULL;
8888 }
8889
8890 /**
8891  * Find existing destination array resource or create and register a new one.
8892  *
8893  * @param[in, out] dev
8894  *   Pointer to rte_eth_dev structure.
8895  * @param[in] resource
8896  *   Pointer to destination array resource.
8897  * @parm[in, out] dev_flow
8898  *   Pointer to the dev_flow.
8899  * @param[out] error
8900  *   pointer to error structure.
8901  *
8902  * @return
8903  *   0 on success otherwise -errno and errno is set.
8904  */
8905 static int
8906 flow_dv_dest_array_resource_register(struct rte_eth_dev *dev,
8907                          struct mlx5_flow_dv_dest_array_resource *resource,
8908                          struct mlx5_flow *dev_flow,
8909                          struct rte_flow_error *error)
8910 {
8911         struct mlx5_flow_dv_dest_array_resource *cache_resource;
8912         struct mlx5_priv *priv = dev->data->dev_private;
8913         struct mlx5_cache_entry *entry;
8914         struct mlx5_flow_cb_ctx ctx = {
8915                 .dev = dev,
8916                 .error = error,
8917                 .data = resource,
8918         };
8919
8920         entry = mlx5_cache_register(&priv->sh->dest_array_list, &ctx);
8921         if (!entry)
8922                 return -rte_errno;
8923         cache_resource = container_of(entry, typeof(*cache_resource), entry);
8924         dev_flow->handle->dvh.rix_dest_array = cache_resource->idx;
8925         dev_flow->dv.dest_array_res = cache_resource;
8926         return 0;
8927 }
8928
8929 /**
8930  * Convert Sample action to DV specification.
8931  *
8932  * @param[in] dev
8933  *   Pointer to rte_eth_dev structure.
8934  * @param[in] action
8935  *   Pointer to action structure.
8936  * @param[in, out] dev_flow
8937  *   Pointer to the mlx5_flow.
8938  * @param[in] attr
8939  *   Pointer to the flow attributes.
8940  * @param[in, out] num_of_dest
8941  *   Pointer to the num of destination.
8942  * @param[in, out] sample_actions
8943  *   Pointer to sample actions list.
8944  * @param[in, out] res
8945  *   Pointer to sample resource.
8946  * @param[out] error
8947  *   Pointer to the error structure.
8948  *
8949  * @return
8950  *   0 on success, a negative errno value otherwise and rte_errno is set.
8951  */
8952 static int
8953 flow_dv_translate_action_sample(struct rte_eth_dev *dev,
8954                                 const struct rte_flow_action *action,
8955                                 struct mlx5_flow *dev_flow,
8956                                 const struct rte_flow_attr *attr,
8957                                 uint32_t *num_of_dest,
8958                                 void **sample_actions,
8959                                 struct mlx5_flow_dv_sample_resource *res,
8960                                 struct rte_flow_error *error)
8961 {
8962         struct mlx5_priv *priv = dev->data->dev_private;
8963         const struct rte_flow_action_sample *sample_action;
8964         const struct rte_flow_action *sub_actions;
8965         const struct rte_flow_action_queue *queue;
8966         struct mlx5_flow_sub_actions_list *sample_act;
8967         struct mlx5_flow_sub_actions_idx *sample_idx;
8968         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
8969         struct mlx5_flow_rss_desc *rss_desc;
8970         uint64_t action_flags = 0;
8971
8972         MLX5_ASSERT(wks);
8973         rss_desc = &wks->rss_desc[!!wks->flow_nested_idx];
8974         sample_act = &res->sample_act;
8975         sample_idx = &res->sample_idx;
8976         sample_action = (const struct rte_flow_action_sample *)action->conf;
8977         res->ratio = sample_action->ratio;
8978         sub_actions = sample_action->actions;
8979         for (; sub_actions->type != RTE_FLOW_ACTION_TYPE_END; sub_actions++) {
8980                 int type = sub_actions->type;
8981                 uint32_t pre_rix = 0;
8982                 void *pre_r;
8983                 switch (type) {
8984                 case RTE_FLOW_ACTION_TYPE_QUEUE:
8985                 {
8986                         struct mlx5_hrxq *hrxq;
8987                         uint32_t hrxq_idx;
8988
8989                         queue = sub_actions->conf;
8990                         rss_desc->queue_num = 1;
8991                         rss_desc->queue[0] = queue->index;
8992                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
8993                                                     rss_desc, &hrxq_idx);
8994                         if (!hrxq)
8995                                 return rte_flow_error_set
8996                                         (error, rte_errno,
8997                                          RTE_FLOW_ERROR_TYPE_ACTION,
8998                                          NULL,
8999                                          "cannot create fate queue");
9000                         sample_act->dr_queue_action = hrxq->action;
9001                         sample_idx->rix_hrxq = hrxq_idx;
9002                         sample_actions[sample_act->actions_num++] =
9003                                                 hrxq->action;
9004                         (*num_of_dest)++;
9005                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
9006                         if (action_flags & MLX5_FLOW_ACTION_MARK)
9007                                 dev_flow->handle->rix_hrxq = hrxq_idx;
9008                         dev_flow->handle->fate_action =
9009                                         MLX5_FLOW_FATE_QUEUE;
9010                         break;
9011                 }
9012                 case RTE_FLOW_ACTION_TYPE_MARK:
9013                 {
9014                         uint32_t tag_be = mlx5_flow_mark_set
9015                                 (((const struct rte_flow_action_mark *)
9016                                 (sub_actions->conf))->id);
9017
9018                         dev_flow->handle->mark = 1;
9019                         pre_rix = dev_flow->handle->dvh.rix_tag;
9020                         /* Save the mark resource before sample */
9021                         pre_r = dev_flow->dv.tag_resource;
9022                         if (flow_dv_tag_resource_register(dev, tag_be,
9023                                                   dev_flow, error))
9024                                 return -rte_errno;
9025                         MLX5_ASSERT(dev_flow->dv.tag_resource);
9026                         sample_act->dr_tag_action =
9027                                 dev_flow->dv.tag_resource->action;
9028                         sample_idx->rix_tag =
9029                                 dev_flow->handle->dvh.rix_tag;
9030                         sample_actions[sample_act->actions_num++] =
9031                                                 sample_act->dr_tag_action;
9032                         /* Recover the mark resource after sample */
9033                         dev_flow->dv.tag_resource = pre_r;
9034                         dev_flow->handle->dvh.rix_tag = pre_rix;
9035                         action_flags |= MLX5_FLOW_ACTION_MARK;
9036                         break;
9037                 }
9038                 case RTE_FLOW_ACTION_TYPE_COUNT:
9039                 {
9040                         uint32_t counter;
9041
9042                         counter = flow_dv_translate_create_counter(dev,
9043                                         dev_flow, sub_actions->conf, 0);
9044                         if (!counter)
9045                                 return rte_flow_error_set
9046                                                 (error, rte_errno,
9047                                                  RTE_FLOW_ERROR_TYPE_ACTION,
9048                                                  NULL,
9049                                                  "cannot create counter"
9050                                                  " object.");
9051                         sample_idx->cnt = counter;
9052                         sample_act->dr_cnt_action =
9053                                   (flow_dv_counter_get_by_idx(dev,
9054                                   counter, NULL))->action;
9055                         sample_actions[sample_act->actions_num++] =
9056                                                 sample_act->dr_cnt_action;
9057                         action_flags |= MLX5_FLOW_ACTION_COUNT;
9058                         break;
9059                 }
9060                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
9061                 {
9062                         struct mlx5_flow_dv_port_id_action_resource
9063                                         port_id_resource;
9064                         uint32_t port_id = 0;
9065
9066                         memset(&port_id_resource, 0, sizeof(port_id_resource));
9067                         /* Save the port id resource before sample */
9068                         pre_rix = dev_flow->handle->rix_port_id_action;
9069                         pre_r = dev_flow->dv.port_id_action;
9070                         if (flow_dv_translate_action_port_id(dev, sub_actions,
9071                                                              &port_id, error))
9072                                 return -rte_errno;
9073                         port_id_resource.port_id = port_id;
9074                         if (flow_dv_port_id_action_resource_register
9075                             (dev, &port_id_resource, dev_flow, error))
9076                                 return -rte_errno;
9077                         sample_act->dr_port_id_action =
9078                                 dev_flow->dv.port_id_action->action;
9079                         sample_idx->rix_port_id_action =
9080                                 dev_flow->handle->rix_port_id_action;
9081                         sample_actions[sample_act->actions_num++] =
9082                                                 sample_act->dr_port_id_action;
9083                         /* Recover the port id resource after sample */
9084                         dev_flow->dv.port_id_action = pre_r;
9085                         dev_flow->handle->rix_port_id_action = pre_rix;
9086                         (*num_of_dest)++;
9087                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
9088                         break;
9089                 }
9090                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
9091                         /* Save the encap resource before sample */
9092                         pre_rix = dev_flow->handle->dvh.rix_encap_decap;
9093                         pre_r = dev_flow->dv.encap_decap;
9094                         if (flow_dv_create_action_l2_encap(dev, sub_actions,
9095                                                            dev_flow,
9096                                                            attr->transfer,
9097                                                            error))
9098                                 return -rte_errno;
9099                         sample_act->dr_encap_action =
9100                                 dev_flow->dv.encap_decap->action;
9101                         sample_idx->rix_encap_decap =
9102                                 dev_flow->handle->dvh.rix_encap_decap;
9103                         sample_actions[sample_act->actions_num++] =
9104                                                 sample_act->dr_encap_action;
9105                         /* Recover the encap resource after sample */
9106                         dev_flow->dv.encap_decap = pre_r;
9107                         dev_flow->handle->dvh.rix_encap_decap = pre_rix;
9108                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
9109                         break;
9110                 default:
9111                         return rte_flow_error_set(error, EINVAL,
9112                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
9113                                 NULL,
9114                                 "Not support for sampler action");
9115                 }
9116         }
9117         sample_act->action_flags = action_flags;
9118         res->ft_id = dev_flow->dv.group;
9119         if (attr->transfer) {
9120                 union {
9121                         uint32_t action_in[MLX5_ST_SZ_DW(set_action_in)];
9122                         uint64_t set_action;
9123                 } action_ctx = { .set_action = 0 };
9124
9125                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
9126                 MLX5_SET(set_action_in, action_ctx.action_in, action_type,
9127                          MLX5_MODIFICATION_TYPE_SET);
9128                 MLX5_SET(set_action_in, action_ctx.action_in, field,
9129                          MLX5_MODI_META_REG_C_0);
9130                 MLX5_SET(set_action_in, action_ctx.action_in, data,
9131                          priv->vport_meta_tag);
9132                 res->set_action = action_ctx.set_action;
9133         } else if (attr->ingress) {
9134                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
9135         } else {
9136                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_TX;
9137         }
9138         return 0;
9139 }
9140
9141 /**
9142  * Convert Sample action to DV specification.
9143  *
9144  * @param[in] dev
9145  *   Pointer to rte_eth_dev structure.
9146  * @param[in, out] dev_flow
9147  *   Pointer to the mlx5_flow.
9148  * @param[in] num_of_dest
9149  *   The num of destination.
9150  * @param[in, out] res
9151  *   Pointer to sample resource.
9152  * @param[in, out] mdest_res
9153  *   Pointer to destination array resource.
9154  * @param[in] sample_actions
9155  *   Pointer to sample path actions list.
9156  * @param[in] action_flags
9157  *   Holds the actions detected until now.
9158  * @param[out] error
9159  *   Pointer to the error structure.
9160  *
9161  * @return
9162  *   0 on success, a negative errno value otherwise and rte_errno is set.
9163  */
9164 static int
9165 flow_dv_create_action_sample(struct rte_eth_dev *dev,
9166                              struct mlx5_flow *dev_flow,
9167                              uint32_t num_of_dest,
9168                              struct mlx5_flow_dv_sample_resource *res,
9169                              struct mlx5_flow_dv_dest_array_resource *mdest_res,
9170                              void **sample_actions,
9171                              uint64_t action_flags,
9172                              struct rte_flow_error *error)
9173 {
9174         /* update normal path action resource into last index of array */
9175         uint32_t dest_index = MLX5_MAX_DEST_NUM - 1;
9176         struct mlx5_flow_sub_actions_list *sample_act =
9177                                         &mdest_res->sample_act[dest_index];
9178         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
9179         struct mlx5_flow_rss_desc *rss_desc;
9180         uint32_t normal_idx = 0;
9181         struct mlx5_hrxq *hrxq;
9182         uint32_t hrxq_idx;
9183
9184         MLX5_ASSERT(wks);
9185         rss_desc = &wks->rss_desc[!!wks->flow_nested_idx];
9186         if (num_of_dest > 1) {
9187                 if (sample_act->action_flags & MLX5_FLOW_ACTION_QUEUE) {
9188                         /* Handle QP action for mirroring */
9189                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
9190                                                     rss_desc, &hrxq_idx);
9191                         if (!hrxq)
9192                                 return rte_flow_error_set
9193                                      (error, rte_errno,
9194                                       RTE_FLOW_ERROR_TYPE_ACTION,
9195                                       NULL,
9196                                       "cannot create rx queue");
9197                         normal_idx++;
9198                         mdest_res->sample_idx[dest_index].rix_hrxq = hrxq_idx;
9199                         sample_act->dr_queue_action = hrxq->action;
9200                         if (action_flags & MLX5_FLOW_ACTION_MARK)
9201                                 dev_flow->handle->rix_hrxq = hrxq_idx;
9202                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
9203                 }
9204                 if (sample_act->action_flags & MLX5_FLOW_ACTION_ENCAP) {
9205                         normal_idx++;
9206                         mdest_res->sample_idx[dest_index].rix_encap_decap =
9207                                 dev_flow->handle->dvh.rix_encap_decap;
9208                         sample_act->dr_encap_action =
9209                                 dev_flow->dv.encap_decap->action;
9210                 }
9211                 if (sample_act->action_flags & MLX5_FLOW_ACTION_PORT_ID) {
9212                         normal_idx++;
9213                         mdest_res->sample_idx[dest_index].rix_port_id_action =
9214                                 dev_flow->handle->rix_port_id_action;
9215                         sample_act->dr_port_id_action =
9216                                 dev_flow->dv.port_id_action->action;
9217                 }
9218                 sample_act->actions_num = normal_idx;
9219                 /* update sample action resource into first index of array */
9220                 mdest_res->ft_type = res->ft_type;
9221                 memcpy(&mdest_res->sample_idx[0], &res->sample_idx,
9222                                 sizeof(struct mlx5_flow_sub_actions_idx));
9223                 memcpy(&mdest_res->sample_act[0], &res->sample_act,
9224                                 sizeof(struct mlx5_flow_sub_actions_list));
9225                 mdest_res->num_of_dest = num_of_dest;
9226                 if (flow_dv_dest_array_resource_register(dev, mdest_res,
9227                                                          dev_flow, error))
9228                         return rte_flow_error_set(error, EINVAL,
9229                                                   RTE_FLOW_ERROR_TYPE_ACTION,
9230                                                   NULL, "can't create sample "
9231                                                   "action");
9232         } else {
9233                 res->sub_actions = sample_actions;
9234                 if (flow_dv_sample_resource_register(dev, res, dev_flow, error))
9235                         return rte_flow_error_set(error, EINVAL,
9236                                                   RTE_FLOW_ERROR_TYPE_ACTION,
9237                                                   NULL,
9238                                                   "can't create sample action");
9239         }
9240         return 0;
9241 }
9242
9243 /**
9244  * Get ASO age action by index.
9245  *
9246  * @param[in] dev
9247  *   Pointer to the Ethernet device structure.
9248  * @param[in] age_idx
9249  *   Index to the ASO age action.
9250  *
9251  * @return
9252  *   The specified ASO age action.
9253  */
9254 static struct mlx5_aso_age_action*
9255 flow_dv_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx)
9256 {
9257         uint16_t pool_idx = age_idx & UINT16_MAX;
9258         uint16_t offset = (age_idx >> 16) & UINT16_MAX;
9259         struct mlx5_priv *priv = dev->data->dev_private;
9260         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
9261         struct mlx5_aso_age_pool *pool = mng->pools[pool_idx];
9262
9263         return &pool->actions[offset - 1];
9264 }
9265
9266 /**
9267  * Remove an ASO age action from age actions list.
9268  *
9269  * @param[in] dev
9270  *   Pointer to the Ethernet device structure.
9271  * @param[in] age
9272  *   Pointer to the aso age action handler.
9273  */
9274 static void
9275 flow_dv_aso_age_remove_from_age(struct rte_eth_dev *dev,
9276                                 struct mlx5_aso_age_action *age)
9277 {
9278         struct mlx5_age_info *age_info;
9279         struct mlx5_age_param *age_param = &age->age_params;
9280         struct mlx5_priv *priv = dev->data->dev_private;
9281         uint16_t expected = AGE_CANDIDATE;
9282
9283         age_info = GET_PORT_AGE_INFO(priv);
9284         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
9285                                          AGE_FREE, false, __ATOMIC_RELAXED,
9286                                          __ATOMIC_RELAXED)) {
9287                 /**
9288                  * We need the lock even it is age timeout,
9289                  * since age action may still in process.
9290                  */
9291                 rte_spinlock_lock(&age_info->aged_sl);
9292                 LIST_REMOVE(age, next);
9293                 rte_spinlock_unlock(&age_info->aged_sl);
9294                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
9295         }
9296 }
9297
9298 static void
9299 flow_dv_aso_age_release(struct rte_eth_dev *dev, uint32_t age_idx)
9300 {
9301         struct mlx5_priv *priv = dev->data->dev_private;
9302         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
9303         struct mlx5_aso_age_action *age = flow_dv_aso_age_get_by_idx(dev,
9304                                                                      age_idx);
9305
9306         flow_dv_aso_age_remove_from_age(dev, age);
9307         rte_spinlock_lock(&mng->free_sl);
9308         LIST_INSERT_HEAD(&mng->free, age, next);
9309         rte_spinlock_unlock(&mng->free_sl);
9310 }
9311
9312 /**
9313  * Resize the ASO age pools array by MLX5_CNT_CONTAINER_RESIZE pools.
9314  *
9315  * @param[in] dev
9316  *   Pointer to the Ethernet device structure.
9317  *
9318  * @return
9319  *   0 on success, otherwise negative errno value and rte_errno is set.
9320  */
9321 static int
9322 flow_dv_aso_age_pools_resize(struct rte_eth_dev *dev)
9323 {
9324         struct mlx5_priv *priv = dev->data->dev_private;
9325         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
9326         void *old_pools = mng->pools;
9327         uint32_t resize = mng->n + MLX5_CNT_CONTAINER_RESIZE;
9328         uint32_t mem_size = sizeof(struct mlx5_aso_age_pool *) * resize;
9329         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
9330
9331         if (!pools) {
9332                 rte_errno = ENOMEM;
9333                 return -ENOMEM;
9334         }
9335         if (old_pools) {
9336                 memcpy(pools, old_pools,
9337                        mng->n * sizeof(struct mlx5_flow_counter_pool *));
9338                 mlx5_free(old_pools);
9339         } else {
9340                 /* First ASO flow hit allocation - starting ASO data-path. */
9341                 int ret = mlx5_aso_queue_start(priv->sh);
9342
9343                 if (ret)
9344                         return ret;
9345         }
9346         mng->n = resize;
9347         mng->pools = pools;
9348         return 0;
9349 }
9350
9351 /**
9352  * Create and initialize a new ASO aging pool.
9353  *
9354  * @param[in] dev
9355  *   Pointer to the Ethernet device structure.
9356  * @param[out] age_free
9357  *   Where to put the pointer of a new age action.
9358  *
9359  * @return
9360  *   The age actions pool pointer and @p age_free is set on success,
9361  *   NULL otherwise and rte_errno is set.
9362  */
9363 static struct mlx5_aso_age_pool *
9364 flow_dv_age_pool_create(struct rte_eth_dev *dev,
9365                         struct mlx5_aso_age_action **age_free)
9366 {
9367         struct mlx5_priv *priv = dev->data->dev_private;
9368         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
9369         struct mlx5_aso_age_pool *pool = NULL;
9370         struct mlx5_devx_obj *obj = NULL;
9371         uint32_t i;
9372
9373         obj = mlx5_devx_cmd_create_flow_hit_aso_obj(priv->sh->ctx,
9374                                                     priv->sh->pdn);
9375         if (!obj) {
9376                 rte_errno = ENODATA;
9377                 DRV_LOG(ERR, "Failed to create flow_hit_aso_obj using DevX.");
9378                 return NULL;
9379         }
9380         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
9381         if (!pool) {
9382                 claim_zero(mlx5_devx_cmd_destroy(obj));
9383                 rte_errno = ENOMEM;
9384                 return NULL;
9385         }
9386         pool->flow_hit_aso_obj = obj;
9387         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
9388         rte_spinlock_lock(&mng->resize_sl);
9389         pool->index = mng->next;
9390         /* Resize pools array if there is no room for the new pool in it. */
9391         if (pool->index == mng->n && flow_dv_aso_age_pools_resize(dev)) {
9392                 claim_zero(mlx5_devx_cmd_destroy(obj));
9393                 mlx5_free(pool);
9394                 rte_spinlock_unlock(&mng->resize_sl);
9395                 return NULL;
9396         }
9397         mng->pools[pool->index] = pool;
9398         mng->next++;
9399         rte_spinlock_unlock(&mng->resize_sl);
9400         /* Assign the first action in the new pool, the rest go to free list. */
9401         *age_free = &pool->actions[0];
9402         for (i = 1; i < MLX5_ASO_AGE_ACTIONS_PER_POOL; i++) {
9403                 pool->actions[i].offset = i;
9404                 LIST_INSERT_HEAD(&mng->free, &pool->actions[i], next);
9405         }
9406         return pool;
9407 }
9408
9409 /**
9410  * Allocate a ASO aging bit.
9411  *
9412  * @param[in] dev
9413  *   Pointer to the Ethernet device structure.
9414  *
9415  * @return
9416  *   Index to ASO age action on success, 0 otherwise and rte_errno is set.
9417  */
9418 static uint32_t
9419 flow_dv_aso_age_alloc(struct rte_eth_dev *dev)
9420 {
9421         struct mlx5_priv *priv = dev->data->dev_private;
9422         const struct mlx5_aso_age_pool *pool;
9423         struct mlx5_aso_age_action *age_free = NULL;
9424         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
9425
9426         MLX5_ASSERT(mng);
9427         /* Try to get the next free age action bit. */
9428         rte_spinlock_lock(&mng->free_sl);
9429         age_free = LIST_FIRST(&mng->free);
9430         if (age_free) {
9431                 LIST_REMOVE(age_free, next);
9432         } else if (!flow_dv_age_pool_create(dev, &age_free)) {
9433                 rte_spinlock_unlock(&mng->free_sl);
9434                 return 0; /* 0 is an error.*/
9435         }
9436         rte_spinlock_unlock(&mng->free_sl);
9437         pool = container_of
9438           ((const struct mlx5_aso_age_action (*)[MLX5_ASO_AGE_ACTIONS_PER_POOL])
9439                   (age_free - age_free->offset), const struct mlx5_aso_age_pool,
9440                                                                        actions);
9441         if (!age_free->dr_action) {
9442                 age_free->dr_action = mlx5_glue->dr_action_create_flow_hit
9443                                                 (pool->flow_hit_aso_obj->obj,
9444                                                  age_free->offset, REG_C_5);
9445                 if (!age_free->dr_action) {
9446                         rte_errno = errno;
9447                         rte_spinlock_lock(&mng->free_sl);
9448                         LIST_INSERT_HEAD(&mng->free, age_free, next);
9449                         rte_spinlock_unlock(&mng->free_sl);
9450                         return 0; /* 0 is an error.*/
9451                 }
9452         }
9453         return pool->index | ((age_free->offset + 1) << 16);
9454 }
9455
9456 /**
9457  * Create a age action using ASO mechanism.
9458  *
9459  * @param[in] dev
9460  *   Pointer to rte_eth_dev structure.
9461  * @param[in] age
9462  *   Pointer to the aging action configuration.
9463  *
9464  * @return
9465  *   Index to flow counter on success, 0 otherwise.
9466  */
9467 static uint32_t
9468 flow_dv_translate_create_aso_age(struct rte_eth_dev *dev,
9469                                  const struct rte_flow_action_age *age)
9470 {
9471         uint32_t age_idx = 0;
9472         struct mlx5_aso_age_action *aso_age = NULL;
9473
9474         age_idx = flow_dv_aso_age_alloc(dev);
9475         if (!age_idx)
9476                 return 0;
9477         aso_age = flow_dv_aso_age_get_by_idx(dev, age_idx);
9478         aso_age->age_params.context = age->context;
9479         aso_age->age_params.timeout = age->timeout;
9480         aso_age->age_params.port_id = dev->data->port_id;
9481         __atomic_store_n(&aso_age->age_params.sec_since_last_hit, 0,
9482                          __ATOMIC_RELAXED);
9483         __atomic_store_n(&aso_age->age_params.state, AGE_CANDIDATE,
9484                          __ATOMIC_RELAXED);
9485         return age_idx;
9486 }
9487
9488 /**
9489  * Fill the flow with DV spec, lock free
9490  * (mutex should be acquired by caller).
9491  *
9492  * @param[in] dev
9493  *   Pointer to rte_eth_dev structure.
9494  * @param[in, out] dev_flow
9495  *   Pointer to the sub flow.
9496  * @param[in] attr
9497  *   Pointer to the flow attributes.
9498  * @param[in] items
9499  *   Pointer to the list of items.
9500  * @param[in] actions
9501  *   Pointer to the list of actions.
9502  * @param[out] error
9503  *   Pointer to the error structure.
9504  *
9505  * @return
9506  *   0 on success, a negative errno value otherwise and rte_errno is set.
9507  */
9508 static int
9509 flow_dv_translate(struct rte_eth_dev *dev,
9510                   struct mlx5_flow *dev_flow,
9511                   const struct rte_flow_attr *attr,
9512                   const struct rte_flow_item items[],
9513                   const struct rte_flow_action actions[],
9514                   struct rte_flow_error *error)
9515 {
9516         struct mlx5_priv *priv = dev->data->dev_private;
9517         struct mlx5_dev_config *dev_conf = &priv->config;
9518         struct rte_flow *flow = dev_flow->flow;
9519         struct mlx5_flow_handle *handle = dev_flow->handle;
9520         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
9521         struct mlx5_flow_rss_desc *rss_desc;
9522         uint64_t item_flags = 0;
9523         uint64_t last_item = 0;
9524         uint64_t action_flags = 0;
9525         uint64_t priority = attr->priority;
9526         struct mlx5_flow_dv_matcher matcher = {
9527                 .mask = {
9528                         .size = sizeof(matcher.mask.buf) -
9529                                 MLX5_ST_SZ_BYTES(fte_match_set_misc4),
9530                 },
9531         };
9532         int actions_n = 0;
9533         bool actions_end = false;
9534         union {
9535                 struct mlx5_flow_dv_modify_hdr_resource res;
9536                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
9537                             sizeof(struct mlx5_modification_cmd) *
9538                             (MLX5_MAX_MODIFY_NUM + 1)];
9539         } mhdr_dummy;
9540         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
9541         const struct rte_flow_action_count *count = NULL;
9542         const struct rte_flow_action_age *age = NULL;
9543         union flow_dv_attr flow_attr = { .attr = 0 };
9544         uint32_t tag_be;
9545         union mlx5_flow_tbl_key tbl_key;
9546         uint32_t modify_action_position = UINT32_MAX;
9547         void *match_mask = matcher.mask.buf;
9548         void *match_value = dev_flow->dv.value.buf;
9549         uint8_t next_protocol = 0xff;
9550         struct rte_vlan_hdr vlan = { 0 };
9551         struct mlx5_flow_dv_dest_array_resource mdest_res;
9552         struct mlx5_flow_dv_sample_resource sample_res;
9553         void *sample_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
9554         struct mlx5_flow_sub_actions_list *sample_act;
9555         uint32_t sample_act_pos = UINT32_MAX;
9556         uint32_t num_of_dest = 0;
9557         int tmp_actions_n = 0;
9558         uint32_t table;
9559         int ret = 0;
9560         const struct mlx5_flow_tunnel *tunnel;
9561         struct flow_grp_info grp_info = {
9562                 .external = !!dev_flow->external,
9563                 .transfer = !!attr->transfer,
9564                 .fdb_def_rule = !!priv->fdb_def_rule,
9565         };
9566
9567         MLX5_ASSERT(wks);
9568         rss_desc = &wks->rss_desc[!!wks->flow_nested_idx];
9569         memset(&mdest_res, 0, sizeof(struct mlx5_flow_dv_dest_array_resource));
9570         memset(&sample_res, 0, sizeof(struct mlx5_flow_dv_sample_resource));
9571         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
9572                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
9573         /* update normal path action resource into last index of array */
9574         sample_act = &mdest_res.sample_act[MLX5_MAX_DEST_NUM - 1];
9575         tunnel = is_flow_tunnel_match_rule(dev, attr, items, actions) ?
9576                  flow_items_to_tunnel(items) :
9577                  is_flow_tunnel_steer_rule(dev, attr, items, actions) ?
9578                  flow_actions_to_tunnel(actions) :
9579                  dev_flow->tunnel ? dev_flow->tunnel : NULL;
9580         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
9581                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
9582         grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
9583                                 (dev, tunnel, attr, items, actions);
9584         ret = mlx5_flow_group_to_table(dev, tunnel, attr->group, &table,
9585                                        grp_info, error);
9586         if (ret)
9587                 return ret;
9588         dev_flow->dv.group = table;
9589         if (attr->transfer)
9590                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
9591         if (priority == MLX5_FLOW_PRIO_RSVD)
9592                 priority = dev_conf->flow_prio - 1;
9593         /* number of actions must be set to 0 in case of dirty stack. */
9594         mhdr_res->actions_num = 0;
9595         if (is_flow_tunnel_match_rule(dev, attr, items, actions)) {
9596                 /*
9597                  * do not add decap action if match rule drops packet
9598                  * HW rejects rules with decap & drop
9599                  */
9600                 bool add_decap = true;
9601                 const struct rte_flow_action *ptr = actions;
9602                 struct mlx5_flow_tbl_resource *tbl;
9603
9604                 for (; ptr->type != RTE_FLOW_ACTION_TYPE_END; ptr++) {
9605                         if (ptr->type == RTE_FLOW_ACTION_TYPE_DROP) {
9606                                 add_decap = false;
9607                                 break;
9608                         }
9609                 }
9610                 if (add_decap) {
9611                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
9612                                                            attr->transfer,
9613                                                            error))
9614                                 return -rte_errno;
9615                         dev_flow->dv.actions[actions_n++] =
9616                                         dev_flow->dv.encap_decap->action;
9617                         action_flags |= MLX5_FLOW_ACTION_DECAP;
9618                 }
9619                 /*
9620                  * bind table_id with <group, table> for tunnel match rule.
9621                  * Tunnel set rule establishes that bind in JUMP action handler.
9622                  * Required for scenario when application creates tunnel match
9623                  * rule before tunnel set rule.
9624                  */
9625                 tbl = flow_dv_tbl_resource_get(dev, table, attr->egress,
9626                                                attr->transfer,
9627                                                !!dev_flow->external, tunnel,
9628                                                attr->group, 0, error);
9629                 if (!tbl)
9630                         return rte_flow_error_set
9631                                (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
9632                                actions, "cannot register tunnel group");
9633         }
9634         for (; !actions_end ; actions++) {
9635                 const struct rte_flow_action_queue *queue;
9636                 const struct rte_flow_action_rss *rss;
9637                 const struct rte_flow_action *action = actions;
9638                 const uint8_t *rss_key;
9639                 const struct rte_flow_action_meter *mtr;
9640                 struct mlx5_flow_tbl_resource *tbl;
9641                 uint32_t port_id = 0;
9642                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
9643                 int action_type = actions->type;
9644                 const struct rte_flow_action *found_action = NULL;
9645                 struct mlx5_flow_meter *fm = NULL;
9646                 uint32_t jump_group = 0;
9647
9648                 if (!mlx5_flow_os_action_supported(action_type))
9649                         return rte_flow_error_set(error, ENOTSUP,
9650                                                   RTE_FLOW_ERROR_TYPE_ACTION,
9651                                                   actions,
9652                                                   "action not supported");
9653                 switch (action_type) {
9654                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
9655                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
9656                         break;
9657                 case RTE_FLOW_ACTION_TYPE_VOID:
9658                         break;
9659                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
9660                         if (flow_dv_translate_action_port_id(dev, action,
9661                                                              &port_id, error))
9662                                 return -rte_errno;
9663                         port_id_resource.port_id = port_id;
9664                         MLX5_ASSERT(!handle->rix_port_id_action);
9665                         if (flow_dv_port_id_action_resource_register
9666                             (dev, &port_id_resource, dev_flow, error))
9667                                 return -rte_errno;
9668                         dev_flow->dv.actions[actions_n++] =
9669                                         dev_flow->dv.port_id_action->action;
9670                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
9671                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_PORT_ID;
9672                         sample_act->action_flags |= MLX5_FLOW_ACTION_PORT_ID;
9673                         num_of_dest++;
9674                         break;
9675                 case RTE_FLOW_ACTION_TYPE_FLAG:
9676                         action_flags |= MLX5_FLOW_ACTION_FLAG;
9677                         dev_flow->handle->mark = 1;
9678                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
9679                                 struct rte_flow_action_mark mark = {
9680                                         .id = MLX5_FLOW_MARK_DEFAULT,
9681                                 };
9682
9683                                 if (flow_dv_convert_action_mark(dev, &mark,
9684                                                                 mhdr_res,
9685                                                                 error))
9686                                         return -rte_errno;
9687                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
9688                                 break;
9689                         }
9690                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
9691                         /*
9692                          * Only one FLAG or MARK is supported per device flow
9693                          * right now. So the pointer to the tag resource must be
9694                          * zero before the register process.
9695                          */
9696                         MLX5_ASSERT(!handle->dvh.rix_tag);
9697                         if (flow_dv_tag_resource_register(dev, tag_be,
9698                                                           dev_flow, error))
9699                                 return -rte_errno;
9700                         MLX5_ASSERT(dev_flow->dv.tag_resource);
9701                         dev_flow->dv.actions[actions_n++] =
9702                                         dev_flow->dv.tag_resource->action;
9703                         break;
9704                 case RTE_FLOW_ACTION_TYPE_MARK:
9705                         action_flags |= MLX5_FLOW_ACTION_MARK;
9706                         dev_flow->handle->mark = 1;
9707                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
9708                                 const struct rte_flow_action_mark *mark =
9709                                         (const struct rte_flow_action_mark *)
9710                                                 actions->conf;
9711
9712                                 if (flow_dv_convert_action_mark(dev, mark,
9713                                                                 mhdr_res,
9714                                                                 error))
9715                                         return -rte_errno;
9716                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
9717                                 break;
9718                         }
9719                         /* Fall-through */
9720                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
9721                         /* Legacy (non-extensive) MARK action. */
9722                         tag_be = mlx5_flow_mark_set
9723                               (((const struct rte_flow_action_mark *)
9724                                (actions->conf))->id);
9725                         MLX5_ASSERT(!handle->dvh.rix_tag);
9726                         if (flow_dv_tag_resource_register(dev, tag_be,
9727                                                           dev_flow, error))
9728                                 return -rte_errno;
9729                         MLX5_ASSERT(dev_flow->dv.tag_resource);
9730                         dev_flow->dv.actions[actions_n++] =
9731                                         dev_flow->dv.tag_resource->action;
9732                         break;
9733                 case RTE_FLOW_ACTION_TYPE_SET_META:
9734                         if (flow_dv_convert_action_set_meta
9735                                 (dev, mhdr_res, attr,
9736                                  (const struct rte_flow_action_set_meta *)
9737                                   actions->conf, error))
9738                                 return -rte_errno;
9739                         action_flags |= MLX5_FLOW_ACTION_SET_META;
9740                         break;
9741                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
9742                         if (flow_dv_convert_action_set_tag
9743                                 (dev, mhdr_res,
9744                                  (const struct rte_flow_action_set_tag *)
9745                                   actions->conf, error))
9746                                 return -rte_errno;
9747                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
9748                         break;
9749                 case RTE_FLOW_ACTION_TYPE_DROP:
9750                         action_flags |= MLX5_FLOW_ACTION_DROP;
9751                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_DROP;
9752                         break;
9753                 case RTE_FLOW_ACTION_TYPE_QUEUE:
9754                         queue = actions->conf;
9755                         rss_desc->queue_num = 1;
9756                         rss_desc->queue[0] = queue->index;
9757                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
9758                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
9759                         sample_act->action_flags |= MLX5_FLOW_ACTION_QUEUE;
9760                         num_of_dest++;
9761                         break;
9762                 case RTE_FLOW_ACTION_TYPE_RSS:
9763                         rss = actions->conf;
9764                         memcpy(rss_desc->queue, rss->queue,
9765                                rss->queue_num * sizeof(uint16_t));
9766                         rss_desc->queue_num = rss->queue_num;
9767                         /* NULL RSS key indicates default RSS key. */
9768                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
9769                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
9770                         /*
9771                          * rss->level and rss.types should be set in advance
9772                          * when expanding items for RSS.
9773                          */
9774                         action_flags |= MLX5_FLOW_ACTION_RSS;
9775                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
9776                         break;
9777                 case RTE_FLOW_ACTION_TYPE_AGE:
9778                         if (priv->sh->flow_hit_aso_en) {
9779                                 flow->age = flow_dv_translate_create_aso_age
9780                                                 (dev, action->conf);
9781                                 if (!flow->age)
9782                                         return rte_flow_error_set
9783                                                 (error, rte_errno,
9784                                                  RTE_FLOW_ERROR_TYPE_ACTION,
9785                                                  NULL,
9786                                                  "can't create age action");
9787                                 dev_flow->dv.actions[actions_n++] =
9788                                           (flow_dv_aso_age_get_by_idx
9789                                                 (dev, flow->age))->dr_action;
9790                                 action_flags |= MLX5_FLOW_ACTION_AGE;
9791                                 break;
9792                         }
9793                         /* Fall-through */
9794                 case RTE_FLOW_ACTION_TYPE_COUNT:
9795                         if (!dev_conf->devx) {
9796                                 return rte_flow_error_set
9797                                               (error, ENOTSUP,
9798                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
9799                                                NULL,
9800                                                "count action not supported");
9801                         }
9802                         /* Save information first, will apply later. */
9803                         if (actions->type == RTE_FLOW_ACTION_TYPE_COUNT)
9804                                 count = action->conf;
9805                         else
9806                                 age = action->conf;
9807                         action_flags |= MLX5_FLOW_ACTION_COUNT;
9808                         break;
9809                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
9810                         dev_flow->dv.actions[actions_n++] =
9811                                                 priv->sh->pop_vlan_action;
9812                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
9813                         break;
9814                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
9815                         if (!(action_flags &
9816                               MLX5_FLOW_ACTION_OF_SET_VLAN_VID))
9817                                 flow_dev_get_vlan_info_from_items(items, &vlan);
9818                         vlan.eth_proto = rte_be_to_cpu_16
9819                              ((((const struct rte_flow_action_of_push_vlan *)
9820                                                    actions->conf)->ethertype));
9821                         found_action = mlx5_flow_find_action
9822                                         (actions + 1,
9823                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
9824                         if (found_action)
9825                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
9826                         found_action = mlx5_flow_find_action
9827                                         (actions + 1,
9828                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
9829                         if (found_action)
9830                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
9831                         if (flow_dv_create_action_push_vlan
9832                                             (dev, attr, &vlan, dev_flow, error))
9833                                 return -rte_errno;
9834                         dev_flow->dv.actions[actions_n++] =
9835                                         dev_flow->dv.push_vlan_res->action;
9836                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
9837                         break;
9838                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
9839                         /* of_vlan_push action handled this action */
9840                         MLX5_ASSERT(action_flags &
9841                                     MLX5_FLOW_ACTION_OF_PUSH_VLAN);
9842                         break;
9843                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
9844                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
9845                                 break;
9846                         flow_dev_get_vlan_info_from_items(items, &vlan);
9847                         mlx5_update_vlan_vid_pcp(actions, &vlan);
9848                         /* If no VLAN push - this is a modify header action */
9849                         if (flow_dv_convert_action_modify_vlan_vid
9850                                                 (mhdr_res, actions, error))
9851                                 return -rte_errno;
9852                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
9853                         break;
9854                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
9855                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
9856                         if (flow_dv_create_action_l2_encap(dev, actions,
9857                                                            dev_flow,
9858                                                            attr->transfer,
9859                                                            error))
9860                                 return -rte_errno;
9861                         dev_flow->dv.actions[actions_n++] =
9862                                         dev_flow->dv.encap_decap->action;
9863                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
9864                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
9865                                 sample_act->action_flags |=
9866                                                         MLX5_FLOW_ACTION_ENCAP;
9867                         break;
9868                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
9869                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
9870                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
9871                                                            attr->transfer,
9872                                                            error))
9873                                 return -rte_errno;
9874                         dev_flow->dv.actions[actions_n++] =
9875                                         dev_flow->dv.encap_decap->action;
9876                         action_flags |= MLX5_FLOW_ACTION_DECAP;
9877                         break;
9878                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
9879                         /* Handle encap with preceding decap. */
9880                         if (action_flags & MLX5_FLOW_ACTION_DECAP) {
9881                                 if (flow_dv_create_action_raw_encap
9882                                         (dev, actions, dev_flow, attr, error))
9883                                         return -rte_errno;
9884                                 dev_flow->dv.actions[actions_n++] =
9885                                         dev_flow->dv.encap_decap->action;
9886                         } else {
9887                                 /* Handle encap without preceding decap. */
9888                                 if (flow_dv_create_action_l2_encap
9889                                     (dev, actions, dev_flow, attr->transfer,
9890                                      error))
9891                                         return -rte_errno;
9892                                 dev_flow->dv.actions[actions_n++] =
9893                                         dev_flow->dv.encap_decap->action;
9894                         }
9895                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
9896                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
9897                                 sample_act->action_flags |=
9898                                                         MLX5_FLOW_ACTION_ENCAP;
9899                         break;
9900                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
9901                         while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
9902                                 ;
9903                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
9904                                 if (flow_dv_create_action_l2_decap
9905                                     (dev, dev_flow, attr->transfer, error))
9906                                         return -rte_errno;
9907                                 dev_flow->dv.actions[actions_n++] =
9908                                         dev_flow->dv.encap_decap->action;
9909                         }
9910                         /* If decap is followed by encap, handle it at encap. */
9911                         action_flags |= MLX5_FLOW_ACTION_DECAP;
9912                         break;
9913                 case RTE_FLOW_ACTION_TYPE_JUMP:
9914                         jump_group = ((const struct rte_flow_action_jump *)
9915                                                         action->conf)->group;
9916                         grp_info.std_tbl_fix = 0;
9917                         ret = mlx5_flow_group_to_table(dev, tunnel,
9918                                                        jump_group,
9919                                                        &table,
9920                                                        grp_info, error);
9921                         if (ret)
9922                                 return ret;
9923                         tbl = flow_dv_tbl_resource_get(dev, table, attr->egress,
9924                                                        attr->transfer,
9925                                                        !!dev_flow->external,
9926                                                        tunnel, jump_group, 0,
9927                                                        error);
9928                         if (!tbl)
9929                                 return rte_flow_error_set
9930                                                 (error, errno,
9931                                                  RTE_FLOW_ERROR_TYPE_ACTION,
9932                                                  NULL,
9933                                                  "cannot create jump action.");
9934                         if (flow_dv_jump_tbl_resource_register
9935                             (dev, tbl, dev_flow, error)) {
9936                                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
9937                                 return rte_flow_error_set
9938                                                 (error, errno,
9939                                                  RTE_FLOW_ERROR_TYPE_ACTION,
9940                                                  NULL,
9941                                                  "cannot create jump action.");
9942                         }
9943                         dev_flow->dv.actions[actions_n++] =
9944                                         dev_flow->dv.jump->action;
9945                         action_flags |= MLX5_FLOW_ACTION_JUMP;
9946                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_JUMP;
9947                         break;
9948                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
9949                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
9950                         if (flow_dv_convert_action_modify_mac
9951                                         (mhdr_res, actions, error))
9952                                 return -rte_errno;
9953                         action_flags |= actions->type ==
9954                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
9955                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
9956                                         MLX5_FLOW_ACTION_SET_MAC_DST;
9957                         break;
9958                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
9959                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
9960                         if (flow_dv_convert_action_modify_ipv4
9961                                         (mhdr_res, actions, error))
9962                                 return -rte_errno;
9963                         action_flags |= actions->type ==
9964                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
9965                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
9966                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
9967                         break;
9968                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
9969                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
9970                         if (flow_dv_convert_action_modify_ipv6
9971                                         (mhdr_res, actions, error))
9972                                 return -rte_errno;
9973                         action_flags |= actions->type ==
9974                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
9975                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
9976                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
9977                         break;
9978                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
9979                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
9980                         if (flow_dv_convert_action_modify_tp
9981                                         (mhdr_res, actions, items,
9982                                          &flow_attr, dev_flow, !!(action_flags &
9983                                          MLX5_FLOW_ACTION_DECAP), error))
9984                                 return -rte_errno;
9985                         action_flags |= actions->type ==
9986                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
9987                                         MLX5_FLOW_ACTION_SET_TP_SRC :
9988                                         MLX5_FLOW_ACTION_SET_TP_DST;
9989                         break;
9990                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
9991                         if (flow_dv_convert_action_modify_dec_ttl
9992                                         (mhdr_res, items, &flow_attr, dev_flow,
9993                                          !!(action_flags &
9994                                          MLX5_FLOW_ACTION_DECAP), error))
9995                                 return -rte_errno;
9996                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
9997                         break;
9998                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
9999                         if (flow_dv_convert_action_modify_ttl
10000                                         (mhdr_res, actions, items, &flow_attr,
10001                                          dev_flow, !!(action_flags &
10002                                          MLX5_FLOW_ACTION_DECAP), error))
10003                                 return -rte_errno;
10004                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
10005                         break;
10006                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
10007                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
10008                         if (flow_dv_convert_action_modify_tcp_seq
10009                                         (mhdr_res, actions, error))
10010                                 return -rte_errno;
10011                         action_flags |= actions->type ==
10012                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
10013                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
10014                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
10015                         break;
10016
10017                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
10018                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
10019                         if (flow_dv_convert_action_modify_tcp_ack
10020                                         (mhdr_res, actions, error))
10021                                 return -rte_errno;
10022                         action_flags |= actions->type ==
10023                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
10024                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
10025                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
10026                         break;
10027                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
10028                         if (flow_dv_convert_action_set_reg
10029                                         (mhdr_res, actions, error))
10030                                 return -rte_errno;
10031                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
10032                         break;
10033                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
10034                         if (flow_dv_convert_action_copy_mreg
10035                                         (dev, mhdr_res, actions, error))
10036                                 return -rte_errno;
10037                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
10038                         break;
10039                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
10040                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
10041                         dev_flow->handle->fate_action =
10042                                         MLX5_FLOW_FATE_DEFAULT_MISS;
10043                         break;
10044                 case RTE_FLOW_ACTION_TYPE_METER:
10045                         mtr = actions->conf;
10046                         if (!flow->meter) {
10047                                 fm = mlx5_flow_meter_attach(priv, mtr->mtr_id,
10048                                                             attr, error);
10049                                 if (!fm)
10050                                         return rte_flow_error_set(error,
10051                                                 rte_errno,
10052                                                 RTE_FLOW_ERROR_TYPE_ACTION,
10053                                                 NULL,
10054                                                 "meter not found "
10055                                                 "or invalid parameters");
10056                                 flow->meter = fm->idx;
10057                         }
10058                         /* Set the meter action. */
10059                         if (!fm) {
10060                                 fm = mlx5_ipool_get(priv->sh->ipool
10061                                                 [MLX5_IPOOL_MTR], flow->meter);
10062                                 if (!fm)
10063                                         return rte_flow_error_set(error,
10064                                                 rte_errno,
10065                                                 RTE_FLOW_ERROR_TYPE_ACTION,
10066                                                 NULL,
10067                                                 "meter not found "
10068                                                 "or invalid parameters");
10069                         }
10070                         dev_flow->dv.actions[actions_n++] =
10071                                 fm->mfts->meter_action;
10072                         action_flags |= MLX5_FLOW_ACTION_METER;
10073                         break;
10074                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
10075                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
10076                                                               actions, error))
10077                                 return -rte_errno;
10078                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
10079                         break;
10080                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
10081                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
10082                                                               actions, error))
10083                                 return -rte_errno;
10084                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
10085                         break;
10086                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
10087                         sample_act_pos = actions_n;
10088                         ret = flow_dv_translate_action_sample(dev,
10089                                                               actions,
10090                                                               dev_flow, attr,
10091                                                               &num_of_dest,
10092                                                               sample_actions,
10093                                                               &sample_res,
10094                                                               error);
10095                         if (ret < 0)
10096                                 return ret;
10097                         actions_n++;
10098                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
10099                         /* put encap action into group if work with port id */
10100                         if ((action_flags & MLX5_FLOW_ACTION_ENCAP) &&
10101                             (action_flags & MLX5_FLOW_ACTION_PORT_ID))
10102                                 sample_act->action_flags |=
10103                                                         MLX5_FLOW_ACTION_ENCAP;
10104                         break;
10105                 case RTE_FLOW_ACTION_TYPE_END:
10106                         actions_end = true;
10107                         if (mhdr_res->actions_num) {
10108                                 /* create modify action if needed. */
10109                                 if (flow_dv_modify_hdr_resource_register
10110                                         (dev, mhdr_res, dev_flow, error))
10111                                         return -rte_errno;
10112                                 dev_flow->dv.actions[modify_action_position] =
10113                                         handle->dvh.modify_hdr->action;
10114                         }
10115                         if (action_flags & MLX5_FLOW_ACTION_COUNT) {
10116                                 flow->counter =
10117                                         flow_dv_translate_create_counter(dev,
10118                                                 dev_flow, count, age);
10119
10120                                 if (!flow->counter)
10121                                         return rte_flow_error_set
10122                                                 (error, rte_errno,
10123                                                 RTE_FLOW_ERROR_TYPE_ACTION,
10124                                                 NULL,
10125                                                 "cannot create counter"
10126                                                 " object.");
10127                                 dev_flow->dv.actions[actions_n] =
10128                                           (flow_dv_counter_get_by_idx(dev,
10129                                           flow->counter, NULL))->action;
10130                                 actions_n++;
10131                         }
10132                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE) {
10133                                 ret = flow_dv_create_action_sample(dev,
10134                                                           dev_flow,
10135                                                           num_of_dest,
10136                                                           &sample_res,
10137                                                           &mdest_res,
10138                                                           sample_actions,
10139                                                           action_flags,
10140                                                           error);
10141                                 if (ret < 0)
10142                                         return rte_flow_error_set
10143                                                 (error, rte_errno,
10144                                                 RTE_FLOW_ERROR_TYPE_ACTION,
10145                                                 NULL,
10146                                                 "cannot create sample action");
10147                                 if (num_of_dest > 1) {
10148                                         dev_flow->dv.actions[sample_act_pos] =
10149                                         dev_flow->dv.dest_array_res->action;
10150                                 } else {
10151                                         dev_flow->dv.actions[sample_act_pos] =
10152                                         dev_flow->dv.sample_res->verbs_action;
10153                                 }
10154                         }
10155                         break;
10156                 default:
10157                         break;
10158                 }
10159                 if (mhdr_res->actions_num &&
10160                     modify_action_position == UINT32_MAX)
10161                         modify_action_position = actions_n++;
10162         }
10163         /*
10164          * For multiple destination (sample action with ratio=1), the encap
10165          * action and port id action will be combined into group action.
10166          * So need remove the original these actions in the flow and only
10167          * use the sample action instead of.
10168          */
10169         if (num_of_dest > 1 && sample_act->dr_port_id_action) {
10170                 int i;
10171                 void *temp_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
10172
10173                 for (i = 0; i < actions_n; i++) {
10174                         if ((sample_act->dr_encap_action &&
10175                                 sample_act->dr_encap_action ==
10176                                 dev_flow->dv.actions[i]) ||
10177                                 (sample_act->dr_port_id_action &&
10178                                 sample_act->dr_port_id_action ==
10179                                 dev_flow->dv.actions[i]))
10180                                 continue;
10181                         temp_actions[tmp_actions_n++] = dev_flow->dv.actions[i];
10182                 }
10183                 memcpy((void *)dev_flow->dv.actions,
10184                                 (void *)temp_actions,
10185                                 tmp_actions_n * sizeof(void *));
10186                 actions_n = tmp_actions_n;
10187         }
10188         dev_flow->dv.actions_n = actions_n;
10189         dev_flow->act_flags = action_flags;
10190         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
10191                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
10192                 int item_type = items->type;
10193
10194                 if (!mlx5_flow_os_item_supported(item_type))
10195                         return rte_flow_error_set(error, ENOTSUP,
10196                                                   RTE_FLOW_ERROR_TYPE_ITEM,
10197                                                   NULL, "item not supported");
10198                 switch (item_type) {
10199                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
10200                         flow_dv_translate_item_port_id(dev, match_mask,
10201                                                        match_value, items);
10202                         last_item = MLX5_FLOW_ITEM_PORT_ID;
10203                         break;
10204                 case RTE_FLOW_ITEM_TYPE_ETH:
10205                         flow_dv_translate_item_eth(match_mask, match_value,
10206                                                    items, tunnel,
10207                                                    dev_flow->dv.group);
10208                         matcher.priority = action_flags &
10209                                         MLX5_FLOW_ACTION_DEFAULT_MISS &&
10210                                         !dev_flow->external ?
10211                                         MLX5_PRIORITY_MAP_L3 :
10212                                         MLX5_PRIORITY_MAP_L2;
10213                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
10214                                              MLX5_FLOW_LAYER_OUTER_L2;
10215                         break;
10216                 case RTE_FLOW_ITEM_TYPE_VLAN:
10217                         flow_dv_translate_item_vlan(dev_flow,
10218                                                     match_mask, match_value,
10219                                                     items, tunnel,
10220                                                     dev_flow->dv.group);
10221                         matcher.priority = MLX5_PRIORITY_MAP_L2;
10222                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
10223                                               MLX5_FLOW_LAYER_INNER_VLAN) :
10224                                              (MLX5_FLOW_LAYER_OUTER_L2 |
10225                                               MLX5_FLOW_LAYER_OUTER_VLAN);
10226                         break;
10227                 case RTE_FLOW_ITEM_TYPE_IPV4:
10228                         mlx5_flow_tunnel_ip_check(items, next_protocol,
10229                                                   &item_flags, &tunnel);
10230                         flow_dv_translate_item_ipv4(match_mask, match_value,
10231                                                     items, tunnel,
10232                                                     dev_flow->dv.group);
10233                         matcher.priority = MLX5_PRIORITY_MAP_L3;
10234                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
10235                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
10236                         if (items->mask != NULL &&
10237                             ((const struct rte_flow_item_ipv4 *)
10238                              items->mask)->hdr.next_proto_id) {
10239                                 next_protocol =
10240                                         ((const struct rte_flow_item_ipv4 *)
10241                                          (items->spec))->hdr.next_proto_id;
10242                                 next_protocol &=
10243                                         ((const struct rte_flow_item_ipv4 *)
10244                                          (items->mask))->hdr.next_proto_id;
10245                         } else {
10246                                 /* Reset for inner layer. */
10247                                 next_protocol = 0xff;
10248                         }
10249                         break;
10250                 case RTE_FLOW_ITEM_TYPE_IPV6:
10251                         mlx5_flow_tunnel_ip_check(items, next_protocol,
10252                                                   &item_flags, &tunnel);
10253                         flow_dv_translate_item_ipv6(match_mask, match_value,
10254                                                     items, tunnel,
10255                                                     dev_flow->dv.group);
10256                         matcher.priority = MLX5_PRIORITY_MAP_L3;
10257                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
10258                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
10259                         if (items->mask != NULL &&
10260                             ((const struct rte_flow_item_ipv6 *)
10261                              items->mask)->hdr.proto) {
10262                                 next_protocol =
10263                                         ((const struct rte_flow_item_ipv6 *)
10264                                          items->spec)->hdr.proto;
10265                                 next_protocol &=
10266                                         ((const struct rte_flow_item_ipv6 *)
10267                                          items->mask)->hdr.proto;
10268                         } else {
10269                                 /* Reset for inner layer. */
10270                                 next_protocol = 0xff;
10271                         }
10272                         break;
10273                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
10274                         flow_dv_translate_item_ipv6_frag_ext(match_mask,
10275                                                              match_value,
10276                                                              items, tunnel);
10277                         last_item = tunnel ?
10278                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
10279                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
10280                         if (items->mask != NULL &&
10281                             ((const struct rte_flow_item_ipv6_frag_ext *)
10282                              items->mask)->hdr.next_header) {
10283                                 next_protocol =
10284                                 ((const struct rte_flow_item_ipv6_frag_ext *)
10285                                  items->spec)->hdr.next_header;
10286                                 next_protocol &=
10287                                 ((const struct rte_flow_item_ipv6_frag_ext *)
10288                                  items->mask)->hdr.next_header;
10289                         } else {
10290                                 /* Reset for inner layer. */
10291                                 next_protocol = 0xff;
10292                         }
10293                         break;
10294                 case RTE_FLOW_ITEM_TYPE_TCP:
10295                         flow_dv_translate_item_tcp(match_mask, match_value,
10296                                                    items, tunnel);
10297                         matcher.priority = MLX5_PRIORITY_MAP_L4;
10298                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
10299                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
10300                         break;
10301                 case RTE_FLOW_ITEM_TYPE_UDP:
10302                         flow_dv_translate_item_udp(match_mask, match_value,
10303                                                    items, tunnel);
10304                         matcher.priority = MLX5_PRIORITY_MAP_L4;
10305                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
10306                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
10307                         break;
10308                 case RTE_FLOW_ITEM_TYPE_GRE:
10309                         flow_dv_translate_item_gre(match_mask, match_value,
10310                                                    items, tunnel);
10311                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
10312                         last_item = MLX5_FLOW_LAYER_GRE;
10313                         break;
10314                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
10315                         flow_dv_translate_item_gre_key(match_mask,
10316                                                        match_value, items);
10317                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
10318                         break;
10319                 case RTE_FLOW_ITEM_TYPE_NVGRE:
10320                         flow_dv_translate_item_nvgre(match_mask, match_value,
10321                                                      items, tunnel);
10322                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
10323                         last_item = MLX5_FLOW_LAYER_GRE;
10324                         break;
10325                 case RTE_FLOW_ITEM_TYPE_VXLAN:
10326                         flow_dv_translate_item_vxlan(match_mask, match_value,
10327                                                      items, tunnel);
10328                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
10329                         last_item = MLX5_FLOW_LAYER_VXLAN;
10330                         break;
10331                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
10332                         flow_dv_translate_item_vxlan_gpe(match_mask,
10333                                                          match_value, items,
10334                                                          tunnel);
10335                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
10336                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
10337                         break;
10338                 case RTE_FLOW_ITEM_TYPE_GENEVE:
10339                         flow_dv_translate_item_geneve(match_mask, match_value,
10340                                                       items, tunnel);
10341                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
10342                         last_item = MLX5_FLOW_LAYER_GENEVE;
10343                         break;
10344                 case RTE_FLOW_ITEM_TYPE_MPLS:
10345                         flow_dv_translate_item_mpls(match_mask, match_value,
10346                                                     items, last_item, tunnel);
10347                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
10348                         last_item = MLX5_FLOW_LAYER_MPLS;
10349                         break;
10350                 case RTE_FLOW_ITEM_TYPE_MARK:
10351                         flow_dv_translate_item_mark(dev, match_mask,
10352                                                     match_value, items);
10353                         last_item = MLX5_FLOW_ITEM_MARK;
10354                         break;
10355                 case RTE_FLOW_ITEM_TYPE_META:
10356                         flow_dv_translate_item_meta(dev, match_mask,
10357                                                     match_value, attr, items);
10358                         last_item = MLX5_FLOW_ITEM_METADATA;
10359                         break;
10360                 case RTE_FLOW_ITEM_TYPE_ICMP:
10361                         flow_dv_translate_item_icmp(match_mask, match_value,
10362                                                     items, tunnel);
10363                         last_item = MLX5_FLOW_LAYER_ICMP;
10364                         break;
10365                 case RTE_FLOW_ITEM_TYPE_ICMP6:
10366                         flow_dv_translate_item_icmp6(match_mask, match_value,
10367                                                       items, tunnel);
10368                         last_item = MLX5_FLOW_LAYER_ICMP6;
10369                         break;
10370                 case RTE_FLOW_ITEM_TYPE_TAG:
10371                         flow_dv_translate_item_tag(dev, match_mask,
10372                                                    match_value, items);
10373                         last_item = MLX5_FLOW_ITEM_TAG;
10374                         break;
10375                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
10376                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
10377                                                         match_value, items);
10378                         last_item = MLX5_FLOW_ITEM_TAG;
10379                         break;
10380                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
10381                         flow_dv_translate_item_tx_queue(dev, match_mask,
10382                                                         match_value,
10383                                                         items);
10384                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
10385                         break;
10386                 case RTE_FLOW_ITEM_TYPE_GTP:
10387                         flow_dv_translate_item_gtp(match_mask, match_value,
10388                                                    items, tunnel);
10389                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
10390                         last_item = MLX5_FLOW_LAYER_GTP;
10391                         break;
10392                 case RTE_FLOW_ITEM_TYPE_ECPRI:
10393                         if (!mlx5_flex_parser_ecpri_exist(dev)) {
10394                                 /* Create it only the first time to be used. */
10395                                 ret = mlx5_flex_parser_ecpri_alloc(dev);
10396                                 if (ret)
10397                                         return rte_flow_error_set
10398                                                 (error, -ret,
10399                                                 RTE_FLOW_ERROR_TYPE_ITEM,
10400                                                 NULL,
10401                                                 "cannot create eCPRI parser");
10402                         }
10403                         /* Adjust the length matcher and device flow value. */
10404                         matcher.mask.size = MLX5_ST_SZ_BYTES(fte_match_param);
10405                         dev_flow->dv.value.size =
10406                                         MLX5_ST_SZ_BYTES(fte_match_param);
10407                         flow_dv_translate_item_ecpri(dev, match_mask,
10408                                                      match_value, items);
10409                         /* No other protocol should follow eCPRI layer. */
10410                         last_item = MLX5_FLOW_LAYER_ECPRI;
10411                         break;
10412                 default:
10413                         break;
10414                 }
10415                 item_flags |= last_item;
10416         }
10417         /*
10418          * When E-Switch mode is enabled, we have two cases where we need to
10419          * set the source port manually.
10420          * The first one, is in case of Nic steering rule, and the second is
10421          * E-Switch rule where no port_id item was found. In both cases
10422          * the source port is set according the current port in use.
10423          */
10424         if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
10425             (priv->representor || priv->master)) {
10426                 if (flow_dv_translate_item_port_id(dev, match_mask,
10427                                                    match_value, NULL))
10428                         return -rte_errno;
10429         }
10430 #ifdef RTE_LIBRTE_MLX5_DEBUG
10431         MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
10432                                               dev_flow->dv.value.buf));
10433 #endif
10434         /*
10435          * Layers may be already initialized from prefix flow if this dev_flow
10436          * is the suffix flow.
10437          */
10438         handle->layers |= item_flags;
10439         if (action_flags & MLX5_FLOW_ACTION_RSS)
10440                 flow_dv_hashfields_set(dev_flow, rss_desc);
10441         /* Register matcher. */
10442         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
10443                                     matcher.mask.size);
10444         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
10445                                                      matcher.priority);
10446         /* reserved field no needs to be set to 0 here. */
10447         tbl_key.domain = attr->transfer;
10448         tbl_key.direction = attr->egress;
10449         tbl_key.table_id = dev_flow->dv.group;
10450         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow, error))
10451                 return -rte_errno;
10452         return 0;
10453 }
10454
10455 /**
10456  * Set hash RX queue by hash fields (see enum ibv_rx_hash_fields)
10457  * and tunnel.
10458  *
10459  * @param[in, out] action
10460  *   Shred RSS action holding hash RX queue objects.
10461  * @param[in] hash_fields
10462  *   Defines combination of packet fields to participate in RX hash.
10463  * @param[in] tunnel
10464  *   Tunnel type
10465  * @param[in] hrxq_idx
10466  *   Hash RX queue index to set.
10467  *
10468  * @return
10469  *   0 on success, otherwise negative errno value.
10470  */
10471 static int
10472 __flow_dv_action_rss_hrxq_set(struct mlx5_shared_action_rss *action,
10473                               const uint64_t hash_fields,
10474                               const int tunnel,
10475                               uint32_t hrxq_idx)
10476 {
10477         uint32_t *hrxqs = tunnel ? action->hrxq : action->hrxq_tunnel;
10478
10479         switch (hash_fields & ~IBV_RX_HASH_INNER) {
10480         case MLX5_RSS_HASH_IPV4:
10481                 hrxqs[0] = hrxq_idx;
10482                 return 0;
10483         case MLX5_RSS_HASH_IPV4_TCP:
10484                 hrxqs[1] = hrxq_idx;
10485                 return 0;
10486         case MLX5_RSS_HASH_IPV4_UDP:
10487                 hrxqs[2] = hrxq_idx;
10488                 return 0;
10489         case MLX5_RSS_HASH_IPV6:
10490                 hrxqs[3] = hrxq_idx;
10491                 return 0;
10492         case MLX5_RSS_HASH_IPV6_TCP:
10493                 hrxqs[4] = hrxq_idx;
10494                 return 0;
10495         case MLX5_RSS_HASH_IPV6_UDP:
10496                 hrxqs[5] = hrxq_idx;
10497                 return 0;
10498         case MLX5_RSS_HASH_NONE:
10499                 hrxqs[6] = hrxq_idx;
10500                 return 0;
10501         default:
10502                 return -1;
10503         }
10504 }
10505
10506 /**
10507  * Look up for hash RX queue by hash fields (see enum ibv_rx_hash_fields)
10508  * and tunnel.
10509  *
10510  * @param[in] dev
10511  *   Pointer to the Ethernet device structure.
10512  * @param[in] idx
10513  *   Shared RSS action ID holding hash RX queue objects.
10514  * @param[in] hash_fields
10515  *   Defines combination of packet fields to participate in RX hash.
10516  * @param[in] tunnel
10517  *   Tunnel type
10518  *
10519  * @return
10520  *   Valid hash RX queue index, otherwise 0.
10521  */
10522 static uint32_t
10523 __flow_dv_action_rss_hrxq_lookup(struct rte_eth_dev *dev, uint32_t idx,
10524                                  const uint64_t hash_fields,
10525                                  const int tunnel)
10526 {
10527         struct mlx5_priv *priv = dev->data->dev_private;
10528         struct mlx5_shared_action_rss *shared_rss =
10529             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
10530         const uint32_t *hrxqs = tunnel ? shared_rss->hrxq :
10531                                                         shared_rss->hrxq_tunnel;
10532
10533         switch (hash_fields & ~IBV_RX_HASH_INNER) {
10534         case MLX5_RSS_HASH_IPV4:
10535                 return hrxqs[0];
10536         case MLX5_RSS_HASH_IPV4_TCP:
10537                 return hrxqs[1];
10538         case MLX5_RSS_HASH_IPV4_UDP:
10539                 return hrxqs[2];
10540         case MLX5_RSS_HASH_IPV6:
10541                 return hrxqs[3];
10542         case MLX5_RSS_HASH_IPV6_TCP:
10543                 return hrxqs[4];
10544         case MLX5_RSS_HASH_IPV6_UDP:
10545                 return hrxqs[5];
10546         case MLX5_RSS_HASH_NONE:
10547                 return hrxqs[6];
10548         default:
10549                 return 0;
10550         }
10551 }
10552
10553 /**
10554  * Retrieves hash RX queue suitable for the *flow*.
10555  * If shared action configured for *flow* suitable hash RX queue will be
10556  * retrieved from attached shared action.
10557  *
10558  * @param[in] dev
10559  *   Pointer to the Ethernet device structure.
10560  * @param[in] flow
10561  *   Shred RSS action holding hash RX queue objects.
10562  * @param[in] dev_flow
10563  *   Pointer to the sub flow.
10564  * @param[out] hrxq
10565  *   Pointer to retrieved hash RX queue object.
10566  *
10567  * @return
10568  *   Valid hash RX queue index, otherwise 0 and rte_errno is set.
10569  */
10570 static uint32_t
10571 __flow_dv_rss_get_hrxq(struct rte_eth_dev *dev, struct rte_flow *flow,
10572                            struct mlx5_flow *dev_flow,
10573                            struct mlx5_hrxq **hrxq)
10574 {
10575         struct mlx5_priv *priv = dev->data->dev_private;
10576         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
10577         uint32_t hrxq_idx;
10578
10579         if (flow->shared_rss) {
10580                 hrxq_idx = __flow_dv_action_rss_hrxq_lookup
10581                                 (dev, flow->shared_rss, dev_flow->hash_fields,
10582                                  !!(dev_flow->handle->layers &
10583                                     MLX5_FLOW_LAYER_TUNNEL));
10584                 if (hrxq_idx) {
10585                         *hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
10586                                                hrxq_idx);
10587                         __atomic_fetch_add(&(*hrxq)->refcnt, 1,
10588                                            __ATOMIC_RELAXED);
10589                 }
10590         } else {
10591                 struct mlx5_flow_rss_desc *rss_desc =
10592                                 &wks->rss_desc[!!wks->flow_nested_idx];
10593
10594                 *hrxq = flow_dv_hrxq_prepare(dev, dev_flow, rss_desc,
10595                                              &hrxq_idx);
10596         }
10597         return hrxq_idx;
10598 }
10599
10600 /**
10601  * Apply the flow to the NIC, lock free,
10602  * (mutex should be acquired by caller).
10603  *
10604  * @param[in] dev
10605  *   Pointer to the Ethernet device structure.
10606  * @param[in, out] flow
10607  *   Pointer to flow structure.
10608  * @param[out] error
10609  *   Pointer to error structure.
10610  *
10611  * @return
10612  *   0 on success, a negative errno value otherwise and rte_errno is set.
10613  */
10614 static int
10615 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
10616               struct rte_flow_error *error)
10617 {
10618         struct mlx5_flow_dv_workspace *dv;
10619         struct mlx5_flow_handle *dh;
10620         struct mlx5_flow_handle_dv *dv_h;
10621         struct mlx5_flow *dev_flow;
10622         struct mlx5_priv *priv = dev->data->dev_private;
10623         uint32_t handle_idx;
10624         int n;
10625         int err;
10626         int idx;
10627         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
10628
10629         MLX5_ASSERT(wks);
10630         for (idx = wks->flow_idx - 1; idx >= wks->flow_nested_idx; idx--) {
10631                 dev_flow = &wks->flows[idx];
10632                 dv = &dev_flow->dv;
10633                 dh = dev_flow->handle;
10634                 dv_h = &dh->dvh;
10635                 n = dv->actions_n;
10636                 if (dh->fate_action == MLX5_FLOW_FATE_DROP) {
10637                         if (dv->transfer) {
10638                                 dv->actions[n++] = priv->sh->esw_drop_action;
10639                         } else {
10640                                 MLX5_ASSERT(priv->drop_queue.hrxq);
10641                                 dv->actions[n++] =
10642                                                 priv->drop_queue.hrxq->action;
10643                         }
10644                 } else if (dh->fate_action == MLX5_FLOW_FATE_QUEUE &&
10645                            !dv_h->rix_sample && !dv_h->rix_dest_array) {
10646                         struct mlx5_hrxq *hrxq = NULL;
10647                         uint32_t hrxq_idx = __flow_dv_rss_get_hrxq
10648                                                 (dev, flow, dev_flow, &hrxq);
10649                         if (!hrxq) {
10650                                 rte_flow_error_set
10651                                         (error, rte_errno,
10652                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10653                                          "cannot get hash queue");
10654                                 goto error;
10655                         }
10656                         dh->rix_hrxq = hrxq_idx;
10657                         dv->actions[n++] = hrxq->action;
10658                 } else if (dh->fate_action == MLX5_FLOW_FATE_DEFAULT_MISS) {
10659                         if (!priv->sh->default_miss_action) {
10660                                 rte_flow_error_set
10661                                         (error, rte_errno,
10662                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10663                                          "default miss action not be created.");
10664                                 goto error;
10665                         }
10666                         dv->actions[n++] = priv->sh->default_miss_action;
10667                 }
10668                 err = mlx5_flow_os_create_flow(dv_h->matcher->matcher_object,
10669                                                (void *)&dv->value, n,
10670                                                dv->actions, &dh->drv_flow);
10671                 if (err) {
10672                         rte_flow_error_set(error, errno,
10673                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10674                                            NULL,
10675                                            "hardware refuses to create flow");
10676                         goto error;
10677                 }
10678                 if (priv->vmwa_context &&
10679                     dh->vf_vlan.tag && !dh->vf_vlan.created) {
10680                         /*
10681                          * The rule contains the VLAN pattern.
10682                          * For VF we are going to create VLAN
10683                          * interface to make hypervisor set correct
10684                          * e-Switch vport context.
10685                          */
10686                         mlx5_vlan_vmwa_acquire(dev, &dh->vf_vlan);
10687                 }
10688         }
10689         return 0;
10690 error:
10691         err = rte_errno; /* Save rte_errno before cleanup. */
10692         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
10693                        handle_idx, dh, next) {
10694                 /* hrxq is union, don't clear it if the flag is not set. */
10695                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE && dh->rix_hrxq) {
10696                         mlx5_hrxq_release(dev, dh->rix_hrxq);
10697                         dh->rix_hrxq = 0;
10698                 }
10699                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
10700                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
10701         }
10702         rte_errno = err; /* Restore rte_errno. */
10703         return -rte_errno;
10704 }
10705
10706 void
10707 flow_dv_matcher_remove_cb(struct mlx5_cache_list *list __rte_unused,
10708                           struct mlx5_cache_entry *entry)
10709 {
10710         struct mlx5_flow_dv_matcher *cache = container_of(entry, typeof(*cache),
10711                                                           entry);
10712
10713         claim_zero(mlx5_flow_os_destroy_flow_matcher(cache->matcher_object));
10714         mlx5_free(cache);
10715 }
10716
10717 /**
10718  * Release the flow matcher.
10719  *
10720  * @param dev
10721  *   Pointer to Ethernet device.
10722  * @param handle
10723  *   Pointer to mlx5_flow_handle.
10724  *
10725  * @return
10726  *   1 while a reference on it exists, 0 when freed.
10727  */
10728 static int
10729 flow_dv_matcher_release(struct rte_eth_dev *dev,
10730                         struct mlx5_flow_handle *handle)
10731 {
10732         struct mlx5_flow_dv_matcher *matcher = handle->dvh.matcher;
10733         struct mlx5_flow_tbl_data_entry *tbl = container_of(matcher->tbl,
10734                                                             typeof(*tbl), tbl);
10735         int ret;
10736
10737         MLX5_ASSERT(matcher->matcher_object);
10738         ret = mlx5_cache_unregister(&tbl->matchers, &matcher->entry);
10739         flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl->tbl);
10740         return ret;
10741 }
10742
10743 /**
10744  * Release encap_decap resource.
10745  *
10746  * @param list
10747  *   Pointer to the hash list.
10748  * @param entry
10749  *   Pointer to exist resource entry object.
10750  */
10751 void
10752 flow_dv_encap_decap_remove_cb(struct mlx5_hlist *list,
10753                               struct mlx5_hlist_entry *entry)
10754 {
10755         struct mlx5_dev_ctx_shared *sh = list->ctx;
10756         struct mlx5_flow_dv_encap_decap_resource *res =
10757                 container_of(entry, typeof(*res), entry);
10758
10759         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
10760         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
10761 }
10762
10763 /**
10764  * Release an encap/decap resource.
10765  *
10766  * @param dev
10767  *   Pointer to Ethernet device.
10768  * @param encap_decap_idx
10769  *   Index of encap decap resource.
10770  *
10771  * @return
10772  *   1 while a reference on it exists, 0 when freed.
10773  */
10774 static int
10775 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
10776                                      uint32_t encap_decap_idx)
10777 {
10778         struct mlx5_priv *priv = dev->data->dev_private;
10779         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
10780
10781         cache_resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
10782                                         encap_decap_idx);
10783         if (!cache_resource)
10784                 return 0;
10785         MLX5_ASSERT(cache_resource->action);
10786         return mlx5_hlist_unregister(priv->sh->encaps_decaps,
10787                                      &cache_resource->entry);
10788 }
10789
10790 /**
10791  * Release an jump to table action resource.
10792  *
10793  * @param dev
10794  *   Pointer to Ethernet device.
10795  * @param handle
10796  *   Pointer to mlx5_flow_handle.
10797  *
10798  * @return
10799  *   1 while a reference on it exists, 0 when freed.
10800  */
10801 static int
10802 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
10803                                   struct mlx5_flow_handle *handle)
10804 {
10805         struct mlx5_priv *priv = dev->data->dev_private;
10806         struct mlx5_flow_tbl_data_entry *tbl_data;
10807
10808         tbl_data = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_JUMP],
10809                              handle->rix_jump);
10810         if (!tbl_data)
10811                 return 0;
10812         return flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl_data->tbl);
10813 }
10814
10815 void
10816 flow_dv_modify_remove_cb(struct mlx5_hlist *list __rte_unused,
10817                          struct mlx5_hlist_entry *entry)
10818 {
10819         struct mlx5_flow_dv_modify_hdr_resource *res =
10820                 container_of(entry, typeof(*res), entry);
10821
10822         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
10823         mlx5_free(entry);
10824 }
10825
10826 /**
10827  * Release a modify-header resource.
10828  *
10829  * @param dev
10830  *   Pointer to Ethernet device.
10831  * @param handle
10832  *   Pointer to mlx5_flow_handle.
10833  *
10834  * @return
10835  *   1 while a reference on it exists, 0 when freed.
10836  */
10837 static int
10838 flow_dv_modify_hdr_resource_release(struct rte_eth_dev *dev,
10839                                     struct mlx5_flow_handle *handle)
10840 {
10841         struct mlx5_priv *priv = dev->data->dev_private;
10842         struct mlx5_flow_dv_modify_hdr_resource *entry = handle->dvh.modify_hdr;
10843
10844         MLX5_ASSERT(entry->action);
10845         return mlx5_hlist_unregister(priv->sh->modify_cmds, &entry->entry);
10846 }
10847
10848 void
10849 flow_dv_port_id_remove_cb(struct mlx5_cache_list *list,
10850                           struct mlx5_cache_entry *entry)
10851 {
10852         struct mlx5_dev_ctx_shared *sh = list->ctx;
10853         struct mlx5_flow_dv_port_id_action_resource *cache =
10854                         container_of(entry, typeof(*cache), entry);
10855
10856         claim_zero(mlx5_flow_os_destroy_flow_action(cache->action));
10857         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], cache->idx);
10858 }
10859
10860 /**
10861  * Release port ID action resource.
10862  *
10863  * @param dev
10864  *   Pointer to Ethernet device.
10865  * @param handle
10866  *   Pointer to mlx5_flow_handle.
10867  *
10868  * @return
10869  *   1 while a reference on it exists, 0 when freed.
10870  */
10871 static int
10872 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
10873                                         uint32_t port_id)
10874 {
10875         struct mlx5_priv *priv = dev->data->dev_private;
10876         struct mlx5_flow_dv_port_id_action_resource *cache;
10877
10878         cache = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PORT_ID], port_id);
10879         if (!cache)
10880                 return 0;
10881         MLX5_ASSERT(cache->action);
10882         return mlx5_cache_unregister(&priv->sh->port_id_action_list,
10883                                      &cache->entry);
10884 }
10885
10886 void
10887 flow_dv_push_vlan_remove_cb(struct mlx5_cache_list *list,
10888                             struct mlx5_cache_entry *entry)
10889 {
10890         struct mlx5_dev_ctx_shared *sh = list->ctx;
10891         struct mlx5_flow_dv_push_vlan_action_resource *cache =
10892                         container_of(entry, typeof(*cache), entry);
10893
10894         claim_zero(mlx5_flow_os_destroy_flow_action(cache->action));
10895         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], cache->idx);
10896 }
10897
10898 /**
10899  * Release push vlan action resource.
10900  *
10901  * @param dev
10902  *   Pointer to Ethernet device.
10903  * @param handle
10904  *   Pointer to mlx5_flow_handle.
10905  *
10906  * @return
10907  *   1 while a reference on it exists, 0 when freed.
10908  */
10909 static int
10910 flow_dv_push_vlan_action_resource_release(struct rte_eth_dev *dev,
10911                                           struct mlx5_flow_handle *handle)
10912 {
10913         struct mlx5_priv *priv = dev->data->dev_private;
10914         struct mlx5_flow_dv_push_vlan_action_resource *cache;
10915         uint32_t idx = handle->dvh.rix_push_vlan;
10916
10917         cache = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
10918         if (!cache)
10919                 return 0;
10920         MLX5_ASSERT(cache->action);
10921         return mlx5_cache_unregister(&priv->sh->push_vlan_action_list,
10922                                      &cache->entry);
10923 }
10924
10925 /**
10926  * Release the fate resource.
10927  *
10928  * @param dev
10929  *   Pointer to Ethernet device.
10930  * @param handle
10931  *   Pointer to mlx5_flow_handle.
10932  */
10933 static void
10934 flow_dv_fate_resource_release(struct rte_eth_dev *dev,
10935                                struct mlx5_flow_handle *handle)
10936 {
10937         if (!handle->rix_fate)
10938                 return;
10939         switch (handle->fate_action) {
10940         case MLX5_FLOW_FATE_QUEUE:
10941                 mlx5_hrxq_release(dev, handle->rix_hrxq);
10942                 break;
10943         case MLX5_FLOW_FATE_JUMP:
10944                 flow_dv_jump_tbl_resource_release(dev, handle);
10945                 break;
10946         case MLX5_FLOW_FATE_PORT_ID:
10947                 flow_dv_port_id_action_resource_release(dev,
10948                                 handle->rix_port_id_action);
10949                 break;
10950         default:
10951                 DRV_LOG(DEBUG, "Incorrect fate action:%d", handle->fate_action);
10952                 break;
10953         }
10954         handle->rix_fate = 0;
10955 }
10956
10957 void
10958 flow_dv_sample_remove_cb(struct mlx5_cache_list *list,
10959                          struct mlx5_cache_entry *entry)
10960 {
10961         struct rte_eth_dev *dev = list->ctx;
10962         struct mlx5_priv *priv = dev->data->dev_private;
10963         struct mlx5_flow_dv_sample_resource *cache_resource =
10964                         container_of(entry, typeof(*cache_resource), entry);
10965
10966         if (cache_resource->verbs_action)
10967                 claim_zero(mlx5_glue->destroy_flow_action
10968                                 (cache_resource->verbs_action));
10969         if (cache_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
10970                 if (cache_resource->default_miss)
10971                         claim_zero(mlx5_glue->destroy_flow_action
10972                           (cache_resource->default_miss));
10973         }
10974         if (cache_resource->normal_path_tbl)
10975                 flow_dv_tbl_resource_release(MLX5_SH(dev),
10976                         cache_resource->normal_path_tbl);
10977         flow_dv_sample_sub_actions_release(dev,
10978                                 &cache_resource->sample_idx);
10979         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
10980                         cache_resource->idx);
10981         DRV_LOG(DEBUG, "sample resource %p: removed",
10982                 (void *)cache_resource);
10983 }
10984
10985 /**
10986  * Release an sample resource.
10987  *
10988  * @param dev
10989  *   Pointer to Ethernet device.
10990  * @param handle
10991  *   Pointer to mlx5_flow_handle.
10992  *
10993  * @return
10994  *   1 while a reference on it exists, 0 when freed.
10995  */
10996 static int
10997 flow_dv_sample_resource_release(struct rte_eth_dev *dev,
10998                                      struct mlx5_flow_handle *handle)
10999 {
11000         struct mlx5_priv *priv = dev->data->dev_private;
11001         struct mlx5_flow_dv_sample_resource *cache_resource;
11002
11003         cache_resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
11004                          handle->dvh.rix_sample);
11005         if (!cache_resource)
11006                 return 0;
11007         MLX5_ASSERT(cache_resource->verbs_action);
11008         return mlx5_cache_unregister(&priv->sh->sample_action_list,
11009                                      &cache_resource->entry);
11010 }
11011
11012 void
11013 flow_dv_dest_array_remove_cb(struct mlx5_cache_list *list,
11014                              struct mlx5_cache_entry *entry)
11015 {
11016         struct rte_eth_dev *dev = list->ctx;
11017         struct mlx5_priv *priv = dev->data->dev_private;
11018         struct mlx5_flow_dv_dest_array_resource *cache_resource =
11019                         container_of(entry, typeof(*cache_resource), entry);
11020         uint32_t i = 0;
11021
11022         MLX5_ASSERT(cache_resource->action);
11023         if (cache_resource->action)
11024                 claim_zero(mlx5_glue->destroy_flow_action
11025                                         (cache_resource->action));
11026         for (; i < cache_resource->num_of_dest; i++)
11027                 flow_dv_sample_sub_actions_release(dev,
11028                                 &cache_resource->sample_idx[i]);
11029         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11030                         cache_resource->idx);
11031         DRV_LOG(DEBUG, "destination array resource %p: removed",
11032                 (void *)cache_resource);
11033 }
11034
11035 /**
11036  * Release an destination array resource.
11037  *
11038  * @param dev
11039  *   Pointer to Ethernet device.
11040  * @param handle
11041  *   Pointer to mlx5_flow_handle.
11042  *
11043  * @return
11044  *   1 while a reference on it exists, 0 when freed.
11045  */
11046 static int
11047 flow_dv_dest_array_resource_release(struct rte_eth_dev *dev,
11048                                     struct mlx5_flow_handle *handle)
11049 {
11050         struct mlx5_priv *priv = dev->data->dev_private;
11051         struct mlx5_flow_dv_dest_array_resource *cache;
11052
11053         cache = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11054                                handle->dvh.rix_dest_array);
11055         if (!cache)
11056                 return 0;
11057         MLX5_ASSERT(cache->action);
11058         return mlx5_cache_unregister(&priv->sh->dest_array_list,
11059                                      &cache->entry);
11060 }
11061
11062 /**
11063  * Remove the flow from the NIC but keeps it in memory.
11064  * Lock free, (mutex should be acquired by caller).
11065  *
11066  * @param[in] dev
11067  *   Pointer to Ethernet device.
11068  * @param[in, out] flow
11069  *   Pointer to flow structure.
11070  */
11071 static void
11072 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
11073 {
11074         struct mlx5_flow_handle *dh;
11075         uint32_t handle_idx;
11076         struct mlx5_priv *priv = dev->data->dev_private;
11077
11078         if (!flow)
11079                 return;
11080         handle_idx = flow->dev_handles;
11081         while (handle_idx) {
11082                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
11083                                     handle_idx);
11084                 if (!dh)
11085                         return;
11086                 if (dh->drv_flow) {
11087                         claim_zero(mlx5_flow_os_destroy_flow(dh->drv_flow));
11088                         dh->drv_flow = NULL;
11089                 }
11090                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE)
11091                         flow_dv_fate_resource_release(dev, dh);
11092                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
11093                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
11094                 handle_idx = dh->next.next;
11095         }
11096 }
11097
11098 /**
11099  * Remove the flow from the NIC and the memory.
11100  * Lock free, (mutex should be acquired by caller).
11101  *
11102  * @param[in] dev
11103  *   Pointer to the Ethernet device structure.
11104  * @param[in, out] flow
11105  *   Pointer to flow structure.
11106  */
11107 static void
11108 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
11109 {
11110         struct mlx5_flow_handle *dev_handle;
11111         struct mlx5_priv *priv = dev->data->dev_private;
11112
11113         if (!flow)
11114                 return;
11115         flow_dv_remove(dev, flow);
11116         if (flow->shared_rss) {
11117                 struct mlx5_shared_action_rss *shared_rss = mlx5_ipool_get
11118                                 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
11119                                                               flow->shared_rss);
11120
11121                 __atomic_sub_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
11122         }
11123         if (flow->counter) {
11124                 flow_dv_counter_free(dev, flow->counter);
11125                 flow->counter = 0;
11126         }
11127         if (flow->meter) {
11128                 struct mlx5_flow_meter *fm;
11129
11130                 fm = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MTR],
11131                                     flow->meter);
11132                 if (fm)
11133                         mlx5_flow_meter_detach(fm);
11134                 flow->meter = 0;
11135         }
11136         if (flow->age)
11137                 flow_dv_aso_age_release(dev, flow->age);
11138         while (flow->dev_handles) {
11139                 uint32_t tmp_idx = flow->dev_handles;
11140
11141                 dev_handle = mlx5_ipool_get(priv->sh->ipool
11142                                             [MLX5_IPOOL_MLX5_FLOW], tmp_idx);
11143                 if (!dev_handle)
11144                         return;
11145                 flow->dev_handles = dev_handle->next.next;
11146                 if (dev_handle->dvh.matcher)
11147                         flow_dv_matcher_release(dev, dev_handle);
11148                 if (dev_handle->dvh.rix_sample)
11149                         flow_dv_sample_resource_release(dev, dev_handle);
11150                 if (dev_handle->dvh.rix_dest_array)
11151                         flow_dv_dest_array_resource_release(dev, dev_handle);
11152                 if (dev_handle->dvh.rix_encap_decap)
11153                         flow_dv_encap_decap_resource_release(dev,
11154                                 dev_handle->dvh.rix_encap_decap);
11155                 if (dev_handle->dvh.modify_hdr)
11156                         flow_dv_modify_hdr_resource_release(dev, dev_handle);
11157                 if (dev_handle->dvh.rix_push_vlan)
11158                         flow_dv_push_vlan_action_resource_release(dev,
11159                                                                   dev_handle);
11160                 if (dev_handle->dvh.rix_tag)
11161                         flow_dv_tag_release(dev,
11162                                             dev_handle->dvh.rix_tag);
11163                 flow_dv_fate_resource_release(dev, dev_handle);
11164                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
11165                            tmp_idx);
11166         }
11167 }
11168
11169 /**
11170  * Release array of hash RX queue objects.
11171  * Helper function.
11172  *
11173  * @param[in] dev
11174  *   Pointer to the Ethernet device structure.
11175  * @param[in, out] hrxqs
11176  *   Array of hash RX queue objects.
11177  *
11178  * @return
11179  *   Total number of references to hash RX queue objects in *hrxqs* array
11180  *   after this operation.
11181  */
11182 static int
11183 __flow_dv_hrxqs_release(struct rte_eth_dev *dev,
11184                         uint32_t (*hrxqs)[MLX5_RSS_HASH_FIELDS_LEN])
11185 {
11186         size_t i;
11187         int remaining = 0;
11188
11189         for (i = 0; i < RTE_DIM(*hrxqs); i++) {
11190                 int ret = mlx5_hrxq_release(dev, (*hrxqs)[i]);
11191
11192                 if (!ret)
11193                         (*hrxqs)[i] = 0;
11194                 remaining += ret;
11195         }
11196         return remaining;
11197 }
11198
11199 /**
11200  * Release all hash RX queue objects representing shared RSS action.
11201  *
11202  * @param[in] dev
11203  *   Pointer to the Ethernet device structure.
11204  * @param[in, out] action
11205  *   Shared RSS action to remove hash RX queue objects from.
11206  *
11207  * @return
11208  *   Total number of references to hash RX queue objects stored in *action*
11209  *   after this operation.
11210  *   Expected to be 0 if no external references held.
11211  */
11212 static int
11213 __flow_dv_action_rss_hrxqs_release(struct rte_eth_dev *dev,
11214                                  struct mlx5_shared_action_rss *action)
11215 {
11216         return __flow_dv_hrxqs_release(dev, &action->hrxq) +
11217                 __flow_dv_hrxqs_release(dev, &action->hrxq_tunnel);
11218 }
11219
11220 /**
11221  * Setup shared RSS action.
11222  * Prepare set of hash RX queue objects sufficient to handle all valid
11223  * hash_fields combinations (see enum ibv_rx_hash_fields).
11224  *
11225  * @param[in] dev
11226  *   Pointer to the Ethernet device structure.
11227  * @param[in, out] action
11228  *   Partially initialized shared RSS action.
11229  * @param[out] error
11230  *   Perform verbose error reporting if not NULL. Initialized in case of
11231  *   error only.
11232  *
11233  * @return
11234  *   0 on success, otherwise negative errno value.
11235  */
11236 static int
11237 __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
11238                         struct mlx5_shared_action_rss *action,
11239                         struct rte_flow_error *error)
11240 {
11241         struct mlx5_flow_rss_desc rss_desc = { 0 };
11242         size_t i;
11243         int err;
11244
11245         memcpy(rss_desc.key, action->origin.key, MLX5_RSS_HASH_KEY_LEN);
11246         rss_desc.key_len = MLX5_RSS_HASH_KEY_LEN;
11247         rss_desc.const_q = action->origin.queue;
11248         rss_desc.queue_num = action->origin.queue_num;
11249         rss_desc.standalone = true;
11250         for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
11251                 uint32_t hrxq_idx;
11252                 uint64_t hash_fields = mlx5_rss_hash_fields[i];
11253                 int tunnel;
11254
11255                 for (tunnel = 0; tunnel < 2; tunnel++) {
11256                         rss_desc.tunnel = tunnel;
11257                         rss_desc.hash_fields = hash_fields;
11258                         hrxq_idx = mlx5_hrxq_get(dev, &rss_desc);
11259                         if (!hrxq_idx) {
11260                                 rte_flow_error_set
11261                                         (error, rte_errno,
11262                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
11263                                          "cannot get hash queue");
11264                                 goto error_hrxq_new;
11265                         }
11266                         err = __flow_dv_action_rss_hrxq_set
11267                                 (action, hash_fields, tunnel, hrxq_idx);
11268                         MLX5_ASSERT(!err);
11269                 }
11270         }
11271         return 0;
11272 error_hrxq_new:
11273         err = rte_errno;
11274         __flow_dv_action_rss_hrxqs_release(dev, action);
11275         rte_errno = err;
11276         return -rte_errno;
11277 }
11278
11279 /**
11280  * Create shared RSS action.
11281  *
11282  * @param[in] dev
11283  *   Pointer to the Ethernet device structure.
11284  * @param[in] conf
11285  *   Shared action configuration.
11286  * @param[in] rss
11287  *   RSS action specification used to create shared action.
11288  * @param[out] error
11289  *   Perform verbose error reporting if not NULL. Initialized in case of
11290  *   error only.
11291  *
11292  * @return
11293  *   A valid shared action ID in case of success, 0 otherwise and
11294  *   rte_errno is set.
11295  */
11296 static uint32_t
11297 __flow_dv_action_rss_create(struct rte_eth_dev *dev,
11298                             const struct rte_flow_shared_action_conf *conf,
11299                             const struct rte_flow_action_rss *rss,
11300                             struct rte_flow_error *error)
11301 {
11302         struct mlx5_priv *priv = dev->data->dev_private;
11303         struct mlx5_shared_action_rss *shared_action = NULL;
11304         void *queue = NULL;
11305         struct rte_flow_action_rss *origin;
11306         const uint8_t *rss_key;
11307         uint32_t queue_size = rss->queue_num * sizeof(uint16_t);
11308         uint32_t idx;
11309
11310         RTE_SET_USED(conf);
11311         queue = mlx5_malloc(0, RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
11312                             0, SOCKET_ID_ANY);
11313         shared_action = mlx5_ipool_zmalloc
11314                          (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], &idx);
11315         if (!shared_action || !queue) {
11316                 rte_flow_error_set(error, ENOMEM,
11317                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
11318                                    "cannot allocate resource memory");
11319                 goto error_rss_init;
11320         }
11321         if (idx > (1u << MLX5_SHARED_ACTION_TYPE_OFFSET)) {
11322                 rte_flow_error_set(error, E2BIG,
11323                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
11324                                    "rss action number out of range");
11325                 goto error_rss_init;
11326         }
11327         shared_action->queue = queue;
11328         origin = &shared_action->origin;
11329         origin->func = rss->func;
11330         origin->level = rss->level;
11331         /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
11332         origin->types = !rss->types ? ETH_RSS_IP : rss->types;
11333         /* NULL RSS key indicates default RSS key. */
11334         rss_key = !rss->key ? rss_hash_default_key : rss->key;
11335         memcpy(shared_action->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
11336         origin->key = &shared_action->key[0];
11337         origin->key_len = MLX5_RSS_HASH_KEY_LEN;
11338         memcpy(shared_action->queue, rss->queue, queue_size);
11339         origin->queue = shared_action->queue;
11340         origin->queue_num = rss->queue_num;
11341         if (__flow_dv_action_rss_setup(dev, shared_action, error))
11342                 goto error_rss_init;
11343         __atomic_add_fetch(&shared_action->refcnt, 1, __ATOMIC_RELAXED);
11344         rte_spinlock_lock(&priv->shared_act_sl);
11345         ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
11346                      &priv->rss_shared_actions, idx, shared_action, next);
11347         rte_spinlock_unlock(&priv->shared_act_sl);
11348         return idx;
11349 error_rss_init:
11350         if (shared_action)
11351                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
11352                                 idx);
11353         if (queue)
11354                 mlx5_free(queue);
11355         return 0;
11356 }
11357
11358 /**
11359  * Destroy the shared RSS action.
11360  * Release related hash RX queue objects.
11361  *
11362  * @param[in] dev
11363  *   Pointer to the Ethernet device structure.
11364  * @param[in] idx
11365  *   The shared RSS action object ID to be removed.
11366  * @param[out] error
11367  *   Perform verbose error reporting if not NULL. Initialized in case of
11368  *   error only.
11369  *
11370  * @return
11371  *   0 on success, otherwise negative errno value.
11372  */
11373 static int
11374 __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
11375                              struct rte_flow_error *error)
11376 {
11377         struct mlx5_priv *priv = dev->data->dev_private;
11378         struct mlx5_shared_action_rss *shared_rss =
11379             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
11380         uint32_t old_refcnt = 1;
11381         int remaining;
11382
11383         if (!shared_rss)
11384                 return rte_flow_error_set(error, EINVAL,
11385                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
11386                                           "invalid shared action");
11387         remaining = __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
11388         if (remaining)
11389                 return rte_flow_error_set(error, ETOOMANYREFS,
11390                                           RTE_FLOW_ERROR_TYPE_ACTION,
11391                                           NULL,
11392                                           "shared rss hrxq has references");
11393         if (!__atomic_compare_exchange_n(&shared_rss->refcnt, &old_refcnt,
11394                                          0, 0, __ATOMIC_ACQUIRE,
11395                                          __ATOMIC_RELAXED))
11396                 return rte_flow_error_set(error, ETOOMANYREFS,
11397                                           RTE_FLOW_ERROR_TYPE_ACTION,
11398                                           NULL,
11399                                           "shared rss has references");
11400         rte_free(shared_rss->queue);
11401         rte_spinlock_lock(&priv->shared_act_sl);
11402         ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
11403                      &priv->rss_shared_actions, idx, shared_rss, next);
11404         rte_spinlock_unlock(&priv->shared_act_sl);
11405         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
11406                         idx);
11407         return 0;
11408 }
11409
11410 /**
11411  * Create shared action, lock free,
11412  * (mutex should be acquired by caller).
11413  * Dispatcher for action type specific call.
11414  *
11415  * @param[in] dev
11416  *   Pointer to the Ethernet device structure.
11417  * @param[in] conf
11418  *   Shared action configuration.
11419  * @param[in] action
11420  *   Action specification used to create shared action.
11421  * @param[out] error
11422  *   Perform verbose error reporting if not NULL. Initialized in case of
11423  *   error only.
11424  *
11425  * @return
11426  *   A valid shared action handle in case of success, NULL otherwise and
11427  *   rte_errno is set.
11428  */
11429 static struct rte_flow_shared_action *
11430 flow_dv_action_create(struct rte_eth_dev *dev,
11431                       const struct rte_flow_shared_action_conf *conf,
11432                       const struct rte_flow_action *action,
11433                       struct rte_flow_error *err)
11434 {
11435         uint32_t idx = 0;
11436         uint32_t ret = 0;
11437
11438         switch (action->type) {
11439         case RTE_FLOW_ACTION_TYPE_RSS:
11440                 ret = __flow_dv_action_rss_create(dev, conf, action->conf, err);
11441                 idx = (MLX5_SHARED_ACTION_TYPE_RSS <<
11442                        MLX5_SHARED_ACTION_TYPE_OFFSET) | ret;
11443                 break;
11444         default:
11445                 rte_flow_error_set(err, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
11446                                    NULL, "action type not supported");
11447                 break;
11448         }
11449         return ret ? (struct rte_flow_shared_action *)(uintptr_t)idx : NULL;
11450 }
11451
11452 /**
11453  * Destroy the shared action.
11454  * Release action related resources on the NIC and the memory.
11455  * Lock free, (mutex should be acquired by caller).
11456  * Dispatcher for action type specific call.
11457  *
11458  * @param[in] dev
11459  *   Pointer to the Ethernet device structure.
11460  * @param[in] action
11461  *   The shared action object to be removed.
11462  * @param[out] error
11463  *   Perform verbose error reporting if not NULL. Initialized in case of
11464  *   error only.
11465  *
11466  * @return
11467  *   0 on success, otherwise negative errno value.
11468  */
11469 static int
11470 flow_dv_action_destroy(struct rte_eth_dev *dev,
11471                        struct rte_flow_shared_action *action,
11472                        struct rte_flow_error *error)
11473 {
11474         uint32_t act_idx = (uint32_t)(uintptr_t)action;
11475         uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
11476         uint32_t idx = act_idx & ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) - 1);
11477         int ret;
11478
11479         switch (type) {
11480         case MLX5_SHARED_ACTION_TYPE_RSS:
11481                 ret = __flow_dv_action_rss_release(dev, idx, error);
11482                 break;
11483         default:
11484                 return rte_flow_error_set(error, ENOTSUP,
11485                                           RTE_FLOW_ERROR_TYPE_ACTION,
11486                                           NULL,
11487                                           "action type not supported");
11488         }
11489         if (ret)
11490                 return ret;
11491         return 0;
11492 }
11493
11494 /**
11495  * Updates in place shared RSS action configuration.
11496  *
11497  * @param[in] dev
11498  *   Pointer to the Ethernet device structure.
11499  * @param[in] idx
11500  *   The shared RSS action object ID to be updated.
11501  * @param[in] action_conf
11502  *   RSS action specification used to modify *shared_rss*.
11503  * @param[out] error
11504  *   Perform verbose error reporting if not NULL. Initialized in case of
11505  *   error only.
11506  *
11507  * @return
11508  *   0 on success, otherwise negative errno value.
11509  * @note: currently only support update of RSS queues.
11510  */
11511 static int
11512 __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
11513                             const struct rte_flow_action_rss *action_conf,
11514                             struct rte_flow_error *error)
11515 {
11516         struct mlx5_priv *priv = dev->data->dev_private;
11517         struct mlx5_shared_action_rss *shared_rss =
11518             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
11519         size_t i;
11520         int ret;
11521         void *queue = NULL;
11522         const uint8_t *rss_key;
11523         uint32_t rss_key_len;
11524         uint32_t queue_size = action_conf->queue_num * sizeof(uint16_t);
11525
11526         if (!shared_rss)
11527                 return rte_flow_error_set(error, EINVAL,
11528                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
11529                                           "invalid shared action to update");
11530         queue = mlx5_malloc(MLX5_MEM_ZERO,
11531                             RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
11532                             0, SOCKET_ID_ANY);
11533         if (!queue)
11534                 return rte_flow_error_set(error, ENOMEM,
11535                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11536                                           NULL,
11537                                           "cannot allocate resource memory");
11538         if (action_conf->key) {
11539                 rss_key = action_conf->key;
11540                 rss_key_len = action_conf->key_len;
11541         } else {
11542                 rss_key = rss_hash_default_key;
11543                 rss_key_len = MLX5_RSS_HASH_KEY_LEN;
11544         }
11545         for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
11546                 uint32_t hrxq_idx;
11547                 uint64_t hash_fields = mlx5_rss_hash_fields[i];
11548                 int tunnel;
11549
11550                 for (tunnel = 0; tunnel < 2; tunnel++) {
11551                         hrxq_idx = __flow_dv_action_rss_hrxq_lookup
11552                                         (dev, idx, hash_fields, tunnel);
11553                         MLX5_ASSERT(hrxq_idx);
11554                         ret = mlx5_hrxq_modify
11555                                 (dev, hrxq_idx,
11556                                  rss_key, rss_key_len,
11557                                  hash_fields,
11558                                  action_conf->queue, action_conf->queue_num);
11559                         if (ret) {
11560                                 mlx5_free(queue);
11561                                 return rte_flow_error_set
11562                                         (error, rte_errno,
11563                                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
11564                                          "cannot update hash queue");
11565                         }
11566                 }
11567         }
11568         mlx5_free(shared_rss->queue);
11569         shared_rss->queue = queue;
11570         memcpy(shared_rss->queue, action_conf->queue, queue_size);
11571         shared_rss->origin.queue = shared_rss->queue;
11572         shared_rss->origin.queue_num = action_conf->queue_num;
11573         return 0;
11574 }
11575
11576 /**
11577  * Updates in place shared action configuration, lock free,
11578  * (mutex should be acquired by caller).
11579  *
11580  * @param[in] dev
11581  *   Pointer to the Ethernet device structure.
11582  * @param[in] action
11583  *   The shared action object to be updated.
11584  * @param[in] action_conf
11585  *   Action specification used to modify *action*.
11586  *   *action_conf* should be of type correlating with type of the *action*,
11587  *   otherwise considered as invalid.
11588  * @param[out] error
11589  *   Perform verbose error reporting if not NULL. Initialized in case of
11590  *   error only.
11591  *
11592  * @return
11593  *   0 on success, otherwise negative errno value.
11594  */
11595 static int
11596 flow_dv_action_update(struct rte_eth_dev *dev,
11597                         struct rte_flow_shared_action *action,
11598                         const void *action_conf,
11599                         struct rte_flow_error *err)
11600 {
11601         uint32_t act_idx = (uint32_t)(uintptr_t)action;
11602         uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
11603         uint32_t idx = act_idx & ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) - 1);
11604
11605         switch (type) {
11606         case MLX5_SHARED_ACTION_TYPE_RSS:
11607                 return __flow_dv_action_rss_update(dev, idx, action_conf, err);
11608         default:
11609                 return rte_flow_error_set(err, ENOTSUP,
11610                                           RTE_FLOW_ERROR_TYPE_ACTION,
11611                                           NULL,
11612                                           "action type not supported");
11613         }
11614 }
11615 /**
11616  * Query a dv flow  rule for its statistics via devx.
11617  *
11618  * @param[in] dev
11619  *   Pointer to Ethernet device.
11620  * @param[in] flow
11621  *   Pointer to the sub flow.
11622  * @param[out] data
11623  *   data retrieved by the query.
11624  * @param[out] error
11625  *   Perform verbose error reporting if not NULL.
11626  *
11627  * @return
11628  *   0 on success, a negative errno value otherwise and rte_errno is set.
11629  */
11630 static int
11631 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
11632                     void *data, struct rte_flow_error *error)
11633 {
11634         struct mlx5_priv *priv = dev->data->dev_private;
11635         struct rte_flow_query_count *qc = data;
11636
11637         if (!priv->config.devx)
11638                 return rte_flow_error_set(error, ENOTSUP,
11639                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11640                                           NULL,
11641                                           "counters are not supported");
11642         if (flow->counter) {
11643                 uint64_t pkts, bytes;
11644                 struct mlx5_flow_counter *cnt;
11645
11646                 cnt = flow_dv_counter_get_by_idx(dev, flow->counter,
11647                                                  NULL);
11648                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
11649                                                &bytes);
11650
11651                 if (err)
11652                         return rte_flow_error_set(error, -err,
11653                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11654                                         NULL, "cannot read counters");
11655                 qc->hits_set = 1;
11656                 qc->bytes_set = 1;
11657                 qc->hits = pkts - cnt->hits;
11658                 qc->bytes = bytes - cnt->bytes;
11659                 if (qc->reset) {
11660                         cnt->hits = pkts;
11661                         cnt->bytes = bytes;
11662                 }
11663                 return 0;
11664         }
11665         return rte_flow_error_set(error, EINVAL,
11666                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11667                                   NULL,
11668                                   "counters are not available");
11669 }
11670
11671 /**
11672  * Query a flow rule AGE action for aging information.
11673  *
11674  * @param[in] dev
11675  *   Pointer to Ethernet device.
11676  * @param[in] flow
11677  *   Pointer to the sub flow.
11678  * @param[out] data
11679  *   data retrieved by the query.
11680  * @param[out] error
11681  *   Perform verbose error reporting if not NULL.
11682  *
11683  * @return
11684  *   0 on success, a negative errno value otherwise and rte_errno is set.
11685  */
11686 static int
11687 flow_dv_query_age(struct rte_eth_dev *dev, struct rte_flow *flow,
11688                   void *data, struct rte_flow_error *error)
11689 {
11690         struct rte_flow_query_age *resp = data;
11691         struct mlx5_age_param *age_param;
11692
11693         if (flow->age) {
11694                 struct mlx5_aso_age_action *act =
11695                                      flow_dv_aso_age_get_by_idx(dev, flow->age);
11696
11697                 age_param = &act->age_params;
11698         } else if (flow->counter) {
11699                 age_param = flow_dv_counter_idx_get_age(dev, flow->counter);
11700
11701                 if (!age_param || !age_param->timeout)
11702                         return rte_flow_error_set
11703                                         (error, EINVAL,
11704                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11705                                          NULL, "cannot read age data");
11706         } else {
11707                 return rte_flow_error_set(error, EINVAL,
11708                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11709                                           NULL, "age data not available");
11710         }
11711         resp->aged = __atomic_load_n(&age_param->state, __ATOMIC_RELAXED) ==
11712                                      AGE_TMOUT ? 1 : 0;
11713         resp->sec_since_last_hit_valid = !resp->aged;
11714         if (resp->sec_since_last_hit_valid)
11715                 resp->sec_since_last_hit = __atomic_load_n
11716                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
11717         return 0;
11718 }
11719
11720 /**
11721  * Query a flow.
11722  *
11723  * @see rte_flow_query()
11724  * @see rte_flow_ops
11725  */
11726 static int
11727 flow_dv_query(struct rte_eth_dev *dev,
11728               struct rte_flow *flow __rte_unused,
11729               const struct rte_flow_action *actions __rte_unused,
11730               void *data __rte_unused,
11731               struct rte_flow_error *error __rte_unused)
11732 {
11733         int ret = -EINVAL;
11734
11735         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
11736                 switch (actions->type) {
11737                 case RTE_FLOW_ACTION_TYPE_VOID:
11738                         break;
11739                 case RTE_FLOW_ACTION_TYPE_COUNT:
11740                         ret = flow_dv_query_count(dev, flow, data, error);
11741                         break;
11742                 case RTE_FLOW_ACTION_TYPE_AGE:
11743                         ret = flow_dv_query_age(dev, flow, data, error);
11744                         break;
11745                 default:
11746                         return rte_flow_error_set(error, ENOTSUP,
11747                                                   RTE_FLOW_ERROR_TYPE_ACTION,
11748                                                   actions,
11749                                                   "action not supported");
11750                 }
11751         }
11752         return ret;
11753 }
11754
11755 /**
11756  * Destroy the meter table set.
11757  * Lock free, (mutex should be acquired by caller).
11758  *
11759  * @param[in] dev
11760  *   Pointer to Ethernet device.
11761  * @param[in] tbl
11762  *   Pointer to the meter table set.
11763  *
11764  * @return
11765  *   Always 0.
11766  */
11767 static int
11768 flow_dv_destroy_mtr_tbl(struct rte_eth_dev *dev,
11769                         struct mlx5_meter_domains_infos *tbl)
11770 {
11771         struct mlx5_priv *priv = dev->data->dev_private;
11772         struct mlx5_meter_domains_infos *mtd =
11773                                 (struct mlx5_meter_domains_infos *)tbl;
11774
11775         if (!mtd || !priv->config.dv_flow_en)
11776                 return 0;
11777         if (mtd->ingress.policer_rules[RTE_MTR_DROPPED])
11778                 claim_zero(mlx5_flow_os_destroy_flow
11779                            (mtd->ingress.policer_rules[RTE_MTR_DROPPED]));
11780         if (mtd->egress.policer_rules[RTE_MTR_DROPPED])
11781                 claim_zero(mlx5_flow_os_destroy_flow
11782                            (mtd->egress.policer_rules[RTE_MTR_DROPPED]));
11783         if (mtd->transfer.policer_rules[RTE_MTR_DROPPED])
11784                 claim_zero(mlx5_flow_os_destroy_flow
11785                            (mtd->transfer.policer_rules[RTE_MTR_DROPPED]));
11786         if (mtd->egress.color_matcher)
11787                 claim_zero(mlx5_flow_os_destroy_flow_matcher
11788                            (mtd->egress.color_matcher));
11789         if (mtd->egress.any_matcher)
11790                 claim_zero(mlx5_flow_os_destroy_flow_matcher
11791                            (mtd->egress.any_matcher));
11792         if (mtd->egress.tbl)
11793                 flow_dv_tbl_resource_release(MLX5_SH(dev), mtd->egress.tbl);
11794         if (mtd->egress.sfx_tbl)
11795                 flow_dv_tbl_resource_release(MLX5_SH(dev), mtd->egress.sfx_tbl);
11796         if (mtd->ingress.color_matcher)
11797                 claim_zero(mlx5_flow_os_destroy_flow_matcher
11798                            (mtd->ingress.color_matcher));
11799         if (mtd->ingress.any_matcher)
11800                 claim_zero(mlx5_flow_os_destroy_flow_matcher
11801                            (mtd->ingress.any_matcher));
11802         if (mtd->ingress.tbl)
11803                 flow_dv_tbl_resource_release(MLX5_SH(dev), mtd->ingress.tbl);
11804         if (mtd->ingress.sfx_tbl)
11805                 flow_dv_tbl_resource_release(MLX5_SH(dev),
11806                                              mtd->ingress.sfx_tbl);
11807         if (mtd->transfer.color_matcher)
11808                 claim_zero(mlx5_flow_os_destroy_flow_matcher
11809                            (mtd->transfer.color_matcher));
11810         if (mtd->transfer.any_matcher)
11811                 claim_zero(mlx5_flow_os_destroy_flow_matcher
11812                            (mtd->transfer.any_matcher));
11813         if (mtd->transfer.tbl)
11814                 flow_dv_tbl_resource_release(MLX5_SH(dev), mtd->transfer.tbl);
11815         if (mtd->transfer.sfx_tbl)
11816                 flow_dv_tbl_resource_release(MLX5_SH(dev),
11817                                              mtd->transfer.sfx_tbl);
11818         if (mtd->drop_actn)
11819                 claim_zero(mlx5_flow_os_destroy_flow_action(mtd->drop_actn));
11820         mlx5_free(mtd);
11821         return 0;
11822 }
11823
11824 /* Number of meter flow actions, count and jump or count and drop. */
11825 #define METER_ACTIONS 2
11826
11827 /**
11828  * Create specify domain meter table and suffix table.
11829  *
11830  * @param[in] dev
11831  *   Pointer to Ethernet device.
11832  * @param[in,out] mtb
11833  *   Pointer to DV meter table set.
11834  * @param[in] egress
11835  *   Table attribute.
11836  * @param[in] transfer
11837  *   Table attribute.
11838  * @param[in] color_reg_c_idx
11839  *   Reg C index for color match.
11840  *
11841  * @return
11842  *   0 on success, -1 otherwise and rte_errno is set.
11843  */
11844 static int
11845 flow_dv_prepare_mtr_tables(struct rte_eth_dev *dev,
11846                            struct mlx5_meter_domains_infos *mtb,
11847                            uint8_t egress, uint8_t transfer,
11848                            uint32_t color_reg_c_idx)
11849 {
11850         struct mlx5_priv *priv = dev->data->dev_private;
11851         struct mlx5_dev_ctx_shared *sh = priv->sh;
11852         struct mlx5_flow_dv_match_params mask = {
11853                 .size = sizeof(mask.buf),
11854         };
11855         struct mlx5_flow_dv_match_params value = {
11856                 .size = sizeof(value.buf),
11857         };
11858         struct mlx5dv_flow_matcher_attr dv_attr = {
11859                 .type = IBV_FLOW_ATTR_NORMAL,
11860                 .priority = 0,
11861                 .match_criteria_enable = 0,
11862                 .match_mask = (void *)&mask,
11863         };
11864         void *actions[METER_ACTIONS];
11865         struct mlx5_meter_domain_info *dtb;
11866         struct rte_flow_error error;
11867         int i = 0;
11868         int ret;
11869
11870         if (transfer)
11871                 dtb = &mtb->transfer;
11872         else if (egress)
11873                 dtb = &mtb->egress;
11874         else
11875                 dtb = &mtb->ingress;
11876         /* Create the meter table with METER level. */
11877         dtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,
11878                                             egress, transfer, false, NULL, 0,
11879                                             0, &error);
11880         if (!dtb->tbl) {
11881                 DRV_LOG(ERR, "Failed to create meter policer table.");
11882                 return -1;
11883         }
11884         /* Create the meter suffix table with SUFFIX level. */
11885         dtb->sfx_tbl = flow_dv_tbl_resource_get(dev,
11886                                             MLX5_FLOW_TABLE_LEVEL_SUFFIX,
11887                                             egress, transfer, false, NULL, 0,
11888                                             0, &error);
11889         if (!dtb->sfx_tbl) {
11890                 DRV_LOG(ERR, "Failed to create meter suffix table.");
11891                 return -1;
11892         }
11893         /* Create matchers, Any and Color. */
11894         dv_attr.priority = 3;
11895         dv_attr.match_criteria_enable = 0;
11896         ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, dtb->tbl->obj,
11897                                                &dtb->any_matcher);
11898         if (ret) {
11899                 DRV_LOG(ERR, "Failed to create meter"
11900                              " policer default matcher.");
11901                 goto error_exit;
11902         }
11903         dv_attr.priority = 0;
11904         dv_attr.match_criteria_enable =
11905                                 1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
11906         flow_dv_match_meta_reg(mask.buf, value.buf, color_reg_c_idx,
11907                                rte_col_2_mlx5_col(RTE_COLORS), UINT8_MAX);
11908         ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, dtb->tbl->obj,
11909                                                &dtb->color_matcher);
11910         if (ret) {
11911                 DRV_LOG(ERR, "Failed to create meter policer color matcher.");
11912                 goto error_exit;
11913         }
11914         if (mtb->count_actns[RTE_MTR_DROPPED])
11915                 actions[i++] = mtb->count_actns[RTE_MTR_DROPPED];
11916         actions[i++] = mtb->drop_actn;
11917         /* Default rule: lowest priority, match any, actions: drop. */
11918         ret = mlx5_flow_os_create_flow(dtb->any_matcher, (void *)&value, i,
11919                                        actions,
11920                                        &dtb->policer_rules[RTE_MTR_DROPPED]);
11921         if (ret) {
11922                 DRV_LOG(ERR, "Failed to create meter policer drop rule.");
11923                 goto error_exit;
11924         }
11925         return 0;
11926 error_exit:
11927         return -1;
11928 }
11929
11930 /**
11931  * Create the needed meter and suffix tables.
11932  * Lock free, (mutex should be acquired by caller).
11933  *
11934  * @param[in] dev
11935  *   Pointer to Ethernet device.
11936  * @param[in] fm
11937  *   Pointer to the flow meter.
11938  *
11939  * @return
11940  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
11941  */
11942 static struct mlx5_meter_domains_infos *
11943 flow_dv_create_mtr_tbl(struct rte_eth_dev *dev,
11944                        const struct mlx5_flow_meter *fm)
11945 {
11946         struct mlx5_priv *priv = dev->data->dev_private;
11947         struct mlx5_meter_domains_infos *mtb;
11948         int ret;
11949         int i;
11950
11951         if (!priv->mtr_en) {
11952                 rte_errno = ENOTSUP;
11953                 return NULL;
11954         }
11955         mtb = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*mtb), 0, SOCKET_ID_ANY);
11956         if (!mtb) {
11957                 DRV_LOG(ERR, "Failed to allocate memory for meter.");
11958                 return NULL;
11959         }
11960         /* Create meter count actions */
11961         for (i = 0; i <= RTE_MTR_DROPPED; i++) {
11962                 struct mlx5_flow_counter *cnt;
11963                 if (!fm->policer_stats.cnt[i])
11964                         continue;
11965                 cnt = flow_dv_counter_get_by_idx(dev,
11966                       fm->policer_stats.cnt[i], NULL);
11967                 mtb->count_actns[i] = cnt->action;
11968         }
11969         /* Create drop action. */
11970         ret = mlx5_flow_os_create_flow_action_drop(&mtb->drop_actn);
11971         if (ret) {
11972                 DRV_LOG(ERR, "Failed to create drop action.");
11973                 goto error_exit;
11974         }
11975         /* Egress meter table. */
11976         ret = flow_dv_prepare_mtr_tables(dev, mtb, 1, 0, priv->mtr_color_reg);
11977         if (ret) {
11978                 DRV_LOG(ERR, "Failed to prepare egress meter table.");
11979                 goto error_exit;
11980         }
11981         /* Ingress meter table. */
11982         ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 0, priv->mtr_color_reg);
11983         if (ret) {
11984                 DRV_LOG(ERR, "Failed to prepare ingress meter table.");
11985                 goto error_exit;
11986         }
11987         /* FDB meter table. */
11988         if (priv->config.dv_esw_en) {
11989                 ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 1,
11990                                                  priv->mtr_color_reg);
11991                 if (ret) {
11992                         DRV_LOG(ERR, "Failed to prepare fdb meter table.");
11993                         goto error_exit;
11994                 }
11995         }
11996         return mtb;
11997 error_exit:
11998         flow_dv_destroy_mtr_tbl(dev, mtb);
11999         return NULL;
12000 }
12001
12002 /**
12003  * Destroy domain policer rule.
12004  *
12005  * @param[in] dt
12006  *   Pointer to domain table.
12007  */
12008 static void
12009 flow_dv_destroy_domain_policer_rule(struct mlx5_meter_domain_info *dt)
12010 {
12011         int i;
12012
12013         for (i = 0; i < RTE_MTR_DROPPED; i++) {
12014                 if (dt->policer_rules[i]) {
12015                         claim_zero(mlx5_flow_os_destroy_flow
12016                                    (dt->policer_rules[i]));
12017                         dt->policer_rules[i] = NULL;
12018                 }
12019         }
12020         if (dt->jump_actn) {
12021                 claim_zero(mlx5_flow_os_destroy_flow_action(dt->jump_actn));
12022                 dt->jump_actn = NULL;
12023         }
12024 }
12025
12026 /**
12027  * Destroy policer rules.
12028  *
12029  * @param[in] dev
12030  *   Pointer to Ethernet device.
12031  * @param[in] fm
12032  *   Pointer to flow meter structure.
12033  * @param[in] attr
12034  *   Pointer to flow attributes.
12035  *
12036  * @return
12037  *   Always 0.
12038  */
12039 static int
12040 flow_dv_destroy_policer_rules(struct rte_eth_dev *dev __rte_unused,
12041                               const struct mlx5_flow_meter *fm,
12042                               const struct rte_flow_attr *attr)
12043 {
12044         struct mlx5_meter_domains_infos *mtb = fm ? fm->mfts : NULL;
12045
12046         if (!mtb)
12047                 return 0;
12048         if (attr->egress)
12049                 flow_dv_destroy_domain_policer_rule(&mtb->egress);
12050         if (attr->ingress)
12051                 flow_dv_destroy_domain_policer_rule(&mtb->ingress);
12052         if (attr->transfer)
12053                 flow_dv_destroy_domain_policer_rule(&mtb->transfer);
12054         return 0;
12055 }
12056
12057 /**
12058  * Create specify domain meter policer rule.
12059  *
12060  * @param[in] fm
12061  *   Pointer to flow meter structure.
12062  * @param[in] mtb
12063  *   Pointer to DV meter table set.
12064  * @param[in] mtr_reg_c
12065  *   Color match REG_C.
12066  *
12067  * @return
12068  *   0 on success, -1 otherwise.
12069  */
12070 static int
12071 flow_dv_create_policer_forward_rule(struct mlx5_flow_meter *fm,
12072                                     struct mlx5_meter_domain_info *dtb,
12073                                     uint8_t mtr_reg_c)
12074 {
12075         struct mlx5_flow_dv_match_params matcher = {
12076                 .size = sizeof(matcher.buf),
12077         };
12078         struct mlx5_flow_dv_match_params value = {
12079                 .size = sizeof(value.buf),
12080         };
12081         struct mlx5_meter_domains_infos *mtb = fm->mfts;
12082         void *actions[METER_ACTIONS];
12083         int i;
12084         int ret = 0;
12085
12086         /* Create jump action. */
12087         if (!dtb->jump_actn)
12088                 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
12089                                 (dtb->sfx_tbl->obj, &dtb->jump_actn);
12090         if (ret) {
12091                 DRV_LOG(ERR, "Failed to create policer jump action.");
12092                 goto error;
12093         }
12094         for (i = 0; i < RTE_MTR_DROPPED; i++) {
12095                 int j = 0;
12096
12097                 flow_dv_match_meta_reg(matcher.buf, value.buf, mtr_reg_c,
12098                                        rte_col_2_mlx5_col(i), UINT8_MAX);
12099                 if (mtb->count_actns[i])
12100                         actions[j++] = mtb->count_actns[i];
12101                 if (fm->action[i] == MTR_POLICER_ACTION_DROP)
12102                         actions[j++] = mtb->drop_actn;
12103                 else
12104                         actions[j++] = dtb->jump_actn;
12105                 ret = mlx5_flow_os_create_flow(dtb->color_matcher,
12106                                                (void *)&value, j, actions,
12107                                                &dtb->policer_rules[i]);
12108                 if (ret) {
12109                         DRV_LOG(ERR, "Failed to create policer rule.");
12110                         goto error;
12111                 }
12112         }
12113         return 0;
12114 error:
12115         rte_errno = errno;
12116         return -1;
12117 }
12118
12119 /**
12120  * Create policer rules.
12121  *
12122  * @param[in] dev
12123  *   Pointer to Ethernet device.
12124  * @param[in] fm
12125  *   Pointer to flow meter structure.
12126  * @param[in] attr
12127  *   Pointer to flow attributes.
12128  *
12129  * @return
12130  *   0 on success, -1 otherwise.
12131  */
12132 static int
12133 flow_dv_create_policer_rules(struct rte_eth_dev *dev,
12134                              struct mlx5_flow_meter *fm,
12135                              const struct rte_flow_attr *attr)
12136 {
12137         struct mlx5_priv *priv = dev->data->dev_private;
12138         struct mlx5_meter_domains_infos *mtb = fm->mfts;
12139         int ret;
12140
12141         if (attr->egress) {
12142                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->egress,
12143                                                 priv->mtr_color_reg);
12144                 if (ret) {
12145                         DRV_LOG(ERR, "Failed to create egress policer.");
12146                         goto error;
12147                 }
12148         }
12149         if (attr->ingress) {
12150                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->ingress,
12151                                                 priv->mtr_color_reg);
12152                 if (ret) {
12153                         DRV_LOG(ERR, "Failed to create ingress policer.");
12154                         goto error;
12155                 }
12156         }
12157         if (attr->transfer) {
12158                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->transfer,
12159                                                 priv->mtr_color_reg);
12160                 if (ret) {
12161                         DRV_LOG(ERR, "Failed to create transfer policer.");
12162                         goto error;
12163                 }
12164         }
12165         return 0;
12166 error:
12167         flow_dv_destroy_policer_rules(dev, fm, attr);
12168         return -1;
12169 }
12170
12171 /**
12172  * Validate the batch counter support in root table.
12173  *
12174  * Create a simple flow with invalid counter and drop action on root table to
12175  * validate if batch counter with offset on root table is supported or not.
12176  *
12177  * @param[in] dev
12178  *   Pointer to rte_eth_dev structure.
12179  *
12180  * @return
12181  *   0 on success, a negative errno value otherwise and rte_errno is set.
12182  */
12183 int
12184 mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)
12185 {
12186         struct mlx5_priv *priv = dev->data->dev_private;
12187         struct mlx5_dev_ctx_shared *sh = priv->sh;
12188         struct mlx5_flow_dv_match_params mask = {
12189                 .size = sizeof(mask.buf),
12190         };
12191         struct mlx5_flow_dv_match_params value = {
12192                 .size = sizeof(value.buf),
12193         };
12194         struct mlx5dv_flow_matcher_attr dv_attr = {
12195                 .type = IBV_FLOW_ATTR_NORMAL,
12196                 .priority = 0,
12197                 .match_criteria_enable = 0,
12198                 .match_mask = (void *)&mask,
12199         };
12200         void *actions[2] = { 0 };
12201         struct mlx5_flow_tbl_resource *tbl = NULL, *dest_tbl = NULL;
12202         struct mlx5_devx_obj *dcs = NULL;
12203         void *matcher = NULL;
12204         void *flow = NULL;
12205         int i, ret = -1;
12206
12207         tbl = flow_dv_tbl_resource_get(dev, 0, 0, 0, false, NULL, 0, 0, NULL);
12208         if (!tbl)
12209                 goto err;
12210         dest_tbl = flow_dv_tbl_resource_get(dev, 1, 0, 0, false,
12211                                             NULL, 0, 0, NULL);
12212         if (!dest_tbl)
12213                 goto err;
12214         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
12215         if (!dcs)
12216                 goto err;
12217         ret = mlx5_flow_os_create_flow_action_count(dcs->obj, UINT16_MAX,
12218                                                     &actions[0]);
12219         if (ret)
12220                 goto err;
12221         ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
12222                                 (dest_tbl->obj, &actions[1]);
12223         if (ret)
12224                 goto err;
12225         dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
12226         ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj,
12227                                                &matcher);
12228         if (ret)
12229                 goto err;
12230         ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 2,
12231                                        actions, &flow);
12232 err:
12233         /*
12234          * If batch counter with offset is not supported, the driver will not
12235          * validate the invalid offset value, flow create should success.
12236          * In this case, it means batch counter is not supported in root table.
12237          *
12238          * Otherwise, if flow create is failed, counter offset is supported.
12239          */
12240         if (flow) {
12241                 DRV_LOG(INFO, "Batch counter is not supported in root "
12242                               "table. Switch to fallback mode.");
12243                 rte_errno = ENOTSUP;
12244                 ret = -rte_errno;
12245                 claim_zero(mlx5_flow_os_destroy_flow(flow));
12246         } else {
12247                 /* Check matcher to make sure validate fail at flow create. */
12248                 if (!matcher || (matcher && errno != EINVAL))
12249                         DRV_LOG(ERR, "Unexpected error in counter offset "
12250                                      "support detection");
12251                 ret = 0;
12252         }
12253         for (i = 0; i < 2; i++) {
12254                 if (actions[i])
12255                         claim_zero(mlx5_flow_os_destroy_flow_action
12256                                    (actions[i]));
12257         }
12258         if (matcher)
12259                 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
12260         if (tbl)
12261                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
12262         if (dest_tbl)
12263                 flow_dv_tbl_resource_release(MLX5_SH(dev), dest_tbl);
12264         if (dcs)
12265                 claim_zero(mlx5_devx_cmd_destroy(dcs));
12266         return ret;
12267 }
12268
12269 /**
12270  * Query a devx counter.
12271  *
12272  * @param[in] dev
12273  *   Pointer to the Ethernet device structure.
12274  * @param[in] cnt
12275  *   Index to the flow counter.
12276  * @param[in] clear
12277  *   Set to clear the counter statistics.
12278  * @param[out] pkts
12279  *   The statistics value of packets.
12280  * @param[out] bytes
12281  *   The statistics value of bytes.
12282  *
12283  * @return
12284  *   0 on success, otherwise return -1.
12285  */
12286 static int
12287 flow_dv_counter_query(struct rte_eth_dev *dev, uint32_t counter, bool clear,
12288                       uint64_t *pkts, uint64_t *bytes)
12289 {
12290         struct mlx5_priv *priv = dev->data->dev_private;
12291         struct mlx5_flow_counter *cnt;
12292         uint64_t inn_pkts, inn_bytes;
12293         int ret;
12294
12295         if (!priv->config.devx)
12296                 return -1;
12297
12298         ret = _flow_dv_query_count(dev, counter, &inn_pkts, &inn_bytes);
12299         if (ret)
12300                 return -1;
12301         cnt = flow_dv_counter_get_by_idx(dev, counter, NULL);
12302         *pkts = inn_pkts - cnt->hits;
12303         *bytes = inn_bytes - cnt->bytes;
12304         if (clear) {
12305                 cnt->hits = inn_pkts;
12306                 cnt->bytes = inn_bytes;
12307         }
12308         return 0;
12309 }
12310
12311 /**
12312  * Get aged-out flows.
12313  *
12314  * @param[in] dev
12315  *   Pointer to the Ethernet device structure.
12316  * @param[in] context
12317  *   The address of an array of pointers to the aged-out flows contexts.
12318  * @param[in] nb_contexts
12319  *   The length of context array pointers.
12320  * @param[out] error
12321  *   Perform verbose error reporting if not NULL. Initialized in case of
12322  *   error only.
12323  *
12324  * @return
12325  *   how many contexts get in success, otherwise negative errno value.
12326  *   if nb_contexts is 0, return the amount of all aged contexts.
12327  *   if nb_contexts is not 0 , return the amount of aged flows reported
12328  *   in the context array.
12329  * @note: only stub for now
12330  */
12331 static int
12332 flow_get_aged_flows(struct rte_eth_dev *dev,
12333                     void **context,
12334                     uint32_t nb_contexts,
12335                     struct rte_flow_error *error)
12336 {
12337         struct mlx5_priv *priv = dev->data->dev_private;
12338         struct mlx5_age_info *age_info;
12339         struct mlx5_age_param *age_param;
12340         struct mlx5_flow_counter *counter;
12341         struct mlx5_aso_age_action *act;
12342         int nb_flows = 0;
12343
12344         if (nb_contexts && !context)
12345                 return rte_flow_error_set(error, EINVAL,
12346                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12347                                           NULL, "empty context");
12348         age_info = GET_PORT_AGE_INFO(priv);
12349         rte_spinlock_lock(&age_info->aged_sl);
12350         if (priv->sh->flow_hit_aso_en)
12351                 LIST_FOREACH(act, &age_info->aged_aso, next) {
12352                         nb_flows++;
12353                         if (nb_contexts) {
12354                                 context[nb_flows - 1] =
12355                                                         act->age_params.context;
12356                                 if (!(--nb_contexts))
12357                                         break;
12358                         }
12359                 }
12360         else
12361                 TAILQ_FOREACH(counter, &age_info->aged_counters, next) {
12362                         nb_flows++;
12363                         if (nb_contexts) {
12364                                 age_param = MLX5_CNT_TO_AGE(counter);
12365                                 context[nb_flows - 1] = age_param->context;
12366                                 if (!(--nb_contexts))
12367                                         break;
12368                         }
12369                 }
12370         rte_spinlock_unlock(&age_info->aged_sl);
12371         MLX5_AGE_SET(age_info, MLX5_AGE_TRIGGER);
12372         return nb_flows;
12373 }
12374
12375 /*
12376  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
12377  */
12378 static uint32_t
12379 flow_dv_counter_allocate(struct rte_eth_dev *dev)
12380 {
12381         return flow_dv_counter_alloc(dev, 0);
12382 }
12383
12384 /**
12385  * Validate shared action.
12386  * Dispatcher for action type specific validation.
12387  *
12388  * @param[in] dev
12389  *   Pointer to the Ethernet device structure.
12390  * @param[in] conf
12391  *   Shared action configuration.
12392  * @param[in] action
12393  *   The shared action object to validate.
12394  * @param[out] error
12395  *   Perform verbose error reporting if not NULL. Initialized in case of
12396  *   error only.
12397  *
12398  * @return
12399  *   0 on success, otherwise negative errno value.
12400  */
12401 static int
12402 flow_dv_action_validate(struct rte_eth_dev *dev,
12403                         const struct rte_flow_shared_action_conf *conf,
12404                         const struct rte_flow_action *action,
12405                         struct rte_flow_error *error)
12406 {
12407         RTE_SET_USED(conf);
12408         switch (action->type) {
12409         case RTE_FLOW_ACTION_TYPE_RSS:
12410                 return mlx5_validate_action_rss(dev, action, error);
12411         default:
12412                 return rte_flow_error_set(error, ENOTSUP,
12413                                           RTE_FLOW_ERROR_TYPE_ACTION,
12414                                           NULL,
12415                                           "action type not supported");
12416         }
12417 }
12418
12419 static int
12420 flow_dv_sync_domain(struct rte_eth_dev *dev, uint32_t domains, uint32_t flags)
12421 {
12422         struct mlx5_priv *priv = dev->data->dev_private;
12423         int ret = 0;
12424
12425         if ((domains & MLX5_DOMAIN_BIT_NIC_RX) && priv->sh->rx_domain != NULL) {
12426                 ret = mlx5_glue->dr_sync_domain(priv->sh->rx_domain,
12427                                                 flags);
12428                 if (ret != 0)
12429                         return ret;
12430         }
12431         if ((domains & MLX5_DOMAIN_BIT_NIC_TX) && priv->sh->tx_domain != NULL) {
12432                 ret = mlx5_glue->dr_sync_domain(priv->sh->tx_domain, flags);
12433                 if (ret != 0)
12434                         return ret;
12435         }
12436         if ((domains & MLX5_DOMAIN_BIT_FDB) && priv->sh->fdb_domain != NULL) {
12437                 ret = mlx5_glue->dr_sync_domain(priv->sh->fdb_domain, flags);
12438                 if (ret != 0)
12439                         return ret;
12440         }
12441         return 0;
12442 }
12443
12444 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
12445         .validate = flow_dv_validate,
12446         .prepare = flow_dv_prepare,
12447         .translate = flow_dv_translate,
12448         .apply = flow_dv_apply,
12449         .remove = flow_dv_remove,
12450         .destroy = flow_dv_destroy,
12451         .query = flow_dv_query,
12452         .create_mtr_tbls = flow_dv_create_mtr_tbl,
12453         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbl,
12454         .create_policer_rules = flow_dv_create_policer_rules,
12455         .destroy_policer_rules = flow_dv_destroy_policer_rules,
12456         .counter_alloc = flow_dv_counter_allocate,
12457         .counter_free = flow_dv_counter_free,
12458         .counter_query = flow_dv_counter_query,
12459         .get_aged_flows = flow_get_aged_flows,
12460         .action_validate = flow_dv_action_validate,
12461         .action_create = flow_dv_action_create,
12462         .action_destroy = flow_dv_action_destroy,
12463         .action_update = flow_dv_action_update,
12464         .sync_domain = flow_dv_sync_domain,
12465 };
12466
12467 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
12468