drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29 #include <rte_vxlan.h>
  30
  31 #include "mlx5.h"
  32 #include "mlx5_defs.h"
  33 #include "mlx5_glue.h"
  34 #include "mlx5_flow.h"
  35 #include "mlx5_prm.h"
  36 #include "mlx5_rxtx.h"
  37
  38 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  39
  40 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  41 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  42 #endif
  43
  44 #ifndef HAVE_MLX5DV_DR_ESWITCH
  45 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  46 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  47 #endif
  48 #endif
  49
  50 #ifndef HAVE_MLX5DV_DR
  51 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  52 #endif
  53
  54 #define MLX5_ENCAPSULATION_DECISION_SIZE (sizeof(struct rte_flow_item_eth) + \
  55                                           sizeof(struct rte_flow_item_ipv4))
  56 /* VLAN header definitions */
  57 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  58 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  59 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  60 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  61 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  62
  63 union flow_dv_attr {
  64         struct {
  65                 uint32_t valid:1;
  66                 uint32_t ipv4:1;
  67                 uint32_t ipv6:1;
  68                 uint32_t tcp:1;
  69                 uint32_t udp:1;
  70                 uint32_t reserved:27;
  71         };
  72         uint32_t attr;
  73 };
  74
  75 /**
  76  * Initialize flow attributes structure according to flow items' types.
  77  *
  78  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
  79  * mode. For tunnel mode, the items to be modified are the outermost ones.
  80  *
  81  * @param[in] item
  82  *   Pointer to item specification.
  83  * @param[out] attr
  84  *   Pointer to flow attributes structure.
  85  */
  86 static void
  87 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr)
  88 {
  89         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
  90                 switch (item->type) {
  91                 case RTE_FLOW_ITEM_TYPE_IPV4:
  92                         if (!attr->ipv6)
  93                                 attr->ipv4 = 1;
  94                         break;
  95                 case RTE_FLOW_ITEM_TYPE_IPV6:
  96                         if (!attr->ipv4)
  97                                 attr->ipv6 = 1;
  98                         break;
  99                 case RTE_FLOW_ITEM_TYPE_UDP:
 100                         if (!attr->tcp)
 101                                 attr->udp = 1;
 102                         break;
 103                 case RTE_FLOW_ITEM_TYPE_TCP:
 104                         if (!attr->udp)
 105                                 attr->tcp = 1;
 106                         break;
 107                 default:
 108                         break;
 109                 }
 110         }
 111         attr->valid = 1;
 112 }
 113
 114 /**
 115  * Convert rte_mtr_color to mlx5 color.
 116  *
 117  * @param[in] rcol
 118  *   rte_mtr_color.
 119  *
 120  * @return
 121  *   mlx5 color.
 122  */
 123 static int
 124 rte_col_2_mlx5_col(enum rte_color rcol)
 125 {
 126         switch (rcol) {
 127         case RTE_COLOR_GREEN:
 128                 return MLX5_FLOW_COLOR_GREEN;
 129         case RTE_COLOR_YELLOW:
 130                 return MLX5_FLOW_COLOR_YELLOW;
 131         case RTE_COLOR_RED:
 132                 return MLX5_FLOW_COLOR_RED;
 133         default:
 134                 break;
 135         }
 136         return MLX5_FLOW_COLOR_UNDEFINED;
 137 }
 138
 139 struct field_modify_info {
 140         uint32_t size; /* Size of field in protocol header, in bytes. */
 141         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 142         enum mlx5_modification_field id;
 143 };
 144
 145 struct field_modify_info modify_eth[] = {
 146         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 147         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 148         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 149         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 150         {0, 0, 0},
 151 };
 152
 153 struct field_modify_info modify_vlan_out_first_vid[] = {
 154         /* Size in bits !!! */
 155         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 156         {0, 0, 0},
 157 };
 158
 159 struct field_modify_info modify_ipv4[] = {
 160         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 161         {4, 12, MLX5_MODI_OUT_SIPV4},
 162         {4, 16, MLX5_MODI_OUT_DIPV4},
 163         {0, 0, 0},
 164 };
 165
 166 struct field_modify_info modify_ipv6[] = {
 167         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 168         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 169         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 170         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 171         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 172         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 173         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 174         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 175         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 176         {0, 0, 0},
 177 };
 178
 179 struct field_modify_info modify_udp[] = {
 180         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 181         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 182         {0, 0, 0},
 183 };
 184
 185 struct field_modify_info modify_tcp[] = {
 186         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 187         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 188         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 189         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 190         {0, 0, 0},
 191 };
 192
 193 static void
 194 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 195                           uint8_t next_protocol, uint64_t *item_flags,
 196                           int *tunnel)
 197 {
 198         assert(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 199                item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 200         if (next_protocol == IPPROTO_IPIP) {
 201                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 202                 *tunnel = 1;
 203         }
 204         if (next_protocol == IPPROTO_IPV6) {
 205                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 206                 *tunnel = 1;
 207         }
 208 }
 209
 210 /**
 211  * Acquire the synchronizing object to protect multithreaded access
 212  * to shared dv context. Lock occurs only if context is actually
 213  * shared, i.e. we have multiport IB device and representors are
 214  * created.
 215  *
 216  * @param[in] dev
 217  *   Pointer to the rte_eth_dev structure.
 218  */
 219 static void
 220 flow_dv_shared_lock(struct rte_eth_dev *dev)
 221 {
 222         struct mlx5_priv *priv = dev->data->dev_private;
 223         struct mlx5_ibv_shared *sh = priv->sh;
 224
 225         if (sh->dv_refcnt > 1) {
 226                 int ret;
 227
 228                 ret = pthread_mutex_lock(&sh->dv_mutex);
 229                 assert(!ret);
 230                 (void)ret;
 231         }
 232 }
 233
 234 static void
 235 flow_dv_shared_unlock(struct rte_eth_dev *dev)
 236 {
 237         struct mlx5_priv *priv = dev->data->dev_private;
 238         struct mlx5_ibv_shared *sh = priv->sh;
 239
 240         if (sh->dv_refcnt > 1) {
 241                 int ret;
 242
 243                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 244                 assert(!ret);
 245                 (void)ret;
 246         }
 247 }
 248
 249 /* Update VLAN's VID/PCP based on input rte_flow_action.
 250  *
 251  * @param[in] action
 252  *   Pointer to struct rte_flow_action.
 253  * @param[out] vlan
 254  *   Pointer to struct rte_vlan_hdr.
 255  */
 256 static void
 257 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 258                          struct rte_vlan_hdr *vlan)
 259 {
 260         uint16_t vlan_tci;
 261         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 262                 vlan_tci =
 263                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 264                                                action->conf)->vlan_pcp;
 265                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 266                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 267                 vlan->vlan_tci |= vlan_tci;
 268         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 269                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 270                 vlan->vlan_tci |= rte_be_to_cpu_16
 271                     (((const struct rte_flow_action_of_set_vlan_vid *)
 272                                              action->conf)->vlan_vid);
 273         }
 274 }
 275
 276 /**
 277  * Fetch 1, 2, 3 or 4 byte field from the byte array
 278  * and return as unsigned integer in host-endian format.
 279  *
 280  * @param[in] data
 281  *   Pointer to data array.
 282  * @param[in] size
 283  *   Size of field to extract.
 284  *
 285  * @return
 286  *   converted field in host endian format.
 287  */
 288 static inline uint32_t
 289 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 290 {
 291         uint32_t ret;
 292
 293         switch (size) {
 294         case 1:
 295                 ret = *data;
 296                 break;
 297         case 2:
 298                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 299                 break;
 300         case 3:
 301                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 302                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 303                 break;
 304         case 4:
 305                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 306                 break;
 307         default:
 308                 assert(false);
 309                 ret = 0;
 310                 break;
 311         }
 312         return ret;
 313 }
 314
 315 /**
 316  * Convert modify-header action to DV specification.
 317  *
 318  * Data length of each action is determined by provided field description
 319  * and the item mask. Data bit offset and width of each action is determined
 320  * by provided item mask.
 321  *
 322  * @param[in] item
 323  *   Pointer to item specification.
 324  * @param[in] field
 325  *   Pointer to field modification information.
 326  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 327  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 328  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 329  * @param[in] dcopy
 330  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 331  *   Negative offset value sets the same offset as source offset.
 332  *   size field is ignored, value is taken from source field.
 333  * @param[in,out] resource
 334  *   Pointer to the modify-header resource.
 335  * @param[in] type
 336  *   Type of modification.
 337  * @param[out] error
 338  *   Pointer to the error structure.
 339  *
 340  * @return
 341  *   0 on success, a negative errno value otherwise and rte_errno is set.
 342  */
 343 static int
 344 flow_dv_convert_modify_action(struct rte_flow_item *item,
 345                               struct field_modify_info *field,
 346                               struct field_modify_info *dcopy,
 347                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 348                               uint32_t type, struct rte_flow_error *error)
 349 {
 350         uint32_t i = resource->actions_num;
 351         struct mlx5_modification_cmd *actions = resource->actions;
 352
 353         /*
 354          * The item and mask are provided in big-endian format.
 355          * The fields should be presented as in big-endian format either.
 356          * Mask must be always present, it defines the actual field width.
 357          */
 358         assert(item->mask);
 359         assert(field->size);
 360         do {
 361                 unsigned int size_b;
 362                 unsigned int off_b;
 363                 uint32_t mask;
 364                 uint32_t data;
 365
 366                 if (i >= MLX5_MODIFY_NUM)
 367                         return rte_flow_error_set(error, EINVAL,
 368                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 369                                  "too many items to modify");
 370                 /* Fetch variable byte size mask from the array. */
 371                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 372                                            field->offset, field->size);
 373                 if (!mask) {
 374                         ++field;
 375                         continue;
 376                 }
 377                 /* Deduce actual data width in bits from mask value. */
 378                 off_b = rte_bsf32(mask);
 379                 size_b = sizeof(uint32_t) * CHAR_BIT -
 380                          off_b - __builtin_clz(mask);
 381                 assert(size_b);
 382                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 383                 actions[i].action_type = type;
 384                 actions[i].field = field->id;
 385                 actions[i].offset = off_b;
 386                 actions[i].length = size_b;
 387                 /* Convert entire record to expected big-endian format. */
 388                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 389                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 390                         assert(dcopy);
 391                         actions[i].dst_field = dcopy->id;
 392                         actions[i].dst_offset =
 393                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 394                         /* Convert entire record to big-endian format. */
 395                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 396                 } else {
 397                         assert(item->spec);
 398                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 399                                                    field->offset, field->size);
 400                         /* Shift out the trailing masked bits from data. */
 401                         data = (data & mask) >> off_b;
 402                         actions[i].data1 = rte_cpu_to_be_32(data);
 403                 }
 404                 ++i;
 405                 ++field;
 406         } while (field->size);
 407         resource->actions_num = i;
 408         if (!resource->actions_num)
 409                 return rte_flow_error_set(error, EINVAL,
 410                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 411                                           "invalid modification flow item");
 412         return 0;
 413 }
 414
 415 /**
 416  * Convert modify-header set IPv4 address action to DV specification.
 417  *
 418  * @param[in,out] resource
 419  *   Pointer to the modify-header resource.
 420  * @param[in] action
 421  *   Pointer to action specification.
 422  * @param[out] error
 423  *   Pointer to the error structure.
 424  *
 425  * @return
 426  *   0 on success, a negative errno value otherwise and rte_errno is set.
 427  */
 428 static int
 429 flow_dv_convert_action_modify_ipv4
 430                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 431                          const struct rte_flow_action *action,
 432                          struct rte_flow_error *error)
 433 {
 434         const struct rte_flow_action_set_ipv4 *conf =
 435                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 436         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 437         struct rte_flow_item_ipv4 ipv4;
 438         struct rte_flow_item_ipv4 ipv4_mask;
 439
 440         memset(&ipv4, 0, sizeof(ipv4));
 441         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 442         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 443                 ipv4.hdr.src_addr = conf->ipv4_addr;
 444                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 445         } else {
 446                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 447                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 448         }
 449         item.spec = &ipv4;
 450         item.mask = &ipv4_mask;
 451         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 452                                              MLX5_MODIFICATION_TYPE_SET, error);
 453 }
 454
 455 /**
 456  * Convert modify-header set IPv6 address action to DV specification.
 457  *
 458  * @param[in,out] resource
 459  *   Pointer to the modify-header resource.
 460  * @param[in] action
 461  *   Pointer to action specification.
 462  * @param[out] error
 463  *   Pointer to the error structure.
 464  *
 465  * @return
 466  *   0 on success, a negative errno value otherwise and rte_errno is set.
 467  */
 468 static int
 469 flow_dv_convert_action_modify_ipv6
 470                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 471                          const struct rte_flow_action *action,
 472                          struct rte_flow_error *error)
 473 {
 474         const struct rte_flow_action_set_ipv6 *conf =
 475                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 476         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 477         struct rte_flow_item_ipv6 ipv6;
 478         struct rte_flow_item_ipv6 ipv6_mask;
 479
 480         memset(&ipv6, 0, sizeof(ipv6));
 481         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 482         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 483                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 484                        sizeof(ipv6.hdr.src_addr));
 485                 memcpy(&ipv6_mask.hdr.src_addr,
 486                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 487                        sizeof(ipv6.hdr.src_addr));
 488         } else {
 489                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 490                        sizeof(ipv6.hdr.dst_addr));
 491                 memcpy(&ipv6_mask.hdr.dst_addr,
 492                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 493                        sizeof(ipv6.hdr.dst_addr));
 494         }
 495         item.spec = &ipv6;
 496         item.mask = &ipv6_mask;
 497         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 498                                              MLX5_MODIFICATION_TYPE_SET, error);
 499 }
 500
 501 /**
 502  * Convert modify-header set MAC address action to DV specification.
 503  *
 504  * @param[in,out] resource
 505  *   Pointer to the modify-header resource.
 506  * @param[in] action
 507  *   Pointer to action specification.
 508  * @param[out] error
 509  *   Pointer to the error structure.
 510  *
 511  * @return
 512  *   0 on success, a negative errno value otherwise and rte_errno is set.
 513  */
 514 static int
 515 flow_dv_convert_action_modify_mac
 516                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 517                          const struct rte_flow_action *action,
 518                          struct rte_flow_error *error)
 519 {
 520         const struct rte_flow_action_set_mac *conf =
 521                 (const struct rte_flow_action_set_mac *)(action->conf);
 522         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 523         struct rte_flow_item_eth eth;
 524         struct rte_flow_item_eth eth_mask;
 525
 526         memset(&eth, 0, sizeof(eth));
 527         memset(&eth_mask, 0, sizeof(eth_mask));
 528         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 529                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 530                        sizeof(eth.src.addr_bytes));
 531                 memcpy(&eth_mask.src.addr_bytes,
 532                        &rte_flow_item_eth_mask.src.addr_bytes,
 533                        sizeof(eth_mask.src.addr_bytes));
 534         } else {
 535                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 536                        sizeof(eth.dst.addr_bytes));
 537                 memcpy(&eth_mask.dst.addr_bytes,
 538                        &rte_flow_item_eth_mask.dst.addr_bytes,
 539                        sizeof(eth_mask.dst.addr_bytes));
 540         }
 541         item.spec = &eth;
 542         item.mask = &eth_mask;
 543         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 544                                              MLX5_MODIFICATION_TYPE_SET, error);
 545 }
 546
 547 /**
 548  * Convert modify-header set VLAN VID action to DV specification.
 549  *
 550  * @param[in,out] resource
 551  *   Pointer to the modify-header resource.
 552  * @param[in] action
 553  *   Pointer to action specification.
 554  * @param[out] error
 555  *   Pointer to the error structure.
 556  *
 557  * @return
 558  *   0 on success, a negative errno value otherwise and rte_errno is set.
 559  */
 560 static int
 561 flow_dv_convert_action_modify_vlan_vid
 562                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 563                          const struct rte_flow_action *action,
 564                          struct rte_flow_error *error)
 565 {
 566         const struct rte_flow_action_of_set_vlan_vid *conf =
 567                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 568         int i = resource->actions_num;
 569         struct mlx5_modification_cmd *actions = &resource->actions[i];
 570         struct field_modify_info *field = modify_vlan_out_first_vid;
 571
 572         if (i >= MLX5_MODIFY_NUM)
 573                 return rte_flow_error_set(error, EINVAL,
 574                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 575                          "too many items to modify");
 576         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 577         actions[i].field = field->id;
 578         actions[i].length = field->size;
 579         actions[i].offset = field->offset;
 580         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 581         actions[i].data1 = conf->vlan_vid;
 582         actions[i].data1 = actions[i].data1 << 16;
 583         resource->actions_num = ++i;
 584         return 0;
 585 }
 586
 587 /**
 588  * Convert modify-header set TP action to DV specification.
 589  *
 590  * @param[in,out] resource
 591  *   Pointer to the modify-header resource.
 592  * @param[in] action
 593  *   Pointer to action specification.
 594  * @param[in] items
 595  *   Pointer to rte_flow_item objects list.
 596  * @param[in] attr
 597  *   Pointer to flow attributes structure.
 598  * @param[out] error
 599  *   Pointer to the error structure.
 600  *
 601  * @return
 602  *   0 on success, a negative errno value otherwise and rte_errno is set.
 603  */
 604 static int
 605 flow_dv_convert_action_modify_tp
 606                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 607                          const struct rte_flow_action *action,
 608                          const struct rte_flow_item *items,
 609                          union flow_dv_attr *attr,
 610                          struct rte_flow_error *error)
 611 {
 612         const struct rte_flow_action_set_tp *conf =
 613                 (const struct rte_flow_action_set_tp *)(action->conf);
 614         struct rte_flow_item item;
 615         struct rte_flow_item_udp udp;
 616         struct rte_flow_item_udp udp_mask;
 617         struct rte_flow_item_tcp tcp;
 618         struct rte_flow_item_tcp tcp_mask;
 619         struct field_modify_info *field;
 620
 621         if (!attr->valid)
 622                 flow_dv_attr_init(items, attr);
 623         if (attr->udp) {
 624                 memset(&udp, 0, sizeof(udp));
 625                 memset(&udp_mask, 0, sizeof(udp_mask));
 626                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 627                         udp.hdr.src_port = conf->port;
 628                         udp_mask.hdr.src_port =
 629                                         rte_flow_item_udp_mask.hdr.src_port;
 630                 } else {
 631                         udp.hdr.dst_port = conf->port;
 632                         udp_mask.hdr.dst_port =
 633                                         rte_flow_item_udp_mask.hdr.dst_port;
 634                 }
 635                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 636                 item.spec = &udp;
 637                 item.mask = &udp_mask;
 638                 field = modify_udp;
 639         }
 640         if (attr->tcp) {
 641                 memset(&tcp, 0, sizeof(tcp));
 642                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 643                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 644                         tcp.hdr.src_port = conf->port;
 645                         tcp_mask.hdr.src_port =
 646                                         rte_flow_item_tcp_mask.hdr.src_port;
 647                 } else {
 648                         tcp.hdr.dst_port = conf->port;
 649                         tcp_mask.hdr.dst_port =
 650                                         rte_flow_item_tcp_mask.hdr.dst_port;
 651                 }
 652                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 653                 item.spec = &tcp;
 654                 item.mask = &tcp_mask;
 655                 field = modify_tcp;
 656         }
 657         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 658                                              MLX5_MODIFICATION_TYPE_SET, error);
 659 }
 660
 661 /**
 662  * Convert modify-header set TTL action to DV specification.
 663  *
 664  * @param[in,out] resource
 665  *   Pointer to the modify-header resource.
 666  * @param[in] action
 667  *   Pointer to action specification.
 668  * @param[in] items
 669  *   Pointer to rte_flow_item objects list.
 670  * @param[in] attr
 671  *   Pointer to flow attributes structure.
 672  * @param[out] error
 673  *   Pointer to the error structure.
 674  *
 675  * @return
 676  *   0 on success, a negative errno value otherwise and rte_errno is set.
 677  */
 678 static int
 679 flow_dv_convert_action_modify_ttl
 680                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 681                          const struct rte_flow_action *action,
 682                          const struct rte_flow_item *items,
 683                          union flow_dv_attr *attr,
 684                          struct rte_flow_error *error)
 685 {
 686         const struct rte_flow_action_set_ttl *conf =
 687                 (const struct rte_flow_action_set_ttl *)(action->conf);
 688         struct rte_flow_item item;
 689         struct rte_flow_item_ipv4 ipv4;
 690         struct rte_flow_item_ipv4 ipv4_mask;
 691         struct rte_flow_item_ipv6 ipv6;
 692         struct rte_flow_item_ipv6 ipv6_mask;
 693         struct field_modify_info *field;
 694
 695         if (!attr->valid)
 696                 flow_dv_attr_init(items, attr);
 697         if (attr->ipv4) {
 698                 memset(&ipv4, 0, sizeof(ipv4));
 699                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 700                 ipv4.hdr.time_to_live = conf->ttl_value;
 701                 ipv4_mask.hdr.time_to_live = 0xFF;
 702                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 703                 item.spec = &ipv4;
 704                 item.mask = &ipv4_mask;
 705                 field = modify_ipv4;
 706         }
 707         if (attr->ipv6) {
 708                 memset(&ipv6, 0, sizeof(ipv6));
 709                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 710                 ipv6.hdr.hop_limits = conf->ttl_value;
 711                 ipv6_mask.hdr.hop_limits = 0xFF;
 712                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 713                 item.spec = &ipv6;
 714                 item.mask = &ipv6_mask;
 715                 field = modify_ipv6;
 716         }
 717         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 718                                              MLX5_MODIFICATION_TYPE_SET, error);
 719 }
 720
 721 /**
 722  * Convert modify-header decrement TTL action to DV specification.
 723  *
 724  * @param[in,out] resource
 725  *   Pointer to the modify-header resource.
 726  * @param[in] action
 727  *   Pointer to action specification.
 728  * @param[in] items
 729  *   Pointer to rte_flow_item objects list.
 730  * @param[in] attr
 731  *   Pointer to flow attributes structure.
 732  * @param[out] error
 733  *   Pointer to the error structure.
 734  *
 735  * @return
 736  *   0 on success, a negative errno value otherwise and rte_errno is set.
 737  */
 738 static int
 739 flow_dv_convert_action_modify_dec_ttl
 740                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 741                          const struct rte_flow_item *items,
 742                          union flow_dv_attr *attr,
 743                          struct rte_flow_error *error)
 744 {
 745         struct rte_flow_item item;
 746         struct rte_flow_item_ipv4 ipv4;
 747         struct rte_flow_item_ipv4 ipv4_mask;
 748         struct rte_flow_item_ipv6 ipv6;
 749         struct rte_flow_item_ipv6 ipv6_mask;
 750         struct field_modify_info *field;
 751
 752         if (!attr->valid)
 753                 flow_dv_attr_init(items, attr);
 754         if (attr->ipv4) {
 755                 memset(&ipv4, 0, sizeof(ipv4));
 756                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 757                 ipv4.hdr.time_to_live = 0xFF;
 758                 ipv4_mask.hdr.time_to_live = 0xFF;
 759                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 760                 item.spec = &ipv4;
 761                 item.mask = &ipv4_mask;
 762                 field = modify_ipv4;
 763         }
 764         if (attr->ipv6) {
 765                 memset(&ipv6, 0, sizeof(ipv6));
 766                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 767                 ipv6.hdr.hop_limits = 0xFF;
 768                 ipv6_mask.hdr.hop_limits = 0xFF;
 769                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 770                 item.spec = &ipv6;
 771                 item.mask = &ipv6_mask;
 772                 field = modify_ipv6;
 773         }
 774         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 775                                              MLX5_MODIFICATION_TYPE_ADD, error);
 776 }
 777
 778 /**
 779  * Convert modify-header increment/decrement TCP Sequence number
 780  * to DV specification.
 781  *
 782  * @param[in,out] resource
 783  *   Pointer to the modify-header resource.
 784  * @param[in] action
 785  *   Pointer to action specification.
 786  * @param[out] error
 787  *   Pointer to the error structure.
 788  *
 789  * @return
 790  *   0 on success, a negative errno value otherwise and rte_errno is set.
 791  */
 792 static int
 793 flow_dv_convert_action_modify_tcp_seq
 794                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 795                          const struct rte_flow_action *action,
 796                          struct rte_flow_error *error)
 797 {
 798         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 799         uint64_t value = rte_be_to_cpu_32(*conf);
 800         struct rte_flow_item item;
 801         struct rte_flow_item_tcp tcp;
 802         struct rte_flow_item_tcp tcp_mask;
 803
 804         memset(&tcp, 0, sizeof(tcp));
 805         memset(&tcp_mask, 0, sizeof(tcp_mask));
 806         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 807                 /*
 808                  * The HW has no decrement operation, only increment operation.
 809                  * To simulate decrement X from Y using increment operation
 810                  * we need to add UINT32_MAX X times to Y.
 811                  * Each adding of UINT32_MAX decrements Y by 1.
 812                  */
 813                 value *= UINT32_MAX;
 814         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 815         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 816         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 817         item.spec = &tcp;
 818         item.mask = &tcp_mask;
 819         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 820                                              MLX5_MODIFICATION_TYPE_ADD, error);
 821 }
 822
 823 /**
 824  * Convert modify-header increment/decrement TCP Acknowledgment number
 825  * to DV specification.
 826  *
 827  * @param[in,out] resource
 828  *   Pointer to the modify-header resource.
 829  * @param[in] action
 830  *   Pointer to action specification.
 831  * @param[out] error
 832  *   Pointer to the error structure.
 833  *
 834  * @return
 835  *   0 on success, a negative errno value otherwise and rte_errno is set.
 836  */
 837 static int
 838 flow_dv_convert_action_modify_tcp_ack
 839                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 840                          const struct rte_flow_action *action,
 841                          struct rte_flow_error *error)
 842 {
 843         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 844         uint64_t value = rte_be_to_cpu_32(*conf);
 845         struct rte_flow_item item;
 846         struct rte_flow_item_tcp tcp;
 847         struct rte_flow_item_tcp tcp_mask;
 848
 849         memset(&tcp, 0, sizeof(tcp));
 850         memset(&tcp_mask, 0, sizeof(tcp_mask));
 851         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 852                 /*
 853                  * The HW has no decrement operation, only increment operation.
 854                  * To simulate decrement X from Y using increment operation
 855                  * we need to add UINT32_MAX X times to Y.
 856                  * Each adding of UINT32_MAX decrements Y by 1.
 857                  */
 858                 value *= UINT32_MAX;
 859         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 860         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 861         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 862         item.spec = &tcp;
 863         item.mask = &tcp_mask;
 864         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 865                                              MLX5_MODIFICATION_TYPE_ADD, error);
 866 }
 867
 868 static enum mlx5_modification_field reg_to_field[] = {
 869         [REG_NONE] = MLX5_MODI_OUT_NONE,
 870         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 871         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 872         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 873         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 874         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 875         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 876         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 877         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 878         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 879         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 880 };
 881
 882 /**
 883  * Convert register set to DV specification.
 884  *
 885  * @param[in,out] resource
 886  *   Pointer to the modify-header resource.
 887  * @param[in] action
 888  *   Pointer to action specification.
 889  * @param[out] error
 890  *   Pointer to the error structure.
 891  *
 892  * @return
 893  *   0 on success, a negative errno value otherwise and rte_errno is set.
 894  */
 895 static int
 896 flow_dv_convert_action_set_reg
 897                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 898                          const struct rte_flow_action *action,
 899                          struct rte_flow_error *error)
 900 {
 901         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 902         struct mlx5_modification_cmd *actions = resource->actions;
 903         uint32_t i = resource->actions_num;
 904
 905         if (i >= MLX5_MODIFY_NUM)
 906                 return rte_flow_error_set(error, EINVAL,
 907                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 908                                           "too many items to modify");
 909         assert(conf->id != REG_NONE);
 910         assert(conf->id < RTE_DIM(reg_to_field));
 911         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 912         actions[i].field = reg_to_field[conf->id];
 913         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 914         actions[i].data1 = rte_cpu_to_be_32(conf->data);
 915         ++i;
 916         resource->actions_num = i;
 917         if (!resource->actions_num)
 918                 return rte_flow_error_set(error, EINVAL,
 919                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 920                                           "invalid modification flow item");
 921         return 0;
 922 }
 923
 924 /**
 925  * Convert SET_TAG action to DV specification.
 926  *
 927  * @param[in] dev
 928  *   Pointer to the rte_eth_dev structure.
 929  * @param[in,out] resource
 930  *   Pointer to the modify-header resource.
 931  * @param[in] conf
 932  *   Pointer to action specification.
 933  * @param[out] error
 934  *   Pointer to the error structure.
 935  *
 936  * @return
 937  *   0 on success, a negative errno value otherwise and rte_errno is set.
 938  */
 939 static int
 940 flow_dv_convert_action_set_tag
 941                         (struct rte_eth_dev *dev,
 942                          struct mlx5_flow_dv_modify_hdr_resource *resource,
 943                          const struct rte_flow_action_set_tag *conf,
 944                          struct rte_flow_error *error)
 945 {
 946         rte_be32_t data = rte_cpu_to_be_32(conf->data);
 947         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
 948         struct rte_flow_item item = {
 949                 .spec = &data,
 950                 .mask = &mask,
 951         };
 952         struct field_modify_info reg_c_x[] = {
 953                 [1] = {0, 0, 0},
 954         };
 955         enum mlx5_modification_field reg_type;
 956         int ret;
 957
 958         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
 959         if (ret < 0)
 960                 return ret;
 961         assert(ret != REG_NONE);
 962         assert((unsigned int)ret < RTE_DIM(reg_to_field));
 963         reg_type = reg_to_field[ret];
 964         assert(reg_type > 0);
 965         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
 966         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
 967                                              MLX5_MODIFICATION_TYPE_SET, error);
 968 }
 969
 970 /**
 971  * Convert internal COPY_REG action to DV specification.
 972  *
 973  * @param[in] dev
 974  *   Pointer to the rte_eth_dev structure.
 975  * @param[in,out] res
 976  *   Pointer to the modify-header resource.
 977  * @param[in] action
 978  *   Pointer to action specification.
 979  * @param[out] error
 980  *   Pointer to the error structure.
 981  *
 982  * @return
 983  *   0 on success, a negative errno value otherwise and rte_errno is set.
 984  */
 985 static int
 986 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
 987                                  struct mlx5_flow_dv_modify_hdr_resource *res,
 988                                  const struct rte_flow_action *action,
 989                                  struct rte_flow_error *error)
 990 {
 991         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
 992         rte_be32_t mask = RTE_BE32(UINT32_MAX);
 993         struct rte_flow_item item = {
 994                 .spec = NULL,
 995                 .mask = &mask,
 996         };
 997         struct field_modify_info reg_src[] = {
 998                 {4, 0, reg_to_field[conf->src]},
 999                 {0, 0, 0},
1000         };
1001         struct field_modify_info reg_dst = {
1002                 .offset = 0,
1003                 .id = reg_to_field[conf->dst],
1004         };
1005         /* Adjust reg_c[0] usage according to reported mask. */
1006         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1007                 struct mlx5_priv *priv = dev->data->dev_private;
1008                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1009
1010                 assert(reg_c0);
1011                 assert(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1012                 if (conf->dst == REG_C_0) {
1013                         /* Copy to reg_c[0], within mask only. */
1014                         reg_dst.offset = rte_bsf32(reg_c0);
1015                         /*
1016                          * Mask is ignoring the enianness, because
1017                          * there is no conversion in datapath.
1018                          */
1019 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1020                         /* Copy from destination lower bits to reg_c[0]. */
1021                         mask = reg_c0 >> reg_dst.offset;
1022 #else
1023                         /* Copy from destination upper bits to reg_c[0]. */
1024                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1025                                           rte_fls_u32(reg_c0));
1026 #endif
1027                 } else {
1028                         mask = rte_cpu_to_be_32(reg_c0);
1029 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1030                         /* Copy from reg_c[0] to destination lower bits. */
1031                         reg_dst.offset = 0;
1032 #else
1033                         /* Copy from reg_c[0] to destination upper bits. */
1034                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1035                                          (rte_fls_u32(reg_c0) -
1036                                           rte_bsf32(reg_c0));
1037 #endif
1038                 }
1039         }
1040         return flow_dv_convert_modify_action(&item,
1041                                              reg_src, &reg_dst, res,
1042                                              MLX5_MODIFICATION_TYPE_COPY,
1043                                              error);
1044 }
1045
1046 /**
1047  * Convert MARK action to DV specification. This routine is used
1048  * in extensive metadata only and requires metadata register to be
1049  * handled. In legacy mode hardware tag resource is engaged.
1050  *
1051  * @param[in] dev
1052  *   Pointer to the rte_eth_dev structure.
1053  * @param[in] conf
1054  *   Pointer to MARK action specification.
1055  * @param[in,out] resource
1056  *   Pointer to the modify-header resource.
1057  * @param[out] error
1058  *   Pointer to the error structure.
1059  *
1060  * @return
1061  *   0 on success, a negative errno value otherwise and rte_errno is set.
1062  */
1063 static int
1064 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1065                             const struct rte_flow_action_mark *conf,
1066                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1067                             struct rte_flow_error *error)
1068 {
1069         struct mlx5_priv *priv = dev->data->dev_private;
1070         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1071                                            priv->sh->dv_mark_mask);
1072         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1073         struct rte_flow_item item = {
1074                 .spec = &data,
1075                 .mask = &mask,
1076         };
1077         struct field_modify_info reg_c_x[] = {
1078                 {4, 0, 0}, /* dynamic instead of MLX5_MODI_META_REG_C_1. */
1079                 {0, 0, 0},
1080         };
1081         enum modify_reg reg;
1082
1083         if (!mask)
1084                 return rte_flow_error_set(error, EINVAL,
1085                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1086                                           NULL, "zero mark action mask");
1087         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1088         if (reg < 0)
1089                 return reg;
1090         assert(reg > 0);
1091         reg_c_x[0].id = reg_to_field[reg];
1092         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1093                                              MLX5_MODIFICATION_TYPE_SET, error);
1094 }
1095
1096 /**
1097  * Get metadata register index for specified steering domain.
1098  *
1099  * @param[in] dev
1100  *   Pointer to the rte_eth_dev structure.
1101  * @param[in] attr
1102  *   Attributes of flow to determine steering domain.
1103  * @param[out] error
1104  *   Pointer to the error structure.
1105  *
1106  * @return
1107  *   positive index on success, a negative errno value otherwise
1108  *   and rte_errno is set.
1109  */
1110 static enum modify_reg
1111 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1112                          const struct rte_flow_attr *attr,
1113                          struct rte_flow_error *error)
1114 {
1115         enum modify_reg reg =
1116                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1117                                           MLX5_METADATA_FDB :
1118                                             attr->egress ?
1119                                             MLX5_METADATA_TX :
1120                                             MLX5_METADATA_RX, 0, error);
1121         if (reg < 0)
1122                 return rte_flow_error_set(error,
1123                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1124                                           NULL, "unavailable "
1125                                           "metadata register");
1126         return reg;
1127 }
1128
1129 /**
1130  * Convert SET_META action to DV specification.
1131  *
1132  * @param[in] dev
1133  *   Pointer to the rte_eth_dev structure.
1134  * @param[in,out] resource
1135  *   Pointer to the modify-header resource.
1136  * @param[in] attr
1137  *   Attributes of flow that includes this item.
1138  * @param[in] conf
1139  *   Pointer to action specification.
1140  * @param[out] error
1141  *   Pointer to the error structure.
1142  *
1143  * @return
1144  *   0 on success, a negative errno value otherwise and rte_errno is set.
1145  */
1146 static int
1147 flow_dv_convert_action_set_meta
1148                         (struct rte_eth_dev *dev,
1149                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1150                          const struct rte_flow_attr *attr,
1151                          const struct rte_flow_action_set_meta *conf,
1152                          struct rte_flow_error *error)
1153 {
1154         uint32_t data = conf->data;
1155         uint32_t mask = conf->mask;
1156         struct rte_flow_item item = {
1157                 .spec = &data,
1158                 .mask = &mask,
1159         };
1160         struct field_modify_info reg_c_x[] = {
1161                 [1] = {0, 0, 0},
1162         };
1163         enum modify_reg reg = flow_dv_get_metadata_reg(dev, attr, error);
1164
1165         if (reg < 0)
1166                 return reg;
1167         /*
1168          * In datapath code there is no endianness
1169          * coversions for perfromance reasons, all
1170          * pattern conversions are done in rte_flow.
1171          */
1172         if (reg == REG_C_0) {
1173                 struct mlx5_priv *priv = dev->data->dev_private;
1174                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1175                 uint32_t shl_c0;
1176
1177                 assert(msk_c0);
1178 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1179                 shl_c0 = rte_bsf32(msk_c0);
1180 #else
1181                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1182 #endif
1183                 mask <<= shl_c0;
1184                 data <<= shl_c0;
1185                 assert(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1186         }
1187         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1188         /* The routine expects parameters in memory as big-endian ones. */
1189         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1190                                              MLX5_MODIFICATION_TYPE_SET, error);
1191 }
1192
1193 /**
1194  * Validate MARK item.
1195  *
1196  * @param[in] dev
1197  *   Pointer to the rte_eth_dev structure.
1198  * @param[in] item
1199  *   Item specification.
1200  * @param[in] attr
1201  *   Attributes of flow that includes this item.
1202  * @param[out] error
1203  *   Pointer to error structure.
1204  *
1205  * @return
1206  *   0 on success, a negative errno value otherwise and rte_errno is set.
1207  */
1208 static int
1209 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1210                            const struct rte_flow_item *item,
1211                            const struct rte_flow_attr *attr __rte_unused,
1212                            struct rte_flow_error *error)
1213 {
1214         struct mlx5_priv *priv = dev->data->dev_private;
1215         struct mlx5_dev_config *config = &priv->config;
1216         const struct rte_flow_item_mark *spec = item->spec;
1217         const struct rte_flow_item_mark *mask = item->mask;
1218         const struct rte_flow_item_mark nic_mask = {
1219                 .id = priv->sh->dv_mark_mask,
1220         };
1221         int ret;
1222
1223         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1224                 return rte_flow_error_set(error, ENOTSUP,
1225                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1226                                           "extended metadata feature"
1227                                           " isn't enabled");
1228         if (!mlx5_flow_ext_mreg_supported(dev))
1229                 return rte_flow_error_set(error, ENOTSUP,
1230                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1231                                           "extended metadata register"
1232                                           " isn't supported");
1233         if (!nic_mask.id)
1234                 return rte_flow_error_set(error, ENOTSUP,
1235                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1236                                           "extended metadata register"
1237                                           " isn't available");
1238         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1239         if (ret < 0)
1240                 return ret;
1241         if (!spec)
1242                 return rte_flow_error_set(error, EINVAL,
1243                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1244                                           item->spec,
1245                                           "data cannot be empty");
1246         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1247                 return rte_flow_error_set(error, EINVAL,
1248                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1249                                           &spec->id,
1250                                           "mark id exceeds the limit");
1251         if (!mask)
1252                 mask = &nic_mask;
1253         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1254                                         (const uint8_t *)&nic_mask,
1255                                         sizeof(struct rte_flow_item_mark),
1256                                         error);
1257         if (ret < 0)
1258                 return ret;
1259         return 0;
1260 }
1261
1262 /**
1263  * Validate META item.
1264  *
1265  * @param[in] dev
1266  *   Pointer to the rte_eth_dev structure.
1267  * @param[in] item
1268  *   Item specification.
1269  * @param[in] attr
1270  *   Attributes of flow that includes this item.
1271  * @param[out] error
1272  *   Pointer to error structure.
1273  *
1274  * @return
1275  *   0 on success, a negative errno value otherwise and rte_errno is set.
1276  */
1277 static int
1278 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1279                            const struct rte_flow_item *item,
1280                            const struct rte_flow_attr *attr,
1281                            struct rte_flow_error *error)
1282 {
1283         struct mlx5_priv *priv = dev->data->dev_private;
1284         struct mlx5_dev_config *config = &priv->config;
1285         const struct rte_flow_item_meta *spec = item->spec;
1286         const struct rte_flow_item_meta *mask = item->mask;
1287         struct rte_flow_item_meta nic_mask = {
1288                 .data = UINT32_MAX
1289         };
1290         enum modify_reg reg;
1291         int ret;
1292
1293         if (!spec)
1294                 return rte_flow_error_set(error, EINVAL,
1295                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1296                                           item->spec,
1297                                           "data cannot be empty");
1298         if (!spec->data)
1299                 return rte_flow_error_set(error, EINVAL,
1300                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1301                                           "data cannot be zero");
1302         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1303                 if (!mlx5_flow_ext_mreg_supported(dev))
1304                         return rte_flow_error_set(error, ENOTSUP,
1305                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1306                                           "extended metadata register"
1307                                           " isn't supported");
1308                 reg = flow_dv_get_metadata_reg(dev, attr, error);
1309                 if (reg < 0)
1310                         return reg;
1311                 if (reg == REG_B)
1312                         return rte_flow_error_set(error, ENOTSUP,
1313                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1314                                           "match on reg_b "
1315                                           "isn't supported");
1316                 if (reg != REG_A)
1317                         nic_mask.data = priv->sh->dv_meta_mask;
1318         }
1319         if (!mask)
1320                 mask = &rte_flow_item_meta_mask;
1321         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1322                                         (const uint8_t *)&nic_mask,
1323                                         sizeof(struct rte_flow_item_meta),
1324                                         error);
1325         return ret;
1326 }
1327
1328 /**
1329  * Validate TAG item.
1330  *
1331  * @param[in] dev
1332  *   Pointer to the rte_eth_dev structure.
1333  * @param[in] item
1334  *   Item specification.
1335  * @param[in] attr
1336  *   Attributes of flow that includes this item.
1337  * @param[out] error
1338  *   Pointer to error structure.
1339  *
1340  * @return
1341  *   0 on success, a negative errno value otherwise and rte_errno is set.
1342  */
1343 static int
1344 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
1345                           const struct rte_flow_item *item,
1346                           const struct rte_flow_attr *attr __rte_unused,
1347                           struct rte_flow_error *error)
1348 {
1349         const struct rte_flow_item_tag *spec = item->spec;
1350         const struct rte_flow_item_tag *mask = item->mask;
1351         const struct rte_flow_item_tag nic_mask = {
1352                 .data = RTE_BE32(UINT32_MAX),
1353                 .index = 0xff,
1354         };
1355         int ret;
1356
1357         if (!mlx5_flow_ext_mreg_supported(dev))
1358                 return rte_flow_error_set(error, ENOTSUP,
1359                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1360                                           "extensive metadata register"
1361                                           " isn't supported");
1362         if (!spec)
1363                 return rte_flow_error_set(error, EINVAL,
1364                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1365                                           item->spec,
1366                                           "data cannot be empty");
1367         if (!mask)
1368                 mask = &rte_flow_item_tag_mask;
1369         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1370                                         (const uint8_t *)&nic_mask,
1371                                         sizeof(struct rte_flow_item_tag),
1372                                         error);
1373         if (ret < 0)
1374                 return ret;
1375         if (mask->index != 0xff)
1376                 return rte_flow_error_set(error, EINVAL,
1377                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1378                                           "partial mask for tag index"
1379                                           " is not supported");
1380         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
1381         if (ret < 0)
1382                 return ret;
1383         assert(ret != REG_NONE);
1384         return 0;
1385 }
1386
1387 /**
1388  * Validate vport item.
1389  *
1390  * @param[in] dev
1391  *   Pointer to the rte_eth_dev structure.
1392  * @param[in] item
1393  *   Item specification.
1394  * @param[in] attr
1395  *   Attributes of flow that includes this item.
1396  * @param[in] item_flags
1397  *   Bit-fields that holds the items detected until now.
1398  * @param[out] error
1399  *   Pointer to error structure.
1400  *
1401  * @return
1402  *   0 on success, a negative errno value otherwise and rte_errno is set.
1403  */
1404 static int
1405 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
1406                               const struct rte_flow_item *item,
1407                               const struct rte_flow_attr *attr,
1408                               uint64_t item_flags,
1409                               struct rte_flow_error *error)
1410 {
1411         const struct rte_flow_item_port_id *spec = item->spec;
1412         const struct rte_flow_item_port_id *mask = item->mask;
1413         const struct rte_flow_item_port_id switch_mask = {
1414                         .id = 0xffffffff,
1415         };
1416         struct mlx5_priv *esw_priv;
1417         struct mlx5_priv *dev_priv;
1418         int ret;
1419
1420         if (!attr->transfer)
1421                 return rte_flow_error_set(error, EINVAL,
1422                                           RTE_FLOW_ERROR_TYPE_ITEM,
1423                                           NULL,
1424                                           "match on port id is valid only"
1425                                           " when transfer flag is enabled");
1426         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
1427                 return rte_flow_error_set(error, ENOTSUP,
1428                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1429                                           "multiple source ports are not"
1430                                           " supported");
1431         if (!mask)
1432                 mask = &switch_mask;
1433         if (mask->id != 0xffffffff)
1434                 return rte_flow_error_set(error, ENOTSUP,
1435                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1436                                            mask,
1437                                            "no support for partial mask on"
1438                                            " \"id\" field");
1439         ret = mlx5_flow_item_acceptable
1440                                 (item, (const uint8_t *)mask,
1441                                  (const uint8_t *)&rte_flow_item_port_id_mask,
1442                                  sizeof(struct rte_flow_item_port_id),
1443                                  error);
1444         if (ret)
1445                 return ret;
1446         if (!spec)
1447                 return 0;
1448         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
1449         if (!esw_priv)
1450                 return rte_flow_error_set(error, rte_errno,
1451                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1452                                           "failed to obtain E-Switch info for"
1453                                           " port");
1454         dev_priv = mlx5_dev_to_eswitch_info(dev);
1455         if (!dev_priv)
1456                 return rte_flow_error_set(error, rte_errno,
1457                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1458                                           NULL,
1459                                           "failed to obtain E-Switch info");
1460         if (esw_priv->domain_id != dev_priv->domain_id)
1461                 return rte_flow_error_set(error, EINVAL,
1462                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1463                                           "cannot match on a port from a"
1464                                           " different E-Switch");
1465         return 0;
1466 }
1467
1468 /**
1469  * Validate the pop VLAN action.
1470  *
1471  * @param[in] dev
1472  *   Pointer to the rte_eth_dev structure.
1473  * @param[in] action_flags
1474  *   Holds the actions detected until now.
1475  * @param[in] action
1476  *   Pointer to the pop vlan action.
1477  * @param[in] item_flags
1478  *   The items found in this flow rule.
1479  * @param[in] attr
1480  *   Pointer to flow attributes.
1481  * @param[out] error
1482  *   Pointer to error structure.
1483  *
1484  * @return
1485  *   0 on success, a negative errno value otherwise and rte_errno is set.
1486  */
1487 static int
1488 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
1489                                  uint64_t action_flags,
1490                                  const struct rte_flow_action *action,
1491                                  uint64_t item_flags,
1492                                  const struct rte_flow_attr *attr,
1493                                  struct rte_flow_error *error)
1494 {
1495         struct mlx5_priv *priv = dev->data->dev_private;
1496
1497         (void)action;
1498         (void)attr;
1499         if (!priv->sh->pop_vlan_action)
1500                 return rte_flow_error_set(error, ENOTSUP,
1501                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1502                                           NULL,
1503                                           "pop vlan action is not supported");
1504         /*
1505          * Check for inconsistencies:
1506          *  fail strip_vlan in a flow that matches packets without VLAN tags.
1507          *  fail strip_vlan in a flow that matches packets without explicitly a
1508          *  matching on VLAN tag ?
1509          */
1510         if (action_flags & MLX5_FLOW_ACTION_OF_POP_VLAN)
1511                 return rte_flow_error_set(error, ENOTSUP,
1512                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1513                                           NULL,
1514                                           "no support for multiple vlan pop "
1515                                           "actions");
1516         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1517                 return rte_flow_error_set(error, ENOTSUP,
1518                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1519                                           NULL,
1520                                           "cannot pop vlan without a "
1521                                           "match on (outer) vlan in the flow");
1522         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1523                 return rte_flow_error_set(error, EINVAL,
1524                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1525                                           "wrong action order, port_id should "
1526                                           "be after pop VLAN action");
1527         return 0;
1528 }
1529
1530 /**
1531  * Get VLAN default info from vlan match info.
1532  *
1533  * @param[in] dev
1534  *   Pointer to the rte_eth_dev structure.
1535  * @param[in] item
1536  *   the list of item specifications.
1537  * @param[out] vlan
1538  *   pointer VLAN info to fill to.
1539  * @param[out] error
1540  *   Pointer to error structure.
1541  *
1542  * @return
1543  *   0 on success, a negative errno value otherwise and rte_errno is set.
1544  */
1545 static void
1546 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
1547                                   struct rte_vlan_hdr *vlan)
1548 {
1549         const struct rte_flow_item_vlan nic_mask = {
1550                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
1551                                 MLX5DV_FLOW_VLAN_VID_MASK),
1552                 .inner_type = RTE_BE16(0xffff),
1553         };
1554
1555         if (items == NULL)
1556                 return;
1557         for (; items->type != RTE_FLOW_ITEM_TYPE_END &&
1558                items->type != RTE_FLOW_ITEM_TYPE_VLAN; items++)
1559                 ;
1560         if (items->type == RTE_FLOW_ITEM_TYPE_VLAN) {
1561                 const struct rte_flow_item_vlan *vlan_m = items->mask;
1562                 const struct rte_flow_item_vlan *vlan_v = items->spec;
1563
1564                 if (!vlan_m)
1565                         vlan_m = &nic_mask;
1566                 /* Only full match values are accepted */
1567                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
1568                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
1569                         vlan->vlan_tci &= MLX5DV_FLOW_VLAN_PCP_MASK;
1570                         vlan->vlan_tci |=
1571                                 rte_be_to_cpu_16(vlan_v->tci &
1572                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
1573                 }
1574                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
1575                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
1576                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
1577                         vlan->vlan_tci |=
1578                                 rte_be_to_cpu_16(vlan_v->tci &
1579                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
1580                 }
1581                 if (vlan_m->inner_type == nic_mask.inner_type)
1582                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
1583                                                            vlan_m->inner_type);
1584         }
1585 }
1586
1587 /**
1588  * Validate the push VLAN action.
1589  *
1590  * @param[in] action_flags
1591  *   Holds the actions detected until now.
1592  * @param[in] action
1593  *   Pointer to the encap action.
1594  * @param[in] attr
1595  *   Pointer to flow attributes
1596  * @param[out] error
1597  *   Pointer to error structure.
1598  *
1599  * @return
1600  *   0 on success, a negative errno value otherwise and rte_errno is set.
1601  */
1602 static int
1603 flow_dv_validate_action_push_vlan(uint64_t action_flags,
1604                                   uint64_t item_flags,
1605                                   const struct rte_flow_action *action,
1606                                   const struct rte_flow_attr *attr,
1607                                   struct rte_flow_error *error)
1608 {
1609         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
1610
1611         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
1612             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
1613                 return rte_flow_error_set(error, EINVAL,
1614                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1615                                           "invalid vlan ethertype");
1616         if (action_flags &
1617                 (MLX5_FLOW_ACTION_OF_POP_VLAN | MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1618                 return rte_flow_error_set(error, ENOTSUP,
1619                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1620                                           "no support for multiple VLAN "
1621                                           "actions");
1622         if (!mlx5_flow_find_action
1623                         (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) &&
1624             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1625                 return rte_flow_error_set(error, ENOTSUP,
1626                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
1627                                 "push VLAN needs to match on VLAN in order to "
1628                                 "get VLAN VID information because there is "
1629                                 "no followed set VLAN VID action");
1630         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1631                 return rte_flow_error_set(error, EINVAL,
1632                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1633                                           "wrong action order, port_id should "
1634                                           "be after push VLAN");
1635         (void)attr;
1636         return 0;
1637 }
1638
1639 /**
1640  * Validate the set VLAN PCP.
1641  *
1642  * @param[in] action_flags
1643  *   Holds the actions detected until now.
1644  * @param[in] actions
1645  *   Pointer to the list of actions remaining in the flow rule.
1646  * @param[in] attr
1647  *   Pointer to flow attributes
1648  * @param[out] error
1649  *   Pointer to error structure.
1650  *
1651  * @return
1652  *   0 on success, a negative errno value otherwise and rte_errno is set.
1653  */
1654 static int
1655 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
1656                                      const struct rte_flow_action actions[],
1657                                      struct rte_flow_error *error)
1658 {
1659         const struct rte_flow_action *action = actions;
1660         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
1661
1662         if (conf->vlan_pcp > 7)
1663                 return rte_flow_error_set(error, EINVAL,
1664                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1665                                           "VLAN PCP value is too big");
1666         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1667                 return rte_flow_error_set(error, ENOTSUP,
1668                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1669                                           "set VLAN PCP action must follow "
1670                                           "the push VLAN action");
1671         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
1672                 return rte_flow_error_set(error, ENOTSUP,
1673                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1674                                           "Multiple VLAN PCP modification are "
1675                                           "not supported");
1676         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1677                 return rte_flow_error_set(error, EINVAL,
1678                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1679                                           "wrong action order, port_id should "
1680                                           "be after set VLAN PCP");
1681         return 0;
1682 }
1683
1684 /**
1685  * Validate the set VLAN VID.
1686  *
1687  * @param[in] item_flags
1688  *   Holds the items detected in this rule.
1689  * @param[in] actions
1690  *   Pointer to the list of actions remaining in the flow rule.
1691  * @param[in] attr
1692  *   Pointer to flow attributes
1693  * @param[out] error
1694  *   Pointer to error structure.
1695  *
1696  * @return
1697  *   0 on success, a negative errno value otherwise and rte_errno is set.
1698  */
1699 static int
1700 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
1701                                      uint64_t action_flags,
1702                                      const struct rte_flow_action actions[],
1703                                      struct rte_flow_error *error)
1704 {
1705         const struct rte_flow_action *action = actions;
1706         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
1707
1708         if (conf->vlan_vid > RTE_BE16(0xFFE))
1709                 return rte_flow_error_set(error, EINVAL,
1710                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1711                                           "VLAN VID value is too big");
1712         /* there is an of_push_vlan action before us */
1713         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) {
1714                 if (mlx5_flow_find_action(actions + 1,
1715                                           RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID))
1716                         return rte_flow_error_set(error, ENOTSUP,
1717                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
1718                                         "Multiple VLAN VID modifications are "
1719                                         "not supported");
1720                 else
1721                         return 0;
1722         }
1723
1724         /*
1725          * Action is on an existing VLAN header:
1726          *    Need to verify this is a single modify CID action.
1727          *   Rule mast include a match on outer VLAN.
1728          */
1729         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
1730                 return rte_flow_error_set(error, ENOTSUP,
1731                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1732                                           "Multiple VLAN VID modifications are "
1733                                           "not supported");
1734         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1735                 return rte_flow_error_set(error, EINVAL,
1736                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1737                                           "match on VLAN is required in order "
1738                                           "to set VLAN VID");
1739         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1740                 return rte_flow_error_set(error, EINVAL,
1741                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1742                                           "wrong action order, port_id should "
1743                                           "be after set VLAN VID");
1744         return 0;
1745 }
1746
1747 /*
1748  * Validate the FLAG action.
1749  *
1750  * @param[in] dev
1751  *   Pointer to the rte_eth_dev structure.
1752  * @param[in] action_flags
1753  *   Holds the actions detected until now.
1754  * @param[in] attr
1755  *   Pointer to flow attributes
1756  * @param[out] error
1757  *   Pointer to error structure.
1758  *
1759  * @return
1760  *   0 on success, a negative errno value otherwise and rte_errno is set.
1761  */
1762 static int
1763 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
1764                              uint64_t action_flags,
1765                              const struct rte_flow_attr *attr,
1766                              struct rte_flow_error *error)
1767 {
1768         struct mlx5_priv *priv = dev->data->dev_private;
1769         struct mlx5_dev_config *config = &priv->config;
1770         int ret;
1771
1772         /* Fall back if no extended metadata register support. */
1773         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1774                 return mlx5_flow_validate_action_flag(action_flags, attr,
1775                                                       error);
1776         /* Extensive metadata mode requires registers. */
1777         if (!mlx5_flow_ext_mreg_supported(dev))
1778                 return rte_flow_error_set(error, ENOTSUP,
1779                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1780                                           "no metadata registers "
1781                                           "to support flag action");
1782         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
1783                 return rte_flow_error_set(error, ENOTSUP,
1784                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1785                                           "extended metadata register"
1786                                           " isn't available");
1787         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1788         if (ret < 0)
1789                 return ret;
1790         assert(ret > 0);
1791         if (action_flags & MLX5_FLOW_ACTION_DROP)
1792                 return rte_flow_error_set(error, EINVAL,
1793                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1794                                           "can't drop and flag in same flow");
1795         if (action_flags & MLX5_FLOW_ACTION_MARK)
1796                 return rte_flow_error_set(error, EINVAL,
1797                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1798                                           "can't mark and flag in same flow");
1799         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1800                 return rte_flow_error_set(error, EINVAL,
1801                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1802                                           "can't have 2 flag"
1803                                           " actions in same flow");
1804         return 0;
1805 }
1806
1807 /**
1808  * Validate MARK action.
1809  *
1810  * @param[in] dev
1811  *   Pointer to the rte_eth_dev structure.
1812  * @param[in] action
1813  *   Pointer to action.
1814  * @param[in] action_flags
1815  *   Holds the actions detected until now.
1816  * @param[in] attr
1817  *   Pointer to flow attributes
1818  * @param[out] error
1819  *   Pointer to error structure.
1820  *
1821  * @return
1822  *   0 on success, a negative errno value otherwise and rte_errno is set.
1823  */
1824 static int
1825 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
1826                              const struct rte_flow_action *action,
1827                              uint64_t action_flags,
1828                              const struct rte_flow_attr *attr,
1829                              struct rte_flow_error *error)
1830 {
1831         struct mlx5_priv *priv = dev->data->dev_private;
1832         struct mlx5_dev_config *config = &priv->config;
1833         const struct rte_flow_action_mark *mark = action->conf;
1834         int ret;
1835
1836         /* Fall back if no extended metadata register support. */
1837         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1838                 return mlx5_flow_validate_action_mark(action, action_flags,
1839                                                       attr, error);
1840         /* Extensive metadata mode requires registers. */
1841         if (!mlx5_flow_ext_mreg_supported(dev))
1842                 return rte_flow_error_set(error, ENOTSUP,
1843                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1844                                           "no metadata registers "
1845                                           "to support mark action");
1846         if (!priv->sh->dv_mark_mask)
1847                 return rte_flow_error_set(error, ENOTSUP,
1848                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1849                                           "extended metadata register"
1850                                           " isn't available");
1851         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1852         if (ret < 0)
1853                 return ret;
1854         assert(ret > 0);
1855         if (!mark)
1856                 return rte_flow_error_set(error, EINVAL,
1857                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1858                                           "configuration cannot be null");
1859         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
1860                 return rte_flow_error_set(error, EINVAL,
1861                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1862                                           &mark->id,
1863                                           "mark id exceeds the limit");
1864         if (action_flags & MLX5_FLOW_ACTION_DROP)
1865                 return rte_flow_error_set(error, EINVAL,
1866                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1867                                           "can't drop and mark in same flow");
1868         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1869                 return rte_flow_error_set(error, EINVAL,
1870                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1871                                           "can't flag and mark in same flow");
1872         if (action_flags & MLX5_FLOW_ACTION_MARK)
1873                 return rte_flow_error_set(error, EINVAL,
1874                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1875                                           "can't have 2 mark actions in same"
1876                                           " flow");
1877         return 0;
1878 }
1879
1880 /**
1881  * Validate SET_META action.
1882  *
1883  * @param[in] dev
1884  *   Pointer to the rte_eth_dev structure.
1885  * @param[in] action
1886  *   Pointer to the encap action.
1887  * @param[in] action_flags
1888  *   Holds the actions detected until now.
1889  * @param[in] attr
1890  *   Pointer to flow attributes
1891  * @param[out] error
1892  *   Pointer to error structure.
1893  *
1894  * @return
1895  *   0 on success, a negative errno value otherwise and rte_errno is set.
1896  */
1897 static int
1898 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
1899                                  const struct rte_flow_action *action,
1900                                  uint64_t action_flags __rte_unused,
1901                                  const struct rte_flow_attr *attr,
1902                                  struct rte_flow_error *error)
1903 {
1904         const struct rte_flow_action_set_meta *conf;
1905         uint32_t nic_mask = UINT32_MAX;
1906         enum modify_reg reg;
1907
1908         if (!mlx5_flow_ext_mreg_supported(dev))
1909                 return rte_flow_error_set(error, ENOTSUP,
1910                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1911                                           "extended metadata register"
1912                                           " isn't supported");
1913         reg = flow_dv_get_metadata_reg(dev, attr, error);
1914         if (reg < 0)
1915                 return reg;
1916         if (reg != REG_A && reg != REG_B) {
1917                 struct mlx5_priv *priv = dev->data->dev_private;
1918
1919                 nic_mask = priv->sh->dv_meta_mask;
1920         }
1921         if (!(action->conf))
1922                 return rte_flow_error_set(error, EINVAL,
1923                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1924                                           "configuration cannot be null");
1925         conf = (const struct rte_flow_action_set_meta *)action->conf;
1926         if (!conf->mask)
1927                 return rte_flow_error_set(error, EINVAL,
1928                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1929                                           "zero mask doesn't have any effect");
1930         if (conf->mask & ~nic_mask)
1931                 return rte_flow_error_set(error, EINVAL,
1932                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1933                                           "meta data must be within reg C0");
1934         if (!(conf->data & conf->mask))
1935                 return rte_flow_error_set(error, EINVAL,
1936                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1937                                           "zero value has no effect");
1938         return 0;
1939 }
1940
1941 /**
1942  * Validate SET_TAG action.
1943  *
1944  * @param[in] dev
1945  *   Pointer to the rte_eth_dev structure.
1946  * @param[in] action
1947  *   Pointer to the encap action.
1948  * @param[in] action_flags
1949  *   Holds the actions detected until now.
1950  * @param[in] attr
1951  *   Pointer to flow attributes
1952  * @param[out] error
1953  *   Pointer to error structure.
1954  *
1955  * @return
1956  *   0 on success, a negative errno value otherwise and rte_errno is set.
1957  */
1958 static int
1959 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
1960                                 const struct rte_flow_action *action,
1961                                 uint64_t action_flags,
1962                                 const struct rte_flow_attr *attr,
1963                                 struct rte_flow_error *error)
1964 {
1965         const struct rte_flow_action_set_tag *conf;
1966         const uint64_t terminal_action_flags =
1967                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
1968                 MLX5_FLOW_ACTION_RSS;
1969         int ret;
1970
1971         if (!mlx5_flow_ext_mreg_supported(dev))
1972                 return rte_flow_error_set(error, ENOTSUP,
1973                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1974                                           "extensive metadata register"
1975                                           " isn't supported");
1976         if (!(action->conf))
1977                 return rte_flow_error_set(error, EINVAL,
1978                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1979                                           "configuration cannot be null");
1980         conf = (const struct rte_flow_action_set_tag *)action->conf;
1981         if (!conf->mask)
1982                 return rte_flow_error_set(error, EINVAL,
1983                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1984                                           "zero mask doesn't have any effect");
1985         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1986         if (ret < 0)
1987                 return ret;
1988         if (!attr->transfer && attr->ingress &&
1989             (action_flags & terminal_action_flags))
1990                 return rte_flow_error_set(error, EINVAL,
1991                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1992                                           "set_tag has no effect"
1993                                           " with terminal actions");
1994         return 0;
1995 }
1996
1997 /**
1998  * Validate count action.
1999  *
2000  * @param[in] dev
2001  *   device otr.
2002  * @param[out] error
2003  *   Pointer to error structure.
2004  *
2005  * @return
2006  *   0 on success, a negative errno value otherwise and rte_errno is set.
2007  */
2008 static int
2009 flow_dv_validate_action_count(struct rte_eth_dev *dev,
2010                               struct rte_flow_error *error)
2011 {
2012         struct mlx5_priv *priv = dev->data->dev_private;
2013
2014         if (!priv->config.devx)
2015                 goto notsup_err;
2016 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
2017         return 0;
2018 #endif
2019 notsup_err:
2020         return rte_flow_error_set
2021                       (error, ENOTSUP,
2022                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2023                        NULL,
2024                        "count action not supported");
2025 }
2026
2027 /**
2028  * Validate the L2 encap action.
2029  *
2030  * @param[in] action_flags
2031  *   Holds the actions detected until now.
2032  * @param[in] action
2033  *   Pointer to the encap action.
2034  * @param[in] attr
2035  *   Pointer to flow attributes
2036  * @param[out] error
2037  *   Pointer to error structure.
2038  *
2039  * @return
2040  *   0 on success, a negative errno value otherwise and rte_errno is set.
2041  */
2042 static int
2043 flow_dv_validate_action_l2_encap(uint64_t action_flags,
2044                                  const struct rte_flow_action *action,
2045                                  const struct rte_flow_attr *attr,
2046                                  struct rte_flow_error *error)
2047 {
2048         if (!(action->conf))
2049                 return rte_flow_error_set(error, EINVAL,
2050                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2051                                           "configuration cannot be null");
2052         if (action_flags & MLX5_FLOW_ACTION_DROP)
2053                 return rte_flow_error_set(error, EINVAL,
2054                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2055                                           "can't drop and encap in same flow");
2056         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2057                 return rte_flow_error_set(error, EINVAL,
2058                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2059                                           "can only have a single encap or"
2060                                           " decap action in a flow");
2061         if (!attr->transfer && attr->ingress)
2062                 return rte_flow_error_set(error, ENOTSUP,
2063                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2064                                           NULL,
2065                                           "encap action not supported for "
2066                                           "ingress");
2067         return 0;
2068 }
2069
2070 /**
2071  * Validate the L2 decap action.
2072  *
2073  * @param[in] action_flags
2074  *   Holds the actions detected until now.
2075  * @param[in] attr
2076  *   Pointer to flow attributes
2077  * @param[out] error
2078  *   Pointer to error structure.
2079  *
2080  * @return
2081  *   0 on success, a negative errno value otherwise and rte_errno is set.
2082  */
2083 static int
2084 flow_dv_validate_action_l2_decap(uint64_t action_flags,
2085                                  const struct rte_flow_attr *attr,
2086                                  struct rte_flow_error *error)
2087 {
2088         if (action_flags & MLX5_FLOW_ACTION_DROP)
2089                 return rte_flow_error_set(error, EINVAL,
2090                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2091                                           "can't drop and decap in same flow");
2092         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2093                 return rte_flow_error_set(error, EINVAL,
2094                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2095                                           "can only have a single encap or"
2096                                           " decap action in a flow");
2097         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2098                 return rte_flow_error_set(error, EINVAL,
2099                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2100                                           "can't have decap action after"
2101                                           " modify action");
2102         if (attr->egress)
2103                 return rte_flow_error_set(error, ENOTSUP,
2104                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2105                                           NULL,
2106                                           "decap action not supported for "
2107                                           "egress");
2108         return 0;
2109 }
2110
2111 /**
2112  * Validate the raw encap action.
2113  *
2114  * @param[in] action_flags
2115  *   Holds the actions detected until now.
2116  * @param[in] action
2117  *   Pointer to the encap action.
2118  * @param[in] attr
2119  *   Pointer to flow attributes
2120  * @param[out] error
2121  *   Pointer to error structure.
2122  *
2123  * @return
2124  *   0 on success, a negative errno value otherwise and rte_errno is set.
2125  */
2126 static int
2127 flow_dv_validate_action_raw_encap(uint64_t action_flags,
2128                                   const struct rte_flow_action *action,
2129                                   const struct rte_flow_attr *attr,
2130                                   struct rte_flow_error *error)
2131 {
2132         const struct rte_flow_action_raw_encap *raw_encap =
2133                 (const struct rte_flow_action_raw_encap *)action->conf;
2134         if (!(action->conf))
2135                 return rte_flow_error_set(error, EINVAL,
2136                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2137                                           "configuration cannot be null");
2138         if (action_flags & MLX5_FLOW_ACTION_DROP)
2139                 return rte_flow_error_set(error, EINVAL,
2140                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2141                                           "can't drop and encap in same flow");
2142         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2143                 return rte_flow_error_set(error, EINVAL,
2144                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2145                                           "can only have a single encap"
2146                                           " action in a flow");
2147         /* encap without preceding decap is not supported for ingress */
2148         if (!attr->transfer &&  attr->ingress &&
2149             !(action_flags & MLX5_FLOW_ACTION_RAW_DECAP))
2150                 return rte_flow_error_set(error, ENOTSUP,
2151                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2152                                           NULL,
2153                                           "encap action not supported for "
2154                                           "ingress");
2155         if (!raw_encap->size || !raw_encap->data)
2156                 return rte_flow_error_set(error, EINVAL,
2157                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2158                                           "raw encap data cannot be empty");
2159         return 0;
2160 }
2161
2162 /**
2163  * Validate the raw decap action.
2164  *
2165  * @param[in] action_flags
2166  *   Holds the actions detected until now.
2167  * @param[in] action
2168  *   Pointer to the encap action.
2169  * @param[in] attr
2170  *   Pointer to flow attributes
2171  * @param[out] error
2172  *   Pointer to error structure.
2173  *
2174  * @return
2175  *   0 on success, a negative errno value otherwise and rte_errno is set.
2176  */
2177 static int
2178 flow_dv_validate_action_raw_decap(uint64_t action_flags,
2179                                   const struct rte_flow_action *action,
2180                                   const struct rte_flow_attr *attr,
2181                                   struct rte_flow_error *error)
2182 {
2183         const struct rte_flow_action_raw_decap *decap   = action->conf;
2184
2185         if (action_flags & MLX5_FLOW_ACTION_DROP)
2186                 return rte_flow_error_set(error, EINVAL,
2187                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2188                                           "can't drop and decap in same flow");
2189         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2190                 return rte_flow_error_set(error, EINVAL,
2191                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2192                                           "can't have encap action before"
2193                                           " decap action");
2194         if (action_flags & MLX5_FLOW_DECAP_ACTIONS)
2195                 return rte_flow_error_set(error, EINVAL,
2196                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2197                                           "can only have a single decap"
2198                                           " action in a flow");
2199         /* decap action is valid on egress only if it is followed by encap */
2200         if (attr->egress && decap &&
2201             decap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
2202                 return rte_flow_error_set(error, ENOTSUP,
2203                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2204                                           NULL, "decap action not supported"
2205                                           " for egress");
2206         } else if (decap && decap->size > MLX5_ENCAPSULATION_DECISION_SIZE &&
2207                    (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)) {
2208                 return rte_flow_error_set(error, EINVAL,
2209                                           RTE_FLOW_ERROR_TYPE_ACTION,
2210                                           NULL,
2211                                           "can't have decap action "
2212                                           "after modify action");
2213         }
2214         return 0;
2215 }
2216
2217 /**
2218  * Find existing encap/decap resource or create and register a new one.
2219  *
2220  * @param[in, out] dev
2221  *   Pointer to rte_eth_dev structure.
2222  * @param[in, out] resource
2223  *   Pointer to encap/decap resource.
2224  * @parm[in, out] dev_flow
2225  *   Pointer to the dev_flow.
2226  * @param[out] error
2227  *   pointer to error structure.
2228  *
2229  * @return
2230  *   0 on success otherwise -errno and errno is set.
2231  */
2232 static int
2233 flow_dv_encap_decap_resource_register
2234                         (struct rte_eth_dev *dev,
2235                          struct mlx5_flow_dv_encap_decap_resource *resource,
2236                          struct mlx5_flow *dev_flow,
2237                          struct rte_flow_error *error)
2238 {
2239         struct mlx5_priv *priv = dev->data->dev_private;
2240         struct mlx5_ibv_shared *sh = priv->sh;
2241         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2242         struct mlx5dv_dr_domain *domain;
2243
2244         resource->flags = dev_flow->group ? 0 : 1;
2245         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2246                 domain = sh->fdb_domain;
2247         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2248                 domain = sh->rx_domain;
2249         else
2250                 domain = sh->tx_domain;
2251
2252         /* Lookup a matching resource from cache. */
2253         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
2254                 if (resource->reformat_type == cache_resource->reformat_type &&
2255                     resource->ft_type == cache_resource->ft_type &&
2256                     resource->flags == cache_resource->flags &&
2257                     resource->size == cache_resource->size &&
2258                     !memcmp((const void *)resource->buf,
2259                             (const void *)cache_resource->buf,
2260                             resource->size)) {
2261                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
2262                                 (void *)cache_resource,
2263                                 rte_atomic32_read(&cache_resource->refcnt));
2264                         rte_atomic32_inc(&cache_resource->refcnt);
2265                         dev_flow->dv.encap_decap = cache_resource;
2266                         return 0;
2267                 }
2268         }
2269         /* Register new encap/decap resource. */
2270         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2271         if (!cache_resource)
2272                 return rte_flow_error_set(error, ENOMEM,
2273                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2274                                           "cannot allocate resource memory");
2275         *cache_resource = *resource;
2276         cache_resource->verbs_action =
2277                 mlx5_glue->dv_create_flow_action_packet_reformat
2278                         (sh->ctx, cache_resource->reformat_type,
2279                          cache_resource->ft_type, domain, cache_resource->flags,
2280                          cache_resource->size,
2281                          (cache_resource->size ? cache_resource->buf : NULL));
2282         if (!cache_resource->verbs_action) {
2283                 rte_free(cache_resource);
2284                 return rte_flow_error_set(error, ENOMEM,
2285                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2286                                           NULL, "cannot create action");
2287         }
2288         rte_atomic32_init(&cache_resource->refcnt);
2289         rte_atomic32_inc(&cache_resource->refcnt);
2290         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
2291         dev_flow->dv.encap_decap = cache_resource;
2292         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
2293                 (void *)cache_resource,
2294                 rte_atomic32_read(&cache_resource->refcnt));
2295         return 0;
2296 }
2297
2298 /**
2299  * Find existing table jump resource or create and register a new one.
2300  *
2301  * @param[in, out] dev
2302  *   Pointer to rte_eth_dev structure.
2303  * @param[in, out] tbl
2304  *   Pointer to flow table resource.
2305  * @parm[in, out] dev_flow
2306  *   Pointer to the dev_flow.
2307  * @param[out] error
2308  *   pointer to error structure.
2309  *
2310  * @return
2311  *   0 on success otherwise -errno and errno is set.
2312  */
2313 static int
2314 flow_dv_jump_tbl_resource_register
2315                         (struct rte_eth_dev *dev __rte_unused,
2316                          struct mlx5_flow_tbl_resource *tbl,
2317                          struct mlx5_flow *dev_flow,
2318                          struct rte_flow_error *error)
2319 {
2320         struct mlx5_flow_tbl_data_entry *tbl_data =
2321                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
2322         int cnt;
2323
2324         assert(tbl);
2325         cnt = rte_atomic32_read(&tbl_data->jump.refcnt);
2326         if (!cnt) {
2327                 tbl_data->jump.action =
2328                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
2329                         (tbl->obj);
2330                 if (!tbl_data->jump.action)
2331                         return rte_flow_error_set(error, ENOMEM,
2332                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2333                                         NULL, "cannot create jump action");
2334                 DRV_LOG(DEBUG, "new jump table resource %p: refcnt %d++",
2335                         (void *)&tbl_data->jump, cnt);
2336         } else {
2337                 assert(tbl_data->jump.action);
2338                 DRV_LOG(DEBUG, "existed jump table resource %p: refcnt %d++",
2339                         (void *)&tbl_data->jump, cnt);
2340         }
2341         rte_atomic32_inc(&tbl_data->jump.refcnt);
2342         dev_flow->dv.jump = &tbl_data->jump;
2343         return 0;
2344 }
2345
2346 /**
2347  * Find existing table port ID resource or create and register a new one.
2348  *
2349  * @param[in, out] dev
2350  *   Pointer to rte_eth_dev structure.
2351  * @param[in, out] resource
2352  *   Pointer to port ID action resource.
2353  * @parm[in, out] dev_flow
2354  *   Pointer to the dev_flow.
2355  * @param[out] error
2356  *   pointer to error structure.
2357  *
2358  * @return
2359  *   0 on success otherwise -errno and errno is set.
2360  */
2361 static int
2362 flow_dv_port_id_action_resource_register
2363                         (struct rte_eth_dev *dev,
2364                          struct mlx5_flow_dv_port_id_action_resource *resource,
2365                          struct mlx5_flow *dev_flow,
2366                          struct rte_flow_error *error)
2367 {
2368         struct mlx5_priv *priv = dev->data->dev_private;
2369         struct mlx5_ibv_shared *sh = priv->sh;
2370         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
2371
2372         /* Lookup a matching resource from cache. */
2373         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
2374                 if (resource->port_id == cache_resource->port_id) {
2375                         DRV_LOG(DEBUG, "port id action resource resource %p: "
2376                                 "refcnt %d++",
2377                                 (void *)cache_resource,
2378                                 rte_atomic32_read(&cache_resource->refcnt));
2379                         rte_atomic32_inc(&cache_resource->refcnt);
2380                         dev_flow->dv.port_id_action = cache_resource;
2381                         return 0;
2382                 }
2383         }
2384         /* Register new port id action resource. */
2385         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2386         if (!cache_resource)
2387                 return rte_flow_error_set(error, ENOMEM,
2388                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2389                                           "cannot allocate resource memory");
2390         *cache_resource = *resource;
2391         /*
2392          * Depending on rdma_core version the glue routine calls
2393          * either mlx5dv_dr_action_create_dest_ib_port(domain, ibv_port)
2394          * or mlx5dv_dr_action_create_dest_vport(domain, vport_id).
2395          */
2396         cache_resource->action =
2397                 mlx5_glue->dr_create_flow_action_dest_port
2398                         (priv->sh->fdb_domain, resource->port_id);
2399         if (!cache_resource->action) {
2400                 rte_free(cache_resource);
2401                 return rte_flow_error_set(error, ENOMEM,
2402                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2403                                           NULL, "cannot create action");
2404         }
2405         rte_atomic32_init(&cache_resource->refcnt);
2406         rte_atomic32_inc(&cache_resource->refcnt);
2407         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
2408         dev_flow->dv.port_id_action = cache_resource;
2409         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
2410                 (void *)cache_resource,
2411                 rte_atomic32_read(&cache_resource->refcnt));
2412         return 0;
2413 }
2414
2415 /**
2416  * Find existing push vlan resource or create and register a new one.
2417  *
2418  * @param [in, out] dev
2419  *   Pointer to rte_eth_dev structure.
2420  * @param[in, out] resource
2421  *   Pointer to port ID action resource.
2422  * @parm[in, out] dev_flow
2423  *   Pointer to the dev_flow.
2424  * @param[out] error
2425  *   pointer to error structure.
2426  *
2427  * @return
2428  *   0 on success otherwise -errno and errno is set.
2429  */
2430 static int
2431 flow_dv_push_vlan_action_resource_register
2432                        (struct rte_eth_dev *dev,
2433                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
2434                         struct mlx5_flow *dev_flow,
2435                         struct rte_flow_error *error)
2436 {
2437         struct mlx5_priv *priv = dev->data->dev_private;
2438         struct mlx5_ibv_shared *sh = priv->sh;
2439         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource;
2440         struct mlx5dv_dr_domain *domain;
2441
2442         /* Lookup a matching resource from cache. */
2443         LIST_FOREACH(cache_resource, &sh->push_vlan_action_list, next) {
2444                 if (resource->vlan_tag == cache_resource->vlan_tag &&
2445                     resource->ft_type == cache_resource->ft_type) {
2446                         DRV_LOG(DEBUG, "push-VLAN action resource resource %p: "
2447                                 "refcnt %d++",
2448                                 (void *)cache_resource,
2449                                 rte_atomic32_read(&cache_resource->refcnt));
2450                         rte_atomic32_inc(&cache_resource->refcnt);
2451                         dev_flow->dv.push_vlan_res = cache_resource;
2452                         return 0;
2453                 }
2454         }
2455         /* Register new push_vlan action resource. */
2456         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2457         if (!cache_resource)
2458                 return rte_flow_error_set(error, ENOMEM,
2459                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2460                                           "cannot allocate resource memory");
2461         *cache_resource = *resource;
2462         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2463                 domain = sh->fdb_domain;
2464         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2465                 domain = sh->rx_domain;
2466         else
2467                 domain = sh->tx_domain;
2468         cache_resource->action =
2469                 mlx5_glue->dr_create_flow_action_push_vlan(domain,
2470                                                            resource->vlan_tag);
2471         if (!cache_resource->action) {
2472                 rte_free(cache_resource);
2473                 return rte_flow_error_set(error, ENOMEM,
2474                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2475                                           NULL, "cannot create action");
2476         }
2477         rte_atomic32_init(&cache_resource->refcnt);
2478         rte_atomic32_inc(&cache_resource->refcnt);
2479         LIST_INSERT_HEAD(&sh->push_vlan_action_list, cache_resource, next);
2480         dev_flow->dv.push_vlan_res = cache_resource;
2481         DRV_LOG(DEBUG, "new push vlan action resource %p: refcnt %d++",
2482                 (void *)cache_resource,
2483                 rte_atomic32_read(&cache_resource->refcnt));
2484         return 0;
2485 }
2486 /**
2487  * Get the size of specific rte_flow_item_type
2488  *
2489  * @param[in] item_type
2490  *   Tested rte_flow_item_type.
2491  *
2492  * @return
2493  *   sizeof struct item_type, 0 if void or irrelevant.
2494  */
2495 static size_t
2496 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
2497 {
2498         size_t retval;
2499
2500         switch (item_type) {
2501         case RTE_FLOW_ITEM_TYPE_ETH:
2502                 retval = sizeof(struct rte_flow_item_eth);
2503                 break;
2504         case RTE_FLOW_ITEM_TYPE_VLAN:
2505                 retval = sizeof(struct rte_flow_item_vlan);
2506                 break;
2507         case RTE_FLOW_ITEM_TYPE_IPV4:
2508                 retval = sizeof(struct rte_flow_item_ipv4);
2509                 break;
2510         case RTE_FLOW_ITEM_TYPE_IPV6:
2511                 retval = sizeof(struct rte_flow_item_ipv6);
2512                 break;
2513         case RTE_FLOW_ITEM_TYPE_UDP:
2514                 retval = sizeof(struct rte_flow_item_udp);
2515                 break;
2516         case RTE_FLOW_ITEM_TYPE_TCP:
2517                 retval = sizeof(struct rte_flow_item_tcp);
2518                 break;
2519         case RTE_FLOW_ITEM_TYPE_VXLAN:
2520                 retval = sizeof(struct rte_flow_item_vxlan);
2521                 break;
2522         case RTE_FLOW_ITEM_TYPE_GRE:
2523                 retval = sizeof(struct rte_flow_item_gre);
2524                 break;
2525         case RTE_FLOW_ITEM_TYPE_NVGRE:
2526                 retval = sizeof(struct rte_flow_item_nvgre);
2527                 break;
2528         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2529                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
2530                 break;
2531         case RTE_FLOW_ITEM_TYPE_MPLS:
2532                 retval = sizeof(struct rte_flow_item_mpls);
2533                 break;
2534         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
2535         default:
2536                 retval = 0;
2537                 break;
2538         }
2539         return retval;
2540 }
2541
2542 #define MLX5_ENCAP_IPV4_VERSION         0x40
2543 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
2544 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
2545 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
2546 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
2547 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
2548 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
2549
2550 /**
2551  * Convert the encap action data from list of rte_flow_item to raw buffer
2552  *
2553  * @param[in] items
2554  *   Pointer to rte_flow_item objects list.
2555  * @param[out] buf
2556  *   Pointer to the output buffer.
2557  * @param[out] size
2558  *   Pointer to the output buffer size.
2559  * @param[out] error
2560  *   Pointer to the error structure.
2561  *
2562  * @return
2563  *   0 on success, a negative errno value otherwise and rte_errno is set.
2564  */
2565 static int
2566 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
2567                            size_t *size, struct rte_flow_error *error)
2568 {
2569         struct rte_ether_hdr *eth = NULL;
2570         struct rte_vlan_hdr *vlan = NULL;
2571         struct rte_ipv4_hdr *ipv4 = NULL;
2572         struct rte_ipv6_hdr *ipv6 = NULL;
2573         struct rte_udp_hdr *udp = NULL;
2574         struct rte_vxlan_hdr *vxlan = NULL;
2575         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
2576         struct rte_gre_hdr *gre = NULL;
2577         size_t len;
2578         size_t temp_size = 0;
2579
2580         if (!items)
2581                 return rte_flow_error_set(error, EINVAL,
2582                                           RTE_FLOW_ERROR_TYPE_ACTION,
2583                                           NULL, "invalid empty data");
2584         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2585                 len = flow_dv_get_item_len(items->type);
2586                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
2587                         return rte_flow_error_set(error, EINVAL,
2588                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2589                                                   (void *)items->type,
2590                                                   "items total size is too big"
2591                                                   " for encap action");
2592                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
2593                 switch (items->type) {
2594                 case RTE_FLOW_ITEM_TYPE_ETH:
2595                         eth = (struct rte_ether_hdr *)&buf[temp_size];
2596                         break;
2597                 case RTE_FLOW_ITEM_TYPE_VLAN:
2598                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
2599                         if (!eth)
2600                                 return rte_flow_error_set(error, EINVAL,
2601                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2602                                                 (void *)items->type,
2603                                                 "eth header not found");
2604                         if (!eth->ether_type)
2605                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
2606                         break;
2607                 case RTE_FLOW_ITEM_TYPE_IPV4:
2608                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
2609                         if (!vlan && !eth)
2610                                 return rte_flow_error_set(error, EINVAL,
2611                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2612                                                 (void *)items->type,
2613                                                 "neither eth nor vlan"
2614                                                 " header found");
2615                         if (vlan && !vlan->eth_proto)
2616                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2617                         else if (eth && !eth->ether_type)
2618                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2619                         if (!ipv4->version_ihl)
2620                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
2621                                                     MLX5_ENCAP_IPV4_IHL_MIN;
2622                         if (!ipv4->time_to_live)
2623                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
2624                         break;
2625                 case RTE_FLOW_ITEM_TYPE_IPV6:
2626                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
2627                         if (!vlan && !eth)
2628                                 return rte_flow_error_set(error, EINVAL,
2629                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2630                                                 (void *)items->type,
2631                                                 "neither eth nor vlan"
2632                                                 " header found");
2633                         if (vlan && !vlan->eth_proto)
2634                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2635                         else if (eth && !eth->ether_type)
2636                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2637                         if (!ipv6->vtc_flow)
2638                                 ipv6->vtc_flow =
2639                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
2640                         if (!ipv6->hop_limits)
2641                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
2642                         break;
2643                 case RTE_FLOW_ITEM_TYPE_UDP:
2644                         udp = (struct rte_udp_hdr *)&buf[temp_size];
2645                         if (!ipv4 && !ipv6)
2646                                 return rte_flow_error_set(error, EINVAL,
2647                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2648                                                 (void *)items->type,
2649                                                 "ip header not found");
2650                         if (ipv4 && !ipv4->next_proto_id)
2651                                 ipv4->next_proto_id = IPPROTO_UDP;
2652                         else if (ipv6 && !ipv6->proto)
2653                                 ipv6->proto = IPPROTO_UDP;
2654                         break;
2655                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2656                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
2657                         if (!udp)
2658                                 return rte_flow_error_set(error, EINVAL,
2659                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2660                                                 (void *)items->type,
2661                                                 "udp header not found");
2662                         if (!udp->dst_port)
2663                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
2664                         if (!vxlan->vx_flags)
2665                                 vxlan->vx_flags =
2666                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
2667                         break;
2668                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2669                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
2670                         if (!udp)
2671                                 return rte_flow_error_set(error, EINVAL,
2672                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2673                                                 (void *)items->type,
2674                                                 "udp header not found");
2675                         if (!vxlan_gpe->proto)
2676                                 return rte_flow_error_set(error, EINVAL,
2677                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2678                                                 (void *)items->type,
2679                                                 "next protocol not found");
2680                         if (!udp->dst_port)
2681                                 udp->dst_port =
2682                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
2683                         if (!vxlan_gpe->vx_flags)
2684                                 vxlan_gpe->vx_flags =
2685                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
2686                         break;
2687                 case RTE_FLOW_ITEM_TYPE_GRE:
2688                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2689                         gre = (struct rte_gre_hdr *)&buf[temp_size];
2690                         if (!gre->proto)
2691                                 return rte_flow_error_set(error, EINVAL,
2692                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2693                                                 (void *)items->type,
2694                                                 "next protocol not found");
2695                         if (!ipv4 && !ipv6)
2696                                 return rte_flow_error_set(error, EINVAL,
2697                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2698                                                 (void *)items->type,
2699                                                 "ip header not found");
2700                         if (ipv4 && !ipv4->next_proto_id)
2701                                 ipv4->next_proto_id = IPPROTO_GRE;
2702                         else if (ipv6 && !ipv6->proto)
2703                                 ipv6->proto = IPPROTO_GRE;
2704                         break;
2705                 case RTE_FLOW_ITEM_TYPE_VOID:
2706                         break;
2707                 default:
2708                         return rte_flow_error_set(error, EINVAL,
2709                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2710                                                   (void *)items->type,
2711                                                   "unsupported item type");
2712                         break;
2713                 }
2714                 temp_size += len;
2715         }
2716         *size = temp_size;
2717         return 0;
2718 }
2719
2720 static int
2721 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
2722 {
2723         struct rte_ether_hdr *eth = NULL;
2724         struct rte_vlan_hdr *vlan = NULL;
2725         struct rte_ipv6_hdr *ipv6 = NULL;
2726         struct rte_udp_hdr *udp = NULL;
2727         char *next_hdr;
2728         uint16_t proto;
2729
2730         eth = (struct rte_ether_hdr *)data;
2731         next_hdr = (char *)(eth + 1);
2732         proto = RTE_BE16(eth->ether_type);
2733
2734         /* VLAN skipping */
2735         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
2736                 vlan = (struct rte_vlan_hdr *)next_hdr;
2737                 proto = RTE_BE16(vlan->eth_proto);
2738                 next_hdr += sizeof(struct rte_vlan_hdr);
2739         }
2740
2741         /* HW calculates IPv4 csum. no need to proceed */
2742         if (proto == RTE_ETHER_TYPE_IPV4)
2743                 return 0;
2744
2745         /* non IPv4/IPv6 header. not supported */
2746         if (proto != RTE_ETHER_TYPE_IPV6) {
2747                 return rte_flow_error_set(error, ENOTSUP,
2748                                           RTE_FLOW_ERROR_TYPE_ACTION,
2749                                           NULL, "Cannot offload non IPv4/IPv6");
2750         }
2751
2752         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
2753
2754         /* ignore non UDP */
2755         if (ipv6->proto != IPPROTO_UDP)
2756                 return 0;
2757
2758         udp = (struct rte_udp_hdr *)(ipv6 + 1);
2759         udp->dgram_cksum = 0;
2760
2761         return 0;
2762 }
2763
2764 /**
2765  * Convert L2 encap action to DV specification.
2766  *
2767  * @param[in] dev
2768  *   Pointer to rte_eth_dev structure.
2769  * @param[in] action
2770  *   Pointer to action structure.
2771  * @param[in, out] dev_flow
2772  *   Pointer to the mlx5_flow.
2773  * @param[in] transfer
2774  *   Mark if the flow is E-Switch flow.
2775  * @param[out] error
2776  *   Pointer to the error structure.
2777  *
2778  * @return
2779  *   0 on success, a negative errno value otherwise and rte_errno is set.
2780  */
2781 static int
2782 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
2783                                const struct rte_flow_action *action,
2784                                struct mlx5_flow *dev_flow,
2785                                uint8_t transfer,
2786                                struct rte_flow_error *error)
2787 {
2788         const struct rte_flow_item *encap_data;
2789         const struct rte_flow_action_raw_encap *raw_encap_data;
2790         struct mlx5_flow_dv_encap_decap_resource res = {
2791                 .reformat_type =
2792                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
2793                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2794                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
2795         };
2796
2797         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
2798                 raw_encap_data =
2799                         (const struct rte_flow_action_raw_encap *)action->conf;
2800                 res.size = raw_encap_data->size;
2801                 memcpy(res.buf, raw_encap_data->data, res.size);
2802                 if (flow_dv_zero_encap_udp_csum(res.buf, error))
2803                         return -rte_errno;
2804         } else {
2805                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
2806                         encap_data =
2807                                 ((const struct rte_flow_action_vxlan_encap *)
2808                                                 action->conf)->definition;
2809                 else
2810                         encap_data =
2811                                 ((const struct rte_flow_action_nvgre_encap *)
2812                                                 action->conf)->definition;
2813                 if (flow_dv_convert_encap_data(encap_data, res.buf,
2814                                                &res.size, error))
2815                         return -rte_errno;
2816         }
2817         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2818                 return rte_flow_error_set(error, EINVAL,
2819                                           RTE_FLOW_ERROR_TYPE_ACTION,
2820                                           NULL, "can't create L2 encap action");
2821         return 0;
2822 }
2823
2824 /**
2825  * Convert L2 decap action to DV specification.
2826  *
2827  * @param[in] dev
2828  *   Pointer to rte_eth_dev structure.
2829  * @param[in, out] dev_flow
2830  *   Pointer to the mlx5_flow.
2831  * @param[in] transfer
2832  *   Mark if the flow is E-Switch flow.
2833  * @param[out] error
2834  *   Pointer to the error structure.
2835  *
2836  * @return
2837  *   0 on success, a negative errno value otherwise and rte_errno is set.
2838  */
2839 static int
2840 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
2841                                struct mlx5_flow *dev_flow,
2842                                uint8_t transfer,
2843                                struct rte_flow_error *error)
2844 {
2845         struct mlx5_flow_dv_encap_decap_resource res = {
2846                 .size = 0,
2847                 .reformat_type =
2848                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
2849                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2850                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
2851         };
2852
2853         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2854                 return rte_flow_error_set(error, EINVAL,
2855                                           RTE_FLOW_ERROR_TYPE_ACTION,
2856                                           NULL, "can't create L2 decap action");
2857         return 0;
2858 }
2859
2860 /**
2861  * Convert raw decap/encap (L3 tunnel) action to DV specification.
2862  *
2863  * @param[in] dev
2864  *   Pointer to rte_eth_dev structure.
2865  * @param[in] action
2866  *   Pointer to action structure.
2867  * @param[in, out] dev_flow
2868  *   Pointer to the mlx5_flow.
2869  * @param[in] attr
2870  *   Pointer to the flow attributes.
2871  * @param[out] error
2872  *   Pointer to the error structure.
2873  *
2874  * @return
2875  *   0 on success, a negative errno value otherwise and rte_errno is set.
2876  */
2877 static int
2878 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
2879                                 const struct rte_flow_action *action,
2880                                 struct mlx5_flow *dev_flow,
2881                                 const struct rte_flow_attr *attr,
2882                                 struct rte_flow_error *error)
2883 {
2884         const struct rte_flow_action_raw_encap *encap_data;
2885         struct mlx5_flow_dv_encap_decap_resource res;
2886
2887         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
2888         res.size = encap_data->size;
2889         memcpy(res.buf, encap_data->data, res.size);
2890         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
2891                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
2892                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
2893         if (attr->transfer)
2894                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
2895         else
2896                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
2897                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
2898         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2899                 return rte_flow_error_set(error, EINVAL,
2900                                           RTE_FLOW_ERROR_TYPE_ACTION,
2901                                           NULL, "can't create encap action");
2902         return 0;
2903 }
2904
2905 /**
2906  * Create action push VLAN.
2907  *
2908  * @param[in] dev
2909  *   Pointer to rte_eth_dev structure.
2910  * @param[in] vlan_tag
2911  *   the vlan tag to push to the Ethernet header.
2912  * @param[in, out] dev_flow
2913  *   Pointer to the mlx5_flow.
2914  * @param[in] attr
2915  *   Pointer to the flow attributes.
2916  * @param[out] error
2917  *   Pointer to the error structure.
2918  *
2919  * @return
2920  *   0 on success, a negative errno value otherwise and rte_errno is set.
2921  */
2922 static int
2923 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
2924                                 const struct rte_flow_attr *attr,
2925                                 const struct rte_vlan_hdr *vlan,
2926                                 struct mlx5_flow *dev_flow,
2927                                 struct rte_flow_error *error)
2928 {
2929         struct mlx5_flow_dv_push_vlan_action_resource res;
2930
2931         res.vlan_tag =
2932                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
2933                                  vlan->vlan_tci);
2934         if (attr->transfer)
2935                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
2936         else
2937                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
2938                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
2939         return flow_dv_push_vlan_action_resource_register
2940                                             (dev, &res, dev_flow, error);
2941 }
2942
2943 /**
2944  * Validate the modify-header actions.
2945  *
2946  * @param[in] action_flags
2947  *   Holds the actions detected until now.
2948  * @param[in] action
2949  *   Pointer to the modify action.
2950  * @param[out] error
2951  *   Pointer to error structure.
2952  *
2953  * @return
2954  *   0 on success, a negative errno value otherwise and rte_errno is set.
2955  */
2956 static int
2957 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
2958                                    const struct rte_flow_action *action,
2959                                    struct rte_flow_error *error)
2960 {
2961         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
2962                 return rte_flow_error_set(error, EINVAL,
2963                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2964                                           NULL, "action configuration not set");
2965         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2966                 return rte_flow_error_set(error, EINVAL,
2967                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2968                                           "can't have encap action before"
2969                                           " modify action");
2970         return 0;
2971 }
2972
2973 /**
2974  * Validate the modify-header MAC address actions.
2975  *
2976  * @param[in] action_flags
2977  *   Holds the actions detected until now.
2978  * @param[in] action
2979  *   Pointer to the modify action.
2980  * @param[in] item_flags
2981  *   Holds the items detected.
2982  * @param[out] error
2983  *   Pointer to error structure.
2984  *
2985  * @return
2986  *   0 on success, a negative errno value otherwise and rte_errno is set.
2987  */
2988 static int
2989 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
2990                                    const struct rte_flow_action *action,
2991                                    const uint64_t item_flags,
2992                                    struct rte_flow_error *error)
2993 {
2994         int ret = 0;
2995
2996         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
2997         if (!ret) {
2998                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
2999                         return rte_flow_error_set(error, EINVAL,
3000                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3001                                                   NULL,
3002                                                   "no L2 item in pattern");
3003         }
3004         return ret;
3005 }
3006
3007 /**
3008  * Validate the modify-header IPv4 address actions.
3009  *
3010  * @param[in] action_flags
3011  *   Holds the actions detected until now.
3012  * @param[in] action
3013  *   Pointer to the modify action.
3014  * @param[in] item_flags
3015  *   Holds the items detected.
3016  * @param[out] error
3017  *   Pointer to error structure.
3018  *
3019  * @return
3020  *   0 on success, a negative errno value otherwise and rte_errno is set.
3021  */
3022 static int
3023 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
3024                                     const struct rte_flow_action *action,
3025                                     const uint64_t item_flags,
3026                                     struct rte_flow_error *error)
3027 {
3028         int ret = 0;
3029
3030         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3031         if (!ret) {
3032                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3033                         return rte_flow_error_set(error, EINVAL,
3034                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3035                                                   NULL,
3036                                                   "no ipv4 item in pattern");
3037         }
3038         return ret;
3039 }
3040
3041 /**
3042  * Validate the modify-header IPv6 address actions.
3043  *
3044  * @param[in] action_flags
3045  *   Holds the actions detected until now.
3046  * @param[in] action
3047  *   Pointer to the modify action.
3048  * @param[in] item_flags
3049  *   Holds the items detected.
3050  * @param[out] error
3051  *   Pointer to error structure.
3052  *
3053  * @return
3054  *   0 on success, a negative errno value otherwise and rte_errno is set.
3055  */
3056 static int
3057 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
3058                                     const struct rte_flow_action *action,
3059                                     const uint64_t item_flags,
3060                                     struct rte_flow_error *error)
3061 {
3062         int ret = 0;
3063
3064         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3065         if (!ret) {
3066                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3067                         return rte_flow_error_set(error, EINVAL,
3068                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3069                                                   NULL,
3070                                                   "no ipv6 item in pattern");
3071         }
3072         return ret;
3073 }
3074
3075 /**
3076  * Validate the modify-header TP actions.
3077  *
3078  * @param[in] action_flags
3079  *   Holds the actions detected until now.
3080  * @param[in] action
3081  *   Pointer to the modify action.
3082  * @param[in] item_flags
3083  *   Holds the items detected.
3084  * @param[out] error
3085  *   Pointer to error structure.
3086  *
3087  * @return
3088  *   0 on success, a negative errno value otherwise and rte_errno is set.
3089  */
3090 static int
3091 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
3092                                   const struct rte_flow_action *action,
3093                                   const uint64_t item_flags,
3094                                   struct rte_flow_error *error)
3095 {
3096         int ret = 0;
3097
3098         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3099         if (!ret) {
3100                 if (!(item_flags & MLX5_FLOW_LAYER_L4))
3101                         return rte_flow_error_set(error, EINVAL,
3102                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3103                                                   NULL, "no transport layer "
3104                                                   "in pattern");
3105         }
3106         return ret;
3107 }
3108
3109 /**
3110  * Validate the modify-header actions of increment/decrement
3111  * TCP Sequence-number.
3112  *
3113  * @param[in] action_flags
3114  *   Holds the actions detected until now.
3115  * @param[in] action
3116  *   Pointer to the modify action.
3117  * @param[in] item_flags
3118  *   Holds the items detected.
3119  * @param[out] error
3120  *   Pointer to error structure.
3121  *
3122  * @return
3123  *   0 on success, a negative errno value otherwise and rte_errno is set.
3124  */
3125 static int
3126 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
3127                                        const struct rte_flow_action *action,
3128                                        const uint64_t item_flags,
3129                                        struct rte_flow_error *error)
3130 {
3131         int ret = 0;
3132
3133         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3134         if (!ret) {
3135                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3136                         return rte_flow_error_set(error, EINVAL,
3137                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3138                                                   NULL, "no TCP item in"
3139                                                   " pattern");
3140                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
3141                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
3142                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
3143                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
3144                         return rte_flow_error_set(error, EINVAL,
3145                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3146                                                   NULL,
3147                                                   "cannot decrease and increase"
3148                                                   " TCP sequence number"
3149                                                   " at the same time");
3150         }
3151         return ret;
3152 }
3153
3154 /**
3155  * Validate the modify-header actions of increment/decrement
3156  * TCP Acknowledgment number.
3157  *
3158  * @param[in] action_flags
3159  *   Holds the actions detected until now.
3160  * @param[in] action
3161  *   Pointer to the modify action.
3162  * @param[in] item_flags
3163  *   Holds the items detected.
3164  * @param[out] error
3165  *   Pointer to error structure.
3166  *
3167  * @return
3168  *   0 on success, a negative errno value otherwise and rte_errno is set.
3169  */
3170 static int
3171 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
3172                                        const struct rte_flow_action *action,
3173                                        const uint64_t item_flags,
3174                                        struct rte_flow_error *error)
3175 {
3176         int ret = 0;
3177
3178         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3179         if (!ret) {
3180                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3181                         return rte_flow_error_set(error, EINVAL,
3182                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3183                                                   NULL, "no TCP item in"
3184                                                   " pattern");
3185                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
3186                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
3187                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
3188                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
3189                         return rte_flow_error_set(error, EINVAL,
3190                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3191                                                   NULL,
3192                                                   "cannot decrease and increase"
3193                                                   " TCP acknowledgment number"
3194                                                   " at the same time");
3195         }
3196         return ret;
3197 }
3198
3199 /**
3200  * Validate the modify-header TTL actions.
3201  *
3202  * @param[in] action_flags
3203  *   Holds the actions detected until now.
3204  * @param[in] action
3205  *   Pointer to the modify action.
3206  * @param[in] item_flags
3207  *   Holds the items detected.
3208  * @param[out] error
3209  *   Pointer to error structure.
3210  *
3211  * @return
3212  *   0 on success, a negative errno value otherwise and rte_errno is set.
3213  */
3214 static int
3215 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
3216                                    const struct rte_flow_action *action,
3217                                    const uint64_t item_flags,
3218                                    struct rte_flow_error *error)
3219 {
3220         int ret = 0;
3221
3222         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3223         if (!ret) {
3224                 if (!(item_flags & MLX5_FLOW_LAYER_L3))
3225                         return rte_flow_error_set(error, EINVAL,
3226                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3227                                                   NULL,
3228                                                   "no IP protocol in pattern");
3229         }
3230         return ret;
3231 }
3232
3233 /**
3234  * Validate jump action.
3235  *
3236  * @param[in] action
3237  *   Pointer to the jump action.
3238  * @param[in] action_flags
3239  *   Holds the actions detected until now.
3240  * @param[in] attributes
3241  *   Pointer to flow attributes
3242  * @param[in] external
3243  *   Action belongs to flow rule created by request external to PMD.
3244  * @param[out] error
3245  *   Pointer to error structure.
3246  *
3247  * @return
3248  *   0 on success, a negative errno value otherwise and rte_errno is set.
3249  */
3250 static int
3251 flow_dv_validate_action_jump(const struct rte_flow_action *action,
3252                              uint64_t action_flags,
3253                              const struct rte_flow_attr *attributes,
3254                              bool external, struct rte_flow_error *error)
3255 {
3256         uint32_t target_group, table;
3257         int ret = 0;
3258
3259         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3260                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3261                 return rte_flow_error_set(error, EINVAL,
3262                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3263                                           "can't have 2 fate actions in"
3264                                           " same flow");
3265         if (action_flags & MLX5_FLOW_ACTION_METER)
3266                 return rte_flow_error_set(error, ENOTSUP,
3267                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3268                                           "jump with meter not support");
3269         if (!action->conf)
3270                 return rte_flow_error_set(error, EINVAL,
3271                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3272                                           NULL, "action configuration not set");
3273         target_group =
3274                 ((const struct rte_flow_action_jump *)action->conf)->group;
3275         ret = mlx5_flow_group_to_table(attributes, external, target_group,
3276                                        &table, error);
3277         if (ret)
3278                 return ret;
3279         if (attributes->group == target_group)
3280                 return rte_flow_error_set(error, EINVAL,
3281                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3282                                           "target group must be other than"
3283                                           " the current flow group");
3284         return 0;
3285 }
3286
3287 /*
3288  * Validate the port_id action.
3289  *
3290  * @param[in] dev
3291  *   Pointer to rte_eth_dev structure.
3292  * @param[in] action_flags
3293  *   Bit-fields that holds the actions detected until now.
3294  * @param[in] action
3295  *   Port_id RTE action structure.
3296  * @param[in] attr
3297  *   Attributes of flow that includes this action.
3298  * @param[out] error
3299  *   Pointer to error structure.
3300  *
3301  * @return
3302  *   0 on success, a negative errno value otherwise and rte_errno is set.
3303  */
3304 static int
3305 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
3306                                 uint64_t action_flags,
3307                                 const struct rte_flow_action *action,
3308                                 const struct rte_flow_attr *attr,
3309                                 struct rte_flow_error *error)
3310 {
3311         const struct rte_flow_action_port_id *port_id;
3312         struct mlx5_priv *act_priv;
3313         struct mlx5_priv *dev_priv;
3314         uint16_t port;
3315
3316         if (!attr->transfer)
3317                 return rte_flow_error_set(error, ENOTSUP,
3318                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3319                                           NULL,
3320                                           "port id action is valid in transfer"
3321                                           " mode only");
3322         if (!action || !action->conf)
3323                 return rte_flow_error_set(error, ENOTSUP,
3324                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3325                                           NULL,
3326                                           "port id action parameters must be"
3327                                           " specified");
3328         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3329                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3330                 return rte_flow_error_set(error, EINVAL,
3331                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3332                                           "can have only one fate actions in"
3333                                           " a flow");
3334         dev_priv = mlx5_dev_to_eswitch_info(dev);
3335         if (!dev_priv)
3336                 return rte_flow_error_set(error, rte_errno,
3337                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3338                                           NULL,
3339                                           "failed to obtain E-Switch info");
3340         port_id = action->conf;
3341         port = port_id->original ? dev->data->port_id : port_id->id;
3342         act_priv = mlx5_port_to_eswitch_info(port, false);
3343         if (!act_priv)
3344                 return rte_flow_error_set
3345                                 (error, rte_errno,
3346                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
3347                                  "failed to obtain E-Switch port id for port");
3348         if (act_priv->domain_id != dev_priv->domain_id)
3349                 return rte_flow_error_set
3350                                 (error, EINVAL,
3351                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3352                                  "port does not belong to"
3353                                  " E-Switch being configured");
3354         return 0;
3355 }
3356
3357 /**
3358  * Get the maximum number of modify header actions.
3359  *
3360  * @param dev
3361  *   Pointer to rte_eth_dev structure.
3362  *
3363  * @return
3364  *   Max number of modify header actions device can support.
3365  */
3366 static unsigned int
3367 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev)
3368 {
3369         /*
3370          * There's no way to directly query the max cap. Although it has to be
3371          * acquried by iterative trial, it is a safe assumption that more
3372          * actions are supported by FW if extensive metadata register is
3373          * supported.
3374          */
3375         return mlx5_flow_ext_mreg_supported(dev) ? MLX5_MODIFY_NUM :
3376                                                    MLX5_MODIFY_NUM_NO_MREG;
3377 }
3378
3379 /**
3380  * Validate the meter action.
3381  *
3382  * @param[in] dev
3383  *   Pointer to rte_eth_dev structure.
3384  * @param[in] action_flags
3385  *   Bit-fields that holds the actions detected until now.
3386  * @param[in] action
3387  *   Pointer to the meter action.
3388  * @param[in] attr
3389  *   Attributes of flow that includes this action.
3390  * @param[out] error
3391  *   Pointer to error structure.
3392  *
3393  * @return
3394  *   0 on success, a negative errno value otherwise and rte_ernno is set.
3395  */
3396 static int
3397 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
3398                                 uint64_t action_flags,
3399                                 const struct rte_flow_action *action,
3400                                 const struct rte_flow_attr *attr,
3401                                 struct rte_flow_error *error)
3402 {
3403         struct mlx5_priv *priv = dev->data->dev_private;
3404         const struct rte_flow_action_meter *am = action->conf;
3405         struct mlx5_flow_meter *fm;
3406
3407         if (!am)
3408                 return rte_flow_error_set(error, EINVAL,
3409                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3410                                           "meter action conf is NULL");
3411
3412         if (action_flags & MLX5_FLOW_ACTION_METER)
3413                 return rte_flow_error_set(error, ENOTSUP,
3414                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3415                                           "meter chaining not support");
3416         if (action_flags & MLX5_FLOW_ACTION_JUMP)
3417                 return rte_flow_error_set(error, ENOTSUP,
3418                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3419                                           "meter with jump not support");
3420         if (!priv->mtr_en)
3421                 return rte_flow_error_set(error, ENOTSUP,
3422                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3423                                           NULL,
3424                                           "meter action not supported");
3425         fm = mlx5_flow_meter_find(priv, am->mtr_id);
3426         if (!fm)
3427                 return rte_flow_error_set(error, EINVAL,
3428                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3429                                           "Meter not found");
3430         if (fm->ref_cnt && (!(fm->attr.transfer == attr->transfer ||
3431               (!fm->attr.ingress && !attr->ingress && attr->egress) ||
3432               (!fm->attr.egress && !attr->egress && attr->ingress))))
3433                 return rte_flow_error_set(error, EINVAL,
3434                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3435                                           "Flow attributes are either invalid "
3436                                           "or have a conflict with current "
3437                                           "meter attributes");
3438         return 0;
3439 }
3440
3441 /**
3442  * Find existing modify-header resource or create and register a new one.
3443  *
3444  * @param dev[in, out]
3445  *   Pointer to rte_eth_dev structure.
3446  * @param[in, out] resource
3447  *   Pointer to modify-header resource.
3448  * @parm[in, out] dev_flow
3449  *   Pointer to the dev_flow.
3450  * @param[out] error
3451  *   pointer to error structure.
3452  *
3453  * @return
3454  *   0 on success otherwise -errno and errno is set.
3455  */
3456 static int
3457 flow_dv_modify_hdr_resource_register
3458                         (struct rte_eth_dev *dev,
3459                          struct mlx5_flow_dv_modify_hdr_resource *resource,
3460                          struct mlx5_flow *dev_flow,
3461                          struct rte_flow_error *error)
3462 {
3463         struct mlx5_priv *priv = dev->data->dev_private;
3464         struct mlx5_ibv_shared *sh = priv->sh;
3465         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
3466         struct mlx5dv_dr_domain *ns;
3467
3468         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev))
3469                 return rte_flow_error_set(error, EOVERFLOW,
3470                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3471                                           "too many modify header items");
3472         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3473                 ns = sh->fdb_domain;
3474         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
3475                 ns = sh->tx_domain;
3476         else
3477                 ns = sh->rx_domain;
3478         resource->flags =
3479                 dev_flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
3480         /* Lookup a matching resource from cache. */
3481         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
3482                 if (resource->ft_type == cache_resource->ft_type &&
3483                     resource->actions_num == cache_resource->actions_num &&
3484                     resource->flags == cache_resource->flags &&
3485                     !memcmp((const void *)resource->actions,
3486                             (const void *)cache_resource->actions,
3487                             (resource->actions_num *
3488                                             sizeof(resource->actions[0])))) {
3489                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
3490                                 (void *)cache_resource,
3491                                 rte_atomic32_read(&cache_resource->refcnt));
3492                         rte_atomic32_inc(&cache_resource->refcnt);
3493                         dev_flow->dv.modify_hdr = cache_resource;
3494                         return 0;
3495                 }
3496         }
3497         /* Register new modify-header resource. */
3498         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
3499         if (!cache_resource)
3500                 return rte_flow_error_set(error, ENOMEM,
3501                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3502                                           "cannot allocate resource memory");
3503         *cache_resource = *resource;
3504         cache_resource->verbs_action =
3505                 mlx5_glue->dv_create_flow_action_modify_header
3506                                         (sh->ctx, cache_resource->ft_type,
3507                                          ns, cache_resource->flags,
3508                                          cache_resource->actions_num *
3509                                          sizeof(cache_resource->actions[0]),
3510                                          (uint64_t *)cache_resource->actions);
3511         if (!cache_resource->verbs_action) {
3512                 rte_free(cache_resource);
3513                 return rte_flow_error_set(error, ENOMEM,
3514                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3515                                           NULL, "cannot create action");
3516         }
3517         rte_atomic32_init(&cache_resource->refcnt);
3518         rte_atomic32_inc(&cache_resource->refcnt);
3519         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
3520         dev_flow->dv.modify_hdr = cache_resource;
3521         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
3522                 (void *)cache_resource,
3523                 rte_atomic32_read(&cache_resource->refcnt));
3524         return 0;
3525 }
3526
3527 #define MLX5_CNT_CONTAINER_RESIZE 64
3528
3529 /**
3530  * Get or create a flow counter.
3531  *
3532  * @param[in] dev
3533  *   Pointer to the Ethernet device structure.
3534  * @param[in] shared
3535  *   Indicate if this counter is shared with other flows.
3536  * @param[in] id
3537  *   Counter identifier.
3538  *
3539  * @return
3540  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
3541  */
3542 static struct mlx5_flow_counter *
3543 flow_dv_counter_alloc_fallback(struct rte_eth_dev *dev, uint32_t shared,
3544                                uint32_t id)
3545 {
3546         struct mlx5_priv *priv = dev->data->dev_private;
3547         struct mlx5_flow_counter *cnt = NULL;
3548         struct mlx5_devx_obj *dcs = NULL;
3549
3550         if (!priv->config.devx) {
3551                 rte_errno = ENOTSUP;
3552                 return NULL;
3553         }
3554         if (shared) {
3555                 TAILQ_FOREACH(cnt, &priv->sh->cmng.flow_counters, next) {
3556                         if (cnt->shared && cnt->id == id) {
3557                                 cnt->ref_cnt++;
3558                                 return cnt;
3559                         }
3560                 }
3561         }
3562         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3563         if (!dcs)
3564                 return NULL;
3565         cnt = rte_calloc(__func__, 1, sizeof(*cnt), 0);
3566         if (!cnt) {
3567                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3568                 rte_errno = ENOMEM;
3569                 return NULL;
3570         }
3571         struct mlx5_flow_counter tmpl = {
3572                 .shared = shared,
3573                 .ref_cnt = 1,
3574                 .id = id,
3575                 .dcs = dcs,
3576         };
3577         tmpl.action = mlx5_glue->dv_create_flow_action_counter(dcs->obj, 0);
3578         if (!tmpl.action) {
3579                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3580                 rte_errno = errno;
3581                 rte_free(cnt);
3582                 return NULL;
3583         }
3584         *cnt = tmpl;
3585         TAILQ_INSERT_HEAD(&priv->sh->cmng.flow_counters, cnt, next);
3586         return cnt;
3587 }
3588
3589 /**
3590  * Release a flow counter.
3591  *
3592  * @param[in] dev
3593  *   Pointer to the Ethernet device structure.
3594  * @param[in] counter
3595  *   Pointer to the counter handler.
3596  */
3597 static void
3598 flow_dv_counter_release_fallback(struct rte_eth_dev *dev,
3599                                  struct mlx5_flow_counter *counter)
3600 {
3601         struct mlx5_priv *priv = dev->data->dev_private;
3602
3603         if (!counter)
3604                 return;
3605         if (--counter->ref_cnt == 0) {
3606                 TAILQ_REMOVE(&priv->sh->cmng.flow_counters, counter, next);
3607                 claim_zero(mlx5_devx_cmd_destroy(counter->dcs));
3608                 rte_free(counter);
3609         }
3610 }
3611
3612 /**
3613  * Query a devx flow counter.
3614  *
3615  * @param[in] dev
3616  *   Pointer to the Ethernet device structure.
3617  * @param[in] cnt
3618  *   Pointer to the flow counter.
3619  * @param[out] pkts
3620  *   The statistics value of packets.
3621  * @param[out] bytes
3622  *   The statistics value of bytes.
3623  *
3624  * @return
3625  *   0 on success, otherwise a negative errno value and rte_errno is set.
3626  */
3627 static inline int
3628 _flow_dv_query_count_fallback(struct rte_eth_dev *dev __rte_unused,
3629                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3630                      uint64_t *bytes)
3631 {
3632         return mlx5_devx_cmd_flow_counter_query(cnt->dcs, 0, 0, pkts, bytes,
3633                                                 0, NULL, NULL, 0);
3634 }
3635
3636 /**
3637  * Get a pool by a counter.
3638  *
3639  * @param[in] cnt
3640  *   Pointer to the counter.
3641  *
3642  * @return
3643  *   The counter pool.
3644  */
3645 static struct mlx5_flow_counter_pool *
3646 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
3647 {
3648         if (!cnt->batch) {
3649                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
3650                 return (struct mlx5_flow_counter_pool *)cnt - 1;
3651         }
3652         return cnt->pool;
3653 }
3654
3655 /**
3656  * Get a pool by devx counter ID.
3657  *
3658  * @param[in] cont
3659  *   Pointer to the counter container.
3660  * @param[in] id
3661  *   The counter devx ID.
3662  *
3663  * @return
3664  *   The counter pool pointer if exists, NULL otherwise,
3665  */
3666 static struct mlx5_flow_counter_pool *
3667 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
3668 {
3669         struct mlx5_flow_counter_pool *pool;
3670
3671         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3672                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
3673                                 MLX5_COUNTERS_PER_POOL;
3674
3675                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
3676                         return pool;
3677         };
3678         return NULL;
3679 }
3680
3681 /**
3682  * Allocate a new memory for the counter values wrapped by all the needed
3683  * management.
3684  *
3685  * @param[in] dev
3686  *   Pointer to the Ethernet device structure.
3687  * @param[in] raws_n
3688  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
3689  *
3690  * @return
3691  *   The new memory management pointer on success, otherwise NULL and rte_errno
3692  *   is set.
3693  */
3694 static struct mlx5_counter_stats_mem_mng *
3695 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
3696 {
3697         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
3698                                         (dev->data->dev_private))->sh;
3699         struct mlx5_devx_mkey_attr mkey_attr;
3700         struct mlx5_counter_stats_mem_mng *mem_mng;
3701         volatile struct flow_counter_stats *raw_data;
3702         int size = (sizeof(struct flow_counter_stats) *
3703                         MLX5_COUNTERS_PER_POOL +
3704                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
3705                         sizeof(struct mlx5_counter_stats_mem_mng);
3706         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
3707         int i;
3708
3709         if (!mem) {
3710                 rte_errno = ENOMEM;
3711                 return NULL;
3712         }
3713         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
3714         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
3715         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
3716                                                  IBV_ACCESS_LOCAL_WRITE);
3717         if (!mem_mng->umem) {
3718                 rte_errno = errno;
3719                 rte_free(mem);
3720                 return NULL;
3721         }
3722         mkey_attr.addr = (uintptr_t)mem;
3723         mkey_attr.size = size;
3724         mkey_attr.umem_id = mem_mng->umem->umem_id;
3725         mkey_attr.pd = sh->pdn;
3726         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
3727         if (!mem_mng->dm) {
3728                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
3729                 rte_errno = errno;
3730                 rte_free(mem);
3731                 return NULL;
3732         }
3733         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
3734         raw_data = (volatile struct flow_counter_stats *)mem;
3735         for (i = 0; i < raws_n; ++i) {
3736                 mem_mng->raws[i].mem_mng = mem_mng;
3737                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
3738         }
3739         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
3740         return mem_mng;
3741 }
3742
3743 /**
3744  * Resize a counter container.
3745  *
3746  * @param[in] dev
3747  *   Pointer to the Ethernet device structure.
3748  * @param[in] batch
3749  *   Whether the pool is for counter that was allocated by batch command.
3750  *
3751  * @return
3752  *   The new container pointer on success, otherwise NULL and rte_errno is set.
3753  */
3754 static struct mlx5_pools_container *
3755 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
3756 {
3757         struct mlx5_priv *priv = dev->data->dev_private;
3758         struct mlx5_pools_container *cont =
3759                         MLX5_CNT_CONTAINER(priv->sh, batch, 0);
3760         struct mlx5_pools_container *new_cont =
3761                         MLX5_CNT_CONTAINER_UNUSED(priv->sh, batch, 0);
3762         struct mlx5_counter_stats_mem_mng *mem_mng;
3763         uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
3764         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
3765         int i;
3766
3767         if (cont != MLX5_CNT_CONTAINER(priv->sh, batch, 1)) {
3768                 /* The last resize still hasn't detected by the host thread. */
3769                 rte_errno = EAGAIN;
3770                 return NULL;
3771         }
3772         new_cont->pools = rte_calloc(__func__, 1, mem_size, 0);
3773         if (!new_cont->pools) {
3774                 rte_errno = ENOMEM;
3775                 return NULL;
3776         }
3777         if (cont->n)
3778                 memcpy(new_cont->pools, cont->pools, cont->n *
3779                        sizeof(struct mlx5_flow_counter_pool *));
3780         mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
3781                 MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES);
3782         if (!mem_mng) {
3783                 rte_free(new_cont->pools);
3784                 return NULL;
3785         }
3786         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
3787                 LIST_INSERT_HEAD(&priv->sh->cmng.free_stat_raws,
3788                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE +
3789                                  i, next);
3790         new_cont->n = resize;
3791         rte_atomic16_set(&new_cont->n_valid, rte_atomic16_read(&cont->n_valid));
3792         TAILQ_INIT(&new_cont->pool_list);
3793         TAILQ_CONCAT(&new_cont->pool_list, &cont->pool_list, next);
3794         new_cont->init_mem_mng = mem_mng;
3795         rte_cio_wmb();
3796          /* Flip the master container. */
3797         priv->sh->cmng.mhi[batch] ^= (uint8_t)1;
3798         return new_cont;
3799 }
3800
3801 /**
3802  * Query a devx flow counter.
3803  *
3804  * @param[in] dev
3805  *   Pointer to the Ethernet device structure.
3806  * @param[in] cnt
3807  *   Pointer to the flow counter.
3808  * @param[out] pkts
3809  *   The statistics value of packets.
3810  * @param[out] bytes
3811  *   The statistics value of bytes.
3812  *
3813  * @return
3814  *   0 on success, otherwise a negative errno value and rte_errno is set.
3815  */
3816 static inline int
3817 _flow_dv_query_count(struct rte_eth_dev *dev,
3818                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3819                      uint64_t *bytes)
3820 {
3821         struct mlx5_priv *priv = dev->data->dev_private;
3822         struct mlx5_flow_counter_pool *pool =
3823                         flow_dv_counter_pool_get(cnt);
3824         int offset = cnt - &pool->counters_raw[0];
3825
3826         if (priv->counter_fallback)
3827                 return _flow_dv_query_count_fallback(dev, cnt, pkts, bytes);
3828
3829         rte_spinlock_lock(&pool->sl);
3830         /*
3831          * The single counters allocation may allocate smaller ID than the
3832          * current allocated in parallel to the host reading.
3833          * In this case the new counter values must be reported as 0.
3834          */
3835         if (unlikely(!cnt->batch && cnt->dcs->id < pool->raw->min_dcs_id)) {
3836                 *pkts = 0;
3837                 *bytes = 0;
3838         } else {
3839                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
3840                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
3841         }
3842         rte_spinlock_unlock(&pool->sl);
3843         return 0;
3844 }
3845
3846 /**
3847  * Create and initialize a new counter pool.
3848  *
3849  * @param[in] dev
3850  *   Pointer to the Ethernet device structure.
3851  * @param[out] dcs
3852  *   The devX counter handle.
3853  * @param[in] batch
3854  *   Whether the pool is for counter that was allocated by batch command.
3855  *
3856  * @return
3857  *   A new pool pointer on success, NULL otherwise and rte_errno is set.
3858  */
3859 static struct mlx5_flow_counter_pool *
3860 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
3861                     uint32_t batch)
3862 {
3863         struct mlx5_priv *priv = dev->data->dev_private;
3864         struct mlx5_flow_counter_pool *pool;
3865         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
3866                                                                0);
3867         int16_t n_valid = rte_atomic16_read(&cont->n_valid);
3868         uint32_t size;
3869
3870         if (cont->n == n_valid) {
3871                 cont = flow_dv_container_resize(dev, batch);
3872                 if (!cont)
3873                         return NULL;
3874         }
3875         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
3876                         sizeof(struct mlx5_flow_counter);
3877         pool = rte_calloc(__func__, 1, size, 0);
3878         if (!pool) {
3879                 rte_errno = ENOMEM;
3880                 return NULL;
3881         }
3882         pool->min_dcs = dcs;
3883         pool->raw = cont->init_mem_mng->raws + n_valid %
3884                                                      MLX5_CNT_CONTAINER_RESIZE;
3885         pool->raw_hw = NULL;
3886         rte_spinlock_init(&pool->sl);
3887         /*
3888          * The generation of the new allocated counters in this pool is 0, 2 in
3889          * the pool generation makes all the counters valid for allocation.
3890          */
3891         rte_atomic64_set(&pool->query_gen, 0x2);
3892         TAILQ_INIT(&pool->counters);
3893         TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
3894         cont->pools[n_valid] = pool;
3895         /* Pool initialization must be updated before host thread access. */
3896         rte_cio_wmb();
3897         rte_atomic16_add(&cont->n_valid, 1);
3898         return pool;
3899 }
3900
3901 /**
3902  * Prepare a new counter and/or a new counter pool.
3903  *
3904  * @param[in] dev
3905  *   Pointer to the Ethernet device structure.
3906  * @param[out] cnt_free
3907  *   Where to put the pointer of a new counter.
3908  * @param[in] batch
3909  *   Whether the pool is for counter that was allocated by batch command.
3910  *
3911  * @return
3912  *   The free counter pool pointer and @p cnt_free is set on success,
3913  *   NULL otherwise and rte_errno is set.
3914  */
3915 static struct mlx5_flow_counter_pool *
3916 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
3917                              struct mlx5_flow_counter **cnt_free,
3918                              uint32_t batch)
3919 {
3920         struct mlx5_priv *priv = dev->data->dev_private;
3921         struct mlx5_flow_counter_pool *pool;
3922         struct mlx5_devx_obj *dcs = NULL;
3923         struct mlx5_flow_counter *cnt;
3924         uint32_t i;
3925
3926         if (!batch) {
3927                 /* bulk_bitmap must be 0 for single counter allocation. */
3928                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3929                 if (!dcs)
3930                         return NULL;
3931                 pool = flow_dv_find_pool_by_id
3932                         (MLX5_CNT_CONTAINER(priv->sh, batch, 0), dcs->id);
3933                 if (!pool) {
3934                         pool = flow_dv_pool_create(dev, dcs, batch);
3935                         if (!pool) {
3936                                 mlx5_devx_cmd_destroy(dcs);
3937                                 return NULL;
3938                         }
3939                 } else if (dcs->id < pool->min_dcs->id) {
3940                         rte_atomic64_set(&pool->a64_dcs,
3941                                          (int64_t)(uintptr_t)dcs);
3942                 }
3943                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
3944                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
3945                 cnt->dcs = dcs;
3946                 *cnt_free = cnt;
3947                 return pool;
3948         }
3949         /* bulk_bitmap is in 128 counters units. */
3950         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
3951                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
3952         if (!dcs) {
3953                 rte_errno = ENODATA;
3954                 return NULL;
3955         }
3956         pool = flow_dv_pool_create(dev, dcs, batch);
3957         if (!pool) {
3958                 mlx5_devx_cmd_destroy(dcs);
3959                 return NULL;
3960         }
3961         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
3962                 cnt = &pool->counters_raw[i];
3963                 cnt->pool = pool;
3964                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
3965         }
3966         *cnt_free = &pool->counters_raw[0];
3967         return pool;
3968 }
3969
3970 /**
3971  * Search for existed shared counter.
3972  *
3973  * @param[in] cont
3974  *   Pointer to the relevant counter pool container.
3975  * @param[in] id
3976  *   The shared counter ID to search.
3977  *
3978  * @return
3979  *   NULL if not existed, otherwise pointer to the shared counter.
3980  */
3981 static struct mlx5_flow_counter *
3982 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
3983                               uint32_t id)
3984 {
3985         static struct mlx5_flow_counter *cnt;
3986         struct mlx5_flow_counter_pool *pool;
3987         int i;
3988
3989         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3990                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
3991                         cnt = &pool->counters_raw[i];
3992                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
3993                                 return cnt;
3994                 }
3995         }
3996         return NULL;
3997 }
3998
3999 /**
4000  * Allocate a flow counter.
4001  *
4002  * @param[in] dev
4003  *   Pointer to the Ethernet device structure.
4004  * @param[in] shared
4005  *   Indicate if this counter is shared with other flows.
4006  * @param[in] id
4007  *   Counter identifier.
4008  * @param[in] group
4009  *   Counter flow group.
4010  *
4011  * @return
4012  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
4013  */
4014 static struct mlx5_flow_counter *
4015 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
4016                       uint16_t group)
4017 {
4018         struct mlx5_priv *priv = dev->data->dev_private;
4019         struct mlx5_flow_counter_pool *pool = NULL;
4020         struct mlx5_flow_counter *cnt_free = NULL;
4021         /*
4022          * Currently group 0 flow counter cannot be assigned to a flow if it is
4023          * not the first one in the batch counter allocation, so it is better
4024          * to allocate counters one by one for these flows in a separate
4025          * container.
4026          * A counter can be shared between different groups so need to take
4027          * shared counters from the single container.
4028          */
4029         uint32_t batch = (group && !shared) ? 1 : 0;
4030         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4031                                                                0);
4032
4033         if (priv->counter_fallback)
4034                 return flow_dv_counter_alloc_fallback(dev, shared, id);
4035         if (!priv->config.devx) {
4036                 rte_errno = ENOTSUP;
4037                 return NULL;
4038         }
4039         if (shared) {
4040                 cnt_free = flow_dv_counter_shared_search(cont, id);
4041                 if (cnt_free) {
4042                         if (cnt_free->ref_cnt + 1 == 0) {
4043                                 rte_errno = E2BIG;
4044                                 return NULL;
4045                         }
4046                         cnt_free->ref_cnt++;
4047                         return cnt_free;
4048                 }
4049         }
4050         /* Pools which has a free counters are in the start. */
4051         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4052                 /*
4053                  * The free counter reset values must be updated between the
4054                  * counter release to the counter allocation, so, at least one
4055                  * query must be done in this time. ensure it by saving the
4056                  * query generation in the release time.
4057                  * The free list is sorted according to the generation - so if
4058                  * the first one is not updated, all the others are not
4059                  * updated too.
4060                  */
4061                 cnt_free = TAILQ_FIRST(&pool->counters);
4062                 if (cnt_free && cnt_free->query_gen + 1 <
4063                     rte_atomic64_read(&pool->query_gen))
4064                         break;
4065                 cnt_free = NULL;
4066         }
4067         if (!cnt_free) {
4068                 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
4069                 if (!pool)
4070                         return NULL;
4071         }
4072         cnt_free->batch = batch;
4073         /* Create a DV counter action only in the first time usage. */
4074         if (!cnt_free->action) {
4075                 uint16_t offset;
4076                 struct mlx5_devx_obj *dcs;
4077
4078                 if (batch) {
4079                         offset = cnt_free - &pool->counters_raw[0];
4080                         dcs = pool->min_dcs;
4081                 } else {
4082                         offset = 0;
4083                         dcs = cnt_free->dcs;
4084                 }
4085                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
4086                                         (dcs->obj, offset);
4087                 if (!cnt_free->action) {
4088                         rte_errno = errno;
4089                         return NULL;
4090                 }
4091         }
4092         /* Update the counter reset values. */
4093         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
4094                                  &cnt_free->bytes))
4095                 return NULL;
4096         cnt_free->shared = shared;
4097         cnt_free->ref_cnt = 1;
4098         cnt_free->id = id;
4099         if (!priv->sh->cmng.query_thread_on)
4100                 /* Start the asynchronous batch query by the host thread. */
4101                 mlx5_set_query_alarm(priv->sh);
4102         TAILQ_REMOVE(&pool->counters, cnt_free, next);
4103         if (TAILQ_EMPTY(&pool->counters)) {
4104                 /* Move the pool to the end of the container pool list. */
4105                 TAILQ_REMOVE(&cont->pool_list, pool, next);
4106                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4107         }
4108         return cnt_free;
4109 }
4110
4111 /**
4112  * Release a flow counter.
4113  *
4114  * @param[in] dev
4115  *   Pointer to the Ethernet device structure.
4116  * @param[in] counter
4117  *   Pointer to the counter handler.
4118  */
4119 static void
4120 flow_dv_counter_release(struct rte_eth_dev *dev,
4121                         struct mlx5_flow_counter *counter)
4122 {
4123         struct mlx5_priv *priv = dev->data->dev_private;
4124
4125         if (!counter)
4126                 return;
4127         if (priv->counter_fallback) {
4128                 flow_dv_counter_release_fallback(dev, counter);
4129                 return;
4130         }
4131         if (--counter->ref_cnt == 0) {
4132                 struct mlx5_flow_counter_pool *pool =
4133                                 flow_dv_counter_pool_get(counter);
4134
4135                 /* Put the counter in the end - the last updated one. */
4136                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
4137                 counter->query_gen = rte_atomic64_read(&pool->query_gen);
4138         }
4139 }
4140
4141 /**
4142  * Verify the @p attributes will be correctly understood by the NIC and store
4143  * them in the @p flow if everything is correct.
4144  *
4145  * @param[in] dev
4146  *   Pointer to dev struct.
4147  * @param[in] attributes
4148  *   Pointer to flow attributes
4149  * @param[in] external
4150  *   This flow rule is created by request external to PMD.
4151  * @param[out] error
4152  *   Pointer to error structure.
4153  *
4154  * @return
4155  *   0 on success, a negative errno value otherwise and rte_errno is set.
4156  */
4157 static int
4158 flow_dv_validate_attributes(struct rte_eth_dev *dev,
4159                             const struct rte_flow_attr *attributes,
4160                             bool external __rte_unused,
4161                             struct rte_flow_error *error)
4162 {
4163         struct mlx5_priv *priv = dev->data->dev_private;
4164         uint32_t priority_max = priv->config.flow_prio - 1;
4165
4166 #ifndef HAVE_MLX5DV_DR
4167         if (attributes->group)
4168                 return rte_flow_error_set(error, ENOTSUP,
4169                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
4170                                           NULL,
4171                                           "groups are not supported");
4172 #else
4173         uint32_t table;
4174         int ret;
4175
4176         ret = mlx5_flow_group_to_table(attributes, external,
4177                                        attributes->group,
4178                                        &table, error);
4179         if (ret)
4180                 return ret;
4181 #endif
4182         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
4183             attributes->priority >= priority_max)
4184                 return rte_flow_error_set(error, ENOTSUP,
4185                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
4186                                           NULL,
4187                                           "priority out of range");
4188         if (attributes->transfer) {
4189                 if (!priv->config.dv_esw_en)
4190                         return rte_flow_error_set
4191                                 (error, ENOTSUP,
4192                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4193                                  "E-Switch dr is not supported");
4194                 if (!(priv->representor || priv->master))
4195                         return rte_flow_error_set
4196                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4197                                  NULL, "E-Switch configuration can only be"
4198                                  " done by a master or a representor device");
4199                 if (attributes->egress)
4200                         return rte_flow_error_set
4201                                 (error, ENOTSUP,
4202                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
4203                                  "egress is not supported");
4204         }
4205         if (!(attributes->egress ^ attributes->ingress))
4206                 return rte_flow_error_set(error, ENOTSUP,
4207                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
4208                                           "must specify exactly one of "
4209                                           "ingress or egress");
4210         return 0;
4211 }
4212
4213 /**
4214  * Internal validation function. For validating both actions and items.
4215  *
4216  * @param[in] dev
4217  *   Pointer to the rte_eth_dev structure.
4218  * @param[in] attr
4219  *   Pointer to the flow attributes.
4220  * @param[in] items
4221  *   Pointer to the list of items.
4222  * @param[in] actions
4223  *   Pointer to the list of actions.
4224  * @param[in] external
4225  *   This flow rule is created by request external to PMD.
4226  * @param[out] error
4227  *   Pointer to the error structure.
4228  *
4229  * @return
4230  *   0 on success, a negative errno value otherwise and rte_errno is set.
4231  */
4232 static int
4233 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
4234                  const struct rte_flow_item items[],
4235                  const struct rte_flow_action actions[],
4236                  bool external, struct rte_flow_error *error)
4237 {
4238         int ret;
4239         uint64_t action_flags = 0;
4240         uint64_t item_flags = 0;
4241         uint64_t last_item = 0;
4242         uint8_t next_protocol = 0xff;
4243         uint16_t ether_type = 0;
4244         int actions_n = 0;
4245         const struct rte_flow_item *gre_item = NULL;
4246         struct rte_flow_item_tcp nic_tcp_mask = {
4247                 .hdr = {
4248                         .tcp_flags = 0xFF,
4249                         .src_port = RTE_BE16(UINT16_MAX),
4250                         .dst_port = RTE_BE16(UINT16_MAX),
4251                 }
4252         };
4253         struct mlx5_priv *priv = dev->data->dev_private;
4254         struct mlx5_dev_config *dev_conf = &priv->config;
4255
4256         if (items == NULL)
4257                 return -1;
4258         ret = flow_dv_validate_attributes(dev, attr, external, error);
4259         if (ret < 0)
4260                 return ret;
4261         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4262                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
4263                 int type = items->type;
4264
4265                 switch (type) {
4266                 case RTE_FLOW_ITEM_TYPE_VOID:
4267                         break;
4268                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4269                         ret = flow_dv_validate_item_port_id
4270                                         (dev, items, attr, item_flags, error);
4271                         if (ret < 0)
4272                                 return ret;
4273                         last_item = MLX5_FLOW_ITEM_PORT_ID;
4274                         break;
4275                 case RTE_FLOW_ITEM_TYPE_ETH:
4276                         ret = mlx5_flow_validate_item_eth(items, item_flags,
4277                                                           error);
4278                         if (ret < 0)
4279                                 return ret;
4280                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
4281                                              MLX5_FLOW_LAYER_OUTER_L2;
4282                         if (items->mask != NULL && items->spec != NULL) {
4283                                 ether_type =
4284                                         ((const struct rte_flow_item_eth *)
4285                                          items->spec)->type;
4286                                 ether_type &=
4287                                         ((const struct rte_flow_item_eth *)
4288                                          items->mask)->type;
4289                                 ether_type = rte_be_to_cpu_16(ether_type);
4290                         } else {
4291                                 ether_type = 0;
4292                         }
4293                         break;
4294                 case RTE_FLOW_ITEM_TYPE_VLAN:
4295                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
4296                                                            dev, error);
4297                         if (ret < 0)
4298                                 return ret;
4299                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
4300                                              MLX5_FLOW_LAYER_OUTER_VLAN;
4301                         if (items->mask != NULL && items->spec != NULL) {
4302                                 ether_type =
4303                                         ((const struct rte_flow_item_vlan *)
4304                                          items->spec)->inner_type;
4305                                 ether_type &=
4306                                         ((const struct rte_flow_item_vlan *)
4307                                          items->mask)->inner_type;
4308                                 ether_type = rte_be_to_cpu_16(ether_type);
4309                         } else {
4310                                 ether_type = 0;
4311                         }
4312                         break;
4313                 case RTE_FLOW_ITEM_TYPE_IPV4:
4314                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4315                                                   &item_flags, &tunnel);
4316                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
4317                                                            last_item,
4318                                                            ether_type, NULL,
4319                                                            error);
4320                         if (ret < 0)
4321                                 return ret;
4322                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4323                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4324                         if (items->mask != NULL &&
4325                             ((const struct rte_flow_item_ipv4 *)
4326                              items->mask)->hdr.next_proto_id) {
4327                                 next_protocol =
4328                                         ((const struct rte_flow_item_ipv4 *)
4329                                          (items->spec))->hdr.next_proto_id;
4330                                 next_protocol &=
4331                                         ((const struct rte_flow_item_ipv4 *)
4332                                          (items->mask))->hdr.next_proto_id;
4333                         } else {
4334                                 /* Reset for inner layer. */
4335                                 next_protocol = 0xff;
4336                         }
4337                         break;
4338                 case RTE_FLOW_ITEM_TYPE_IPV6:
4339                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4340                                                   &item_flags, &tunnel);
4341                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
4342                                                            last_item,
4343                                                            ether_type, NULL,
4344                                                            error);
4345                         if (ret < 0)
4346                                 return ret;
4347                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4348                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4349                         if (items->mask != NULL &&
4350                             ((const struct rte_flow_item_ipv6 *)
4351                              items->mask)->hdr.proto) {
4352                                 next_protocol =
4353                                         ((const struct rte_flow_item_ipv6 *)
4354                                          items->spec)->hdr.proto;
4355                                 next_protocol &=
4356                                         ((const struct rte_flow_item_ipv6 *)
4357                                          items->mask)->hdr.proto;
4358                         } else {
4359                                 /* Reset for inner layer. */
4360                                 next_protocol = 0xff;
4361                         }
4362                         break;
4363                 case RTE_FLOW_ITEM_TYPE_TCP:
4364                         ret = mlx5_flow_validate_item_tcp
4365                                                 (items, item_flags,
4366                                                  next_protocol,
4367                                                  &nic_tcp_mask,
4368                                                  error);
4369                         if (ret < 0)
4370                                 return ret;
4371                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
4372                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
4373                         break;
4374                 case RTE_FLOW_ITEM_TYPE_UDP:
4375                         ret = mlx5_flow_validate_item_udp(items, item_flags,
4376                                                           next_protocol,
4377                                                           error);
4378                         if (ret < 0)
4379                                 return ret;
4380                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
4381                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
4382                         break;
4383                 case RTE_FLOW_ITEM_TYPE_GRE:
4384                         ret = mlx5_flow_validate_item_gre(items, item_flags,
4385                                                           next_protocol, error);
4386                         if (ret < 0)
4387                                 return ret;
4388                         gre_item = items;
4389                         last_item = MLX5_FLOW_LAYER_GRE;
4390                         break;
4391                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4392                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
4393                                                             next_protocol,
4394                                                             error);
4395                         if (ret < 0)
4396                                 return ret;
4397                         last_item = MLX5_FLOW_LAYER_NVGRE;
4398                         break;
4399                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
4400                         ret = mlx5_flow_validate_item_gre_key
4401                                 (items, item_flags, gre_item, error);
4402                         if (ret < 0)
4403                                 return ret;
4404                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
4405                         break;
4406                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4407                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
4408                                                             error);
4409                         if (ret < 0)
4410                                 return ret;
4411                         last_item = MLX5_FLOW_LAYER_VXLAN;
4412                         break;
4413                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4414                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
4415                                                                 item_flags, dev,
4416                                                                 error);
4417                         if (ret < 0)
4418                                 return ret;
4419                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4420                         break;
4421                 case RTE_FLOW_ITEM_TYPE_GENEVE:
4422                         ret = mlx5_flow_validate_item_geneve(items,
4423                                                              item_flags, dev,
4424                                                              error);
4425                         if (ret < 0)
4426                                 return ret;
4427                         last_item = MLX5_FLOW_LAYER_GENEVE;
4428                         break;
4429                 case RTE_FLOW_ITEM_TYPE_MPLS:
4430                         ret = mlx5_flow_validate_item_mpls(dev, items,
4431                                                            item_flags,
4432                                                            last_item, error);
4433                         if (ret < 0)
4434                                 return ret;
4435                         last_item = MLX5_FLOW_LAYER_MPLS;
4436                         break;
4437
4438                 case RTE_FLOW_ITEM_TYPE_MARK:
4439                         ret = flow_dv_validate_item_mark(dev, items, attr,
4440                                                          error);
4441                         if (ret < 0)
4442                                 return ret;
4443                         last_item = MLX5_FLOW_ITEM_MARK;
4444                         break;
4445                 case RTE_FLOW_ITEM_TYPE_META:
4446                         ret = flow_dv_validate_item_meta(dev, items, attr,
4447                                                          error);
4448                         if (ret < 0)
4449                                 return ret;
4450                         last_item = MLX5_FLOW_ITEM_METADATA;
4451                         break;
4452                 case RTE_FLOW_ITEM_TYPE_ICMP:
4453                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
4454                                                            next_protocol,
4455                                                            error);
4456                         if (ret < 0)
4457                                 return ret;
4458                         last_item = MLX5_FLOW_LAYER_ICMP;
4459                         break;
4460                 case RTE_FLOW_ITEM_TYPE_ICMP6:
4461                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
4462                                                             next_protocol,
4463                                                             error);
4464                         if (ret < 0)
4465                                 return ret;
4466                         last_item = MLX5_FLOW_LAYER_ICMP6;
4467                         break;
4468                 case RTE_FLOW_ITEM_TYPE_TAG:
4469                         ret = flow_dv_validate_item_tag(dev, items,
4470                                                         attr, error);
4471                         if (ret < 0)
4472                                 return ret;
4473                         last_item = MLX5_FLOW_ITEM_TAG;
4474                         break;
4475                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
4476                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
4477                         break;
4478                 default:
4479                         return rte_flow_error_set(error, ENOTSUP,
4480                                                   RTE_FLOW_ERROR_TYPE_ITEM,
4481                                                   NULL, "item not supported");
4482                 }
4483                 item_flags |= last_item;
4484         }
4485         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4486                 int type = actions->type;
4487                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
4488                         return rte_flow_error_set(error, ENOTSUP,
4489                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4490                                                   actions, "too many actions");
4491                 switch (type) {
4492                 case RTE_FLOW_ACTION_TYPE_VOID:
4493                         break;
4494                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4495                         ret = flow_dv_validate_action_port_id(dev,
4496                                                               action_flags,
4497                                                               actions,
4498                                                               attr,
4499                                                               error);
4500                         if (ret)
4501                                 return ret;
4502                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4503                         ++actions_n;
4504                         break;
4505                 case RTE_FLOW_ACTION_TYPE_FLAG:
4506                         ret = flow_dv_validate_action_flag(dev, action_flags,
4507                                                            attr, error);
4508                         if (ret < 0)
4509                                 return ret;
4510                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4511                                 /* Count all modify-header actions as one. */
4512                                 if (!(action_flags &
4513                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4514                                         ++actions_n;
4515                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
4516                                                 MLX5_FLOW_ACTION_MARK_EXT;
4517                         } else {
4518                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
4519                                 ++actions_n;
4520                         }
4521                         break;
4522                 case RTE_FLOW_ACTION_TYPE_MARK:
4523                         ret = flow_dv_validate_action_mark(dev, actions,
4524                                                            action_flags,
4525                                                            attr, error);
4526                         if (ret < 0)
4527                                 return ret;
4528                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4529                                 /* Count all modify-header actions as one. */
4530                                 if (!(action_flags &
4531                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4532                                         ++actions_n;
4533                                 action_flags |= MLX5_FLOW_ACTION_MARK |
4534                                                 MLX5_FLOW_ACTION_MARK_EXT;
4535                         } else {
4536                                 action_flags |= MLX5_FLOW_ACTION_MARK;
4537                                 ++actions_n;
4538                         }
4539                         break;
4540                 case RTE_FLOW_ACTION_TYPE_SET_META:
4541                         ret = flow_dv_validate_action_set_meta(dev, actions,
4542                                                                action_flags,
4543                                                                attr, error);
4544                         if (ret < 0)
4545                                 return ret;
4546                         /* Count all modify-header actions as one action. */
4547                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4548                                 ++actions_n;
4549                         action_flags |= MLX5_FLOW_ACTION_SET_META;
4550                         break;
4551                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4552                         ret = flow_dv_validate_action_set_tag(dev, actions,
4553                                                               action_flags,
4554                                                               attr, error);
4555                         if (ret < 0)
4556                                 return ret;
4557                         /* Count all modify-header actions as one action. */
4558                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4559                                 ++actions_n;
4560                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
4561                         break;
4562                 case RTE_FLOW_ACTION_TYPE_DROP:
4563                         ret = mlx5_flow_validate_action_drop(action_flags,
4564                                                              attr, error);
4565                         if (ret < 0)
4566                                 return ret;
4567                         action_flags |= MLX5_FLOW_ACTION_DROP;
4568                         ++actions_n;
4569                         break;
4570                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4571                         ret = mlx5_flow_validate_action_queue(actions,
4572                                                               action_flags, dev,
4573                                                               attr, error);
4574                         if (ret < 0)
4575                                 return ret;
4576                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
4577                         ++actions_n;
4578                         break;
4579                 case RTE_FLOW_ACTION_TYPE_RSS:
4580                         ret = mlx5_flow_validate_action_rss(actions,
4581                                                             action_flags, dev,
4582                                                             attr, item_flags,
4583                                                             error);
4584                         if (ret < 0)
4585                                 return ret;
4586                         action_flags |= MLX5_FLOW_ACTION_RSS;
4587                         ++actions_n;
4588                         break;
4589                 case RTE_FLOW_ACTION_TYPE_COUNT:
4590                         ret = flow_dv_validate_action_count(dev, error);
4591                         if (ret < 0)
4592                                 return ret;
4593                         action_flags |= MLX5_FLOW_ACTION_COUNT;
4594                         ++actions_n;
4595                         break;
4596                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4597                         if (flow_dv_validate_action_pop_vlan(dev,
4598                                                              action_flags,
4599                                                              actions,
4600                                                              item_flags, attr,
4601                                                              error))
4602                                 return -rte_errno;
4603                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
4604                         ++actions_n;
4605                         break;
4606                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4607                         ret = flow_dv_validate_action_push_vlan(action_flags,
4608                                                                 item_flags,
4609                                                                 actions, attr,
4610                                                                 error);
4611                         if (ret < 0)
4612                                 return ret;
4613                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
4614                         ++actions_n;
4615                         break;
4616                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4617                         ret = flow_dv_validate_action_set_vlan_pcp
4618                                                 (action_flags, actions, error);
4619                         if (ret < 0)
4620                                 return ret;
4621                         /* Count PCP with push_vlan command. */
4622                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
4623                         break;
4624                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4625                         ret = flow_dv_validate_action_set_vlan_vid
4626                                                 (item_flags, action_flags,
4627                                                  actions, error);
4628                         if (ret < 0)
4629                                 return ret;
4630                         /* Count VID with push_vlan command. */
4631                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
4632                         break;
4633                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4634                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4635                         ret = flow_dv_validate_action_l2_encap(action_flags,
4636                                                                actions, attr,
4637                                                                error);
4638                         if (ret < 0)
4639                                 return ret;
4640                         action_flags |= actions->type ==
4641                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
4642                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
4643                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
4644                         ++actions_n;
4645                         break;
4646                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4647                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4648                         ret = flow_dv_validate_action_l2_decap(action_flags,
4649                                                                attr, error);
4650                         if (ret < 0)
4651                                 return ret;
4652                         action_flags |= actions->type ==
4653                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
4654                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
4655                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
4656                         ++actions_n;
4657                         break;
4658                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4659                         ret = flow_dv_validate_action_raw_encap(action_flags,
4660                                                                 actions, attr,
4661                                                                 error);
4662                         if (ret < 0)
4663                                 return ret;
4664                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
4665                         ++actions_n;
4666                         break;
4667                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4668                         ret = flow_dv_validate_action_raw_decap(action_flags,
4669                                                                 actions, attr,
4670                                                                 error);
4671                         if (ret < 0)
4672                                 return ret;
4673                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
4674                         ++actions_n;
4675                         break;
4676                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4677                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4678                         ret = flow_dv_validate_action_modify_mac(action_flags,
4679                                                                  actions,
4680                                                                  item_flags,
4681                                                                  error);
4682                         if (ret < 0)
4683                                 return ret;
4684                         /* Count all modify-header actions as one action. */
4685                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4686                                 ++actions_n;
4687                         action_flags |= actions->type ==
4688                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
4689                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
4690                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
4691                         break;
4692
4693                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4694                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4695                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
4696                                                                   actions,
4697                                                                   item_flags,
4698                                                                   error);
4699                         if (ret < 0)
4700                                 return ret;
4701                         /* Count all modify-header actions as one action. */
4702                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4703                                 ++actions_n;
4704                         action_flags |= actions->type ==
4705                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
4706                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
4707                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
4708                         break;
4709                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4710                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4711                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
4712                                                                   actions,
4713                                                                   item_flags,
4714                                                                   error);
4715                         if (ret < 0)
4716                                 return ret;
4717                         /* Count all modify-header actions as one action. */
4718                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4719                                 ++actions_n;
4720                         action_flags |= actions->type ==
4721                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
4722                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
4723                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
4724                         break;
4725                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4726                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4727                         ret = flow_dv_validate_action_modify_tp(action_flags,
4728                                                                 actions,
4729                                                                 item_flags,
4730                                                                 error);
4731                         if (ret < 0)
4732                                 return ret;
4733                         /* Count all modify-header actions as one action. */
4734                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4735                                 ++actions_n;
4736                         action_flags |= actions->type ==
4737                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
4738                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
4739                                                 MLX5_FLOW_ACTION_SET_TP_DST;
4740                         break;
4741                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4742                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
4743                         ret = flow_dv_validate_action_modify_ttl(action_flags,
4744                                                                  actions,
4745                                                                  item_flags,
4746                                                                  error);
4747                         if (ret < 0)
4748                                 return ret;
4749                         /* Count all modify-header actions as one action. */
4750                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4751                                 ++actions_n;
4752                         action_flags |= actions->type ==
4753                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
4754                                                 MLX5_FLOW_ACTION_SET_TTL :
4755                                                 MLX5_FLOW_ACTION_DEC_TTL;
4756                         break;
4757                 case RTE_FLOW_ACTION_TYPE_JUMP:
4758                         ret = flow_dv_validate_action_jump(actions,
4759                                                            action_flags,
4760                                                            attr, external,
4761                                                            error);
4762                         if (ret)
4763                                 return ret;
4764                         ++actions_n;
4765                         action_flags |= MLX5_FLOW_ACTION_JUMP;
4766                         break;
4767                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4768                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4769                         ret = flow_dv_validate_action_modify_tcp_seq
4770                                                                 (action_flags,
4771                                                                  actions,
4772                                                                  item_flags,
4773                                                                  error);
4774                         if (ret < 0)
4775                                 return ret;
4776                         /* Count all modify-header actions as one action. */
4777                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4778                                 ++actions_n;
4779                         action_flags |= actions->type ==
4780                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
4781                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
4782                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
4783                         break;
4784                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4785                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4786                         ret = flow_dv_validate_action_modify_tcp_ack
4787                                                                 (action_flags,
4788                                                                  actions,
4789                                                                  item_flags,
4790                                                                  error);
4791                         if (ret < 0)
4792                                 return ret;
4793                         /* Count all modify-header actions as one action. */
4794                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4795                                 ++actions_n;
4796                         action_flags |= actions->type ==
4797                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
4798                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
4799                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
4800                         break;
4801                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
4802                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
4803                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
4804                         break;
4805                 case RTE_FLOW_ACTION_TYPE_METER:
4806                         ret = mlx5_flow_validate_action_meter(dev,
4807                                                               action_flags,
4808                                                               actions, attr,
4809                                                               error);
4810                         if (ret < 0)
4811                                 return ret;
4812                         action_flags |= MLX5_FLOW_ACTION_METER;
4813                         ++actions_n;
4814                         break;
4815                 default:
4816                         return rte_flow_error_set(error, ENOTSUP,
4817                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4818                                                   actions,
4819                                                   "action not supported");
4820                 }
4821         }
4822         if ((action_flags & MLX5_FLOW_LAYER_TUNNEL) &&
4823             (action_flags & MLX5_FLOW_VLAN_ACTIONS))
4824                 return rte_flow_error_set(error, ENOTSUP,
4825                                           RTE_FLOW_ERROR_TYPE_ACTION,
4826                                           actions,
4827                                           "can't have vxlan and vlan"
4828                                           " actions in the same rule");
4829         /* Eswitch has few restrictions on using items and actions */
4830         if (attr->transfer) {
4831                 if (!mlx5_flow_ext_mreg_supported(dev) &&
4832                     action_flags & MLX5_FLOW_ACTION_FLAG)
4833                         return rte_flow_error_set(error, ENOTSUP,
4834                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4835                                                   NULL,
4836                                                   "unsupported action FLAG");
4837                 if (!mlx5_flow_ext_mreg_supported(dev) &&
4838                     action_flags & MLX5_FLOW_ACTION_MARK)
4839                         return rte_flow_error_set(error, ENOTSUP,
4840                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4841                                                   NULL,
4842                                                   "unsupported action MARK");
4843                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
4844                         return rte_flow_error_set(error, ENOTSUP,
4845                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4846                                                   NULL,
4847                                                   "unsupported action QUEUE");
4848                 if (action_flags & MLX5_FLOW_ACTION_RSS)
4849                         return rte_flow_error_set(error, ENOTSUP,
4850                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4851                                                   NULL,
4852                                                   "unsupported action RSS");
4853                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
4854                         return rte_flow_error_set(error, EINVAL,
4855                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4856                                                   actions,
4857                                                   "no fate action is found");
4858         } else {
4859                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
4860                         return rte_flow_error_set(error, EINVAL,
4861                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4862                                                   actions,
4863                                                   "no fate action is found");
4864         }
4865         return 0;
4866 }
4867
4868 /**
4869  * Internal preparation function. Allocates the DV flow size,
4870  * this size is constant.
4871  *
4872  * @param[in] attr
4873  *   Pointer to the flow attributes.
4874  * @param[in] items
4875  *   Pointer to the list of items.
4876  * @param[in] actions
4877  *   Pointer to the list of actions.
4878  * @param[out] error
4879  *   Pointer to the error structure.
4880  *
4881  * @return
4882  *   Pointer to mlx5_flow object on success,
4883  *   otherwise NULL and rte_errno is set.
4884  */
4885 static struct mlx5_flow *
4886 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
4887                 const struct rte_flow_item items[] __rte_unused,
4888                 const struct rte_flow_action actions[] __rte_unused,
4889                 struct rte_flow_error *error)
4890 {
4891         size_t size = sizeof(struct mlx5_flow);
4892         struct mlx5_flow *dev_flow;
4893
4894         dev_flow = rte_calloc(__func__, 1, size, 0);
4895         if (!dev_flow) {
4896                 rte_flow_error_set(error, ENOMEM,
4897                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4898                                    "not enough memory to create flow");
4899                 return NULL;
4900         }
4901         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
4902         dev_flow->ingress = attr->ingress;
4903         dev_flow->transfer = attr->transfer;
4904         return dev_flow;
4905 }
4906
4907 #ifndef NDEBUG
4908 /**
4909  * Sanity check for match mask and value. Similar to check_valid_spec() in
4910  * kernel driver. If unmasked bit is present in value, it returns failure.
4911  *
4912  * @param match_mask
4913  *   pointer to match mask buffer.
4914  * @param match_value
4915  *   pointer to match value buffer.
4916  *
4917  * @return
4918  *   0 if valid, -EINVAL otherwise.
4919  */
4920 static int
4921 flow_dv_check_valid_spec(void *match_mask, void *match_value)
4922 {
4923         uint8_t *m = match_mask;
4924         uint8_t *v = match_value;
4925         unsigned int i;
4926
4927         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
4928                 if (v[i] & ~m[i]) {
4929                         DRV_LOG(ERR,
4930                                 "match_value differs from match_criteria"
4931                                 " %p[%u] != %p[%u]",
4932                                 match_value, i, match_mask, i);
4933                         return -EINVAL;
4934                 }
4935         }
4936         return 0;
4937 }
4938 #endif
4939
4940 /**
4941  * Add Ethernet item to matcher and to the value.
4942  *
4943  * @param[in, out] matcher
4944  *   Flow matcher.
4945  * @param[in, out] key
4946  *   Flow matcher value.
4947  * @param[in] item
4948  *   Flow pattern to translate.
4949  * @param[in] inner
4950  *   Item is inner pattern.
4951  */
4952 static void
4953 flow_dv_translate_item_eth(void *matcher, void *key,
4954                            const struct rte_flow_item *item, int inner)
4955 {
4956         const struct rte_flow_item_eth *eth_m = item->mask;
4957         const struct rte_flow_item_eth *eth_v = item->spec;
4958         const struct rte_flow_item_eth nic_mask = {
4959                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
4960                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
4961                 .type = RTE_BE16(0xffff),
4962         };
4963         void *headers_m;
4964         void *headers_v;
4965         char *l24_v;
4966         unsigned int i;
4967
4968         if (!eth_v)
4969                 return;
4970         if (!eth_m)
4971                 eth_m = &nic_mask;
4972         if (inner) {
4973                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4974                                          inner_headers);
4975                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4976         } else {
4977                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4978                                          outer_headers);
4979                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4980         }
4981         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
4982                &eth_m->dst, sizeof(eth_m->dst));
4983         /* The value must be in the range of the mask. */
4984         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
4985         for (i = 0; i < sizeof(eth_m->dst); ++i)
4986                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
4987         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
4988                &eth_m->src, sizeof(eth_m->src));
4989         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
4990         /* The value must be in the range of the mask. */
4991         for (i = 0; i < sizeof(eth_m->dst); ++i)
4992                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
4993         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
4994                  rte_be_to_cpu_16(eth_m->type));
4995         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
4996         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
4997 }
4998
4999 /**
5000  * Add VLAN item to matcher and to the value.
5001  *
5002  * @param[in, out] dev_flow
5003  *   Flow descriptor.
5004  * @param[in, out] matcher
5005  *   Flow matcher.
5006  * @param[in, out] key
5007  *   Flow matcher value.
5008  * @param[in] item
5009  *   Flow pattern to translate.
5010  * @param[in] inner
5011  *   Item is inner pattern.
5012  */
5013 static void
5014 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
5015                             void *matcher, void *key,
5016                             const struct rte_flow_item *item,
5017                             int inner)
5018 {
5019         const struct rte_flow_item_vlan *vlan_m = item->mask;
5020         const struct rte_flow_item_vlan *vlan_v = item->spec;
5021         void *headers_m;
5022         void *headers_v;
5023         uint16_t tci_m;
5024         uint16_t tci_v;
5025
5026         if (!vlan_v)
5027                 return;
5028         if (!vlan_m)
5029                 vlan_m = &rte_flow_item_vlan_mask;
5030         if (inner) {
5031                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5032                                          inner_headers);
5033                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5034         } else {
5035                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5036                                          outer_headers);
5037                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5038                 /*
5039                  * This is workaround, masks are not supported,
5040                  * and pre-validated.
5041                  */
5042                 dev_flow->dv.vf_vlan.tag =
5043                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
5044         }
5045         tci_m = rte_be_to_cpu_16(vlan_m->tci);
5046         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
5047         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5048         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
5049         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
5050         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
5051         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
5052         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
5053         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
5054         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
5055         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5056                  rte_be_to_cpu_16(vlan_m->inner_type));
5057         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
5058                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
5059 }
5060
5061 /**
5062  * Add IPV4 item to matcher and to the value.
5063  *
5064  * @param[in, out] matcher
5065  *   Flow matcher.
5066  * @param[in, out] key
5067  *   Flow matcher value.
5068  * @param[in] item
5069  *   Flow pattern to translate.
5070  * @param[in] inner
5071  *   Item is inner pattern.
5072  * @param[in] group
5073  *   The group to insert the rule.
5074  */
5075 static void
5076 flow_dv_translate_item_ipv4(void *matcher, void *key,
5077                             const struct rte_flow_item *item,
5078                             int inner, uint32_t group)
5079 {
5080         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
5081         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
5082         const struct rte_flow_item_ipv4 nic_mask = {
5083                 .hdr = {
5084                         .src_addr = RTE_BE32(0xffffffff),
5085                         .dst_addr = RTE_BE32(0xffffffff),
5086                         .type_of_service = 0xff,
5087                         .next_proto_id = 0xff,
5088                 },
5089         };
5090         void *headers_m;
5091         void *headers_v;
5092         char *l24_m;
5093         char *l24_v;
5094         uint8_t tos;
5095
5096         if (inner) {
5097                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5098                                          inner_headers);
5099                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5100         } else {
5101                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5102                                          outer_headers);
5103                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5104         }
5105         if (group == 0)
5106                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5107         else
5108                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
5109         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
5110         if (!ipv4_v)
5111                 return;
5112         if (!ipv4_m)
5113                 ipv4_m = &nic_mask;
5114         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5115                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5116         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5117                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5118         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
5119         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
5120         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5121                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5122         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5123                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5124         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
5125         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
5126         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
5127         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
5128                  ipv4_m->hdr.type_of_service);
5129         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
5130         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
5131                  ipv4_m->hdr.type_of_service >> 2);
5132         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
5133         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5134                  ipv4_m->hdr.next_proto_id);
5135         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5136                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
5137 }
5138
5139 /**
5140  * Add IPV6 item to matcher and to the value.
5141  *
5142  * @param[in, out] matcher
5143  *   Flow matcher.
5144  * @param[in, out] key
5145  *   Flow matcher value.
5146  * @param[in] item
5147  *   Flow pattern to translate.
5148  * @param[in] inner
5149  *   Item is inner pattern.
5150  * @param[in] group
5151  *   The group to insert the rule.
5152  */
5153 static void
5154 flow_dv_translate_item_ipv6(void *matcher, void *key,
5155                             const struct rte_flow_item *item,
5156                             int inner, uint32_t group)
5157 {
5158         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
5159         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
5160         const struct rte_flow_item_ipv6 nic_mask = {
5161                 .hdr = {
5162                         .src_addr =
5163                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5164                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5165                         .dst_addr =
5166                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5167                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5168                         .vtc_flow = RTE_BE32(0xffffffff),
5169                         .proto = 0xff,
5170                         .hop_limits = 0xff,
5171                 },
5172         };
5173         void *headers_m;
5174         void *headers_v;
5175         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5176         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5177         char *l24_m;
5178         char *l24_v;
5179         uint32_t vtc_m;
5180         uint32_t vtc_v;
5181         int i;
5182         int size;
5183
5184         if (inner) {
5185                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5186                                          inner_headers);
5187                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5188         } else {
5189                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5190                                          outer_headers);
5191                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5192         }
5193         if (group == 0)
5194                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5195         else
5196                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
5197         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
5198         if (!ipv6_v)
5199                 return;
5200         if (!ipv6_m)
5201                 ipv6_m = &nic_mask;
5202         size = sizeof(ipv6_m->hdr.dst_addr);
5203         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5204                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5205         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5206                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5207         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
5208         for (i = 0; i < size; ++i)
5209                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
5210         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5211                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5212         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5213                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5214         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
5215         for (i = 0; i < size; ++i)
5216                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
5217         /* TOS. */
5218         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
5219         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
5220         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
5221         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
5222         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
5223         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
5224         /* Label. */
5225         if (inner) {
5226                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
5227                          vtc_m);
5228                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
5229                          vtc_v);
5230         } else {
5231                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
5232                          vtc_m);
5233                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
5234                          vtc_v);
5235         }
5236         /* Protocol. */
5237         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5238                  ipv6_m->hdr.proto);
5239         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5240                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
5241 }
5242
5243 /**
5244  * Add TCP item to matcher and to the value.
5245  *
5246  * @param[in, out] matcher
5247  *   Flow matcher.
5248  * @param[in, out] key
5249  *   Flow matcher value.
5250  * @param[in] item
5251  *   Flow pattern to translate.
5252  * @param[in] inner
5253  *   Item is inner pattern.
5254  */
5255 static void
5256 flow_dv_translate_item_tcp(void *matcher, void *key,
5257                            const struct rte_flow_item *item,
5258                            int inner)
5259 {
5260         const struct rte_flow_item_tcp *tcp_m = item->mask;
5261         const struct rte_flow_item_tcp *tcp_v = item->spec;
5262         void *headers_m;
5263         void *headers_v;
5264
5265         if (inner) {
5266                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5267                                          inner_headers);
5268                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5269         } else {
5270                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5271                                          outer_headers);
5272                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5273         }
5274         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5275         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
5276         if (!tcp_v)
5277                 return;
5278         if (!tcp_m)
5279                 tcp_m = &rte_flow_item_tcp_mask;
5280         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
5281                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
5282         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
5283                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
5284         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
5285                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
5286         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
5287                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
5288         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
5289                  tcp_m->hdr.tcp_flags);
5290         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
5291                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
5292 }
5293
5294 /**
5295  * Add UDP item to matcher and to the value.
5296  *
5297  * @param[in, out] matcher
5298  *   Flow matcher.
5299  * @param[in, out] key
5300  *   Flow matcher value.
5301  * @param[in] item
5302  *   Flow pattern to translate.
5303  * @param[in] inner
5304  *   Item is inner pattern.
5305  */
5306 static void
5307 flow_dv_translate_item_udp(void *matcher, void *key,
5308                            const struct rte_flow_item *item,
5309                            int inner)
5310 {
5311         const struct rte_flow_item_udp *udp_m = item->mask;
5312         const struct rte_flow_item_udp *udp_v = item->spec;
5313         void *headers_m;
5314         void *headers_v;
5315
5316         if (inner) {
5317                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5318                                          inner_headers);
5319                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5320         } else {
5321                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5322                                          outer_headers);
5323                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5324         }
5325         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5326         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
5327         if (!udp_v)
5328                 return;
5329         if (!udp_m)
5330                 udp_m = &rte_flow_item_udp_mask;
5331         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
5332                  rte_be_to_cpu_16(udp_m->hdr.src_port));
5333         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
5334                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
5335         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
5336                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
5337         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5338                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
5339 }
5340
5341 /**
5342  * Add GRE optional Key item to matcher and to the value.
5343  *
5344  * @param[in, out] matcher
5345  *   Flow matcher.
5346  * @param[in, out] key
5347  *   Flow matcher value.
5348  * @param[in] item
5349  *   Flow pattern to translate.
5350  * @param[in] inner
5351  *   Item is inner pattern.
5352  */
5353 static void
5354 flow_dv_translate_item_gre_key(void *matcher, void *key,
5355                                    const struct rte_flow_item *item)
5356 {
5357         const rte_be32_t *key_m = item->mask;
5358         const rte_be32_t *key_v = item->spec;
5359         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5360         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5361         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
5362
5363         if (!key_v)
5364                 return;
5365         if (!key_m)
5366                 key_m = &gre_key_default_mask;
5367         /* GRE K bit must be on and should already be validated */
5368         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
5369         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
5370         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
5371                  rte_be_to_cpu_32(*key_m) >> 8);
5372         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
5373                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
5374         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
5375                  rte_be_to_cpu_32(*key_m) & 0xFF);
5376         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
5377                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
5378 }
5379
5380 /**
5381  * Add GRE item to matcher and to the value.
5382  *
5383  * @param[in, out] matcher
5384  *   Flow matcher.
5385  * @param[in, out] key
5386  *   Flow matcher value.
5387  * @param[in] item
5388  *   Flow pattern to translate.
5389  * @param[in] inner
5390  *   Item is inner pattern.
5391  */
5392 static void
5393 flow_dv_translate_item_gre(void *matcher, void *key,
5394                            const struct rte_flow_item *item,
5395                            int inner)
5396 {
5397         const struct rte_flow_item_gre *gre_m = item->mask;
5398         const struct rte_flow_item_gre *gre_v = item->spec;
5399         void *headers_m;
5400         void *headers_v;
5401         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5402         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5403         struct {
5404                 union {
5405                         __extension__
5406                         struct {
5407                                 uint16_t version:3;
5408                                 uint16_t rsvd0:9;
5409                                 uint16_t s_present:1;
5410                                 uint16_t k_present:1;
5411                                 uint16_t rsvd_bit1:1;
5412                                 uint16_t c_present:1;
5413                         };
5414                         uint16_t value;
5415                 };
5416         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
5417
5418         if (inner) {
5419                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5420                                          inner_headers);
5421                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5422         } else {
5423                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5424                                          outer_headers);
5425                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5426         }
5427         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5428         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
5429         if (!gre_v)
5430                 return;
5431         if (!gre_m)
5432                 gre_m = &rte_flow_item_gre_mask;
5433         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
5434                  rte_be_to_cpu_16(gre_m->protocol));
5435         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5436                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
5437         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
5438         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
5439         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
5440                  gre_crks_rsvd0_ver_m.c_present);
5441         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
5442                  gre_crks_rsvd0_ver_v.c_present &
5443                  gre_crks_rsvd0_ver_m.c_present);
5444         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
5445                  gre_crks_rsvd0_ver_m.k_present);
5446         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
5447                  gre_crks_rsvd0_ver_v.k_present &
5448                  gre_crks_rsvd0_ver_m.k_present);
5449         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
5450                  gre_crks_rsvd0_ver_m.s_present);
5451         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
5452                  gre_crks_rsvd0_ver_v.s_present &
5453                  gre_crks_rsvd0_ver_m.s_present);
5454 }
5455
5456 /**
5457  * Add NVGRE item to matcher and to the value.
5458  *
5459  * @param[in, out] matcher
5460  *   Flow matcher.
5461  * @param[in, out] key
5462  *   Flow matcher value.
5463  * @param[in] item
5464  *   Flow pattern to translate.
5465  * @param[in] inner
5466  *   Item is inner pattern.
5467  */
5468 static void
5469 flow_dv_translate_item_nvgre(void *matcher, void *key,
5470                              const struct rte_flow_item *item,
5471                              int inner)
5472 {
5473         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
5474         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
5475         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5476         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5477         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
5478         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
5479         char *gre_key_m;
5480         char *gre_key_v;
5481         int size;
5482         int i;
5483
5484         /* For NVGRE, GRE header fields must be set with defined values. */
5485         const struct rte_flow_item_gre gre_spec = {
5486                 .c_rsvd0_ver = RTE_BE16(0x2000),
5487                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
5488         };
5489         const struct rte_flow_item_gre gre_mask = {
5490                 .c_rsvd0_ver = RTE_BE16(0xB000),
5491                 .protocol = RTE_BE16(UINT16_MAX),
5492         };
5493         const struct rte_flow_item gre_item = {
5494                 .spec = &gre_spec,
5495                 .mask = &gre_mask,
5496                 .last = NULL,
5497         };
5498         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
5499         if (!nvgre_v)
5500                 return;
5501         if (!nvgre_m)
5502                 nvgre_m = &rte_flow_item_nvgre_mask;
5503         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
5504         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
5505         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
5506         memcpy(gre_key_m, tni_flow_id_m, size);
5507         for (i = 0; i < size; ++i)
5508                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
5509 }
5510
5511 /**
5512  * Add VXLAN item to matcher and to the value.
5513  *
5514  * @param[in, out] matcher
5515  *   Flow matcher.
5516  * @param[in, out] key
5517  *   Flow matcher value.
5518  * @param[in] item
5519  *   Flow pattern to translate.
5520  * @param[in] inner
5521  *   Item is inner pattern.
5522  */
5523 static void
5524 flow_dv_translate_item_vxlan(void *matcher, void *key,
5525                              const struct rte_flow_item *item,
5526                              int inner)
5527 {
5528         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
5529         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
5530         void *headers_m;
5531         void *headers_v;
5532         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5533         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5534         char *vni_m;
5535         char *vni_v;
5536         uint16_t dport;
5537         int size;
5538         int i;
5539
5540         if (inner) {
5541                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5542                                          inner_headers);
5543                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5544         } else {
5545                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5546                                          outer_headers);
5547                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5548         }
5549         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
5550                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
5551         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5552                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5553                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5554         }
5555         if (!vxlan_v)
5556                 return;
5557         if (!vxlan_m)
5558                 vxlan_m = &rte_flow_item_vxlan_mask;
5559         size = sizeof(vxlan_m->vni);
5560         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
5561         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
5562         memcpy(vni_m, vxlan_m->vni, size);
5563         for (i = 0; i < size; ++i)
5564                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
5565 }
5566
5567 /**
5568  * Add Geneve item to matcher and to the value.
5569  *
5570  * @param[in, out] matcher
5571  *   Flow matcher.
5572  * @param[in, out] key
5573  *   Flow matcher value.
5574  * @param[in] item
5575  *   Flow pattern to translate.
5576  * @param[in] inner
5577  *   Item is inner pattern.
5578  */
5579
5580 static void
5581 flow_dv_translate_item_geneve(void *matcher, void *key,
5582                               const struct rte_flow_item *item, int inner)
5583 {
5584         const struct rte_flow_item_geneve *geneve_m = item->mask;
5585         const struct rte_flow_item_geneve *geneve_v = item->spec;
5586         void *headers_m;
5587         void *headers_v;
5588         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5589         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5590         uint16_t dport;
5591         uint16_t gbhdr_m;
5592         uint16_t gbhdr_v;
5593         char *vni_m;
5594         char *vni_v;
5595         size_t size, i;
5596
5597         if (inner) {
5598                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5599                                          inner_headers);
5600                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5601         } else {
5602                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5603                                          outer_headers);
5604                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5605         }
5606         dport = MLX5_UDP_PORT_GENEVE;
5607         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5608                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5609                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5610         }
5611         if (!geneve_v)
5612                 return;
5613         if (!geneve_m)
5614                 geneve_m = &rte_flow_item_geneve_mask;
5615         size = sizeof(geneve_m->vni);
5616         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
5617         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
5618         memcpy(vni_m, geneve_m->vni, size);
5619         for (i = 0; i < size; ++i)
5620                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
5621         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
5622                  rte_be_to_cpu_16(geneve_m->protocol));
5623         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
5624                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
5625         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
5626         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
5627         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
5628                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5629         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
5630                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5631         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
5632                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5633         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
5634                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
5635                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5636 }
5637
5638 /**
5639  * Add MPLS item to matcher and to the value.
5640  *
5641  * @param[in, out] matcher
5642  *   Flow matcher.
5643  * @param[in, out] key
5644  *   Flow matcher value.
5645  * @param[in] item
5646  *   Flow pattern to translate.
5647  * @param[in] prev_layer
5648  *   The protocol layer indicated in previous item.
5649  * @param[in] inner
5650  *   Item is inner pattern.
5651  */
5652 static void
5653 flow_dv_translate_item_mpls(void *matcher, void *key,
5654                             const struct rte_flow_item *item,
5655                             uint64_t prev_layer,
5656                             int inner)
5657 {
5658         const uint32_t *in_mpls_m = item->mask;
5659         const uint32_t *in_mpls_v = item->spec;
5660         uint32_t *out_mpls_m = 0;
5661         uint32_t *out_mpls_v = 0;
5662         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5663         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5664         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
5665                                      misc_parameters_2);
5666         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5667         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
5668         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5669
5670         switch (prev_layer) {
5671         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5672                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
5673                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5674                          MLX5_UDP_PORT_MPLS);
5675                 break;
5676         case MLX5_FLOW_LAYER_GRE:
5677                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
5678                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5679                          RTE_ETHER_TYPE_MPLS);
5680                 break;
5681         default:
5682                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5683                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5684                          IPPROTO_MPLS);
5685                 break;
5686         }
5687         if (!in_mpls_v)
5688                 return;
5689         if (!in_mpls_m)
5690                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
5691         switch (prev_layer) {
5692         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5693                 out_mpls_m =
5694                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5695                                                  outer_first_mpls_over_udp);
5696                 out_mpls_v =
5697                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5698                                                  outer_first_mpls_over_udp);
5699                 break;
5700         case MLX5_FLOW_LAYER_GRE:
5701                 out_mpls_m =
5702                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5703                                                  outer_first_mpls_over_gre);
5704                 out_mpls_v =
5705                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5706                                                  outer_first_mpls_over_gre);
5707                 break;
5708         default:
5709                 /* Inner MPLS not over GRE is not supported. */
5710                 if (!inner) {
5711                         out_mpls_m =
5712                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5713                                                          misc2_m,
5714                                                          outer_first_mpls);
5715                         out_mpls_v =
5716                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5717                                                          misc2_v,
5718                                                          outer_first_mpls);
5719                 }
5720                 break;
5721         }
5722         if (out_mpls_m && out_mpls_v) {
5723                 *out_mpls_m = *in_mpls_m;
5724                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
5725         }
5726 }
5727
5728 /**
5729  * Add metadata register item to matcher
5730  *
5731  * @param[in, out] matcher
5732  *   Flow matcher.
5733  * @param[in, out] key
5734  *   Flow matcher value.
5735  * @param[in] reg_type
5736  *   Type of device metadata register
5737  * @param[in] value
5738  *   Register value
5739  * @param[in] mask
5740  *   Register mask
5741  */
5742 static void
5743 flow_dv_match_meta_reg(void *matcher, void *key,
5744                        enum modify_reg reg_type,
5745                        uint32_t data, uint32_t mask)
5746 {
5747         void *misc2_m =
5748                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
5749         void *misc2_v =
5750                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5751
5752         data &= mask;
5753         switch (reg_type) {
5754         case REG_A:
5755                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
5756                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
5757                 break;
5758         case REG_B:
5759                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
5760                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
5761                 break;
5762         case REG_C_0:
5763                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, mask);
5764                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, data);
5765                 break;
5766         case REG_C_1:
5767                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
5768                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
5769                 break;
5770         case REG_C_2:
5771                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
5772                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
5773                 break;
5774         case REG_C_3:
5775                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
5776                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
5777                 break;
5778         case REG_C_4:
5779                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
5780                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
5781                 break;
5782         case REG_C_5:
5783                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
5784                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
5785                 break;
5786         case REG_C_6:
5787                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
5788                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
5789                 break;
5790         case REG_C_7:
5791                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
5792                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
5793                 break;
5794         default:
5795                 assert(false);
5796                 break;
5797         }
5798 }
5799
5800 /**
5801  * Add MARK item to matcher
5802  *
5803  * @param[in] dev
5804  *   The device to configure through.
5805  * @param[in, out] matcher
5806  *   Flow matcher.
5807  * @param[in, out] key
5808  *   Flow matcher value.
5809  * @param[in] item
5810  *   Flow pattern to translate.
5811  */
5812 static void
5813 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
5814                             void *matcher, void *key,
5815                             const struct rte_flow_item *item)
5816 {
5817         struct mlx5_priv *priv = dev->data->dev_private;
5818         const struct rte_flow_item_mark *mark;
5819         uint32_t value;
5820         uint32_t mask;
5821
5822         mark = item->mask ? (const void *)item->mask :
5823                             &rte_flow_item_mark_mask;
5824         mask = mark->id & priv->sh->dv_mark_mask;
5825         mark = (const void *)item->spec;
5826         assert(mark);
5827         value = mark->id & priv->sh->dv_mark_mask & mask;
5828         if (mask) {
5829                 enum modify_reg reg;
5830
5831                 /* Get the metadata register index for the mark. */
5832                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
5833                 assert(reg > 0);
5834                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
5835         }
5836 }
5837
5838 /**
5839  * Add META item to matcher
5840  *
5841  * @param[in] dev
5842  *   The devich to configure through.
5843  * @param[in, out] matcher
5844  *   Flow matcher.
5845  * @param[in, out] key
5846  *   Flow matcher value.
5847  * @param[in] attr
5848  *   Attributes of flow that includes this item.
5849  * @param[in] item
5850  *   Flow pattern to translate.
5851  */
5852 static void
5853 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
5854                             void *matcher, void *key,
5855                             const struct rte_flow_attr *attr,
5856                             const struct rte_flow_item *item)
5857 {
5858         const struct rte_flow_item_meta *meta_m;
5859         const struct rte_flow_item_meta *meta_v;
5860
5861         meta_m = (const void *)item->mask;
5862         if (!meta_m)
5863                 meta_m = &rte_flow_item_meta_mask;
5864         meta_v = (const void *)item->spec;
5865         if (meta_v) {
5866                 enum modify_reg reg;
5867                 uint32_t value = meta_v->data;
5868                 uint32_t mask = meta_m->data;
5869
5870                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
5871                 if (reg < 0)
5872                         return;
5873                 /*
5874                  * In datapath code there is no endianness
5875                  * coversions for perfromance reasons, all
5876                  * pattern conversions are done in rte_flow.
5877                  */
5878                 value = rte_cpu_to_be_32(value);
5879                 mask = rte_cpu_to_be_32(mask);
5880                 if (reg == REG_C_0) {
5881                         struct mlx5_priv *priv = dev->data->dev_private;
5882                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
5883                         uint32_t shl_c0 = rte_bsf32(msk_c0);
5884
5885                         msk_c0 = rte_cpu_to_be_32(msk_c0);
5886                         value <<= shl_c0;
5887                         mask <<= shl_c0;
5888                         assert(msk_c0);
5889                         assert(!(~msk_c0 & mask));
5890                 }
5891                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
5892         }
5893 }
5894
5895 /**
5896  * Add vport metadata Reg C0 item to matcher
5897  *
5898  * @param[in, out] matcher
5899  *   Flow matcher.
5900  * @param[in, out] key
5901  *   Flow matcher value.
5902  * @param[in] reg
5903  *   Flow pattern to translate.
5904  */
5905 static void
5906 flow_dv_translate_item_meta_vport(void *matcher, void *key,
5907                                   uint32_t value, uint32_t mask)
5908 {
5909         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
5910 }
5911
5912 /**
5913  * Add tag item to matcher
5914  *
5915  * @param[in, out] matcher
5916  *   Flow matcher.
5917  * @param[in, out] key
5918  *   Flow matcher value.
5919  * @param[in] item
5920  *   Flow pattern to translate.
5921  */
5922 static void
5923 flow_dv_translate_mlx5_item_tag(void *matcher, void *key,
5924                                 const struct rte_flow_item *item)
5925 {
5926         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
5927         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
5928
5929         assert(tag_v);
5930         flow_dv_match_meta_reg(matcher, key, tag_v->id, tag_v->data,
5931                                tag_m ? tag_m->data : UINT32_MAX);
5932 }
5933
5934 /**
5935  * Add TAG item to matcher
5936  *
5937  * @param[in] dev
5938  *   The devich to configure through.
5939  * @param[in, out] matcher
5940  *   Flow matcher.
5941  * @param[in, out] key
5942  *   Flow matcher value.
5943  * @param[in] item
5944  *   Flow pattern to translate.
5945  */
5946 static void
5947 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
5948                            void *matcher, void *key,
5949                            const struct rte_flow_item *item)
5950 {
5951         const struct rte_flow_item_tag *tag_v = item->spec;
5952         const struct rte_flow_item_tag *tag_m = item->mask;
5953         enum modify_reg reg;
5954
5955         assert(tag_v);
5956         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
5957         /* Get the metadata register index for the tag. */
5958         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
5959         assert(reg > 0);
5960         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
5961 }
5962
5963 /**
5964  * Add source vport match to the specified matcher.
5965  *
5966  * @param[in, out] matcher
5967  *   Flow matcher.
5968  * @param[in, out] key
5969  *   Flow matcher value.
5970  * @param[in] port
5971  *   Source vport value to match
5972  * @param[in] mask
5973  *   Mask
5974  */
5975 static void
5976 flow_dv_translate_item_source_vport(void *matcher, void *key,
5977                                     int16_t port, uint16_t mask)
5978 {
5979         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5980         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5981
5982         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
5983         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
5984 }
5985
5986 /**
5987  * Translate port-id item to eswitch match on  port-id.
5988  *
5989  * @param[in] dev
5990  *   The devich to configure through.
5991  * @param[in, out] matcher
5992  *   Flow matcher.
5993  * @param[in, out] key
5994  *   Flow matcher value.
5995  * @param[in] item
5996  *   Flow pattern to translate.
5997  *
5998  * @return
5999  *   0 on success, a negative errno value otherwise.
6000  */
6001 static int
6002 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
6003                                void *key, const struct rte_flow_item *item)
6004 {
6005         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
6006         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
6007         struct mlx5_priv *priv;
6008         uint16_t mask, id;
6009
6010         mask = pid_m ? pid_m->id : 0xffff;
6011         id = pid_v ? pid_v->id : dev->data->port_id;
6012         priv = mlx5_port_to_eswitch_info(id, item == NULL);
6013         if (!priv)
6014                 return -rte_errno;
6015         /* Translate to vport field or to metadata, depending on mode. */
6016         if (priv->vport_meta_mask)
6017                 flow_dv_translate_item_meta_vport(matcher, key,
6018                                                   priv->vport_meta_tag,
6019                                                   priv->vport_meta_mask);
6020         else
6021                 flow_dv_translate_item_source_vport(matcher, key,
6022                                                     priv->vport_id, mask);
6023         return 0;
6024 }
6025
6026 /**
6027  * Add ICMP6 item to matcher and to the value.
6028  *
6029  * @param[in, out] matcher
6030  *   Flow matcher.
6031  * @param[in, out] key
6032  *   Flow matcher value.
6033  * @param[in] item
6034  *   Flow pattern to translate.
6035  * @param[in] inner
6036  *   Item is inner pattern.
6037  */
6038 static void
6039 flow_dv_translate_item_icmp6(void *matcher, void *key,
6040                               const struct rte_flow_item *item,
6041                               int inner)
6042 {
6043         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
6044         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
6045         void *headers_m;
6046         void *headers_v;
6047         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6048                                      misc_parameters_3);
6049         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6050         if (inner) {
6051                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6052                                          inner_headers);
6053                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6054         } else {
6055                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6056                                          outer_headers);
6057                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6058         }
6059         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6060         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
6061         if (!icmp6_v)
6062                 return;
6063         if (!icmp6_m)
6064                 icmp6_m = &rte_flow_item_icmp6_mask;
6065         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
6066         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
6067                  icmp6_v->type & icmp6_m->type);
6068         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
6069         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
6070                  icmp6_v->code & icmp6_m->code);
6071 }
6072
6073 /**
6074  * Add ICMP item to matcher and to the value.
6075  *
6076  * @param[in, out] matcher
6077  *   Flow matcher.
6078  * @param[in, out] key
6079  *   Flow matcher value.
6080  * @param[in] item
6081  *   Flow pattern to translate.
6082  * @param[in] inner
6083  *   Item is inner pattern.
6084  */
6085 static void
6086 flow_dv_translate_item_icmp(void *matcher, void *key,
6087                             const struct rte_flow_item *item,
6088                             int inner)
6089 {
6090         const struct rte_flow_item_icmp *icmp_m = item->mask;
6091         const struct rte_flow_item_icmp *icmp_v = item->spec;
6092         void *headers_m;
6093         void *headers_v;
6094         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6095                                      misc_parameters_3);
6096         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6097         if (inner) {
6098                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6099                                          inner_headers);
6100                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6101         } else {
6102                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6103                                          outer_headers);
6104                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6105         }
6106         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6107         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
6108         if (!icmp_v)
6109                 return;
6110         if (!icmp_m)
6111                 icmp_m = &rte_flow_item_icmp_mask;
6112         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
6113                  icmp_m->hdr.icmp_type);
6114         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
6115                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
6116         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
6117                  icmp_m->hdr.icmp_code);
6118         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
6119                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
6120 }
6121
6122 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
6123
6124 #define HEADER_IS_ZERO(match_criteria, headers)                              \
6125         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
6126                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
6127
6128 /**
6129  * Calculate flow matcher enable bitmap.
6130  *
6131  * @param match_criteria
6132  *   Pointer to flow matcher criteria.
6133  *
6134  * @return
6135  *   Bitmap of enabled fields.
6136  */
6137 static uint8_t
6138 flow_dv_matcher_enable(uint32_t *match_criteria)
6139 {
6140         uint8_t match_criteria_enable;
6141
6142         match_criteria_enable =
6143                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
6144                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
6145         match_criteria_enable |=
6146                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
6147                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
6148         match_criteria_enable |=
6149                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
6150                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
6151         match_criteria_enable |=
6152                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
6153                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
6154         match_criteria_enable |=
6155                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
6156                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
6157         return match_criteria_enable;
6158 }
6159
6160
6161 /**
6162  * Get a flow table.
6163  *
6164  * @param[in, out] dev
6165  *   Pointer to rte_eth_dev structure.
6166  * @param[in] table_id
6167  *   Table id to use.
6168  * @param[in] egress
6169  *   Direction of the table.
6170  * @param[in] transfer
6171  *   E-Switch or NIC flow.
6172  * @param[out] error
6173  *   pointer to error structure.
6174  *
6175  * @return
6176  *   Returns tables resource based on the index, NULL in case of failed.
6177  */
6178 static struct mlx5_flow_tbl_resource *
6179 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
6180                          uint32_t table_id, uint8_t egress,
6181                          uint8_t transfer,
6182                          struct rte_flow_error *error)
6183 {
6184         struct mlx5_priv *priv = dev->data->dev_private;
6185         struct mlx5_ibv_shared *sh = priv->sh;
6186         struct mlx5_flow_tbl_resource *tbl;
6187         union mlx5_flow_tbl_key table_key = {
6188                 {
6189                         .table_id = table_id,
6190                         .reserved = 0,
6191                         .domain = !!transfer,
6192                         .direction = !!egress,
6193                 }
6194         };
6195         struct mlx5_hlist_entry *pos = mlx5_hlist_lookup(sh->flow_tbls,
6196                                                          table_key.v64);
6197         struct mlx5_flow_tbl_data_entry *tbl_data;
6198         int ret;
6199         void *domain;
6200
6201         if (pos) {
6202                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
6203                                         entry);
6204                 tbl = &tbl_data->tbl;
6205                 rte_atomic32_inc(&tbl->refcnt);
6206                 return tbl;
6207         }
6208         tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
6209         if (!tbl_data) {
6210                 rte_flow_error_set(error, ENOMEM,
6211                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6212                                    NULL,
6213                                    "cannot allocate flow table data entry");
6214                 return NULL;
6215         }
6216         tbl = &tbl_data->tbl;
6217         pos = &tbl_data->entry;
6218         if (transfer)
6219                 domain = sh->fdb_domain;
6220         else if (egress)
6221                 domain = sh->tx_domain;
6222         else
6223                 domain = sh->rx_domain;
6224         tbl->obj = mlx5_glue->dr_create_flow_tbl(domain, table_id);
6225         if (!tbl->obj) {
6226                 rte_flow_error_set(error, ENOMEM,
6227                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6228                                    NULL, "cannot create flow table object");
6229                 rte_free(tbl_data);
6230                 return NULL;
6231         }
6232         /*
6233          * No multi-threads now, but still better to initialize the reference
6234          * count before insert it into the hash list.
6235          */
6236         rte_atomic32_init(&tbl->refcnt);
6237         /* Jump action reference count is initialized here. */
6238         rte_atomic32_init(&tbl_data->jump.refcnt);
6239         pos->key = table_key.v64;
6240         ret = mlx5_hlist_insert(sh->flow_tbls, pos);
6241         if (ret < 0) {
6242                 rte_flow_error_set(error, -ret,
6243                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6244                                    "cannot insert flow table data entry");
6245                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6246                 rte_free(tbl_data);
6247         }
6248         rte_atomic32_inc(&tbl->refcnt);
6249         return tbl;
6250 }
6251
6252 /**
6253  * Release a flow table.
6254  *
6255  * @param[in] dev
6256  *   Pointer to rte_eth_dev structure.
6257  * @param[in] tbl
6258  *   Table resource to be released.
6259  *
6260  * @return
6261  *   Returns 0 if table was released, else return 1;
6262  */
6263 static int
6264 flow_dv_tbl_resource_release(struct rte_eth_dev *dev,
6265                              struct mlx5_flow_tbl_resource *tbl)
6266 {
6267         struct mlx5_priv *priv = dev->data->dev_private;
6268         struct mlx5_ibv_shared *sh = priv->sh;
6269         struct mlx5_flow_tbl_data_entry *tbl_data =
6270                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6271
6272         if (!tbl)
6273                 return 0;
6274         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
6275                 struct mlx5_hlist_entry *pos = &tbl_data->entry;
6276
6277                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6278                 tbl->obj = NULL;
6279                 /* remove the entry from the hash list and free memory. */
6280                 mlx5_hlist_remove(sh->flow_tbls, pos);
6281                 rte_free(tbl_data);
6282                 return 0;
6283         }
6284         return 1;
6285 }
6286
6287 /**
6288  * Register the flow matcher.
6289  *
6290  * @param[in, out] dev
6291  *   Pointer to rte_eth_dev structure.
6292  * @param[in, out] matcher
6293  *   Pointer to flow matcher.
6294  * @param[in, out] key
6295  *   Pointer to flow table key.
6296  * @parm[in, out] dev_flow
6297  *   Pointer to the dev_flow.
6298  * @param[out] error
6299  *   pointer to error structure.
6300  *
6301  * @return
6302  *   0 on success otherwise -errno and errno is set.
6303  */
6304 static int
6305 flow_dv_matcher_register(struct rte_eth_dev *dev,
6306                          struct mlx5_flow_dv_matcher *matcher,
6307                          union mlx5_flow_tbl_key *key,
6308                          struct mlx5_flow *dev_flow,
6309                          struct rte_flow_error *error)
6310 {
6311         struct mlx5_priv *priv = dev->data->dev_private;
6312         struct mlx5_ibv_shared *sh = priv->sh;
6313         struct mlx5_flow_dv_matcher *cache_matcher;
6314         struct mlx5dv_flow_matcher_attr dv_attr = {
6315                 .type = IBV_FLOW_ATTR_NORMAL,
6316                 .match_mask = (void *)&matcher->mask,
6317         };
6318         struct mlx5_flow_tbl_resource *tbl;
6319         struct mlx5_flow_tbl_data_entry *tbl_data;
6320
6321         tbl = flow_dv_tbl_resource_get(dev, key->table_id, key->direction,
6322                                        key->domain, error);
6323         if (!tbl)
6324                 return -rte_errno;      /* No need to refill the error info */
6325         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6326         /* Lookup from cache. */
6327         LIST_FOREACH(cache_matcher, &tbl_data->matchers, next) {
6328                 if (matcher->crc == cache_matcher->crc &&
6329                     matcher->priority == cache_matcher->priority &&
6330                     !memcmp((const void *)matcher->mask.buf,
6331                             (const void *)cache_matcher->mask.buf,
6332                             cache_matcher->mask.size)) {
6333                         DRV_LOG(DEBUG,
6334                                 "%s group %u priority %hd use %s "
6335                                 "matcher %p: refcnt %d++",
6336                                 key->domain ? "FDB" : "NIC", key->table_id,
6337                                 cache_matcher->priority,
6338                                 key->direction ? "tx" : "rx",
6339                                 (void *)cache_matcher,
6340                                 rte_atomic32_read(&cache_matcher->refcnt));
6341                         rte_atomic32_inc(&cache_matcher->refcnt);
6342                         dev_flow->dv.matcher = cache_matcher;
6343                         /* old matcher should not make the table ref++. */
6344                         flow_dv_tbl_resource_release(dev, tbl);
6345                         return 0;
6346                 }
6347         }
6348         /* Register new matcher. */
6349         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
6350         if (!cache_matcher) {
6351                 flow_dv_tbl_resource_release(dev, tbl);
6352                 return rte_flow_error_set(error, ENOMEM,
6353                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6354                                           "cannot allocate matcher memory");
6355         }
6356         *cache_matcher = *matcher;
6357         dv_attr.match_criteria_enable =
6358                 flow_dv_matcher_enable(cache_matcher->mask.buf);
6359         dv_attr.priority = matcher->priority;
6360         if (key->direction)
6361                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
6362         cache_matcher->matcher_object =
6363                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
6364         if (!cache_matcher->matcher_object) {
6365                 rte_free(cache_matcher);
6366 #ifdef HAVE_MLX5DV_DR
6367                 flow_dv_tbl_resource_release(dev, tbl);
6368 #endif
6369                 return rte_flow_error_set(error, ENOMEM,
6370                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6371                                           NULL, "cannot create matcher");
6372         }
6373         /* Save the table information */
6374         cache_matcher->tbl = tbl;
6375         rte_atomic32_init(&cache_matcher->refcnt);
6376         /* only matcher ref++, table ref++ already done above in get API. */
6377         rte_atomic32_inc(&cache_matcher->refcnt);
6378         LIST_INSERT_HEAD(&tbl_data->matchers, cache_matcher, next);
6379         dev_flow->dv.matcher = cache_matcher;
6380         DRV_LOG(DEBUG, "%s group %u priority %hd new %s matcher %p: refcnt %d",
6381                 key->domain ? "FDB" : "NIC", key->table_id,
6382                 cache_matcher->priority,
6383                 key->direction ? "tx" : "rx", (void *)cache_matcher,
6384                 rte_atomic32_read(&cache_matcher->refcnt));
6385         return 0;
6386 }
6387
6388 /**
6389  * Find existing tag resource or create and register a new one.
6390  *
6391  * @param dev[in, out]
6392  *   Pointer to rte_eth_dev structure.
6393  * @param[in, out] tag_be24
6394  *   Tag value in big endian then R-shift 8.
6395  * @parm[in, out] dev_flow
6396  *   Pointer to the dev_flow.
6397  * @param[out] error
6398  *   pointer to error structure.
6399  *
6400  * @return
6401  *   0 on success otherwise -errno and errno is set.
6402  */
6403 static int
6404 flow_dv_tag_resource_register
6405                         (struct rte_eth_dev *dev,
6406                          uint32_t tag_be24,
6407                          struct mlx5_flow *dev_flow,
6408                          struct rte_flow_error *error)
6409 {
6410         struct mlx5_priv *priv = dev->data->dev_private;
6411         struct mlx5_ibv_shared *sh = priv->sh;
6412         struct mlx5_flow_dv_tag_resource *cache_resource;
6413         struct mlx5_hlist_entry *entry;
6414
6415         /* Lookup a matching resource from cache. */
6416         entry = mlx5_hlist_lookup(sh->tag_table, (uint64_t)tag_be24);
6417         if (entry) {
6418                 cache_resource = container_of
6419                         (entry, struct mlx5_flow_dv_tag_resource, entry);
6420                 rte_atomic32_inc(&cache_resource->refcnt);
6421                 dev_flow->dv.tag_resource = cache_resource;
6422                 DRV_LOG(DEBUG, "cached tag resource %p: refcnt now %d++",
6423                         (void *)cache_resource,
6424                         rte_atomic32_read(&cache_resource->refcnt));
6425                 return 0;
6426         }
6427         /* Register new resource. */
6428         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
6429         if (!cache_resource)
6430                 return rte_flow_error_set(error, ENOMEM,
6431                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6432                                           "cannot allocate resource memory");
6433         cache_resource->entry.key = (uint64_t)tag_be24;
6434         cache_resource->action = mlx5_glue->dv_create_flow_action_tag(tag_be24);
6435         if (!cache_resource->action) {
6436                 rte_free(cache_resource);
6437                 return rte_flow_error_set(error, ENOMEM,
6438                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6439                                           NULL, "cannot create action");
6440         }
6441         rte_atomic32_init(&cache_resource->refcnt);
6442         rte_atomic32_inc(&cache_resource->refcnt);
6443         if (mlx5_hlist_insert(sh->tag_table, &cache_resource->entry)) {
6444                 mlx5_glue->destroy_flow_action(cache_resource->action);
6445                 rte_free(cache_resource);
6446                 return rte_flow_error_set(error, EEXIST,
6447                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6448                                           NULL, "cannot insert tag");
6449         }
6450         dev_flow->dv.tag_resource = cache_resource;
6451         DRV_LOG(DEBUG, "new tag resource %p: refcnt now %d++",
6452                 (void *)cache_resource,
6453                 rte_atomic32_read(&cache_resource->refcnt));
6454         return 0;
6455 }
6456
6457 /**
6458  * Release the tag.
6459  *
6460  * @param dev
6461  *   Pointer to Ethernet device.
6462  * @param flow
6463  *   Pointer to mlx5_flow.
6464  *
6465  * @return
6466  *   1 while a reference on it exists, 0 when freed.
6467  */
6468 static int
6469 flow_dv_tag_release(struct rte_eth_dev *dev,
6470                     struct mlx5_flow_dv_tag_resource *tag)
6471 {
6472         struct mlx5_priv *priv = dev->data->dev_private;
6473         struct mlx5_ibv_shared *sh = priv->sh;
6474
6475         assert(tag);
6476         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
6477                 dev->data->port_id, (void *)tag,
6478                 rte_atomic32_read(&tag->refcnt));
6479         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
6480                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
6481                 mlx5_hlist_remove(sh->tag_table, &tag->entry);
6482                 DRV_LOG(DEBUG, "port %u tag %p: removed",
6483                         dev->data->port_id, (void *)tag);
6484                 rte_free(tag);
6485                 return 0;
6486         }
6487         return 1;
6488 }
6489
6490 /**
6491  * Translate port ID action to vport.
6492  *
6493  * @param[in] dev
6494  *   Pointer to rte_eth_dev structure.
6495  * @param[in] action
6496  *   Pointer to the port ID action.
6497  * @param[out] dst_port_id
6498  *   The target port ID.
6499  * @param[out] error
6500  *   Pointer to the error structure.
6501  *
6502  * @return
6503  *   0 on success, a negative errno value otherwise and rte_errno is set.
6504  */
6505 static int
6506 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
6507                                  const struct rte_flow_action *action,
6508                                  uint32_t *dst_port_id,
6509                                  struct rte_flow_error *error)
6510 {
6511         uint32_t port;
6512         struct mlx5_priv *priv;
6513         const struct rte_flow_action_port_id *conf =
6514                         (const struct rte_flow_action_port_id *)action->conf;
6515
6516         port = conf->original ? dev->data->port_id : conf->id;
6517         priv = mlx5_port_to_eswitch_info(port, false);
6518         if (!priv)
6519                 return rte_flow_error_set(error, -rte_errno,
6520                                           RTE_FLOW_ERROR_TYPE_ACTION,
6521                                           NULL,
6522                                           "No eswitch info was found for port");
6523 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
6524         /*
6525          * This parameter is transferred to
6526          * mlx5dv_dr_action_create_dest_ib_port().
6527          */
6528         *dst_port_id = priv->ibv_port;
6529 #else
6530         /*
6531          * Legacy mode, no LAG configurations is supported.
6532          * This parameter is transferred to
6533          * mlx5dv_dr_action_create_dest_vport().
6534          */
6535         *dst_port_id = priv->vport_id;
6536 #endif
6537         return 0;
6538 }
6539
6540 /**
6541  * Add Tx queue matcher
6542  *
6543  * @param[in] dev
6544  *   Pointer to the dev struct.
6545  * @param[in, out] matcher
6546  *   Flow matcher.
6547  * @param[in, out] key
6548  *   Flow matcher value.
6549  * @param[in] item
6550  *   Flow pattern to translate.
6551  * @param[in] inner
6552  *   Item is inner pattern.
6553  */
6554 static void
6555 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
6556                                 void *matcher, void *key,
6557                                 const struct rte_flow_item *item)
6558 {
6559         const struct mlx5_rte_flow_item_tx_queue *queue_m;
6560         const struct mlx5_rte_flow_item_tx_queue *queue_v;
6561         void *misc_m =
6562                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6563         void *misc_v =
6564                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6565         struct mlx5_txq_ctrl *txq;
6566         uint32_t queue;
6567
6568
6569         queue_m = (const void *)item->mask;
6570         if (!queue_m)
6571                 return;
6572         queue_v = (const void *)item->spec;
6573         if (!queue_v)
6574                 return;
6575         txq = mlx5_txq_get(dev, queue_v->queue);
6576         if (!txq)
6577                 return;
6578         queue = txq->obj->sq->id;
6579         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
6580         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
6581                  queue & queue_m->queue);
6582         mlx5_txq_release(dev, queue_v->queue);
6583 }
6584
6585 /**
6586  * Set the hash fields according to the @p flow information.
6587  *
6588  * @param[in] dev_flow
6589  *   Pointer to the mlx5_flow.
6590  */
6591 static void
6592 flow_dv_hashfields_set(struct mlx5_flow *dev_flow)
6593 {
6594         struct rte_flow *flow = dev_flow->flow;
6595         uint64_t items = dev_flow->layers;
6596         int rss_inner = 0;
6597         uint64_t rss_types = rte_eth_rss_hf_refine(flow->rss.types);
6598
6599         dev_flow->hash_fields = 0;
6600 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
6601         if (flow->rss.level >= 2) {
6602                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
6603                 rss_inner = 1;
6604         }
6605 #endif
6606         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
6607             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
6608                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
6609                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
6610                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
6611                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
6612                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
6613                         else
6614                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
6615                 }
6616         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
6617                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
6618                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
6619                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
6620                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
6621                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
6622                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
6623                         else
6624                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
6625                 }
6626         }
6627         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
6628             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
6629                 if (rss_types & ETH_RSS_UDP) {
6630                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
6631                                 dev_flow->hash_fields |=
6632                                                 IBV_RX_HASH_SRC_PORT_UDP;
6633                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
6634                                 dev_flow->hash_fields |=
6635                                                 IBV_RX_HASH_DST_PORT_UDP;
6636                         else
6637                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
6638                 }
6639         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
6640                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
6641                 if (rss_types & ETH_RSS_TCP) {
6642                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
6643                                 dev_flow->hash_fields |=
6644                                                 IBV_RX_HASH_SRC_PORT_TCP;
6645                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
6646                                 dev_flow->hash_fields |=
6647                                                 IBV_RX_HASH_DST_PORT_TCP;
6648                         else
6649                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
6650                 }
6651         }
6652 }
6653
6654 /**
6655  * Fill the flow with DV spec, lock free
6656  * (mutex should be acquired by caller).
6657  *
6658  * @param[in] dev
6659  *   Pointer to rte_eth_dev structure.
6660  * @param[in, out] dev_flow
6661  *   Pointer to the sub flow.
6662  * @param[in] attr
6663  *   Pointer to the flow attributes.
6664  * @param[in] items
6665  *   Pointer to the list of items.
6666  * @param[in] actions
6667  *   Pointer to the list of actions.
6668  * @param[out] error
6669  *   Pointer to the error structure.
6670  *
6671  * @return
6672  *   0 on success, a negative errno value otherwise and rte_errno is set.
6673  */
6674 static int
6675 __flow_dv_translate(struct rte_eth_dev *dev,
6676                     struct mlx5_flow *dev_flow,
6677                     const struct rte_flow_attr *attr,
6678                     const struct rte_flow_item items[],
6679                     const struct rte_flow_action actions[],
6680                     struct rte_flow_error *error)
6681 {
6682         struct mlx5_priv *priv = dev->data->dev_private;
6683         struct mlx5_dev_config *dev_conf = &priv->config;
6684         struct rte_flow *flow = dev_flow->flow;
6685         uint64_t item_flags = 0;
6686         uint64_t last_item = 0;
6687         uint64_t action_flags = 0;
6688         uint64_t priority = attr->priority;
6689         struct mlx5_flow_dv_matcher matcher = {
6690                 .mask = {
6691                         .size = sizeof(matcher.mask.buf),
6692                 },
6693         };
6694         int actions_n = 0;
6695         bool actions_end = false;
6696         struct mlx5_flow_dv_modify_hdr_resource mhdr_res = {
6697                 .ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
6698                                           MLX5DV_FLOW_TABLE_TYPE_NIC_RX
6699         };
6700         union flow_dv_attr flow_attr = { .attr = 0 };
6701         uint32_t tag_be;
6702         union mlx5_flow_tbl_key tbl_key;
6703         uint32_t modify_action_position = UINT32_MAX;
6704         void *match_mask = matcher.mask.buf;
6705         void *match_value = dev_flow->dv.value.buf;
6706         uint8_t next_protocol = 0xff;
6707         struct rte_vlan_hdr vlan = { 0 };
6708         uint32_t table;
6709         int ret = 0;
6710
6711         ret = mlx5_flow_group_to_table(attr, dev_flow->external, attr->group,
6712                                        &table, error);
6713         if (ret)
6714                 return ret;
6715         dev_flow->group = table;
6716         if (attr->transfer)
6717                 mhdr_res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
6718         if (priority == MLX5_FLOW_PRIO_RSVD)
6719                 priority = dev_conf->flow_prio - 1;
6720         for (; !actions_end ; actions++) {
6721                 const struct rte_flow_action_queue *queue;
6722                 const struct rte_flow_action_rss *rss;
6723                 const struct rte_flow_action *action = actions;
6724                 const struct rte_flow_action_count *count = action->conf;
6725                 const uint8_t *rss_key;
6726                 const struct rte_flow_action_jump *jump_data;
6727                 const struct rte_flow_action_meter *mtr;
6728                 struct mlx5_flow_tbl_resource *tbl;
6729                 uint32_t port_id = 0;
6730                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
6731                 int action_type = actions->type;
6732                 const struct rte_flow_action *found_action = NULL;
6733
6734                 switch (action_type) {
6735                 case RTE_FLOW_ACTION_TYPE_VOID:
6736                         break;
6737                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
6738                         if (flow_dv_translate_action_port_id(dev, action,
6739                                                              &port_id, error))
6740                                 return -rte_errno;
6741                         port_id_resource.port_id = port_id;
6742                         if (flow_dv_port_id_action_resource_register
6743                             (dev, &port_id_resource, dev_flow, error))
6744                                 return -rte_errno;
6745                         dev_flow->dv.actions[actions_n++] =
6746                                 dev_flow->dv.port_id_action->action;
6747                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
6748                         break;
6749                 case RTE_FLOW_ACTION_TYPE_FLAG:
6750                         action_flags |= MLX5_FLOW_ACTION_FLAG;
6751                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
6752                                 struct rte_flow_action_mark mark = {
6753                                         .id = MLX5_FLOW_MARK_DEFAULT,
6754                                 };
6755
6756                                 if (flow_dv_convert_action_mark(dev, &mark,
6757                                                                 &mhdr_res,
6758                                                                 error))
6759                                         return -rte_errno;
6760                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
6761                                 break;
6762                         }
6763                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
6764                         if (!dev_flow->dv.tag_resource)
6765                                 if (flow_dv_tag_resource_register
6766                                     (dev, tag_be, dev_flow, error))
6767                                         return -rte_errno;
6768                         dev_flow->dv.actions[actions_n++] =
6769                                 dev_flow->dv.tag_resource->action;
6770                         break;
6771                 case RTE_FLOW_ACTION_TYPE_MARK:
6772                         action_flags |= MLX5_FLOW_ACTION_MARK;
6773                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
6774                                 const struct rte_flow_action_mark *mark =
6775                                         (const struct rte_flow_action_mark *)
6776                                                 actions->conf;
6777
6778                                 if (flow_dv_convert_action_mark(dev, mark,
6779                                                                 &mhdr_res,
6780                                                                 error))
6781                                         return -rte_errno;
6782                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
6783                                 break;
6784                         }
6785                         /* Fall-through */
6786                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
6787                         /* Legacy (non-extensive) MARK action. */
6788                         tag_be = mlx5_flow_mark_set
6789                               (((const struct rte_flow_action_mark *)
6790                                (actions->conf))->id);
6791                         if (!dev_flow->dv.tag_resource)
6792                                 if (flow_dv_tag_resource_register
6793                                     (dev, tag_be, dev_flow, error))
6794                                         return -rte_errno;
6795                         dev_flow->dv.actions[actions_n++] =
6796                                 dev_flow->dv.tag_resource->action;
6797                         break;
6798                 case RTE_FLOW_ACTION_TYPE_SET_META:
6799                         if (flow_dv_convert_action_set_meta
6800                                 (dev, &mhdr_res, attr,
6801                                  (const struct rte_flow_action_set_meta *)
6802                                   actions->conf, error))
6803                                 return -rte_errno;
6804                         action_flags |= MLX5_FLOW_ACTION_SET_META;
6805                         break;
6806                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
6807                         if (flow_dv_convert_action_set_tag
6808                                 (dev, &mhdr_res,
6809                                  (const struct rte_flow_action_set_tag *)
6810                                   actions->conf, error))
6811                                 return -rte_errno;
6812                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
6813                         break;
6814                 case RTE_FLOW_ACTION_TYPE_DROP:
6815                         action_flags |= MLX5_FLOW_ACTION_DROP;
6816                         break;
6817                 case RTE_FLOW_ACTION_TYPE_QUEUE:
6818                         assert(flow->rss.queue);
6819                         queue = actions->conf;
6820                         flow->rss.queue_num = 1;
6821                         (*flow->rss.queue)[0] = queue->index;
6822                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
6823                         break;
6824                 case RTE_FLOW_ACTION_TYPE_RSS:
6825                         assert(flow->rss.queue);
6826                         rss = actions->conf;
6827                         if (flow->rss.queue)
6828                                 memcpy((*flow->rss.queue), rss->queue,
6829                                        rss->queue_num * sizeof(uint16_t));
6830                         flow->rss.queue_num = rss->queue_num;
6831                         /* NULL RSS key indicates default RSS key. */
6832                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
6833                         memcpy(flow->rss.key, rss_key, MLX5_RSS_HASH_KEY_LEN);
6834                         /*
6835                          * rss->level and rss.types should be set in advance
6836                          * when expanding items for RSS.
6837                          */
6838                         action_flags |= MLX5_FLOW_ACTION_RSS;
6839                         break;
6840                 case RTE_FLOW_ACTION_TYPE_COUNT:
6841                         if (!dev_conf->devx) {
6842                                 rte_errno = ENOTSUP;
6843                                 goto cnt_err;
6844                         }
6845                         flow->counter = flow_dv_counter_alloc(dev,
6846                                                               count->shared,
6847                                                               count->id,
6848                                                               dev_flow->group);
6849                         if (flow->counter == NULL)
6850                                 goto cnt_err;
6851                         dev_flow->dv.actions[actions_n++] =
6852                                 flow->counter->action;
6853                         action_flags |= MLX5_FLOW_ACTION_COUNT;
6854                         break;
6855 cnt_err:
6856                         if (rte_errno == ENOTSUP)
6857                                 return rte_flow_error_set
6858                                               (error, ENOTSUP,
6859                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6860                                                NULL,
6861                                                "count action not supported");
6862                         else
6863                                 return rte_flow_error_set
6864                                                 (error, rte_errno,
6865                                                  RTE_FLOW_ERROR_TYPE_ACTION,
6866                                                  action,
6867                                                  "cannot create counter"
6868                                                   " object.");
6869                         break;
6870                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
6871                         dev_flow->dv.actions[actions_n++] =
6872                                                 priv->sh->pop_vlan_action;
6873                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
6874                         break;
6875                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
6876                         flow_dev_get_vlan_info_from_items(items, &vlan);
6877                         vlan.eth_proto = rte_be_to_cpu_16
6878                              ((((const struct rte_flow_action_of_push_vlan *)
6879                                                    actions->conf)->ethertype));
6880                         found_action = mlx5_flow_find_action
6881                                         (actions + 1,
6882                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
6883                         if (found_action)
6884                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
6885                         found_action = mlx5_flow_find_action
6886                                         (actions + 1,
6887                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
6888                         if (found_action)
6889                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
6890                         if (flow_dv_create_action_push_vlan
6891                                             (dev, attr, &vlan, dev_flow, error))
6892                                 return -rte_errno;
6893                         dev_flow->dv.actions[actions_n++] =
6894                                            dev_flow->dv.push_vlan_res->action;
6895                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
6896                         break;
6897                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
6898                         /* of_vlan_push action handled this action */
6899                         assert(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN);
6900                         break;
6901                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
6902                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
6903                                 break;
6904                         flow_dev_get_vlan_info_from_items(items, &vlan);
6905                         mlx5_update_vlan_vid_pcp(actions, &vlan);
6906                         /* If no VLAN push - this is a modify header action */
6907                         if (flow_dv_convert_action_modify_vlan_vid
6908                                                 (&mhdr_res, actions, error))
6909                                 return -rte_errno;
6910                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
6911                         break;
6912                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
6913                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
6914                         if (flow_dv_create_action_l2_encap(dev, actions,
6915                                                            dev_flow,
6916                                                            attr->transfer,
6917                                                            error))
6918                                 return -rte_errno;
6919                         dev_flow->dv.actions[actions_n++] =
6920                                 dev_flow->dv.encap_decap->verbs_action;
6921                         action_flags |= actions->type ==
6922                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
6923                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
6924                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
6925                         break;
6926                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
6927                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
6928                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
6929                                                            attr->transfer,
6930                                                            error))
6931                                 return -rte_errno;
6932                         dev_flow->dv.actions[actions_n++] =
6933                                 dev_flow->dv.encap_decap->verbs_action;
6934                         action_flags |= actions->type ==
6935                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
6936                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
6937                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
6938                         break;
6939                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
6940                         /* Handle encap with preceding decap. */
6941                         if (action_flags & MLX5_FLOW_ACTION_RAW_DECAP) {
6942                                 if (flow_dv_create_action_raw_encap
6943                                         (dev, actions, dev_flow, attr, error))
6944                                         return -rte_errno;
6945                                 dev_flow->dv.actions[actions_n++] =
6946                                         dev_flow->dv.encap_decap->verbs_action;
6947                         } else {
6948                                 /* Handle encap without preceding decap. */
6949                                 if (flow_dv_create_action_l2_encap
6950                                     (dev, actions, dev_flow, attr->transfer,
6951                                      error))
6952                                         return -rte_errno;
6953                                 dev_flow->dv.actions[actions_n++] =
6954                                         dev_flow->dv.encap_decap->verbs_action;
6955                         }
6956                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
6957                         break;
6958                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
6959                         /* Check if this decap is followed by encap. */
6960                         for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
6961                                action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
6962                                action++) {
6963                         }
6964                         /* Handle decap only if it isn't followed by encap. */
6965                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
6966                                 if (flow_dv_create_action_l2_decap
6967                                     (dev, dev_flow, attr->transfer, error))
6968                                         return -rte_errno;
6969                                 dev_flow->dv.actions[actions_n++] =
6970                                         dev_flow->dv.encap_decap->verbs_action;
6971                         }
6972                         /* If decap is followed by encap, handle it at encap. */
6973                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
6974                         break;
6975                 case RTE_FLOW_ACTION_TYPE_JUMP:
6976                         jump_data = action->conf;
6977                         ret = mlx5_flow_group_to_table(attr, dev_flow->external,
6978                                                        jump_data->group, &table,
6979                                                        error);
6980                         if (ret)
6981                                 return ret;
6982                         tbl = flow_dv_tbl_resource_get(dev, table,
6983                                                        attr->egress,
6984                                                        attr->transfer, error);
6985                         if (!tbl)
6986                                 return rte_flow_error_set
6987                                                 (error, errno,
6988                                                  RTE_FLOW_ERROR_TYPE_ACTION,
6989                                                  NULL,
6990                                                  "cannot create jump action.");
6991                         if (flow_dv_jump_tbl_resource_register
6992                             (dev, tbl, dev_flow, error)) {
6993                                 flow_dv_tbl_resource_release(dev, tbl);
6994                                 return rte_flow_error_set
6995                                                 (error, errno,
6996                                                  RTE_FLOW_ERROR_TYPE_ACTION,
6997                                                  NULL,
6998                                                  "cannot create jump action.");
6999                         }
7000                         dev_flow->dv.actions[actions_n++] =
7001                                 dev_flow->dv.jump->action;
7002                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7003                         break;
7004                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7005                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7006                         if (flow_dv_convert_action_modify_mac
7007                                         (&mhdr_res, actions, error))
7008                                 return -rte_errno;
7009                         action_flags |= actions->type ==
7010                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7011                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
7012                                         MLX5_FLOW_ACTION_SET_MAC_DST;
7013                         break;
7014                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7015                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7016                         if (flow_dv_convert_action_modify_ipv4
7017                                         (&mhdr_res, actions, error))
7018                                 return -rte_errno;
7019                         action_flags |= actions->type ==
7020                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7021                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
7022                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
7023                         break;
7024                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7025                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7026                         if (flow_dv_convert_action_modify_ipv6
7027                                         (&mhdr_res, actions, error))
7028                                 return -rte_errno;
7029                         action_flags |= actions->type ==
7030                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7031                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
7032                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
7033                         break;
7034                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7035                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7036                         if (flow_dv_convert_action_modify_tp
7037                                         (&mhdr_res, actions, items,
7038                                          &flow_attr, error))
7039                                 return -rte_errno;
7040                         action_flags |= actions->type ==
7041                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7042                                         MLX5_FLOW_ACTION_SET_TP_SRC :
7043                                         MLX5_FLOW_ACTION_SET_TP_DST;
7044                         break;
7045                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7046                         if (flow_dv_convert_action_modify_dec_ttl
7047                                         (&mhdr_res, items, &flow_attr, error))
7048                                 return -rte_errno;
7049                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
7050                         break;
7051                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7052                         if (flow_dv_convert_action_modify_ttl
7053                                         (&mhdr_res, actions, items,
7054                                          &flow_attr, error))
7055                                 return -rte_errno;
7056                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
7057                         break;
7058                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7059                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7060                         if (flow_dv_convert_action_modify_tcp_seq
7061                                         (&mhdr_res, actions, error))
7062                                 return -rte_errno;
7063                         action_flags |= actions->type ==
7064                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7065                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
7066                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7067                         break;
7068
7069                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7070                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7071                         if (flow_dv_convert_action_modify_tcp_ack
7072                                         (&mhdr_res, actions, error))
7073                                 return -rte_errno;
7074                         action_flags |= actions->type ==
7075                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7076                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
7077                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
7078                         break;
7079                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7080                         if (flow_dv_convert_action_set_reg
7081                                         (&mhdr_res, actions, error))
7082                                 return -rte_errno;
7083                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7084                         break;
7085                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7086                         if (flow_dv_convert_action_copy_mreg
7087                                         (dev, &mhdr_res, actions, error))
7088                                 return -rte_errno;
7089                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7090                         break;
7091                 case RTE_FLOW_ACTION_TYPE_METER:
7092                         mtr = actions->conf;
7093                         if (!flow->meter) {
7094                                 flow->meter = mlx5_flow_meter_attach(priv,
7095                                                         mtr->mtr_id, attr,
7096                                                         error);
7097                                 if (!flow->meter)
7098                                         return rte_flow_error_set(error,
7099                                                 rte_errno,
7100                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7101                                                 NULL,
7102                                                 "meter not found "
7103                                                 "or invalid parameters");
7104                         }
7105                         /* Set the meter action. */
7106                         dev_flow->dv.actions[actions_n++] =
7107                                 flow->meter->mfts->meter_action;
7108                         action_flags |= MLX5_FLOW_ACTION_METER;
7109                         break;
7110                 case RTE_FLOW_ACTION_TYPE_END:
7111                         actions_end = true;
7112                         if (mhdr_res.actions_num) {
7113                                 /* create modify action if needed. */
7114                                 if (flow_dv_modify_hdr_resource_register
7115                                         (dev, &mhdr_res, dev_flow, error))
7116                                         return -rte_errno;
7117                                 dev_flow->dv.actions[modify_action_position] =
7118                                         dev_flow->dv.modify_hdr->verbs_action;
7119                         }
7120                         break;
7121                 default:
7122                         break;
7123                 }
7124                 if (mhdr_res.actions_num &&
7125                     modify_action_position == UINT32_MAX)
7126                         modify_action_position = actions_n++;
7127         }
7128         dev_flow->dv.actions_n = actions_n;
7129         dev_flow->actions = action_flags;
7130         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
7131                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
7132                 int item_type = items->type;
7133
7134                 switch (item_type) {
7135                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
7136                         flow_dv_translate_item_port_id(dev, match_mask,
7137                                                        match_value, items);
7138                         last_item = MLX5_FLOW_ITEM_PORT_ID;
7139                         break;
7140                 case RTE_FLOW_ITEM_TYPE_ETH:
7141                         flow_dv_translate_item_eth(match_mask, match_value,
7142                                                    items, tunnel);
7143                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7144                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
7145                                              MLX5_FLOW_LAYER_OUTER_L2;
7146                         break;
7147                 case RTE_FLOW_ITEM_TYPE_VLAN:
7148                         flow_dv_translate_item_vlan(dev_flow,
7149                                                     match_mask, match_value,
7150                                                     items, tunnel);
7151                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7152                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
7153                                               MLX5_FLOW_LAYER_INNER_VLAN) :
7154                                              (MLX5_FLOW_LAYER_OUTER_L2 |
7155                                               MLX5_FLOW_LAYER_OUTER_VLAN);
7156                         break;
7157                 case RTE_FLOW_ITEM_TYPE_IPV4:
7158                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7159                                                   &item_flags, &tunnel);
7160                         flow_dv_translate_item_ipv4(match_mask, match_value,
7161                                                     items, tunnel,
7162                                                     dev_flow->group);
7163                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7164                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7165                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7166                         if (items->mask != NULL &&
7167                             ((const struct rte_flow_item_ipv4 *)
7168                              items->mask)->hdr.next_proto_id) {
7169                                 next_protocol =
7170                                         ((const struct rte_flow_item_ipv4 *)
7171                                          (items->spec))->hdr.next_proto_id;
7172                                 next_protocol &=
7173                                         ((const struct rte_flow_item_ipv4 *)
7174                                          (items->mask))->hdr.next_proto_id;
7175                         } else {
7176                                 /* Reset for inner layer. */
7177                                 next_protocol = 0xff;
7178                         }
7179                         break;
7180                 case RTE_FLOW_ITEM_TYPE_IPV6:
7181                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7182                                                   &item_flags, &tunnel);
7183                         flow_dv_translate_item_ipv6(match_mask, match_value,
7184                                                     items, tunnel,
7185                                                     dev_flow->group);
7186                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7187                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7188                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7189                         if (items->mask != NULL &&
7190                             ((const struct rte_flow_item_ipv6 *)
7191                              items->mask)->hdr.proto) {
7192                                 next_protocol =
7193                                         ((const struct rte_flow_item_ipv6 *)
7194                                          items->spec)->hdr.proto;
7195                                 next_protocol &=
7196                                         ((const struct rte_flow_item_ipv6 *)
7197                                          items->mask)->hdr.proto;
7198                         } else {
7199                                 /* Reset for inner layer. */
7200                                 next_protocol = 0xff;
7201                         }
7202                         break;
7203                 case RTE_FLOW_ITEM_TYPE_TCP:
7204                         flow_dv_translate_item_tcp(match_mask, match_value,
7205                                                    items, tunnel);
7206                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7207                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7208                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7209                         break;
7210                 case RTE_FLOW_ITEM_TYPE_UDP:
7211                         flow_dv_translate_item_udp(match_mask, match_value,
7212                                                    items, tunnel);
7213                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7214                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7215                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7216                         break;
7217                 case RTE_FLOW_ITEM_TYPE_GRE:
7218                         flow_dv_translate_item_gre(match_mask, match_value,
7219                                                    items, tunnel);
7220                         last_item = MLX5_FLOW_LAYER_GRE;
7221                         break;
7222                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7223                         flow_dv_translate_item_gre_key(match_mask,
7224                                                        match_value, items);
7225                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7226                         break;
7227                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7228                         flow_dv_translate_item_nvgre(match_mask, match_value,
7229                                                      items, tunnel);
7230                         last_item = MLX5_FLOW_LAYER_GRE;
7231                         break;
7232                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7233                         flow_dv_translate_item_vxlan(match_mask, match_value,
7234                                                      items, tunnel);
7235                         last_item = MLX5_FLOW_LAYER_VXLAN;
7236                         break;
7237                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7238                         flow_dv_translate_item_vxlan(match_mask, match_value,
7239                                                      items, tunnel);
7240                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7241                         break;
7242                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7243                         flow_dv_translate_item_geneve(match_mask, match_value,
7244                                                       items, tunnel);
7245                         last_item = MLX5_FLOW_LAYER_GENEVE;
7246                         break;
7247                 case RTE_FLOW_ITEM_TYPE_MPLS:
7248                         flow_dv_translate_item_mpls(match_mask, match_value,
7249                                                     items, last_item, tunnel);
7250                         last_item = MLX5_FLOW_LAYER_MPLS;
7251                         break;
7252                 case RTE_FLOW_ITEM_TYPE_MARK:
7253                         flow_dv_translate_item_mark(dev, match_mask,
7254                                                     match_value, items);
7255                         last_item = MLX5_FLOW_ITEM_MARK;
7256                         break;
7257                 case RTE_FLOW_ITEM_TYPE_META:
7258                         flow_dv_translate_item_meta(dev, match_mask,
7259                                                     match_value, attr, items);
7260                         last_item = MLX5_FLOW_ITEM_METADATA;
7261                         break;
7262                 case RTE_FLOW_ITEM_TYPE_ICMP:
7263                         flow_dv_translate_item_icmp(match_mask, match_value,
7264                                                     items, tunnel);
7265                         last_item = MLX5_FLOW_LAYER_ICMP;
7266                         break;
7267                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7268                         flow_dv_translate_item_icmp6(match_mask, match_value,
7269                                                       items, tunnel);
7270                         last_item = MLX5_FLOW_LAYER_ICMP6;
7271                         break;
7272                 case RTE_FLOW_ITEM_TYPE_TAG:
7273                         flow_dv_translate_item_tag(dev, match_mask,
7274                                                    match_value, items);
7275                         last_item = MLX5_FLOW_ITEM_TAG;
7276                         break;
7277                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7278                         flow_dv_translate_mlx5_item_tag(match_mask,
7279                                                         match_value, items);
7280                         last_item = MLX5_FLOW_ITEM_TAG;
7281                         break;
7282                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7283                         flow_dv_translate_item_tx_queue(dev, match_mask,
7284                                                         match_value,
7285                                                         items);
7286                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
7287                         break;
7288                 default:
7289                         break;
7290                 }
7291                 item_flags |= last_item;
7292         }
7293         /*
7294          * In case of ingress traffic when E-Switch mode is enabled,
7295          * we have two cases where we need to set the source port manually.
7296          * The first one, is in case of Nic steering rule, and the second is
7297          * E-Switch rule where no port_id item was found. In both cases
7298          * the source port is set according the current port in use.
7299          */
7300         if ((attr->ingress && !(item_flags & MLX5_FLOW_ITEM_PORT_ID)) &&
7301             (priv->representor || priv->master)) {
7302                 if (flow_dv_translate_item_port_id(dev, match_mask,
7303                                                    match_value, NULL))
7304                         return -rte_errno;
7305         }
7306         assert(!flow_dv_check_valid_spec(matcher.mask.buf,
7307                                          dev_flow->dv.value.buf));
7308         dev_flow->layers = item_flags;
7309         if (action_flags & MLX5_FLOW_ACTION_RSS)
7310                 flow_dv_hashfields_set(dev_flow);
7311         /* Register matcher. */
7312         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
7313                                     matcher.mask.size);
7314         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
7315                                                      matcher.priority);
7316         /* reserved field no needs to be set to 0 here. */
7317         tbl_key.domain = attr->transfer;
7318         tbl_key.direction = attr->egress;
7319         tbl_key.table_id = dev_flow->group;
7320         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow, error))
7321                 return -rte_errno;
7322         return 0;
7323 }
7324
7325 /**
7326  * Apply the flow to the NIC, lock free,
7327  * (mutex should be acquired by caller).
7328  *
7329  * @param[in] dev
7330  *   Pointer to the Ethernet device structure.
7331  * @param[in, out] flow
7332  *   Pointer to flow structure.
7333  * @param[out] error
7334  *   Pointer to error structure.
7335  *
7336  * @return
7337  *   0 on success, a negative errno value otherwise and rte_errno is set.
7338  */
7339 static int
7340 __flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
7341                 struct rte_flow_error *error)
7342 {
7343         struct mlx5_flow_dv *dv;
7344         struct mlx5_flow *dev_flow;
7345         struct mlx5_priv *priv = dev->data->dev_private;
7346         int n;
7347         int err;
7348
7349         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7350                 dv = &dev_flow->dv;
7351                 n = dv->actions_n;
7352                 if (dev_flow->actions & MLX5_FLOW_ACTION_DROP) {
7353                         if (dev_flow->transfer) {
7354                                 dv->actions[n++] = priv->sh->esw_drop_action;
7355                         } else {
7356                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
7357                                 if (!dv->hrxq) {
7358                                         rte_flow_error_set
7359                                                 (error, errno,
7360                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7361                                                  NULL,
7362                                                  "cannot get drop hash queue");
7363                                         goto error;
7364                                 }
7365                                 dv->actions[n++] = dv->hrxq->action;
7366                         }
7367                 } else if (dev_flow->actions &
7368                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
7369                         struct mlx5_hrxq *hrxq;
7370
7371                         assert(flow->rss.queue);
7372                         hrxq = mlx5_hrxq_get(dev, flow->rss.key,
7373                                              MLX5_RSS_HASH_KEY_LEN,
7374                                              dev_flow->hash_fields,
7375                                              (*flow->rss.queue),
7376                                              flow->rss.queue_num);
7377                         if (!hrxq) {
7378                                 hrxq = mlx5_hrxq_new
7379                                         (dev, flow->rss.key,
7380                                          MLX5_RSS_HASH_KEY_LEN,
7381                                          dev_flow->hash_fields,
7382                                          (*flow->rss.queue),
7383                                          flow->rss.queue_num,
7384                                          !!(dev_flow->layers &
7385                                             MLX5_FLOW_LAYER_TUNNEL));
7386                         }
7387                         if (!hrxq) {
7388                                 rte_flow_error_set
7389                                         (error, rte_errno,
7390                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7391                                          "cannot get hash queue");
7392                                 goto error;
7393                         }
7394                         dv->hrxq = hrxq;
7395                         dv->actions[n++] = dv->hrxq->action;
7396                 }
7397                 dv->flow =
7398                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
7399                                                   (void *)&dv->value, n,
7400                                                   dv->actions);
7401                 if (!dv->flow) {
7402                         rte_flow_error_set(error, errno,
7403                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7404                                            NULL,
7405                                            "hardware refuses to create flow");
7406                         goto error;
7407                 }
7408                 if (priv->vmwa_context &&
7409                     dev_flow->dv.vf_vlan.tag &&
7410                     !dev_flow->dv.vf_vlan.created) {
7411                         /*
7412                          * The rule contains the VLAN pattern.
7413                          * For VF we are going to create VLAN
7414                          * interface to make hypervisor set correct
7415                          * e-Switch vport context.
7416                          */
7417                         mlx5_vlan_vmwa_acquire(dev, &dev_flow->dv.vf_vlan);
7418                 }
7419         }
7420         return 0;
7421 error:
7422         err = rte_errno; /* Save rte_errno before cleanup. */
7423         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7424                 struct mlx5_flow_dv *dv = &dev_flow->dv;
7425                 if (dv->hrxq) {
7426                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7427                                 mlx5_hrxq_drop_release(dev);
7428                         else
7429                                 mlx5_hrxq_release(dev, dv->hrxq);
7430                         dv->hrxq = NULL;
7431                 }
7432                 if (dev_flow->dv.vf_vlan.tag &&
7433                     dev_flow->dv.vf_vlan.created)
7434                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7435         }
7436         rte_errno = err; /* Restore rte_errno. */
7437         return -rte_errno;
7438 }
7439
7440 /**
7441  * Release the flow matcher.
7442  *
7443  * @param dev
7444  *   Pointer to Ethernet device.
7445  * @param flow
7446  *   Pointer to mlx5_flow.
7447  *
7448  * @return
7449  *   1 while a reference on it exists, 0 when freed.
7450  */
7451 static int
7452 flow_dv_matcher_release(struct rte_eth_dev *dev,
7453                         struct mlx5_flow *flow)
7454 {
7455         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
7456
7457         assert(matcher->matcher_object);
7458         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
7459                 dev->data->port_id, (void *)matcher,
7460                 rte_atomic32_read(&matcher->refcnt));
7461         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
7462                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7463                            (matcher->matcher_object));
7464                 LIST_REMOVE(matcher, next);
7465                 /* table ref-- in release interface. */
7466                 flow_dv_tbl_resource_release(dev, matcher->tbl);
7467                 rte_free(matcher);
7468                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
7469                         dev->data->port_id, (void *)matcher);
7470                 return 0;
7471         }
7472         return 1;
7473 }
7474
7475 /**
7476  * Release an encap/decap resource.
7477  *
7478  * @param flow
7479  *   Pointer to mlx5_flow.
7480  *
7481  * @return
7482  *   1 while a reference on it exists, 0 when freed.
7483  */
7484 static int
7485 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
7486 {
7487         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
7488                                                 flow->dv.encap_decap;
7489
7490         assert(cache_resource->verbs_action);
7491         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
7492                 (void *)cache_resource,
7493                 rte_atomic32_read(&cache_resource->refcnt));
7494         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7495                 claim_zero(mlx5_glue->destroy_flow_action
7496                                 (cache_resource->verbs_action));
7497                 LIST_REMOVE(cache_resource, next);
7498                 rte_free(cache_resource);
7499                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
7500                         (void *)cache_resource);
7501                 return 0;
7502         }
7503         return 1;
7504 }
7505
7506 /**
7507  * Release an jump to table action resource.
7508  *
7509  * @param dev
7510  *   Pointer to Ethernet device.
7511  * @param flow
7512  *   Pointer to mlx5_flow.
7513  *
7514  * @return
7515  *   1 while a reference on it exists, 0 when freed.
7516  */
7517 static int
7518 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
7519                                   struct mlx5_flow *flow)
7520 {
7521         struct mlx5_flow_dv_jump_tbl_resource *cache_resource = flow->dv.jump;
7522         struct mlx5_flow_tbl_data_entry *tbl_data =
7523                         container_of(cache_resource,
7524                                      struct mlx5_flow_tbl_data_entry, jump);
7525
7526         assert(cache_resource->action);
7527         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
7528                 (void *)cache_resource,
7529                 rte_atomic32_read(&cache_resource->refcnt));
7530         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7531                 claim_zero(mlx5_glue->destroy_flow_action
7532                                 (cache_resource->action));
7533                 /* jump action memory free is inside the table release. */
7534                 flow_dv_tbl_resource_release(dev, &tbl_data->tbl);
7535                 DRV_LOG(DEBUG, "jump table resource %p: removed",
7536                         (void *)cache_resource);
7537                 return 0;
7538         }
7539         return 1;
7540 }
7541
7542 /**
7543  * Release a modify-header resource.
7544  *
7545  * @param flow
7546  *   Pointer to mlx5_flow.
7547  *
7548  * @return
7549  *   1 while a reference on it exists, 0 when freed.
7550  */
7551 static int
7552 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
7553 {
7554         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
7555                                                 flow->dv.modify_hdr;
7556
7557         assert(cache_resource->verbs_action);
7558         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
7559                 (void *)cache_resource,
7560                 rte_atomic32_read(&cache_resource->refcnt));
7561         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7562                 claim_zero(mlx5_glue->destroy_flow_action
7563                                 (cache_resource->verbs_action));
7564                 LIST_REMOVE(cache_resource, next);
7565                 rte_free(cache_resource);
7566                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
7567                         (void *)cache_resource);
7568                 return 0;
7569         }
7570         return 1;
7571 }
7572
7573 /**
7574  * Release port ID action resource.
7575  *
7576  * @param flow
7577  *   Pointer to mlx5_flow.
7578  *
7579  * @return
7580  *   1 while a reference on it exists, 0 when freed.
7581  */
7582 static int
7583 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
7584 {
7585         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
7586                 flow->dv.port_id_action;
7587
7588         assert(cache_resource->action);
7589         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
7590                 (void *)cache_resource,
7591                 rte_atomic32_read(&cache_resource->refcnt));
7592         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7593                 claim_zero(mlx5_glue->destroy_flow_action
7594                                 (cache_resource->action));
7595                 LIST_REMOVE(cache_resource, next);
7596                 rte_free(cache_resource);
7597                 DRV_LOG(DEBUG, "port id action resource %p: removed",
7598                         (void *)cache_resource);
7599                 return 0;
7600         }
7601         return 1;
7602 }
7603
7604 /**
7605  * Release push vlan action resource.
7606  *
7607  * @param flow
7608  *   Pointer to mlx5_flow.
7609  *
7610  * @return
7611  *   1 while a reference on it exists, 0 when freed.
7612  */
7613 static int
7614 flow_dv_push_vlan_action_resource_release(struct mlx5_flow *flow)
7615 {
7616         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource =
7617                 flow->dv.push_vlan_res;
7618
7619         assert(cache_resource->action);
7620         DRV_LOG(DEBUG, "push VLAN action resource %p: refcnt %d--",
7621                 (void *)cache_resource,
7622                 rte_atomic32_read(&cache_resource->refcnt));
7623         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7624                 claim_zero(mlx5_glue->destroy_flow_action
7625                                 (cache_resource->action));
7626                 LIST_REMOVE(cache_resource, next);
7627                 rte_free(cache_resource);
7628                 DRV_LOG(DEBUG, "push vlan action resource %p: removed",
7629                         (void *)cache_resource);
7630                 return 0;
7631         }
7632         return 1;
7633 }
7634
7635 /**
7636  * Remove the flow from the NIC but keeps it in memory.
7637  * Lock free, (mutex should be acquired by caller).
7638  *
7639  * @param[in] dev
7640  *   Pointer to Ethernet device.
7641  * @param[in, out] flow
7642  *   Pointer to flow structure.
7643  */
7644 static void
7645 __flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
7646 {
7647         struct mlx5_flow_dv *dv;
7648         struct mlx5_flow *dev_flow;
7649
7650         if (!flow)
7651                 return;
7652         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7653                 dv = &dev_flow->dv;
7654                 if (dv->flow) {
7655                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
7656                         dv->flow = NULL;
7657                 }
7658                 if (dv->hrxq) {
7659                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7660                                 mlx5_hrxq_drop_release(dev);
7661                         else
7662                                 mlx5_hrxq_release(dev, dv->hrxq);
7663                         dv->hrxq = NULL;
7664                 }
7665                 if (dev_flow->dv.vf_vlan.tag &&
7666                     dev_flow->dv.vf_vlan.created)
7667                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7668         }
7669 }
7670
7671 /**
7672  * Remove the flow from the NIC and the memory.
7673  * Lock free, (mutex should be acquired by caller).
7674  *
7675  * @param[in] dev
7676  *   Pointer to the Ethernet device structure.
7677  * @param[in, out] flow
7678  *   Pointer to flow structure.
7679  */
7680 static void
7681 __flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
7682 {
7683         struct mlx5_flow *dev_flow;
7684
7685         if (!flow)
7686                 return;
7687         __flow_dv_remove(dev, flow);
7688         if (flow->counter) {
7689                 flow_dv_counter_release(dev, flow->counter);
7690                 flow->counter = NULL;
7691         }
7692         if (flow->meter) {
7693                 mlx5_flow_meter_detach(flow->meter);
7694                 flow->meter = NULL;
7695         }
7696         while (!LIST_EMPTY(&flow->dev_flows)) {
7697                 dev_flow = LIST_FIRST(&flow->dev_flows);
7698                 LIST_REMOVE(dev_flow, next);
7699                 if (dev_flow->dv.matcher)
7700                         flow_dv_matcher_release(dev, dev_flow);
7701                 if (dev_flow->dv.encap_decap)
7702                         flow_dv_encap_decap_resource_release(dev_flow);
7703                 if (dev_flow->dv.modify_hdr)
7704                         flow_dv_modify_hdr_resource_release(dev_flow);
7705                 if (dev_flow->dv.jump)
7706                         flow_dv_jump_tbl_resource_release(dev, dev_flow);
7707                 if (dev_flow->dv.port_id_action)
7708                         flow_dv_port_id_action_resource_release(dev_flow);
7709                 if (dev_flow->dv.push_vlan_res)
7710                         flow_dv_push_vlan_action_resource_release(dev_flow);
7711                 if (dev_flow->dv.tag_resource)
7712                         flow_dv_tag_release(dev, dev_flow->dv.tag_resource);
7713                 rte_free(dev_flow);
7714         }
7715 }
7716
7717 /**
7718  * Query a dv flow  rule for its statistics via devx.
7719  *
7720  * @param[in] dev
7721  *   Pointer to Ethernet device.
7722  * @param[in] flow
7723  *   Pointer to the sub flow.
7724  * @param[out] data
7725  *   data retrieved by the query.
7726  * @param[out] error
7727  *   Perform verbose error reporting if not NULL.
7728  *
7729  * @return
7730  *   0 on success, a negative errno value otherwise and rte_errno is set.
7731  */
7732 static int
7733 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
7734                     void *data, struct rte_flow_error *error)
7735 {
7736         struct mlx5_priv *priv = dev->data->dev_private;
7737         struct rte_flow_query_count *qc = data;
7738
7739         if (!priv->config.devx)
7740                 return rte_flow_error_set(error, ENOTSUP,
7741                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7742                                           NULL,
7743                                           "counters are not supported");
7744         if (flow->counter) {
7745                 uint64_t pkts, bytes;
7746                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
7747                                                &bytes);
7748
7749                 if (err)
7750                         return rte_flow_error_set(error, -err,
7751                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7752                                         NULL, "cannot read counters");
7753                 qc->hits_set = 1;
7754                 qc->bytes_set = 1;
7755                 qc->hits = pkts - flow->counter->hits;
7756                 qc->bytes = bytes - flow->counter->bytes;
7757                 if (qc->reset) {
7758                         flow->counter->hits = pkts;
7759                         flow->counter->bytes = bytes;
7760                 }
7761                 return 0;
7762         }
7763         return rte_flow_error_set(error, EINVAL,
7764                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7765                                   NULL,
7766                                   "counters are not available");
7767 }
7768
7769 /**
7770  * Query a flow.
7771  *
7772  * @see rte_flow_query()
7773  * @see rte_flow_ops
7774  */
7775 static int
7776 flow_dv_query(struct rte_eth_dev *dev,
7777               struct rte_flow *flow __rte_unused,
7778               const struct rte_flow_action *actions __rte_unused,
7779               void *data __rte_unused,
7780               struct rte_flow_error *error __rte_unused)
7781 {
7782         int ret = -EINVAL;
7783
7784         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
7785                 switch (actions->type) {
7786                 case RTE_FLOW_ACTION_TYPE_VOID:
7787                         break;
7788                 case RTE_FLOW_ACTION_TYPE_COUNT:
7789                         ret = flow_dv_query_count(dev, flow, data, error);
7790                         break;
7791                 default:
7792                         return rte_flow_error_set(error, ENOTSUP,
7793                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7794                                                   actions,
7795                                                   "action not supported");
7796                 }
7797         }
7798         return ret;
7799 }
7800
7801 /**
7802  * Destroy the meter table set.
7803  * Lock free, (mutex should be acquired by caller).
7804  *
7805  * @param[in] dev
7806  *   Pointer to Ethernet device.
7807  * @param[in] tbl
7808  *   Pointer to the meter table set.
7809  *
7810  * @return
7811  *   Always 0.
7812  */
7813 static int
7814 flow_dv_destroy_mtr_tbl(struct rte_eth_dev *dev,
7815                         struct mlx5_meter_domains_infos *tbl)
7816 {
7817         struct mlx5_priv *priv = dev->data->dev_private;
7818         struct mlx5_meter_domains_infos *mtd =
7819                                 (struct mlx5_meter_domains_infos *)tbl;
7820
7821         if (!mtd || !priv->config.dv_flow_en)
7822                 return 0;
7823         if (mtd->ingress.policer_rules[RTE_MTR_DROPPED])
7824                 claim_zero(mlx5_glue->dv_destroy_flow
7825                           (mtd->ingress.policer_rules[RTE_MTR_DROPPED]));
7826         if (mtd->egress.policer_rules[RTE_MTR_DROPPED])
7827                 claim_zero(mlx5_glue->dv_destroy_flow
7828                           (mtd->egress.policer_rules[RTE_MTR_DROPPED]));
7829         if (mtd->transfer.policer_rules[RTE_MTR_DROPPED])
7830                 claim_zero(mlx5_glue->dv_destroy_flow
7831                           (mtd->transfer.policer_rules[RTE_MTR_DROPPED]));
7832         if (mtd->egress.color_matcher)
7833                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7834                           (mtd->egress.color_matcher));
7835         if (mtd->egress.any_matcher)
7836                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7837                           (mtd->egress.any_matcher));
7838         if (mtd->egress.tbl)
7839                 claim_zero(flow_dv_tbl_resource_release(dev,
7840                                                         mtd->egress.tbl));
7841         if (mtd->ingress.color_matcher)
7842                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7843                           (mtd->ingress.color_matcher));
7844         if (mtd->ingress.any_matcher)
7845                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7846                           (mtd->ingress.any_matcher));
7847         if (mtd->ingress.tbl)
7848                 claim_zero(flow_dv_tbl_resource_release(dev,
7849                                                         mtd->ingress.tbl));
7850         if (mtd->transfer.color_matcher)
7851                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7852                           (mtd->transfer.color_matcher));
7853         if (mtd->transfer.any_matcher)
7854                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7855                           (mtd->transfer.any_matcher));
7856         if (mtd->transfer.tbl)
7857                 claim_zero(flow_dv_tbl_resource_release(dev,
7858                                                         mtd->transfer.tbl));
7859         if (mtd->drop_actn)
7860                 claim_zero(mlx5_glue->destroy_flow_action(mtd->drop_actn));
7861         rte_free(mtd);
7862         return 0;
7863 }
7864
7865 /* Number of meter flow actions, count and jump or count and drop. */
7866 #define METER_ACTIONS 2
7867
7868 /**
7869  * Create specify domain meter table and suffix table.
7870  *
7871  * @param[in] dev
7872  *   Pointer to Ethernet device.
7873  * @param[in,out] mtb
7874  *   Pointer to DV meter table set.
7875  * @param[in] egress
7876  *   Table attribute.
7877  * @param[in] transfer
7878  *   Table attribute.
7879  * @param[in] color_reg_c_idx
7880  *   Reg C index for color match.
7881  *
7882  * @return
7883  *   0 on success, -1 otherwise and rte_errno is set.
7884  */
7885 static int
7886 flow_dv_prepare_mtr_tables(struct rte_eth_dev *dev,
7887                            struct mlx5_meter_domains_infos *mtb,
7888                            uint8_t egress, uint8_t transfer,
7889                            uint32_t color_reg_c_idx)
7890 {
7891         struct mlx5_priv *priv = dev->data->dev_private;
7892         struct mlx5_ibv_shared *sh = priv->sh;
7893         struct mlx5_flow_dv_match_params mask = {
7894                 .size = sizeof(mask.buf),
7895         };
7896         struct mlx5_flow_dv_match_params value = {
7897                 .size = sizeof(value.buf),
7898         };
7899         struct mlx5dv_flow_matcher_attr dv_attr = {
7900                 .type = IBV_FLOW_ATTR_NORMAL,
7901                 .priority = 0,
7902                 .match_criteria_enable = 0,
7903                 .match_mask = (void *)&mask,
7904         };
7905         void *actions[METER_ACTIONS];
7906         struct mlx5_flow_tbl_resource **sfx_tbl;
7907         struct mlx5_meter_domain_info *dtb;
7908         struct rte_flow_error error;
7909         int i = 0;
7910
7911         if (transfer) {
7912                 sfx_tbl = &sh->fdb_mtr_sfx_tbl;
7913                 dtb = &mtb->transfer;
7914         } else if (egress) {
7915                 sfx_tbl = &sh->tx_mtr_sfx_tbl;
7916                 dtb = &mtb->egress;
7917         } else {
7918                 sfx_tbl = &sh->rx_mtr_sfx_tbl;
7919                 dtb = &mtb->ingress;
7920         }
7921         /* If the suffix table in missing, create it. */
7922         if (!(*sfx_tbl)) {
7923                 *sfx_tbl = flow_dv_tbl_resource_get(dev,
7924                                                 MLX5_FLOW_TABLE_LEVEL_SUFFIX,
7925                                                 egress, transfer, &error);
7926                 if (!(*sfx_tbl)) {
7927                         DRV_LOG(ERR, "Failed to create meter suffix table.");
7928                         return -1;
7929                 }
7930         }
7931         /* Create the meter table with METER level. */
7932         dtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,
7933                                             egress, transfer, &error);
7934         if (!dtb->tbl) {
7935                 DRV_LOG(ERR, "Failed to create meter policer table.");
7936                 return -1;
7937         }
7938         /* Create matchers, Any and Color. */
7939         dv_attr.priority = 3;
7940         dv_attr.match_criteria_enable = 0;
7941         dtb->any_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
7942                                                              &dv_attr,
7943                                                              dtb->tbl->obj);
7944         if (!dtb->any_matcher) {
7945                 DRV_LOG(ERR, "Failed to create meter"
7946                              " policer default matcher.");
7947                 goto error_exit;
7948         }
7949         dv_attr.priority = 0;
7950         dv_attr.match_criteria_enable =
7951                                 1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
7952         flow_dv_match_meta_reg(mask.buf, value.buf, color_reg_c_idx,
7953                                rte_col_2_mlx5_col(RTE_COLORS), UINT32_MAX);
7954         dtb->color_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
7955                                                                &dv_attr,
7956                                                                dtb->tbl->obj);
7957         if (!dtb->color_matcher) {
7958                 DRV_LOG(ERR, "Failed to create meter policer color matcher.");
7959                 goto error_exit;
7960         }
7961         if (mtb->count_actns[RTE_MTR_DROPPED])
7962                 actions[i++] = mtb->count_actns[RTE_MTR_DROPPED];
7963         actions[i++] = mtb->drop_actn;
7964         /* Default rule: lowest priority, match any, actions: drop. */
7965         dtb->policer_rules[RTE_MTR_DROPPED] =
7966                         mlx5_glue->dv_create_flow(dtb->any_matcher,
7967                                                  (void *)&value, i, actions);
7968         if (!dtb->policer_rules[RTE_MTR_DROPPED]) {
7969                 DRV_LOG(ERR, "Failed to create meter policer drop rule.");
7970                 goto error_exit;
7971         }
7972         return 0;
7973 error_exit:
7974         return -1;
7975 }
7976
7977 /**
7978  * Create the needed meter and suffix tables.
7979  * Lock free, (mutex should be acquired by caller).
7980  *
7981  * @param[in] dev
7982  *   Pointer to Ethernet device.
7983  * @param[in] fm
7984  *   Pointer to the flow meter.
7985  *
7986  * @return
7987  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
7988  */
7989 static struct mlx5_meter_domains_infos *
7990 flow_dv_create_mtr_tbl(struct rte_eth_dev *dev,
7991                        const struct mlx5_flow_meter *fm)
7992 {
7993         struct mlx5_priv *priv = dev->data->dev_private;
7994         struct mlx5_meter_domains_infos *mtb;
7995         int ret;
7996         int i;
7997
7998         if (!priv->mtr_en) {
7999                 rte_errno = ENOTSUP;
8000                 return NULL;
8001         }
8002         mtb = rte_calloc(__func__, 1, sizeof(*mtb), 0);
8003         if (!mtb) {
8004                 DRV_LOG(ERR, "Failed to allocate memory for meter.");
8005                 return NULL;
8006         }
8007         /* Create meter count actions */
8008         for (i = 0; i <= RTE_MTR_DROPPED; i++) {
8009                 if (!fm->policer_stats.cnt[i])
8010                         continue;
8011                 mtb->count_actns[i] = fm->policer_stats.cnt[i]->action;
8012         }
8013         /* Create drop action. */
8014         mtb->drop_actn = mlx5_glue->dr_create_flow_action_drop();
8015         if (!mtb->drop_actn) {
8016                 DRV_LOG(ERR, "Failed to create drop action.");
8017                 goto error_exit;
8018         }
8019         /* Egress meter table. */
8020         ret = flow_dv_prepare_mtr_tables(dev, mtb, 1, 0, priv->mtr_color_reg);
8021         if (ret) {
8022                 DRV_LOG(ERR, "Failed to prepare egress meter table.");
8023                 goto error_exit;
8024         }
8025         /* Ingress meter table. */
8026         ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 0, priv->mtr_color_reg);
8027         if (ret) {
8028                 DRV_LOG(ERR, "Failed to prepare ingress meter table.");
8029                 goto error_exit;
8030         }
8031         /* FDB meter table. */
8032         if (priv->config.dv_esw_en) {
8033                 ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 1,
8034                                                  priv->mtr_color_reg);
8035                 if (ret) {
8036                         DRV_LOG(ERR, "Failed to prepare fdb meter table.");
8037                         goto error_exit;
8038                 }
8039         }
8040         return mtb;
8041 error_exit:
8042         flow_dv_destroy_mtr_tbl(dev, mtb);
8043         return NULL;
8044 }
8045
8046 /**
8047  * Destroy domain policer rule.
8048  *
8049  * @param[in] dt
8050  *   Pointer to domain table.
8051  */
8052 static void
8053 flow_dv_destroy_domain_policer_rule(struct mlx5_meter_domain_info *dt)
8054 {
8055         int i;
8056
8057         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8058                 if (dt->policer_rules[i]) {
8059                         claim_zero(mlx5_glue->dv_destroy_flow
8060                                   (dt->policer_rules[i]));
8061                         dt->policer_rules[i] = NULL;
8062                 }
8063         }
8064         if (dt->jump_actn) {
8065                 claim_zero(mlx5_glue->destroy_flow_action(dt->jump_actn));
8066                 dt->jump_actn = NULL;
8067         }
8068 }
8069
8070 /**
8071  * Destroy policer rules.
8072  *
8073  * @param[in] dev
8074  *   Pointer to Ethernet device.
8075  * @param[in] fm
8076  *   Pointer to flow meter structure.
8077  * @param[in] attr
8078  *   Pointer to flow attributes.
8079  *
8080  * @return
8081  *   Always 0.
8082  */
8083 static int
8084 flow_dv_destroy_policer_rules(struct rte_eth_dev *dev __rte_unused,
8085                               const struct mlx5_flow_meter *fm,
8086                               const struct rte_flow_attr *attr)
8087 {
8088         struct mlx5_meter_domains_infos *mtb = fm ? fm->mfts : NULL;
8089
8090         if (!mtb)
8091                 return 0;
8092         if (attr->egress)
8093                 flow_dv_destroy_domain_policer_rule(&mtb->egress);
8094         if (attr->ingress)
8095                 flow_dv_destroy_domain_policer_rule(&mtb->ingress);
8096         if (attr->transfer)
8097                 flow_dv_destroy_domain_policer_rule(&mtb->transfer);
8098         return 0;
8099 }
8100
8101 /**
8102  * Create specify domain meter policer rule.
8103  *
8104  * @param[in] fm
8105  *   Pointer to flow meter structure.
8106  * @param[in] mtb
8107  *   Pointer to DV meter table set.
8108  * @param[in] sfx_tb
8109  *   Pointer to suffix table.
8110  * @param[in] mtr_reg_c
8111  *   Color match REG_C.
8112  *
8113  * @return
8114  *   0 on success, -1 otherwise.
8115  */
8116 static int
8117 flow_dv_create_policer_forward_rule(struct mlx5_flow_meter *fm,
8118                                     struct mlx5_meter_domain_info *dtb,
8119                                     struct mlx5_flow_tbl_resource *sfx_tb,
8120                                     uint8_t mtr_reg_c)
8121 {
8122         struct mlx5_flow_dv_match_params matcher = {
8123                 .size = sizeof(matcher.buf),
8124         };
8125         struct mlx5_flow_dv_match_params value = {
8126                 .size = sizeof(value.buf),
8127         };
8128         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8129         void *actions[METER_ACTIONS];
8130         int i;
8131
8132         /* Create jump action. */
8133         if (!sfx_tb)
8134                 return -1;
8135         if (!dtb->jump_actn)
8136                 dtb->jump_actn =
8137                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
8138                                                         (sfx_tb->obj);
8139         if (!dtb->jump_actn) {
8140                 DRV_LOG(ERR, "Failed to create policer jump action.");
8141                 goto error;
8142         }
8143         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8144                 int j = 0;
8145
8146                 flow_dv_match_meta_reg(matcher.buf, value.buf, mtr_reg_c,
8147                                        rte_col_2_mlx5_col(i), UINT32_MAX);
8148                 if (mtb->count_actns[i])
8149                         actions[j++] = mtb->count_actns[i];
8150                 if (fm->params.action[i] == MTR_POLICER_ACTION_DROP)
8151                         actions[j++] = mtb->drop_actn;
8152                 else
8153                         actions[j++] = dtb->jump_actn;
8154                 dtb->policer_rules[i] =
8155                         mlx5_glue->dv_create_flow(dtb->color_matcher,
8156                                                  (void *)&value,
8157                                                   j, actions);
8158                 if (!dtb->policer_rules[i]) {
8159                         DRV_LOG(ERR, "Failed to create policer rule.");
8160                         goto error;
8161                 }
8162         }
8163         return 0;
8164 error:
8165         rte_errno = errno;
8166         return -1;
8167 }
8168
8169 /**
8170  * Create policer rules.
8171  *
8172  * @param[in] dev
8173  *   Pointer to Ethernet device.
8174  * @param[in] fm
8175  *   Pointer to flow meter structure.
8176  * @param[in] attr
8177  *   Pointer to flow attributes.
8178  *
8179  * @return
8180  *   0 on success, -1 otherwise.
8181  */
8182 static int
8183 flow_dv_create_policer_rules(struct rte_eth_dev *dev,
8184                              struct mlx5_flow_meter *fm,
8185                              const struct rte_flow_attr *attr)
8186 {
8187         struct mlx5_priv *priv = dev->data->dev_private;
8188         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8189         int ret;
8190
8191         if (attr->egress) {
8192                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->egress,
8193                                                 priv->sh->tx_mtr_sfx_tbl,
8194                                                 priv->mtr_color_reg);
8195                 if (ret) {
8196                         DRV_LOG(ERR, "Failed to create egress policer.");
8197                         goto error;
8198                 }
8199         }
8200         if (attr->ingress) {
8201                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->ingress,
8202                                                 priv->sh->rx_mtr_sfx_tbl,
8203                                                 priv->mtr_color_reg);
8204                 if (ret) {
8205                         DRV_LOG(ERR, "Failed to create ingress policer.");
8206                         goto error;
8207                 }
8208         }
8209         if (attr->transfer) {
8210                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->transfer,
8211                                                 priv->sh->fdb_mtr_sfx_tbl,
8212                                                 priv->mtr_color_reg);
8213                 if (ret) {
8214                         DRV_LOG(ERR, "Failed to create transfer policer.");
8215                         goto error;
8216                 }
8217         }
8218         return 0;
8219 error:
8220         flow_dv_destroy_policer_rules(dev, fm, attr);
8221         return -1;
8222 }
8223
8224 /**
8225  * Query a devx counter.
8226  *
8227  * @param[in] dev
8228  *   Pointer to the Ethernet device structure.
8229  * @param[in] cnt
8230  *   Pointer to the flow counter.
8231  * @param[in] clear
8232  *   Set to clear the counter statistics.
8233  * @param[out] pkts
8234  *   The statistics value of packets.
8235  * @param[out] bytes
8236  *   The statistics value of bytes.
8237  *
8238  * @return
8239  *   0 on success, otherwise return -1.
8240  */
8241 static int
8242 flow_dv_counter_query(struct rte_eth_dev *dev,
8243                       struct mlx5_flow_counter *cnt, bool clear,
8244                       uint64_t *pkts, uint64_t *bytes)
8245 {
8246         struct mlx5_priv *priv = dev->data->dev_private;
8247         uint64_t inn_pkts, inn_bytes;
8248         int ret;
8249
8250         if (!priv->config.devx)
8251                 return -1;
8252         ret = _flow_dv_query_count(dev, cnt, &inn_pkts, &inn_bytes);
8253         if (ret)
8254                 return -1;
8255         *pkts = inn_pkts - cnt->hits;
8256         *bytes = inn_bytes - cnt->bytes;
8257         if (clear) {
8258                 cnt->hits = inn_pkts;
8259                 cnt->bytes = inn_bytes;
8260         }
8261         return 0;
8262 }
8263
8264 /*
8265  * Mutex-protected thunk to lock-free  __flow_dv_translate().
8266  */
8267 static int
8268 flow_dv_translate(struct rte_eth_dev *dev,
8269                   struct mlx5_flow *dev_flow,
8270                   const struct rte_flow_attr *attr,
8271                   const struct rte_flow_item items[],
8272                   const struct rte_flow_action actions[],
8273                   struct rte_flow_error *error)
8274 {
8275         int ret;
8276
8277         flow_dv_shared_lock(dev);
8278         ret = __flow_dv_translate(dev, dev_flow, attr, items, actions, error);
8279         flow_dv_shared_unlock(dev);
8280         return ret;
8281 }
8282
8283 /*
8284  * Mutex-protected thunk to lock-free  __flow_dv_apply().
8285  */
8286 static int
8287 flow_dv_apply(struct rte_eth_dev *dev,
8288               struct rte_flow *flow,
8289               struct rte_flow_error *error)
8290 {
8291         int ret;
8292
8293         flow_dv_shared_lock(dev);
8294         ret = __flow_dv_apply(dev, flow, error);
8295         flow_dv_shared_unlock(dev);
8296         return ret;
8297 }
8298
8299 /*
8300  * Mutex-protected thunk to lock-free __flow_dv_remove().
8301  */
8302 static void
8303 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8304 {
8305         flow_dv_shared_lock(dev);
8306         __flow_dv_remove(dev, flow);
8307         flow_dv_shared_unlock(dev);
8308 }
8309
8310 /*
8311  * Mutex-protected thunk to lock-free __flow_dv_destroy().
8312  */
8313 static void
8314 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8315 {
8316         flow_dv_shared_lock(dev);
8317         __flow_dv_destroy(dev, flow);
8318         flow_dv_shared_unlock(dev);
8319 }
8320
8321 /*
8322  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
8323  */
8324 static struct mlx5_flow_counter *
8325 flow_dv_counter_allocate(struct rte_eth_dev *dev)
8326 {
8327         struct mlx5_flow_counter *cnt;
8328
8329         flow_dv_shared_lock(dev);
8330         cnt = flow_dv_counter_alloc(dev, 0, 0, 1);
8331         flow_dv_shared_unlock(dev);
8332         return cnt;
8333 }
8334
8335 /*
8336  * Mutex-protected thunk to lock-free flow_dv_counter_release().
8337  */
8338 static void
8339 flow_dv_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt)
8340 {
8341         flow_dv_shared_lock(dev);
8342         flow_dv_counter_release(dev, cnt);
8343         flow_dv_shared_unlock(dev);
8344 }
8345
8346 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
8347         .validate = flow_dv_validate,
8348         .prepare = flow_dv_prepare,
8349         .translate = flow_dv_translate,
8350         .apply = flow_dv_apply,
8351         .remove = flow_dv_remove,
8352         .destroy = flow_dv_destroy,
8353         .query = flow_dv_query,
8354         .create_mtr_tbls = flow_dv_create_mtr_tbl,
8355         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbl,
8356         .create_policer_rules = flow_dv_create_policer_rules,
8357         .destroy_policer_rules = flow_dv_destroy_policer_rules,
8358         .counter_alloc = flow_dv_counter_allocate,
8359         .counter_free = flow_dv_counter_free,
8360         .counter_query = flow_dv_counter_query,
8361 };
8362
8363 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */