drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 #include <rte_common.h>
  12 #include <rte_ether.h>
  13 #include <rte_ethdev_driver.h>
  14 #include <rte_flow.h>
  15 #include <rte_flow_driver.h>
  16 #include <rte_malloc.h>
  17 #include <rte_cycles.h>
  18 #include <rte_ip.h>
  19 #include <rte_gre.h>
  20 #include <rte_vxlan.h>
  21 #include <rte_gtp.h>
  22 #include <rte_eal_paging.h>
  23 #include <rte_mpls.h>
  24
  25 #include <mlx5_glue.h>
  26 #include <mlx5_devx_cmds.h>
  27 #include <mlx5_prm.h>
  28 #include <mlx5_malloc.h>
  29
  30 #include "mlx5_defs.h"
  31 #include "mlx5.h"
  32 #include "mlx5_common_os.h"
  33 #include "mlx5_flow.h"
  34 #include "mlx5_flow_os.h"
  35 #include "mlx5_rxtx.h"
  36 #include "rte_pmd_mlx5.h"
  37
  38 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  39
  40 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  41 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  42 #endif
  43
  44 #ifndef HAVE_MLX5DV_DR_ESWITCH
  45 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  46 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  47 #endif
  48 #endif
  49
  50 #ifndef HAVE_MLX5DV_DR
  51 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  52 #endif
  53
  54 /* VLAN header definitions */
  55 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  56 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  57 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  58 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  59 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  60
  61 union flow_dv_attr {
  62         struct {
  63                 uint32_t valid:1;
  64                 uint32_t ipv4:1;
  65                 uint32_t ipv6:1;
  66                 uint32_t tcp:1;
  67                 uint32_t udp:1;
  68                 uint32_t reserved:27;
  69         };
  70         uint32_t attr;
  71 };
  72
  73 static int
  74 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
  75                              struct mlx5_flow_tbl_resource *tbl);
  76
  77 static int
  78 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
  79                                       uint32_t encap_decap_idx);
  80
  81 static int
  82 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
  83                                         uint32_t port_id);
  84
  85 /**
  86  * Initialize flow attributes structure according to flow items' types.
  87  *
  88  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
  89  * mode. For tunnel mode, the items to be modified are the outermost ones.
  90  *
  91  * @param[in] item
  92  *   Pointer to item specification.
  93  * @param[out] attr
  94  *   Pointer to flow attributes structure.
  95  * @param[in] dev_flow
  96  *   Pointer to the sub flow.
  97  * @param[in] tunnel_decap
  98  *   Whether action is after tunnel decapsulation.
  99  */
 100 static void
 101 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
 102                   struct mlx5_flow *dev_flow, bool tunnel_decap)
 103 {
 104         uint64_t layers = dev_flow->handle->layers;
 105
 106         /*
 107          * If layers is already initialized, it means this dev_flow is the
 108          * suffix flow, the layers flags is set by the prefix flow. Need to
 109          * use the layer flags from prefix flow as the suffix flow may not
 110          * have the user defined items as the flow is split.
 111          */
 112         if (layers) {
 113                 if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
 114                         attr->ipv4 = 1;
 115                 else if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
 116                         attr->ipv6 = 1;
 117                 if (layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
 118                         attr->tcp = 1;
 119                 else if (layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
 120                         attr->udp = 1;
 121                 attr->valid = 1;
 122                 return;
 123         }
 124         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 125                 uint8_t next_protocol = 0xff;
 126                 switch (item->type) {
 127                 case RTE_FLOW_ITEM_TYPE_GRE:
 128                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 129                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 130                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 131                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 132                 case RTE_FLOW_ITEM_TYPE_MPLS:
 133                         if (tunnel_decap)
 134                                 attr->attr = 0;
 135                         break;
 136                 case RTE_FLOW_ITEM_TYPE_IPV4:
 137                         if (!attr->ipv6)
 138                                 attr->ipv4 = 1;
 139                         if (item->mask != NULL &&
 140                             ((const struct rte_flow_item_ipv4 *)
 141                             item->mask)->hdr.next_proto_id)
 142                                 next_protocol =
 143                                     ((const struct rte_flow_item_ipv4 *)
 144                                       (item->spec))->hdr.next_proto_id &
 145                                     ((const struct rte_flow_item_ipv4 *)
 146                                       (item->mask))->hdr.next_proto_id;
 147                         if ((next_protocol == IPPROTO_IPIP ||
 148                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 149                                 attr->attr = 0;
 150                         break;
 151                 case RTE_FLOW_ITEM_TYPE_IPV6:
 152                         if (!attr->ipv4)
 153                                 attr->ipv6 = 1;
 154                         if (item->mask != NULL &&
 155                             ((const struct rte_flow_item_ipv6 *)
 156                             item->mask)->hdr.proto)
 157                                 next_protocol =
 158                                     ((const struct rte_flow_item_ipv6 *)
 159                                       (item->spec))->hdr.proto &
 160                                     ((const struct rte_flow_item_ipv6 *)
 161                                       (item->mask))->hdr.proto;
 162                         if ((next_protocol == IPPROTO_IPIP ||
 163                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 164                                 attr->attr = 0;
 165                         break;
 166                 case RTE_FLOW_ITEM_TYPE_UDP:
 167                         if (!attr->tcp)
 168                                 attr->udp = 1;
 169                         break;
 170                 case RTE_FLOW_ITEM_TYPE_TCP:
 171                         if (!attr->udp)
 172                                 attr->tcp = 1;
 173                         break;
 174                 default:
 175                         break;
 176                 }
 177         }
 178         attr->valid = 1;
 179 }
 180
 181 /**
 182  * Convert rte_mtr_color to mlx5 color.
 183  *
 184  * @param[in] rcol
 185  *   rte_mtr_color.
 186  *
 187  * @return
 188  *   mlx5 color.
 189  */
 190 static int
 191 rte_col_2_mlx5_col(enum rte_color rcol)
 192 {
 193         switch (rcol) {
 194         case RTE_COLOR_GREEN:
 195                 return MLX5_FLOW_COLOR_GREEN;
 196         case RTE_COLOR_YELLOW:
 197                 return MLX5_FLOW_COLOR_YELLOW;
 198         case RTE_COLOR_RED:
 199                 return MLX5_FLOW_COLOR_RED;
 200         default:
 201                 break;
 202         }
 203         return MLX5_FLOW_COLOR_UNDEFINED;
 204 }
 205
 206 struct field_modify_info {
 207         uint32_t size; /* Size of field in protocol header, in bytes. */
 208         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 209         enum mlx5_modification_field id;
 210 };
 211
 212 struct field_modify_info modify_eth[] = {
 213         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 214         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 215         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 216         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 217         {0, 0, 0},
 218 };
 219
 220 struct field_modify_info modify_vlan_out_first_vid[] = {
 221         /* Size in bits !!! */
 222         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 223         {0, 0, 0},
 224 };
 225
 226 struct field_modify_info modify_ipv4[] = {
 227         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 228         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 229         {4, 12, MLX5_MODI_OUT_SIPV4},
 230         {4, 16, MLX5_MODI_OUT_DIPV4},
 231         {0, 0, 0},
 232 };
 233
 234 struct field_modify_info modify_ipv6[] = {
 235         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 236         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 237         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 238         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 239         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 240         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 241         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 242         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 243         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 244         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 245         {0, 0, 0},
 246 };
 247
 248 struct field_modify_info modify_udp[] = {
 249         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 250         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 251         {0, 0, 0},
 252 };
 253
 254 struct field_modify_info modify_tcp[] = {
 255         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 256         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 257         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 258         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 259         {0, 0, 0},
 260 };
 261
 262 static void
 263 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 264                           uint8_t next_protocol, uint64_t *item_flags,
 265                           int *tunnel)
 266 {
 267         MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 268                     item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 269         if (next_protocol == IPPROTO_IPIP) {
 270                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 271                 *tunnel = 1;
 272         }
 273         if (next_protocol == IPPROTO_IPV6) {
 274                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 275                 *tunnel = 1;
 276         }
 277 }
 278
 279 /* Update VLAN's VID/PCP based on input rte_flow_action.
 280  *
 281  * @param[in] action
 282  *   Pointer to struct rte_flow_action.
 283  * @param[out] vlan
 284  *   Pointer to struct rte_vlan_hdr.
 285  */
 286 static void
 287 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 288                          struct rte_vlan_hdr *vlan)
 289 {
 290         uint16_t vlan_tci;
 291         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 292                 vlan_tci =
 293                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 294                                                action->conf)->vlan_pcp;
 295                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 296                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 297                 vlan->vlan_tci |= vlan_tci;
 298         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 299                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 300                 vlan->vlan_tci |= rte_be_to_cpu_16
 301                     (((const struct rte_flow_action_of_set_vlan_vid *)
 302                                              action->conf)->vlan_vid);
 303         }
 304 }
 305
 306 /**
 307  * Fetch 1, 2, 3 or 4 byte field from the byte array
 308  * and return as unsigned integer in host-endian format.
 309  *
 310  * @param[in] data
 311  *   Pointer to data array.
 312  * @param[in] size
 313  *   Size of field to extract.
 314  *
 315  * @return
 316  *   converted field in host endian format.
 317  */
 318 static inline uint32_t
 319 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 320 {
 321         uint32_t ret;
 322
 323         switch (size) {
 324         case 1:
 325                 ret = *data;
 326                 break;
 327         case 2:
 328                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 329                 break;
 330         case 3:
 331                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 332                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 333                 break;
 334         case 4:
 335                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 336                 break;
 337         default:
 338                 MLX5_ASSERT(false);
 339                 ret = 0;
 340                 break;
 341         }
 342         return ret;
 343 }
 344
 345 /**
 346  * Convert modify-header action to DV specification.
 347  *
 348  * Data length of each action is determined by provided field description
 349  * and the item mask. Data bit offset and width of each action is determined
 350  * by provided item mask.
 351  *
 352  * @param[in] item
 353  *   Pointer to item specification.
 354  * @param[in] field
 355  *   Pointer to field modification information.
 356  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 357  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 358  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 359  * @param[in] dcopy
 360  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 361  *   Negative offset value sets the same offset as source offset.
 362  *   size field is ignored, value is taken from source field.
 363  * @param[in,out] resource
 364  *   Pointer to the modify-header resource.
 365  * @param[in] type
 366  *   Type of modification.
 367  * @param[out] error
 368  *   Pointer to the error structure.
 369  *
 370  * @return
 371  *   0 on success, a negative errno value otherwise and rte_errno is set.
 372  */
 373 static int
 374 flow_dv_convert_modify_action(struct rte_flow_item *item,
 375                               struct field_modify_info *field,
 376                               struct field_modify_info *dcopy,
 377                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 378                               uint32_t type, struct rte_flow_error *error)
 379 {
 380         uint32_t i = resource->actions_num;
 381         struct mlx5_modification_cmd *actions = resource->actions;
 382
 383         /*
 384          * The item and mask are provided in big-endian format.
 385          * The fields should be presented as in big-endian format either.
 386          * Mask must be always present, it defines the actual field width.
 387          */
 388         MLX5_ASSERT(item->mask);
 389         MLX5_ASSERT(field->size);
 390         do {
 391                 unsigned int size_b;
 392                 unsigned int off_b;
 393                 uint32_t mask;
 394                 uint32_t data;
 395
 396                 if (i >= MLX5_MAX_MODIFY_NUM)
 397                         return rte_flow_error_set(error, EINVAL,
 398                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 399                                  "too many items to modify");
 400                 /* Fetch variable byte size mask from the array. */
 401                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 402                                            field->offset, field->size);
 403                 if (!mask) {
 404                         ++field;
 405                         continue;
 406                 }
 407                 /* Deduce actual data width in bits from mask value. */
 408                 off_b = rte_bsf32(mask);
 409                 size_b = sizeof(uint32_t) * CHAR_BIT -
 410                          off_b - __builtin_clz(mask);
 411                 MLX5_ASSERT(size_b);
 412                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 413                 actions[i] = (struct mlx5_modification_cmd) {
 414                         .action_type = type,
 415                         .field = field->id,
 416                         .offset = off_b,
 417                         .length = size_b,
 418                 };
 419                 /* Convert entire record to expected big-endian format. */
 420                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 421                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 422                         MLX5_ASSERT(dcopy);
 423                         actions[i].dst_field = dcopy->id;
 424                         actions[i].dst_offset =
 425                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 426                         /* Convert entire record to big-endian format. */
 427                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 428                 } else {
 429                         MLX5_ASSERT(item->spec);
 430                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 431                                                    field->offset, field->size);
 432                         /* Shift out the trailing masked bits from data. */
 433                         data = (data & mask) >> off_b;
 434                         actions[i].data1 = rte_cpu_to_be_32(data);
 435                 }
 436                 ++i;
 437                 ++field;
 438         } while (field->size);
 439         if (resource->actions_num == i)
 440                 return rte_flow_error_set(error, EINVAL,
 441                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 442                                           "invalid modification flow item");
 443         resource->actions_num = i;
 444         return 0;
 445 }
 446
 447 /**
 448  * Convert modify-header set IPv4 address action to DV specification.
 449  *
 450  * @param[in,out] resource
 451  *   Pointer to the modify-header resource.
 452  * @param[in] action
 453  *   Pointer to action specification.
 454  * @param[out] error
 455  *   Pointer to the error structure.
 456  *
 457  * @return
 458  *   0 on success, a negative errno value otherwise and rte_errno is set.
 459  */
 460 static int
 461 flow_dv_convert_action_modify_ipv4
 462                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 463                          const struct rte_flow_action *action,
 464                          struct rte_flow_error *error)
 465 {
 466         const struct rte_flow_action_set_ipv4 *conf =
 467                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 468         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 469         struct rte_flow_item_ipv4 ipv4;
 470         struct rte_flow_item_ipv4 ipv4_mask;
 471
 472         memset(&ipv4, 0, sizeof(ipv4));
 473         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 474         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 475                 ipv4.hdr.src_addr = conf->ipv4_addr;
 476                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 477         } else {
 478                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 479                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 480         }
 481         item.spec = &ipv4;
 482         item.mask = &ipv4_mask;
 483         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 484                                              MLX5_MODIFICATION_TYPE_SET, error);
 485 }
 486
 487 /**
 488  * Convert modify-header set IPv6 address action to DV specification.
 489  *
 490  * @param[in,out] resource
 491  *   Pointer to the modify-header resource.
 492  * @param[in] action
 493  *   Pointer to action specification.
 494  * @param[out] error
 495  *   Pointer to the error structure.
 496  *
 497  * @return
 498  *   0 on success, a negative errno value otherwise and rte_errno is set.
 499  */
 500 static int
 501 flow_dv_convert_action_modify_ipv6
 502                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 503                          const struct rte_flow_action *action,
 504                          struct rte_flow_error *error)
 505 {
 506         const struct rte_flow_action_set_ipv6 *conf =
 507                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 508         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 509         struct rte_flow_item_ipv6 ipv6;
 510         struct rte_flow_item_ipv6 ipv6_mask;
 511
 512         memset(&ipv6, 0, sizeof(ipv6));
 513         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 514         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 515                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 516                        sizeof(ipv6.hdr.src_addr));
 517                 memcpy(&ipv6_mask.hdr.src_addr,
 518                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 519                        sizeof(ipv6.hdr.src_addr));
 520         } else {
 521                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 522                        sizeof(ipv6.hdr.dst_addr));
 523                 memcpy(&ipv6_mask.hdr.dst_addr,
 524                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 525                        sizeof(ipv6.hdr.dst_addr));
 526         }
 527         item.spec = &ipv6;
 528         item.mask = &ipv6_mask;
 529         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 530                                              MLX5_MODIFICATION_TYPE_SET, error);
 531 }
 532
 533 /**
 534  * Convert modify-header set MAC address action to DV specification.
 535  *
 536  * @param[in,out] resource
 537  *   Pointer to the modify-header resource.
 538  * @param[in] action
 539  *   Pointer to action specification.
 540  * @param[out] error
 541  *   Pointer to the error structure.
 542  *
 543  * @return
 544  *   0 on success, a negative errno value otherwise and rte_errno is set.
 545  */
 546 static int
 547 flow_dv_convert_action_modify_mac
 548                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 549                          const struct rte_flow_action *action,
 550                          struct rte_flow_error *error)
 551 {
 552         const struct rte_flow_action_set_mac *conf =
 553                 (const struct rte_flow_action_set_mac *)(action->conf);
 554         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 555         struct rte_flow_item_eth eth;
 556         struct rte_flow_item_eth eth_mask;
 557
 558         memset(&eth, 0, sizeof(eth));
 559         memset(&eth_mask, 0, sizeof(eth_mask));
 560         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 561                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 562                        sizeof(eth.src.addr_bytes));
 563                 memcpy(&eth_mask.src.addr_bytes,
 564                        &rte_flow_item_eth_mask.src.addr_bytes,
 565                        sizeof(eth_mask.src.addr_bytes));
 566         } else {
 567                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 568                        sizeof(eth.dst.addr_bytes));
 569                 memcpy(&eth_mask.dst.addr_bytes,
 570                        &rte_flow_item_eth_mask.dst.addr_bytes,
 571                        sizeof(eth_mask.dst.addr_bytes));
 572         }
 573         item.spec = &eth;
 574         item.mask = &eth_mask;
 575         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 576                                              MLX5_MODIFICATION_TYPE_SET, error);
 577 }
 578
 579 /**
 580  * Convert modify-header set VLAN VID action to DV specification.
 581  *
 582  * @param[in,out] resource
 583  *   Pointer to the modify-header resource.
 584  * @param[in] action
 585  *   Pointer to action specification.
 586  * @param[out] error
 587  *   Pointer to the error structure.
 588  *
 589  * @return
 590  *   0 on success, a negative errno value otherwise and rte_errno is set.
 591  */
 592 static int
 593 flow_dv_convert_action_modify_vlan_vid
 594                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 595                          const struct rte_flow_action *action,
 596                          struct rte_flow_error *error)
 597 {
 598         const struct rte_flow_action_of_set_vlan_vid *conf =
 599                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 600         int i = resource->actions_num;
 601         struct mlx5_modification_cmd *actions = resource->actions;
 602         struct field_modify_info *field = modify_vlan_out_first_vid;
 603
 604         if (i >= MLX5_MAX_MODIFY_NUM)
 605                 return rte_flow_error_set(error, EINVAL,
 606                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 607                          "too many items to modify");
 608         actions[i] = (struct mlx5_modification_cmd) {
 609                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 610                 .field = field->id,
 611                 .length = field->size,
 612                 .offset = field->offset,
 613         };
 614         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 615         actions[i].data1 = conf->vlan_vid;
 616         actions[i].data1 = actions[i].data1 << 16;
 617         resource->actions_num = ++i;
 618         return 0;
 619 }
 620
 621 /**
 622  * Convert modify-header set TP action to DV specification.
 623  *
 624  * @param[in,out] resource
 625  *   Pointer to the modify-header resource.
 626  * @param[in] action
 627  *   Pointer to action specification.
 628  * @param[in] items
 629  *   Pointer to rte_flow_item objects list.
 630  * @param[in] attr
 631  *   Pointer to flow attributes structure.
 632  * @param[in] dev_flow
 633  *   Pointer to the sub flow.
 634  * @param[in] tunnel_decap
 635  *   Whether action is after tunnel decapsulation.
 636  * @param[out] error
 637  *   Pointer to the error structure.
 638  *
 639  * @return
 640  *   0 on success, a negative errno value otherwise and rte_errno is set.
 641  */
 642 static int
 643 flow_dv_convert_action_modify_tp
 644                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 645                          const struct rte_flow_action *action,
 646                          const struct rte_flow_item *items,
 647                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 648                          bool tunnel_decap, struct rte_flow_error *error)
 649 {
 650         const struct rte_flow_action_set_tp *conf =
 651                 (const struct rte_flow_action_set_tp *)(action->conf);
 652         struct rte_flow_item item;
 653         struct rte_flow_item_udp udp;
 654         struct rte_flow_item_udp udp_mask;
 655         struct rte_flow_item_tcp tcp;
 656         struct rte_flow_item_tcp tcp_mask;
 657         struct field_modify_info *field;
 658
 659         if (!attr->valid)
 660                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 661         if (attr->udp) {
 662                 memset(&udp, 0, sizeof(udp));
 663                 memset(&udp_mask, 0, sizeof(udp_mask));
 664                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 665                         udp.hdr.src_port = conf->port;
 666                         udp_mask.hdr.src_port =
 667                                         rte_flow_item_udp_mask.hdr.src_port;
 668                 } else {
 669                         udp.hdr.dst_port = conf->port;
 670                         udp_mask.hdr.dst_port =
 671                                         rte_flow_item_udp_mask.hdr.dst_port;
 672                 }
 673                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 674                 item.spec = &udp;
 675                 item.mask = &udp_mask;
 676                 field = modify_udp;
 677         } else {
 678                 MLX5_ASSERT(attr->tcp);
 679                 memset(&tcp, 0, sizeof(tcp));
 680                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 681                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 682                         tcp.hdr.src_port = conf->port;
 683                         tcp_mask.hdr.src_port =
 684                                         rte_flow_item_tcp_mask.hdr.src_port;
 685                 } else {
 686                         tcp.hdr.dst_port = conf->port;
 687                         tcp_mask.hdr.dst_port =
 688                                         rte_flow_item_tcp_mask.hdr.dst_port;
 689                 }
 690                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 691                 item.spec = &tcp;
 692                 item.mask = &tcp_mask;
 693                 field = modify_tcp;
 694         }
 695         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 696                                              MLX5_MODIFICATION_TYPE_SET, error);
 697 }
 698
 699 /**
 700  * Convert modify-header set TTL action to DV specification.
 701  *
 702  * @param[in,out] resource
 703  *   Pointer to the modify-header resource.
 704  * @param[in] action
 705  *   Pointer to action specification.
 706  * @param[in] items
 707  *   Pointer to rte_flow_item objects list.
 708  * @param[in] attr
 709  *   Pointer to flow attributes structure.
 710  * @param[in] dev_flow
 711  *   Pointer to the sub flow.
 712  * @param[in] tunnel_decap
 713  *   Whether action is after tunnel decapsulation.
 714  * @param[out] error
 715  *   Pointer to the error structure.
 716  *
 717  * @return
 718  *   0 on success, a negative errno value otherwise and rte_errno is set.
 719  */
 720 static int
 721 flow_dv_convert_action_modify_ttl
 722                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 723                          const struct rte_flow_action *action,
 724                          const struct rte_flow_item *items,
 725                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 726                          bool tunnel_decap, struct rte_flow_error *error)
 727 {
 728         const struct rte_flow_action_set_ttl *conf =
 729                 (const struct rte_flow_action_set_ttl *)(action->conf);
 730         struct rte_flow_item item;
 731         struct rte_flow_item_ipv4 ipv4;
 732         struct rte_flow_item_ipv4 ipv4_mask;
 733         struct rte_flow_item_ipv6 ipv6;
 734         struct rte_flow_item_ipv6 ipv6_mask;
 735         struct field_modify_info *field;
 736
 737         if (!attr->valid)
 738                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 739         if (attr->ipv4) {
 740                 memset(&ipv4, 0, sizeof(ipv4));
 741                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 742                 ipv4.hdr.time_to_live = conf->ttl_value;
 743                 ipv4_mask.hdr.time_to_live = 0xFF;
 744                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 745                 item.spec = &ipv4;
 746                 item.mask = &ipv4_mask;
 747                 field = modify_ipv4;
 748         } else {
 749                 MLX5_ASSERT(attr->ipv6);
 750                 memset(&ipv6, 0, sizeof(ipv6));
 751                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 752                 ipv6.hdr.hop_limits = conf->ttl_value;
 753                 ipv6_mask.hdr.hop_limits = 0xFF;
 754                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 755                 item.spec = &ipv6;
 756                 item.mask = &ipv6_mask;
 757                 field = modify_ipv6;
 758         }
 759         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 760                                              MLX5_MODIFICATION_TYPE_SET, error);
 761 }
 762
 763 /**
 764  * Convert modify-header decrement TTL action to DV specification.
 765  *
 766  * @param[in,out] resource
 767  *   Pointer to the modify-header resource.
 768  * @param[in] action
 769  *   Pointer to action specification.
 770  * @param[in] items
 771  *   Pointer to rte_flow_item objects list.
 772  * @param[in] attr
 773  *   Pointer to flow attributes structure.
 774  * @param[in] dev_flow
 775  *   Pointer to the sub flow.
 776  * @param[in] tunnel_decap
 777  *   Whether action is after tunnel decapsulation.
 778  * @param[out] error
 779  *   Pointer to the error structure.
 780  *
 781  * @return
 782  *   0 on success, a negative errno value otherwise and rte_errno is set.
 783  */
 784 static int
 785 flow_dv_convert_action_modify_dec_ttl
 786                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 787                          const struct rte_flow_item *items,
 788                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 789                          bool tunnel_decap, struct rte_flow_error *error)
 790 {
 791         struct rte_flow_item item;
 792         struct rte_flow_item_ipv4 ipv4;
 793         struct rte_flow_item_ipv4 ipv4_mask;
 794         struct rte_flow_item_ipv6 ipv6;
 795         struct rte_flow_item_ipv6 ipv6_mask;
 796         struct field_modify_info *field;
 797
 798         if (!attr->valid)
 799                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 800         if (attr->ipv4) {
 801                 memset(&ipv4, 0, sizeof(ipv4));
 802                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 803                 ipv4.hdr.time_to_live = 0xFF;
 804                 ipv4_mask.hdr.time_to_live = 0xFF;
 805                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 806                 item.spec = &ipv4;
 807                 item.mask = &ipv4_mask;
 808                 field = modify_ipv4;
 809         } else {
 810                 MLX5_ASSERT(attr->ipv6);
 811                 memset(&ipv6, 0, sizeof(ipv6));
 812                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 813                 ipv6.hdr.hop_limits = 0xFF;
 814                 ipv6_mask.hdr.hop_limits = 0xFF;
 815                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 816                 item.spec = &ipv6;
 817                 item.mask = &ipv6_mask;
 818                 field = modify_ipv6;
 819         }
 820         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 821                                              MLX5_MODIFICATION_TYPE_ADD, error);
 822 }
 823
 824 /**
 825  * Convert modify-header increment/decrement TCP Sequence number
 826  * to DV specification.
 827  *
 828  * @param[in,out] resource
 829  *   Pointer to the modify-header resource.
 830  * @param[in] action
 831  *   Pointer to action specification.
 832  * @param[out] error
 833  *   Pointer to the error structure.
 834  *
 835  * @return
 836  *   0 on success, a negative errno value otherwise and rte_errno is set.
 837  */
 838 static int
 839 flow_dv_convert_action_modify_tcp_seq
 840                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 841                          const struct rte_flow_action *action,
 842                          struct rte_flow_error *error)
 843 {
 844         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 845         uint64_t value = rte_be_to_cpu_32(*conf);
 846         struct rte_flow_item item;
 847         struct rte_flow_item_tcp tcp;
 848         struct rte_flow_item_tcp tcp_mask;
 849
 850         memset(&tcp, 0, sizeof(tcp));
 851         memset(&tcp_mask, 0, sizeof(tcp_mask));
 852         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 853                 /*
 854                  * The HW has no decrement operation, only increment operation.
 855                  * To simulate decrement X from Y using increment operation
 856                  * we need to add UINT32_MAX X times to Y.
 857                  * Each adding of UINT32_MAX decrements Y by 1.
 858                  */
 859                 value *= UINT32_MAX;
 860         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 861         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 862         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 863         item.spec = &tcp;
 864         item.mask = &tcp_mask;
 865         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 866                                              MLX5_MODIFICATION_TYPE_ADD, error);
 867 }
 868
 869 /**
 870  * Convert modify-header increment/decrement TCP Acknowledgment number
 871  * to DV specification.
 872  *
 873  * @param[in,out] resource
 874  *   Pointer to the modify-header resource.
 875  * @param[in] action
 876  *   Pointer to action specification.
 877  * @param[out] error
 878  *   Pointer to the error structure.
 879  *
 880  * @return
 881  *   0 on success, a negative errno value otherwise and rte_errno is set.
 882  */
 883 static int
 884 flow_dv_convert_action_modify_tcp_ack
 885                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 886                          const struct rte_flow_action *action,
 887                          struct rte_flow_error *error)
 888 {
 889         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 890         uint64_t value = rte_be_to_cpu_32(*conf);
 891         struct rte_flow_item item;
 892         struct rte_flow_item_tcp tcp;
 893         struct rte_flow_item_tcp tcp_mask;
 894
 895         memset(&tcp, 0, sizeof(tcp));
 896         memset(&tcp_mask, 0, sizeof(tcp_mask));
 897         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 898                 /*
 899                  * The HW has no decrement operation, only increment operation.
 900                  * To simulate decrement X from Y using increment operation
 901                  * we need to add UINT32_MAX X times to Y.
 902                  * Each adding of UINT32_MAX decrements Y by 1.
 903                  */
 904                 value *= UINT32_MAX;
 905         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 906         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 907         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 908         item.spec = &tcp;
 909         item.mask = &tcp_mask;
 910         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 911                                              MLX5_MODIFICATION_TYPE_ADD, error);
 912 }
 913
 914 static enum mlx5_modification_field reg_to_field[] = {
 915         [REG_NON] = MLX5_MODI_OUT_NONE,
 916         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 917         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 918         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 919         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 920         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 921         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 922         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 923         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 924         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 925         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 926 };
 927
 928 /**
 929  * Convert register set to DV specification.
 930  *
 931  * @param[in,out] resource
 932  *   Pointer to the modify-header resource.
 933  * @param[in] action
 934  *   Pointer to action specification.
 935  * @param[out] error
 936  *   Pointer to the error structure.
 937  *
 938  * @return
 939  *   0 on success, a negative errno value otherwise and rte_errno is set.
 940  */
 941 static int
 942 flow_dv_convert_action_set_reg
 943                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 944                          const struct rte_flow_action *action,
 945                          struct rte_flow_error *error)
 946 {
 947         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 948         struct mlx5_modification_cmd *actions = resource->actions;
 949         uint32_t i = resource->actions_num;
 950
 951         if (i >= MLX5_MAX_MODIFY_NUM)
 952                 return rte_flow_error_set(error, EINVAL,
 953                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 954                                           "too many items to modify");
 955         MLX5_ASSERT(conf->id != REG_NON);
 956         MLX5_ASSERT(conf->id < RTE_DIM(reg_to_field));
 957         actions[i] = (struct mlx5_modification_cmd) {
 958                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 959                 .field = reg_to_field[conf->id],
 960         };
 961         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 962         actions[i].data1 = rte_cpu_to_be_32(conf->data);
 963         ++i;
 964         resource->actions_num = i;
 965         return 0;
 966 }
 967
 968 /**
 969  * Convert SET_TAG action to DV specification.
 970  *
 971  * @param[in] dev
 972  *   Pointer to the rte_eth_dev structure.
 973  * @param[in,out] resource
 974  *   Pointer to the modify-header resource.
 975  * @param[in] conf
 976  *   Pointer to action specification.
 977  * @param[out] error
 978  *   Pointer to the error structure.
 979  *
 980  * @return
 981  *   0 on success, a negative errno value otherwise and rte_errno is set.
 982  */
 983 static int
 984 flow_dv_convert_action_set_tag
 985                         (struct rte_eth_dev *dev,
 986                          struct mlx5_flow_dv_modify_hdr_resource *resource,
 987                          const struct rte_flow_action_set_tag *conf,
 988                          struct rte_flow_error *error)
 989 {
 990         rte_be32_t data = rte_cpu_to_be_32(conf->data);
 991         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
 992         struct rte_flow_item item = {
 993                 .spec = &data,
 994                 .mask = &mask,
 995         };
 996         struct field_modify_info reg_c_x[] = {
 997                 [1] = {0, 0, 0},
 998         };
 999         enum mlx5_modification_field reg_type;
1000         int ret;
1001
1002         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1003         if (ret < 0)
1004                 return ret;
1005         MLX5_ASSERT(ret != REG_NON);
1006         MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1007         reg_type = reg_to_field[ret];
1008         MLX5_ASSERT(reg_type > 0);
1009         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1010         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1011                                              MLX5_MODIFICATION_TYPE_SET, error);
1012 }
1013
1014 /**
1015  * Convert internal COPY_REG action to DV specification.
1016  *
1017  * @param[in] dev
1018  *   Pointer to the rte_eth_dev structure.
1019  * @param[in,out] res
1020  *   Pointer to the modify-header resource.
1021  * @param[in] action
1022  *   Pointer to action specification.
1023  * @param[out] error
1024  *   Pointer to the error structure.
1025  *
1026  * @return
1027  *   0 on success, a negative errno value otherwise and rte_errno is set.
1028  */
1029 static int
1030 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1031                                  struct mlx5_flow_dv_modify_hdr_resource *res,
1032                                  const struct rte_flow_action *action,
1033                                  struct rte_flow_error *error)
1034 {
1035         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1036         rte_be32_t mask = RTE_BE32(UINT32_MAX);
1037         struct rte_flow_item item = {
1038                 .spec = NULL,
1039                 .mask = &mask,
1040         };
1041         struct field_modify_info reg_src[] = {
1042                 {4, 0, reg_to_field[conf->src]},
1043                 {0, 0, 0},
1044         };
1045         struct field_modify_info reg_dst = {
1046                 .offset = 0,
1047                 .id = reg_to_field[conf->dst],
1048         };
1049         /* Adjust reg_c[0] usage according to reported mask. */
1050         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1051                 struct mlx5_priv *priv = dev->data->dev_private;
1052                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1053
1054                 MLX5_ASSERT(reg_c0);
1055                 MLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1056                 if (conf->dst == REG_C_0) {
1057                         /* Copy to reg_c[0], within mask only. */
1058                         reg_dst.offset = rte_bsf32(reg_c0);
1059                         /*
1060                          * Mask is ignoring the enianness, because
1061                          * there is no conversion in datapath.
1062                          */
1063 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1064                         /* Copy from destination lower bits to reg_c[0]. */
1065                         mask = reg_c0 >> reg_dst.offset;
1066 #else
1067                         /* Copy from destination upper bits to reg_c[0]. */
1068                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1069                                           rte_fls_u32(reg_c0));
1070 #endif
1071                 } else {
1072                         mask = rte_cpu_to_be_32(reg_c0);
1073 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1074                         /* Copy from reg_c[0] to destination lower bits. */
1075                         reg_dst.offset = 0;
1076 #else
1077                         /* Copy from reg_c[0] to destination upper bits. */
1078                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1079                                          (rte_fls_u32(reg_c0) -
1080                                           rte_bsf32(reg_c0));
1081 #endif
1082                 }
1083         }
1084         return flow_dv_convert_modify_action(&item,
1085                                              reg_src, &reg_dst, res,
1086                                              MLX5_MODIFICATION_TYPE_COPY,
1087                                              error);
1088 }
1089
1090 /**
1091  * Convert MARK action to DV specification. This routine is used
1092  * in extensive metadata only and requires metadata register to be
1093  * handled. In legacy mode hardware tag resource is engaged.
1094  *
1095  * @param[in] dev
1096  *   Pointer to the rte_eth_dev structure.
1097  * @param[in] conf
1098  *   Pointer to MARK action specification.
1099  * @param[in,out] resource
1100  *   Pointer to the modify-header resource.
1101  * @param[out] error
1102  *   Pointer to the error structure.
1103  *
1104  * @return
1105  *   0 on success, a negative errno value otherwise and rte_errno is set.
1106  */
1107 static int
1108 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1109                             const struct rte_flow_action_mark *conf,
1110                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1111                             struct rte_flow_error *error)
1112 {
1113         struct mlx5_priv *priv = dev->data->dev_private;
1114         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1115                                            priv->sh->dv_mark_mask);
1116         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1117         struct rte_flow_item item = {
1118                 .spec = &data,
1119                 .mask = &mask,
1120         };
1121         struct field_modify_info reg_c_x[] = {
1122                 [1] = {0, 0, 0},
1123         };
1124         int reg;
1125
1126         if (!mask)
1127                 return rte_flow_error_set(error, EINVAL,
1128                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1129                                           NULL, "zero mark action mask");
1130         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1131         if (reg < 0)
1132                 return reg;
1133         MLX5_ASSERT(reg > 0);
1134         if (reg == REG_C_0) {
1135                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1136                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1137
1138                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1139                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1140                 mask = rte_cpu_to_be_32(mask << shl_c0);
1141         }
1142         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1143         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1144                                              MLX5_MODIFICATION_TYPE_SET, error);
1145 }
1146
1147 /**
1148  * Get metadata register index for specified steering domain.
1149  *
1150  * @param[in] dev
1151  *   Pointer to the rte_eth_dev structure.
1152  * @param[in] attr
1153  *   Attributes of flow to determine steering domain.
1154  * @param[out] error
1155  *   Pointer to the error structure.
1156  *
1157  * @return
1158  *   positive index on success, a negative errno value otherwise
1159  *   and rte_errno is set.
1160  */
1161 static enum modify_reg
1162 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1163                          const struct rte_flow_attr *attr,
1164                          struct rte_flow_error *error)
1165 {
1166         int reg =
1167                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1168                                           MLX5_METADATA_FDB :
1169                                             attr->egress ?
1170                                             MLX5_METADATA_TX :
1171                                             MLX5_METADATA_RX, 0, error);
1172         if (reg < 0)
1173                 return rte_flow_error_set(error,
1174                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1175                                           NULL, "unavailable "
1176                                           "metadata register");
1177         return reg;
1178 }
1179
1180 /**
1181  * Convert SET_META action to DV specification.
1182  *
1183  * @param[in] dev
1184  *   Pointer to the rte_eth_dev structure.
1185  * @param[in,out] resource
1186  *   Pointer to the modify-header resource.
1187  * @param[in] attr
1188  *   Attributes of flow that includes this item.
1189  * @param[in] conf
1190  *   Pointer to action specification.
1191  * @param[out] error
1192  *   Pointer to the error structure.
1193  *
1194  * @return
1195  *   0 on success, a negative errno value otherwise and rte_errno is set.
1196  */
1197 static int
1198 flow_dv_convert_action_set_meta
1199                         (struct rte_eth_dev *dev,
1200                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1201                          const struct rte_flow_attr *attr,
1202                          const struct rte_flow_action_set_meta *conf,
1203                          struct rte_flow_error *error)
1204 {
1205         uint32_t data = conf->data;
1206         uint32_t mask = conf->mask;
1207         struct rte_flow_item item = {
1208                 .spec = &data,
1209                 .mask = &mask,
1210         };
1211         struct field_modify_info reg_c_x[] = {
1212                 [1] = {0, 0, 0},
1213         };
1214         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1215
1216         if (reg < 0)
1217                 return reg;
1218         /*
1219          * In datapath code there is no endianness
1220          * coversions for perfromance reasons, all
1221          * pattern conversions are done in rte_flow.
1222          */
1223         if (reg == REG_C_0) {
1224                 struct mlx5_priv *priv = dev->data->dev_private;
1225                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1226                 uint32_t shl_c0;
1227
1228                 MLX5_ASSERT(msk_c0);
1229 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1230                 shl_c0 = rte_bsf32(msk_c0);
1231 #else
1232                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1233 #endif
1234                 mask <<= shl_c0;
1235                 data <<= shl_c0;
1236                 MLX5_ASSERT(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1237         }
1238         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1239         /* The routine expects parameters in memory as big-endian ones. */
1240         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1241                                              MLX5_MODIFICATION_TYPE_SET, error);
1242 }
1243
1244 /**
1245  * Convert modify-header set IPv4 DSCP action to DV specification.
1246  *
1247  * @param[in,out] resource
1248  *   Pointer to the modify-header resource.
1249  * @param[in] action
1250  *   Pointer to action specification.
1251  * @param[out] error
1252  *   Pointer to the error structure.
1253  *
1254  * @return
1255  *   0 on success, a negative errno value otherwise and rte_errno is set.
1256  */
1257 static int
1258 flow_dv_convert_action_modify_ipv4_dscp
1259                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1260                          const struct rte_flow_action *action,
1261                          struct rte_flow_error *error)
1262 {
1263         const struct rte_flow_action_set_dscp *conf =
1264                 (const struct rte_flow_action_set_dscp *)(action->conf);
1265         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1266         struct rte_flow_item_ipv4 ipv4;
1267         struct rte_flow_item_ipv4 ipv4_mask;
1268
1269         memset(&ipv4, 0, sizeof(ipv4));
1270         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1271         ipv4.hdr.type_of_service = conf->dscp;
1272         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1273         item.spec = &ipv4;
1274         item.mask = &ipv4_mask;
1275         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1276                                              MLX5_MODIFICATION_TYPE_SET, error);
1277 }
1278
1279 /**
1280  * Convert modify-header set IPv6 DSCP action to DV specification.
1281  *
1282  * @param[in,out] resource
1283  *   Pointer to the modify-header resource.
1284  * @param[in] action
1285  *   Pointer to action specification.
1286  * @param[out] error
1287  *   Pointer to the error structure.
1288  *
1289  * @return
1290  *   0 on success, a negative errno value otherwise and rte_errno is set.
1291  */
1292 static int
1293 flow_dv_convert_action_modify_ipv6_dscp
1294                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1295                          const struct rte_flow_action *action,
1296                          struct rte_flow_error *error)
1297 {
1298         const struct rte_flow_action_set_dscp *conf =
1299                 (const struct rte_flow_action_set_dscp *)(action->conf);
1300         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1301         struct rte_flow_item_ipv6 ipv6;
1302         struct rte_flow_item_ipv6 ipv6_mask;
1303
1304         memset(&ipv6, 0, sizeof(ipv6));
1305         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1306         /*
1307          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1308          * rdma-core only accept the DSCP bits byte aligned start from
1309          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1310          * bits in IPv6 case as rdma-core requires byte aligned value.
1311          */
1312         ipv6.hdr.vtc_flow = conf->dscp;
1313         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1314         item.spec = &ipv6;
1315         item.mask = &ipv6_mask;
1316         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1317                                              MLX5_MODIFICATION_TYPE_SET, error);
1318 }
1319
1320 /**
1321  * Validate MARK item.
1322  *
1323  * @param[in] dev
1324  *   Pointer to the rte_eth_dev structure.
1325  * @param[in] item
1326  *   Item specification.
1327  * @param[in] attr
1328  *   Attributes of flow that includes this item.
1329  * @param[out] error
1330  *   Pointer to error structure.
1331  *
1332  * @return
1333  *   0 on success, a negative errno value otherwise and rte_errno is set.
1334  */
1335 static int
1336 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1337                            const struct rte_flow_item *item,
1338                            const struct rte_flow_attr *attr __rte_unused,
1339                            struct rte_flow_error *error)
1340 {
1341         struct mlx5_priv *priv = dev->data->dev_private;
1342         struct mlx5_dev_config *config = &priv->config;
1343         const struct rte_flow_item_mark *spec = item->spec;
1344         const struct rte_flow_item_mark *mask = item->mask;
1345         const struct rte_flow_item_mark nic_mask = {
1346                 .id = priv->sh->dv_mark_mask,
1347         };
1348         int ret;
1349
1350         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1351                 return rte_flow_error_set(error, ENOTSUP,
1352                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1353                                           "extended metadata feature"
1354                                           " isn't enabled");
1355         if (!mlx5_flow_ext_mreg_supported(dev))
1356                 return rte_flow_error_set(error, ENOTSUP,
1357                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1358                                           "extended metadata register"
1359                                           " isn't supported");
1360         if (!nic_mask.id)
1361                 return rte_flow_error_set(error, ENOTSUP,
1362                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1363                                           "extended metadata register"
1364                                           " isn't available");
1365         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1366         if (ret < 0)
1367                 return ret;
1368         if (!spec)
1369                 return rte_flow_error_set(error, EINVAL,
1370                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1371                                           item->spec,
1372                                           "data cannot be empty");
1373         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1374                 return rte_flow_error_set(error, EINVAL,
1375                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1376                                           &spec->id,
1377                                           "mark id exceeds the limit");
1378         if (!mask)
1379                 mask = &nic_mask;
1380         if (!mask->id)
1381                 return rte_flow_error_set(error, EINVAL,
1382                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1383                                         "mask cannot be zero");
1384
1385         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1386                                         (const uint8_t *)&nic_mask,
1387                                         sizeof(struct rte_flow_item_mark),
1388                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1389         if (ret < 0)
1390                 return ret;
1391         return 0;
1392 }
1393
1394 /**
1395  * Validate META item.
1396  *
1397  * @param[in] dev
1398  *   Pointer to the rte_eth_dev structure.
1399  * @param[in] item
1400  *   Item specification.
1401  * @param[in] attr
1402  *   Attributes of flow that includes this item.
1403  * @param[out] error
1404  *   Pointer to error structure.
1405  *
1406  * @return
1407  *   0 on success, a negative errno value otherwise and rte_errno is set.
1408  */
1409 static int
1410 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1411                            const struct rte_flow_item *item,
1412                            const struct rte_flow_attr *attr,
1413                            struct rte_flow_error *error)
1414 {
1415         struct mlx5_priv *priv = dev->data->dev_private;
1416         struct mlx5_dev_config *config = &priv->config;
1417         const struct rte_flow_item_meta *spec = item->spec;
1418         const struct rte_flow_item_meta *mask = item->mask;
1419         struct rte_flow_item_meta nic_mask = {
1420                 .data = UINT32_MAX
1421         };
1422         int reg;
1423         int ret;
1424
1425         if (!spec)
1426                 return rte_flow_error_set(error, EINVAL,
1427                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1428                                           item->spec,
1429                                           "data cannot be empty");
1430         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1431                 if (!mlx5_flow_ext_mreg_supported(dev))
1432                         return rte_flow_error_set(error, ENOTSUP,
1433                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1434                                           "extended metadata register"
1435                                           " isn't supported");
1436                 reg = flow_dv_get_metadata_reg(dev, attr, error);
1437                 if (reg < 0)
1438                         return reg;
1439                 if (reg == REG_B)
1440                         return rte_flow_error_set(error, ENOTSUP,
1441                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1442                                           "match on reg_b "
1443                                           "isn't supported");
1444                 if (reg != REG_A)
1445                         nic_mask.data = priv->sh->dv_meta_mask;
1446         } else if (attr->transfer) {
1447                 return rte_flow_error_set(error, ENOTSUP,
1448                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
1449                                         "extended metadata feature "
1450                                         "should be enabled when "
1451                                         "meta item is requested "
1452                                         "with e-switch mode ");
1453         }
1454         if (!mask)
1455                 mask = &rte_flow_item_meta_mask;
1456         if (!mask->data)
1457                 return rte_flow_error_set(error, EINVAL,
1458                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1459                                         "mask cannot be zero");
1460
1461         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1462                                         (const uint8_t *)&nic_mask,
1463                                         sizeof(struct rte_flow_item_meta),
1464                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1465         return ret;
1466 }
1467
1468 /**
1469  * Validate TAG item.
1470  *
1471  * @param[in] dev
1472  *   Pointer to the rte_eth_dev structure.
1473  * @param[in] item
1474  *   Item specification.
1475  * @param[in] attr
1476  *   Attributes of flow that includes this item.
1477  * @param[out] error
1478  *   Pointer to error structure.
1479  *
1480  * @return
1481  *   0 on success, a negative errno value otherwise and rte_errno is set.
1482  */
1483 static int
1484 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
1485                           const struct rte_flow_item *item,
1486                           const struct rte_flow_attr *attr __rte_unused,
1487                           struct rte_flow_error *error)
1488 {
1489         const struct rte_flow_item_tag *spec = item->spec;
1490         const struct rte_flow_item_tag *mask = item->mask;
1491         const struct rte_flow_item_tag nic_mask = {
1492                 .data = RTE_BE32(UINT32_MAX),
1493                 .index = 0xff,
1494         };
1495         int ret;
1496
1497         if (!mlx5_flow_ext_mreg_supported(dev))
1498                 return rte_flow_error_set(error, ENOTSUP,
1499                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1500                                           "extensive metadata register"
1501                                           " isn't supported");
1502         if (!spec)
1503                 return rte_flow_error_set(error, EINVAL,
1504                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1505                                           item->spec,
1506                                           "data cannot be empty");
1507         if (!mask)
1508                 mask = &rte_flow_item_tag_mask;
1509         if (!mask->data)
1510                 return rte_flow_error_set(error, EINVAL,
1511                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1512                                         "mask cannot be zero");
1513
1514         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1515                                         (const uint8_t *)&nic_mask,
1516                                         sizeof(struct rte_flow_item_tag),
1517                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1518         if (ret < 0)
1519                 return ret;
1520         if (mask->index != 0xff)
1521                 return rte_flow_error_set(error, EINVAL,
1522                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1523                                           "partial mask for tag index"
1524                                           " is not supported");
1525         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
1526         if (ret < 0)
1527                 return ret;
1528         MLX5_ASSERT(ret != REG_NON);
1529         return 0;
1530 }
1531
1532 /**
1533  * Validate vport item.
1534  *
1535  * @param[in] dev
1536  *   Pointer to the rte_eth_dev structure.
1537  * @param[in] item
1538  *   Item specification.
1539  * @param[in] attr
1540  *   Attributes of flow that includes this item.
1541  * @param[in] item_flags
1542  *   Bit-fields that holds the items detected until now.
1543  * @param[out] error
1544  *   Pointer to error structure.
1545  *
1546  * @return
1547  *   0 on success, a negative errno value otherwise and rte_errno is set.
1548  */
1549 static int
1550 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
1551                               const struct rte_flow_item *item,
1552                               const struct rte_flow_attr *attr,
1553                               uint64_t item_flags,
1554                               struct rte_flow_error *error)
1555 {
1556         const struct rte_flow_item_port_id *spec = item->spec;
1557         const struct rte_flow_item_port_id *mask = item->mask;
1558         const struct rte_flow_item_port_id switch_mask = {
1559                         .id = 0xffffffff,
1560         };
1561         struct mlx5_priv *esw_priv;
1562         struct mlx5_priv *dev_priv;
1563         int ret;
1564
1565         if (!attr->transfer)
1566                 return rte_flow_error_set(error, EINVAL,
1567                                           RTE_FLOW_ERROR_TYPE_ITEM,
1568                                           NULL,
1569                                           "match on port id is valid only"
1570                                           " when transfer flag is enabled");
1571         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
1572                 return rte_flow_error_set(error, ENOTSUP,
1573                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1574                                           "multiple source ports are not"
1575                                           " supported");
1576         if (!mask)
1577                 mask = &switch_mask;
1578         if (mask->id != 0xffffffff)
1579                 return rte_flow_error_set(error, ENOTSUP,
1580                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1581                                            mask,
1582                                            "no support for partial mask on"
1583                                            " \"id\" field");
1584         ret = mlx5_flow_item_acceptable
1585                                 (item, (const uint8_t *)mask,
1586                                  (const uint8_t *)&rte_flow_item_port_id_mask,
1587                                  sizeof(struct rte_flow_item_port_id),
1588                                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1589         if (ret)
1590                 return ret;
1591         if (!spec)
1592                 return 0;
1593         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
1594         if (!esw_priv)
1595                 return rte_flow_error_set(error, rte_errno,
1596                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1597                                           "failed to obtain E-Switch info for"
1598                                           " port");
1599         dev_priv = mlx5_dev_to_eswitch_info(dev);
1600         if (!dev_priv)
1601                 return rte_flow_error_set(error, rte_errno,
1602                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1603                                           NULL,
1604                                           "failed to obtain E-Switch info");
1605         if (esw_priv->domain_id != dev_priv->domain_id)
1606                 return rte_flow_error_set(error, EINVAL,
1607                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1608                                           "cannot match on a port from a"
1609                                           " different E-Switch");
1610         return 0;
1611 }
1612
1613 /**
1614  * Validate VLAN item.
1615  *
1616  * @param[in] item
1617  *   Item specification.
1618  * @param[in] item_flags
1619  *   Bit-fields that holds the items detected until now.
1620  * @param[in] dev
1621  *   Ethernet device flow is being created on.
1622  * @param[out] error
1623  *   Pointer to error structure.
1624  *
1625  * @return
1626  *   0 on success, a negative errno value otherwise and rte_errno is set.
1627  */
1628 static int
1629 flow_dv_validate_item_vlan(const struct rte_flow_item *item,
1630                            uint64_t item_flags,
1631                            struct rte_eth_dev *dev,
1632                            struct rte_flow_error *error)
1633 {
1634         const struct rte_flow_item_vlan *mask = item->mask;
1635         const struct rte_flow_item_vlan nic_mask = {
1636                 .tci = RTE_BE16(UINT16_MAX),
1637                 .inner_type = RTE_BE16(UINT16_MAX),
1638                 .has_more_vlan = 1,
1639         };
1640         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1641         int ret;
1642         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1643                                         MLX5_FLOW_LAYER_INNER_L4) :
1644                                        (MLX5_FLOW_LAYER_OUTER_L3 |
1645                                         MLX5_FLOW_LAYER_OUTER_L4);
1646         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1647                                         MLX5_FLOW_LAYER_OUTER_VLAN;
1648
1649         if (item_flags & vlanm)
1650                 return rte_flow_error_set(error, EINVAL,
1651                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1652                                           "multiple VLAN layers not supported");
1653         else if ((item_flags & l34m) != 0)
1654                 return rte_flow_error_set(error, EINVAL,
1655                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1656                                           "VLAN cannot follow L3/L4 layer");
1657         if (!mask)
1658                 mask = &rte_flow_item_vlan_mask;
1659         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1660                                         (const uint8_t *)&nic_mask,
1661                                         sizeof(struct rte_flow_item_vlan),
1662                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1663         if (ret)
1664                 return ret;
1665         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
1666                 struct mlx5_priv *priv = dev->data->dev_private;
1667
1668                 if (priv->vmwa_context) {
1669                         /*
1670                          * Non-NULL context means we have a virtual machine
1671                          * and SR-IOV enabled, we have to create VLAN interface
1672                          * to make hypervisor to setup E-Switch vport
1673                          * context correctly. We avoid creating the multiple
1674                          * VLAN interfaces, so we cannot support VLAN tag mask.
1675                          */
1676                         return rte_flow_error_set(error, EINVAL,
1677                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1678                                                   item,
1679                                                   "VLAN tag mask is not"
1680                                                   " supported in virtual"
1681                                                   " environment");
1682                 }
1683         }
1684         return 0;
1685 }
1686
1687 /*
1688  * GTP flags are contained in 1 byte of the format:
1689  * -------------------------------------------
1690  * | bit   | 0 - 2   | 3  | 4   | 5 | 6 | 7  |
1691  * |-----------------------------------------|
1692  * | value | Version | PT | Res | E | S | PN |
1693  * -------------------------------------------
1694  *
1695  * Matching is supported only for GTP flags E, S, PN.
1696  */
1697 #define MLX5_GTP_FLAGS_MASK     0x07
1698
1699 /**
1700  * Validate GTP item.
1701  *
1702  * @param[in] dev
1703  *   Pointer to the rte_eth_dev structure.
1704  * @param[in] item
1705  *   Item specification.
1706  * @param[in] item_flags
1707  *   Bit-fields that holds the items detected until now.
1708  * @param[out] error
1709  *   Pointer to error structure.
1710  *
1711  * @return
1712  *   0 on success, a negative errno value otherwise and rte_errno is set.
1713  */
1714 static int
1715 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
1716                           const struct rte_flow_item *item,
1717                           uint64_t item_flags,
1718                           struct rte_flow_error *error)
1719 {
1720         struct mlx5_priv *priv = dev->data->dev_private;
1721         const struct rte_flow_item_gtp *spec = item->spec;
1722         const struct rte_flow_item_gtp *mask = item->mask;
1723         const struct rte_flow_item_gtp nic_mask = {
1724                 .v_pt_rsv_flags = MLX5_GTP_FLAGS_MASK,
1725                 .msg_type = 0xff,
1726                 .teid = RTE_BE32(0xffffffff),
1727         };
1728
1729         if (!priv->config.hca_attr.tunnel_stateless_gtp)
1730                 return rte_flow_error_set(error, ENOTSUP,
1731                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1732                                           "GTP support is not enabled");
1733         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1734                 return rte_flow_error_set(error, ENOTSUP,
1735                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1736                                           "multiple tunnel layers not"
1737                                           " supported");
1738         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1739                 return rte_flow_error_set(error, EINVAL,
1740                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1741                                           "no outer UDP layer found");
1742         if (!mask)
1743                 mask = &rte_flow_item_gtp_mask;
1744         if (spec && spec->v_pt_rsv_flags & ~MLX5_GTP_FLAGS_MASK)
1745                 return rte_flow_error_set(error, ENOTSUP,
1746                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1747                                           "Match is supported for GTP"
1748                                           " flags only");
1749         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1750                                          (const uint8_t *)&nic_mask,
1751                                          sizeof(struct rte_flow_item_gtp),
1752                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1753 }
1754
1755 /**
1756  * Validate IPV4 item.
1757  * Use existing validation function mlx5_flow_validate_item_ipv4(), and
1758  * add specific validation of fragment_offset field,
1759  *
1760  * @param[in] item
1761  *   Item specification.
1762  * @param[in] item_flags
1763  *   Bit-fields that holds the items detected until now.
1764  * @param[out] error
1765  *   Pointer to error structure.
1766  *
1767  * @return
1768  *   0 on success, a negative errno value otherwise and rte_errno is set.
1769  */
1770 static int
1771 flow_dv_validate_item_ipv4(const struct rte_flow_item *item,
1772                            uint64_t item_flags,
1773                            uint64_t last_item,
1774                            uint16_t ether_type,
1775                            struct rte_flow_error *error)
1776 {
1777         int ret;
1778         const struct rte_flow_item_ipv4 *spec = item->spec;
1779         const struct rte_flow_item_ipv4 *last = item->last;
1780         const struct rte_flow_item_ipv4 *mask = item->mask;
1781         rte_be16_t fragment_offset_spec = 0;
1782         rte_be16_t fragment_offset_last = 0;
1783         const struct rte_flow_item_ipv4 nic_ipv4_mask = {
1784                 .hdr = {
1785                         .src_addr = RTE_BE32(0xffffffff),
1786                         .dst_addr = RTE_BE32(0xffffffff),
1787                         .type_of_service = 0xff,
1788                         .fragment_offset = RTE_BE16(0xffff),
1789                         .next_proto_id = 0xff,
1790                         .time_to_live = 0xff,
1791                 },
1792         };
1793
1794         ret = mlx5_flow_validate_item_ipv4(item, item_flags, last_item,
1795                                            ether_type, &nic_ipv4_mask,
1796                                            MLX5_ITEM_RANGE_ACCEPTED, error);
1797         if (ret < 0)
1798                 return ret;
1799         if (spec && mask)
1800                 fragment_offset_spec = spec->hdr.fragment_offset &
1801                                        mask->hdr.fragment_offset;
1802         if (!fragment_offset_spec)
1803                 return 0;
1804         /*
1805          * spec and mask are valid, enforce using full mask to make sure the
1806          * complete value is used correctly.
1807          */
1808         if ((mask->hdr.fragment_offset & RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
1809                         != RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
1810                 return rte_flow_error_set(error, EINVAL,
1811                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1812                                           item, "must use full mask for"
1813                                           " fragment_offset");
1814         /*
1815          * Match on fragment_offset 0x2000 means MF is 1 and frag-offset is 0,
1816          * indicating this is 1st fragment of fragmented packet.
1817          * This is not yet supported in MLX5, return appropriate error message.
1818          */
1819         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG))
1820                 return rte_flow_error_set(error, ENOTSUP,
1821                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1822                                           "match on first fragment not "
1823                                           "supported");
1824         if (fragment_offset_spec && !last)
1825                 return rte_flow_error_set(error, ENOTSUP,
1826                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1827                                           "specified value not supported");
1828         /* spec and last are valid, validate the specified range. */
1829         fragment_offset_last = last->hdr.fragment_offset &
1830                                mask->hdr.fragment_offset;
1831         /*
1832          * Match on fragment_offset spec 0x2001 and last 0x3fff
1833          * means MF is 1 and frag-offset is > 0.
1834          * This packet is fragment 2nd and onward, excluding last.
1835          * This is not yet supported in MLX5, return appropriate
1836          * error message.
1837          */
1838         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG + 1) &&
1839             fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
1840                 return rte_flow_error_set(error, ENOTSUP,
1841                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
1842                                           last, "match on following "
1843                                           "fragments not supported");
1844         /*
1845          * Match on fragment_offset spec 0x0001 and last 0x1fff
1846          * means MF is 0 and frag-offset is > 0.
1847          * This packet is last fragment of fragmented packet.
1848          * This is not yet supported in MLX5, return appropriate
1849          * error message.
1850          */
1851         if (fragment_offset_spec == RTE_BE16(1) &&
1852             fragment_offset_last == RTE_BE16(RTE_IPV4_HDR_OFFSET_MASK))
1853                 return rte_flow_error_set(error, ENOTSUP,
1854                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
1855                                           last, "match on last "
1856                                           "fragment not supported");
1857         /*
1858          * Match on fragment_offset spec 0x0001 and last 0x3fff
1859          * means MF and/or frag-offset is not 0.
1860          * This is a fragmented packet.
1861          * Other range values are invalid and rejected.
1862          */
1863         if (!(fragment_offset_spec == RTE_BE16(1) &&
1864               fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK)))
1865                 return rte_flow_error_set(error, ENOTSUP,
1866                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
1867                                           "specified range not supported");
1868         return 0;
1869 }
1870
1871 /**
1872  * Validate IPV6 fragment extension item.
1873  *
1874  * @param[in] item
1875  *   Item specification.
1876  * @param[in] item_flags
1877  *   Bit-fields that holds the items detected until now.
1878  * @param[out] error
1879  *   Pointer to error structure.
1880  *
1881  * @return
1882  *   0 on success, a negative errno value otherwise and rte_errno is set.
1883  */
1884 static int
1885 flow_dv_validate_item_ipv6_frag_ext(const struct rte_flow_item *item,
1886                                     uint64_t item_flags,
1887                                     struct rte_flow_error *error)
1888 {
1889         const struct rte_flow_item_ipv6_frag_ext *spec = item->spec;
1890         const struct rte_flow_item_ipv6_frag_ext *last = item->last;
1891         const struct rte_flow_item_ipv6_frag_ext *mask = item->mask;
1892         rte_be16_t frag_data_spec = 0;
1893         rte_be16_t frag_data_last = 0;
1894         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1895         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1896                                       MLX5_FLOW_LAYER_OUTER_L4;
1897         int ret = 0;
1898         struct rte_flow_item_ipv6_frag_ext nic_mask = {
1899                 .hdr = {
1900                         .next_header = 0xff,
1901                         .frag_data = RTE_BE16(0xffff),
1902                 },
1903         };
1904
1905         if (item_flags & l4m)
1906                 return rte_flow_error_set(error, EINVAL,
1907                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1908                                           "ipv6 fragment extension item cannot "
1909                                           "follow L4 item.");
1910         if ((tunnel && !(item_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
1911             (!tunnel && !(item_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV6)))
1912                 return rte_flow_error_set(error, EINVAL,
1913                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1914                                           "ipv6 fragment extension item must "
1915                                           "follow ipv6 item");
1916         if (spec && mask)
1917                 frag_data_spec = spec->hdr.frag_data & mask->hdr.frag_data;
1918         if (!frag_data_spec)
1919                 return 0;
1920         /*
1921          * spec and mask are valid, enforce using full mask to make sure the
1922          * complete value is used correctly.
1923          */
1924         if ((mask->hdr.frag_data & RTE_BE16(RTE_IPV6_FRAG_USED_MASK)) !=
1925                                 RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
1926                 return rte_flow_error_set(error, EINVAL,
1927                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1928                                           item, "must use full mask for"
1929                                           " frag_data");
1930         /*
1931          * Match on frag_data 0x00001 means M is 1 and frag-offset is 0.
1932          * This is 1st fragment of fragmented packet.
1933          */
1934         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_MF_MASK))
1935                 return rte_flow_error_set(error, ENOTSUP,
1936                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1937                                           "match on first fragment not "
1938                                           "supported");
1939         if (frag_data_spec && !last)
1940                 return rte_flow_error_set(error, EINVAL,
1941                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1942                                           "specified value not supported");
1943         ret = mlx5_flow_item_acceptable
1944                                 (item, (const uint8_t *)mask,
1945                                  (const uint8_t *)&nic_mask,
1946                                  sizeof(struct rte_flow_item_ipv6_frag_ext),
1947                                  MLX5_ITEM_RANGE_ACCEPTED, error);
1948         if (ret)
1949                 return ret;
1950         /* spec and last are valid, validate the specified range. */
1951         frag_data_last = last->hdr.frag_data & mask->hdr.frag_data;
1952         /*
1953          * Match on frag_data spec 0x0009 and last 0xfff9
1954          * means M is 1 and frag-offset is > 0.
1955          * This packet is fragment 2nd and onward, excluding last.
1956          * This is not yet supported in MLX5, return appropriate
1957          * error message.
1958          */
1959         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN |
1960                                        RTE_IPV6_EHDR_MF_MASK) &&
1961             frag_data_last == RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
1962                 return rte_flow_error_set(error, ENOTSUP,
1963                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
1964                                           last, "match on following "
1965                                           "fragments not supported");
1966         /*
1967          * Match on frag_data spec 0x0008 and last 0xfff8
1968          * means M is 0 and frag-offset is > 0.
1969          * This packet is last fragment of fragmented packet.
1970          * This is not yet supported in MLX5, return appropriate
1971          * error message.
1972          */
1973         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN) &&
1974             frag_data_last == RTE_BE16(RTE_IPV6_EHDR_FO_MASK))
1975                 return rte_flow_error_set(error, ENOTSUP,
1976                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
1977                                           last, "match on last "
1978                                           "fragment not supported");
1979         /* Other range values are invalid and rejected. */
1980         return rte_flow_error_set(error, EINVAL,
1981                                   RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
1982                                   "specified range not supported");
1983 }
1984
1985 /**
1986  * Validate the pop VLAN action.
1987  *
1988  * @param[in] dev
1989  *   Pointer to the rte_eth_dev structure.
1990  * @param[in] action_flags
1991  *   Holds the actions detected until now.
1992  * @param[in] action
1993  *   Pointer to the pop vlan action.
1994  * @param[in] item_flags
1995  *   The items found in this flow rule.
1996  * @param[in] attr
1997  *   Pointer to flow attributes.
1998  * @param[out] error
1999  *   Pointer to error structure.
2000  *
2001  * @return
2002  *   0 on success, a negative errno value otherwise and rte_errno is set.
2003  */
2004 static int
2005 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
2006                                  uint64_t action_flags,
2007                                  const struct rte_flow_action *action,
2008                                  uint64_t item_flags,
2009                                  const struct rte_flow_attr *attr,
2010                                  struct rte_flow_error *error)
2011 {
2012         const struct mlx5_priv *priv = dev->data->dev_private;
2013
2014         (void)action;
2015         (void)attr;
2016         if (!priv->sh->pop_vlan_action)
2017                 return rte_flow_error_set(error, ENOTSUP,
2018                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2019                                           NULL,
2020                                           "pop vlan action is not supported");
2021         if (attr->egress)
2022                 return rte_flow_error_set(error, ENOTSUP,
2023                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2024                                           NULL,
2025                                           "pop vlan action not supported for "
2026                                           "egress");
2027         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
2028                 return rte_flow_error_set(error, ENOTSUP,
2029                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2030                                           "no support for multiple VLAN "
2031                                           "actions");
2032         /* Pop VLAN with preceding Decap requires inner header with VLAN. */
2033         if ((action_flags & MLX5_FLOW_ACTION_DECAP) &&
2034             !(item_flags & MLX5_FLOW_LAYER_INNER_VLAN))
2035                 return rte_flow_error_set(error, ENOTSUP,
2036                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2037                                           NULL,
2038                                           "cannot pop vlan after decap without "
2039                                           "match on inner vlan in the flow");
2040         /* Pop VLAN without preceding Decap requires outer header with VLAN. */
2041         if (!(action_flags & MLX5_FLOW_ACTION_DECAP) &&
2042             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2043                 return rte_flow_error_set(error, ENOTSUP,
2044                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2045                                           NULL,
2046                                           "cannot pop vlan without a "
2047                                           "match on (outer) vlan in the flow");
2048         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2049                 return rte_flow_error_set(error, EINVAL,
2050                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2051                                           "wrong action order, port_id should "
2052                                           "be after pop VLAN action");
2053         if (!attr->transfer && priv->representor)
2054                 return rte_flow_error_set(error, ENOTSUP,
2055                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2056                                           "pop vlan action for VF representor "
2057                                           "not supported on NIC table");
2058         return 0;
2059 }
2060
2061 /**
2062  * Get VLAN default info from vlan match info.
2063  *
2064  * @param[in] items
2065  *   the list of item specifications.
2066  * @param[out] vlan
2067  *   pointer VLAN info to fill to.
2068  *
2069  * @return
2070  *   0 on success, a negative errno value otherwise and rte_errno is set.
2071  */
2072 static void
2073 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
2074                                   struct rte_vlan_hdr *vlan)
2075 {
2076         const struct rte_flow_item_vlan nic_mask = {
2077                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
2078                                 MLX5DV_FLOW_VLAN_VID_MASK),
2079                 .inner_type = RTE_BE16(0xffff),
2080         };
2081
2082         if (items == NULL)
2083                 return;
2084         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2085                 int type = items->type;
2086
2087                 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
2088                     type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
2089                         break;
2090         }
2091         if (items->type != RTE_FLOW_ITEM_TYPE_END) {
2092                 const struct rte_flow_item_vlan *vlan_m = items->mask;
2093                 const struct rte_flow_item_vlan *vlan_v = items->spec;
2094
2095                 /* If VLAN item in pattern doesn't contain data, return here. */
2096                 if (!vlan_v)
2097                         return;
2098                 if (!vlan_m)
2099                         vlan_m = &nic_mask;
2100                 /* Only full match values are accepted */
2101                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
2102                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
2103                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
2104                         vlan->vlan_tci |=
2105                                 rte_be_to_cpu_16(vlan_v->tci &
2106                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
2107                 }
2108                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
2109                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
2110                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
2111                         vlan->vlan_tci |=
2112                                 rte_be_to_cpu_16(vlan_v->tci &
2113                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
2114                 }
2115                 if (vlan_m->inner_type == nic_mask.inner_type)
2116                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
2117                                                            vlan_m->inner_type);
2118         }
2119 }
2120
2121 /**
2122  * Validate the push VLAN action.
2123  *
2124  * @param[in] dev
2125  *   Pointer to the rte_eth_dev structure.
2126  * @param[in] action_flags
2127  *   Holds the actions detected until now.
2128  * @param[in] item_flags
2129  *   The items found in this flow rule.
2130  * @param[in] action
2131  *   Pointer to the action structure.
2132  * @param[in] attr
2133  *   Pointer to flow attributes
2134  * @param[out] error
2135  *   Pointer to error structure.
2136  *
2137  * @return
2138  *   0 on success, a negative errno value otherwise and rte_errno is set.
2139  */
2140 static int
2141 flow_dv_validate_action_push_vlan(struct rte_eth_dev *dev,
2142                                   uint64_t action_flags,
2143                                   const struct rte_flow_item_vlan *vlan_m,
2144                                   const struct rte_flow_action *action,
2145                                   const struct rte_flow_attr *attr,
2146                                   struct rte_flow_error *error)
2147 {
2148         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
2149         const struct mlx5_priv *priv = dev->data->dev_private;
2150
2151         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
2152             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
2153                 return rte_flow_error_set(error, EINVAL,
2154                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2155                                           "invalid vlan ethertype");
2156         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2157                 return rte_flow_error_set(error, EINVAL,
2158                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2159                                           "wrong action order, port_id should "
2160                                           "be after push VLAN");
2161         if (!attr->transfer && priv->representor)
2162                 return rte_flow_error_set(error, ENOTSUP,
2163                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2164                                           "push vlan action for VF representor "
2165                                           "not supported on NIC table");
2166         if (vlan_m &&
2167             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) &&
2168             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) !=
2169                 MLX5DV_FLOW_VLAN_PCP_MASK_BE &&
2170             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP) &&
2171             !(mlx5_flow_find_action
2172                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP)))
2173                 return rte_flow_error_set(error, EINVAL,
2174                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2175                                           "not full match mask on VLAN PCP and "
2176                                           "there is no of_set_vlan_pcp action, "
2177                                           "push VLAN action cannot figure out "
2178                                           "PCP value");
2179         if (vlan_m &&
2180             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) &&
2181             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) !=
2182                 MLX5DV_FLOW_VLAN_VID_MASK_BE &&
2183             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID) &&
2184             !(mlx5_flow_find_action
2185                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID)))
2186                 return rte_flow_error_set(error, EINVAL,
2187                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2188                                           "not full match mask on VLAN VID and "
2189                                           "there is no of_set_vlan_vid action, "
2190                                           "push VLAN action cannot figure out "
2191                                           "VID value");
2192         (void)attr;
2193         return 0;
2194 }
2195
2196 /**
2197  * Validate the set VLAN PCP.
2198  *
2199  * @param[in] action_flags
2200  *   Holds the actions detected until now.
2201  * @param[in] actions
2202  *   Pointer to the list of actions remaining in the flow rule.
2203  * @param[out] error
2204  *   Pointer to error structure.
2205  *
2206  * @return
2207  *   0 on success, a negative errno value otherwise and rte_errno is set.
2208  */
2209 static int
2210 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
2211                                      const struct rte_flow_action actions[],
2212                                      struct rte_flow_error *error)
2213 {
2214         const struct rte_flow_action *action = actions;
2215         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
2216
2217         if (conf->vlan_pcp > 7)
2218                 return rte_flow_error_set(error, EINVAL,
2219                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2220                                           "VLAN PCP value is too big");
2221         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
2222                 return rte_flow_error_set(error, ENOTSUP,
2223                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2224                                           "set VLAN PCP action must follow "
2225                                           "the push VLAN action");
2226         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
2227                 return rte_flow_error_set(error, ENOTSUP,
2228                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2229                                           "Multiple VLAN PCP modification are "
2230                                           "not supported");
2231         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2232                 return rte_flow_error_set(error, EINVAL,
2233                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2234                                           "wrong action order, port_id should "
2235                                           "be after set VLAN PCP");
2236         return 0;
2237 }
2238
2239 /**
2240  * Validate the set VLAN VID.
2241  *
2242  * @param[in] item_flags
2243  *   Holds the items detected in this rule.
2244  * @param[in] action_flags
2245  *   Holds the actions detected until now.
2246  * @param[in] actions
2247  *   Pointer to the list of actions remaining in the flow rule.
2248  * @param[out] error
2249  *   Pointer to error structure.
2250  *
2251  * @return
2252  *   0 on success, a negative errno value otherwise and rte_errno is set.
2253  */
2254 static int
2255 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
2256                                      uint64_t action_flags,
2257                                      const struct rte_flow_action actions[],
2258                                      struct rte_flow_error *error)
2259 {
2260         const struct rte_flow_action *action = actions;
2261         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
2262
2263         if (rte_be_to_cpu_16(conf->vlan_vid) > 0xFFE)
2264                 return rte_flow_error_set(error, EINVAL,
2265                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2266                                           "VLAN VID value is too big");
2267         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
2268             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2269                 return rte_flow_error_set(error, ENOTSUP,
2270                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2271                                           "set VLAN VID action must follow push"
2272                                           " VLAN action or match on VLAN item");
2273         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
2274                 return rte_flow_error_set(error, ENOTSUP,
2275                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2276                                           "Multiple VLAN VID modifications are "
2277                                           "not supported");
2278         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2279                 return rte_flow_error_set(error, EINVAL,
2280                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2281                                           "wrong action order, port_id should "
2282                                           "be after set VLAN VID");
2283         return 0;
2284 }
2285
2286 /*
2287  * Validate the FLAG action.
2288  *
2289  * @param[in] dev
2290  *   Pointer to the rte_eth_dev structure.
2291  * @param[in] action_flags
2292  *   Holds the actions detected until now.
2293  * @param[in] attr
2294  *   Pointer to flow attributes
2295  * @param[out] error
2296  *   Pointer to error structure.
2297  *
2298  * @return
2299  *   0 on success, a negative errno value otherwise and rte_errno is set.
2300  */
2301 static int
2302 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
2303                              uint64_t action_flags,
2304                              const struct rte_flow_attr *attr,
2305                              struct rte_flow_error *error)
2306 {
2307         struct mlx5_priv *priv = dev->data->dev_private;
2308         struct mlx5_dev_config *config = &priv->config;
2309         int ret;
2310
2311         /* Fall back if no extended metadata register support. */
2312         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
2313                 return mlx5_flow_validate_action_flag(action_flags, attr,
2314                                                       error);
2315         /* Extensive metadata mode requires registers. */
2316         if (!mlx5_flow_ext_mreg_supported(dev))
2317                 return rte_flow_error_set(error, ENOTSUP,
2318                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2319                                           "no metadata registers "
2320                                           "to support flag action");
2321         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
2322                 return rte_flow_error_set(error, ENOTSUP,
2323                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2324                                           "extended metadata register"
2325                                           " isn't available");
2326         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
2327         if (ret < 0)
2328                 return ret;
2329         MLX5_ASSERT(ret > 0);
2330         if (action_flags & MLX5_FLOW_ACTION_MARK)
2331                 return rte_flow_error_set(error, EINVAL,
2332                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2333                                           "can't mark and flag in same flow");
2334         if (action_flags & MLX5_FLOW_ACTION_FLAG)
2335                 return rte_flow_error_set(error, EINVAL,
2336                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2337                                           "can't have 2 flag"
2338                                           " actions in same flow");
2339         return 0;
2340 }
2341
2342 /**
2343  * Validate MARK action.
2344  *
2345  * @param[in] dev
2346  *   Pointer to the rte_eth_dev structure.
2347  * @param[in] action
2348  *   Pointer to action.
2349  * @param[in] action_flags
2350  *   Holds the actions detected until now.
2351  * @param[in] attr
2352  *   Pointer to flow attributes
2353  * @param[out] error
2354  *   Pointer to error structure.
2355  *
2356  * @return
2357  *   0 on success, a negative errno value otherwise and rte_errno is set.
2358  */
2359 static int
2360 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
2361                              const struct rte_flow_action *action,
2362                              uint64_t action_flags,
2363                              const struct rte_flow_attr *attr,
2364                              struct rte_flow_error *error)
2365 {
2366         struct mlx5_priv *priv = dev->data->dev_private;
2367         struct mlx5_dev_config *config = &priv->config;
2368         const struct rte_flow_action_mark *mark = action->conf;
2369         int ret;
2370
2371         /* Fall back if no extended metadata register support. */
2372         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
2373                 return mlx5_flow_validate_action_mark(action, action_flags,
2374                                                       attr, error);
2375         /* Extensive metadata mode requires registers. */
2376         if (!mlx5_flow_ext_mreg_supported(dev))
2377                 return rte_flow_error_set(error, ENOTSUP,
2378                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2379                                           "no metadata registers "
2380                                           "to support mark action");
2381         if (!priv->sh->dv_mark_mask)
2382                 return rte_flow_error_set(error, ENOTSUP,
2383                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2384                                           "extended metadata register"
2385                                           " isn't available");
2386         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
2387         if (ret < 0)
2388                 return ret;
2389         MLX5_ASSERT(ret > 0);
2390         if (!mark)
2391                 return rte_flow_error_set(error, EINVAL,
2392                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2393                                           "configuration cannot be null");
2394         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
2395                 return rte_flow_error_set(error, EINVAL,
2396                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2397                                           &mark->id,
2398                                           "mark id exceeds the limit");
2399         if (action_flags & MLX5_FLOW_ACTION_FLAG)
2400                 return rte_flow_error_set(error, EINVAL,
2401                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2402                                           "can't flag and mark in same flow");
2403         if (action_flags & MLX5_FLOW_ACTION_MARK)
2404                 return rte_flow_error_set(error, EINVAL,
2405                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2406                                           "can't have 2 mark actions in same"
2407                                           " flow");
2408         return 0;
2409 }
2410
2411 /**
2412  * Validate SET_META action.
2413  *
2414  * @param[in] dev
2415  *   Pointer to the rte_eth_dev structure.
2416  * @param[in] action
2417  *   Pointer to the action structure.
2418  * @param[in] action_flags
2419  *   Holds the actions detected until now.
2420  * @param[in] attr
2421  *   Pointer to flow attributes
2422  * @param[out] error
2423  *   Pointer to error structure.
2424  *
2425  * @return
2426  *   0 on success, a negative errno value otherwise and rte_errno is set.
2427  */
2428 static int
2429 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
2430                                  const struct rte_flow_action *action,
2431                                  uint64_t action_flags __rte_unused,
2432                                  const struct rte_flow_attr *attr,
2433                                  struct rte_flow_error *error)
2434 {
2435         const struct rte_flow_action_set_meta *conf;
2436         uint32_t nic_mask = UINT32_MAX;
2437         int reg;
2438
2439         if (!mlx5_flow_ext_mreg_supported(dev))
2440                 return rte_flow_error_set(error, ENOTSUP,
2441                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2442                                           "extended metadata register"
2443                                           " isn't supported");
2444         reg = flow_dv_get_metadata_reg(dev, attr, error);
2445         if (reg < 0)
2446                 return reg;
2447         if (reg != REG_A && reg != REG_B) {
2448                 struct mlx5_priv *priv = dev->data->dev_private;
2449
2450                 nic_mask = priv->sh->dv_meta_mask;
2451         }
2452         if (!(action->conf))
2453                 return rte_flow_error_set(error, EINVAL,
2454                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2455                                           "configuration cannot be null");
2456         conf = (const struct rte_flow_action_set_meta *)action->conf;
2457         if (!conf->mask)
2458                 return rte_flow_error_set(error, EINVAL,
2459                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2460                                           "zero mask doesn't have any effect");
2461         if (conf->mask & ~nic_mask)
2462                 return rte_flow_error_set(error, EINVAL,
2463                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2464                                           "meta data must be within reg C0");
2465         return 0;
2466 }
2467
2468 /**
2469  * Validate SET_TAG action.
2470  *
2471  * @param[in] dev
2472  *   Pointer to the rte_eth_dev structure.
2473  * @param[in] action
2474  *   Pointer to the action structure.
2475  * @param[in] action_flags
2476  *   Holds the actions detected until now.
2477  * @param[in] attr
2478  *   Pointer to flow attributes
2479  * @param[out] error
2480  *   Pointer to error structure.
2481  *
2482  * @return
2483  *   0 on success, a negative errno value otherwise and rte_errno is set.
2484  */
2485 static int
2486 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
2487                                 const struct rte_flow_action *action,
2488                                 uint64_t action_flags,
2489                                 const struct rte_flow_attr *attr,
2490                                 struct rte_flow_error *error)
2491 {
2492         const struct rte_flow_action_set_tag *conf;
2493         const uint64_t terminal_action_flags =
2494                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
2495                 MLX5_FLOW_ACTION_RSS;
2496         int ret;
2497
2498         if (!mlx5_flow_ext_mreg_supported(dev))
2499                 return rte_flow_error_set(error, ENOTSUP,
2500                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2501                                           "extensive metadata register"
2502                                           " isn't supported");
2503         if (!(action->conf))
2504                 return rte_flow_error_set(error, EINVAL,
2505                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2506                                           "configuration cannot be null");
2507         conf = (const struct rte_flow_action_set_tag *)action->conf;
2508         if (!conf->mask)
2509                 return rte_flow_error_set(error, EINVAL,
2510                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2511                                           "zero mask doesn't have any effect");
2512         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
2513         if (ret < 0)
2514                 return ret;
2515         if (!attr->transfer && attr->ingress &&
2516             (action_flags & terminal_action_flags))
2517                 return rte_flow_error_set(error, EINVAL,
2518                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2519                                           "set_tag has no effect"
2520                                           " with terminal actions");
2521         return 0;
2522 }
2523
2524 /**
2525  * Validate count action.
2526  *
2527  * @param[in] dev
2528  *   Pointer to rte_eth_dev structure.
2529  * @param[out] error
2530  *   Pointer to error structure.
2531  *
2532  * @return
2533  *   0 on success, a negative errno value otherwise and rte_errno is set.
2534  */
2535 static int
2536 flow_dv_validate_action_count(struct rte_eth_dev *dev,
2537                               struct rte_flow_error *error)
2538 {
2539         struct mlx5_priv *priv = dev->data->dev_private;
2540
2541         if (!priv->config.devx)
2542                 goto notsup_err;
2543 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
2544         return 0;
2545 #endif
2546 notsup_err:
2547         return rte_flow_error_set
2548                       (error, ENOTSUP,
2549                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2550                        NULL,
2551                        "count action not supported");
2552 }
2553
2554 /**
2555  * Validate the L2 encap action.
2556  *
2557  * @param[in] dev
2558  *   Pointer to the rte_eth_dev structure.
2559  * @param[in] action_flags
2560  *   Holds the actions detected until now.
2561  * @param[in] action
2562  *   Pointer to the action structure.
2563  * @param[in] attr
2564  *   Pointer to flow attributes.
2565  * @param[out] error
2566  *   Pointer to error structure.
2567  *
2568  * @return
2569  *   0 on success, a negative errno value otherwise and rte_errno is set.
2570  */
2571 static int
2572 flow_dv_validate_action_l2_encap(struct rte_eth_dev *dev,
2573                                  uint64_t action_flags,
2574                                  const struct rte_flow_action *action,
2575                                  const struct rte_flow_attr *attr,
2576                                  struct rte_flow_error *error)
2577 {
2578         const struct mlx5_priv *priv = dev->data->dev_private;
2579
2580         if (!(action->conf))
2581                 return rte_flow_error_set(error, EINVAL,
2582                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2583                                           "configuration cannot be null");
2584         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
2585                 return rte_flow_error_set(error, EINVAL,
2586                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2587                                           "can only have a single encap action "
2588                                           "in a flow");
2589         if (!attr->transfer && priv->representor)
2590                 return rte_flow_error_set(error, ENOTSUP,
2591                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2592                                           "encap action for VF representor "
2593                                           "not supported on NIC table");
2594         return 0;
2595 }
2596
2597 /**
2598  * Validate a decap action.
2599  *
2600  * @param[in] dev
2601  *   Pointer to the rte_eth_dev structure.
2602  * @param[in] action_flags
2603  *   Holds the actions detected until now.
2604  * @param[in] attr
2605  *   Pointer to flow attributes
2606  * @param[out] error
2607  *   Pointer to error structure.
2608  *
2609  * @return
2610  *   0 on success, a negative errno value otherwise and rte_errno is set.
2611  */
2612 static int
2613 flow_dv_validate_action_decap(struct rte_eth_dev *dev,
2614                               uint64_t action_flags,
2615                               const struct rte_flow_attr *attr,
2616                               struct rte_flow_error *error)
2617 {
2618         const struct mlx5_priv *priv = dev->data->dev_private;
2619
2620         if (priv->config.hca_attr.scatter_fcs_w_decap_disable &&
2621             !priv->config.decap_en)
2622                 return rte_flow_error_set(error, ENOTSUP,
2623                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2624                                           "decap is not enabled");
2625         if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
2626                 return rte_flow_error_set(error, ENOTSUP,
2627                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2628                                           action_flags &
2629                                           MLX5_FLOW_ACTION_DECAP ? "can only "
2630                                           "have a single decap action" : "decap "
2631                                           "after encap is not supported");
2632         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2633                 return rte_flow_error_set(error, EINVAL,
2634                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2635                                           "can't have decap action after"
2636                                           " modify action");
2637         if (attr->egress)
2638                 return rte_flow_error_set(error, ENOTSUP,
2639                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2640                                           NULL,
2641                                           "decap action not supported for "
2642                                           "egress");
2643         if (!attr->transfer && priv->representor)
2644                 return rte_flow_error_set(error, ENOTSUP,
2645                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2646                                           "decap action for VF representor "
2647                                           "not supported on NIC table");
2648         return 0;
2649 }
2650
2651 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
2652
2653 /**
2654  * Validate the raw encap and decap actions.
2655  *
2656  * @param[in] dev
2657  *   Pointer to the rte_eth_dev structure.
2658  * @param[in] decap
2659  *   Pointer to the decap action.
2660  * @param[in] encap
2661  *   Pointer to the encap action.
2662  * @param[in] attr
2663  *   Pointer to flow attributes
2664  * @param[in/out] action_flags
2665  *   Holds the actions detected until now.
2666  * @param[out] actions_n
2667  *   pointer to the number of actions counter.
2668  * @param[out] error
2669  *   Pointer to error structure.
2670  *
2671  * @return
2672  *   0 on success, a negative errno value otherwise and rte_errno is set.
2673  */
2674 static int
2675 flow_dv_validate_action_raw_encap_decap
2676         (struct rte_eth_dev *dev,
2677          const struct rte_flow_action_raw_decap *decap,
2678          const struct rte_flow_action_raw_encap *encap,
2679          const struct rte_flow_attr *attr, uint64_t *action_flags,
2680          int *actions_n, struct rte_flow_error *error)
2681 {
2682         const struct mlx5_priv *priv = dev->data->dev_private;
2683         int ret;
2684
2685         if (encap && (!encap->size || !encap->data))
2686                 return rte_flow_error_set(error, EINVAL,
2687                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2688                                           "raw encap data cannot be empty");
2689         if (decap && encap) {
2690                 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
2691                     encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
2692                         /* L3 encap. */
2693                         decap = NULL;
2694                 else if (encap->size <=
2695                            MLX5_ENCAPSULATION_DECISION_SIZE &&
2696                            decap->size >
2697                            MLX5_ENCAPSULATION_DECISION_SIZE)
2698                         /* L3 decap. */
2699                         encap = NULL;
2700                 else if (encap->size >
2701                            MLX5_ENCAPSULATION_DECISION_SIZE &&
2702                            decap->size >
2703                            MLX5_ENCAPSULATION_DECISION_SIZE)
2704                         /* 2 L2 actions: encap and decap. */
2705                         ;
2706                 else
2707                         return rte_flow_error_set(error,
2708                                 ENOTSUP,
2709                                 RTE_FLOW_ERROR_TYPE_ACTION,
2710                                 NULL, "unsupported too small "
2711                                 "raw decap and too small raw "
2712                                 "encap combination");
2713         }
2714         if (decap) {
2715                 ret = flow_dv_validate_action_decap(dev, *action_flags, attr,
2716                                                     error);
2717                 if (ret < 0)
2718                         return ret;
2719                 *action_flags |= MLX5_FLOW_ACTION_DECAP;
2720                 ++(*actions_n);
2721         }
2722         if (encap) {
2723                 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
2724                         return rte_flow_error_set(error, ENOTSUP,
2725                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2726                                                   NULL,
2727                                                   "small raw encap size");
2728                 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
2729                         return rte_flow_error_set(error, EINVAL,
2730                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2731                                                   NULL,
2732                                                   "more than one encap action");
2733                 if (!attr->transfer && priv->representor)
2734                         return rte_flow_error_set
2735                                         (error, ENOTSUP,
2736                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2737                                          "encap action for VF representor "
2738                                          "not supported on NIC table");
2739                 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
2740                 ++(*actions_n);
2741         }
2742         return 0;
2743 }
2744
2745 /**
2746  * Match encap_decap resource.
2747  *
2748  * @param list
2749  *   Pointer to the hash list.
2750  * @param entry
2751  *   Pointer to exist resource entry object.
2752  * @param key
2753  *   Key of the new entry.
2754  * @param ctx_cb
2755  *   Pointer to new encap_decap resource.
2756  *
2757  * @return
2758  *   0 on matching, none-zero otherwise.
2759  */
2760 int
2761 flow_dv_encap_decap_match_cb(struct mlx5_hlist *list __rte_unused,
2762                              struct mlx5_hlist_entry *entry,
2763                              uint64_t key __rte_unused, void *cb_ctx)
2764 {
2765         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2766         struct mlx5_flow_dv_encap_decap_resource *resource = ctx->data;
2767         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2768
2769         cache_resource = container_of(entry,
2770                                       struct mlx5_flow_dv_encap_decap_resource,
2771                                       entry);
2772         if (resource->entry.key == cache_resource->entry.key &&
2773             resource->reformat_type == cache_resource->reformat_type &&
2774             resource->ft_type == cache_resource->ft_type &&
2775             resource->flags == cache_resource->flags &&
2776             resource->size == cache_resource->size &&
2777             !memcmp((const void *)resource->buf,
2778                     (const void *)cache_resource->buf,
2779                     resource->size))
2780                 return 0;
2781         return -1;
2782 }
2783
2784 /**
2785  * Allocate encap_decap resource.
2786  *
2787  * @param list
2788  *   Pointer to the hash list.
2789  * @param entry
2790  *   Pointer to exist resource entry object.
2791  * @param ctx_cb
2792  *   Pointer to new encap_decap resource.
2793  *
2794  * @return
2795  *   0 on matching, none-zero otherwise.
2796  */
2797 struct mlx5_hlist_entry *
2798 flow_dv_encap_decap_create_cb(struct mlx5_hlist *list,
2799                               uint64_t key __rte_unused,
2800                               void *cb_ctx)
2801 {
2802         struct mlx5_dev_ctx_shared *sh = list->ctx;
2803         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2804         struct mlx5dv_dr_domain *domain;
2805         struct mlx5_flow_dv_encap_decap_resource *resource = ctx->data;
2806         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2807         uint32_t idx;
2808         int ret;
2809
2810         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2811                 domain = sh->fdb_domain;
2812         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2813                 domain = sh->rx_domain;
2814         else
2815                 domain = sh->tx_domain;
2816         /* Register new encap/decap resource. */
2817         cache_resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
2818                                        &idx);
2819         if (!cache_resource) {
2820                 rte_flow_error_set(ctx->error, ENOMEM,
2821                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2822                                    "cannot allocate resource memory");
2823                 return NULL;
2824         }
2825         *cache_resource = *resource;
2826         cache_resource->idx = idx;
2827         ret = mlx5_flow_os_create_flow_action_packet_reformat
2828                                         (sh->ctx, domain, cache_resource,
2829                                          &cache_resource->action);
2830         if (ret) {
2831                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], idx);
2832                 rte_flow_error_set(ctx->error, ENOMEM,
2833                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2834                                    NULL, "cannot create action");
2835                 return NULL;
2836         }
2837
2838         return &cache_resource->entry;
2839 }
2840
2841 /**
2842  * Find existing encap/decap resource or create and register a new one.
2843  *
2844  * @param[in, out] dev
2845  *   Pointer to rte_eth_dev structure.
2846  * @param[in, out] resource
2847  *   Pointer to encap/decap resource.
2848  * @parm[in, out] dev_flow
2849  *   Pointer to the dev_flow.
2850  * @param[out] error
2851  *   pointer to error structure.
2852  *
2853  * @return
2854  *   0 on success otherwise -errno and errno is set.
2855  */
2856 static int
2857 flow_dv_encap_decap_resource_register
2858                         (struct rte_eth_dev *dev,
2859                          struct mlx5_flow_dv_encap_decap_resource *resource,
2860                          struct mlx5_flow *dev_flow,
2861                          struct rte_flow_error *error)
2862 {
2863         struct mlx5_priv *priv = dev->data->dev_private;
2864         struct mlx5_dev_ctx_shared *sh = priv->sh;
2865         struct mlx5_hlist_entry *entry;
2866         union mlx5_flow_encap_decap_key encap_decap_key = {
2867                 {
2868                         .ft_type = resource->ft_type,
2869                         .refmt_type = resource->reformat_type,
2870                         .buf_size = resource->size,
2871                         .table_level = !!dev_flow->dv.group,
2872                         .cksum = 0,
2873                 }
2874         };
2875         struct mlx5_flow_cb_ctx ctx = {
2876                 .error = error,
2877                 .data = resource,
2878         };
2879
2880         resource->flags = dev_flow->dv.group ? 0 : 1;
2881         encap_decap_key.cksum = __rte_raw_cksum(resource->buf,
2882                                                 resource->size, 0);
2883         resource->entry.key = encap_decap_key.v64;
2884         entry = mlx5_hlist_register(sh->encaps_decaps, resource->entry.key,
2885                                     &ctx);
2886         if (!entry)
2887                 return -rte_errno;
2888         resource = container_of(entry, typeof(*resource), entry);
2889         dev_flow->dv.encap_decap = resource;
2890         dev_flow->handle->dvh.rix_encap_decap = resource->idx;
2891         return 0;
2892 }
2893
2894 /**
2895  * Find existing table jump resource or create and register a new one.
2896  *
2897  * @param[in, out] dev
2898  *   Pointer to rte_eth_dev structure.
2899  * @param[in, out] tbl
2900  *   Pointer to flow table resource.
2901  * @parm[in, out] dev_flow
2902  *   Pointer to the dev_flow.
2903  * @param[out] error
2904  *   pointer to error structure.
2905  *
2906  * @return
2907  *   0 on success otherwise -errno and errno is set.
2908  */
2909 static int
2910 flow_dv_jump_tbl_resource_register
2911                         (struct rte_eth_dev *dev __rte_unused,
2912                          struct mlx5_flow_tbl_resource *tbl,
2913                          struct mlx5_flow *dev_flow,
2914                          struct rte_flow_error *error __rte_unused)
2915 {
2916         struct mlx5_flow_tbl_data_entry *tbl_data =
2917                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
2918
2919         MLX5_ASSERT(tbl);
2920         MLX5_ASSERT(tbl_data->jump.action);
2921         dev_flow->handle->rix_jump = tbl_data->idx;
2922         dev_flow->dv.jump = &tbl_data->jump;
2923         return 0;
2924 }
2925
2926 int
2927 flow_dv_port_id_match_cb(struct mlx5_cache_list *list __rte_unused,
2928                          struct mlx5_cache_entry *entry, void *cb_ctx)
2929 {
2930         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2931         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
2932         struct mlx5_flow_dv_port_id_action_resource *res =
2933                         container_of(entry, typeof(*res), entry);
2934
2935         return ref->port_id != res->port_id;
2936 }
2937
2938 struct mlx5_cache_entry *
2939 flow_dv_port_id_create_cb(struct mlx5_cache_list *list,
2940                           struct mlx5_cache_entry *entry __rte_unused,
2941                           void *cb_ctx)
2942 {
2943         struct mlx5_dev_ctx_shared *sh = list->ctx;
2944         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2945         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
2946         struct mlx5_flow_dv_port_id_action_resource *cache;
2947         uint32_t idx;
2948         int ret;
2949
2950         /* Register new port id action resource. */
2951         cache = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
2952         if (!cache) {
2953                 rte_flow_error_set(ctx->error, ENOMEM,
2954                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2955                                    "cannot allocate port_id action cache memory");
2956                 return NULL;
2957         }
2958         *cache = *ref;
2959         ret = mlx5_flow_os_create_flow_action_dest_port(sh->fdb_domain,
2960                                                         ref->port_id,
2961                                                         &cache->action);
2962         if (ret) {
2963                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], idx);
2964                 rte_flow_error_set(ctx->error, ENOMEM,
2965                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2966                                    "cannot create action");
2967                 return NULL;
2968         }
2969         return &cache->entry;
2970 }
2971
2972 /**
2973  * Find existing table port ID resource or create and register a new one.
2974  *
2975  * @param[in, out] dev
2976  *   Pointer to rte_eth_dev structure.
2977  * @param[in, out] resource
2978  *   Pointer to port ID action resource.
2979  * @parm[in, out] dev_flow
2980  *   Pointer to the dev_flow.
2981  * @param[out] error
2982  *   pointer to error structure.
2983  *
2984  * @return
2985  *   0 on success otherwise -errno and errno is set.
2986  */
2987 static int
2988 flow_dv_port_id_action_resource_register
2989                         (struct rte_eth_dev *dev,
2990                          struct mlx5_flow_dv_port_id_action_resource *resource,
2991                          struct mlx5_flow *dev_flow,
2992                          struct rte_flow_error *error)
2993 {
2994         struct mlx5_priv *priv = dev->data->dev_private;
2995         struct mlx5_cache_entry *entry;
2996         struct mlx5_flow_dv_port_id_action_resource *cache;
2997         struct mlx5_flow_cb_ctx ctx = {
2998                 .error = error,
2999                 .data = resource,
3000         };
3001
3002         entry = mlx5_cache_register(&priv->sh->port_id_action_list, &ctx);
3003         if (!entry)
3004                 return -rte_errno;
3005         cache = container_of(entry, typeof(*cache), entry);
3006         dev_flow->dv.port_id_action = cache;
3007         dev_flow->handle->rix_port_id_action = cache->idx;
3008         return 0;
3009 }
3010
3011 int
3012 flow_dv_push_vlan_match_cb(struct mlx5_cache_list *list __rte_unused,
3013                          struct mlx5_cache_entry *entry, void *cb_ctx)
3014 {
3015         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3016         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3017         struct mlx5_flow_dv_push_vlan_action_resource *res =
3018                         container_of(entry, typeof(*res), entry);
3019
3020         return ref->vlan_tag != res->vlan_tag || ref->ft_type != res->ft_type;
3021 }
3022
3023 struct mlx5_cache_entry *
3024 flow_dv_push_vlan_create_cb(struct mlx5_cache_list *list,
3025                           struct mlx5_cache_entry *entry __rte_unused,
3026                           void *cb_ctx)
3027 {
3028         struct mlx5_dev_ctx_shared *sh = list->ctx;
3029         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3030         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3031         struct mlx5_flow_dv_push_vlan_action_resource *cache;
3032         struct mlx5dv_dr_domain *domain;
3033         uint32_t idx;
3034         int ret;
3035
3036         /* Register new port id action resource. */
3037         cache = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3038         if (!cache) {
3039                 rte_flow_error_set(ctx->error, ENOMEM,
3040                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3041                                    "cannot allocate push_vlan action cache memory");
3042                 return NULL;
3043         }
3044         *cache = *ref;
3045         if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3046                 domain = sh->fdb_domain;
3047         else if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3048                 domain = sh->rx_domain;
3049         else
3050                 domain = sh->tx_domain;
3051         ret = mlx5_flow_os_create_flow_action_push_vlan(domain, ref->vlan_tag,
3052                                                         &cache->action);
3053         if (ret) {
3054                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
3055                 rte_flow_error_set(ctx->error, ENOMEM,
3056                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3057                                    "cannot create push vlan action");
3058                 return NULL;
3059         }
3060         return &cache->entry;
3061 }
3062
3063 /**
3064  * Find existing push vlan resource or create and register a new one.
3065  *
3066  * @param [in, out] dev
3067  *   Pointer to rte_eth_dev structure.
3068  * @param[in, out] resource
3069  *   Pointer to port ID action resource.
3070  * @parm[in, out] dev_flow
3071  *   Pointer to the dev_flow.
3072  * @param[out] error
3073  *   pointer to error structure.
3074  *
3075  * @return
3076  *   0 on success otherwise -errno and errno is set.
3077  */
3078 static int
3079 flow_dv_push_vlan_action_resource_register
3080                        (struct rte_eth_dev *dev,
3081                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
3082                         struct mlx5_flow *dev_flow,
3083                         struct rte_flow_error *error)
3084 {
3085         struct mlx5_priv *priv = dev->data->dev_private;
3086         struct mlx5_flow_dv_push_vlan_action_resource *cache;
3087         struct mlx5_cache_entry *entry;
3088         struct mlx5_flow_cb_ctx ctx = {
3089                 .error = error,
3090                 .data = resource,
3091         };
3092
3093         entry = mlx5_cache_register(&priv->sh->push_vlan_action_list, &ctx);
3094         if (!entry)
3095                 return -rte_errno;
3096         cache = container_of(entry, typeof(*cache), entry);
3097
3098         dev_flow->handle->dvh.rix_push_vlan = cache->idx;
3099         dev_flow->dv.push_vlan_res = cache;
3100         return 0;
3101 }
3102
3103 /**
3104  * Get the size of specific rte_flow_item_type hdr size
3105  *
3106  * @param[in] item_type
3107  *   Tested rte_flow_item_type.
3108  *
3109  * @return
3110  *   sizeof struct item_type, 0 if void or irrelevant.
3111  */
3112 static size_t
3113 flow_dv_get_item_hdr_len(const enum rte_flow_item_type item_type)
3114 {
3115         size_t retval;
3116
3117         switch (item_type) {
3118         case RTE_FLOW_ITEM_TYPE_ETH:
3119                 retval = sizeof(struct rte_ether_hdr);
3120                 break;
3121         case RTE_FLOW_ITEM_TYPE_VLAN:
3122                 retval = sizeof(struct rte_vlan_hdr);
3123                 break;
3124         case RTE_FLOW_ITEM_TYPE_IPV4:
3125                 retval = sizeof(struct rte_ipv4_hdr);
3126                 break;
3127         case RTE_FLOW_ITEM_TYPE_IPV6:
3128                 retval = sizeof(struct rte_ipv6_hdr);
3129                 break;
3130         case RTE_FLOW_ITEM_TYPE_UDP:
3131                 retval = sizeof(struct rte_udp_hdr);
3132                 break;
3133         case RTE_FLOW_ITEM_TYPE_TCP:
3134                 retval = sizeof(struct rte_tcp_hdr);
3135                 break;
3136         case RTE_FLOW_ITEM_TYPE_VXLAN:
3137         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
3138                 retval = sizeof(struct rte_vxlan_hdr);
3139                 break;
3140         case RTE_FLOW_ITEM_TYPE_GRE:
3141         case RTE_FLOW_ITEM_TYPE_NVGRE:
3142                 retval = sizeof(struct rte_gre_hdr);
3143                 break;
3144         case RTE_FLOW_ITEM_TYPE_MPLS:
3145                 retval = sizeof(struct rte_mpls_hdr);
3146                 break;
3147         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
3148         default:
3149                 retval = 0;
3150                 break;
3151         }
3152         return retval;
3153 }
3154
3155 #define MLX5_ENCAP_IPV4_VERSION         0x40
3156 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
3157 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
3158 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
3159 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
3160 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
3161 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
3162
3163 /**
3164  * Convert the encap action data from list of rte_flow_item to raw buffer
3165  *
3166  * @param[in] items
3167  *   Pointer to rte_flow_item objects list.
3168  * @param[out] buf
3169  *   Pointer to the output buffer.
3170  * @param[out] size
3171  *   Pointer to the output buffer size.
3172  * @param[out] error
3173  *   Pointer to the error structure.
3174  *
3175  * @return
3176  *   0 on success, a negative errno value otherwise and rte_errno is set.
3177  */
3178 static int
3179 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
3180                            size_t *size, struct rte_flow_error *error)
3181 {
3182         struct rte_ether_hdr *eth = NULL;
3183         struct rte_vlan_hdr *vlan = NULL;
3184         struct rte_ipv4_hdr *ipv4 = NULL;
3185         struct rte_ipv6_hdr *ipv6 = NULL;
3186         struct rte_udp_hdr *udp = NULL;
3187         struct rte_vxlan_hdr *vxlan = NULL;
3188         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
3189         struct rte_gre_hdr *gre = NULL;
3190         size_t len;
3191         size_t temp_size = 0;
3192
3193         if (!items)
3194                 return rte_flow_error_set(error, EINVAL,
3195                                           RTE_FLOW_ERROR_TYPE_ACTION,
3196                                           NULL, "invalid empty data");
3197         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
3198                 len = flow_dv_get_item_hdr_len(items->type);
3199                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
3200                         return rte_flow_error_set(error, EINVAL,
3201                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3202                                                   (void *)items->type,
3203                                                   "items total size is too big"
3204                                                   " for encap action");
3205                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
3206                 switch (items->type) {
3207                 case RTE_FLOW_ITEM_TYPE_ETH:
3208                         eth = (struct rte_ether_hdr *)&buf[temp_size];
3209                         break;
3210                 case RTE_FLOW_ITEM_TYPE_VLAN:
3211                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
3212                         if (!eth)
3213                                 return rte_flow_error_set(error, EINVAL,
3214                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3215                                                 (void *)items->type,
3216                                                 "eth header not found");
3217                         if (!eth->ether_type)
3218                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
3219                         break;
3220                 case RTE_FLOW_ITEM_TYPE_IPV4:
3221                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
3222                         if (!vlan && !eth)
3223                                 return rte_flow_error_set(error, EINVAL,
3224                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3225                                                 (void *)items->type,
3226                                                 "neither eth nor vlan"
3227                                                 " header found");
3228                         if (vlan && !vlan->eth_proto)
3229                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
3230                         else if (eth && !eth->ether_type)
3231                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
3232                         if (!ipv4->version_ihl)
3233                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
3234                                                     MLX5_ENCAP_IPV4_IHL_MIN;
3235                         if (!ipv4->time_to_live)
3236                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
3237                         break;
3238                 case RTE_FLOW_ITEM_TYPE_IPV6:
3239                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
3240                         if (!vlan && !eth)
3241                                 return rte_flow_error_set(error, EINVAL,
3242                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3243                                                 (void *)items->type,
3244                                                 "neither eth nor vlan"
3245                                                 " header found");
3246                         if (vlan && !vlan->eth_proto)
3247                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
3248                         else if (eth && !eth->ether_type)
3249                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
3250                         if (!ipv6->vtc_flow)
3251                                 ipv6->vtc_flow =
3252                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
3253                         if (!ipv6->hop_limits)
3254                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
3255                         break;
3256                 case RTE_FLOW_ITEM_TYPE_UDP:
3257                         udp = (struct rte_udp_hdr *)&buf[temp_size];
3258                         if (!ipv4 && !ipv6)
3259                                 return rte_flow_error_set(error, EINVAL,
3260                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3261                                                 (void *)items->type,
3262                                                 "ip header not found");
3263                         if (ipv4 && !ipv4->next_proto_id)
3264                                 ipv4->next_proto_id = IPPROTO_UDP;
3265                         else if (ipv6 && !ipv6->proto)
3266                                 ipv6->proto = IPPROTO_UDP;
3267                         break;
3268                 case RTE_FLOW_ITEM_TYPE_VXLAN:
3269                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
3270                         if (!udp)
3271                                 return rte_flow_error_set(error, EINVAL,
3272                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3273                                                 (void *)items->type,
3274                                                 "udp header not found");
3275                         if (!udp->dst_port)
3276                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
3277                         if (!vxlan->vx_flags)
3278                                 vxlan->vx_flags =
3279                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
3280                         break;
3281                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
3282                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
3283                         if (!udp)
3284                                 return rte_flow_error_set(error, EINVAL,
3285                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3286                                                 (void *)items->type,
3287                                                 "udp header not found");
3288                         if (!vxlan_gpe->proto)
3289                                 return rte_flow_error_set(error, EINVAL,
3290                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3291                                                 (void *)items->type,
3292                                                 "next protocol not found");
3293                         if (!udp->dst_port)
3294                                 udp->dst_port =
3295                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
3296                         if (!vxlan_gpe->vx_flags)
3297                                 vxlan_gpe->vx_flags =
3298                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
3299                         break;
3300                 case RTE_FLOW_ITEM_TYPE_GRE:
3301                 case RTE_FLOW_ITEM_TYPE_NVGRE:
3302                         gre = (struct rte_gre_hdr *)&buf[temp_size];
3303                         if (!gre->proto)
3304                                 return rte_flow_error_set(error, EINVAL,
3305                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3306                                                 (void *)items->type,
3307                                                 "next protocol not found");
3308                         if (!ipv4 && !ipv6)
3309                                 return rte_flow_error_set(error, EINVAL,
3310                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3311                                                 (void *)items->type,
3312                                                 "ip header not found");
3313                         if (ipv4 && !ipv4->next_proto_id)
3314                                 ipv4->next_proto_id = IPPROTO_GRE;
3315                         else if (ipv6 && !ipv6->proto)
3316                                 ipv6->proto = IPPROTO_GRE;
3317                         break;
3318                 case RTE_FLOW_ITEM_TYPE_VOID:
3319                         break;
3320                 default:
3321                         return rte_flow_error_set(error, EINVAL,
3322                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3323                                                   (void *)items->type,
3324                                                   "unsupported item type");
3325                         break;
3326                 }
3327                 temp_size += len;
3328         }
3329         *size = temp_size;
3330         return 0;
3331 }
3332
3333 static int
3334 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
3335 {
3336         struct rte_ether_hdr *eth = NULL;
3337         struct rte_vlan_hdr *vlan = NULL;
3338         struct rte_ipv6_hdr *ipv6 = NULL;
3339         struct rte_udp_hdr *udp = NULL;
3340         char *next_hdr;
3341         uint16_t proto;
3342
3343         eth = (struct rte_ether_hdr *)data;
3344         next_hdr = (char *)(eth + 1);
3345         proto = RTE_BE16(eth->ether_type);
3346
3347         /* VLAN skipping */
3348         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
3349                 vlan = (struct rte_vlan_hdr *)next_hdr;
3350                 proto = RTE_BE16(vlan->eth_proto);
3351                 next_hdr += sizeof(struct rte_vlan_hdr);
3352         }
3353
3354         /* HW calculates IPv4 csum. no need to proceed */
3355         if (proto == RTE_ETHER_TYPE_IPV4)
3356                 return 0;
3357
3358         /* non IPv4/IPv6 header. not supported */
3359         if (proto != RTE_ETHER_TYPE_IPV6) {
3360                 return rte_flow_error_set(error, ENOTSUP,
3361                                           RTE_FLOW_ERROR_TYPE_ACTION,
3362                                           NULL, "Cannot offload non IPv4/IPv6");
3363         }
3364
3365         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
3366
3367         /* ignore non UDP */
3368         if (ipv6->proto != IPPROTO_UDP)
3369                 return 0;
3370
3371         udp = (struct rte_udp_hdr *)(ipv6 + 1);
3372         udp->dgram_cksum = 0;
3373
3374         return 0;
3375 }
3376
3377 /**
3378  * Convert L2 encap action to DV specification.
3379  *
3380  * @param[in] dev
3381  *   Pointer to rte_eth_dev structure.
3382  * @param[in] action
3383  *   Pointer to action structure.
3384  * @param[in, out] dev_flow
3385  *   Pointer to the mlx5_flow.
3386  * @param[in] transfer
3387  *   Mark if the flow is E-Switch flow.
3388  * @param[out] error
3389  *   Pointer to the error structure.
3390  *
3391  * @return
3392  *   0 on success, a negative errno value otherwise and rte_errno is set.
3393  */
3394 static int
3395 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
3396                                const struct rte_flow_action *action,
3397                                struct mlx5_flow *dev_flow,
3398                                uint8_t transfer,
3399                                struct rte_flow_error *error)
3400 {
3401         const struct rte_flow_item *encap_data;
3402         const struct rte_flow_action_raw_encap *raw_encap_data;
3403         struct mlx5_flow_dv_encap_decap_resource res = {
3404                 .reformat_type =
3405                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
3406                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
3407                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
3408         };
3409
3410         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
3411                 raw_encap_data =
3412                         (const struct rte_flow_action_raw_encap *)action->conf;
3413                 res.size = raw_encap_data->size;
3414                 memcpy(res.buf, raw_encap_data->data, res.size);
3415         } else {
3416                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
3417                         encap_data =
3418                                 ((const struct rte_flow_action_vxlan_encap *)
3419                                                 action->conf)->definition;
3420                 else
3421                         encap_data =
3422                                 ((const struct rte_flow_action_nvgre_encap *)
3423                                                 action->conf)->definition;
3424                 if (flow_dv_convert_encap_data(encap_data, res.buf,
3425                                                &res.size, error))
3426                         return -rte_errno;
3427         }
3428         if (flow_dv_zero_encap_udp_csum(res.buf, error))
3429                 return -rte_errno;
3430         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
3431                 return rte_flow_error_set(error, EINVAL,
3432                                           RTE_FLOW_ERROR_TYPE_ACTION,
3433                                           NULL, "can't create L2 encap action");
3434         return 0;
3435 }
3436
3437 /**
3438  * Convert L2 decap action to DV specification.
3439  *
3440  * @param[in] dev
3441  *   Pointer to rte_eth_dev structure.
3442  * @param[in, out] dev_flow
3443  *   Pointer to the mlx5_flow.
3444  * @param[in] transfer
3445  *   Mark if the flow is E-Switch flow.
3446  * @param[out] error
3447  *   Pointer to the error structure.
3448  *
3449  * @return
3450  *   0 on success, a negative errno value otherwise and rte_errno is set.
3451  */
3452 static int
3453 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
3454                                struct mlx5_flow *dev_flow,
3455                                uint8_t transfer,
3456                                struct rte_flow_error *error)
3457 {
3458         struct mlx5_flow_dv_encap_decap_resource res = {
3459                 .size = 0,
3460                 .reformat_type =
3461                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
3462                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
3463                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
3464         };
3465
3466         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
3467                 return rte_flow_error_set(error, EINVAL,
3468                                           RTE_FLOW_ERROR_TYPE_ACTION,
3469                                           NULL, "can't create L2 decap action");
3470         return 0;
3471 }
3472
3473 /**
3474  * Convert raw decap/encap (L3 tunnel) action to DV specification.
3475  *
3476  * @param[in] dev
3477  *   Pointer to rte_eth_dev structure.
3478  * @param[in] action
3479  *   Pointer to action structure.
3480  * @param[in, out] dev_flow
3481  *   Pointer to the mlx5_flow.
3482  * @param[in] attr
3483  *   Pointer to the flow attributes.
3484  * @param[out] error
3485  *   Pointer to the error structure.
3486  *
3487  * @return
3488  *   0 on success, a negative errno value otherwise and rte_errno is set.
3489  */
3490 static int
3491 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
3492                                 const struct rte_flow_action *action,
3493                                 struct mlx5_flow *dev_flow,
3494                                 const struct rte_flow_attr *attr,
3495                                 struct rte_flow_error *error)
3496 {
3497         const struct rte_flow_action_raw_encap *encap_data;
3498         struct mlx5_flow_dv_encap_decap_resource res;
3499
3500         memset(&res, 0, sizeof(res));
3501         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
3502         res.size = encap_data->size;
3503         memcpy(res.buf, encap_data->data, res.size);
3504         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
3505                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
3506                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
3507         if (attr->transfer)
3508                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3509         else
3510                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3511                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3512         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
3513                 return rte_flow_error_set(error, EINVAL,
3514                                           RTE_FLOW_ERROR_TYPE_ACTION,
3515                                           NULL, "can't create encap action");
3516         return 0;
3517 }
3518
3519 /**
3520  * Create action push VLAN.
3521  *
3522  * @param[in] dev
3523  *   Pointer to rte_eth_dev structure.
3524  * @param[in] attr
3525  *   Pointer to the flow attributes.
3526  * @param[in] vlan
3527  *   Pointer to the vlan to push to the Ethernet header.
3528  * @param[in, out] dev_flow
3529  *   Pointer to the mlx5_flow.
3530  * @param[out] error
3531  *   Pointer to the error structure.
3532  *
3533  * @return
3534  *   0 on success, a negative errno value otherwise and rte_errno is set.
3535  */
3536 static int
3537 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
3538                                 const struct rte_flow_attr *attr,
3539                                 const struct rte_vlan_hdr *vlan,
3540                                 struct mlx5_flow *dev_flow,
3541                                 struct rte_flow_error *error)
3542 {
3543         struct mlx5_flow_dv_push_vlan_action_resource res;
3544
3545         memset(&res, 0, sizeof(res));
3546         res.vlan_tag =
3547                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
3548                                  vlan->vlan_tci);
3549         if (attr->transfer)
3550                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3551         else
3552                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3553                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3554         return flow_dv_push_vlan_action_resource_register
3555                                             (dev, &res, dev_flow, error);
3556 }
3557
3558 static int fdb_mirror;
3559
3560 /**
3561  * Validate the modify-header actions.
3562  *
3563  * @param[in] action_flags
3564  *   Holds the actions detected until now.
3565  * @param[in] action
3566  *   Pointer to the modify action.
3567  * @param[out] error
3568  *   Pointer to error structure.
3569  *
3570  * @return
3571  *   0 on success, a negative errno value otherwise and rte_errno is set.
3572  */
3573 static int
3574 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
3575                                    const struct rte_flow_action *action,
3576                                    struct rte_flow_error *error)
3577 {
3578         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
3579                 return rte_flow_error_set(error, EINVAL,
3580                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3581                                           NULL, "action configuration not set");
3582         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3583                 return rte_flow_error_set(error, EINVAL,
3584                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3585                                           "can't have encap action before"
3586                                           " modify action");
3587         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) && fdb_mirror)
3588                 return rte_flow_error_set(error, EINVAL,
3589                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3590                                           "can't support sample action before"
3591                                           " modify action for E-Switch"
3592                                           " mirroring");
3593         return 0;
3594 }
3595
3596 /**
3597  * Validate the modify-header MAC address actions.
3598  *
3599  * @param[in] action_flags
3600  *   Holds the actions detected until now.
3601  * @param[in] action
3602  *   Pointer to the modify action.
3603  * @param[in] item_flags
3604  *   Holds the items detected.
3605  * @param[out] error
3606  *   Pointer to error structure.
3607  *
3608  * @return
3609  *   0 on success, a negative errno value otherwise and rte_errno is set.
3610  */
3611 static int
3612 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
3613                                    const struct rte_flow_action *action,
3614                                    const uint64_t item_flags,
3615                                    struct rte_flow_error *error)
3616 {
3617         int ret = 0;
3618
3619         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3620         if (!ret) {
3621                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
3622                         return rte_flow_error_set(error, EINVAL,
3623                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3624                                                   NULL,
3625                                                   "no L2 item in pattern");
3626         }
3627         return ret;
3628 }
3629
3630 /**
3631  * Validate the modify-header IPv4 address actions.
3632  *
3633  * @param[in] action_flags
3634  *   Holds the actions detected until now.
3635  * @param[in] action
3636  *   Pointer to the modify action.
3637  * @param[in] item_flags
3638  *   Holds the items detected.
3639  * @param[out] error
3640  *   Pointer to error structure.
3641  *
3642  * @return
3643  *   0 on success, a negative errno value otherwise and rte_errno is set.
3644  */
3645 static int
3646 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
3647                                     const struct rte_flow_action *action,
3648                                     const uint64_t item_flags,
3649                                     struct rte_flow_error *error)
3650 {
3651         int ret = 0;
3652         uint64_t layer;
3653
3654         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3655         if (!ret) {
3656                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3657                                  MLX5_FLOW_LAYER_INNER_L3_IPV4 :
3658                                  MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3659                 if (!(item_flags & layer))
3660                         return rte_flow_error_set(error, EINVAL,
3661                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3662                                                   NULL,
3663                                                   "no ipv4 item in pattern");
3664         }
3665         return ret;
3666 }
3667
3668 /**
3669  * Validate the modify-header IPv6 address actions.
3670  *
3671  * @param[in] action_flags
3672  *   Holds the actions detected until now.
3673  * @param[in] action
3674  *   Pointer to the modify action.
3675  * @param[in] item_flags
3676  *   Holds the items detected.
3677  * @param[out] error
3678  *   Pointer to error structure.
3679  *
3680  * @return
3681  *   0 on success, a negative errno value otherwise and rte_errno is set.
3682  */
3683 static int
3684 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
3685                                     const struct rte_flow_action *action,
3686                                     const uint64_t item_flags,
3687                                     struct rte_flow_error *error)
3688 {
3689         int ret = 0;
3690         uint64_t layer;
3691
3692         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3693         if (!ret) {
3694                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3695                                  MLX5_FLOW_LAYER_INNER_L3_IPV6 :
3696                                  MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3697                 if (!(item_flags & layer))
3698                         return rte_flow_error_set(error, EINVAL,
3699                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3700                                                   NULL,
3701                                                   "no ipv6 item in pattern");
3702         }
3703         return ret;
3704 }
3705
3706 /**
3707  * Validate the modify-header TP actions.
3708  *
3709  * @param[in] action_flags
3710  *   Holds the actions detected until now.
3711  * @param[in] action
3712  *   Pointer to the modify action.
3713  * @param[in] item_flags
3714  *   Holds the items detected.
3715  * @param[out] error
3716  *   Pointer to error structure.
3717  *
3718  * @return
3719  *   0 on success, a negative errno value otherwise and rte_errno is set.
3720  */
3721 static int
3722 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
3723                                   const struct rte_flow_action *action,
3724                                   const uint64_t item_flags,
3725                                   struct rte_flow_error *error)
3726 {
3727         int ret = 0;
3728         uint64_t layer;
3729
3730         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3731         if (!ret) {
3732                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3733                                  MLX5_FLOW_LAYER_INNER_L4 :
3734                                  MLX5_FLOW_LAYER_OUTER_L4;
3735                 if (!(item_flags & layer))
3736                         return rte_flow_error_set(error, EINVAL,
3737                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3738                                                   NULL, "no transport layer "
3739                                                   "in pattern");
3740         }
3741         return ret;
3742 }
3743
3744 /**
3745  * Validate the modify-header actions of increment/decrement
3746  * TCP Sequence-number.
3747  *
3748  * @param[in] action_flags
3749  *   Holds the actions detected until now.
3750  * @param[in] action
3751  *   Pointer to the modify action.
3752  * @param[in] item_flags
3753  *   Holds the items detected.
3754  * @param[out] error
3755  *   Pointer to error structure.
3756  *
3757  * @return
3758  *   0 on success, a negative errno value otherwise and rte_errno is set.
3759  */
3760 static int
3761 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
3762                                        const struct rte_flow_action *action,
3763                                        const uint64_t item_flags,
3764                                        struct rte_flow_error *error)
3765 {
3766         int ret = 0;
3767         uint64_t layer;
3768
3769         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3770         if (!ret) {
3771                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3772                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
3773                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
3774                 if (!(item_flags & layer))
3775                         return rte_flow_error_set(error, EINVAL,
3776                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3777                                                   NULL, "no TCP item in"
3778                                                   " pattern");
3779                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
3780                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
3781                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
3782                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
3783                         return rte_flow_error_set(error, EINVAL,
3784                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3785                                                   NULL,
3786                                                   "cannot decrease and increase"
3787                                                   " TCP sequence number"
3788                                                   " at the same time");
3789         }
3790         return ret;
3791 }
3792
3793 /**
3794  * Validate the modify-header actions of increment/decrement
3795  * TCP Acknowledgment number.
3796  *
3797  * @param[in] action_flags
3798  *   Holds the actions detected until now.
3799  * @param[in] action
3800  *   Pointer to the modify action.
3801  * @param[in] item_flags
3802  *   Holds the items detected.
3803  * @param[out] error
3804  *   Pointer to error structure.
3805  *
3806  * @return
3807  *   0 on success, a negative errno value otherwise and rte_errno is set.
3808  */
3809 static int
3810 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
3811                                        const struct rte_flow_action *action,
3812                                        const uint64_t item_flags,
3813                                        struct rte_flow_error *error)
3814 {
3815         int ret = 0;
3816         uint64_t layer;
3817
3818         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3819         if (!ret) {
3820                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3821                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
3822                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
3823                 if (!(item_flags & layer))
3824                         return rte_flow_error_set(error, EINVAL,
3825                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3826                                                   NULL, "no TCP item in"
3827                                                   " pattern");
3828                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
3829                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
3830                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
3831                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
3832                         return rte_flow_error_set(error, EINVAL,
3833                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3834                                                   NULL,
3835                                                   "cannot decrease and increase"
3836                                                   " TCP acknowledgment number"
3837                                                   " at the same time");
3838         }
3839         return ret;
3840 }
3841
3842 /**
3843  * Validate the modify-header TTL actions.
3844  *
3845  * @param[in] action_flags
3846  *   Holds the actions detected until now.
3847  * @param[in] action
3848  *   Pointer to the modify action.
3849  * @param[in] item_flags
3850  *   Holds the items detected.
3851  * @param[out] error
3852  *   Pointer to error structure.
3853  *
3854  * @return
3855  *   0 on success, a negative errno value otherwise and rte_errno is set.
3856  */
3857 static int
3858 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
3859                                    const struct rte_flow_action *action,
3860                                    const uint64_t item_flags,
3861                                    struct rte_flow_error *error)
3862 {
3863         int ret = 0;
3864         uint64_t layer;
3865
3866         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3867         if (!ret) {
3868                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3869                                  MLX5_FLOW_LAYER_INNER_L3 :
3870                                  MLX5_FLOW_LAYER_OUTER_L3;
3871                 if (!(item_flags & layer))
3872                         return rte_flow_error_set(error, EINVAL,
3873                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3874                                                   NULL,
3875                                                   "no IP protocol in pattern");
3876         }
3877         return ret;
3878 }
3879
3880 /**
3881  * Validate jump action.
3882  *
3883  * @param[in] action
3884  *   Pointer to the jump action.
3885  * @param[in] action_flags
3886  *   Holds the actions detected until now.
3887  * @param[in] attributes
3888  *   Pointer to flow attributes
3889  * @param[in] external
3890  *   Action belongs to flow rule created by request external to PMD.
3891  * @param[out] error
3892  *   Pointer to error structure.
3893  *
3894  * @return
3895  *   0 on success, a negative errno value otherwise and rte_errno is set.
3896  */
3897 static int
3898 flow_dv_validate_action_jump(struct rte_eth_dev *dev,
3899                              const struct mlx5_flow_tunnel *tunnel,
3900                              const struct rte_flow_action *action,
3901                              uint64_t action_flags,
3902                              const struct rte_flow_attr *attributes,
3903                              bool external, struct rte_flow_error *error)
3904 {
3905         uint32_t target_group, table;
3906         int ret = 0;
3907         struct flow_grp_info grp_info = {
3908                 .external = !!external,
3909                 .transfer = !!attributes->transfer,
3910                 .fdb_def_rule = 1,
3911                 .std_tbl_fix = 0
3912         };
3913         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3914                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3915                 return rte_flow_error_set(error, EINVAL,
3916                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3917                                           "can't have 2 fate actions in"
3918                                           " same flow");
3919         if (action_flags & MLX5_FLOW_ACTION_METER)
3920                 return rte_flow_error_set(error, ENOTSUP,
3921                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3922                                           "jump with meter not support");
3923         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) && fdb_mirror)
3924                 return rte_flow_error_set(error, EINVAL,
3925                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3926                                           "E-Switch mirroring can't support"
3927                                           " Sample action and jump action in"
3928                                           " same flow now");
3929         if (!action->conf)
3930                 return rte_flow_error_set(error, EINVAL,
3931                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3932                                           NULL, "action configuration not set");
3933         target_group =
3934                 ((const struct rte_flow_action_jump *)action->conf)->group;
3935         ret = mlx5_flow_group_to_table(dev, tunnel, target_group, &table,
3936                                        grp_info, error);
3937         if (ret)
3938                 return ret;
3939         if (attributes->group == target_group &&
3940             !(action_flags & (MLX5_FLOW_ACTION_TUNNEL_SET |
3941                               MLX5_FLOW_ACTION_TUNNEL_MATCH)))
3942                 return rte_flow_error_set(error, EINVAL,
3943                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3944                                           "target group must be other than"
3945                                           " the current flow group");
3946         return 0;
3947 }
3948
3949 /*
3950  * Validate the port_id action.
3951  *
3952  * @param[in] dev
3953  *   Pointer to rte_eth_dev structure.
3954  * @param[in] action_flags
3955  *   Bit-fields that holds the actions detected until now.
3956  * @param[in] action
3957  *   Port_id RTE action structure.
3958  * @param[in] attr
3959  *   Attributes of flow that includes this action.
3960  * @param[out] error
3961  *   Pointer to error structure.
3962  *
3963  * @return
3964  *   0 on success, a negative errno value otherwise and rte_errno is set.
3965  */
3966 static int
3967 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
3968                                 uint64_t action_flags,
3969                                 const struct rte_flow_action *action,
3970                                 const struct rte_flow_attr *attr,
3971                                 struct rte_flow_error *error)
3972 {
3973         const struct rte_flow_action_port_id *port_id;
3974         struct mlx5_priv *act_priv;
3975         struct mlx5_priv *dev_priv;
3976         uint16_t port;
3977
3978         if (!attr->transfer)
3979                 return rte_flow_error_set(error, ENOTSUP,
3980                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3981                                           NULL,
3982                                           "port id action is valid in transfer"
3983                                           " mode only");
3984         if (!action || !action->conf)
3985                 return rte_flow_error_set(error, ENOTSUP,
3986                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3987                                           NULL,
3988                                           "port id action parameters must be"
3989                                           " specified");
3990         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3991                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3992                 return rte_flow_error_set(error, EINVAL,
3993                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3994                                           "can have only one fate actions in"
3995                                           " a flow");
3996         dev_priv = mlx5_dev_to_eswitch_info(dev);
3997         if (!dev_priv)
3998                 return rte_flow_error_set(error, rte_errno,
3999                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4000                                           NULL,
4001                                           "failed to obtain E-Switch info");
4002         port_id = action->conf;
4003         port = port_id->original ? dev->data->port_id : port_id->id;
4004         act_priv = mlx5_port_to_eswitch_info(port, false);
4005         if (!act_priv)
4006                 return rte_flow_error_set
4007                                 (error, rte_errno,
4008                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
4009                                  "failed to obtain E-Switch port id for port");
4010         if (act_priv->domain_id != dev_priv->domain_id)
4011                 return rte_flow_error_set
4012                                 (error, EINVAL,
4013                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4014                                  "port does not belong to"
4015                                  " E-Switch being configured");
4016         return 0;
4017 }
4018
4019 /**
4020  * Get the maximum number of modify header actions.
4021  *
4022  * @param dev
4023  *   Pointer to rte_eth_dev structure.
4024  * @param flags
4025  *   Flags bits to check if root level.
4026  *
4027  * @return
4028  *   Max number of modify header actions device can support.
4029  */
4030 static inline unsigned int
4031 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev __rte_unused,
4032                               uint64_t flags)
4033 {
4034         /*
4035          * There's no way to directly query the max capacity from FW.
4036          * The maximal value on root table should be assumed to be supported.
4037          */
4038         if (!(flags & MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL))
4039                 return MLX5_MAX_MODIFY_NUM;
4040         else
4041                 return MLX5_ROOT_TBL_MODIFY_NUM;
4042 }
4043
4044 /**
4045  * Validate the meter action.
4046  *
4047  * @param[in] dev
4048  *   Pointer to rte_eth_dev structure.
4049  * @param[in] action_flags
4050  *   Bit-fields that holds the actions detected until now.
4051  * @param[in] action
4052  *   Pointer to the meter action.
4053  * @param[in] attr
4054  *   Attributes of flow that includes this action.
4055  * @param[out] error
4056  *   Pointer to error structure.
4057  *
4058  * @return
4059  *   0 on success, a negative errno value otherwise and rte_ernno is set.
4060  */
4061 static int
4062 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
4063                                 uint64_t action_flags,
4064                                 const struct rte_flow_action *action,
4065                                 const struct rte_flow_attr *attr,
4066                                 struct rte_flow_error *error)
4067 {
4068         struct mlx5_priv *priv = dev->data->dev_private;
4069         const struct rte_flow_action_meter *am = action->conf;
4070         struct mlx5_flow_meter *fm;
4071
4072         if (!am)
4073                 return rte_flow_error_set(error, EINVAL,
4074                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4075                                           "meter action conf is NULL");
4076
4077         if (action_flags & MLX5_FLOW_ACTION_METER)
4078                 return rte_flow_error_set(error, ENOTSUP,
4079                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4080                                           "meter chaining not support");
4081         if (action_flags & MLX5_FLOW_ACTION_JUMP)
4082                 return rte_flow_error_set(error, ENOTSUP,
4083                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4084                                           "meter with jump not support");
4085         if (!priv->mtr_en)
4086                 return rte_flow_error_set(error, ENOTSUP,
4087                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4088                                           NULL,
4089                                           "meter action not supported");
4090         fm = mlx5_flow_meter_find(priv, am->mtr_id);
4091         if (!fm)
4092                 return rte_flow_error_set(error, EINVAL,
4093                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4094                                           "Meter not found");
4095         if (fm->ref_cnt && (!(fm->transfer == attr->transfer ||
4096               (!fm->ingress && !attr->ingress && attr->egress) ||
4097               (!fm->egress && !attr->egress && attr->ingress))))
4098                 return rte_flow_error_set(error, EINVAL,
4099                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4100                                           "Flow attributes are either invalid "
4101                                           "or have a conflict with current "
4102                                           "meter attributes");
4103         return 0;
4104 }
4105
4106 /**
4107  * Validate the age action.
4108  *
4109  * @param[in] action_flags
4110  *   Holds the actions detected until now.
4111  * @param[in] action
4112  *   Pointer to the age action.
4113  * @param[in] dev
4114  *   Pointer to the Ethernet device structure.
4115  * @param[out] error
4116  *   Pointer to error structure.
4117  *
4118  * @return
4119  *   0 on success, a negative errno value otherwise and rte_errno is set.
4120  */
4121 static int
4122 flow_dv_validate_action_age(uint64_t action_flags,
4123                             const struct rte_flow_action *action,
4124                             struct rte_eth_dev *dev,
4125                             struct rte_flow_error *error)
4126 {
4127         struct mlx5_priv *priv = dev->data->dev_private;
4128         const struct rte_flow_action_age *age = action->conf;
4129
4130         if (!priv->config.devx || priv->sh->cmng.counter_fallback)
4131                 return rte_flow_error_set(error, ENOTSUP,
4132                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4133                                           NULL,
4134                                           "age action not supported");
4135         if (!(action->conf))
4136                 return rte_flow_error_set(error, EINVAL,
4137                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
4138                                           "configuration cannot be null");
4139         if (!(age->timeout))
4140                 return rte_flow_error_set(error, EINVAL,
4141                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
4142                                           "invalid timeout value 0");
4143         if (action_flags & MLX5_FLOW_ACTION_AGE)
4144                 return rte_flow_error_set(error, EINVAL,
4145                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4146                                           "duplicate age actions set");
4147         return 0;
4148 }
4149
4150 /**
4151  * Validate the modify-header IPv4 DSCP actions.
4152  *
4153  * @param[in] action_flags
4154  *   Holds the actions detected until now.
4155  * @param[in] action
4156  *   Pointer to the modify action.
4157  * @param[in] item_flags
4158  *   Holds the items detected.
4159  * @param[out] error
4160  *   Pointer to error structure.
4161  *
4162  * @return
4163  *   0 on success, a negative errno value otherwise and rte_errno is set.
4164  */
4165 static int
4166 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
4167                                          const struct rte_flow_action *action,
4168                                          const uint64_t item_flags,
4169                                          struct rte_flow_error *error)
4170 {
4171         int ret = 0;
4172
4173         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4174         if (!ret) {
4175                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
4176                         return rte_flow_error_set(error, EINVAL,
4177                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4178                                                   NULL,
4179                                                   "no ipv4 item in pattern");
4180         }
4181         return ret;
4182 }
4183
4184 /**
4185  * Validate the modify-header IPv6 DSCP actions.
4186  *
4187  * @param[in] action_flags
4188  *   Holds the actions detected until now.
4189  * @param[in] action
4190  *   Pointer to the modify action.
4191  * @param[in] item_flags
4192  *   Holds the items detected.
4193  * @param[out] error
4194  *   Pointer to error structure.
4195  *
4196  * @return
4197  *   0 on success, a negative errno value otherwise and rte_errno is set.
4198  */
4199 static int
4200 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
4201                                          const struct rte_flow_action *action,
4202                                          const uint64_t item_flags,
4203                                          struct rte_flow_error *error)
4204 {
4205         int ret = 0;
4206
4207         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4208         if (!ret) {
4209                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
4210                         return rte_flow_error_set(error, EINVAL,
4211                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4212                                                   NULL,
4213                                                   "no ipv6 item in pattern");
4214         }
4215         return ret;
4216 }
4217
4218 /**
4219  * Match modify-header resource.
4220  *
4221  * @param list
4222  *   Pointer to the hash list.
4223  * @param entry
4224  *   Pointer to exist resource entry object.
4225  * @param key
4226  *   Key of the new entry.
4227  * @param ctx
4228  *   Pointer to new modify-header resource.
4229  *
4230  * @return
4231  *   0 on matching, non-zero otherwise.
4232  */
4233 int
4234 flow_dv_modify_match_cb(struct mlx5_hlist *list __rte_unused,
4235                         struct mlx5_hlist_entry *entry,
4236                         uint64_t key __rte_unused, void *cb_ctx)
4237 {
4238         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4239         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
4240         struct mlx5_flow_dv_modify_hdr_resource *resource =
4241                         container_of(entry, typeof(*resource), entry);
4242         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
4243
4244         key_len += ref->actions_num * sizeof(ref->actions[0]);
4245         return ref->actions_num != resource->actions_num ||
4246                memcmp(&ref->ft_type, &resource->ft_type, key_len);
4247 }
4248
4249 struct mlx5_hlist_entry *
4250 flow_dv_modify_create_cb(struct mlx5_hlist *list, uint64_t key __rte_unused,
4251                          void *cb_ctx)
4252 {
4253         struct mlx5_dev_ctx_shared *sh = list->ctx;
4254         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4255         struct mlx5dv_dr_domain *ns;
4256         struct mlx5_flow_dv_modify_hdr_resource *entry;
4257         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
4258         int ret;
4259         uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
4260         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
4261
4262         entry = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*entry) + data_len, 0,
4263                             SOCKET_ID_ANY);
4264         if (!entry) {
4265                 rte_flow_error_set(ctx->error, ENOMEM,
4266                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4267                                    "cannot allocate resource memory");
4268                 return NULL;
4269         }
4270         rte_memcpy(&entry->ft_type,
4271                    RTE_PTR_ADD(ref, offsetof(typeof(*ref), ft_type)),
4272                    key_len + data_len);
4273         if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
4274                 ns = sh->fdb_domain;
4275         else if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
4276                 ns = sh->tx_domain;
4277         else
4278                 ns = sh->rx_domain;
4279         ret = mlx5_flow_os_create_flow_action_modify_header
4280                                         (sh->ctx, ns, entry,
4281                                          data_len, &entry->action);
4282         if (ret) {
4283                 mlx5_free(entry);
4284                 rte_flow_error_set(ctx->error, ENOMEM,
4285                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4286                                    NULL, "cannot create modification action");
4287                 return NULL;
4288         }
4289         return &entry->entry;
4290 }
4291
4292 /**
4293  * Validate the sample action.
4294  *
4295  * @param[in] action_flags
4296  *   Holds the actions detected until now.
4297  * @param[in] action
4298  *   Pointer to the sample action.
4299  * @param[in] dev
4300  *   Pointer to the Ethernet device structure.
4301  * @param[in] attr
4302  *   Attributes of flow that includes this action.
4303  * @param[out] error
4304  *   Pointer to error structure.
4305  *
4306  * @return
4307  *   0 on success, a negative errno value otherwise and rte_errno is set.
4308  */
4309 static int
4310 flow_dv_validate_action_sample(uint64_t action_flags,
4311                                const struct rte_flow_action *action,
4312                                struct rte_eth_dev *dev,
4313                                const struct rte_flow_attr *attr,
4314                                struct rte_flow_error *error)
4315 {
4316         struct mlx5_priv *priv = dev->data->dev_private;
4317         struct mlx5_dev_config *dev_conf = &priv->config;
4318         const struct rte_flow_action_sample *sample = action->conf;
4319         const struct rte_flow_action *act;
4320         uint64_t sub_action_flags = 0;
4321         uint16_t queue_index = 0xFFFF;
4322         int actions_n = 0;
4323         int ret;
4324         fdb_mirror = 0;
4325
4326         if (!sample)
4327                 return rte_flow_error_set(error, EINVAL,
4328                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
4329                                           "configuration cannot be NULL");
4330         if (sample->ratio == 0)
4331                 return rte_flow_error_set(error, EINVAL,
4332                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
4333                                           "ratio value starts from 1");
4334         if (!priv->config.devx || (sample->ratio > 0 && !priv->sampler_en))
4335                 return rte_flow_error_set(error, ENOTSUP,
4336                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4337                                           NULL,
4338                                           "sample action not supported");
4339         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
4340                 return rte_flow_error_set(error, EINVAL,
4341                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4342                                           "Multiple sample actions not "
4343                                           "supported");
4344         if (action_flags & MLX5_FLOW_ACTION_METER)
4345                 return rte_flow_error_set(error, EINVAL,
4346                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
4347                                           "wrong action order, meter should "
4348                                           "be after sample action");
4349         if (action_flags & MLX5_FLOW_ACTION_JUMP)
4350                 return rte_flow_error_set(error, EINVAL,
4351                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
4352                                           "wrong action order, jump should "
4353                                           "be after sample action");
4354         act = sample->actions;
4355         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
4356                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
4357                         return rte_flow_error_set(error, ENOTSUP,
4358                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4359                                                   act, "too many actions");
4360                 switch (act->type) {
4361                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4362                         ret = mlx5_flow_validate_action_queue(act,
4363                                                               sub_action_flags,
4364                                                               dev,
4365                                                               attr, error);
4366                         if (ret < 0)
4367                                 return ret;
4368                         queue_index = ((const struct rte_flow_action_queue *)
4369                                                         (act->conf))->index;
4370                         sub_action_flags |= MLX5_FLOW_ACTION_QUEUE;
4371                         ++actions_n;
4372                         break;
4373                 case RTE_FLOW_ACTION_TYPE_MARK:
4374                         ret = flow_dv_validate_action_mark(dev, act,
4375                                                            sub_action_flags,
4376                                                            attr, error);
4377                         if (ret < 0)
4378                                 return ret;
4379                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
4380                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK |
4381                                                 MLX5_FLOW_ACTION_MARK_EXT;
4382                         else
4383                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK;
4384                         ++actions_n;
4385                         break;
4386                 case RTE_FLOW_ACTION_TYPE_COUNT:
4387                         ret = flow_dv_validate_action_count(dev, error);
4388                         if (ret < 0)
4389                                 return ret;
4390                         sub_action_flags |= MLX5_FLOW_ACTION_COUNT;
4391                         ++actions_n;
4392                         break;
4393                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4394                         ret = flow_dv_validate_action_port_id(dev,
4395                                                               sub_action_flags,
4396                                                               act,
4397                                                               attr,
4398                                                               error);
4399                         if (ret)
4400                                 return ret;
4401                         sub_action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4402                         ++actions_n;
4403                         break;
4404                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4405                         ret = flow_dv_validate_action_raw_encap_decap
4406                                 (dev, NULL, act->conf, attr, &sub_action_flags,
4407                                  &actions_n, error);
4408                         if (ret < 0)
4409                                 return ret;
4410                         ++actions_n;
4411                         break;
4412                 default:
4413                         return rte_flow_error_set(error, ENOTSUP,
4414                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4415                                                   NULL,
4416                                                   "Doesn't support optional "
4417                                                   "action");
4418                 }
4419         }
4420         if (attr->ingress && !attr->transfer) {
4421                 if (!(sub_action_flags & MLX5_FLOW_ACTION_QUEUE))
4422                         return rte_flow_error_set(error, EINVAL,
4423                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4424                                                   NULL,
4425                                                   "Ingress must has a dest "
4426                                                   "QUEUE for Sample");
4427         } else if (attr->egress && !attr->transfer) {
4428                 return rte_flow_error_set(error, ENOTSUP,
4429                                           RTE_FLOW_ERROR_TYPE_ACTION,
4430                                           NULL,
4431                                           "Sample Only support Ingress "
4432                                           "or E-Switch");
4433         } else if (sample->actions->type != RTE_FLOW_ACTION_TYPE_END) {
4434                 MLX5_ASSERT(attr->transfer);
4435                 if (sample->ratio > 1)
4436                         return rte_flow_error_set(error, ENOTSUP,
4437                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4438                                                   NULL,
4439                                                   "E-Switch doesn't support "
4440                                                   "any optional action "
4441                                                   "for sampling");
4442                 fdb_mirror = 1;
4443                 if (sub_action_flags & MLX5_FLOW_ACTION_QUEUE)
4444                         return rte_flow_error_set(error, ENOTSUP,
4445                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4446                                                   NULL,
4447                                                   "unsupported action QUEUE");
4448                 if (!(sub_action_flags & MLX5_FLOW_ACTION_PORT_ID))
4449                         return rte_flow_error_set(error, EINVAL,
4450                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4451                                                   NULL,
4452                                                   "E-Switch must has a dest "
4453                                                   "port for mirroring");
4454         }
4455         /* Continue validation for Xcap actions.*/
4456         if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) &&
4457             (queue_index == 0xFFFF ||
4458              mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
4459                 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
4460                      MLX5_FLOW_XCAP_ACTIONS)
4461                         return rte_flow_error_set(error, ENOTSUP,
4462                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4463                                                   NULL, "encap and decap "
4464                                                   "combination aren't "
4465                                                   "supported");
4466                 if (!attr->transfer && attr->ingress && (sub_action_flags &
4467                                                         MLX5_FLOW_ACTION_ENCAP))
4468                         return rte_flow_error_set(error, ENOTSUP,
4469                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4470                                                   NULL, "encap is not supported"
4471                                                   " for ingress traffic");
4472         }
4473         return 0;
4474 }
4475
4476 /**
4477  * Find existing modify-header resource or create and register a new one.
4478  *
4479  * @param dev[in, out]
4480  *   Pointer to rte_eth_dev structure.
4481  * @param[in, out] resource
4482  *   Pointer to modify-header resource.
4483  * @parm[in, out] dev_flow
4484  *   Pointer to the dev_flow.
4485  * @param[out] error
4486  *   pointer to error structure.
4487  *
4488  * @return
4489  *   0 on success otherwise -errno and errno is set.
4490  */
4491 static int
4492 flow_dv_modify_hdr_resource_register
4493                         (struct rte_eth_dev *dev,
4494                          struct mlx5_flow_dv_modify_hdr_resource *resource,
4495                          struct mlx5_flow *dev_flow,
4496                          struct rte_flow_error *error)
4497 {
4498         struct mlx5_priv *priv = dev->data->dev_private;
4499         struct mlx5_dev_ctx_shared *sh = priv->sh;
4500         uint32_t key_len = sizeof(*resource) -
4501                            offsetof(typeof(*resource), ft_type) +
4502                            resource->actions_num * sizeof(resource->actions[0]);
4503         struct mlx5_hlist_entry *entry;
4504         struct mlx5_flow_cb_ctx ctx = {
4505                 .error = error,
4506                 .data = resource,
4507         };
4508
4509         resource->flags = dev_flow->dv.group ? 0 :
4510                           MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
4511         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
4512                                     resource->flags))
4513                 return rte_flow_error_set(error, EOVERFLOW,
4514                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4515                                           "too many modify header items");
4516         resource->entry.key = __rte_raw_cksum(&resource->ft_type, key_len, 0);
4517         entry = mlx5_hlist_register(sh->modify_cmds, resource->entry.key, &ctx);
4518         if (!entry)
4519                 return -rte_errno;
4520         resource = container_of(entry, typeof(*resource), entry);
4521         dev_flow->handle->dvh.modify_hdr = resource;
4522         return 0;
4523 }
4524
4525 /**
4526  * Get DV flow counter by index.
4527  *
4528  * @param[in] dev
4529  *   Pointer to the Ethernet device structure.
4530  * @param[in] idx
4531  *   mlx5 flow counter index in the container.
4532  * @param[out] ppool
4533  *   mlx5 flow counter pool in the container,
4534  *
4535  * @return
4536  *   Pointer to the counter, NULL otherwise.
4537  */
4538 static struct mlx5_flow_counter *
4539 flow_dv_counter_get_by_idx(struct rte_eth_dev *dev,
4540                            uint32_t idx,
4541                            struct mlx5_flow_counter_pool **ppool)
4542 {
4543         struct mlx5_priv *priv = dev->data->dev_private;
4544         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
4545         struct mlx5_flow_counter_pool *pool;
4546
4547         /* Decrease to original index and clear shared bit. */
4548         idx = (idx - 1) & (MLX5_CNT_SHARED_OFFSET - 1);
4549         MLX5_ASSERT(idx / MLX5_COUNTERS_PER_POOL < cmng->n);
4550         pool = cmng->pools[idx / MLX5_COUNTERS_PER_POOL];
4551         MLX5_ASSERT(pool);
4552         if (ppool)
4553                 *ppool = pool;
4554         return MLX5_POOL_GET_CNT(pool, idx % MLX5_COUNTERS_PER_POOL);
4555 }
4556
4557 /**
4558  * Check the devx counter belongs to the pool.
4559  *
4560  * @param[in] pool
4561  *   Pointer to the counter pool.
4562  * @param[in] id
4563  *   The counter devx ID.
4564  *
4565  * @return
4566  *   True if counter belongs to the pool, false otherwise.
4567  */
4568 static bool
4569 flow_dv_is_counter_in_pool(struct mlx5_flow_counter_pool *pool, int id)
4570 {
4571         int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
4572                    MLX5_COUNTERS_PER_POOL;
4573
4574         if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
4575                 return true;
4576         return false;
4577 }
4578
4579 /**
4580  * Get a pool by devx counter ID.
4581  *
4582  * @param[in] cmng
4583  *   Pointer to the counter management.
4584  * @param[in] id
4585  *   The counter devx ID.
4586  *
4587  * @return
4588  *   The counter pool pointer if exists, NULL otherwise,
4589  */
4590 static struct mlx5_flow_counter_pool *
4591 flow_dv_find_pool_by_id(struct mlx5_flow_counter_mng *cmng, int id)
4592 {
4593         uint32_t i;
4594         struct mlx5_flow_counter_pool *pool = NULL;
4595
4596         rte_spinlock_lock(&cmng->pool_update_sl);
4597         /* Check last used pool. */
4598         if (cmng->last_pool_idx != POOL_IDX_INVALID &&
4599             flow_dv_is_counter_in_pool(cmng->pools[cmng->last_pool_idx], id)) {
4600                 pool = cmng->pools[cmng->last_pool_idx];
4601                 goto out;
4602         }
4603         /* ID out of range means no suitable pool in the container. */
4604         if (id > cmng->max_id || id < cmng->min_id)
4605                 goto out;
4606         /*
4607          * Find the pool from the end of the container, since mostly counter
4608          * ID is sequence increasing, and the last pool should be the needed
4609          * one.
4610          */
4611         i = cmng->n_valid;
4612         while (i--) {
4613                 struct mlx5_flow_counter_pool *pool_tmp = cmng->pools[i];
4614
4615                 if (flow_dv_is_counter_in_pool(pool_tmp, id)) {
4616                         pool = pool_tmp;
4617                         break;
4618                 }
4619         }
4620 out:
4621         rte_spinlock_unlock(&cmng->pool_update_sl);
4622         return pool;
4623 }
4624
4625 /**
4626  * Resize a counter container.
4627  *
4628  * @param[in] dev
4629  *   Pointer to the Ethernet device structure.
4630  *
4631  * @return
4632  *   0 on success, otherwise negative errno value and rte_errno is set.
4633  */
4634 static int
4635 flow_dv_container_resize(struct rte_eth_dev *dev)
4636 {
4637         struct mlx5_priv *priv = dev->data->dev_private;
4638         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
4639         void *old_pools = cmng->pools;
4640         uint32_t resize = cmng->n + MLX5_CNT_CONTAINER_RESIZE;
4641         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
4642         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
4643
4644         if (!pools) {
4645                 rte_errno = ENOMEM;
4646                 return -ENOMEM;
4647         }
4648         if (old_pools)
4649                 memcpy(pools, old_pools, cmng->n *
4650                                        sizeof(struct mlx5_flow_counter_pool *));
4651         cmng->n = resize;
4652         cmng->pools = pools;
4653         if (old_pools)
4654                 mlx5_free(old_pools);
4655         return 0;
4656 }
4657
4658 /**
4659  * Query a devx flow counter.
4660  *
4661  * @param[in] dev
4662  *   Pointer to the Ethernet device structure.
4663  * @param[in] cnt
4664  *   Index to the flow counter.
4665  * @param[out] pkts
4666  *   The statistics value of packets.
4667  * @param[out] bytes
4668  *   The statistics value of bytes.
4669  *
4670  * @return
4671  *   0 on success, otherwise a negative errno value and rte_errno is set.
4672  */
4673 static inline int
4674 _flow_dv_query_count(struct rte_eth_dev *dev, uint32_t counter, uint64_t *pkts,
4675                      uint64_t *bytes)
4676 {
4677         struct mlx5_priv *priv = dev->data->dev_private;
4678         struct mlx5_flow_counter_pool *pool = NULL;
4679         struct mlx5_flow_counter *cnt;
4680         int offset;
4681
4682         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
4683         MLX5_ASSERT(pool);
4684         if (priv->sh->cmng.counter_fallback)
4685                 return mlx5_devx_cmd_flow_counter_query(cnt->dcs_when_active, 0,
4686                                         0, pkts, bytes, 0, NULL, NULL, 0);
4687         rte_spinlock_lock(&pool->sl);
4688         if (!pool->raw) {
4689                 *pkts = 0;
4690                 *bytes = 0;
4691         } else {
4692                 offset = MLX5_CNT_ARRAY_IDX(pool, cnt);
4693                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
4694                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
4695         }
4696         rte_spinlock_unlock(&pool->sl);
4697         return 0;
4698 }
4699
4700 /**
4701  * Create and initialize a new counter pool.
4702  *
4703  * @param[in] dev
4704  *   Pointer to the Ethernet device structure.
4705  * @param[out] dcs
4706  *   The devX counter handle.
4707  * @param[in] age
4708  *   Whether the pool is for counter that was allocated for aging.
4709  * @param[in/out] cont_cur
4710  *   Pointer to the container pointer, it will be update in pool resize.
4711  *
4712  * @return
4713  *   The pool container pointer on success, NULL otherwise and rte_errno is set.
4714  */
4715 static struct mlx5_flow_counter_pool *
4716 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
4717                     uint32_t age)
4718 {
4719         struct mlx5_priv *priv = dev->data->dev_private;
4720         struct mlx5_flow_counter_pool *pool;
4721         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
4722         bool fallback = priv->sh->cmng.counter_fallback;
4723         uint32_t size = sizeof(*pool);
4724
4725         size += MLX5_COUNTERS_PER_POOL * MLX5_CNT_SIZE;
4726         size += (!age ? 0 : MLX5_COUNTERS_PER_POOL * MLX5_AGE_SIZE);
4727         pool = mlx5_malloc(MLX5_MEM_ZERO, size, 0, SOCKET_ID_ANY);
4728         if (!pool) {
4729                 rte_errno = ENOMEM;
4730                 return NULL;
4731         }
4732         pool->raw = NULL;
4733         pool->is_aged = !!age;
4734         pool->query_gen = 0;
4735         pool->min_dcs = dcs;
4736         rte_spinlock_init(&pool->sl);
4737         rte_spinlock_init(&pool->csl);
4738         TAILQ_INIT(&pool->counters[0]);
4739         TAILQ_INIT(&pool->counters[1]);
4740         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
4741         rte_spinlock_lock(&cmng->pool_update_sl);
4742         pool->index = cmng->n_valid;
4743         if (pool->index == cmng->n && flow_dv_container_resize(dev)) {
4744                 mlx5_free(pool);
4745                 rte_spinlock_unlock(&cmng->pool_update_sl);
4746                 return NULL;
4747         }
4748         cmng->pools[pool->index] = pool;
4749         cmng->n_valid++;
4750         if (unlikely(fallback)) {
4751                 int base = RTE_ALIGN_FLOOR(dcs->id, MLX5_COUNTERS_PER_POOL);
4752
4753                 if (base < cmng->min_id)
4754                         cmng->min_id = base;
4755                 if (base > cmng->max_id)
4756                         cmng->max_id = base + MLX5_COUNTERS_PER_POOL - 1;
4757                 cmng->last_pool_idx = pool->index;
4758         }
4759         rte_spinlock_unlock(&cmng->pool_update_sl);
4760         return pool;
4761 }
4762
4763 /**
4764  * Prepare a new counter and/or a new counter pool.
4765  *
4766  * @param[in] dev
4767  *   Pointer to the Ethernet device structure.
4768  * @param[out] cnt_free
4769  *   Where to put the pointer of a new counter.
4770  * @param[in] age
4771  *   Whether the pool is for counter that was allocated for aging.
4772  *
4773  * @return
4774  *   The counter pool pointer and @p cnt_free is set on success,
4775  *   NULL otherwise and rte_errno is set.
4776  */
4777 static struct mlx5_flow_counter_pool *
4778 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
4779                              struct mlx5_flow_counter **cnt_free,
4780                              uint32_t age)
4781 {
4782         struct mlx5_priv *priv = dev->data->dev_private;
4783         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
4784         struct mlx5_flow_counter_pool *pool;
4785         struct mlx5_counters tmp_tq;
4786         struct mlx5_devx_obj *dcs = NULL;
4787         struct mlx5_flow_counter *cnt;
4788         enum mlx5_counter_type cnt_type =
4789                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
4790         bool fallback = priv->sh->cmng.counter_fallback;
4791         uint32_t i;
4792
4793         if (fallback) {
4794                 /* bulk_bitmap must be 0 for single counter allocation. */
4795                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
4796                 if (!dcs)
4797                         return NULL;
4798                 pool = flow_dv_find_pool_by_id(cmng, dcs->id);
4799                 if (!pool) {
4800                         pool = flow_dv_pool_create(dev, dcs, age);
4801                         if (!pool) {
4802                                 mlx5_devx_cmd_destroy(dcs);
4803                                 return NULL;
4804                         }
4805                 }
4806                 i = dcs->id % MLX5_COUNTERS_PER_POOL;
4807                 cnt = MLX5_POOL_GET_CNT(pool, i);
4808                 cnt->pool = pool;
4809                 cnt->dcs_when_free = dcs;
4810                 *cnt_free = cnt;
4811                 return pool;
4812         }
4813         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
4814         if (!dcs) {
4815                 rte_errno = ENODATA;
4816                 return NULL;
4817         }
4818         pool = flow_dv_pool_create(dev, dcs, age);
4819         if (!pool) {
4820                 mlx5_devx_cmd_destroy(dcs);
4821                 return NULL;
4822         }
4823         TAILQ_INIT(&tmp_tq);
4824         for (i = 1; i < MLX5_COUNTERS_PER_POOL; ++i) {
4825                 cnt = MLX5_POOL_GET_CNT(pool, i);
4826                 cnt->pool = pool;
4827                 TAILQ_INSERT_HEAD(&tmp_tq, cnt, next);
4828         }
4829         rte_spinlock_lock(&cmng->csl[cnt_type]);
4830         TAILQ_CONCAT(&cmng->counters[cnt_type], &tmp_tq, next);
4831         rte_spinlock_unlock(&cmng->csl[cnt_type]);
4832         *cnt_free = MLX5_POOL_GET_CNT(pool, 0);
4833         (*cnt_free)->pool = pool;
4834         return pool;
4835 }
4836
4837 /**
4838  * Allocate a flow counter.
4839  *
4840  * @param[in] dev
4841  *   Pointer to the Ethernet device structure.
4842  * @param[in] age
4843  *   Whether the counter was allocated for aging.
4844  *
4845  * @return
4846  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
4847  */
4848 static uint32_t
4849 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t age)
4850 {
4851         struct mlx5_priv *priv = dev->data->dev_private;
4852         struct mlx5_flow_counter_pool *pool = NULL;
4853         struct mlx5_flow_counter *cnt_free = NULL;
4854         bool fallback = priv->sh->cmng.counter_fallback;
4855         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
4856         enum mlx5_counter_type cnt_type =
4857                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
4858         uint32_t cnt_idx;
4859
4860         if (!priv->config.devx) {
4861                 rte_errno = ENOTSUP;
4862                 return 0;
4863         }
4864         /* Get free counters from container. */
4865         rte_spinlock_lock(&cmng->csl[cnt_type]);
4866         cnt_free = TAILQ_FIRST(&cmng->counters[cnt_type]);
4867         if (cnt_free)
4868                 TAILQ_REMOVE(&cmng->counters[cnt_type], cnt_free, next);
4869         rte_spinlock_unlock(&cmng->csl[cnt_type]);
4870         if (!cnt_free && !flow_dv_counter_pool_prepare(dev, &cnt_free, age))
4871                 goto err;
4872         pool = cnt_free->pool;
4873         if (fallback)
4874                 cnt_free->dcs_when_active = cnt_free->dcs_when_free;
4875         /* Create a DV counter action only in the first time usage. */
4876         if (!cnt_free->action) {
4877                 uint16_t offset;
4878                 struct mlx5_devx_obj *dcs;
4879                 int ret;
4880
4881                 if (!fallback) {
4882                         offset = MLX5_CNT_ARRAY_IDX(pool, cnt_free);
4883                         dcs = pool->min_dcs;
4884                 } else {
4885                         offset = 0;
4886                         dcs = cnt_free->dcs_when_free;
4887                 }
4888                 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, offset,
4889                                                             &cnt_free->action);
4890                 if (ret) {
4891                         rte_errno = errno;
4892                         goto err;
4893                 }
4894         }
4895         cnt_idx = MLX5_MAKE_CNT_IDX(pool->index,
4896                                 MLX5_CNT_ARRAY_IDX(pool, cnt_free));
4897         /* Update the counter reset values. */
4898         if (_flow_dv_query_count(dev, cnt_idx, &cnt_free->hits,
4899                                  &cnt_free->bytes))
4900                 goto err;
4901         if (!fallback && !priv->sh->cmng.query_thread_on)
4902                 /* Start the asynchronous batch query by the host thread. */
4903                 mlx5_set_query_alarm(priv->sh);
4904         return cnt_idx;
4905 err:
4906         if (cnt_free) {
4907                 cnt_free->pool = pool;
4908                 if (fallback)
4909                         cnt_free->dcs_when_free = cnt_free->dcs_when_active;
4910                 rte_spinlock_lock(&cmng->csl[cnt_type]);
4911                 TAILQ_INSERT_TAIL(&cmng->counters[cnt_type], cnt_free, next);
4912                 rte_spinlock_unlock(&cmng->csl[cnt_type]);
4913         }
4914         return 0;
4915 }
4916
4917 /**
4918  * Allocate a shared flow counter.
4919  *
4920  * @param[in] ctx
4921  *   Pointer to the shared counter configuration.
4922  * @param[in] data
4923  *   Pointer to save the allocated counter index.
4924  *
4925  * @return
4926  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
4927  */
4928
4929 static int32_t
4930 flow_dv_counter_alloc_shared_cb(void *ctx, union mlx5_l3t_data *data)
4931 {
4932         struct mlx5_shared_counter_conf *conf = ctx;
4933         struct rte_eth_dev *dev = conf->dev;
4934         struct mlx5_flow_counter *cnt;
4935
4936         data->dword = flow_dv_counter_alloc(dev, 0);
4937         data->dword |= MLX5_CNT_SHARED_OFFSET;
4938         cnt = flow_dv_counter_get_by_idx(dev, data->dword, NULL);
4939         cnt->shared_info.id = conf->id;
4940         return 0;
4941 }
4942
4943 /**
4944  * Get a shared flow counter.
4945  *
4946  * @param[in] dev
4947  *   Pointer to the Ethernet device structure.
4948  * @param[in] id
4949  *   Counter identifier.
4950  *
4951  * @return
4952  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
4953  */
4954 static uint32_t
4955 flow_dv_counter_get_shared(struct rte_eth_dev *dev, uint32_t id)
4956 {
4957         struct mlx5_priv *priv = dev->data->dev_private;
4958         struct mlx5_shared_counter_conf conf = {
4959                 .dev = dev,
4960                 .id = id,
4961         };
4962         union mlx5_l3t_data data = {
4963                 .dword = 0,
4964         };
4965
4966         mlx5_l3t_prepare_entry(priv->sh->cnt_id_tbl, id, &data,
4967                                flow_dv_counter_alloc_shared_cb, &conf);
4968         return data.dword;
4969 }
4970
4971 /**
4972  * Get age param from counter index.
4973  *
4974  * @param[in] dev
4975  *   Pointer to the Ethernet device structure.
4976  * @param[in] counter
4977  *   Index to the counter handler.
4978  *
4979  * @return
4980  *   The aging parameter specified for the counter index.
4981  */
4982 static struct mlx5_age_param*
4983 flow_dv_counter_idx_get_age(struct rte_eth_dev *dev,
4984                                 uint32_t counter)
4985 {
4986         struct mlx5_flow_counter *cnt;
4987         struct mlx5_flow_counter_pool *pool = NULL;
4988
4989         flow_dv_counter_get_by_idx(dev, counter, &pool);
4990         counter = (counter - 1) % MLX5_COUNTERS_PER_POOL;
4991         cnt = MLX5_POOL_GET_CNT(pool, counter);
4992         return MLX5_CNT_TO_AGE(cnt);
4993 }
4994
4995 /**
4996  * Remove a flow counter from aged counter list.
4997  *
4998  * @param[in] dev
4999  *   Pointer to the Ethernet device structure.
5000  * @param[in] counter
5001  *   Index to the counter handler.
5002  * @param[in] cnt
5003  *   Pointer to the counter handler.
5004  */
5005 static void
5006 flow_dv_counter_remove_from_age(struct rte_eth_dev *dev,
5007                                 uint32_t counter, struct mlx5_flow_counter *cnt)
5008 {
5009         struct mlx5_age_info *age_info;
5010         struct mlx5_age_param *age_param;
5011         struct mlx5_priv *priv = dev->data->dev_private;
5012         uint16_t expected = AGE_CANDIDATE;
5013
5014         age_info = GET_PORT_AGE_INFO(priv);
5015         age_param = flow_dv_counter_idx_get_age(dev, counter);
5016         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
5017                                          AGE_FREE, false, __ATOMIC_RELAXED,
5018                                          __ATOMIC_RELAXED)) {
5019                 /**
5020                  * We need the lock even it is age timeout,
5021                  * since counter may still in process.
5022                  */
5023                 rte_spinlock_lock(&age_info->aged_sl);
5024                 TAILQ_REMOVE(&age_info->aged_counters, cnt, next);
5025                 rte_spinlock_unlock(&age_info->aged_sl);
5026                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
5027         }
5028 }
5029
5030 /**
5031  * Release a flow counter.
5032  *
5033  * @param[in] dev
5034  *   Pointer to the Ethernet device structure.
5035  * @param[in] counter
5036  *   Index to the counter handler.
5037  */
5038 static void
5039 flow_dv_counter_free(struct rte_eth_dev *dev, uint32_t counter)
5040 {
5041         struct mlx5_priv *priv = dev->data->dev_private;
5042         struct mlx5_flow_counter_pool *pool = NULL;
5043         struct mlx5_flow_counter *cnt;
5044         enum mlx5_counter_type cnt_type;
5045
5046         if (!counter)
5047                 return;
5048         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
5049         MLX5_ASSERT(pool);
5050         if (IS_SHARED_CNT(counter) &&
5051             mlx5_l3t_clear_entry(priv->sh->cnt_id_tbl, cnt->shared_info.id))
5052                 return;
5053         if (pool->is_aged)
5054                 flow_dv_counter_remove_from_age(dev, counter, cnt);
5055         cnt->pool = pool;
5056         /*
5057          * Put the counter back to list to be updated in none fallback mode.
5058          * Currently, we are using two list alternately, while one is in query,
5059          * add the freed counter to the other list based on the pool query_gen
5060          * value. After query finishes, add counter the list to the global
5061          * container counter list. The list changes while query starts. In
5062          * this case, lock will not be needed as query callback and release
5063          * function both operate with the different list.
5064          *
5065          */
5066         if (!priv->sh->cmng.counter_fallback) {
5067                 rte_spinlock_lock(&pool->csl);
5068                 TAILQ_INSERT_TAIL(&pool->counters[pool->query_gen], cnt, next);
5069                 rte_spinlock_unlock(&pool->csl);
5070         } else {
5071                 cnt->dcs_when_free = cnt->dcs_when_active;
5072                 cnt_type = pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
5073                                            MLX5_COUNTER_TYPE_ORIGIN;
5074                 rte_spinlock_lock(&priv->sh->cmng.csl[cnt_type]);
5075                 TAILQ_INSERT_TAIL(&priv->sh->cmng.counters[cnt_type],
5076                                   cnt, next);
5077                 rte_spinlock_unlock(&priv->sh->cmng.csl[cnt_type]);
5078         }
5079 }
5080
5081 /**
5082  * Verify the @p attributes will be correctly understood by the NIC and store
5083  * them in the @p flow if everything is correct.
5084  *
5085  * @param[in] dev
5086  *   Pointer to dev struct.
5087  * @param[in] attributes
5088  *   Pointer to flow attributes
5089  * @param[in] external
5090  *   This flow rule is created by request external to PMD.
5091  * @param[out] error
5092  *   Pointer to error structure.
5093  *
5094  * @return
5095  *   - 0 on success and non root table.
5096  *   - 1 on success and root table.
5097  *   - a negative errno value otherwise and rte_errno is set.
5098  */
5099 static int
5100 flow_dv_validate_attributes(struct rte_eth_dev *dev,
5101                             const struct mlx5_flow_tunnel *tunnel,
5102                             const struct rte_flow_attr *attributes,
5103                             struct flow_grp_info grp_info,
5104                             struct rte_flow_error *error)
5105 {
5106         struct mlx5_priv *priv = dev->data->dev_private;
5107         uint32_t priority_max = priv->config.flow_prio - 1;
5108         int ret = 0;
5109
5110 #ifndef HAVE_MLX5DV_DR
5111         RTE_SET_USED(tunnel);
5112         RTE_SET_USED(grp_info);
5113         if (attributes->group)
5114                 return rte_flow_error_set(error, ENOTSUP,
5115                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
5116                                           NULL,
5117                                           "groups are not supported");
5118 #else
5119         uint32_t table = 0;
5120
5121         ret = mlx5_flow_group_to_table(dev, tunnel, attributes->group, &table,
5122                                        grp_info, error);
5123         if (ret)
5124                 return ret;
5125         if (!table)
5126                 ret = MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
5127 #endif
5128         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
5129             attributes->priority >= priority_max)
5130                 return rte_flow_error_set(error, ENOTSUP,
5131                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
5132                                           NULL,
5133                                           "priority out of range");
5134         if (attributes->transfer) {
5135                 if (!priv->config.dv_esw_en)
5136                         return rte_flow_error_set
5137                                 (error, ENOTSUP,
5138                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5139                                  "E-Switch dr is not supported");
5140                 if (!(priv->representor || priv->master))
5141                         return rte_flow_error_set
5142                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5143                                  NULL, "E-Switch configuration can only be"
5144                                  " done by a master or a representor device");
5145                 if (attributes->egress)
5146                         return rte_flow_error_set
5147                                 (error, ENOTSUP,
5148                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
5149                                  "egress is not supported");
5150         }
5151         if (!(attributes->egress ^ attributes->ingress))
5152                 return rte_flow_error_set(error, ENOTSUP,
5153                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
5154                                           "must specify exactly one of "
5155                                           "ingress or egress");
5156         return ret;
5157 }
5158
5159 /**
5160  * Internal validation function. For validating both actions and items.
5161  *
5162  * @param[in] dev
5163  *   Pointer to the rte_eth_dev structure.
5164  * @param[in] attr
5165  *   Pointer to the flow attributes.
5166  * @param[in] items
5167  *   Pointer to the list of items.
5168  * @param[in] actions
5169  *   Pointer to the list of actions.
5170  * @param[in] external
5171  *   This flow rule is created by request external to PMD.
5172  * @param[in] hairpin
5173  *   Number of hairpin TX actions, 0 means classic flow.
5174  * @param[out] error
5175  *   Pointer to the error structure.
5176  *
5177  * @return
5178  *   0 on success, a negative errno value otherwise and rte_errno is set.
5179  */
5180 static int
5181 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
5182                  const struct rte_flow_item items[],
5183                  const struct rte_flow_action actions[],
5184                  bool external, int hairpin, struct rte_flow_error *error)
5185 {
5186         int ret;
5187         uint64_t action_flags = 0;
5188         uint64_t item_flags = 0;
5189         uint64_t last_item = 0;
5190         uint8_t next_protocol = 0xff;
5191         uint16_t ether_type = 0;
5192         int actions_n = 0;
5193         uint8_t item_ipv6_proto = 0;
5194         const struct rte_flow_item *gre_item = NULL;
5195         const struct rte_flow_action_raw_decap *decap;
5196         const struct rte_flow_action_raw_encap *encap;
5197         const struct rte_flow_action_rss *rss;
5198         const struct rte_flow_item_tcp nic_tcp_mask = {
5199                 .hdr = {
5200                         .tcp_flags = 0xFF,
5201                         .src_port = RTE_BE16(UINT16_MAX),
5202                         .dst_port = RTE_BE16(UINT16_MAX),
5203                 }
5204         };
5205         const struct rte_flow_item_ipv6 nic_ipv6_mask = {
5206                 .hdr = {
5207                         .src_addr =
5208                         "\xff\xff\xff\xff\xff\xff\xff\xff"
5209                         "\xff\xff\xff\xff\xff\xff\xff\xff",
5210                         .dst_addr =
5211                         "\xff\xff\xff\xff\xff\xff\xff\xff"
5212                         "\xff\xff\xff\xff\xff\xff\xff\xff",
5213                         .vtc_flow = RTE_BE32(0xffffffff),
5214                         .proto = 0xff,
5215                         .hop_limits = 0xff,
5216                 },
5217                 .has_frag_ext = 1,
5218         };
5219         const struct rte_flow_item_ecpri nic_ecpri_mask = {
5220                 .hdr = {
5221                         .common = {
5222                                 .u32 =
5223                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
5224                                         .type = 0xFF,
5225                                         }).u32),
5226                         },
5227                         .dummy[0] = 0xffffffff,
5228                 },
5229         };
5230         struct mlx5_priv *priv = dev->data->dev_private;
5231         struct mlx5_dev_config *dev_conf = &priv->config;
5232         uint16_t queue_index = 0xFFFF;
5233         const struct rte_flow_item_vlan *vlan_m = NULL;
5234         int16_t rw_act_num = 0;
5235         uint64_t is_root;
5236         const struct mlx5_flow_tunnel *tunnel;
5237         struct flow_grp_info grp_info = {
5238                 .external = !!external,
5239                 .transfer = !!attr->transfer,
5240                 .fdb_def_rule = !!priv->fdb_def_rule,
5241         };
5242         const struct rte_eth_hairpin_conf *conf;
5243
5244         if (items == NULL)
5245                 return -1;
5246         if (is_flow_tunnel_match_rule(dev, attr, items, actions)) {
5247                 tunnel = flow_items_to_tunnel(items);
5248                 action_flags |= MLX5_FLOW_ACTION_TUNNEL_MATCH |
5249                                 MLX5_FLOW_ACTION_DECAP;
5250         } else if (is_flow_tunnel_steer_rule(dev, attr, items, actions)) {
5251                 tunnel = flow_actions_to_tunnel(actions);
5252                 action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
5253         } else {
5254                 tunnel = NULL;
5255         }
5256         grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
5257                                 (dev, tunnel, attr, items, actions);
5258         ret = flow_dv_validate_attributes(dev, tunnel, attr, grp_info, error);
5259         if (ret < 0)
5260                 return ret;
5261         is_root = (uint64_t)ret;
5262         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
5263                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
5264                 int type = items->type;
5265
5266                 if (!mlx5_flow_os_item_supported(type))
5267                         return rte_flow_error_set(error, ENOTSUP,
5268                                                   RTE_FLOW_ERROR_TYPE_ITEM,
5269                                                   NULL, "item not supported");
5270                 switch (type) {
5271                 case MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL:
5272                         if (items[0].type != (typeof(items[0].type))
5273                                                 MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL)
5274                                 return rte_flow_error_set
5275                                                 (error, EINVAL,
5276                                                 RTE_FLOW_ERROR_TYPE_ITEM,
5277                                                 NULL, "MLX5 private items "
5278                                                 "must be the first");
5279                         break;
5280                 case RTE_FLOW_ITEM_TYPE_VOID:
5281                         break;
5282                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
5283                         ret = flow_dv_validate_item_port_id
5284                                         (dev, items, attr, item_flags, error);
5285                         if (ret < 0)
5286                                 return ret;
5287                         last_item = MLX5_FLOW_ITEM_PORT_ID;
5288                         break;
5289                 case RTE_FLOW_ITEM_TYPE_ETH:
5290                         ret = mlx5_flow_validate_item_eth(items, item_flags,
5291                                                           true, error);
5292                         if (ret < 0)
5293                                 return ret;
5294                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
5295                                              MLX5_FLOW_LAYER_OUTER_L2;
5296                         if (items->mask != NULL && items->spec != NULL) {
5297                                 ether_type =
5298                                         ((const struct rte_flow_item_eth *)
5299                                          items->spec)->type;
5300                                 ether_type &=
5301                                         ((const struct rte_flow_item_eth *)
5302                                          items->mask)->type;
5303                                 ether_type = rte_be_to_cpu_16(ether_type);
5304                         } else {
5305                                 ether_type = 0;
5306                         }
5307                         break;
5308                 case RTE_FLOW_ITEM_TYPE_VLAN:
5309                         ret = flow_dv_validate_item_vlan(items, item_flags,
5310                                                          dev, error);
5311                         if (ret < 0)
5312                                 return ret;
5313                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
5314                                              MLX5_FLOW_LAYER_OUTER_VLAN;
5315                         if (items->mask != NULL && items->spec != NULL) {
5316                                 ether_type =
5317                                         ((const struct rte_flow_item_vlan *)
5318                                          items->spec)->inner_type;
5319                                 ether_type &=
5320                                         ((const struct rte_flow_item_vlan *)
5321                                          items->mask)->inner_type;
5322                                 ether_type = rte_be_to_cpu_16(ether_type);
5323                         } else {
5324                                 ether_type = 0;
5325                         }
5326                         /* Store outer VLAN mask for of_push_vlan action. */
5327                         if (!tunnel)
5328                                 vlan_m = items->mask;
5329                         break;
5330                 case RTE_FLOW_ITEM_TYPE_IPV4:
5331                         mlx5_flow_tunnel_ip_check(items, next_protocol,
5332                                                   &item_flags, &tunnel);
5333                         ret = flow_dv_validate_item_ipv4(items, item_flags,
5334                                                          last_item, ether_type,
5335                                                          error);
5336                         if (ret < 0)
5337                                 return ret;
5338                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
5339                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
5340                         if (items->mask != NULL &&
5341                             ((const struct rte_flow_item_ipv4 *)
5342                              items->mask)->hdr.next_proto_id) {
5343                                 next_protocol =
5344                                         ((const struct rte_flow_item_ipv4 *)
5345                                          (items->spec))->hdr.next_proto_id;
5346                                 next_protocol &=
5347                                         ((const struct rte_flow_item_ipv4 *)
5348                                          (items->mask))->hdr.next_proto_id;
5349                         } else {
5350                                 /* Reset for inner layer. */
5351                                 next_protocol = 0xff;
5352                         }
5353                         break;
5354                 case RTE_FLOW_ITEM_TYPE_IPV6:
5355                         mlx5_flow_tunnel_ip_check(items, next_protocol,
5356                                                   &item_flags, &tunnel);
5357                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
5358                                                            last_item,
5359                                                            ether_type,
5360                                                            &nic_ipv6_mask,
5361                                                            error);
5362                         if (ret < 0)
5363                                 return ret;
5364                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
5365                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
5366                         if (items->mask != NULL &&
5367                             ((const struct rte_flow_item_ipv6 *)
5368                              items->mask)->hdr.proto) {
5369                                 item_ipv6_proto =
5370                                         ((const struct rte_flow_item_ipv6 *)
5371                                          items->spec)->hdr.proto;
5372                                 next_protocol =
5373                                         ((const struct rte_flow_item_ipv6 *)
5374                                          items->spec)->hdr.proto;
5375                                 next_protocol &=
5376                                         ((const struct rte_flow_item_ipv6 *)
5377                                          items->mask)->hdr.proto;
5378                         } else {
5379                                 /* Reset for inner layer. */
5380                                 next_protocol = 0xff;
5381                         }
5382                         break;
5383                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
5384                         ret = flow_dv_validate_item_ipv6_frag_ext(items,
5385                                                                   item_flags,
5386                                                                   error);
5387                         if (ret < 0)
5388                                 return ret;
5389                         last_item = tunnel ?
5390                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
5391                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
5392                         if (items->mask != NULL &&
5393                             ((const struct rte_flow_item_ipv6_frag_ext *)
5394                              items->mask)->hdr.next_header) {
5395                                 next_protocol =
5396                                 ((const struct rte_flow_item_ipv6_frag_ext *)
5397                                  items->spec)->hdr.next_header;
5398                                 next_protocol &=
5399                                 ((const struct rte_flow_item_ipv6_frag_ext *)
5400                                  items->mask)->hdr.next_header;
5401                         } else {
5402                                 /* Reset for inner layer. */
5403                                 next_protocol = 0xff;
5404                         }
5405                         break;
5406                 case RTE_FLOW_ITEM_TYPE_TCP:
5407                         ret = mlx5_flow_validate_item_tcp
5408                                                 (items, item_flags,
5409                                                  next_protocol,
5410                                                  &nic_tcp_mask,
5411                                                  error);
5412                         if (ret < 0)
5413                                 return ret;
5414                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
5415                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
5416                         break;
5417                 case RTE_FLOW_ITEM_TYPE_UDP:
5418                         ret = mlx5_flow_validate_item_udp(items, item_flags,
5419                                                           next_protocol,
5420                                                           error);
5421                         if (ret < 0)
5422                                 return ret;
5423                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
5424                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
5425                         break;
5426                 case RTE_FLOW_ITEM_TYPE_GRE:
5427                         ret = mlx5_flow_validate_item_gre(items, item_flags,
5428                                                           next_protocol, error);
5429                         if (ret < 0)
5430                                 return ret;
5431                         gre_item = items;
5432                         last_item = MLX5_FLOW_LAYER_GRE;
5433                         break;
5434                 case RTE_FLOW_ITEM_TYPE_NVGRE:
5435                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
5436                                                             next_protocol,
5437                                                             error);
5438                         if (ret < 0)
5439                                 return ret;
5440                         last_item = MLX5_FLOW_LAYER_NVGRE;
5441                         break;
5442                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
5443                         ret = mlx5_flow_validate_item_gre_key
5444                                 (items, item_flags, gre_item, error);
5445                         if (ret < 0)
5446                                 return ret;
5447                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
5448                         break;
5449                 case RTE_FLOW_ITEM_TYPE_VXLAN:
5450                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
5451                                                             error);
5452                         if (ret < 0)
5453                                 return ret;
5454                         last_item = MLX5_FLOW_LAYER_VXLAN;
5455                         break;
5456                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
5457                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
5458                                                                 item_flags, dev,
5459                                                                 error);
5460                         if (ret < 0)
5461                                 return ret;
5462                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
5463                         break;
5464                 case RTE_FLOW_ITEM_TYPE_GENEVE:
5465                         ret = mlx5_flow_validate_item_geneve(items,
5466                                                              item_flags, dev,
5467                                                              error);
5468                         if (ret < 0)
5469                                 return ret;
5470                         last_item = MLX5_FLOW_LAYER_GENEVE;
5471                         break;
5472                 case RTE_FLOW_ITEM_TYPE_MPLS:
5473                         ret = mlx5_flow_validate_item_mpls(dev, items,
5474                                                            item_flags,
5475                                                            last_item, error);
5476                         if (ret < 0)
5477                                 return ret;
5478                         last_item = MLX5_FLOW_LAYER_MPLS;
5479                         break;
5480
5481                 case RTE_FLOW_ITEM_TYPE_MARK:
5482                         ret = flow_dv_validate_item_mark(dev, items, attr,
5483                                                          error);
5484                         if (ret < 0)
5485                                 return ret;
5486                         last_item = MLX5_FLOW_ITEM_MARK;
5487                         break;
5488                 case RTE_FLOW_ITEM_TYPE_META:
5489                         ret = flow_dv_validate_item_meta(dev, items, attr,
5490                                                          error);
5491                         if (ret < 0)
5492                                 return ret;
5493                         last_item = MLX5_FLOW_ITEM_METADATA;
5494                         break;
5495                 case RTE_FLOW_ITEM_TYPE_ICMP:
5496                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
5497                                                            next_protocol,
5498                                                            error);
5499                         if (ret < 0)
5500                                 return ret;
5501                         last_item = MLX5_FLOW_LAYER_ICMP;
5502                         break;
5503                 case RTE_FLOW_ITEM_TYPE_ICMP6:
5504                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
5505                                                             next_protocol,
5506                                                             error);
5507                         if (ret < 0)
5508                                 return ret;
5509                         item_ipv6_proto = IPPROTO_ICMPV6;
5510                         last_item = MLX5_FLOW_LAYER_ICMP6;
5511                         break;
5512                 case RTE_FLOW_ITEM_TYPE_TAG:
5513                         ret = flow_dv_validate_item_tag(dev, items,
5514                                                         attr, error);
5515                         if (ret < 0)
5516                                 return ret;
5517                         last_item = MLX5_FLOW_ITEM_TAG;
5518                         break;
5519                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
5520                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
5521                         break;
5522                 case RTE_FLOW_ITEM_TYPE_GTP:
5523                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
5524                                                         error);
5525                         if (ret < 0)
5526                                 return ret;
5527                         last_item = MLX5_FLOW_LAYER_GTP;
5528                         break;
5529                 case RTE_FLOW_ITEM_TYPE_ECPRI:
5530                         /* Capacity will be checked in the translate stage. */
5531                         ret = mlx5_flow_validate_item_ecpri(items, item_flags,
5532                                                             last_item,
5533                                                             ether_type,
5534                                                             &nic_ecpri_mask,
5535                                                             error);
5536                         if (ret < 0)
5537                                 return ret;
5538                         last_item = MLX5_FLOW_LAYER_ECPRI;
5539                         break;
5540                 default:
5541                         return rte_flow_error_set(error, ENOTSUP,
5542                                                   RTE_FLOW_ERROR_TYPE_ITEM,
5543                                                   NULL, "item not supported");
5544                 }
5545                 item_flags |= last_item;
5546         }
5547         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5548                 int type = actions->type;
5549
5550                 if (!mlx5_flow_os_action_supported(type))
5551                         return rte_flow_error_set(error, ENOTSUP,
5552                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5553                                                   actions,
5554                                                   "action not supported");
5555                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
5556                         return rte_flow_error_set(error, ENOTSUP,
5557                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5558                                                   actions, "too many actions");
5559                 switch (type) {
5560                 case RTE_FLOW_ACTION_TYPE_VOID:
5561                         break;
5562                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5563                         ret = flow_dv_validate_action_port_id(dev,
5564                                                               action_flags,
5565                                                               actions,
5566                                                               attr,
5567                                                               error);
5568                         if (ret)
5569                                 return ret;
5570                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
5571                         ++actions_n;
5572                         break;
5573                 case RTE_FLOW_ACTION_TYPE_FLAG:
5574                         ret = flow_dv_validate_action_flag(dev, action_flags,
5575                                                            attr, error);
5576                         if (ret < 0)
5577                                 return ret;
5578                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
5579                                 /* Count all modify-header actions as one. */
5580                                 if (!(action_flags &
5581                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
5582                                         ++actions_n;
5583                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
5584                                                 MLX5_FLOW_ACTION_MARK_EXT;
5585                         } else {
5586                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
5587                                 ++actions_n;
5588                         }
5589                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
5590                         break;
5591                 case RTE_FLOW_ACTION_TYPE_MARK:
5592                         ret = flow_dv_validate_action_mark(dev, actions,
5593                                                            action_flags,
5594                                                            attr, error);
5595                         if (ret < 0)
5596                                 return ret;
5597                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
5598                                 /* Count all modify-header actions as one. */
5599                                 if (!(action_flags &
5600                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
5601                                         ++actions_n;
5602                                 action_flags |= MLX5_FLOW_ACTION_MARK |
5603                                                 MLX5_FLOW_ACTION_MARK_EXT;
5604                         } else {
5605                                 action_flags |= MLX5_FLOW_ACTION_MARK;
5606                                 ++actions_n;
5607                         }
5608                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
5609                         break;
5610                 case RTE_FLOW_ACTION_TYPE_SET_META:
5611                         ret = flow_dv_validate_action_set_meta(dev, actions,
5612                                                                action_flags,
5613                                                                attr, error);
5614                         if (ret < 0)
5615                                 return ret;
5616                         /* Count all modify-header actions as one action. */
5617                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5618                                 ++actions_n;
5619                         action_flags |= MLX5_FLOW_ACTION_SET_META;
5620                         rw_act_num += MLX5_ACT_NUM_SET_META;
5621                         break;
5622                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
5623                         ret = flow_dv_validate_action_set_tag(dev, actions,
5624                                                               action_flags,
5625                                                               attr, error);
5626                         if (ret < 0)
5627                                 return ret;
5628                         /* Count all modify-header actions as one action. */
5629                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5630                                 ++actions_n;
5631                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
5632                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
5633                         break;
5634                 case RTE_FLOW_ACTION_TYPE_DROP:
5635                         ret = mlx5_flow_validate_action_drop(action_flags,
5636                                                              attr, error);
5637                         if (ret < 0)
5638                                 return ret;
5639                         action_flags |= MLX5_FLOW_ACTION_DROP;
5640                         ++actions_n;
5641                         break;
5642                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5643                         ret = mlx5_flow_validate_action_queue(actions,
5644                                                               action_flags, dev,
5645                                                               attr, error);
5646                         if (ret < 0)
5647                                 return ret;
5648                         queue_index = ((const struct rte_flow_action_queue *)
5649                                                         (actions->conf))->index;
5650                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
5651                         ++actions_n;
5652                         break;
5653                 case RTE_FLOW_ACTION_TYPE_RSS:
5654                         rss = actions->conf;
5655                         ret = mlx5_flow_validate_action_rss(actions,
5656                                                             action_flags, dev,
5657                                                             attr, item_flags,
5658                                                             error);
5659                         if (ret < 0)
5660                                 return ret;
5661                         if (rss != NULL && rss->queue_num)
5662                                 queue_index = rss->queue[0];
5663                         action_flags |= MLX5_FLOW_ACTION_RSS;
5664                         ++actions_n;
5665                         break;
5666                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
5667                         ret =
5668                         mlx5_flow_validate_action_default_miss(action_flags,
5669                                         attr, error);
5670                         if (ret < 0)
5671                                 return ret;
5672                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
5673                         ++actions_n;
5674                         break;
5675                 case RTE_FLOW_ACTION_TYPE_COUNT:
5676                         ret = flow_dv_validate_action_count(dev, error);
5677                         if (ret < 0)
5678                                 return ret;
5679                         action_flags |= MLX5_FLOW_ACTION_COUNT;
5680                         ++actions_n;
5681                         break;
5682                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
5683                         if (flow_dv_validate_action_pop_vlan(dev,
5684                                                              action_flags,
5685                                                              actions,
5686                                                              item_flags, attr,
5687                                                              error))
5688                                 return -rte_errno;
5689                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
5690                         ++actions_n;
5691                         break;
5692                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5693                         ret = flow_dv_validate_action_push_vlan(dev,
5694                                                                 action_flags,
5695                                                                 vlan_m,
5696                                                                 actions, attr,
5697                                                                 error);
5698                         if (ret < 0)
5699                                 return ret;
5700                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
5701                         ++actions_n;
5702                         break;
5703                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
5704                         ret = flow_dv_validate_action_set_vlan_pcp
5705                                                 (action_flags, actions, error);
5706                         if (ret < 0)
5707                                 return ret;
5708                         /* Count PCP with push_vlan command. */
5709                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
5710                         break;
5711                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
5712                         ret = flow_dv_validate_action_set_vlan_vid
5713                                                 (item_flags, action_flags,
5714                                                  actions, error);
5715                         if (ret < 0)
5716                                 return ret;
5717                         /* Count VID with push_vlan command. */
5718                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
5719                         rw_act_num += MLX5_ACT_NUM_MDF_VID;
5720                         break;
5721                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5722                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5723                         ret = flow_dv_validate_action_l2_encap(dev,
5724                                                                action_flags,
5725                                                                actions, attr,
5726                                                                error);
5727                         if (ret < 0)
5728                                 return ret;
5729                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
5730                         ++actions_n;
5731                         break;
5732                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5733                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5734                         ret = flow_dv_validate_action_decap(dev, action_flags,
5735                                                             attr, error);
5736                         if (ret < 0)
5737                                 return ret;
5738                         action_flags |= MLX5_FLOW_ACTION_DECAP;
5739                         ++actions_n;
5740                         break;
5741                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5742                         ret = flow_dv_validate_action_raw_encap_decap
5743                                 (dev, NULL, actions->conf, attr, &action_flags,
5744                                  &actions_n, error);
5745                         if (ret < 0)
5746                                 return ret;
5747                         break;
5748                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5749                         decap = actions->conf;
5750                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
5751                                 ;
5752                         if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
5753                                 encap = NULL;
5754                                 actions--;
5755                         } else {
5756                                 encap = actions->conf;
5757                         }
5758                         ret = flow_dv_validate_action_raw_encap_decap
5759                                            (dev,
5760                                             decap ? decap : &empty_decap, encap,
5761                                             attr, &action_flags, &actions_n,
5762                                             error);
5763                         if (ret < 0)
5764                                 return ret;
5765                         break;
5766                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
5767                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
5768                         ret = flow_dv_validate_action_modify_mac(action_flags,
5769                                                                  actions,
5770                                                                  item_flags,
5771                                                                  error);
5772                         if (ret < 0)
5773                                 return ret;
5774                         /* Count all modify-header actions as one action. */
5775                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5776                                 ++actions_n;
5777                         action_flags |= actions->type ==
5778                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
5779                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
5780                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
5781                         /*
5782                          * Even if the source and destination MAC addresses have
5783                          * overlap in the header with 4B alignment, the convert
5784                          * function will handle them separately and 4 SW actions
5785                          * will be created. And 2 actions will be added each
5786                          * time no matter how many bytes of address will be set.
5787                          */
5788                         rw_act_num += MLX5_ACT_NUM_MDF_MAC;
5789                         break;
5790                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
5791                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
5792                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
5793                                                                   actions,
5794                                                                   item_flags,
5795                                                                   error);
5796                         if (ret < 0)
5797                                 return ret;
5798                         /* Count all modify-header actions as one action. */
5799                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5800                                 ++actions_n;
5801                         action_flags |= actions->type ==
5802                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
5803                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
5804                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
5805                         rw_act_num += MLX5_ACT_NUM_MDF_IPV4;
5806                         break;
5807                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
5808                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
5809                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
5810                                                                   actions,
5811                                                                   item_flags,
5812                                                                   error);
5813                         if (ret < 0)
5814                                 return ret;
5815                         if (item_ipv6_proto == IPPROTO_ICMPV6)
5816                                 return rte_flow_error_set(error, ENOTSUP,
5817                                         RTE_FLOW_ERROR_TYPE_ACTION,
5818                                         actions,
5819                                         "Can't change header "
5820                                         "with ICMPv6 proto");
5821                         /* Count all modify-header actions as one action. */
5822                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5823                                 ++actions_n;
5824                         action_flags |= actions->type ==
5825                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
5826                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
5827                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
5828                         rw_act_num += MLX5_ACT_NUM_MDF_IPV6;
5829                         break;
5830                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
5831                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
5832                         ret = flow_dv_validate_action_modify_tp(action_flags,
5833                                                                 actions,
5834                                                                 item_flags,
5835                                                                 error);
5836                         if (ret < 0)
5837                                 return ret;
5838                         /* Count all modify-header actions as one action. */
5839                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5840                                 ++actions_n;
5841                         action_flags |= actions->type ==
5842                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
5843                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
5844                                                 MLX5_FLOW_ACTION_SET_TP_DST;
5845                         rw_act_num += MLX5_ACT_NUM_MDF_PORT;
5846                         break;
5847                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
5848                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
5849                         ret = flow_dv_validate_action_modify_ttl(action_flags,
5850                                                                  actions,
5851                                                                  item_flags,
5852                                                                  error);
5853                         if (ret < 0)
5854                                 return ret;
5855                         /* Count all modify-header actions as one action. */
5856                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5857                                 ++actions_n;
5858                         action_flags |= actions->type ==
5859                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
5860                                                 MLX5_FLOW_ACTION_SET_TTL :
5861                                                 MLX5_FLOW_ACTION_DEC_TTL;
5862                         rw_act_num += MLX5_ACT_NUM_MDF_TTL;
5863                         break;
5864                 case RTE_FLOW_ACTION_TYPE_JUMP:
5865                         ret = flow_dv_validate_action_jump(dev, tunnel, actions,
5866                                                            action_flags,
5867                                                            attr, external,
5868                                                            error);
5869                         if (ret)
5870                                 return ret;
5871                         ++actions_n;
5872                         action_flags |= MLX5_FLOW_ACTION_JUMP;
5873                         break;
5874                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
5875                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
5876                         ret = flow_dv_validate_action_modify_tcp_seq
5877                                                                 (action_flags,
5878                                                                  actions,
5879                                                                  item_flags,
5880                                                                  error);
5881                         if (ret < 0)
5882                                 return ret;
5883                         /* Count all modify-header actions as one action. */
5884                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5885                                 ++actions_n;
5886                         action_flags |= actions->type ==
5887                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
5888                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
5889                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
5890                         rw_act_num += MLX5_ACT_NUM_MDF_TCPSEQ;
5891                         break;
5892                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5893                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5894                         ret = flow_dv_validate_action_modify_tcp_ack
5895                                                                 (action_flags,
5896                                                                  actions,
5897                                                                  item_flags,
5898                                                                  error);
5899                         if (ret < 0)
5900                                 return ret;
5901                         /* Count all modify-header actions as one action. */
5902                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5903                                 ++actions_n;
5904                         action_flags |= actions->type ==
5905                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
5906                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
5907                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
5908                         rw_act_num += MLX5_ACT_NUM_MDF_TCPACK;
5909                         break;
5910                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
5911                         break;
5912                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
5913                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
5914                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
5915                         break;
5916                 case RTE_FLOW_ACTION_TYPE_METER:
5917                         ret = mlx5_flow_validate_action_meter(dev,
5918                                                               action_flags,
5919                                                               actions, attr,
5920                                                               error);
5921                         if (ret < 0)
5922                                 return ret;
5923                         action_flags |= MLX5_FLOW_ACTION_METER;
5924                         ++actions_n;
5925                         /* Meter action will add one more TAG action. */
5926                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
5927                         break;
5928                 case RTE_FLOW_ACTION_TYPE_AGE:
5929                         ret = flow_dv_validate_action_age(action_flags,
5930                                                           actions, dev,
5931                                                           error);
5932                         if (ret < 0)
5933                                 return ret;
5934                         action_flags |= MLX5_FLOW_ACTION_AGE;
5935                         ++actions_n;
5936                         break;
5937                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5938                         ret = flow_dv_validate_action_modify_ipv4_dscp
5939                                                          (action_flags,
5940                                                           actions,
5941                                                           item_flags,
5942                                                           error);
5943                         if (ret < 0)
5944                                 return ret;
5945                         /* Count all modify-header actions as one action. */
5946                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5947                                 ++actions_n;
5948                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
5949                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
5950                         break;
5951                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5952                         ret = flow_dv_validate_action_modify_ipv6_dscp
5953                                                                 (action_flags,
5954                                                                  actions,
5955                                                                  item_flags,
5956                                                                  error);
5957                         if (ret < 0)
5958                                 return ret;
5959                         /* Count all modify-header actions as one action. */
5960                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5961                                 ++actions_n;
5962                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
5963                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
5964                         break;
5965                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
5966                         ret = flow_dv_validate_action_sample(action_flags,
5967                                                              actions, dev,
5968                                                              attr, error);
5969                         if (ret < 0)
5970                                 return ret;
5971                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
5972                         ++actions_n;
5973                         break;
5974                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
5975                         if (actions[0].type != (typeof(actions[0].type))
5976                                 MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET)
5977                                 return rte_flow_error_set
5978                                                 (error, EINVAL,
5979                                                 RTE_FLOW_ERROR_TYPE_ACTION,
5980                                                 NULL, "MLX5 private action "
5981                                                 "must be the first");
5982
5983                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
5984                         break;
5985                 default:
5986                         return rte_flow_error_set(error, ENOTSUP,
5987                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5988                                                   actions,
5989                                                   "action not supported");
5990                 }
5991         }
5992         /*
5993          * Validate actions in flow rules
5994          * - Explicit decap action is prohibited by the tunnel offload API.
5995          * - Drop action in tunnel steer rule is prohibited by the API.
5996          * - Application cannot use MARK action because it's value can mask
5997          *   tunnel default miss nitification.
5998          * - JUMP in tunnel match rule has no support in current PMD
5999          *   implementation.
6000          * - TAG & META are reserved for future uses.
6001          */
6002         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_SET) {
6003                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_DECAP    |
6004                                             MLX5_FLOW_ACTION_MARK     |
6005                                             MLX5_FLOW_ACTION_SET_TAG  |
6006                                             MLX5_FLOW_ACTION_SET_META |
6007                                             MLX5_FLOW_ACTION_DROP;
6008
6009                 if (action_flags & bad_actions_mask)
6010                         return rte_flow_error_set
6011                                         (error, EINVAL,
6012                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
6013                                         "Invalid RTE action in tunnel "
6014                                         "set decap rule");
6015                 if (!(action_flags & MLX5_FLOW_ACTION_JUMP))
6016                         return rte_flow_error_set
6017                                         (error, EINVAL,
6018                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
6019                                         "tunnel set decap rule must terminate "
6020                                         "with JUMP");
6021                 if (!attr->ingress)
6022                         return rte_flow_error_set
6023                                         (error, EINVAL,
6024                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
6025                                         "tunnel flows for ingress traffic only");
6026         }
6027         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_MATCH) {
6028                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_JUMP    |
6029                                             MLX5_FLOW_ACTION_MARK    |
6030                                             MLX5_FLOW_ACTION_SET_TAG |
6031                                             MLX5_FLOW_ACTION_SET_META;
6032
6033                 if (action_flags & bad_actions_mask)
6034                         return rte_flow_error_set
6035                                         (error, EINVAL,
6036                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
6037                                         "Invalid RTE action in tunnel "
6038                                         "set match rule");
6039         }
6040         /*
6041          * Validate the drop action mutual exclusion with other actions.
6042          * Drop action is mutually-exclusive with any other action, except for
6043          * Count action.
6044          */
6045         if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
6046             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
6047                 return rte_flow_error_set(error, EINVAL,
6048                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
6049                                           "Drop action is mutually-exclusive "
6050                                           "with any other action, except for "
6051                                           "Count action");
6052         /* Eswitch has few restrictions on using items and actions */
6053         if (attr->transfer) {
6054                 if (!mlx5_flow_ext_mreg_supported(dev) &&
6055                     action_flags & MLX5_FLOW_ACTION_FLAG)
6056                         return rte_flow_error_set(error, ENOTSUP,
6057                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6058                                                   NULL,
6059                                                   "unsupported action FLAG");
6060                 if (!mlx5_flow_ext_mreg_supported(dev) &&
6061                     action_flags & MLX5_FLOW_ACTION_MARK)
6062                         return rte_flow_error_set(error, ENOTSUP,
6063                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6064                                                   NULL,
6065                                                   "unsupported action MARK");
6066                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
6067                         return rte_flow_error_set(error, ENOTSUP,
6068                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6069                                                   NULL,
6070                                                   "unsupported action QUEUE");
6071                 if (action_flags & MLX5_FLOW_ACTION_RSS)
6072                         return rte_flow_error_set(error, ENOTSUP,
6073                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6074                                                   NULL,
6075                                                   "unsupported action RSS");
6076                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
6077                         return rte_flow_error_set(error, EINVAL,
6078                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6079                                                   actions,
6080                                                   "no fate action is found");
6081         } else {
6082                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
6083                         return rte_flow_error_set(error, EINVAL,
6084                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6085                                                   actions,
6086                                                   "no fate action is found");
6087         }
6088         /*
6089          * Continue validation for Xcap and VLAN actions.
6090          * If hairpin is working in explicit TX rule mode, there is no actions
6091          * splitting and the validation of hairpin ingress flow should be the
6092          * same as other standard flows.
6093          */
6094         if ((action_flags & (MLX5_FLOW_XCAP_ACTIONS |
6095                              MLX5_FLOW_VLAN_ACTIONS)) &&
6096             (queue_index == 0xFFFF ||
6097              mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN ||
6098              ((conf = mlx5_rxq_get_hairpin_conf(dev, queue_index)) != NULL &&
6099              conf->tx_explicit != 0))) {
6100                 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
6101                     MLX5_FLOW_XCAP_ACTIONS)
6102                         return rte_flow_error_set(error, ENOTSUP,
6103                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6104                                                   NULL, "encap and decap "
6105                                                   "combination aren't supported");
6106                 if (!attr->transfer && attr->ingress) {
6107                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
6108                                 return rte_flow_error_set
6109                                                 (error, ENOTSUP,
6110                                                  RTE_FLOW_ERROR_TYPE_ACTION,
6111                                                  NULL, "encap is not supported"
6112                                                  " for ingress traffic");
6113                         else if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
6114                                 return rte_flow_error_set
6115                                                 (error, ENOTSUP,
6116                                                  RTE_FLOW_ERROR_TYPE_ACTION,
6117                                                  NULL, "push VLAN action not "
6118                                                  "supported for ingress");
6119                         else if ((action_flags & MLX5_FLOW_VLAN_ACTIONS) ==
6120                                         MLX5_FLOW_VLAN_ACTIONS)
6121                                 return rte_flow_error_set
6122                                                 (error, ENOTSUP,
6123                                                  RTE_FLOW_ERROR_TYPE_ACTION,
6124                                                  NULL, "no support for "
6125                                                  "multiple VLAN actions");
6126                 }
6127         }
6128         /*
6129          * Hairpin flow will add one more TAG action in TX implicit mode.
6130          * In TX explicit mode, there will be no hairpin flow ID.
6131          */
6132         if (hairpin > 0)
6133                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
6134         /* extra metadata enabled: one more TAG action will be add. */
6135         if (dev_conf->dv_flow_en &&
6136             dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
6137             mlx5_flow_ext_mreg_supported(dev))
6138                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
6139         if ((uint32_t)rw_act_num >
6140                         flow_dv_modify_hdr_action_max(dev, is_root)) {
6141                 return rte_flow_error_set(error, ENOTSUP,
6142                                           RTE_FLOW_ERROR_TYPE_ACTION,
6143                                           NULL, "too many header modify"
6144                                           " actions to support");
6145         }
6146         return 0;
6147 }
6148
6149 /**
6150  * Internal preparation function. Allocates the DV flow size,
6151  * this size is constant.
6152  *
6153  * @param[in] dev
6154  *   Pointer to the rte_eth_dev structure.
6155  * @param[in] attr
6156  *   Pointer to the flow attributes.
6157  * @param[in] items
6158  *   Pointer to the list of items.
6159  * @param[in] actions
6160  *   Pointer to the list of actions.
6161  * @param[out] error
6162  *   Pointer to the error structure.
6163  *
6164  * @return
6165  *   Pointer to mlx5_flow object on success,
6166  *   otherwise NULL and rte_errno is set.
6167  */
6168 static struct mlx5_flow *
6169 flow_dv_prepare(struct rte_eth_dev *dev,
6170                 const struct rte_flow_attr *attr __rte_unused,
6171                 const struct rte_flow_item items[] __rte_unused,
6172                 const struct rte_flow_action actions[] __rte_unused,
6173                 struct rte_flow_error *error)
6174 {
6175         uint32_t handle_idx = 0;
6176         struct mlx5_flow *dev_flow;
6177         struct mlx5_flow_handle *dev_handle;
6178         struct mlx5_priv *priv = dev->data->dev_private;
6179         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
6180
6181         MLX5_ASSERT(wks);
6182         /* In case of corrupting the memory. */
6183         if (wks->flow_idx >= MLX5_NUM_MAX_DEV_FLOWS) {
6184                 rte_flow_error_set(error, ENOSPC,
6185                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6186                                    "not free temporary device flow");
6187                 return NULL;
6188         }
6189         dev_handle = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
6190                                    &handle_idx);
6191         if (!dev_handle) {
6192                 rte_flow_error_set(error, ENOMEM,
6193                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6194                                    "not enough memory to create flow handle");
6195                 return NULL;
6196         }
6197         MLX5_ASSERT(wks->flow_idx + 1 < RTE_DIM(wks->flows));
6198         dev_flow = &wks->flows[wks->flow_idx++];
6199         dev_flow->handle = dev_handle;
6200         dev_flow->handle_idx = handle_idx;
6201         /*
6202          * In some old rdma-core releases, before continuing, a check of the
6203          * length of matching parameter will be done at first. It needs to use
6204          * the length without misc4 param. If the flow has misc4 support, then
6205          * the length needs to be adjusted accordingly. Each param member is
6206          * aligned with a 64B boundary naturally.
6207          */
6208         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param) -
6209                                   MLX5_ST_SZ_BYTES(fte_match_set_misc4);
6210         /*
6211          * The matching value needs to be cleared to 0 before using. In the
6212          * past, it will be automatically cleared when using rte_*alloc
6213          * API. The time consumption will be almost the same as before.
6214          */
6215         memset(dev_flow->dv.value.buf, 0, MLX5_ST_SZ_BYTES(fte_match_param));
6216         dev_flow->ingress = attr->ingress;
6217         dev_flow->dv.transfer = attr->transfer;
6218         return dev_flow;
6219 }
6220
6221 #ifdef RTE_LIBRTE_MLX5_DEBUG
6222 /**
6223  * Sanity check for match mask and value. Similar to check_valid_spec() in
6224  * kernel driver. If unmasked bit is present in value, it returns failure.
6225  *
6226  * @param match_mask
6227  *   pointer to match mask buffer.
6228  * @param match_value
6229  *   pointer to match value buffer.
6230  *
6231  * @return
6232  *   0 if valid, -EINVAL otherwise.
6233  */
6234 static int
6235 flow_dv_check_valid_spec(void *match_mask, void *match_value)
6236 {
6237         uint8_t *m = match_mask;
6238         uint8_t *v = match_value;
6239         unsigned int i;
6240
6241         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
6242                 if (v[i] & ~m[i]) {
6243                         DRV_LOG(ERR,
6244                                 "match_value differs from match_criteria"
6245                                 " %p[%u] != %p[%u]",
6246                                 match_value, i, match_mask, i);
6247                         return -EINVAL;
6248                 }
6249         }
6250         return 0;
6251 }
6252 #endif
6253
6254 /**
6255  * Add match of ip_version.
6256  *
6257  * @param[in] group
6258  *   Flow group.
6259  * @param[in] headers_v
6260  *   Values header pointer.
6261  * @param[in] headers_m
6262  *   Masks header pointer.
6263  * @param[in] ip_version
6264  *   The IP version to set.
6265  */
6266 static inline void
6267 flow_dv_set_match_ip_version(uint32_t group,
6268                              void *headers_v,
6269                              void *headers_m,
6270                              uint8_t ip_version)
6271 {
6272         if (group == 0)
6273                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
6274         else
6275                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version,
6276                          ip_version);
6277         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, ip_version);
6278         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, 0);
6279         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype, 0);
6280 }
6281
6282 /**
6283  * Add Ethernet item to matcher and to the value.
6284  *
6285  * @param[in, out] matcher
6286  *   Flow matcher.
6287  * @param[in, out] key
6288  *   Flow matcher value.
6289  * @param[in] item
6290  *   Flow pattern to translate.
6291  * @param[in] inner
6292  *   Item is inner pattern.
6293  */
6294 static void
6295 flow_dv_translate_item_eth(void *matcher, void *key,
6296                            const struct rte_flow_item *item, int inner,
6297                            uint32_t group)
6298 {
6299         const struct rte_flow_item_eth *eth_m = item->mask;
6300         const struct rte_flow_item_eth *eth_v = item->spec;
6301         const struct rte_flow_item_eth nic_mask = {
6302                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
6303                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
6304                 .type = RTE_BE16(0xffff),
6305                 .has_vlan = 0,
6306         };
6307         void *hdrs_m;
6308         void *hdrs_v;
6309         char *l24_v;
6310         unsigned int i;
6311
6312         if (!eth_v)
6313                 return;
6314         if (!eth_m)
6315                 eth_m = &nic_mask;
6316         if (inner) {
6317                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
6318                                          inner_headers);
6319                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6320         } else {
6321                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
6322                                          outer_headers);
6323                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6324         }
6325         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, dmac_47_16),
6326                &eth_m->dst, sizeof(eth_m->dst));
6327         /* The value must be in the range of the mask. */
6328         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, dmac_47_16);
6329         for (i = 0; i < sizeof(eth_m->dst); ++i)
6330                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
6331         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, smac_47_16),
6332                &eth_m->src, sizeof(eth_m->src));
6333         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, smac_47_16);
6334         /* The value must be in the range of the mask. */
6335         for (i = 0; i < sizeof(eth_m->dst); ++i)
6336                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
6337         /*
6338          * HW supports match on one Ethertype, the Ethertype following the last
6339          * VLAN tag of the packet (see PRM).
6340          * Set match on ethertype only if ETH header is not followed by VLAN.
6341          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
6342          * ethertype, and use ip_version field instead.
6343          * eCPRI over Ether layer will use type value 0xAEFE.
6344          */
6345         if (eth_m->type == 0xFFFF) {
6346                 /* Set cvlan_tag mask for any single\multi\un-tagged case. */
6347                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
6348                 switch (eth_v->type) {
6349                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
6350                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
6351                         return;
6352                 case RTE_BE16(RTE_ETHER_TYPE_QINQ):
6353                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
6354                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
6355                         return;
6356                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
6357                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
6358                         return;
6359                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
6360                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
6361                         return;
6362                 default:
6363                         break;
6364                 }
6365         }
6366         if (eth_m->has_vlan) {
6367                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
6368                 if (eth_v->has_vlan) {
6369                         /*
6370                          * Here, when also has_more_vlan field in VLAN item is
6371                          * not set, only single-tagged packets will be matched.
6372                          */
6373                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
6374                         return;
6375                 }
6376         }
6377         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
6378                  rte_be_to_cpu_16(eth_m->type));
6379         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
6380         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
6381 }
6382
6383 /**
6384  * Add VLAN item to matcher and to the value.
6385  *
6386  * @param[in, out] dev_flow
6387  *   Flow descriptor.
6388  * @param[in, out] matcher
6389  *   Flow matcher.
6390  * @param[in, out] key
6391  *   Flow matcher value.
6392  * @param[in] item
6393  *   Flow pattern to translate.
6394  * @param[in] inner
6395  *   Item is inner pattern.
6396  */
6397 static void
6398 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
6399                             void *matcher, void *key,
6400                             const struct rte_flow_item *item,
6401                             int inner, uint32_t group)
6402 {
6403         const struct rte_flow_item_vlan *vlan_m = item->mask;
6404         const struct rte_flow_item_vlan *vlan_v = item->spec;
6405         void *hdrs_m;
6406         void *hdrs_v;
6407         uint16_t tci_m;
6408         uint16_t tci_v;
6409
6410         if (inner) {
6411                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
6412                                          inner_headers);
6413                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6414         } else {
6415                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
6416                                          outer_headers);
6417                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6418                 /*
6419                  * This is workaround, masks are not supported,
6420                  * and pre-validated.
6421                  */
6422                 if (vlan_v)
6423                         dev_flow->handle->vf_vlan.tag =
6424                                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
6425         }
6426         /*
6427          * When VLAN item exists in flow, mark packet as tagged,
6428          * even if TCI is not specified.
6429          */
6430         if (!MLX5_GET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag)) {
6431                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
6432                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
6433         }
6434         if (!vlan_v)
6435                 return;
6436         if (!vlan_m)
6437                 vlan_m = &rte_flow_item_vlan_mask;
6438         tci_m = rte_be_to_cpu_16(vlan_m->tci);
6439         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
6440         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_vid, tci_m);
6441         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_vid, tci_v);
6442         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_cfi, tci_m >> 12);
6443         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_cfi, tci_v >> 12);
6444         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_prio, tci_m >> 13);
6445         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_prio, tci_v >> 13);
6446         /*
6447          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
6448          * ethertype, and use ip_version field instead.
6449          */
6450         if (vlan_m->inner_type == 0xFFFF) {
6451                 switch (vlan_v->inner_type) {
6452                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
6453                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
6454                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
6455                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
6456                         return;
6457                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
6458                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
6459                         return;
6460                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
6461                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
6462                         return;
6463                 default:
6464                         break;
6465                 }
6466         }
6467         if (vlan_m->has_more_vlan && vlan_v->has_more_vlan) {
6468                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
6469                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
6470                 /* Only one vlan_tag bit can be set. */
6471                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
6472                 return;
6473         }
6474         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
6475                  rte_be_to_cpu_16(vlan_m->inner_type));
6476         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, ethertype,
6477                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
6478 }
6479
6480 /**
6481  * Add IPV4 item to matcher and to the value.
6482  *
6483  * @param[in, out] matcher
6484  *   Flow matcher.
6485  * @param[in, out] key
6486  *   Flow matcher value.
6487  * @param[in] item
6488  *   Flow pattern to translate.
6489  * @param[in] inner
6490  *   Item is inner pattern.
6491  * @param[in] group
6492  *   The group to insert the rule.
6493  */
6494 static void
6495 flow_dv_translate_item_ipv4(void *matcher, void *key,
6496                             const struct rte_flow_item *item,
6497                             int inner, uint32_t group)
6498 {
6499         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
6500         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
6501         const struct rte_flow_item_ipv4 nic_mask = {
6502                 .hdr = {
6503                         .src_addr = RTE_BE32(0xffffffff),
6504                         .dst_addr = RTE_BE32(0xffffffff),
6505                         .type_of_service = 0xff,
6506                         .next_proto_id = 0xff,
6507                         .time_to_live = 0xff,
6508                 },
6509         };
6510         void *headers_m;
6511         void *headers_v;
6512         char *l24_m;
6513         char *l24_v;
6514         uint8_t tos;
6515
6516         if (inner) {
6517                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6518                                          inner_headers);
6519                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6520         } else {
6521                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6522                                          outer_headers);
6523                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6524         }
6525         flow_dv_set_match_ip_version(group, headers_v, headers_m, 4);
6526         if (!ipv4_v)
6527                 return;
6528         if (!ipv4_m)
6529                 ipv4_m = &nic_mask;
6530         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
6531                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
6532         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
6533                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
6534         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
6535         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
6536         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
6537                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
6538         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
6539                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
6540         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
6541         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
6542         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
6543         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
6544                  ipv4_m->hdr.type_of_service);
6545         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
6546         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
6547                  ipv4_m->hdr.type_of_service >> 2);
6548         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
6549         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
6550                  ipv4_m->hdr.next_proto_id);
6551         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
6552                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
6553         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
6554                  ipv4_m->hdr.time_to_live);
6555         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
6556                  ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
6557         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
6558                  !!(ipv4_m->hdr.fragment_offset));
6559         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
6560                  !!(ipv4_v->hdr.fragment_offset & ipv4_m->hdr.fragment_offset));
6561 }
6562
6563 /**
6564  * Add IPV6 item to matcher and to the value.
6565  *
6566  * @param[in, out] matcher
6567  *   Flow matcher.
6568  * @param[in, out] key
6569  *   Flow matcher value.
6570  * @param[in] item
6571  *   Flow pattern to translate.
6572  * @param[in] inner
6573  *   Item is inner pattern.
6574  * @param[in] group
6575  *   The group to insert the rule.
6576  */
6577 static void
6578 flow_dv_translate_item_ipv6(void *matcher, void *key,
6579                             const struct rte_flow_item *item,
6580                             int inner, uint32_t group)
6581 {
6582         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
6583         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
6584         const struct rte_flow_item_ipv6 nic_mask = {
6585                 .hdr = {
6586                         .src_addr =
6587                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
6588                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
6589                         .dst_addr =
6590                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
6591                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
6592                         .vtc_flow = RTE_BE32(0xffffffff),
6593                         .proto = 0xff,
6594                         .hop_limits = 0xff,
6595                 },
6596         };
6597         void *headers_m;
6598         void *headers_v;
6599         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6600         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6601         char *l24_m;
6602         char *l24_v;
6603         uint32_t vtc_m;
6604         uint32_t vtc_v;
6605         int i;
6606         int size;
6607
6608         if (inner) {
6609                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6610                                          inner_headers);
6611                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6612         } else {
6613                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6614                                          outer_headers);
6615                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6616         }
6617         flow_dv_set_match_ip_version(group, headers_v, headers_m, 6);
6618         if (!ipv6_v)
6619                 return;
6620         if (!ipv6_m)
6621                 ipv6_m = &nic_mask;
6622         size = sizeof(ipv6_m->hdr.dst_addr);
6623         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
6624                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
6625         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
6626                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
6627         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
6628         for (i = 0; i < size; ++i)
6629                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
6630         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
6631                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
6632         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
6633                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
6634         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
6635         for (i = 0; i < size; ++i)
6636                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
6637         /* TOS. */
6638         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
6639         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
6640         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
6641         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
6642         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
6643         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
6644         /* Label. */
6645         if (inner) {
6646                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
6647                          vtc_m);
6648                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
6649                          vtc_v);
6650         } else {
6651                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
6652                          vtc_m);
6653                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
6654                          vtc_v);
6655         }
6656         /* Protocol. */
6657         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
6658                  ipv6_m->hdr.proto);
6659         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
6660                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
6661         /* Hop limit. */
6662         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
6663                  ipv6_m->hdr.hop_limits);
6664         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
6665                  ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
6666         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
6667                  !!(ipv6_m->has_frag_ext));
6668         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
6669                  !!(ipv6_v->has_frag_ext & ipv6_m->has_frag_ext));
6670 }
6671
6672 /**
6673  * Add IPV6 fragment extension item to matcher and to the value.
6674  *
6675  * @param[in, out] matcher
6676  *   Flow matcher.
6677  * @param[in, out] key
6678  *   Flow matcher value.
6679  * @param[in] item
6680  *   Flow pattern to translate.
6681  * @param[in] inner
6682  *   Item is inner pattern.
6683  */
6684 static void
6685 flow_dv_translate_item_ipv6_frag_ext(void *matcher, void *key,
6686                                      const struct rte_flow_item *item,
6687                                      int inner)
6688 {
6689         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_m = item->mask;
6690         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_v = item->spec;
6691         const struct rte_flow_item_ipv6_frag_ext nic_mask = {
6692                 .hdr = {
6693                         .next_header = 0xff,
6694                         .frag_data = RTE_BE16(0xffff),
6695                 },
6696         };
6697         void *headers_m;
6698         void *headers_v;
6699
6700         if (inner) {
6701                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6702                                          inner_headers);
6703                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6704         } else {
6705                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6706                                          outer_headers);
6707                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6708         }
6709         /* IPv6 fragment extension item exists, so packet is IP fragment. */
6710         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
6711         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 1);
6712         if (!ipv6_frag_ext_v)
6713                 return;
6714         if (!ipv6_frag_ext_m)
6715                 ipv6_frag_ext_m = &nic_mask;
6716         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
6717                  ipv6_frag_ext_m->hdr.next_header);
6718         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
6719                  ipv6_frag_ext_v->hdr.next_header &
6720                  ipv6_frag_ext_m->hdr.next_header);
6721 }
6722
6723 /**
6724  * Add TCP item to matcher and to the value.
6725  *
6726  * @param[in, out] matcher
6727  *   Flow matcher.
6728  * @param[in, out] key
6729  *   Flow matcher value.
6730  * @param[in] item
6731  *   Flow pattern to translate.
6732  * @param[in] inner
6733  *   Item is inner pattern.
6734  */
6735 static void
6736 flow_dv_translate_item_tcp(void *matcher, void *key,
6737                            const struct rte_flow_item *item,
6738                            int inner)
6739 {
6740         const struct rte_flow_item_tcp *tcp_m = item->mask;
6741         const struct rte_flow_item_tcp *tcp_v = item->spec;
6742         void *headers_m;
6743         void *headers_v;
6744
6745         if (inner) {
6746                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6747                                          inner_headers);
6748                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6749         } else {
6750                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6751                                          outer_headers);
6752                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6753         }
6754         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
6755         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
6756         if (!tcp_v)
6757                 return;
6758         if (!tcp_m)
6759                 tcp_m = &rte_flow_item_tcp_mask;
6760         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
6761                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
6762         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
6763                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
6764         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
6765                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
6766         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
6767                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
6768         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
6769                  tcp_m->hdr.tcp_flags);
6770         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
6771                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
6772 }
6773
6774 /**
6775  * Add UDP item to matcher and to the value.
6776  *
6777  * @param[in, out] matcher
6778  *   Flow matcher.
6779  * @param[in, out] key
6780  *   Flow matcher value.
6781  * @param[in] item
6782  *   Flow pattern to translate.
6783  * @param[in] inner
6784  *   Item is inner pattern.
6785  */
6786 static void
6787 flow_dv_translate_item_udp(void *matcher, void *key,
6788                            const struct rte_flow_item *item,
6789                            int inner)
6790 {
6791         const struct rte_flow_item_udp *udp_m = item->mask;
6792         const struct rte_flow_item_udp *udp_v = item->spec;
6793         void *headers_m;
6794         void *headers_v;
6795
6796         if (inner) {
6797                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6798                                          inner_headers);
6799                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6800         } else {
6801                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6802                                          outer_headers);
6803                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6804         }
6805         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
6806         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
6807         if (!udp_v)
6808                 return;
6809         if (!udp_m)
6810                 udp_m = &rte_flow_item_udp_mask;
6811         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
6812                  rte_be_to_cpu_16(udp_m->hdr.src_port));
6813         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
6814                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
6815         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
6816                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
6817         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
6818                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
6819 }
6820
6821 /**
6822  * Add GRE optional Key item to matcher and to the value.
6823  *
6824  * @param[in, out] matcher
6825  *   Flow matcher.
6826  * @param[in, out] key
6827  *   Flow matcher value.
6828  * @param[in] item
6829  *   Flow pattern to translate.
6830  * @param[in] inner
6831  *   Item is inner pattern.
6832  */
6833 static void
6834 flow_dv_translate_item_gre_key(void *matcher, void *key,
6835                                    const struct rte_flow_item *item)
6836 {
6837         const rte_be32_t *key_m = item->mask;
6838         const rte_be32_t *key_v = item->spec;
6839         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6840         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6841         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
6842
6843         /* GRE K bit must be on and should already be validated */
6844         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
6845         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
6846         if (!key_v)
6847                 return;
6848         if (!key_m)
6849                 key_m = &gre_key_default_mask;
6850         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
6851                  rte_be_to_cpu_32(*key_m) >> 8);
6852         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
6853                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
6854         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
6855                  rte_be_to_cpu_32(*key_m) & 0xFF);
6856         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
6857                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
6858 }
6859
6860 /**
6861  * Add GRE item to matcher and to the value.
6862  *
6863  * @param[in, out] matcher
6864  *   Flow matcher.
6865  * @param[in, out] key
6866  *   Flow matcher value.
6867  * @param[in] item
6868  *   Flow pattern to translate.
6869  * @param[in] inner
6870  *   Item is inner pattern.
6871  */
6872 static void
6873 flow_dv_translate_item_gre(void *matcher, void *key,
6874                            const struct rte_flow_item *item,
6875                            int inner)
6876 {
6877         const struct rte_flow_item_gre *gre_m = item->mask;
6878         const struct rte_flow_item_gre *gre_v = item->spec;
6879         void *headers_m;
6880         void *headers_v;
6881         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6882         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6883         struct {
6884                 union {
6885                         __extension__
6886                         struct {
6887                                 uint16_t version:3;
6888                                 uint16_t rsvd0:9;
6889                                 uint16_t s_present:1;
6890                                 uint16_t k_present:1;
6891                                 uint16_t rsvd_bit1:1;
6892                                 uint16_t c_present:1;
6893                         };
6894                         uint16_t value;
6895                 };
6896         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
6897
6898         if (inner) {
6899                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6900                                          inner_headers);
6901                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6902         } else {
6903                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6904                                          outer_headers);
6905                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6906         }
6907         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
6908         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
6909         if (!gre_v)
6910                 return;
6911         if (!gre_m)
6912                 gre_m = &rte_flow_item_gre_mask;
6913         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
6914                  rte_be_to_cpu_16(gre_m->protocol));
6915         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
6916                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
6917         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
6918         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
6919         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
6920                  gre_crks_rsvd0_ver_m.c_present);
6921         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
6922                  gre_crks_rsvd0_ver_v.c_present &
6923                  gre_crks_rsvd0_ver_m.c_present);
6924         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
6925                  gre_crks_rsvd0_ver_m.k_present);
6926         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
6927                  gre_crks_rsvd0_ver_v.k_present &
6928                  gre_crks_rsvd0_ver_m.k_present);
6929         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
6930                  gre_crks_rsvd0_ver_m.s_present);
6931         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
6932                  gre_crks_rsvd0_ver_v.s_present &
6933                  gre_crks_rsvd0_ver_m.s_present);
6934 }
6935
6936 /**
6937  * Add NVGRE item to matcher and to the value.
6938  *
6939  * @param[in, out] matcher
6940  *   Flow matcher.
6941  * @param[in, out] key
6942  *   Flow matcher value.
6943  * @param[in] item
6944  *   Flow pattern to translate.
6945  * @param[in] inner
6946  *   Item is inner pattern.
6947  */
6948 static void
6949 flow_dv_translate_item_nvgre(void *matcher, void *key,
6950                              const struct rte_flow_item *item,
6951                              int inner)
6952 {
6953         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
6954         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
6955         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6956         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6957         const char *tni_flow_id_m;
6958         const char *tni_flow_id_v;
6959         char *gre_key_m;
6960         char *gre_key_v;
6961         int size;
6962         int i;
6963
6964         /* For NVGRE, GRE header fields must be set with defined values. */
6965         const struct rte_flow_item_gre gre_spec = {
6966                 .c_rsvd0_ver = RTE_BE16(0x2000),
6967                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
6968         };
6969         const struct rte_flow_item_gre gre_mask = {
6970                 .c_rsvd0_ver = RTE_BE16(0xB000),
6971                 .protocol = RTE_BE16(UINT16_MAX),
6972         };
6973         const struct rte_flow_item gre_item = {
6974                 .spec = &gre_spec,
6975                 .mask = &gre_mask,
6976                 .last = NULL,
6977         };
6978         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
6979         if (!nvgre_v)
6980                 return;
6981         if (!nvgre_m)
6982                 nvgre_m = &rte_flow_item_nvgre_mask;
6983         tni_flow_id_m = (const char *)nvgre_m->tni;
6984         tni_flow_id_v = (const char *)nvgre_v->tni;
6985         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
6986         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
6987         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
6988         memcpy(gre_key_m, tni_flow_id_m, size);
6989         for (i = 0; i < size; ++i)
6990                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
6991 }
6992
6993 /**
6994  * Add VXLAN item to matcher and to the value.
6995  *
6996  * @param[in, out] matcher
6997  *   Flow matcher.
6998  * @param[in, out] key
6999  *   Flow matcher value.
7000  * @param[in] item
7001  *   Flow pattern to translate.
7002  * @param[in] inner
7003  *   Item is inner pattern.
7004  */
7005 static void
7006 flow_dv_translate_item_vxlan(void *matcher, void *key,
7007                              const struct rte_flow_item *item,
7008                              int inner)
7009 {
7010         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
7011         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
7012         void *headers_m;
7013         void *headers_v;
7014         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
7015         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
7016         char *vni_m;
7017         char *vni_v;
7018         uint16_t dport;
7019         int size;
7020         int i;
7021
7022         if (inner) {
7023                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7024                                          inner_headers);
7025                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
7026         } else {
7027                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7028                                          outer_headers);
7029                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
7030         }
7031         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
7032                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
7033         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
7034                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
7035                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
7036         }
7037         if (!vxlan_v)
7038                 return;
7039         if (!vxlan_m)
7040                 vxlan_m = &rte_flow_item_vxlan_mask;
7041         size = sizeof(vxlan_m->vni);
7042         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
7043         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
7044         memcpy(vni_m, vxlan_m->vni, size);
7045         for (i = 0; i < size; ++i)
7046                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
7047 }
7048
7049 /**
7050  * Add VXLAN-GPE item to matcher and to the value.
7051  *
7052  * @param[in, out] matcher
7053  *   Flow matcher.
7054  * @param[in, out] key
7055  *   Flow matcher value.
7056  * @param[in] item
7057  *   Flow pattern to translate.
7058  * @param[in] inner
7059  *   Item is inner pattern.
7060  */
7061
7062 static void
7063 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
7064                                  const struct rte_flow_item *item, int inner)
7065 {
7066         const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
7067         const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
7068         void *headers_m;
7069         void *headers_v;
7070         void *misc_m =
7071                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
7072         void *misc_v =
7073                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
7074         char *vni_m;
7075         char *vni_v;
7076         uint16_t dport;
7077         int size;
7078         int i;
7079         uint8_t flags_m = 0xff;
7080         uint8_t flags_v = 0xc;
7081
7082         if (inner) {
7083                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7084                                          inner_headers);
7085                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
7086         } else {
7087                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7088                                          outer_headers);
7089                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
7090         }
7091         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
7092                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
7093         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
7094                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
7095                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
7096         }
7097         if (!vxlan_v)
7098                 return;
7099         if (!vxlan_m)
7100                 vxlan_m = &rte_flow_item_vxlan_gpe_mask;
7101         size = sizeof(vxlan_m->vni);
7102         vni_m = MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
7103         vni_v = MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
7104         memcpy(vni_m, vxlan_m->vni, size);
7105         for (i = 0; i < size; ++i)
7106                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
7107         if (vxlan_m->flags) {
7108                 flags_m = vxlan_m->flags;
7109                 flags_v = vxlan_v->flags;
7110         }
7111         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
7112         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
7113         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_next_protocol,
7114                  vxlan_m->protocol);
7115         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_next_protocol,
7116                  vxlan_v->protocol);
7117 }
7118
7119 /**
7120  * Add Geneve item to matcher and to the value.
7121  *
7122  * @param[in, out] matcher
7123  *   Flow matcher.
7124  * @param[in, out] key
7125  *   Flow matcher value.
7126  * @param[in] item
7127  *   Flow pattern to translate.
7128  * @param[in] inner
7129  *   Item is inner pattern.
7130  */
7131
7132 static void
7133 flow_dv_translate_item_geneve(void *matcher, void *key,
7134                               const struct rte_flow_item *item, int inner)
7135 {
7136         const struct rte_flow_item_geneve *geneve_m = item->mask;
7137         const struct rte_flow_item_geneve *geneve_v = item->spec;
7138         void *headers_m;
7139         void *headers_v;
7140         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
7141         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
7142         uint16_t dport;
7143         uint16_t gbhdr_m;
7144         uint16_t gbhdr_v;
7145         char *vni_m;
7146         char *vni_v;
7147         size_t size, i;
7148
7149         if (inner) {
7150                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7151                                          inner_headers);
7152                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
7153         } else {
7154                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7155                                          outer_headers);
7156                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
7157         }
7158         dport = MLX5_UDP_PORT_GENEVE;
7159         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
7160                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
7161                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
7162         }
7163         if (!geneve_v)
7164                 return;
7165         if (!geneve_m)
7166                 geneve_m = &rte_flow_item_geneve_mask;
7167         size = sizeof(geneve_m->vni);
7168         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
7169         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
7170         memcpy(vni_m, geneve_m->vni, size);
7171         for (i = 0; i < size; ++i)
7172                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
7173         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
7174                  rte_be_to_cpu_16(geneve_m->protocol));
7175         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
7176                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
7177         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
7178         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
7179         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
7180                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
7181         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
7182                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
7183         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
7184                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
7185         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
7186                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
7187                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
7188 }
7189
7190 /**
7191  * Add MPLS item to matcher and to the value.
7192  *
7193  * @param[in, out] matcher
7194  *   Flow matcher.
7195  * @param[in, out] key
7196  *   Flow matcher value.
7197  * @param[in] item
7198  *   Flow pattern to translate.
7199  * @param[in] prev_layer
7200  *   The protocol layer indicated in previous item.
7201  * @param[in] inner
7202  *   Item is inner pattern.
7203  */
7204 static void
7205 flow_dv_translate_item_mpls(void *matcher, void *key,
7206                             const struct rte_flow_item *item,
7207                             uint64_t prev_layer,
7208                             int inner)
7209 {
7210         const uint32_t *in_mpls_m = item->mask;
7211         const uint32_t *in_mpls_v = item->spec;
7212         uint32_t *out_mpls_m = 0;
7213         uint32_t *out_mpls_v = 0;
7214         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
7215         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
7216         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
7217                                      misc_parameters_2);
7218         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
7219         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
7220         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
7221
7222         switch (prev_layer) {
7223         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
7224                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
7225                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
7226                          MLX5_UDP_PORT_MPLS);
7227                 break;
7228         case MLX5_FLOW_LAYER_GRE:
7229                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
7230                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
7231                          RTE_ETHER_TYPE_MPLS);
7232                 break;
7233         default:
7234                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
7235                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
7236                          IPPROTO_MPLS);
7237                 break;
7238         }
7239         if (!in_mpls_v)
7240                 return;
7241         if (!in_mpls_m)
7242                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
7243         switch (prev_layer) {
7244         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
7245                 out_mpls_m =
7246                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
7247                                                  outer_first_mpls_over_udp);
7248                 out_mpls_v =
7249                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
7250                                                  outer_first_mpls_over_udp);
7251                 break;
7252         case MLX5_FLOW_LAYER_GRE:
7253                 out_mpls_m =
7254                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
7255                                                  outer_first_mpls_over_gre);
7256                 out_mpls_v =
7257                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
7258                                                  outer_first_mpls_over_gre);
7259                 break;
7260         default:
7261                 /* Inner MPLS not over GRE is not supported. */
7262                 if (!inner) {
7263                         out_mpls_m =
7264                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
7265                                                          misc2_m,
7266                                                          outer_first_mpls);
7267                         out_mpls_v =
7268                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
7269                                                          misc2_v,
7270                                                          outer_first_mpls);
7271                 }
7272                 break;
7273         }
7274         if (out_mpls_m && out_mpls_v) {
7275                 *out_mpls_m = *in_mpls_m;
7276                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
7277         }
7278 }
7279
7280 /**
7281  * Add metadata register item to matcher
7282  *
7283  * @param[in, out] matcher
7284  *   Flow matcher.
7285  * @param[in, out] key
7286  *   Flow matcher value.
7287  * @param[in] reg_type
7288  *   Type of device metadata register
7289  * @param[in] value
7290  *   Register value
7291  * @param[in] mask
7292  *   Register mask
7293  */
7294 static void
7295 flow_dv_match_meta_reg(void *matcher, void *key,
7296                        enum modify_reg reg_type,
7297                        uint32_t data, uint32_t mask)
7298 {
7299         void *misc2_m =
7300                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
7301         void *misc2_v =
7302                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
7303         uint32_t temp;
7304
7305         data &= mask;
7306         switch (reg_type) {
7307         case REG_A:
7308                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
7309                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
7310                 break;
7311         case REG_B:
7312                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
7313                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
7314                 break;
7315         case REG_C_0:
7316                 /*
7317                  * The metadata register C0 field might be divided into
7318                  * source vport index and META item value, we should set
7319                  * this field according to specified mask, not as whole one.
7320                  */
7321                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
7322                 temp |= mask;
7323                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
7324                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
7325                 temp &= ~mask;
7326                 temp |= data;
7327                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
7328                 break;
7329         case REG_C_1:
7330                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
7331                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
7332                 break;
7333         case REG_C_2:
7334                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
7335                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
7336                 break;
7337         case REG_C_3:
7338                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
7339                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
7340                 break;
7341         case REG_C_4:
7342                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
7343                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
7344                 break;
7345         case REG_C_5:
7346                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
7347                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
7348                 break;
7349         case REG_C_6:
7350                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
7351                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
7352                 break;
7353         case REG_C_7:
7354                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
7355                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
7356                 break;
7357         default:
7358                 MLX5_ASSERT(false);
7359                 break;
7360         }
7361 }
7362
7363 /**
7364  * Add MARK item to matcher
7365  *
7366  * @param[in] dev
7367  *   The device to configure through.
7368  * @param[in, out] matcher
7369  *   Flow matcher.
7370  * @param[in, out] key
7371  *   Flow matcher value.
7372  * @param[in] item
7373  *   Flow pattern to translate.
7374  */
7375 static void
7376 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
7377                             void *matcher, void *key,
7378                             const struct rte_flow_item *item)
7379 {
7380         struct mlx5_priv *priv = dev->data->dev_private;
7381         const struct rte_flow_item_mark *mark;
7382         uint32_t value;
7383         uint32_t mask;
7384
7385         mark = item->mask ? (const void *)item->mask :
7386                             &rte_flow_item_mark_mask;
7387         mask = mark->id & priv->sh->dv_mark_mask;
7388         mark = (const void *)item->spec;
7389         MLX5_ASSERT(mark);
7390         value = mark->id & priv->sh->dv_mark_mask & mask;
7391         if (mask) {
7392                 enum modify_reg reg;
7393
7394                 /* Get the metadata register index for the mark. */
7395                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
7396                 MLX5_ASSERT(reg > 0);
7397                 if (reg == REG_C_0) {
7398                         struct mlx5_priv *priv = dev->data->dev_private;
7399                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
7400                         uint32_t shl_c0 = rte_bsf32(msk_c0);
7401
7402                         mask &= msk_c0;
7403                         mask <<= shl_c0;
7404                         value <<= shl_c0;
7405                 }
7406                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
7407         }
7408 }
7409
7410 /**
7411  * Add META item to matcher
7412  *
7413  * @param[in] dev
7414  *   The devich to configure through.
7415  * @param[in, out] matcher
7416  *   Flow matcher.
7417  * @param[in, out] key
7418  *   Flow matcher value.
7419  * @param[in] attr
7420  *   Attributes of flow that includes this item.
7421  * @param[in] item
7422  *   Flow pattern to translate.
7423  */
7424 static void
7425 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
7426                             void *matcher, void *key,
7427                             const struct rte_flow_attr *attr,
7428                             const struct rte_flow_item *item)
7429 {
7430         const struct rte_flow_item_meta *meta_m;
7431         const struct rte_flow_item_meta *meta_v;
7432
7433         meta_m = (const void *)item->mask;
7434         if (!meta_m)
7435                 meta_m = &rte_flow_item_meta_mask;
7436         meta_v = (const void *)item->spec;
7437         if (meta_v) {
7438                 int reg;
7439                 uint32_t value = meta_v->data;
7440                 uint32_t mask = meta_m->data;
7441
7442                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
7443                 if (reg < 0)
7444                         return;
7445                 /*
7446                  * In datapath code there is no endianness
7447                  * coversions for perfromance reasons, all
7448                  * pattern conversions are done in rte_flow.
7449                  */
7450                 value = rte_cpu_to_be_32(value);
7451                 mask = rte_cpu_to_be_32(mask);
7452                 if (reg == REG_C_0) {
7453                         struct mlx5_priv *priv = dev->data->dev_private;
7454                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
7455                         uint32_t shl_c0 = rte_bsf32(msk_c0);
7456 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
7457                         uint32_t shr_c0 = __builtin_clz(priv->sh->dv_meta_mask);
7458
7459                         value >>= shr_c0;
7460                         mask >>= shr_c0;
7461 #endif
7462                         value <<= shl_c0;
7463                         mask <<= shl_c0;
7464                         MLX5_ASSERT(msk_c0);
7465                         MLX5_ASSERT(!(~msk_c0 & mask));
7466                 }
7467                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
7468         }
7469 }
7470
7471 /**
7472  * Add vport metadata Reg C0 item to matcher
7473  *
7474  * @param[in, out] matcher
7475  *   Flow matcher.
7476  * @param[in, out] key
7477  *   Flow matcher value.
7478  * @param[in] reg
7479  *   Flow pattern to translate.
7480  */
7481 static void
7482 flow_dv_translate_item_meta_vport(void *matcher, void *key,
7483                                   uint32_t value, uint32_t mask)
7484 {
7485         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
7486 }
7487
7488 /**
7489  * Add tag item to matcher
7490  *
7491  * @param[in] dev
7492  *   The devich to configure through.
7493  * @param[in, out] matcher
7494  *   Flow matcher.
7495  * @param[in, out] key
7496  *   Flow matcher value.
7497  * @param[in] item
7498  *   Flow pattern to translate.
7499  */
7500 static void
7501 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
7502                                 void *matcher, void *key,
7503                                 const struct rte_flow_item *item)
7504 {
7505         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
7506         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
7507         uint32_t mask, value;
7508
7509         MLX5_ASSERT(tag_v);
7510         value = tag_v->data;
7511         mask = tag_m ? tag_m->data : UINT32_MAX;
7512         if (tag_v->id == REG_C_0) {
7513                 struct mlx5_priv *priv = dev->data->dev_private;
7514                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
7515                 uint32_t shl_c0 = rte_bsf32(msk_c0);
7516
7517                 mask &= msk_c0;
7518                 mask <<= shl_c0;
7519                 value <<= shl_c0;
7520         }
7521         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
7522 }
7523
7524 /**
7525  * Add TAG item to matcher
7526  *
7527  * @param[in] dev
7528  *   The devich to configure through.
7529  * @param[in, out] matcher
7530  *   Flow matcher.
7531  * @param[in, out] key
7532  *   Flow matcher value.
7533  * @param[in] item
7534  *   Flow pattern to translate.
7535  */
7536 static void
7537 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
7538                            void *matcher, void *key,
7539                            const struct rte_flow_item *item)
7540 {
7541         const struct rte_flow_item_tag *tag_v = item->spec;
7542         const struct rte_flow_item_tag *tag_m = item->mask;
7543         enum modify_reg reg;
7544
7545         MLX5_ASSERT(tag_v);
7546         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
7547         /* Get the metadata register index for the tag. */
7548         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
7549         MLX5_ASSERT(reg > 0);
7550         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
7551 }
7552
7553 /**
7554  * Add source vport match to the specified matcher.
7555  *
7556  * @param[in, out] matcher
7557  *   Flow matcher.
7558  * @param[in, out] key
7559  *   Flow matcher value.
7560  * @param[in] port
7561  *   Source vport value to match
7562  * @param[in] mask
7563  *   Mask
7564  */
7565 static void
7566 flow_dv_translate_item_source_vport(void *matcher, void *key,
7567                                     int16_t port, uint16_t mask)
7568 {
7569         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
7570         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
7571
7572         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
7573         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
7574 }
7575
7576 /**
7577  * Translate port-id item to eswitch match on  port-id.
7578  *
7579  * @param[in] dev
7580  *   The devich to configure through.
7581  * @param[in, out] matcher
7582  *   Flow matcher.
7583  * @param[in, out] key
7584  *   Flow matcher value.
7585  * @param[in] item
7586  *   Flow pattern to translate.
7587  *
7588  * @return
7589  *   0 on success, a negative errno value otherwise.
7590  */
7591 static int
7592 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
7593                                void *key, const struct rte_flow_item *item)
7594 {
7595         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
7596         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
7597         struct mlx5_priv *priv;
7598         uint16_t mask, id;
7599
7600         mask = pid_m ? pid_m->id : 0xffff;
7601         id = pid_v ? pid_v->id : dev->data->port_id;
7602         priv = mlx5_port_to_eswitch_info(id, item == NULL);
7603         if (!priv)
7604                 return -rte_errno;
7605         /* Translate to vport field or to metadata, depending on mode. */
7606         if (priv->vport_meta_mask)
7607                 flow_dv_translate_item_meta_vport(matcher, key,
7608                                                   priv->vport_meta_tag,
7609                                                   priv->vport_meta_mask);
7610         else
7611                 flow_dv_translate_item_source_vport(matcher, key,
7612                                                     priv->vport_id, mask);
7613         return 0;
7614 }
7615
7616 /**
7617  * Add ICMP6 item to matcher and to the value.
7618  *
7619  * @param[in, out] matcher
7620  *   Flow matcher.
7621  * @param[in, out] key
7622  *   Flow matcher value.
7623  * @param[in] item
7624  *   Flow pattern to translate.
7625  * @param[in] inner
7626  *   Item is inner pattern.
7627  */
7628 static void
7629 flow_dv_translate_item_icmp6(void *matcher, void *key,
7630                               const struct rte_flow_item *item,
7631                               int inner)
7632 {
7633         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
7634         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
7635         void *headers_m;
7636         void *headers_v;
7637         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
7638                                      misc_parameters_3);
7639         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
7640         if (inner) {
7641                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7642                                          inner_headers);
7643                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
7644         } else {
7645                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7646                                          outer_headers);
7647                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
7648         }
7649         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
7650         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
7651         if (!icmp6_v)
7652                 return;
7653         if (!icmp6_m)
7654                 icmp6_m = &rte_flow_item_icmp6_mask;
7655         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
7656         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
7657                  icmp6_v->type & icmp6_m->type);
7658         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
7659         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
7660                  icmp6_v->code & icmp6_m->code);
7661 }
7662
7663 /**
7664  * Add ICMP item to matcher and to the value.
7665  *
7666  * @param[in, out] matcher
7667  *   Flow matcher.
7668  * @param[in, out] key
7669  *   Flow matcher value.
7670  * @param[in] item
7671  *   Flow pattern to translate.
7672  * @param[in] inner
7673  *   Item is inner pattern.
7674  */
7675 static void
7676 flow_dv_translate_item_icmp(void *matcher, void *key,
7677                             const struct rte_flow_item *item,
7678                             int inner)
7679 {
7680         const struct rte_flow_item_icmp *icmp_m = item->mask;
7681         const struct rte_flow_item_icmp *icmp_v = item->spec;
7682         uint32_t icmp_header_data_m = 0;
7683         uint32_t icmp_header_data_v = 0;
7684         void *headers_m;
7685         void *headers_v;
7686         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
7687                                      misc_parameters_3);
7688         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
7689         if (inner) {
7690                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7691                                          inner_headers);
7692                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
7693         } else {
7694                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7695                                          outer_headers);
7696                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
7697         }
7698         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
7699         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
7700         if (!icmp_v)
7701                 return;
7702         if (!icmp_m)
7703                 icmp_m = &rte_flow_item_icmp_mask;
7704         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
7705                  icmp_m->hdr.icmp_type);
7706         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
7707                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
7708         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
7709                  icmp_m->hdr.icmp_code);
7710         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
7711                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
7712         icmp_header_data_m = rte_be_to_cpu_16(icmp_m->hdr.icmp_seq_nb);
7713         icmp_header_data_m |= rte_be_to_cpu_16(icmp_m->hdr.icmp_ident) << 16;
7714         if (icmp_header_data_m) {
7715                 icmp_header_data_v = rte_be_to_cpu_16(icmp_v->hdr.icmp_seq_nb);
7716                 icmp_header_data_v |=
7717                          rte_be_to_cpu_16(icmp_v->hdr.icmp_ident) << 16;
7718                 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_header_data,
7719                          icmp_header_data_m);
7720                 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_header_data,
7721                          icmp_header_data_v & icmp_header_data_m);
7722         }
7723 }
7724
7725 /**
7726  * Add GTP item to matcher and to the value.
7727  *
7728  * @param[in, out] matcher
7729  *   Flow matcher.
7730  * @param[in, out] key
7731  *   Flow matcher value.
7732  * @param[in] item
7733  *   Flow pattern to translate.
7734  * @param[in] inner
7735  *   Item is inner pattern.
7736  */
7737 static void
7738 flow_dv_translate_item_gtp(void *matcher, void *key,
7739                            const struct rte_flow_item *item, int inner)
7740 {
7741         const struct rte_flow_item_gtp *gtp_m = item->mask;
7742         const struct rte_flow_item_gtp *gtp_v = item->spec;
7743         void *headers_m;
7744         void *headers_v;
7745         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
7746                                      misc_parameters_3);
7747         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
7748         uint16_t dport = RTE_GTPU_UDP_PORT;
7749
7750         if (inner) {
7751                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7752                                          inner_headers);
7753                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
7754         } else {
7755                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7756                                          outer_headers);
7757                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
7758         }
7759         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
7760                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
7761                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
7762         }
7763         if (!gtp_v)
7764                 return;
7765         if (!gtp_m)
7766                 gtp_m = &rte_flow_item_gtp_mask;
7767         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags,
7768                  gtp_m->v_pt_rsv_flags);
7769         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags,
7770                  gtp_v->v_pt_rsv_flags & gtp_m->v_pt_rsv_flags);
7771         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
7772         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
7773                  gtp_v->msg_type & gtp_m->msg_type);
7774         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
7775                  rte_be_to_cpu_32(gtp_m->teid));
7776         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
7777                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
7778 }
7779
7780 /**
7781  * Add eCPRI item to matcher and to the value.
7782  *
7783  * @param[in] dev
7784  *   The devich to configure through.
7785  * @param[in, out] matcher
7786  *   Flow matcher.
7787  * @param[in, out] key
7788  *   Flow matcher value.
7789  * @param[in] item
7790  *   Flow pattern to translate.
7791  * @param[in] samples
7792  *   Sample IDs to be used in the matching.
7793  */
7794 static void
7795 flow_dv_translate_item_ecpri(struct rte_eth_dev *dev, void *matcher,
7796                              void *key, const struct rte_flow_item *item)
7797 {
7798         struct mlx5_priv *priv = dev->data->dev_private;
7799         const struct rte_flow_item_ecpri *ecpri_m = item->mask;
7800         const struct rte_flow_item_ecpri *ecpri_v = item->spec;
7801         void *misc4_m = MLX5_ADDR_OF(fte_match_param, matcher,
7802                                      misc_parameters_4);
7803         void *misc4_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_4);
7804         uint32_t *samples;
7805         void *dw_m;
7806         void *dw_v;
7807
7808         if (!ecpri_v)
7809                 return;
7810         if (!ecpri_m)
7811                 ecpri_m = &rte_flow_item_ecpri_mask;
7812         /*
7813          * Maximal four DW samples are supported in a single matching now.
7814          * Two are used now for a eCPRI matching:
7815          * 1. Type: one byte, mask should be 0x00ff0000 in network order
7816          * 2. ID of a message: one or two bytes, mask 0xffff0000 or 0xff000000
7817          *    if any.
7818          */
7819         if (!ecpri_m->hdr.common.u32)
7820                 return;
7821         samples = priv->sh->fp[MLX5_FLEX_PARSER_ECPRI_0].ids;
7822         /* Need to take the whole DW as the mask to fill the entry. */
7823         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
7824                             prog_sample_field_value_0);
7825         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
7826                             prog_sample_field_value_0);
7827         /* Already big endian (network order) in the header. */
7828         *(uint32_t *)dw_m = ecpri_m->hdr.common.u32;
7829         *(uint32_t *)dw_v = ecpri_v->hdr.common.u32;
7830         /* Sample#0, used for matching type, offset 0. */
7831         MLX5_SET(fte_match_set_misc4, misc4_m,
7832                  prog_sample_field_id_0, samples[0]);
7833         /* It makes no sense to set the sample ID in the mask field. */
7834         MLX5_SET(fte_match_set_misc4, misc4_v,
7835                  prog_sample_field_id_0, samples[0]);
7836         /*
7837          * Checking if message body part needs to be matched.
7838          * Some wildcard rules only matching type field should be supported.
7839          */
7840         if (ecpri_m->hdr.dummy[0]) {
7841                 switch (ecpri_v->hdr.common.type) {
7842                 case RTE_ECPRI_MSG_TYPE_IQ_DATA:
7843                 case RTE_ECPRI_MSG_TYPE_RTC_CTRL:
7844                 case RTE_ECPRI_MSG_TYPE_DLY_MSR:
7845                         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
7846                                             prog_sample_field_value_1);
7847                         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
7848                                             prog_sample_field_value_1);
7849                         *(uint32_t *)dw_m = ecpri_m->hdr.dummy[0];
7850                         *(uint32_t *)dw_v = ecpri_v->hdr.dummy[0];
7851                         /* Sample#1, to match message body, offset 4. */
7852                         MLX5_SET(fte_match_set_misc4, misc4_m,
7853                                  prog_sample_field_id_1, samples[1]);
7854                         MLX5_SET(fte_match_set_misc4, misc4_v,
7855                                  prog_sample_field_id_1, samples[1]);
7856                         break;
7857                 default:
7858                         /* Others, do not match any sample ID. */
7859                         break;
7860                 }
7861         }
7862 }
7863
7864 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
7865
7866 #define HEADER_IS_ZERO(match_criteria, headers)                              \
7867         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
7868                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
7869
7870 /**
7871  * Calculate flow matcher enable bitmap.
7872  *
7873  * @param match_criteria
7874  *   Pointer to flow matcher criteria.
7875  *
7876  * @return
7877  *   Bitmap of enabled fields.
7878  */
7879 static uint8_t
7880 flow_dv_matcher_enable(uint32_t *match_criteria)
7881 {
7882         uint8_t match_criteria_enable;
7883
7884         match_criteria_enable =
7885                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
7886                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
7887         match_criteria_enable |=
7888                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
7889                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
7890         match_criteria_enable |=
7891                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
7892                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
7893         match_criteria_enable |=
7894                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
7895                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
7896         match_criteria_enable |=
7897                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
7898                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
7899         match_criteria_enable |=
7900                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_4)) <<
7901                 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT;
7902         return match_criteria_enable;
7903 }
7904
7905 struct mlx5_hlist_entry *
7906 flow_dv_tbl_create_cb(struct mlx5_hlist *list, uint64_t key64, void *cb_ctx)
7907 {
7908         struct mlx5_dev_ctx_shared *sh = list->ctx;
7909         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
7910         struct rte_eth_dev *dev = ctx->dev;
7911         struct mlx5_flow_tbl_data_entry *tbl_data;
7912         struct mlx5_flow_tbl_tunnel_prm *tt_prm = ctx->data;
7913         struct rte_flow_error *error = ctx->error;
7914         union mlx5_flow_tbl_key key = { .v64 = key64 };
7915         struct mlx5_flow_tbl_resource *tbl;
7916         void *domain;
7917         uint32_t idx = 0;
7918         int ret;
7919
7920         tbl_data = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
7921         if (!tbl_data) {
7922                 rte_flow_error_set(error, ENOMEM,
7923                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7924                                    NULL,
7925                                    "cannot allocate flow table data entry");
7926                 return NULL;
7927         }
7928         tbl_data->idx = idx;
7929         tbl_data->tunnel = tt_prm->tunnel;
7930         tbl_data->group_id = tt_prm->group_id;
7931         tbl_data->external = tt_prm->external;
7932         tbl_data->tunnel_offload = is_tunnel_offload_active(dev);
7933         tbl_data->is_egress = !!key.direction;
7934         tbl = &tbl_data->tbl;
7935         if (key.dummy)
7936                 return &tbl_data->entry;
7937         if (key.domain)
7938                 domain = sh->fdb_domain;
7939         else if (key.direction)
7940                 domain = sh->tx_domain;
7941         else
7942                 domain = sh->rx_domain;
7943         ret = mlx5_flow_os_create_flow_tbl(domain, key.table_id, &tbl->obj);
7944         if (ret) {
7945                 rte_flow_error_set(error, ENOMEM,
7946                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7947                                    NULL, "cannot create flow table object");
7948                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
7949                 return NULL;
7950         }
7951         if (key.table_id) {
7952                 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
7953                                         (tbl->obj, &tbl_data->jump.action);
7954                 if (ret) {
7955                         rte_flow_error_set(error, ENOMEM,
7956                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7957                                            NULL,
7958                                            "cannot create flow jump action");
7959                         mlx5_flow_os_destroy_flow_tbl(tbl->obj);
7960                         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
7961                         return NULL;
7962                 }
7963         }
7964         MKSTR(matcher_name, "%s_%s_%u_matcher_cache",
7965               key.domain ? "FDB" : "NIC", key.direction ? "egress" : "ingress",
7966               key.table_id);
7967         mlx5_cache_list_init(&tbl_data->matchers, matcher_name, 0, sh,
7968                              flow_dv_matcher_create_cb,
7969                              flow_dv_matcher_match_cb,
7970                              flow_dv_matcher_remove_cb);
7971         return &tbl_data->entry;
7972 }
7973
7974 /**
7975  * Get a flow table.
7976  *
7977  * @param[in, out] dev
7978  *   Pointer to rte_eth_dev structure.
7979  * @param[in] table_id
7980  *   Table id to use.
7981  * @param[in] egress
7982  *   Direction of the table.
7983  * @param[in] transfer
7984  *   E-Switch or NIC flow.
7985  * @param[in] dummy
7986  *   Dummy entry for dv API.
7987  * @param[out] error
7988  *   pointer to error structure.
7989  *
7990  * @return
7991  *   Returns tables resource based on the index, NULL in case of failed.
7992  */
7993 struct mlx5_flow_tbl_resource *
7994 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
7995                          uint32_t table_id, uint8_t egress,
7996                          uint8_t transfer,
7997                          bool external,
7998                          const struct mlx5_flow_tunnel *tunnel,
7999                          uint32_t group_id, uint8_t dummy,
8000                          struct rte_flow_error *error)
8001 {
8002         struct mlx5_priv *priv = dev->data->dev_private;
8003         union mlx5_flow_tbl_key table_key = {
8004                 {
8005                         .table_id = table_id,
8006                         .dummy = dummy,
8007                         .domain = !!transfer,
8008                         .direction = !!egress,
8009                 }
8010         };
8011         struct mlx5_flow_tbl_tunnel_prm tt_prm = {
8012                 .tunnel = tunnel,
8013                 .group_id = group_id,
8014                 .external = external,
8015         };
8016         struct mlx5_flow_cb_ctx ctx = {
8017                 .dev = dev,
8018                 .error = error,
8019                 .data = &tt_prm,
8020         };
8021         struct mlx5_hlist_entry *entry;
8022         struct mlx5_flow_tbl_data_entry *tbl_data;
8023
8024         entry = mlx5_hlist_register(priv->sh->flow_tbls, table_key.v64, &ctx);
8025         if (!entry) {
8026                 rte_flow_error_set(error, ENOMEM,
8027                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8028                                    "cannot get table");
8029                 return NULL;
8030         }
8031         tbl_data = container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
8032         return &tbl_data->tbl;
8033 }
8034
8035 void
8036 flow_dv_tbl_remove_cb(struct mlx5_hlist *list,
8037                       struct mlx5_hlist_entry *entry)
8038 {
8039         struct mlx5_dev_ctx_shared *sh = list->ctx;
8040         struct mlx5_flow_tbl_data_entry *tbl_data =
8041                 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
8042
8043         MLX5_ASSERT(entry && sh);
8044         if (tbl_data->jump.action)
8045                 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
8046         if (tbl_data->tbl.obj)
8047                 mlx5_flow_os_destroy_flow_tbl(tbl_data->tbl.obj);
8048         if (tbl_data->tunnel_offload && tbl_data->external) {
8049                 struct mlx5_hlist_entry *he;
8050                 struct mlx5_hlist *tunnel_grp_hash;
8051                 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
8052                 union tunnel_tbl_key tunnel_key = {
8053                         .tunnel_id = tbl_data->tunnel ?
8054                                         tbl_data->tunnel->tunnel_id : 0,
8055                         .group = tbl_data->group_id
8056                 };
8057                 union mlx5_flow_tbl_key table_key = {
8058                         .v64 = entry->key
8059                 };
8060                 uint32_t table_id = table_key.table_id;
8061
8062                 tunnel_grp_hash = tbl_data->tunnel ?
8063                                         tbl_data->tunnel->groups :
8064                                         thub->groups;
8065                 he = mlx5_hlist_lookup(tunnel_grp_hash, tunnel_key.val, NULL);
8066                 if (he)
8067                         mlx5_hlist_unregister(tunnel_grp_hash, he);
8068                 DRV_LOG(DEBUG,
8069                         "Table_id %#x tunnel %u group %u released.",
8070                         table_id,
8071                         tbl_data->tunnel ?
8072                         tbl_data->tunnel->tunnel_id : 0,
8073                         tbl_data->group_id);
8074         }
8075         mlx5_cache_list_destroy(&tbl_data->matchers);
8076         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
8077 }
8078
8079 /**
8080  * Release a flow table.
8081  *
8082  * @param[in] sh
8083  *   Pointer to device shared structure.
8084  * @param[in] tbl
8085  *   Table resource to be released.
8086  *
8087  * @return
8088  *   Returns 0 if table was released, else return 1;
8089  */
8090 static int
8091 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
8092                              struct mlx5_flow_tbl_resource *tbl)
8093 {
8094         struct mlx5_flow_tbl_data_entry *tbl_data =
8095                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
8096
8097         if (!tbl)
8098                 return 0;
8099         return mlx5_hlist_unregister(sh->flow_tbls, &tbl_data->entry);
8100 }
8101
8102 int
8103 flow_dv_matcher_match_cb(struct mlx5_cache_list *list __rte_unused,
8104                          struct mlx5_cache_entry *entry, void *cb_ctx)
8105 {
8106         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8107         struct mlx5_flow_dv_matcher *ref = ctx->data;
8108         struct mlx5_flow_dv_matcher *cur = container_of(entry, typeof(*cur),
8109                                                         entry);
8110
8111         return cur->crc != ref->crc ||
8112                cur->priority != ref->priority ||
8113                memcmp((const void *)cur->mask.buf,
8114                       (const void *)ref->mask.buf, ref->mask.size);
8115 }
8116
8117 struct mlx5_cache_entry *
8118 flow_dv_matcher_create_cb(struct mlx5_cache_list *list,
8119                           struct mlx5_cache_entry *entry __rte_unused,
8120                           void *cb_ctx)
8121 {
8122         struct mlx5_dev_ctx_shared *sh = list->ctx;
8123         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8124         struct mlx5_flow_dv_matcher *ref = ctx->data;
8125         struct mlx5_flow_dv_matcher *cache;
8126         struct mlx5dv_flow_matcher_attr dv_attr = {
8127                 .type = IBV_FLOW_ATTR_NORMAL,
8128                 .match_mask = (void *)&ref->mask,
8129         };
8130         struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
8131                                                             typeof(*tbl), tbl);
8132         int ret;
8133
8134         cache = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*cache), 0, SOCKET_ID_ANY);
8135         if (!cache) {
8136                 rte_flow_error_set(ctx->error, ENOMEM,
8137                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8138                                    "cannot create matcher");
8139                 return NULL;
8140         }
8141         *cache = *ref;
8142         dv_attr.match_criteria_enable =
8143                 flow_dv_matcher_enable(cache->mask.buf);
8144         dv_attr.priority = ref->priority;
8145         if (tbl->is_egress)
8146                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
8147         ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->tbl.obj,
8148                                                &cache->matcher_object);
8149         if (ret) {
8150                 mlx5_free(cache);
8151                 rte_flow_error_set(ctx->error, ENOMEM,
8152                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8153                                    "cannot create matcher");
8154                 return NULL;
8155         }
8156         return &cache->entry;
8157 }
8158
8159 /**
8160  * Register the flow matcher.
8161  *
8162  * @param[in, out] dev
8163  *   Pointer to rte_eth_dev structure.
8164  * @param[in, out] matcher
8165  *   Pointer to flow matcher.
8166  * @param[in, out] key
8167  *   Pointer to flow table key.
8168  * @parm[in, out] dev_flow
8169  *   Pointer to the dev_flow.
8170  * @param[out] error
8171  *   pointer to error structure.
8172  *
8173  * @return
8174  *   0 on success otherwise -errno and errno is set.
8175  */
8176 static int
8177 flow_dv_matcher_register(struct rte_eth_dev *dev,
8178                          struct mlx5_flow_dv_matcher *ref,
8179                          union mlx5_flow_tbl_key *key,
8180                          struct mlx5_flow *dev_flow,
8181                          struct rte_flow_error *error)
8182 {
8183         struct mlx5_cache_entry *entry;
8184         struct mlx5_flow_dv_matcher *cache;
8185         struct mlx5_flow_tbl_resource *tbl;
8186         struct mlx5_flow_tbl_data_entry *tbl_data;
8187         struct mlx5_flow_cb_ctx ctx = {
8188                 .error = error,
8189                 .data = ref,
8190         };
8191
8192         tbl = flow_dv_tbl_resource_get(dev, key->table_id, key->direction,
8193                                        key->domain, false, NULL, 0, 0, error);
8194         if (!tbl)
8195                 return -rte_errno;      /* No need to refill the error info */
8196         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
8197         ref->tbl = tbl;
8198         entry = mlx5_cache_register(&tbl_data->matchers, &ctx);
8199         if (!entry) {
8200                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
8201                 return rte_flow_error_set(error, ENOMEM,
8202                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8203                                           "cannot allocate ref memory");
8204         }
8205         cache = container_of(entry, typeof(*cache), entry);
8206         dev_flow->handle->dvh.matcher = cache;
8207         return 0;
8208 }
8209
8210 struct mlx5_hlist_entry *
8211 flow_dv_tag_create_cb(struct mlx5_hlist *list, uint64_t key, void *ctx)
8212 {
8213         struct mlx5_dev_ctx_shared *sh = list->ctx;
8214         struct rte_flow_error *error = ctx;
8215         struct mlx5_flow_dv_tag_resource *entry;
8216         uint32_t idx = 0;
8217         int ret;
8218
8219         entry = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
8220         if (!entry) {
8221                 rte_flow_error_set(error, ENOMEM,
8222                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8223                                    "cannot allocate resource memory");
8224                 return NULL;
8225         }
8226         entry->idx = idx;
8227         ret = mlx5_flow_os_create_flow_action_tag(key,
8228                                                   &entry->action);
8229         if (ret) {
8230                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], idx);
8231                 rte_flow_error_set(error, ENOMEM,
8232                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8233                                    NULL, "cannot create action");
8234                 return NULL;
8235         }
8236         return &entry->entry;
8237 }
8238
8239 /**
8240  * Find existing tag resource or create and register a new one.
8241  *
8242  * @param dev[in, out]
8243  *   Pointer to rte_eth_dev structure.
8244  * @param[in, out] tag_be24
8245  *   Tag value in big endian then R-shift 8.
8246  * @parm[in, out] dev_flow
8247  *   Pointer to the dev_flow.
8248  * @param[out] error
8249  *   pointer to error structure.
8250  *
8251  * @return
8252  *   0 on success otherwise -errno and errno is set.
8253  */
8254 static int
8255 flow_dv_tag_resource_register
8256                         (struct rte_eth_dev *dev,
8257                          uint32_t tag_be24,
8258                          struct mlx5_flow *dev_flow,
8259                          struct rte_flow_error *error)
8260 {
8261         struct mlx5_priv *priv = dev->data->dev_private;
8262         struct mlx5_flow_dv_tag_resource *cache_resource;
8263         struct mlx5_hlist_entry *entry;
8264
8265         entry = mlx5_hlist_register(priv->sh->tag_table, tag_be24, error);
8266         if (entry) {
8267                 cache_resource = container_of
8268                         (entry, struct mlx5_flow_dv_tag_resource, entry);
8269                 dev_flow->handle->dvh.rix_tag = cache_resource->idx;
8270                 dev_flow->dv.tag_resource = cache_resource;
8271                 return 0;
8272         }
8273         return -rte_errno;
8274 }
8275
8276 void
8277 flow_dv_tag_remove_cb(struct mlx5_hlist *list,
8278                       struct mlx5_hlist_entry *entry)
8279 {
8280         struct mlx5_dev_ctx_shared *sh = list->ctx;
8281         struct mlx5_flow_dv_tag_resource *tag =
8282                 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
8283
8284         MLX5_ASSERT(tag && sh && tag->action);
8285         claim_zero(mlx5_flow_os_destroy_flow_action(tag->action));
8286         DRV_LOG(DEBUG, "Tag %p: removed.", (void *)tag);
8287         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
8288 }
8289
8290 /**
8291  * Release the tag.
8292  *
8293  * @param dev
8294  *   Pointer to Ethernet device.
8295  * @param tag_idx
8296  *   Tag index.
8297  *
8298  * @return
8299  *   1 while a reference on it exists, 0 when freed.
8300  */
8301 static int
8302 flow_dv_tag_release(struct rte_eth_dev *dev,
8303                     uint32_t tag_idx)
8304 {
8305         struct mlx5_priv *priv = dev->data->dev_private;
8306         struct mlx5_flow_dv_tag_resource *tag;
8307
8308         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG], tag_idx);
8309         if (!tag)
8310                 return 0;
8311         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
8312                 dev->data->port_id, (void *)tag, tag->entry.ref_cnt);
8313         return mlx5_hlist_unregister(priv->sh->tag_table, &tag->entry);
8314 }
8315
8316 /**
8317  * Translate port ID action to vport.
8318  *
8319  * @param[in] dev
8320  *   Pointer to rte_eth_dev structure.
8321  * @param[in] action
8322  *   Pointer to the port ID action.
8323  * @param[out] dst_port_id
8324  *   The target port ID.
8325  * @param[out] error
8326  *   Pointer to the error structure.
8327  *
8328  * @return
8329  *   0 on success, a negative errno value otherwise and rte_errno is set.
8330  */
8331 static int
8332 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
8333                                  const struct rte_flow_action *action,
8334                                  uint32_t *dst_port_id,
8335                                  struct rte_flow_error *error)
8336 {
8337         uint32_t port;
8338         struct mlx5_priv *priv;
8339         const struct rte_flow_action_port_id *conf =
8340                         (const struct rte_flow_action_port_id *)action->conf;
8341
8342         port = conf->original ? dev->data->port_id : conf->id;
8343         priv = mlx5_port_to_eswitch_info(port, false);
8344         if (!priv)
8345                 return rte_flow_error_set(error, -rte_errno,
8346                                           RTE_FLOW_ERROR_TYPE_ACTION,
8347                                           NULL,
8348                                           "No eswitch info was found for port");
8349 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
8350         /*
8351          * This parameter is transferred to
8352          * mlx5dv_dr_action_create_dest_ib_port().
8353          */
8354         *dst_port_id = priv->dev_port;
8355 #else
8356         /*
8357          * Legacy mode, no LAG configurations is supported.
8358          * This parameter is transferred to
8359          * mlx5dv_dr_action_create_dest_vport().
8360          */
8361         *dst_port_id = priv->vport_id;
8362 #endif
8363         return 0;
8364 }
8365
8366 /**
8367  * Create a counter with aging configuration.
8368  *
8369  * @param[in] dev
8370  *   Pointer to rte_eth_dev structure.
8371  * @param[out] count
8372  *   Pointer to the counter action configuration.
8373  * @param[in] age
8374  *   Pointer to the aging action configuration.
8375  *
8376  * @return
8377  *   Index to flow counter on success, 0 otherwise.
8378  */
8379 static uint32_t
8380 flow_dv_translate_create_counter(struct rte_eth_dev *dev,
8381                                 struct mlx5_flow *dev_flow,
8382                                 const struct rte_flow_action_count *count,
8383                                 const struct rte_flow_action_age *age)
8384 {
8385         uint32_t counter;
8386         struct mlx5_age_param *age_param;
8387
8388         if (count && count->shared)
8389                 counter = flow_dv_counter_get_shared(dev, count->id);
8390         else
8391                 counter = flow_dv_counter_alloc(dev, !!age);
8392         if (!counter || age == NULL)
8393                 return counter;
8394         age_param  = flow_dv_counter_idx_get_age(dev, counter);
8395         age_param->context = age->context ? age->context :
8396                 (void *)(uintptr_t)(dev_flow->flow_idx);
8397         age_param->timeout = age->timeout;
8398         age_param->port_id = dev->data->port_id;
8399         __atomic_store_n(&age_param->sec_since_last_hit, 0, __ATOMIC_RELAXED);
8400         __atomic_store_n(&age_param->state, AGE_CANDIDATE, __ATOMIC_RELAXED);
8401         return counter;
8402 }
8403 /**
8404  * Add Tx queue matcher
8405  *
8406  * @param[in] dev
8407  *   Pointer to the dev struct.
8408  * @param[in, out] matcher
8409  *   Flow matcher.
8410  * @param[in, out] key
8411  *   Flow matcher value.
8412  * @param[in] item
8413  *   Flow pattern to translate.
8414  * @param[in] inner
8415  *   Item is inner pattern.
8416  */
8417 static void
8418 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
8419                                 void *matcher, void *key,
8420                                 const struct rte_flow_item *item)
8421 {
8422         const struct mlx5_rte_flow_item_tx_queue *queue_m;
8423         const struct mlx5_rte_flow_item_tx_queue *queue_v;
8424         void *misc_m =
8425                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8426         void *misc_v =
8427                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8428         struct mlx5_txq_ctrl *txq;
8429         uint32_t queue;
8430
8431
8432         queue_m = (const void *)item->mask;
8433         if (!queue_m)
8434                 return;
8435         queue_v = (const void *)item->spec;
8436         if (!queue_v)
8437                 return;
8438         txq = mlx5_txq_get(dev, queue_v->queue);
8439         if (!txq)
8440                 return;
8441         queue = txq->obj->sq->id;
8442         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
8443         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
8444                  queue & queue_m->queue);
8445         mlx5_txq_release(dev, queue_v->queue);
8446 }
8447
8448 /**
8449  * Set the hash fields according to the @p flow information.
8450  *
8451  * @param[in] dev_flow
8452  *   Pointer to the mlx5_flow.
8453  * @param[in] rss_desc
8454  *   Pointer to the mlx5_flow_rss_desc.
8455  */
8456 static void
8457 flow_dv_hashfields_set(struct mlx5_flow *dev_flow,
8458                        struct mlx5_flow_rss_desc *rss_desc)
8459 {
8460         uint64_t items = dev_flow->handle->layers;
8461         int rss_inner = 0;
8462         uint64_t rss_types = rte_eth_rss_hf_refine(rss_desc->types);
8463
8464         dev_flow->hash_fields = 0;
8465 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
8466         if (rss_desc->level >= 2) {
8467                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
8468                 rss_inner = 1;
8469         }
8470 #endif
8471         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
8472             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
8473                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
8474                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
8475                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
8476                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
8477                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
8478                         else
8479                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
8480                 }
8481         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
8482                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
8483                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
8484                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
8485                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
8486                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
8487                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
8488                         else
8489                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
8490                 }
8491         }
8492         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
8493             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
8494                 if (rss_types & ETH_RSS_UDP) {
8495                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
8496                                 dev_flow->hash_fields |=
8497                                                 IBV_RX_HASH_SRC_PORT_UDP;
8498                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
8499                                 dev_flow->hash_fields |=
8500                                                 IBV_RX_HASH_DST_PORT_UDP;
8501                         else
8502                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
8503                 }
8504         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
8505                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
8506                 if (rss_types & ETH_RSS_TCP) {
8507                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
8508                                 dev_flow->hash_fields |=
8509                                                 IBV_RX_HASH_SRC_PORT_TCP;
8510                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
8511                                 dev_flow->hash_fields |=
8512                                                 IBV_RX_HASH_DST_PORT_TCP;
8513                         else
8514                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
8515                 }
8516         }
8517 }
8518
8519 /**
8520  * Prepare an Rx Hash queue.
8521  *
8522  * @param dev
8523  *   Pointer to Ethernet device.
8524  * @param[in] dev_flow
8525  *   Pointer to the mlx5_flow.
8526  * @param[in] rss_desc
8527  *   Pointer to the mlx5_flow_rss_desc.
8528  * @param[out] hrxq_idx
8529  *   Hash Rx queue index.
8530  *
8531  * @return
8532  *   The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
8533  */
8534 static struct mlx5_hrxq *
8535 flow_dv_hrxq_prepare(struct rte_eth_dev *dev,
8536                      struct mlx5_flow *dev_flow,
8537                      struct mlx5_flow_rss_desc *rss_desc,
8538                      uint32_t *hrxq_idx)
8539 {
8540         struct mlx5_priv *priv = dev->data->dev_private;
8541         struct mlx5_flow_handle *dh = dev_flow->handle;
8542         struct mlx5_hrxq *hrxq;
8543
8544         MLX5_ASSERT(rss_desc->queue_num);
8545         rss_desc->key_len = MLX5_RSS_HASH_KEY_LEN;
8546         rss_desc->hash_fields = dev_flow->hash_fields;
8547         rss_desc->tunnel = !!(dh->layers & MLX5_FLOW_LAYER_TUNNEL);
8548         rss_desc->standalone = false;
8549         *hrxq_idx = mlx5_hrxq_get(dev, rss_desc);
8550         if (!*hrxq_idx)
8551                 return NULL;
8552         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
8553                               *hrxq_idx);
8554         return hrxq;
8555 }
8556
8557 /**
8558  * Release sample sub action resource.
8559  *
8560  * @param[in, out] dev
8561  *   Pointer to rte_eth_dev structure.
8562  * @param[in] act_res
8563  *   Pointer to sample sub action resource.
8564  */
8565 static void
8566 flow_dv_sample_sub_actions_release(struct rte_eth_dev *dev,
8567                                    struct mlx5_flow_sub_actions_idx *act_res)
8568 {
8569         if (act_res->rix_hrxq) {
8570                 mlx5_hrxq_release(dev, act_res->rix_hrxq);
8571                 act_res->rix_hrxq = 0;
8572         }
8573         if (act_res->rix_encap_decap) {
8574                 flow_dv_encap_decap_resource_release(dev,
8575                                                      act_res->rix_encap_decap);
8576                 act_res->rix_encap_decap = 0;
8577         }
8578         if (act_res->rix_port_id_action) {
8579                 flow_dv_port_id_action_resource_release(dev,
8580                                                 act_res->rix_port_id_action);
8581                 act_res->rix_port_id_action = 0;
8582         }
8583         if (act_res->rix_tag) {
8584                 flow_dv_tag_release(dev, act_res->rix_tag);
8585                 act_res->rix_tag = 0;
8586         }
8587         if (act_res->cnt) {
8588                 flow_dv_counter_free(dev, act_res->cnt);
8589                 act_res->cnt = 0;
8590         }
8591 }
8592
8593 int
8594 flow_dv_sample_match_cb(struct mlx5_cache_list *list __rte_unused,
8595                         struct mlx5_cache_entry *entry, void *cb_ctx)
8596 {
8597         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8598         struct rte_eth_dev *dev = ctx->dev;
8599         struct mlx5_flow_dv_sample_resource *resource = ctx->data;
8600         struct mlx5_flow_dv_sample_resource *cache_resource =
8601                         container_of(entry, typeof(*cache_resource), entry);
8602
8603         if (resource->ratio == cache_resource->ratio &&
8604             resource->ft_type == cache_resource->ft_type &&
8605             resource->ft_id == cache_resource->ft_id &&
8606             resource->set_action == cache_resource->set_action &&
8607             !memcmp((void *)&resource->sample_act,
8608                     (void *)&cache_resource->sample_act,
8609                     sizeof(struct mlx5_flow_sub_actions_list))) {
8610                 /*
8611                  * Existing sample action should release the prepared
8612                  * sub-actions reference counter.
8613                  */
8614                 flow_dv_sample_sub_actions_release(dev,
8615                                                 &resource->sample_idx);
8616                 return 0;
8617         }
8618         return 1;
8619 }
8620
8621 struct mlx5_cache_entry *
8622 flow_dv_sample_create_cb(struct mlx5_cache_list *list __rte_unused,
8623                          struct mlx5_cache_entry *entry __rte_unused,
8624                          void *cb_ctx)
8625 {
8626         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8627         struct rte_eth_dev *dev = ctx->dev;
8628         struct mlx5_flow_dv_sample_resource *resource = ctx->data;
8629         void **sample_dv_actions = resource->sub_actions;
8630         struct mlx5_flow_dv_sample_resource *cache_resource;
8631         struct mlx5dv_dr_flow_sampler_attr sampler_attr;
8632         struct mlx5_priv *priv = dev->data->dev_private;
8633         struct mlx5_dev_ctx_shared *sh = priv->sh;
8634         struct mlx5_flow_tbl_resource *tbl;
8635         uint32_t idx = 0;
8636         const uint32_t next_ft_step = 1;
8637         uint32_t next_ft_id = resource->ft_id + next_ft_step;
8638         uint8_t is_egress = 0;
8639         uint8_t is_transfer = 0;
8640         struct rte_flow_error *error = ctx->error;
8641
8642         /* Register new sample resource. */
8643         cache_resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
8644         if (!cache_resource) {
8645                 rte_flow_error_set(error, ENOMEM,
8646                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8647                                           NULL,
8648                                           "cannot allocate resource memory");
8649                 return NULL;
8650         }
8651         *cache_resource = *resource;
8652         /* Create normal path table level */
8653         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
8654                 is_transfer = 1;
8655         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
8656                 is_egress = 1;
8657         tbl = flow_dv_tbl_resource_get(dev, next_ft_id,
8658                                         is_egress, is_transfer,
8659                                         true, NULL, 0, 0, error);
8660         if (!tbl) {
8661                 rte_flow_error_set(error, ENOMEM,
8662                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8663                                           NULL,
8664                                           "fail to create normal path table "
8665                                           "for sample");
8666                 goto error;
8667         }
8668         cache_resource->normal_path_tbl = tbl;
8669         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
8670                 cache_resource->default_miss =
8671                                 mlx5_glue->dr_create_flow_action_default_miss();
8672                 if (!cache_resource->default_miss) {
8673                         rte_flow_error_set(error, ENOMEM,
8674                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8675                                                 NULL,
8676                                                 "cannot create default miss "
8677                                                 "action");
8678                         goto error;
8679                 }
8680                 sample_dv_actions[resource->sample_act.actions_num++] =
8681                                                 cache_resource->default_miss;
8682         }
8683         /* Create a DR sample action */
8684         sampler_attr.sample_ratio = cache_resource->ratio;
8685         sampler_attr.default_next_table = tbl->obj;
8686         sampler_attr.num_sample_actions = resource->sample_act.actions_num;
8687         sampler_attr.sample_actions = (struct mlx5dv_dr_action **)
8688                                                         &sample_dv_actions[0];
8689         sampler_attr.action = cache_resource->set_action;
8690         cache_resource->verbs_action =
8691                 mlx5_glue->dr_create_flow_action_sampler(&sampler_attr);
8692         if (!cache_resource->verbs_action) {
8693                 rte_flow_error_set(error, ENOMEM,
8694                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8695                                         NULL, "cannot create sample action");
8696                 goto error;
8697         }
8698         cache_resource->idx = idx;
8699         return &cache_resource->entry;
8700 error:
8701         if (cache_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB &&
8702             cache_resource->default_miss)
8703                 claim_zero(mlx5_glue->destroy_flow_action
8704                                 (cache_resource->default_miss));
8705         else
8706                 flow_dv_sample_sub_actions_release(dev,
8707                                                    &cache_resource->sample_idx);
8708         if (cache_resource->normal_path_tbl)
8709                 flow_dv_tbl_resource_release(MLX5_SH(dev),
8710                                 cache_resource->normal_path_tbl);
8711         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_SAMPLE], idx);
8712         return NULL;
8713
8714 }
8715
8716 /**
8717  * Find existing sample resource or create and register a new one.
8718  *
8719  * @param[in, out] dev
8720  *   Pointer to rte_eth_dev structure.
8721  * @param[in] resource
8722  *   Pointer to sample resource.
8723  * @parm[in, out] dev_flow
8724  *   Pointer to the dev_flow.
8725  * @param[out] error
8726  *   pointer to error structure.
8727  *
8728  * @return
8729  *   0 on success otherwise -errno and errno is set.
8730  */
8731 static int
8732 flow_dv_sample_resource_register(struct rte_eth_dev *dev,
8733                          struct mlx5_flow_dv_sample_resource *resource,
8734                          struct mlx5_flow *dev_flow,
8735                          struct rte_flow_error *error)
8736 {
8737         struct mlx5_flow_dv_sample_resource *cache_resource;
8738         struct mlx5_cache_entry *entry;
8739         struct mlx5_priv *priv = dev->data->dev_private;
8740         struct mlx5_flow_cb_ctx ctx = {
8741                 .dev = dev,
8742                 .error = error,
8743                 .data = resource,
8744         };
8745
8746         entry = mlx5_cache_register(&priv->sh->sample_action_list, &ctx);
8747         if (!entry)
8748                 return -rte_errno;
8749         cache_resource = container_of(entry, typeof(*cache_resource), entry);
8750         dev_flow->handle->dvh.rix_sample = cache_resource->idx;
8751         dev_flow->dv.sample_res = cache_resource;
8752         return 0;
8753 }
8754
8755 int
8756 flow_dv_dest_array_match_cb(struct mlx5_cache_list *list __rte_unused,
8757                             struct mlx5_cache_entry *entry, void *cb_ctx)
8758 {
8759         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8760         struct mlx5_flow_dv_dest_array_resource *resource = ctx->data;
8761         struct rte_eth_dev *dev = ctx->dev;
8762         struct mlx5_flow_dv_dest_array_resource *cache_resource =
8763                         container_of(entry, typeof(*cache_resource), entry);
8764         uint32_t idx = 0;
8765
8766         if (resource->num_of_dest == cache_resource->num_of_dest &&
8767             resource->ft_type == cache_resource->ft_type &&
8768             !memcmp((void *)cache_resource->sample_act,
8769                     (void *)resource->sample_act,
8770                    (resource->num_of_dest *
8771                    sizeof(struct mlx5_flow_sub_actions_list)))) {
8772                 /*
8773                  * Existing sample action should release the prepared
8774                  * sub-actions reference counter.
8775                  */
8776                 for (idx = 0; idx < resource->num_of_dest; idx++)
8777                         flow_dv_sample_sub_actions_release(dev,
8778                                         &resource->sample_idx[idx]);
8779                 return 0;
8780         }
8781         return 1;
8782 }
8783
8784 struct mlx5_cache_entry *
8785 flow_dv_dest_array_create_cb(struct mlx5_cache_list *list __rte_unused,
8786                          struct mlx5_cache_entry *entry __rte_unused,
8787                          void *cb_ctx)
8788 {
8789         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8790         struct rte_eth_dev *dev = ctx->dev;
8791         struct mlx5_flow_dv_dest_array_resource *cache_resource;
8792         struct mlx5_flow_dv_dest_array_resource *resource = ctx->data;
8793         struct mlx5dv_dr_action_dest_attr *dest_attr[MLX5_MAX_DEST_NUM] = { 0 };
8794         struct mlx5dv_dr_action_dest_reformat dest_reformat[MLX5_MAX_DEST_NUM];
8795         struct mlx5_priv *priv = dev->data->dev_private;
8796         struct mlx5_dev_ctx_shared *sh = priv->sh;
8797         struct mlx5_flow_sub_actions_list *sample_act;
8798         struct mlx5dv_dr_domain *domain;
8799         uint32_t idx = 0, res_idx = 0;
8800         struct rte_flow_error *error = ctx->error;
8801
8802         /* Register new destination array resource. */
8803         cache_resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
8804                                             &res_idx);
8805         if (!cache_resource) {
8806                 rte_flow_error_set(error, ENOMEM,
8807                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8808                                           NULL,
8809                                           "cannot allocate resource memory");
8810                 return NULL;
8811         }
8812         *cache_resource = *resource;
8813         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
8814                 domain = sh->fdb_domain;
8815         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
8816                 domain = sh->rx_domain;
8817         else
8818                 domain = sh->tx_domain;
8819         for (idx = 0; idx < resource->num_of_dest; idx++) {
8820                 dest_attr[idx] = (struct mlx5dv_dr_action_dest_attr *)
8821                                  mlx5_malloc(MLX5_MEM_ZERO,
8822                                  sizeof(struct mlx5dv_dr_action_dest_attr),
8823                                  0, SOCKET_ID_ANY);
8824                 if (!dest_attr[idx]) {
8825                         rte_flow_error_set(error, ENOMEM,
8826                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8827                                            NULL,
8828                                            "cannot allocate resource memory");
8829                         goto error;
8830                 }
8831                 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST;
8832                 sample_act = &resource->sample_act[idx];
8833                 if (sample_act->action_flags == MLX5_FLOW_ACTION_QUEUE) {
8834                         dest_attr[idx]->dest = sample_act->dr_queue_action;
8835                 } else if (sample_act->action_flags ==
8836                           (MLX5_FLOW_ACTION_PORT_ID | MLX5_FLOW_ACTION_ENCAP)) {
8837                         dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST_REFORMAT;
8838                         dest_attr[idx]->dest_reformat = &dest_reformat[idx];
8839                         dest_attr[idx]->dest_reformat->reformat =
8840                                         sample_act->dr_encap_action;
8841                         dest_attr[idx]->dest_reformat->dest =
8842                                         sample_act->dr_port_id_action;
8843                 } else if (sample_act->action_flags ==
8844                            MLX5_FLOW_ACTION_PORT_ID) {
8845                         dest_attr[idx]->dest = sample_act->dr_port_id_action;
8846                 }
8847         }
8848         /* create a dest array actioin */
8849         cache_resource->action = mlx5_glue->dr_create_flow_action_dest_array
8850                                                 (domain,
8851                                                  cache_resource->num_of_dest,
8852                                                  dest_attr);
8853         if (!cache_resource->action) {
8854                 rte_flow_error_set(error, ENOMEM,
8855                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8856                                    NULL,
8857                                    "cannot create destination array action");
8858                 goto error;
8859         }
8860         cache_resource->idx = res_idx;
8861         for (idx = 0; idx < resource->num_of_dest; idx++)
8862                 mlx5_free(dest_attr[idx]);
8863         return &cache_resource->entry;
8864 error:
8865         for (idx = 0; idx < resource->num_of_dest; idx++) {
8866                 struct mlx5_flow_sub_actions_idx *act_res =
8867                                         &cache_resource->sample_idx[idx];
8868                 if (act_res->rix_hrxq &&
8869                     !mlx5_hrxq_release(dev,
8870                                 act_res->rix_hrxq))
8871                         act_res->rix_hrxq = 0;
8872                 if (act_res->rix_encap_decap &&
8873                         !flow_dv_encap_decap_resource_release(dev,
8874                                 act_res->rix_encap_decap))
8875                         act_res->rix_encap_decap = 0;
8876                 if (act_res->rix_port_id_action &&
8877                         !flow_dv_port_id_action_resource_release(dev,
8878                                 act_res->rix_port_id_action))
8879                         act_res->rix_port_id_action = 0;
8880                 if (dest_attr[idx])
8881                         mlx5_free(dest_attr[idx]);
8882         }
8883
8884         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DEST_ARRAY], res_idx);
8885         return NULL;
8886 }
8887
8888 /**
8889  * Find existing destination array resource or create and register a new one.
8890  *
8891  * @param[in, out] dev
8892  *   Pointer to rte_eth_dev structure.
8893  * @param[in] resource
8894  *   Pointer to destination array resource.
8895  * @parm[in, out] dev_flow
8896  *   Pointer to the dev_flow.
8897  * @param[out] error
8898  *   pointer to error structure.
8899  *
8900  * @return
8901  *   0 on success otherwise -errno and errno is set.
8902  */
8903 static int
8904 flow_dv_dest_array_resource_register(struct rte_eth_dev *dev,
8905                          struct mlx5_flow_dv_dest_array_resource *resource,
8906                          struct mlx5_flow *dev_flow,
8907                          struct rte_flow_error *error)
8908 {
8909         struct mlx5_flow_dv_dest_array_resource *cache_resource;
8910         struct mlx5_priv *priv = dev->data->dev_private;
8911         struct mlx5_cache_entry *entry;
8912         struct mlx5_flow_cb_ctx ctx = {
8913                 .dev = dev,
8914                 .error = error,
8915                 .data = resource,
8916         };
8917
8918         entry = mlx5_cache_register(&priv->sh->dest_array_list, &ctx);
8919         if (!entry)
8920                 return -rte_errno;
8921         cache_resource = container_of(entry, typeof(*cache_resource), entry);
8922         dev_flow->handle->dvh.rix_dest_array = cache_resource->idx;
8923         dev_flow->dv.dest_array_res = cache_resource;
8924         return 0;
8925 }
8926
8927 /**
8928  * Convert Sample action to DV specification.
8929  *
8930  * @param[in] dev
8931  *   Pointer to rte_eth_dev structure.
8932  * @param[in] action
8933  *   Pointer to action structure.
8934  * @param[in, out] dev_flow
8935  *   Pointer to the mlx5_flow.
8936  * @param[in] attr
8937  *   Pointer to the flow attributes.
8938  * @param[in, out] num_of_dest
8939  *   Pointer to the num of destination.
8940  * @param[in, out] sample_actions
8941  *   Pointer to sample actions list.
8942  * @param[in, out] res
8943  *   Pointer to sample resource.
8944  * @param[out] error
8945  *   Pointer to the error structure.
8946  *
8947  * @return
8948  *   0 on success, a negative errno value otherwise and rte_errno is set.
8949  */
8950 static int
8951 flow_dv_translate_action_sample(struct rte_eth_dev *dev,
8952                                 const struct rte_flow_action *action,
8953                                 struct mlx5_flow *dev_flow,
8954                                 const struct rte_flow_attr *attr,
8955                                 uint32_t *num_of_dest,
8956                                 void **sample_actions,
8957                                 struct mlx5_flow_dv_sample_resource *res,
8958                                 struct rte_flow_error *error)
8959 {
8960         struct mlx5_priv *priv = dev->data->dev_private;
8961         const struct rte_flow_action_sample *sample_action;
8962         const struct rte_flow_action *sub_actions;
8963         const struct rte_flow_action_queue *queue;
8964         struct mlx5_flow_sub_actions_list *sample_act;
8965         struct mlx5_flow_sub_actions_idx *sample_idx;
8966         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
8967         struct mlx5_flow_rss_desc *rss_desc;
8968         uint64_t action_flags = 0;
8969
8970         MLX5_ASSERT(wks);
8971         rss_desc = &wks->rss_desc[!!wks->flow_nested_idx];
8972         sample_act = &res->sample_act;
8973         sample_idx = &res->sample_idx;
8974         sample_action = (const struct rte_flow_action_sample *)action->conf;
8975         res->ratio = sample_action->ratio;
8976         sub_actions = sample_action->actions;
8977         for (; sub_actions->type != RTE_FLOW_ACTION_TYPE_END; sub_actions++) {
8978                 int type = sub_actions->type;
8979                 uint32_t pre_rix = 0;
8980                 void *pre_r;
8981                 switch (type) {
8982                 case RTE_FLOW_ACTION_TYPE_QUEUE:
8983                 {
8984                         struct mlx5_hrxq *hrxq;
8985                         uint32_t hrxq_idx;
8986
8987                         queue = sub_actions->conf;
8988                         rss_desc->queue_num = 1;
8989                         rss_desc->queue[0] = queue->index;
8990                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
8991                                                     rss_desc, &hrxq_idx);
8992                         if (!hrxq)
8993                                 return rte_flow_error_set
8994                                         (error, rte_errno,
8995                                          RTE_FLOW_ERROR_TYPE_ACTION,
8996                                          NULL,
8997                                          "cannot create fate queue");
8998                         sample_act->dr_queue_action = hrxq->action;
8999                         sample_idx->rix_hrxq = hrxq_idx;
9000                         sample_actions[sample_act->actions_num++] =
9001                                                 hrxq->action;
9002                         (*num_of_dest)++;
9003                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
9004                         if (action_flags & MLX5_FLOW_ACTION_MARK)
9005                                 dev_flow->handle->rix_hrxq = hrxq_idx;
9006                         dev_flow->handle->fate_action =
9007                                         MLX5_FLOW_FATE_QUEUE;
9008                         break;
9009                 }
9010                 case RTE_FLOW_ACTION_TYPE_MARK:
9011                 {
9012                         uint32_t tag_be = mlx5_flow_mark_set
9013                                 (((const struct rte_flow_action_mark *)
9014                                 (sub_actions->conf))->id);
9015
9016                         dev_flow->handle->mark = 1;
9017                         pre_rix = dev_flow->handle->dvh.rix_tag;
9018                         /* Save the mark resource before sample */
9019                         pre_r = dev_flow->dv.tag_resource;
9020                         if (flow_dv_tag_resource_register(dev, tag_be,
9021                                                   dev_flow, error))
9022                                 return -rte_errno;
9023                         MLX5_ASSERT(dev_flow->dv.tag_resource);
9024                         sample_act->dr_tag_action =
9025                                 dev_flow->dv.tag_resource->action;
9026                         sample_idx->rix_tag =
9027                                 dev_flow->handle->dvh.rix_tag;
9028                         sample_actions[sample_act->actions_num++] =
9029                                                 sample_act->dr_tag_action;
9030                         /* Recover the mark resource after sample */
9031                         dev_flow->dv.tag_resource = pre_r;
9032                         dev_flow->handle->dvh.rix_tag = pre_rix;
9033                         action_flags |= MLX5_FLOW_ACTION_MARK;
9034                         break;
9035                 }
9036                 case RTE_FLOW_ACTION_TYPE_COUNT:
9037                 {
9038                         uint32_t counter;
9039
9040                         counter = flow_dv_translate_create_counter(dev,
9041                                         dev_flow, sub_actions->conf, 0);
9042                         if (!counter)
9043                                 return rte_flow_error_set
9044                                                 (error, rte_errno,
9045                                                  RTE_FLOW_ERROR_TYPE_ACTION,
9046                                                  NULL,
9047                                                  "cannot create counter"
9048                                                  " object.");
9049                         sample_idx->cnt = counter;
9050                         sample_act->dr_cnt_action =
9051                                   (flow_dv_counter_get_by_idx(dev,
9052                                   counter, NULL))->action;
9053                         sample_actions[sample_act->actions_num++] =
9054                                                 sample_act->dr_cnt_action;
9055                         action_flags |= MLX5_FLOW_ACTION_COUNT;
9056                         break;
9057                 }
9058                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
9059                 {
9060                         struct mlx5_flow_dv_port_id_action_resource
9061                                         port_id_resource;
9062                         uint32_t port_id = 0;
9063
9064                         memset(&port_id_resource, 0, sizeof(port_id_resource));
9065                         /* Save the port id resource before sample */
9066                         pre_rix = dev_flow->handle->rix_port_id_action;
9067                         pre_r = dev_flow->dv.port_id_action;
9068                         if (flow_dv_translate_action_port_id(dev, sub_actions,
9069                                                              &port_id, error))
9070                                 return -rte_errno;
9071                         port_id_resource.port_id = port_id;
9072                         if (flow_dv_port_id_action_resource_register
9073                             (dev, &port_id_resource, dev_flow, error))
9074                                 return -rte_errno;
9075                         sample_act->dr_port_id_action =
9076                                 dev_flow->dv.port_id_action->action;
9077                         sample_idx->rix_port_id_action =
9078                                 dev_flow->handle->rix_port_id_action;
9079                         sample_actions[sample_act->actions_num++] =
9080                                                 sample_act->dr_port_id_action;
9081                         /* Recover the port id resource after sample */
9082                         dev_flow->dv.port_id_action = pre_r;
9083                         dev_flow->handle->rix_port_id_action = pre_rix;
9084                         (*num_of_dest)++;
9085                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
9086                         break;
9087                 }
9088                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
9089                         /* Save the encap resource before sample */
9090                         pre_rix = dev_flow->handle->dvh.rix_encap_decap;
9091                         pre_r = dev_flow->dv.encap_decap;
9092                         if (flow_dv_create_action_l2_encap(dev, sub_actions,
9093                                                            dev_flow,
9094                                                            attr->transfer,
9095                                                            error))
9096                                 return -rte_errno;
9097                         sample_act->dr_encap_action =
9098                                 dev_flow->dv.encap_decap->action;
9099                         sample_idx->rix_encap_decap =
9100                                 dev_flow->handle->dvh.rix_encap_decap;
9101                         sample_actions[sample_act->actions_num++] =
9102                                                 sample_act->dr_encap_action;
9103                         /* Recover the encap resource after sample */
9104                         dev_flow->dv.encap_decap = pre_r;
9105                         dev_flow->handle->dvh.rix_encap_decap = pre_rix;
9106                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
9107                         break;
9108                 default:
9109                         return rte_flow_error_set(error, EINVAL,
9110                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
9111                                 NULL,
9112                                 "Not support for sampler action");
9113                 }
9114         }
9115         sample_act->action_flags = action_flags;
9116         res->ft_id = dev_flow->dv.group;
9117         if (attr->transfer) {
9118                 union {
9119                         uint32_t action_in[MLX5_ST_SZ_DW(set_action_in)];
9120                         uint64_t set_action;
9121                 } action_ctx = { .set_action = 0 };
9122
9123                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
9124                 MLX5_SET(set_action_in, action_ctx.action_in, action_type,
9125                          MLX5_MODIFICATION_TYPE_SET);
9126                 MLX5_SET(set_action_in, action_ctx.action_in, field,
9127                          MLX5_MODI_META_REG_C_0);
9128                 MLX5_SET(set_action_in, action_ctx.action_in, data,
9129                          priv->vport_meta_tag);
9130                 res->set_action = action_ctx.set_action;
9131         } else if (attr->ingress) {
9132                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
9133         } else {
9134                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_TX;
9135         }
9136         return 0;
9137 }
9138
9139 /**
9140  * Convert Sample action to DV specification.
9141  *
9142  * @param[in] dev
9143  *   Pointer to rte_eth_dev structure.
9144  * @param[in, out] dev_flow
9145  *   Pointer to the mlx5_flow.
9146  * @param[in] num_of_dest
9147  *   The num of destination.
9148  * @param[in, out] res
9149  *   Pointer to sample resource.
9150  * @param[in, out] mdest_res
9151  *   Pointer to destination array resource.
9152  * @param[in] sample_actions
9153  *   Pointer to sample path actions list.
9154  * @param[in] action_flags
9155  *   Holds the actions detected until now.
9156  * @param[out] error
9157  *   Pointer to the error structure.
9158  *
9159  * @return
9160  *   0 on success, a negative errno value otherwise and rte_errno is set.
9161  */
9162 static int
9163 flow_dv_create_action_sample(struct rte_eth_dev *dev,
9164                              struct mlx5_flow *dev_flow,
9165                              uint32_t num_of_dest,
9166                              struct mlx5_flow_dv_sample_resource *res,
9167                              struct mlx5_flow_dv_dest_array_resource *mdest_res,
9168                              void **sample_actions,
9169                              uint64_t action_flags,
9170                              struct rte_flow_error *error)
9171 {
9172         /* update normal path action resource into last index of array */
9173         uint32_t dest_index = MLX5_MAX_DEST_NUM - 1;
9174         struct mlx5_flow_sub_actions_list *sample_act =
9175                                         &mdest_res->sample_act[dest_index];
9176         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
9177         struct mlx5_flow_rss_desc *rss_desc;
9178         uint32_t normal_idx = 0;
9179         struct mlx5_hrxq *hrxq;
9180         uint32_t hrxq_idx;
9181
9182         MLX5_ASSERT(wks);
9183         rss_desc = &wks->rss_desc[!!wks->flow_nested_idx];
9184         if (num_of_dest > 1) {
9185                 if (sample_act->action_flags & MLX5_FLOW_ACTION_QUEUE) {
9186                         /* Handle QP action for mirroring */
9187                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
9188                                                     rss_desc, &hrxq_idx);
9189                         if (!hrxq)
9190                                 return rte_flow_error_set
9191                                      (error, rte_errno,
9192                                       RTE_FLOW_ERROR_TYPE_ACTION,
9193                                       NULL,
9194                                       "cannot create rx queue");
9195                         normal_idx++;
9196                         mdest_res->sample_idx[dest_index].rix_hrxq = hrxq_idx;
9197                         sample_act->dr_queue_action = hrxq->action;
9198                         if (action_flags & MLX5_FLOW_ACTION_MARK)
9199                                 dev_flow->handle->rix_hrxq = hrxq_idx;
9200                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
9201                 }
9202                 if (sample_act->action_flags & MLX5_FLOW_ACTION_ENCAP) {
9203                         normal_idx++;
9204                         mdest_res->sample_idx[dest_index].rix_encap_decap =
9205                                 dev_flow->handle->dvh.rix_encap_decap;
9206                         sample_act->dr_encap_action =
9207                                 dev_flow->dv.encap_decap->action;
9208                 }
9209                 if (sample_act->action_flags & MLX5_FLOW_ACTION_PORT_ID) {
9210                         normal_idx++;
9211                         mdest_res->sample_idx[dest_index].rix_port_id_action =
9212                                 dev_flow->handle->rix_port_id_action;
9213                         sample_act->dr_port_id_action =
9214                                 dev_flow->dv.port_id_action->action;
9215                 }
9216                 sample_act->actions_num = normal_idx;
9217                 /* update sample action resource into first index of array */
9218                 mdest_res->ft_type = res->ft_type;
9219                 memcpy(&mdest_res->sample_idx[0], &res->sample_idx,
9220                                 sizeof(struct mlx5_flow_sub_actions_idx));
9221                 memcpy(&mdest_res->sample_act[0], &res->sample_act,
9222                                 sizeof(struct mlx5_flow_sub_actions_list));
9223                 mdest_res->num_of_dest = num_of_dest;
9224                 if (flow_dv_dest_array_resource_register(dev, mdest_res,
9225                                                          dev_flow, error))
9226                         return rte_flow_error_set(error, EINVAL,
9227                                                   RTE_FLOW_ERROR_TYPE_ACTION,
9228                                                   NULL, "can't create sample "
9229                                                   "action");
9230         } else {
9231                 res->sub_actions = sample_actions;
9232                 if (flow_dv_sample_resource_register(dev, res, dev_flow, error))
9233                         return rte_flow_error_set(error, EINVAL,
9234                                                   RTE_FLOW_ERROR_TYPE_ACTION,
9235                                                   NULL,
9236                                                   "can't create sample action");
9237         }
9238         return 0;
9239 }
9240
9241 /**
9242  * Fill the flow with DV spec, lock free
9243  * (mutex should be acquired by caller).
9244  *
9245  * @param[in] dev
9246  *   Pointer to rte_eth_dev structure.
9247  * @param[in, out] dev_flow
9248  *   Pointer to the sub flow.
9249  * @param[in] attr
9250  *   Pointer to the flow attributes.
9251  * @param[in] items
9252  *   Pointer to the list of items.
9253  * @param[in] actions
9254  *   Pointer to the list of actions.
9255  * @param[out] error
9256  *   Pointer to the error structure.
9257  *
9258  * @return
9259  *   0 on success, a negative errno value otherwise and rte_errno is set.
9260  */
9261 static int
9262 flow_dv_translate(struct rte_eth_dev *dev,
9263                   struct mlx5_flow *dev_flow,
9264                   const struct rte_flow_attr *attr,
9265                   const struct rte_flow_item items[],
9266                   const struct rte_flow_action actions[],
9267                   struct rte_flow_error *error)
9268 {
9269         struct mlx5_priv *priv = dev->data->dev_private;
9270         struct mlx5_dev_config *dev_conf = &priv->config;
9271         struct rte_flow *flow = dev_flow->flow;
9272         struct mlx5_flow_handle *handle = dev_flow->handle;
9273         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
9274         struct mlx5_flow_rss_desc *rss_desc;
9275         uint64_t item_flags = 0;
9276         uint64_t last_item = 0;
9277         uint64_t action_flags = 0;
9278         uint64_t priority = attr->priority;
9279         struct mlx5_flow_dv_matcher matcher = {
9280                 .mask = {
9281                         .size = sizeof(matcher.mask.buf) -
9282                                 MLX5_ST_SZ_BYTES(fte_match_set_misc4),
9283                 },
9284         };
9285         int actions_n = 0;
9286         bool actions_end = false;
9287         union {
9288                 struct mlx5_flow_dv_modify_hdr_resource res;
9289                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
9290                             sizeof(struct mlx5_modification_cmd) *
9291                             (MLX5_MAX_MODIFY_NUM + 1)];
9292         } mhdr_dummy;
9293         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
9294         const struct rte_flow_action_count *count = NULL;
9295         const struct rte_flow_action_age *age = NULL;
9296         union flow_dv_attr flow_attr = { .attr = 0 };
9297         uint32_t tag_be;
9298         union mlx5_flow_tbl_key tbl_key;
9299         uint32_t modify_action_position = UINT32_MAX;
9300         void *match_mask = matcher.mask.buf;
9301         void *match_value = dev_flow->dv.value.buf;
9302         uint8_t next_protocol = 0xff;
9303         struct rte_vlan_hdr vlan = { 0 };
9304         struct mlx5_flow_dv_dest_array_resource mdest_res;
9305         struct mlx5_flow_dv_sample_resource sample_res;
9306         void *sample_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
9307         struct mlx5_flow_sub_actions_list *sample_act;
9308         uint32_t sample_act_pos = UINT32_MAX;
9309         uint32_t num_of_dest = 0;
9310         int tmp_actions_n = 0;
9311         uint32_t table;
9312         int ret = 0;
9313         const struct mlx5_flow_tunnel *tunnel;
9314         struct flow_grp_info grp_info = {
9315                 .external = !!dev_flow->external,
9316                 .transfer = !!attr->transfer,
9317                 .fdb_def_rule = !!priv->fdb_def_rule,
9318         };
9319
9320         MLX5_ASSERT(wks);
9321         rss_desc = &wks->rss_desc[!!wks->flow_nested_idx];
9322         memset(&mdest_res, 0, sizeof(struct mlx5_flow_dv_dest_array_resource));
9323         memset(&sample_res, 0, sizeof(struct mlx5_flow_dv_sample_resource));
9324         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
9325                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
9326         /* update normal path action resource into last index of array */
9327         sample_act = &mdest_res.sample_act[MLX5_MAX_DEST_NUM - 1];
9328         tunnel = is_flow_tunnel_match_rule(dev, attr, items, actions) ?
9329                  flow_items_to_tunnel(items) :
9330                  is_flow_tunnel_steer_rule(dev, attr, items, actions) ?
9331                  flow_actions_to_tunnel(actions) :
9332                  dev_flow->tunnel ? dev_flow->tunnel : NULL;
9333         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
9334                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
9335         grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
9336                                 (dev, tunnel, attr, items, actions);
9337         ret = mlx5_flow_group_to_table(dev, tunnel, attr->group, &table,
9338                                        grp_info, error);
9339         if (ret)
9340                 return ret;
9341         dev_flow->dv.group = table;
9342         if (attr->transfer)
9343                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
9344         if (priority == MLX5_FLOW_PRIO_RSVD)
9345                 priority = dev_conf->flow_prio - 1;
9346         /* number of actions must be set to 0 in case of dirty stack. */
9347         mhdr_res->actions_num = 0;
9348         if (is_flow_tunnel_match_rule(dev, attr, items, actions)) {
9349                 /*
9350                  * do not add decap action if match rule drops packet
9351                  * HW rejects rules with decap & drop
9352                  */
9353                 bool add_decap = true;
9354                 const struct rte_flow_action *ptr = actions;
9355                 struct mlx5_flow_tbl_resource *tbl;
9356
9357                 for (; ptr->type != RTE_FLOW_ACTION_TYPE_END; ptr++) {
9358                         if (ptr->type == RTE_FLOW_ACTION_TYPE_DROP) {
9359                                 add_decap = false;
9360                                 break;
9361                         }
9362                 }
9363                 if (add_decap) {
9364                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
9365                                                            attr->transfer,
9366                                                            error))
9367                                 return -rte_errno;
9368                         dev_flow->dv.actions[actions_n++] =
9369                                         dev_flow->dv.encap_decap->action;
9370                         action_flags |= MLX5_FLOW_ACTION_DECAP;
9371                 }
9372                 /*
9373                  * bind table_id with <group, table> for tunnel match rule.
9374                  * Tunnel set rule establishes that bind in JUMP action handler.
9375                  * Required for scenario when application creates tunnel match
9376                  * rule before tunnel set rule.
9377                  */
9378                 tbl = flow_dv_tbl_resource_get(dev, table, attr->egress,
9379                                                attr->transfer,
9380                                                !!dev_flow->external, tunnel,
9381                                                attr->group, 0, error);
9382                 if (!tbl)
9383                         return rte_flow_error_set
9384                                (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
9385                                actions, "cannot register tunnel group");
9386         }
9387         for (; !actions_end ; actions++) {
9388                 const struct rte_flow_action_queue *queue;
9389                 const struct rte_flow_action_rss *rss;
9390                 const struct rte_flow_action *action = actions;
9391                 const uint8_t *rss_key;
9392                 const struct rte_flow_action_meter *mtr;
9393                 struct mlx5_flow_tbl_resource *tbl;
9394                 uint32_t port_id = 0;
9395                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
9396                 int action_type = actions->type;
9397                 const struct rte_flow_action *found_action = NULL;
9398                 struct mlx5_flow_meter *fm = NULL;
9399                 uint32_t jump_group = 0;
9400
9401                 if (!mlx5_flow_os_action_supported(action_type))
9402                         return rte_flow_error_set(error, ENOTSUP,
9403                                                   RTE_FLOW_ERROR_TYPE_ACTION,
9404                                                   actions,
9405                                                   "action not supported");
9406                 switch (action_type) {
9407                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
9408                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
9409                         break;
9410                 case RTE_FLOW_ACTION_TYPE_VOID:
9411                         break;
9412                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
9413                         if (flow_dv_translate_action_port_id(dev, action,
9414                                                              &port_id, error))
9415                                 return -rte_errno;
9416                         port_id_resource.port_id = port_id;
9417                         MLX5_ASSERT(!handle->rix_port_id_action);
9418                         if (flow_dv_port_id_action_resource_register
9419                             (dev, &port_id_resource, dev_flow, error))
9420                                 return -rte_errno;
9421                         dev_flow->dv.actions[actions_n++] =
9422                                         dev_flow->dv.port_id_action->action;
9423                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
9424                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_PORT_ID;
9425                         sample_act->action_flags |= MLX5_FLOW_ACTION_PORT_ID;
9426                         num_of_dest++;
9427                         break;
9428                 case RTE_FLOW_ACTION_TYPE_FLAG:
9429                         action_flags |= MLX5_FLOW_ACTION_FLAG;
9430                         dev_flow->handle->mark = 1;
9431                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
9432                                 struct rte_flow_action_mark mark = {
9433                                         .id = MLX5_FLOW_MARK_DEFAULT,
9434                                 };
9435
9436                                 if (flow_dv_convert_action_mark(dev, &mark,
9437                                                                 mhdr_res,
9438                                                                 error))
9439                                         return -rte_errno;
9440                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
9441                                 break;
9442                         }
9443                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
9444                         /*
9445                          * Only one FLAG or MARK is supported per device flow
9446                          * right now. So the pointer to the tag resource must be
9447                          * zero before the register process.
9448                          */
9449                         MLX5_ASSERT(!handle->dvh.rix_tag);
9450                         if (flow_dv_tag_resource_register(dev, tag_be,
9451                                                           dev_flow, error))
9452                                 return -rte_errno;
9453                         MLX5_ASSERT(dev_flow->dv.tag_resource);
9454                         dev_flow->dv.actions[actions_n++] =
9455                                         dev_flow->dv.tag_resource->action;
9456                         break;
9457                 case RTE_FLOW_ACTION_TYPE_MARK:
9458                         action_flags |= MLX5_FLOW_ACTION_MARK;
9459                         dev_flow->handle->mark = 1;
9460                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
9461                                 const struct rte_flow_action_mark *mark =
9462                                         (const struct rte_flow_action_mark *)
9463                                                 actions->conf;
9464
9465                                 if (flow_dv_convert_action_mark(dev, mark,
9466                                                                 mhdr_res,
9467                                                                 error))
9468                                         return -rte_errno;
9469                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
9470                                 break;
9471                         }
9472                         /* Fall-through */
9473                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
9474                         /* Legacy (non-extensive) MARK action. */
9475                         tag_be = mlx5_flow_mark_set
9476                               (((const struct rte_flow_action_mark *)
9477                                (actions->conf))->id);
9478                         MLX5_ASSERT(!handle->dvh.rix_tag);
9479                         if (flow_dv_tag_resource_register(dev, tag_be,
9480                                                           dev_flow, error))
9481                                 return -rte_errno;
9482                         MLX5_ASSERT(dev_flow->dv.tag_resource);
9483                         dev_flow->dv.actions[actions_n++] =
9484                                         dev_flow->dv.tag_resource->action;
9485                         break;
9486                 case RTE_FLOW_ACTION_TYPE_SET_META:
9487                         if (flow_dv_convert_action_set_meta
9488                                 (dev, mhdr_res, attr,
9489                                  (const struct rte_flow_action_set_meta *)
9490                                   actions->conf, error))
9491                                 return -rte_errno;
9492                         action_flags |= MLX5_FLOW_ACTION_SET_META;
9493                         break;
9494                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
9495                         if (flow_dv_convert_action_set_tag
9496                                 (dev, mhdr_res,
9497                                  (const struct rte_flow_action_set_tag *)
9498                                   actions->conf, error))
9499                                 return -rte_errno;
9500                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
9501                         break;
9502                 case RTE_FLOW_ACTION_TYPE_DROP:
9503                         action_flags |= MLX5_FLOW_ACTION_DROP;
9504                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_DROP;
9505                         break;
9506                 case RTE_FLOW_ACTION_TYPE_QUEUE:
9507                         queue = actions->conf;
9508                         rss_desc->queue_num = 1;
9509                         rss_desc->queue[0] = queue->index;
9510                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
9511                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
9512                         sample_act->action_flags |= MLX5_FLOW_ACTION_QUEUE;
9513                         num_of_dest++;
9514                         break;
9515                 case RTE_FLOW_ACTION_TYPE_RSS:
9516                         rss = actions->conf;
9517                         memcpy(rss_desc->queue, rss->queue,
9518                                rss->queue_num * sizeof(uint16_t));
9519                         rss_desc->queue_num = rss->queue_num;
9520                         /* NULL RSS key indicates default RSS key. */
9521                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
9522                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
9523                         /*
9524                          * rss->level and rss.types should be set in advance
9525                          * when expanding items for RSS.
9526                          */
9527                         action_flags |= MLX5_FLOW_ACTION_RSS;
9528                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
9529                         break;
9530                 case RTE_FLOW_ACTION_TYPE_AGE:
9531                 case RTE_FLOW_ACTION_TYPE_COUNT:
9532                         if (!dev_conf->devx) {
9533                                 return rte_flow_error_set
9534                                               (error, ENOTSUP,
9535                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
9536                                                NULL,
9537                                                "count action not supported");
9538                         }
9539                         /* Save information first, will apply later. */
9540                         if (actions->type == RTE_FLOW_ACTION_TYPE_COUNT)
9541                                 count = action->conf;
9542                         else
9543                                 age = action->conf;
9544                         action_flags |= MLX5_FLOW_ACTION_COUNT;
9545                         break;
9546                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
9547                         dev_flow->dv.actions[actions_n++] =
9548                                                 priv->sh->pop_vlan_action;
9549                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
9550                         break;
9551                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
9552                         if (!(action_flags &
9553                               MLX5_FLOW_ACTION_OF_SET_VLAN_VID))
9554                                 flow_dev_get_vlan_info_from_items(items, &vlan);
9555                         vlan.eth_proto = rte_be_to_cpu_16
9556                              ((((const struct rte_flow_action_of_push_vlan *)
9557                                                    actions->conf)->ethertype));
9558                         found_action = mlx5_flow_find_action
9559                                         (actions + 1,
9560                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
9561                         if (found_action)
9562                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
9563                         found_action = mlx5_flow_find_action
9564                                         (actions + 1,
9565                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
9566                         if (found_action)
9567                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
9568                         if (flow_dv_create_action_push_vlan
9569                                             (dev, attr, &vlan, dev_flow, error))
9570                                 return -rte_errno;
9571                         dev_flow->dv.actions[actions_n++] =
9572                                         dev_flow->dv.push_vlan_res->action;
9573                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
9574                         break;
9575                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
9576                         /* of_vlan_push action handled this action */
9577                         MLX5_ASSERT(action_flags &
9578                                     MLX5_FLOW_ACTION_OF_PUSH_VLAN);
9579                         break;
9580                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
9581                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
9582                                 break;
9583                         flow_dev_get_vlan_info_from_items(items, &vlan);
9584                         mlx5_update_vlan_vid_pcp(actions, &vlan);
9585                         /* If no VLAN push - this is a modify header action */
9586                         if (flow_dv_convert_action_modify_vlan_vid
9587                                                 (mhdr_res, actions, error))
9588                                 return -rte_errno;
9589                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
9590                         break;
9591                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
9592                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
9593                         if (flow_dv_create_action_l2_encap(dev, actions,
9594                                                            dev_flow,
9595                                                            attr->transfer,
9596                                                            error))
9597                                 return -rte_errno;
9598                         dev_flow->dv.actions[actions_n++] =
9599                                         dev_flow->dv.encap_decap->action;
9600                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
9601                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
9602                                 sample_act->action_flags |=
9603                                                         MLX5_FLOW_ACTION_ENCAP;
9604                         break;
9605                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
9606                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
9607                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
9608                                                            attr->transfer,
9609                                                            error))
9610                                 return -rte_errno;
9611                         dev_flow->dv.actions[actions_n++] =
9612                                         dev_flow->dv.encap_decap->action;
9613                         action_flags |= MLX5_FLOW_ACTION_DECAP;
9614                         break;
9615                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
9616                         /* Handle encap with preceding decap. */
9617                         if (action_flags & MLX5_FLOW_ACTION_DECAP) {
9618                                 if (flow_dv_create_action_raw_encap
9619                                         (dev, actions, dev_flow, attr, error))
9620                                         return -rte_errno;
9621                                 dev_flow->dv.actions[actions_n++] =
9622                                         dev_flow->dv.encap_decap->action;
9623                         } else {
9624                                 /* Handle encap without preceding decap. */
9625                                 if (flow_dv_create_action_l2_encap
9626                                     (dev, actions, dev_flow, attr->transfer,
9627                                      error))
9628                                         return -rte_errno;
9629                                 dev_flow->dv.actions[actions_n++] =
9630                                         dev_flow->dv.encap_decap->action;
9631                         }
9632                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
9633                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
9634                                 sample_act->action_flags |=
9635                                                         MLX5_FLOW_ACTION_ENCAP;
9636                         break;
9637                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
9638                         while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
9639                                 ;
9640                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
9641                                 if (flow_dv_create_action_l2_decap
9642                                     (dev, dev_flow, attr->transfer, error))
9643                                         return -rte_errno;
9644                                 dev_flow->dv.actions[actions_n++] =
9645                                         dev_flow->dv.encap_decap->action;
9646                         }
9647                         /* If decap is followed by encap, handle it at encap. */
9648                         action_flags |= MLX5_FLOW_ACTION_DECAP;
9649                         break;
9650                 case RTE_FLOW_ACTION_TYPE_JUMP:
9651                         jump_group = ((const struct rte_flow_action_jump *)
9652                                                         action->conf)->group;
9653                         grp_info.std_tbl_fix = 0;
9654                         ret = mlx5_flow_group_to_table(dev, tunnel,
9655                                                        jump_group,
9656                                                        &table,
9657                                                        grp_info, error);
9658                         if (ret)
9659                                 return ret;
9660                         tbl = flow_dv_tbl_resource_get(dev, table, attr->egress,
9661                                                        attr->transfer,
9662                                                        !!dev_flow->external,
9663                                                        tunnel, jump_group, 0,
9664                                                        error);
9665                         if (!tbl)
9666                                 return rte_flow_error_set
9667                                                 (error, errno,
9668                                                  RTE_FLOW_ERROR_TYPE_ACTION,
9669                                                  NULL,
9670                                                  "cannot create jump action.");
9671                         if (flow_dv_jump_tbl_resource_register
9672                             (dev, tbl, dev_flow, error)) {
9673                                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
9674                                 return rte_flow_error_set
9675                                                 (error, errno,
9676                                                  RTE_FLOW_ERROR_TYPE_ACTION,
9677                                                  NULL,
9678                                                  "cannot create jump action.");
9679                         }
9680                         dev_flow->dv.actions[actions_n++] =
9681                                         dev_flow->dv.jump->action;
9682                         action_flags |= MLX5_FLOW_ACTION_JUMP;
9683                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_JUMP;
9684                         break;
9685                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
9686                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
9687                         if (flow_dv_convert_action_modify_mac
9688                                         (mhdr_res, actions, error))
9689                                 return -rte_errno;
9690                         action_flags |= actions->type ==
9691                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
9692                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
9693                                         MLX5_FLOW_ACTION_SET_MAC_DST;
9694                         break;
9695                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
9696                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
9697                         if (flow_dv_convert_action_modify_ipv4
9698                                         (mhdr_res, actions, error))
9699                                 return -rte_errno;
9700                         action_flags |= actions->type ==
9701                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
9702                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
9703                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
9704                         break;
9705                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
9706                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
9707                         if (flow_dv_convert_action_modify_ipv6
9708                                         (mhdr_res, actions, error))
9709                                 return -rte_errno;
9710                         action_flags |= actions->type ==
9711                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
9712                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
9713                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
9714                         break;
9715                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
9716                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
9717                         if (flow_dv_convert_action_modify_tp
9718                                         (mhdr_res, actions, items,
9719                                          &flow_attr, dev_flow, !!(action_flags &
9720                                          MLX5_FLOW_ACTION_DECAP), error))
9721                                 return -rte_errno;
9722                         action_flags |= actions->type ==
9723                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
9724                                         MLX5_FLOW_ACTION_SET_TP_SRC :
9725                                         MLX5_FLOW_ACTION_SET_TP_DST;
9726                         break;
9727                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
9728                         if (flow_dv_convert_action_modify_dec_ttl
9729                                         (mhdr_res, items, &flow_attr, dev_flow,
9730                                          !!(action_flags &
9731                                          MLX5_FLOW_ACTION_DECAP), error))
9732                                 return -rte_errno;
9733                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
9734                         break;
9735                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
9736                         if (flow_dv_convert_action_modify_ttl
9737                                         (mhdr_res, actions, items, &flow_attr,
9738                                          dev_flow, !!(action_flags &
9739                                          MLX5_FLOW_ACTION_DECAP), error))
9740                                 return -rte_errno;
9741                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
9742                         break;
9743                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
9744                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
9745                         if (flow_dv_convert_action_modify_tcp_seq
9746                                         (mhdr_res, actions, error))
9747                                 return -rte_errno;
9748                         action_flags |= actions->type ==
9749                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
9750                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
9751                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
9752                         break;
9753
9754                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
9755                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
9756                         if (flow_dv_convert_action_modify_tcp_ack
9757                                         (mhdr_res, actions, error))
9758                                 return -rte_errno;
9759                         action_flags |= actions->type ==
9760                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
9761                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
9762                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
9763                         break;
9764                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
9765                         if (flow_dv_convert_action_set_reg
9766                                         (mhdr_res, actions, error))
9767                                 return -rte_errno;
9768                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
9769                         break;
9770                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
9771                         if (flow_dv_convert_action_copy_mreg
9772                                         (dev, mhdr_res, actions, error))
9773                                 return -rte_errno;
9774                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
9775                         break;
9776                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
9777                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
9778                         dev_flow->handle->fate_action =
9779                                         MLX5_FLOW_FATE_DEFAULT_MISS;
9780                         break;
9781                 case RTE_FLOW_ACTION_TYPE_METER:
9782                         mtr = actions->conf;
9783                         if (!flow->meter) {
9784                                 fm = mlx5_flow_meter_attach(priv, mtr->mtr_id,
9785                                                             attr, error);
9786                                 if (!fm)
9787                                         return rte_flow_error_set(error,
9788                                                 rte_errno,
9789                                                 RTE_FLOW_ERROR_TYPE_ACTION,
9790                                                 NULL,
9791                                                 "meter not found "
9792                                                 "or invalid parameters");
9793                                 flow->meter = fm->idx;
9794                         }
9795                         /* Set the meter action. */
9796                         if (!fm) {
9797                                 fm = mlx5_ipool_get(priv->sh->ipool
9798                                                 [MLX5_IPOOL_MTR], flow->meter);
9799                                 if (!fm)
9800                                         return rte_flow_error_set(error,
9801                                                 rte_errno,
9802                                                 RTE_FLOW_ERROR_TYPE_ACTION,
9803                                                 NULL,
9804                                                 "meter not found "
9805                                                 "or invalid parameters");
9806                         }
9807                         dev_flow->dv.actions[actions_n++] =
9808                                 fm->mfts->meter_action;
9809                         action_flags |= MLX5_FLOW_ACTION_METER;
9810                         break;
9811                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
9812                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
9813                                                               actions, error))
9814                                 return -rte_errno;
9815                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
9816                         break;
9817                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
9818                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
9819                                                               actions, error))
9820                                 return -rte_errno;
9821                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
9822                         break;
9823                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
9824                         sample_act_pos = actions_n;
9825                         ret = flow_dv_translate_action_sample(dev,
9826                                                               actions,
9827                                                               dev_flow, attr,
9828                                                               &num_of_dest,
9829                                                               sample_actions,
9830                                                               &sample_res,
9831                                                               error);
9832                         if (ret < 0)
9833                                 return ret;
9834                         actions_n++;
9835                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
9836                         /* put encap action into group if work with port id */
9837                         if ((action_flags & MLX5_FLOW_ACTION_ENCAP) &&
9838                             (action_flags & MLX5_FLOW_ACTION_PORT_ID))
9839                                 sample_act->action_flags |=
9840                                                         MLX5_FLOW_ACTION_ENCAP;
9841                         break;
9842                 case RTE_FLOW_ACTION_TYPE_END:
9843                         actions_end = true;
9844                         if (mhdr_res->actions_num) {
9845                                 /* create modify action if needed. */
9846                                 if (flow_dv_modify_hdr_resource_register
9847                                         (dev, mhdr_res, dev_flow, error))
9848                                         return -rte_errno;
9849                                 dev_flow->dv.actions[modify_action_position] =
9850                                         handle->dvh.modify_hdr->action;
9851                         }
9852                         if (action_flags & MLX5_FLOW_ACTION_COUNT) {
9853                                 flow->counter =
9854                                         flow_dv_translate_create_counter(dev,
9855                                                 dev_flow, count, age);
9856
9857                                 if (!flow->counter)
9858                                         return rte_flow_error_set
9859                                                 (error, rte_errno,
9860                                                 RTE_FLOW_ERROR_TYPE_ACTION,
9861                                                 NULL,
9862                                                 "cannot create counter"
9863                                                 " object.");
9864                                 dev_flow->dv.actions[actions_n] =
9865                                           (flow_dv_counter_get_by_idx(dev,
9866                                           flow->counter, NULL))->action;
9867                                 actions_n++;
9868                         }
9869                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE) {
9870                                 ret = flow_dv_create_action_sample(dev,
9871                                                           dev_flow,
9872                                                           num_of_dest,
9873                                                           &sample_res,
9874                                                           &mdest_res,
9875                                                           sample_actions,
9876                                                           action_flags,
9877                                                           error);
9878                                 if (ret < 0)
9879                                         return rte_flow_error_set
9880                                                 (error, rte_errno,
9881                                                 RTE_FLOW_ERROR_TYPE_ACTION,
9882                                                 NULL,
9883                                                 "cannot create sample action");
9884                                 if (num_of_dest > 1) {
9885                                         dev_flow->dv.actions[sample_act_pos] =
9886                                         dev_flow->dv.dest_array_res->action;
9887                                 } else {
9888                                         dev_flow->dv.actions[sample_act_pos] =
9889                                         dev_flow->dv.sample_res->verbs_action;
9890                                 }
9891                         }
9892                         break;
9893                 default:
9894                         break;
9895                 }
9896                 if (mhdr_res->actions_num &&
9897                     modify_action_position == UINT32_MAX)
9898                         modify_action_position = actions_n++;
9899         }
9900         /*
9901          * For multiple destination (sample action with ratio=1), the encap
9902          * action and port id action will be combined into group action.
9903          * So need remove the original these actions in the flow and only
9904          * use the sample action instead of.
9905          */
9906         if (num_of_dest > 1 && sample_act->dr_port_id_action) {
9907                 int i;
9908                 void *temp_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
9909
9910                 for (i = 0; i < actions_n; i++) {
9911                         if ((sample_act->dr_encap_action &&
9912                                 sample_act->dr_encap_action ==
9913                                 dev_flow->dv.actions[i]) ||
9914                                 (sample_act->dr_port_id_action &&
9915                                 sample_act->dr_port_id_action ==
9916                                 dev_flow->dv.actions[i]))
9917                                 continue;
9918                         temp_actions[tmp_actions_n++] = dev_flow->dv.actions[i];
9919                 }
9920                 memcpy((void *)dev_flow->dv.actions,
9921                                 (void *)temp_actions,
9922                                 tmp_actions_n * sizeof(void *));
9923                 actions_n = tmp_actions_n;
9924         }
9925         dev_flow->dv.actions_n = actions_n;
9926         dev_flow->act_flags = action_flags;
9927         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
9928                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
9929                 int item_type = items->type;
9930
9931                 if (!mlx5_flow_os_item_supported(item_type))
9932                         return rte_flow_error_set(error, ENOTSUP,
9933                                                   RTE_FLOW_ERROR_TYPE_ITEM,
9934                                                   NULL, "item not supported");
9935                 switch (item_type) {
9936                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
9937                         flow_dv_translate_item_port_id(dev, match_mask,
9938                                                        match_value, items);
9939                         last_item = MLX5_FLOW_ITEM_PORT_ID;
9940                         break;
9941                 case RTE_FLOW_ITEM_TYPE_ETH:
9942                         flow_dv_translate_item_eth(match_mask, match_value,
9943                                                    items, tunnel,
9944                                                    dev_flow->dv.group);
9945                         matcher.priority = action_flags &
9946                                         MLX5_FLOW_ACTION_DEFAULT_MISS &&
9947                                         !dev_flow->external ?
9948                                         MLX5_PRIORITY_MAP_L3 :
9949                                         MLX5_PRIORITY_MAP_L2;
9950                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
9951                                              MLX5_FLOW_LAYER_OUTER_L2;
9952                         break;
9953                 case RTE_FLOW_ITEM_TYPE_VLAN:
9954                         flow_dv_translate_item_vlan(dev_flow,
9955                                                     match_mask, match_value,
9956                                                     items, tunnel,
9957                                                     dev_flow->dv.group);
9958                         matcher.priority = MLX5_PRIORITY_MAP_L2;
9959                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
9960                                               MLX5_FLOW_LAYER_INNER_VLAN) :
9961                                              (MLX5_FLOW_LAYER_OUTER_L2 |
9962                                               MLX5_FLOW_LAYER_OUTER_VLAN);
9963                         break;
9964                 case RTE_FLOW_ITEM_TYPE_IPV4:
9965                         mlx5_flow_tunnel_ip_check(items, next_protocol,
9966                                                   &item_flags, &tunnel);
9967                         flow_dv_translate_item_ipv4(match_mask, match_value,
9968                                                     items, tunnel,
9969                                                     dev_flow->dv.group);
9970                         matcher.priority = MLX5_PRIORITY_MAP_L3;
9971                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
9972                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
9973                         if (items->mask != NULL &&
9974                             ((const struct rte_flow_item_ipv4 *)
9975                              items->mask)->hdr.next_proto_id) {
9976                                 next_protocol =
9977                                         ((const struct rte_flow_item_ipv4 *)
9978                                          (items->spec))->hdr.next_proto_id;
9979                                 next_protocol &=
9980                                         ((const struct rte_flow_item_ipv4 *)
9981                                          (items->mask))->hdr.next_proto_id;
9982                         } else {
9983                                 /* Reset for inner layer. */
9984                                 next_protocol = 0xff;
9985                         }
9986                         break;
9987                 case RTE_FLOW_ITEM_TYPE_IPV6:
9988                         mlx5_flow_tunnel_ip_check(items, next_protocol,
9989                                                   &item_flags, &tunnel);
9990                         flow_dv_translate_item_ipv6(match_mask, match_value,
9991                                                     items, tunnel,
9992                                                     dev_flow->dv.group);
9993                         matcher.priority = MLX5_PRIORITY_MAP_L3;
9994                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
9995                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
9996                         if (items->mask != NULL &&
9997                             ((const struct rte_flow_item_ipv6 *)
9998                              items->mask)->hdr.proto) {
9999                                 next_protocol =
10000                                         ((const struct rte_flow_item_ipv6 *)
10001                                          items->spec)->hdr.proto;
10002                                 next_protocol &=
10003                                         ((const struct rte_flow_item_ipv6 *)
10004                                          items->mask)->hdr.proto;
10005                         } else {
10006                                 /* Reset for inner layer. */
10007                                 next_protocol = 0xff;
10008                         }
10009                         break;
10010                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
10011                         flow_dv_translate_item_ipv6_frag_ext(match_mask,
10012                                                              match_value,
10013                                                              items, tunnel);
10014                         last_item = tunnel ?
10015                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
10016                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
10017                         if (items->mask != NULL &&
10018                             ((const struct rte_flow_item_ipv6_frag_ext *)
10019                              items->mask)->hdr.next_header) {
10020                                 next_protocol =
10021                                 ((const struct rte_flow_item_ipv6_frag_ext *)
10022                                  items->spec)->hdr.next_header;
10023                                 next_protocol &=
10024                                 ((const struct rte_flow_item_ipv6_frag_ext *)
10025                                  items->mask)->hdr.next_header;
10026                         } else {
10027                                 /* Reset for inner layer. */
10028                                 next_protocol = 0xff;
10029                         }
10030                         break;
10031                 case RTE_FLOW_ITEM_TYPE_TCP:
10032                         flow_dv_translate_item_tcp(match_mask, match_value,
10033                                                    items, tunnel);
10034                         matcher.priority = MLX5_PRIORITY_MAP_L4;
10035                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
10036                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
10037                         break;
10038                 case RTE_FLOW_ITEM_TYPE_UDP:
10039                         flow_dv_translate_item_udp(match_mask, match_value,
10040                                                    items, tunnel);
10041                         matcher.priority = MLX5_PRIORITY_MAP_L4;
10042                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
10043                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
10044                         break;
10045                 case RTE_FLOW_ITEM_TYPE_GRE:
10046                         flow_dv_translate_item_gre(match_mask, match_value,
10047                                                    items, tunnel);
10048                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
10049                         last_item = MLX5_FLOW_LAYER_GRE;
10050                         break;
10051                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
10052                         flow_dv_translate_item_gre_key(match_mask,
10053                                                        match_value, items);
10054                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
10055                         break;
10056                 case RTE_FLOW_ITEM_TYPE_NVGRE:
10057                         flow_dv_translate_item_nvgre(match_mask, match_value,
10058                                                      items, tunnel);
10059                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
10060                         last_item = MLX5_FLOW_LAYER_GRE;
10061                         break;
10062                 case RTE_FLOW_ITEM_TYPE_VXLAN:
10063                         flow_dv_translate_item_vxlan(match_mask, match_value,
10064                                                      items, tunnel);
10065                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
10066                         last_item = MLX5_FLOW_LAYER_VXLAN;
10067                         break;
10068                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
10069                         flow_dv_translate_item_vxlan_gpe(match_mask,
10070                                                          match_value, items,
10071                                                          tunnel);
10072                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
10073                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
10074                         break;
10075                 case RTE_FLOW_ITEM_TYPE_GENEVE:
10076                         flow_dv_translate_item_geneve(match_mask, match_value,
10077                                                       items, tunnel);
10078                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
10079                         last_item = MLX5_FLOW_LAYER_GENEVE;
10080                         break;
10081                 case RTE_FLOW_ITEM_TYPE_MPLS:
10082                         flow_dv_translate_item_mpls(match_mask, match_value,
10083                                                     items, last_item, tunnel);
10084                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
10085                         last_item = MLX5_FLOW_LAYER_MPLS;
10086                         break;
10087                 case RTE_FLOW_ITEM_TYPE_MARK:
10088                         flow_dv_translate_item_mark(dev, match_mask,
10089                                                     match_value, items);
10090                         last_item = MLX5_FLOW_ITEM_MARK;
10091                         break;
10092                 case RTE_FLOW_ITEM_TYPE_META:
10093                         flow_dv_translate_item_meta(dev, match_mask,
10094                                                     match_value, attr, items);
10095                         last_item = MLX5_FLOW_ITEM_METADATA;
10096                         break;
10097                 case RTE_FLOW_ITEM_TYPE_ICMP:
10098                         flow_dv_translate_item_icmp(match_mask, match_value,
10099                                                     items, tunnel);
10100                         last_item = MLX5_FLOW_LAYER_ICMP;
10101                         break;
10102                 case RTE_FLOW_ITEM_TYPE_ICMP6:
10103                         flow_dv_translate_item_icmp6(match_mask, match_value,
10104                                                       items, tunnel);
10105                         last_item = MLX5_FLOW_LAYER_ICMP6;
10106                         break;
10107                 case RTE_FLOW_ITEM_TYPE_TAG:
10108                         flow_dv_translate_item_tag(dev, match_mask,
10109                                                    match_value, items);
10110                         last_item = MLX5_FLOW_ITEM_TAG;
10111                         break;
10112                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
10113                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
10114                                                         match_value, items);
10115                         last_item = MLX5_FLOW_ITEM_TAG;
10116                         break;
10117                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
10118                         flow_dv_translate_item_tx_queue(dev, match_mask,
10119                                                         match_value,
10120                                                         items);
10121                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
10122                         break;
10123                 case RTE_FLOW_ITEM_TYPE_GTP:
10124                         flow_dv_translate_item_gtp(match_mask, match_value,
10125                                                    items, tunnel);
10126                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
10127                         last_item = MLX5_FLOW_LAYER_GTP;
10128                         break;
10129                 case RTE_FLOW_ITEM_TYPE_ECPRI:
10130                         if (!mlx5_flex_parser_ecpri_exist(dev)) {
10131                                 /* Create it only the first time to be used. */
10132                                 ret = mlx5_flex_parser_ecpri_alloc(dev);
10133                                 if (ret)
10134                                         return rte_flow_error_set
10135                                                 (error, -ret,
10136                                                 RTE_FLOW_ERROR_TYPE_ITEM,
10137                                                 NULL,
10138                                                 "cannot create eCPRI parser");
10139                         }
10140                         /* Adjust the length matcher and device flow value. */
10141                         matcher.mask.size = MLX5_ST_SZ_BYTES(fte_match_param);
10142                         dev_flow->dv.value.size =
10143                                         MLX5_ST_SZ_BYTES(fte_match_param);
10144                         flow_dv_translate_item_ecpri(dev, match_mask,
10145                                                      match_value, items);
10146                         /* No other protocol should follow eCPRI layer. */
10147                         last_item = MLX5_FLOW_LAYER_ECPRI;
10148                         break;
10149                 default:
10150                         break;
10151                 }
10152                 item_flags |= last_item;
10153         }
10154         /*
10155          * When E-Switch mode is enabled, we have two cases where we need to
10156          * set the source port manually.
10157          * The first one, is in case of Nic steering rule, and the second is
10158          * E-Switch rule where no port_id item was found. In both cases
10159          * the source port is set according the current port in use.
10160          */
10161         if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
10162             (priv->representor || priv->master)) {
10163                 if (flow_dv_translate_item_port_id(dev, match_mask,
10164                                                    match_value, NULL))
10165                         return -rte_errno;
10166         }
10167 #ifdef RTE_LIBRTE_MLX5_DEBUG
10168         MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
10169                                               dev_flow->dv.value.buf));
10170 #endif
10171         /*
10172          * Layers may be already initialized from prefix flow if this dev_flow
10173          * is the suffix flow.
10174          */
10175         handle->layers |= item_flags;
10176         if (action_flags & MLX5_FLOW_ACTION_RSS)
10177                 flow_dv_hashfields_set(dev_flow, rss_desc);
10178         /* Register matcher. */
10179         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
10180                                     matcher.mask.size);
10181         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
10182                                                      matcher.priority);
10183         /* reserved field no needs to be set to 0 here. */
10184         tbl_key.domain = attr->transfer;
10185         tbl_key.direction = attr->egress;
10186         tbl_key.table_id = dev_flow->dv.group;
10187         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow, error))
10188                 return -rte_errno;
10189         return 0;
10190 }
10191
10192 /**
10193  * Set hash RX queue by hash fields (see enum ibv_rx_hash_fields)
10194  * and tunnel.
10195  *
10196  * @param[in, out] action
10197  *   Shred RSS action holding hash RX queue objects.
10198  * @param[in] hash_fields
10199  *   Defines combination of packet fields to participate in RX hash.
10200  * @param[in] tunnel
10201  *   Tunnel type
10202  * @param[in] hrxq_idx
10203  *   Hash RX queue index to set.
10204  *
10205  * @return
10206  *   0 on success, otherwise negative errno value.
10207  */
10208 static int
10209 __flow_dv_action_rss_hrxq_set(struct mlx5_shared_action_rss *action,
10210                               const uint64_t hash_fields,
10211                               const int tunnel,
10212                               uint32_t hrxq_idx)
10213 {
10214         uint32_t *hrxqs = tunnel ? action->hrxq : action->hrxq_tunnel;
10215
10216         switch (hash_fields & ~IBV_RX_HASH_INNER) {
10217         case MLX5_RSS_HASH_IPV4:
10218                 hrxqs[0] = hrxq_idx;
10219                 return 0;
10220         case MLX5_RSS_HASH_IPV4_TCP:
10221                 hrxqs[1] = hrxq_idx;
10222                 return 0;
10223         case MLX5_RSS_HASH_IPV4_UDP:
10224                 hrxqs[2] = hrxq_idx;
10225                 return 0;
10226         case MLX5_RSS_HASH_IPV6:
10227                 hrxqs[3] = hrxq_idx;
10228                 return 0;
10229         case MLX5_RSS_HASH_IPV6_TCP:
10230                 hrxqs[4] = hrxq_idx;
10231                 return 0;
10232         case MLX5_RSS_HASH_IPV6_UDP:
10233                 hrxqs[5] = hrxq_idx;
10234                 return 0;
10235         case MLX5_RSS_HASH_NONE:
10236                 hrxqs[6] = hrxq_idx;
10237                 return 0;
10238         default:
10239                 return -1;
10240         }
10241 }
10242
10243 /**
10244  * Look up for hash RX queue by hash fields (see enum ibv_rx_hash_fields)
10245  * and tunnel.
10246  *
10247  * @param[in] action
10248  *   Shred RSS action holding hash RX queue objects.
10249  * @param[in] hash_fields
10250  *   Defines combination of packet fields to participate in RX hash.
10251  * @param[in] tunnel
10252  *   Tunnel type
10253  *
10254  * @return
10255  *   Valid hash RX queue index, otherwise 0.
10256  */
10257 static uint32_t
10258 __flow_dv_action_rss_hrxq_lookup(const struct mlx5_shared_action_rss *action,
10259                                  const uint64_t hash_fields,
10260                                  const int tunnel)
10261 {
10262         const uint32_t *hrxqs = tunnel ? action->hrxq : action->hrxq_tunnel;
10263
10264         switch (hash_fields & ~IBV_RX_HASH_INNER) {
10265         case MLX5_RSS_HASH_IPV4:
10266                 return hrxqs[0];
10267         case MLX5_RSS_HASH_IPV4_TCP:
10268                 return hrxqs[1];
10269         case MLX5_RSS_HASH_IPV4_UDP:
10270                 return hrxqs[2];
10271         case MLX5_RSS_HASH_IPV6:
10272                 return hrxqs[3];
10273         case MLX5_RSS_HASH_IPV6_TCP:
10274                 return hrxqs[4];
10275         case MLX5_RSS_HASH_IPV6_UDP:
10276                 return hrxqs[5];
10277         case MLX5_RSS_HASH_NONE:
10278                 return hrxqs[6];
10279         default:
10280                 return 0;
10281         }
10282 }
10283
10284 /**
10285  * Retrieves hash RX queue suitable for the *flow*.
10286  * If shared action configured for *flow* suitable hash RX queue will be
10287  * retrieved from attached shared action.
10288  *
10289  * @param[in] flow
10290  *   Shred RSS action holding hash RX queue objects.
10291  * @param[in] dev_flow
10292  *   Pointer to the sub flow.
10293  * @param[out] hrxq
10294  *   Pointer to retrieved hash RX queue object.
10295  *
10296  * @return
10297  *   Valid hash RX queue index, otherwise 0 and rte_errno is set.
10298  */
10299 static uint32_t
10300 __flow_dv_rss_get_hrxq(struct rte_eth_dev *dev, struct rte_flow *flow,
10301                            struct mlx5_flow *dev_flow,
10302                            struct mlx5_hrxq **hrxq)
10303 {
10304         struct mlx5_priv *priv = dev->data->dev_private;
10305         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
10306         uint32_t hrxq_idx;
10307
10308         if (flow->shared_rss) {
10309                 hrxq_idx = __flow_dv_action_rss_hrxq_lookup
10310                                 (flow->shared_rss, dev_flow->hash_fields,
10311                                  !!(dev_flow->handle->layers &
10312                                     MLX5_FLOW_LAYER_TUNNEL));
10313                 if (hrxq_idx) {
10314                         *hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
10315                                                hrxq_idx);
10316                         __atomic_fetch_add(&(*hrxq)->refcnt, 1,
10317                                            __ATOMIC_RELAXED);
10318                 }
10319         } else {
10320                 struct mlx5_flow_rss_desc *rss_desc =
10321                                 &wks->rss_desc[!!wks->flow_nested_idx];
10322
10323                 *hrxq = flow_dv_hrxq_prepare(dev, dev_flow, rss_desc,
10324                                              &hrxq_idx);
10325         }
10326         return hrxq_idx;
10327 }
10328
10329 /**
10330  * Apply the flow to the NIC, lock free,
10331  * (mutex should be acquired by caller).
10332  *
10333  * @param[in] dev
10334  *   Pointer to the Ethernet device structure.
10335  * @param[in, out] flow
10336  *   Pointer to flow structure.
10337  * @param[out] error
10338  *   Pointer to error structure.
10339  *
10340  * @return
10341  *   0 on success, a negative errno value otherwise and rte_errno is set.
10342  */
10343 static int
10344 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
10345               struct rte_flow_error *error)
10346 {
10347         struct mlx5_flow_dv_workspace *dv;
10348         struct mlx5_flow_handle *dh;
10349         struct mlx5_flow_handle_dv *dv_h;
10350         struct mlx5_flow *dev_flow;
10351         struct mlx5_priv *priv = dev->data->dev_private;
10352         uint32_t handle_idx;
10353         int n;
10354         int err;
10355         int idx;
10356         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
10357
10358         MLX5_ASSERT(wks);
10359         for (idx = wks->flow_idx - 1; idx >= wks->flow_nested_idx; idx--) {
10360                 dev_flow = &wks->flows[idx];
10361                 dv = &dev_flow->dv;
10362                 dh = dev_flow->handle;
10363                 dv_h = &dh->dvh;
10364                 n = dv->actions_n;
10365                 if (dh->fate_action == MLX5_FLOW_FATE_DROP) {
10366                         if (dv->transfer) {
10367                                 dv->actions[n++] = priv->sh->esw_drop_action;
10368                         } else {
10369                                 MLX5_ASSERT(priv->drop_queue.hrxq);
10370                                 dv->actions[n++] =
10371                                                 priv->drop_queue.hrxq->action;
10372                         }
10373                 } else if (dh->fate_action == MLX5_FLOW_FATE_QUEUE &&
10374                            !dv_h->rix_sample && !dv_h->rix_dest_array) {
10375                         struct mlx5_hrxq *hrxq = NULL;
10376                         uint32_t hrxq_idx = __flow_dv_rss_get_hrxq
10377                                                 (dev, flow, dev_flow, &hrxq);
10378                         if (!hrxq) {
10379                                 rte_flow_error_set
10380                                         (error, rte_errno,
10381                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10382                                          "cannot get hash queue");
10383                                 goto error;
10384                         }
10385                         dh->rix_hrxq = hrxq_idx;
10386                         dv->actions[n++] = hrxq->action;
10387                 } else if (dh->fate_action == MLX5_FLOW_FATE_DEFAULT_MISS) {
10388                         if (!priv->sh->default_miss_action) {
10389                                 rte_flow_error_set
10390                                         (error, rte_errno,
10391                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10392                                          "default miss action not be created.");
10393                                 goto error;
10394                         }
10395                         dv->actions[n++] = priv->sh->default_miss_action;
10396                 }
10397                 err = mlx5_flow_os_create_flow(dv_h->matcher->matcher_object,
10398                                                (void *)&dv->value, n,
10399                                                dv->actions, &dh->drv_flow);
10400                 if (err) {
10401                         rte_flow_error_set(error, errno,
10402                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10403                                            NULL,
10404                                            "hardware refuses to create flow");
10405                         goto error;
10406                 }
10407                 if (priv->vmwa_context &&
10408                     dh->vf_vlan.tag && !dh->vf_vlan.created) {
10409                         /*
10410                          * The rule contains the VLAN pattern.
10411                          * For VF we are going to create VLAN
10412                          * interface to make hypervisor set correct
10413                          * e-Switch vport context.
10414                          */
10415                         mlx5_vlan_vmwa_acquire(dev, &dh->vf_vlan);
10416                 }
10417         }
10418         return 0;
10419 error:
10420         err = rte_errno; /* Save rte_errno before cleanup. */
10421         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
10422                        handle_idx, dh, next) {
10423                 /* hrxq is union, don't clear it if the flag is not set. */
10424                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE && dh->rix_hrxq) {
10425                         mlx5_hrxq_release(dev, dh->rix_hrxq);
10426                         dh->rix_hrxq = 0;
10427                 }
10428                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
10429                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
10430         }
10431         rte_errno = err; /* Restore rte_errno. */
10432         return -rte_errno;
10433 }
10434
10435 void
10436 flow_dv_matcher_remove_cb(struct mlx5_cache_list *list __rte_unused,
10437                           struct mlx5_cache_entry *entry)
10438 {
10439         struct mlx5_flow_dv_matcher *cache = container_of(entry, typeof(*cache),
10440                                                           entry);
10441
10442         claim_zero(mlx5_flow_os_destroy_flow_matcher(cache->matcher_object));
10443         mlx5_free(cache);
10444 }
10445
10446 /**
10447  * Release the flow matcher.
10448  *
10449  * @param dev
10450  *   Pointer to Ethernet device.
10451  * @param handle
10452  *   Pointer to mlx5_flow_handle.
10453  *
10454  * @return
10455  *   1 while a reference on it exists, 0 when freed.
10456  */
10457 static int
10458 flow_dv_matcher_release(struct rte_eth_dev *dev,
10459                         struct mlx5_flow_handle *handle)
10460 {
10461         struct mlx5_flow_dv_matcher *matcher = handle->dvh.matcher;
10462         struct mlx5_flow_tbl_data_entry *tbl = container_of(matcher->tbl,
10463                                                             typeof(*tbl), tbl);
10464         int ret;
10465
10466         MLX5_ASSERT(matcher->matcher_object);
10467         ret = mlx5_cache_unregister(&tbl->matchers, &matcher->entry);
10468         flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl->tbl);
10469         return ret;
10470 }
10471
10472 /**
10473  * Release encap_decap resource.
10474  *
10475  * @param list
10476  *   Pointer to the hash list.
10477  * @param entry
10478  *   Pointer to exist resource entry object.
10479  */
10480 void
10481 flow_dv_encap_decap_remove_cb(struct mlx5_hlist *list,
10482                               struct mlx5_hlist_entry *entry)
10483 {
10484         struct mlx5_dev_ctx_shared *sh = list->ctx;
10485         struct mlx5_flow_dv_encap_decap_resource *res =
10486                 container_of(entry, typeof(*res), entry);
10487
10488         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
10489         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
10490 }
10491
10492 /**
10493  * Release an encap/decap resource.
10494  *
10495  * @param dev
10496  *   Pointer to Ethernet device.
10497  * @param encap_decap_idx
10498  *   Index of encap decap resource.
10499  *
10500  * @return
10501  *   1 while a reference on it exists, 0 when freed.
10502  */
10503 static int
10504 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
10505                                      uint32_t encap_decap_idx)
10506 {
10507         struct mlx5_priv *priv = dev->data->dev_private;
10508         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
10509
10510         cache_resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
10511                                         encap_decap_idx);
10512         if (!cache_resource)
10513                 return 0;
10514         MLX5_ASSERT(cache_resource->action);
10515         return mlx5_hlist_unregister(priv->sh->encaps_decaps,
10516                                      &cache_resource->entry);
10517 }
10518
10519 /**
10520  * Release an jump to table action resource.
10521  *
10522  * @param dev
10523  *   Pointer to Ethernet device.
10524  * @param handle
10525  *   Pointer to mlx5_flow_handle.
10526  *
10527  * @return
10528  *   1 while a reference on it exists, 0 when freed.
10529  */
10530 static int
10531 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
10532                                   struct mlx5_flow_handle *handle)
10533 {
10534         struct mlx5_priv *priv = dev->data->dev_private;
10535         struct mlx5_flow_tbl_data_entry *tbl_data;
10536
10537         tbl_data = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_JUMP],
10538                              handle->rix_jump);
10539         if (!tbl_data)
10540                 return 0;
10541         return flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl_data->tbl);
10542 }
10543
10544 void
10545 flow_dv_modify_remove_cb(struct mlx5_hlist *list __rte_unused,
10546                          struct mlx5_hlist_entry *entry)
10547 {
10548         struct mlx5_flow_dv_modify_hdr_resource *res =
10549                 container_of(entry, typeof(*res), entry);
10550
10551         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
10552         mlx5_free(entry);
10553 }
10554
10555 /**
10556  * Release a modify-header resource.
10557  *
10558  * @param dev
10559  *   Pointer to Ethernet device.
10560  * @param handle
10561  *   Pointer to mlx5_flow_handle.
10562  *
10563  * @return
10564  *   1 while a reference on it exists, 0 when freed.
10565  */
10566 static int
10567 flow_dv_modify_hdr_resource_release(struct rte_eth_dev *dev,
10568                                     struct mlx5_flow_handle *handle)
10569 {
10570         struct mlx5_priv *priv = dev->data->dev_private;
10571         struct mlx5_flow_dv_modify_hdr_resource *entry = handle->dvh.modify_hdr;
10572
10573         MLX5_ASSERT(entry->action);
10574         return mlx5_hlist_unregister(priv->sh->modify_cmds, &entry->entry);
10575 }
10576
10577 void
10578 flow_dv_port_id_remove_cb(struct mlx5_cache_list *list,
10579                           struct mlx5_cache_entry *entry)
10580 {
10581         struct mlx5_dev_ctx_shared *sh = list->ctx;
10582         struct mlx5_flow_dv_port_id_action_resource *cache =
10583                         container_of(entry, typeof(*cache), entry);
10584
10585         claim_zero(mlx5_flow_os_destroy_flow_action(cache->action));
10586         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], cache->idx);
10587 }
10588
10589 /**
10590  * Release port ID action resource.
10591  *
10592  * @param dev
10593  *   Pointer to Ethernet device.
10594  * @param handle
10595  *   Pointer to mlx5_flow_handle.
10596  *
10597  * @return
10598  *   1 while a reference on it exists, 0 when freed.
10599  */
10600 static int
10601 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
10602                                         uint32_t port_id)
10603 {
10604         struct mlx5_priv *priv = dev->data->dev_private;
10605         struct mlx5_flow_dv_port_id_action_resource *cache;
10606
10607         cache = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PORT_ID], port_id);
10608         if (!cache)
10609                 return 0;
10610         MLX5_ASSERT(cache->action);
10611         return mlx5_cache_unregister(&priv->sh->port_id_action_list,
10612                                      &cache->entry);
10613 }
10614
10615 void
10616 flow_dv_push_vlan_remove_cb(struct mlx5_cache_list *list,
10617                             struct mlx5_cache_entry *entry)
10618 {
10619         struct mlx5_dev_ctx_shared *sh = list->ctx;
10620         struct mlx5_flow_dv_push_vlan_action_resource *cache =
10621                         container_of(entry, typeof(*cache), entry);
10622
10623         claim_zero(mlx5_flow_os_destroy_flow_action(cache->action));
10624         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], cache->idx);
10625 }
10626
10627 /**
10628  * Release push vlan action resource.
10629  *
10630  * @param dev
10631  *   Pointer to Ethernet device.
10632  * @param handle
10633  *   Pointer to mlx5_flow_handle.
10634  *
10635  * @return
10636  *   1 while a reference on it exists, 0 when freed.
10637  */
10638 static int
10639 flow_dv_push_vlan_action_resource_release(struct rte_eth_dev *dev,
10640                                           struct mlx5_flow_handle *handle)
10641 {
10642         struct mlx5_priv *priv = dev->data->dev_private;
10643         struct mlx5_flow_dv_push_vlan_action_resource *cache;
10644         uint32_t idx = handle->dvh.rix_push_vlan;
10645
10646         cache = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
10647         if (!cache)
10648                 return 0;
10649         MLX5_ASSERT(cache->action);
10650         return mlx5_cache_unregister(&priv->sh->push_vlan_action_list,
10651                                      &cache->entry);
10652 }
10653
10654 /**
10655  * Release the fate resource.
10656  *
10657  * @param dev
10658  *   Pointer to Ethernet device.
10659  * @param handle
10660  *   Pointer to mlx5_flow_handle.
10661  */
10662 static void
10663 flow_dv_fate_resource_release(struct rte_eth_dev *dev,
10664                                struct mlx5_flow_handle *handle)
10665 {
10666         if (!handle->rix_fate)
10667                 return;
10668         switch (handle->fate_action) {
10669         case MLX5_FLOW_FATE_QUEUE:
10670                 mlx5_hrxq_release(dev, handle->rix_hrxq);
10671                 break;
10672         case MLX5_FLOW_FATE_JUMP:
10673                 flow_dv_jump_tbl_resource_release(dev, handle);
10674                 break;
10675         case MLX5_FLOW_FATE_PORT_ID:
10676                 flow_dv_port_id_action_resource_release(dev,
10677                                 handle->rix_port_id_action);
10678                 break;
10679         default:
10680                 DRV_LOG(DEBUG, "Incorrect fate action:%d", handle->fate_action);
10681                 break;
10682         }
10683         handle->rix_fate = 0;
10684 }
10685
10686 void
10687 flow_dv_sample_remove_cb(struct mlx5_cache_list *list,
10688                          struct mlx5_cache_entry *entry)
10689 {
10690         struct rte_eth_dev *dev = list->ctx;
10691         struct mlx5_priv *priv = dev->data->dev_private;
10692         struct mlx5_flow_dv_sample_resource *cache_resource =
10693                         container_of(entry, typeof(*cache_resource), entry);
10694
10695         if (cache_resource->verbs_action)
10696                 claim_zero(mlx5_glue->destroy_flow_action
10697                                 (cache_resource->verbs_action));
10698         if (cache_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
10699                 if (cache_resource->default_miss)
10700                         claim_zero(mlx5_glue->destroy_flow_action
10701                           (cache_resource->default_miss));
10702         }
10703         if (cache_resource->normal_path_tbl)
10704                 flow_dv_tbl_resource_release(MLX5_SH(dev),
10705                         cache_resource->normal_path_tbl);
10706         flow_dv_sample_sub_actions_release(dev,
10707                                 &cache_resource->sample_idx);
10708         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
10709                         cache_resource->idx);
10710         DRV_LOG(DEBUG, "sample resource %p: removed",
10711                 (void *)cache_resource);
10712 }
10713
10714 /**
10715  * Release an sample resource.
10716  *
10717  * @param dev
10718  *   Pointer to Ethernet device.
10719  * @param handle
10720  *   Pointer to mlx5_flow_handle.
10721  *
10722  * @return
10723  *   1 while a reference on it exists, 0 when freed.
10724  */
10725 static int
10726 flow_dv_sample_resource_release(struct rte_eth_dev *dev,
10727                                      struct mlx5_flow_handle *handle)
10728 {
10729         struct mlx5_priv *priv = dev->data->dev_private;
10730         struct mlx5_flow_dv_sample_resource *cache_resource;
10731
10732         cache_resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
10733                          handle->dvh.rix_sample);
10734         if (!cache_resource)
10735                 return 0;
10736         MLX5_ASSERT(cache_resource->verbs_action);
10737         return mlx5_cache_unregister(&priv->sh->sample_action_list,
10738                                      &cache_resource->entry);
10739 }
10740
10741 void
10742 flow_dv_dest_array_remove_cb(struct mlx5_cache_list *list,
10743                              struct mlx5_cache_entry *entry)
10744 {
10745         struct rte_eth_dev *dev = list->ctx;
10746         struct mlx5_priv *priv = dev->data->dev_private;
10747         struct mlx5_flow_dv_dest_array_resource *cache_resource =
10748                         container_of(entry, typeof(*cache_resource), entry);
10749         uint32_t i = 0;
10750
10751         MLX5_ASSERT(cache_resource->action);
10752         if (cache_resource->action)
10753                 claim_zero(mlx5_glue->destroy_flow_action
10754                                         (cache_resource->action));
10755         for (; i < cache_resource->num_of_dest; i++)
10756                 flow_dv_sample_sub_actions_release(dev,
10757                                 &cache_resource->sample_idx[i]);
10758         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
10759                         cache_resource->idx);
10760         DRV_LOG(DEBUG, "destination array resource %p: removed",
10761                 (void *)cache_resource);
10762 }
10763
10764 /**
10765  * Release an destination array resource.
10766  *
10767  * @param dev
10768  *   Pointer to Ethernet device.
10769  * @param handle
10770  *   Pointer to mlx5_flow_handle.
10771  *
10772  * @return
10773  *   1 while a reference on it exists, 0 when freed.
10774  */
10775 static int
10776 flow_dv_dest_array_resource_release(struct rte_eth_dev *dev,
10777                                     struct mlx5_flow_handle *handle)
10778 {
10779         struct mlx5_priv *priv = dev->data->dev_private;
10780         struct mlx5_flow_dv_dest_array_resource *cache;
10781
10782         cache = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
10783                                handle->dvh.rix_dest_array);
10784         if (!cache)
10785                 return 0;
10786         MLX5_ASSERT(cache->action);
10787         return mlx5_cache_unregister(&priv->sh->dest_array_list,
10788                                      &cache->entry);
10789 }
10790
10791 /**
10792  * Remove the flow from the NIC but keeps it in memory.
10793  * Lock free, (mutex should be acquired by caller).
10794  *
10795  * @param[in] dev
10796  *   Pointer to Ethernet device.
10797  * @param[in, out] flow
10798  *   Pointer to flow structure.
10799  */
10800 static void
10801 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
10802 {
10803         struct mlx5_flow_handle *dh;
10804         uint32_t handle_idx;
10805         struct mlx5_priv *priv = dev->data->dev_private;
10806
10807         if (!flow)
10808                 return;
10809         handle_idx = flow->dev_handles;
10810         while (handle_idx) {
10811                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
10812                                     handle_idx);
10813                 if (!dh)
10814                         return;
10815                 if (dh->drv_flow) {
10816                         claim_zero(mlx5_flow_os_destroy_flow(dh->drv_flow));
10817                         dh->drv_flow = NULL;
10818                 }
10819                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE)
10820                         flow_dv_fate_resource_release(dev, dh);
10821                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
10822                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
10823                 handle_idx = dh->next.next;
10824         }
10825 }
10826
10827 /**
10828  * Remove the flow from the NIC and the memory.
10829  * Lock free, (mutex should be acquired by caller).
10830  *
10831  * @param[in] dev
10832  *   Pointer to the Ethernet device structure.
10833  * @param[in, out] flow
10834  *   Pointer to flow structure.
10835  */
10836 static void
10837 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
10838 {
10839         struct rte_flow_shared_action *shared;
10840         struct mlx5_flow_handle *dev_handle;
10841         struct mlx5_priv *priv = dev->data->dev_private;
10842
10843         if (!flow)
10844                 return;
10845         flow_dv_remove(dev, flow);
10846         shared = mlx5_flow_get_shared_rss(flow);
10847         if (shared)
10848                 __atomic_sub_fetch(&shared->refcnt, 1, __ATOMIC_RELAXED);
10849         if (flow->counter) {
10850                 flow_dv_counter_free(dev, flow->counter);
10851                 flow->counter = 0;
10852         }
10853         if (flow->meter) {
10854                 struct mlx5_flow_meter *fm;
10855
10856                 fm = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MTR],
10857                                     flow->meter);
10858                 if (fm)
10859                         mlx5_flow_meter_detach(fm);
10860                 flow->meter = 0;
10861         }
10862         while (flow->dev_handles) {
10863                 uint32_t tmp_idx = flow->dev_handles;
10864
10865                 dev_handle = mlx5_ipool_get(priv->sh->ipool
10866                                             [MLX5_IPOOL_MLX5_FLOW], tmp_idx);
10867                 if (!dev_handle)
10868                         return;
10869                 flow->dev_handles = dev_handle->next.next;
10870                 if (dev_handle->dvh.matcher)
10871                         flow_dv_matcher_release(dev, dev_handle);
10872                 if (dev_handle->dvh.rix_sample)
10873                         flow_dv_sample_resource_release(dev, dev_handle);
10874                 if (dev_handle->dvh.rix_dest_array)
10875                         flow_dv_dest_array_resource_release(dev, dev_handle);
10876                 if (dev_handle->dvh.rix_encap_decap)
10877                         flow_dv_encap_decap_resource_release(dev,
10878                                 dev_handle->dvh.rix_encap_decap);
10879                 if (dev_handle->dvh.modify_hdr)
10880                         flow_dv_modify_hdr_resource_release(dev, dev_handle);
10881                 if (dev_handle->dvh.rix_push_vlan)
10882                         flow_dv_push_vlan_action_resource_release(dev,
10883                                                                   dev_handle);
10884                 if (dev_handle->dvh.rix_tag)
10885                         flow_dv_tag_release(dev,
10886                                             dev_handle->dvh.rix_tag);
10887                 flow_dv_fate_resource_release(dev, dev_handle);
10888                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
10889                            tmp_idx);
10890         }
10891 }
10892
10893 /**
10894  * Release array of hash RX queue objects.
10895  * Helper function.
10896  *
10897  * @param[in] dev
10898  *   Pointer to the Ethernet device structure.
10899  * @param[in, out] hrxqs
10900  *   Array of hash RX queue objects.
10901  *
10902  * @return
10903  *   Total number of references to hash RX queue objects in *hrxqs* array
10904  *   after this operation.
10905  */
10906 static int
10907 __flow_dv_hrxqs_release(struct rte_eth_dev *dev,
10908                         uint32_t (*hrxqs)[MLX5_RSS_HASH_FIELDS_LEN])
10909 {
10910         size_t i;
10911         int remaining = 0;
10912
10913         for (i = 0; i < RTE_DIM(*hrxqs); i++) {
10914                 int ret = mlx5_hrxq_release(dev, (*hrxqs)[i]);
10915
10916                 if (!ret)
10917                         (*hrxqs)[i] = 0;
10918                 remaining += ret;
10919         }
10920         return remaining;
10921 }
10922
10923 /**
10924  * Release all hash RX queue objects representing shared RSS action.
10925  *
10926  * @param[in] dev
10927  *   Pointer to the Ethernet device structure.
10928  * @param[in, out] action
10929  *   Shared RSS action to remove hash RX queue objects from.
10930  *
10931  * @return
10932  *   Total number of references to hash RX queue objects stored in *action*
10933  *   after this operation.
10934  *   Expected to be 0 if no external references held.
10935  */
10936 static int
10937 __flow_dv_action_rss_hrxqs_release(struct rte_eth_dev *dev,
10938                                  struct mlx5_shared_action_rss *action)
10939 {
10940         return __flow_dv_hrxqs_release(dev, &action->hrxq) +
10941                 __flow_dv_hrxqs_release(dev, &action->hrxq_tunnel);
10942 }
10943
10944 /**
10945  * Setup shared RSS action.
10946  * Prepare set of hash RX queue objects sufficient to handle all valid
10947  * hash_fields combinations (see enum ibv_rx_hash_fields).
10948  *
10949  * @param[in] dev
10950  *   Pointer to the Ethernet device structure.
10951  * @param[in, out] action
10952  *   Partially initialized shared RSS action.
10953  * @param[out] error
10954  *   Perform verbose error reporting if not NULL. Initialized in case of
10955  *   error only.
10956  *
10957  * @return
10958  *   0 on success, otherwise negative errno value.
10959  */
10960 static int
10961 __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
10962                         struct mlx5_shared_action_rss *action,
10963                         struct rte_flow_error *error)
10964 {
10965         struct mlx5_flow_rss_desc rss_desc = { 0 };
10966         size_t i;
10967         int err;
10968
10969         memcpy(rss_desc.key, action->origin.key, MLX5_RSS_HASH_KEY_LEN);
10970         rss_desc.key_len = MLX5_RSS_HASH_KEY_LEN;
10971         rss_desc.const_q = action->origin.queue;
10972         rss_desc.queue_num = action->origin.queue_num;
10973         rss_desc.standalone = true;
10974         for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
10975                 uint32_t hrxq_idx;
10976                 uint64_t hash_fields = mlx5_rss_hash_fields[i];
10977                 int tunnel;
10978
10979                 for (tunnel = 0; tunnel < 2; tunnel++) {
10980                         rss_desc.tunnel = tunnel;
10981                         rss_desc.hash_fields = hash_fields;
10982                         hrxq_idx = mlx5_hrxq_get(dev, &rss_desc);
10983                         if (!hrxq_idx) {
10984                                 rte_flow_error_set
10985                                         (error, rte_errno,
10986                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10987                                          "cannot get hash queue");
10988                                 goto error_hrxq_new;
10989                         }
10990                         err = __flow_dv_action_rss_hrxq_set
10991                                 (action, hash_fields, tunnel, hrxq_idx);
10992                         MLX5_ASSERT(!err);
10993                 }
10994         }
10995         return 0;
10996 error_hrxq_new:
10997         err = rte_errno;
10998         __flow_dv_action_rss_hrxqs_release(dev, action);
10999         rte_errno = err;
11000         return -rte_errno;
11001 }
11002
11003 /**
11004  * Create shared RSS action.
11005  *
11006  * @param[in] dev
11007  *   Pointer to the Ethernet device structure.
11008  * @param[in] conf
11009  *   Shared action configuration.
11010  * @param[in] rss
11011  *   RSS action specification used to create shared action.
11012  * @param[out] error
11013  *   Perform verbose error reporting if not NULL. Initialized in case of
11014  *   error only.
11015  *
11016  * @return
11017  *   A valid shared action handle in case of success, NULL otherwise and
11018  *   rte_errno is set.
11019  */
11020 static struct rte_flow_shared_action *
11021 __flow_dv_action_rss_create(struct rte_eth_dev *dev,
11022                             const struct rte_flow_shared_action_conf *conf,
11023                             const struct rte_flow_action_rss *rss,
11024                             struct rte_flow_error *error)
11025 {
11026         struct rte_flow_shared_action *shared_action = NULL;
11027         void *queue = NULL;
11028         struct mlx5_shared_action_rss *shared_rss;
11029         struct rte_flow_action_rss *origin;
11030         const uint8_t *rss_key;
11031         uint32_t queue_size = rss->queue_num * sizeof(uint16_t);
11032
11033         RTE_SET_USED(conf);
11034         queue = mlx5_malloc(0, RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
11035                             0, SOCKET_ID_ANY);
11036         shared_action = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*shared_action), 0,
11037                                     SOCKET_ID_ANY);
11038         if (!shared_action || !queue) {
11039                 rte_flow_error_set(error, ENOMEM,
11040                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
11041                                    "cannot allocate resource memory");
11042                 goto error_rss_init;
11043         }
11044         shared_rss = &shared_action->rss;
11045         shared_rss->queue = queue;
11046         origin = &shared_rss->origin;
11047         origin->func = rss->func;
11048         origin->level = rss->level;
11049         /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
11050         origin->types = !rss->types ? ETH_RSS_IP : rss->types;
11051         /* NULL RSS key indicates default RSS key. */
11052         rss_key = !rss->key ? rss_hash_default_key : rss->key;
11053         memcpy(shared_rss->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
11054         origin->key = &shared_rss->key[0];
11055         origin->key_len = MLX5_RSS_HASH_KEY_LEN;
11056         memcpy(shared_rss->queue, rss->queue, queue_size);
11057         origin->queue = shared_rss->queue;
11058         origin->queue_num = rss->queue_num;
11059         if (__flow_dv_action_rss_setup(dev, shared_rss, error))
11060                 goto error_rss_init;
11061         shared_action->type = MLX5_RTE_FLOW_ACTION_TYPE_SHARED_RSS;
11062         return shared_action;
11063 error_rss_init:
11064         mlx5_free(shared_action);
11065         mlx5_free(queue);
11066         return NULL;
11067 }
11068
11069 /**
11070  * Destroy the shared RSS action.
11071  * Release related hash RX queue objects.
11072  *
11073  * @param[in] dev
11074  *   Pointer to the Ethernet device structure.
11075  * @param[in] shared_rss
11076  *   The shared RSS action object to be removed.
11077  * @param[out] error
11078  *   Perform verbose error reporting if not NULL. Initialized in case of
11079  *   error only.
11080  *
11081  * @return
11082  *   0 on success, otherwise negative errno value.
11083  */
11084 static int
11085 __flow_dv_action_rss_release(struct rte_eth_dev *dev,
11086                          struct mlx5_shared_action_rss *shared_rss,
11087                          struct rte_flow_error *error)
11088 {
11089         struct rte_flow_shared_action *shared_action = NULL;
11090         uint32_t old_refcnt = 1;
11091         int remaining = __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
11092
11093         if (remaining) {
11094                 return rte_flow_error_set(error, ETOOMANYREFS,
11095                                           RTE_FLOW_ERROR_TYPE_ACTION,
11096                                           NULL,
11097                                           "shared rss hrxq has references");
11098         }
11099         shared_action = container_of(shared_rss,
11100                                      struct rte_flow_shared_action, rss);
11101         if (!__atomic_compare_exchange_n(&shared_action->refcnt, &old_refcnt,
11102                                          0, 0,
11103                                          __ATOMIC_ACQUIRE, __ATOMIC_RELAXED)) {
11104                 return rte_flow_error_set(error, ETOOMANYREFS,
11105                                           RTE_FLOW_ERROR_TYPE_ACTION,
11106                                           NULL,
11107                                           "shared rss has references");
11108         }
11109         rte_free(shared_rss->queue);
11110         return 0;
11111 }
11112
11113 /**
11114  * Create shared action, lock free,
11115  * (mutex should be acquired by caller).
11116  * Dispatcher for action type specific call.
11117  *
11118  * @param[in] dev
11119  *   Pointer to the Ethernet device structure.
11120  * @param[in] conf
11121  *   Shared action configuration.
11122  * @param[in] action
11123  *   Action specification used to create shared action.
11124  * @param[out] error
11125  *   Perform verbose error reporting if not NULL. Initialized in case of
11126  *   error only.
11127  *
11128  * @return
11129  *   A valid shared action handle in case of success, NULL otherwise and
11130  *   rte_errno is set.
11131  */
11132 static struct rte_flow_shared_action *
11133 flow_dv_action_create(struct rte_eth_dev *dev,
11134                       const struct rte_flow_shared_action_conf *conf,
11135                       const struct rte_flow_action *action,
11136                       struct rte_flow_error *error)
11137 {
11138         struct rte_flow_shared_action *shared_action = NULL;
11139         struct mlx5_priv *priv = dev->data->dev_private;
11140
11141         switch (action->type) {
11142         case RTE_FLOW_ACTION_TYPE_RSS:
11143                 shared_action = __flow_dv_action_rss_create(dev, conf,
11144                                                             action->conf,
11145                                                             error);
11146                 break;
11147         default:
11148                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
11149                                    NULL, "action type not supported");
11150                 break;
11151         }
11152         if (shared_action) {
11153                 __atomic_add_fetch(&shared_action->refcnt, 1,
11154                                    __ATOMIC_RELAXED);
11155                 rte_spinlock_lock(&priv->shared_act_sl);
11156                 LIST_INSERT_HEAD(&priv->shared_actions, shared_action, next);
11157                 rte_spinlock_unlock(&priv->shared_act_sl);
11158         }
11159         return shared_action;
11160 }
11161
11162 /**
11163  * Destroy the shared action.
11164  * Release action related resources on the NIC and the memory.
11165  * Lock free, (mutex should be acquired by caller).
11166  * Dispatcher for action type specific call.
11167  *
11168  * @param[in] dev
11169  *   Pointer to the Ethernet device structure.
11170  * @param[in] action
11171  *   The shared action object to be removed.
11172  * @param[out] error
11173  *   Perform verbose error reporting if not NULL. Initialized in case of
11174  *   error only.
11175  *
11176  * @return
11177  *   0 on success, otherwise negative errno value.
11178  */
11179 static int
11180 flow_dv_action_destroy(struct rte_eth_dev *dev,
11181                        struct rte_flow_shared_action *action,
11182                        struct rte_flow_error *error)
11183 {
11184         struct mlx5_priv *priv = dev->data->dev_private;
11185         int ret;
11186
11187         switch (action->type) {
11188         case MLX5_RTE_FLOW_ACTION_TYPE_SHARED_RSS:
11189                 ret = __flow_dv_action_rss_release(dev, &action->rss, error);
11190                 break;
11191         default:
11192                 return rte_flow_error_set(error, ENOTSUP,
11193                                           RTE_FLOW_ERROR_TYPE_ACTION,
11194                                           NULL,
11195                                           "action type not supported");
11196         }
11197         if (ret)
11198                 return ret;
11199         rte_spinlock_lock(&priv->shared_act_sl);
11200         LIST_REMOVE(action, next);
11201         rte_spinlock_unlock(&priv->shared_act_sl);
11202         rte_free(action);
11203         return 0;
11204 }
11205
11206 /**
11207  * Updates in place shared RSS action configuration.
11208  *
11209  * @param[in] dev
11210  *   Pointer to the Ethernet device structure.
11211  * @param[in] shared_rss
11212  *   The shared RSS action object to be updated.
11213  * @param[in] action_conf
11214  *   RSS action specification used to modify *shared_rss*.
11215  * @param[out] error
11216  *   Perform verbose error reporting if not NULL. Initialized in case of
11217  *   error only.
11218  *
11219  * @return
11220  *   0 on success, otherwise negative errno value.
11221  * @note: currently only support update of RSS queues.
11222  */
11223 static int
11224 __flow_dv_action_rss_update(struct rte_eth_dev *dev,
11225                             struct mlx5_shared_action_rss *shared_rss,
11226                             const struct rte_flow_action_rss *action_conf,
11227                             struct rte_flow_error *error)
11228 {
11229         size_t i;
11230         int ret;
11231         void *queue = NULL;
11232         const uint8_t *rss_key;
11233         uint32_t rss_key_len;
11234         uint32_t queue_size = action_conf->queue_num * sizeof(uint16_t);
11235
11236         queue = mlx5_malloc(MLX5_MEM_ZERO,
11237                             RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
11238                             0, SOCKET_ID_ANY);
11239         if (!queue)
11240                 return rte_flow_error_set(error, ENOMEM,
11241                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11242                                           NULL,
11243                                           "cannot allocate resource memory");
11244         if (action_conf->key) {
11245                 rss_key = action_conf->key;
11246                 rss_key_len = action_conf->key_len;
11247         } else {
11248                 rss_key = rss_hash_default_key;
11249                 rss_key_len = MLX5_RSS_HASH_KEY_LEN;
11250         }
11251         for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
11252                 uint32_t hrxq_idx;
11253                 uint64_t hash_fields = mlx5_rss_hash_fields[i];
11254                 int tunnel;
11255
11256                 for (tunnel = 0; tunnel < 2; tunnel++) {
11257                         hrxq_idx = __flow_dv_action_rss_hrxq_lookup
11258                                         (shared_rss, hash_fields, tunnel);
11259                         MLX5_ASSERT(hrxq_idx);
11260                         ret = mlx5_hrxq_modify
11261                                 (dev, hrxq_idx,
11262                                  rss_key, rss_key_len,
11263                                  hash_fields,
11264                                  action_conf->queue, action_conf->queue_num);
11265                         if (ret) {
11266                                 mlx5_free(queue);
11267                                 return rte_flow_error_set
11268                                         (error, rte_errno,
11269                                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
11270                                          "cannot update hash queue");
11271                         }
11272                 }
11273         }
11274         mlx5_free(shared_rss->queue);
11275         shared_rss->queue = queue;
11276         memcpy(shared_rss->queue, action_conf->queue, queue_size);
11277         shared_rss->origin.queue = shared_rss->queue;
11278         shared_rss->origin.queue_num = action_conf->queue_num;
11279         return 0;
11280 }
11281
11282 /**
11283  * Updates in place shared action configuration, lock free,
11284  * (mutex should be acquired by caller).
11285  *
11286  * @param[in] dev
11287  *   Pointer to the Ethernet device structure.
11288  * @param[in] action
11289  *   The shared action object to be updated.
11290  * @param[in] action_conf
11291  *   Action specification used to modify *action*.
11292  *   *action_conf* should be of type correlating with type of the *action*,
11293  *   otherwise considered as invalid.
11294  * @param[out] error
11295  *   Perform verbose error reporting if not NULL. Initialized in case of
11296  *   error only.
11297  *
11298  * @return
11299  *   0 on success, otherwise negative errno value.
11300  */
11301 static int
11302 flow_dv_action_update(struct rte_eth_dev *dev,
11303                         struct rte_flow_shared_action *action,
11304                         const void *action_conf,
11305                         struct rte_flow_error *error)
11306 {
11307         switch (action->type) {
11308         case MLX5_RTE_FLOW_ACTION_TYPE_SHARED_RSS:
11309                 return __flow_dv_action_rss_update(dev, &action->rss,
11310                                                    action_conf, error);
11311         default:
11312                 return rte_flow_error_set(error, ENOTSUP,
11313                                           RTE_FLOW_ERROR_TYPE_ACTION,
11314                                           NULL,
11315                                           "action type not supported");
11316         }
11317 }
11318 /**
11319  * Query a dv flow  rule for its statistics via devx.
11320  *
11321  * @param[in] dev
11322  *   Pointer to Ethernet device.
11323  * @param[in] flow
11324  *   Pointer to the sub flow.
11325  * @param[out] data
11326  *   data retrieved by the query.
11327  * @param[out] error
11328  *   Perform verbose error reporting if not NULL.
11329  *
11330  * @return
11331  *   0 on success, a negative errno value otherwise and rte_errno is set.
11332  */
11333 static int
11334 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
11335                     void *data, struct rte_flow_error *error)
11336 {
11337         struct mlx5_priv *priv = dev->data->dev_private;
11338         struct rte_flow_query_count *qc = data;
11339
11340         if (!priv->config.devx)
11341                 return rte_flow_error_set(error, ENOTSUP,
11342                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11343                                           NULL,
11344                                           "counters are not supported");
11345         if (flow->counter) {
11346                 uint64_t pkts, bytes;
11347                 struct mlx5_flow_counter *cnt;
11348
11349                 cnt = flow_dv_counter_get_by_idx(dev, flow->counter,
11350                                                  NULL);
11351                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
11352                                                &bytes);
11353
11354                 if (err)
11355                         return rte_flow_error_set(error, -err,
11356                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11357                                         NULL, "cannot read counters");
11358                 qc->hits_set = 1;
11359                 qc->bytes_set = 1;
11360                 qc->hits = pkts - cnt->hits;
11361                 qc->bytes = bytes - cnt->bytes;
11362                 if (qc->reset) {
11363                         cnt->hits = pkts;
11364                         cnt->bytes = bytes;
11365                 }
11366                 return 0;
11367         }
11368         return rte_flow_error_set(error, EINVAL,
11369                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11370                                   NULL,
11371                                   "counters are not available");
11372 }
11373
11374 /**
11375  * Query a flow rule AGE action for aging information.
11376  *
11377  * @param[in] dev
11378  *   Pointer to Ethernet device.
11379  * @param[in] flow
11380  *   Pointer to the sub flow.
11381  * @param[out] data
11382  *   data retrieved by the query.
11383  * @param[out] error
11384  *   Perform verbose error reporting if not NULL.
11385  *
11386  * @return
11387  *   0 on success, a negative errno value otherwise and rte_errno is set.
11388  */
11389 static int
11390 flow_dv_query_age(struct rte_eth_dev *dev, struct rte_flow *flow,
11391                   void *data, struct rte_flow_error *error)
11392 {
11393         struct rte_flow_query_age *resp = data;
11394
11395         if (flow->counter) {
11396                 struct mlx5_age_param *age_param =
11397                                 flow_dv_counter_idx_get_age(dev, flow->counter);
11398
11399                 if (!age_param || !age_param->timeout)
11400                         return rte_flow_error_set
11401                                         (error, EINVAL,
11402                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11403                                          NULL, "cannot read age data");
11404                 resp->aged = __atomic_load_n(&age_param->state,
11405                                              __ATOMIC_RELAXED) ==
11406                                                         AGE_TMOUT ? 1 : 0;
11407                 resp->sec_since_last_hit_valid = !resp->aged;
11408                 if (resp->sec_since_last_hit_valid)
11409                         resp->sec_since_last_hit =
11410                                 __atomic_load_n(&age_param->sec_since_last_hit,
11411                                                 __ATOMIC_RELAXED);
11412                 return 0;
11413         }
11414         return rte_flow_error_set(error, EINVAL,
11415                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11416                                   NULL,
11417                                   "age data not available");
11418 }
11419
11420 /**
11421  * Query a flow.
11422  *
11423  * @see rte_flow_query()
11424  * @see rte_flow_ops
11425  */
11426 static int
11427 flow_dv_query(struct rte_eth_dev *dev,
11428               struct rte_flow *flow __rte_unused,
11429               const struct rte_flow_action *actions __rte_unused,
11430               void *data __rte_unused,
11431               struct rte_flow_error *error __rte_unused)
11432 {
11433         int ret = -EINVAL;
11434
11435         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
11436                 switch (actions->type) {
11437                 case RTE_FLOW_ACTION_TYPE_VOID:
11438                         break;
11439                 case RTE_FLOW_ACTION_TYPE_COUNT:
11440                         ret = flow_dv_query_count(dev, flow, data, error);
11441                         break;
11442                 case RTE_FLOW_ACTION_TYPE_AGE:
11443                         ret = flow_dv_query_age(dev, flow, data, error);
11444                         break;
11445                 default:
11446                         return rte_flow_error_set(error, ENOTSUP,
11447                                                   RTE_FLOW_ERROR_TYPE_ACTION,
11448                                                   actions,
11449                                                   "action not supported");
11450                 }
11451         }
11452         return ret;
11453 }
11454
11455 /**
11456  * Destroy the meter table set.
11457  * Lock free, (mutex should be acquired by caller).
11458  *
11459  * @param[in] dev
11460  *   Pointer to Ethernet device.
11461  * @param[in] tbl
11462  *   Pointer to the meter table set.
11463  *
11464  * @return
11465  *   Always 0.
11466  */
11467 static int
11468 flow_dv_destroy_mtr_tbl(struct rte_eth_dev *dev,
11469                         struct mlx5_meter_domains_infos *tbl)
11470 {
11471         struct mlx5_priv *priv = dev->data->dev_private;
11472         struct mlx5_meter_domains_infos *mtd =
11473                                 (struct mlx5_meter_domains_infos *)tbl;
11474
11475         if (!mtd || !priv->config.dv_flow_en)
11476                 return 0;
11477         if (mtd->ingress.policer_rules[RTE_MTR_DROPPED])
11478                 claim_zero(mlx5_flow_os_destroy_flow
11479                            (mtd->ingress.policer_rules[RTE_MTR_DROPPED]));
11480         if (mtd->egress.policer_rules[RTE_MTR_DROPPED])
11481                 claim_zero(mlx5_flow_os_destroy_flow
11482                            (mtd->egress.policer_rules[RTE_MTR_DROPPED]));
11483         if (mtd->transfer.policer_rules[RTE_MTR_DROPPED])
11484                 claim_zero(mlx5_flow_os_destroy_flow
11485                            (mtd->transfer.policer_rules[RTE_MTR_DROPPED]));
11486         if (mtd->egress.color_matcher)
11487                 claim_zero(mlx5_flow_os_destroy_flow_matcher
11488                            (mtd->egress.color_matcher));
11489         if (mtd->egress.any_matcher)
11490                 claim_zero(mlx5_flow_os_destroy_flow_matcher
11491                            (mtd->egress.any_matcher));
11492         if (mtd->egress.tbl)
11493                 flow_dv_tbl_resource_release(MLX5_SH(dev), mtd->egress.tbl);
11494         if (mtd->egress.sfx_tbl)
11495                 flow_dv_tbl_resource_release(MLX5_SH(dev), mtd->egress.sfx_tbl);
11496         if (mtd->ingress.color_matcher)
11497                 claim_zero(mlx5_flow_os_destroy_flow_matcher
11498                            (mtd->ingress.color_matcher));
11499         if (mtd->ingress.any_matcher)
11500                 claim_zero(mlx5_flow_os_destroy_flow_matcher
11501                            (mtd->ingress.any_matcher));
11502         if (mtd->ingress.tbl)
11503                 flow_dv_tbl_resource_release(MLX5_SH(dev), mtd->ingress.tbl);
11504         if (mtd->ingress.sfx_tbl)
11505                 flow_dv_tbl_resource_release(MLX5_SH(dev),
11506                                              mtd->ingress.sfx_tbl);
11507         if (mtd->transfer.color_matcher)
11508                 claim_zero(mlx5_flow_os_destroy_flow_matcher
11509                            (mtd->transfer.color_matcher));
11510         if (mtd->transfer.any_matcher)
11511                 claim_zero(mlx5_flow_os_destroy_flow_matcher
11512                            (mtd->transfer.any_matcher));
11513         if (mtd->transfer.tbl)
11514                 flow_dv_tbl_resource_release(MLX5_SH(dev), mtd->transfer.tbl);
11515         if (mtd->transfer.sfx_tbl)
11516                 flow_dv_tbl_resource_release(MLX5_SH(dev),
11517                                              mtd->transfer.sfx_tbl);
11518         if (mtd->drop_actn)
11519                 claim_zero(mlx5_flow_os_destroy_flow_action(mtd->drop_actn));
11520         mlx5_free(mtd);
11521         return 0;
11522 }
11523
11524 /* Number of meter flow actions, count and jump or count and drop. */
11525 #define METER_ACTIONS 2
11526
11527 /**
11528  * Create specify domain meter table and suffix table.
11529  *
11530  * @param[in] dev
11531  *   Pointer to Ethernet device.
11532  * @param[in,out] mtb
11533  *   Pointer to DV meter table set.
11534  * @param[in] egress
11535  *   Table attribute.
11536  * @param[in] transfer
11537  *   Table attribute.
11538  * @param[in] color_reg_c_idx
11539  *   Reg C index for color match.
11540  *
11541  * @return
11542  *   0 on success, -1 otherwise and rte_errno is set.
11543  */
11544 static int
11545 flow_dv_prepare_mtr_tables(struct rte_eth_dev *dev,
11546                            struct mlx5_meter_domains_infos *mtb,
11547                            uint8_t egress, uint8_t transfer,
11548                            uint32_t color_reg_c_idx)
11549 {
11550         struct mlx5_priv *priv = dev->data->dev_private;
11551         struct mlx5_dev_ctx_shared *sh = priv->sh;
11552         struct mlx5_flow_dv_match_params mask = {
11553                 .size = sizeof(mask.buf),
11554         };
11555         struct mlx5_flow_dv_match_params value = {
11556                 .size = sizeof(value.buf),
11557         };
11558         struct mlx5dv_flow_matcher_attr dv_attr = {
11559                 .type = IBV_FLOW_ATTR_NORMAL,
11560                 .priority = 0,
11561                 .match_criteria_enable = 0,
11562                 .match_mask = (void *)&mask,
11563         };
11564         void *actions[METER_ACTIONS];
11565         struct mlx5_meter_domain_info *dtb;
11566         struct rte_flow_error error;
11567         int i = 0;
11568         int ret;
11569
11570         if (transfer)
11571                 dtb = &mtb->transfer;
11572         else if (egress)
11573                 dtb = &mtb->egress;
11574         else
11575                 dtb = &mtb->ingress;
11576         /* Create the meter table with METER level. */
11577         dtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,
11578                                             egress, transfer, false, NULL, 0,
11579                                             0, &error);
11580         if (!dtb->tbl) {
11581                 DRV_LOG(ERR, "Failed to create meter policer table.");
11582                 return -1;
11583         }
11584         /* Create the meter suffix table with SUFFIX level. */
11585         dtb->sfx_tbl = flow_dv_tbl_resource_get(dev,
11586                                             MLX5_FLOW_TABLE_LEVEL_SUFFIX,
11587                                             egress, transfer, false, NULL, 0,
11588                                             0, &error);
11589         if (!dtb->sfx_tbl) {
11590                 DRV_LOG(ERR, "Failed to create meter suffix table.");
11591                 return -1;
11592         }
11593         /* Create matchers, Any and Color. */
11594         dv_attr.priority = 3;
11595         dv_attr.match_criteria_enable = 0;
11596         ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, dtb->tbl->obj,
11597                                                &dtb->any_matcher);
11598         if (ret) {
11599                 DRV_LOG(ERR, "Failed to create meter"
11600                              " policer default matcher.");
11601                 goto error_exit;
11602         }
11603         dv_attr.priority = 0;
11604         dv_attr.match_criteria_enable =
11605                                 1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
11606         flow_dv_match_meta_reg(mask.buf, value.buf, color_reg_c_idx,
11607                                rte_col_2_mlx5_col(RTE_COLORS), UINT8_MAX);
11608         ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, dtb->tbl->obj,
11609                                                &dtb->color_matcher);
11610         if (ret) {
11611                 DRV_LOG(ERR, "Failed to create meter policer color matcher.");
11612                 goto error_exit;
11613         }
11614         if (mtb->count_actns[RTE_MTR_DROPPED])
11615                 actions[i++] = mtb->count_actns[RTE_MTR_DROPPED];
11616         actions[i++] = mtb->drop_actn;
11617         /* Default rule: lowest priority, match any, actions: drop. */
11618         ret = mlx5_flow_os_create_flow(dtb->any_matcher, (void *)&value, i,
11619                                        actions,
11620                                        &dtb->policer_rules[RTE_MTR_DROPPED]);
11621         if (ret) {
11622                 DRV_LOG(ERR, "Failed to create meter policer drop rule.");
11623                 goto error_exit;
11624         }
11625         return 0;
11626 error_exit:
11627         return -1;
11628 }
11629
11630 /**
11631  * Create the needed meter and suffix tables.
11632  * Lock free, (mutex should be acquired by caller).
11633  *
11634  * @param[in] dev
11635  *   Pointer to Ethernet device.
11636  * @param[in] fm
11637  *   Pointer to the flow meter.
11638  *
11639  * @return
11640  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
11641  */
11642 static struct mlx5_meter_domains_infos *
11643 flow_dv_create_mtr_tbl(struct rte_eth_dev *dev,
11644                        const struct mlx5_flow_meter *fm)
11645 {
11646         struct mlx5_priv *priv = dev->data->dev_private;
11647         struct mlx5_meter_domains_infos *mtb;
11648         int ret;
11649         int i;
11650
11651         if (!priv->mtr_en) {
11652                 rte_errno = ENOTSUP;
11653                 return NULL;
11654         }
11655         mtb = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*mtb), 0, SOCKET_ID_ANY);
11656         if (!mtb) {
11657                 DRV_LOG(ERR, "Failed to allocate memory for meter.");
11658                 return NULL;
11659         }
11660         /* Create meter count actions */
11661         for (i = 0; i <= RTE_MTR_DROPPED; i++) {
11662                 struct mlx5_flow_counter *cnt;
11663                 if (!fm->policer_stats.cnt[i])
11664                         continue;
11665                 cnt = flow_dv_counter_get_by_idx(dev,
11666                       fm->policer_stats.cnt[i], NULL);
11667                 mtb->count_actns[i] = cnt->action;
11668         }
11669         /* Create drop action. */
11670         ret = mlx5_flow_os_create_flow_action_drop(&mtb->drop_actn);
11671         if (ret) {
11672                 DRV_LOG(ERR, "Failed to create drop action.");
11673                 goto error_exit;
11674         }
11675         /* Egress meter table. */
11676         ret = flow_dv_prepare_mtr_tables(dev, mtb, 1, 0, priv->mtr_color_reg);
11677         if (ret) {
11678                 DRV_LOG(ERR, "Failed to prepare egress meter table.");
11679                 goto error_exit;
11680         }
11681         /* Ingress meter table. */
11682         ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 0, priv->mtr_color_reg);
11683         if (ret) {
11684                 DRV_LOG(ERR, "Failed to prepare ingress meter table.");
11685                 goto error_exit;
11686         }
11687         /* FDB meter table. */
11688         if (priv->config.dv_esw_en) {
11689                 ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 1,
11690                                                  priv->mtr_color_reg);
11691                 if (ret) {
11692                         DRV_LOG(ERR, "Failed to prepare fdb meter table.");
11693                         goto error_exit;
11694                 }
11695         }
11696         return mtb;
11697 error_exit:
11698         flow_dv_destroy_mtr_tbl(dev, mtb);
11699         return NULL;
11700 }
11701
11702 /**
11703  * Destroy domain policer rule.
11704  *
11705  * @param[in] dt
11706  *   Pointer to domain table.
11707  */
11708 static void
11709 flow_dv_destroy_domain_policer_rule(struct mlx5_meter_domain_info *dt)
11710 {
11711         int i;
11712
11713         for (i = 0; i < RTE_MTR_DROPPED; i++) {
11714                 if (dt->policer_rules[i]) {
11715                         claim_zero(mlx5_flow_os_destroy_flow
11716                                    (dt->policer_rules[i]));
11717                         dt->policer_rules[i] = NULL;
11718                 }
11719         }
11720         if (dt->jump_actn) {
11721                 claim_zero(mlx5_flow_os_destroy_flow_action(dt->jump_actn));
11722                 dt->jump_actn = NULL;
11723         }
11724 }
11725
11726 /**
11727  * Destroy policer rules.
11728  *
11729  * @param[in] dev
11730  *   Pointer to Ethernet device.
11731  * @param[in] fm
11732  *   Pointer to flow meter structure.
11733  * @param[in] attr
11734  *   Pointer to flow attributes.
11735  *
11736  * @return
11737  *   Always 0.
11738  */
11739 static int
11740 flow_dv_destroy_policer_rules(struct rte_eth_dev *dev __rte_unused,
11741                               const struct mlx5_flow_meter *fm,
11742                               const struct rte_flow_attr *attr)
11743 {
11744         struct mlx5_meter_domains_infos *mtb = fm ? fm->mfts : NULL;
11745
11746         if (!mtb)
11747                 return 0;
11748         if (attr->egress)
11749                 flow_dv_destroy_domain_policer_rule(&mtb->egress);
11750         if (attr->ingress)
11751                 flow_dv_destroy_domain_policer_rule(&mtb->ingress);
11752         if (attr->transfer)
11753                 flow_dv_destroy_domain_policer_rule(&mtb->transfer);
11754         return 0;
11755 }
11756
11757 /**
11758  * Create specify domain meter policer rule.
11759  *
11760  * @param[in] fm
11761  *   Pointer to flow meter structure.
11762  * @param[in] mtb
11763  *   Pointer to DV meter table set.
11764  * @param[in] mtr_reg_c
11765  *   Color match REG_C.
11766  *
11767  * @return
11768  *   0 on success, -1 otherwise.
11769  */
11770 static int
11771 flow_dv_create_policer_forward_rule(struct mlx5_flow_meter *fm,
11772                                     struct mlx5_meter_domain_info *dtb,
11773                                     uint8_t mtr_reg_c)
11774 {
11775         struct mlx5_flow_dv_match_params matcher = {
11776                 .size = sizeof(matcher.buf),
11777         };
11778         struct mlx5_flow_dv_match_params value = {
11779                 .size = sizeof(value.buf),
11780         };
11781         struct mlx5_meter_domains_infos *mtb = fm->mfts;
11782         void *actions[METER_ACTIONS];
11783         int i;
11784         int ret = 0;
11785
11786         /* Create jump action. */
11787         if (!dtb->jump_actn)
11788                 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
11789                                 (dtb->sfx_tbl->obj, &dtb->jump_actn);
11790         if (ret) {
11791                 DRV_LOG(ERR, "Failed to create policer jump action.");
11792                 goto error;
11793         }
11794         for (i = 0; i < RTE_MTR_DROPPED; i++) {
11795                 int j = 0;
11796
11797                 flow_dv_match_meta_reg(matcher.buf, value.buf, mtr_reg_c,
11798                                        rte_col_2_mlx5_col(i), UINT8_MAX);
11799                 if (mtb->count_actns[i])
11800                         actions[j++] = mtb->count_actns[i];
11801                 if (fm->action[i] == MTR_POLICER_ACTION_DROP)
11802                         actions[j++] = mtb->drop_actn;
11803                 else
11804                         actions[j++] = dtb->jump_actn;
11805                 ret = mlx5_flow_os_create_flow(dtb->color_matcher,
11806                                                (void *)&value, j, actions,
11807                                                &dtb->policer_rules[i]);
11808                 if (ret) {
11809                         DRV_LOG(ERR, "Failed to create policer rule.");
11810                         goto error;
11811                 }
11812         }
11813         return 0;
11814 error:
11815         rte_errno = errno;
11816         return -1;
11817 }
11818
11819 /**
11820  * Create policer rules.
11821  *
11822  * @param[in] dev
11823  *   Pointer to Ethernet device.
11824  * @param[in] fm
11825  *   Pointer to flow meter structure.
11826  * @param[in] attr
11827  *   Pointer to flow attributes.
11828  *
11829  * @return
11830  *   0 on success, -1 otherwise.
11831  */
11832 static int
11833 flow_dv_create_policer_rules(struct rte_eth_dev *dev,
11834                              struct mlx5_flow_meter *fm,
11835                              const struct rte_flow_attr *attr)
11836 {
11837         struct mlx5_priv *priv = dev->data->dev_private;
11838         struct mlx5_meter_domains_infos *mtb = fm->mfts;
11839         int ret;
11840
11841         if (attr->egress) {
11842                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->egress,
11843                                                 priv->mtr_color_reg);
11844                 if (ret) {
11845                         DRV_LOG(ERR, "Failed to create egress policer.");
11846                         goto error;
11847                 }
11848         }
11849         if (attr->ingress) {
11850                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->ingress,
11851                                                 priv->mtr_color_reg);
11852                 if (ret) {
11853                         DRV_LOG(ERR, "Failed to create ingress policer.");
11854                         goto error;
11855                 }
11856         }
11857         if (attr->transfer) {
11858                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->transfer,
11859                                                 priv->mtr_color_reg);
11860                 if (ret) {
11861                         DRV_LOG(ERR, "Failed to create transfer policer.");
11862                         goto error;
11863                 }
11864         }
11865         return 0;
11866 error:
11867         flow_dv_destroy_policer_rules(dev, fm, attr);
11868         return -1;
11869 }
11870
11871 /**
11872  * Validate the batch counter support in root table.
11873  *
11874  * Create a simple flow with invalid counter and drop action on root table to
11875  * validate if batch counter with offset on root table is supported or not.
11876  *
11877  * @param[in] dev
11878  *   Pointer to rte_eth_dev structure.
11879  *
11880  * @return
11881  *   0 on success, a negative errno value otherwise and rte_errno is set.
11882  */
11883 int
11884 mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)
11885 {
11886         struct mlx5_priv *priv = dev->data->dev_private;
11887         struct mlx5_dev_ctx_shared *sh = priv->sh;
11888         struct mlx5_flow_dv_match_params mask = {
11889                 .size = sizeof(mask.buf),
11890         };
11891         struct mlx5_flow_dv_match_params value = {
11892                 .size = sizeof(value.buf),
11893         };
11894         struct mlx5dv_flow_matcher_attr dv_attr = {
11895                 .type = IBV_FLOW_ATTR_NORMAL,
11896                 .priority = 0,
11897                 .match_criteria_enable = 0,
11898                 .match_mask = (void *)&mask,
11899         };
11900         void *actions[2] = { 0 };
11901         struct mlx5_flow_tbl_resource *tbl = NULL, *dest_tbl = NULL;
11902         struct mlx5_devx_obj *dcs = NULL;
11903         void *matcher = NULL;
11904         void *flow = NULL;
11905         int i, ret = -1;
11906
11907         tbl = flow_dv_tbl_resource_get(dev, 0, 0, 0, false, NULL, 0, 0, NULL);
11908         if (!tbl)
11909                 goto err;
11910         dest_tbl = flow_dv_tbl_resource_get(dev, 1, 0, 0, false,
11911                                             NULL, 0, 0, NULL);
11912         if (!dest_tbl)
11913                 goto err;
11914         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
11915         if (!dcs)
11916                 goto err;
11917         ret = mlx5_flow_os_create_flow_action_count(dcs->obj, UINT16_MAX,
11918                                                     &actions[0]);
11919         if (ret)
11920                 goto err;
11921         ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
11922                                 (dest_tbl->obj, &actions[1]);
11923         if (ret)
11924                 goto err;
11925         dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
11926         ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj,
11927                                                &matcher);
11928         if (ret)
11929                 goto err;
11930         ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 2,
11931                                        actions, &flow);
11932 err:
11933         /*
11934          * If batch counter with offset is not supported, the driver will not
11935          * validate the invalid offset value, flow create should success.
11936          * In this case, it means batch counter is not supported in root table.
11937          *
11938          * Otherwise, if flow create is failed, counter offset is supported.
11939          */
11940         if (flow) {
11941                 DRV_LOG(INFO, "Batch counter is not supported in root "
11942                               "table. Switch to fallback mode.");
11943                 rte_errno = ENOTSUP;
11944                 ret = -rte_errno;
11945                 claim_zero(mlx5_flow_os_destroy_flow(flow));
11946         } else {
11947                 /* Check matcher to make sure validate fail at flow create. */
11948                 if (!matcher || (matcher && errno != EINVAL))
11949                         DRV_LOG(ERR, "Unexpected error in counter offset "
11950                                      "support detection");
11951                 ret = 0;
11952         }
11953         for (i = 0; i < 2; i++) {
11954                 if (actions[i])
11955                         claim_zero(mlx5_flow_os_destroy_flow_action
11956                                    (actions[i]));
11957         }
11958         if (matcher)
11959                 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
11960         if (tbl)
11961                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
11962         if (dest_tbl)
11963                 flow_dv_tbl_resource_release(MLX5_SH(dev), dest_tbl);
11964         if (dcs)
11965                 claim_zero(mlx5_devx_cmd_destroy(dcs));
11966         return ret;
11967 }
11968
11969 /**
11970  * Query a devx counter.
11971  *
11972  * @param[in] dev
11973  *   Pointer to the Ethernet device structure.
11974  * @param[in] cnt
11975  *   Index to the flow counter.
11976  * @param[in] clear
11977  *   Set to clear the counter statistics.
11978  * @param[out] pkts
11979  *   The statistics value of packets.
11980  * @param[out] bytes
11981  *   The statistics value of bytes.
11982  *
11983  * @return
11984  *   0 on success, otherwise return -1.
11985  */
11986 static int
11987 flow_dv_counter_query(struct rte_eth_dev *dev, uint32_t counter, bool clear,
11988                       uint64_t *pkts, uint64_t *bytes)
11989 {
11990         struct mlx5_priv *priv = dev->data->dev_private;
11991         struct mlx5_flow_counter *cnt;
11992         uint64_t inn_pkts, inn_bytes;
11993         int ret;
11994
11995         if (!priv->config.devx)
11996                 return -1;
11997
11998         ret = _flow_dv_query_count(dev, counter, &inn_pkts, &inn_bytes);
11999         if (ret)
12000                 return -1;
12001         cnt = flow_dv_counter_get_by_idx(dev, counter, NULL);
12002         *pkts = inn_pkts - cnt->hits;
12003         *bytes = inn_bytes - cnt->bytes;
12004         if (clear) {
12005                 cnt->hits = inn_pkts;
12006                 cnt->bytes = inn_bytes;
12007         }
12008         return 0;
12009 }
12010
12011 /**
12012  * Get aged-out flows.
12013  *
12014  * @param[in] dev
12015  *   Pointer to the Ethernet device structure.
12016  * @param[in] context
12017  *   The address of an array of pointers to the aged-out flows contexts.
12018  * @param[in] nb_contexts
12019  *   The length of context array pointers.
12020  * @param[out] error
12021  *   Perform verbose error reporting if not NULL. Initialized in case of
12022  *   error only.
12023  *
12024  * @return
12025  *   how many contexts get in success, otherwise negative errno value.
12026  *   if nb_contexts is 0, return the amount of all aged contexts.
12027  *   if nb_contexts is not 0 , return the amount of aged flows reported
12028  *   in the context array.
12029  * @note: only stub for now
12030  */
12031 static int
12032 flow_get_aged_flows(struct rte_eth_dev *dev,
12033                     void **context,
12034                     uint32_t nb_contexts,
12035                     struct rte_flow_error *error)
12036 {
12037         struct mlx5_priv *priv = dev->data->dev_private;
12038         struct mlx5_age_info *age_info;
12039         struct mlx5_age_param *age_param;
12040         struct mlx5_flow_counter *counter;
12041         int nb_flows = 0;
12042
12043         if (nb_contexts && !context)
12044                 return rte_flow_error_set(error, EINVAL,
12045                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12046                                           NULL,
12047                                           "Should assign at least one flow or"
12048                                           " context to get if nb_contexts != 0");
12049         age_info = GET_PORT_AGE_INFO(priv);
12050         rte_spinlock_lock(&age_info->aged_sl);
12051         TAILQ_FOREACH(counter, &age_info->aged_counters, next) {
12052                 nb_flows++;
12053                 if (nb_contexts) {
12054                         age_param = MLX5_CNT_TO_AGE(counter);
12055                         context[nb_flows - 1] = age_param->context;
12056                         if (!(--nb_contexts))
12057                                 break;
12058                 }
12059         }
12060         rte_spinlock_unlock(&age_info->aged_sl);
12061         MLX5_AGE_SET(age_info, MLX5_AGE_TRIGGER);
12062         return nb_flows;
12063 }
12064
12065 /*
12066  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
12067  */
12068 static uint32_t
12069 flow_dv_counter_allocate(struct rte_eth_dev *dev)
12070 {
12071         return flow_dv_counter_alloc(dev, 0);
12072 }
12073
12074 /**
12075  * Validate shared action.
12076  * Dispatcher for action type specific validation.
12077  *
12078  * @param[in] dev
12079  *   Pointer to the Ethernet device structure.
12080  * @param[in] conf
12081  *   Shared action configuration.
12082  * @param[in] action
12083  *   The shared action object to validate.
12084  * @param[out] error
12085  *   Perform verbose error reporting if not NULL. Initialized in case of
12086  *   error only.
12087  *
12088  * @return
12089  *   0 on success, otherwise negative errno value.
12090  */
12091 static int
12092 flow_dv_action_validate(struct rte_eth_dev *dev,
12093                         const struct rte_flow_shared_action_conf *conf,
12094                         const struct rte_flow_action *action,
12095                         struct rte_flow_error *error)
12096 {
12097         RTE_SET_USED(conf);
12098         switch (action->type) {
12099         case RTE_FLOW_ACTION_TYPE_RSS:
12100                 return mlx5_validate_action_rss(dev, action, error);
12101         default:
12102                 return rte_flow_error_set(error, ENOTSUP,
12103                                           RTE_FLOW_ERROR_TYPE_ACTION,
12104                                           NULL,
12105                                           "action type not supported");
12106         }
12107 }
12108
12109 static int
12110 flow_dv_sync_domain(struct rte_eth_dev *dev, uint32_t domains, uint32_t flags)
12111 {
12112         struct mlx5_priv *priv = dev->data->dev_private;
12113         int ret = 0;
12114
12115         if ((domains & MLX5_DOMAIN_BIT_NIC_RX) && priv->sh->rx_domain != NULL) {
12116                 ret = mlx5_glue->dr_sync_domain(priv->sh->rx_domain,
12117                                                 flags);
12118                 if (ret != 0)
12119                         return ret;
12120         }
12121         if ((domains & MLX5_DOMAIN_BIT_NIC_TX) && priv->sh->tx_domain != NULL) {
12122                 ret = mlx5_glue->dr_sync_domain(priv->sh->tx_domain, flags);
12123                 if (ret != 0)
12124                         return ret;
12125         }
12126         if ((domains & MLX5_DOMAIN_BIT_FDB) && priv->sh->fdb_domain != NULL) {
12127                 ret = mlx5_glue->dr_sync_domain(priv->sh->fdb_domain, flags);
12128                 if (ret != 0)
12129                         return ret;
12130         }
12131         return 0;
12132 }
12133
12134 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
12135         .validate = flow_dv_validate,
12136         .prepare = flow_dv_prepare,
12137         .translate = flow_dv_translate,
12138         .apply = flow_dv_apply,
12139         .remove = flow_dv_remove,
12140         .destroy = flow_dv_destroy,
12141         .query = flow_dv_query,
12142         .create_mtr_tbls = flow_dv_create_mtr_tbl,
12143         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbl,
12144         .create_policer_rules = flow_dv_create_policer_rules,
12145         .destroy_policer_rules = flow_dv_destroy_policer_rules,
12146         .counter_alloc = flow_dv_counter_allocate,
12147         .counter_free = flow_dv_counter_free,
12148         .counter_query = flow_dv_counter_query,
12149         .get_aged_flows = flow_get_aged_flows,
12150         .action_validate = flow_dv_action_validate,
12151         .action_create = flow_dv_action_create,
12152         .action_destroy = flow_dv_action_destroy,
12153         .action_update = flow_dv_action_update,
12154         .sync_domain = flow_dv_sync_domain,
12155 };
12156
12157 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
12158