drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 #include <rte_common.h>
  12 #include <rte_ether.h>
  13 #include <ethdev_driver.h>
  14 #include <rte_flow.h>
  15 #include <rte_flow_driver.h>
  16 #include <rte_malloc.h>
  17 #include <rte_cycles.h>
  18 #include <rte_ip.h>
  19 #include <rte_gre.h>
  20 #include <rte_vxlan.h>
  21 #include <rte_gtp.h>
  22 #include <rte_eal_paging.h>
  23 #include <rte_mpls.h>
  24 #include <rte_mtr.h>
  25 #include <rte_mtr_driver.h>
  26 #include <rte_tailq.h>
  27
  28 #include <mlx5_glue.h>
  29 #include <mlx5_devx_cmds.h>
  30 #include <mlx5_prm.h>
  31 #include <mlx5_malloc.h>
  32
  33 #include "mlx5_defs.h"
  34 #include "mlx5.h"
  35 #include "mlx5_common_os.h"
  36 #include "mlx5_flow.h"
  37 #include "mlx5_flow_os.h"
  38 #include "mlx5_rx.h"
  39 #include "mlx5_tx.h"
  40 #include "rte_pmd_mlx5.h"
  41
  42 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  43
  44 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  45 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  46 #endif
  47
  48 #ifndef HAVE_MLX5DV_DR_ESWITCH
  49 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  50 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  51 #endif
  52 #endif
  53
  54 #ifndef HAVE_MLX5DV_DR
  55 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  56 #endif
  57
  58 /* VLAN header definitions */
  59 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  60 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  61 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  62 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  63 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  64
  65 union flow_dv_attr {
  66         struct {
  67                 uint32_t valid:1;
  68                 uint32_t ipv4:1;
  69                 uint32_t ipv6:1;
  70                 uint32_t tcp:1;
  71                 uint32_t udp:1;
  72                 uint32_t reserved:27;
  73         };
  74         uint32_t attr;
  75 };
  76
  77 static int
  78 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
  79                              struct mlx5_flow_tbl_resource *tbl);
  80
  81 static int
  82 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
  83                                      uint32_t encap_decap_idx);
  84
  85 static int
  86 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
  87                                         uint32_t port_id);
  88 static void
  89 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss);
  90
  91 static int
  92 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
  93                                   uint32_t rix_jump);
  94
  95 /**
  96  * Initialize flow attributes structure according to flow items' types.
  97  *
  98  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
  99  * mode. For tunnel mode, the items to be modified are the outermost ones.
 100  *
 101  * @param[in] item
 102  *   Pointer to item specification.
 103  * @param[out] attr
 104  *   Pointer to flow attributes structure.
 105  * @param[in] dev_flow
 106  *   Pointer to the sub flow.
 107  * @param[in] tunnel_decap
 108  *   Whether action is after tunnel decapsulation.
 109  */
 110 static void
 111 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
 112                   struct mlx5_flow *dev_flow, bool tunnel_decap)
 113 {
 114         uint64_t layers = dev_flow->handle->layers;
 115
 116         /*
 117          * If layers is already initialized, it means this dev_flow is the
 118          * suffix flow, the layers flags is set by the prefix flow. Need to
 119          * use the layer flags from prefix flow as the suffix flow may not
 120          * have the user defined items as the flow is split.
 121          */
 122         if (layers) {
 123                 if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
 124                         attr->ipv4 = 1;
 125                 else if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
 126                         attr->ipv6 = 1;
 127                 if (layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
 128                         attr->tcp = 1;
 129                 else if (layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
 130                         attr->udp = 1;
 131                 attr->valid = 1;
 132                 return;
 133         }
 134         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 135                 uint8_t next_protocol = 0xff;
 136                 switch (item->type) {
 137                 case RTE_FLOW_ITEM_TYPE_GRE:
 138                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 139                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 140                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 141                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 142                 case RTE_FLOW_ITEM_TYPE_MPLS:
 143                         if (tunnel_decap)
 144                                 attr->attr = 0;
 145                         break;
 146                 case RTE_FLOW_ITEM_TYPE_IPV4:
 147                         if (!attr->ipv6)
 148                                 attr->ipv4 = 1;
 149                         if (item->mask != NULL &&
 150                             ((const struct rte_flow_item_ipv4 *)
 151                             item->mask)->hdr.next_proto_id)
 152                                 next_protocol =
 153                                     ((const struct rte_flow_item_ipv4 *)
 154                                       (item->spec))->hdr.next_proto_id &
 155                                     ((const struct rte_flow_item_ipv4 *)
 156                                       (item->mask))->hdr.next_proto_id;
 157                         if ((next_protocol == IPPROTO_IPIP ||
 158                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 159                                 attr->attr = 0;
 160                         break;
 161                 case RTE_FLOW_ITEM_TYPE_IPV6:
 162                         if (!attr->ipv4)
 163                                 attr->ipv6 = 1;
 164                         if (item->mask != NULL &&
 165                             ((const struct rte_flow_item_ipv6 *)
 166                             item->mask)->hdr.proto)
 167                                 next_protocol =
 168                                     ((const struct rte_flow_item_ipv6 *)
 169                                       (item->spec))->hdr.proto &
 170                                     ((const struct rte_flow_item_ipv6 *)
 171                                       (item->mask))->hdr.proto;
 172                         if ((next_protocol == IPPROTO_IPIP ||
 173                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 174                                 attr->attr = 0;
 175                         break;
 176                 case RTE_FLOW_ITEM_TYPE_UDP:
 177                         if (!attr->tcp)
 178                                 attr->udp = 1;
 179                         break;
 180                 case RTE_FLOW_ITEM_TYPE_TCP:
 181                         if (!attr->udp)
 182                                 attr->tcp = 1;
 183                         break;
 184                 default:
 185                         break;
 186                 }
 187         }
 188         attr->valid = 1;
 189 }
 190
 191 /*
 192  * Convert rte_mtr_color to mlx5 color.
 193  *
 194  * @param[in] rcol
 195  *   rte_mtr_color.
 196  *
 197  * @return
 198  *   mlx5 color.
 199  */
 200 static inline int
 201 rte_col_2_mlx5_col(enum rte_color rcol)
 202 {
 203         switch (rcol) {
 204         case RTE_COLOR_GREEN:
 205                 return MLX5_FLOW_COLOR_GREEN;
 206         case RTE_COLOR_YELLOW:
 207                 return MLX5_FLOW_COLOR_YELLOW;
 208         case RTE_COLOR_RED:
 209                 return MLX5_FLOW_COLOR_RED;
 210         default:
 211                 break;
 212         }
 213         return MLX5_FLOW_COLOR_UNDEFINED;
 214 }
 215
 216 struct field_modify_info {
 217         uint32_t size; /* Size of field in protocol header, in bytes. */
 218         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 219         enum mlx5_modification_field id;
 220 };
 221
 222 struct field_modify_info modify_eth[] = {
 223         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 224         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 225         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 226         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 227         {0, 0, 0},
 228 };
 229
 230 struct field_modify_info modify_vlan_out_first_vid[] = {
 231         /* Size in bits !!! */
 232         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 233         {0, 0, 0},
 234 };
 235
 236 struct field_modify_info modify_ipv4[] = {
 237         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 238         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 239         {4, 12, MLX5_MODI_OUT_SIPV4},
 240         {4, 16, MLX5_MODI_OUT_DIPV4},
 241         {0, 0, 0},
 242 };
 243
 244 struct field_modify_info modify_ipv6[] = {
 245         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 246         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 247         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 248         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 249         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 250         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 251         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 252         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 253         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 254         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 255         {0, 0, 0},
 256 };
 257
 258 struct field_modify_info modify_udp[] = {
 259         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 260         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 261         {0, 0, 0},
 262 };
 263
 264 struct field_modify_info modify_tcp[] = {
 265         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 266         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 267         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 268         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 269         {0, 0, 0},
 270 };
 271
 272 static const struct rte_flow_item *
 273 mlx5_flow_find_tunnel_item(const struct rte_flow_item *item)
 274 {
 275         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 276                 switch (item->type) {
 277                 default:
 278                         break;
 279                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 280                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 281                 case RTE_FLOW_ITEM_TYPE_GRE:
 282                 case RTE_FLOW_ITEM_TYPE_MPLS:
 283                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 284                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 285                         return item;
 286                 case RTE_FLOW_ITEM_TYPE_IPV4:
 287                 case RTE_FLOW_ITEM_TYPE_IPV6:
 288                         if (item[1].type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 289                             item[1].type == RTE_FLOW_ITEM_TYPE_IPV6)
 290                                 return item;
 291                         break;
 292                 }
 293         }
 294         return NULL;
 295 }
 296
 297 static void
 298 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 299                           uint8_t next_protocol, uint64_t *item_flags,
 300                           int *tunnel)
 301 {
 302         MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 303                     item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 304         if (next_protocol == IPPROTO_IPIP) {
 305                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 306                 *tunnel = 1;
 307         }
 308         if (next_protocol == IPPROTO_IPV6) {
 309                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 310                 *tunnel = 1;
 311         }
 312 }
 313
 314 static inline struct mlx5_hlist *
 315 flow_dv_hlist_prepare(struct mlx5_dev_ctx_shared *sh, struct mlx5_hlist **phl,
 316                      const char *name, uint32_t size, bool direct_key,
 317                      bool lcores_share, void *ctx,
 318                      mlx5_list_create_cb cb_create,
 319                      mlx5_list_match_cb cb_match,
 320                      mlx5_list_remove_cb cb_remove,
 321                      mlx5_list_clone_cb cb_clone,
 322                      mlx5_list_clone_free_cb cb_clone_free)
 323 {
 324         struct mlx5_hlist *hl;
 325         struct mlx5_hlist *expected = NULL;
 326         char s[MLX5_NAME_SIZE];
 327
 328         hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
 329         if (likely(hl))
 330                 return hl;
 331         snprintf(s, sizeof(s), "%s_%s", sh->ibdev_name, name);
 332         hl = mlx5_hlist_create(s, size, direct_key, lcores_share,
 333                         ctx, cb_create, cb_match, cb_remove, cb_clone,
 334                         cb_clone_free);
 335         if (!hl) {
 336                 DRV_LOG(ERR, "%s hash creation failed", name);
 337                 rte_errno = ENOMEM;
 338                 return NULL;
 339         }
 340         if (!__atomic_compare_exchange_n(phl, &expected, hl, false,
 341                                          __ATOMIC_SEQ_CST,
 342                                          __ATOMIC_SEQ_CST)) {
 343                 mlx5_hlist_destroy(hl);
 344                 hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
 345         }
 346         return hl;
 347 }
 348
 349 /* Update VLAN's VID/PCP based on input rte_flow_action.
 350  *
 351  * @param[in] action
 352  *   Pointer to struct rte_flow_action.
 353  * @param[out] vlan
 354  *   Pointer to struct rte_vlan_hdr.
 355  */
 356 static void
 357 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 358                          struct rte_vlan_hdr *vlan)
 359 {
 360         uint16_t vlan_tci;
 361         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 362                 vlan_tci =
 363                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 364                                                action->conf)->vlan_pcp;
 365                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 366                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 367                 vlan->vlan_tci |= vlan_tci;
 368         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 369                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 370                 vlan->vlan_tci |= rte_be_to_cpu_16
 371                     (((const struct rte_flow_action_of_set_vlan_vid *)
 372                                              action->conf)->vlan_vid);
 373         }
 374 }
 375
 376 /**
 377  * Fetch 1, 2, 3 or 4 byte field from the byte array
 378  * and return as unsigned integer in host-endian format.
 379  *
 380  * @param[in] data
 381  *   Pointer to data array.
 382  * @param[in] size
 383  *   Size of field to extract.
 384  *
 385  * @return
 386  *   converted field in host endian format.
 387  */
 388 static inline uint32_t
 389 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 390 {
 391         uint32_t ret;
 392
 393         switch (size) {
 394         case 1:
 395                 ret = *data;
 396                 break;
 397         case 2:
 398                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 399                 break;
 400         case 3:
 401                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 402                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 403                 break;
 404         case 4:
 405                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 406                 break;
 407         default:
 408                 MLX5_ASSERT(false);
 409                 ret = 0;
 410                 break;
 411         }
 412         return ret;
 413 }
 414
 415 /**
 416  * Convert modify-header action to DV specification.
 417  *
 418  * Data length of each action is determined by provided field description
 419  * and the item mask. Data bit offset and width of each action is determined
 420  * by provided item mask.
 421  *
 422  * @param[in] item
 423  *   Pointer to item specification.
 424  * @param[in] field
 425  *   Pointer to field modification information.
 426  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 427  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 428  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 429  * @param[in] dcopy
 430  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 431  *   Negative offset value sets the same offset as source offset.
 432  *   size field is ignored, value is taken from source field.
 433  * @param[in,out] resource
 434  *   Pointer to the modify-header resource.
 435  * @param[in] type
 436  *   Type of modification.
 437  * @param[out] error
 438  *   Pointer to the error structure.
 439  *
 440  * @return
 441  *   0 on success, a negative errno value otherwise and rte_errno is set.
 442  */
 443 static int
 444 flow_dv_convert_modify_action(struct rte_flow_item *item,
 445                               struct field_modify_info *field,
 446                               struct field_modify_info *dcopy,
 447                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 448                               uint32_t type, struct rte_flow_error *error)
 449 {
 450         uint32_t i = resource->actions_num;
 451         struct mlx5_modification_cmd *actions = resource->actions;
 452         uint32_t carry_b = 0;
 453
 454         /*
 455          * The item and mask are provided in big-endian format.
 456          * The fields should be presented as in big-endian format either.
 457          * Mask must be always present, it defines the actual field width.
 458          */
 459         MLX5_ASSERT(item->mask);
 460         MLX5_ASSERT(field->size);
 461         do {
 462                 uint32_t size_b;
 463                 uint32_t off_b;
 464                 uint32_t mask;
 465                 uint32_t data;
 466                 bool next_field = true;
 467                 bool next_dcopy = true;
 468
 469                 if (i >= MLX5_MAX_MODIFY_NUM)
 470                         return rte_flow_error_set(error, EINVAL,
 471                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 472                                  "too many items to modify");
 473                 /* Fetch variable byte size mask from the array. */
 474                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 475                                            field->offset, field->size);
 476                 if (!mask) {
 477                         ++field;
 478                         continue;
 479                 }
 480                 /* Deduce actual data width in bits from mask value. */
 481                 off_b = rte_bsf32(mask) + carry_b;
 482                 size_b = sizeof(uint32_t) * CHAR_BIT -
 483                          off_b - __builtin_clz(mask);
 484                 MLX5_ASSERT(size_b);
 485                 actions[i] = (struct mlx5_modification_cmd) {
 486                         .action_type = type,
 487                         .field = field->id,
 488                         .offset = off_b,
 489                         .length = (size_b == sizeof(uint32_t) * CHAR_BIT) ?
 490                                 0 : size_b,
 491                 };
 492                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 493                         MLX5_ASSERT(dcopy);
 494                         actions[i].dst_field = dcopy->id;
 495                         actions[i].dst_offset =
 496                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 497                         /* Convert entire record to big-endian format. */
 498                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 499                         /*
 500                          * Destination field overflow. Copy leftovers of
 501                          * a source field to the next destination field.
 502                          */
 503                         carry_b = 0;
 504                         if ((size_b > dcopy->size * CHAR_BIT - dcopy->offset) &&
 505                             dcopy->size != 0) {
 506                                 actions[i].length =
 507                                         dcopy->size * CHAR_BIT - dcopy->offset;
 508                                 carry_b = actions[i].length;
 509                                 next_field = false;
 510                         }
 511                         /*
 512                          * Not enough bits in a source filed to fill a
 513                          * destination field. Switch to the next source.
 514                          */
 515                         if ((size_b < dcopy->size * CHAR_BIT - dcopy->offset) &&
 516                             (size_b == field->size * CHAR_BIT - off_b)) {
 517                                 actions[i].length =
 518                                         field->size * CHAR_BIT - off_b;
 519                                 dcopy->offset += actions[i].length;
 520                                 next_dcopy = false;
 521                         }
 522                         if (next_dcopy)
 523                                 ++dcopy;
 524                 } else {
 525                         MLX5_ASSERT(item->spec);
 526                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 527                                                    field->offset, field->size);
 528                         /* Shift out the trailing masked bits from data. */
 529                         data = (data & mask) >> off_b;
 530                         actions[i].data1 = rte_cpu_to_be_32(data);
 531                 }
 532                 /* Convert entire record to expected big-endian format. */
 533                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 534                 if (next_field)
 535                         ++field;
 536                 ++i;
 537         } while (field->size);
 538         if (resource->actions_num == i)
 539                 return rte_flow_error_set(error, EINVAL,
 540                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 541                                           "invalid modification flow item");
 542         resource->actions_num = i;
 543         return 0;
 544 }
 545
 546 /**
 547  * Convert modify-header set IPv4 address action to DV specification.
 548  *
 549  * @param[in,out] resource
 550  *   Pointer to the modify-header resource.
 551  * @param[in] action
 552  *   Pointer to action specification.
 553  * @param[out] error
 554  *   Pointer to the error structure.
 555  *
 556  * @return
 557  *   0 on success, a negative errno value otherwise and rte_errno is set.
 558  */
 559 static int
 560 flow_dv_convert_action_modify_ipv4
 561                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 562                          const struct rte_flow_action *action,
 563                          struct rte_flow_error *error)
 564 {
 565         const struct rte_flow_action_set_ipv4 *conf =
 566                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 567         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 568         struct rte_flow_item_ipv4 ipv4;
 569         struct rte_flow_item_ipv4 ipv4_mask;
 570
 571         memset(&ipv4, 0, sizeof(ipv4));
 572         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 573         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 574                 ipv4.hdr.src_addr = conf->ipv4_addr;
 575                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 576         } else {
 577                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 578                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 579         }
 580         item.spec = &ipv4;
 581         item.mask = &ipv4_mask;
 582         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 583                                              MLX5_MODIFICATION_TYPE_SET, error);
 584 }
 585
 586 /**
 587  * Convert modify-header set IPv6 address action to DV specification.
 588  *
 589  * @param[in,out] resource
 590  *   Pointer to the modify-header resource.
 591  * @param[in] action
 592  *   Pointer to action specification.
 593  * @param[out] error
 594  *   Pointer to the error structure.
 595  *
 596  * @return
 597  *   0 on success, a negative errno value otherwise and rte_errno is set.
 598  */
 599 static int
 600 flow_dv_convert_action_modify_ipv6
 601                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 602                          const struct rte_flow_action *action,
 603                          struct rte_flow_error *error)
 604 {
 605         const struct rte_flow_action_set_ipv6 *conf =
 606                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 607         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 608         struct rte_flow_item_ipv6 ipv6;
 609         struct rte_flow_item_ipv6 ipv6_mask;
 610
 611         memset(&ipv6, 0, sizeof(ipv6));
 612         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 613         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 614                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 615                        sizeof(ipv6.hdr.src_addr));
 616                 memcpy(&ipv6_mask.hdr.src_addr,
 617                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 618                        sizeof(ipv6.hdr.src_addr));
 619         } else {
 620                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 621                        sizeof(ipv6.hdr.dst_addr));
 622                 memcpy(&ipv6_mask.hdr.dst_addr,
 623                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 624                        sizeof(ipv6.hdr.dst_addr));
 625         }
 626         item.spec = &ipv6;
 627         item.mask = &ipv6_mask;
 628         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 629                                              MLX5_MODIFICATION_TYPE_SET, error);
 630 }
 631
 632 /**
 633  * Convert modify-header set MAC address action to DV specification.
 634  *
 635  * @param[in,out] resource
 636  *   Pointer to the modify-header resource.
 637  * @param[in] action
 638  *   Pointer to action specification.
 639  * @param[out] error
 640  *   Pointer to the error structure.
 641  *
 642  * @return
 643  *   0 on success, a negative errno value otherwise and rte_errno is set.
 644  */
 645 static int
 646 flow_dv_convert_action_modify_mac
 647                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 648                          const struct rte_flow_action *action,
 649                          struct rte_flow_error *error)
 650 {
 651         const struct rte_flow_action_set_mac *conf =
 652                 (const struct rte_flow_action_set_mac *)(action->conf);
 653         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 654         struct rte_flow_item_eth eth;
 655         struct rte_flow_item_eth eth_mask;
 656
 657         memset(&eth, 0, sizeof(eth));
 658         memset(&eth_mask, 0, sizeof(eth_mask));
 659         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 660                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 661                        sizeof(eth.src.addr_bytes));
 662                 memcpy(&eth_mask.src.addr_bytes,
 663                        &rte_flow_item_eth_mask.src.addr_bytes,
 664                        sizeof(eth_mask.src.addr_bytes));
 665         } else {
 666                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 667                        sizeof(eth.dst.addr_bytes));
 668                 memcpy(&eth_mask.dst.addr_bytes,
 669                        &rte_flow_item_eth_mask.dst.addr_bytes,
 670                        sizeof(eth_mask.dst.addr_bytes));
 671         }
 672         item.spec = &eth;
 673         item.mask = &eth_mask;
 674         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 675                                              MLX5_MODIFICATION_TYPE_SET, error);
 676 }
 677
 678 /**
 679  * Convert modify-header set VLAN VID action to DV specification.
 680  *
 681  * @param[in,out] resource
 682  *   Pointer to the modify-header resource.
 683  * @param[in] action
 684  *   Pointer to action specification.
 685  * @param[out] error
 686  *   Pointer to the error structure.
 687  *
 688  * @return
 689  *   0 on success, a negative errno value otherwise and rte_errno is set.
 690  */
 691 static int
 692 flow_dv_convert_action_modify_vlan_vid
 693                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 694                          const struct rte_flow_action *action,
 695                          struct rte_flow_error *error)
 696 {
 697         const struct rte_flow_action_of_set_vlan_vid *conf =
 698                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 699         int i = resource->actions_num;
 700         struct mlx5_modification_cmd *actions = resource->actions;
 701         struct field_modify_info *field = modify_vlan_out_first_vid;
 702
 703         if (i >= MLX5_MAX_MODIFY_NUM)
 704                 return rte_flow_error_set(error, EINVAL,
 705                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 706                          "too many items to modify");
 707         actions[i] = (struct mlx5_modification_cmd) {
 708                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 709                 .field = field->id,
 710                 .length = field->size,
 711                 .offset = field->offset,
 712         };
 713         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 714         actions[i].data1 = conf->vlan_vid;
 715         actions[i].data1 = actions[i].data1 << 16;
 716         resource->actions_num = ++i;
 717         return 0;
 718 }
 719
 720 /**
 721  * Convert modify-header set TP action to DV specification.
 722  *
 723  * @param[in,out] resource
 724  *   Pointer to the modify-header resource.
 725  * @param[in] action
 726  *   Pointer to action specification.
 727  * @param[in] items
 728  *   Pointer to rte_flow_item objects list.
 729  * @param[in] attr
 730  *   Pointer to flow attributes structure.
 731  * @param[in] dev_flow
 732  *   Pointer to the sub flow.
 733  * @param[in] tunnel_decap
 734  *   Whether action is after tunnel decapsulation.
 735  * @param[out] error
 736  *   Pointer to the error structure.
 737  *
 738  * @return
 739  *   0 on success, a negative errno value otherwise and rte_errno is set.
 740  */
 741 static int
 742 flow_dv_convert_action_modify_tp
 743                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 744                          const struct rte_flow_action *action,
 745                          const struct rte_flow_item *items,
 746                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 747                          bool tunnel_decap, struct rte_flow_error *error)
 748 {
 749         const struct rte_flow_action_set_tp *conf =
 750                 (const struct rte_flow_action_set_tp *)(action->conf);
 751         struct rte_flow_item item;
 752         struct rte_flow_item_udp udp;
 753         struct rte_flow_item_udp udp_mask;
 754         struct rte_flow_item_tcp tcp;
 755         struct rte_flow_item_tcp tcp_mask;
 756         struct field_modify_info *field;
 757
 758         if (!attr->valid)
 759                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 760         if (attr->udp) {
 761                 memset(&udp, 0, sizeof(udp));
 762                 memset(&udp_mask, 0, sizeof(udp_mask));
 763                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 764                         udp.hdr.src_port = conf->port;
 765                         udp_mask.hdr.src_port =
 766                                         rte_flow_item_udp_mask.hdr.src_port;
 767                 } else {
 768                         udp.hdr.dst_port = conf->port;
 769                         udp_mask.hdr.dst_port =
 770                                         rte_flow_item_udp_mask.hdr.dst_port;
 771                 }
 772                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 773                 item.spec = &udp;
 774                 item.mask = &udp_mask;
 775                 field = modify_udp;
 776         } else {
 777                 MLX5_ASSERT(attr->tcp);
 778                 memset(&tcp, 0, sizeof(tcp));
 779                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 780                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 781                         tcp.hdr.src_port = conf->port;
 782                         tcp_mask.hdr.src_port =
 783                                         rte_flow_item_tcp_mask.hdr.src_port;
 784                 } else {
 785                         tcp.hdr.dst_port = conf->port;
 786                         tcp_mask.hdr.dst_port =
 787                                         rte_flow_item_tcp_mask.hdr.dst_port;
 788                 }
 789                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 790                 item.spec = &tcp;
 791                 item.mask = &tcp_mask;
 792                 field = modify_tcp;
 793         }
 794         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 795                                              MLX5_MODIFICATION_TYPE_SET, error);
 796 }
 797
 798 /**
 799  * Convert modify-header set TTL action to DV specification.
 800  *
 801  * @param[in,out] resource
 802  *   Pointer to the modify-header resource.
 803  * @param[in] action
 804  *   Pointer to action specification.
 805  * @param[in] items
 806  *   Pointer to rte_flow_item objects list.
 807  * @param[in] attr
 808  *   Pointer to flow attributes structure.
 809  * @param[in] dev_flow
 810  *   Pointer to the sub flow.
 811  * @param[in] tunnel_decap
 812  *   Whether action is after tunnel decapsulation.
 813  * @param[out] error
 814  *   Pointer to the error structure.
 815  *
 816  * @return
 817  *   0 on success, a negative errno value otherwise and rte_errno is set.
 818  */
 819 static int
 820 flow_dv_convert_action_modify_ttl
 821                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 822                          const struct rte_flow_action *action,
 823                          const struct rte_flow_item *items,
 824                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 825                          bool tunnel_decap, struct rte_flow_error *error)
 826 {
 827         const struct rte_flow_action_set_ttl *conf =
 828                 (const struct rte_flow_action_set_ttl *)(action->conf);
 829         struct rte_flow_item item;
 830         struct rte_flow_item_ipv4 ipv4;
 831         struct rte_flow_item_ipv4 ipv4_mask;
 832         struct rte_flow_item_ipv6 ipv6;
 833         struct rte_flow_item_ipv6 ipv6_mask;
 834         struct field_modify_info *field;
 835
 836         if (!attr->valid)
 837                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 838         if (attr->ipv4) {
 839                 memset(&ipv4, 0, sizeof(ipv4));
 840                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 841                 ipv4.hdr.time_to_live = conf->ttl_value;
 842                 ipv4_mask.hdr.time_to_live = 0xFF;
 843                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 844                 item.spec = &ipv4;
 845                 item.mask = &ipv4_mask;
 846                 field = modify_ipv4;
 847         } else {
 848                 MLX5_ASSERT(attr->ipv6);
 849                 memset(&ipv6, 0, sizeof(ipv6));
 850                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 851                 ipv6.hdr.hop_limits = conf->ttl_value;
 852                 ipv6_mask.hdr.hop_limits = 0xFF;
 853                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 854                 item.spec = &ipv6;
 855                 item.mask = &ipv6_mask;
 856                 field = modify_ipv6;
 857         }
 858         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 859                                              MLX5_MODIFICATION_TYPE_SET, error);
 860 }
 861
 862 /**
 863  * Convert modify-header decrement TTL action to DV specification.
 864  *
 865  * @param[in,out] resource
 866  *   Pointer to the modify-header resource.
 867  * @param[in] action
 868  *   Pointer to action specification.
 869  * @param[in] items
 870  *   Pointer to rte_flow_item objects list.
 871  * @param[in] attr
 872  *   Pointer to flow attributes structure.
 873  * @param[in] dev_flow
 874  *   Pointer to the sub flow.
 875  * @param[in] tunnel_decap
 876  *   Whether action is after tunnel decapsulation.
 877  * @param[out] error
 878  *   Pointer to the error structure.
 879  *
 880  * @return
 881  *   0 on success, a negative errno value otherwise and rte_errno is set.
 882  */
 883 static int
 884 flow_dv_convert_action_modify_dec_ttl
 885                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 886                          const struct rte_flow_item *items,
 887                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 888                          bool tunnel_decap, struct rte_flow_error *error)
 889 {
 890         struct rte_flow_item item;
 891         struct rte_flow_item_ipv4 ipv4;
 892         struct rte_flow_item_ipv4 ipv4_mask;
 893         struct rte_flow_item_ipv6 ipv6;
 894         struct rte_flow_item_ipv6 ipv6_mask;
 895         struct field_modify_info *field;
 896
 897         if (!attr->valid)
 898                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 899         if (attr->ipv4) {
 900                 memset(&ipv4, 0, sizeof(ipv4));
 901                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 902                 ipv4.hdr.time_to_live = 0xFF;
 903                 ipv4_mask.hdr.time_to_live = 0xFF;
 904                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 905                 item.spec = &ipv4;
 906                 item.mask = &ipv4_mask;
 907                 field = modify_ipv4;
 908         } else {
 909                 MLX5_ASSERT(attr->ipv6);
 910                 memset(&ipv6, 0, sizeof(ipv6));
 911                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 912                 ipv6.hdr.hop_limits = 0xFF;
 913                 ipv6_mask.hdr.hop_limits = 0xFF;
 914                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 915                 item.spec = &ipv6;
 916                 item.mask = &ipv6_mask;
 917                 field = modify_ipv6;
 918         }
 919         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 920                                              MLX5_MODIFICATION_TYPE_ADD, error);
 921 }
 922
 923 /**
 924  * Convert modify-header increment/decrement TCP Sequence number
 925  * to DV specification.
 926  *
 927  * @param[in,out] resource
 928  *   Pointer to the modify-header resource.
 929  * @param[in] action
 930  *   Pointer to action specification.
 931  * @param[out] error
 932  *   Pointer to the error structure.
 933  *
 934  * @return
 935  *   0 on success, a negative errno value otherwise and rte_errno is set.
 936  */
 937 static int
 938 flow_dv_convert_action_modify_tcp_seq
 939                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 940                          const struct rte_flow_action *action,
 941                          struct rte_flow_error *error)
 942 {
 943         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 944         uint64_t value = rte_be_to_cpu_32(*conf);
 945         struct rte_flow_item item;
 946         struct rte_flow_item_tcp tcp;
 947         struct rte_flow_item_tcp tcp_mask;
 948
 949         memset(&tcp, 0, sizeof(tcp));
 950         memset(&tcp_mask, 0, sizeof(tcp_mask));
 951         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 952                 /*
 953                  * The HW has no decrement operation, only increment operation.
 954                  * To simulate decrement X from Y using increment operation
 955                  * we need to add UINT32_MAX X times to Y.
 956                  * Each adding of UINT32_MAX decrements Y by 1.
 957                  */
 958                 value *= UINT32_MAX;
 959         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 960         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 961         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 962         item.spec = &tcp;
 963         item.mask = &tcp_mask;
 964         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 965                                              MLX5_MODIFICATION_TYPE_ADD, error);
 966 }
 967
 968 /**
 969  * Convert modify-header increment/decrement TCP Acknowledgment number
 970  * to DV specification.
 971  *
 972  * @param[in,out] resource
 973  *   Pointer to the modify-header resource.
 974  * @param[in] action
 975  *   Pointer to action specification.
 976  * @param[out] error
 977  *   Pointer to the error structure.
 978  *
 979  * @return
 980  *   0 on success, a negative errno value otherwise and rte_errno is set.
 981  */
 982 static int
 983 flow_dv_convert_action_modify_tcp_ack
 984                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 985                          const struct rte_flow_action *action,
 986                          struct rte_flow_error *error)
 987 {
 988         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 989         uint64_t value = rte_be_to_cpu_32(*conf);
 990         struct rte_flow_item item;
 991         struct rte_flow_item_tcp tcp;
 992         struct rte_flow_item_tcp tcp_mask;
 993
 994         memset(&tcp, 0, sizeof(tcp));
 995         memset(&tcp_mask, 0, sizeof(tcp_mask));
 996         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 997                 /*
 998                  * The HW has no decrement operation, only increment operation.
 999                  * To simulate decrement X from Y using increment operation
1000                  * we need to add UINT32_MAX X times to Y.
1001                  * Each adding of UINT32_MAX decrements Y by 1.
1002                  */
1003                 value *= UINT32_MAX;
1004         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
1005         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
1006         item.type = RTE_FLOW_ITEM_TYPE_TCP;
1007         item.spec = &tcp;
1008         item.mask = &tcp_mask;
1009         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
1010                                              MLX5_MODIFICATION_TYPE_ADD, error);
1011 }
1012
1013 static enum mlx5_modification_field reg_to_field[] = {
1014         [REG_NON] = MLX5_MODI_OUT_NONE,
1015         [REG_A] = MLX5_MODI_META_DATA_REG_A,
1016         [REG_B] = MLX5_MODI_META_DATA_REG_B,
1017         [REG_C_0] = MLX5_MODI_META_REG_C_0,
1018         [REG_C_1] = MLX5_MODI_META_REG_C_1,
1019         [REG_C_2] = MLX5_MODI_META_REG_C_2,
1020         [REG_C_3] = MLX5_MODI_META_REG_C_3,
1021         [REG_C_4] = MLX5_MODI_META_REG_C_4,
1022         [REG_C_5] = MLX5_MODI_META_REG_C_5,
1023         [REG_C_6] = MLX5_MODI_META_REG_C_6,
1024         [REG_C_7] = MLX5_MODI_META_REG_C_7,
1025 };
1026
1027 /**
1028  * Convert register set to DV specification.
1029  *
1030  * @param[in,out] resource
1031  *   Pointer to the modify-header resource.
1032  * @param[in] action
1033  *   Pointer to action specification.
1034  * @param[out] error
1035  *   Pointer to the error structure.
1036  *
1037  * @return
1038  *   0 on success, a negative errno value otherwise and rte_errno is set.
1039  */
1040 static int
1041 flow_dv_convert_action_set_reg
1042                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1043                          const struct rte_flow_action *action,
1044                          struct rte_flow_error *error)
1045 {
1046         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
1047         struct mlx5_modification_cmd *actions = resource->actions;
1048         uint32_t i = resource->actions_num;
1049
1050         if (i >= MLX5_MAX_MODIFY_NUM)
1051                 return rte_flow_error_set(error, EINVAL,
1052                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1053                                           "too many items to modify");
1054         MLX5_ASSERT(conf->id != REG_NON);
1055         MLX5_ASSERT(conf->id < (enum modify_reg)RTE_DIM(reg_to_field));
1056         actions[i] = (struct mlx5_modification_cmd) {
1057                 .action_type = MLX5_MODIFICATION_TYPE_SET,
1058                 .field = reg_to_field[conf->id],
1059                 .offset = conf->offset,
1060                 .length = conf->length,
1061         };
1062         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
1063         actions[i].data1 = rte_cpu_to_be_32(conf->data);
1064         ++i;
1065         resource->actions_num = i;
1066         return 0;
1067 }
1068
1069 /**
1070  * Convert SET_TAG action to DV specification.
1071  *
1072  * @param[in] dev
1073  *   Pointer to the rte_eth_dev structure.
1074  * @param[in,out] resource
1075  *   Pointer to the modify-header resource.
1076  * @param[in] conf
1077  *   Pointer to action specification.
1078  * @param[out] error
1079  *   Pointer to the error structure.
1080  *
1081  * @return
1082  *   0 on success, a negative errno value otherwise and rte_errno is set.
1083  */
1084 static int
1085 flow_dv_convert_action_set_tag
1086                         (struct rte_eth_dev *dev,
1087                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1088                          const struct rte_flow_action_set_tag *conf,
1089                          struct rte_flow_error *error)
1090 {
1091         rte_be32_t data = rte_cpu_to_be_32(conf->data);
1092         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
1093         struct rte_flow_item item = {
1094                 .spec = &data,
1095                 .mask = &mask,
1096         };
1097         struct field_modify_info reg_c_x[] = {
1098                 [1] = {0, 0, 0},
1099         };
1100         enum mlx5_modification_field reg_type;
1101         int ret;
1102
1103         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1104         if (ret < 0)
1105                 return ret;
1106         MLX5_ASSERT(ret != REG_NON);
1107         MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1108         reg_type = reg_to_field[ret];
1109         MLX5_ASSERT(reg_type > 0);
1110         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1111         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1112                                              MLX5_MODIFICATION_TYPE_SET, error);
1113 }
1114
1115 /**
1116  * Convert internal COPY_REG action to DV specification.
1117  *
1118  * @param[in] dev
1119  *   Pointer to the rte_eth_dev structure.
1120  * @param[in,out] res
1121  *   Pointer to the modify-header resource.
1122  * @param[in] action
1123  *   Pointer to action specification.
1124  * @param[out] error
1125  *   Pointer to the error structure.
1126  *
1127  * @return
1128  *   0 on success, a negative errno value otherwise and rte_errno is set.
1129  */
1130 static int
1131 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1132                                  struct mlx5_flow_dv_modify_hdr_resource *res,
1133                                  const struct rte_flow_action *action,
1134                                  struct rte_flow_error *error)
1135 {
1136         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1137         rte_be32_t mask = RTE_BE32(UINT32_MAX);
1138         struct rte_flow_item item = {
1139                 .spec = NULL,
1140                 .mask = &mask,
1141         };
1142         struct field_modify_info reg_src[] = {
1143                 {4, 0, reg_to_field[conf->src]},
1144                 {0, 0, 0},
1145         };
1146         struct field_modify_info reg_dst = {
1147                 .offset = 0,
1148                 .id = reg_to_field[conf->dst],
1149         };
1150         /* Adjust reg_c[0] usage according to reported mask. */
1151         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1152                 struct mlx5_priv *priv = dev->data->dev_private;
1153                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1154
1155                 MLX5_ASSERT(reg_c0);
1156                 MLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1157                 if (conf->dst == REG_C_0) {
1158                         /* Copy to reg_c[0], within mask only. */
1159                         reg_dst.offset = rte_bsf32(reg_c0);
1160                         mask = rte_cpu_to_be_32(reg_c0 >> reg_dst.offset);
1161                 } else {
1162                         reg_dst.offset = 0;
1163                         mask = rte_cpu_to_be_32(reg_c0);
1164                 }
1165         }
1166         return flow_dv_convert_modify_action(&item,
1167                                              reg_src, &reg_dst, res,
1168                                              MLX5_MODIFICATION_TYPE_COPY,
1169                                              error);
1170 }
1171
1172 /**
1173  * Convert MARK action to DV specification. This routine is used
1174  * in extensive metadata only and requires metadata register to be
1175  * handled. In legacy mode hardware tag resource is engaged.
1176  *
1177  * @param[in] dev
1178  *   Pointer to the rte_eth_dev structure.
1179  * @param[in] conf
1180  *   Pointer to MARK action specification.
1181  * @param[in,out] resource
1182  *   Pointer to the modify-header resource.
1183  * @param[out] error
1184  *   Pointer to the error structure.
1185  *
1186  * @return
1187  *   0 on success, a negative errno value otherwise and rte_errno is set.
1188  */
1189 static int
1190 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1191                             const struct rte_flow_action_mark *conf,
1192                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1193                             struct rte_flow_error *error)
1194 {
1195         struct mlx5_priv *priv = dev->data->dev_private;
1196         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1197                                            priv->sh->dv_mark_mask);
1198         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1199         struct rte_flow_item item = {
1200                 .spec = &data,
1201                 .mask = &mask,
1202         };
1203         struct field_modify_info reg_c_x[] = {
1204                 [1] = {0, 0, 0},
1205         };
1206         int reg;
1207
1208         if (!mask)
1209                 return rte_flow_error_set(error, EINVAL,
1210                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1211                                           NULL, "zero mark action mask");
1212         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1213         if (reg < 0)
1214                 return reg;
1215         MLX5_ASSERT(reg > 0);
1216         if (reg == REG_C_0) {
1217                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1218                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1219
1220                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1221                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1222                 mask = rte_cpu_to_be_32(mask << shl_c0);
1223         }
1224         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1225         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1226                                              MLX5_MODIFICATION_TYPE_SET, error);
1227 }
1228
1229 /**
1230  * Get metadata register index for specified steering domain.
1231  *
1232  * @param[in] dev
1233  *   Pointer to the rte_eth_dev structure.
1234  * @param[in] attr
1235  *   Attributes of flow to determine steering domain.
1236  * @param[out] error
1237  *   Pointer to the error structure.
1238  *
1239  * @return
1240  *   positive index on success, a negative errno value otherwise
1241  *   and rte_errno is set.
1242  */
1243 static enum modify_reg
1244 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1245                          const struct rte_flow_attr *attr,
1246                          struct rte_flow_error *error)
1247 {
1248         int reg =
1249                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1250                                           MLX5_METADATA_FDB :
1251                                             attr->egress ?
1252                                             MLX5_METADATA_TX :
1253                                             MLX5_METADATA_RX, 0, error);
1254         if (reg < 0)
1255                 return rte_flow_error_set(error,
1256                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1257                                           NULL, "unavailable "
1258                                           "metadata register");
1259         return reg;
1260 }
1261
1262 /**
1263  * Convert SET_META action to DV specification.
1264  *
1265  * @param[in] dev
1266  *   Pointer to the rte_eth_dev structure.
1267  * @param[in,out] resource
1268  *   Pointer to the modify-header resource.
1269  * @param[in] attr
1270  *   Attributes of flow that includes this item.
1271  * @param[in] conf
1272  *   Pointer to action specification.
1273  * @param[out] error
1274  *   Pointer to the error structure.
1275  *
1276  * @return
1277  *   0 on success, a negative errno value otherwise and rte_errno is set.
1278  */
1279 static int
1280 flow_dv_convert_action_set_meta
1281                         (struct rte_eth_dev *dev,
1282                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1283                          const struct rte_flow_attr *attr,
1284                          const struct rte_flow_action_set_meta *conf,
1285                          struct rte_flow_error *error)
1286 {
1287         uint32_t mask = rte_cpu_to_be_32(conf->mask);
1288         uint32_t data = rte_cpu_to_be_32(conf->data) & mask;
1289         struct rte_flow_item item = {
1290                 .spec = &data,
1291                 .mask = &mask,
1292         };
1293         struct field_modify_info reg_c_x[] = {
1294                 [1] = {0, 0, 0},
1295         };
1296         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1297
1298         if (reg < 0)
1299                 return reg;
1300         MLX5_ASSERT(reg != REG_NON);
1301         if (reg == REG_C_0) {
1302                 struct mlx5_priv *priv = dev->data->dev_private;
1303                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1304                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1305
1306                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1307                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1308                 mask = rte_cpu_to_be_32(mask << shl_c0);
1309         }
1310         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1311         /* The routine expects parameters in memory as big-endian ones. */
1312         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1313                                              MLX5_MODIFICATION_TYPE_SET, error);
1314 }
1315
1316 /**
1317  * Convert modify-header set IPv4 DSCP action to DV specification.
1318  *
1319  * @param[in,out] resource
1320  *   Pointer to the modify-header resource.
1321  * @param[in] action
1322  *   Pointer to action specification.
1323  * @param[out] error
1324  *   Pointer to the error structure.
1325  *
1326  * @return
1327  *   0 on success, a negative errno value otherwise and rte_errno is set.
1328  */
1329 static int
1330 flow_dv_convert_action_modify_ipv4_dscp
1331                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1332                          const struct rte_flow_action *action,
1333                          struct rte_flow_error *error)
1334 {
1335         const struct rte_flow_action_set_dscp *conf =
1336                 (const struct rte_flow_action_set_dscp *)(action->conf);
1337         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1338         struct rte_flow_item_ipv4 ipv4;
1339         struct rte_flow_item_ipv4 ipv4_mask;
1340
1341         memset(&ipv4, 0, sizeof(ipv4));
1342         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1343         ipv4.hdr.type_of_service = conf->dscp;
1344         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1345         item.spec = &ipv4;
1346         item.mask = &ipv4_mask;
1347         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1348                                              MLX5_MODIFICATION_TYPE_SET, error);
1349 }
1350
1351 /**
1352  * Convert modify-header set IPv6 DSCP action to DV specification.
1353  *
1354  * @param[in,out] resource
1355  *   Pointer to the modify-header resource.
1356  * @param[in] action
1357  *   Pointer to action specification.
1358  * @param[out] error
1359  *   Pointer to the error structure.
1360  *
1361  * @return
1362  *   0 on success, a negative errno value otherwise and rte_errno is set.
1363  */
1364 static int
1365 flow_dv_convert_action_modify_ipv6_dscp
1366                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1367                          const struct rte_flow_action *action,
1368                          struct rte_flow_error *error)
1369 {
1370         const struct rte_flow_action_set_dscp *conf =
1371                 (const struct rte_flow_action_set_dscp *)(action->conf);
1372         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1373         struct rte_flow_item_ipv6 ipv6;
1374         struct rte_flow_item_ipv6 ipv6_mask;
1375
1376         memset(&ipv6, 0, sizeof(ipv6));
1377         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1378         /*
1379          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1380          * rdma-core only accept the DSCP bits byte aligned start from
1381          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1382          * bits in IPv6 case as rdma-core requires byte aligned value.
1383          */
1384         ipv6.hdr.vtc_flow = conf->dscp;
1385         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1386         item.spec = &ipv6;
1387         item.mask = &ipv6_mask;
1388         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1389                                              MLX5_MODIFICATION_TYPE_SET, error);
1390 }
1391
1392 static int
1393 mlx5_flow_item_field_width(struct mlx5_priv *priv,
1394                            enum rte_flow_field_id field, int inherit)
1395 {
1396         switch (field) {
1397         case RTE_FLOW_FIELD_START:
1398                 return 32;
1399         case RTE_FLOW_FIELD_MAC_DST:
1400         case RTE_FLOW_FIELD_MAC_SRC:
1401                 return 48;
1402         case RTE_FLOW_FIELD_VLAN_TYPE:
1403                 return 16;
1404         case RTE_FLOW_FIELD_VLAN_ID:
1405                 return 12;
1406         case RTE_FLOW_FIELD_MAC_TYPE:
1407                 return 16;
1408         case RTE_FLOW_FIELD_IPV4_DSCP:
1409                 return 6;
1410         case RTE_FLOW_FIELD_IPV4_TTL:
1411                 return 8;
1412         case RTE_FLOW_FIELD_IPV4_SRC:
1413         case RTE_FLOW_FIELD_IPV4_DST:
1414                 return 32;
1415         case RTE_FLOW_FIELD_IPV6_DSCP:
1416                 return 6;
1417         case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1418                 return 8;
1419         case RTE_FLOW_FIELD_IPV6_SRC:
1420         case RTE_FLOW_FIELD_IPV6_DST:
1421                 return 128;
1422         case RTE_FLOW_FIELD_TCP_PORT_SRC:
1423         case RTE_FLOW_FIELD_TCP_PORT_DST:
1424                 return 16;
1425         case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1426         case RTE_FLOW_FIELD_TCP_ACK_NUM:
1427                 return 32;
1428         case RTE_FLOW_FIELD_TCP_FLAGS:
1429                 return 9;
1430         case RTE_FLOW_FIELD_UDP_PORT_SRC:
1431         case RTE_FLOW_FIELD_UDP_PORT_DST:
1432                 return 16;
1433         case RTE_FLOW_FIELD_VXLAN_VNI:
1434         case RTE_FLOW_FIELD_GENEVE_VNI:
1435                 return 24;
1436         case RTE_FLOW_FIELD_GTP_TEID:
1437         case RTE_FLOW_FIELD_TAG:
1438                 return 32;
1439         case RTE_FLOW_FIELD_MARK:
1440                 return __builtin_popcount(priv->sh->dv_mark_mask);
1441         case RTE_FLOW_FIELD_META:
1442                 return __builtin_popcount(priv->sh->dv_meta_mask);
1443         case RTE_FLOW_FIELD_POINTER:
1444         case RTE_FLOW_FIELD_VALUE:
1445                 return inherit < 0 ? 0 : inherit;
1446         default:
1447                 MLX5_ASSERT(false);
1448         }
1449         return 0;
1450 }
1451
1452 static void
1453 mlx5_flow_field_id_to_modify_info
1454                 (const struct rte_flow_action_modify_data *data,
1455                  struct field_modify_info *info, uint32_t *mask,
1456                  uint32_t width, uint32_t *shift, struct rte_eth_dev *dev,
1457                  const struct rte_flow_attr *attr, struct rte_flow_error *error)
1458 {
1459         struct mlx5_priv *priv = dev->data->dev_private;
1460         uint32_t idx = 0;
1461         uint32_t off = 0;
1462
1463         switch (data->field) {
1464         case RTE_FLOW_FIELD_START:
1465                 /* not supported yet */
1466                 MLX5_ASSERT(false);
1467                 break;
1468         case RTE_FLOW_FIELD_MAC_DST:
1469                 off = data->offset > 16 ? data->offset - 16 : 0;
1470                 if (mask) {
1471                         if (data->offset < 16) {
1472                                 info[idx] = (struct field_modify_info){2, 4,
1473                                                 MLX5_MODI_OUT_DMAC_15_0};
1474                                 if (width < 16) {
1475                                         mask[idx] = rte_cpu_to_be_16(0xffff >>
1476                                                                  (16 - width));
1477                                         width = 0;
1478                                 } else {
1479                                         mask[idx] = RTE_BE16(0xffff);
1480                                         width -= 16;
1481                                 }
1482                                 if (!width)
1483                                         break;
1484                                 ++idx;
1485                         }
1486                         info[idx] = (struct field_modify_info){4, 0,
1487                                                 MLX5_MODI_OUT_DMAC_47_16};
1488                         mask[idx] = rte_cpu_to_be_32((0xffffffff >>
1489                                                       (32 - width)) << off);
1490                 } else {
1491                         if (data->offset < 16)
1492                                 info[idx++] = (struct field_modify_info){2, 4,
1493                                                 MLX5_MODI_OUT_DMAC_15_0};
1494                         info[idx] = (struct field_modify_info){4, 0,
1495                                                 MLX5_MODI_OUT_DMAC_47_16};
1496                 }
1497                 break;
1498         case RTE_FLOW_FIELD_MAC_SRC:
1499                 off = data->offset > 16 ? data->offset - 16 : 0;
1500                 if (mask) {
1501                         if (data->offset < 16) {
1502                                 info[idx] = (struct field_modify_info){2, 4,
1503                                                 MLX5_MODI_OUT_SMAC_15_0};
1504                                 if (width < 16) {
1505                                         mask[idx] = rte_cpu_to_be_16(0xffff >>
1506                                                                  (16 - width));
1507                                         width = 0;
1508                                 } else {
1509                                         mask[idx] = RTE_BE16(0xffff);
1510                                         width -= 16;
1511                                 }
1512                                 if (!width)
1513                                         break;
1514                                 ++idx;
1515                         }
1516                         info[idx] = (struct field_modify_info){4, 0,
1517                                                 MLX5_MODI_OUT_SMAC_47_16};
1518                         mask[idx] = rte_cpu_to_be_32((0xffffffff >>
1519                                                       (32 - width)) << off);
1520                 } else {
1521                         if (data->offset < 16)
1522                                 info[idx++] = (struct field_modify_info){2, 4,
1523                                                 MLX5_MODI_OUT_SMAC_15_0};
1524                         info[idx] = (struct field_modify_info){4, 0,
1525                                                 MLX5_MODI_OUT_SMAC_47_16};
1526                 }
1527                 break;
1528         case RTE_FLOW_FIELD_VLAN_TYPE:
1529                 /* not supported yet */
1530                 break;
1531         case RTE_FLOW_FIELD_VLAN_ID:
1532                 info[idx] = (struct field_modify_info){2, 0,
1533                                         MLX5_MODI_OUT_FIRST_VID};
1534                 if (mask)
1535                         mask[idx] = rte_cpu_to_be_16(0x0fff >> (12 - width));
1536                 break;
1537         case RTE_FLOW_FIELD_MAC_TYPE:
1538                 info[idx] = (struct field_modify_info){2, 0,
1539                                         MLX5_MODI_OUT_ETHERTYPE};
1540                 if (mask)
1541                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1542                 break;
1543         case RTE_FLOW_FIELD_IPV4_DSCP:
1544                 info[idx] = (struct field_modify_info){1, 0,
1545                                         MLX5_MODI_OUT_IP_DSCP};
1546                 if (mask)
1547                         mask[idx] = 0x3f >> (6 - width);
1548                 break;
1549         case RTE_FLOW_FIELD_IPV4_TTL:
1550                 info[idx] = (struct field_modify_info){1, 0,
1551                                         MLX5_MODI_OUT_IPV4_TTL};
1552                 if (mask)
1553                         mask[idx] = 0xff >> (8 - width);
1554                 break;
1555         case RTE_FLOW_FIELD_IPV4_SRC:
1556                 info[idx] = (struct field_modify_info){4, 0,
1557                                         MLX5_MODI_OUT_SIPV4};
1558                 if (mask)
1559                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1560                                                      (32 - width));
1561                 break;
1562         case RTE_FLOW_FIELD_IPV4_DST:
1563                 info[idx] = (struct field_modify_info){4, 0,
1564                                         MLX5_MODI_OUT_DIPV4};
1565                 if (mask)
1566                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1567                                                      (32 - width));
1568                 break;
1569         case RTE_FLOW_FIELD_IPV6_DSCP:
1570                 info[idx] = (struct field_modify_info){1, 0,
1571                                         MLX5_MODI_OUT_IP_DSCP};
1572                 if (mask)
1573                         mask[idx] = 0x3f >> (6 - width);
1574                 break;
1575         case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1576                 info[idx] = (struct field_modify_info){1, 0,
1577                                         MLX5_MODI_OUT_IPV6_HOPLIMIT};
1578                 if (mask)
1579                         mask[idx] = 0xff >> (8 - width);
1580                 break;
1581         case RTE_FLOW_FIELD_IPV6_SRC:
1582                 if (mask) {
1583                         if (data->offset < 32) {
1584                                 info[idx] = (struct field_modify_info){4, 12,
1585                                                 MLX5_MODI_OUT_SIPV6_31_0};
1586                                 if (width < 32) {
1587                                         mask[idx] =
1588                                                 rte_cpu_to_be_32(0xffffffff >>
1589                                                                  (32 - width));
1590                                         width = 0;
1591                                 } else {
1592                                         mask[idx] = RTE_BE32(0xffffffff);
1593                                         width -= 32;
1594                                 }
1595                                 if (!width)
1596                                         break;
1597                                 ++idx;
1598                         }
1599                         if (data->offset < 64) {
1600                                 info[idx] = (struct field_modify_info){4, 8,
1601                                                 MLX5_MODI_OUT_SIPV6_63_32};
1602                                 if (width < 32) {
1603                                         mask[idx] =
1604                                                 rte_cpu_to_be_32(0xffffffff >>
1605                                                                  (32 - width));
1606                                         width = 0;
1607                                 } else {
1608                                         mask[idx] = RTE_BE32(0xffffffff);
1609                                         width -= 32;
1610                                 }
1611                                 if (!width)
1612                                         break;
1613                                 ++idx;
1614                         }
1615                         if (data->offset < 96) {
1616                                 info[idx] = (struct field_modify_info){4, 4,
1617                                                 MLX5_MODI_OUT_SIPV6_95_64};
1618                                 if (width < 32) {
1619                                         mask[idx] =
1620                                                 rte_cpu_to_be_32(0xffffffff >>
1621                                                                  (32 - width));
1622                                         width = 0;
1623                                 } else {
1624                                         mask[idx] = RTE_BE32(0xffffffff);
1625                                         width -= 32;
1626                                 }
1627                                 if (!width)
1628                                         break;
1629                                 ++idx;
1630                         }
1631                         info[idx] = (struct field_modify_info){4, 0,
1632                                                 MLX5_MODI_OUT_SIPV6_127_96};
1633                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1634                                                      (32 - width));
1635                 } else {
1636                         if (data->offset < 32)
1637                                 info[idx++] = (struct field_modify_info){4, 12,
1638                                                 MLX5_MODI_OUT_SIPV6_31_0};
1639                         if (data->offset < 64)
1640                                 info[idx++] = (struct field_modify_info){4, 8,
1641                                                 MLX5_MODI_OUT_SIPV6_63_32};
1642                         if (data->offset < 96)
1643                                 info[idx++] = (struct field_modify_info){4, 4,
1644                                                 MLX5_MODI_OUT_SIPV6_95_64};
1645                         if (data->offset < 128)
1646                                 info[idx++] = (struct field_modify_info){4, 0,
1647                                                 MLX5_MODI_OUT_SIPV6_127_96};
1648                 }
1649                 break;
1650         case RTE_FLOW_FIELD_IPV6_DST:
1651                 if (mask) {
1652                         if (data->offset < 32) {
1653                                 info[idx] = (struct field_modify_info){4, 12,
1654                                                 MLX5_MODI_OUT_DIPV6_31_0};
1655                                 if (width < 32) {
1656                                         mask[idx] =
1657                                                 rte_cpu_to_be_32(0xffffffff >>
1658                                                                  (32 - width));
1659                                         width = 0;
1660                                 } else {
1661                                         mask[idx] = RTE_BE32(0xffffffff);
1662                                         width -= 32;
1663                                 }
1664                                 if (!width)
1665                                         break;
1666                                 ++idx;
1667                         }
1668                         if (data->offset < 64) {
1669                                 info[idx] = (struct field_modify_info){4, 8,
1670                                                 MLX5_MODI_OUT_DIPV6_63_32};
1671                                 if (width < 32) {
1672                                         mask[idx] =
1673                                                 rte_cpu_to_be_32(0xffffffff >>
1674                                                                  (32 - width));
1675                                         width = 0;
1676                                 } else {
1677                                         mask[idx] = RTE_BE32(0xffffffff);
1678                                         width -= 32;
1679                                 }
1680                                 if (!width)
1681                                         break;
1682                                 ++idx;
1683                         }
1684                         if (data->offset < 96) {
1685                                 info[idx] = (struct field_modify_info){4, 4,
1686                                                 MLX5_MODI_OUT_DIPV6_95_64};
1687                                 if (width < 32) {
1688                                         mask[idx] =
1689                                                 rte_cpu_to_be_32(0xffffffff >>
1690                                                                  (32 - width));
1691                                         width = 0;
1692                                 } else {
1693                                         mask[idx] = RTE_BE32(0xffffffff);
1694                                         width -= 32;
1695                                 }
1696                                 if (!width)
1697                                         break;
1698                                 ++idx;
1699                         }
1700                         info[idx] = (struct field_modify_info){4, 0,
1701                                                 MLX5_MODI_OUT_DIPV6_127_96};
1702                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1703                                                      (32 - width));
1704                 } else {
1705                         if (data->offset < 32)
1706                                 info[idx++] = (struct field_modify_info){4, 12,
1707                                                 MLX5_MODI_OUT_DIPV6_31_0};
1708                         if (data->offset < 64)
1709                                 info[idx++] = (struct field_modify_info){4, 8,
1710                                                 MLX5_MODI_OUT_DIPV6_63_32};
1711                         if (data->offset < 96)
1712                                 info[idx++] = (struct field_modify_info){4, 4,
1713                                                 MLX5_MODI_OUT_DIPV6_95_64};
1714                         if (data->offset < 128)
1715                                 info[idx++] = (struct field_modify_info){4, 0,
1716                                                 MLX5_MODI_OUT_DIPV6_127_96};
1717                 }
1718                 break;
1719         case RTE_FLOW_FIELD_TCP_PORT_SRC:
1720                 info[idx] = (struct field_modify_info){2, 0,
1721                                         MLX5_MODI_OUT_TCP_SPORT};
1722                 if (mask)
1723                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1724                 break;
1725         case RTE_FLOW_FIELD_TCP_PORT_DST:
1726                 info[idx] = (struct field_modify_info){2, 0,
1727                                         MLX5_MODI_OUT_TCP_DPORT};
1728                 if (mask)
1729                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1730                 break;
1731         case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1732                 info[idx] = (struct field_modify_info){4, 0,
1733                                         MLX5_MODI_OUT_TCP_SEQ_NUM};
1734                 if (mask)
1735                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1736                                                      (32 - width));
1737                 break;
1738         case RTE_FLOW_FIELD_TCP_ACK_NUM:
1739                 info[idx] = (struct field_modify_info){4, 0,
1740                                         MLX5_MODI_OUT_TCP_ACK_NUM};
1741                 if (mask)
1742                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1743                                                      (32 - width));
1744                 break;
1745         case RTE_FLOW_FIELD_TCP_FLAGS:
1746                 info[idx] = (struct field_modify_info){2, 0,
1747                                         MLX5_MODI_OUT_TCP_FLAGS};
1748                 if (mask)
1749                         mask[idx] = rte_cpu_to_be_16(0x1ff >> (9 - width));
1750                 break;
1751         case RTE_FLOW_FIELD_UDP_PORT_SRC:
1752                 info[idx] = (struct field_modify_info){2, 0,
1753                                         MLX5_MODI_OUT_UDP_SPORT};
1754                 if (mask)
1755                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1756                 break;
1757         case RTE_FLOW_FIELD_UDP_PORT_DST:
1758                 info[idx] = (struct field_modify_info){2, 0,
1759                                         MLX5_MODI_OUT_UDP_DPORT};
1760                 if (mask)
1761                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1762                 break;
1763         case RTE_FLOW_FIELD_VXLAN_VNI:
1764                 /* not supported yet */
1765                 break;
1766         case RTE_FLOW_FIELD_GENEVE_VNI:
1767                 /* not supported yet*/
1768                 break;
1769         case RTE_FLOW_FIELD_GTP_TEID:
1770                 info[idx] = (struct field_modify_info){4, 0,
1771                                         MLX5_MODI_GTP_TEID};
1772                 if (mask)
1773                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1774                                                      (32 - width));
1775                 break;
1776         case RTE_FLOW_FIELD_TAG:
1777                 {
1778                         int reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG,
1779                                                    data->level, error);
1780                         if (reg < 0)
1781                                 return;
1782                         MLX5_ASSERT(reg != REG_NON);
1783                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1784                         info[idx] = (struct field_modify_info){4, 0,
1785                                                 reg_to_field[reg]};
1786                         if (mask)
1787                                 mask[idx] =
1788                                         rte_cpu_to_be_32(0xffffffff >>
1789                                                          (32 - width));
1790                 }
1791                 break;
1792         case RTE_FLOW_FIELD_MARK:
1793                 {
1794                         uint32_t mark_mask = priv->sh->dv_mark_mask;
1795                         uint32_t mark_count = __builtin_popcount(mark_mask);
1796                         int reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK,
1797                                                        0, error);
1798                         if (reg < 0)
1799                                 return;
1800                         MLX5_ASSERT(reg != REG_NON);
1801                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1802                         info[idx] = (struct field_modify_info){4, 0,
1803                                                 reg_to_field[reg]};
1804                         if (mask)
1805                                 mask[idx] = rte_cpu_to_be_32((mark_mask >>
1806                                          (mark_count - width)) & mark_mask);
1807                 }
1808                 break;
1809         case RTE_FLOW_FIELD_META:
1810                 {
1811                         uint32_t meta_mask = priv->sh->dv_meta_mask;
1812                         uint32_t meta_count = __builtin_popcount(meta_mask);
1813                         uint32_t msk_c0 =
1814                                 rte_cpu_to_be_32(priv->sh->dv_regc0_mask);
1815                         uint32_t shl_c0 = rte_bsf32(msk_c0);
1816                         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1817                         if (reg < 0)
1818                                 return;
1819                         MLX5_ASSERT(reg != REG_NON);
1820                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1821                         if (reg == REG_C_0)
1822                                 *shift = shl_c0;
1823                         info[idx] = (struct field_modify_info){4, 0,
1824                                                 reg_to_field[reg]};
1825                         if (mask)
1826                                 mask[idx] = rte_cpu_to_be_32((meta_mask >>
1827                                         (meta_count - width)) & meta_mask);
1828                 }
1829                 break;
1830         case RTE_FLOW_FIELD_POINTER:
1831         case RTE_FLOW_FIELD_VALUE:
1832         default:
1833                 MLX5_ASSERT(false);
1834                 break;
1835         }
1836 }
1837
1838 /**
1839  * Convert modify_field action to DV specification.
1840  *
1841  * @param[in] dev
1842  *   Pointer to the rte_eth_dev structure.
1843  * @param[in,out] resource
1844  *   Pointer to the modify-header resource.
1845  * @param[in] action
1846  *   Pointer to action specification.
1847  * @param[in] attr
1848  *   Attributes of flow that includes this item.
1849  * @param[out] error
1850  *   Pointer to the error structure.
1851  *
1852  * @return
1853  *   0 on success, a negative errno value otherwise and rte_errno is set.
1854  */
1855 static int
1856 flow_dv_convert_action_modify_field
1857                         (struct rte_eth_dev *dev,
1858                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1859                          const struct rte_flow_action *action,
1860                          const struct rte_flow_attr *attr,
1861                          struct rte_flow_error *error)
1862 {
1863         const struct rte_flow_action_modify_field *conf =
1864                 (const struct rte_flow_action_modify_field *)(action->conf);
1865         struct rte_flow_item item = {
1866                 .spec = NULL,
1867                 .mask = NULL
1868         };
1869         struct field_modify_info field[MLX5_ACT_MAX_MOD_FIELDS] = {
1870                                                                 {0, 0, 0} };
1871         struct field_modify_info dcopy[MLX5_ACT_MAX_MOD_FIELDS] = {
1872                                                                 {0, 0, 0} };
1873         uint32_t mask[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1874         uint32_t type;
1875         uint32_t shift = 0;
1876
1877         if (conf->src.field == RTE_FLOW_FIELD_POINTER ||
1878             conf->src.field == RTE_FLOW_FIELD_VALUE) {
1879                 type = MLX5_MODIFICATION_TYPE_SET;
1880                 /** For SET fill the destination field (field) first. */
1881                 mlx5_flow_field_id_to_modify_info(&conf->dst, field, mask,
1882                                                   conf->width, &shift, dev,
1883                                                   attr, error);
1884                 item.spec = conf->src.field == RTE_FLOW_FIELD_POINTER ?
1885                                         (void *)(uintptr_t)conf->src.pvalue :
1886                                         (void *)(uintptr_t)&conf->src.value;
1887         } else {
1888                 type = MLX5_MODIFICATION_TYPE_COPY;
1889                 /** For COPY fill the destination field (dcopy) without mask. */
1890                 mlx5_flow_field_id_to_modify_info(&conf->dst, dcopy, NULL,
1891                                                   conf->width, &shift, dev,
1892                                                   attr, error);
1893                 /** Then construct the source field (field) with mask. */
1894                 mlx5_flow_field_id_to_modify_info(&conf->src, field, mask,
1895                                                   conf->width, &shift,
1896                                                   dev, attr, error);
1897         }
1898         item.mask = &mask;
1899         return flow_dv_convert_modify_action(&item,
1900                         field, dcopy, resource, type, error);
1901 }
1902
1903 /**
1904  * Validate MARK item.
1905  *
1906  * @param[in] dev
1907  *   Pointer to the rte_eth_dev structure.
1908  * @param[in] item
1909  *   Item specification.
1910  * @param[in] attr
1911  *   Attributes of flow that includes this item.
1912  * @param[out] error
1913  *   Pointer to error structure.
1914  *
1915  * @return
1916  *   0 on success, a negative errno value otherwise and rte_errno is set.
1917  */
1918 static int
1919 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1920                            const struct rte_flow_item *item,
1921                            const struct rte_flow_attr *attr __rte_unused,
1922                            struct rte_flow_error *error)
1923 {
1924         struct mlx5_priv *priv = dev->data->dev_private;
1925         struct mlx5_dev_config *config = &priv->config;
1926         const struct rte_flow_item_mark *spec = item->spec;
1927         const struct rte_flow_item_mark *mask = item->mask;
1928         const struct rte_flow_item_mark nic_mask = {
1929                 .id = priv->sh->dv_mark_mask,
1930         };
1931         int ret;
1932
1933         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1934                 return rte_flow_error_set(error, ENOTSUP,
1935                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1936                                           "extended metadata feature"
1937                                           " isn't enabled");
1938         if (!mlx5_flow_ext_mreg_supported(dev))
1939                 return rte_flow_error_set(error, ENOTSUP,
1940                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1941                                           "extended metadata register"
1942                                           " isn't supported");
1943         if (!nic_mask.id)
1944                 return rte_flow_error_set(error, ENOTSUP,
1945                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1946                                           "extended metadata register"
1947                                           " isn't available");
1948         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1949         if (ret < 0)
1950                 return ret;
1951         if (!spec)
1952                 return rte_flow_error_set(error, EINVAL,
1953                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1954                                           item->spec,
1955                                           "data cannot be empty");
1956         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1957                 return rte_flow_error_set(error, EINVAL,
1958                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1959                                           &spec->id,
1960                                           "mark id exceeds the limit");
1961         if (!mask)
1962                 mask = &nic_mask;
1963         if (!mask->id)
1964                 return rte_flow_error_set(error, EINVAL,
1965                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1966                                         "mask cannot be zero");
1967
1968         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1969                                         (const uint8_t *)&nic_mask,
1970                                         sizeof(struct rte_flow_item_mark),
1971                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1972         if (ret < 0)
1973                 return ret;
1974         return 0;
1975 }
1976
1977 /**
1978  * Validate META item.
1979  *
1980  * @param[in] dev
1981  *   Pointer to the rte_eth_dev structure.
1982  * @param[in] item
1983  *   Item specification.
1984  * @param[in] attr
1985  *   Attributes of flow that includes this item.
1986  * @param[out] error
1987  *   Pointer to error structure.
1988  *
1989  * @return
1990  *   0 on success, a negative errno value otherwise and rte_errno is set.
1991  */
1992 static int
1993 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1994                            const struct rte_flow_item *item,
1995                            const struct rte_flow_attr *attr,
1996                            struct rte_flow_error *error)
1997 {
1998         struct mlx5_priv *priv = dev->data->dev_private;
1999         struct mlx5_dev_config *config = &priv->config;
2000         const struct rte_flow_item_meta *spec = item->spec;
2001         const struct rte_flow_item_meta *mask = item->mask;
2002         struct rte_flow_item_meta nic_mask = {
2003                 .data = UINT32_MAX
2004         };
2005         int reg;
2006         int ret;
2007
2008         if (!spec)
2009                 return rte_flow_error_set(error, EINVAL,
2010                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2011                                           item->spec,
2012                                           "data cannot be empty");
2013         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2014                 if (!mlx5_flow_ext_mreg_supported(dev))
2015                         return rte_flow_error_set(error, ENOTSUP,
2016                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2017                                           "extended metadata register"
2018                                           " isn't supported");
2019                 reg = flow_dv_get_metadata_reg(dev, attr, error);
2020                 if (reg < 0)
2021                         return reg;
2022                 if (reg == REG_NON)
2023                         return rte_flow_error_set(error, ENOTSUP,
2024                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2025                                         "unavalable extended metadata register");
2026                 if (reg == REG_B)
2027                         return rte_flow_error_set(error, ENOTSUP,
2028                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2029                                           "match on reg_b "
2030                                           "isn't supported");
2031                 if (reg != REG_A)
2032                         nic_mask.data = priv->sh->dv_meta_mask;
2033         } else {
2034                 if (attr->transfer)
2035                         return rte_flow_error_set(error, ENOTSUP,
2036                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2037                                         "extended metadata feature "
2038                                         "should be enabled when "
2039                                         "meta item is requested "
2040                                         "with e-switch mode ");
2041                 if (attr->ingress)
2042                         return rte_flow_error_set(error, ENOTSUP,
2043                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2044                                         "match on metadata for ingress "
2045                                         "is not supported in legacy "
2046                                         "metadata mode");
2047         }
2048         if (!mask)
2049                 mask = &rte_flow_item_meta_mask;
2050         if (!mask->data)
2051                 return rte_flow_error_set(error, EINVAL,
2052                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2053                                         "mask cannot be zero");
2054
2055         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2056                                         (const uint8_t *)&nic_mask,
2057                                         sizeof(struct rte_flow_item_meta),
2058                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2059         return ret;
2060 }
2061
2062 /**
2063  * Validate TAG item.
2064  *
2065  * @param[in] dev
2066  *   Pointer to the rte_eth_dev structure.
2067  * @param[in] item
2068  *   Item specification.
2069  * @param[in] attr
2070  *   Attributes of flow that includes this item.
2071  * @param[out] error
2072  *   Pointer to error structure.
2073  *
2074  * @return
2075  *   0 on success, a negative errno value otherwise and rte_errno is set.
2076  */
2077 static int
2078 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
2079                           const struct rte_flow_item *item,
2080                           const struct rte_flow_attr *attr __rte_unused,
2081                           struct rte_flow_error *error)
2082 {
2083         const struct rte_flow_item_tag *spec = item->spec;
2084         const struct rte_flow_item_tag *mask = item->mask;
2085         const struct rte_flow_item_tag nic_mask = {
2086                 .data = RTE_BE32(UINT32_MAX),
2087                 .index = 0xff,
2088         };
2089         int ret;
2090
2091         if (!mlx5_flow_ext_mreg_supported(dev))
2092                 return rte_flow_error_set(error, ENOTSUP,
2093                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2094                                           "extensive metadata register"
2095                                           " isn't supported");
2096         if (!spec)
2097                 return rte_flow_error_set(error, EINVAL,
2098                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2099                                           item->spec,
2100                                           "data cannot be empty");
2101         if (!mask)
2102                 mask = &rte_flow_item_tag_mask;
2103         if (!mask->data)
2104                 return rte_flow_error_set(error, EINVAL,
2105                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2106                                         "mask cannot be zero");
2107
2108         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2109                                         (const uint8_t *)&nic_mask,
2110                                         sizeof(struct rte_flow_item_tag),
2111                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2112         if (ret < 0)
2113                 return ret;
2114         if (mask->index != 0xff)
2115                 return rte_flow_error_set(error, EINVAL,
2116                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2117                                           "partial mask for tag index"
2118                                           " is not supported");
2119         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
2120         if (ret < 0)
2121                 return ret;
2122         MLX5_ASSERT(ret != REG_NON);
2123         return 0;
2124 }
2125
2126 /**
2127  * Validate vport item.
2128  *
2129  * @param[in] dev
2130  *   Pointer to the rte_eth_dev structure.
2131  * @param[in] item
2132  *   Item specification.
2133  * @param[in] attr
2134  *   Attributes of flow that includes this item.
2135  * @param[in] item_flags
2136  *   Bit-fields that holds the items detected until now.
2137  * @param[out] error
2138  *   Pointer to error structure.
2139  *
2140  * @return
2141  *   0 on success, a negative errno value otherwise and rte_errno is set.
2142  */
2143 static int
2144 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
2145                               const struct rte_flow_item *item,
2146                               const struct rte_flow_attr *attr,
2147                               uint64_t item_flags,
2148                               struct rte_flow_error *error)
2149 {
2150         const struct rte_flow_item_port_id *spec = item->spec;
2151         const struct rte_flow_item_port_id *mask = item->mask;
2152         const struct rte_flow_item_port_id switch_mask = {
2153                         .id = 0xffffffff,
2154         };
2155         struct mlx5_priv *esw_priv;
2156         struct mlx5_priv *dev_priv;
2157         int ret;
2158
2159         if (!attr->transfer)
2160                 return rte_flow_error_set(error, EINVAL,
2161                                           RTE_FLOW_ERROR_TYPE_ITEM,
2162                                           NULL,
2163                                           "match on port id is valid only"
2164                                           " when transfer flag is enabled");
2165         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
2166                 return rte_flow_error_set(error, ENOTSUP,
2167                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2168                                           "multiple source ports are not"
2169                                           " supported");
2170         if (!mask)
2171                 mask = &switch_mask;
2172         if (mask->id != 0xffffffff)
2173                 return rte_flow_error_set(error, ENOTSUP,
2174                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2175                                            mask,
2176                                            "no support for partial mask on"
2177                                            " \"id\" field");
2178         ret = mlx5_flow_item_acceptable
2179                                 (item, (const uint8_t *)mask,
2180                                  (const uint8_t *)&rte_flow_item_port_id_mask,
2181                                  sizeof(struct rte_flow_item_port_id),
2182                                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2183         if (ret)
2184                 return ret;
2185         if (!spec)
2186                 return 0;
2187         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
2188         if (!esw_priv)
2189                 return rte_flow_error_set(error, rte_errno,
2190                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2191                                           "failed to obtain E-Switch info for"
2192                                           " port");
2193         dev_priv = mlx5_dev_to_eswitch_info(dev);
2194         if (!dev_priv)
2195                 return rte_flow_error_set(error, rte_errno,
2196                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2197                                           NULL,
2198                                           "failed to obtain E-Switch info");
2199         if (esw_priv->domain_id != dev_priv->domain_id)
2200                 return rte_flow_error_set(error, EINVAL,
2201                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2202                                           "cannot match on a port from a"
2203                                           " different E-Switch");
2204         return 0;
2205 }
2206
2207 /**
2208  * Validate VLAN item.
2209  *
2210  * @param[in] item
2211  *   Item specification.
2212  * @param[in] item_flags
2213  *   Bit-fields that holds the items detected until now.
2214  * @param[in] dev
2215  *   Ethernet device flow is being created on.
2216  * @param[out] error
2217  *   Pointer to error structure.
2218  *
2219  * @return
2220  *   0 on success, a negative errno value otherwise and rte_errno is set.
2221  */
2222 static int
2223 flow_dv_validate_item_vlan(const struct rte_flow_item *item,
2224                            uint64_t item_flags,
2225                            struct rte_eth_dev *dev,
2226                            struct rte_flow_error *error)
2227 {
2228         const struct rte_flow_item_vlan *mask = item->mask;
2229         const struct rte_flow_item_vlan nic_mask = {
2230                 .tci = RTE_BE16(UINT16_MAX),
2231                 .inner_type = RTE_BE16(UINT16_MAX),
2232                 .has_more_vlan = 1,
2233         };
2234         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2235         int ret;
2236         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2237                                         MLX5_FLOW_LAYER_INNER_L4) :
2238                                        (MLX5_FLOW_LAYER_OUTER_L3 |
2239                                         MLX5_FLOW_LAYER_OUTER_L4);
2240         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2241                                         MLX5_FLOW_LAYER_OUTER_VLAN;
2242
2243         if (item_flags & vlanm)
2244                 return rte_flow_error_set(error, EINVAL,
2245                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2246                                           "multiple VLAN layers not supported");
2247         else if ((item_flags & l34m) != 0)
2248                 return rte_flow_error_set(error, EINVAL,
2249                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2250                                           "VLAN cannot follow L3/L4 layer");
2251         if (!mask)
2252                 mask = &rte_flow_item_vlan_mask;
2253         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2254                                         (const uint8_t *)&nic_mask,
2255                                         sizeof(struct rte_flow_item_vlan),
2256                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2257         if (ret)
2258                 return ret;
2259         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2260                 struct mlx5_priv *priv = dev->data->dev_private;
2261
2262                 if (priv->vmwa_context) {
2263                         /*
2264                          * Non-NULL context means we have a virtual machine
2265                          * and SR-IOV enabled, we have to create VLAN interface
2266                          * to make hypervisor to setup E-Switch vport
2267                          * context correctly. We avoid creating the multiple
2268                          * VLAN interfaces, so we cannot support VLAN tag mask.
2269                          */
2270                         return rte_flow_error_set(error, EINVAL,
2271                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2272                                                   item,
2273                                                   "VLAN tag mask is not"
2274                                                   " supported in virtual"
2275                                                   " environment");
2276                 }
2277         }
2278         return 0;
2279 }
2280
2281 /*
2282  * GTP flags are contained in 1 byte of the format:
2283  * -------------------------------------------
2284  * | bit   | 0 - 2   | 3  | 4   | 5 | 6 | 7  |
2285  * |-----------------------------------------|
2286  * | value | Version | PT | Res | E | S | PN |
2287  * -------------------------------------------
2288  *
2289  * Matching is supported only for GTP flags E, S, PN.
2290  */
2291 #define MLX5_GTP_FLAGS_MASK     0x07
2292
2293 /**
2294  * Validate GTP item.
2295  *
2296  * @param[in] dev
2297  *   Pointer to the rte_eth_dev structure.
2298  * @param[in] item
2299  *   Item specification.
2300  * @param[in] item_flags
2301  *   Bit-fields that holds the items detected until now.
2302  * @param[out] error
2303  *   Pointer to error structure.
2304  *
2305  * @return
2306  *   0 on success, a negative errno value otherwise and rte_errno is set.
2307  */
2308 static int
2309 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
2310                           const struct rte_flow_item *item,
2311                           uint64_t item_flags,
2312                           struct rte_flow_error *error)
2313 {
2314         struct mlx5_priv *priv = dev->data->dev_private;
2315         const struct rte_flow_item_gtp *spec = item->spec;
2316         const struct rte_flow_item_gtp *mask = item->mask;
2317         const struct rte_flow_item_gtp nic_mask = {
2318                 .v_pt_rsv_flags = MLX5_GTP_FLAGS_MASK,
2319                 .msg_type = 0xff,
2320                 .teid = RTE_BE32(0xffffffff),
2321         };
2322
2323         if (!priv->config.hca_attr.tunnel_stateless_gtp)
2324                 return rte_flow_error_set(error, ENOTSUP,
2325                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2326                                           "GTP support is not enabled");
2327         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2328                 return rte_flow_error_set(error, ENOTSUP,
2329                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2330                                           "multiple tunnel layers not"
2331                                           " supported");
2332         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2333                 return rte_flow_error_set(error, EINVAL,
2334                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2335                                           "no outer UDP layer found");
2336         if (!mask)
2337                 mask = &rte_flow_item_gtp_mask;
2338         if (spec && spec->v_pt_rsv_flags & ~MLX5_GTP_FLAGS_MASK)
2339                 return rte_flow_error_set(error, ENOTSUP,
2340                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2341                                           "Match is supported for GTP"
2342                                           " flags only");
2343         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2344                                          (const uint8_t *)&nic_mask,
2345                                          sizeof(struct rte_flow_item_gtp),
2346                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2347 }
2348
2349 /**
2350  * Validate GTP PSC item.
2351  *
2352  * @param[in] item
2353  *   Item specification.
2354  * @param[in] last_item
2355  *   Previous validated item in the pattern items.
2356  * @param[in] gtp_item
2357  *   Previous GTP item specification.
2358  * @param[in] attr
2359  *   Pointer to flow attributes.
2360  * @param[out] error
2361  *   Pointer to error structure.
2362  *
2363  * @return
2364  *   0 on success, a negative errno value otherwise and rte_errno is set.
2365  */
2366 static int
2367 flow_dv_validate_item_gtp_psc(const struct rte_flow_item *item,
2368                               uint64_t last_item,
2369                               const struct rte_flow_item *gtp_item,
2370                               const struct rte_flow_attr *attr,
2371                               struct rte_flow_error *error)
2372 {
2373         const struct rte_flow_item_gtp *gtp_spec;
2374         const struct rte_flow_item_gtp *gtp_mask;
2375         const struct rte_flow_item_gtp_psc *mask;
2376         const struct rte_flow_item_gtp_psc nic_mask = {
2377                 .hdr.type = 0xF,
2378                 .hdr.qfi = 0x3F,
2379         };
2380
2381         if (!gtp_item || !(last_item & MLX5_FLOW_LAYER_GTP))
2382                 return rte_flow_error_set
2383                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2384                          "GTP PSC item must be preceded with GTP item");
2385         gtp_spec = gtp_item->spec;
2386         gtp_mask = gtp_item->mask ? gtp_item->mask : &rte_flow_item_gtp_mask;
2387         /* GTP spec and E flag is requested to match zero. */
2388         if (gtp_spec &&
2389                 (gtp_mask->v_pt_rsv_flags &
2390                 ~gtp_spec->v_pt_rsv_flags & MLX5_GTP_EXT_HEADER_FLAG))
2391                 return rte_flow_error_set
2392                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2393                          "GTP E flag must be 1 to match GTP PSC");
2394         /* Check the flow is not created in group zero. */
2395         if (!attr->transfer && !attr->group)
2396                 return rte_flow_error_set
2397                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2398                          "GTP PSC is not supported for group 0");
2399         /* GTP spec is here and E flag is requested to match zero. */
2400         if (!item->spec)
2401                 return 0;
2402         mask = item->mask ? item->mask : &rte_flow_item_gtp_psc_mask;
2403         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2404                                          (const uint8_t *)&nic_mask,
2405                                          sizeof(struct rte_flow_item_gtp_psc),
2406                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2407 }
2408
2409 /**
2410  * Validate IPV4 item.
2411  * Use existing validation function mlx5_flow_validate_item_ipv4(), and
2412  * add specific validation of fragment_offset field,
2413  *
2414  * @param[in] item
2415  *   Item specification.
2416  * @param[in] item_flags
2417  *   Bit-fields that holds the items detected until now.
2418  * @param[out] error
2419  *   Pointer to error structure.
2420  *
2421  * @return
2422  *   0 on success, a negative errno value otherwise and rte_errno is set.
2423  */
2424 static int
2425 flow_dv_validate_item_ipv4(struct rte_eth_dev *dev,
2426                            const struct rte_flow_item *item,
2427                            uint64_t item_flags, uint64_t last_item,
2428                            uint16_t ether_type, struct rte_flow_error *error)
2429 {
2430         int ret;
2431         struct mlx5_priv *priv = dev->data->dev_private;
2432         const struct rte_flow_item_ipv4 *spec = item->spec;
2433         const struct rte_flow_item_ipv4 *last = item->last;
2434         const struct rte_flow_item_ipv4 *mask = item->mask;
2435         rte_be16_t fragment_offset_spec = 0;
2436         rte_be16_t fragment_offset_last = 0;
2437         struct rte_flow_item_ipv4 nic_ipv4_mask = {
2438                 .hdr = {
2439                         .src_addr = RTE_BE32(0xffffffff),
2440                         .dst_addr = RTE_BE32(0xffffffff),
2441                         .type_of_service = 0xff,
2442                         .fragment_offset = RTE_BE16(0xffff),
2443                         .next_proto_id = 0xff,
2444                         .time_to_live = 0xff,
2445                 },
2446         };
2447
2448         if (mask && (mask->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK)) {
2449                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2450                 bool ihl_cap = !tunnel ? priv->config.hca_attr.outer_ipv4_ihl :
2451                                priv->config.hca_attr.inner_ipv4_ihl;
2452                 if (!ihl_cap)
2453                         return rte_flow_error_set(error, ENOTSUP,
2454                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2455                                                   item,
2456                                                   "IPV4 ihl offload not supported");
2457                 nic_ipv4_mask.hdr.version_ihl = mask->hdr.version_ihl;
2458         }
2459         ret = mlx5_flow_validate_item_ipv4(item, item_flags, last_item,
2460                                            ether_type, &nic_ipv4_mask,
2461                                            MLX5_ITEM_RANGE_ACCEPTED, error);
2462         if (ret < 0)
2463                 return ret;
2464         if (spec && mask)
2465                 fragment_offset_spec = spec->hdr.fragment_offset &
2466                                        mask->hdr.fragment_offset;
2467         if (!fragment_offset_spec)
2468                 return 0;
2469         /*
2470          * spec and mask are valid, enforce using full mask to make sure the
2471          * complete value is used correctly.
2472          */
2473         if ((mask->hdr.fragment_offset & RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2474                         != RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2475                 return rte_flow_error_set(error, EINVAL,
2476                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2477                                           item, "must use full mask for"
2478                                           " fragment_offset");
2479         /*
2480          * Match on fragment_offset 0x2000 means MF is 1 and frag-offset is 0,
2481          * indicating this is 1st fragment of fragmented packet.
2482          * This is not yet supported in MLX5, return appropriate error message.
2483          */
2484         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG))
2485                 return rte_flow_error_set(error, ENOTSUP,
2486                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2487                                           "match on first fragment not "
2488                                           "supported");
2489         if (fragment_offset_spec && !last)
2490                 return rte_flow_error_set(error, ENOTSUP,
2491                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2492                                           "specified value not supported");
2493         /* spec and last are valid, validate the specified range. */
2494         fragment_offset_last = last->hdr.fragment_offset &
2495                                mask->hdr.fragment_offset;
2496         /*
2497          * Match on fragment_offset spec 0x2001 and last 0x3fff
2498          * means MF is 1 and frag-offset is > 0.
2499          * This packet is fragment 2nd and onward, excluding last.
2500          * This is not yet supported in MLX5, return appropriate
2501          * error message.
2502          */
2503         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG + 1) &&
2504             fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2505                 return rte_flow_error_set(error, ENOTSUP,
2506                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2507                                           last, "match on following "
2508                                           "fragments not supported");
2509         /*
2510          * Match on fragment_offset spec 0x0001 and last 0x1fff
2511          * means MF is 0 and frag-offset is > 0.
2512          * This packet is last fragment of fragmented packet.
2513          * This is not yet supported in MLX5, return appropriate
2514          * error message.
2515          */
2516         if (fragment_offset_spec == RTE_BE16(1) &&
2517             fragment_offset_last == RTE_BE16(RTE_IPV4_HDR_OFFSET_MASK))
2518                 return rte_flow_error_set(error, ENOTSUP,
2519                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2520                                           last, "match on last "
2521                                           "fragment not supported");
2522         /*
2523          * Match on fragment_offset spec 0x0001 and last 0x3fff
2524          * means MF and/or frag-offset is not 0.
2525          * This is a fragmented packet.
2526          * Other range values are invalid and rejected.
2527          */
2528         if (!(fragment_offset_spec == RTE_BE16(1) &&
2529               fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK)))
2530                 return rte_flow_error_set(error, ENOTSUP,
2531                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2532                                           "specified range not supported");
2533         return 0;
2534 }
2535
2536 /**
2537  * Validate IPV6 fragment extension item.
2538  *
2539  * @param[in] item
2540  *   Item specification.
2541  * @param[in] item_flags
2542  *   Bit-fields that holds the items detected until now.
2543  * @param[out] error
2544  *   Pointer to error structure.
2545  *
2546  * @return
2547  *   0 on success, a negative errno value otherwise and rte_errno is set.
2548  */
2549 static int
2550 flow_dv_validate_item_ipv6_frag_ext(const struct rte_flow_item *item,
2551                                     uint64_t item_flags,
2552                                     struct rte_flow_error *error)
2553 {
2554         const struct rte_flow_item_ipv6_frag_ext *spec = item->spec;
2555         const struct rte_flow_item_ipv6_frag_ext *last = item->last;
2556         const struct rte_flow_item_ipv6_frag_ext *mask = item->mask;
2557         rte_be16_t frag_data_spec = 0;
2558         rte_be16_t frag_data_last = 0;
2559         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2560         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2561                                       MLX5_FLOW_LAYER_OUTER_L4;
2562         int ret = 0;
2563         struct rte_flow_item_ipv6_frag_ext nic_mask = {
2564                 .hdr = {
2565                         .next_header = 0xff,
2566                         .frag_data = RTE_BE16(0xffff),
2567                 },
2568         };
2569
2570         if (item_flags & l4m)
2571                 return rte_flow_error_set(error, EINVAL,
2572                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2573                                           "ipv6 fragment extension item cannot "
2574                                           "follow L4 item.");
2575         if ((tunnel && !(item_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
2576             (!tunnel && !(item_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV6)))
2577                 return rte_flow_error_set(error, EINVAL,
2578                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2579                                           "ipv6 fragment extension item must "
2580                                           "follow ipv6 item");
2581         if (spec && mask)
2582                 frag_data_spec = spec->hdr.frag_data & mask->hdr.frag_data;
2583         if (!frag_data_spec)
2584                 return 0;
2585         /*
2586          * spec and mask are valid, enforce using full mask to make sure the
2587          * complete value is used correctly.
2588          */
2589         if ((mask->hdr.frag_data & RTE_BE16(RTE_IPV6_FRAG_USED_MASK)) !=
2590                                 RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2591                 return rte_flow_error_set(error, EINVAL,
2592                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2593                                           item, "must use full mask for"
2594                                           " frag_data");
2595         /*
2596          * Match on frag_data 0x00001 means M is 1 and frag-offset is 0.
2597          * This is 1st fragment of fragmented packet.
2598          */
2599         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_MF_MASK))
2600                 return rte_flow_error_set(error, ENOTSUP,
2601                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2602                                           "match on first fragment not "
2603                                           "supported");
2604         if (frag_data_spec && !last)
2605                 return rte_flow_error_set(error, EINVAL,
2606                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2607                                           "specified value not supported");
2608         ret = mlx5_flow_item_acceptable
2609                                 (item, (const uint8_t *)mask,
2610                                  (const uint8_t *)&nic_mask,
2611                                  sizeof(struct rte_flow_item_ipv6_frag_ext),
2612                                  MLX5_ITEM_RANGE_ACCEPTED, error);
2613         if (ret)
2614                 return ret;
2615         /* spec and last are valid, validate the specified range. */
2616         frag_data_last = last->hdr.frag_data & mask->hdr.frag_data;
2617         /*
2618          * Match on frag_data spec 0x0009 and last 0xfff9
2619          * means M is 1 and frag-offset is > 0.
2620          * This packet is fragment 2nd and onward, excluding last.
2621          * This is not yet supported in MLX5, return appropriate
2622          * error message.
2623          */
2624         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN |
2625                                        RTE_IPV6_EHDR_MF_MASK) &&
2626             frag_data_last == RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2627                 return rte_flow_error_set(error, ENOTSUP,
2628                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2629                                           last, "match on following "
2630                                           "fragments not supported");
2631         /*
2632          * Match on frag_data spec 0x0008 and last 0xfff8
2633          * means M is 0 and frag-offset is > 0.
2634          * This packet is last fragment of fragmented packet.
2635          * This is not yet supported in MLX5, return appropriate
2636          * error message.
2637          */
2638         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN) &&
2639             frag_data_last == RTE_BE16(RTE_IPV6_EHDR_FO_MASK))
2640                 return rte_flow_error_set(error, ENOTSUP,
2641                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2642                                           last, "match on last "
2643                                           "fragment not supported");
2644         /* Other range values are invalid and rejected. */
2645         return rte_flow_error_set(error, EINVAL,
2646                                   RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2647                                   "specified range not supported");
2648 }
2649
2650 /*
2651  * Validate ASO CT item.
2652  *
2653  * @param[in] dev
2654  *   Pointer to the rte_eth_dev structure.
2655  * @param[in] item
2656  *   Item specification.
2657  * @param[in] item_flags
2658  *   Pointer to bit-fields that holds the items detected until now.
2659  * @param[out] error
2660  *   Pointer to error structure.
2661  *
2662  * @return
2663  *   0 on success, a negative errno value otherwise and rte_errno is set.
2664  */
2665 static int
2666 flow_dv_validate_item_aso_ct(struct rte_eth_dev *dev,
2667                              const struct rte_flow_item *item,
2668                              uint64_t *item_flags,
2669                              struct rte_flow_error *error)
2670 {
2671         const struct rte_flow_item_conntrack *spec = item->spec;
2672         const struct rte_flow_item_conntrack *mask = item->mask;
2673         RTE_SET_USED(dev);
2674         uint32_t flags;
2675
2676         if (*item_flags & MLX5_FLOW_LAYER_ASO_CT)
2677                 return rte_flow_error_set(error, EINVAL,
2678                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2679                                           "Only one CT is supported");
2680         if (!mask)
2681                 mask = &rte_flow_item_conntrack_mask;
2682         flags = spec->flags & mask->flags;
2683         if ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID) &&
2684             ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID) ||
2685              (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD) ||
2686              (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)))
2687                 return rte_flow_error_set(error, EINVAL,
2688                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2689                                           "Conflict status bits");
2690         /* State change also needs to be considered. */
2691         *item_flags |= MLX5_FLOW_LAYER_ASO_CT;
2692         return 0;
2693 }
2694
2695 /**
2696  * Validate the pop VLAN action.
2697  *
2698  * @param[in] dev
2699  *   Pointer to the rte_eth_dev structure.
2700  * @param[in] action_flags
2701  *   Holds the actions detected until now.
2702  * @param[in] action
2703  *   Pointer to the pop vlan action.
2704  * @param[in] item_flags
2705  *   The items found in this flow rule.
2706  * @param[in] attr
2707  *   Pointer to flow attributes.
2708  * @param[out] error
2709  *   Pointer to error structure.
2710  *
2711  * @return
2712  *   0 on success, a negative errno value otherwise and rte_errno is set.
2713  */
2714 static int
2715 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
2716                                  uint64_t action_flags,
2717                                  const struct rte_flow_action *action,
2718                                  uint64_t item_flags,
2719                                  const struct rte_flow_attr *attr,
2720                                  struct rte_flow_error *error)
2721 {
2722         const struct mlx5_priv *priv = dev->data->dev_private;
2723         struct mlx5_dev_ctx_shared *sh = priv->sh;
2724         bool direction_error = false;
2725
2726         if (!priv->sh->pop_vlan_action)
2727                 return rte_flow_error_set(error, ENOTSUP,
2728                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2729                                           NULL,
2730                                           "pop vlan action is not supported");
2731         /* Pop VLAN is not supported in egress except for CX6 FDB mode. */
2732         if (attr->transfer) {
2733                 bool fdb_tx = priv->representor_id != UINT16_MAX;
2734                 bool is_cx5 = sh->steering_format_version ==
2735                     MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2736
2737                 if (fdb_tx && is_cx5)
2738                         direction_error = true;
2739         } else if (attr->egress) {
2740                 direction_error = true;
2741         }
2742         if (direction_error)
2743                 return rte_flow_error_set(error, ENOTSUP,
2744                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2745                                           NULL,
2746                                           "pop vlan action not supported for egress");
2747         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
2748                 return rte_flow_error_set(error, ENOTSUP,
2749                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2750                                           "no support for multiple VLAN "
2751                                           "actions");
2752         /* Pop VLAN with preceding Decap requires inner header with VLAN. */
2753         if ((action_flags & MLX5_FLOW_ACTION_DECAP) &&
2754             !(item_flags & MLX5_FLOW_LAYER_INNER_VLAN))
2755                 return rte_flow_error_set(error, ENOTSUP,
2756                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2757                                           NULL,
2758                                           "cannot pop vlan after decap without "
2759                                           "match on inner vlan in the flow");
2760         /* Pop VLAN without preceding Decap requires outer header with VLAN. */
2761         if (!(action_flags & MLX5_FLOW_ACTION_DECAP) &&
2762             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2763                 return rte_flow_error_set(error, ENOTSUP,
2764                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2765                                           NULL,
2766                                           "cannot pop vlan without a "
2767                                           "match on (outer) vlan in the flow");
2768         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2769                 return rte_flow_error_set(error, EINVAL,
2770                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2771                                           "wrong action order, port_id should "
2772                                           "be after pop VLAN action");
2773         if (!attr->transfer && priv->representor)
2774                 return rte_flow_error_set(error, ENOTSUP,
2775                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2776                                           "pop vlan action for VF representor "
2777                                           "not supported on NIC table");
2778         return 0;
2779 }
2780
2781 /**
2782  * Get VLAN default info from vlan match info.
2783  *
2784  * @param[in] items
2785  *   the list of item specifications.
2786  * @param[out] vlan
2787  *   pointer VLAN info to fill to.
2788  *
2789  * @return
2790  *   0 on success, a negative errno value otherwise and rte_errno is set.
2791  */
2792 static void
2793 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
2794                                   struct rte_vlan_hdr *vlan)
2795 {
2796         const struct rte_flow_item_vlan nic_mask = {
2797                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
2798                                 MLX5DV_FLOW_VLAN_VID_MASK),
2799                 .inner_type = RTE_BE16(0xffff),
2800         };
2801
2802         if (items == NULL)
2803                 return;
2804         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2805                 int type = items->type;
2806
2807                 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
2808                     type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
2809                         break;
2810         }
2811         if (items->type != RTE_FLOW_ITEM_TYPE_END) {
2812                 const struct rte_flow_item_vlan *vlan_m = items->mask;
2813                 const struct rte_flow_item_vlan *vlan_v = items->spec;
2814
2815                 /* If VLAN item in pattern doesn't contain data, return here. */
2816                 if (!vlan_v)
2817                         return;
2818                 if (!vlan_m)
2819                         vlan_m = &nic_mask;
2820                 /* Only full match values are accepted */
2821                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
2822                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
2823                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
2824                         vlan->vlan_tci |=
2825                                 rte_be_to_cpu_16(vlan_v->tci &
2826                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
2827                 }
2828                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
2829                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
2830                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
2831                         vlan->vlan_tci |=
2832                                 rte_be_to_cpu_16(vlan_v->tci &
2833                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
2834                 }
2835                 if (vlan_m->inner_type == nic_mask.inner_type)
2836                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
2837                                                            vlan_m->inner_type);
2838         }
2839 }
2840
2841 /**
2842  * Validate the push VLAN action.
2843  *
2844  * @param[in] dev
2845  *   Pointer to the rte_eth_dev structure.
2846  * @param[in] action_flags
2847  *   Holds the actions detected until now.
2848  * @param[in] item_flags
2849  *   The items found in this flow rule.
2850  * @param[in] action
2851  *   Pointer to the action structure.
2852  * @param[in] attr
2853  *   Pointer to flow attributes
2854  * @param[out] error
2855  *   Pointer to error structure.
2856  *
2857  * @return
2858  *   0 on success, a negative errno value otherwise and rte_errno is set.
2859  */
2860 static int
2861 flow_dv_validate_action_push_vlan(struct rte_eth_dev *dev,
2862                                   uint64_t action_flags,
2863                                   const struct rte_flow_item_vlan *vlan_m,
2864                                   const struct rte_flow_action *action,
2865                                   const struct rte_flow_attr *attr,
2866                                   struct rte_flow_error *error)
2867 {
2868         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
2869         const struct mlx5_priv *priv = dev->data->dev_private;
2870         struct mlx5_dev_ctx_shared *sh = priv->sh;
2871         bool direction_error = false;
2872
2873         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
2874             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
2875                 return rte_flow_error_set(error, EINVAL,
2876                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2877                                           "invalid vlan ethertype");
2878         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2879                 return rte_flow_error_set(error, EINVAL,
2880                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2881                                           "wrong action order, port_id should "
2882                                           "be after push VLAN");
2883         /* Push VLAN is not supported in ingress except for CX6 FDB mode. */
2884         if (attr->transfer) {
2885                 bool fdb_tx = priv->representor_id != UINT16_MAX;
2886                 bool is_cx5 = sh->steering_format_version ==
2887                     MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2888
2889                 if (!fdb_tx && is_cx5)
2890                         direction_error = true;
2891         } else if (attr->ingress) {
2892                 direction_error = true;
2893         }
2894         if (direction_error)
2895                 return rte_flow_error_set(error, ENOTSUP,
2896                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2897                                           NULL,
2898                                           "push vlan action not supported for ingress");
2899         if (!attr->transfer && priv->representor)
2900                 return rte_flow_error_set(error, ENOTSUP,
2901                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2902                                           "push vlan action for VF representor "
2903                                           "not supported on NIC table");
2904         if (vlan_m &&
2905             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) &&
2906             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) !=
2907                 MLX5DV_FLOW_VLAN_PCP_MASK_BE &&
2908             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP) &&
2909             !(mlx5_flow_find_action
2910                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP)))
2911                 return rte_flow_error_set(error, EINVAL,
2912                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2913                                           "not full match mask on VLAN PCP and "
2914                                           "there is no of_set_vlan_pcp action, "
2915                                           "push VLAN action cannot figure out "
2916                                           "PCP value");
2917         if (vlan_m &&
2918             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) &&
2919             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) !=
2920                 MLX5DV_FLOW_VLAN_VID_MASK_BE &&
2921             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID) &&
2922             !(mlx5_flow_find_action
2923                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID)))
2924                 return rte_flow_error_set(error, EINVAL,
2925                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2926                                           "not full match mask on VLAN VID and "
2927                                           "there is no of_set_vlan_vid action, "
2928                                           "push VLAN action cannot figure out "
2929                                           "VID value");
2930         (void)attr;
2931         return 0;
2932 }
2933
2934 /**
2935  * Validate the set VLAN PCP.
2936  *
2937  * @param[in] action_flags
2938  *   Holds the actions detected until now.
2939  * @param[in] actions
2940  *   Pointer to the list of actions remaining in the flow rule.
2941  * @param[out] error
2942  *   Pointer to error structure.
2943  *
2944  * @return
2945  *   0 on success, a negative errno value otherwise and rte_errno is set.
2946  */
2947 static int
2948 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
2949                                      const struct rte_flow_action actions[],
2950                                      struct rte_flow_error *error)
2951 {
2952         const struct rte_flow_action *action = actions;
2953         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
2954
2955         if (conf->vlan_pcp > 7)
2956                 return rte_flow_error_set(error, EINVAL,
2957                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2958                                           "VLAN PCP value is too big");
2959         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
2960                 return rte_flow_error_set(error, ENOTSUP,
2961                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2962                                           "set VLAN PCP action must follow "
2963                                           "the push VLAN action");
2964         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
2965                 return rte_flow_error_set(error, ENOTSUP,
2966                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2967                                           "Multiple VLAN PCP modification are "
2968                                           "not supported");
2969         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2970                 return rte_flow_error_set(error, EINVAL,
2971                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2972                                           "wrong action order, port_id should "
2973                                           "be after set VLAN PCP");
2974         return 0;
2975 }
2976
2977 /**
2978  * Validate the set VLAN VID.
2979  *
2980  * @param[in] item_flags
2981  *   Holds the items detected in this rule.
2982  * @param[in] action_flags
2983  *   Holds the actions detected until now.
2984  * @param[in] actions
2985  *   Pointer to the list of actions remaining in the flow rule.
2986  * @param[out] error
2987  *   Pointer to error structure.
2988  *
2989  * @return
2990  *   0 on success, a negative errno value otherwise and rte_errno is set.
2991  */
2992 static int
2993 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
2994                                      uint64_t action_flags,
2995                                      const struct rte_flow_action actions[],
2996                                      struct rte_flow_error *error)
2997 {
2998         const struct rte_flow_action *action = actions;
2999         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
3000
3001         if (rte_be_to_cpu_16(conf->vlan_vid) > 0xFFE)
3002                 return rte_flow_error_set(error, EINVAL,
3003                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3004                                           "VLAN VID value is too big");
3005         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
3006             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
3007                 return rte_flow_error_set(error, ENOTSUP,
3008                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3009                                           "set VLAN VID action must follow push"
3010                                           " VLAN action or match on VLAN item");
3011         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
3012                 return rte_flow_error_set(error, ENOTSUP,
3013                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3014                                           "Multiple VLAN VID modifications are "
3015                                           "not supported");
3016         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
3017                 return rte_flow_error_set(error, EINVAL,
3018                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3019                                           "wrong action order, port_id should "
3020                                           "be after set VLAN VID");
3021         return 0;
3022 }
3023
3024 /*
3025  * Validate the FLAG action.
3026  *
3027  * @param[in] dev
3028  *   Pointer to the rte_eth_dev structure.
3029  * @param[in] action_flags
3030  *   Holds the actions detected until now.
3031  * @param[in] attr
3032  *   Pointer to flow attributes
3033  * @param[out] error
3034  *   Pointer to error structure.
3035  *
3036  * @return
3037  *   0 on success, a negative errno value otherwise and rte_errno is set.
3038  */
3039 static int
3040 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
3041                              uint64_t action_flags,
3042                              const struct rte_flow_attr *attr,
3043                              struct rte_flow_error *error)
3044 {
3045         struct mlx5_priv *priv = dev->data->dev_private;
3046         struct mlx5_dev_config *config = &priv->config;
3047         int ret;
3048
3049         /* Fall back if no extended metadata register support. */
3050         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3051                 return mlx5_flow_validate_action_flag(action_flags, attr,
3052                                                       error);
3053         /* Extensive metadata mode requires registers. */
3054         if (!mlx5_flow_ext_mreg_supported(dev))
3055                 return rte_flow_error_set(error, ENOTSUP,
3056                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3057                                           "no metadata registers "
3058                                           "to support flag action");
3059         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
3060                 return rte_flow_error_set(error, ENOTSUP,
3061                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3062                                           "extended metadata register"
3063                                           " isn't available");
3064         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3065         if (ret < 0)
3066                 return ret;
3067         MLX5_ASSERT(ret > 0);
3068         if (action_flags & MLX5_FLOW_ACTION_MARK)
3069                 return rte_flow_error_set(error, EINVAL,
3070                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3071                                           "can't mark and flag in same flow");
3072         if (action_flags & MLX5_FLOW_ACTION_FLAG)
3073                 return rte_flow_error_set(error, EINVAL,
3074                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3075                                           "can't have 2 flag"
3076                                           " actions in same flow");
3077         return 0;
3078 }
3079
3080 /**
3081  * Validate MARK action.
3082  *
3083  * @param[in] dev
3084  *   Pointer to the rte_eth_dev structure.
3085  * @param[in] action
3086  *   Pointer to action.
3087  * @param[in] action_flags
3088  *   Holds the actions detected until now.
3089  * @param[in] attr
3090  *   Pointer to flow attributes
3091  * @param[out] error
3092  *   Pointer to error structure.
3093  *
3094  * @return
3095  *   0 on success, a negative errno value otherwise and rte_errno is set.
3096  */
3097 static int
3098 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
3099                              const struct rte_flow_action *action,
3100                              uint64_t action_flags,
3101                              const struct rte_flow_attr *attr,
3102                              struct rte_flow_error *error)
3103 {
3104         struct mlx5_priv *priv = dev->data->dev_private;
3105         struct mlx5_dev_config *config = &priv->config;
3106         const struct rte_flow_action_mark *mark = action->conf;
3107         int ret;
3108
3109         if (is_tunnel_offload_active(dev))
3110                 return rte_flow_error_set(error, ENOTSUP,
3111                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3112                                           "no mark action "
3113                                           "if tunnel offload active");
3114         /* Fall back if no extended metadata register support. */
3115         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3116                 return mlx5_flow_validate_action_mark(action, action_flags,
3117                                                       attr, error);
3118         /* Extensive metadata mode requires registers. */
3119         if (!mlx5_flow_ext_mreg_supported(dev))
3120                 return rte_flow_error_set(error, ENOTSUP,
3121                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3122                                           "no metadata registers "
3123                                           "to support mark action");
3124         if (!priv->sh->dv_mark_mask)
3125                 return rte_flow_error_set(error, ENOTSUP,
3126                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3127                                           "extended metadata register"
3128                                           " isn't available");
3129         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3130         if (ret < 0)
3131                 return ret;
3132         MLX5_ASSERT(ret > 0);
3133         if (!mark)
3134                 return rte_flow_error_set(error, EINVAL,
3135                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3136                                           "configuration cannot be null");
3137         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
3138                 return rte_flow_error_set(error, EINVAL,
3139                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3140                                           &mark->id,
3141                                           "mark id exceeds the limit");
3142         if (action_flags & MLX5_FLOW_ACTION_FLAG)
3143                 return rte_flow_error_set(error, EINVAL,
3144                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3145                                           "can't flag and mark in same flow");
3146         if (action_flags & MLX5_FLOW_ACTION_MARK)
3147                 return rte_flow_error_set(error, EINVAL,
3148                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3149                                           "can't have 2 mark actions in same"
3150                                           " flow");
3151         return 0;
3152 }
3153
3154 /**
3155  * Validate SET_META action.
3156  *
3157  * @param[in] dev
3158  *   Pointer to the rte_eth_dev structure.
3159  * @param[in] action
3160  *   Pointer to the action structure.
3161  * @param[in] action_flags
3162  *   Holds the actions detected until now.
3163  * @param[in] attr
3164  *   Pointer to flow attributes
3165  * @param[out] error
3166  *   Pointer to error structure.
3167  *
3168  * @return
3169  *   0 on success, a negative errno value otherwise and rte_errno is set.
3170  */
3171 static int
3172 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
3173                                  const struct rte_flow_action *action,
3174                                  uint64_t action_flags __rte_unused,
3175                                  const struct rte_flow_attr *attr,
3176                                  struct rte_flow_error *error)
3177 {
3178         const struct rte_flow_action_set_meta *conf;
3179         uint32_t nic_mask = UINT32_MAX;
3180         int reg;
3181
3182         if (!mlx5_flow_ext_mreg_supported(dev))
3183                 return rte_flow_error_set(error, ENOTSUP,
3184                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3185                                           "extended metadata register"
3186                                           " isn't supported");
3187         reg = flow_dv_get_metadata_reg(dev, attr, error);
3188         if (reg < 0)
3189                 return reg;
3190         if (reg == REG_NON)
3191                 return rte_flow_error_set(error, ENOTSUP,
3192                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3193                                           "unavalable extended metadata register");
3194         if (reg != REG_A && reg != REG_B) {
3195                 struct mlx5_priv *priv = dev->data->dev_private;
3196
3197                 nic_mask = priv->sh->dv_meta_mask;
3198         }
3199         if (!(action->conf))
3200                 return rte_flow_error_set(error, EINVAL,
3201                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3202                                           "configuration cannot be null");
3203         conf = (const struct rte_flow_action_set_meta *)action->conf;
3204         if (!conf->mask)
3205                 return rte_flow_error_set(error, EINVAL,
3206                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3207                                           "zero mask doesn't have any effect");
3208         if (conf->mask & ~nic_mask)
3209                 return rte_flow_error_set(error, EINVAL,
3210                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3211                                           "meta data must be within reg C0");
3212         return 0;
3213 }
3214
3215 /**
3216  * Validate SET_TAG action.
3217  *
3218  * @param[in] dev
3219  *   Pointer to the rte_eth_dev structure.
3220  * @param[in] action
3221  *   Pointer to the action structure.
3222  * @param[in] action_flags
3223  *   Holds the actions detected until now.
3224  * @param[in] attr
3225  *   Pointer to flow attributes
3226  * @param[out] error
3227  *   Pointer to error structure.
3228  *
3229  * @return
3230  *   0 on success, a negative errno value otherwise and rte_errno is set.
3231  */
3232 static int
3233 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
3234                                 const struct rte_flow_action *action,
3235                                 uint64_t action_flags,
3236                                 const struct rte_flow_attr *attr,
3237                                 struct rte_flow_error *error)
3238 {
3239         const struct rte_flow_action_set_tag *conf;
3240         const uint64_t terminal_action_flags =
3241                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
3242                 MLX5_FLOW_ACTION_RSS;
3243         int ret;
3244
3245         if (!mlx5_flow_ext_mreg_supported(dev))
3246                 return rte_flow_error_set(error, ENOTSUP,
3247                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3248                                           "extensive metadata register"
3249                                           " isn't supported");
3250         if (!(action->conf))
3251                 return rte_flow_error_set(error, EINVAL,
3252                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3253                                           "configuration cannot be null");
3254         conf = (const struct rte_flow_action_set_tag *)action->conf;
3255         if (!conf->mask)
3256                 return rte_flow_error_set(error, EINVAL,
3257                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3258                                           "zero mask doesn't have any effect");
3259         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
3260         if (ret < 0)
3261                 return ret;
3262         if (!attr->transfer && attr->ingress &&
3263             (action_flags & terminal_action_flags))
3264                 return rte_flow_error_set(error, EINVAL,
3265                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3266                                           "set_tag has no effect"
3267                                           " with terminal actions");
3268         return 0;
3269 }
3270
3271 /**
3272  * Validate count action.
3273  *
3274  * @param[in] dev
3275  *   Pointer to rte_eth_dev structure.
3276  * @param[in] shared
3277  *   Indicator if action is shared.
3278  * @param[in] action_flags
3279  *   Holds the actions detected until now.
3280  * @param[out] error
3281  *   Pointer to error structure.
3282  *
3283  * @return
3284  *   0 on success, a negative errno value otherwise and rte_errno is set.
3285  */
3286 static int
3287 flow_dv_validate_action_count(struct rte_eth_dev *dev, bool shared,
3288                               uint64_t action_flags,
3289                               struct rte_flow_error *error)
3290 {
3291         struct mlx5_priv *priv = dev->data->dev_private;
3292
3293         if (!priv->sh->devx)
3294                 goto notsup_err;
3295         if (action_flags & MLX5_FLOW_ACTION_COUNT)
3296                 return rte_flow_error_set(error, EINVAL,
3297                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3298                                           "duplicate count actions set");
3299         if (shared && (action_flags & MLX5_FLOW_ACTION_AGE) &&
3300             !priv->sh->flow_hit_aso_en)
3301                 return rte_flow_error_set(error, EINVAL,
3302                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3303                                           "old age and shared count combination is not supported");
3304 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
3305         return 0;
3306 #endif
3307 notsup_err:
3308         return rte_flow_error_set
3309                       (error, ENOTSUP,
3310                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3311                        NULL,
3312                        "count action not supported");
3313 }
3314
3315 /**
3316  * Validate the L2 encap action.
3317  *
3318  * @param[in] dev
3319  *   Pointer to the rte_eth_dev structure.
3320  * @param[in] action_flags
3321  *   Holds the actions detected until now.
3322  * @param[in] action
3323  *   Pointer to the action structure.
3324  * @param[in] attr
3325  *   Pointer to flow attributes.
3326  * @param[out] error
3327  *   Pointer to error structure.
3328  *
3329  * @return
3330  *   0 on success, a negative errno value otherwise and rte_errno is set.
3331  */
3332 static int
3333 flow_dv_validate_action_l2_encap(struct rte_eth_dev *dev,
3334                                  uint64_t action_flags,
3335                                  const struct rte_flow_action *action,
3336                                  const struct rte_flow_attr *attr,
3337                                  struct rte_flow_error *error)
3338 {
3339         const struct mlx5_priv *priv = dev->data->dev_private;
3340
3341         if (!(action->conf))
3342                 return rte_flow_error_set(error, EINVAL,
3343                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3344                                           "configuration cannot be null");
3345         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3346                 return rte_flow_error_set(error, EINVAL,
3347                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3348                                           "can only have a single encap action "
3349                                           "in a flow");
3350         if (!attr->transfer && priv->representor)
3351                 return rte_flow_error_set(error, ENOTSUP,
3352                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3353                                           "encap action for VF representor "
3354                                           "not supported on NIC table");
3355         return 0;
3356 }
3357
3358 /**
3359  * Validate a decap action.
3360  *
3361  * @param[in] dev
3362  *   Pointer to the rte_eth_dev structure.
3363  * @param[in] action_flags
3364  *   Holds the actions detected until now.
3365  * @param[in] action
3366  *   Pointer to the action structure.
3367  * @param[in] item_flags
3368  *   Holds the items detected.
3369  * @param[in] attr
3370  *   Pointer to flow attributes
3371  * @param[out] error
3372  *   Pointer to error structure.
3373  *
3374  * @return
3375  *   0 on success, a negative errno value otherwise and rte_errno is set.
3376  */
3377 static int
3378 flow_dv_validate_action_decap(struct rte_eth_dev *dev,
3379                               uint64_t action_flags,
3380                               const struct rte_flow_action *action,
3381                               const uint64_t item_flags,
3382                               const struct rte_flow_attr *attr,
3383                               struct rte_flow_error *error)
3384 {
3385         const struct mlx5_priv *priv = dev->data->dev_private;
3386
3387         if (priv->config.hca_attr.scatter_fcs_w_decap_disable &&
3388             !priv->config.decap_en)
3389                 return rte_flow_error_set(error, ENOTSUP,
3390                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3391                                           "decap is not enabled");
3392         if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
3393                 return rte_flow_error_set(error, ENOTSUP,
3394                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3395                                           action_flags &
3396                                           MLX5_FLOW_ACTION_DECAP ? "can only "
3397                                           "have a single decap action" : "decap "
3398                                           "after encap is not supported");
3399         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
3400                 return rte_flow_error_set(error, EINVAL,
3401                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3402                                           "can't have decap action after"
3403                                           " modify action");
3404         if (attr->egress)
3405                 return rte_flow_error_set(error, ENOTSUP,
3406                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
3407                                           NULL,
3408                                           "decap action not supported for "
3409                                           "egress");
3410         if (!attr->transfer && priv->representor)
3411                 return rte_flow_error_set(error, ENOTSUP,
3412                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3413                                           "decap action for VF representor "
3414                                           "not supported on NIC table");
3415         if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_DECAP &&
3416             !(item_flags & MLX5_FLOW_LAYER_VXLAN))
3417                 return rte_flow_error_set(error, ENOTSUP,
3418                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3419                                 "VXLAN item should be present for VXLAN decap");
3420         return 0;
3421 }
3422
3423 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
3424
3425 /**
3426  * Validate the raw encap and decap actions.
3427  *
3428  * @param[in] dev
3429  *   Pointer to the rte_eth_dev structure.
3430  * @param[in] decap
3431  *   Pointer to the decap action.
3432  * @param[in] encap
3433  *   Pointer to the encap action.
3434  * @param[in] attr
3435  *   Pointer to flow attributes
3436  * @param[in/out] action_flags
3437  *   Holds the actions detected until now.
3438  * @param[out] actions_n
3439  *   pointer to the number of actions counter.
3440  * @param[in] action
3441  *   Pointer to the action structure.
3442  * @param[in] item_flags
3443  *   Holds the items detected.
3444  * @param[out] error
3445  *   Pointer to error structure.
3446  *
3447  * @return
3448  *   0 on success, a negative errno value otherwise and rte_errno is set.
3449  */
3450 static int
3451 flow_dv_validate_action_raw_encap_decap
3452         (struct rte_eth_dev *dev,
3453          const struct rte_flow_action_raw_decap *decap,
3454          const struct rte_flow_action_raw_encap *encap,
3455          const struct rte_flow_attr *attr, uint64_t *action_flags,
3456          int *actions_n, const struct rte_flow_action *action,
3457          uint64_t item_flags, struct rte_flow_error *error)
3458 {
3459         const struct mlx5_priv *priv = dev->data->dev_private;
3460         int ret;
3461
3462         if (encap && (!encap->size || !encap->data))
3463                 return rte_flow_error_set(error, EINVAL,
3464                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3465                                           "raw encap data cannot be empty");
3466         if (decap && encap) {
3467                 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
3468                     encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3469                         /* L3 encap. */
3470                         decap = NULL;
3471                 else if (encap->size <=
3472                            MLX5_ENCAPSULATION_DECISION_SIZE &&
3473                            decap->size >
3474                            MLX5_ENCAPSULATION_DECISION_SIZE)
3475                         /* L3 decap. */
3476                         encap = NULL;
3477                 else if (encap->size >
3478                            MLX5_ENCAPSULATION_DECISION_SIZE &&
3479                            decap->size >
3480                            MLX5_ENCAPSULATION_DECISION_SIZE)
3481                         /* 2 L2 actions: encap and decap. */
3482                         ;
3483                 else
3484                         return rte_flow_error_set(error,
3485                                 ENOTSUP,
3486                                 RTE_FLOW_ERROR_TYPE_ACTION,
3487                                 NULL, "unsupported too small "
3488                                 "raw decap and too small raw "
3489                                 "encap combination");
3490         }
3491         if (decap) {
3492                 ret = flow_dv_validate_action_decap(dev, *action_flags, action,
3493                                                     item_flags, attr, error);
3494                 if (ret < 0)
3495                         return ret;
3496                 *action_flags |= MLX5_FLOW_ACTION_DECAP;
3497                 ++(*actions_n);
3498         }
3499         if (encap) {
3500                 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
3501                         return rte_flow_error_set(error, ENOTSUP,
3502                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3503                                                   NULL,
3504                                                   "small raw encap size");
3505                 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
3506                         return rte_flow_error_set(error, EINVAL,
3507                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3508                                                   NULL,
3509                                                   "more than one encap action");
3510                 if (!attr->transfer && priv->representor)
3511                         return rte_flow_error_set
3512                                         (error, ENOTSUP,
3513                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3514                                          "encap action for VF representor "
3515                                          "not supported on NIC table");
3516                 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
3517                 ++(*actions_n);
3518         }
3519         return 0;
3520 }
3521
3522 /*
3523  * Validate the ASO CT action.
3524  *
3525  * @param[in] dev
3526  *   Pointer to the rte_eth_dev structure.
3527  * @param[in] action_flags
3528  *   Holds the actions detected until now.
3529  * @param[in] item_flags
3530  *   The items found in this flow rule.
3531  * @param[in] attr
3532  *   Pointer to flow attributes.
3533  * @param[out] error
3534  *   Pointer to error structure.
3535  *
3536  * @return
3537  *   0 on success, a negative errno value otherwise and rte_errno is set.
3538  */
3539 static int
3540 flow_dv_validate_action_aso_ct(struct rte_eth_dev *dev,
3541                                uint64_t action_flags,
3542                                uint64_t item_flags,
3543                                const struct rte_flow_attr *attr,
3544                                struct rte_flow_error *error)
3545 {
3546         RTE_SET_USED(dev);
3547
3548         if (attr->group == 0 && !attr->transfer)
3549                 return rte_flow_error_set(error, ENOTSUP,
3550                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3551                                           NULL,
3552                                           "Only support non-root table");
3553         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
3554                 return rte_flow_error_set(error, ENOTSUP,
3555                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3556                                           "CT cannot follow a fate action");
3557         if ((action_flags & MLX5_FLOW_ACTION_METER) ||
3558             (action_flags & MLX5_FLOW_ACTION_AGE))
3559                 return rte_flow_error_set(error, EINVAL,
3560                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3561                                           "Only one ASO action is supported");
3562         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3563                 return rte_flow_error_set(error, EINVAL,
3564                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3565                                           "Encap cannot exist before CT");
3566         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3567                 return rte_flow_error_set(error, EINVAL,
3568                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3569                                           "Not a outer TCP packet");
3570         return 0;
3571 }
3572
3573 int
3574 flow_dv_encap_decap_match_cb(void *tool_ctx __rte_unused,
3575                              struct mlx5_list_entry *entry, void *cb_ctx)
3576 {
3577         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3578         struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3579         struct mlx5_flow_dv_encap_decap_resource *resource;
3580
3581         resource = container_of(entry, struct mlx5_flow_dv_encap_decap_resource,
3582                                 entry);
3583         if (resource->reformat_type == ctx_resource->reformat_type &&
3584             resource->ft_type == ctx_resource->ft_type &&
3585             resource->flags == ctx_resource->flags &&
3586             resource->size == ctx_resource->size &&
3587             !memcmp((const void *)resource->buf,
3588                     (const void *)ctx_resource->buf,
3589                     resource->size))
3590                 return 0;
3591         return -1;
3592 }
3593
3594 struct mlx5_list_entry *
3595 flow_dv_encap_decap_create_cb(void *tool_ctx, void *cb_ctx)
3596 {
3597         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3598         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3599         struct mlx5dv_dr_domain *domain;
3600         struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3601         struct mlx5_flow_dv_encap_decap_resource *resource;
3602         uint32_t idx;
3603         int ret;
3604
3605         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3606                 domain = sh->fdb_domain;
3607         else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3608                 domain = sh->rx_domain;
3609         else
3610                 domain = sh->tx_domain;
3611         /* Register new encap/decap resource. */
3612         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], &idx);
3613         if (!resource) {
3614                 rte_flow_error_set(ctx->error, ENOMEM,
3615                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3616                                    "cannot allocate resource memory");
3617                 return NULL;
3618         }
3619         *resource = *ctx_resource;
3620         resource->idx = idx;
3621         ret = mlx5_flow_os_create_flow_action_packet_reformat(sh->cdev->ctx,
3622                                                               domain, resource,
3623                                                              &resource->action);
3624         if (ret) {
3625                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], idx);
3626                 rte_flow_error_set(ctx->error, ENOMEM,
3627                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3628                                    NULL, "cannot create action");
3629                 return NULL;
3630         }
3631
3632         return &resource->entry;
3633 }
3634
3635 struct mlx5_list_entry *
3636 flow_dv_encap_decap_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
3637                              void *cb_ctx)
3638 {
3639         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3640         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3641         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
3642         uint32_t idx;
3643
3644         cache_resource = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
3645                                            &idx);
3646         if (!cache_resource) {
3647                 rte_flow_error_set(ctx->error, ENOMEM,
3648                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3649                                    "cannot allocate resource memory");
3650                 return NULL;
3651         }
3652         memcpy(cache_resource, oentry, sizeof(*cache_resource));
3653         cache_resource->idx = idx;
3654         return &cache_resource->entry;
3655 }
3656
3657 void
3658 flow_dv_encap_decap_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3659 {
3660         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3661         struct mlx5_flow_dv_encap_decap_resource *res =
3662                                        container_of(entry, typeof(*res), entry);
3663
3664         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
3665 }
3666
3667 /**
3668  * Find existing encap/decap resource or create and register a new one.
3669  *
3670  * @param[in, out] dev
3671  *   Pointer to rte_eth_dev structure.
3672  * @param[in, out] resource
3673  *   Pointer to encap/decap resource.
3674  * @parm[in, out] dev_flow
3675  *   Pointer to the dev_flow.
3676  * @param[out] error
3677  *   pointer to error structure.
3678  *
3679  * @return
3680  *   0 on success otherwise -errno and errno is set.
3681  */
3682 static int
3683 flow_dv_encap_decap_resource_register
3684                         (struct rte_eth_dev *dev,
3685                          struct mlx5_flow_dv_encap_decap_resource *resource,
3686                          struct mlx5_flow *dev_flow,
3687                          struct rte_flow_error *error)
3688 {
3689         struct mlx5_priv *priv = dev->data->dev_private;
3690         struct mlx5_dev_ctx_shared *sh = priv->sh;
3691         struct mlx5_list_entry *entry;
3692         union {
3693                 struct {
3694                         uint32_t ft_type:8;
3695                         uint32_t refmt_type:8;
3696                         /*
3697                          * Header reformat actions can be shared between
3698                          * non-root tables. One bit to indicate non-root
3699                          * table or not.
3700                          */
3701                         uint32_t is_root:1;
3702                         uint32_t reserve:15;
3703                 };
3704                 uint32_t v32;
3705         } encap_decap_key = {
3706                 {
3707                         .ft_type = resource->ft_type,
3708                         .refmt_type = resource->reformat_type,
3709                         .is_root = !!dev_flow->dv.group,
3710                         .reserve = 0,
3711                 }
3712         };
3713         struct mlx5_flow_cb_ctx ctx = {
3714                 .error = error,
3715                 .data = resource,
3716         };
3717         struct mlx5_hlist *encaps_decaps;
3718         uint64_t key64;
3719
3720         encaps_decaps = flow_dv_hlist_prepare(sh, &sh->encaps_decaps,
3721                                 "encaps_decaps",
3722                                 MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
3723                                 true, true, sh,
3724                                 flow_dv_encap_decap_create_cb,
3725                                 flow_dv_encap_decap_match_cb,
3726                                 flow_dv_encap_decap_remove_cb,
3727                                 flow_dv_encap_decap_clone_cb,
3728                                 flow_dv_encap_decap_clone_free_cb);
3729         if (unlikely(!encaps_decaps))
3730                 return -rte_errno;
3731         resource->flags = dev_flow->dv.group ? 0 : 1;
3732         key64 =  __rte_raw_cksum(&encap_decap_key.v32,
3733                                  sizeof(encap_decap_key.v32), 0);
3734         if (resource->reformat_type !=
3735             MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2 &&
3736             resource->size)
3737                 key64 = __rte_raw_cksum(resource->buf, resource->size, key64);
3738         entry = mlx5_hlist_register(encaps_decaps, key64, &ctx);
3739         if (!entry)
3740                 return -rte_errno;
3741         resource = container_of(entry, typeof(*resource), entry);
3742         dev_flow->dv.encap_decap = resource;
3743         dev_flow->handle->dvh.rix_encap_decap = resource->idx;
3744         return 0;
3745 }
3746
3747 /**
3748  * Find existing table jump resource or create and register a new one.
3749  *
3750  * @param[in, out] dev
3751  *   Pointer to rte_eth_dev structure.
3752  * @param[in, out] tbl
3753  *   Pointer to flow table resource.
3754  * @parm[in, out] dev_flow
3755  *   Pointer to the dev_flow.
3756  * @param[out] error
3757  *   pointer to error structure.
3758  *
3759  * @return
3760  *   0 on success otherwise -errno and errno is set.
3761  */
3762 static int
3763 flow_dv_jump_tbl_resource_register
3764                         (struct rte_eth_dev *dev __rte_unused,
3765                          struct mlx5_flow_tbl_resource *tbl,
3766                          struct mlx5_flow *dev_flow,
3767                          struct rte_flow_error *error __rte_unused)
3768 {
3769         struct mlx5_flow_tbl_data_entry *tbl_data =
3770                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
3771
3772         MLX5_ASSERT(tbl);
3773         MLX5_ASSERT(tbl_data->jump.action);
3774         dev_flow->handle->rix_jump = tbl_data->idx;
3775         dev_flow->dv.jump = &tbl_data->jump;
3776         return 0;
3777 }
3778
3779 int
3780 flow_dv_port_id_match_cb(void *tool_ctx __rte_unused,
3781                          struct mlx5_list_entry *entry, void *cb_ctx)
3782 {
3783         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3784         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3785         struct mlx5_flow_dv_port_id_action_resource *res =
3786                                        container_of(entry, typeof(*res), entry);
3787
3788         return ref->port_id != res->port_id;
3789 }
3790
3791 struct mlx5_list_entry *
3792 flow_dv_port_id_create_cb(void *tool_ctx, void *cb_ctx)
3793 {
3794         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3795         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3796         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3797         struct mlx5_flow_dv_port_id_action_resource *resource;
3798         uint32_t idx;
3799         int ret;
3800
3801         /* Register new port id action resource. */
3802         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3803         if (!resource) {
3804                 rte_flow_error_set(ctx->error, ENOMEM,
3805                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3806                                    "cannot allocate port_id action memory");
3807                 return NULL;
3808         }
3809         *resource = *ref;
3810         ret = mlx5_flow_os_create_flow_action_dest_port(sh->fdb_domain,
3811                                                         ref->port_id,
3812                                                         &resource->action);
3813         if (ret) {
3814                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], idx);
3815                 rte_flow_error_set(ctx->error, ENOMEM,
3816                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3817                                    "cannot create action");
3818                 return NULL;
3819         }
3820         resource->idx = idx;
3821         return &resource->entry;
3822 }
3823
3824 struct mlx5_list_entry *
3825 flow_dv_port_id_clone_cb(void *tool_ctx,
3826                          struct mlx5_list_entry *entry __rte_unused,
3827                          void *cb_ctx)
3828 {
3829         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3830         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3831         struct mlx5_flow_dv_port_id_action_resource *resource;
3832         uint32_t idx;
3833
3834         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3835         if (!resource) {
3836                 rte_flow_error_set(ctx->error, ENOMEM,
3837                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3838                                    "cannot allocate port_id action memory");
3839                 return NULL;
3840         }
3841         memcpy(resource, entry, sizeof(*resource));
3842         resource->idx = idx;
3843         return &resource->entry;
3844 }
3845
3846 void
3847 flow_dv_port_id_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3848 {
3849         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3850         struct mlx5_flow_dv_port_id_action_resource *resource =
3851                                   container_of(entry, typeof(*resource), entry);
3852
3853         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
3854 }
3855
3856 /**
3857  * Find existing table port ID resource or create and register a new one.
3858  *
3859  * @param[in, out] dev
3860  *   Pointer to rte_eth_dev structure.
3861  * @param[in, out] ref
3862  *   Pointer to port ID action resource reference.
3863  * @parm[in, out] dev_flow
3864  *   Pointer to the dev_flow.
3865  * @param[out] error
3866  *   pointer to error structure.
3867  *
3868  * @return
3869  *   0 on success otherwise -errno and errno is set.
3870  */
3871 static int
3872 flow_dv_port_id_action_resource_register
3873                         (struct rte_eth_dev *dev,
3874                          struct mlx5_flow_dv_port_id_action_resource *ref,
3875                          struct mlx5_flow *dev_flow,
3876                          struct rte_flow_error *error)
3877 {
3878         struct mlx5_priv *priv = dev->data->dev_private;
3879         struct mlx5_list_entry *entry;
3880         struct mlx5_flow_dv_port_id_action_resource *resource;
3881         struct mlx5_flow_cb_ctx ctx = {
3882                 .error = error,
3883                 .data = ref,
3884         };
3885
3886         entry = mlx5_list_register(priv->sh->port_id_action_list, &ctx);
3887         if (!entry)
3888                 return -rte_errno;
3889         resource = container_of(entry, typeof(*resource), entry);
3890         dev_flow->dv.port_id_action = resource;
3891         dev_flow->handle->rix_port_id_action = resource->idx;
3892         return 0;
3893 }
3894
3895 int
3896 flow_dv_push_vlan_match_cb(void *tool_ctx __rte_unused,
3897                            struct mlx5_list_entry *entry, void *cb_ctx)
3898 {
3899         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3900         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3901         struct mlx5_flow_dv_push_vlan_action_resource *res =
3902                                        container_of(entry, typeof(*res), entry);
3903
3904         return ref->vlan_tag != res->vlan_tag || ref->ft_type != res->ft_type;
3905 }
3906
3907 struct mlx5_list_entry *
3908 flow_dv_push_vlan_create_cb(void *tool_ctx, void *cb_ctx)
3909 {
3910         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3911         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3912         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3913         struct mlx5_flow_dv_push_vlan_action_resource *resource;
3914         struct mlx5dv_dr_domain *domain;
3915         uint32_t idx;
3916         int ret;
3917
3918         /* Register new port id action resource. */
3919         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3920         if (!resource) {
3921                 rte_flow_error_set(ctx->error, ENOMEM,
3922                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3923                                    "cannot allocate push_vlan action memory");
3924                 return NULL;
3925         }
3926         *resource = *ref;
3927         if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3928                 domain = sh->fdb_domain;
3929         else if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3930                 domain = sh->rx_domain;
3931         else
3932                 domain = sh->tx_domain;
3933         ret = mlx5_flow_os_create_flow_action_push_vlan(domain, ref->vlan_tag,
3934                                                         &resource->action);
3935         if (ret) {
3936                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
3937                 rte_flow_error_set(ctx->error, ENOMEM,
3938                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3939                                    "cannot create push vlan action");
3940                 return NULL;
3941         }
3942         resource->idx = idx;
3943         return &resource->entry;
3944 }
3945
3946 struct mlx5_list_entry *
3947 flow_dv_push_vlan_clone_cb(void *tool_ctx,
3948                            struct mlx5_list_entry *entry __rte_unused,
3949                            void *cb_ctx)
3950 {
3951         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3952         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3953         struct mlx5_flow_dv_push_vlan_action_resource *resource;
3954         uint32_t idx;
3955
3956         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3957         if (!resource) {
3958                 rte_flow_error_set(ctx->error, ENOMEM,
3959                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3960                                    "cannot allocate push_vlan action memory");
3961                 return NULL;
3962         }
3963         memcpy(resource, entry, sizeof(*resource));
3964         resource->idx = idx;
3965         return &resource->entry;
3966 }
3967
3968 void
3969 flow_dv_push_vlan_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3970 {
3971         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3972         struct mlx5_flow_dv_push_vlan_action_resource *resource =
3973                                   container_of(entry, typeof(*resource), entry);
3974
3975         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
3976 }
3977
3978 /**
3979  * Find existing push vlan resource or create and register a new one.
3980  *
3981  * @param [in, out] dev
3982  *   Pointer to rte_eth_dev structure.
3983  * @param[in, out] ref
3984  *   Pointer to port ID action resource reference.
3985  * @parm[in, out] dev_flow
3986  *   Pointer to the dev_flow.
3987  * @param[out] error
3988  *   pointer to error structure.
3989  *
3990  * @return
3991  *   0 on success otherwise -errno and errno is set.
3992  */
3993 static int
3994 flow_dv_push_vlan_action_resource_register
3995                        (struct rte_eth_dev *dev,
3996                         struct mlx5_flow_dv_push_vlan_action_resource *ref,
3997                         struct mlx5_flow *dev_flow,
3998                         struct rte_flow_error *error)
3999 {
4000         struct mlx5_priv *priv = dev->data->dev_private;
4001         struct mlx5_flow_dv_push_vlan_action_resource *resource;
4002         struct mlx5_list_entry *entry;
4003         struct mlx5_flow_cb_ctx ctx = {
4004                 .error = error,
4005                 .data = ref,
4006         };
4007
4008         entry = mlx5_list_register(priv->sh->push_vlan_action_list, &ctx);
4009         if (!entry)
4010                 return -rte_errno;
4011         resource = container_of(entry, typeof(*resource), entry);
4012
4013         dev_flow->handle->dvh.rix_push_vlan = resource->idx;
4014         dev_flow->dv.push_vlan_res = resource;
4015         return 0;
4016 }
4017
4018 /**
4019  * Get the size of specific rte_flow_item_type hdr size
4020  *
4021  * @param[in] item_type
4022  *   Tested rte_flow_item_type.
4023  *
4024  * @return
4025  *   sizeof struct item_type, 0 if void or irrelevant.
4026  */
4027 static size_t
4028 flow_dv_get_item_hdr_len(const enum rte_flow_item_type item_type)
4029 {
4030         size_t retval;
4031
4032         switch (item_type) {
4033         case RTE_FLOW_ITEM_TYPE_ETH:
4034                 retval = sizeof(struct rte_ether_hdr);
4035                 break;
4036         case RTE_FLOW_ITEM_TYPE_VLAN:
4037                 retval = sizeof(struct rte_vlan_hdr);
4038                 break;
4039         case RTE_FLOW_ITEM_TYPE_IPV4:
4040                 retval = sizeof(struct rte_ipv4_hdr);
4041                 break;
4042         case RTE_FLOW_ITEM_TYPE_IPV6:
4043                 retval = sizeof(struct rte_ipv6_hdr);
4044                 break;
4045         case RTE_FLOW_ITEM_TYPE_UDP:
4046                 retval = sizeof(struct rte_udp_hdr);
4047                 break;
4048         case RTE_FLOW_ITEM_TYPE_TCP:
4049                 retval = sizeof(struct rte_tcp_hdr);
4050                 break;
4051         case RTE_FLOW_ITEM_TYPE_VXLAN:
4052         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4053                 retval = sizeof(struct rte_vxlan_hdr);
4054                 break;
4055         case RTE_FLOW_ITEM_TYPE_GRE:
4056         case RTE_FLOW_ITEM_TYPE_NVGRE:
4057                 retval = sizeof(struct rte_gre_hdr);
4058                 break;
4059         case RTE_FLOW_ITEM_TYPE_MPLS:
4060                 retval = sizeof(struct rte_mpls_hdr);
4061                 break;
4062         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
4063         default:
4064                 retval = 0;
4065                 break;
4066         }
4067         return retval;
4068 }
4069
4070 #define MLX5_ENCAP_IPV4_VERSION         0x40
4071 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
4072 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
4073 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
4074 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
4075 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
4076 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
4077
4078 /**
4079  * Convert the encap action data from list of rte_flow_item to raw buffer
4080  *
4081  * @param[in] items
4082  *   Pointer to rte_flow_item objects list.
4083  * @param[out] buf
4084  *   Pointer to the output buffer.
4085  * @param[out] size
4086  *   Pointer to the output buffer size.
4087  * @param[out] error
4088  *   Pointer to the error structure.
4089  *
4090  * @return
4091  *   0 on success, a negative errno value otherwise and rte_errno is set.
4092  */
4093 static int
4094 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
4095                            size_t *size, struct rte_flow_error *error)
4096 {
4097         struct rte_ether_hdr *eth = NULL;
4098         struct rte_vlan_hdr *vlan = NULL;
4099         struct rte_ipv4_hdr *ipv4 = NULL;
4100         struct rte_ipv6_hdr *ipv6 = NULL;
4101         struct rte_udp_hdr *udp = NULL;
4102         struct rte_vxlan_hdr *vxlan = NULL;
4103         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
4104         struct rte_gre_hdr *gre = NULL;
4105         size_t len;
4106         size_t temp_size = 0;
4107
4108         if (!items)
4109                 return rte_flow_error_set(error, EINVAL,
4110                                           RTE_FLOW_ERROR_TYPE_ACTION,
4111                                           NULL, "invalid empty data");
4112         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4113                 len = flow_dv_get_item_hdr_len(items->type);
4114                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
4115                         return rte_flow_error_set(error, EINVAL,
4116                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4117                                                   (void *)items->type,
4118                                                   "items total size is too big"
4119                                                   " for encap action");
4120                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
4121                 switch (items->type) {
4122                 case RTE_FLOW_ITEM_TYPE_ETH:
4123                         eth = (struct rte_ether_hdr *)&buf[temp_size];
4124                         break;
4125                 case RTE_FLOW_ITEM_TYPE_VLAN:
4126                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
4127                         if (!eth)
4128                                 return rte_flow_error_set(error, EINVAL,
4129                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4130                                                 (void *)items->type,
4131                                                 "eth header not found");
4132                         if (!eth->ether_type)
4133                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
4134                         break;
4135                 case RTE_FLOW_ITEM_TYPE_IPV4:
4136                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
4137                         if (!vlan && !eth)
4138                                 return rte_flow_error_set(error, EINVAL,
4139                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4140                                                 (void *)items->type,
4141                                                 "neither eth nor vlan"
4142                                                 " header found");
4143                         if (vlan && !vlan->eth_proto)
4144                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4145                         else if (eth && !eth->ether_type)
4146                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4147                         if (!ipv4->version_ihl)
4148                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
4149                                                     MLX5_ENCAP_IPV4_IHL_MIN;
4150                         if (!ipv4->time_to_live)
4151                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
4152                         break;
4153                 case RTE_FLOW_ITEM_TYPE_IPV6:
4154                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
4155                         if (!vlan && !eth)
4156                                 return rte_flow_error_set(error, EINVAL,
4157                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4158                                                 (void *)items->type,
4159                                                 "neither eth nor vlan"
4160                                                 " header found");
4161                         if (vlan && !vlan->eth_proto)
4162                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4163                         else if (eth && !eth->ether_type)
4164                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4165                         if (!ipv6->vtc_flow)
4166                                 ipv6->vtc_flow =
4167                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
4168                         if (!ipv6->hop_limits)
4169                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
4170                         break;
4171                 case RTE_FLOW_ITEM_TYPE_UDP:
4172                         udp = (struct rte_udp_hdr *)&buf[temp_size];
4173                         if (!ipv4 && !ipv6)
4174                                 return rte_flow_error_set(error, EINVAL,
4175                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4176                                                 (void *)items->type,
4177                                                 "ip header not found");
4178                         if (ipv4 && !ipv4->next_proto_id)
4179                                 ipv4->next_proto_id = IPPROTO_UDP;
4180                         else if (ipv6 && !ipv6->proto)
4181                                 ipv6->proto = IPPROTO_UDP;
4182                         break;
4183                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4184                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
4185                         if (!udp)
4186                                 return rte_flow_error_set(error, EINVAL,
4187                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4188                                                 (void *)items->type,
4189                                                 "udp header not found");
4190                         if (!udp->dst_port)
4191                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
4192                         if (!vxlan->vx_flags)
4193                                 vxlan->vx_flags =
4194                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
4195                         break;
4196                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4197                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
4198                         if (!udp)
4199                                 return rte_flow_error_set(error, EINVAL,
4200                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4201                                                 (void *)items->type,
4202                                                 "udp header not found");
4203                         if (!vxlan_gpe->proto)
4204                                 return rte_flow_error_set(error, EINVAL,
4205                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4206                                                 (void *)items->type,
4207                                                 "next protocol not found");
4208                         if (!udp->dst_port)
4209                                 udp->dst_port =
4210                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
4211                         if (!vxlan_gpe->vx_flags)
4212                                 vxlan_gpe->vx_flags =
4213                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
4214                         break;
4215                 case RTE_FLOW_ITEM_TYPE_GRE:
4216                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4217                         gre = (struct rte_gre_hdr *)&buf[temp_size];
4218                         if (!gre->proto)
4219                                 return rte_flow_error_set(error, EINVAL,
4220                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4221                                                 (void *)items->type,
4222                                                 "next protocol not found");
4223                         if (!ipv4 && !ipv6)
4224                                 return rte_flow_error_set(error, EINVAL,
4225                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4226                                                 (void *)items->type,
4227                                                 "ip header not found");
4228                         if (ipv4 && !ipv4->next_proto_id)
4229                                 ipv4->next_proto_id = IPPROTO_GRE;
4230                         else if (ipv6 && !ipv6->proto)
4231                                 ipv6->proto = IPPROTO_GRE;
4232                         break;
4233                 case RTE_FLOW_ITEM_TYPE_VOID:
4234                         break;
4235                 default:
4236                         return rte_flow_error_set(error, EINVAL,
4237                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4238                                                   (void *)items->type,
4239                                                   "unsupported item type");
4240                         break;
4241                 }
4242                 temp_size += len;
4243         }
4244         *size = temp_size;
4245         return 0;
4246 }
4247
4248 static int
4249 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
4250 {
4251         struct rte_ether_hdr *eth = NULL;
4252         struct rte_vlan_hdr *vlan = NULL;
4253         struct rte_ipv6_hdr *ipv6 = NULL;
4254         struct rte_udp_hdr *udp = NULL;
4255         char *next_hdr;
4256         uint16_t proto;
4257
4258         eth = (struct rte_ether_hdr *)data;
4259         next_hdr = (char *)(eth + 1);
4260         proto = RTE_BE16(eth->ether_type);
4261
4262         /* VLAN skipping */
4263         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
4264                 vlan = (struct rte_vlan_hdr *)next_hdr;
4265                 proto = RTE_BE16(vlan->eth_proto);
4266                 next_hdr += sizeof(struct rte_vlan_hdr);
4267         }
4268
4269         /* HW calculates IPv4 csum. no need to proceed */
4270         if (proto == RTE_ETHER_TYPE_IPV4)
4271                 return 0;
4272
4273         /* non IPv4/IPv6 header. not supported */
4274         if (proto != RTE_ETHER_TYPE_IPV6) {
4275                 return rte_flow_error_set(error, ENOTSUP,
4276                                           RTE_FLOW_ERROR_TYPE_ACTION,
4277                                           NULL, "Cannot offload non IPv4/IPv6");
4278         }
4279
4280         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
4281
4282         /* ignore non UDP */
4283         if (ipv6->proto != IPPROTO_UDP)
4284                 return 0;
4285
4286         udp = (struct rte_udp_hdr *)(ipv6 + 1);
4287         udp->dgram_cksum = 0;
4288
4289         return 0;
4290 }
4291
4292 /**
4293  * Convert L2 encap action to DV specification.
4294  *
4295  * @param[in] dev
4296  *   Pointer to rte_eth_dev structure.
4297  * @param[in] action
4298  *   Pointer to action structure.
4299  * @param[in, out] dev_flow
4300  *   Pointer to the mlx5_flow.
4301  * @param[in] transfer
4302  *   Mark if the flow is E-Switch flow.
4303  * @param[out] error
4304  *   Pointer to the error structure.
4305  *
4306  * @return
4307  *   0 on success, a negative errno value otherwise and rte_errno is set.
4308  */
4309 static int
4310 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
4311                                const struct rte_flow_action *action,
4312                                struct mlx5_flow *dev_flow,
4313                                uint8_t transfer,
4314                                struct rte_flow_error *error)
4315 {
4316         const struct rte_flow_item *encap_data;
4317         const struct rte_flow_action_raw_encap *raw_encap_data;
4318         struct mlx5_flow_dv_encap_decap_resource res = {
4319                 .reformat_type =
4320                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
4321                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4322                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
4323         };
4324
4325         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4326                 raw_encap_data =
4327                         (const struct rte_flow_action_raw_encap *)action->conf;
4328                 res.size = raw_encap_data->size;
4329                 memcpy(res.buf, raw_encap_data->data, res.size);
4330         } else {
4331                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
4332                         encap_data =
4333                                 ((const struct rte_flow_action_vxlan_encap *)
4334                                                 action->conf)->definition;
4335                 else
4336                         encap_data =
4337                                 ((const struct rte_flow_action_nvgre_encap *)
4338                                                 action->conf)->definition;
4339                 if (flow_dv_convert_encap_data(encap_data, res.buf,
4340                                                &res.size, error))
4341                         return -rte_errno;
4342         }
4343         if (flow_dv_zero_encap_udp_csum(res.buf, error))
4344                 return -rte_errno;
4345         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4346                 return rte_flow_error_set(error, EINVAL,
4347                                           RTE_FLOW_ERROR_TYPE_ACTION,
4348                                           NULL, "can't create L2 encap action");
4349         return 0;
4350 }
4351
4352 /**
4353  * Convert L2 decap action to DV specification.
4354  *
4355  * @param[in] dev
4356  *   Pointer to rte_eth_dev structure.
4357  * @param[in, out] dev_flow
4358  *   Pointer to the mlx5_flow.
4359  * @param[in] transfer
4360  *   Mark if the flow is E-Switch flow.
4361  * @param[out] error
4362  *   Pointer to the error structure.
4363  *
4364  * @return
4365  *   0 on success, a negative errno value otherwise and rte_errno is set.
4366  */
4367 static int
4368 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
4369                                struct mlx5_flow *dev_flow,
4370                                uint8_t transfer,
4371                                struct rte_flow_error *error)
4372 {
4373         struct mlx5_flow_dv_encap_decap_resource res = {
4374                 .size = 0,
4375                 .reformat_type =
4376                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
4377                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4378                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
4379         };
4380
4381         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4382                 return rte_flow_error_set(error, EINVAL,
4383                                           RTE_FLOW_ERROR_TYPE_ACTION,
4384                                           NULL, "can't create L2 decap action");
4385         return 0;
4386 }
4387
4388 /**
4389  * Convert raw decap/encap (L3 tunnel) action to DV specification.
4390  *
4391  * @param[in] dev
4392  *   Pointer to rte_eth_dev structure.
4393  * @param[in] action
4394  *   Pointer to action structure.
4395  * @param[in, out] dev_flow
4396  *   Pointer to the mlx5_flow.
4397  * @param[in] attr
4398  *   Pointer to the flow attributes.
4399  * @param[out] error
4400  *   Pointer to the error structure.
4401  *
4402  * @return
4403  *   0 on success, a negative errno value otherwise and rte_errno is set.
4404  */
4405 static int
4406 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
4407                                 const struct rte_flow_action *action,
4408                                 struct mlx5_flow *dev_flow,
4409                                 const struct rte_flow_attr *attr,
4410                                 struct rte_flow_error *error)
4411 {
4412         const struct rte_flow_action_raw_encap *encap_data;
4413         struct mlx5_flow_dv_encap_decap_resource res;
4414
4415         memset(&res, 0, sizeof(res));
4416         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
4417         res.size = encap_data->size;
4418         memcpy(res.buf, encap_data->data, res.size);
4419         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
4420                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
4421                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
4422         if (attr->transfer)
4423                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4424         else
4425                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4426                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4427         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4428                 return rte_flow_error_set(error, EINVAL,
4429                                           RTE_FLOW_ERROR_TYPE_ACTION,
4430                                           NULL, "can't create encap action");
4431         return 0;
4432 }
4433
4434 /**
4435  * Create action push VLAN.
4436  *
4437  * @param[in] dev
4438  *   Pointer to rte_eth_dev structure.
4439  * @param[in] attr
4440  *   Pointer to the flow attributes.
4441  * @param[in] vlan
4442  *   Pointer to the vlan to push to the Ethernet header.
4443  * @param[in, out] dev_flow
4444  *   Pointer to the mlx5_flow.
4445  * @param[out] error
4446  *   Pointer to the error structure.
4447  *
4448  * @return
4449  *   0 on success, a negative errno value otherwise and rte_errno is set.
4450  */
4451 static int
4452 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
4453                                 const struct rte_flow_attr *attr,
4454                                 const struct rte_vlan_hdr *vlan,
4455                                 struct mlx5_flow *dev_flow,
4456                                 struct rte_flow_error *error)
4457 {
4458         struct mlx5_flow_dv_push_vlan_action_resource res;
4459
4460         memset(&res, 0, sizeof(res));
4461         res.vlan_tag =
4462                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
4463                                  vlan->vlan_tci);
4464         if (attr->transfer)
4465                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4466         else
4467                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4468                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4469         return flow_dv_push_vlan_action_resource_register
4470                                             (dev, &res, dev_flow, error);
4471 }
4472
4473 /**
4474  * Validate the modify-header actions.
4475  *
4476  * @param[in] action_flags
4477  *   Holds the actions detected until now.
4478  * @param[in] action
4479  *   Pointer to the modify action.
4480  * @param[out] error
4481  *   Pointer to error structure.
4482  *
4483  * @return
4484  *   0 on success, a negative errno value otherwise and rte_errno is set.
4485  */
4486 static int
4487 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
4488                                    const struct rte_flow_action *action,
4489                                    struct rte_flow_error *error)
4490 {
4491         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
4492                 return rte_flow_error_set(error, EINVAL,
4493                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4494                                           NULL, "action configuration not set");
4495         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
4496                 return rte_flow_error_set(error, EINVAL,
4497                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4498                                           "can't have encap action before"
4499                                           " modify action");
4500         return 0;
4501 }
4502
4503 /**
4504  * Validate the modify-header MAC address actions.
4505  *
4506  * @param[in] action_flags
4507  *   Holds the actions detected until now.
4508  * @param[in] action
4509  *   Pointer to the modify action.
4510  * @param[in] item_flags
4511  *   Holds the items detected.
4512  * @param[out] error
4513  *   Pointer to error structure.
4514  *
4515  * @return
4516  *   0 on success, a negative errno value otherwise and rte_errno is set.
4517  */
4518 static int
4519 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
4520                                    const struct rte_flow_action *action,
4521                                    const uint64_t item_flags,
4522                                    struct rte_flow_error *error)
4523 {
4524         int ret = 0;
4525
4526         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4527         if (!ret) {
4528                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
4529                         return rte_flow_error_set(error, EINVAL,
4530                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4531                                                   NULL,
4532                                                   "no L2 item in pattern");
4533         }
4534         return ret;
4535 }
4536
4537 /**
4538  * Validate the modify-header IPv4 address actions.
4539  *
4540  * @param[in] action_flags
4541  *   Holds the actions detected until now.
4542  * @param[in] action
4543  *   Pointer to the modify action.
4544  * @param[in] item_flags
4545  *   Holds the items detected.
4546  * @param[out] error
4547  *   Pointer to error structure.
4548  *
4549  * @return
4550  *   0 on success, a negative errno value otherwise and rte_errno is set.
4551  */
4552 static int
4553 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
4554                                     const struct rte_flow_action *action,
4555                                     const uint64_t item_flags,
4556                                     struct rte_flow_error *error)
4557 {
4558         int ret = 0;
4559         uint64_t layer;
4560
4561         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4562         if (!ret) {
4563                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4564                                  MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4565                                  MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4566                 if (!(item_flags & layer))
4567                         return rte_flow_error_set(error, EINVAL,
4568                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4569                                                   NULL,
4570                                                   "no ipv4 item in pattern");
4571         }
4572         return ret;
4573 }
4574
4575 /**
4576  * Validate the modify-header IPv6 address actions.
4577  *
4578  * @param[in] action_flags
4579  *   Holds the actions detected until now.
4580  * @param[in] action
4581  *   Pointer to the modify action.
4582  * @param[in] item_flags
4583  *   Holds the items detected.
4584  * @param[out] error
4585  *   Pointer to error structure.
4586  *
4587  * @return
4588  *   0 on success, a negative errno value otherwise and rte_errno is set.
4589  */
4590 static int
4591 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
4592                                     const struct rte_flow_action *action,
4593                                     const uint64_t item_flags,
4594                                     struct rte_flow_error *error)
4595 {
4596         int ret = 0;
4597         uint64_t layer;
4598
4599         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4600         if (!ret) {
4601                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4602                                  MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4603                                  MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4604                 if (!(item_flags & layer))
4605                         return rte_flow_error_set(error, EINVAL,
4606                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4607                                                   NULL,
4608                                                   "no ipv6 item in pattern");
4609         }
4610         return ret;
4611 }
4612
4613 /**
4614  * Validate the modify-header TP actions.
4615  *
4616  * @param[in] action_flags
4617  *   Holds the actions detected until now.
4618  * @param[in] action
4619  *   Pointer to the modify action.
4620  * @param[in] item_flags
4621  *   Holds the items detected.
4622  * @param[out] error
4623  *   Pointer to error structure.
4624  *
4625  * @return
4626  *   0 on success, a negative errno value otherwise and rte_errno is set.
4627  */
4628 static int
4629 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
4630                                   const struct rte_flow_action *action,
4631                                   const uint64_t item_flags,
4632                                   struct rte_flow_error *error)
4633 {
4634         int ret = 0;
4635         uint64_t layer;
4636
4637         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4638         if (!ret) {
4639                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4640                                  MLX5_FLOW_LAYER_INNER_L4 :
4641                                  MLX5_FLOW_LAYER_OUTER_L4;
4642                 if (!(item_flags & layer))
4643                         return rte_flow_error_set(error, EINVAL,
4644                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4645                                                   NULL, "no transport layer "
4646                                                   "in pattern");
4647         }
4648         return ret;
4649 }
4650
4651 /**
4652  * Validate the modify-header actions of increment/decrement
4653  * TCP Sequence-number.
4654  *
4655  * @param[in] action_flags
4656  *   Holds the actions detected until now.
4657  * @param[in] action
4658  *   Pointer to the modify action.
4659  * @param[in] item_flags
4660  *   Holds the items detected.
4661  * @param[out] error
4662  *   Pointer to error structure.
4663  *
4664  * @return
4665  *   0 on success, a negative errno value otherwise and rte_errno is set.
4666  */
4667 static int
4668 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
4669                                        const struct rte_flow_action *action,
4670                                        const uint64_t item_flags,
4671                                        struct rte_flow_error *error)
4672 {
4673         int ret = 0;
4674         uint64_t layer;
4675
4676         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4677         if (!ret) {
4678                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4679                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
4680                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
4681                 if (!(item_flags & layer))
4682                         return rte_flow_error_set(error, EINVAL,
4683                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4684                                                   NULL, "no TCP item in"
4685                                                   " pattern");
4686                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
4687                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
4688                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
4689                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
4690                         return rte_flow_error_set(error, EINVAL,
4691                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4692                                                   NULL,
4693                                                   "cannot decrease and increase"
4694                                                   " TCP sequence number"
4695                                                   " at the same time");
4696         }
4697         return ret;
4698 }
4699
4700 /**
4701  * Validate the modify-header actions of increment/decrement
4702  * TCP Acknowledgment number.
4703  *
4704  * @param[in] action_flags
4705  *   Holds the actions detected until now.
4706  * @param[in] action
4707  *   Pointer to the modify action.
4708  * @param[in] item_flags
4709  *   Holds the items detected.
4710  * @param[out] error
4711  *   Pointer to error structure.
4712  *
4713  * @return
4714  *   0 on success, a negative errno value otherwise and rte_errno is set.
4715  */
4716 static int
4717 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
4718                                        const struct rte_flow_action *action,
4719                                        const uint64_t item_flags,
4720                                        struct rte_flow_error *error)
4721 {
4722         int ret = 0;
4723         uint64_t layer;
4724
4725         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4726         if (!ret) {
4727                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4728                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
4729                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
4730                 if (!(item_flags & layer))
4731                         return rte_flow_error_set(error, EINVAL,
4732                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4733                                                   NULL, "no TCP item in"
4734                                                   " pattern");
4735                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
4736                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
4737                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
4738                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
4739                         return rte_flow_error_set(error, EINVAL,
4740                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4741                                                   NULL,
4742                                                   "cannot decrease and increase"
4743                                                   " TCP acknowledgment number"
4744                                                   " at the same time");
4745         }
4746         return ret;
4747 }
4748
4749 /**
4750  * Validate the modify-header TTL actions.
4751  *
4752  * @param[in] action_flags
4753  *   Holds the actions detected until now.
4754  * @param[in] action
4755  *   Pointer to the modify action.
4756  * @param[in] item_flags
4757  *   Holds the items detected.
4758  * @param[out] error
4759  *   Pointer to error structure.
4760  *
4761  * @return
4762  *   0 on success, a negative errno value otherwise and rte_errno is set.
4763  */
4764 static int
4765 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
4766                                    const struct rte_flow_action *action,
4767                                    const uint64_t item_flags,
4768                                    struct rte_flow_error *error)
4769 {
4770         int ret = 0;
4771         uint64_t layer;
4772
4773         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4774         if (!ret) {
4775                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4776                                  MLX5_FLOW_LAYER_INNER_L3 :
4777                                  MLX5_FLOW_LAYER_OUTER_L3;
4778                 if (!(item_flags & layer))
4779                         return rte_flow_error_set(error, EINVAL,
4780                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4781                                                   NULL,
4782                                                   "no IP protocol in pattern");
4783         }
4784         return ret;
4785 }
4786
4787 /**
4788  * Validate the generic modify field actions.
4789  * @param[in] dev
4790  *   Pointer to the rte_eth_dev structure.
4791  * @param[in] action_flags
4792  *   Holds the actions detected until now.
4793  * @param[in] action
4794  *   Pointer to the modify action.
4795  * @param[in] attr
4796  *   Pointer to the flow attributes.
4797  * @param[out] error
4798  *   Pointer to error structure.
4799  *
4800  * @return
4801  *   Number of header fields to modify (0 or more) on success,
4802  *   a negative errno value otherwise and rte_errno is set.
4803  */
4804 static int
4805 flow_dv_validate_action_modify_field(struct rte_eth_dev *dev,
4806                                    const uint64_t action_flags,
4807                                    const struct rte_flow_action *action,
4808                                    const struct rte_flow_attr *attr,
4809                                    struct rte_flow_error *error)
4810 {
4811         int ret = 0;
4812         struct mlx5_priv *priv = dev->data->dev_private;
4813         struct mlx5_dev_config *config = &priv->config;
4814         const struct rte_flow_action_modify_field *action_modify_field =
4815                 action->conf;
4816         uint32_t dst_width = mlx5_flow_item_field_width(priv,
4817                                 action_modify_field->dst.field, -1);
4818         uint32_t src_width = mlx5_flow_item_field_width(priv,
4819                                 action_modify_field->src.field, dst_width);
4820
4821         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4822         if (ret)
4823                 return ret;
4824
4825         if (action_modify_field->width == 0)
4826                 return rte_flow_error_set(error, EINVAL,
4827                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4828                                 "no bits are requested to be modified");
4829         else if (action_modify_field->width > dst_width ||
4830                  action_modify_field->width > src_width)
4831                 return rte_flow_error_set(error, EINVAL,
4832                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4833                                 "cannot modify more bits than"
4834                                 " the width of a field");
4835         if (action_modify_field->dst.field != RTE_FLOW_FIELD_VALUE &&
4836             action_modify_field->dst.field != RTE_FLOW_FIELD_POINTER) {
4837                 if ((action_modify_field->dst.offset +
4838                      action_modify_field->width > dst_width) ||
4839                     (action_modify_field->dst.offset % 32))
4840                         return rte_flow_error_set(error, EINVAL,
4841                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4842                                         "destination offset is too big"
4843                                         " or not aligned to 4 bytes");
4844                 if (action_modify_field->dst.level &&
4845                     action_modify_field->dst.field != RTE_FLOW_FIELD_TAG)
4846                         return rte_flow_error_set(error, ENOTSUP,
4847                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4848                                         "inner header fields modification"
4849                                         " is not supported");
4850         }
4851         if (action_modify_field->src.field != RTE_FLOW_FIELD_VALUE &&
4852             action_modify_field->src.field != RTE_FLOW_FIELD_POINTER) {
4853                 if (!attr->transfer && !attr->group)
4854                         return rte_flow_error_set(error, ENOTSUP,
4855                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4856                                         "modify field action is not"
4857                                         " supported for group 0");
4858                 if ((action_modify_field->src.offset +
4859                      action_modify_field->width > src_width) ||
4860                     (action_modify_field->src.offset % 32))
4861                         return rte_flow_error_set(error, EINVAL,
4862                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4863                                         "source offset is too big"
4864                                         " or not aligned to 4 bytes");
4865                 if (action_modify_field->src.level &&
4866                     action_modify_field->src.field != RTE_FLOW_FIELD_TAG)
4867                         return rte_flow_error_set(error, ENOTSUP,
4868                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4869                                         "inner header fields modification"
4870                                         " is not supported");
4871         }
4872         if ((action_modify_field->dst.field ==
4873              action_modify_field->src.field) &&
4874             (action_modify_field->dst.level ==
4875              action_modify_field->src.level))
4876                 return rte_flow_error_set(error, EINVAL,
4877                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4878                                 "source and destination fields"
4879                                 " cannot be the same");
4880         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VALUE ||
4881             action_modify_field->dst.field == RTE_FLOW_FIELD_POINTER ||
4882             action_modify_field->dst.field == RTE_FLOW_FIELD_MARK)
4883                 return rte_flow_error_set(error, EINVAL,
4884                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4885                                 "mark, immediate value or a pointer to it"
4886                                 " cannot be used as a destination");
4887         if (action_modify_field->dst.field == RTE_FLOW_FIELD_START ||
4888             action_modify_field->src.field == RTE_FLOW_FIELD_START)
4889                 return rte_flow_error_set(error, ENOTSUP,
4890                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4891                                 "modifications of an arbitrary"
4892                                 " place in a packet is not supported");
4893         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VLAN_TYPE ||
4894             action_modify_field->src.field == RTE_FLOW_FIELD_VLAN_TYPE)
4895                 return rte_flow_error_set(error, ENOTSUP,
4896                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4897                                 "modifications of the 802.1Q Tag"
4898                                 " Identifier is not supported");
4899         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VXLAN_VNI ||
4900             action_modify_field->src.field == RTE_FLOW_FIELD_VXLAN_VNI)
4901                 return rte_flow_error_set(error, ENOTSUP,
4902                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4903                                 "modifications of the VXLAN Network"
4904                                 " Identifier is not supported");
4905         if (action_modify_field->dst.field == RTE_FLOW_FIELD_GENEVE_VNI ||
4906             action_modify_field->src.field == RTE_FLOW_FIELD_GENEVE_VNI)
4907                 return rte_flow_error_set(error, ENOTSUP,
4908                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4909                                 "modifications of the GENEVE Network"
4910                                 " Identifier is not supported");
4911         if (action_modify_field->dst.field == RTE_FLOW_FIELD_MARK ||
4912             action_modify_field->src.field == RTE_FLOW_FIELD_MARK ||
4913             action_modify_field->dst.field == RTE_FLOW_FIELD_META ||
4914             action_modify_field->src.field == RTE_FLOW_FIELD_META) {
4915                 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4916                     !mlx5_flow_ext_mreg_supported(dev))
4917                         return rte_flow_error_set(error, ENOTSUP,
4918                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4919                                         "cannot modify mark or metadata without"
4920                                         " extended metadata register support");
4921         }
4922         if (action_modify_field->operation != RTE_FLOW_MODIFY_SET)
4923                 return rte_flow_error_set(error, ENOTSUP,
4924                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4925                                 "add and sub operations"
4926                                 " are not supported");
4927         return (action_modify_field->width / 32) +
4928                !!(action_modify_field->width % 32);
4929 }
4930
4931 /**
4932  * Validate jump action.
4933  *
4934  * @param[in] action
4935  *   Pointer to the jump action.
4936  * @param[in] action_flags
4937  *   Holds the actions detected until now.
4938  * @param[in] attributes
4939  *   Pointer to flow attributes
4940  * @param[in] external
4941  *   Action belongs to flow rule created by request external to PMD.
4942  * @param[out] error
4943  *   Pointer to error structure.
4944  *
4945  * @return
4946  *   0 on success, a negative errno value otherwise and rte_errno is set.
4947  */
4948 static int
4949 flow_dv_validate_action_jump(struct rte_eth_dev *dev,
4950                              const struct mlx5_flow_tunnel *tunnel,
4951                              const struct rte_flow_action *action,
4952                              uint64_t action_flags,
4953                              const struct rte_flow_attr *attributes,
4954                              bool external, struct rte_flow_error *error)
4955 {
4956         uint32_t target_group, table;
4957         int ret = 0;
4958         struct flow_grp_info grp_info = {
4959                 .external = !!external,
4960                 .transfer = !!attributes->transfer,
4961                 .fdb_def_rule = 1,
4962                 .std_tbl_fix = 0
4963         };
4964         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
4965                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
4966                 return rte_flow_error_set(error, EINVAL,
4967                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4968                                           "can't have 2 fate actions in"
4969                                           " same flow");
4970         if (!action->conf)
4971                 return rte_flow_error_set(error, EINVAL,
4972                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4973                                           NULL, "action configuration not set");
4974         target_group =
4975                 ((const struct rte_flow_action_jump *)action->conf)->group;
4976         ret = mlx5_flow_group_to_table(dev, tunnel, target_group, &table,
4977                                        &grp_info, error);
4978         if (ret)
4979                 return ret;
4980         if (attributes->group == target_group &&
4981             !(action_flags & (MLX5_FLOW_ACTION_TUNNEL_SET |
4982                               MLX5_FLOW_ACTION_TUNNEL_MATCH)))
4983                 return rte_flow_error_set(error, EINVAL,
4984                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4985                                           "target group must be other than"
4986                                           " the current flow group");
4987         return 0;
4988 }
4989
4990 /*
4991  * Validate action PORT_ID / REPRESENTED_PORT.
4992  *
4993  * @param[in] dev
4994  *   Pointer to rte_eth_dev structure.
4995  * @param[in] action_flags
4996  *   Bit-fields that holds the actions detected until now.
4997  * @param[in] action
4998  *   PORT_ID / REPRESENTED_PORT action structure.
4999  * @param[in] attr
5000  *   Attributes of flow that includes this action.
5001  * @param[out] error
5002  *   Pointer to error structure.
5003  *
5004  * @return
5005  *   0 on success, a negative errno value otherwise and rte_errno is set.
5006  */
5007 static int
5008 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
5009                                 uint64_t action_flags,
5010                                 const struct rte_flow_action *action,
5011                                 const struct rte_flow_attr *attr,
5012                                 struct rte_flow_error *error)
5013 {
5014         const struct rte_flow_action_port_id *port_id;
5015         const struct rte_flow_action_ethdev *ethdev;
5016         struct mlx5_priv *act_priv;
5017         struct mlx5_priv *dev_priv;
5018         uint16_t port;
5019
5020         if (!attr->transfer)
5021                 return rte_flow_error_set(error, ENOTSUP,
5022                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5023                                           NULL,
5024                                           "port action is valid in transfer"
5025                                           " mode only");
5026         if (!action || !action->conf)
5027                 return rte_flow_error_set(error, ENOTSUP,
5028                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5029                                           NULL,
5030                                           "port action parameters must be"
5031                                           " specified");
5032         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
5033                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5034                 return rte_flow_error_set(error, EINVAL,
5035                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5036                                           "can have only one fate actions in"
5037                                           " a flow");
5038         dev_priv = mlx5_dev_to_eswitch_info(dev);
5039         if (!dev_priv)
5040                 return rte_flow_error_set(error, rte_errno,
5041                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5042                                           NULL,
5043                                           "failed to obtain E-Switch info");
5044         switch (action->type) {
5045         case RTE_FLOW_ACTION_TYPE_PORT_ID:
5046                 port_id = action->conf;
5047                 port = port_id->original ? dev->data->port_id : port_id->id;
5048                 break;
5049         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
5050                 ethdev = action->conf;
5051                 port = ethdev->port_id;
5052                 break;
5053         default:
5054                 MLX5_ASSERT(false);
5055                 return rte_flow_error_set
5056                                 (error, EINVAL,
5057                                  RTE_FLOW_ERROR_TYPE_ACTION, action,
5058                                  "unknown E-Switch action");
5059         }
5060         act_priv = mlx5_port_to_eswitch_info(port, false);
5061         if (!act_priv)
5062                 return rte_flow_error_set
5063                                 (error, rte_errno,
5064                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, action->conf,
5065                                  "failed to obtain E-Switch port id for port");
5066         if (act_priv->domain_id != dev_priv->domain_id)
5067                 return rte_flow_error_set
5068                                 (error, EINVAL,
5069                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5070                                  "port does not belong to"
5071                                  " E-Switch being configured");
5072         return 0;
5073 }
5074
5075 /**
5076  * Get the maximum number of modify header actions.
5077  *
5078  * @param dev
5079  *   Pointer to rte_eth_dev structure.
5080  * @param root
5081  *   Whether action is on root table.
5082  *
5083  * @return
5084  *   Max number of modify header actions device can support.
5085  */
5086 static inline unsigned int
5087 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev __rte_unused,
5088                               bool root)
5089 {
5090         /*
5091          * There's no way to directly query the max capacity from FW.
5092          * The maximal value on root table should be assumed to be supported.
5093          */
5094         if (!root)
5095                 return MLX5_MAX_MODIFY_NUM;
5096         else
5097                 return MLX5_ROOT_TBL_MODIFY_NUM;
5098 }
5099
5100 /**
5101  * Validate the meter action.
5102  *
5103  * @param[in] dev
5104  *   Pointer to rte_eth_dev structure.
5105  * @param[in] action_flags
5106  *   Bit-fields that holds the actions detected until now.
5107  * @param[in] action
5108  *   Pointer to the meter action.
5109  * @param[in] attr
5110  *   Attributes of flow that includes this action.
5111  * @param[in] port_id_item
5112  *   Pointer to item indicating port id.
5113  * @param[out] error
5114  *   Pointer to error structure.
5115  *
5116  * @return
5117  *   0 on success, a negative errno value otherwise and rte_ernno is set.
5118  */
5119 static int
5120 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
5121                                 uint64_t action_flags,
5122                                 const struct rte_flow_action *action,
5123                                 const struct rte_flow_attr *attr,
5124                                 const struct rte_flow_item *port_id_item,
5125                                 bool *def_policy,
5126                                 struct rte_flow_error *error)
5127 {
5128         struct mlx5_priv *priv = dev->data->dev_private;
5129         const struct rte_flow_action_meter *am = action->conf;
5130         struct mlx5_flow_meter_info *fm;
5131         struct mlx5_flow_meter_policy *mtr_policy;
5132         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
5133
5134         if (!am)
5135                 return rte_flow_error_set(error, EINVAL,
5136                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5137                                           "meter action conf is NULL");
5138
5139         if (action_flags & MLX5_FLOW_ACTION_METER)
5140                 return rte_flow_error_set(error, ENOTSUP,
5141                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5142                                           "meter chaining not support");
5143         if (action_flags & MLX5_FLOW_ACTION_JUMP)
5144                 return rte_flow_error_set(error, ENOTSUP,
5145                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5146                                           "meter with jump not support");
5147         if (!priv->mtr_en)
5148                 return rte_flow_error_set(error, ENOTSUP,
5149                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5150                                           NULL,
5151                                           "meter action not supported");
5152         fm = mlx5_flow_meter_find(priv, am->mtr_id, NULL);
5153         if (!fm)
5154                 return rte_flow_error_set(error, EINVAL,
5155                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5156                                           "Meter not found");
5157         /* aso meter can always be shared by different domains */
5158         if (fm->ref_cnt && !priv->sh->meter_aso_en &&
5159             !(fm->transfer == attr->transfer ||
5160               (!fm->ingress && !attr->ingress && attr->egress) ||
5161               (!fm->egress && !attr->egress && attr->ingress)))
5162                 return rte_flow_error_set(error, EINVAL,
5163                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5164                         "Flow attributes domain are either invalid "
5165                         "or have a domain conflict with current "
5166                         "meter attributes");
5167         if (fm->def_policy) {
5168                 if (!((attr->transfer &&
5169                         mtrmng->def_policy[MLX5_MTR_DOMAIN_TRANSFER]) ||
5170                         (attr->egress &&
5171                         mtrmng->def_policy[MLX5_MTR_DOMAIN_EGRESS]) ||
5172                         (attr->ingress &&
5173                         mtrmng->def_policy[MLX5_MTR_DOMAIN_INGRESS])))
5174                         return rte_flow_error_set(error, EINVAL,
5175                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5176                                           "Flow attributes domain "
5177                                           "have a conflict with current "
5178                                           "meter domain attributes");
5179                 *def_policy = true;
5180         } else {
5181                 mtr_policy = mlx5_flow_meter_policy_find(dev,
5182                                                 fm->policy_id, NULL);
5183                 if (!mtr_policy)
5184                         return rte_flow_error_set(error, EINVAL,
5185                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5186                                           "Invalid policy id for meter ");
5187                 if (!((attr->transfer && mtr_policy->transfer) ||
5188                         (attr->egress && mtr_policy->egress) ||
5189                         (attr->ingress && mtr_policy->ingress)))
5190                         return rte_flow_error_set(error, EINVAL,
5191                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5192                                           "Flow attributes domain "
5193                                           "have a conflict with current "
5194                                           "meter domain attributes");
5195                 if (attr->transfer && mtr_policy->dev) {
5196                         /**
5197                          * When policy has fate action of port_id,
5198                          * the flow should have the same src port as policy.
5199                          */
5200                         struct mlx5_priv *policy_port_priv =
5201                                         mtr_policy->dev->data->dev_private;
5202                         int32_t flow_src_port = priv->representor_id;
5203
5204                         if (port_id_item) {
5205                                 const struct rte_flow_item_port_id *spec =
5206                                                         port_id_item->spec;
5207                                 struct mlx5_priv *port_priv =
5208                                         mlx5_port_to_eswitch_info(spec->id,
5209                                                                   false);
5210                                 if (!port_priv)
5211                                         return rte_flow_error_set(error,
5212                                                 rte_errno,
5213                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5214                                                 spec,
5215                                                 "Failed to get port info.");
5216                                 flow_src_port = port_priv->representor_id;
5217                         }
5218                         if (flow_src_port != policy_port_priv->representor_id)
5219                                 return rte_flow_error_set(error,
5220                                                 rte_errno,
5221                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5222                                                 NULL,
5223                                                 "Flow and meter policy "
5224                                                 "have different src port.");
5225                 }
5226                 *def_policy = false;
5227         }
5228         return 0;
5229 }
5230
5231 /**
5232  * Validate the age action.
5233  *
5234  * @param[in] action_flags
5235  *   Holds the actions detected until now.
5236  * @param[in] action
5237  *   Pointer to the age action.
5238  * @param[in] dev
5239  *   Pointer to the Ethernet device structure.
5240  * @param[out] error
5241  *   Pointer to error structure.
5242  *
5243  * @return
5244  *   0 on success, a negative errno value otherwise and rte_errno is set.
5245  */
5246 static int
5247 flow_dv_validate_action_age(uint64_t action_flags,
5248                             const struct rte_flow_action *action,
5249                             struct rte_eth_dev *dev,
5250                             struct rte_flow_error *error)
5251 {
5252         struct mlx5_priv *priv = dev->data->dev_private;
5253         const struct rte_flow_action_age *age = action->conf;
5254
5255         if (!priv->sh->devx || (priv->sh->cmng.counter_fallback &&
5256             !priv->sh->aso_age_mng))
5257                 return rte_flow_error_set(error, ENOTSUP,
5258                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5259                                           NULL,
5260                                           "age action not supported");
5261         if (!(action->conf))
5262                 return rte_flow_error_set(error, EINVAL,
5263                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5264                                           "configuration cannot be null");
5265         if (!(age->timeout))
5266                 return rte_flow_error_set(error, EINVAL,
5267                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5268                                           "invalid timeout value 0");
5269         if (action_flags & MLX5_FLOW_ACTION_AGE)
5270                 return rte_flow_error_set(error, EINVAL,
5271                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5272                                           "duplicate age actions set");
5273         return 0;
5274 }
5275
5276 /**
5277  * Validate the modify-header IPv4 DSCP actions.
5278  *
5279  * @param[in] action_flags
5280  *   Holds the actions detected until now.
5281  * @param[in] action
5282  *   Pointer to the modify action.
5283  * @param[in] item_flags
5284  *   Holds the items detected.
5285  * @param[out] error
5286  *   Pointer to error structure.
5287  *
5288  * @return
5289  *   0 on success, a negative errno value otherwise and rte_errno is set.
5290  */
5291 static int
5292 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
5293                                          const struct rte_flow_action *action,
5294                                          const uint64_t item_flags,
5295                                          struct rte_flow_error *error)
5296 {
5297         int ret = 0;
5298
5299         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5300         if (!ret) {
5301                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
5302                         return rte_flow_error_set(error, EINVAL,
5303                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5304                                                   NULL,
5305                                                   "no ipv4 item in pattern");
5306         }
5307         return ret;
5308 }
5309
5310 /**
5311  * Validate the modify-header IPv6 DSCP actions.
5312  *
5313  * @param[in] action_flags
5314  *   Holds the actions detected until now.
5315  * @param[in] action
5316  *   Pointer to the modify action.
5317  * @param[in] item_flags
5318  *   Holds the items detected.
5319  * @param[out] error
5320  *   Pointer to error structure.
5321  *
5322  * @return
5323  *   0 on success, a negative errno value otherwise and rte_errno is set.
5324  */
5325 static int
5326 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
5327                                          const struct rte_flow_action *action,
5328                                          const uint64_t item_flags,
5329                                          struct rte_flow_error *error)
5330 {
5331         int ret = 0;
5332
5333         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5334         if (!ret) {
5335                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
5336                         return rte_flow_error_set(error, EINVAL,
5337                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5338                                                   NULL,
5339                                                   "no ipv6 item in pattern");
5340         }
5341         return ret;
5342 }
5343
5344 int
5345 flow_dv_modify_match_cb(void *tool_ctx __rte_unused,
5346                         struct mlx5_list_entry *entry, void *cb_ctx)
5347 {
5348         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5349         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5350         struct mlx5_flow_dv_modify_hdr_resource *resource =
5351                                   container_of(entry, typeof(*resource), entry);
5352         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5353
5354         key_len += ref->actions_num * sizeof(ref->actions[0]);
5355         return ref->actions_num != resource->actions_num ||
5356                memcmp(&ref->ft_type, &resource->ft_type, key_len);
5357 }
5358
5359 static struct mlx5_indexed_pool *
5360 flow_dv_modify_ipool_get(struct mlx5_dev_ctx_shared *sh, uint8_t index)
5361 {
5362         struct mlx5_indexed_pool *ipool = __atomic_load_n
5363                                      (&sh->mdh_ipools[index], __ATOMIC_SEQ_CST);
5364
5365         if (!ipool) {
5366                 struct mlx5_indexed_pool *expected = NULL;
5367                 struct mlx5_indexed_pool_config cfg =
5368                     (struct mlx5_indexed_pool_config) {
5369                        .size = sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
5370                                                                    (index + 1) *
5371                                            sizeof(struct mlx5_modification_cmd),
5372                        .trunk_size = 64,
5373                        .grow_trunk = 3,
5374                        .grow_shift = 2,
5375                        .need_lock = 1,
5376                        .release_mem_en = !!sh->reclaim_mode,
5377                        .per_core_cache = sh->reclaim_mode ? 0 : (1 << 16),
5378                        .malloc = mlx5_malloc,
5379                        .free = mlx5_free,
5380                        .type = "mlx5_modify_action_resource",
5381                 };
5382
5383                 cfg.size = RTE_ALIGN(cfg.size, sizeof(ipool));
5384                 ipool = mlx5_ipool_create(&cfg);
5385                 if (!ipool)
5386                         return NULL;
5387                 if (!__atomic_compare_exchange_n(&sh->mdh_ipools[index],
5388                                                  &expected, ipool, false,
5389                                                  __ATOMIC_SEQ_CST,
5390                                                  __ATOMIC_SEQ_CST)) {
5391                         mlx5_ipool_destroy(ipool);
5392                         ipool = __atomic_load_n(&sh->mdh_ipools[index],
5393                                                 __ATOMIC_SEQ_CST);
5394                 }
5395         }
5396         return ipool;
5397 }
5398
5399 struct mlx5_list_entry *
5400 flow_dv_modify_create_cb(void *tool_ctx, void *cb_ctx)
5401 {
5402         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5403         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5404         struct mlx5dv_dr_domain *ns;
5405         struct mlx5_flow_dv_modify_hdr_resource *entry;
5406         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5407         struct mlx5_indexed_pool *ipool = flow_dv_modify_ipool_get(sh,
5408                                                           ref->actions_num - 1);
5409         int ret;
5410         uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5411         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5412         uint32_t idx;
5413
5414         if (unlikely(!ipool)) {
5415                 rte_flow_error_set(ctx->error, ENOMEM,
5416                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5417                                    NULL, "cannot allocate modify ipool");
5418                 return NULL;
5419         }
5420         entry = mlx5_ipool_zmalloc(ipool, &idx);
5421         if (!entry) {
5422                 rte_flow_error_set(ctx->error, ENOMEM,
5423                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5424                                    "cannot allocate resource memory");
5425                 return NULL;
5426         }
5427         rte_memcpy(&entry->ft_type,
5428                    RTE_PTR_ADD(ref, offsetof(typeof(*ref), ft_type)),
5429                    key_len + data_len);
5430         if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
5431                 ns = sh->fdb_domain;
5432         else if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
5433                 ns = sh->tx_domain;
5434         else
5435                 ns = sh->rx_domain;
5436         ret = mlx5_flow_os_create_flow_action_modify_header
5437                                         (sh->cdev->ctx, ns, entry,
5438                                          data_len, &entry->action);
5439         if (ret) {
5440                 mlx5_ipool_free(sh->mdh_ipools[ref->actions_num - 1], idx);
5441                 rte_flow_error_set(ctx->error, ENOMEM,
5442                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5443                                    NULL, "cannot create modification action");
5444                 return NULL;
5445         }
5446         entry->idx = idx;
5447         return &entry->entry;
5448 }
5449
5450 struct mlx5_list_entry *
5451 flow_dv_modify_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
5452                         void *cb_ctx)
5453 {
5454         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5455         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5456         struct mlx5_flow_dv_modify_hdr_resource *entry;
5457         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5458         uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5459         uint32_t idx;
5460
5461         entry = mlx5_ipool_malloc(sh->mdh_ipools[ref->actions_num - 1],
5462                                   &idx);
5463         if (!entry) {
5464                 rte_flow_error_set(ctx->error, ENOMEM,
5465                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5466                                    "cannot allocate resource memory");
5467                 return NULL;
5468         }
5469         memcpy(entry, oentry, sizeof(*entry) + data_len);
5470         entry->idx = idx;
5471         return &entry->entry;
5472 }
5473
5474 void
5475 flow_dv_modify_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
5476 {
5477         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5478         struct mlx5_flow_dv_modify_hdr_resource *res =
5479                 container_of(entry, typeof(*res), entry);
5480
5481         mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
5482 }
5483
5484 /**
5485  * Validate the sample action.
5486  *
5487  * @param[in, out] action_flags
5488  *   Holds the actions detected until now.
5489  * @param[in] action
5490  *   Pointer to the sample action.
5491  * @param[in] dev
5492  *   Pointer to the Ethernet device structure.
5493  * @param[in] attr
5494  *   Attributes of flow that includes this action.
5495  * @param[in] item_flags
5496  *   Holds the items detected.
5497  * @param[in] rss
5498  *   Pointer to the RSS action.
5499  * @param[out] sample_rss
5500  *   Pointer to the RSS action in sample action list.
5501  * @param[out] count
5502  *   Pointer to the COUNT action in sample action list.
5503  * @param[out] fdb_mirror_limit
5504  *   Pointer to the FDB mirror limitation flag.
5505  * @param[out] error
5506  *   Pointer to error structure.
5507  *
5508  * @return
5509  *   0 on success, a negative errno value otherwise and rte_errno is set.
5510  */
5511 static int
5512 flow_dv_validate_action_sample(uint64_t *action_flags,
5513                                const struct rte_flow_action *action,
5514                                struct rte_eth_dev *dev,
5515                                const struct rte_flow_attr *attr,
5516                                uint64_t item_flags,
5517                                const struct rte_flow_action_rss *rss,
5518                                const struct rte_flow_action_rss **sample_rss,
5519                                const struct rte_flow_action_count **count,
5520                                int *fdb_mirror_limit,
5521                                struct rte_flow_error *error)
5522 {
5523         struct mlx5_priv *priv = dev->data->dev_private;
5524         struct mlx5_dev_config *dev_conf = &priv->config;
5525         const struct rte_flow_action_sample *sample = action->conf;
5526         const struct rte_flow_action *act;
5527         uint64_t sub_action_flags = 0;
5528         uint16_t queue_index = 0xFFFF;
5529         int actions_n = 0;
5530         int ret;
5531
5532         if (!sample)
5533                 return rte_flow_error_set(error, EINVAL,
5534                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5535                                           "configuration cannot be NULL");
5536         if (sample->ratio == 0)
5537                 return rte_flow_error_set(error, EINVAL,
5538                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5539                                           "ratio value starts from 1");
5540         if (!priv->sh->devx || (sample->ratio > 0 && !priv->sampler_en))
5541                 return rte_flow_error_set(error, ENOTSUP,
5542                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5543                                           NULL,
5544                                           "sample action not supported");
5545         if (*action_flags & MLX5_FLOW_ACTION_SAMPLE)
5546                 return rte_flow_error_set(error, EINVAL,
5547                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5548                                           "Multiple sample actions not "
5549                                           "supported");
5550         if (*action_flags & MLX5_FLOW_ACTION_METER)
5551                 return rte_flow_error_set(error, EINVAL,
5552                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5553                                           "wrong action order, meter should "
5554                                           "be after sample action");
5555         if (*action_flags & MLX5_FLOW_ACTION_JUMP)
5556                 return rte_flow_error_set(error, EINVAL,
5557                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5558                                           "wrong action order, jump should "
5559                                           "be after sample action");
5560         act = sample->actions;
5561         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
5562                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
5563                         return rte_flow_error_set(error, ENOTSUP,
5564                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5565                                                   act, "too many actions");
5566                 switch (act->type) {
5567                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5568                         ret = mlx5_flow_validate_action_queue(act,
5569                                                               sub_action_flags,
5570                                                               dev,
5571                                                               attr, error);
5572                         if (ret < 0)
5573                                 return ret;
5574                         queue_index = ((const struct rte_flow_action_queue *)
5575                                                         (act->conf))->index;
5576                         sub_action_flags |= MLX5_FLOW_ACTION_QUEUE;
5577                         ++actions_n;
5578                         break;
5579                 case RTE_FLOW_ACTION_TYPE_RSS:
5580                         *sample_rss = act->conf;
5581                         ret = mlx5_flow_validate_action_rss(act,
5582                                                             sub_action_flags,
5583                                                             dev, attr,
5584                                                             item_flags,
5585                                                             error);
5586                         if (ret < 0)
5587                                 return ret;
5588                         if (rss && *sample_rss &&
5589                             ((*sample_rss)->level != rss->level ||
5590                             (*sample_rss)->types != rss->types))
5591                                 return rte_flow_error_set(error, ENOTSUP,
5592                                         RTE_FLOW_ERROR_TYPE_ACTION,
5593                                         NULL,
5594                                         "Can't use the different RSS types "
5595                                         "or level in the same flow");
5596                         if (*sample_rss != NULL && (*sample_rss)->queue_num)
5597                                 queue_index = (*sample_rss)->queue[0];
5598                         sub_action_flags |= MLX5_FLOW_ACTION_RSS;
5599                         ++actions_n;
5600                         break;
5601                 case RTE_FLOW_ACTION_TYPE_MARK:
5602                         ret = flow_dv_validate_action_mark(dev, act,
5603                                                            sub_action_flags,
5604                                                            attr, error);
5605                         if (ret < 0)
5606                                 return ret;
5607                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
5608                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK |
5609                                                 MLX5_FLOW_ACTION_MARK_EXT;
5610                         else
5611                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK;
5612                         ++actions_n;
5613                         break;
5614                 case RTE_FLOW_ACTION_TYPE_COUNT:
5615                         ret = flow_dv_validate_action_count
5616                                 (dev, false, *action_flags | sub_action_flags,
5617                                  error);
5618                         if (ret < 0)
5619                                 return ret;
5620                         *count = act->conf;
5621                         sub_action_flags |= MLX5_FLOW_ACTION_COUNT;
5622                         *action_flags |= MLX5_FLOW_ACTION_COUNT;
5623                         ++actions_n;
5624                         break;
5625                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5626                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
5627                         ret = flow_dv_validate_action_port_id(dev,
5628                                                               sub_action_flags,
5629                                                               act,
5630                                                               attr,
5631                                                               error);
5632                         if (ret)
5633                                 return ret;
5634                         sub_action_flags |= MLX5_FLOW_ACTION_PORT_ID;
5635                         ++actions_n;
5636                         break;
5637                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5638                         ret = flow_dv_validate_action_raw_encap_decap
5639                                 (dev, NULL, act->conf, attr, &sub_action_flags,
5640                                  &actions_n, action, item_flags, error);
5641                         if (ret < 0)
5642                                 return ret;
5643                         ++actions_n;
5644                         break;
5645                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5646                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5647                         ret = flow_dv_validate_action_l2_encap(dev,
5648                                                                sub_action_flags,
5649                                                                act, attr,
5650                                                                error);
5651                         if (ret < 0)
5652                                 return ret;
5653                         sub_action_flags |= MLX5_FLOW_ACTION_ENCAP;
5654                         ++actions_n;
5655                         break;
5656                 default:
5657                         return rte_flow_error_set(error, ENOTSUP,
5658                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5659                                                   NULL,
5660                                                   "Doesn't support optional "
5661                                                   "action");
5662                 }
5663         }
5664         if (attr->ingress && !attr->transfer) {
5665                 if (!(sub_action_flags & (MLX5_FLOW_ACTION_QUEUE |
5666                                           MLX5_FLOW_ACTION_RSS)))
5667                         return rte_flow_error_set(error, EINVAL,
5668                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5669                                                   NULL,
5670                                                   "Ingress must has a dest "
5671                                                   "QUEUE for Sample");
5672         } else if (attr->egress && !attr->transfer) {
5673                 return rte_flow_error_set(error, ENOTSUP,
5674                                           RTE_FLOW_ERROR_TYPE_ACTION,
5675                                           NULL,
5676                                           "Sample Only support Ingress "
5677                                           "or E-Switch");
5678         } else if (sample->actions->type != RTE_FLOW_ACTION_TYPE_END) {
5679                 MLX5_ASSERT(attr->transfer);
5680                 if (sample->ratio > 1)
5681                         return rte_flow_error_set(error, ENOTSUP,
5682                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5683                                                   NULL,
5684                                                   "E-Switch doesn't support "
5685                                                   "any optional action "
5686                                                   "for sampling");
5687                 if (sub_action_flags & MLX5_FLOW_ACTION_QUEUE)
5688                         return rte_flow_error_set(error, ENOTSUP,
5689                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5690                                                   NULL,
5691                                                   "unsupported action QUEUE");
5692                 if (sub_action_flags & MLX5_FLOW_ACTION_RSS)
5693                         return rte_flow_error_set(error, ENOTSUP,
5694                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5695                                                   NULL,
5696                                                   "unsupported action QUEUE");
5697                 if (!(sub_action_flags & MLX5_FLOW_ACTION_PORT_ID))
5698                         return rte_flow_error_set(error, EINVAL,
5699                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5700                                                   NULL,
5701                                                   "E-Switch must has a dest "
5702                                                   "port for mirroring");
5703                 if (!priv->config.hca_attr.reg_c_preserve &&
5704                      priv->representor_id != UINT16_MAX)
5705                         *fdb_mirror_limit = 1;
5706         }
5707         /* Continue validation for Xcap actions.*/
5708         if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) &&
5709             (queue_index == 0xFFFF ||
5710              mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
5711                 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5712                      MLX5_FLOW_XCAP_ACTIONS)
5713                         return rte_flow_error_set(error, ENOTSUP,
5714                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5715                                                   NULL, "encap and decap "
5716                                                   "combination aren't "
5717                                                   "supported");
5718                 if (!attr->transfer && attr->ingress && (sub_action_flags &
5719                                                         MLX5_FLOW_ACTION_ENCAP))
5720                         return rte_flow_error_set(error, ENOTSUP,
5721                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5722                                                   NULL, "encap is not supported"
5723                                                   " for ingress traffic");
5724         }
5725         return 0;
5726 }
5727
5728 /**
5729  * Find existing modify-header resource or create and register a new one.
5730  *
5731  * @param dev[in, out]
5732  *   Pointer to rte_eth_dev structure.
5733  * @param[in, out] resource
5734  *   Pointer to modify-header resource.
5735  * @parm[in, out] dev_flow
5736  *   Pointer to the dev_flow.
5737  * @param[out] error
5738  *   pointer to error structure.
5739  *
5740  * @return
5741  *   0 on success otherwise -errno and errno is set.
5742  */
5743 static int
5744 flow_dv_modify_hdr_resource_register
5745                         (struct rte_eth_dev *dev,
5746                          struct mlx5_flow_dv_modify_hdr_resource *resource,
5747                          struct mlx5_flow *dev_flow,
5748                          struct rte_flow_error *error)
5749 {
5750         struct mlx5_priv *priv = dev->data->dev_private;
5751         struct mlx5_dev_ctx_shared *sh = priv->sh;
5752         uint32_t key_len = sizeof(*resource) -
5753                            offsetof(typeof(*resource), ft_type) +
5754                            resource->actions_num * sizeof(resource->actions[0]);
5755         struct mlx5_list_entry *entry;
5756         struct mlx5_flow_cb_ctx ctx = {
5757                 .error = error,
5758                 .data = resource,
5759         };
5760         struct mlx5_hlist *modify_cmds;
5761         uint64_t key64;
5762
5763         modify_cmds = flow_dv_hlist_prepare(sh, &sh->modify_cmds,
5764                                 "hdr_modify",
5765                                 MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
5766                                 true, false, sh,
5767                                 flow_dv_modify_create_cb,
5768                                 flow_dv_modify_match_cb,
5769                                 flow_dv_modify_remove_cb,
5770                                 flow_dv_modify_clone_cb,
5771                                 flow_dv_modify_clone_free_cb);
5772         if (unlikely(!modify_cmds))
5773                 return -rte_errno;
5774         resource->root = !dev_flow->dv.group;
5775         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
5776                                                                 resource->root))
5777                 return rte_flow_error_set(error, EOVERFLOW,
5778                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5779                                           "too many modify header items");
5780         key64 = __rte_raw_cksum(&resource->ft_type, key_len, 0);
5781         entry = mlx5_hlist_register(modify_cmds, key64, &ctx);
5782         if (!entry)
5783                 return -rte_errno;
5784         resource = container_of(entry, typeof(*resource), entry);
5785         dev_flow->handle->dvh.modify_hdr = resource;
5786         return 0;
5787 }
5788
5789 /**
5790  * Get DV flow counter by index.
5791  *
5792  * @param[in] dev
5793  *   Pointer to the Ethernet device structure.
5794  * @param[in] idx
5795  *   mlx5 flow counter index in the container.
5796  * @param[out] ppool
5797  *   mlx5 flow counter pool in the container.
5798  *
5799  * @return
5800  *   Pointer to the counter, NULL otherwise.
5801  */
5802 static struct mlx5_flow_counter *
5803 flow_dv_counter_get_by_idx(struct rte_eth_dev *dev,
5804                            uint32_t idx,
5805                            struct mlx5_flow_counter_pool **ppool)
5806 {
5807         struct mlx5_priv *priv = dev->data->dev_private;
5808         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5809         struct mlx5_flow_counter_pool *pool;
5810
5811         /* Decrease to original index and clear shared bit. */
5812         idx = (idx - 1) & (MLX5_CNT_SHARED_OFFSET - 1);
5813         MLX5_ASSERT(idx / MLX5_COUNTERS_PER_POOL < cmng->n);
5814         pool = cmng->pools[idx / MLX5_COUNTERS_PER_POOL];
5815         MLX5_ASSERT(pool);
5816         if (ppool)
5817                 *ppool = pool;
5818         return MLX5_POOL_GET_CNT(pool, idx % MLX5_COUNTERS_PER_POOL);
5819 }
5820
5821 /**
5822  * Check the devx counter belongs to the pool.
5823  *
5824  * @param[in] pool
5825  *   Pointer to the counter pool.
5826  * @param[in] id
5827  *   The counter devx ID.
5828  *
5829  * @return
5830  *   True if counter belongs to the pool, false otherwise.
5831  */
5832 static bool
5833 flow_dv_is_counter_in_pool(struct mlx5_flow_counter_pool *pool, int id)
5834 {
5835         int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
5836                    MLX5_COUNTERS_PER_POOL;
5837
5838         if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
5839                 return true;
5840         return false;
5841 }
5842
5843 /**
5844  * Get a pool by devx counter ID.
5845  *
5846  * @param[in] cmng
5847  *   Pointer to the counter management.
5848  * @param[in] id
5849  *   The counter devx ID.
5850  *
5851  * @return
5852  *   The counter pool pointer if exists, NULL otherwise,
5853  */
5854 static struct mlx5_flow_counter_pool *
5855 flow_dv_find_pool_by_id(struct mlx5_flow_counter_mng *cmng, int id)
5856 {
5857         uint32_t i;
5858         struct mlx5_flow_counter_pool *pool = NULL;
5859
5860         rte_spinlock_lock(&cmng->pool_update_sl);
5861         /* Check last used pool. */
5862         if (cmng->last_pool_idx != POOL_IDX_INVALID &&
5863             flow_dv_is_counter_in_pool(cmng->pools[cmng->last_pool_idx], id)) {
5864                 pool = cmng->pools[cmng->last_pool_idx];
5865                 goto out;
5866         }
5867         /* ID out of range means no suitable pool in the container. */
5868         if (id > cmng->max_id || id < cmng->min_id)
5869                 goto out;
5870         /*
5871          * Find the pool from the end of the container, since mostly counter
5872          * ID is sequence increasing, and the last pool should be the needed
5873          * one.
5874          */
5875         i = cmng->n_valid;
5876         while (i--) {
5877                 struct mlx5_flow_counter_pool *pool_tmp = cmng->pools[i];
5878
5879                 if (flow_dv_is_counter_in_pool(pool_tmp, id)) {
5880                         pool = pool_tmp;
5881                         break;
5882                 }
5883         }
5884 out:
5885         rte_spinlock_unlock(&cmng->pool_update_sl);
5886         return pool;
5887 }
5888
5889 /**
5890  * Resize a counter container.
5891  *
5892  * @param[in] dev
5893  *   Pointer to the Ethernet device structure.
5894  *
5895  * @return
5896  *   0 on success, otherwise negative errno value and rte_errno is set.
5897  */
5898 static int
5899 flow_dv_container_resize(struct rte_eth_dev *dev)
5900 {
5901         struct mlx5_priv *priv = dev->data->dev_private;
5902         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5903         void *old_pools = cmng->pools;
5904         uint32_t resize = cmng->n + MLX5_CNT_CONTAINER_RESIZE;
5905         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
5906         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
5907
5908         if (!pools) {
5909                 rte_errno = ENOMEM;
5910                 return -ENOMEM;
5911         }
5912         if (old_pools)
5913                 memcpy(pools, old_pools, cmng->n *
5914                                        sizeof(struct mlx5_flow_counter_pool *));
5915         cmng->n = resize;
5916         cmng->pools = pools;
5917         if (old_pools)
5918                 mlx5_free(old_pools);
5919         return 0;
5920 }
5921
5922 /**
5923  * Query a devx flow counter.
5924  *
5925  * @param[in] dev
5926  *   Pointer to the Ethernet device structure.
5927  * @param[in] counter
5928  *   Index to the flow counter.
5929  * @param[out] pkts
5930  *   The statistics value of packets.
5931  * @param[out] bytes
5932  *   The statistics value of bytes.
5933  *
5934  * @return
5935  *   0 on success, otherwise a negative errno value and rte_errno is set.
5936  */
5937 static inline int
5938 _flow_dv_query_count(struct rte_eth_dev *dev, uint32_t counter, uint64_t *pkts,
5939                      uint64_t *bytes)
5940 {
5941         struct mlx5_priv *priv = dev->data->dev_private;
5942         struct mlx5_flow_counter_pool *pool = NULL;
5943         struct mlx5_flow_counter *cnt;
5944         int offset;
5945
5946         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
5947         MLX5_ASSERT(pool);
5948         if (priv->sh->cmng.counter_fallback)
5949                 return mlx5_devx_cmd_flow_counter_query(cnt->dcs_when_active, 0,
5950                                         0, pkts, bytes, 0, NULL, NULL, 0);
5951         rte_spinlock_lock(&pool->sl);
5952         if (!pool->raw) {
5953                 *pkts = 0;
5954                 *bytes = 0;
5955         } else {
5956                 offset = MLX5_CNT_ARRAY_IDX(pool, cnt);
5957                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
5958                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
5959         }
5960         rte_spinlock_unlock(&pool->sl);
5961         return 0;
5962 }
5963
5964 /**
5965  * Create and initialize a new counter pool.
5966  *
5967  * @param[in] dev
5968  *   Pointer to the Ethernet device structure.
5969  * @param[out] dcs
5970  *   The devX counter handle.
5971  * @param[in] age
5972  *   Whether the pool is for counter that was allocated for aging.
5973  * @param[in/out] cont_cur
5974  *   Pointer to the container pointer, it will be update in pool resize.
5975  *
5976  * @return
5977  *   The pool container pointer on success, NULL otherwise and rte_errno is set.
5978  */
5979 static struct mlx5_flow_counter_pool *
5980 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
5981                     uint32_t age)
5982 {
5983         struct mlx5_priv *priv = dev->data->dev_private;
5984         struct mlx5_flow_counter_pool *pool;
5985         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5986         bool fallback = priv->sh->cmng.counter_fallback;
5987         uint32_t size = sizeof(*pool);
5988
5989         size += MLX5_COUNTERS_PER_POOL * MLX5_CNT_SIZE;
5990         size += (!age ? 0 : MLX5_COUNTERS_PER_POOL * MLX5_AGE_SIZE);
5991         pool = mlx5_malloc(MLX5_MEM_ZERO, size, 0, SOCKET_ID_ANY);
5992         if (!pool) {
5993                 rte_errno = ENOMEM;
5994                 return NULL;
5995         }
5996         pool->raw = NULL;
5997         pool->is_aged = !!age;
5998         pool->query_gen = 0;
5999         pool->min_dcs = dcs;
6000         rte_spinlock_init(&pool->sl);
6001         rte_spinlock_init(&pool->csl);
6002         TAILQ_INIT(&pool->counters[0]);
6003         TAILQ_INIT(&pool->counters[1]);
6004         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
6005         rte_spinlock_lock(&cmng->pool_update_sl);
6006         pool->index = cmng->n_valid;
6007         if (pool->index == cmng->n && flow_dv_container_resize(dev)) {
6008                 mlx5_free(pool);
6009                 rte_spinlock_unlock(&cmng->pool_update_sl);
6010                 return NULL;
6011         }
6012         cmng->pools[pool->index] = pool;
6013         cmng->n_valid++;
6014         if (unlikely(fallback)) {
6015                 int base = RTE_ALIGN_FLOOR(dcs->id, MLX5_COUNTERS_PER_POOL);
6016
6017                 if (base < cmng->min_id)
6018                         cmng->min_id = base;
6019                 if (base > cmng->max_id)
6020                         cmng->max_id = base + MLX5_COUNTERS_PER_POOL - 1;
6021                 cmng->last_pool_idx = pool->index;
6022         }
6023         rte_spinlock_unlock(&cmng->pool_update_sl);
6024         return pool;
6025 }
6026
6027 /**
6028  * Prepare a new counter and/or a new counter pool.
6029  *
6030  * @param[in] dev
6031  *   Pointer to the Ethernet device structure.
6032  * @param[out] cnt_free
6033  *   Where to put the pointer of a new counter.
6034  * @param[in] age
6035  *   Whether the pool is for counter that was allocated for aging.
6036  *
6037  * @return
6038  *   The counter pool pointer and @p cnt_free is set on success,
6039  *   NULL otherwise and rte_errno is set.
6040  */
6041 static struct mlx5_flow_counter_pool *
6042 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
6043                              struct mlx5_flow_counter **cnt_free,
6044                              uint32_t age)
6045 {
6046         struct mlx5_priv *priv = dev->data->dev_private;
6047         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6048         struct mlx5_flow_counter_pool *pool;
6049         struct mlx5_counters tmp_tq;
6050         struct mlx5_devx_obj *dcs = NULL;
6051         struct mlx5_flow_counter *cnt;
6052         enum mlx5_counter_type cnt_type =
6053                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6054         bool fallback = priv->sh->cmng.counter_fallback;
6055         uint32_t i;
6056
6057         if (fallback) {
6058                 /* bulk_bitmap must be 0 for single counter allocation. */
6059                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0);
6060                 if (!dcs)
6061                         return NULL;
6062                 pool = flow_dv_find_pool_by_id(cmng, dcs->id);
6063                 if (!pool) {
6064                         pool = flow_dv_pool_create(dev, dcs, age);
6065                         if (!pool) {
6066                                 mlx5_devx_cmd_destroy(dcs);
6067                                 return NULL;
6068                         }
6069                 }
6070                 i = dcs->id % MLX5_COUNTERS_PER_POOL;
6071                 cnt = MLX5_POOL_GET_CNT(pool, i);
6072                 cnt->pool = pool;
6073                 cnt->dcs_when_free = dcs;
6074                 *cnt_free = cnt;
6075                 return pool;
6076         }
6077         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0x4);
6078         if (!dcs) {
6079                 rte_errno = ENODATA;
6080                 return NULL;
6081         }
6082         pool = flow_dv_pool_create(dev, dcs, age);
6083         if (!pool) {
6084                 mlx5_devx_cmd_destroy(dcs);
6085                 return NULL;
6086         }
6087         TAILQ_INIT(&tmp_tq);
6088         for (i = 1; i < MLX5_COUNTERS_PER_POOL; ++i) {
6089                 cnt = MLX5_POOL_GET_CNT(pool, i);
6090                 cnt->pool = pool;
6091                 TAILQ_INSERT_HEAD(&tmp_tq, cnt, next);
6092         }
6093         rte_spinlock_lock(&cmng->csl[cnt_type]);
6094         TAILQ_CONCAT(&cmng->counters[cnt_type], &tmp_tq, next);
6095         rte_spinlock_unlock(&cmng->csl[cnt_type]);
6096         *cnt_free = MLX5_POOL_GET_CNT(pool, 0);
6097         (*cnt_free)->pool = pool;
6098         return pool;
6099 }
6100
6101 /**
6102  * Allocate a flow counter.
6103  *
6104  * @param[in] dev
6105  *   Pointer to the Ethernet device structure.
6106  * @param[in] age
6107  *   Whether the counter was allocated for aging.
6108  *
6109  * @return
6110  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
6111  */
6112 static uint32_t
6113 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t age)
6114 {
6115         struct mlx5_priv *priv = dev->data->dev_private;
6116         struct mlx5_flow_counter_pool *pool = NULL;
6117         struct mlx5_flow_counter *cnt_free = NULL;
6118         bool fallback = priv->sh->cmng.counter_fallback;
6119         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6120         enum mlx5_counter_type cnt_type =
6121                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6122         uint32_t cnt_idx;
6123
6124         if (!priv->sh->devx) {
6125                 rte_errno = ENOTSUP;
6126                 return 0;
6127         }
6128         /* Get free counters from container. */
6129         rte_spinlock_lock(&cmng->csl[cnt_type]);
6130         cnt_free = TAILQ_FIRST(&cmng->counters[cnt_type]);
6131         if (cnt_free)
6132                 TAILQ_REMOVE(&cmng->counters[cnt_type], cnt_free, next);
6133         rte_spinlock_unlock(&cmng->csl[cnt_type]);
6134         if (!cnt_free && !flow_dv_counter_pool_prepare(dev, &cnt_free, age))
6135                 goto err;
6136         pool = cnt_free->pool;
6137         if (fallback)
6138                 cnt_free->dcs_when_active = cnt_free->dcs_when_free;
6139         /* Create a DV counter action only in the first time usage. */
6140         if (!cnt_free->action) {
6141                 uint16_t offset;
6142                 struct mlx5_devx_obj *dcs;
6143                 int ret;
6144
6145                 if (!fallback) {
6146                         offset = MLX5_CNT_ARRAY_IDX(pool, cnt_free);
6147                         dcs = pool->min_dcs;
6148                 } else {
6149                         offset = 0;
6150                         dcs = cnt_free->dcs_when_free;
6151                 }
6152                 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, offset,
6153                                                             &cnt_free->action);
6154                 if (ret) {
6155                         rte_errno = errno;
6156                         goto err;
6157                 }
6158         }
6159         cnt_idx = MLX5_MAKE_CNT_IDX(pool->index,
6160                                 MLX5_CNT_ARRAY_IDX(pool, cnt_free));
6161         /* Update the counter reset values. */
6162         if (_flow_dv_query_count(dev, cnt_idx, &cnt_free->hits,
6163                                  &cnt_free->bytes))
6164                 goto err;
6165         if (!fallback && !priv->sh->cmng.query_thread_on)
6166                 /* Start the asynchronous batch query by the host thread. */
6167                 mlx5_set_query_alarm(priv->sh);
6168         /*
6169          * When the count action isn't shared (by ID), shared_info field is
6170          * used for indirect action API's refcnt.
6171          * When the counter action is not shared neither by ID nor by indirect
6172          * action API, shared info must be 1.
6173          */
6174         cnt_free->shared_info.refcnt = 1;
6175         return cnt_idx;
6176 err:
6177         if (cnt_free) {
6178                 cnt_free->pool = pool;
6179                 if (fallback)
6180                         cnt_free->dcs_when_free = cnt_free->dcs_when_active;
6181                 rte_spinlock_lock(&cmng->csl[cnt_type]);
6182                 TAILQ_INSERT_TAIL(&cmng->counters[cnt_type], cnt_free, next);
6183                 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6184         }
6185         return 0;
6186 }
6187
6188 /**
6189  * Get age param from counter index.
6190  *
6191  * @param[in] dev
6192  *   Pointer to the Ethernet device structure.
6193  * @param[in] counter
6194  *   Index to the counter handler.
6195  *
6196  * @return
6197  *   The aging parameter specified for the counter index.
6198  */
6199 static struct mlx5_age_param*
6200 flow_dv_counter_idx_get_age(struct rte_eth_dev *dev,
6201                                 uint32_t counter)
6202 {
6203         struct mlx5_flow_counter *cnt;
6204         struct mlx5_flow_counter_pool *pool = NULL;
6205
6206         flow_dv_counter_get_by_idx(dev, counter, &pool);
6207         counter = (counter - 1) % MLX5_COUNTERS_PER_POOL;
6208         cnt = MLX5_POOL_GET_CNT(pool, counter);
6209         return MLX5_CNT_TO_AGE(cnt);
6210 }
6211
6212 /**
6213  * Remove a flow counter from aged counter list.
6214  *
6215  * @param[in] dev
6216  *   Pointer to the Ethernet device structure.
6217  * @param[in] counter
6218  *   Index to the counter handler.
6219  * @param[in] cnt
6220  *   Pointer to the counter handler.
6221  */
6222 static void
6223 flow_dv_counter_remove_from_age(struct rte_eth_dev *dev,
6224                                 uint32_t counter, struct mlx5_flow_counter *cnt)
6225 {
6226         struct mlx5_age_info *age_info;
6227         struct mlx5_age_param *age_param;
6228         struct mlx5_priv *priv = dev->data->dev_private;
6229         uint16_t expected = AGE_CANDIDATE;
6230
6231         age_info = GET_PORT_AGE_INFO(priv);
6232         age_param = flow_dv_counter_idx_get_age(dev, counter);
6233         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
6234                                          AGE_FREE, false, __ATOMIC_RELAXED,
6235                                          __ATOMIC_RELAXED)) {
6236                 /**
6237                  * We need the lock even it is age timeout,
6238                  * since counter may still in process.
6239                  */
6240                 rte_spinlock_lock(&age_info->aged_sl);
6241                 TAILQ_REMOVE(&age_info->aged_counters, cnt, next);
6242                 rte_spinlock_unlock(&age_info->aged_sl);
6243                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
6244         }
6245 }
6246
6247 /**
6248  * Release a flow counter.
6249  *
6250  * @param[in] dev
6251  *   Pointer to the Ethernet device structure.
6252  * @param[in] counter
6253  *   Index to the counter handler.
6254  */
6255 static void
6256 flow_dv_counter_free(struct rte_eth_dev *dev, uint32_t counter)
6257 {
6258         struct mlx5_priv *priv = dev->data->dev_private;
6259         struct mlx5_flow_counter_pool *pool = NULL;
6260         struct mlx5_flow_counter *cnt;
6261         enum mlx5_counter_type cnt_type;
6262
6263         if (!counter)
6264                 return;
6265         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
6266         MLX5_ASSERT(pool);
6267         if (pool->is_aged) {
6268                 flow_dv_counter_remove_from_age(dev, counter, cnt);
6269         } else {
6270                 /*
6271                  * If the counter action is shared by indirect action API,
6272                  * the atomic function reduces its references counter.
6273                  * If after the reduction the action is still referenced, the
6274                  * function returns here and does not release it.
6275                  * When the counter action is not shared by
6276                  * indirect action API, shared info is 1 before the reduction,
6277                  * so this condition is failed and function doesn't return here.
6278                  */
6279                 if (__atomic_sub_fetch(&cnt->shared_info.refcnt, 1,
6280                                        __ATOMIC_RELAXED))
6281                         return;
6282         }
6283         cnt->pool = pool;
6284         /*
6285          * Put the counter back to list to be updated in none fallback mode.
6286          * Currently, we are using two list alternately, while one is in query,
6287          * add the freed counter to the other list based on the pool query_gen
6288          * value. After query finishes, add counter the list to the global
6289          * container counter list. The list changes while query starts. In
6290          * this case, lock will not be needed as query callback and release
6291          * function both operate with the different list.
6292          */
6293         if (!priv->sh->cmng.counter_fallback) {
6294                 rte_spinlock_lock(&pool->csl);
6295                 TAILQ_INSERT_TAIL(&pool->counters[pool->query_gen], cnt, next);
6296                 rte_spinlock_unlock(&pool->csl);
6297         } else {
6298                 cnt->dcs_when_free = cnt->dcs_when_active;
6299                 cnt_type = pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6300                                            MLX5_COUNTER_TYPE_ORIGIN;
6301                 rte_spinlock_lock(&priv->sh->cmng.csl[cnt_type]);
6302                 TAILQ_INSERT_TAIL(&priv->sh->cmng.counters[cnt_type],
6303                                   cnt, next);
6304                 rte_spinlock_unlock(&priv->sh->cmng.csl[cnt_type]);
6305         }
6306 }
6307
6308 /**
6309  * Resize a meter id container.
6310  *
6311  * @param[in] dev
6312  *   Pointer to the Ethernet device structure.
6313  *
6314  * @return
6315  *   0 on success, otherwise negative errno value and rte_errno is set.
6316  */
6317 static int
6318 flow_dv_mtr_container_resize(struct rte_eth_dev *dev)
6319 {
6320         struct mlx5_priv *priv = dev->data->dev_private;
6321         struct mlx5_aso_mtr_pools_mng *pools_mng =
6322                                 &priv->sh->mtrmng->pools_mng;
6323         void *old_pools = pools_mng->pools;
6324         uint32_t resize = pools_mng->n + MLX5_MTRS_CONTAINER_RESIZE;
6325         uint32_t mem_size = sizeof(struct mlx5_aso_mtr_pool *) * resize;
6326         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
6327
6328         if (!pools) {
6329                 rte_errno = ENOMEM;
6330                 return -ENOMEM;
6331         }
6332         if (!pools_mng->n)
6333                 if (mlx5_aso_queue_init(priv->sh, ASO_OPC_MOD_POLICER)) {
6334                         mlx5_free(pools);
6335                         return -ENOMEM;
6336                 }
6337         if (old_pools)
6338                 memcpy(pools, old_pools, pools_mng->n *
6339                                        sizeof(struct mlx5_aso_mtr_pool *));
6340         pools_mng->n = resize;
6341         pools_mng->pools = pools;
6342         if (old_pools)
6343                 mlx5_free(old_pools);
6344         return 0;
6345 }
6346
6347 /**
6348  * Prepare a new meter and/or a new meter pool.
6349  *
6350  * @param[in] dev
6351  *   Pointer to the Ethernet device structure.
6352  * @param[out] mtr_free
6353  *   Where to put the pointer of a new meter.g.
6354  *
6355  * @return
6356  *   The meter pool pointer and @mtr_free is set on success,
6357  *   NULL otherwise and rte_errno is set.
6358  */
6359 static struct mlx5_aso_mtr_pool *
6360 flow_dv_mtr_pool_create(struct rte_eth_dev *dev,
6361                              struct mlx5_aso_mtr **mtr_free)
6362 {
6363         struct mlx5_priv *priv = dev->data->dev_private;
6364         struct mlx5_aso_mtr_pools_mng *pools_mng =
6365                                 &priv->sh->mtrmng->pools_mng;
6366         struct mlx5_aso_mtr_pool *pool = NULL;
6367         struct mlx5_devx_obj *dcs = NULL;
6368         uint32_t i;
6369         uint32_t log_obj_size;
6370
6371         log_obj_size = rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
6372         dcs = mlx5_devx_cmd_create_flow_meter_aso_obj(priv->sh->cdev->ctx,
6373                         priv->sh->pdn, log_obj_size);
6374         if (!dcs) {
6375                 rte_errno = ENODATA;
6376                 return NULL;
6377         }
6378         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
6379         if (!pool) {
6380                 rte_errno = ENOMEM;
6381                 claim_zero(mlx5_devx_cmd_destroy(dcs));
6382                 return NULL;
6383         }
6384         pool->devx_obj = dcs;
6385         pool->index = pools_mng->n_valid;
6386         if (pool->index == pools_mng->n && flow_dv_mtr_container_resize(dev)) {
6387                 mlx5_free(pool);
6388                 claim_zero(mlx5_devx_cmd_destroy(dcs));
6389                 return NULL;
6390         }
6391         pools_mng->pools[pool->index] = pool;
6392         pools_mng->n_valid++;
6393         for (i = 1; i < MLX5_ASO_MTRS_PER_POOL; ++i) {
6394                 pool->mtrs[i].offset = i;
6395                 LIST_INSERT_HEAD(&pools_mng->meters,
6396                                                 &pool->mtrs[i], next);
6397         }
6398         pool->mtrs[0].offset = 0;
6399         *mtr_free = &pool->mtrs[0];
6400         return pool;
6401 }
6402
6403 /**
6404  * Release a flow meter into pool.
6405  *
6406  * @param[in] dev
6407  *   Pointer to the Ethernet device structure.
6408  * @param[in] mtr_idx
6409  *   Index to aso flow meter.
6410  */
6411 static void
6412 flow_dv_aso_mtr_release_to_pool(struct rte_eth_dev *dev, uint32_t mtr_idx)
6413 {
6414         struct mlx5_priv *priv = dev->data->dev_private;
6415         struct mlx5_aso_mtr_pools_mng *pools_mng =
6416                                 &priv->sh->mtrmng->pools_mng;
6417         struct mlx5_aso_mtr *aso_mtr = mlx5_aso_meter_by_idx(priv, mtr_idx);
6418
6419         MLX5_ASSERT(aso_mtr);
6420         rte_spinlock_lock(&pools_mng->mtrsl);
6421         memset(&aso_mtr->fm, 0, sizeof(struct mlx5_flow_meter_info));
6422         aso_mtr->state = ASO_METER_FREE;
6423         LIST_INSERT_HEAD(&pools_mng->meters, aso_mtr, next);
6424         rte_spinlock_unlock(&pools_mng->mtrsl);
6425 }
6426
6427 /**
6428  * Allocate a aso flow meter.
6429  *
6430  * @param[in] dev
6431  *   Pointer to the Ethernet device structure.
6432  *
6433  * @return
6434  *   Index to aso flow meter on success, 0 otherwise and rte_errno is set.
6435  */
6436 static uint32_t
6437 flow_dv_mtr_alloc(struct rte_eth_dev *dev)
6438 {
6439         struct mlx5_priv *priv = dev->data->dev_private;
6440         struct mlx5_aso_mtr *mtr_free = NULL;
6441         struct mlx5_aso_mtr_pools_mng *pools_mng =
6442                                 &priv->sh->mtrmng->pools_mng;
6443         struct mlx5_aso_mtr_pool *pool;
6444         uint32_t mtr_idx = 0;
6445
6446         if (!priv->sh->devx) {
6447                 rte_errno = ENOTSUP;
6448                 return 0;
6449         }
6450         /* Allocate the flow meter memory. */
6451         /* Get free meters from management. */
6452         rte_spinlock_lock(&pools_mng->mtrsl);
6453         mtr_free = LIST_FIRST(&pools_mng->meters);
6454         if (mtr_free)
6455                 LIST_REMOVE(mtr_free, next);
6456         if (!mtr_free && !flow_dv_mtr_pool_create(dev, &mtr_free)) {
6457                 rte_spinlock_unlock(&pools_mng->mtrsl);
6458                 return 0;
6459         }
6460         mtr_free->state = ASO_METER_WAIT;
6461         rte_spinlock_unlock(&pools_mng->mtrsl);
6462         pool = container_of(mtr_free,
6463                         struct mlx5_aso_mtr_pool,
6464                         mtrs[mtr_free->offset]);
6465         mtr_idx = MLX5_MAKE_MTR_IDX(pool->index, mtr_free->offset);
6466         if (!mtr_free->fm.meter_action) {
6467 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
6468                 struct rte_flow_error error;
6469                 uint8_t reg_id;
6470
6471                 reg_id = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &error);
6472                 mtr_free->fm.meter_action =
6473                         mlx5_glue->dv_create_flow_action_aso
6474                                                 (priv->sh->rx_domain,
6475                                                  pool->devx_obj->obj,
6476                                                  mtr_free->offset,
6477                                                  (1 << MLX5_FLOW_COLOR_GREEN),
6478                                                  reg_id - REG_C_0);
6479 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
6480                 if (!mtr_free->fm.meter_action) {
6481                         flow_dv_aso_mtr_release_to_pool(dev, mtr_idx);
6482                         return 0;
6483                 }
6484         }
6485         return mtr_idx;
6486 }
6487
6488 /**
6489  * Verify the @p attributes will be correctly understood by the NIC and store
6490  * them in the @p flow if everything is correct.
6491  *
6492  * @param[in] dev
6493  *   Pointer to dev struct.
6494  * @param[in] attributes
6495  *   Pointer to flow attributes
6496  * @param[in] external
6497  *   This flow rule is created by request external to PMD.
6498  * @param[out] error
6499  *   Pointer to error structure.
6500  *
6501  * @return
6502  *   - 0 on success and non root table.
6503  *   - 1 on success and root table.
6504  *   - a negative errno value otherwise and rte_errno is set.
6505  */
6506 static int
6507 flow_dv_validate_attributes(struct rte_eth_dev *dev,
6508                             const struct mlx5_flow_tunnel *tunnel,
6509                             const struct rte_flow_attr *attributes,
6510                             const struct flow_grp_info *grp_info,
6511                             struct rte_flow_error *error)
6512 {
6513         struct mlx5_priv *priv = dev->data->dev_private;
6514         uint32_t lowest_priority = mlx5_get_lowest_priority(dev, attributes);
6515         int ret = 0;
6516
6517 #ifndef HAVE_MLX5DV_DR
6518         RTE_SET_USED(tunnel);
6519         RTE_SET_USED(grp_info);
6520         if (attributes->group)
6521                 return rte_flow_error_set(error, ENOTSUP,
6522                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6523                                           NULL,
6524                                           "groups are not supported");
6525 #else
6526         uint32_t table = 0;
6527
6528         ret = mlx5_flow_group_to_table(dev, tunnel, attributes->group, &table,
6529                                        grp_info, error);
6530         if (ret)
6531                 return ret;
6532         if (!table)
6533                 ret = MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
6534 #endif
6535         if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
6536             attributes->priority > lowest_priority)
6537                 return rte_flow_error_set(error, ENOTSUP,
6538                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
6539                                           NULL,
6540                                           "priority out of range");
6541         if (attributes->transfer) {
6542                 if (!priv->config.dv_esw_en)
6543                         return rte_flow_error_set
6544                                 (error, ENOTSUP,
6545                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6546                                  "E-Switch dr is not supported");
6547                 if (!(priv->representor || priv->master))
6548                         return rte_flow_error_set
6549                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6550                                  NULL, "E-Switch configuration can only be"
6551                                  " done by a master or a representor device");
6552                 if (attributes->egress)
6553                         return rte_flow_error_set
6554                                 (error, ENOTSUP,
6555                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
6556                                  "egress is not supported");
6557         }
6558         if (!(attributes->egress ^ attributes->ingress))
6559                 return rte_flow_error_set(error, ENOTSUP,
6560                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
6561                                           "must specify exactly one of "
6562                                           "ingress or egress");
6563         return ret;
6564 }
6565
6566 static uint16_t
6567 mlx5_flow_locate_proto_l3(const struct rte_flow_item **head,
6568                           const struct rte_flow_item *end)
6569 {
6570         const struct rte_flow_item *item = *head;
6571         uint16_t l3_protocol;
6572
6573         for (; item != end; item++) {
6574                 switch (item->type) {
6575                 default:
6576                         break;
6577                 case RTE_FLOW_ITEM_TYPE_IPV4:
6578                         l3_protocol = RTE_ETHER_TYPE_IPV4;
6579                         goto l3_ok;
6580                 case RTE_FLOW_ITEM_TYPE_IPV6:
6581                         l3_protocol = RTE_ETHER_TYPE_IPV6;
6582                         goto l3_ok;
6583                 case RTE_FLOW_ITEM_TYPE_ETH:
6584                         if (item->mask && item->spec) {
6585                                 MLX5_ETHER_TYPE_FROM_HEADER(rte_flow_item_eth,
6586                                                             type, item,
6587                                                             l3_protocol);
6588                                 if (l3_protocol == RTE_ETHER_TYPE_IPV4 ||
6589                                     l3_protocol == RTE_ETHER_TYPE_IPV6)
6590                                         goto l3_ok;
6591                         }
6592                         break;
6593                 case RTE_FLOW_ITEM_TYPE_VLAN:
6594                         if (item->mask && item->spec) {
6595                                 MLX5_ETHER_TYPE_FROM_HEADER(rte_flow_item_vlan,
6596                                                             inner_type, item,
6597                                                             l3_protocol);
6598                                 if (l3_protocol == RTE_ETHER_TYPE_IPV4 ||
6599                                     l3_protocol == RTE_ETHER_TYPE_IPV6)
6600                                         goto l3_ok;
6601                         }
6602                         break;
6603                 }
6604         }
6605         return 0;
6606 l3_ok:
6607         *head = item;
6608         return l3_protocol;
6609 }
6610
6611 static uint8_t
6612 mlx5_flow_locate_proto_l4(const struct rte_flow_item **head,
6613                           const struct rte_flow_item *end)
6614 {
6615         const struct rte_flow_item *item = *head;
6616         uint8_t l4_protocol;
6617
6618         for (; item != end; item++) {
6619                 switch (item->type) {
6620                 default:
6621                         break;
6622                 case RTE_FLOW_ITEM_TYPE_TCP:
6623                         l4_protocol = IPPROTO_TCP;
6624                         goto l4_ok;
6625                 case RTE_FLOW_ITEM_TYPE_UDP:
6626                         l4_protocol = IPPROTO_UDP;
6627                         goto l4_ok;
6628                 case RTE_FLOW_ITEM_TYPE_IPV4:
6629                         if (item->mask && item->spec) {
6630                                 const struct rte_flow_item_ipv4 *mask, *spec;
6631
6632                                 mask = (typeof(mask))item->mask;
6633                                 spec = (typeof(spec))item->spec;
6634                                 l4_protocol = mask->hdr.next_proto_id &
6635                                               spec->hdr.next_proto_id;
6636                                 if (l4_protocol == IPPROTO_TCP ||
6637                                     l4_protocol == IPPROTO_UDP)
6638                                         goto l4_ok;
6639                         }
6640                         break;
6641                 case RTE_FLOW_ITEM_TYPE_IPV6:
6642                         if (item->mask && item->spec) {
6643                                 const struct rte_flow_item_ipv6 *mask, *spec;
6644                                 mask = (typeof(mask))item->mask;
6645                                 spec = (typeof(spec))item->spec;
6646                                 l4_protocol = mask->hdr.proto & spec->hdr.proto;
6647                                 if (l4_protocol == IPPROTO_TCP ||
6648                                     l4_protocol == IPPROTO_UDP)
6649                                         goto l4_ok;
6650                         }
6651                         break;
6652                 }
6653         }
6654         return 0;
6655 l4_ok:
6656         *head = item;
6657         return l4_protocol;
6658 }
6659
6660 static int
6661 flow_dv_validate_item_integrity(struct rte_eth_dev *dev,
6662                                 const struct rte_flow_item *rule_items,
6663                                 const struct rte_flow_item *integrity_item,
6664                                 struct rte_flow_error *error)
6665 {
6666         struct mlx5_priv *priv = dev->data->dev_private;
6667         const struct rte_flow_item *tunnel_item, *end_item, *item = rule_items;
6668         const struct rte_flow_item_integrity *mask = (typeof(mask))
6669                                                      integrity_item->mask;
6670         const struct rte_flow_item_integrity *spec = (typeof(spec))
6671                                                      integrity_item->spec;
6672         uint32_t protocol;
6673
6674         if (!priv->config.hca_attr.pkt_integrity_match)
6675                 return rte_flow_error_set(error, ENOTSUP,
6676                                           RTE_FLOW_ERROR_TYPE_ITEM,
6677                                           integrity_item,
6678                                           "packet integrity integrity_item not supported");
6679         if (!mask)
6680                 mask = &rte_flow_item_integrity_mask;
6681         if (!mlx5_validate_integrity_item(mask))
6682                 return rte_flow_error_set(error, ENOTSUP,
6683                                           RTE_FLOW_ERROR_TYPE_ITEM,
6684                                           integrity_item,
6685                                           "unsupported integrity filter");
6686         tunnel_item = mlx5_flow_find_tunnel_item(rule_items);
6687         if (spec->level > 1) {
6688                 if (!tunnel_item)
6689                         return rte_flow_error_set(error, ENOTSUP,
6690                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6691                                                   integrity_item,
6692                                                   "missing tunnel item");
6693                 item = tunnel_item;
6694                 end_item = mlx5_find_end_item(tunnel_item);
6695         } else {
6696                 end_item = tunnel_item ? tunnel_item :
6697                            mlx5_find_end_item(integrity_item);
6698         }
6699         if (mask->l3_ok || mask->ipv4_csum_ok) {
6700                 protocol = mlx5_flow_locate_proto_l3(&item, end_item);
6701                 if (!protocol)
6702                         return rte_flow_error_set(error, EINVAL,
6703                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6704                                                   integrity_item,
6705                                                   "missing L3 protocol");
6706         }
6707         if (mask->l4_ok || mask->l4_csum_ok) {
6708                 protocol = mlx5_flow_locate_proto_l4(&item, end_item);
6709                 if (!protocol)
6710                         return rte_flow_error_set(error, EINVAL,
6711                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6712                                                   integrity_item,
6713                                                   "missing L4 protocol");
6714         }
6715         return 0;
6716 }
6717
6718 /**
6719  * Internal validation function. For validating both actions and items.
6720  *
6721  * @param[in] dev
6722  *   Pointer to the rte_eth_dev structure.
6723  * @param[in] attr
6724  *   Pointer to the flow attributes.
6725  * @param[in] items
6726  *   Pointer to the list of items.
6727  * @param[in] actions
6728  *   Pointer to the list of actions.
6729  * @param[in] external
6730  *   This flow rule is created by request external to PMD.
6731  * @param[in] hairpin
6732  *   Number of hairpin TX actions, 0 means classic flow.
6733  * @param[out] error
6734  *   Pointer to the error structure.
6735  *
6736  * @return
6737  *   0 on success, a negative errno value otherwise and rte_errno is set.
6738  */
6739 static int
6740 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
6741                  const struct rte_flow_item items[],
6742                  const struct rte_flow_action actions[],
6743                  bool external, int hairpin, struct rte_flow_error *error)
6744 {
6745         int ret;
6746         uint64_t action_flags = 0;
6747         uint64_t item_flags = 0;
6748         uint64_t last_item = 0;
6749         uint8_t next_protocol = 0xff;
6750         uint16_t ether_type = 0;
6751         int actions_n = 0;
6752         uint8_t item_ipv6_proto = 0;
6753         int fdb_mirror_limit = 0;
6754         int modify_after_mirror = 0;
6755         const struct rte_flow_item *geneve_item = NULL;
6756         const struct rte_flow_item *gre_item = NULL;
6757         const struct rte_flow_item *gtp_item = NULL;
6758         const struct rte_flow_action_raw_decap *decap;
6759         const struct rte_flow_action_raw_encap *encap;
6760         const struct rte_flow_action_rss *rss = NULL;
6761         const struct rte_flow_action_rss *sample_rss = NULL;
6762         const struct rte_flow_action_count *sample_count = NULL;
6763         const struct rte_flow_item_tcp nic_tcp_mask = {
6764                 .hdr = {
6765                         .tcp_flags = 0xFF,
6766                         .src_port = RTE_BE16(UINT16_MAX),
6767                         .dst_port = RTE_BE16(UINT16_MAX),
6768                 }
6769         };
6770         const struct rte_flow_item_ipv6 nic_ipv6_mask = {
6771                 .hdr = {
6772                         .src_addr =
6773                         "\xff\xff\xff\xff\xff\xff\xff\xff"
6774                         "\xff\xff\xff\xff\xff\xff\xff\xff",
6775                         .dst_addr =
6776                         "\xff\xff\xff\xff\xff\xff\xff\xff"
6777                         "\xff\xff\xff\xff\xff\xff\xff\xff",
6778                         .vtc_flow = RTE_BE32(0xffffffff),
6779                         .proto = 0xff,
6780                         .hop_limits = 0xff,
6781                 },
6782                 .has_frag_ext = 1,
6783         };
6784         const struct rte_flow_item_ecpri nic_ecpri_mask = {
6785                 .hdr = {
6786                         .common = {
6787                                 .u32 =
6788                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
6789                                         .type = 0xFF,
6790                                         }).u32),
6791                         },
6792                         .dummy[0] = 0xffffffff,
6793                 },
6794         };
6795         struct mlx5_priv *priv = dev->data->dev_private;
6796         struct mlx5_dev_config *dev_conf = &priv->config;
6797         uint16_t queue_index = 0xFFFF;
6798         const struct rte_flow_item_vlan *vlan_m = NULL;
6799         uint32_t rw_act_num = 0;
6800         uint64_t is_root;
6801         const struct mlx5_flow_tunnel *tunnel;
6802         enum mlx5_tof_rule_type tof_rule_type;
6803         struct flow_grp_info grp_info = {
6804                 .external = !!external,
6805                 .transfer = !!attr->transfer,
6806                 .fdb_def_rule = !!priv->fdb_def_rule,
6807                 .std_tbl_fix = true,
6808         };
6809         const struct rte_eth_hairpin_conf *conf;
6810         const struct rte_flow_item *rule_items = items;
6811         const struct rte_flow_item *port_id_item = NULL;
6812         bool def_policy = false;
6813         uint16_t udp_dport = 0;
6814
6815         if (items == NULL)
6816                 return -1;
6817         tunnel = is_tunnel_offload_active(dev) ?
6818                  mlx5_get_tof(items, actions, &tof_rule_type) : NULL;
6819         if (tunnel) {
6820                 if (priv->representor)
6821                         return rte_flow_error_set
6822                                 (error, ENOTSUP,
6823                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6824                                  NULL, "decap not supported for VF representor");
6825                 if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_SET_RULE)
6826                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
6827                 else if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_MATCH_RULE)
6828                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_MATCH |
6829                                         MLX5_FLOW_ACTION_DECAP;
6830                 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
6831                                         (dev, attr, tunnel, tof_rule_type);
6832         }
6833         ret = flow_dv_validate_attributes(dev, tunnel, attr, &grp_info, error);
6834         if (ret < 0)
6835                 return ret;
6836         is_root = (uint64_t)ret;
6837         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
6838                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
6839                 int type = items->type;
6840
6841                 if (!mlx5_flow_os_item_supported(type))
6842                         return rte_flow_error_set(error, ENOTSUP,
6843                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6844                                                   NULL, "item not supported");
6845                 switch (type) {
6846                 case RTE_FLOW_ITEM_TYPE_VOID:
6847                         break;
6848                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
6849                         ret = flow_dv_validate_item_port_id
6850                                         (dev, items, attr, item_flags, error);
6851                         if (ret < 0)
6852                                 return ret;
6853                         last_item = MLX5_FLOW_ITEM_PORT_ID;
6854                         port_id_item = items;
6855                         break;
6856                 case RTE_FLOW_ITEM_TYPE_ETH:
6857                         ret = mlx5_flow_validate_item_eth(items, item_flags,
6858                                                           true, error);
6859                         if (ret < 0)
6860                                 return ret;
6861                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
6862                                              MLX5_FLOW_LAYER_OUTER_L2;
6863                         if (items->mask != NULL && items->spec != NULL) {
6864                                 ether_type =
6865                                         ((const struct rte_flow_item_eth *)
6866                                          items->spec)->type;
6867                                 ether_type &=
6868                                         ((const struct rte_flow_item_eth *)
6869                                          items->mask)->type;
6870                                 ether_type = rte_be_to_cpu_16(ether_type);
6871                         } else {
6872                                 ether_type = 0;
6873                         }
6874                         break;
6875                 case RTE_FLOW_ITEM_TYPE_VLAN:
6876                         ret = flow_dv_validate_item_vlan(items, item_flags,
6877                                                          dev, error);
6878                         if (ret < 0)
6879                                 return ret;
6880                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
6881                                              MLX5_FLOW_LAYER_OUTER_VLAN;
6882                         if (items->mask != NULL && items->spec != NULL) {
6883                                 ether_type =
6884                                         ((const struct rte_flow_item_vlan *)
6885                                          items->spec)->inner_type;
6886                                 ether_type &=
6887                                         ((const struct rte_flow_item_vlan *)
6888                                          items->mask)->inner_type;
6889                                 ether_type = rte_be_to_cpu_16(ether_type);
6890                         } else {
6891                                 ether_type = 0;
6892                         }
6893                         /* Store outer VLAN mask for of_push_vlan action. */
6894                         if (!tunnel)
6895                                 vlan_m = items->mask;
6896                         break;
6897                 case RTE_FLOW_ITEM_TYPE_IPV4:
6898                         mlx5_flow_tunnel_ip_check(items, next_protocol,
6899                                                   &item_flags, &tunnel);
6900                         ret = flow_dv_validate_item_ipv4(dev, items, item_flags,
6901                                                          last_item, ether_type,
6902                                                          error);
6903                         if (ret < 0)
6904                                 return ret;
6905                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
6906                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
6907                         if (items->mask != NULL &&
6908                             ((const struct rte_flow_item_ipv4 *)
6909                              items->mask)->hdr.next_proto_id) {
6910                                 next_protocol =
6911                                         ((const struct rte_flow_item_ipv4 *)
6912                                          (items->spec))->hdr.next_proto_id;
6913                                 next_protocol &=
6914                                         ((const struct rte_flow_item_ipv4 *)
6915                                          (items->mask))->hdr.next_proto_id;
6916                         } else {
6917                                 /* Reset for inner layer. */
6918                                 next_protocol = 0xff;
6919                         }
6920                         break;
6921                 case RTE_FLOW_ITEM_TYPE_IPV6:
6922                         mlx5_flow_tunnel_ip_check(items, next_protocol,
6923                                                   &item_flags, &tunnel);
6924                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
6925                                                            last_item,
6926                                                            ether_type,
6927                                                            &nic_ipv6_mask,
6928                                                            error);
6929                         if (ret < 0)
6930                                 return ret;
6931                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
6932                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
6933                         if (items->mask != NULL &&
6934                             ((const struct rte_flow_item_ipv6 *)
6935                              items->mask)->hdr.proto) {
6936                                 item_ipv6_proto =
6937                                         ((const struct rte_flow_item_ipv6 *)
6938                                          items->spec)->hdr.proto;
6939                                 next_protocol =
6940                                         ((const struct rte_flow_item_ipv6 *)
6941                                          items->spec)->hdr.proto;
6942                                 next_protocol &=
6943                                         ((const struct rte_flow_item_ipv6 *)
6944                                          items->mask)->hdr.proto;
6945                         } else {
6946                                 /* Reset for inner layer. */
6947                                 next_protocol = 0xff;
6948                         }
6949                         break;
6950                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
6951                         ret = flow_dv_validate_item_ipv6_frag_ext(items,
6952                                                                   item_flags,
6953                                                                   error);
6954                         if (ret < 0)
6955                                 return ret;
6956                         last_item = tunnel ?
6957                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
6958                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
6959                         if (items->mask != NULL &&
6960                             ((const struct rte_flow_item_ipv6_frag_ext *)
6961                              items->mask)->hdr.next_header) {
6962                                 next_protocol =
6963                                 ((const struct rte_flow_item_ipv6_frag_ext *)
6964                                  items->spec)->hdr.next_header;
6965                                 next_protocol &=
6966                                 ((const struct rte_flow_item_ipv6_frag_ext *)
6967                                  items->mask)->hdr.next_header;
6968                         } else {
6969                                 /* Reset for inner layer. */
6970                                 next_protocol = 0xff;
6971                         }
6972                         break;
6973                 case RTE_FLOW_ITEM_TYPE_TCP:
6974                         ret = mlx5_flow_validate_item_tcp
6975                                                 (items, item_flags,
6976                                                  next_protocol,
6977                                                  &nic_tcp_mask,
6978                                                  error);
6979                         if (ret < 0)
6980                                 return ret;
6981                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
6982                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
6983                         break;
6984                 case RTE_FLOW_ITEM_TYPE_UDP:
6985                         ret = mlx5_flow_validate_item_udp(items, item_flags,
6986                                                           next_protocol,
6987                                                           error);
6988                         const struct rte_flow_item_udp *spec = items->spec;
6989                         const struct rte_flow_item_udp *mask = items->mask;
6990                         if (!mask)
6991                                 mask = &rte_flow_item_udp_mask;
6992                         if (spec != NULL)
6993                                 udp_dport = rte_be_to_cpu_16
6994                                                 (spec->hdr.dst_port &
6995                                                  mask->hdr.dst_port);
6996                         if (ret < 0)
6997                                 return ret;
6998                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
6999                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7000                         break;
7001                 case RTE_FLOW_ITEM_TYPE_GRE:
7002                         ret = mlx5_flow_validate_item_gre(items, item_flags,
7003                                                           next_protocol, error);
7004                         if (ret < 0)
7005                                 return ret;
7006                         gre_item = items;
7007                         last_item = MLX5_FLOW_LAYER_GRE;
7008                         break;
7009                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7010                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
7011                                                             next_protocol,
7012                                                             error);
7013                         if (ret < 0)
7014                                 return ret;
7015                         last_item = MLX5_FLOW_LAYER_NVGRE;
7016                         break;
7017                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7018                         ret = mlx5_flow_validate_item_gre_key
7019                                 (items, item_flags, gre_item, error);
7020                         if (ret < 0)
7021                                 return ret;
7022                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7023                         break;
7024                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7025                         ret = mlx5_flow_validate_item_vxlan(dev, udp_dport,
7026                                                             items, item_flags,
7027                                                             attr, error);
7028                         if (ret < 0)
7029                                 return ret;
7030                         last_item = MLX5_FLOW_LAYER_VXLAN;
7031                         break;
7032                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7033                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
7034                                                                 item_flags, dev,
7035                                                                 error);
7036                         if (ret < 0)
7037                                 return ret;
7038                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7039                         break;
7040                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7041                         ret = mlx5_flow_validate_item_geneve(items,
7042                                                              item_flags, dev,
7043                                                              error);
7044                         if (ret < 0)
7045                                 return ret;
7046                         geneve_item = items;
7047                         last_item = MLX5_FLOW_LAYER_GENEVE;
7048                         break;
7049                 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
7050                         ret = mlx5_flow_validate_item_geneve_opt(items,
7051                                                                  last_item,
7052                                                                  geneve_item,
7053                                                                  dev,
7054                                                                  error);
7055                         if (ret < 0)
7056                                 return ret;
7057                         last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
7058                         break;
7059                 case RTE_FLOW_ITEM_TYPE_MPLS:
7060                         ret = mlx5_flow_validate_item_mpls(dev, items,
7061                                                            item_flags,
7062                                                            last_item, error);
7063                         if (ret < 0)
7064                                 return ret;
7065                         last_item = MLX5_FLOW_LAYER_MPLS;
7066                         break;
7067
7068                 case RTE_FLOW_ITEM_TYPE_MARK:
7069                         ret = flow_dv_validate_item_mark(dev, items, attr,
7070                                                          error);
7071                         if (ret < 0)
7072                                 return ret;
7073                         last_item = MLX5_FLOW_ITEM_MARK;
7074                         break;
7075                 case RTE_FLOW_ITEM_TYPE_META:
7076                         ret = flow_dv_validate_item_meta(dev, items, attr,
7077                                                          error);
7078                         if (ret < 0)
7079                                 return ret;
7080                         last_item = MLX5_FLOW_ITEM_METADATA;
7081                         break;
7082                 case RTE_FLOW_ITEM_TYPE_ICMP:
7083                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
7084                                                            next_protocol,
7085                                                            error);
7086                         if (ret < 0)
7087                                 return ret;
7088                         last_item = MLX5_FLOW_LAYER_ICMP;
7089                         break;
7090                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7091                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
7092                                                             next_protocol,
7093                                                             error);
7094                         if (ret < 0)
7095                                 return ret;
7096                         item_ipv6_proto = IPPROTO_ICMPV6;
7097                         last_item = MLX5_FLOW_LAYER_ICMP6;
7098                         break;
7099                 case RTE_FLOW_ITEM_TYPE_TAG:
7100                         ret = flow_dv_validate_item_tag(dev, items,
7101                                                         attr, error);
7102                         if (ret < 0)
7103                                 return ret;
7104                         last_item = MLX5_FLOW_ITEM_TAG;
7105                         break;
7106                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7107                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7108                         break;
7109                 case RTE_FLOW_ITEM_TYPE_GTP:
7110                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
7111                                                         error);
7112                         if (ret < 0)
7113                                 return ret;
7114                         gtp_item = items;
7115                         last_item = MLX5_FLOW_LAYER_GTP;
7116                         break;
7117                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
7118                         ret = flow_dv_validate_item_gtp_psc(items, last_item,
7119                                                             gtp_item, attr,
7120                                                             error);
7121                         if (ret < 0)
7122                                 return ret;
7123                         last_item = MLX5_FLOW_LAYER_GTP_PSC;
7124                         break;
7125                 case RTE_FLOW_ITEM_TYPE_ECPRI:
7126                         /* Capacity will be checked in the translate stage. */
7127                         ret = mlx5_flow_validate_item_ecpri(items, item_flags,
7128                                                             last_item,
7129                                                             ether_type,
7130                                                             &nic_ecpri_mask,
7131                                                             error);
7132                         if (ret < 0)
7133                                 return ret;
7134                         last_item = MLX5_FLOW_LAYER_ECPRI;
7135                         break;
7136                 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
7137                         if (item_flags & MLX5_FLOW_ITEM_INTEGRITY)
7138                                 return rte_flow_error_set
7139                                         (error, ENOTSUP,
7140                                          RTE_FLOW_ERROR_TYPE_ITEM,
7141                                          NULL, "multiple integrity items not supported");
7142                         ret = flow_dv_validate_item_integrity(dev, rule_items,
7143                                                               items, error);
7144                         if (ret < 0)
7145                                 return ret;
7146                         last_item = MLX5_FLOW_ITEM_INTEGRITY;
7147                         break;
7148                 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
7149                         ret = flow_dv_validate_item_aso_ct(dev, items,
7150                                                            &item_flags, error);
7151                         if (ret < 0)
7152                                 return ret;
7153                         break;
7154                 case MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL:
7155                         /* tunnel offload item was processed before
7156                          * list it here as a supported type
7157                          */
7158                         break;
7159                 default:
7160                         return rte_flow_error_set(error, ENOTSUP,
7161                                                   RTE_FLOW_ERROR_TYPE_ITEM,
7162                                                   NULL, "item not supported");
7163                 }
7164                 item_flags |= last_item;
7165         }
7166         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
7167                 int type = actions->type;
7168                 bool shared_count = false;
7169
7170                 if (!mlx5_flow_os_action_supported(type))
7171                         return rte_flow_error_set(error, ENOTSUP,
7172                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7173                                                   actions,
7174                                                   "action not supported");
7175                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
7176                         return rte_flow_error_set(error, ENOTSUP,
7177                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7178                                                   actions, "too many actions");
7179                 if (action_flags &
7180                         MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
7181                         return rte_flow_error_set(error, ENOTSUP,
7182                                 RTE_FLOW_ERROR_TYPE_ACTION,
7183                                 NULL, "meter action with policy "
7184                                 "must be the last action");
7185                 switch (type) {
7186                 case RTE_FLOW_ACTION_TYPE_VOID:
7187                         break;
7188                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7189                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
7190                         ret = flow_dv_validate_action_port_id(dev,
7191                                                               action_flags,
7192                                                               actions,
7193                                                               attr,
7194                                                               error);
7195                         if (ret)
7196                                 return ret;
7197                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7198                         ++actions_n;
7199                         break;
7200                 case RTE_FLOW_ACTION_TYPE_FLAG:
7201                         ret = flow_dv_validate_action_flag(dev, action_flags,
7202                                                            attr, error);
7203                         if (ret < 0)
7204                                 return ret;
7205                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7206                                 /* Count all modify-header actions as one. */
7207                                 if (!(action_flags &
7208                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
7209                                         ++actions_n;
7210                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
7211                                                 MLX5_FLOW_ACTION_MARK_EXT;
7212                                 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7213                                         modify_after_mirror = 1;
7214
7215                         } else {
7216                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
7217                                 ++actions_n;
7218                         }
7219                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
7220                         break;
7221                 case RTE_FLOW_ACTION_TYPE_MARK:
7222                         ret = flow_dv_validate_action_mark(dev, actions,
7223                                                            action_flags,
7224                                                            attr, error);
7225                         if (ret < 0)
7226                                 return ret;
7227                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7228                                 /* Count all modify-header actions as one. */
7229                                 if (!(action_flags &
7230                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
7231                                         ++actions_n;
7232                                 action_flags |= MLX5_FLOW_ACTION_MARK |
7233                                                 MLX5_FLOW_ACTION_MARK_EXT;
7234                                 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7235                                         modify_after_mirror = 1;
7236                         } else {
7237                                 action_flags |= MLX5_FLOW_ACTION_MARK;
7238                                 ++actions_n;
7239                         }
7240                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
7241                         break;
7242                 case RTE_FLOW_ACTION_TYPE_SET_META:
7243                         ret = flow_dv_validate_action_set_meta(dev, actions,
7244                                                                action_flags,
7245                                                                attr, error);
7246                         if (ret < 0)
7247                                 return ret;
7248                         /* Count all modify-header actions as one action. */
7249                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7250                                 ++actions_n;
7251                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7252                                 modify_after_mirror = 1;
7253                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7254                         rw_act_num += MLX5_ACT_NUM_SET_META;
7255                         break;
7256                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7257                         ret = flow_dv_validate_action_set_tag(dev, actions,
7258                                                               action_flags,
7259                                                               attr, error);
7260                         if (ret < 0)
7261                                 return ret;
7262                         /* Count all modify-header actions as one action. */
7263                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7264                                 ++actions_n;
7265                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7266                                 modify_after_mirror = 1;
7267                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7268                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7269                         break;
7270                 case RTE_FLOW_ACTION_TYPE_DROP:
7271                         ret = mlx5_flow_validate_action_drop(action_flags,
7272                                                              attr, error);
7273                         if (ret < 0)
7274                                 return ret;
7275                         action_flags |= MLX5_FLOW_ACTION_DROP;
7276                         ++actions_n;
7277                         break;
7278                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7279                         ret = mlx5_flow_validate_action_queue(actions,
7280                                                               action_flags, dev,
7281                                                               attr, error);
7282                         if (ret < 0)
7283                                 return ret;
7284                         queue_index = ((const struct rte_flow_action_queue *)
7285                                                         (actions->conf))->index;
7286                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7287                         ++actions_n;
7288                         break;
7289                 case RTE_FLOW_ACTION_TYPE_RSS:
7290                         rss = actions->conf;
7291                         ret = mlx5_flow_validate_action_rss(actions,
7292                                                             action_flags, dev,
7293                                                             attr, item_flags,
7294                                                             error);
7295                         if (ret < 0)
7296                                 return ret;
7297                         if (rss && sample_rss &&
7298                             (sample_rss->level != rss->level ||
7299                             sample_rss->types != rss->types))
7300                                 return rte_flow_error_set(error, ENOTSUP,
7301                                         RTE_FLOW_ERROR_TYPE_ACTION,
7302                                         NULL,
7303                                         "Can't use the different RSS types "
7304                                         "or level in the same flow");
7305                         if (rss != NULL && rss->queue_num)
7306                                 queue_index = rss->queue[0];
7307                         action_flags |= MLX5_FLOW_ACTION_RSS;
7308                         ++actions_n;
7309                         break;
7310                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
7311                         ret =
7312                         mlx5_flow_validate_action_default_miss(action_flags,
7313                                         attr, error);
7314                         if (ret < 0)
7315                                 return ret;
7316                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
7317                         ++actions_n;
7318                         break;
7319                 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
7320                         shared_count = true;
7321                         /* fall-through. */
7322                 case RTE_FLOW_ACTION_TYPE_COUNT:
7323                         ret = flow_dv_validate_action_count(dev, shared_count,
7324                                                             action_flags,
7325                                                             error);
7326                         if (ret < 0)
7327                                 return ret;
7328                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7329                         ++actions_n;
7330                         break;
7331                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7332                         if (flow_dv_validate_action_pop_vlan(dev,
7333                                                              action_flags,
7334                                                              actions,
7335                                                              item_flags, attr,
7336                                                              error))
7337                                 return -rte_errno;
7338                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7339                                 modify_after_mirror = 1;
7340                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7341                         ++actions_n;
7342                         break;
7343                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7344                         ret = flow_dv_validate_action_push_vlan(dev,
7345                                                                 action_flags,
7346                                                                 vlan_m,
7347                                                                 actions, attr,
7348                                                                 error);
7349                         if (ret < 0)
7350                                 return ret;
7351                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7352                                 modify_after_mirror = 1;
7353                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7354                         ++actions_n;
7355                         break;
7356                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7357                         ret = flow_dv_validate_action_set_vlan_pcp
7358                                                 (action_flags, actions, error);
7359                         if (ret < 0)
7360                                 return ret;
7361                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7362                                 modify_after_mirror = 1;
7363                         /* Count PCP with push_vlan command. */
7364                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
7365                         break;
7366                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7367                         ret = flow_dv_validate_action_set_vlan_vid
7368                                                 (item_flags, action_flags,
7369                                                  actions, error);
7370                         if (ret < 0)
7371                                 return ret;
7372                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7373                                 modify_after_mirror = 1;
7374                         /* Count VID with push_vlan command. */
7375                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7376                         rw_act_num += MLX5_ACT_NUM_MDF_VID;
7377                         break;
7378                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7379                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7380                         ret = flow_dv_validate_action_l2_encap(dev,
7381                                                                action_flags,
7382                                                                actions, attr,
7383                                                                error);
7384                         if (ret < 0)
7385                                 return ret;
7386                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
7387                         ++actions_n;
7388                         break;
7389                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7390                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7391                         ret = flow_dv_validate_action_decap(dev, action_flags,
7392                                                             actions, item_flags,
7393                                                             attr, error);
7394                         if (ret < 0)
7395                                 return ret;
7396                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7397                                 modify_after_mirror = 1;
7398                         action_flags |= MLX5_FLOW_ACTION_DECAP;
7399                         ++actions_n;
7400                         break;
7401                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7402                         ret = flow_dv_validate_action_raw_encap_decap
7403                                 (dev, NULL, actions->conf, attr, &action_flags,
7404                                  &actions_n, actions, item_flags, error);
7405                         if (ret < 0)
7406                                 return ret;
7407                         break;
7408                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7409                         decap = actions->conf;
7410                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
7411                                 ;
7412                         if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7413                                 encap = NULL;
7414                                 actions--;
7415                         } else {
7416                                 encap = actions->conf;
7417                         }
7418                         ret = flow_dv_validate_action_raw_encap_decap
7419                                            (dev,
7420                                             decap ? decap : &empty_decap, encap,
7421                                             attr, &action_flags, &actions_n,
7422                                             actions, item_flags, error);
7423                         if (ret < 0)
7424                                 return ret;
7425                         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7426                             (action_flags & MLX5_FLOW_ACTION_DECAP))
7427                                 modify_after_mirror = 1;
7428                         break;
7429                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7430                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7431                         ret = flow_dv_validate_action_modify_mac(action_flags,
7432                                                                  actions,
7433                                                                  item_flags,
7434                                                                  error);
7435                         if (ret < 0)
7436                                 return ret;
7437                         /* Count all modify-header actions as one action. */
7438                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7439                                 ++actions_n;
7440                         action_flags |= actions->type ==
7441                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7442                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
7443                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
7444                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7445                                 modify_after_mirror = 1;
7446                         /*
7447                          * Even if the source and destination MAC addresses have
7448                          * overlap in the header with 4B alignment, the convert
7449                          * function will handle them separately and 4 SW actions
7450                          * will be created. And 2 actions will be added each
7451                          * time no matter how many bytes of address will be set.
7452                          */
7453                         rw_act_num += MLX5_ACT_NUM_MDF_MAC;
7454                         break;
7455                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7456                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7457                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
7458                                                                   actions,
7459                                                                   item_flags,
7460                                                                   error);
7461                         if (ret < 0)
7462                                 return ret;
7463                         /* Count all modify-header actions as one action. */
7464                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7465                                 ++actions_n;
7466                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7467                                 modify_after_mirror = 1;
7468                         action_flags |= actions->type ==
7469                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7470                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
7471                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
7472                         rw_act_num += MLX5_ACT_NUM_MDF_IPV4;
7473                         break;
7474                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7475                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7476                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
7477                                                                   actions,
7478                                                                   item_flags,
7479                                                                   error);
7480                         if (ret < 0)
7481                                 return ret;
7482                         if (item_ipv6_proto == IPPROTO_ICMPV6)
7483                                 return rte_flow_error_set(error, ENOTSUP,
7484                                         RTE_FLOW_ERROR_TYPE_ACTION,
7485                                         actions,
7486                                         "Can't change header "
7487                                         "with ICMPv6 proto");
7488                         /* Count all modify-header actions as one action. */
7489                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7490                                 ++actions_n;
7491                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7492                                 modify_after_mirror = 1;
7493                         action_flags |= actions->type ==
7494                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7495                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
7496                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
7497                         rw_act_num += MLX5_ACT_NUM_MDF_IPV6;
7498                         break;
7499                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7500                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7501                         ret = flow_dv_validate_action_modify_tp(action_flags,
7502                                                                 actions,
7503                                                                 item_flags,
7504                                                                 error);
7505                         if (ret < 0)
7506                                 return ret;
7507                         /* Count all modify-header actions as one action. */
7508                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7509                                 ++actions_n;
7510                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7511                                 modify_after_mirror = 1;
7512                         action_flags |= actions->type ==
7513                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7514                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
7515                                                 MLX5_FLOW_ACTION_SET_TP_DST;
7516                         rw_act_num += MLX5_ACT_NUM_MDF_PORT;
7517                         break;
7518                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7519                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7520                         ret = flow_dv_validate_action_modify_ttl(action_flags,
7521                                                                  actions,
7522                                                                  item_flags,
7523                                                                  error);
7524                         if (ret < 0)
7525                                 return ret;
7526                         /* Count all modify-header actions as one action. */
7527                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7528                                 ++actions_n;
7529                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7530                                 modify_after_mirror = 1;
7531                         action_flags |= actions->type ==
7532                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
7533                                                 MLX5_FLOW_ACTION_SET_TTL :
7534                                                 MLX5_FLOW_ACTION_DEC_TTL;
7535                         rw_act_num += MLX5_ACT_NUM_MDF_TTL;
7536                         break;
7537                 case RTE_FLOW_ACTION_TYPE_JUMP:
7538                         ret = flow_dv_validate_action_jump(dev, tunnel, actions,
7539                                                            action_flags,
7540                                                            attr, external,
7541                                                            error);
7542                         if (ret)
7543                                 return ret;
7544                         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7545                             fdb_mirror_limit)
7546                                 return rte_flow_error_set(error, EINVAL,
7547                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7548                                                   NULL,
7549                                                   "sample and jump action combination is not supported");
7550                         ++actions_n;
7551                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7552                         break;
7553                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7554                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7555                         ret = flow_dv_validate_action_modify_tcp_seq
7556                                                                 (action_flags,
7557                                                                  actions,
7558                                                                  item_flags,
7559                                                                  error);
7560                         if (ret < 0)
7561                                 return ret;
7562                         /* Count all modify-header actions as one action. */
7563                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7564                                 ++actions_n;
7565                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7566                                 modify_after_mirror = 1;
7567                         action_flags |= actions->type ==
7568                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7569                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
7570                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7571                         rw_act_num += MLX5_ACT_NUM_MDF_TCPSEQ;
7572                         break;
7573                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7574                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7575                         ret = flow_dv_validate_action_modify_tcp_ack
7576                                                                 (action_flags,
7577                                                                  actions,
7578                                                                  item_flags,
7579                                                                  error);
7580                         if (ret < 0)
7581                                 return ret;
7582                         /* Count all modify-header actions as one action. */
7583                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7584                                 ++actions_n;
7585                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7586                                 modify_after_mirror = 1;
7587                         action_flags |= actions->type ==
7588                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7589                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
7590                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
7591                         rw_act_num += MLX5_ACT_NUM_MDF_TCPACK;
7592                         break;
7593                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7594                         break;
7595                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7596                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7597                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7598                         break;
7599                 case RTE_FLOW_ACTION_TYPE_METER:
7600                         ret = mlx5_flow_validate_action_meter(dev,
7601                                                               action_flags,
7602                                                               actions, attr,
7603                                                               port_id_item,
7604                                                               &def_policy,
7605                                                               error);
7606                         if (ret < 0)
7607                                 return ret;
7608                         action_flags |= MLX5_FLOW_ACTION_METER;
7609                         if (!def_policy)
7610                                 action_flags |=
7611                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
7612                         ++actions_n;
7613                         /* Meter action will add one more TAG action. */
7614                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7615                         break;
7616                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
7617                         if (!attr->transfer && !attr->group)
7618                                 return rte_flow_error_set(error, ENOTSUP,
7619                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7620                                                                            NULL,
7621                           "Shared ASO age action is not supported for group 0");
7622                         if (action_flags & MLX5_FLOW_ACTION_AGE)
7623                                 return rte_flow_error_set
7624                                                   (error, EINVAL,
7625                                                    RTE_FLOW_ERROR_TYPE_ACTION,
7626                                                    NULL,
7627                                                    "duplicate age actions set");
7628                         action_flags |= MLX5_FLOW_ACTION_AGE;
7629                         ++actions_n;
7630                         break;
7631                 case RTE_FLOW_ACTION_TYPE_AGE:
7632                         ret = flow_dv_validate_action_age(action_flags,
7633                                                           actions, dev,
7634                                                           error);
7635                         if (ret < 0)
7636                                 return ret;
7637                         /*
7638                          * Validate the regular AGE action (using counter)
7639                          * mutual exclusion with share counter actions.
7640                          */
7641                         if (!priv->sh->flow_hit_aso_en) {
7642                                 if (shared_count)
7643                                         return rte_flow_error_set
7644                                                 (error, EINVAL,
7645                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7646                                                 NULL,
7647                                                 "old age and shared count combination is not supported");
7648                                 if (sample_count)
7649                                         return rte_flow_error_set
7650                                                 (error, EINVAL,
7651                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7652                                                 NULL,
7653                                                 "old age action and count must be in the same sub flow");
7654                         }
7655                         action_flags |= MLX5_FLOW_ACTION_AGE;
7656                         ++actions_n;
7657                         break;
7658                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7659                         ret = flow_dv_validate_action_modify_ipv4_dscp
7660                                                          (action_flags,
7661                                                           actions,
7662                                                           item_flags,
7663                                                           error);
7664                         if (ret < 0)
7665                                 return ret;
7666                         /* Count all modify-header actions as one action. */
7667                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7668                                 ++actions_n;
7669                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7670                                 modify_after_mirror = 1;
7671                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7672                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7673                         break;
7674                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7675                         ret = flow_dv_validate_action_modify_ipv6_dscp
7676                                                                 (action_flags,
7677                                                                  actions,
7678                                                                  item_flags,
7679                                                                  error);
7680                         if (ret < 0)
7681                                 return ret;
7682                         /* Count all modify-header actions as one action. */
7683                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7684                                 ++actions_n;
7685                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7686                                 modify_after_mirror = 1;
7687                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7688                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7689                         break;
7690                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
7691                         ret = flow_dv_validate_action_sample(&action_flags,
7692                                                              actions, dev,
7693                                                              attr, item_flags,
7694                                                              rss, &sample_rss,
7695                                                              &sample_count,
7696                                                              &fdb_mirror_limit,
7697                                                              error);
7698                         if (ret < 0)
7699                                 return ret;
7700                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
7701                         ++actions_n;
7702                         break;
7703                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
7704                         ret = flow_dv_validate_action_modify_field(dev,
7705                                                                    action_flags,
7706                                                                    actions,
7707                                                                    attr,
7708                                                                    error);
7709                         if (ret < 0)
7710                                 return ret;
7711                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7712                                 modify_after_mirror = 1;
7713                         /* Count all modify-header actions as one action. */
7714                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7715                                 ++actions_n;
7716                         action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
7717                         rw_act_num += ret;
7718                         break;
7719                 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
7720                         ret = flow_dv_validate_action_aso_ct(dev, action_flags,
7721                                                              item_flags, attr,
7722                                                              error);
7723                         if (ret < 0)
7724                                 return ret;
7725                         action_flags |= MLX5_FLOW_ACTION_CT;
7726                         break;
7727                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
7728                         /* tunnel offload action was processed before
7729                          * list it here as a supported type
7730                          */
7731                         break;
7732                 default:
7733                         return rte_flow_error_set(error, ENOTSUP,
7734                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7735                                                   actions,
7736                                                   "action not supported");
7737                 }
7738         }
7739         /*
7740          * Validate actions in flow rules
7741          * - Explicit decap action is prohibited by the tunnel offload API.
7742          * - Drop action in tunnel steer rule is prohibited by the API.
7743          * - Application cannot use MARK action because it's value can mask
7744          *   tunnel default miss nitification.
7745          * - JUMP in tunnel match rule has no support in current PMD
7746          *   implementation.
7747          * - TAG & META are reserved for future uses.
7748          */
7749         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_SET) {
7750                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_DECAP    |
7751                                             MLX5_FLOW_ACTION_MARK     |
7752                                             MLX5_FLOW_ACTION_SET_TAG  |
7753                                             MLX5_FLOW_ACTION_SET_META |
7754                                             MLX5_FLOW_ACTION_DROP;
7755
7756                 if (action_flags & bad_actions_mask)
7757                         return rte_flow_error_set
7758                                         (error, EINVAL,
7759                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7760                                         "Invalid RTE action in tunnel "
7761                                         "set decap rule");
7762                 if (!(action_flags & MLX5_FLOW_ACTION_JUMP))
7763                         return rte_flow_error_set
7764                                         (error, EINVAL,
7765                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7766                                         "tunnel set decap rule must terminate "
7767                                         "with JUMP");
7768                 if (!attr->ingress)
7769                         return rte_flow_error_set
7770                                         (error, EINVAL,
7771                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7772                                         "tunnel flows for ingress traffic only");
7773         }
7774         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_MATCH) {
7775                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_JUMP    |
7776                                             MLX5_FLOW_ACTION_MARK    |
7777                                             MLX5_FLOW_ACTION_SET_TAG |
7778                                             MLX5_FLOW_ACTION_SET_META;
7779
7780                 if (action_flags & bad_actions_mask)
7781                         return rte_flow_error_set
7782                                         (error, EINVAL,
7783                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7784                                         "Invalid RTE action in tunnel "
7785                                         "set match rule");
7786         }
7787         /*
7788          * Validate the drop action mutual exclusion with other actions.
7789          * Drop action is mutually-exclusive with any other action, except for
7790          * Count action.
7791          * Drop action compatibility with tunnel offload was already validated.
7792          */
7793         if (action_flags & (MLX5_FLOW_ACTION_TUNNEL_MATCH |
7794                             MLX5_FLOW_ACTION_TUNNEL_MATCH));
7795         else if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
7796             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
7797                 return rte_flow_error_set(error, EINVAL,
7798                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7799                                           "Drop action is mutually-exclusive "
7800                                           "with any other action, except for "
7801                                           "Count action");
7802         /* Eswitch has few restrictions on using items and actions */
7803         if (attr->transfer) {
7804                 if (!mlx5_flow_ext_mreg_supported(dev) &&
7805                     action_flags & MLX5_FLOW_ACTION_FLAG)
7806                         return rte_flow_error_set(error, ENOTSUP,
7807                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7808                                                   NULL,
7809                                                   "unsupported action FLAG");
7810                 if (!mlx5_flow_ext_mreg_supported(dev) &&
7811                     action_flags & MLX5_FLOW_ACTION_MARK)
7812                         return rte_flow_error_set(error, ENOTSUP,
7813                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7814                                                   NULL,
7815                                                   "unsupported action MARK");
7816                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
7817                         return rte_flow_error_set(error, ENOTSUP,
7818                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7819                                                   NULL,
7820                                                   "unsupported action QUEUE");
7821                 if (action_flags & MLX5_FLOW_ACTION_RSS)
7822                         return rte_flow_error_set(error, ENOTSUP,
7823                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7824                                                   NULL,
7825                                                   "unsupported action RSS");
7826                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
7827                         return rte_flow_error_set(error, EINVAL,
7828                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7829                                                   actions,
7830                                                   "no fate action is found");
7831         } else {
7832                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
7833                         return rte_flow_error_set(error, EINVAL,
7834                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7835                                                   actions,
7836                                                   "no fate action is found");
7837         }
7838         /*
7839          * Continue validation for Xcap and VLAN actions.
7840          * If hairpin is working in explicit TX rule mode, there is no actions
7841          * splitting and the validation of hairpin ingress flow should be the
7842          * same as other standard flows.
7843          */
7844         if ((action_flags & (MLX5_FLOW_XCAP_ACTIONS |
7845                              MLX5_FLOW_VLAN_ACTIONS)) &&
7846             (queue_index == 0xFFFF ||
7847              mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN ||
7848              ((conf = mlx5_rxq_get_hairpin_conf(dev, queue_index)) != NULL &&
7849              conf->tx_explicit != 0))) {
7850                 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
7851                     MLX5_FLOW_XCAP_ACTIONS)
7852                         return rte_flow_error_set(error, ENOTSUP,
7853                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7854                                                   NULL, "encap and decap "
7855                                                   "combination aren't supported");
7856                 if (!attr->transfer && attr->ingress) {
7857                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7858                                 return rte_flow_error_set
7859                                                 (error, ENOTSUP,
7860                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7861                                                  NULL, "encap is not supported"
7862                                                  " for ingress traffic");
7863                         else if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7864                                 return rte_flow_error_set
7865                                                 (error, ENOTSUP,
7866                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7867                                                  NULL, "push VLAN action not "
7868                                                  "supported for ingress");
7869                         else if ((action_flags & MLX5_FLOW_VLAN_ACTIONS) ==
7870                                         MLX5_FLOW_VLAN_ACTIONS)
7871                                 return rte_flow_error_set
7872                                                 (error, ENOTSUP,
7873                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7874                                                  NULL, "no support for "
7875                                                  "multiple VLAN actions");
7876                 }
7877         }
7878         if (action_flags & MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY) {
7879                 if ((action_flags & (MLX5_FLOW_FATE_ACTIONS &
7880                         ~MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)) &&
7881                         attr->ingress)
7882                         return rte_flow_error_set
7883                                 (error, ENOTSUP,
7884                                 RTE_FLOW_ERROR_TYPE_ACTION,
7885                                 NULL, "fate action not supported for "
7886                                 "meter with policy");
7887                 if (attr->egress) {
7888                         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
7889                                 return rte_flow_error_set
7890                                         (error, ENOTSUP,
7891                                         RTE_FLOW_ERROR_TYPE_ACTION,
7892                                         NULL, "modify header action in egress "
7893                                         "cannot be done before meter action");
7894                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7895                                 return rte_flow_error_set
7896                                         (error, ENOTSUP,
7897                                         RTE_FLOW_ERROR_TYPE_ACTION,
7898                                         NULL, "encap action in egress "
7899                                         "cannot be done before meter action");
7900                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7901                                 return rte_flow_error_set
7902                                         (error, ENOTSUP,
7903                                         RTE_FLOW_ERROR_TYPE_ACTION,
7904                                         NULL, "push vlan action in egress "
7905                                         "cannot be done before meter action");
7906                 }
7907         }
7908         /*
7909          * Hairpin flow will add one more TAG action in TX implicit mode.
7910          * In TX explicit mode, there will be no hairpin flow ID.
7911          */
7912         if (hairpin > 0)
7913                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7914         /* extra metadata enabled: one more TAG action will be add. */
7915         if (dev_conf->dv_flow_en &&
7916             dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
7917             mlx5_flow_ext_mreg_supported(dev))
7918                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7919         if (rw_act_num >
7920                         flow_dv_modify_hdr_action_max(dev, is_root)) {
7921                 return rte_flow_error_set(error, ENOTSUP,
7922                                           RTE_FLOW_ERROR_TYPE_ACTION,
7923                                           NULL, "too many header modify"
7924                                           " actions to support");
7925         }
7926         /* Eswitch egress mirror and modify flow has limitation on CX5 */
7927         if (fdb_mirror_limit && modify_after_mirror)
7928                 return rte_flow_error_set(error, EINVAL,
7929                                 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7930                                 "sample before modify action is not supported");
7931         return 0;
7932 }
7933
7934 /**
7935  * Internal preparation function. Allocates the DV flow size,
7936  * this size is constant.
7937  *
7938  * @param[in] dev
7939  *   Pointer to the rte_eth_dev structure.
7940  * @param[in] attr
7941  *   Pointer to the flow attributes.
7942  * @param[in] items
7943  *   Pointer to the list of items.
7944  * @param[in] actions
7945  *   Pointer to the list of actions.
7946  * @param[out] error
7947  *   Pointer to the error structure.
7948  *
7949  * @return
7950  *   Pointer to mlx5_flow object on success,
7951  *   otherwise NULL and rte_errno is set.
7952  */
7953 static struct mlx5_flow *
7954 flow_dv_prepare(struct rte_eth_dev *dev,
7955                 const struct rte_flow_attr *attr __rte_unused,
7956                 const struct rte_flow_item items[] __rte_unused,
7957                 const struct rte_flow_action actions[] __rte_unused,
7958                 struct rte_flow_error *error)
7959 {
7960         uint32_t handle_idx = 0;
7961         struct mlx5_flow *dev_flow;
7962         struct mlx5_flow_handle *dev_handle;
7963         struct mlx5_priv *priv = dev->data->dev_private;
7964         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
7965
7966         MLX5_ASSERT(wks);
7967         wks->skip_matcher_reg = 0;
7968         wks->policy = NULL;
7969         wks->final_policy = NULL;
7970         /* In case of corrupting the memory. */
7971         if (wks->flow_idx >= MLX5_NUM_MAX_DEV_FLOWS) {
7972                 rte_flow_error_set(error, ENOSPC,
7973                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7974                                    "not free temporary device flow");
7975                 return NULL;
7976         }
7977         dev_handle = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
7978                                    &handle_idx);
7979         if (!dev_handle) {
7980                 rte_flow_error_set(error, ENOMEM,
7981                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7982                                    "not enough memory to create flow handle");
7983                 return NULL;
7984         }
7985         MLX5_ASSERT(wks->flow_idx < RTE_DIM(wks->flows));
7986         dev_flow = &wks->flows[wks->flow_idx++];
7987         memset(dev_flow, 0, sizeof(*dev_flow));
7988         dev_flow->handle = dev_handle;
7989         dev_flow->handle_idx = handle_idx;
7990         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
7991         dev_flow->ingress = attr->ingress;
7992         dev_flow->dv.transfer = attr->transfer;
7993         return dev_flow;
7994 }
7995
7996 #ifdef RTE_LIBRTE_MLX5_DEBUG
7997 /**
7998  * Sanity check for match mask and value. Similar to check_valid_spec() in
7999  * kernel driver. If unmasked bit is present in value, it returns failure.
8000  *
8001  * @param match_mask
8002  *   pointer to match mask buffer.
8003  * @param match_value
8004  *   pointer to match value buffer.
8005  *
8006  * @return
8007  *   0 if valid, -EINVAL otherwise.
8008  */
8009 static int
8010 flow_dv_check_valid_spec(void *match_mask, void *match_value)
8011 {
8012         uint8_t *m = match_mask;
8013         uint8_t *v = match_value;
8014         unsigned int i;
8015
8016         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
8017                 if (v[i] & ~m[i]) {
8018                         DRV_LOG(ERR,
8019                                 "match_value differs from match_criteria"
8020                                 " %p[%u] != %p[%u]",
8021                                 match_value, i, match_mask, i);
8022                         return -EINVAL;
8023                 }
8024         }
8025         return 0;
8026 }
8027 #endif
8028
8029 /**
8030  * Add match of ip_version.
8031  *
8032  * @param[in] group
8033  *   Flow group.
8034  * @param[in] headers_v
8035  *   Values header pointer.
8036  * @param[in] headers_m
8037  *   Masks header pointer.
8038  * @param[in] ip_version
8039  *   The IP version to set.
8040  */
8041 static inline void
8042 flow_dv_set_match_ip_version(uint32_t group,
8043                              void *headers_v,
8044                              void *headers_m,
8045                              uint8_t ip_version)
8046 {
8047         if (group == 0)
8048                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
8049         else
8050                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version,
8051                          ip_version);
8052         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, ip_version);
8053         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, 0);
8054         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype, 0);
8055 }
8056
8057 /**
8058  * Add Ethernet item to matcher and to the value.
8059  *
8060  * @param[in, out] matcher
8061  *   Flow matcher.
8062  * @param[in, out] key
8063  *   Flow matcher value.
8064  * @param[in] item
8065  *   Flow pattern to translate.
8066  * @param[in] inner
8067  *   Item is inner pattern.
8068  */
8069 static void
8070 flow_dv_translate_item_eth(void *matcher, void *key,
8071                            const struct rte_flow_item *item, int inner,
8072                            uint32_t group)
8073 {
8074         const struct rte_flow_item_eth *eth_m = item->mask;
8075         const struct rte_flow_item_eth *eth_v = item->spec;
8076         const struct rte_flow_item_eth nic_mask = {
8077                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8078                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8079                 .type = RTE_BE16(0xffff),
8080                 .has_vlan = 0,
8081         };
8082         void *hdrs_m;
8083         void *hdrs_v;
8084         char *l24_v;
8085         unsigned int i;
8086
8087         if (!eth_v)
8088                 return;
8089         if (!eth_m)
8090                 eth_m = &nic_mask;
8091         if (inner) {
8092                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8093                                          inner_headers);
8094                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8095         } else {
8096                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8097                                          outer_headers);
8098                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8099         }
8100         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, dmac_47_16),
8101                &eth_m->dst, sizeof(eth_m->dst));
8102         /* The value must be in the range of the mask. */
8103         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, dmac_47_16);
8104         for (i = 0; i < sizeof(eth_m->dst); ++i)
8105                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
8106         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, smac_47_16),
8107                &eth_m->src, sizeof(eth_m->src));
8108         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, smac_47_16);
8109         /* The value must be in the range of the mask. */
8110         for (i = 0; i < sizeof(eth_m->dst); ++i)
8111                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
8112         /*
8113          * HW supports match on one Ethertype, the Ethertype following the last
8114          * VLAN tag of the packet (see PRM).
8115          * Set match on ethertype only if ETH header is not followed by VLAN.
8116          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8117          * ethertype, and use ip_version field instead.
8118          * eCPRI over Ether layer will use type value 0xAEFE.
8119          */
8120         if (eth_m->type == 0xFFFF) {
8121                 /* Set cvlan_tag mask for any single\multi\un-tagged case. */
8122                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8123                 switch (eth_v->type) {
8124                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8125                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8126                         return;
8127                 case RTE_BE16(RTE_ETHER_TYPE_QINQ):
8128                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8129                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8130                         return;
8131                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8132                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8133                         return;
8134                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8135                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8136                         return;
8137                 default:
8138                         break;
8139                 }
8140         }
8141         if (eth_m->has_vlan) {
8142                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8143                 if (eth_v->has_vlan) {
8144                         /*
8145                          * Here, when also has_more_vlan field in VLAN item is
8146                          * not set, only single-tagged packets will be matched.
8147                          */
8148                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8149                         return;
8150                 }
8151         }
8152         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8153                  rte_be_to_cpu_16(eth_m->type));
8154         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
8155         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
8156 }
8157
8158 /**
8159  * Add VLAN item to matcher and to the value.
8160  *
8161  * @param[in, out] dev_flow
8162  *   Flow descriptor.
8163  * @param[in, out] matcher
8164  *   Flow matcher.
8165  * @param[in, out] key
8166  *   Flow matcher value.
8167  * @param[in] item
8168  *   Flow pattern to translate.
8169  * @param[in] inner
8170  *   Item is inner pattern.
8171  */
8172 static void
8173 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
8174                             void *matcher, void *key,
8175                             const struct rte_flow_item *item,
8176                             int inner, uint32_t group)
8177 {
8178         const struct rte_flow_item_vlan *vlan_m = item->mask;
8179         const struct rte_flow_item_vlan *vlan_v = item->spec;
8180         void *hdrs_m;
8181         void *hdrs_v;
8182         uint16_t tci_m;
8183         uint16_t tci_v;
8184
8185         if (inner) {
8186                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8187                                          inner_headers);
8188                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8189         } else {
8190                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8191                                          outer_headers);
8192                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8193                 /*
8194                  * This is workaround, masks are not supported,
8195                  * and pre-validated.
8196                  */
8197                 if (vlan_v)
8198                         dev_flow->handle->vf_vlan.tag =
8199                                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
8200         }
8201         /*
8202          * When VLAN item exists in flow, mark packet as tagged,
8203          * even if TCI is not specified.
8204          */
8205         if (!MLX5_GET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag)) {
8206                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8207                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8208         }
8209         if (!vlan_v)
8210                 return;
8211         if (!vlan_m)
8212                 vlan_m = &rte_flow_item_vlan_mask;
8213         tci_m = rte_be_to_cpu_16(vlan_m->tci);
8214         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
8215         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_vid, tci_m);
8216         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_vid, tci_v);
8217         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_cfi, tci_m >> 12);
8218         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_cfi, tci_v >> 12);
8219         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_prio, tci_m >> 13);
8220         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_prio, tci_v >> 13);
8221         /*
8222          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8223          * ethertype, and use ip_version field instead.
8224          */
8225         if (vlan_m->inner_type == 0xFFFF) {
8226                 switch (vlan_v->inner_type) {
8227                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8228                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8229                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8230                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8231                         return;
8232                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8233                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8234                         return;
8235                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8236                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8237                         return;
8238                 default:
8239                         break;
8240                 }
8241         }
8242         if (vlan_m->has_more_vlan && vlan_v->has_more_vlan) {
8243                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8244                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8245                 /* Only one vlan_tag bit can be set. */
8246                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8247                 return;
8248         }
8249         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8250                  rte_be_to_cpu_16(vlan_m->inner_type));
8251         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, ethertype,
8252                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
8253 }
8254
8255 /**
8256  * Add IPV4 item to matcher and to the value.
8257  *
8258  * @param[in, out] matcher
8259  *   Flow matcher.
8260  * @param[in, out] key
8261  *   Flow matcher value.
8262  * @param[in] item
8263  *   Flow pattern to translate.
8264  * @param[in] inner
8265  *   Item is inner pattern.
8266  * @param[in] group
8267  *   The group to insert the rule.
8268  */
8269 static void
8270 flow_dv_translate_item_ipv4(void *matcher, void *key,
8271                             const struct rte_flow_item *item,
8272                             int inner, uint32_t group)
8273 {
8274         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
8275         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
8276         const struct rte_flow_item_ipv4 nic_mask = {
8277                 .hdr = {
8278                         .src_addr = RTE_BE32(0xffffffff),
8279                         .dst_addr = RTE_BE32(0xffffffff),
8280                         .type_of_service = 0xff,
8281                         .next_proto_id = 0xff,
8282                         .time_to_live = 0xff,
8283                 },
8284         };
8285         void *headers_m;
8286         void *headers_v;
8287         char *l24_m;
8288         char *l24_v;
8289         uint8_t tos, ihl_m, ihl_v;
8290
8291         if (inner) {
8292                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8293                                          inner_headers);
8294                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8295         } else {
8296                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8297                                          outer_headers);
8298                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8299         }
8300         flow_dv_set_match_ip_version(group, headers_v, headers_m, 4);
8301         if (!ipv4_v)
8302                 return;
8303         if (!ipv4_m)
8304                 ipv4_m = &nic_mask;
8305         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8306                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8307         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8308                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8309         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
8310         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
8311         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8312                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
8313         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8314                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
8315         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
8316         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
8317         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
8318         ihl_m = ipv4_m->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8319         ihl_v = ipv4_v->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8320         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_ihl, ihl_m);
8321         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_ihl, ihl_m & ihl_v);
8322         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
8323                  ipv4_m->hdr.type_of_service);
8324         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
8325         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
8326                  ipv4_m->hdr.type_of_service >> 2);
8327         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
8328         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8329                  ipv4_m->hdr.next_proto_id);
8330         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8331                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
8332         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8333                  ipv4_m->hdr.time_to_live);
8334         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8335                  ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
8336         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8337                  !!(ipv4_m->hdr.fragment_offset));
8338         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8339                  !!(ipv4_v->hdr.fragment_offset & ipv4_m->hdr.fragment_offset));
8340 }
8341
8342 /**
8343  * Add IPV6 item to matcher and to the value.
8344  *
8345  * @param[in, out] matcher
8346  *   Flow matcher.
8347  * @param[in, out] key
8348  *   Flow matcher value.
8349  * @param[in] item
8350  *   Flow pattern to translate.
8351  * @param[in] inner
8352  *   Item is inner pattern.
8353  * @param[in] group
8354  *   The group to insert the rule.
8355  */
8356 static void
8357 flow_dv_translate_item_ipv6(void *matcher, void *key,
8358                             const struct rte_flow_item *item,
8359                             int inner, uint32_t group)
8360 {
8361         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
8362         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
8363         const struct rte_flow_item_ipv6 nic_mask = {
8364                 .hdr = {
8365                         .src_addr =
8366                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
8367                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
8368                         .dst_addr =
8369                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
8370                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
8371                         .vtc_flow = RTE_BE32(0xffffffff),
8372                         .proto = 0xff,
8373                         .hop_limits = 0xff,
8374                 },
8375         };
8376         void *headers_m;
8377         void *headers_v;
8378         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8379         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8380         char *l24_m;
8381         char *l24_v;
8382         uint32_t vtc_m;
8383         uint32_t vtc_v;
8384         int i;
8385         int size;
8386
8387         if (inner) {
8388                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8389                                          inner_headers);
8390                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8391         } else {
8392                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8393                                          outer_headers);
8394                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8395         }
8396         flow_dv_set_match_ip_version(group, headers_v, headers_m, 6);
8397         if (!ipv6_v)
8398                 return;
8399         if (!ipv6_m)
8400                 ipv6_m = &nic_mask;
8401         size = sizeof(ipv6_m->hdr.dst_addr);
8402         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8403                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8404         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8405                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8406         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
8407         for (i = 0; i < size; ++i)
8408                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
8409         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8410                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
8411         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8412                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
8413         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
8414         for (i = 0; i < size; ++i)
8415                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
8416         /* TOS. */
8417         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
8418         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
8419         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
8420         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
8421         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
8422         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
8423         /* Label. */
8424         if (inner) {
8425                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
8426                          vtc_m);
8427                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
8428                          vtc_v);
8429         } else {
8430                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
8431                          vtc_m);
8432                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
8433                          vtc_v);
8434         }
8435         /* Protocol. */
8436         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8437                  ipv6_m->hdr.proto);
8438         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8439                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
8440         /* Hop limit. */
8441         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8442                  ipv6_m->hdr.hop_limits);
8443         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8444                  ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
8445         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8446                  !!(ipv6_m->has_frag_ext));
8447         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8448                  !!(ipv6_v->has_frag_ext & ipv6_m->has_frag_ext));
8449 }
8450
8451 /**
8452  * Add IPV6 fragment extension item to matcher and to the value.
8453  *
8454  * @param[in, out] matcher
8455  *   Flow matcher.
8456  * @param[in, out] key
8457  *   Flow matcher value.
8458  * @param[in] item
8459  *   Flow pattern to translate.
8460  * @param[in] inner
8461  *   Item is inner pattern.
8462  */
8463 static void
8464 flow_dv_translate_item_ipv6_frag_ext(void *matcher, void *key,
8465                                      const struct rte_flow_item *item,
8466                                      int inner)
8467 {
8468         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_m = item->mask;
8469         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_v = item->spec;
8470         const struct rte_flow_item_ipv6_frag_ext nic_mask = {
8471                 .hdr = {
8472                         .next_header = 0xff,
8473                         .frag_data = RTE_BE16(0xffff),
8474                 },
8475         };
8476         void *headers_m;
8477         void *headers_v;
8478
8479         if (inner) {
8480                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8481                                          inner_headers);
8482                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8483         } else {
8484                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8485                                          outer_headers);
8486                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8487         }
8488         /* IPv6 fragment extension item exists, so packet is IP fragment. */
8489         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
8490         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 1);
8491         if (!ipv6_frag_ext_v)
8492                 return;
8493         if (!ipv6_frag_ext_m)
8494                 ipv6_frag_ext_m = &nic_mask;
8495         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8496                  ipv6_frag_ext_m->hdr.next_header);
8497         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8498                  ipv6_frag_ext_v->hdr.next_header &
8499                  ipv6_frag_ext_m->hdr.next_header);
8500 }
8501
8502 /**
8503  * Add TCP item to matcher and to the value.
8504  *
8505  * @param[in, out] matcher
8506  *   Flow matcher.
8507  * @param[in, out] key
8508  *   Flow matcher value.
8509  * @param[in] item
8510  *   Flow pattern to translate.
8511  * @param[in] inner
8512  *   Item is inner pattern.
8513  */
8514 static void
8515 flow_dv_translate_item_tcp(void *matcher, void *key,
8516                            const struct rte_flow_item *item,
8517                            int inner)
8518 {
8519         const struct rte_flow_item_tcp *tcp_m = item->mask;
8520         const struct rte_flow_item_tcp *tcp_v = item->spec;
8521         void *headers_m;
8522         void *headers_v;
8523
8524         if (inner) {
8525                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8526                                          inner_headers);
8527                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8528         } else {
8529                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8530                                          outer_headers);
8531                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8532         }
8533         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8534         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
8535         if (!tcp_v)
8536                 return;
8537         if (!tcp_m)
8538                 tcp_m = &rte_flow_item_tcp_mask;
8539         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
8540                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
8541         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
8542                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
8543         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
8544                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
8545         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
8546                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
8547         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
8548                  tcp_m->hdr.tcp_flags);
8549         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
8550                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
8551 }
8552
8553 /**
8554  * Add UDP item to matcher and to the value.
8555  *
8556  * @param[in, out] matcher
8557  *   Flow matcher.
8558  * @param[in, out] key
8559  *   Flow matcher value.
8560  * @param[in] item
8561  *   Flow pattern to translate.
8562  * @param[in] inner
8563  *   Item is inner pattern.
8564  */
8565 static void
8566 flow_dv_translate_item_udp(void *matcher, void *key,
8567                            const struct rte_flow_item *item,
8568                            int inner)
8569 {
8570         const struct rte_flow_item_udp *udp_m = item->mask;
8571         const struct rte_flow_item_udp *udp_v = item->spec;
8572         void *headers_m;
8573         void *headers_v;
8574
8575         if (inner) {
8576                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8577                                          inner_headers);
8578                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8579         } else {
8580                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8581                                          outer_headers);
8582                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8583         }
8584         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8585         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
8586         if (!udp_v)
8587                 return;
8588         if (!udp_m)
8589                 udp_m = &rte_flow_item_udp_mask;
8590         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
8591                  rte_be_to_cpu_16(udp_m->hdr.src_port));
8592         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
8593                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
8594         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
8595                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
8596         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
8597                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
8598 }
8599
8600 /**
8601  * Add GRE optional Key item to matcher and to the value.
8602  *
8603  * @param[in, out] matcher
8604  *   Flow matcher.
8605  * @param[in, out] key
8606  *   Flow matcher value.
8607  * @param[in] item
8608  *   Flow pattern to translate.
8609  * @param[in] inner
8610  *   Item is inner pattern.
8611  */
8612 static void
8613 flow_dv_translate_item_gre_key(void *matcher, void *key,
8614                                    const struct rte_flow_item *item)
8615 {
8616         const rte_be32_t *key_m = item->mask;
8617         const rte_be32_t *key_v = item->spec;
8618         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8619         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8620         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
8621
8622         /* GRE K bit must be on and should already be validated */
8623         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
8624         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
8625         if (!key_v)
8626                 return;
8627         if (!key_m)
8628                 key_m = &gre_key_default_mask;
8629         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
8630                  rte_be_to_cpu_32(*key_m) >> 8);
8631         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
8632                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
8633         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
8634                  rte_be_to_cpu_32(*key_m) & 0xFF);
8635         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
8636                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
8637 }
8638
8639 /**
8640  * Add GRE item to matcher and to the value.
8641  *
8642  * @param[in, out] matcher
8643  *   Flow matcher.
8644  * @param[in, out] key
8645  *   Flow matcher value.
8646  * @param[in] item
8647  *   Flow pattern to translate.
8648  * @param[in] inner
8649  *   Item is inner pattern.
8650  */
8651 static void
8652 flow_dv_translate_item_gre(void *matcher, void *key,
8653                            const struct rte_flow_item *item,
8654                            int inner)
8655 {
8656         const struct rte_flow_item_gre *gre_m = item->mask;
8657         const struct rte_flow_item_gre *gre_v = item->spec;
8658         void *headers_m;
8659         void *headers_v;
8660         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8661         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8662         struct {
8663                 union {
8664                         __extension__
8665                         struct {
8666                                 uint16_t version:3;
8667                                 uint16_t rsvd0:9;
8668                                 uint16_t s_present:1;
8669                                 uint16_t k_present:1;
8670                                 uint16_t rsvd_bit1:1;
8671                                 uint16_t c_present:1;
8672                         };
8673                         uint16_t value;
8674                 };
8675         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
8676
8677         if (inner) {
8678                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8679                                          inner_headers);
8680                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8681         } else {
8682                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8683                                          outer_headers);
8684                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8685         }
8686         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8687         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
8688         if (!gre_v)
8689                 return;
8690         if (!gre_m)
8691                 gre_m = &rte_flow_item_gre_mask;
8692         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
8693                  rte_be_to_cpu_16(gre_m->protocol));
8694         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
8695                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
8696         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
8697         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
8698         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
8699                  gre_crks_rsvd0_ver_m.c_present);
8700         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
8701                  gre_crks_rsvd0_ver_v.c_present &
8702                  gre_crks_rsvd0_ver_m.c_present);
8703         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
8704                  gre_crks_rsvd0_ver_m.k_present);
8705         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
8706                  gre_crks_rsvd0_ver_v.k_present &
8707                  gre_crks_rsvd0_ver_m.k_present);
8708         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
8709                  gre_crks_rsvd0_ver_m.s_present);
8710         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
8711                  gre_crks_rsvd0_ver_v.s_present &
8712                  gre_crks_rsvd0_ver_m.s_present);
8713 }
8714
8715 /**
8716  * Add NVGRE item to matcher and to the value.
8717  *
8718  * @param[in, out] matcher
8719  *   Flow matcher.
8720  * @param[in, out] key
8721  *   Flow matcher value.
8722  * @param[in] item
8723  *   Flow pattern to translate.
8724  * @param[in] inner
8725  *   Item is inner pattern.
8726  */
8727 static void
8728 flow_dv_translate_item_nvgre(void *matcher, void *key,
8729                              const struct rte_flow_item *item,
8730                              int inner)
8731 {
8732         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
8733         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
8734         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8735         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8736         const char *tni_flow_id_m;
8737         const char *tni_flow_id_v;
8738         char *gre_key_m;
8739         char *gre_key_v;
8740         int size;
8741         int i;
8742
8743         /* For NVGRE, GRE header fields must be set with defined values. */
8744         const struct rte_flow_item_gre gre_spec = {
8745                 .c_rsvd0_ver = RTE_BE16(0x2000),
8746                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
8747         };
8748         const struct rte_flow_item_gre gre_mask = {
8749                 .c_rsvd0_ver = RTE_BE16(0xB000),
8750                 .protocol = RTE_BE16(UINT16_MAX),
8751         };
8752         const struct rte_flow_item gre_item = {
8753                 .spec = &gre_spec,
8754                 .mask = &gre_mask,
8755                 .last = NULL,
8756         };
8757         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
8758         if (!nvgre_v)
8759                 return;
8760         if (!nvgre_m)
8761                 nvgre_m = &rte_flow_item_nvgre_mask;
8762         tni_flow_id_m = (const char *)nvgre_m->tni;
8763         tni_flow_id_v = (const char *)nvgre_v->tni;
8764         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
8765         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
8766         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
8767         memcpy(gre_key_m, tni_flow_id_m, size);
8768         for (i = 0; i < size; ++i)
8769                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
8770 }
8771
8772 /**
8773  * Add VXLAN item to matcher and to the value.
8774  *
8775  * @param[in] dev
8776  *   Pointer to the Ethernet device structure.
8777  * @param[in] attr
8778  *   Flow rule attributes.
8779  * @param[in, out] matcher
8780  *   Flow matcher.
8781  * @param[in, out] key
8782  *   Flow matcher value.
8783  * @param[in] item
8784  *   Flow pattern to translate.
8785  * @param[in] inner
8786  *   Item is inner pattern.
8787  */
8788 static void
8789 flow_dv_translate_item_vxlan(struct rte_eth_dev *dev,
8790                              const struct rte_flow_attr *attr,
8791                              void *matcher, void *key,
8792                              const struct rte_flow_item *item,
8793                              int inner)
8794 {
8795         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
8796         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
8797         void *headers_m;
8798         void *headers_v;
8799         void *misc5_m;
8800         void *misc5_v;
8801         uint32_t *tunnel_header_v;
8802         uint32_t *tunnel_header_m;
8803         uint16_t dport;
8804         struct mlx5_priv *priv = dev->data->dev_private;
8805         const struct rte_flow_item_vxlan nic_mask = {
8806                 .vni = "\xff\xff\xff",
8807                 .rsvd1 = 0xff,
8808         };
8809
8810         if (inner) {
8811                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8812                                          inner_headers);
8813                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8814         } else {
8815                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8816                                          outer_headers);
8817                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8818         }
8819         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
8820                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
8821         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8822                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8823                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8824         }
8825         dport = MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport);
8826         if (!vxlan_v)
8827                 return;
8828         if (!vxlan_m) {
8829                 if ((!attr->group && !priv->sh->tunnel_header_0_1) ||
8830                     (attr->group && !priv->sh->misc5_cap))
8831                         vxlan_m = &rte_flow_item_vxlan_mask;
8832                 else
8833                         vxlan_m = &nic_mask;
8834         }
8835         if ((priv->sh->steering_format_version ==
8836             MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5 &&
8837             dport != MLX5_UDP_PORT_VXLAN) ||
8838             (!attr->group && !attr->transfer && !priv->sh->tunnel_header_0_1) ||
8839             ((attr->group || attr->transfer) && !priv->sh->misc5_cap)) {
8840                 void *misc_m;
8841                 void *misc_v;
8842                 char *vni_m;
8843                 char *vni_v;
8844                 int size;
8845                 int i;
8846                 misc_m = MLX5_ADDR_OF(fte_match_param,
8847                                       matcher, misc_parameters);
8848                 misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8849                 size = sizeof(vxlan_m->vni);
8850                 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
8851                 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
8852                 memcpy(vni_m, vxlan_m->vni, size);
8853                 for (i = 0; i < size; ++i)
8854                         vni_v[i] = vni_m[i] & vxlan_v->vni[i];
8855                 return;
8856         }
8857         misc5_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_5);
8858         misc5_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_5);
8859         tunnel_header_v = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8860                                                    misc5_v,
8861                                                    tunnel_header_1);
8862         tunnel_header_m = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8863                                                    misc5_m,
8864                                                    tunnel_header_1);
8865         *tunnel_header_v = (vxlan_v->vni[0] & vxlan_m->vni[0]) |
8866                            (vxlan_v->vni[1] & vxlan_m->vni[1]) << 8 |
8867                            (vxlan_v->vni[2] & vxlan_m->vni[2]) << 16;
8868         if (*tunnel_header_v)
8869                 *tunnel_header_m = vxlan_m->vni[0] |
8870                         vxlan_m->vni[1] << 8 |
8871                         vxlan_m->vni[2] << 16;
8872         else
8873                 *tunnel_header_m = 0x0;
8874         *tunnel_header_v |= (vxlan_v->rsvd1 & vxlan_m->rsvd1) << 24;
8875         if (vxlan_v->rsvd1 & vxlan_m->rsvd1)
8876                 *tunnel_header_m |= vxlan_m->rsvd1 << 24;
8877 }
8878
8879 /**
8880  * Add VXLAN-GPE item to matcher and to the value.
8881  *
8882  * @param[in, out] matcher
8883  *   Flow matcher.
8884  * @param[in, out] key
8885  *   Flow matcher value.
8886  * @param[in] item
8887  *   Flow pattern to translate.
8888  * @param[in] inner
8889  *   Item is inner pattern.
8890  */
8891
8892 static void
8893 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
8894                                  const struct rte_flow_item *item, int inner)
8895 {
8896         const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
8897         const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
8898         void *headers_m;
8899         void *headers_v;
8900         void *misc_m =
8901                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
8902         void *misc_v =
8903                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
8904         char *vni_m;
8905         char *vni_v;
8906         uint16_t dport;
8907         int size;
8908         int i;
8909         uint8_t flags_m = 0xff;
8910         uint8_t flags_v = 0xc;
8911
8912         if (inner) {
8913                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8914                                          inner_headers);
8915                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8916         } else {
8917                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8918                                          outer_headers);
8919                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8920         }
8921         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
8922                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
8923         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8924                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8925                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8926         }
8927         if (!vxlan_v)
8928                 return;
8929         if (!vxlan_m)
8930                 vxlan_m = &rte_flow_item_vxlan_gpe_mask;
8931         size = sizeof(vxlan_m->vni);
8932         vni_m = MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
8933         vni_v = MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
8934         memcpy(vni_m, vxlan_m->vni, size);
8935         for (i = 0; i < size; ++i)
8936                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
8937         if (vxlan_m->flags) {
8938                 flags_m = vxlan_m->flags;
8939                 flags_v = vxlan_v->flags;
8940         }
8941         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
8942         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
8943         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_next_protocol,
8944                  vxlan_m->protocol);
8945         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_next_protocol,
8946                  vxlan_v->protocol);
8947 }
8948
8949 /**
8950  * Add Geneve item to matcher and to the value.
8951  *
8952  * @param[in, out] matcher
8953  *   Flow matcher.
8954  * @param[in, out] key
8955  *   Flow matcher value.
8956  * @param[in] item
8957  *   Flow pattern to translate.
8958  * @param[in] inner
8959  *   Item is inner pattern.
8960  */
8961
8962 static void
8963 flow_dv_translate_item_geneve(void *matcher, void *key,
8964                               const struct rte_flow_item *item, int inner)
8965 {
8966         const struct rte_flow_item_geneve *geneve_m = item->mask;
8967         const struct rte_flow_item_geneve *geneve_v = item->spec;
8968         void *headers_m;
8969         void *headers_v;
8970         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8971         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8972         uint16_t dport;
8973         uint16_t gbhdr_m;
8974         uint16_t gbhdr_v;
8975         char *vni_m;
8976         char *vni_v;
8977         size_t size, i;
8978
8979         if (inner) {
8980                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8981                                          inner_headers);
8982                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8983         } else {
8984                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8985                                          outer_headers);
8986                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8987         }
8988         dport = MLX5_UDP_PORT_GENEVE;
8989         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8990                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8991                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8992         }
8993         if (!geneve_v)
8994                 return;
8995         if (!geneve_m)
8996                 geneve_m = &rte_flow_item_geneve_mask;
8997         size = sizeof(geneve_m->vni);
8998         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
8999         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
9000         memcpy(vni_m, geneve_m->vni, size);
9001         for (i = 0; i < size; ++i)
9002                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
9003         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
9004                  rte_be_to_cpu_16(geneve_m->protocol));
9005         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
9006                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
9007         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
9008         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
9009         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
9010                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9011         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
9012                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9013         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9014                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9015         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9016                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
9017                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9018 }
9019
9020 /**
9021  * Create Geneve TLV option resource.
9022  *
9023  * @param dev[in, out]
9024  *   Pointer to rte_eth_dev structure.
9025  * @param[in, out] tag_be24
9026  *   Tag value in big endian then R-shift 8.
9027  * @parm[in, out] dev_flow
9028  *   Pointer to the dev_flow.
9029  * @param[out] error
9030  *   pointer to error structure.
9031  *
9032  * @return
9033  *   0 on success otherwise -errno and errno is set.
9034  */
9035
9036 int
9037 flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev,
9038                                              const struct rte_flow_item *item,
9039                                              struct rte_flow_error *error)
9040 {
9041         struct mlx5_priv *priv = dev->data->dev_private;
9042         struct mlx5_dev_ctx_shared *sh = priv->sh;
9043         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
9044                         sh->geneve_tlv_option_resource;
9045         struct mlx5_devx_obj *obj;
9046         const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9047         int ret = 0;
9048
9049         if (!geneve_opt_v)
9050                 return -1;
9051         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
9052         if (geneve_opt_resource != NULL) {
9053                 if (geneve_opt_resource->option_class ==
9054                         geneve_opt_v->option_class &&
9055                         geneve_opt_resource->option_type ==
9056                         geneve_opt_v->option_type &&
9057                         geneve_opt_resource->length ==
9058                         geneve_opt_v->option_len) {
9059                         /* We already have GENVE TLV option obj allocated. */
9060                         __atomic_fetch_add(&geneve_opt_resource->refcnt, 1,
9061                                            __ATOMIC_RELAXED);
9062                 } else {
9063                         ret = rte_flow_error_set(error, ENOMEM,
9064                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9065                                 "Only one GENEVE TLV option supported");
9066                         goto exit;
9067                 }
9068         } else {
9069                 /* Create a GENEVE TLV object and resource. */
9070                 obj = mlx5_devx_cmd_create_geneve_tlv_option(sh->cdev->ctx,
9071                                 geneve_opt_v->option_class,
9072                                 geneve_opt_v->option_type,
9073                                 geneve_opt_v->option_len);
9074                 if (!obj) {
9075                         ret = rte_flow_error_set(error, ENODATA,
9076                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9077                                 "Failed to create GENEVE TLV Devx object");
9078                         goto exit;
9079                 }
9080                 sh->geneve_tlv_option_resource =
9081                                 mlx5_malloc(MLX5_MEM_ZERO,
9082                                                 sizeof(*geneve_opt_resource),
9083                                                 0, SOCKET_ID_ANY);
9084                 if (!sh->geneve_tlv_option_resource) {
9085                         claim_zero(mlx5_devx_cmd_destroy(obj));
9086                         ret = rte_flow_error_set(error, ENOMEM,
9087                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9088                                 "GENEVE TLV object memory allocation failed");
9089                         goto exit;
9090                 }
9091                 geneve_opt_resource = sh->geneve_tlv_option_resource;
9092                 geneve_opt_resource->obj = obj;
9093                 geneve_opt_resource->option_class = geneve_opt_v->option_class;
9094                 geneve_opt_resource->option_type = geneve_opt_v->option_type;
9095                 geneve_opt_resource->length = geneve_opt_v->option_len;
9096                 __atomic_store_n(&geneve_opt_resource->refcnt, 1,
9097                                 __ATOMIC_RELAXED);
9098         }
9099 exit:
9100         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
9101         return ret;
9102 }
9103
9104 /**
9105  * Add Geneve TLV option item to matcher.
9106  *
9107  * @param[in, out] dev
9108  *   Pointer to rte_eth_dev structure.
9109  * @param[in, out] matcher
9110  *   Flow matcher.
9111  * @param[in, out] key
9112  *   Flow matcher value.
9113  * @param[in] item
9114  *   Flow pattern to translate.
9115  * @param[out] error
9116  *   Pointer to error structure.
9117  */
9118 static int
9119 flow_dv_translate_item_geneve_opt(struct rte_eth_dev *dev, void *matcher,
9120                                   void *key, const struct rte_flow_item *item,
9121                                   struct rte_flow_error *error)
9122 {
9123         const struct rte_flow_item_geneve_opt *geneve_opt_m = item->mask;
9124         const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9125         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9126         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9127         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9128                         misc_parameters_3);
9129         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9130         rte_be32_t opt_data_key = 0, opt_data_mask = 0;
9131         int ret = 0;
9132
9133         if (!geneve_opt_v)
9134                 return -1;
9135         if (!geneve_opt_m)
9136                 geneve_opt_m = &rte_flow_item_geneve_opt_mask;
9137         ret = flow_dev_geneve_tlv_option_resource_register(dev, item,
9138                                                            error);
9139         if (ret) {
9140                 DRV_LOG(ERR, "Failed to create geneve_tlv_obj");
9141                 return ret;
9142         }
9143         /*
9144          * Set the option length in GENEVE header if not requested.
9145          * The GENEVE TLV option length is expressed by the option length field
9146          * in the GENEVE header.
9147          * If the option length was not requested but the GENEVE TLV option item
9148          * is present we set the option length field implicitly.
9149          */
9150         if (!MLX5_GET16(fte_match_set_misc, misc_m, geneve_opt_len)) {
9151                 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9152                          MLX5_GENEVE_OPTLEN_MASK);
9153                 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9154                          geneve_opt_v->option_len + 1);
9155         }
9156         MLX5_SET(fte_match_set_misc, misc_m, geneve_tlv_option_0_exist, 1);
9157         MLX5_SET(fte_match_set_misc, misc_v, geneve_tlv_option_0_exist, 1);
9158         /* Set the data. */
9159         if (geneve_opt_v->data) {
9160                 memcpy(&opt_data_key, geneve_opt_v->data,
9161                         RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9162                                 sizeof(opt_data_key)));
9163                 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9164                                 sizeof(opt_data_key));
9165                 memcpy(&opt_data_mask, geneve_opt_m->data,
9166                         RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9167                                 sizeof(opt_data_mask)));
9168                 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9169                                 sizeof(opt_data_mask));
9170                 MLX5_SET(fte_match_set_misc3, misc3_m,
9171                                 geneve_tlv_option_0_data,
9172                                 rte_be_to_cpu_32(opt_data_mask));
9173                 MLX5_SET(fte_match_set_misc3, misc3_v,
9174                                 geneve_tlv_option_0_data,
9175                         rte_be_to_cpu_32(opt_data_key & opt_data_mask));
9176         }
9177         return ret;
9178 }
9179
9180 /**
9181  * Add MPLS item to matcher and to the value.
9182  *
9183  * @param[in, out] matcher
9184  *   Flow matcher.
9185  * @param[in, out] key
9186  *   Flow matcher value.
9187  * @param[in] item
9188  *   Flow pattern to translate.
9189  * @param[in] prev_layer
9190  *   The protocol layer indicated in previous item.
9191  * @param[in] inner
9192  *   Item is inner pattern.
9193  */
9194 static void
9195 flow_dv_translate_item_mpls(void *matcher, void *key,
9196                             const struct rte_flow_item *item,
9197                             uint64_t prev_layer,
9198                             int inner)
9199 {
9200         const uint32_t *in_mpls_m = item->mask;
9201         const uint32_t *in_mpls_v = item->spec;
9202         uint32_t *out_mpls_m = 0;
9203         uint32_t *out_mpls_v = 0;
9204         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9205         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9206         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
9207                                      misc_parameters_2);
9208         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9209         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9210         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9211
9212         switch (prev_layer) {
9213         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9214                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
9215                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9216                          MLX5_UDP_PORT_MPLS);
9217                 break;
9218         case MLX5_FLOW_LAYER_GRE:
9219                 /* Fall-through. */
9220         case MLX5_FLOW_LAYER_GRE_KEY:
9221                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
9222                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
9223                          RTE_ETHER_TYPE_MPLS);
9224                 break;
9225         default:
9226                 break;
9227         }
9228         if (!in_mpls_v)
9229                 return;
9230         if (!in_mpls_m)
9231                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
9232         switch (prev_layer) {
9233         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9234                 out_mpls_m =
9235                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9236                                                  outer_first_mpls_over_udp);
9237                 out_mpls_v =
9238                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9239                                                  outer_first_mpls_over_udp);
9240                 break;
9241         case MLX5_FLOW_LAYER_GRE:
9242                 out_mpls_m =
9243                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9244                                                  outer_first_mpls_over_gre);
9245                 out_mpls_v =
9246                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9247                                                  outer_first_mpls_over_gre);
9248                 break;
9249         default:
9250                 /* Inner MPLS not over GRE is not supported. */
9251                 if (!inner) {
9252                         out_mpls_m =
9253                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9254                                                          misc2_m,
9255                                                          outer_first_mpls);
9256                         out_mpls_v =
9257                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9258                                                          misc2_v,
9259                                                          outer_first_mpls);
9260                 }
9261                 break;
9262         }
9263         if (out_mpls_m && out_mpls_v) {
9264                 *out_mpls_m = *in_mpls_m;
9265                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
9266         }
9267 }
9268
9269 /**
9270  * Add metadata register item to matcher
9271  *
9272  * @param[in, out] matcher
9273  *   Flow matcher.
9274  * @param[in, out] key
9275  *   Flow matcher value.
9276  * @param[in] reg_type
9277  *   Type of device metadata register
9278  * @param[in] value
9279  *   Register value
9280  * @param[in] mask
9281  *   Register mask
9282  */
9283 static void
9284 flow_dv_match_meta_reg(void *matcher, void *key,
9285                        enum modify_reg reg_type,
9286                        uint32_t data, uint32_t mask)
9287 {
9288         void *misc2_m =
9289                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
9290         void *misc2_v =
9291                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9292         uint32_t temp;
9293
9294         data &= mask;
9295         switch (reg_type) {
9296         case REG_A:
9297                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
9298                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
9299                 break;
9300         case REG_B:
9301                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
9302                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
9303                 break;
9304         case REG_C_0:
9305                 /*
9306                  * The metadata register C0 field might be divided into
9307                  * source vport index and META item value, we should set
9308                  * this field according to specified mask, not as whole one.
9309                  */
9310                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
9311                 temp |= mask;
9312                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
9313                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
9314                 temp &= ~mask;
9315                 temp |= data;
9316                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
9317                 break;
9318         case REG_C_1:
9319                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
9320                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
9321                 break;
9322         case REG_C_2:
9323                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
9324                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
9325                 break;
9326         case REG_C_3:
9327                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
9328                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
9329                 break;
9330         case REG_C_4:
9331                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
9332                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
9333                 break;
9334         case REG_C_5:
9335                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
9336                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
9337                 break;
9338         case REG_C_6:
9339                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
9340                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
9341                 break;
9342         case REG_C_7:
9343                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
9344                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
9345                 break;
9346         default:
9347                 MLX5_ASSERT(false);
9348                 break;
9349         }
9350 }
9351
9352 /**
9353  * Add MARK item to matcher
9354  *
9355  * @param[in] dev
9356  *   The device to configure through.
9357  * @param[in, out] matcher
9358  *   Flow matcher.
9359  * @param[in, out] key
9360  *   Flow matcher value.
9361  * @param[in] item
9362  *   Flow pattern to translate.
9363  */
9364 static void
9365 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
9366                             void *matcher, void *key,
9367                             const struct rte_flow_item *item)
9368 {
9369         struct mlx5_priv *priv = dev->data->dev_private;
9370         const struct rte_flow_item_mark *mark;
9371         uint32_t value;
9372         uint32_t mask;
9373
9374         mark = item->mask ? (const void *)item->mask :
9375                             &rte_flow_item_mark_mask;
9376         mask = mark->id & priv->sh->dv_mark_mask;
9377         mark = (const void *)item->spec;
9378         MLX5_ASSERT(mark);
9379         value = mark->id & priv->sh->dv_mark_mask & mask;
9380         if (mask) {
9381                 enum modify_reg reg;
9382
9383                 /* Get the metadata register index for the mark. */
9384                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
9385                 MLX5_ASSERT(reg > 0);
9386                 if (reg == REG_C_0) {
9387                         struct mlx5_priv *priv = dev->data->dev_private;
9388                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9389                         uint32_t shl_c0 = rte_bsf32(msk_c0);
9390
9391                         mask &= msk_c0;
9392                         mask <<= shl_c0;
9393                         value <<= shl_c0;
9394                 }
9395                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9396         }
9397 }
9398
9399 /**
9400  * Add META item to matcher
9401  *
9402  * @param[in] dev
9403  *   The devich to configure through.
9404  * @param[in, out] matcher
9405  *   Flow matcher.
9406  * @param[in, out] key
9407  *   Flow matcher value.
9408  * @param[in] attr
9409  *   Attributes of flow that includes this item.
9410  * @param[in] item
9411  *   Flow pattern to translate.
9412  */
9413 static void
9414 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
9415                             void *matcher, void *key,
9416                             const struct rte_flow_attr *attr,
9417                             const struct rte_flow_item *item)
9418 {
9419         const struct rte_flow_item_meta *meta_m;
9420         const struct rte_flow_item_meta *meta_v;
9421
9422         meta_m = (const void *)item->mask;
9423         if (!meta_m)
9424                 meta_m = &rte_flow_item_meta_mask;
9425         meta_v = (const void *)item->spec;
9426         if (meta_v) {
9427                 int reg;
9428                 uint32_t value = meta_v->data;
9429                 uint32_t mask = meta_m->data;
9430
9431                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
9432                 if (reg < 0)
9433                         return;
9434                 MLX5_ASSERT(reg != REG_NON);
9435                 if (reg == REG_C_0) {
9436                         struct mlx5_priv *priv = dev->data->dev_private;
9437                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9438                         uint32_t shl_c0 = rte_bsf32(msk_c0);
9439
9440                         mask &= msk_c0;
9441                         mask <<= shl_c0;
9442                         value <<= shl_c0;
9443                 }
9444                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9445         }
9446 }
9447
9448 /**
9449  * Add vport metadata Reg C0 item to matcher
9450  *
9451  * @param[in, out] matcher
9452  *   Flow matcher.
9453  * @param[in, out] key
9454  *   Flow matcher value.
9455  * @param[in] reg
9456  *   Flow pattern to translate.
9457  */
9458 static void
9459 flow_dv_translate_item_meta_vport(void *matcher, void *key,
9460                                   uint32_t value, uint32_t mask)
9461 {
9462         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
9463 }
9464
9465 /**
9466  * Add tag item to matcher
9467  *
9468  * @param[in] dev
9469  *   The devich to configure through.
9470  * @param[in, out] matcher
9471  *   Flow matcher.
9472  * @param[in, out] key
9473  *   Flow matcher value.
9474  * @param[in] item
9475  *   Flow pattern to translate.
9476  */
9477 static void
9478 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
9479                                 void *matcher, void *key,
9480                                 const struct rte_flow_item *item)
9481 {
9482         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
9483         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
9484         uint32_t mask, value;
9485
9486         MLX5_ASSERT(tag_v);
9487         value = tag_v->data;
9488         mask = tag_m ? tag_m->data : UINT32_MAX;
9489         if (tag_v->id == REG_C_0) {
9490                 struct mlx5_priv *priv = dev->data->dev_private;
9491                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9492                 uint32_t shl_c0 = rte_bsf32(msk_c0);
9493
9494                 mask &= msk_c0;
9495                 mask <<= shl_c0;
9496                 value <<= shl_c0;
9497         }
9498         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
9499 }
9500
9501 /**
9502  * Add TAG item to matcher
9503  *
9504  * @param[in] dev
9505  *   The devich to configure through.
9506  * @param[in, out] matcher
9507  *   Flow matcher.
9508  * @param[in, out] key
9509  *   Flow matcher value.
9510  * @param[in] item
9511  *   Flow pattern to translate.
9512  */
9513 static void
9514 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
9515                            void *matcher, void *key,
9516                            const struct rte_flow_item *item)
9517 {
9518         const struct rte_flow_item_tag *tag_v = item->spec;
9519         const struct rte_flow_item_tag *tag_m = item->mask;
9520         enum modify_reg reg;
9521
9522         MLX5_ASSERT(tag_v);
9523         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
9524         /* Get the metadata register index for the tag. */
9525         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
9526         MLX5_ASSERT(reg > 0);
9527         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
9528 }
9529
9530 /**
9531  * Add source vport match to the specified matcher.
9532  *
9533  * @param[in, out] matcher
9534  *   Flow matcher.
9535  * @param[in, out] key
9536  *   Flow matcher value.
9537  * @param[in] port
9538  *   Source vport value to match
9539  * @param[in] mask
9540  *   Mask
9541  */
9542 static void
9543 flow_dv_translate_item_source_vport(void *matcher, void *key,
9544                                     int16_t port, uint16_t mask)
9545 {
9546         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9547         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9548
9549         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
9550         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
9551 }
9552
9553 /**
9554  * Translate port-id item to eswitch match on  port-id.
9555  *
9556  * @param[in] dev
9557  *   The devich to configure through.
9558  * @param[in, out] matcher
9559  *   Flow matcher.
9560  * @param[in, out] key
9561  *   Flow matcher value.
9562  * @param[in] item
9563  *   Flow pattern to translate.
9564  * @param[in]
9565  *   Flow attributes.
9566  *
9567  * @return
9568  *   0 on success, a negative errno value otherwise.
9569  */
9570 static int
9571 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
9572                                void *key, const struct rte_flow_item *item,
9573                                const struct rte_flow_attr *attr)
9574 {
9575         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
9576         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
9577         struct mlx5_priv *priv;
9578         uint16_t mask, id;
9579
9580         mask = pid_m ? pid_m->id : 0xffff;
9581         id = pid_v ? pid_v->id : dev->data->port_id;
9582         priv = mlx5_port_to_eswitch_info(id, item == NULL);
9583         if (!priv)
9584                 return -rte_errno;
9585         /*
9586          * Translate to vport field or to metadata, depending on mode.
9587          * Kernel can use either misc.source_port or half of C0 metadata
9588          * register.
9589          */
9590         if (priv->vport_meta_mask) {
9591                 /*
9592                  * Provide the hint for SW steering library
9593                  * to insert the flow into ingress domain and
9594                  * save the extra vport match.
9595                  */
9596                 if (mask == 0xffff && priv->vport_id == 0xffff &&
9597                     priv->pf_bond < 0 && attr->transfer)
9598                         flow_dv_translate_item_source_vport
9599                                 (matcher, key, priv->vport_id, mask);
9600                 /*
9601                  * We should always set the vport metadata register,
9602                  * otherwise the SW steering library can drop
9603                  * the rule if wire vport metadata value is not zero,
9604                  * it depends on kernel configuration.
9605                  */
9606                 flow_dv_translate_item_meta_vport(matcher, key,
9607                                                   priv->vport_meta_tag,
9608                                                   priv->vport_meta_mask);
9609         } else {
9610                 flow_dv_translate_item_source_vport(matcher, key,
9611                                                     priv->vport_id, mask);
9612         }
9613         return 0;
9614 }
9615
9616 /**
9617  * Add ICMP6 item to matcher and to the value.
9618  *
9619  * @param[in, out] matcher
9620  *   Flow matcher.
9621  * @param[in, out] key
9622  *   Flow matcher value.
9623  * @param[in] item
9624  *   Flow pattern to translate.
9625  * @param[in] inner
9626  *   Item is inner pattern.
9627  */
9628 static void
9629 flow_dv_translate_item_icmp6(void *matcher, void *key,
9630                               const struct rte_flow_item *item,
9631                               int inner)
9632 {
9633         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
9634         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
9635         void *headers_m;
9636         void *headers_v;
9637         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9638                                      misc_parameters_3);
9639         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9640         if (inner) {
9641                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9642                                          inner_headers);
9643                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9644         } else {
9645                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9646                                          outer_headers);
9647                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9648         }
9649         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9650         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
9651         if (!icmp6_v)
9652                 return;
9653         if (!icmp6_m)
9654                 icmp6_m = &rte_flow_item_icmp6_mask;
9655         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
9656         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
9657                  icmp6_v->type & icmp6_m->type);
9658         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
9659         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
9660                  icmp6_v->code & icmp6_m->code);
9661 }
9662
9663 /**
9664  * Add ICMP item to matcher and to the value.
9665  *
9666  * @param[in, out] matcher
9667  *   Flow matcher.
9668  * @param[in, out] key
9669  *   Flow matcher value.
9670  * @param[in] item
9671  *   Flow pattern to translate.
9672  * @param[in] inner
9673  *   Item is inner pattern.
9674  */
9675 static void
9676 flow_dv_translate_item_icmp(void *matcher, void *key,
9677                             const struct rte_flow_item *item,
9678                             int inner)
9679 {
9680         const struct rte_flow_item_icmp *icmp_m = item->mask;
9681         const struct rte_flow_item_icmp *icmp_v = item->spec;
9682         uint32_t icmp_header_data_m = 0;
9683         uint32_t icmp_header_data_v = 0;
9684         void *headers_m;
9685         void *headers_v;
9686         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9687                                      misc_parameters_3);
9688         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9689         if (inner) {
9690                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9691                                          inner_headers);
9692                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9693         } else {
9694                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9695                                          outer_headers);
9696                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9697         }
9698         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9699         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
9700         if (!icmp_v)
9701                 return;
9702         if (!icmp_m)
9703                 icmp_m = &rte_flow_item_icmp_mask;
9704         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
9705                  icmp_m->hdr.icmp_type);
9706         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
9707                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
9708         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
9709                  icmp_m->hdr.icmp_code);
9710         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
9711                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
9712         icmp_header_data_m = rte_be_to_cpu_16(icmp_m->hdr.icmp_seq_nb);
9713         icmp_header_data_m |= rte_be_to_cpu_16(icmp_m->hdr.icmp_ident) << 16;
9714         if (icmp_header_data_m) {
9715                 icmp_header_data_v = rte_be_to_cpu_16(icmp_v->hdr.icmp_seq_nb);
9716                 icmp_header_data_v |=
9717                          rte_be_to_cpu_16(icmp_v->hdr.icmp_ident) << 16;
9718                 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_header_data,
9719                          icmp_header_data_m);
9720                 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_header_data,
9721                          icmp_header_data_v & icmp_header_data_m);
9722         }
9723 }
9724
9725 /**
9726  * Add GTP item to matcher and to the value.
9727  *
9728  * @param[in, out] matcher
9729  *   Flow matcher.
9730  * @param[in, out] key
9731  *   Flow matcher value.
9732  * @param[in] item
9733  *   Flow pattern to translate.
9734  * @param[in] inner
9735  *   Item is inner pattern.
9736  */
9737 static void
9738 flow_dv_translate_item_gtp(void *matcher, void *key,
9739                            const struct rte_flow_item *item, int inner)
9740 {
9741         const struct rte_flow_item_gtp *gtp_m = item->mask;
9742         const struct rte_flow_item_gtp *gtp_v = item->spec;
9743         void *headers_m;
9744         void *headers_v;
9745         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9746                                      misc_parameters_3);
9747         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9748         uint16_t dport = RTE_GTPU_UDP_PORT;
9749
9750         if (inner) {
9751                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9752                                          inner_headers);
9753                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9754         } else {
9755                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9756                                          outer_headers);
9757                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9758         }
9759         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9760                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9761                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9762         }
9763         if (!gtp_v)
9764                 return;
9765         if (!gtp_m)
9766                 gtp_m = &rte_flow_item_gtp_mask;
9767         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags,
9768                  gtp_m->v_pt_rsv_flags);
9769         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags,
9770                  gtp_v->v_pt_rsv_flags & gtp_m->v_pt_rsv_flags);
9771         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
9772         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
9773                  gtp_v->msg_type & gtp_m->msg_type);
9774         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
9775                  rte_be_to_cpu_32(gtp_m->teid));
9776         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
9777                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
9778 }
9779
9780 /**
9781  * Add GTP PSC item to matcher.
9782  *
9783  * @param[in, out] matcher
9784  *   Flow matcher.
9785  * @param[in, out] key
9786  *   Flow matcher value.
9787  * @param[in] item
9788  *   Flow pattern to translate.
9789  */
9790 static int
9791 flow_dv_translate_item_gtp_psc(void *matcher, void *key,
9792                                const struct rte_flow_item *item)
9793 {
9794         const struct rte_flow_item_gtp_psc *gtp_psc_m = item->mask;
9795         const struct rte_flow_item_gtp_psc *gtp_psc_v = item->spec;
9796         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9797                         misc_parameters_3);
9798         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9799         union {
9800                 uint32_t w32;
9801                 struct {
9802                         uint16_t seq_num;
9803                         uint8_t npdu_num;
9804                         uint8_t next_ext_header_type;
9805                 };
9806         } dw_2;
9807         uint8_t gtp_flags;
9808
9809         /* Always set E-flag match on one, regardless of GTP item settings. */
9810         gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_m, gtpu_msg_flags);
9811         gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9812         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags, gtp_flags);
9813         gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_v, gtpu_msg_flags);
9814         gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9815         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags, gtp_flags);
9816         /*Set next extension header type. */
9817         dw_2.seq_num = 0;
9818         dw_2.npdu_num = 0;
9819         dw_2.next_ext_header_type = 0xff;
9820         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_dw_2,
9821                  rte_cpu_to_be_32(dw_2.w32));
9822         dw_2.seq_num = 0;
9823         dw_2.npdu_num = 0;
9824         dw_2.next_ext_header_type = 0x85;
9825         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_dw_2,
9826                  rte_cpu_to_be_32(dw_2.w32));
9827         if (gtp_psc_v) {
9828                 union {
9829                         uint32_t w32;
9830                         struct {
9831                                 uint8_t len;
9832                                 uint8_t type_flags;
9833                                 uint8_t qfi;
9834                                 uint8_t reserved;
9835                         };
9836                 } dw_0;
9837
9838                 /*Set extension header PDU type and Qos. */
9839                 if (!gtp_psc_m)
9840                         gtp_psc_m = &rte_flow_item_gtp_psc_mask;
9841                 dw_0.w32 = 0;
9842                 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_m->hdr.type);
9843                 dw_0.qfi = gtp_psc_m->hdr.qfi;
9844                 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_first_ext_dw_0,
9845                          rte_cpu_to_be_32(dw_0.w32));
9846                 dw_0.w32 = 0;
9847                 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_v->hdr.type &
9848                                                         gtp_psc_m->hdr.type);
9849                 dw_0.qfi = gtp_psc_v->hdr.qfi & gtp_psc_m->hdr.qfi;
9850                 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_first_ext_dw_0,
9851                          rte_cpu_to_be_32(dw_0.w32));
9852         }
9853         return 0;
9854 }
9855
9856 /**
9857  * Add eCPRI item to matcher and to the value.
9858  *
9859  * @param[in] dev
9860  *   The devich to configure through.
9861  * @param[in, out] matcher
9862  *   Flow matcher.
9863  * @param[in, out] key
9864  *   Flow matcher value.
9865  * @param[in] item
9866  *   Flow pattern to translate.
9867  * @param[in] last_item
9868  *   Last item flags.
9869  */
9870 static void
9871 flow_dv_translate_item_ecpri(struct rte_eth_dev *dev, void *matcher,
9872                              void *key, const struct rte_flow_item *item,
9873                              uint64_t last_item)
9874 {
9875         struct mlx5_priv *priv = dev->data->dev_private;
9876         const struct rte_flow_item_ecpri *ecpri_m = item->mask;
9877         const struct rte_flow_item_ecpri *ecpri_v = item->spec;
9878         struct rte_ecpri_common_hdr common;
9879         void *misc4_m = MLX5_ADDR_OF(fte_match_param, matcher,
9880                                      misc_parameters_4);
9881         void *misc4_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_4);
9882         uint32_t *samples;
9883         void *dw_m;
9884         void *dw_v;
9885
9886         /*
9887          * In case of eCPRI over Ethernet, if EtherType is not specified,
9888          * match on eCPRI EtherType implicitly.
9889          */
9890         if (last_item & MLX5_FLOW_LAYER_OUTER_L2) {
9891                 void *hdrs_m, *hdrs_v, *l2m, *l2v;
9892
9893                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9894                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9895                 l2m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, ethertype);
9896                 l2v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
9897                 if (*(uint16_t *)l2m == 0 && *(uint16_t *)l2v == 0) {
9898                         *(uint16_t *)l2m = UINT16_MAX;
9899                         *(uint16_t *)l2v = RTE_BE16(RTE_ETHER_TYPE_ECPRI);
9900                 }
9901         }
9902         if (!ecpri_v)
9903                 return;
9904         if (!ecpri_m)
9905                 ecpri_m = &rte_flow_item_ecpri_mask;
9906         /*
9907          * Maximal four DW samples are supported in a single matching now.
9908          * Two are used now for a eCPRI matching:
9909          * 1. Type: one byte, mask should be 0x00ff0000 in network order
9910          * 2. ID of a message: one or two bytes, mask 0xffff0000 or 0xff000000
9911          *    if any.
9912          */
9913         if (!ecpri_m->hdr.common.u32)
9914                 return;
9915         samples = priv->sh->fp[MLX5_FLEX_PARSER_ECPRI_0].ids;
9916         /* Need to take the whole DW as the mask to fill the entry. */
9917         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
9918                             prog_sample_field_value_0);
9919         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
9920                             prog_sample_field_value_0);
9921         /* Already big endian (network order) in the header. */
9922         *(uint32_t *)dw_m = ecpri_m->hdr.common.u32;
9923         *(uint32_t *)dw_v = ecpri_v->hdr.common.u32 & ecpri_m->hdr.common.u32;
9924         /* Sample#0, used for matching type, offset 0. */
9925         MLX5_SET(fte_match_set_misc4, misc4_m,
9926                  prog_sample_field_id_0, samples[0]);
9927         /* It makes no sense to set the sample ID in the mask field. */
9928         MLX5_SET(fte_match_set_misc4, misc4_v,
9929                  prog_sample_field_id_0, samples[0]);
9930         /*
9931          * Checking if message body part needs to be matched.
9932          * Some wildcard rules only matching type field should be supported.
9933          */
9934         if (ecpri_m->hdr.dummy[0]) {
9935                 common.u32 = rte_be_to_cpu_32(ecpri_v->hdr.common.u32);
9936                 switch (common.type) {
9937                 case RTE_ECPRI_MSG_TYPE_IQ_DATA:
9938                 case RTE_ECPRI_MSG_TYPE_RTC_CTRL:
9939                 case RTE_ECPRI_MSG_TYPE_DLY_MSR:
9940                         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
9941                                             prog_sample_field_value_1);
9942                         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
9943                                             prog_sample_field_value_1);
9944                         *(uint32_t *)dw_m = ecpri_m->hdr.dummy[0];
9945                         *(uint32_t *)dw_v = ecpri_v->hdr.dummy[0] &
9946                                             ecpri_m->hdr.dummy[0];
9947                         /* Sample#1, to match message body, offset 4. */
9948                         MLX5_SET(fte_match_set_misc4, misc4_m,
9949                                  prog_sample_field_id_1, samples[1]);
9950                         MLX5_SET(fte_match_set_misc4, misc4_v,
9951                                  prog_sample_field_id_1, samples[1]);
9952                         break;
9953                 default:
9954                         /* Others, do not match any sample ID. */
9955                         break;
9956                 }
9957         }
9958 }
9959
9960 /*
9961  * Add connection tracking status item to matcher
9962  *
9963  * @param[in] dev
9964  *   The devich to configure through.
9965  * @param[in, out] matcher
9966  *   Flow matcher.
9967  * @param[in, out] key
9968  *   Flow matcher value.
9969  * @param[in] item
9970  *   Flow pattern to translate.
9971  */
9972 static void
9973 flow_dv_translate_item_aso_ct(struct rte_eth_dev *dev,
9974                               void *matcher, void *key,
9975                               const struct rte_flow_item *item)
9976 {
9977         uint32_t reg_value = 0;
9978         int reg_id;
9979         /* 8LSB 0b 11/0000/11, middle 4 bits are reserved. */
9980         uint32_t reg_mask = 0;
9981         const struct rte_flow_item_conntrack *spec = item->spec;
9982         const struct rte_flow_item_conntrack *mask = item->mask;
9983         uint32_t flags;
9984         struct rte_flow_error error;
9985
9986         if (!mask)
9987                 mask = &rte_flow_item_conntrack_mask;
9988         if (!spec || !mask->flags)
9989                 return;
9990         flags = spec->flags & mask->flags;
9991         /* The conflict should be checked in the validation. */
9992         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID)
9993                 reg_value |= MLX5_CT_SYNDROME_VALID;
9994         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
9995                 reg_value |= MLX5_CT_SYNDROME_STATE_CHANGE;
9996         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID)
9997                 reg_value |= MLX5_CT_SYNDROME_INVALID;
9998         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)
9999                 reg_value |= MLX5_CT_SYNDROME_TRAP;
10000         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10001                 reg_value |= MLX5_CT_SYNDROME_BAD_PACKET;
10002         if (mask->flags & (RTE_FLOW_CONNTRACK_PKT_STATE_VALID |
10003                            RTE_FLOW_CONNTRACK_PKT_STATE_INVALID |
10004                            RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED))
10005                 reg_mask |= 0xc0;
10006         if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10007                 reg_mask |= MLX5_CT_SYNDROME_STATE_CHANGE;
10008         if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10009                 reg_mask |= MLX5_CT_SYNDROME_BAD_PACKET;
10010         /* The REG_C_x value could be saved during startup. */
10011         reg_id = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, &error);
10012         if (reg_id == REG_NON)
10013                 return;
10014         flow_dv_match_meta_reg(matcher, key, (enum modify_reg)reg_id,
10015                                reg_value, reg_mask);
10016 }
10017
10018 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
10019
10020 #define HEADER_IS_ZERO(match_criteria, headers)                              \
10021         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
10022                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
10023
10024 /**
10025  * Calculate flow matcher enable bitmap.
10026  *
10027  * @param match_criteria
10028  *   Pointer to flow matcher criteria.
10029  *
10030  * @return
10031  *   Bitmap of enabled fields.
10032  */
10033 static uint8_t
10034 flow_dv_matcher_enable(uint32_t *match_criteria)
10035 {
10036         uint8_t match_criteria_enable;
10037
10038         match_criteria_enable =
10039                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
10040                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
10041         match_criteria_enable |=
10042                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
10043                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
10044         match_criteria_enable |=
10045                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
10046                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
10047         match_criteria_enable |=
10048                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
10049                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
10050         match_criteria_enable |=
10051                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
10052                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
10053         match_criteria_enable |=
10054                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_4)) <<
10055                 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT;
10056         match_criteria_enable |=
10057                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_5)) <<
10058                 MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT;
10059         return match_criteria_enable;
10060 }
10061
10062 static void
10063 __flow_dv_adjust_buf_size(size_t *size, uint8_t match_criteria)
10064 {
10065         /*
10066          * Check flow matching criteria first, subtract misc5/4 length if flow
10067          * doesn't own misc5/4 parameters. In some old rdma-core releases,
10068          * misc5/4 are not supported, and matcher creation failure is expected
10069          * w/o subtration. If misc5 is provided, misc4 must be counted in since
10070          * misc5 is right after misc4.
10071          */
10072         if (!(match_criteria & (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT))) {
10073                 *size = MLX5_ST_SZ_BYTES(fte_match_param) -
10074                         MLX5_ST_SZ_BYTES(fte_match_set_misc5);
10075                 if (!(match_criteria & (1 <<
10076                         MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT))) {
10077                         *size -= MLX5_ST_SZ_BYTES(fte_match_set_misc4);
10078                 }
10079         }
10080 }
10081
10082 static struct mlx5_list_entry *
10083 flow_dv_matcher_clone_cb(void *tool_ctx __rte_unused,
10084                          struct mlx5_list_entry *entry, void *cb_ctx)
10085 {
10086         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10087         struct mlx5_flow_dv_matcher *ref = ctx->data;
10088         struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10089                                                             typeof(*tbl), tbl);
10090         struct mlx5_flow_dv_matcher *resource = mlx5_malloc(MLX5_MEM_ANY,
10091                                                             sizeof(*resource),
10092                                                             0, SOCKET_ID_ANY);
10093
10094         if (!resource) {
10095                 rte_flow_error_set(ctx->error, ENOMEM,
10096                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10097                                    "cannot create matcher");
10098                 return NULL;
10099         }
10100         memcpy(resource, entry, sizeof(*resource));
10101         resource->tbl = &tbl->tbl;
10102         return &resource->entry;
10103 }
10104
10105 static void
10106 flow_dv_matcher_clone_free_cb(void *tool_ctx __rte_unused,
10107                              struct mlx5_list_entry *entry)
10108 {
10109         mlx5_free(entry);
10110 }
10111
10112 struct mlx5_list_entry *
10113 flow_dv_tbl_create_cb(void *tool_ctx, void *cb_ctx)
10114 {
10115         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10116         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10117         struct rte_eth_dev *dev = ctx->dev;
10118         struct mlx5_flow_tbl_data_entry *tbl_data;
10119         struct mlx5_flow_tbl_tunnel_prm *tt_prm = ctx->data2;
10120         struct rte_flow_error *error = ctx->error;
10121         union mlx5_flow_tbl_key key = { .v64 = *(uint64_t *)(ctx->data) };
10122         struct mlx5_flow_tbl_resource *tbl;
10123         void *domain;
10124         uint32_t idx = 0;
10125         int ret;
10126
10127         tbl_data = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10128         if (!tbl_data) {
10129                 rte_flow_error_set(error, ENOMEM,
10130                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10131                                    NULL,
10132                                    "cannot allocate flow table data entry");
10133                 return NULL;
10134         }
10135         tbl_data->idx = idx;
10136         tbl_data->tunnel = tt_prm->tunnel;
10137         tbl_data->group_id = tt_prm->group_id;
10138         tbl_data->external = !!tt_prm->external;
10139         tbl_data->tunnel_offload = is_tunnel_offload_active(dev);
10140         tbl_data->is_egress = !!key.is_egress;
10141         tbl_data->is_transfer = !!key.is_fdb;
10142         tbl_data->dummy = !!key.dummy;
10143         tbl_data->level = key.level;
10144         tbl_data->id = key.id;
10145         tbl = &tbl_data->tbl;
10146         if (key.dummy)
10147                 return &tbl_data->entry;
10148         if (key.is_fdb)
10149                 domain = sh->fdb_domain;
10150         else if (key.is_egress)
10151                 domain = sh->tx_domain;
10152         else
10153                 domain = sh->rx_domain;
10154         ret = mlx5_flow_os_create_flow_tbl(domain, key.level, &tbl->obj);
10155         if (ret) {
10156                 rte_flow_error_set(error, ENOMEM,
10157                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10158                                    NULL, "cannot create flow table object");
10159                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10160                 return NULL;
10161         }
10162         if (key.level != 0) {
10163                 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
10164                                         (tbl->obj, &tbl_data->jump.action);
10165                 if (ret) {
10166                         rte_flow_error_set(error, ENOMEM,
10167                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10168                                            NULL,
10169                                            "cannot create flow jump action");
10170                         mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10171                         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10172                         return NULL;
10173                 }
10174         }
10175         MKSTR(matcher_name, "%s_%s_%u_%u_matcher_list",
10176               key.is_fdb ? "FDB" : "NIC", key.is_egress ? "egress" : "ingress",
10177               key.level, key.id);
10178         tbl_data->matchers = mlx5_list_create(matcher_name, sh, true,
10179                                               flow_dv_matcher_create_cb,
10180                                               flow_dv_matcher_match_cb,
10181                                               flow_dv_matcher_remove_cb,
10182                                               flow_dv_matcher_clone_cb,
10183                                               flow_dv_matcher_clone_free_cb);
10184         if (!tbl_data->matchers) {
10185                 rte_flow_error_set(error, ENOMEM,
10186                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10187                                    NULL,
10188                                    "cannot create tbl matcher list");
10189                 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10190                 mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10191                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10192                 return NULL;
10193         }
10194         return &tbl_data->entry;
10195 }
10196
10197 int
10198 flow_dv_tbl_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10199                      void *cb_ctx)
10200 {
10201         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10202         struct mlx5_flow_tbl_data_entry *tbl_data =
10203                 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10204         union mlx5_flow_tbl_key key = { .v64 =  *(uint64_t *)(ctx->data) };
10205
10206         return tbl_data->level != key.level ||
10207                tbl_data->id != key.id ||
10208                tbl_data->dummy != key.dummy ||
10209                tbl_data->is_transfer != !!key.is_fdb ||
10210                tbl_data->is_egress != !!key.is_egress;
10211 }
10212
10213 struct mlx5_list_entry *
10214 flow_dv_tbl_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10215                       void *cb_ctx)
10216 {
10217         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10218         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10219         struct mlx5_flow_tbl_data_entry *tbl_data;
10220         struct rte_flow_error *error = ctx->error;
10221         uint32_t idx = 0;
10222
10223         tbl_data = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10224         if (!tbl_data) {
10225                 rte_flow_error_set(error, ENOMEM,
10226                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10227                                    NULL,
10228                                    "cannot allocate flow table data entry");
10229                 return NULL;
10230         }
10231         memcpy(tbl_data, oentry, sizeof(*tbl_data));
10232         tbl_data->idx = idx;
10233         return &tbl_data->entry;
10234 }
10235
10236 void
10237 flow_dv_tbl_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10238 {
10239         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10240         struct mlx5_flow_tbl_data_entry *tbl_data =
10241                     container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10242
10243         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10244 }
10245
10246 /**
10247  * Get a flow table.
10248  *
10249  * @param[in, out] dev
10250  *   Pointer to rte_eth_dev structure.
10251  * @param[in] table_level
10252  *   Table level to use.
10253  * @param[in] egress
10254  *   Direction of the table.
10255  * @param[in] transfer
10256  *   E-Switch or NIC flow.
10257  * @param[in] dummy
10258  *   Dummy entry for dv API.
10259  * @param[in] table_id
10260  *   Table id to use.
10261  * @param[out] error
10262  *   pointer to error structure.
10263  *
10264  * @return
10265  *   Returns tables resource based on the index, NULL in case of failed.
10266  */
10267 struct mlx5_flow_tbl_resource *
10268 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
10269                          uint32_t table_level, uint8_t egress,
10270                          uint8_t transfer,
10271                          bool external,
10272                          const struct mlx5_flow_tunnel *tunnel,
10273                          uint32_t group_id, uint8_t dummy,
10274                          uint32_t table_id,
10275                          struct rte_flow_error *error)
10276 {
10277         struct mlx5_priv *priv = dev->data->dev_private;
10278         union mlx5_flow_tbl_key table_key = {
10279                 {
10280                         .level = table_level,
10281                         .id = table_id,
10282                         .reserved = 0,
10283                         .dummy = !!dummy,
10284                         .is_fdb = !!transfer,
10285                         .is_egress = !!egress,
10286                 }
10287         };
10288         struct mlx5_flow_tbl_tunnel_prm tt_prm = {
10289                 .tunnel = tunnel,
10290                 .group_id = group_id,
10291                 .external = external,
10292         };
10293         struct mlx5_flow_cb_ctx ctx = {
10294                 .dev = dev,
10295                 .error = error,
10296                 .data = &table_key.v64,
10297                 .data2 = &tt_prm,
10298         };
10299         struct mlx5_list_entry *entry;
10300         struct mlx5_flow_tbl_data_entry *tbl_data;
10301
10302         entry = mlx5_hlist_register(priv->sh->flow_tbls, table_key.v64, &ctx);
10303         if (!entry) {
10304                 rte_flow_error_set(error, ENOMEM,
10305                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10306                                    "cannot get table");
10307                 return NULL;
10308         }
10309         DRV_LOG(DEBUG, "table_level %u table_id %u "
10310                 "tunnel %u group %u registered.",
10311                 table_level, table_id,
10312                 tunnel ? tunnel->tunnel_id : 0, group_id);
10313         tbl_data = container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10314         return &tbl_data->tbl;
10315 }
10316
10317 void
10318 flow_dv_tbl_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10319 {
10320         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10321         struct mlx5_flow_tbl_data_entry *tbl_data =
10322                     container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10323
10324         MLX5_ASSERT(entry && sh);
10325         if (tbl_data->jump.action)
10326                 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10327         if (tbl_data->tbl.obj)
10328                 mlx5_flow_os_destroy_flow_tbl(tbl_data->tbl.obj);
10329         if (tbl_data->tunnel_offload && tbl_data->external) {
10330                 struct mlx5_list_entry *he;
10331                 struct mlx5_hlist *tunnel_grp_hash;
10332                 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
10333                 union tunnel_tbl_key tunnel_key = {
10334                         .tunnel_id = tbl_data->tunnel ?
10335                                         tbl_data->tunnel->tunnel_id : 0,
10336                         .group = tbl_data->group_id
10337                 };
10338                 uint32_t table_level = tbl_data->level;
10339                 struct mlx5_flow_cb_ctx ctx = {
10340                         .data = (void *)&tunnel_key.val,
10341                 };
10342
10343                 tunnel_grp_hash = tbl_data->tunnel ?
10344                                         tbl_data->tunnel->groups :
10345                                         thub->groups;
10346                 he = mlx5_hlist_lookup(tunnel_grp_hash, tunnel_key.val, &ctx);
10347                 if (he)
10348                         mlx5_hlist_unregister(tunnel_grp_hash, he);
10349                 DRV_LOG(DEBUG,
10350                         "table_level %u id %u tunnel %u group %u released.",
10351                         table_level,
10352                         tbl_data->id,
10353                         tbl_data->tunnel ?
10354                         tbl_data->tunnel->tunnel_id : 0,
10355                         tbl_data->group_id);
10356         }
10357         mlx5_list_destroy(tbl_data->matchers);
10358         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10359 }
10360
10361 /**
10362  * Release a flow table.
10363  *
10364  * @param[in] sh
10365  *   Pointer to device shared structure.
10366  * @param[in] tbl
10367  *   Table resource to be released.
10368  *
10369  * @return
10370  *   Returns 0 if table was released, else return 1;
10371  */
10372 static int
10373 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
10374                              struct mlx5_flow_tbl_resource *tbl)
10375 {
10376         struct mlx5_flow_tbl_data_entry *tbl_data =
10377                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10378
10379         if (!tbl)
10380                 return 0;
10381         return mlx5_hlist_unregister(sh->flow_tbls, &tbl_data->entry);
10382 }
10383
10384 int
10385 flow_dv_matcher_match_cb(void *tool_ctx __rte_unused,
10386                          struct mlx5_list_entry *entry, void *cb_ctx)
10387 {
10388         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10389         struct mlx5_flow_dv_matcher *ref = ctx->data;
10390         struct mlx5_flow_dv_matcher *cur = container_of(entry, typeof(*cur),
10391                                                         entry);
10392
10393         return cur->crc != ref->crc ||
10394                cur->priority != ref->priority ||
10395                memcmp((const void *)cur->mask.buf,
10396                       (const void *)ref->mask.buf, ref->mask.size);
10397 }
10398
10399 struct mlx5_list_entry *
10400 flow_dv_matcher_create_cb(void *tool_ctx, void *cb_ctx)
10401 {
10402         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10403         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10404         struct mlx5_flow_dv_matcher *ref = ctx->data;
10405         struct mlx5_flow_dv_matcher *resource;
10406         struct mlx5dv_flow_matcher_attr dv_attr = {
10407                 .type = IBV_FLOW_ATTR_NORMAL,
10408                 .match_mask = (void *)&ref->mask,
10409         };
10410         struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10411                                                             typeof(*tbl), tbl);
10412         int ret;
10413
10414         resource = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*resource), 0,
10415                                SOCKET_ID_ANY);
10416         if (!resource) {
10417                 rte_flow_error_set(ctx->error, ENOMEM,
10418                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10419                                    "cannot create matcher");
10420                 return NULL;
10421         }
10422         *resource = *ref;
10423         dv_attr.match_criteria_enable =
10424                 flow_dv_matcher_enable(resource->mask.buf);
10425         __flow_dv_adjust_buf_size(&ref->mask.size,
10426                                   dv_attr.match_criteria_enable);
10427         dv_attr.priority = ref->priority;
10428         if (tbl->is_egress)
10429                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
10430         ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
10431                                                tbl->tbl.obj,
10432                                                &resource->matcher_object);
10433         if (ret) {
10434                 mlx5_free(resource);
10435                 rte_flow_error_set(ctx->error, ENOMEM,
10436                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10437                                    "cannot create matcher");
10438                 return NULL;
10439         }
10440         return &resource->entry;
10441 }
10442
10443 /**
10444  * Register the flow matcher.
10445  *
10446  * @param[in, out] dev
10447  *   Pointer to rte_eth_dev structure.
10448  * @param[in, out] matcher
10449  *   Pointer to flow matcher.
10450  * @param[in, out] key
10451  *   Pointer to flow table key.
10452  * @parm[in, out] dev_flow
10453  *   Pointer to the dev_flow.
10454  * @param[out] error
10455  *   pointer to error structure.
10456  *
10457  * @return
10458  *   0 on success otherwise -errno and errno is set.
10459  */
10460 static int
10461 flow_dv_matcher_register(struct rte_eth_dev *dev,
10462                          struct mlx5_flow_dv_matcher *ref,
10463                          union mlx5_flow_tbl_key *key,
10464                          struct mlx5_flow *dev_flow,
10465                          const struct mlx5_flow_tunnel *tunnel,
10466                          uint32_t group_id,
10467                          struct rte_flow_error *error)
10468 {
10469         struct mlx5_list_entry *entry;
10470         struct mlx5_flow_dv_matcher *resource;
10471         struct mlx5_flow_tbl_resource *tbl;
10472         struct mlx5_flow_tbl_data_entry *tbl_data;
10473         struct mlx5_flow_cb_ctx ctx = {
10474                 .error = error,
10475                 .data = ref,
10476         };
10477         /**
10478          * tunnel offload API requires this registration for cases when
10479          * tunnel match rule was inserted before tunnel set rule.
10480          */
10481         tbl = flow_dv_tbl_resource_get(dev, key->level,
10482                                        key->is_egress, key->is_fdb,
10483                                        dev_flow->external, tunnel,
10484                                        group_id, 0, key->id, error);
10485         if (!tbl)
10486                 return -rte_errno;      /* No need to refill the error info */
10487         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10488         ref->tbl = tbl;
10489         entry = mlx5_list_register(tbl_data->matchers, &ctx);
10490         if (!entry) {
10491                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
10492                 return rte_flow_error_set(error, ENOMEM,
10493                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10494                                           "cannot allocate ref memory");
10495         }
10496         resource = container_of(entry, typeof(*resource), entry);
10497         dev_flow->handle->dvh.matcher = resource;
10498         return 0;
10499 }
10500
10501 struct mlx5_list_entry *
10502 flow_dv_tag_create_cb(void *tool_ctx, void *cb_ctx)
10503 {
10504         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10505         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10506         struct mlx5_flow_dv_tag_resource *entry;
10507         uint32_t idx = 0;
10508         int ret;
10509
10510         entry = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10511         if (!entry) {
10512                 rte_flow_error_set(ctx->error, ENOMEM,
10513                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10514                                    "cannot allocate resource memory");
10515                 return NULL;
10516         }
10517         entry->idx = idx;
10518         entry->tag_id = *(uint32_t *)(ctx->data);
10519         ret = mlx5_flow_os_create_flow_action_tag(entry->tag_id,
10520                                                   &entry->action);
10521         if (ret) {
10522                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], idx);
10523                 rte_flow_error_set(ctx->error, ENOMEM,
10524                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10525                                    NULL, "cannot create action");
10526                 return NULL;
10527         }
10528         return &entry->entry;
10529 }
10530
10531 int
10532 flow_dv_tag_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10533                      void *cb_ctx)
10534 {
10535         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10536         struct mlx5_flow_dv_tag_resource *tag =
10537                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10538
10539         return *(uint32_t *)(ctx->data) != tag->tag_id;
10540 }
10541
10542 struct mlx5_list_entry *
10543 flow_dv_tag_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10544                      void *cb_ctx)
10545 {
10546         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10547         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10548         struct mlx5_flow_dv_tag_resource *entry;
10549         uint32_t idx = 0;
10550
10551         entry = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10552         if (!entry) {
10553                 rte_flow_error_set(ctx->error, ENOMEM,
10554                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10555                                    "cannot allocate tag resource memory");
10556                 return NULL;
10557         }
10558         memcpy(entry, oentry, sizeof(*entry));
10559         entry->idx = idx;
10560         return &entry->entry;
10561 }
10562
10563 void
10564 flow_dv_tag_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10565 {
10566         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10567         struct mlx5_flow_dv_tag_resource *tag =
10568                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10569
10570         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10571 }
10572
10573 /**
10574  * Find existing tag resource or create and register a new one.
10575  *
10576  * @param dev[in, out]
10577  *   Pointer to rte_eth_dev structure.
10578  * @param[in, out] tag_be24
10579  *   Tag value in big endian then R-shift 8.
10580  * @parm[in, out] dev_flow
10581  *   Pointer to the dev_flow.
10582  * @param[out] error
10583  *   pointer to error structure.
10584  *
10585  * @return
10586  *   0 on success otherwise -errno and errno is set.
10587  */
10588 static int
10589 flow_dv_tag_resource_register
10590                         (struct rte_eth_dev *dev,
10591                          uint32_t tag_be24,
10592                          struct mlx5_flow *dev_flow,
10593                          struct rte_flow_error *error)
10594 {
10595         struct mlx5_priv *priv = dev->data->dev_private;
10596         struct mlx5_flow_dv_tag_resource *resource;
10597         struct mlx5_list_entry *entry;
10598         struct mlx5_flow_cb_ctx ctx = {
10599                                         .error = error,
10600                                         .data = &tag_be24,
10601                                         };
10602         struct mlx5_hlist *tag_table;
10603
10604         tag_table = flow_dv_hlist_prepare(priv->sh, &priv->sh->tag_table,
10605                                       "tags",
10606                                       MLX5_TAGS_HLIST_ARRAY_SIZE,
10607                                       false, false, priv->sh,
10608                                       flow_dv_tag_create_cb,
10609                                       flow_dv_tag_match_cb,
10610                                       flow_dv_tag_remove_cb,
10611                                       flow_dv_tag_clone_cb,
10612                                       flow_dv_tag_clone_free_cb);
10613         if (unlikely(!tag_table))
10614                 return -rte_errno;
10615         entry = mlx5_hlist_register(tag_table, tag_be24, &ctx);
10616         if (entry) {
10617                 resource = container_of(entry, struct mlx5_flow_dv_tag_resource,
10618                                         entry);
10619                 dev_flow->handle->dvh.rix_tag = resource->idx;
10620                 dev_flow->dv.tag_resource = resource;
10621                 return 0;
10622         }
10623         return -rte_errno;
10624 }
10625
10626 void
10627 flow_dv_tag_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10628 {
10629         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10630         struct mlx5_flow_dv_tag_resource *tag =
10631                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10632
10633         MLX5_ASSERT(tag && sh && tag->action);
10634         claim_zero(mlx5_flow_os_destroy_flow_action(tag->action));
10635         DRV_LOG(DEBUG, "Tag %p: removed.", (void *)tag);
10636         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10637 }
10638
10639 /**
10640  * Release the tag.
10641  *
10642  * @param dev
10643  *   Pointer to Ethernet device.
10644  * @param tag_idx
10645  *   Tag index.
10646  *
10647  * @return
10648  *   1 while a reference on it exists, 0 when freed.
10649  */
10650 static int
10651 flow_dv_tag_release(struct rte_eth_dev *dev,
10652                     uint32_t tag_idx)
10653 {
10654         struct mlx5_priv *priv = dev->data->dev_private;
10655         struct mlx5_flow_dv_tag_resource *tag;
10656
10657         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG], tag_idx);
10658         if (!tag)
10659                 return 0;
10660         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
10661                 dev->data->port_id, (void *)tag, tag->entry.ref_cnt);
10662         return mlx5_hlist_unregister(priv->sh->tag_table, &tag->entry);
10663 }
10664
10665 /**
10666  * Translate action PORT_ID / REPRESENTED_PORT to vport.
10667  *
10668  * @param[in] dev
10669  *   Pointer to rte_eth_dev structure.
10670  * @param[in] action
10671  *   Pointer to action PORT_ID / REPRESENTED_PORT.
10672  * @param[out] dst_port_id
10673  *   The target port ID.
10674  * @param[out] error
10675  *   Pointer to the error structure.
10676  *
10677  * @return
10678  *   0 on success, a negative errno value otherwise and rte_errno is set.
10679  */
10680 static int
10681 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
10682                                  const struct rte_flow_action *action,
10683                                  uint32_t *dst_port_id,
10684                                  struct rte_flow_error *error)
10685 {
10686         uint32_t port;
10687         struct mlx5_priv *priv;
10688
10689         switch (action->type) {
10690         case RTE_FLOW_ACTION_TYPE_PORT_ID: {
10691                 const struct rte_flow_action_port_id *conf;
10692
10693                 conf = (const struct rte_flow_action_port_id *)action->conf;
10694                 port = conf->original ? dev->data->port_id : conf->id;
10695                 break;
10696         }
10697         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT: {
10698                 const struct rte_flow_action_ethdev *ethdev;
10699
10700                 ethdev = (const struct rte_flow_action_ethdev *)action->conf;
10701                 port = ethdev->port_id;
10702                 break;
10703         }
10704         default:
10705                 MLX5_ASSERT(false);
10706                 return rte_flow_error_set(error, EINVAL,
10707                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
10708                                           "unknown E-Switch action");
10709         }
10710
10711         priv = mlx5_port_to_eswitch_info(port, false);
10712         if (!priv)
10713                 return rte_flow_error_set(error, -rte_errno,
10714                                           RTE_FLOW_ERROR_TYPE_ACTION,
10715                                           NULL,
10716                                           "No eswitch info was found for port");
10717 #ifdef HAVE_MLX5DV_DR_CREATE_DEST_IB_PORT
10718         /*
10719          * This parameter is transferred to
10720          * mlx5dv_dr_action_create_dest_ib_port().
10721          */
10722         *dst_port_id = priv->dev_port;
10723 #else
10724         /*
10725          * Legacy mode, no LAG configurations is supported.
10726          * This parameter is transferred to
10727          * mlx5dv_dr_action_create_dest_vport().
10728          */
10729         *dst_port_id = priv->vport_id;
10730 #endif
10731         return 0;
10732 }
10733
10734 /**
10735  * Create a counter with aging configuration.
10736  *
10737  * @param[in] dev
10738  *   Pointer to rte_eth_dev structure.
10739  * @param[in] dev_flow
10740  *   Pointer to the mlx5_flow.
10741  * @param[out] count
10742  *   Pointer to the counter action configuration.
10743  * @param[in] age
10744  *   Pointer to the aging action configuration.
10745  *
10746  * @return
10747  *   Index to flow counter on success, 0 otherwise.
10748  */
10749 static uint32_t
10750 flow_dv_translate_create_counter(struct rte_eth_dev *dev,
10751                                 struct mlx5_flow *dev_flow,
10752                                 const struct rte_flow_action_count *count
10753                                         __rte_unused,
10754                                 const struct rte_flow_action_age *age)
10755 {
10756         uint32_t counter;
10757         struct mlx5_age_param *age_param;
10758
10759         counter = flow_dv_counter_alloc(dev, !!age);
10760         if (!counter || age == NULL)
10761                 return counter;
10762         age_param = flow_dv_counter_idx_get_age(dev, counter);
10763         age_param->context = age->context ? age->context :
10764                 (void *)(uintptr_t)(dev_flow->flow_idx);
10765         age_param->timeout = age->timeout;
10766         age_param->port_id = dev->data->port_id;
10767         __atomic_store_n(&age_param->sec_since_last_hit, 0, __ATOMIC_RELAXED);
10768         __atomic_store_n(&age_param->state, AGE_CANDIDATE, __ATOMIC_RELAXED);
10769         return counter;
10770 }
10771
10772 /**
10773  * Add Tx queue matcher
10774  *
10775  * @param[in] dev
10776  *   Pointer to the dev struct.
10777  * @param[in, out] matcher
10778  *   Flow matcher.
10779  * @param[in, out] key
10780  *   Flow matcher value.
10781  * @param[in] item
10782  *   Flow pattern to translate.
10783  * @param[in] inner
10784  *   Item is inner pattern.
10785  */
10786 static void
10787 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
10788                                 void *matcher, void *key,
10789                                 const struct rte_flow_item *item)
10790 {
10791         const struct mlx5_rte_flow_item_tx_queue *queue_m;
10792         const struct mlx5_rte_flow_item_tx_queue *queue_v;
10793         void *misc_m =
10794                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
10795         void *misc_v =
10796                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
10797         struct mlx5_txq_ctrl *txq;
10798         uint32_t queue;
10799
10800
10801         queue_m = (const void *)item->mask;
10802         if (!queue_m)
10803                 return;
10804         queue_v = (const void *)item->spec;
10805         if (!queue_v)
10806                 return;
10807         txq = mlx5_txq_get(dev, queue_v->queue);
10808         if (!txq)
10809                 return;
10810         queue = txq->obj->sq->id;
10811         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
10812         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
10813                  queue & queue_m->queue);
10814         mlx5_txq_release(dev, queue_v->queue);
10815 }
10816
10817 /**
10818  * Set the hash fields according to the @p flow information.
10819  *
10820  * @param[in] dev_flow
10821  *   Pointer to the mlx5_flow.
10822  * @param[in] rss_desc
10823  *   Pointer to the mlx5_flow_rss_desc.
10824  */
10825 static void
10826 flow_dv_hashfields_set(struct mlx5_flow *dev_flow,
10827                        struct mlx5_flow_rss_desc *rss_desc)
10828 {
10829         uint64_t items = dev_flow->handle->layers;
10830         int rss_inner = 0;
10831         uint64_t rss_types = rte_eth_rss_hf_refine(rss_desc->types);
10832
10833         dev_flow->hash_fields = 0;
10834 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
10835         if (rss_desc->level >= 2)
10836                 rss_inner = 1;
10837 #endif
10838         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
10839             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
10840                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
10841                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
10842                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
10843                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
10844                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
10845                         else
10846                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
10847                 }
10848         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
10849                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
10850                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
10851                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
10852                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
10853                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
10854                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
10855                         else
10856                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
10857                 }
10858         }
10859         if (dev_flow->hash_fields == 0)
10860                 /*
10861                  * There is no match between the RSS types and the
10862                  * L3 protocol (IPv4/IPv6) defined in the flow rule.
10863                  */
10864                 return;
10865         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
10866             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
10867                 if (rss_types & ETH_RSS_UDP) {
10868                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
10869                                 dev_flow->hash_fields |=
10870                                                 IBV_RX_HASH_SRC_PORT_UDP;
10871                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
10872                                 dev_flow->hash_fields |=
10873                                                 IBV_RX_HASH_DST_PORT_UDP;
10874                         else
10875                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
10876                 }
10877         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
10878                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
10879                 if (rss_types & ETH_RSS_TCP) {
10880                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
10881                                 dev_flow->hash_fields |=
10882                                                 IBV_RX_HASH_SRC_PORT_TCP;
10883                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
10884                                 dev_flow->hash_fields |=
10885                                                 IBV_RX_HASH_DST_PORT_TCP;
10886                         else
10887                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
10888                 }
10889         }
10890         if (rss_inner)
10891                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
10892 }
10893
10894 /**
10895  * Prepare an Rx Hash queue.
10896  *
10897  * @param dev
10898  *   Pointer to Ethernet device.
10899  * @param[in] dev_flow
10900  *   Pointer to the mlx5_flow.
10901  * @param[in] rss_desc
10902  *   Pointer to the mlx5_flow_rss_desc.
10903  * @param[out] hrxq_idx
10904  *   Hash Rx queue index.
10905  *
10906  * @return
10907  *   The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
10908  */
10909 static struct mlx5_hrxq *
10910 flow_dv_hrxq_prepare(struct rte_eth_dev *dev,
10911                      struct mlx5_flow *dev_flow,
10912                      struct mlx5_flow_rss_desc *rss_desc,
10913                      uint32_t *hrxq_idx)
10914 {
10915         struct mlx5_priv *priv = dev->data->dev_private;
10916         struct mlx5_flow_handle *dh = dev_flow->handle;
10917         struct mlx5_hrxq *hrxq;
10918
10919         MLX5_ASSERT(rss_desc->queue_num);
10920         rss_desc->key_len = MLX5_RSS_HASH_KEY_LEN;
10921         rss_desc->hash_fields = dev_flow->hash_fields;
10922         rss_desc->tunnel = !!(dh->layers & MLX5_FLOW_LAYER_TUNNEL);
10923         rss_desc->shared_rss = 0;
10924         if (rss_desc->hash_fields == 0)
10925                 rss_desc->queue_num = 1;
10926         *hrxq_idx = mlx5_hrxq_get(dev, rss_desc);
10927         if (!*hrxq_idx)
10928                 return NULL;
10929         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
10930                               *hrxq_idx);
10931         return hrxq;
10932 }
10933
10934 /**
10935  * Release sample sub action resource.
10936  *
10937  * @param[in, out] dev
10938  *   Pointer to rte_eth_dev structure.
10939  * @param[in] act_res
10940  *   Pointer to sample sub action resource.
10941  */
10942 static void
10943 flow_dv_sample_sub_actions_release(struct rte_eth_dev *dev,
10944                                    struct mlx5_flow_sub_actions_idx *act_res)
10945 {
10946         if (act_res->rix_hrxq) {
10947                 mlx5_hrxq_release(dev, act_res->rix_hrxq);
10948                 act_res->rix_hrxq = 0;
10949         }
10950         if (act_res->rix_encap_decap) {
10951                 flow_dv_encap_decap_resource_release(dev,
10952                                                      act_res->rix_encap_decap);
10953                 act_res->rix_encap_decap = 0;
10954         }
10955         if (act_res->rix_port_id_action) {
10956                 flow_dv_port_id_action_resource_release(dev,
10957                                                 act_res->rix_port_id_action);
10958                 act_res->rix_port_id_action = 0;
10959         }
10960         if (act_res->rix_tag) {
10961                 flow_dv_tag_release(dev, act_res->rix_tag);
10962                 act_res->rix_tag = 0;
10963         }
10964         if (act_res->rix_jump) {
10965                 flow_dv_jump_tbl_resource_release(dev, act_res->rix_jump);
10966                 act_res->rix_jump = 0;
10967         }
10968 }
10969
10970 int
10971 flow_dv_sample_match_cb(void *tool_ctx __rte_unused,
10972                         struct mlx5_list_entry *entry, void *cb_ctx)
10973 {
10974         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10975         struct rte_eth_dev *dev = ctx->dev;
10976         struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
10977         struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
10978                                                               typeof(*resource),
10979                                                               entry);
10980
10981         if (ctx_resource->ratio == resource->ratio &&
10982             ctx_resource->ft_type == resource->ft_type &&
10983             ctx_resource->ft_id == resource->ft_id &&
10984             ctx_resource->set_action == resource->set_action &&
10985             !memcmp((void *)&ctx_resource->sample_act,
10986                     (void *)&resource->sample_act,
10987                     sizeof(struct mlx5_flow_sub_actions_list))) {
10988                 /*
10989                  * Existing sample action should release the prepared
10990                  * sub-actions reference counter.
10991                  */
10992                 flow_dv_sample_sub_actions_release(dev,
10993                                                    &ctx_resource->sample_idx);
10994                 return 0;
10995         }
10996         return 1;
10997 }
10998
10999 struct mlx5_list_entry *
11000 flow_dv_sample_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11001 {
11002         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11003         struct rte_eth_dev *dev = ctx->dev;
11004         struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11005         void **sample_dv_actions = ctx_resource->sub_actions;
11006         struct mlx5_flow_dv_sample_resource *resource;
11007         struct mlx5dv_dr_flow_sampler_attr sampler_attr;
11008         struct mlx5_priv *priv = dev->data->dev_private;
11009         struct mlx5_dev_ctx_shared *sh = priv->sh;
11010         struct mlx5_flow_tbl_resource *tbl;
11011         uint32_t idx = 0;
11012         const uint32_t next_ft_step = 1;
11013         uint32_t next_ft_id = ctx_resource->ft_id + next_ft_step;
11014         uint8_t is_egress = 0;
11015         uint8_t is_transfer = 0;
11016         struct rte_flow_error *error = ctx->error;
11017
11018         /* Register new sample resource. */
11019         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11020         if (!resource) {
11021                 rte_flow_error_set(error, ENOMEM,
11022                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11023                                           NULL,
11024                                           "cannot allocate resource memory");
11025                 return NULL;
11026         }
11027         *resource = *ctx_resource;
11028         /* Create normal path table level */
11029         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11030                 is_transfer = 1;
11031         else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
11032                 is_egress = 1;
11033         tbl = flow_dv_tbl_resource_get(dev, next_ft_id,
11034                                         is_egress, is_transfer,
11035                                         true, NULL, 0, 0, 0, error);
11036         if (!tbl) {
11037                 rte_flow_error_set(error, ENOMEM,
11038                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11039                                           NULL,
11040                                           "fail to create normal path table "
11041                                           "for sample");
11042                 goto error;
11043         }
11044         resource->normal_path_tbl = tbl;
11045         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
11046                 if (!sh->default_miss_action) {
11047                         rte_flow_error_set(error, ENOMEM,
11048                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11049                                                 NULL,
11050                                                 "default miss action was not "
11051                                                 "created");
11052                         goto error;
11053                 }
11054                 sample_dv_actions[ctx_resource->sample_act.actions_num++] =
11055                                                 sh->default_miss_action;
11056         }
11057         /* Create a DR sample action */
11058         sampler_attr.sample_ratio = resource->ratio;
11059         sampler_attr.default_next_table = tbl->obj;
11060         sampler_attr.num_sample_actions = ctx_resource->sample_act.actions_num;
11061         sampler_attr.sample_actions = (struct mlx5dv_dr_action **)
11062                                                         &sample_dv_actions[0];
11063         sampler_attr.action = resource->set_action;
11064         if (mlx5_os_flow_dr_create_flow_action_sampler
11065                         (&sampler_attr, &resource->verbs_action)) {
11066                 rte_flow_error_set(error, ENOMEM,
11067                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11068                                         NULL, "cannot create sample action");
11069                 goto error;
11070         }
11071         resource->idx = idx;
11072         resource->dev = dev;
11073         return &resource->entry;
11074 error:
11075         if (resource->ft_type != MLX5DV_FLOW_TABLE_TYPE_FDB)
11076                 flow_dv_sample_sub_actions_release(dev,
11077                                                    &resource->sample_idx);
11078         if (resource->normal_path_tbl)
11079                 flow_dv_tbl_resource_release(MLX5_SH(dev),
11080                                 resource->normal_path_tbl);
11081         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_SAMPLE], idx);
11082         return NULL;
11083
11084 }
11085
11086 struct mlx5_list_entry *
11087 flow_dv_sample_clone_cb(void *tool_ctx __rte_unused,
11088                          struct mlx5_list_entry *entry __rte_unused,
11089                          void *cb_ctx)
11090 {
11091         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11092         struct rte_eth_dev *dev = ctx->dev;
11093         struct mlx5_flow_dv_sample_resource *resource;
11094         struct mlx5_priv *priv = dev->data->dev_private;
11095         struct mlx5_dev_ctx_shared *sh = priv->sh;
11096         uint32_t idx = 0;
11097
11098         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11099         if (!resource) {
11100                 rte_flow_error_set(ctx->error, ENOMEM,
11101                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11102                                           NULL,
11103                                           "cannot allocate resource memory");
11104                 return NULL;
11105         }
11106         memcpy(resource, entry, sizeof(*resource));
11107         resource->idx = idx;
11108         resource->dev = dev;
11109         return &resource->entry;
11110 }
11111
11112 void
11113 flow_dv_sample_clone_free_cb(void *tool_ctx __rte_unused,
11114                              struct mlx5_list_entry *entry)
11115 {
11116         struct mlx5_flow_dv_sample_resource *resource =
11117                                   container_of(entry, typeof(*resource), entry);
11118         struct rte_eth_dev *dev = resource->dev;
11119         struct mlx5_priv *priv = dev->data->dev_private;
11120
11121         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
11122 }
11123
11124 /**
11125  * Find existing sample resource or create and register a new one.
11126  *
11127  * @param[in, out] dev
11128  *   Pointer to rte_eth_dev structure.
11129  * @param[in] ref
11130  *   Pointer to sample resource reference.
11131  * @parm[in, out] dev_flow
11132  *   Pointer to the dev_flow.
11133  * @param[out] error
11134  *   pointer to error structure.
11135  *
11136  * @return
11137  *   0 on success otherwise -errno and errno is set.
11138  */
11139 static int
11140 flow_dv_sample_resource_register(struct rte_eth_dev *dev,
11141                          struct mlx5_flow_dv_sample_resource *ref,
11142                          struct mlx5_flow *dev_flow,
11143                          struct rte_flow_error *error)
11144 {
11145         struct mlx5_flow_dv_sample_resource *resource;
11146         struct mlx5_list_entry *entry;
11147         struct mlx5_priv *priv = dev->data->dev_private;
11148         struct mlx5_flow_cb_ctx ctx = {
11149                 .dev = dev,
11150                 .error = error,
11151                 .data = ref,
11152         };
11153
11154         entry = mlx5_list_register(priv->sh->sample_action_list, &ctx);
11155         if (!entry)
11156                 return -rte_errno;
11157         resource = container_of(entry, typeof(*resource), entry);
11158         dev_flow->handle->dvh.rix_sample = resource->idx;
11159         dev_flow->dv.sample_res = resource;
11160         return 0;
11161 }
11162
11163 int
11164 flow_dv_dest_array_match_cb(void *tool_ctx __rte_unused,
11165                             struct mlx5_list_entry *entry, void *cb_ctx)
11166 {
11167         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11168         struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11169         struct rte_eth_dev *dev = ctx->dev;
11170         struct mlx5_flow_dv_dest_array_resource *resource =
11171                                   container_of(entry, typeof(*resource), entry);
11172         uint32_t idx = 0;
11173
11174         if (ctx_resource->num_of_dest == resource->num_of_dest &&
11175             ctx_resource->ft_type == resource->ft_type &&
11176             !memcmp((void *)resource->sample_act,
11177                     (void *)ctx_resource->sample_act,
11178                    (ctx_resource->num_of_dest *
11179                    sizeof(struct mlx5_flow_sub_actions_list)))) {
11180                 /*
11181                  * Existing sample action should release the prepared
11182                  * sub-actions reference counter.
11183                  */
11184                 for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11185                         flow_dv_sample_sub_actions_release(dev,
11186                                         &ctx_resource->sample_idx[idx]);
11187                 return 0;
11188         }
11189         return 1;
11190 }
11191
11192 struct mlx5_list_entry *
11193 flow_dv_dest_array_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11194 {
11195         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11196         struct rte_eth_dev *dev = ctx->dev;
11197         struct mlx5_flow_dv_dest_array_resource *resource;
11198         struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11199         struct mlx5dv_dr_action_dest_attr *dest_attr[MLX5_MAX_DEST_NUM] = { 0 };
11200         struct mlx5dv_dr_action_dest_reformat dest_reformat[MLX5_MAX_DEST_NUM];
11201         struct mlx5_priv *priv = dev->data->dev_private;
11202         struct mlx5_dev_ctx_shared *sh = priv->sh;
11203         struct mlx5_flow_sub_actions_list *sample_act;
11204         struct mlx5dv_dr_domain *domain;
11205         uint32_t idx = 0, res_idx = 0;
11206         struct rte_flow_error *error = ctx->error;
11207         uint64_t action_flags;
11208         int ret;
11209
11210         /* Register new destination array resource. */
11211         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11212                                             &res_idx);
11213         if (!resource) {
11214                 rte_flow_error_set(error, ENOMEM,
11215                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11216                                           NULL,
11217                                           "cannot allocate resource memory");
11218                 return NULL;
11219         }
11220         *resource = *ctx_resource;
11221         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11222                 domain = sh->fdb_domain;
11223         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
11224                 domain = sh->rx_domain;
11225         else
11226                 domain = sh->tx_domain;
11227         for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11228                 dest_attr[idx] = (struct mlx5dv_dr_action_dest_attr *)
11229                                  mlx5_malloc(MLX5_MEM_ZERO,
11230                                  sizeof(struct mlx5dv_dr_action_dest_attr),
11231                                  0, SOCKET_ID_ANY);
11232                 if (!dest_attr[idx]) {
11233                         rte_flow_error_set(error, ENOMEM,
11234                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11235                                            NULL,
11236                                            "cannot allocate resource memory");
11237                         goto error;
11238                 }
11239                 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST;
11240                 sample_act = &ctx_resource->sample_act[idx];
11241                 action_flags = sample_act->action_flags;
11242                 switch (action_flags) {
11243                 case MLX5_FLOW_ACTION_QUEUE:
11244                         dest_attr[idx]->dest = sample_act->dr_queue_action;
11245                         break;
11246                 case (MLX5_FLOW_ACTION_PORT_ID | MLX5_FLOW_ACTION_ENCAP):
11247                         dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST_REFORMAT;
11248                         dest_attr[idx]->dest_reformat = &dest_reformat[idx];
11249                         dest_attr[idx]->dest_reformat->reformat =
11250                                         sample_act->dr_encap_action;
11251                         dest_attr[idx]->dest_reformat->dest =
11252                                         sample_act->dr_port_id_action;
11253                         break;
11254                 case MLX5_FLOW_ACTION_PORT_ID:
11255                         dest_attr[idx]->dest = sample_act->dr_port_id_action;
11256                         break;
11257                 case MLX5_FLOW_ACTION_JUMP:
11258                         dest_attr[idx]->dest = sample_act->dr_jump_action;
11259                         break;
11260                 default:
11261                         rte_flow_error_set(error, EINVAL,
11262                                            RTE_FLOW_ERROR_TYPE_ACTION,
11263                                            NULL,
11264                                            "unsupported actions type");
11265                         goto error;
11266                 }
11267         }
11268         /* create a dest array actioin */
11269         ret = mlx5_os_flow_dr_create_flow_action_dest_array
11270                                                 (domain,
11271                                                  resource->num_of_dest,
11272                                                  dest_attr,
11273                                                  &resource->action);
11274         if (ret) {
11275                 rte_flow_error_set(error, ENOMEM,
11276                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11277                                    NULL,
11278                                    "cannot create destination array action");
11279                 goto error;
11280         }
11281         resource->idx = res_idx;
11282         resource->dev = dev;
11283         for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11284                 mlx5_free(dest_attr[idx]);
11285         return &resource->entry;
11286 error:
11287         for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11288                 flow_dv_sample_sub_actions_release(dev,
11289                                                    &resource->sample_idx[idx]);
11290                 if (dest_attr[idx])
11291                         mlx5_free(dest_attr[idx]);
11292         }
11293         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DEST_ARRAY], res_idx);
11294         return NULL;
11295 }
11296
11297 struct mlx5_list_entry *
11298 flow_dv_dest_array_clone_cb(void *tool_ctx __rte_unused,
11299                             struct mlx5_list_entry *entry __rte_unused,
11300                             void *cb_ctx)
11301 {
11302         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11303         struct rte_eth_dev *dev = ctx->dev;
11304         struct mlx5_flow_dv_dest_array_resource *resource;
11305         struct mlx5_priv *priv = dev->data->dev_private;
11306         struct mlx5_dev_ctx_shared *sh = priv->sh;
11307         uint32_t res_idx = 0;
11308         struct rte_flow_error *error = ctx->error;
11309
11310         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11311                                       &res_idx);
11312         if (!resource) {
11313                 rte_flow_error_set(error, ENOMEM,
11314                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11315                                           NULL,
11316                                           "cannot allocate dest-array memory");
11317                 return NULL;
11318         }
11319         memcpy(resource, entry, sizeof(*resource));
11320         resource->idx = res_idx;
11321         resource->dev = dev;
11322         return &resource->entry;
11323 }
11324
11325 void
11326 flow_dv_dest_array_clone_free_cb(void *tool_ctx __rte_unused,
11327                                  struct mlx5_list_entry *entry)
11328 {
11329         struct mlx5_flow_dv_dest_array_resource *resource =
11330                         container_of(entry, typeof(*resource), entry);
11331         struct rte_eth_dev *dev = resource->dev;
11332         struct mlx5_priv *priv = dev->data->dev_private;
11333
11334         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
11335 }
11336
11337 /**
11338  * Find existing destination array resource or create and register a new one.
11339  *
11340  * @param[in, out] dev
11341  *   Pointer to rte_eth_dev structure.
11342  * @param[in] ref
11343  *   Pointer to destination array resource reference.
11344  * @parm[in, out] dev_flow
11345  *   Pointer to the dev_flow.
11346  * @param[out] error
11347  *   pointer to error structure.
11348  *
11349  * @return
11350  *   0 on success otherwise -errno and errno is set.
11351  */
11352 static int
11353 flow_dv_dest_array_resource_register(struct rte_eth_dev *dev,
11354                          struct mlx5_flow_dv_dest_array_resource *ref,
11355                          struct mlx5_flow *dev_flow,
11356                          struct rte_flow_error *error)
11357 {
11358         struct mlx5_flow_dv_dest_array_resource *resource;
11359         struct mlx5_priv *priv = dev->data->dev_private;
11360         struct mlx5_list_entry *entry;
11361         struct mlx5_flow_cb_ctx ctx = {
11362                 .dev = dev,
11363                 .error = error,
11364                 .data = ref,
11365         };
11366
11367         entry = mlx5_list_register(priv->sh->dest_array_list, &ctx);
11368         if (!entry)
11369                 return -rte_errno;
11370         resource = container_of(entry, typeof(*resource), entry);
11371         dev_flow->handle->dvh.rix_dest_array = resource->idx;
11372         dev_flow->dv.dest_array_res = resource;
11373         return 0;
11374 }
11375
11376 /**
11377  * Convert Sample action to DV specification.
11378  *
11379  * @param[in] dev
11380  *   Pointer to rte_eth_dev structure.
11381  * @param[in] action
11382  *   Pointer to sample action structure.
11383  * @param[in, out] dev_flow
11384  *   Pointer to the mlx5_flow.
11385  * @param[in] attr
11386  *   Pointer to the flow attributes.
11387  * @param[in, out] num_of_dest
11388  *   Pointer to the num of destination.
11389  * @param[in, out] sample_actions
11390  *   Pointer to sample actions list.
11391  * @param[in, out] res
11392  *   Pointer to sample resource.
11393  * @param[out] error
11394  *   Pointer to the error structure.
11395  *
11396  * @return
11397  *   0 on success, a negative errno value otherwise and rte_errno is set.
11398  */
11399 static int
11400 flow_dv_translate_action_sample(struct rte_eth_dev *dev,
11401                                 const struct rte_flow_action_sample *action,
11402                                 struct mlx5_flow *dev_flow,
11403                                 const struct rte_flow_attr *attr,
11404                                 uint32_t *num_of_dest,
11405                                 void **sample_actions,
11406                                 struct mlx5_flow_dv_sample_resource *res,
11407                                 struct rte_flow_error *error)
11408 {
11409         struct mlx5_priv *priv = dev->data->dev_private;
11410         const struct rte_flow_action *sub_actions;
11411         struct mlx5_flow_sub_actions_list *sample_act;
11412         struct mlx5_flow_sub_actions_idx *sample_idx;
11413         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11414         struct rte_flow *flow = dev_flow->flow;
11415         struct mlx5_flow_rss_desc *rss_desc;
11416         uint64_t action_flags = 0;
11417
11418         MLX5_ASSERT(wks);
11419         rss_desc = &wks->rss_desc;
11420         sample_act = &res->sample_act;
11421         sample_idx = &res->sample_idx;
11422         res->ratio = action->ratio;
11423         sub_actions = action->actions;
11424         for (; sub_actions->type != RTE_FLOW_ACTION_TYPE_END; sub_actions++) {
11425                 int type = sub_actions->type;
11426                 uint32_t pre_rix = 0;
11427                 void *pre_r;
11428                 switch (type) {
11429                 case RTE_FLOW_ACTION_TYPE_QUEUE:
11430                 {
11431                         const struct rte_flow_action_queue *queue;
11432                         struct mlx5_hrxq *hrxq;
11433                         uint32_t hrxq_idx;
11434
11435                         queue = sub_actions->conf;
11436                         rss_desc->queue_num = 1;
11437                         rss_desc->queue[0] = queue->index;
11438                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11439                                                     rss_desc, &hrxq_idx);
11440                         if (!hrxq)
11441                                 return rte_flow_error_set
11442                                         (error, rte_errno,
11443                                          RTE_FLOW_ERROR_TYPE_ACTION,
11444                                          NULL,
11445                                          "cannot create fate queue");
11446                         sample_act->dr_queue_action = hrxq->action;
11447                         sample_idx->rix_hrxq = hrxq_idx;
11448                         sample_actions[sample_act->actions_num++] =
11449                                                 hrxq->action;
11450                         (*num_of_dest)++;
11451                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
11452                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11453                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11454                         dev_flow->handle->fate_action =
11455                                         MLX5_FLOW_FATE_QUEUE;
11456                         break;
11457                 }
11458                 case RTE_FLOW_ACTION_TYPE_RSS:
11459                 {
11460                         struct mlx5_hrxq *hrxq;
11461                         uint32_t hrxq_idx;
11462                         const struct rte_flow_action_rss *rss;
11463                         const uint8_t *rss_key;
11464
11465                         rss = sub_actions->conf;
11466                         memcpy(rss_desc->queue, rss->queue,
11467                                rss->queue_num * sizeof(uint16_t));
11468                         rss_desc->queue_num = rss->queue_num;
11469                         /* NULL RSS key indicates default RSS key. */
11470                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
11471                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
11472                         /*
11473                          * rss->level and rss.types should be set in advance
11474                          * when expanding items for RSS.
11475                          */
11476                         flow_dv_hashfields_set(dev_flow, rss_desc);
11477                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11478                                                     rss_desc, &hrxq_idx);
11479                         if (!hrxq)
11480                                 return rte_flow_error_set
11481                                         (error, rte_errno,
11482                                          RTE_FLOW_ERROR_TYPE_ACTION,
11483                                          NULL,
11484                                          "cannot create fate queue");
11485                         sample_act->dr_queue_action = hrxq->action;
11486                         sample_idx->rix_hrxq = hrxq_idx;
11487                         sample_actions[sample_act->actions_num++] =
11488                                                 hrxq->action;
11489                         (*num_of_dest)++;
11490                         action_flags |= MLX5_FLOW_ACTION_RSS;
11491                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11492                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11493                         dev_flow->handle->fate_action =
11494                                         MLX5_FLOW_FATE_QUEUE;
11495                         break;
11496                 }
11497                 case RTE_FLOW_ACTION_TYPE_MARK:
11498                 {
11499                         uint32_t tag_be = mlx5_flow_mark_set
11500                                 (((const struct rte_flow_action_mark *)
11501                                 (sub_actions->conf))->id);
11502
11503                         dev_flow->handle->mark = 1;
11504                         pre_rix = dev_flow->handle->dvh.rix_tag;
11505                         /* Save the mark resource before sample */
11506                         pre_r = dev_flow->dv.tag_resource;
11507                         if (flow_dv_tag_resource_register(dev, tag_be,
11508                                                   dev_flow, error))
11509                                 return -rte_errno;
11510                         MLX5_ASSERT(dev_flow->dv.tag_resource);
11511                         sample_act->dr_tag_action =
11512                                 dev_flow->dv.tag_resource->action;
11513                         sample_idx->rix_tag =
11514                                 dev_flow->handle->dvh.rix_tag;
11515                         sample_actions[sample_act->actions_num++] =
11516                                                 sample_act->dr_tag_action;
11517                         /* Recover the mark resource after sample */
11518                         dev_flow->dv.tag_resource = pre_r;
11519                         dev_flow->handle->dvh.rix_tag = pre_rix;
11520                         action_flags |= MLX5_FLOW_ACTION_MARK;
11521                         break;
11522                 }
11523                 case RTE_FLOW_ACTION_TYPE_COUNT:
11524                 {
11525                         if (!flow->counter) {
11526                                 flow->counter =
11527                                         flow_dv_translate_create_counter(dev,
11528                                                 dev_flow, sub_actions->conf,
11529                                                 0);
11530                                 if (!flow->counter)
11531                                         return rte_flow_error_set
11532                                                 (error, rte_errno,
11533                                                 RTE_FLOW_ERROR_TYPE_ACTION,
11534                                                 NULL,
11535                                                 "cannot create counter"
11536                                                 " object.");
11537                         }
11538                         sample_act->dr_cnt_action =
11539                                   (flow_dv_counter_get_by_idx(dev,
11540                                   flow->counter, NULL))->action;
11541                         sample_actions[sample_act->actions_num++] =
11542                                                 sample_act->dr_cnt_action;
11543                         action_flags |= MLX5_FLOW_ACTION_COUNT;
11544                         break;
11545                 }
11546                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
11547                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
11548                 {
11549                         struct mlx5_flow_dv_port_id_action_resource
11550                                         port_id_resource;
11551                         uint32_t port_id = 0;
11552
11553                         memset(&port_id_resource, 0, sizeof(port_id_resource));
11554                         /* Save the port id resource before sample */
11555                         pre_rix = dev_flow->handle->rix_port_id_action;
11556                         pre_r = dev_flow->dv.port_id_action;
11557                         if (flow_dv_translate_action_port_id(dev, sub_actions,
11558                                                              &port_id, error))
11559                                 return -rte_errno;
11560                         port_id_resource.port_id = port_id;
11561                         if (flow_dv_port_id_action_resource_register
11562                             (dev, &port_id_resource, dev_flow, error))
11563                                 return -rte_errno;
11564                         sample_act->dr_port_id_action =
11565                                 dev_flow->dv.port_id_action->action;
11566                         sample_idx->rix_port_id_action =
11567                                 dev_flow->handle->rix_port_id_action;
11568                         sample_actions[sample_act->actions_num++] =
11569                                                 sample_act->dr_port_id_action;
11570                         /* Recover the port id resource after sample */
11571                         dev_flow->dv.port_id_action = pre_r;
11572                         dev_flow->handle->rix_port_id_action = pre_rix;
11573                         (*num_of_dest)++;
11574                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
11575                         break;
11576                 }
11577                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
11578                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
11579                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
11580                         /* Save the encap resource before sample */
11581                         pre_rix = dev_flow->handle->dvh.rix_encap_decap;
11582                         pre_r = dev_flow->dv.encap_decap;
11583                         if (flow_dv_create_action_l2_encap(dev, sub_actions,
11584                                                            dev_flow,
11585                                                            attr->transfer,
11586                                                            error))
11587                                 return -rte_errno;
11588                         sample_act->dr_encap_action =
11589                                 dev_flow->dv.encap_decap->action;
11590                         sample_idx->rix_encap_decap =
11591                                 dev_flow->handle->dvh.rix_encap_decap;
11592                         sample_actions[sample_act->actions_num++] =
11593                                                 sample_act->dr_encap_action;
11594                         /* Recover the encap resource after sample */
11595                         dev_flow->dv.encap_decap = pre_r;
11596                         dev_flow->handle->dvh.rix_encap_decap = pre_rix;
11597                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
11598                         break;
11599                 default:
11600                         return rte_flow_error_set(error, EINVAL,
11601                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11602                                 NULL,
11603                                 "Not support for sampler action");
11604                 }
11605         }
11606         sample_act->action_flags = action_flags;
11607         res->ft_id = dev_flow->dv.group;
11608         if (attr->transfer) {
11609                 union {
11610                         uint32_t action_in[MLX5_ST_SZ_DW(set_action_in)];
11611                         uint64_t set_action;
11612                 } action_ctx = { .set_action = 0 };
11613
11614                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
11615                 MLX5_SET(set_action_in, action_ctx.action_in, action_type,
11616                          MLX5_MODIFICATION_TYPE_SET);
11617                 MLX5_SET(set_action_in, action_ctx.action_in, field,
11618                          MLX5_MODI_META_REG_C_0);
11619                 MLX5_SET(set_action_in, action_ctx.action_in, data,
11620                          priv->vport_meta_tag);
11621                 res->set_action = action_ctx.set_action;
11622         } else if (attr->ingress) {
11623                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
11624         } else {
11625                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_TX;
11626         }
11627         return 0;
11628 }
11629
11630 /**
11631  * Convert Sample action to DV specification.
11632  *
11633  * @param[in] dev
11634  *   Pointer to rte_eth_dev structure.
11635  * @param[in, out] dev_flow
11636  *   Pointer to the mlx5_flow.
11637  * @param[in] num_of_dest
11638  *   The num of destination.
11639  * @param[in, out] res
11640  *   Pointer to sample resource.
11641  * @param[in, out] mdest_res
11642  *   Pointer to destination array resource.
11643  * @param[in] sample_actions
11644  *   Pointer to sample path actions list.
11645  * @param[in] action_flags
11646  *   Holds the actions detected until now.
11647  * @param[out] error
11648  *   Pointer to the error structure.
11649  *
11650  * @return
11651  *   0 on success, a negative errno value otherwise and rte_errno is set.
11652  */
11653 static int
11654 flow_dv_create_action_sample(struct rte_eth_dev *dev,
11655                              struct mlx5_flow *dev_flow,
11656                              uint32_t num_of_dest,
11657                              struct mlx5_flow_dv_sample_resource *res,
11658                              struct mlx5_flow_dv_dest_array_resource *mdest_res,
11659                              void **sample_actions,
11660                              uint64_t action_flags,
11661                              struct rte_flow_error *error)
11662 {
11663         /* update normal path action resource into last index of array */
11664         uint32_t dest_index = MLX5_MAX_DEST_NUM - 1;
11665         struct mlx5_flow_sub_actions_list *sample_act =
11666                                         &mdest_res->sample_act[dest_index];
11667         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11668         struct mlx5_flow_rss_desc *rss_desc;
11669         uint32_t normal_idx = 0;
11670         struct mlx5_hrxq *hrxq;
11671         uint32_t hrxq_idx;
11672
11673         MLX5_ASSERT(wks);
11674         rss_desc = &wks->rss_desc;
11675         if (num_of_dest > 1) {
11676                 if (sample_act->action_flags & MLX5_FLOW_ACTION_QUEUE) {
11677                         /* Handle QP action for mirroring */
11678                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11679                                                     rss_desc, &hrxq_idx);
11680                         if (!hrxq)
11681                                 return rte_flow_error_set
11682                                      (error, rte_errno,
11683                                       RTE_FLOW_ERROR_TYPE_ACTION,
11684                                       NULL,
11685                                       "cannot create rx queue");
11686                         normal_idx++;
11687                         mdest_res->sample_idx[dest_index].rix_hrxq = hrxq_idx;
11688                         sample_act->dr_queue_action = hrxq->action;
11689                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11690                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11691                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
11692                 }
11693                 if (sample_act->action_flags & MLX5_FLOW_ACTION_ENCAP) {
11694                         normal_idx++;
11695                         mdest_res->sample_idx[dest_index].rix_encap_decap =
11696                                 dev_flow->handle->dvh.rix_encap_decap;
11697                         sample_act->dr_encap_action =
11698                                 dev_flow->dv.encap_decap->action;
11699                         dev_flow->handle->dvh.rix_encap_decap = 0;
11700                 }
11701                 if (sample_act->action_flags & MLX5_FLOW_ACTION_PORT_ID) {
11702                         normal_idx++;
11703                         mdest_res->sample_idx[dest_index].rix_port_id_action =
11704                                 dev_flow->handle->rix_port_id_action;
11705                         sample_act->dr_port_id_action =
11706                                 dev_flow->dv.port_id_action->action;
11707                         dev_flow->handle->rix_port_id_action = 0;
11708                 }
11709                 if (sample_act->action_flags & MLX5_FLOW_ACTION_JUMP) {
11710                         normal_idx++;
11711                         mdest_res->sample_idx[dest_index].rix_jump =
11712                                 dev_flow->handle->rix_jump;
11713                         sample_act->dr_jump_action =
11714                                 dev_flow->dv.jump->action;
11715                         dev_flow->handle->rix_jump = 0;
11716                 }
11717                 sample_act->actions_num = normal_idx;
11718                 /* update sample action resource into first index of array */
11719                 mdest_res->ft_type = res->ft_type;
11720                 memcpy(&mdest_res->sample_idx[0], &res->sample_idx,
11721                                 sizeof(struct mlx5_flow_sub_actions_idx));
11722                 memcpy(&mdest_res->sample_act[0], &res->sample_act,
11723                                 sizeof(struct mlx5_flow_sub_actions_list));
11724                 mdest_res->num_of_dest = num_of_dest;
11725                 if (flow_dv_dest_array_resource_register(dev, mdest_res,
11726                                                          dev_flow, error))
11727                         return rte_flow_error_set(error, EINVAL,
11728                                                   RTE_FLOW_ERROR_TYPE_ACTION,
11729                                                   NULL, "can't create sample "
11730                                                   "action");
11731         } else {
11732                 res->sub_actions = sample_actions;
11733                 if (flow_dv_sample_resource_register(dev, res, dev_flow, error))
11734                         return rte_flow_error_set(error, EINVAL,
11735                                                   RTE_FLOW_ERROR_TYPE_ACTION,
11736                                                   NULL,
11737                                                   "can't create sample action");
11738         }
11739         return 0;
11740 }
11741
11742 /**
11743  * Remove an ASO age action from age actions list.
11744  *
11745  * @param[in] dev
11746  *   Pointer to the Ethernet device structure.
11747  * @param[in] age
11748  *   Pointer to the aso age action handler.
11749  */
11750 static void
11751 flow_dv_aso_age_remove_from_age(struct rte_eth_dev *dev,
11752                                 struct mlx5_aso_age_action *age)
11753 {
11754         struct mlx5_age_info *age_info;
11755         struct mlx5_age_param *age_param = &age->age_params;
11756         struct mlx5_priv *priv = dev->data->dev_private;
11757         uint16_t expected = AGE_CANDIDATE;
11758
11759         age_info = GET_PORT_AGE_INFO(priv);
11760         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
11761                                          AGE_FREE, false, __ATOMIC_RELAXED,
11762                                          __ATOMIC_RELAXED)) {
11763                 /**
11764                  * We need the lock even it is age timeout,
11765                  * since age action may still in process.
11766                  */
11767                 rte_spinlock_lock(&age_info->aged_sl);
11768                 LIST_REMOVE(age, next);
11769                 rte_spinlock_unlock(&age_info->aged_sl);
11770                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
11771         }
11772 }
11773
11774 /**
11775  * Release an ASO age action.
11776  *
11777  * @param[in] dev
11778  *   Pointer to the Ethernet device structure.
11779  * @param[in] age_idx
11780  *   Index of ASO age action to release.
11781  * @param[in] flow
11782  *   True if the release operation is during flow destroy operation.
11783  *   False if the release operation is during action destroy operation.
11784  *
11785  * @return
11786  *   0 when age action was removed, otherwise the number of references.
11787  */
11788 static int
11789 flow_dv_aso_age_release(struct rte_eth_dev *dev, uint32_t age_idx)
11790 {
11791         struct mlx5_priv *priv = dev->data->dev_private;
11792         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11793         struct mlx5_aso_age_action *age = flow_aso_age_get_by_idx(dev, age_idx);
11794         uint32_t ret = __atomic_sub_fetch(&age->refcnt, 1, __ATOMIC_RELAXED);
11795
11796         if (!ret) {
11797                 flow_dv_aso_age_remove_from_age(dev, age);
11798                 rte_spinlock_lock(&mng->free_sl);
11799                 LIST_INSERT_HEAD(&mng->free, age, next);
11800                 rte_spinlock_unlock(&mng->free_sl);
11801         }
11802         return ret;
11803 }
11804
11805 /**
11806  * Resize the ASO age pools array by MLX5_CNT_CONTAINER_RESIZE pools.
11807  *
11808  * @param[in] dev
11809  *   Pointer to the Ethernet device structure.
11810  *
11811  * @return
11812  *   0 on success, otherwise negative errno value and rte_errno is set.
11813  */
11814 static int
11815 flow_dv_aso_age_pools_resize(struct rte_eth_dev *dev)
11816 {
11817         struct mlx5_priv *priv = dev->data->dev_private;
11818         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11819         void *old_pools = mng->pools;
11820         uint32_t resize = mng->n + MLX5_CNT_CONTAINER_RESIZE;
11821         uint32_t mem_size = sizeof(struct mlx5_aso_age_pool *) * resize;
11822         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
11823
11824         if (!pools) {
11825                 rte_errno = ENOMEM;
11826                 return -ENOMEM;
11827         }
11828         if (old_pools) {
11829                 memcpy(pools, old_pools,
11830                        mng->n * sizeof(struct mlx5_flow_counter_pool *));
11831                 mlx5_free(old_pools);
11832         } else {
11833                 /* First ASO flow hit allocation - starting ASO data-path. */
11834                 int ret = mlx5_aso_flow_hit_queue_poll_start(priv->sh);
11835
11836                 if (ret) {
11837                         mlx5_free(pools);
11838                         return ret;
11839                 }
11840         }
11841         mng->n = resize;
11842         mng->pools = pools;
11843         return 0;
11844 }
11845
11846 /**
11847  * Create and initialize a new ASO aging pool.
11848  *
11849  * @param[in] dev
11850  *   Pointer to the Ethernet device structure.
11851  * @param[out] age_free
11852  *   Where to put the pointer of a new age action.
11853  *
11854  * @return
11855  *   The age actions pool pointer and @p age_free is set on success,
11856  *   NULL otherwise and rte_errno is set.
11857  */
11858 static struct mlx5_aso_age_pool *
11859 flow_dv_age_pool_create(struct rte_eth_dev *dev,
11860                         struct mlx5_aso_age_action **age_free)
11861 {
11862         struct mlx5_priv *priv = dev->data->dev_private;
11863         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11864         struct mlx5_aso_age_pool *pool = NULL;
11865         struct mlx5_devx_obj *obj = NULL;
11866         uint32_t i;
11867
11868         obj = mlx5_devx_cmd_create_flow_hit_aso_obj(priv->sh->cdev->ctx,
11869                                                     priv->sh->pdn);
11870         if (!obj) {
11871                 rte_errno = ENODATA;
11872                 DRV_LOG(ERR, "Failed to create flow_hit_aso_obj using DevX.");
11873                 return NULL;
11874         }
11875         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
11876         if (!pool) {
11877                 claim_zero(mlx5_devx_cmd_destroy(obj));
11878                 rte_errno = ENOMEM;
11879                 return NULL;
11880         }
11881         pool->flow_hit_aso_obj = obj;
11882         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
11883         rte_spinlock_lock(&mng->resize_sl);
11884         pool->index = mng->next;
11885         /* Resize pools array if there is no room for the new pool in it. */
11886         if (pool->index == mng->n && flow_dv_aso_age_pools_resize(dev)) {
11887                 claim_zero(mlx5_devx_cmd_destroy(obj));
11888                 mlx5_free(pool);
11889                 rte_spinlock_unlock(&mng->resize_sl);
11890                 return NULL;
11891         }
11892         mng->pools[pool->index] = pool;
11893         mng->next++;
11894         rte_spinlock_unlock(&mng->resize_sl);
11895         /* Assign the first action in the new pool, the rest go to free list. */
11896         *age_free = &pool->actions[0];
11897         for (i = 1; i < MLX5_ASO_AGE_ACTIONS_PER_POOL; i++) {
11898                 pool->actions[i].offset = i;
11899                 LIST_INSERT_HEAD(&mng->free, &pool->actions[i], next);
11900         }
11901         return pool;
11902 }
11903
11904 /**
11905  * Allocate a ASO aging bit.
11906  *
11907  * @param[in] dev
11908  *   Pointer to the Ethernet device structure.
11909  * @param[out] error
11910  *   Pointer to the error structure.
11911  *
11912  * @return
11913  *   Index to ASO age action on success, 0 otherwise and rte_errno is set.
11914  */
11915 static uint32_t
11916 flow_dv_aso_age_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
11917 {
11918         struct mlx5_priv *priv = dev->data->dev_private;
11919         const struct mlx5_aso_age_pool *pool;
11920         struct mlx5_aso_age_action *age_free = NULL;
11921         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11922
11923         MLX5_ASSERT(mng);
11924         /* Try to get the next free age action bit. */
11925         rte_spinlock_lock(&mng->free_sl);
11926         age_free = LIST_FIRST(&mng->free);
11927         if (age_free) {
11928                 LIST_REMOVE(age_free, next);
11929         } else if (!flow_dv_age_pool_create(dev, &age_free)) {
11930                 rte_spinlock_unlock(&mng->free_sl);
11931                 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
11932                                    NULL, "failed to create ASO age pool");
11933                 return 0; /* 0 is an error. */
11934         }
11935         rte_spinlock_unlock(&mng->free_sl);
11936         pool = container_of
11937           ((const struct mlx5_aso_age_action (*)[MLX5_ASO_AGE_ACTIONS_PER_POOL])
11938                   (age_free - age_free->offset), const struct mlx5_aso_age_pool,
11939                                                                        actions);
11940         if (!age_free->dr_action) {
11941                 int reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_FLOW_HIT, 0,
11942                                                  error);
11943
11944                 if (reg_c < 0) {
11945                         rte_flow_error_set(error, rte_errno,
11946                                            RTE_FLOW_ERROR_TYPE_ACTION,
11947                                            NULL, "failed to get reg_c "
11948                                            "for ASO flow hit");
11949                         return 0; /* 0 is an error. */
11950                 }
11951 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
11952                 age_free->dr_action = mlx5_glue->dv_create_flow_action_aso
11953                                 (priv->sh->rx_domain,
11954                                  pool->flow_hit_aso_obj->obj, age_free->offset,
11955                                  MLX5DV_DR_ACTION_FLAGS_ASO_FIRST_HIT_SET,
11956                                  (reg_c - REG_C_0));
11957 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
11958                 if (!age_free->dr_action) {
11959                         rte_errno = errno;
11960                         rte_spinlock_lock(&mng->free_sl);
11961                         LIST_INSERT_HEAD(&mng->free, age_free, next);
11962                         rte_spinlock_unlock(&mng->free_sl);
11963                         rte_flow_error_set(error, rte_errno,
11964                                            RTE_FLOW_ERROR_TYPE_ACTION,
11965                                            NULL, "failed to create ASO "
11966                                            "flow hit action");
11967                         return 0; /* 0 is an error. */
11968                 }
11969         }
11970         __atomic_store_n(&age_free->refcnt, 1, __ATOMIC_RELAXED);
11971         return pool->index | ((age_free->offset + 1) << 16);
11972 }
11973
11974 /**
11975  * Initialize flow ASO age parameters.
11976  *
11977  * @param[in] dev
11978  *   Pointer to rte_eth_dev structure.
11979  * @param[in] age_idx
11980  *   Index of ASO age action.
11981  * @param[in] context
11982  *   Pointer to flow counter age context.
11983  * @param[in] timeout
11984  *   Aging timeout in seconds.
11985  *
11986  */
11987 static void
11988 flow_dv_aso_age_params_init(struct rte_eth_dev *dev,
11989                             uint32_t age_idx,
11990                             void *context,
11991                             uint32_t timeout)
11992 {
11993         struct mlx5_aso_age_action *aso_age;
11994
11995         aso_age = flow_aso_age_get_by_idx(dev, age_idx);
11996         MLX5_ASSERT(aso_age);
11997         aso_age->age_params.context = context;
11998         aso_age->age_params.timeout = timeout;
11999         aso_age->age_params.port_id = dev->data->port_id;
12000         __atomic_store_n(&aso_age->age_params.sec_since_last_hit, 0,
12001                          __ATOMIC_RELAXED);
12002         __atomic_store_n(&aso_age->age_params.state, AGE_CANDIDATE,
12003                          __ATOMIC_RELAXED);
12004 }
12005
12006 static void
12007 flow_dv_translate_integrity_l4(const struct rte_flow_item_integrity *mask,
12008                                const struct rte_flow_item_integrity *value,
12009                                void *headers_m, void *headers_v)
12010 {
12011         if (mask->l4_ok) {
12012                 /* application l4_ok filter aggregates all hardware l4 filters
12013                  * therefore hw l4_checksum_ok must be implicitly added here.
12014                  */
12015                 struct rte_flow_item_integrity local_item;
12016
12017                 local_item.l4_csum_ok = 1;
12018                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
12019                          local_item.l4_csum_ok);
12020                 if (value->l4_ok) {
12021                         /* application l4_ok = 1 matches sets both hw flags
12022                          * l4_ok and l4_checksum_ok flags to 1.
12023                          */
12024                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12025                                  l4_checksum_ok, local_item.l4_csum_ok);
12026                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_ok,
12027                                  mask->l4_ok);
12028                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_ok,
12029                                  value->l4_ok);
12030                 } else {
12031                         /* application l4_ok = 0 matches on hw flag
12032                          * l4_checksum_ok = 0 only.
12033                          */
12034                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12035                                  l4_checksum_ok, 0);
12036                 }
12037         } else if (mask->l4_csum_ok) {
12038                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
12039                          mask->l4_csum_ok);
12040                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_checksum_ok,
12041                          value->l4_csum_ok);
12042         }
12043 }
12044
12045 static void
12046 flow_dv_translate_integrity_l3(const struct rte_flow_item_integrity *mask,
12047                                const struct rte_flow_item_integrity *value,
12048                                void *headers_m, void *headers_v,
12049                                bool is_ipv4)
12050 {
12051         if (mask->l3_ok) {
12052                 /* application l3_ok filter aggregates all hardware l3 filters
12053                  * therefore hw ipv4_checksum_ok must be implicitly added here.
12054                  */
12055                 struct rte_flow_item_integrity local_item;
12056
12057                 local_item.ipv4_csum_ok = !!is_ipv4;
12058                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
12059                          local_item.ipv4_csum_ok);
12060                 if (value->l3_ok) {
12061                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12062                                  ipv4_checksum_ok, local_item.ipv4_csum_ok);
12063                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, l3_ok,
12064                                  mask->l3_ok);
12065                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, l3_ok,
12066                                  value->l3_ok);
12067                 } else {
12068                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12069                                  ipv4_checksum_ok, 0);
12070                 }
12071         } else if (mask->ipv4_csum_ok) {
12072                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
12073                          mask->ipv4_csum_ok);
12074                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_checksum_ok,
12075                          value->ipv4_csum_ok);
12076         }
12077 }
12078
12079 static void
12080 flow_dv_translate_item_integrity(void *matcher, void *key,
12081                                  const struct rte_flow_item *head_item,
12082                                  const struct rte_flow_item *integrity_item)
12083 {
12084         const struct rte_flow_item_integrity *mask = integrity_item->mask;
12085         const struct rte_flow_item_integrity *value = integrity_item->spec;
12086         const struct rte_flow_item *tunnel_item, *end_item, *item;
12087         void *headers_m;
12088         void *headers_v;
12089         uint32_t l3_protocol;
12090
12091         if (!value)
12092                 return;
12093         if (!mask)
12094                 mask = &rte_flow_item_integrity_mask;
12095         if (value->level > 1) {
12096                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12097                                          inner_headers);
12098                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
12099         } else {
12100                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12101                                          outer_headers);
12102                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
12103         }
12104         tunnel_item = mlx5_flow_find_tunnel_item(head_item);
12105         if (value->level > 1) {
12106                 /* tunnel item was verified during the item validation */
12107                 item = tunnel_item;
12108                 end_item = mlx5_find_end_item(tunnel_item);
12109         } else {
12110                 item = head_item;
12111                 end_item = tunnel_item ? tunnel_item :
12112                            mlx5_find_end_item(integrity_item);
12113         }
12114         l3_protocol = mask->l3_ok ?
12115                       mlx5_flow_locate_proto_l3(&item, end_item) : 0;
12116         flow_dv_translate_integrity_l3(mask, value, headers_m, headers_v,
12117                                        l3_protocol == RTE_ETHER_TYPE_IPV4);
12118         flow_dv_translate_integrity_l4(mask, value, headers_m, headers_v);
12119 }
12120
12121 /**
12122  * Prepares DV flow counter with aging configuration.
12123  * Gets it by index when exists, creates a new one when doesn't.
12124  *
12125  * @param[in] dev
12126  *   Pointer to rte_eth_dev structure.
12127  * @param[in] dev_flow
12128  *   Pointer to the mlx5_flow.
12129  * @param[in, out] flow
12130  *   Pointer to the sub flow.
12131  * @param[in] count
12132  *   Pointer to the counter action configuration.
12133  * @param[in] age
12134  *   Pointer to the aging action configuration.
12135  * @param[out] error
12136  *   Pointer to the error structure.
12137  *
12138  * @return
12139  *   Pointer to the counter, NULL otherwise.
12140  */
12141 static struct mlx5_flow_counter *
12142 flow_dv_prepare_counter(struct rte_eth_dev *dev,
12143                         struct mlx5_flow *dev_flow,
12144                         struct rte_flow *flow,
12145                         const struct rte_flow_action_count *count,
12146                         const struct rte_flow_action_age *age,
12147                         struct rte_flow_error *error)
12148 {
12149         if (!flow->counter) {
12150                 flow->counter = flow_dv_translate_create_counter(dev, dev_flow,
12151                                                                  count, age);
12152                 if (!flow->counter) {
12153                         rte_flow_error_set(error, rte_errno,
12154                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12155                                            "cannot create counter object.");
12156                         return NULL;
12157                 }
12158         }
12159         return flow_dv_counter_get_by_idx(dev, flow->counter, NULL);
12160 }
12161
12162 /*
12163  * Release an ASO CT action by its own device.
12164  *
12165  * @param[in] dev
12166  *   Pointer to the Ethernet device structure.
12167  * @param[in] idx
12168  *   Index of ASO CT action to release.
12169  *
12170  * @return
12171  *   0 when CT action was removed, otherwise the number of references.
12172  */
12173 static inline int
12174 flow_dv_aso_ct_dev_release(struct rte_eth_dev *dev, uint32_t idx)
12175 {
12176         struct mlx5_priv *priv = dev->data->dev_private;
12177         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12178         uint32_t ret;
12179         struct mlx5_aso_ct_action *ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12180         enum mlx5_aso_ct_state state =
12181                         __atomic_load_n(&ct->state, __ATOMIC_RELAXED);
12182
12183         /* Cannot release when CT is in the ASO SQ. */
12184         if (state == ASO_CONNTRACK_WAIT || state == ASO_CONNTRACK_QUERY)
12185                 return -1;
12186         ret = __atomic_sub_fetch(&ct->refcnt, 1, __ATOMIC_RELAXED);
12187         if (!ret) {
12188                 if (ct->dr_action_orig) {
12189 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12190                         claim_zero(mlx5_glue->destroy_flow_action
12191                                         (ct->dr_action_orig));
12192 #endif
12193                         ct->dr_action_orig = NULL;
12194                 }
12195                 if (ct->dr_action_rply) {
12196 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12197                         claim_zero(mlx5_glue->destroy_flow_action
12198                                         (ct->dr_action_rply));
12199 #endif
12200                         ct->dr_action_rply = NULL;
12201                 }
12202                 /* Clear the state to free, no need in 1st allocation. */
12203                 MLX5_ASO_CT_UPDATE_STATE(ct, ASO_CONNTRACK_FREE);
12204                 rte_spinlock_lock(&mng->ct_sl);
12205                 LIST_INSERT_HEAD(&mng->free_cts, ct, next);
12206                 rte_spinlock_unlock(&mng->ct_sl);
12207         }
12208         return (int)ret;
12209 }
12210
12211 static inline int
12212 flow_dv_aso_ct_release(struct rte_eth_dev *dev, uint32_t own_idx,
12213                        struct rte_flow_error *error)
12214 {
12215         uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(own_idx);
12216         uint32_t idx = MLX5_INDIRECT_ACT_CT_GET_IDX(own_idx);
12217         struct rte_eth_dev *owndev = &rte_eth_devices[owner];
12218         int ret;
12219
12220         MLX5_ASSERT(owner < RTE_MAX_ETHPORTS);
12221         if (dev->data->dev_started != 1)
12222                 return rte_flow_error_set(error, EAGAIN,
12223                                           RTE_FLOW_ERROR_TYPE_ACTION,
12224                                           NULL,
12225                                           "Indirect CT action cannot be destroyed when the port is stopped");
12226         ret = flow_dv_aso_ct_dev_release(owndev, idx);
12227         if (ret < 0)
12228                 return rte_flow_error_set(error, EAGAIN,
12229                                           RTE_FLOW_ERROR_TYPE_ACTION,
12230                                           NULL,
12231                                           "Current state prevents indirect CT action from being destroyed");
12232         return ret;
12233 }
12234
12235 /*
12236  * Resize the ASO CT pools array by 64 pools.
12237  *
12238  * @param[in] dev
12239  *   Pointer to the Ethernet device structure.
12240  *
12241  * @return
12242  *   0 on success, otherwise negative errno value and rte_errno is set.
12243  */
12244 static int
12245 flow_dv_aso_ct_pools_resize(struct rte_eth_dev *dev)
12246 {
12247         struct mlx5_priv *priv = dev->data->dev_private;
12248         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12249         void *old_pools = mng->pools;
12250         /* Magic number now, need a macro. */
12251         uint32_t resize = mng->n + 64;
12252         uint32_t mem_size = sizeof(struct mlx5_aso_ct_pool *) * resize;
12253         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
12254
12255         if (!pools) {
12256                 rte_errno = ENOMEM;
12257                 return -rte_errno;
12258         }
12259         rte_rwlock_write_lock(&mng->resize_rwl);
12260         /* ASO SQ/QP was already initialized in the startup. */
12261         if (old_pools) {
12262                 /* Realloc could be an alternative choice. */
12263                 rte_memcpy(pools, old_pools,
12264                            mng->n * sizeof(struct mlx5_aso_ct_pool *));
12265                 mlx5_free(old_pools);
12266         }
12267         mng->n = resize;
12268         mng->pools = pools;
12269         rte_rwlock_write_unlock(&mng->resize_rwl);
12270         return 0;
12271 }
12272
12273 /*
12274  * Create and initialize a new ASO CT pool.
12275  *
12276  * @param[in] dev
12277  *   Pointer to the Ethernet device structure.
12278  * @param[out] ct_free
12279  *   Where to put the pointer of a new CT action.
12280  *
12281  * @return
12282  *   The CT actions pool pointer and @p ct_free is set on success,
12283  *   NULL otherwise and rte_errno is set.
12284  */
12285 static struct mlx5_aso_ct_pool *
12286 flow_dv_ct_pool_create(struct rte_eth_dev *dev,
12287                        struct mlx5_aso_ct_action **ct_free)
12288 {
12289         struct mlx5_priv *priv = dev->data->dev_private;
12290         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12291         struct mlx5_aso_ct_pool *pool = NULL;
12292         struct mlx5_devx_obj *obj = NULL;
12293         uint32_t i;
12294         uint32_t log_obj_size = rte_log2_u32(MLX5_ASO_CT_ACTIONS_PER_POOL);
12295
12296         obj = mlx5_devx_cmd_create_conn_track_offload_obj(priv->sh->cdev->ctx,
12297                                                 priv->sh->pdn, log_obj_size);
12298         if (!obj) {
12299                 rte_errno = ENODATA;
12300                 DRV_LOG(ERR, "Failed to create conn_track_offload_obj using DevX.");
12301                 return NULL;
12302         }
12303         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
12304         if (!pool) {
12305                 rte_errno = ENOMEM;
12306                 claim_zero(mlx5_devx_cmd_destroy(obj));
12307                 return NULL;
12308         }
12309         pool->devx_obj = obj;
12310         pool->index = mng->next;
12311         /* Resize pools array if there is no room for the new pool in it. */
12312         if (pool->index == mng->n && flow_dv_aso_ct_pools_resize(dev)) {
12313                 claim_zero(mlx5_devx_cmd_destroy(obj));
12314                 mlx5_free(pool);
12315                 return NULL;
12316         }
12317         mng->pools[pool->index] = pool;
12318         mng->next++;
12319         /* Assign the first action in the new pool, the rest go to free list. */
12320         *ct_free = &pool->actions[0];
12321         /* Lock outside, the list operation is safe here. */
12322         for (i = 1; i < MLX5_ASO_CT_ACTIONS_PER_POOL; i++) {
12323                 /* refcnt is 0 when allocating the memory. */
12324                 pool->actions[i].offset = i;
12325                 LIST_INSERT_HEAD(&mng->free_cts, &pool->actions[i], next);
12326         }
12327         return pool;
12328 }
12329
12330 /*
12331  * Allocate a ASO CT action from free list.
12332  *
12333  * @param[in] dev
12334  *   Pointer to the Ethernet device structure.
12335  * @param[out] error
12336  *   Pointer to the error structure.
12337  *
12338  * @return
12339  *   Index to ASO CT action on success, 0 otherwise and rte_errno is set.
12340  */
12341 static uint32_t
12342 flow_dv_aso_ct_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
12343 {
12344         struct mlx5_priv *priv = dev->data->dev_private;
12345         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12346         struct mlx5_aso_ct_action *ct = NULL;
12347         struct mlx5_aso_ct_pool *pool;
12348         uint8_t reg_c;
12349         uint32_t ct_idx;
12350
12351         MLX5_ASSERT(mng);
12352         if (!priv->sh->devx) {
12353                 rte_errno = ENOTSUP;
12354                 return 0;
12355         }
12356         /* Get a free CT action, if no, a new pool will be created. */
12357         rte_spinlock_lock(&mng->ct_sl);
12358         ct = LIST_FIRST(&mng->free_cts);
12359         if (ct) {
12360                 LIST_REMOVE(ct, next);
12361         } else if (!flow_dv_ct_pool_create(dev, &ct)) {
12362                 rte_spinlock_unlock(&mng->ct_sl);
12363                 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12364                                    NULL, "failed to create ASO CT pool");
12365                 return 0;
12366         }
12367         rte_spinlock_unlock(&mng->ct_sl);
12368         pool = container_of(ct, struct mlx5_aso_ct_pool, actions[ct->offset]);
12369         ct_idx = MLX5_MAKE_CT_IDX(pool->index, ct->offset);
12370         /* 0: inactive, 1: created, 2+: used by flows. */
12371         __atomic_store_n(&ct->refcnt, 1, __ATOMIC_RELAXED);
12372         reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, error);
12373         if (!ct->dr_action_orig) {
12374 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12375                 ct->dr_action_orig = mlx5_glue->dv_create_flow_action_aso
12376                         (priv->sh->rx_domain, pool->devx_obj->obj,
12377                          ct->offset,
12378                          MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_INITIATOR,
12379                          reg_c - REG_C_0);
12380 #else
12381                 RTE_SET_USED(reg_c);
12382 #endif
12383                 if (!ct->dr_action_orig) {
12384                         flow_dv_aso_ct_dev_release(dev, ct_idx);
12385                         rte_flow_error_set(error, rte_errno,
12386                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12387                                            "failed to create ASO CT action");
12388                         return 0;
12389                 }
12390         }
12391         if (!ct->dr_action_rply) {
12392 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12393                 ct->dr_action_rply = mlx5_glue->dv_create_flow_action_aso
12394                         (priv->sh->rx_domain, pool->devx_obj->obj,
12395                          ct->offset,
12396                          MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_RESPONDER,
12397                          reg_c - REG_C_0);
12398 #endif
12399                 if (!ct->dr_action_rply) {
12400                         flow_dv_aso_ct_dev_release(dev, ct_idx);
12401                         rte_flow_error_set(error, rte_errno,
12402                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12403                                            "failed to create ASO CT action");
12404                         return 0;
12405                 }
12406         }
12407         return ct_idx;
12408 }
12409
12410 /*
12411  * Create a conntrack object with context and actions by using ASO mechanism.
12412  *
12413  * @param[in] dev
12414  *   Pointer to rte_eth_dev structure.
12415  * @param[in] pro
12416  *   Pointer to conntrack information profile.
12417  * @param[out] error
12418  *   Pointer to the error structure.
12419  *
12420  * @return
12421  *   Index to conntrack object on success, 0 otherwise.
12422  */
12423 static uint32_t
12424 flow_dv_translate_create_conntrack(struct rte_eth_dev *dev,
12425                                    const struct rte_flow_action_conntrack *pro,
12426                                    struct rte_flow_error *error)
12427 {
12428         struct mlx5_priv *priv = dev->data->dev_private;
12429         struct mlx5_dev_ctx_shared *sh = priv->sh;
12430         struct mlx5_aso_ct_action *ct;
12431         uint32_t idx;
12432
12433         if (!sh->ct_aso_en)
12434                 return rte_flow_error_set(error, ENOTSUP,
12435                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12436                                           "Connection is not supported");
12437         idx = flow_dv_aso_ct_alloc(dev, error);
12438         if (!idx)
12439                 return rte_flow_error_set(error, rte_errno,
12440                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12441                                           "Failed to allocate CT object");
12442         ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12443         if (mlx5_aso_ct_update_by_wqe(sh, ct, pro))
12444                 return rte_flow_error_set(error, EBUSY,
12445                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12446                                           "Failed to update CT");
12447         ct->is_original = !!pro->is_original_dir;
12448         ct->peer = pro->peer_port;
12449         return idx;
12450 }
12451
12452 /**
12453  * Fill the flow with DV spec, lock free
12454  * (mutex should be acquired by caller).
12455  *
12456  * @param[in] dev
12457  *   Pointer to rte_eth_dev structure.
12458  * @param[in, out] dev_flow
12459  *   Pointer to the sub flow.
12460  * @param[in] attr
12461  *   Pointer to the flow attributes.
12462  * @param[in] items
12463  *   Pointer to the list of items.
12464  * @param[in] actions
12465  *   Pointer to the list of actions.
12466  * @param[out] error
12467  *   Pointer to the error structure.
12468  *
12469  * @return
12470  *   0 on success, a negative errno value otherwise and rte_errno is set.
12471  */
12472 static int
12473 flow_dv_translate(struct rte_eth_dev *dev,
12474                   struct mlx5_flow *dev_flow,
12475                   const struct rte_flow_attr *attr,
12476                   const struct rte_flow_item items[],
12477                   const struct rte_flow_action actions[],
12478                   struct rte_flow_error *error)
12479 {
12480         struct mlx5_priv *priv = dev->data->dev_private;
12481         struct mlx5_dev_config *dev_conf = &priv->config;
12482         struct rte_flow *flow = dev_flow->flow;
12483         struct mlx5_flow_handle *handle = dev_flow->handle;
12484         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
12485         struct mlx5_flow_rss_desc *rss_desc;
12486         uint64_t item_flags = 0;
12487         uint64_t last_item = 0;
12488         uint64_t action_flags = 0;
12489         struct mlx5_flow_dv_matcher matcher = {
12490                 .mask = {
12491                         .size = sizeof(matcher.mask.buf),
12492                 },
12493         };
12494         int actions_n = 0;
12495         bool actions_end = false;
12496         union {
12497                 struct mlx5_flow_dv_modify_hdr_resource res;
12498                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
12499                             sizeof(struct mlx5_modification_cmd) *
12500                             (MLX5_MAX_MODIFY_NUM + 1)];
12501         } mhdr_dummy;
12502         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
12503         const struct rte_flow_action_count *count = NULL;
12504         const struct rte_flow_action_age *non_shared_age = NULL;
12505         union flow_dv_attr flow_attr = { .attr = 0 };
12506         uint32_t tag_be;
12507         union mlx5_flow_tbl_key tbl_key;
12508         uint32_t modify_action_position = UINT32_MAX;
12509         void *match_mask = matcher.mask.buf;
12510         void *match_value = dev_flow->dv.value.buf;
12511         uint8_t next_protocol = 0xff;
12512         struct rte_vlan_hdr vlan = { 0 };
12513         struct mlx5_flow_dv_dest_array_resource mdest_res;
12514         struct mlx5_flow_dv_sample_resource sample_res;
12515         void *sample_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
12516         const struct rte_flow_action_sample *sample = NULL;
12517         struct mlx5_flow_sub_actions_list *sample_act;
12518         uint32_t sample_act_pos = UINT32_MAX;
12519         uint32_t age_act_pos = UINT32_MAX;
12520         uint32_t num_of_dest = 0;
12521         int tmp_actions_n = 0;
12522         uint32_t table;
12523         int ret = 0;
12524         const struct mlx5_flow_tunnel *tunnel = NULL;
12525         struct flow_grp_info grp_info = {
12526                 .external = !!dev_flow->external,
12527                 .transfer = !!attr->transfer,
12528                 .fdb_def_rule = !!priv->fdb_def_rule,
12529                 .skip_scale = dev_flow->skip_scale &
12530                         (1 << MLX5_SCALE_FLOW_GROUP_BIT),
12531                 .std_tbl_fix = true,
12532         };
12533         const struct rte_flow_item *head_item = items;
12534
12535         if (!wks)
12536                 return rte_flow_error_set(error, ENOMEM,
12537                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12538                                           NULL,
12539                                           "failed to push flow workspace");
12540         rss_desc = &wks->rss_desc;
12541         memset(&mdest_res, 0, sizeof(struct mlx5_flow_dv_dest_array_resource));
12542         memset(&sample_res, 0, sizeof(struct mlx5_flow_dv_sample_resource));
12543         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12544                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12545         /* update normal path action resource into last index of array */
12546         sample_act = &mdest_res.sample_act[MLX5_MAX_DEST_NUM - 1];
12547         if (is_tunnel_offload_active(dev)) {
12548                 if (dev_flow->tunnel) {
12549                         RTE_VERIFY(dev_flow->tof_type ==
12550                                    MLX5_TUNNEL_OFFLOAD_MISS_RULE);
12551                         tunnel = dev_flow->tunnel;
12552                 } else {
12553                         tunnel = mlx5_get_tof(items, actions,
12554                                               &dev_flow->tof_type);
12555                         dev_flow->tunnel = tunnel;
12556                 }
12557                 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
12558                                         (dev, attr, tunnel, dev_flow->tof_type);
12559         }
12560         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12561                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12562         ret = mlx5_flow_group_to_table(dev, tunnel, attr->group, &table,
12563                                        &grp_info, error);
12564         if (ret)
12565                 return ret;
12566         dev_flow->dv.group = table;
12567         if (attr->transfer)
12568                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
12569         /* number of actions must be set to 0 in case of dirty stack. */
12570         mhdr_res->actions_num = 0;
12571         if (is_flow_tunnel_match_rule(dev_flow->tof_type)) {
12572                 /*
12573                  * do not add decap action if match rule drops packet
12574                  * HW rejects rules with decap & drop
12575                  *
12576                  * if tunnel match rule was inserted before matching tunnel set
12577                  * rule flow table used in the match rule must be registered.
12578                  * current implementation handles that in the
12579                  * flow_dv_match_register() at the function end.
12580                  */
12581                 bool add_decap = true;
12582                 const struct rte_flow_action *ptr = actions;
12583
12584                 for (; ptr->type != RTE_FLOW_ACTION_TYPE_END; ptr++) {
12585                         if (ptr->type == RTE_FLOW_ACTION_TYPE_DROP) {
12586                                 add_decap = false;
12587                                 break;
12588                         }
12589                 }
12590                 if (add_decap) {
12591                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
12592                                                            attr->transfer,
12593                                                            error))
12594                                 return -rte_errno;
12595                         dev_flow->dv.actions[actions_n++] =
12596                                         dev_flow->dv.encap_decap->action;
12597                         action_flags |= MLX5_FLOW_ACTION_DECAP;
12598                 }
12599         }
12600         for (; !actions_end ; actions++) {
12601                 const struct rte_flow_action_queue *queue;
12602                 const struct rte_flow_action_rss *rss;
12603                 const struct rte_flow_action *action = actions;
12604                 const uint8_t *rss_key;
12605                 struct mlx5_flow_tbl_resource *tbl;
12606                 struct mlx5_aso_age_action *age_act;
12607                 struct mlx5_flow_counter *cnt_act;
12608                 uint32_t port_id = 0;
12609                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
12610                 int action_type = actions->type;
12611                 const struct rte_flow_action *found_action = NULL;
12612                 uint32_t jump_group = 0;
12613                 uint32_t owner_idx;
12614                 struct mlx5_aso_ct_action *ct;
12615
12616                 if (!mlx5_flow_os_action_supported(action_type))
12617                         return rte_flow_error_set(error, ENOTSUP,
12618                                                   RTE_FLOW_ERROR_TYPE_ACTION,
12619                                                   actions,
12620                                                   "action not supported");
12621                 switch (action_type) {
12622                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
12623                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
12624                         break;
12625                 case RTE_FLOW_ACTION_TYPE_VOID:
12626                         break;
12627                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
12628                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
12629                         if (flow_dv_translate_action_port_id(dev, action,
12630                                                              &port_id, error))
12631                                 return -rte_errno;
12632                         port_id_resource.port_id = port_id;
12633                         MLX5_ASSERT(!handle->rix_port_id_action);
12634                         if (flow_dv_port_id_action_resource_register
12635                             (dev, &port_id_resource, dev_flow, error))
12636                                 return -rte_errno;
12637                         dev_flow->dv.actions[actions_n++] =
12638                                         dev_flow->dv.port_id_action->action;
12639                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12640                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_PORT_ID;
12641                         sample_act->action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12642                         num_of_dest++;
12643                         break;
12644                 case RTE_FLOW_ACTION_TYPE_FLAG:
12645                         action_flags |= MLX5_FLOW_ACTION_FLAG;
12646                         dev_flow->handle->mark = 1;
12647                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12648                                 struct rte_flow_action_mark mark = {
12649                                         .id = MLX5_FLOW_MARK_DEFAULT,
12650                                 };
12651
12652                                 if (flow_dv_convert_action_mark(dev, &mark,
12653                                                                 mhdr_res,
12654                                                                 error))
12655                                         return -rte_errno;
12656                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12657                                 break;
12658                         }
12659                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
12660                         /*
12661                          * Only one FLAG or MARK is supported per device flow
12662                          * right now. So the pointer to the tag resource must be
12663                          * zero before the register process.
12664                          */
12665                         MLX5_ASSERT(!handle->dvh.rix_tag);
12666                         if (flow_dv_tag_resource_register(dev, tag_be,
12667                                                           dev_flow, error))
12668                                 return -rte_errno;
12669                         MLX5_ASSERT(dev_flow->dv.tag_resource);
12670                         dev_flow->dv.actions[actions_n++] =
12671                                         dev_flow->dv.tag_resource->action;
12672                         break;
12673                 case RTE_FLOW_ACTION_TYPE_MARK:
12674                         action_flags |= MLX5_FLOW_ACTION_MARK;
12675                         dev_flow->handle->mark = 1;
12676                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12677                                 const struct rte_flow_action_mark *mark =
12678                                         (const struct rte_flow_action_mark *)
12679                                                 actions->conf;
12680
12681                                 if (flow_dv_convert_action_mark(dev, mark,
12682                                                                 mhdr_res,
12683                                                                 error))
12684                                         return -rte_errno;
12685                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12686                                 break;
12687                         }
12688                         /* Fall-through */
12689                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
12690                         /* Legacy (non-extensive) MARK action. */
12691                         tag_be = mlx5_flow_mark_set
12692                               (((const struct rte_flow_action_mark *)
12693                                (actions->conf))->id);
12694                         MLX5_ASSERT(!handle->dvh.rix_tag);
12695                         if (flow_dv_tag_resource_register(dev, tag_be,
12696                                                           dev_flow, error))
12697                                 return -rte_errno;
12698                         MLX5_ASSERT(dev_flow->dv.tag_resource);
12699                         dev_flow->dv.actions[actions_n++] =
12700                                         dev_flow->dv.tag_resource->action;
12701                         break;
12702                 case RTE_FLOW_ACTION_TYPE_SET_META:
12703                         if (flow_dv_convert_action_set_meta
12704                                 (dev, mhdr_res, attr,
12705                                  (const struct rte_flow_action_set_meta *)
12706                                   actions->conf, error))
12707                                 return -rte_errno;
12708                         action_flags |= MLX5_FLOW_ACTION_SET_META;
12709                         break;
12710                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
12711                         if (flow_dv_convert_action_set_tag
12712                                 (dev, mhdr_res,
12713                                  (const struct rte_flow_action_set_tag *)
12714                                   actions->conf, error))
12715                                 return -rte_errno;
12716                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
12717                         break;
12718                 case RTE_FLOW_ACTION_TYPE_DROP:
12719                         action_flags |= MLX5_FLOW_ACTION_DROP;
12720                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_DROP;
12721                         break;
12722                 case RTE_FLOW_ACTION_TYPE_QUEUE:
12723                         queue = actions->conf;
12724                         rss_desc->queue_num = 1;
12725                         rss_desc->queue[0] = queue->index;
12726                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
12727                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
12728                         sample_act->action_flags |= MLX5_FLOW_ACTION_QUEUE;
12729                         num_of_dest++;
12730                         break;
12731                 case RTE_FLOW_ACTION_TYPE_RSS:
12732                         rss = actions->conf;
12733                         memcpy(rss_desc->queue, rss->queue,
12734                                rss->queue_num * sizeof(uint16_t));
12735                         rss_desc->queue_num = rss->queue_num;
12736                         /* NULL RSS key indicates default RSS key. */
12737                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
12738                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
12739                         /*
12740                          * rss->level and rss.types should be set in advance
12741                          * when expanding items for RSS.
12742                          */
12743                         action_flags |= MLX5_FLOW_ACTION_RSS;
12744                         dev_flow->handle->fate_action = rss_desc->shared_rss ?
12745                                 MLX5_FLOW_FATE_SHARED_RSS :
12746                                 MLX5_FLOW_FATE_QUEUE;
12747                         break;
12748                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
12749                         owner_idx = (uint32_t)(uintptr_t)action->conf;
12750                         age_act = flow_aso_age_get_by_idx(dev, owner_idx);
12751                         if (flow->age == 0) {
12752                                 flow->age = owner_idx;
12753                                 __atomic_fetch_add(&age_act->refcnt, 1,
12754                                                    __ATOMIC_RELAXED);
12755                         }
12756                         age_act_pos = actions_n++;
12757                         action_flags |= MLX5_FLOW_ACTION_AGE;
12758                         break;
12759                 case RTE_FLOW_ACTION_TYPE_AGE:
12760                         non_shared_age = action->conf;
12761                         age_act_pos = actions_n++;
12762                         action_flags |= MLX5_FLOW_ACTION_AGE;
12763                         break;
12764                 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
12765                         owner_idx = (uint32_t)(uintptr_t)action->conf;
12766                         cnt_act = flow_dv_counter_get_by_idx(dev, owner_idx,
12767                                                              NULL);
12768                         MLX5_ASSERT(cnt_act != NULL);
12769                         /**
12770                          * When creating meter drop flow in drop table, the
12771                          * counter should not overwrite the rte flow counter.
12772                          */
12773                         if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
12774                             dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP) {
12775                                 dev_flow->dv.actions[actions_n++] =
12776                                                         cnt_act->action;
12777                         } else {
12778                                 if (flow->counter == 0) {
12779                                         flow->counter = owner_idx;
12780                                         __atomic_fetch_add
12781                                                 (&cnt_act->shared_info.refcnt,
12782                                                  1, __ATOMIC_RELAXED);
12783                                 }
12784                                 /* Save information first, will apply later. */
12785                                 action_flags |= MLX5_FLOW_ACTION_COUNT;
12786                         }
12787                         break;
12788                 case RTE_FLOW_ACTION_TYPE_COUNT:
12789                         if (!priv->sh->devx) {
12790                                 return rte_flow_error_set
12791                                               (error, ENOTSUP,
12792                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12793                                                NULL,
12794                                                "count action not supported");
12795                         }
12796                         /* Save information first, will apply later. */
12797                         count = action->conf;
12798                         action_flags |= MLX5_FLOW_ACTION_COUNT;
12799                         break;
12800                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
12801                         dev_flow->dv.actions[actions_n++] =
12802                                                 priv->sh->pop_vlan_action;
12803                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
12804                         break;
12805                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
12806                         if (!(action_flags &
12807                               MLX5_FLOW_ACTION_OF_SET_VLAN_VID))
12808                                 flow_dev_get_vlan_info_from_items(items, &vlan);
12809                         vlan.eth_proto = rte_be_to_cpu_16
12810                              ((((const struct rte_flow_action_of_push_vlan *)
12811                                                    actions->conf)->ethertype));
12812                         found_action = mlx5_flow_find_action
12813                                         (actions + 1,
12814                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
12815                         if (found_action)
12816                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12817                         found_action = mlx5_flow_find_action
12818                                         (actions + 1,
12819                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
12820                         if (found_action)
12821                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12822                         if (flow_dv_create_action_push_vlan
12823                                             (dev, attr, &vlan, dev_flow, error))
12824                                 return -rte_errno;
12825                         dev_flow->dv.actions[actions_n++] =
12826                                         dev_flow->dv.push_vlan_res->action;
12827                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
12828                         break;
12829                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
12830                         /* of_vlan_push action handled this action */
12831                         MLX5_ASSERT(action_flags &
12832                                     MLX5_FLOW_ACTION_OF_PUSH_VLAN);
12833                         break;
12834                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
12835                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
12836                                 break;
12837                         flow_dev_get_vlan_info_from_items(items, &vlan);
12838                         mlx5_update_vlan_vid_pcp(actions, &vlan);
12839                         /* If no VLAN push - this is a modify header action */
12840                         if (flow_dv_convert_action_modify_vlan_vid
12841                                                 (mhdr_res, actions, error))
12842                                 return -rte_errno;
12843                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
12844                         break;
12845                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
12846                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
12847                         if (flow_dv_create_action_l2_encap(dev, actions,
12848                                                            dev_flow,
12849                                                            attr->transfer,
12850                                                            error))
12851                                 return -rte_errno;
12852                         dev_flow->dv.actions[actions_n++] =
12853                                         dev_flow->dv.encap_decap->action;
12854                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
12855                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12856                                 sample_act->action_flags |=
12857                                                         MLX5_FLOW_ACTION_ENCAP;
12858                         break;
12859                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
12860                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
12861                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
12862                                                            attr->transfer,
12863                                                            error))
12864                                 return -rte_errno;
12865                         dev_flow->dv.actions[actions_n++] =
12866                                         dev_flow->dv.encap_decap->action;
12867                         action_flags |= MLX5_FLOW_ACTION_DECAP;
12868                         break;
12869                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
12870                         /* Handle encap with preceding decap. */
12871                         if (action_flags & MLX5_FLOW_ACTION_DECAP) {
12872                                 if (flow_dv_create_action_raw_encap
12873                                         (dev, actions, dev_flow, attr, error))
12874                                         return -rte_errno;
12875                                 dev_flow->dv.actions[actions_n++] =
12876                                         dev_flow->dv.encap_decap->action;
12877                         } else {
12878                                 /* Handle encap without preceding decap. */
12879                                 if (flow_dv_create_action_l2_encap
12880                                     (dev, actions, dev_flow, attr->transfer,
12881                                      error))
12882                                         return -rte_errno;
12883                                 dev_flow->dv.actions[actions_n++] =
12884                                         dev_flow->dv.encap_decap->action;
12885                         }
12886                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
12887                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12888                                 sample_act->action_flags |=
12889                                                         MLX5_FLOW_ACTION_ENCAP;
12890                         break;
12891                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
12892                         while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
12893                                 ;
12894                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
12895                                 if (flow_dv_create_action_l2_decap
12896                                     (dev, dev_flow, attr->transfer, error))
12897                                         return -rte_errno;
12898                                 dev_flow->dv.actions[actions_n++] =
12899                                         dev_flow->dv.encap_decap->action;
12900                         }
12901                         /* If decap is followed by encap, handle it at encap. */
12902                         action_flags |= MLX5_FLOW_ACTION_DECAP;
12903                         break;
12904                 case MLX5_RTE_FLOW_ACTION_TYPE_JUMP:
12905                         dev_flow->dv.actions[actions_n++] =
12906                                 (void *)(uintptr_t)action->conf;
12907                         action_flags |= MLX5_FLOW_ACTION_JUMP;
12908                         break;
12909                 case RTE_FLOW_ACTION_TYPE_JUMP:
12910                         jump_group = ((const struct rte_flow_action_jump *)
12911                                                         action->conf)->group;
12912                         grp_info.std_tbl_fix = 0;
12913                         if (dev_flow->skip_scale &
12914                                 (1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT))
12915                                 grp_info.skip_scale = 1;
12916                         else
12917                                 grp_info.skip_scale = 0;
12918                         ret = mlx5_flow_group_to_table(dev, tunnel,
12919                                                        jump_group,
12920                                                        &table,
12921                                                        &grp_info, error);
12922                         if (ret)
12923                                 return ret;
12924                         tbl = flow_dv_tbl_resource_get(dev, table, attr->egress,
12925                                                        attr->transfer,
12926                                                        !!dev_flow->external,
12927                                                        tunnel, jump_group, 0,
12928                                                        0, error);
12929                         if (!tbl)
12930                                 return rte_flow_error_set
12931                                                 (error, errno,
12932                                                  RTE_FLOW_ERROR_TYPE_ACTION,
12933                                                  NULL,
12934                                                  "cannot create jump action.");
12935                         if (flow_dv_jump_tbl_resource_register
12936                             (dev, tbl, dev_flow, error)) {
12937                                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
12938                                 return rte_flow_error_set
12939                                                 (error, errno,
12940                                                  RTE_FLOW_ERROR_TYPE_ACTION,
12941                                                  NULL,
12942                                                  "cannot create jump action.");
12943                         }
12944                         dev_flow->dv.actions[actions_n++] =
12945                                         dev_flow->dv.jump->action;
12946                         action_flags |= MLX5_FLOW_ACTION_JUMP;
12947                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_JUMP;
12948                         sample_act->action_flags |= MLX5_FLOW_ACTION_JUMP;
12949                         num_of_dest++;
12950                         break;
12951                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
12952                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
12953                         if (flow_dv_convert_action_modify_mac
12954                                         (mhdr_res, actions, error))
12955                                 return -rte_errno;
12956                         action_flags |= actions->type ==
12957                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
12958                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
12959                                         MLX5_FLOW_ACTION_SET_MAC_DST;
12960                         break;
12961                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
12962                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
12963                         if (flow_dv_convert_action_modify_ipv4
12964                                         (mhdr_res, actions, error))
12965                                 return -rte_errno;
12966                         action_flags |= actions->type ==
12967                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
12968                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
12969                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
12970                         break;
12971                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
12972                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
12973                         if (flow_dv_convert_action_modify_ipv6
12974                                         (mhdr_res, actions, error))
12975                                 return -rte_errno;
12976                         action_flags |= actions->type ==
12977                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
12978                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
12979                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
12980                         break;
12981                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
12982                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
12983                         if (flow_dv_convert_action_modify_tp
12984                                         (mhdr_res, actions, items,
12985                                          &flow_attr, dev_flow, !!(action_flags &
12986                                          MLX5_FLOW_ACTION_DECAP), error))
12987                                 return -rte_errno;
12988                         action_flags |= actions->type ==
12989                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
12990                                         MLX5_FLOW_ACTION_SET_TP_SRC :
12991                                         MLX5_FLOW_ACTION_SET_TP_DST;
12992                         break;
12993                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
12994                         if (flow_dv_convert_action_modify_dec_ttl
12995                                         (mhdr_res, items, &flow_attr, dev_flow,
12996                                          !!(action_flags &
12997                                          MLX5_FLOW_ACTION_DECAP), error))
12998                                 return -rte_errno;
12999                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
13000                         break;
13001                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
13002                         if (flow_dv_convert_action_modify_ttl
13003                                         (mhdr_res, actions, items, &flow_attr,
13004                                          dev_flow, !!(action_flags &
13005                                          MLX5_FLOW_ACTION_DECAP), error))
13006                                 return -rte_errno;
13007                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
13008                         break;
13009                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
13010                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
13011                         if (flow_dv_convert_action_modify_tcp_seq
13012                                         (mhdr_res, actions, error))
13013                                 return -rte_errno;
13014                         action_flags |= actions->type ==
13015                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
13016                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
13017                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
13018                         break;
13019
13020                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
13021                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
13022                         if (flow_dv_convert_action_modify_tcp_ack
13023                                         (mhdr_res, actions, error))
13024                                 return -rte_errno;
13025                         action_flags |= actions->type ==
13026                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
13027                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
13028                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
13029                         break;
13030                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
13031                         if (flow_dv_convert_action_set_reg
13032                                         (mhdr_res, actions, error))
13033                                 return -rte_errno;
13034                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13035                         break;
13036                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
13037                         if (flow_dv_convert_action_copy_mreg
13038                                         (dev, mhdr_res, actions, error))
13039                                 return -rte_errno;
13040                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13041                         break;
13042                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
13043                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
13044                         dev_flow->handle->fate_action =
13045                                         MLX5_FLOW_FATE_DEFAULT_MISS;
13046                         break;
13047                 case RTE_FLOW_ACTION_TYPE_METER:
13048                         if (!wks->fm)
13049                                 return rte_flow_error_set(error, rte_errno,
13050                                         RTE_FLOW_ERROR_TYPE_ACTION,
13051                                         NULL, "Failed to get meter in flow.");
13052                         /* Set the meter action. */
13053                         dev_flow->dv.actions[actions_n++] =
13054                                 wks->fm->meter_action;
13055                         action_flags |= MLX5_FLOW_ACTION_METER;
13056                         break;
13057                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
13058                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
13059                                                               actions, error))
13060                                 return -rte_errno;
13061                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
13062                         break;
13063                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
13064                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
13065                                                               actions, error))
13066                                 return -rte_errno;
13067                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
13068                         break;
13069                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
13070                         sample_act_pos = actions_n;
13071                         sample = (const struct rte_flow_action_sample *)
13072                                  action->conf;
13073                         actions_n++;
13074                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
13075                         /* put encap action into group if work with port id */
13076                         if ((action_flags & MLX5_FLOW_ACTION_ENCAP) &&
13077                             (action_flags & MLX5_FLOW_ACTION_PORT_ID))
13078                                 sample_act->action_flags |=
13079                                                         MLX5_FLOW_ACTION_ENCAP;
13080                         break;
13081                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
13082                         if (flow_dv_convert_action_modify_field
13083                                         (dev, mhdr_res, actions, attr, error))
13084                                 return -rte_errno;
13085                         action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
13086                         break;
13087                 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
13088                         owner_idx = (uint32_t)(uintptr_t)action->conf;
13089                         ct = flow_aso_ct_get_by_idx(dev, owner_idx);
13090                         if (!ct)
13091                                 return rte_flow_error_set(error, EINVAL,
13092                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13093                                                 NULL,
13094                                                 "Failed to get CT object.");
13095                         if (mlx5_aso_ct_available(priv->sh, ct))
13096                                 return rte_flow_error_set(error, rte_errno,
13097                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13098                                                 NULL,
13099                                                 "CT is unavailable.");
13100                         if (ct->is_original)
13101                                 dev_flow->dv.actions[actions_n] =
13102                                                         ct->dr_action_orig;
13103                         else
13104                                 dev_flow->dv.actions[actions_n] =
13105                                                         ct->dr_action_rply;
13106                         if (flow->ct == 0) {
13107                                 flow->indirect_type =
13108                                                 MLX5_INDIRECT_ACTION_TYPE_CT;
13109                                 flow->ct = owner_idx;
13110                                 __atomic_fetch_add(&ct->refcnt, 1,
13111                                                    __ATOMIC_RELAXED);
13112                         }
13113                         actions_n++;
13114                         action_flags |= MLX5_FLOW_ACTION_CT;
13115                         break;
13116                 case RTE_FLOW_ACTION_TYPE_END:
13117                         actions_end = true;
13118                         if (mhdr_res->actions_num) {
13119                                 /* create modify action if needed. */
13120                                 if (flow_dv_modify_hdr_resource_register
13121                                         (dev, mhdr_res, dev_flow, error))
13122                                         return -rte_errno;
13123                                 dev_flow->dv.actions[modify_action_position] =
13124                                         handle->dvh.modify_hdr->action;
13125                         }
13126                         /*
13127                          * Handle AGE and COUNT action by single HW counter
13128                          * when they are not shared.
13129                          */
13130                         if (action_flags & MLX5_FLOW_ACTION_AGE) {
13131                                 if ((non_shared_age && count) ||
13132                                     !(priv->sh->flow_hit_aso_en &&
13133                                       (attr->group || attr->transfer))) {
13134                                         /* Creates age by counters. */
13135                                         cnt_act = flow_dv_prepare_counter
13136                                                                 (dev, dev_flow,
13137                                                                  flow, count,
13138                                                                  non_shared_age,
13139                                                                  error);
13140                                         if (!cnt_act)
13141                                                 return -rte_errno;
13142                                         dev_flow->dv.actions[age_act_pos] =
13143                                                                 cnt_act->action;
13144                                         break;
13145                                 }
13146                                 if (!flow->age && non_shared_age) {
13147                                         flow->age = flow_dv_aso_age_alloc
13148                                                                 (dev, error);
13149                                         if (!flow->age)
13150                                                 return -rte_errno;
13151                                         flow_dv_aso_age_params_init
13152                                                     (dev, flow->age,
13153                                                      non_shared_age->context ?
13154                                                      non_shared_age->context :
13155                                                      (void *)(uintptr_t)
13156                                                      (dev_flow->flow_idx),
13157                                                      non_shared_age->timeout);
13158                                 }
13159                                 age_act = flow_aso_age_get_by_idx(dev,
13160                                                                   flow->age);
13161                                 dev_flow->dv.actions[age_act_pos] =
13162                                                              age_act->dr_action;
13163                         }
13164                         if (action_flags & MLX5_FLOW_ACTION_COUNT) {
13165                                 /*
13166                                  * Create one count action, to be used
13167                                  * by all sub-flows.
13168                                  */
13169                                 cnt_act = flow_dv_prepare_counter(dev, dev_flow,
13170                                                                   flow, count,
13171                                                                   NULL, error);
13172                                 if (!cnt_act)
13173                                         return -rte_errno;
13174                                 dev_flow->dv.actions[actions_n++] =
13175                                                                 cnt_act->action;
13176                         }
13177                 default:
13178                         break;
13179                 }
13180                 if (mhdr_res->actions_num &&
13181                     modify_action_position == UINT32_MAX)
13182                         modify_action_position = actions_n++;
13183         }
13184         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
13185                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
13186                 int item_type = items->type;
13187
13188                 if (!mlx5_flow_os_item_supported(item_type))
13189                         return rte_flow_error_set(error, ENOTSUP,
13190                                                   RTE_FLOW_ERROR_TYPE_ITEM,
13191                                                   NULL, "item not supported");
13192                 switch (item_type) {
13193                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
13194                         flow_dv_translate_item_port_id
13195                                 (dev, match_mask, match_value, items, attr);
13196                         last_item = MLX5_FLOW_ITEM_PORT_ID;
13197                         break;
13198                 case RTE_FLOW_ITEM_TYPE_ETH:
13199                         flow_dv_translate_item_eth(match_mask, match_value,
13200                                                    items, tunnel,
13201                                                    dev_flow->dv.group);
13202                         matcher.priority = action_flags &
13203                                         MLX5_FLOW_ACTION_DEFAULT_MISS &&
13204                                         !dev_flow->external ?
13205                                         MLX5_PRIORITY_MAP_L3 :
13206                                         MLX5_PRIORITY_MAP_L2;
13207                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
13208                                              MLX5_FLOW_LAYER_OUTER_L2;
13209                         break;
13210                 case RTE_FLOW_ITEM_TYPE_VLAN:
13211                         flow_dv_translate_item_vlan(dev_flow,
13212                                                     match_mask, match_value,
13213                                                     items, tunnel,
13214                                                     dev_flow->dv.group);
13215                         matcher.priority = MLX5_PRIORITY_MAP_L2;
13216                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
13217                                               MLX5_FLOW_LAYER_INNER_VLAN) :
13218                                              (MLX5_FLOW_LAYER_OUTER_L2 |
13219                                               MLX5_FLOW_LAYER_OUTER_VLAN);
13220                         break;
13221                 case RTE_FLOW_ITEM_TYPE_IPV4:
13222                         mlx5_flow_tunnel_ip_check(items, next_protocol,
13223                                                   &item_flags, &tunnel);
13224                         flow_dv_translate_item_ipv4(match_mask, match_value,
13225                                                     items, tunnel,
13226                                                     dev_flow->dv.group);
13227                         matcher.priority = MLX5_PRIORITY_MAP_L3;
13228                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
13229                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
13230                         if (items->mask != NULL &&
13231                             ((const struct rte_flow_item_ipv4 *)
13232                              items->mask)->hdr.next_proto_id) {
13233                                 next_protocol =
13234                                         ((const struct rte_flow_item_ipv4 *)
13235                                          (items->spec))->hdr.next_proto_id;
13236                                 next_protocol &=
13237                                         ((const struct rte_flow_item_ipv4 *)
13238                                          (items->mask))->hdr.next_proto_id;
13239                         } else {
13240                                 /* Reset for inner layer. */
13241                                 next_protocol = 0xff;
13242                         }
13243                         break;
13244                 case RTE_FLOW_ITEM_TYPE_IPV6:
13245                         mlx5_flow_tunnel_ip_check(items, next_protocol,
13246                                                   &item_flags, &tunnel);
13247                         flow_dv_translate_item_ipv6(match_mask, match_value,
13248                                                     items, tunnel,
13249                                                     dev_flow->dv.group);
13250                         matcher.priority = MLX5_PRIORITY_MAP_L3;
13251                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
13252                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
13253                         if (items->mask != NULL &&
13254                             ((const struct rte_flow_item_ipv6 *)
13255                              items->mask)->hdr.proto) {
13256                                 next_protocol =
13257                                         ((const struct rte_flow_item_ipv6 *)
13258                                          items->spec)->hdr.proto;
13259                                 next_protocol &=
13260                                         ((const struct rte_flow_item_ipv6 *)
13261                                          items->mask)->hdr.proto;
13262                         } else {
13263                                 /* Reset for inner layer. */
13264                                 next_protocol = 0xff;
13265                         }
13266                         break;
13267                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
13268                         flow_dv_translate_item_ipv6_frag_ext(match_mask,
13269                                                              match_value,
13270                                                              items, tunnel);
13271                         last_item = tunnel ?
13272                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
13273                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
13274                         if (items->mask != NULL &&
13275                             ((const struct rte_flow_item_ipv6_frag_ext *)
13276                              items->mask)->hdr.next_header) {
13277                                 next_protocol =
13278                                 ((const struct rte_flow_item_ipv6_frag_ext *)
13279                                  items->spec)->hdr.next_header;
13280                                 next_protocol &=
13281                                 ((const struct rte_flow_item_ipv6_frag_ext *)
13282                                  items->mask)->hdr.next_header;
13283                         } else {
13284                                 /* Reset for inner layer. */
13285                                 next_protocol = 0xff;
13286                         }
13287                         break;
13288                 case RTE_FLOW_ITEM_TYPE_TCP:
13289                         flow_dv_translate_item_tcp(match_mask, match_value,
13290                                                    items, tunnel);
13291                         matcher.priority = MLX5_PRIORITY_MAP_L4;
13292                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
13293                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
13294                         break;
13295                 case RTE_FLOW_ITEM_TYPE_UDP:
13296                         flow_dv_translate_item_udp(match_mask, match_value,
13297                                                    items, tunnel);
13298                         matcher.priority = MLX5_PRIORITY_MAP_L4;
13299                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
13300                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
13301                         break;
13302                 case RTE_FLOW_ITEM_TYPE_GRE:
13303                         flow_dv_translate_item_gre(match_mask, match_value,
13304                                                    items, tunnel);
13305                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13306                         last_item = MLX5_FLOW_LAYER_GRE;
13307                         break;
13308                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
13309                         flow_dv_translate_item_gre_key(match_mask,
13310                                                        match_value, items);
13311                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
13312                         break;
13313                 case RTE_FLOW_ITEM_TYPE_NVGRE:
13314                         flow_dv_translate_item_nvgre(match_mask, match_value,
13315                                                      items, tunnel);
13316                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13317                         last_item = MLX5_FLOW_LAYER_GRE;
13318                         break;
13319                 case RTE_FLOW_ITEM_TYPE_VXLAN:
13320                         flow_dv_translate_item_vxlan(dev, attr,
13321                                                      match_mask, match_value,
13322                                                      items, tunnel);
13323                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13324                         last_item = MLX5_FLOW_LAYER_VXLAN;
13325                         break;
13326                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
13327                         flow_dv_translate_item_vxlan_gpe(match_mask,
13328                                                          match_value, items,
13329                                                          tunnel);
13330                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13331                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
13332                         break;
13333                 case RTE_FLOW_ITEM_TYPE_GENEVE:
13334                         flow_dv_translate_item_geneve(match_mask, match_value,
13335                                                       items, tunnel);
13336                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13337                         last_item = MLX5_FLOW_LAYER_GENEVE;
13338                         break;
13339                 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
13340                         ret = flow_dv_translate_item_geneve_opt(dev, match_mask,
13341                                                           match_value,
13342                                                           items, error);
13343                         if (ret)
13344                                 return rte_flow_error_set(error, -ret,
13345                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13346                                         "cannot create GENEVE TLV option");
13347                         flow->geneve_tlv_option = 1;
13348                         last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
13349                         break;
13350                 case RTE_FLOW_ITEM_TYPE_MPLS:
13351                         flow_dv_translate_item_mpls(match_mask, match_value,
13352                                                     items, last_item, tunnel);
13353                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13354                         last_item = MLX5_FLOW_LAYER_MPLS;
13355                         break;
13356                 case RTE_FLOW_ITEM_TYPE_MARK:
13357                         flow_dv_translate_item_mark(dev, match_mask,
13358                                                     match_value, items);
13359                         last_item = MLX5_FLOW_ITEM_MARK;
13360                         break;
13361                 case RTE_FLOW_ITEM_TYPE_META:
13362                         flow_dv_translate_item_meta(dev, match_mask,
13363                                                     match_value, attr, items);
13364                         last_item = MLX5_FLOW_ITEM_METADATA;
13365                         break;
13366                 case RTE_FLOW_ITEM_TYPE_ICMP:
13367                         flow_dv_translate_item_icmp(match_mask, match_value,
13368                                                     items, tunnel);
13369                         last_item = MLX5_FLOW_LAYER_ICMP;
13370                         break;
13371                 case RTE_FLOW_ITEM_TYPE_ICMP6:
13372                         flow_dv_translate_item_icmp6(match_mask, match_value,
13373                                                       items, tunnel);
13374                         last_item = MLX5_FLOW_LAYER_ICMP6;
13375                         break;
13376                 case RTE_FLOW_ITEM_TYPE_TAG:
13377                         flow_dv_translate_item_tag(dev, match_mask,
13378                                                    match_value, items);
13379                         last_item = MLX5_FLOW_ITEM_TAG;
13380                         break;
13381                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
13382                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
13383                                                         match_value, items);
13384                         last_item = MLX5_FLOW_ITEM_TAG;
13385                         break;
13386                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
13387                         flow_dv_translate_item_tx_queue(dev, match_mask,
13388                                                         match_value,
13389                                                         items);
13390                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
13391                         break;
13392                 case RTE_FLOW_ITEM_TYPE_GTP:
13393                         flow_dv_translate_item_gtp(match_mask, match_value,
13394                                                    items, tunnel);
13395                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13396                         last_item = MLX5_FLOW_LAYER_GTP;
13397                         break;
13398                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
13399                         ret = flow_dv_translate_item_gtp_psc(match_mask,
13400                                                           match_value,
13401                                                           items);
13402                         if (ret)
13403                                 return rte_flow_error_set(error, -ret,
13404                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13405                                         "cannot create GTP PSC item");
13406                         last_item = MLX5_FLOW_LAYER_GTP_PSC;
13407                         break;
13408                 case RTE_FLOW_ITEM_TYPE_ECPRI:
13409                         if (!mlx5_flex_parser_ecpri_exist(dev)) {
13410                                 /* Create it only the first time to be used. */
13411                                 ret = mlx5_flex_parser_ecpri_alloc(dev);
13412                                 if (ret)
13413                                         return rte_flow_error_set
13414                                                 (error, -ret,
13415                                                 RTE_FLOW_ERROR_TYPE_ITEM,
13416                                                 NULL,
13417                                                 "cannot create eCPRI parser");
13418                         }
13419                         flow_dv_translate_item_ecpri(dev, match_mask,
13420                                                      match_value, items,
13421                                                      last_item);
13422                         /* No other protocol should follow eCPRI layer. */
13423                         last_item = MLX5_FLOW_LAYER_ECPRI;
13424                         break;
13425                 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
13426                         flow_dv_translate_item_integrity(match_mask,
13427                                                          match_value,
13428                                                          head_item, items);
13429                         break;
13430                 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
13431                         flow_dv_translate_item_aso_ct(dev, match_mask,
13432                                                       match_value, items);
13433                         break;
13434                 default:
13435                         break;
13436                 }
13437                 item_flags |= last_item;
13438         }
13439         /*
13440          * When E-Switch mode is enabled, we have two cases where we need to
13441          * set the source port manually.
13442          * The first one, is in case of Nic steering rule, and the second is
13443          * E-Switch rule where no port_id item was found. In both cases
13444          * the source port is set according the current port in use.
13445          */
13446         if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
13447             (priv->representor || priv->master)) {
13448                 if (flow_dv_translate_item_port_id(dev, match_mask,
13449                                                    match_value, NULL, attr))
13450                         return -rte_errno;
13451         }
13452 #ifdef RTE_LIBRTE_MLX5_DEBUG
13453         MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
13454                                               dev_flow->dv.value.buf));
13455 #endif
13456         /*
13457          * Layers may be already initialized from prefix flow if this dev_flow
13458          * is the suffix flow.
13459          */
13460         handle->layers |= item_flags;
13461         if (action_flags & MLX5_FLOW_ACTION_RSS)
13462                 flow_dv_hashfields_set(dev_flow, rss_desc);
13463         /* If has RSS action in the sample action, the Sample/Mirror resource
13464          * should be registered after the hash filed be update.
13465          */
13466         if (action_flags & MLX5_FLOW_ACTION_SAMPLE) {
13467                 ret = flow_dv_translate_action_sample(dev,
13468                                                       sample,
13469                                                       dev_flow, attr,
13470                                                       &num_of_dest,
13471                                                       sample_actions,
13472                                                       &sample_res,
13473                                                       error);
13474                 if (ret < 0)
13475                         return ret;
13476                 ret = flow_dv_create_action_sample(dev,
13477                                                    dev_flow,
13478                                                    num_of_dest,
13479                                                    &sample_res,
13480                                                    &mdest_res,
13481                                                    sample_actions,
13482                                                    action_flags,
13483                                                    error);
13484                 if (ret < 0)
13485                         return rte_flow_error_set
13486                                                 (error, rte_errno,
13487                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13488                                                 NULL,
13489                                                 "cannot create sample action");
13490                 if (num_of_dest > 1) {
13491                         dev_flow->dv.actions[sample_act_pos] =
13492                         dev_flow->dv.dest_array_res->action;
13493                 } else {
13494                         dev_flow->dv.actions[sample_act_pos] =
13495                         dev_flow->dv.sample_res->verbs_action;
13496                 }
13497         }
13498         /*
13499          * For multiple destination (sample action with ratio=1), the encap
13500          * action and port id action will be combined into group action.
13501          * So need remove the original these actions in the flow and only
13502          * use the sample action instead of.
13503          */
13504         if (num_of_dest > 1 &&
13505             (sample_act->dr_port_id_action || sample_act->dr_jump_action)) {
13506                 int i;
13507                 void *temp_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
13508
13509                 for (i = 0; i < actions_n; i++) {
13510                         if ((sample_act->dr_encap_action &&
13511                                 sample_act->dr_encap_action ==
13512                                 dev_flow->dv.actions[i]) ||
13513                                 (sample_act->dr_port_id_action &&
13514                                 sample_act->dr_port_id_action ==
13515                                 dev_flow->dv.actions[i]) ||
13516                                 (sample_act->dr_jump_action &&
13517                                 sample_act->dr_jump_action ==
13518                                 dev_flow->dv.actions[i]))
13519                                 continue;
13520                         temp_actions[tmp_actions_n++] = dev_flow->dv.actions[i];
13521                 }
13522                 memcpy((void *)dev_flow->dv.actions,
13523                                 (void *)temp_actions,
13524                                 tmp_actions_n * sizeof(void *));
13525                 actions_n = tmp_actions_n;
13526         }
13527         dev_flow->dv.actions_n = actions_n;
13528         dev_flow->act_flags = action_flags;
13529         if (wks->skip_matcher_reg)
13530                 return 0;
13531         /* Register matcher. */
13532         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
13533                                     matcher.mask.size);
13534         matcher.priority = mlx5_get_matcher_priority(dev, attr,
13535                                         matcher.priority);
13536         /**
13537          * When creating meter drop flow in drop table, using original
13538          * 5-tuple match, the matcher priority should be lower than
13539          * mtr_id matcher.
13540          */
13541         if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
13542             dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP &&
13543             matcher.priority <= MLX5_REG_BITS)
13544                 matcher.priority += MLX5_REG_BITS;
13545         /* reserved field no needs to be set to 0 here. */
13546         tbl_key.is_fdb = attr->transfer;
13547         tbl_key.is_egress = attr->egress;
13548         tbl_key.level = dev_flow->dv.group;
13549         tbl_key.id = dev_flow->dv.table_id;
13550         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow,
13551                                      tunnel, attr->group, error))
13552                 return -rte_errno;
13553         return 0;
13554 }
13555
13556 /**
13557  * Set hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13558  * and tunnel.
13559  *
13560  * @param[in, out] action
13561  *   Shred RSS action holding hash RX queue objects.
13562  * @param[in] hash_fields
13563  *   Defines combination of packet fields to participate in RX hash.
13564  * @param[in] tunnel
13565  *   Tunnel type
13566  * @param[in] hrxq_idx
13567  *   Hash RX queue index to set.
13568  *
13569  * @return
13570  *   0 on success, otherwise negative errno value.
13571  */
13572 static int
13573 __flow_dv_action_rss_hrxq_set(struct mlx5_shared_action_rss *action,
13574                               const uint64_t hash_fields,
13575                               uint32_t hrxq_idx)
13576 {
13577         uint32_t *hrxqs = action->hrxq;
13578
13579         switch (hash_fields & ~IBV_RX_HASH_INNER) {
13580         case MLX5_RSS_HASH_IPV4:
13581                 /* fall-through. */
13582         case MLX5_RSS_HASH_IPV4_DST_ONLY:
13583                 /* fall-through. */
13584         case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13585                 hrxqs[0] = hrxq_idx;
13586                 return 0;
13587         case MLX5_RSS_HASH_IPV4_TCP:
13588                 /* fall-through. */
13589         case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13590                 /* fall-through. */
13591         case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13592                 hrxqs[1] = hrxq_idx;
13593                 return 0;
13594         case MLX5_RSS_HASH_IPV4_UDP:
13595                 /* fall-through. */
13596         case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13597                 /* fall-through. */
13598         case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13599                 hrxqs[2] = hrxq_idx;
13600                 return 0;
13601         case MLX5_RSS_HASH_IPV6:
13602                 /* fall-through. */
13603         case MLX5_RSS_HASH_IPV6_DST_ONLY:
13604                 /* fall-through. */
13605         case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13606                 hrxqs[3] = hrxq_idx;
13607                 return 0;
13608         case MLX5_RSS_HASH_IPV6_TCP:
13609                 /* fall-through. */
13610         case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13611                 /* fall-through. */
13612         case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13613                 hrxqs[4] = hrxq_idx;
13614                 return 0;
13615         case MLX5_RSS_HASH_IPV6_UDP:
13616                 /* fall-through. */
13617         case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13618                 /* fall-through. */
13619         case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13620                 hrxqs[5] = hrxq_idx;
13621                 return 0;
13622         case MLX5_RSS_HASH_NONE:
13623                 hrxqs[6] = hrxq_idx;
13624                 return 0;
13625         default:
13626                 return -1;
13627         }
13628 }
13629
13630 /**
13631  * Look up for hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13632  * and tunnel.
13633  *
13634  * @param[in] dev
13635  *   Pointer to the Ethernet device structure.
13636  * @param[in] idx
13637  *   Shared RSS action ID holding hash RX queue objects.
13638  * @param[in] hash_fields
13639  *   Defines combination of packet fields to participate in RX hash.
13640  * @param[in] tunnel
13641  *   Tunnel type
13642  *
13643  * @return
13644  *   Valid hash RX queue index, otherwise 0.
13645  */
13646 static uint32_t
13647 __flow_dv_action_rss_hrxq_lookup(struct rte_eth_dev *dev, uint32_t idx,
13648                                  const uint64_t hash_fields)
13649 {
13650         struct mlx5_priv *priv = dev->data->dev_private;
13651         struct mlx5_shared_action_rss *shared_rss =
13652             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
13653         const uint32_t *hrxqs = shared_rss->hrxq;
13654
13655         switch (hash_fields & ~IBV_RX_HASH_INNER) {
13656         case MLX5_RSS_HASH_IPV4:
13657                 /* fall-through. */
13658         case MLX5_RSS_HASH_IPV4_DST_ONLY:
13659                 /* fall-through. */
13660         case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13661                 return hrxqs[0];
13662         case MLX5_RSS_HASH_IPV4_TCP:
13663                 /* fall-through. */
13664         case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13665                 /* fall-through. */
13666         case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13667                 return hrxqs[1];
13668         case MLX5_RSS_HASH_IPV4_UDP:
13669                 /* fall-through. */
13670         case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13671                 /* fall-through. */
13672         case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13673                 return hrxqs[2];
13674         case MLX5_RSS_HASH_IPV6:
13675                 /* fall-through. */
13676         case MLX5_RSS_HASH_IPV6_DST_ONLY:
13677                 /* fall-through. */
13678         case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13679                 return hrxqs[3];
13680         case MLX5_RSS_HASH_IPV6_TCP:
13681                 /* fall-through. */
13682         case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13683                 /* fall-through. */
13684         case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13685                 return hrxqs[4];
13686         case MLX5_RSS_HASH_IPV6_UDP:
13687                 /* fall-through. */
13688         case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13689                 /* fall-through. */
13690         case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13691                 return hrxqs[5];
13692         case MLX5_RSS_HASH_NONE:
13693                 return hrxqs[6];
13694         default:
13695                 return 0;
13696         }
13697
13698 }
13699
13700 /**
13701  * Apply the flow to the NIC, lock free,
13702  * (mutex should be acquired by caller).
13703  *
13704  * @param[in] dev
13705  *   Pointer to the Ethernet device structure.
13706  * @param[in, out] flow
13707  *   Pointer to flow structure.
13708  * @param[out] error
13709  *   Pointer to error structure.
13710  *
13711  * @return
13712  *   0 on success, a negative errno value otherwise and rte_errno is set.
13713  */
13714 static int
13715 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
13716               struct rte_flow_error *error)
13717 {
13718         struct mlx5_flow_dv_workspace *dv;
13719         struct mlx5_flow_handle *dh;
13720         struct mlx5_flow_handle_dv *dv_h;
13721         struct mlx5_flow *dev_flow;
13722         struct mlx5_priv *priv = dev->data->dev_private;
13723         uint32_t handle_idx;
13724         int n;
13725         int err;
13726         int idx;
13727         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
13728         struct mlx5_flow_rss_desc *rss_desc = &wks->rss_desc;
13729         uint8_t misc_mask;
13730
13731         MLX5_ASSERT(wks);
13732         for (idx = wks->flow_idx - 1; idx >= 0; idx--) {
13733                 dev_flow = &wks->flows[idx];
13734                 dv = &dev_flow->dv;
13735                 dh = dev_flow->handle;
13736                 dv_h = &dh->dvh;
13737                 n = dv->actions_n;
13738                 if (dh->fate_action == MLX5_FLOW_FATE_DROP) {
13739                         if (dv->transfer) {
13740                                 MLX5_ASSERT(priv->sh->dr_drop_action);
13741                                 dv->actions[n++] = priv->sh->dr_drop_action;
13742                         } else {
13743 #ifdef HAVE_MLX5DV_DR
13744                                 /* DR supports drop action placeholder. */
13745                                 MLX5_ASSERT(priv->sh->dr_drop_action);
13746                                 dv->actions[n++] = dv->group ?
13747                                         priv->sh->dr_drop_action :
13748                                         priv->root_drop_action;
13749 #else
13750                                 /* For DV we use the explicit drop queue. */
13751                                 MLX5_ASSERT(priv->drop_queue.hrxq);
13752                                 dv->actions[n++] =
13753                                                 priv->drop_queue.hrxq->action;
13754 #endif
13755                         }
13756                 } else if ((dh->fate_action == MLX5_FLOW_FATE_QUEUE &&
13757                            !dv_h->rix_sample && !dv_h->rix_dest_array)) {
13758                         struct mlx5_hrxq *hrxq;
13759                         uint32_t hrxq_idx;
13760
13761                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow, rss_desc,
13762                                                     &hrxq_idx);
13763                         if (!hrxq) {
13764                                 rte_flow_error_set
13765                                         (error, rte_errno,
13766                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13767                                          "cannot get hash queue");
13768                                 goto error;
13769                         }
13770                         dh->rix_hrxq = hrxq_idx;
13771                         dv->actions[n++] = hrxq->action;
13772                 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13773                         struct mlx5_hrxq *hrxq = NULL;
13774                         uint32_t hrxq_idx;
13775
13776                         hrxq_idx = __flow_dv_action_rss_hrxq_lookup(dev,
13777                                                 rss_desc->shared_rss,
13778                                                 dev_flow->hash_fields);
13779                         if (hrxq_idx)
13780                                 hrxq = mlx5_ipool_get
13781                                         (priv->sh->ipool[MLX5_IPOOL_HRXQ],
13782                                          hrxq_idx);
13783                         if (!hrxq) {
13784                                 rte_flow_error_set
13785                                         (error, rte_errno,
13786                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13787                                          "cannot get hash queue");
13788                                 goto error;
13789                         }
13790                         dh->rix_srss = rss_desc->shared_rss;
13791                         dv->actions[n++] = hrxq->action;
13792                 } else if (dh->fate_action == MLX5_FLOW_FATE_DEFAULT_MISS) {
13793                         if (!priv->sh->default_miss_action) {
13794                                 rte_flow_error_set
13795                                         (error, rte_errno,
13796                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13797                                          "default miss action not be created.");
13798                                 goto error;
13799                         }
13800                         dv->actions[n++] = priv->sh->default_miss_action;
13801                 }
13802                 misc_mask = flow_dv_matcher_enable(dv->value.buf);
13803                 __flow_dv_adjust_buf_size(&dv->value.size, misc_mask);
13804                 err = mlx5_flow_os_create_flow(dv_h->matcher->matcher_object,
13805                                                (void *)&dv->value, n,
13806                                                dv->actions, &dh->drv_flow);
13807                 if (err) {
13808                         rte_flow_error_set
13809                                 (error, errno,
13810                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
13811                                 NULL,
13812                                 (!priv->config.allow_duplicate_pattern &&
13813                                 errno == EEXIST) ?
13814                                 "duplicating pattern is not allowed" :
13815                                 "hardware refuses to create flow");
13816                         goto error;
13817                 }
13818                 if (priv->vmwa_context &&
13819                     dh->vf_vlan.tag && !dh->vf_vlan.created) {
13820                         /*
13821                          * The rule contains the VLAN pattern.
13822                          * For VF we are going to create VLAN
13823                          * interface to make hypervisor set correct
13824                          * e-Switch vport context.
13825                          */
13826                         mlx5_vlan_vmwa_acquire(dev, &dh->vf_vlan);
13827                 }
13828         }
13829         return 0;
13830 error:
13831         err = rte_errno; /* Save rte_errno before cleanup. */
13832         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
13833                        handle_idx, dh, next) {
13834                 /* hrxq is union, don't clear it if the flag is not set. */
13835                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE && dh->rix_hrxq) {
13836                         mlx5_hrxq_release(dev, dh->rix_hrxq);
13837                         dh->rix_hrxq = 0;
13838                 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13839                         dh->rix_srss = 0;
13840                 }
13841                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
13842                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
13843         }
13844         rte_errno = err; /* Restore rte_errno. */
13845         return -rte_errno;
13846 }
13847
13848 void
13849 flow_dv_matcher_remove_cb(void *tool_ctx __rte_unused,
13850                           struct mlx5_list_entry *entry)
13851 {
13852         struct mlx5_flow_dv_matcher *resource = container_of(entry,
13853                                                              typeof(*resource),
13854                                                              entry);
13855
13856         claim_zero(mlx5_flow_os_destroy_flow_matcher(resource->matcher_object));
13857         mlx5_free(resource);
13858 }
13859
13860 /**
13861  * Release the flow matcher.
13862  *
13863  * @param dev
13864  *   Pointer to Ethernet device.
13865  * @param port_id
13866  *   Index to port ID action resource.
13867  *
13868  * @return
13869  *   1 while a reference on it exists, 0 when freed.
13870  */
13871 static int
13872 flow_dv_matcher_release(struct rte_eth_dev *dev,
13873                         struct mlx5_flow_handle *handle)
13874 {
13875         struct mlx5_flow_dv_matcher *matcher = handle->dvh.matcher;
13876         struct mlx5_flow_tbl_data_entry *tbl = container_of(matcher->tbl,
13877                                                             typeof(*tbl), tbl);
13878         int ret;
13879
13880         MLX5_ASSERT(matcher->matcher_object);
13881         ret = mlx5_list_unregister(tbl->matchers, &matcher->entry);
13882         flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl->tbl);
13883         return ret;
13884 }
13885
13886 void
13887 flow_dv_encap_decap_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
13888 {
13889         struct mlx5_dev_ctx_shared *sh = tool_ctx;
13890         struct mlx5_flow_dv_encap_decap_resource *res =
13891                                        container_of(entry, typeof(*res), entry);
13892
13893         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
13894         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
13895 }
13896
13897 /**
13898  * Release an encap/decap resource.
13899  *
13900  * @param dev
13901  *   Pointer to Ethernet device.
13902  * @param encap_decap_idx
13903  *   Index of encap decap resource.
13904  *
13905  * @return
13906  *   1 while a reference on it exists, 0 when freed.
13907  */
13908 static int
13909 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
13910                                      uint32_t encap_decap_idx)
13911 {
13912         struct mlx5_priv *priv = dev->data->dev_private;
13913         struct mlx5_flow_dv_encap_decap_resource *resource;
13914
13915         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
13916                                   encap_decap_idx);
13917         if (!resource)
13918                 return 0;
13919         MLX5_ASSERT(resource->action);
13920         return mlx5_hlist_unregister(priv->sh->encaps_decaps, &resource->entry);
13921 }
13922
13923 /**
13924  * Release an jump to table action resource.
13925  *
13926  * @param dev
13927  *   Pointer to Ethernet device.
13928  * @param rix_jump
13929  *   Index to the jump action resource.
13930  *
13931  * @return
13932  *   1 while a reference on it exists, 0 when freed.
13933  */
13934 static int
13935 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
13936                                   uint32_t rix_jump)
13937 {
13938         struct mlx5_priv *priv = dev->data->dev_private;
13939         struct mlx5_flow_tbl_data_entry *tbl_data;
13940
13941         tbl_data = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_JUMP],
13942                                   rix_jump);
13943         if (!tbl_data)
13944                 return 0;
13945         return flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl_data->tbl);
13946 }
13947
13948 void
13949 flow_dv_modify_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
13950 {
13951         struct mlx5_flow_dv_modify_hdr_resource *res =
13952                 container_of(entry, typeof(*res), entry);
13953         struct mlx5_dev_ctx_shared *sh = tool_ctx;
13954
13955         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
13956         mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
13957 }
13958
13959 /**
13960  * Release a modify-header resource.
13961  *
13962  * @param dev
13963  *   Pointer to Ethernet device.
13964  * @param handle
13965  *   Pointer to mlx5_flow_handle.
13966  *
13967  * @return
13968  *   1 while a reference on it exists, 0 when freed.
13969  */
13970 static int
13971 flow_dv_modify_hdr_resource_release(struct rte_eth_dev *dev,
13972                                     struct mlx5_flow_handle *handle)
13973 {
13974         struct mlx5_priv *priv = dev->data->dev_private;
13975         struct mlx5_flow_dv_modify_hdr_resource *entry = handle->dvh.modify_hdr;
13976
13977         MLX5_ASSERT(entry->action);
13978         return mlx5_hlist_unregister(priv->sh->modify_cmds, &entry->entry);
13979 }
13980
13981 void
13982 flow_dv_port_id_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
13983 {
13984         struct mlx5_dev_ctx_shared *sh = tool_ctx;
13985         struct mlx5_flow_dv_port_id_action_resource *resource =
13986                                   container_of(entry, typeof(*resource), entry);
13987
13988         claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
13989         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
13990 }
13991
13992 /**
13993  * Release port ID action resource.
13994  *
13995  * @param dev
13996  *   Pointer to Ethernet device.
13997  * @param handle
13998  *   Pointer to mlx5_flow_handle.
13999  *
14000  * @return
14001  *   1 while a reference on it exists, 0 when freed.
14002  */
14003 static int
14004 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
14005                                         uint32_t port_id)
14006 {
14007         struct mlx5_priv *priv = dev->data->dev_private;
14008         struct mlx5_flow_dv_port_id_action_resource *resource;
14009
14010         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PORT_ID], port_id);
14011         if (!resource)
14012                 return 0;
14013         MLX5_ASSERT(resource->action);
14014         return mlx5_list_unregister(priv->sh->port_id_action_list,
14015                                     &resource->entry);
14016 }
14017
14018 /**
14019  * Release shared RSS action resource.
14020  *
14021  * @param dev
14022  *   Pointer to Ethernet device.
14023  * @param srss
14024  *   Shared RSS action index.
14025  */
14026 static void
14027 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss)
14028 {
14029         struct mlx5_priv *priv = dev->data->dev_private;
14030         struct mlx5_shared_action_rss *shared_rss;
14031
14032         shared_rss = mlx5_ipool_get
14033                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], srss);
14034         __atomic_sub_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14035 }
14036
14037 void
14038 flow_dv_push_vlan_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14039 {
14040         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14041         struct mlx5_flow_dv_push_vlan_action_resource *resource =
14042                         container_of(entry, typeof(*resource), entry);
14043
14044         claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14045         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
14046 }
14047
14048 /**
14049  * Release push vlan action resource.
14050  *
14051  * @param dev
14052  *   Pointer to Ethernet device.
14053  * @param handle
14054  *   Pointer to mlx5_flow_handle.
14055  *
14056  * @return
14057  *   1 while a reference on it exists, 0 when freed.
14058  */
14059 static int
14060 flow_dv_push_vlan_action_resource_release(struct rte_eth_dev *dev,
14061                                           struct mlx5_flow_handle *handle)
14062 {
14063         struct mlx5_priv *priv = dev->data->dev_private;
14064         struct mlx5_flow_dv_push_vlan_action_resource *resource;
14065         uint32_t idx = handle->dvh.rix_push_vlan;
14066
14067         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
14068         if (!resource)
14069                 return 0;
14070         MLX5_ASSERT(resource->action);
14071         return mlx5_list_unregister(priv->sh->push_vlan_action_list,
14072                                     &resource->entry);
14073 }
14074
14075 /**
14076  * Release the fate resource.
14077  *
14078  * @param dev
14079  *   Pointer to Ethernet device.
14080  * @param handle
14081  *   Pointer to mlx5_flow_handle.
14082  */
14083 static void
14084 flow_dv_fate_resource_release(struct rte_eth_dev *dev,
14085                                struct mlx5_flow_handle *handle)
14086 {
14087         if (!handle->rix_fate)
14088                 return;
14089         switch (handle->fate_action) {
14090         case MLX5_FLOW_FATE_QUEUE:
14091                 if (!handle->dvh.rix_sample && !handle->dvh.rix_dest_array)
14092                         mlx5_hrxq_release(dev, handle->rix_hrxq);
14093                 break;
14094         case MLX5_FLOW_FATE_JUMP:
14095                 flow_dv_jump_tbl_resource_release(dev, handle->rix_jump);
14096                 break;
14097         case MLX5_FLOW_FATE_PORT_ID:
14098                 flow_dv_port_id_action_resource_release(dev,
14099                                 handle->rix_port_id_action);
14100                 break;
14101         default:
14102                 DRV_LOG(DEBUG, "Incorrect fate action:%d", handle->fate_action);
14103                 break;
14104         }
14105         handle->rix_fate = 0;
14106 }
14107
14108 void
14109 flow_dv_sample_remove_cb(void *tool_ctx __rte_unused,
14110                          struct mlx5_list_entry *entry)
14111 {
14112         struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
14113                                                               typeof(*resource),
14114                                                               entry);
14115         struct rte_eth_dev *dev = resource->dev;
14116         struct mlx5_priv *priv = dev->data->dev_private;
14117
14118         if (resource->verbs_action)
14119                 claim_zero(mlx5_flow_os_destroy_flow_action
14120                                                       (resource->verbs_action));
14121         if (resource->normal_path_tbl)
14122                 flow_dv_tbl_resource_release(MLX5_SH(dev),
14123                                              resource->normal_path_tbl);
14124         flow_dv_sample_sub_actions_release(dev, &resource->sample_idx);
14125         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
14126         DRV_LOG(DEBUG, "sample resource %p: removed", (void *)resource);
14127 }
14128
14129 /**
14130  * Release an sample resource.
14131  *
14132  * @param dev
14133  *   Pointer to Ethernet device.
14134  * @param handle
14135  *   Pointer to mlx5_flow_handle.
14136  *
14137  * @return
14138  *   1 while a reference on it exists, 0 when freed.
14139  */
14140 static int
14141 flow_dv_sample_resource_release(struct rte_eth_dev *dev,
14142                                      struct mlx5_flow_handle *handle)
14143 {
14144         struct mlx5_priv *priv = dev->data->dev_private;
14145         struct mlx5_flow_dv_sample_resource *resource;
14146
14147         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
14148                                   handle->dvh.rix_sample);
14149         if (!resource)
14150                 return 0;
14151         MLX5_ASSERT(resource->verbs_action);
14152         return mlx5_list_unregister(priv->sh->sample_action_list,
14153                                     &resource->entry);
14154 }
14155
14156 void
14157 flow_dv_dest_array_remove_cb(void *tool_ctx __rte_unused,
14158                              struct mlx5_list_entry *entry)
14159 {
14160         struct mlx5_flow_dv_dest_array_resource *resource =
14161                         container_of(entry, typeof(*resource), entry);
14162         struct rte_eth_dev *dev = resource->dev;
14163         struct mlx5_priv *priv = dev->data->dev_private;
14164         uint32_t i = 0;
14165
14166         MLX5_ASSERT(resource->action);
14167         if (resource->action)
14168                 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14169         for (; i < resource->num_of_dest; i++)
14170                 flow_dv_sample_sub_actions_release(dev,
14171                                                    &resource->sample_idx[i]);
14172         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
14173         DRV_LOG(DEBUG, "destination array resource %p: removed",
14174                 (void *)resource);
14175 }
14176
14177 /**
14178  * Release an destination array resource.
14179  *
14180  * @param dev
14181  *   Pointer to Ethernet device.
14182  * @param handle
14183  *   Pointer to mlx5_flow_handle.
14184  *
14185  * @return
14186  *   1 while a reference on it exists, 0 when freed.
14187  */
14188 static int
14189 flow_dv_dest_array_resource_release(struct rte_eth_dev *dev,
14190                                     struct mlx5_flow_handle *handle)
14191 {
14192         struct mlx5_priv *priv = dev->data->dev_private;
14193         struct mlx5_flow_dv_dest_array_resource *resource;
14194
14195         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
14196                                   handle->dvh.rix_dest_array);
14197         if (!resource)
14198                 return 0;
14199         MLX5_ASSERT(resource->action);
14200         return mlx5_list_unregister(priv->sh->dest_array_list,
14201                                     &resource->entry);
14202 }
14203
14204 static void
14205 flow_dv_geneve_tlv_option_resource_release(struct rte_eth_dev *dev)
14206 {
14207         struct mlx5_priv *priv = dev->data->dev_private;
14208         struct mlx5_dev_ctx_shared *sh = priv->sh;
14209         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
14210                                 sh->geneve_tlv_option_resource;
14211         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
14212         if (geneve_opt_resource) {
14213                 if (!(__atomic_sub_fetch(&geneve_opt_resource->refcnt, 1,
14214                                          __ATOMIC_RELAXED))) {
14215                         claim_zero(mlx5_devx_cmd_destroy
14216                                         (geneve_opt_resource->obj));
14217                         mlx5_free(sh->geneve_tlv_option_resource);
14218                         sh->geneve_tlv_option_resource = NULL;
14219                 }
14220         }
14221         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
14222 }
14223
14224 /**
14225  * Remove the flow from the NIC but keeps it in memory.
14226  * Lock free, (mutex should be acquired by caller).
14227  *
14228  * @param[in] dev
14229  *   Pointer to Ethernet device.
14230  * @param[in, out] flow
14231  *   Pointer to flow structure.
14232  */
14233 static void
14234 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
14235 {
14236         struct mlx5_flow_handle *dh;
14237         uint32_t handle_idx;
14238         struct mlx5_priv *priv = dev->data->dev_private;
14239
14240         if (!flow)
14241                 return;
14242         handle_idx = flow->dev_handles;
14243         while (handle_idx) {
14244                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14245                                     handle_idx);
14246                 if (!dh)
14247                         return;
14248                 if (dh->drv_flow) {
14249                         claim_zero(mlx5_flow_os_destroy_flow(dh->drv_flow));
14250                         dh->drv_flow = NULL;
14251                 }
14252                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE)
14253                         flow_dv_fate_resource_release(dev, dh);
14254                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
14255                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
14256                 handle_idx = dh->next.next;
14257         }
14258 }
14259
14260 /**
14261  * Remove the flow from the NIC and the memory.
14262  * Lock free, (mutex should be acquired by caller).
14263  *
14264  * @param[in] dev
14265  *   Pointer to the Ethernet device structure.
14266  * @param[in, out] flow
14267  *   Pointer to flow structure.
14268  */
14269 static void
14270 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
14271 {
14272         struct mlx5_flow_handle *dev_handle;
14273         struct mlx5_priv *priv = dev->data->dev_private;
14274         struct mlx5_flow_meter_info *fm = NULL;
14275         uint32_t srss = 0;
14276
14277         if (!flow)
14278                 return;
14279         flow_dv_remove(dev, flow);
14280         if (flow->counter) {
14281                 flow_dv_counter_free(dev, flow->counter);
14282                 flow->counter = 0;
14283         }
14284         if (flow->meter) {
14285                 fm = flow_dv_meter_find_by_idx(priv, flow->meter);
14286                 if (fm)
14287                         mlx5_flow_meter_detach(priv, fm);
14288                 flow->meter = 0;
14289         }
14290         /* Keep the current age handling by default. */
14291         if (flow->indirect_type == MLX5_INDIRECT_ACTION_TYPE_CT && flow->ct)
14292                 flow_dv_aso_ct_release(dev, flow->ct, NULL);
14293         else if (flow->age)
14294                 flow_dv_aso_age_release(dev, flow->age);
14295         if (flow->geneve_tlv_option) {
14296                 flow_dv_geneve_tlv_option_resource_release(dev);
14297                 flow->geneve_tlv_option = 0;
14298         }
14299         while (flow->dev_handles) {
14300                 uint32_t tmp_idx = flow->dev_handles;
14301
14302                 dev_handle = mlx5_ipool_get(priv->sh->ipool
14303                                             [MLX5_IPOOL_MLX5_FLOW], tmp_idx);
14304                 if (!dev_handle)
14305                         return;
14306                 flow->dev_handles = dev_handle->next.next;
14307                 if (dev_handle->dvh.matcher)
14308                         flow_dv_matcher_release(dev, dev_handle);
14309                 if (dev_handle->dvh.rix_sample)
14310                         flow_dv_sample_resource_release(dev, dev_handle);
14311                 if (dev_handle->dvh.rix_dest_array)
14312                         flow_dv_dest_array_resource_release(dev, dev_handle);
14313                 if (dev_handle->dvh.rix_encap_decap)
14314                         flow_dv_encap_decap_resource_release(dev,
14315                                 dev_handle->dvh.rix_encap_decap);
14316                 if (dev_handle->dvh.modify_hdr)
14317                         flow_dv_modify_hdr_resource_release(dev, dev_handle);
14318                 if (dev_handle->dvh.rix_push_vlan)
14319                         flow_dv_push_vlan_action_resource_release(dev,
14320                                                                   dev_handle);
14321                 if (dev_handle->dvh.rix_tag)
14322                         flow_dv_tag_release(dev,
14323                                             dev_handle->dvh.rix_tag);
14324                 if (dev_handle->fate_action != MLX5_FLOW_FATE_SHARED_RSS)
14325                         flow_dv_fate_resource_release(dev, dev_handle);
14326                 else if (!srss)
14327                         srss = dev_handle->rix_srss;
14328                 if (fm && dev_handle->is_meter_flow_id &&
14329                     dev_handle->split_flow_id)
14330                         mlx5_ipool_free(fm->flow_ipool,
14331                                         dev_handle->split_flow_id);
14332                 else if (dev_handle->split_flow_id &&
14333                     !dev_handle->is_meter_flow_id)
14334                         mlx5_ipool_free(priv->sh->ipool
14335                                         [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
14336                                         dev_handle->split_flow_id);
14337                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14338                            tmp_idx);
14339         }
14340         if (srss)
14341                 flow_dv_shared_rss_action_release(dev, srss);
14342 }
14343
14344 /**
14345  * Release array of hash RX queue objects.
14346  * Helper function.
14347  *
14348  * @param[in] dev
14349  *   Pointer to the Ethernet device structure.
14350  * @param[in, out] hrxqs
14351  *   Array of hash RX queue objects.
14352  *
14353  * @return
14354  *   Total number of references to hash RX queue objects in *hrxqs* array
14355  *   after this operation.
14356  */
14357 static int
14358 __flow_dv_hrxqs_release(struct rte_eth_dev *dev,
14359                         uint32_t (*hrxqs)[MLX5_RSS_HASH_FIELDS_LEN])
14360 {
14361         size_t i;
14362         int remaining = 0;
14363
14364         for (i = 0; i < RTE_DIM(*hrxqs); i++) {
14365                 int ret = mlx5_hrxq_release(dev, (*hrxqs)[i]);
14366
14367                 if (!ret)
14368                         (*hrxqs)[i] = 0;
14369                 remaining += ret;
14370         }
14371         return remaining;
14372 }
14373
14374 /**
14375  * Release all hash RX queue objects representing shared RSS action.
14376  *
14377  * @param[in] dev
14378  *   Pointer to the Ethernet device structure.
14379  * @param[in, out] action
14380  *   Shared RSS action to remove hash RX queue objects from.
14381  *
14382  * @return
14383  *   Total number of references to hash RX queue objects stored in *action*
14384  *   after this operation.
14385  *   Expected to be 0 if no external references held.
14386  */
14387 static int
14388 __flow_dv_action_rss_hrxqs_release(struct rte_eth_dev *dev,
14389                                  struct mlx5_shared_action_rss *shared_rss)
14390 {
14391         return __flow_dv_hrxqs_release(dev, &shared_rss->hrxq);
14392 }
14393
14394 /**
14395  * Adjust L3/L4 hash value of pre-created shared RSS hrxq according to
14396  * user input.
14397  *
14398  * Only one hash value is available for one L3+L4 combination:
14399  * for example:
14400  * MLX5_RSS_HASH_IPV4, MLX5_RSS_HASH_IPV4_SRC_ONLY, and
14401  * MLX5_RSS_HASH_IPV4_DST_ONLY are mutually exclusive so they can share
14402  * same slot in mlx5_rss_hash_fields.
14403  *
14404  * @param[in] rss
14405  *   Pointer to the shared action RSS conf.
14406  * @param[in, out] hash_field
14407  *   hash_field variable needed to be adjusted.
14408  *
14409  * @return
14410  *   void
14411  */
14412 static void
14413 __flow_dv_action_rss_l34_hash_adjust(struct mlx5_shared_action_rss *rss,
14414                                      uint64_t *hash_field)
14415 {
14416         uint64_t rss_types = rss->origin.types;
14417
14418         switch (*hash_field & ~IBV_RX_HASH_INNER) {
14419         case MLX5_RSS_HASH_IPV4:
14420                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
14421                         *hash_field &= ~MLX5_RSS_HASH_IPV4;
14422                         if (rss_types & ETH_RSS_L3_DST_ONLY)
14423                                 *hash_field |= IBV_RX_HASH_DST_IPV4;
14424                         else if (rss_types & ETH_RSS_L3_SRC_ONLY)
14425                                 *hash_field |= IBV_RX_HASH_SRC_IPV4;
14426                         else
14427                                 *hash_field |= MLX5_RSS_HASH_IPV4;
14428                 }
14429                 return;
14430         case MLX5_RSS_HASH_IPV6:
14431                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
14432                         *hash_field &= ~MLX5_RSS_HASH_IPV6;
14433                         if (rss_types & ETH_RSS_L3_DST_ONLY)
14434                                 *hash_field |= IBV_RX_HASH_DST_IPV6;
14435                         else if (rss_types & ETH_RSS_L3_SRC_ONLY)
14436                                 *hash_field |= IBV_RX_HASH_SRC_IPV6;
14437                         else
14438                                 *hash_field |= MLX5_RSS_HASH_IPV6;
14439                 }
14440                 return;
14441         case MLX5_RSS_HASH_IPV4_UDP:
14442                 /* fall-through. */
14443         case MLX5_RSS_HASH_IPV6_UDP:
14444                 if (rss_types & ETH_RSS_UDP) {
14445                         *hash_field &= ~MLX5_UDP_IBV_RX_HASH;
14446                         if (rss_types & ETH_RSS_L4_DST_ONLY)
14447                                 *hash_field |= IBV_RX_HASH_DST_PORT_UDP;
14448                         else if (rss_types & ETH_RSS_L4_SRC_ONLY)
14449                                 *hash_field |= IBV_RX_HASH_SRC_PORT_UDP;
14450                         else
14451                                 *hash_field |= MLX5_UDP_IBV_RX_HASH;
14452                 }
14453                 return;
14454         case MLX5_RSS_HASH_IPV4_TCP:
14455                 /* fall-through. */
14456         case MLX5_RSS_HASH_IPV6_TCP:
14457                 if (rss_types & ETH_RSS_TCP) {
14458                         *hash_field &= ~MLX5_TCP_IBV_RX_HASH;
14459                         if (rss_types & ETH_RSS_L4_DST_ONLY)
14460                                 *hash_field |= IBV_RX_HASH_DST_PORT_TCP;
14461                         else if (rss_types & ETH_RSS_L4_SRC_ONLY)
14462                                 *hash_field |= IBV_RX_HASH_SRC_PORT_TCP;
14463                         else
14464                                 *hash_field |= MLX5_TCP_IBV_RX_HASH;
14465                 }
14466                 return;
14467         default:
14468                 return;
14469         }
14470 }
14471
14472 /**
14473  * Setup shared RSS action.
14474  * Prepare set of hash RX queue objects sufficient to handle all valid
14475  * hash_fields combinations (see enum ibv_rx_hash_fields).
14476  *
14477  * @param[in] dev
14478  *   Pointer to the Ethernet device structure.
14479  * @param[in] action_idx
14480  *   Shared RSS action ipool index.
14481  * @param[in, out] action
14482  *   Partially initialized shared RSS action.
14483  * @param[out] error
14484  *   Perform verbose error reporting if not NULL. Initialized in case of
14485  *   error only.
14486  *
14487  * @return
14488  *   0 on success, otherwise negative errno value.
14489  */
14490 static int
14491 __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
14492                            uint32_t action_idx,
14493                            struct mlx5_shared_action_rss *shared_rss,
14494                            struct rte_flow_error *error)
14495 {
14496         struct mlx5_flow_rss_desc rss_desc = { 0 };
14497         size_t i;
14498         int err;
14499
14500         if (mlx5_ind_table_obj_setup(dev, shared_rss->ind_tbl)) {
14501                 return rte_flow_error_set(error, rte_errno,
14502                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14503                                           "cannot setup indirection table");
14504         }
14505         memcpy(rss_desc.key, shared_rss->origin.key, MLX5_RSS_HASH_KEY_LEN);
14506         rss_desc.key_len = MLX5_RSS_HASH_KEY_LEN;
14507         rss_desc.const_q = shared_rss->origin.queue;
14508         rss_desc.queue_num = shared_rss->origin.queue_num;
14509         /* Set non-zero value to indicate a shared RSS. */
14510         rss_desc.shared_rss = action_idx;
14511         rss_desc.ind_tbl = shared_rss->ind_tbl;
14512         for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
14513                 uint32_t hrxq_idx;
14514                 uint64_t hash_fields = mlx5_rss_hash_fields[i];
14515                 int tunnel = 0;
14516
14517                 __flow_dv_action_rss_l34_hash_adjust(shared_rss, &hash_fields);
14518                 if (shared_rss->origin.level > 1) {
14519                         hash_fields |= IBV_RX_HASH_INNER;
14520                         tunnel = 1;
14521                 }
14522                 rss_desc.tunnel = tunnel;
14523                 rss_desc.hash_fields = hash_fields;
14524                 hrxq_idx = mlx5_hrxq_get(dev, &rss_desc);
14525                 if (!hrxq_idx) {
14526                         rte_flow_error_set
14527                                 (error, rte_errno,
14528                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14529                                  "cannot get hash queue");
14530                         goto error_hrxq_new;
14531                 }
14532                 err = __flow_dv_action_rss_hrxq_set
14533                         (shared_rss, hash_fields, hrxq_idx);
14534                 MLX5_ASSERT(!err);
14535         }
14536         return 0;
14537 error_hrxq_new:
14538         err = rte_errno;
14539         __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14540         if (!mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true))
14541                 shared_rss->ind_tbl = NULL;
14542         rte_errno = err;
14543         return -rte_errno;
14544 }
14545
14546 /**
14547  * Create shared RSS action.
14548  *
14549  * @param[in] dev
14550  *   Pointer to the Ethernet device structure.
14551  * @param[in] conf
14552  *   Shared action configuration.
14553  * @param[in] rss
14554  *   RSS action specification used to create shared action.
14555  * @param[out] error
14556  *   Perform verbose error reporting if not NULL. Initialized in case of
14557  *   error only.
14558  *
14559  * @return
14560  *   A valid shared action ID in case of success, 0 otherwise and
14561  *   rte_errno is set.
14562  */
14563 static uint32_t
14564 __flow_dv_action_rss_create(struct rte_eth_dev *dev,
14565                             const struct rte_flow_indir_action_conf *conf,
14566                             const struct rte_flow_action_rss *rss,
14567                             struct rte_flow_error *error)
14568 {
14569         struct mlx5_priv *priv = dev->data->dev_private;
14570         struct mlx5_shared_action_rss *shared_rss = NULL;
14571         void *queue = NULL;
14572         struct rte_flow_action_rss *origin;
14573         const uint8_t *rss_key;
14574         uint32_t queue_size = rss->queue_num * sizeof(uint16_t);
14575         uint32_t idx;
14576
14577         RTE_SET_USED(conf);
14578         queue = mlx5_malloc(0, RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14579                             0, SOCKET_ID_ANY);
14580         shared_rss = mlx5_ipool_zmalloc
14581                          (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], &idx);
14582         if (!shared_rss || !queue) {
14583                 rte_flow_error_set(error, ENOMEM,
14584                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14585                                    "cannot allocate resource memory");
14586                 goto error_rss_init;
14587         }
14588         if (idx > (1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET)) {
14589                 rte_flow_error_set(error, E2BIG,
14590                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14591                                    "rss action number out of range");
14592                 goto error_rss_init;
14593         }
14594         shared_rss->ind_tbl = mlx5_malloc(MLX5_MEM_ZERO,
14595                                           sizeof(*shared_rss->ind_tbl),
14596                                           0, SOCKET_ID_ANY);
14597         if (!shared_rss->ind_tbl) {
14598                 rte_flow_error_set(error, ENOMEM,
14599                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14600                                    "cannot allocate resource memory");
14601                 goto error_rss_init;
14602         }
14603         memcpy(queue, rss->queue, queue_size);
14604         shared_rss->ind_tbl->queues = queue;
14605         shared_rss->ind_tbl->queues_n = rss->queue_num;
14606         origin = &shared_rss->origin;
14607         origin->func = rss->func;
14608         origin->level = rss->level;
14609         /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
14610         origin->types = !rss->types ? ETH_RSS_IP : rss->types;
14611         /* NULL RSS key indicates default RSS key. */
14612         rss_key = !rss->key ? rss_hash_default_key : rss->key;
14613         memcpy(shared_rss->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
14614         origin->key = &shared_rss->key[0];
14615         origin->key_len = MLX5_RSS_HASH_KEY_LEN;
14616         origin->queue = queue;
14617         origin->queue_num = rss->queue_num;
14618         if (__flow_dv_action_rss_setup(dev, idx, shared_rss, error))
14619                 goto error_rss_init;
14620         rte_spinlock_init(&shared_rss->action_rss_sl);
14621         __atomic_add_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14622         rte_spinlock_lock(&priv->shared_act_sl);
14623         ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14624                      &priv->rss_shared_actions, idx, shared_rss, next);
14625         rte_spinlock_unlock(&priv->shared_act_sl);
14626         return idx;
14627 error_rss_init:
14628         if (shared_rss) {
14629                 if (shared_rss->ind_tbl)
14630                         mlx5_free(shared_rss->ind_tbl);
14631                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14632                                 idx);
14633         }
14634         if (queue)
14635                 mlx5_free(queue);
14636         return 0;
14637 }
14638
14639 /**
14640  * Destroy the shared RSS action.
14641  * Release related hash RX queue objects.
14642  *
14643  * @param[in] dev
14644  *   Pointer to the Ethernet device structure.
14645  * @param[in] idx
14646  *   The shared RSS action object ID to be removed.
14647  * @param[out] error
14648  *   Perform verbose error reporting if not NULL. Initialized in case of
14649  *   error only.
14650  *
14651  * @return
14652  *   0 on success, otherwise negative errno value.
14653  */
14654 static int
14655 __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
14656                              struct rte_flow_error *error)
14657 {
14658         struct mlx5_priv *priv = dev->data->dev_private;
14659         struct mlx5_shared_action_rss *shared_rss =
14660             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14661         uint32_t old_refcnt = 1;
14662         int remaining;
14663         uint16_t *queue = NULL;
14664
14665         if (!shared_rss)
14666                 return rte_flow_error_set(error, EINVAL,
14667                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14668                                           "invalid shared action");
14669         if (!__atomic_compare_exchange_n(&shared_rss->refcnt, &old_refcnt,
14670                                          0, 0, __ATOMIC_ACQUIRE,
14671                                          __ATOMIC_RELAXED))
14672                 return rte_flow_error_set(error, EBUSY,
14673                                           RTE_FLOW_ERROR_TYPE_ACTION,
14674                                           NULL,
14675                                           "shared rss has references");
14676         remaining = __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14677         if (remaining)
14678                 return rte_flow_error_set(error, EBUSY,
14679                                           RTE_FLOW_ERROR_TYPE_ACTION,
14680                                           NULL,
14681                                           "shared rss hrxq has references");
14682         queue = shared_rss->ind_tbl->queues;
14683         remaining = mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true);
14684         if (remaining)
14685                 return rte_flow_error_set(error, EBUSY,
14686                                           RTE_FLOW_ERROR_TYPE_ACTION,
14687                                           NULL,
14688                                           "shared rss indirection table has"
14689                                           " references");
14690         mlx5_free(queue);
14691         rte_spinlock_lock(&priv->shared_act_sl);
14692         ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14693                      &priv->rss_shared_actions, idx, shared_rss, next);
14694         rte_spinlock_unlock(&priv->shared_act_sl);
14695         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14696                         idx);
14697         return 0;
14698 }
14699
14700 /**
14701  * Create indirect action, lock free,
14702  * (mutex should be acquired by caller).
14703  * Dispatcher for action type specific call.
14704  *
14705  * @param[in] dev
14706  *   Pointer to the Ethernet device structure.
14707  * @param[in] conf
14708  *   Shared action configuration.
14709  * @param[in] action
14710  *   Action specification used to create indirect action.
14711  * @param[out] error
14712  *   Perform verbose error reporting if not NULL. Initialized in case of
14713  *   error only.
14714  *
14715  * @return
14716  *   A valid shared action handle in case of success, NULL otherwise and
14717  *   rte_errno is set.
14718  */
14719 static struct rte_flow_action_handle *
14720 flow_dv_action_create(struct rte_eth_dev *dev,
14721                       const struct rte_flow_indir_action_conf *conf,
14722                       const struct rte_flow_action *action,
14723                       struct rte_flow_error *err)
14724 {
14725         struct mlx5_priv *priv = dev->data->dev_private;
14726         uint32_t age_idx = 0;
14727         uint32_t idx = 0;
14728         uint32_t ret = 0;
14729
14730         switch (action->type) {
14731         case RTE_FLOW_ACTION_TYPE_RSS:
14732                 ret = __flow_dv_action_rss_create(dev, conf, action->conf, err);
14733                 idx = (MLX5_INDIRECT_ACTION_TYPE_RSS <<
14734                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14735                 break;
14736         case RTE_FLOW_ACTION_TYPE_AGE:
14737                 age_idx = flow_dv_aso_age_alloc(dev, err);
14738                 if (!age_idx) {
14739                         ret = -rte_errno;
14740                         break;
14741                 }
14742                 idx = (MLX5_INDIRECT_ACTION_TYPE_AGE <<
14743                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | age_idx;
14744                 flow_dv_aso_age_params_init(dev, age_idx,
14745                                         ((const struct rte_flow_action_age *)
14746                                                 action->conf)->context ?
14747                                         ((const struct rte_flow_action_age *)
14748                                                 action->conf)->context :
14749                                         (void *)(uintptr_t)idx,
14750                                         ((const struct rte_flow_action_age *)
14751                                                 action->conf)->timeout);
14752                 ret = age_idx;
14753                 break;
14754         case RTE_FLOW_ACTION_TYPE_COUNT:
14755                 ret = flow_dv_translate_create_counter(dev, NULL, NULL, NULL);
14756                 idx = (MLX5_INDIRECT_ACTION_TYPE_COUNT <<
14757                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14758                 break;
14759         case RTE_FLOW_ACTION_TYPE_CONNTRACK:
14760                 ret = flow_dv_translate_create_conntrack(dev, action->conf,
14761                                                          err);
14762                 idx = MLX5_INDIRECT_ACT_CT_GEN_IDX(PORT_ID(priv), ret);
14763                 break;
14764         default:
14765                 rte_flow_error_set(err, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
14766                                    NULL, "action type not supported");
14767                 break;
14768         }
14769         return ret ? (struct rte_flow_action_handle *)(uintptr_t)idx : NULL;
14770 }
14771
14772 /**
14773  * Destroy the indirect action.
14774  * Release action related resources on the NIC and the memory.
14775  * Lock free, (mutex should be acquired by caller).
14776  * Dispatcher for action type specific call.
14777  *
14778  * @param[in] dev
14779  *   Pointer to the Ethernet device structure.
14780  * @param[in] handle
14781  *   The indirect action object handle to be removed.
14782  * @param[out] error
14783  *   Perform verbose error reporting if not NULL. Initialized in case of
14784  *   error only.
14785  *
14786  * @return
14787  *   0 on success, otherwise negative errno value.
14788  */
14789 static int
14790 flow_dv_action_destroy(struct rte_eth_dev *dev,
14791                        struct rte_flow_action_handle *handle,
14792                        struct rte_flow_error *error)
14793 {
14794         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
14795         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
14796         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
14797         struct mlx5_flow_counter *cnt;
14798         uint32_t no_flow_refcnt = 1;
14799         int ret;
14800
14801         switch (type) {
14802         case MLX5_INDIRECT_ACTION_TYPE_RSS:
14803                 return __flow_dv_action_rss_release(dev, idx, error);
14804         case MLX5_INDIRECT_ACTION_TYPE_COUNT:
14805                 cnt = flow_dv_counter_get_by_idx(dev, idx, NULL);
14806                 if (!__atomic_compare_exchange_n(&cnt->shared_info.refcnt,
14807                                                  &no_flow_refcnt, 1, false,
14808                                                  __ATOMIC_ACQUIRE,
14809                                                  __ATOMIC_RELAXED))
14810                         return rte_flow_error_set(error, EBUSY,
14811                                                   RTE_FLOW_ERROR_TYPE_ACTION,
14812                                                   NULL,
14813                                                   "Indirect count action has references");
14814                 flow_dv_counter_free(dev, idx);
14815                 return 0;
14816         case MLX5_INDIRECT_ACTION_TYPE_AGE:
14817                 ret = flow_dv_aso_age_release(dev, idx);
14818                 if (ret)
14819                         /*
14820                          * In this case, the last flow has a reference will
14821                          * actually release the age action.
14822                          */
14823                         DRV_LOG(DEBUG, "Indirect age action %" PRIu32 " was"
14824                                 " released with references %d.", idx, ret);
14825                 return 0;
14826         case MLX5_INDIRECT_ACTION_TYPE_CT:
14827                 ret = flow_dv_aso_ct_release(dev, idx, error);
14828                 if (ret < 0)
14829                         return ret;
14830                 if (ret > 0)
14831                         DRV_LOG(DEBUG, "Connection tracking object %u still "
14832                                 "has references %d.", idx, ret);
14833                 return 0;
14834         default:
14835                 return rte_flow_error_set(error, ENOTSUP,
14836                                           RTE_FLOW_ERROR_TYPE_ACTION,
14837                                           NULL,
14838                                           "action type not supported");
14839         }
14840 }
14841
14842 /**
14843  * Updates in place shared RSS action configuration.
14844  *
14845  * @param[in] dev
14846  *   Pointer to the Ethernet device structure.
14847  * @param[in] idx
14848  *   The shared RSS action object ID to be updated.
14849  * @param[in] action_conf
14850  *   RSS action specification used to modify *shared_rss*.
14851  * @param[out] error
14852  *   Perform verbose error reporting if not NULL. Initialized in case of
14853  *   error only.
14854  *
14855  * @return
14856  *   0 on success, otherwise negative errno value.
14857  * @note: currently only support update of RSS queues.
14858  */
14859 static int
14860 __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
14861                             const struct rte_flow_action_rss *action_conf,
14862                             struct rte_flow_error *error)
14863 {
14864         struct mlx5_priv *priv = dev->data->dev_private;
14865         struct mlx5_shared_action_rss *shared_rss =
14866             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14867         int ret = 0;
14868         void *queue = NULL;
14869         uint16_t *queue_old = NULL;
14870         uint32_t queue_size = action_conf->queue_num * sizeof(uint16_t);
14871
14872         if (!shared_rss)
14873                 return rte_flow_error_set(error, EINVAL,
14874                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14875                                           "invalid shared action to update");
14876         if (priv->obj_ops.ind_table_modify == NULL)
14877                 return rte_flow_error_set(error, ENOTSUP,
14878                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14879                                           "cannot modify indirection table");
14880         queue = mlx5_malloc(MLX5_MEM_ZERO,
14881                             RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14882                             0, SOCKET_ID_ANY);
14883         if (!queue)
14884                 return rte_flow_error_set(error, ENOMEM,
14885                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14886                                           NULL,
14887                                           "cannot allocate resource memory");
14888         memcpy(queue, action_conf->queue, queue_size);
14889         MLX5_ASSERT(shared_rss->ind_tbl);
14890         rte_spinlock_lock(&shared_rss->action_rss_sl);
14891         queue_old = shared_rss->ind_tbl->queues;
14892         ret = mlx5_ind_table_obj_modify(dev, shared_rss->ind_tbl,
14893                                         queue, action_conf->queue_num, true);
14894         if (ret) {
14895                 mlx5_free(queue);
14896                 ret = rte_flow_error_set(error, rte_errno,
14897                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14898                                           "cannot update indirection table");
14899         } else {
14900                 mlx5_free(queue_old);
14901                 shared_rss->origin.queue = queue;
14902                 shared_rss->origin.queue_num = action_conf->queue_num;
14903         }
14904         rte_spinlock_unlock(&shared_rss->action_rss_sl);
14905         return ret;
14906 }
14907
14908 /*
14909  * Updates in place conntrack context or direction.
14910  * Context update should be synchronized.
14911  *
14912  * @param[in] dev
14913  *   Pointer to the Ethernet device structure.
14914  * @param[in] idx
14915  *   The conntrack object ID to be updated.
14916  * @param[in] update
14917  *   Pointer to the structure of information to update.
14918  * @param[out] error
14919  *   Perform verbose error reporting if not NULL. Initialized in case of
14920  *   error only.
14921  *
14922  * @return
14923  *   0 on success, otherwise negative errno value.
14924  */
14925 static int
14926 __flow_dv_action_ct_update(struct rte_eth_dev *dev, uint32_t idx,
14927                            const struct rte_flow_modify_conntrack *update,
14928                            struct rte_flow_error *error)
14929 {
14930         struct mlx5_priv *priv = dev->data->dev_private;
14931         struct mlx5_aso_ct_action *ct;
14932         const struct rte_flow_action_conntrack *new_prf;
14933         int ret = 0;
14934         uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
14935         uint32_t dev_idx;
14936
14937         if (PORT_ID(priv) != owner)
14938                 return rte_flow_error_set(error, EACCES,
14939                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14940                                           NULL,
14941                                           "CT object owned by another port");
14942         dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
14943         ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
14944         if (!ct->refcnt)
14945                 return rte_flow_error_set(error, ENOMEM,
14946                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14947                                           NULL,
14948                                           "CT object is inactive");
14949         new_prf = &update->new_ct;
14950         if (update->direction)
14951                 ct->is_original = !!new_prf->is_original_dir;
14952         if (update->state) {
14953                 /* Only validate the profile when it needs to be updated. */
14954                 ret = mlx5_validate_action_ct(dev, new_prf, error);
14955                 if (ret)
14956                         return ret;
14957                 ret = mlx5_aso_ct_update_by_wqe(priv->sh, ct, new_prf);
14958                 if (ret)
14959                         return rte_flow_error_set(error, EIO,
14960                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14961                                         NULL,
14962                                         "Failed to send CT context update WQE");
14963                 /* Block until ready or a failure. */
14964                 ret = mlx5_aso_ct_available(priv->sh, ct);
14965                 if (ret)
14966                         rte_flow_error_set(error, rte_errno,
14967                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14968                                            NULL,
14969                                            "Timeout to get the CT update");
14970         }
14971         return ret;
14972 }
14973
14974 /**
14975  * Updates in place shared action configuration, lock free,
14976  * (mutex should be acquired by caller).
14977  *
14978  * @param[in] dev
14979  *   Pointer to the Ethernet device structure.
14980  * @param[in] handle
14981  *   The indirect action object handle to be updated.
14982  * @param[in] update
14983  *   Action specification used to modify the action pointed by *handle*.
14984  *   *update* could be of same type with the action pointed by the *handle*
14985  *   handle argument, or some other structures like a wrapper, depending on
14986  *   the indirect action type.
14987  * @param[out] error
14988  *   Perform verbose error reporting if not NULL. Initialized in case of
14989  *   error only.
14990  *
14991  * @return
14992  *   0 on success, otherwise negative errno value.
14993  */
14994 static int
14995 flow_dv_action_update(struct rte_eth_dev *dev,
14996                         struct rte_flow_action_handle *handle,
14997                         const void *update,
14998                         struct rte_flow_error *err)
14999 {
15000         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15001         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15002         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15003         const void *action_conf;
15004
15005         switch (type) {
15006         case MLX5_INDIRECT_ACTION_TYPE_RSS:
15007                 action_conf = ((const struct rte_flow_action *)update)->conf;
15008                 return __flow_dv_action_rss_update(dev, idx, action_conf, err);
15009         case MLX5_INDIRECT_ACTION_TYPE_CT:
15010                 return __flow_dv_action_ct_update(dev, idx, update, err);
15011         default:
15012                 return rte_flow_error_set(err, ENOTSUP,
15013                                           RTE_FLOW_ERROR_TYPE_ACTION,
15014                                           NULL,
15015                                           "action type update not supported");
15016         }
15017 }
15018
15019 /**
15020  * Destroy the meter sub policy table rules.
15021  * Lock free, (mutex should be acquired by caller).
15022  *
15023  * @param[in] dev
15024  *   Pointer to Ethernet device.
15025  * @param[in] sub_policy
15026  *   Pointer to meter sub policy table.
15027  */
15028 static void
15029 __flow_dv_destroy_sub_policy_rules(struct rte_eth_dev *dev,
15030                              struct mlx5_flow_meter_sub_policy *sub_policy)
15031 {
15032         struct mlx5_priv *priv = dev->data->dev_private;
15033         struct mlx5_flow_tbl_data_entry *tbl;
15034         struct mlx5_flow_meter_policy *policy = sub_policy->main_policy;
15035         struct mlx5_flow_meter_info *next_fm;
15036         struct mlx5_sub_policy_color_rule *color_rule;
15037         void *tmp;
15038         uint32_t i;
15039
15040         for (i = 0; i < RTE_COLORS; i++) {
15041                 next_fm = NULL;
15042                 if (i == RTE_COLOR_GREEN && policy &&
15043                     policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR)
15044                         next_fm = mlx5_flow_meter_find(priv,
15045                                         policy->act_cnt[i].next_mtr_id, NULL);
15046                 RTE_TAILQ_FOREACH_SAFE(color_rule, &sub_policy->color_rules[i],
15047                                    next_port, tmp) {
15048                         claim_zero(mlx5_flow_os_destroy_flow(color_rule->rule));
15049                         tbl = container_of(color_rule->matcher->tbl,
15050                                            typeof(*tbl), tbl);
15051                         mlx5_list_unregister(tbl->matchers,
15052                                              &color_rule->matcher->entry);
15053                         TAILQ_REMOVE(&sub_policy->color_rules[i],
15054                                      color_rule, next_port);
15055                         mlx5_free(color_rule);
15056                         if (next_fm)
15057                                 mlx5_flow_meter_detach(priv, next_fm);
15058                 }
15059         }
15060         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15061                 if (sub_policy->rix_hrxq[i]) {
15062                         if (policy && !policy->is_hierarchy)
15063                                 mlx5_hrxq_release(dev, sub_policy->rix_hrxq[i]);
15064                         sub_policy->rix_hrxq[i] = 0;
15065                 }
15066                 if (sub_policy->jump_tbl[i]) {
15067                         flow_dv_tbl_resource_release(MLX5_SH(dev),
15068                                                      sub_policy->jump_tbl[i]);
15069                         sub_policy->jump_tbl[i] = NULL;
15070                 }
15071         }
15072         if (sub_policy->tbl_rsc) {
15073                 flow_dv_tbl_resource_release(MLX5_SH(dev),
15074                                              sub_policy->tbl_rsc);
15075                 sub_policy->tbl_rsc = NULL;
15076         }
15077 }
15078
15079 /**
15080  * Destroy policy rules, lock free,
15081  * (mutex should be acquired by caller).
15082  * Dispatcher for action type specific call.
15083  *
15084  * @param[in] dev
15085  *   Pointer to the Ethernet device structure.
15086  * @param[in] mtr_policy
15087  *   Meter policy struct.
15088  */
15089 static void
15090 flow_dv_destroy_policy_rules(struct rte_eth_dev *dev,
15091                              struct mlx5_flow_meter_policy *mtr_policy)
15092 {
15093         uint32_t i, j;
15094         struct mlx5_flow_meter_sub_policy *sub_policy;
15095         uint16_t sub_policy_num;
15096
15097         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15098                 sub_policy_num = (mtr_policy->sub_policy_num >>
15099                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15100                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15101                 for (j = 0; j < sub_policy_num; j++) {
15102                         sub_policy = mtr_policy->sub_policys[i][j];
15103                         if (sub_policy)
15104                                 __flow_dv_destroy_sub_policy_rules(dev,
15105                                                                    sub_policy);
15106                 }
15107         }
15108 }
15109
15110 /**
15111  * Destroy policy action, lock free,
15112  * (mutex should be acquired by caller).
15113  * Dispatcher for action type specific call.
15114  *
15115  * @param[in] dev
15116  *   Pointer to the Ethernet device structure.
15117  * @param[in] mtr_policy
15118  *   Meter policy struct.
15119  */
15120 static void
15121 flow_dv_destroy_mtr_policy_acts(struct rte_eth_dev *dev,
15122                       struct mlx5_flow_meter_policy *mtr_policy)
15123 {
15124         struct rte_flow_action *rss_action;
15125         struct mlx5_flow_handle dev_handle;
15126         uint32_t i, j;
15127
15128         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15129                 if (mtr_policy->act_cnt[i].rix_mark) {
15130                         flow_dv_tag_release(dev,
15131                                 mtr_policy->act_cnt[i].rix_mark);
15132                         mtr_policy->act_cnt[i].rix_mark = 0;
15133                 }
15134                 if (mtr_policy->act_cnt[i].modify_hdr) {
15135                         dev_handle.dvh.modify_hdr =
15136                                 mtr_policy->act_cnt[i].modify_hdr;
15137                         flow_dv_modify_hdr_resource_release(dev, &dev_handle);
15138                 }
15139                 switch (mtr_policy->act_cnt[i].fate_action) {
15140                 case MLX5_FLOW_FATE_SHARED_RSS:
15141                         rss_action = mtr_policy->act_cnt[i].rss;
15142                         mlx5_free(rss_action);
15143                         break;
15144                 case MLX5_FLOW_FATE_PORT_ID:
15145                         if (mtr_policy->act_cnt[i].rix_port_id_action) {
15146                                 flow_dv_port_id_action_resource_release(dev,
15147                                 mtr_policy->act_cnt[i].rix_port_id_action);
15148                                 mtr_policy->act_cnt[i].rix_port_id_action = 0;
15149                         }
15150                         break;
15151                 case MLX5_FLOW_FATE_DROP:
15152                 case MLX5_FLOW_FATE_JUMP:
15153                         for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15154                                 mtr_policy->act_cnt[i].dr_jump_action[j] =
15155                                                 NULL;
15156                         break;
15157                 default:
15158                         /*Queue action do nothing*/
15159                         break;
15160                 }
15161         }
15162         for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15163                 mtr_policy->dr_drop_action[j] = NULL;
15164 }
15165
15166 /**
15167  * Create policy action per domain, lock free,
15168  * (mutex should be acquired by caller).
15169  * Dispatcher for action type specific call.
15170  *
15171  * @param[in] dev
15172  *   Pointer to the Ethernet device structure.
15173  * @param[in] mtr_policy
15174  *   Meter policy struct.
15175  * @param[in] action
15176  *   Action specification used to create meter actions.
15177  * @param[out] error
15178  *   Perform verbose error reporting if not NULL. Initialized in case of
15179  *   error only.
15180  *
15181  * @return
15182  *   0 on success, otherwise negative errno value.
15183  */
15184 static int
15185 __flow_dv_create_domain_policy_acts(struct rte_eth_dev *dev,
15186                         struct mlx5_flow_meter_policy *mtr_policy,
15187                         const struct rte_flow_action *actions[RTE_COLORS],
15188                         enum mlx5_meter_domain domain,
15189                         struct rte_mtr_error *error)
15190 {
15191         struct mlx5_priv *priv = dev->data->dev_private;
15192         struct rte_flow_error flow_err;
15193         const struct rte_flow_action *act;
15194         uint64_t action_flags;
15195         struct mlx5_flow_handle dh;
15196         struct mlx5_flow dev_flow;
15197         struct mlx5_flow_dv_port_id_action_resource port_id_action;
15198         int i, ret;
15199         uint8_t egress, transfer;
15200         struct mlx5_meter_policy_action_container *act_cnt = NULL;
15201         union {
15202                 struct mlx5_flow_dv_modify_hdr_resource res;
15203                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
15204                             sizeof(struct mlx5_modification_cmd) *
15205                             (MLX5_MAX_MODIFY_NUM + 1)];
15206         } mhdr_dummy;
15207         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
15208
15209         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15210         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15211         memset(&dh, 0, sizeof(struct mlx5_flow_handle));
15212         memset(&dev_flow, 0, sizeof(struct mlx5_flow));
15213         memset(&port_id_action, 0,
15214                sizeof(struct mlx5_flow_dv_port_id_action_resource));
15215         memset(mhdr_res, 0, sizeof(*mhdr_res));
15216         mhdr_res->ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
15217                                        (egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
15218                                         MLX5DV_FLOW_TABLE_TYPE_NIC_RX);
15219         dev_flow.handle = &dh;
15220         dev_flow.dv.port_id_action = &port_id_action;
15221         dev_flow.external = true;
15222         for (i = 0; i < RTE_COLORS; i++) {
15223                 if (i < MLX5_MTR_RTE_COLORS)
15224                         act_cnt = &mtr_policy->act_cnt[i];
15225                 /* Skip the color policy actions creation. */
15226                 if ((i == RTE_COLOR_YELLOW && mtr_policy->skip_y) ||
15227                     (i == RTE_COLOR_GREEN && mtr_policy->skip_g))
15228                         continue;
15229                 action_flags = 0;
15230                 for (act = actions[i];
15231                      act && act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
15232                         switch (act->type) {
15233                         case RTE_FLOW_ACTION_TYPE_MARK:
15234                         {
15235                                 uint32_t tag_be = mlx5_flow_mark_set
15236                                         (((const struct rte_flow_action_mark *)
15237                                         (act->conf))->id);
15238
15239                                 if (i >= MLX5_MTR_RTE_COLORS)
15240                                         return -rte_mtr_error_set(error,
15241                                           ENOTSUP,
15242                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15243                                           NULL,
15244                                           "cannot create policy "
15245                                           "mark action for this color");
15246                                 dev_flow.handle->mark = 1;
15247                                 if (flow_dv_tag_resource_register(dev, tag_be,
15248                                                   &dev_flow, &flow_err))
15249                                         return -rte_mtr_error_set(error,
15250                                         ENOTSUP,
15251                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15252                                         NULL,
15253                                         "cannot setup policy mark action");
15254                                 MLX5_ASSERT(dev_flow.dv.tag_resource);
15255                                 act_cnt->rix_mark =
15256                                         dev_flow.handle->dvh.rix_tag;
15257                                 action_flags |= MLX5_FLOW_ACTION_MARK;
15258                                 break;
15259                         }
15260                         case RTE_FLOW_ACTION_TYPE_SET_TAG:
15261                                 if (i >= MLX5_MTR_RTE_COLORS)
15262                                         return -rte_mtr_error_set(error,
15263                                           ENOTSUP,
15264                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15265                                           NULL,
15266                                           "cannot create policy "
15267                                           "set tag action for this color");
15268                                 if (flow_dv_convert_action_set_tag
15269                                 (dev, mhdr_res,
15270                                 (const struct rte_flow_action_set_tag *)
15271                                 act->conf,  &flow_err))
15272                                         return -rte_mtr_error_set(error,
15273                                         ENOTSUP,
15274                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15275                                         NULL, "cannot convert policy "
15276                                         "set tag action");
15277                                 if (!mhdr_res->actions_num)
15278                                         return -rte_mtr_error_set(error,
15279                                         ENOTSUP,
15280                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15281                                         NULL, "cannot find policy "
15282                                         "set tag action");
15283                                 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
15284                                 break;
15285                         case RTE_FLOW_ACTION_TYPE_DROP:
15286                         {
15287                                 struct mlx5_flow_mtr_mng *mtrmng =
15288                                                 priv->sh->mtrmng;
15289                                 struct mlx5_flow_tbl_data_entry *tbl_data;
15290
15291                                 /*
15292                                  * Create the drop table with
15293                                  * METER DROP level.
15294                                  */
15295                                 if (!mtrmng->drop_tbl[domain]) {
15296                                         mtrmng->drop_tbl[domain] =
15297                                         flow_dv_tbl_resource_get(dev,
15298                                         MLX5_FLOW_TABLE_LEVEL_METER,
15299                                         egress, transfer, false, NULL, 0,
15300                                         0, MLX5_MTR_TABLE_ID_DROP, &flow_err);
15301                                         if (!mtrmng->drop_tbl[domain])
15302                                                 return -rte_mtr_error_set
15303                                         (error, ENOTSUP,
15304                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15305                                         NULL,
15306                                         "Failed to create meter drop table");
15307                                 }
15308                                 tbl_data = container_of
15309                                 (mtrmng->drop_tbl[domain],
15310                                 struct mlx5_flow_tbl_data_entry, tbl);
15311                                 if (i < MLX5_MTR_RTE_COLORS) {
15312                                         act_cnt->dr_jump_action[domain] =
15313                                                 tbl_data->jump.action;
15314                                         act_cnt->fate_action =
15315                                                 MLX5_FLOW_FATE_DROP;
15316                                 }
15317                                 if (i == RTE_COLOR_RED)
15318                                         mtr_policy->dr_drop_action[domain] =
15319                                                 tbl_data->jump.action;
15320                                 action_flags |= MLX5_FLOW_ACTION_DROP;
15321                                 break;
15322                         }
15323                         case RTE_FLOW_ACTION_TYPE_QUEUE:
15324                         {
15325                                 if (i >= MLX5_MTR_RTE_COLORS)
15326                                         return -rte_mtr_error_set(error,
15327                                         ENOTSUP,
15328                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15329                                         NULL, "cannot create policy "
15330                                         "fate queue for this color");
15331                                 act_cnt->queue =
15332                                 ((const struct rte_flow_action_queue *)
15333                                         (act->conf))->index;
15334                                 act_cnt->fate_action =
15335                                         MLX5_FLOW_FATE_QUEUE;
15336                                 dev_flow.handle->fate_action =
15337                                         MLX5_FLOW_FATE_QUEUE;
15338                                 mtr_policy->is_queue = 1;
15339                                 action_flags |= MLX5_FLOW_ACTION_QUEUE;
15340                                 break;
15341                         }
15342                         case RTE_FLOW_ACTION_TYPE_RSS:
15343                         {
15344                                 int rss_size;
15345
15346                                 if (i >= MLX5_MTR_RTE_COLORS)
15347                                         return -rte_mtr_error_set(error,
15348                                           ENOTSUP,
15349                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15350                                           NULL,
15351                                           "cannot create policy "
15352                                           "rss action for this color");
15353                                 /*
15354                                  * Save RSS conf into policy struct
15355                                  * for translate stage.
15356                                  */
15357                                 rss_size = (int)rte_flow_conv
15358                                         (RTE_FLOW_CONV_OP_ACTION,
15359                                         NULL, 0, act, &flow_err);
15360                                 if (rss_size <= 0)
15361                                         return -rte_mtr_error_set(error,
15362                                           ENOTSUP,
15363                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15364                                           NULL, "Get the wrong "
15365                                           "rss action struct size");
15366                                 act_cnt->rss = mlx5_malloc(MLX5_MEM_ZERO,
15367                                                 rss_size, 0, SOCKET_ID_ANY);
15368                                 if (!act_cnt->rss)
15369                                         return -rte_mtr_error_set(error,
15370                                           ENOTSUP,
15371                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15372                                           NULL,
15373                                           "Fail to malloc rss action memory");
15374                                 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ACTION,
15375                                         act_cnt->rss, rss_size,
15376                                         act, &flow_err);
15377                                 if (ret < 0)
15378                                         return -rte_mtr_error_set(error,
15379                                           ENOTSUP,
15380                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15381                                           NULL, "Fail to save "
15382                                           "rss action into policy struct");
15383                                 act_cnt->fate_action =
15384                                         MLX5_FLOW_FATE_SHARED_RSS;
15385                                 action_flags |= MLX5_FLOW_ACTION_RSS;
15386                                 break;
15387                         }
15388                         case RTE_FLOW_ACTION_TYPE_PORT_ID:
15389                         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
15390                         {
15391                                 struct mlx5_flow_dv_port_id_action_resource
15392                                         port_id_resource;
15393                                 uint32_t port_id = 0;
15394
15395                                 if (i >= MLX5_MTR_RTE_COLORS)
15396                                         return -rte_mtr_error_set(error,
15397                                         ENOTSUP,
15398                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15399                                         NULL, "cannot create policy "
15400                                         "port action for this color");
15401                                 memset(&port_id_resource, 0,
15402                                         sizeof(port_id_resource));
15403                                 if (flow_dv_translate_action_port_id(dev, act,
15404                                                 &port_id, &flow_err))
15405                                         return -rte_mtr_error_set(error,
15406                                         ENOTSUP,
15407                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15408                                         NULL, "cannot translate "
15409                                         "policy port action");
15410                                 port_id_resource.port_id = port_id;
15411                                 if (flow_dv_port_id_action_resource_register
15412                                         (dev, &port_id_resource,
15413                                         &dev_flow, &flow_err))
15414                                         return -rte_mtr_error_set(error,
15415                                         ENOTSUP,
15416                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15417                                         NULL, "cannot setup "
15418                                         "policy port action");
15419                                 act_cnt->rix_port_id_action =
15420                                         dev_flow.handle->rix_port_id_action;
15421                                 act_cnt->fate_action =
15422                                         MLX5_FLOW_FATE_PORT_ID;
15423                                 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
15424                                 break;
15425                         }
15426                         case RTE_FLOW_ACTION_TYPE_JUMP:
15427                         {
15428                                 uint32_t jump_group = 0;
15429                                 uint32_t table = 0;
15430                                 struct mlx5_flow_tbl_data_entry *tbl_data;
15431                                 struct flow_grp_info grp_info = {
15432                                         .external = !!dev_flow.external,
15433                                         .transfer = !!transfer,
15434                                         .fdb_def_rule = !!priv->fdb_def_rule,
15435                                         .std_tbl_fix = 0,
15436                                         .skip_scale = dev_flow.skip_scale &
15437                                         (1 << MLX5_SCALE_FLOW_GROUP_BIT),
15438                                 };
15439                                 struct mlx5_flow_meter_sub_policy *sub_policy =
15440                                         mtr_policy->sub_policys[domain][0];
15441
15442                                 if (i >= MLX5_MTR_RTE_COLORS)
15443                                         return -rte_mtr_error_set(error,
15444                                           ENOTSUP,
15445                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15446                                           NULL,
15447                                           "cannot create policy "
15448                                           "jump action for this color");
15449                                 jump_group =
15450                                 ((const struct rte_flow_action_jump *)
15451                                                         act->conf)->group;
15452                                 if (mlx5_flow_group_to_table(dev, NULL,
15453                                                        jump_group,
15454                                                        &table,
15455                                                        &grp_info, &flow_err))
15456                                         return -rte_mtr_error_set(error,
15457                                         ENOTSUP,
15458                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15459                                         NULL, "cannot setup "
15460                                         "policy jump action");
15461                                 sub_policy->jump_tbl[i] =
15462                                 flow_dv_tbl_resource_get(dev,
15463                                         table, egress,
15464                                         transfer,
15465                                         !!dev_flow.external,
15466                                         NULL, jump_group, 0,
15467                                         0, &flow_err);
15468                                 if
15469                                 (!sub_policy->jump_tbl[i])
15470                                         return  -rte_mtr_error_set(error,
15471                                         ENOTSUP,
15472                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15473                                         NULL, "cannot create jump action.");
15474                                 tbl_data = container_of
15475                                 (sub_policy->jump_tbl[i],
15476                                 struct mlx5_flow_tbl_data_entry, tbl);
15477                                 act_cnt->dr_jump_action[domain] =
15478                                         tbl_data->jump.action;
15479                                 act_cnt->fate_action =
15480                                         MLX5_FLOW_FATE_JUMP;
15481                                 action_flags |= MLX5_FLOW_ACTION_JUMP;
15482                                 break;
15483                         }
15484                         /*
15485                          * No need to check meter hierarchy for Y or R colors
15486                          * here since it is done in the validation stage.
15487                          */
15488                         case RTE_FLOW_ACTION_TYPE_METER:
15489                         {
15490                                 const struct rte_flow_action_meter *mtr;
15491                                 struct mlx5_flow_meter_info *next_fm;
15492                                 struct mlx5_flow_meter_policy *next_policy;
15493                                 struct rte_flow_action tag_action;
15494                                 struct mlx5_rte_flow_action_set_tag set_tag;
15495                                 uint32_t next_mtr_idx = 0;
15496
15497                                 mtr = act->conf;
15498                                 next_fm = mlx5_flow_meter_find(priv,
15499                                                         mtr->mtr_id,
15500                                                         &next_mtr_idx);
15501                                 if (!next_fm)
15502                                         return -rte_mtr_error_set(error, EINVAL,
15503                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15504                                                 "Fail to find next meter.");
15505                                 if (next_fm->def_policy)
15506                                         return -rte_mtr_error_set(error, EINVAL,
15507                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15508                                 "Hierarchy only supports termination meter.");
15509                                 next_policy = mlx5_flow_meter_policy_find(dev,
15510                                                 next_fm->policy_id, NULL);
15511                                 MLX5_ASSERT(next_policy);
15512                                 if (next_fm->drop_cnt) {
15513                                         set_tag.id =
15514                                                 (enum modify_reg)
15515                                                 mlx5_flow_get_reg_id(dev,
15516                                                 MLX5_MTR_ID,
15517                                                 0,
15518                                                 (struct rte_flow_error *)error);
15519                                         set_tag.offset = (priv->mtr_reg_share ?
15520                                                 MLX5_MTR_COLOR_BITS : 0);
15521                                         set_tag.length = (priv->mtr_reg_share ?
15522                                                MLX5_MTR_IDLE_BITS_IN_COLOR_REG :
15523                                                MLX5_REG_BITS);
15524                                         set_tag.data = next_mtr_idx;
15525                                         tag_action.type =
15526                                                 (enum rte_flow_action_type)
15527                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
15528                                         tag_action.conf = &set_tag;
15529                                         if (flow_dv_convert_action_set_reg
15530                                                 (mhdr_res, &tag_action,
15531                                                 (struct rte_flow_error *)error))
15532                                                 return -rte_errno;
15533                                         action_flags |=
15534                                                 MLX5_FLOW_ACTION_SET_TAG;
15535                                 }
15536                                 act_cnt->fate_action = MLX5_FLOW_FATE_MTR;
15537                                 act_cnt->next_mtr_id = next_fm->meter_id;
15538                                 act_cnt->next_sub_policy = NULL;
15539                                 mtr_policy->is_hierarchy = 1;
15540                                 mtr_policy->dev = next_policy->dev;
15541                                 action_flags |=
15542                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
15543                                 break;
15544                         }
15545                         default:
15546                                 return -rte_mtr_error_set(error, ENOTSUP,
15547                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15548                                           NULL, "action type not supported");
15549                         }
15550                         if (action_flags & MLX5_FLOW_ACTION_SET_TAG) {
15551                                 /* create modify action if needed. */
15552                                 dev_flow.dv.group = 1;
15553                                 if (flow_dv_modify_hdr_resource_register
15554                                         (dev, mhdr_res, &dev_flow, &flow_err))
15555                                         return -rte_mtr_error_set(error,
15556                                                 ENOTSUP,
15557                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
15558                                                 NULL, "cannot register policy "
15559                                                 "set tag action");
15560                                 act_cnt->modify_hdr =
15561                                         dev_flow.handle->dvh.modify_hdr;
15562                         }
15563                 }
15564         }
15565         return 0;
15566 }
15567
15568 /**
15569  * Create policy action per domain, lock free,
15570  * (mutex should be acquired by caller).
15571  * Dispatcher for action type specific call.
15572  *
15573  * @param[in] dev
15574  *   Pointer to the Ethernet device structure.
15575  * @param[in] mtr_policy
15576  *   Meter policy struct.
15577  * @param[in] action
15578  *   Action specification used to create meter actions.
15579  * @param[out] error
15580  *   Perform verbose error reporting if not NULL. Initialized in case of
15581  *   error only.
15582  *
15583  * @return
15584  *   0 on success, otherwise negative errno value.
15585  */
15586 static int
15587 flow_dv_create_mtr_policy_acts(struct rte_eth_dev *dev,
15588                       struct mlx5_flow_meter_policy *mtr_policy,
15589                       const struct rte_flow_action *actions[RTE_COLORS],
15590                       struct rte_mtr_error *error)
15591 {
15592         int ret, i;
15593         uint16_t sub_policy_num;
15594
15595         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15596                 sub_policy_num = (mtr_policy->sub_policy_num >>
15597                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15598                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15599                 if (sub_policy_num) {
15600                         ret = __flow_dv_create_domain_policy_acts(dev,
15601                                 mtr_policy, actions,
15602                                 (enum mlx5_meter_domain)i, error);
15603                         /* Cleaning resource is done in the caller level. */
15604                         if (ret)
15605                                 return ret;
15606                 }
15607         }
15608         return 0;
15609 }
15610
15611 /**
15612  * Query a DV flow rule for its statistics via DevX.
15613  *
15614  * @param[in] dev
15615  *   Pointer to Ethernet device.
15616  * @param[in] cnt_idx
15617  *   Index to the flow counter.
15618  * @param[out] data
15619  *   Data retrieved by the query.
15620  * @param[out] error
15621  *   Perform verbose error reporting if not NULL.
15622  *
15623  * @return
15624  *   0 on success, a negative errno value otherwise and rte_errno is set.
15625  */
15626 static int
15627 flow_dv_query_count(struct rte_eth_dev *dev, uint32_t cnt_idx, void *data,
15628                     struct rte_flow_error *error)
15629 {
15630         struct mlx5_priv *priv = dev->data->dev_private;
15631         struct rte_flow_query_count *qc = data;
15632
15633         if (!priv->sh->devx)
15634                 return rte_flow_error_set(error, ENOTSUP,
15635                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15636                                           NULL,
15637                                           "counters are not supported");
15638         if (cnt_idx) {
15639                 uint64_t pkts, bytes;
15640                 struct mlx5_flow_counter *cnt;
15641                 int err = _flow_dv_query_count(dev, cnt_idx, &pkts, &bytes);
15642
15643                 if (err)
15644                         return rte_flow_error_set(error, -err,
15645                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15646                                         NULL, "cannot read counters");
15647                 cnt = flow_dv_counter_get_by_idx(dev, cnt_idx, NULL);
15648                 qc->hits_set = 1;
15649                 qc->bytes_set = 1;
15650                 qc->hits = pkts - cnt->hits;
15651                 qc->bytes = bytes - cnt->bytes;
15652                 if (qc->reset) {
15653                         cnt->hits = pkts;
15654                         cnt->bytes = bytes;
15655                 }
15656                 return 0;
15657         }
15658         return rte_flow_error_set(error, EINVAL,
15659                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15660                                   NULL,
15661                                   "counters are not available");
15662 }
15663
15664 static int
15665 flow_dv_action_query(struct rte_eth_dev *dev,
15666                      const struct rte_flow_action_handle *handle, void *data,
15667                      struct rte_flow_error *error)
15668 {
15669         struct mlx5_age_param *age_param;
15670         struct rte_flow_query_age *resp;
15671         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15672         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15673         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15674         struct mlx5_priv *priv = dev->data->dev_private;
15675         struct mlx5_aso_ct_action *ct;
15676         uint16_t owner;
15677         uint32_t dev_idx;
15678
15679         switch (type) {
15680         case MLX5_INDIRECT_ACTION_TYPE_AGE:
15681                 age_param = &flow_aso_age_get_by_idx(dev, idx)->age_params;
15682                 resp = data;
15683                 resp->aged = __atomic_load_n(&age_param->state,
15684                                               __ATOMIC_RELAXED) == AGE_TMOUT ?
15685                                                                           1 : 0;
15686                 resp->sec_since_last_hit_valid = !resp->aged;
15687                 if (resp->sec_since_last_hit_valid)
15688                         resp->sec_since_last_hit = __atomic_load_n
15689                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15690                 return 0;
15691         case MLX5_INDIRECT_ACTION_TYPE_COUNT:
15692                 return flow_dv_query_count(dev, idx, data, error);
15693         case MLX5_INDIRECT_ACTION_TYPE_CT:
15694                 owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
15695                 if (owner != PORT_ID(priv))
15696                         return rte_flow_error_set(error, EACCES,
15697                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15698                                         NULL,
15699                                         "CT object owned by another port");
15700                 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
15701                 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
15702                 MLX5_ASSERT(ct);
15703                 if (!ct->refcnt)
15704                         return rte_flow_error_set(error, EFAULT,
15705                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15706                                         NULL,
15707                                         "CT object is inactive");
15708                 ((struct rte_flow_action_conntrack *)data)->peer_port =
15709                                                         ct->peer;
15710                 ((struct rte_flow_action_conntrack *)data)->is_original_dir =
15711                                                         ct->is_original;
15712                 if (mlx5_aso_ct_query_by_wqe(priv->sh, ct, data))
15713                         return rte_flow_error_set(error, EIO,
15714                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15715                                         NULL,
15716                                         "Failed to query CT context");
15717                 return 0;
15718         default:
15719                 return rte_flow_error_set(error, ENOTSUP,
15720                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15721                                           "action type query not supported");
15722         }
15723 }
15724
15725 /**
15726  * Query a flow rule AGE action for aging information.
15727  *
15728  * @param[in] dev
15729  *   Pointer to Ethernet device.
15730  * @param[in] flow
15731  *   Pointer to the sub flow.
15732  * @param[out] data
15733  *   data retrieved by the query.
15734  * @param[out] error
15735  *   Perform verbose error reporting if not NULL.
15736  *
15737  * @return
15738  *   0 on success, a negative errno value otherwise and rte_errno is set.
15739  */
15740 static int
15741 flow_dv_query_age(struct rte_eth_dev *dev, struct rte_flow *flow,
15742                   void *data, struct rte_flow_error *error)
15743 {
15744         struct rte_flow_query_age *resp = data;
15745         struct mlx5_age_param *age_param;
15746
15747         if (flow->age) {
15748                 struct mlx5_aso_age_action *act =
15749                                      flow_aso_age_get_by_idx(dev, flow->age);
15750
15751                 age_param = &act->age_params;
15752         } else if (flow->counter) {
15753                 age_param = flow_dv_counter_idx_get_age(dev, flow->counter);
15754
15755                 if (!age_param || !age_param->timeout)
15756                         return rte_flow_error_set
15757                                         (error, EINVAL,
15758                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15759                                          NULL, "cannot read age data");
15760         } else {
15761                 return rte_flow_error_set(error, EINVAL,
15762                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15763                                           NULL, "age data not available");
15764         }
15765         resp->aged = __atomic_load_n(&age_param->state, __ATOMIC_RELAXED) ==
15766                                      AGE_TMOUT ? 1 : 0;
15767         resp->sec_since_last_hit_valid = !resp->aged;
15768         if (resp->sec_since_last_hit_valid)
15769                 resp->sec_since_last_hit = __atomic_load_n
15770                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15771         return 0;
15772 }
15773
15774 /**
15775  * Query a flow.
15776  *
15777  * @see rte_flow_query()
15778  * @see rte_flow_ops
15779  */
15780 static int
15781 flow_dv_query(struct rte_eth_dev *dev,
15782               struct rte_flow *flow __rte_unused,
15783               const struct rte_flow_action *actions __rte_unused,
15784               void *data __rte_unused,
15785               struct rte_flow_error *error __rte_unused)
15786 {
15787         int ret = -EINVAL;
15788
15789         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
15790                 switch (actions->type) {
15791                 case RTE_FLOW_ACTION_TYPE_VOID:
15792                         break;
15793                 case RTE_FLOW_ACTION_TYPE_COUNT:
15794                         ret = flow_dv_query_count(dev, flow->counter, data,
15795                                                   error);
15796                         break;
15797                 case RTE_FLOW_ACTION_TYPE_AGE:
15798                         ret = flow_dv_query_age(dev, flow, data, error);
15799                         break;
15800                 default:
15801                         return rte_flow_error_set(error, ENOTSUP,
15802                                                   RTE_FLOW_ERROR_TYPE_ACTION,
15803                                                   actions,
15804                                                   "action not supported");
15805                 }
15806         }
15807         return ret;
15808 }
15809
15810 /**
15811  * Destroy the meter table set.
15812  * Lock free, (mutex should be acquired by caller).
15813  *
15814  * @param[in] dev
15815  *   Pointer to Ethernet device.
15816  * @param[in] fm
15817  *   Meter information table.
15818  */
15819 static void
15820 flow_dv_destroy_mtr_tbls(struct rte_eth_dev *dev,
15821                         struct mlx5_flow_meter_info *fm)
15822 {
15823         struct mlx5_priv *priv = dev->data->dev_private;
15824         int i;
15825
15826         if (!fm || !priv->config.dv_flow_en)
15827                 return;
15828         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15829                 if (fm->drop_rule[i]) {
15830                         claim_zero(mlx5_flow_os_destroy_flow(fm->drop_rule[i]));
15831                         fm->drop_rule[i] = NULL;
15832                 }
15833         }
15834 }
15835
15836 static void
15837 flow_dv_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
15838 {
15839         struct mlx5_priv *priv = dev->data->dev_private;
15840         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
15841         struct mlx5_flow_tbl_data_entry *tbl;
15842         int i, j;
15843
15844         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15845                 if (mtrmng->def_rule[i]) {
15846                         claim_zero(mlx5_flow_os_destroy_flow
15847                                         (mtrmng->def_rule[i]));
15848                         mtrmng->def_rule[i] = NULL;
15849                 }
15850                 if (mtrmng->def_matcher[i]) {
15851                         tbl = container_of(mtrmng->def_matcher[i]->tbl,
15852                                 struct mlx5_flow_tbl_data_entry, tbl);
15853                         mlx5_list_unregister(tbl->matchers,
15854                                              &mtrmng->def_matcher[i]->entry);
15855                         mtrmng->def_matcher[i] = NULL;
15856                 }
15857                 for (j = 0; j < MLX5_REG_BITS; j++) {
15858                         if (mtrmng->drop_matcher[i][j]) {
15859                                 tbl =
15860                                 container_of(mtrmng->drop_matcher[i][j]->tbl,
15861                                              struct mlx5_flow_tbl_data_entry,
15862                                              tbl);
15863                                 mlx5_list_unregister(tbl->matchers,
15864                                             &mtrmng->drop_matcher[i][j]->entry);
15865                                 mtrmng->drop_matcher[i][j] = NULL;
15866                         }
15867                 }
15868                 if (mtrmng->drop_tbl[i]) {
15869                         flow_dv_tbl_resource_release(MLX5_SH(dev),
15870                                 mtrmng->drop_tbl[i]);
15871                         mtrmng->drop_tbl[i] = NULL;
15872                 }
15873         }
15874 }
15875
15876 /* Number of meter flow actions, count and jump or count and drop. */
15877 #define METER_ACTIONS 2
15878
15879 static void
15880 __flow_dv_destroy_domain_def_policy(struct rte_eth_dev *dev,
15881                                     enum mlx5_meter_domain domain)
15882 {
15883         struct mlx5_priv *priv = dev->data->dev_private;
15884         struct mlx5_flow_meter_def_policy *def_policy =
15885                         priv->sh->mtrmng->def_policy[domain];
15886
15887         __flow_dv_destroy_sub_policy_rules(dev, &def_policy->sub_policy);
15888         mlx5_free(def_policy);
15889         priv->sh->mtrmng->def_policy[domain] = NULL;
15890 }
15891
15892 /**
15893  * Destroy the default policy table set.
15894  *
15895  * @param[in] dev
15896  *   Pointer to Ethernet device.
15897  */
15898 static void
15899 flow_dv_destroy_def_policy(struct rte_eth_dev *dev)
15900 {
15901         struct mlx5_priv *priv = dev->data->dev_private;
15902         int i;
15903
15904         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++)
15905                 if (priv->sh->mtrmng->def_policy[i])
15906                         __flow_dv_destroy_domain_def_policy(dev,
15907                                         (enum mlx5_meter_domain)i);
15908         priv->sh->mtrmng->def_policy_id = MLX5_INVALID_POLICY_ID;
15909 }
15910
15911 static int
15912 __flow_dv_create_policy_flow(struct rte_eth_dev *dev,
15913                         uint32_t color_reg_c_idx,
15914                         enum rte_color color, void *matcher_object,
15915                         int actions_n, void *actions,
15916                         bool match_src_port, const struct rte_flow_item *item,
15917                         void **rule, const struct rte_flow_attr *attr)
15918 {
15919         int ret;
15920         struct mlx5_flow_dv_match_params value = {
15921                 .size = sizeof(value.buf),
15922         };
15923         struct mlx5_flow_dv_match_params matcher = {
15924                 .size = sizeof(matcher.buf),
15925         };
15926         struct mlx5_priv *priv = dev->data->dev_private;
15927         uint8_t misc_mask;
15928
15929         if (match_src_port && (priv->representor || priv->master)) {
15930                 if (flow_dv_translate_item_port_id(dev, matcher.buf,
15931                                                    value.buf, item, attr)) {
15932                         DRV_LOG(ERR, "Failed to create meter policy%d flow's"
15933                                 " value with port.", color);
15934                         return -1;
15935                 }
15936         }
15937         flow_dv_match_meta_reg(matcher.buf, value.buf,
15938                                (enum modify_reg)color_reg_c_idx,
15939                                rte_col_2_mlx5_col(color), UINT32_MAX);
15940         misc_mask = flow_dv_matcher_enable(value.buf);
15941         __flow_dv_adjust_buf_size(&value.size, misc_mask);
15942         ret = mlx5_flow_os_create_flow(matcher_object, (void *)&value,
15943                                        actions_n, actions, rule);
15944         if (ret) {
15945                 DRV_LOG(ERR, "Failed to create meter policy%d flow.", color);
15946                 return -1;
15947         }
15948         return 0;
15949 }
15950
15951 static int
15952 __flow_dv_create_policy_matcher(struct rte_eth_dev *dev,
15953                         uint32_t color_reg_c_idx,
15954                         uint16_t priority,
15955                         struct mlx5_flow_meter_sub_policy *sub_policy,
15956                         const struct rte_flow_attr *attr,
15957                         bool match_src_port,
15958                         const struct rte_flow_item *item,
15959                         struct mlx5_flow_dv_matcher **policy_matcher,
15960                         struct rte_flow_error *error)
15961 {
15962         struct mlx5_list_entry *entry;
15963         struct mlx5_flow_tbl_resource *tbl_rsc = sub_policy->tbl_rsc;
15964         struct mlx5_flow_dv_matcher matcher = {
15965                 .mask = {
15966                         .size = sizeof(matcher.mask.buf),
15967                 },
15968                 .tbl = tbl_rsc,
15969         };
15970         struct mlx5_flow_dv_match_params value = {
15971                 .size = sizeof(value.buf),
15972         };
15973         struct mlx5_flow_cb_ctx ctx = {
15974                 .error = error,
15975                 .data = &matcher,
15976         };
15977         struct mlx5_flow_tbl_data_entry *tbl_data;
15978         struct mlx5_priv *priv = dev->data->dev_private;
15979         const uint32_t color_mask = (UINT32_C(1) << MLX5_MTR_COLOR_BITS) - 1;
15980
15981         if (match_src_port && (priv->representor || priv->master)) {
15982                 if (flow_dv_translate_item_port_id(dev, matcher.mask.buf,
15983                                                    value.buf, item, attr)) {
15984                         DRV_LOG(ERR, "Failed to register meter policy%d matcher"
15985                                 " with port.", priority);
15986                         return -1;
15987                 }
15988         }
15989         tbl_data = container_of(tbl_rsc, struct mlx5_flow_tbl_data_entry, tbl);
15990         if (priority < RTE_COLOR_RED)
15991                 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
15992                         (enum modify_reg)color_reg_c_idx, 0, color_mask);
15993         matcher.priority = priority;
15994         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
15995                                     matcher.mask.size);
15996         entry = mlx5_list_register(tbl_data->matchers, &ctx);
15997         if (!entry) {
15998                 DRV_LOG(ERR, "Failed to register meter drop matcher.");
15999                 return -1;
16000         }
16001         *policy_matcher =
16002                 container_of(entry, struct mlx5_flow_dv_matcher, entry);
16003         return 0;
16004 }
16005
16006 /**
16007  * Create the policy rules per domain.
16008  *
16009  * @param[in] dev
16010  *   Pointer to Ethernet device.
16011  * @param[in] sub_policy
16012  *    Pointer to sub policy table..
16013  * @param[in] egress
16014  *   Direction of the table.
16015  * @param[in] transfer
16016  *   E-Switch or NIC flow.
16017  * @param[in] acts
16018  *   Pointer to policy action list per color.
16019  *
16020  * @return
16021  *   0 on success, -1 otherwise.
16022  */
16023 static int
16024 __flow_dv_create_domain_policy_rules(struct rte_eth_dev *dev,
16025                 struct mlx5_flow_meter_sub_policy *sub_policy,
16026                 uint8_t egress, uint8_t transfer, bool match_src_port,
16027                 struct mlx5_meter_policy_acts acts[RTE_COLORS])
16028 {
16029         struct mlx5_priv *priv = dev->data->dev_private;
16030         struct rte_flow_error flow_err;
16031         uint32_t color_reg_c_idx;
16032         struct rte_flow_attr attr = {
16033                 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
16034                 .priority = 0,
16035                 .ingress = 0,
16036                 .egress = !!egress,
16037                 .transfer = !!transfer,
16038                 .reserved = 0,
16039         };
16040         int i;
16041         int ret = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &flow_err);
16042         struct mlx5_sub_policy_color_rule *color_rule;
16043         bool svport_match;
16044         struct mlx5_sub_policy_color_rule *tmp_rules[RTE_COLORS] = {NULL};
16045
16046         if (ret < 0)
16047                 return -1;
16048         /* Create policy table with POLICY level. */
16049         if (!sub_policy->tbl_rsc)
16050                 sub_policy->tbl_rsc = flow_dv_tbl_resource_get(dev,
16051                                 MLX5_FLOW_TABLE_LEVEL_POLICY,
16052                                 egress, transfer, false, NULL, 0, 0,
16053                                 sub_policy->idx, &flow_err);
16054         if (!sub_policy->tbl_rsc) {
16055                 DRV_LOG(ERR,
16056                         "Failed to create meter sub policy table.");
16057                 return -1;
16058         }
16059         /* Prepare matchers. */
16060         color_reg_c_idx = ret;
16061         for (i = 0; i < RTE_COLORS; i++) {
16062                 TAILQ_INIT(&sub_policy->color_rules[i]);
16063                 if (!acts[i].actions_n)
16064                         continue;
16065                 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
16066                                 sizeof(struct mlx5_sub_policy_color_rule),
16067                                 0, SOCKET_ID_ANY);
16068                 if (!color_rule) {
16069                         DRV_LOG(ERR, "No memory to create color rule.");
16070                         goto err_exit;
16071                 }
16072                 tmp_rules[i] = color_rule;
16073                 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
16074                                   color_rule, next_port);
16075                 color_rule->src_port = priv->representor_id;
16076                 /* No use. */
16077                 attr.priority = i;
16078                 /* Create matchers for colors. */
16079                 svport_match = (i != RTE_COLOR_RED) ? match_src_port : false;
16080                 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
16081                                 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
16082                                 &attr, svport_match, NULL,
16083                                 &color_rule->matcher, &flow_err)) {
16084                         DRV_LOG(ERR, "Failed to create color%u matcher.", i);
16085                         goto err_exit;
16086                 }
16087                 /* Create flow, matching color. */
16088                 if (__flow_dv_create_policy_flow(dev,
16089                                 color_reg_c_idx, (enum rte_color)i,
16090                                 color_rule->matcher->matcher_object,
16091                                 acts[i].actions_n, acts[i].dv_actions,
16092                                 svport_match, NULL, &color_rule->rule,
16093                                 &attr)) {
16094                         DRV_LOG(ERR, "Failed to create color%u rule.", i);
16095                         goto err_exit;
16096                 }
16097         }
16098         return 0;
16099 err_exit:
16100         /* All the policy rules will be cleared. */
16101         do {
16102                 color_rule = tmp_rules[i];
16103                 if (color_rule) {
16104                         if (color_rule->rule)
16105                                 mlx5_flow_os_destroy_flow(color_rule->rule);
16106                         if (color_rule->matcher) {
16107                                 struct mlx5_flow_tbl_data_entry *tbl =
16108                                         container_of(color_rule->matcher->tbl,
16109                                                      typeof(*tbl), tbl);
16110                                 mlx5_list_unregister(tbl->matchers,
16111                                                 &color_rule->matcher->entry);
16112                         }
16113                         TAILQ_REMOVE(&sub_policy->color_rules[i],
16114                                      color_rule, next_port);
16115                         mlx5_free(color_rule);
16116                 }
16117         } while (i--);
16118         return -1;
16119 }
16120
16121 static int
16122 __flow_dv_create_policy_acts_rules(struct rte_eth_dev *dev,
16123                         struct mlx5_flow_meter_policy *mtr_policy,
16124                         struct mlx5_flow_meter_sub_policy *sub_policy,
16125                         uint32_t domain)
16126 {
16127         struct mlx5_priv *priv = dev->data->dev_private;
16128         struct mlx5_meter_policy_acts acts[RTE_COLORS];
16129         struct mlx5_flow_dv_tag_resource *tag;
16130         struct mlx5_flow_dv_port_id_action_resource *port_action;
16131         struct mlx5_hrxq *hrxq;
16132         struct mlx5_flow_meter_info *next_fm = NULL;
16133         struct mlx5_flow_meter_policy *next_policy;
16134         struct mlx5_flow_meter_sub_policy *next_sub_policy;
16135         struct mlx5_flow_tbl_data_entry *tbl_data;
16136         struct rte_flow_error error;
16137         uint8_t egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16138         uint8_t transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16139         bool mtr_first = egress || (transfer && priv->representor_id != UINT16_MAX);
16140         bool match_src_port = false;
16141         int i;
16142
16143         /* If RSS or Queue, no previous actions / rules is created. */
16144         for (i = 0; i < RTE_COLORS; i++) {
16145                 acts[i].actions_n = 0;
16146                 if (i == RTE_COLOR_RED) {
16147                         /* Only support drop on red. */
16148                         acts[i].dv_actions[0] =
16149                                 mtr_policy->dr_drop_action[domain];
16150                         acts[i].actions_n = 1;
16151                         continue;
16152                 }
16153                 if (i == RTE_COLOR_GREEN &&
16154                     mtr_policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR) {
16155                         struct rte_flow_attr attr = {
16156                                 .transfer = transfer
16157                         };
16158
16159                         next_fm = mlx5_flow_meter_find(priv,
16160                                         mtr_policy->act_cnt[i].next_mtr_id,
16161                                         NULL);
16162                         if (!next_fm) {
16163                                 DRV_LOG(ERR,
16164                                         "Failed to get next hierarchy meter.");
16165                                 goto err_exit;
16166                         }
16167                         if (mlx5_flow_meter_attach(priv, next_fm,
16168                                                    &attr, &error)) {
16169                                 DRV_LOG(ERR, "%s", error.message);
16170                                 next_fm = NULL;
16171                                 goto err_exit;
16172                         }
16173                         /* Meter action must be the first for TX. */
16174                         if (mtr_first) {
16175                                 acts[i].dv_actions[acts[i].actions_n] =
16176                                         next_fm->meter_action;
16177                                 acts[i].actions_n++;
16178                         }
16179                 }
16180                 if (mtr_policy->act_cnt[i].rix_mark) {
16181                         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG],
16182                                         mtr_policy->act_cnt[i].rix_mark);
16183                         if (!tag) {
16184                                 DRV_LOG(ERR, "Failed to find "
16185                                 "mark action for policy.");
16186                                 goto err_exit;
16187                         }
16188                         acts[i].dv_actions[acts[i].actions_n] = tag->action;
16189                         acts[i].actions_n++;
16190                 }
16191                 if (mtr_policy->act_cnt[i].modify_hdr) {
16192                         acts[i].dv_actions[acts[i].actions_n] =
16193                                 mtr_policy->act_cnt[i].modify_hdr->action;
16194                         acts[i].actions_n++;
16195                 }
16196                 if (mtr_policy->act_cnt[i].fate_action) {
16197                         switch (mtr_policy->act_cnt[i].fate_action) {
16198                         case MLX5_FLOW_FATE_PORT_ID:
16199                                 port_action = mlx5_ipool_get
16200                                         (priv->sh->ipool[MLX5_IPOOL_PORT_ID],
16201                                 mtr_policy->act_cnt[i].rix_port_id_action);
16202                                 if (!port_action) {
16203                                         DRV_LOG(ERR, "Failed to find "
16204                                                 "port action for policy.");
16205                                         goto err_exit;
16206                                 }
16207                                 acts[i].dv_actions[acts[i].actions_n] =
16208                                         port_action->action;
16209                                 acts[i].actions_n++;
16210                                 mtr_policy->dev = dev;
16211                                 match_src_port = true;
16212                                 break;
16213                         case MLX5_FLOW_FATE_DROP:
16214                         case MLX5_FLOW_FATE_JUMP:
16215                                 acts[i].dv_actions[acts[i].actions_n] =
16216                                 mtr_policy->act_cnt[i].dr_jump_action[domain];
16217                                 acts[i].actions_n++;
16218                                 break;
16219                         case MLX5_FLOW_FATE_SHARED_RSS:
16220                         case MLX5_FLOW_FATE_QUEUE:
16221                                 hrxq = mlx5_ipool_get
16222                                         (priv->sh->ipool[MLX5_IPOOL_HRXQ],
16223                                          sub_policy->rix_hrxq[i]);
16224                                 if (!hrxq) {
16225                                         DRV_LOG(ERR, "Failed to find "
16226                                                 "queue action for policy.");
16227                                         goto err_exit;
16228                                 }
16229                                 acts[i].dv_actions[acts[i].actions_n] =
16230                                         hrxq->action;
16231                                 acts[i].actions_n++;
16232                                 break;
16233                         case MLX5_FLOW_FATE_MTR:
16234                                 if (!next_fm) {
16235                                         DRV_LOG(ERR,
16236                                                 "No next hierarchy meter.");
16237                                         goto err_exit;
16238                                 }
16239                                 if (!mtr_first) {
16240                                         acts[i].dv_actions[acts[i].actions_n] =
16241                                                         next_fm->meter_action;
16242                                         acts[i].actions_n++;
16243                                 }
16244                                 if (mtr_policy->act_cnt[i].next_sub_policy) {
16245                                         next_sub_policy =
16246                                         mtr_policy->act_cnt[i].next_sub_policy;
16247                                 } else {
16248                                         next_policy =
16249                                                 mlx5_flow_meter_policy_find(dev,
16250                                                 next_fm->policy_id, NULL);
16251                                         MLX5_ASSERT(next_policy);
16252                                         next_sub_policy =
16253                                         next_policy->sub_policys[domain][0];
16254                                 }
16255                                 tbl_data =
16256                                         container_of(next_sub_policy->tbl_rsc,
16257                                         struct mlx5_flow_tbl_data_entry, tbl);
16258                                 acts[i].dv_actions[acts[i].actions_n++] =
16259                                                         tbl_data->jump.action;
16260                                 if (mtr_policy->act_cnt[i].modify_hdr)
16261                                         match_src_port = !!transfer;
16262                                 break;
16263                         default:
16264                                 /*Queue action do nothing*/
16265                                 break;
16266                         }
16267                 }
16268         }
16269         if (__flow_dv_create_domain_policy_rules(dev, sub_policy,
16270                                 egress, transfer, match_src_port, acts)) {
16271                 DRV_LOG(ERR,
16272                         "Failed to create policy rules per domain.");
16273                 goto err_exit;
16274         }
16275         return 0;
16276 err_exit:
16277         if (next_fm)
16278                 mlx5_flow_meter_detach(priv, next_fm);
16279         return -1;
16280 }
16281
16282 /**
16283  * Create the policy rules.
16284  *
16285  * @param[in] dev
16286  *   Pointer to Ethernet device.
16287  * @param[in,out] mtr_policy
16288  *   Pointer to meter policy table.
16289  *
16290  * @return
16291  *   0 on success, -1 otherwise.
16292  */
16293 static int
16294 flow_dv_create_policy_rules(struct rte_eth_dev *dev,
16295                              struct mlx5_flow_meter_policy *mtr_policy)
16296 {
16297         int i;
16298         uint16_t sub_policy_num;
16299
16300         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16301                 sub_policy_num = (mtr_policy->sub_policy_num >>
16302                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
16303                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16304                 if (!sub_policy_num)
16305                         continue;
16306                 /* Prepare actions list and create policy rules. */
16307                 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16308                         mtr_policy->sub_policys[i][0], i)) {
16309                         DRV_LOG(ERR, "Failed to create policy action "
16310                                 "list per domain.");
16311                         return -1;
16312                 }
16313         }
16314         return 0;
16315 }
16316
16317 static int
16318 __flow_dv_create_domain_def_policy(struct rte_eth_dev *dev, uint32_t domain)
16319 {
16320         struct mlx5_priv *priv = dev->data->dev_private;
16321         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16322         struct mlx5_flow_meter_def_policy *def_policy;
16323         struct mlx5_flow_tbl_resource *jump_tbl;
16324         struct mlx5_flow_tbl_data_entry *tbl_data;
16325         uint8_t egress, transfer;
16326         struct rte_flow_error error;
16327         struct mlx5_meter_policy_acts acts[RTE_COLORS];
16328         int ret;
16329
16330         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16331         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16332         def_policy = mtrmng->def_policy[domain];
16333         if (!def_policy) {
16334                 def_policy = mlx5_malloc(MLX5_MEM_ZERO,
16335                         sizeof(struct mlx5_flow_meter_def_policy),
16336                         RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
16337                 if (!def_policy) {
16338                         DRV_LOG(ERR, "Failed to alloc default policy table.");
16339                         goto def_policy_error;
16340                 }
16341                 mtrmng->def_policy[domain] = def_policy;
16342                 /* Create the meter suffix table with SUFFIX level. */
16343                 jump_tbl = flow_dv_tbl_resource_get(dev,
16344                                 MLX5_FLOW_TABLE_LEVEL_METER,
16345                                 egress, transfer, false, NULL, 0,
16346                                 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16347                 if (!jump_tbl) {
16348                         DRV_LOG(ERR,
16349                                 "Failed to create meter suffix table.");
16350                         goto def_policy_error;
16351                 }
16352                 def_policy->sub_policy.jump_tbl[RTE_COLOR_GREEN] = jump_tbl;
16353                 tbl_data = container_of(jump_tbl,
16354                                         struct mlx5_flow_tbl_data_entry, tbl);
16355                 def_policy->dr_jump_action[RTE_COLOR_GREEN] =
16356                                                 tbl_data->jump.action;
16357                 acts[RTE_COLOR_GREEN].dv_actions[0] = tbl_data->jump.action;
16358                 acts[RTE_COLOR_GREEN].actions_n = 1;
16359                 /*
16360                  * YELLOW has the same default policy as GREEN does.
16361                  * G & Y share the same table and action. The 2nd time of table
16362                  * resource getting is just to update the reference count for
16363                  * the releasing stage.
16364                  */
16365                 jump_tbl = flow_dv_tbl_resource_get(dev,
16366                                 MLX5_FLOW_TABLE_LEVEL_METER,
16367                                 egress, transfer, false, NULL, 0,
16368                                 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16369                 if (!jump_tbl) {
16370                         DRV_LOG(ERR,
16371                                 "Failed to get meter suffix table.");
16372                         goto def_policy_error;
16373                 }
16374                 def_policy->sub_policy.jump_tbl[RTE_COLOR_YELLOW] = jump_tbl;
16375                 tbl_data = container_of(jump_tbl,
16376                                         struct mlx5_flow_tbl_data_entry, tbl);
16377                 def_policy->dr_jump_action[RTE_COLOR_YELLOW] =
16378                                                 tbl_data->jump.action;
16379                 acts[RTE_COLOR_YELLOW].dv_actions[0] = tbl_data->jump.action;
16380                 acts[RTE_COLOR_YELLOW].actions_n = 1;
16381                 /* Create jump action to the drop table. */
16382                 if (!mtrmng->drop_tbl[domain]) {
16383                         mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get
16384                                 (dev, MLX5_FLOW_TABLE_LEVEL_METER,
16385                                  egress, transfer, false, NULL, 0,
16386                                  0, MLX5_MTR_TABLE_ID_DROP, &error);
16387                         if (!mtrmng->drop_tbl[domain]) {
16388                                 DRV_LOG(ERR, "Failed to create meter "
16389                                         "drop table for default policy.");
16390                                 goto def_policy_error;
16391                         }
16392                 }
16393                 /* all RED: unique Drop table for jump action. */
16394                 tbl_data = container_of(mtrmng->drop_tbl[domain],
16395                                         struct mlx5_flow_tbl_data_entry, tbl);
16396                 def_policy->dr_jump_action[RTE_COLOR_RED] =
16397                                                 tbl_data->jump.action;
16398                 acts[RTE_COLOR_RED].dv_actions[0] = tbl_data->jump.action;
16399                 acts[RTE_COLOR_RED].actions_n = 1;
16400                 /* Create default policy rules. */
16401                 ret = __flow_dv_create_domain_policy_rules(dev,
16402                                         &def_policy->sub_policy,
16403                                         egress, transfer, false, acts);
16404                 if (ret) {
16405                         DRV_LOG(ERR, "Failed to create default policy rules.");
16406                         goto def_policy_error;
16407                 }
16408         }
16409         return 0;
16410 def_policy_error:
16411         __flow_dv_destroy_domain_def_policy(dev,
16412                                             (enum mlx5_meter_domain)domain);
16413         return -1;
16414 }
16415
16416 /**
16417  * Create the default policy table set.
16418  *
16419  * @param[in] dev
16420  *   Pointer to Ethernet device.
16421  * @return
16422  *   0 on success, -1 otherwise.
16423  */
16424 static int
16425 flow_dv_create_def_policy(struct rte_eth_dev *dev)
16426 {
16427         struct mlx5_priv *priv = dev->data->dev_private;
16428         int i;
16429
16430         /* Non-termination policy table. */
16431         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16432                 if (!priv->config.dv_esw_en && i == MLX5_MTR_DOMAIN_TRANSFER)
16433                         continue;
16434                 if (__flow_dv_create_domain_def_policy(dev, i)) {
16435                         DRV_LOG(ERR, "Failed to create default policy");
16436                         /* Rollback the created default policies for others. */
16437                         flow_dv_destroy_def_policy(dev);
16438                         return -1;
16439                 }
16440         }
16441         return 0;
16442 }
16443
16444 /**
16445  * Create the needed meter tables.
16446  * Lock free, (mutex should be acquired by caller).
16447  *
16448  * @param[in] dev
16449  *   Pointer to Ethernet device.
16450  * @param[in] fm
16451  *   Meter information table.
16452  * @param[in] mtr_idx
16453  *   Meter index.
16454  * @param[in] domain_bitmap
16455  *   Domain bitmap.
16456  * @return
16457  *   0 on success, -1 otherwise.
16458  */
16459 static int
16460 flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,
16461                         struct mlx5_flow_meter_info *fm,
16462                         uint32_t mtr_idx,
16463                         uint8_t domain_bitmap)
16464 {
16465         struct mlx5_priv *priv = dev->data->dev_private;
16466         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16467         struct rte_flow_error error;
16468         struct mlx5_flow_tbl_data_entry *tbl_data;
16469         uint8_t egress, transfer;
16470         void *actions[METER_ACTIONS];
16471         int domain, ret, i;
16472         struct mlx5_flow_counter *cnt;
16473         struct mlx5_flow_dv_match_params value = {
16474                 .size = sizeof(value.buf),
16475         };
16476         struct mlx5_flow_dv_match_params matcher_para = {
16477                 .size = sizeof(matcher_para.buf),
16478         };
16479         int mtr_id_reg_c = mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
16480                                                      0, &error);
16481         uint32_t mtr_id_mask = (UINT32_C(1) << mtrmng->max_mtr_bits) - 1;
16482         uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
16483         struct mlx5_list_entry *entry;
16484         struct mlx5_flow_dv_matcher matcher = {
16485                 .mask = {
16486                         .size = sizeof(matcher.mask.buf),
16487                 },
16488         };
16489         struct mlx5_flow_dv_matcher *drop_matcher;
16490         struct mlx5_flow_cb_ctx ctx = {
16491                 .error = &error,
16492                 .data = &matcher,
16493         };
16494         uint8_t misc_mask;
16495
16496         if (!priv->mtr_en || mtr_id_reg_c < 0) {
16497                 rte_errno = ENOTSUP;
16498                 return -1;
16499         }
16500         for (domain = 0; domain < MLX5_MTR_DOMAIN_MAX; domain++) {
16501                 if (!(domain_bitmap & (1 << domain)) ||
16502                         (mtrmng->def_rule[domain] && !fm->drop_cnt))
16503                         continue;
16504                 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16505                 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16506                 /* Create the drop table with METER DROP level. */
16507                 if (!mtrmng->drop_tbl[domain]) {
16508                         mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get(dev,
16509                                         MLX5_FLOW_TABLE_LEVEL_METER,
16510                                         egress, transfer, false, NULL, 0,
16511                                         0, MLX5_MTR_TABLE_ID_DROP, &error);
16512                         if (!mtrmng->drop_tbl[domain]) {
16513                                 DRV_LOG(ERR, "Failed to create meter drop table.");
16514                                 goto policy_error;
16515                         }
16516                 }
16517                 /* Create default matcher in drop table. */
16518                 matcher.tbl = mtrmng->drop_tbl[domain],
16519                 tbl_data = container_of(mtrmng->drop_tbl[domain],
16520                                 struct mlx5_flow_tbl_data_entry, tbl);
16521                 if (!mtrmng->def_matcher[domain]) {
16522                         flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16523                                        (enum modify_reg)mtr_id_reg_c,
16524                                        0, 0);
16525                         matcher.priority = MLX5_MTRS_DEFAULT_RULE_PRIORITY;
16526                         matcher.crc = rte_raw_cksum
16527                                         ((const void *)matcher.mask.buf,
16528                                         matcher.mask.size);
16529                         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16530                         if (!entry) {
16531                                 DRV_LOG(ERR, "Failed to register meter "
16532                                 "drop default matcher.");
16533                                 goto policy_error;
16534                         }
16535                         mtrmng->def_matcher[domain] = container_of(entry,
16536                         struct mlx5_flow_dv_matcher, entry);
16537                 }
16538                 /* Create default rule in drop table. */
16539                 if (!mtrmng->def_rule[domain]) {
16540                         i = 0;
16541                         actions[i++] = priv->sh->dr_drop_action;
16542                         flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16543                                 (enum modify_reg)mtr_id_reg_c, 0, 0);
16544                         misc_mask = flow_dv_matcher_enable(value.buf);
16545                         __flow_dv_adjust_buf_size(&value.size, misc_mask);
16546                         ret = mlx5_flow_os_create_flow
16547                                 (mtrmng->def_matcher[domain]->matcher_object,
16548                                 (void *)&value, i, actions,
16549                                 &mtrmng->def_rule[domain]);
16550                         if (ret) {
16551                                 DRV_LOG(ERR, "Failed to create meter "
16552                                 "default drop rule for drop table.");
16553                                 goto policy_error;
16554                         }
16555                 }
16556                 if (!fm->drop_cnt)
16557                         continue;
16558                 MLX5_ASSERT(mtrmng->max_mtr_bits);
16559                 if (!mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1]) {
16560                         /* Create matchers for Drop. */
16561                         flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16562                                         (enum modify_reg)mtr_id_reg_c, 0,
16563                                         (mtr_id_mask << mtr_id_offset));
16564                         matcher.priority = MLX5_REG_BITS - mtrmng->max_mtr_bits;
16565                         matcher.crc = rte_raw_cksum
16566                                         ((const void *)matcher.mask.buf,
16567                                         matcher.mask.size);
16568                         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16569                         if (!entry) {
16570                                 DRV_LOG(ERR,
16571                                 "Failed to register meter drop matcher.");
16572                                 goto policy_error;
16573                         }
16574                         mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1] =
16575                                 container_of(entry, struct mlx5_flow_dv_matcher,
16576                                              entry);
16577                 }
16578                 drop_matcher =
16579                         mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1];
16580                 /* Create drop rule, matching meter_id only. */
16581                 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16582                                 (enum modify_reg)mtr_id_reg_c,
16583                                 (mtr_idx << mtr_id_offset), UINT32_MAX);
16584                 i = 0;
16585                 cnt = flow_dv_counter_get_by_idx(dev,
16586                                         fm->drop_cnt, NULL);
16587                 actions[i++] = cnt->action;
16588                 actions[i++] = priv->sh->dr_drop_action;
16589                 misc_mask = flow_dv_matcher_enable(value.buf);
16590                 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16591                 ret = mlx5_flow_os_create_flow(drop_matcher->matcher_object,
16592                                                (void *)&value, i, actions,
16593                                                &fm->drop_rule[domain]);
16594                 if (ret) {
16595                         DRV_LOG(ERR, "Failed to create meter "
16596                                 "drop rule for drop table.");
16597                                 goto policy_error;
16598                 }
16599         }
16600         return 0;
16601 policy_error:
16602         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16603                 if (fm->drop_rule[i]) {
16604                         claim_zero(mlx5_flow_os_destroy_flow
16605                                 (fm->drop_rule[i]));
16606                         fm->drop_rule[i] = NULL;
16607                 }
16608         }
16609         return -1;
16610 }
16611
16612 static struct mlx5_flow_meter_sub_policy *
16613 __flow_dv_meter_get_rss_sub_policy(struct rte_eth_dev *dev,
16614                 struct mlx5_flow_meter_policy *mtr_policy,
16615                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS],
16616                 struct mlx5_flow_meter_sub_policy *next_sub_policy,
16617                 bool *is_reuse)
16618 {
16619         struct mlx5_priv *priv = dev->data->dev_private;
16620         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16621         uint32_t sub_policy_idx = 0;
16622         uint32_t hrxq_idx[MLX5_MTR_RTE_COLORS] = {0};
16623         uint32_t i, j;
16624         struct mlx5_hrxq *hrxq;
16625         struct mlx5_flow_handle dh;
16626         struct mlx5_meter_policy_action_container *act_cnt;
16627         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16628         uint16_t sub_policy_num;
16629
16630         rte_spinlock_lock(&mtr_policy->sl);
16631         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16632                 if (!rss_desc[i])
16633                         continue;
16634                 hrxq_idx[i] = mlx5_hrxq_get(dev, rss_desc[i]);
16635                 if (!hrxq_idx[i]) {
16636                         rte_spinlock_unlock(&mtr_policy->sl);
16637                         return NULL;
16638                 }
16639         }
16640         sub_policy_num = (mtr_policy->sub_policy_num >>
16641                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16642                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16643         for (j = 0; j < sub_policy_num; j++) {
16644                 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16645                         if (rss_desc[i] &&
16646                             hrxq_idx[i] !=
16647                             mtr_policy->sub_policys[domain][j]->rix_hrxq[i])
16648                                 break;
16649                 }
16650                 if (i >= MLX5_MTR_RTE_COLORS) {
16651                         /*
16652                          * Found the sub policy table with
16653                          * the same queue per color.
16654                          */
16655                         rte_spinlock_unlock(&mtr_policy->sl);
16656                         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16657                                 mlx5_hrxq_release(dev, hrxq_idx[i]);
16658                         *is_reuse = true;
16659                         return mtr_policy->sub_policys[domain][j];
16660                 }
16661         }
16662         /* Create sub policy. */
16663         if (!mtr_policy->sub_policys[domain][0]->rix_hrxq[0]) {
16664                 /* Reuse the first pre-allocated sub_policy. */
16665                 sub_policy = mtr_policy->sub_policys[domain][0];
16666                 sub_policy_idx = sub_policy->idx;
16667         } else {
16668                 sub_policy = mlx5_ipool_zmalloc
16669                                 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16670                                  &sub_policy_idx);
16671                 if (!sub_policy ||
16672                     sub_policy_idx > MLX5_MAX_SUB_POLICY_TBL_NUM) {
16673                         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16674                                 mlx5_hrxq_release(dev, hrxq_idx[i]);
16675                         goto rss_sub_policy_error;
16676                 }
16677                 sub_policy->idx = sub_policy_idx;
16678                 sub_policy->main_policy = mtr_policy;
16679         }
16680         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16681                 if (!rss_desc[i])
16682                         continue;
16683                 sub_policy->rix_hrxq[i] = hrxq_idx[i];
16684                 if (mtr_policy->is_hierarchy) {
16685                         act_cnt = &mtr_policy->act_cnt[i];
16686                         act_cnt->next_sub_policy = next_sub_policy;
16687                         mlx5_hrxq_release(dev, hrxq_idx[i]);
16688                 } else {
16689                         /*
16690                          * Overwrite the last action from
16691                          * RSS action to Queue action.
16692                          */
16693                         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
16694                                               hrxq_idx[i]);
16695                         if (!hrxq) {
16696                                 DRV_LOG(ERR, "Failed to get policy hrxq");
16697                                 goto rss_sub_policy_error;
16698                         }
16699                         act_cnt = &mtr_policy->act_cnt[i];
16700                         if (act_cnt->rix_mark || act_cnt->modify_hdr) {
16701                                 memset(&dh, 0, sizeof(struct mlx5_flow_handle));
16702                                 if (act_cnt->rix_mark)
16703                                         dh.mark = 1;
16704                                 dh.fate_action = MLX5_FLOW_FATE_QUEUE;
16705                                 dh.rix_hrxq = hrxq_idx[i];
16706                                 flow_drv_rxq_flags_set(dev, &dh);
16707                         }
16708                 }
16709         }
16710         if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16711                                                sub_policy, domain)) {
16712                 DRV_LOG(ERR, "Failed to create policy "
16713                         "rules for ingress domain.");
16714                 goto rss_sub_policy_error;
16715         }
16716         if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16717                 i = (mtr_policy->sub_policy_num >>
16718                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16719                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16720                 if (i >= MLX5_MTR_RSS_MAX_SUB_POLICY) {
16721                         DRV_LOG(ERR, "No free sub-policy slot.");
16722                         goto rss_sub_policy_error;
16723                 }
16724                 mtr_policy->sub_policys[domain][i] = sub_policy;
16725                 i++;
16726                 mtr_policy->sub_policy_num &= ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16727                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
16728                 mtr_policy->sub_policy_num |=
16729                         (i & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16730                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
16731         }
16732         rte_spinlock_unlock(&mtr_policy->sl);
16733         *is_reuse = false;
16734         return sub_policy;
16735 rss_sub_policy_error:
16736         if (sub_policy) {
16737                 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16738                 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16739                         i = (mtr_policy->sub_policy_num >>
16740                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16741                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16742                         mtr_policy->sub_policys[domain][i] = NULL;
16743                         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16744                                         sub_policy->idx);
16745                 }
16746         }
16747         rte_spinlock_unlock(&mtr_policy->sl);
16748         return NULL;
16749 }
16750
16751 /**
16752  * Find the policy table for prefix table with RSS.
16753  *
16754  * @param[in] dev
16755  *   Pointer to Ethernet device.
16756  * @param[in] mtr_policy
16757  *   Pointer to meter policy table.
16758  * @param[in] rss_desc
16759  *   Pointer to rss_desc
16760  * @return
16761  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
16762  */
16763 static struct mlx5_flow_meter_sub_policy *
16764 flow_dv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
16765                 struct mlx5_flow_meter_policy *mtr_policy,
16766                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
16767 {
16768         struct mlx5_priv *priv = dev->data->dev_private;
16769         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16770         struct mlx5_flow_meter_info *next_fm;
16771         struct mlx5_flow_meter_policy *next_policy;
16772         struct mlx5_flow_meter_sub_policy *next_sub_policy = NULL;
16773         struct mlx5_flow_meter_policy *policies[MLX5_MTR_CHAIN_MAX_NUM];
16774         struct mlx5_flow_meter_sub_policy *sub_policies[MLX5_MTR_CHAIN_MAX_NUM];
16775         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16776         bool reuse_sub_policy;
16777         uint32_t i = 0;
16778         uint32_t j = 0;
16779
16780         while (true) {
16781                 /* Iterate hierarchy to get all policies in this hierarchy. */
16782                 policies[i++] = mtr_policy;
16783                 if (!mtr_policy->is_hierarchy)
16784                         break;
16785                 if (i >= MLX5_MTR_CHAIN_MAX_NUM) {
16786                         DRV_LOG(ERR, "Exceed max meter number in hierarchy.");
16787                         return NULL;
16788                 }
16789                 next_fm = mlx5_flow_meter_find(priv,
16790                         mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
16791                 if (!next_fm) {
16792                         DRV_LOG(ERR, "Failed to get next meter in hierarchy.");
16793                         return NULL;
16794                 }
16795                 next_policy =
16796                         mlx5_flow_meter_policy_find(dev, next_fm->policy_id,
16797                                                     NULL);
16798                 MLX5_ASSERT(next_policy);
16799                 mtr_policy = next_policy;
16800         }
16801         while (i) {
16802                 /**
16803                  * From last policy to the first one in hierarchy,
16804                  * create / get the sub policy for each of them.
16805                  */
16806                 sub_policy = __flow_dv_meter_get_rss_sub_policy(dev,
16807                                                         policies[--i],
16808                                                         rss_desc,
16809                                                         next_sub_policy,
16810                                                         &reuse_sub_policy);
16811                 if (!sub_policy) {
16812                         DRV_LOG(ERR, "Failed to get the sub policy.");
16813                         goto err_exit;
16814                 }
16815                 if (!reuse_sub_policy)
16816                         sub_policies[j++] = sub_policy;
16817                 next_sub_policy = sub_policy;
16818         }
16819         return sub_policy;
16820 err_exit:
16821         while (j) {
16822                 uint16_t sub_policy_num;
16823
16824                 sub_policy = sub_policies[--j];
16825                 mtr_policy = sub_policy->main_policy;
16826                 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16827                 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16828                         sub_policy_num = (mtr_policy->sub_policy_num >>
16829                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16830                                 MLX5_MTR_SUB_POLICY_NUM_MASK;
16831                         mtr_policy->sub_policys[domain][sub_policy_num - 1] =
16832                                                                         NULL;
16833                         sub_policy_num--;
16834                         mtr_policy->sub_policy_num &=
16835                                 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16836                                   (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i));
16837                         mtr_policy->sub_policy_num |=
16838                         (sub_policy_num & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16839                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i);
16840                         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16841                                         sub_policy->idx);
16842                 }
16843         }
16844         return NULL;
16845 }
16846
16847 /**
16848  * Create the sub policy tag rule for all meters in hierarchy.
16849  *
16850  * @param[in] dev
16851  *   Pointer to Ethernet device.
16852  * @param[in] fm
16853  *   Meter information table.
16854  * @param[in] src_port
16855  *   The src port this extra rule should use.
16856  * @param[in] item
16857  *   The src port match item.
16858  * @param[out] error
16859  *   Perform verbose error reporting if not NULL.
16860  * @return
16861  *   0 on success, a negative errno value otherwise and rte_errno is set.
16862  */
16863 static int
16864 flow_dv_meter_hierarchy_rule_create(struct rte_eth_dev *dev,
16865                                 struct mlx5_flow_meter_info *fm,
16866                                 int32_t src_port,
16867                                 const struct rte_flow_item *item,
16868                                 struct rte_flow_error *error)
16869 {
16870         struct mlx5_priv *priv = dev->data->dev_private;
16871         struct mlx5_flow_meter_policy *mtr_policy;
16872         struct mlx5_flow_meter_sub_policy *sub_policy;
16873         struct mlx5_flow_meter_info *next_fm = NULL;
16874         struct mlx5_flow_meter_policy *next_policy;
16875         struct mlx5_flow_meter_sub_policy *next_sub_policy;
16876         struct mlx5_flow_tbl_data_entry *tbl_data;
16877         struct mlx5_sub_policy_color_rule *color_rule;
16878         struct mlx5_meter_policy_acts acts;
16879         uint32_t color_reg_c_idx;
16880         bool mtr_first = (src_port != UINT16_MAX) ? true : false;
16881         struct rte_flow_attr attr = {
16882                 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
16883                 .priority = 0,
16884                 .ingress = 0,
16885                 .egress = 0,
16886                 .transfer = 1,
16887                 .reserved = 0,
16888         };
16889         uint32_t domain = MLX5_MTR_DOMAIN_TRANSFER;
16890         int i;
16891
16892         mtr_policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
16893         MLX5_ASSERT(mtr_policy);
16894         if (!mtr_policy->is_hierarchy)
16895                 return 0;
16896         next_fm = mlx5_flow_meter_find(priv,
16897                         mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
16898         if (!next_fm) {
16899                 return rte_flow_error_set(error, EINVAL,
16900                                 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
16901                                 "Failed to find next meter in hierarchy.");
16902         }
16903         if (!next_fm->drop_cnt)
16904                 goto exit;
16905         color_reg_c_idx = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, error);
16906         sub_policy = mtr_policy->sub_policys[domain][0];
16907         for (i = 0; i < RTE_COLORS; i++) {
16908                 bool rule_exist = false;
16909                 struct mlx5_meter_policy_action_container *act_cnt;
16910
16911                 if (i >= RTE_COLOR_YELLOW)
16912                         break;
16913                 TAILQ_FOREACH(color_rule,
16914                               &sub_policy->color_rules[i], next_port)
16915                         if (color_rule->src_port == src_port) {
16916                                 rule_exist = true;
16917                                 break;
16918                         }
16919                 if (rule_exist)
16920                         continue;
16921                 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
16922                                 sizeof(struct mlx5_sub_policy_color_rule),
16923                                 0, SOCKET_ID_ANY);
16924                 if (!color_rule)
16925                         return rte_flow_error_set(error, ENOMEM,
16926                                 RTE_FLOW_ERROR_TYPE_ACTION,
16927                                 NULL, "No memory to create tag color rule.");
16928                 color_rule->src_port = src_port;
16929                 attr.priority = i;
16930                 next_policy = mlx5_flow_meter_policy_find(dev,
16931                                                 next_fm->policy_id, NULL);
16932                 MLX5_ASSERT(next_policy);
16933                 next_sub_policy = next_policy->sub_policys[domain][0];
16934                 tbl_data = container_of(next_sub_policy->tbl_rsc,
16935                                         struct mlx5_flow_tbl_data_entry, tbl);
16936                 act_cnt = &mtr_policy->act_cnt[i];
16937                 if (mtr_first) {
16938                         acts.dv_actions[0] = next_fm->meter_action;
16939                         acts.dv_actions[1] = act_cnt->modify_hdr->action;
16940                 } else {
16941                         acts.dv_actions[0] = act_cnt->modify_hdr->action;
16942                         acts.dv_actions[1] = next_fm->meter_action;
16943                 }
16944                 acts.dv_actions[2] = tbl_data->jump.action;
16945                 acts.actions_n = 3;
16946                 if (mlx5_flow_meter_attach(priv, next_fm, &attr, error)) {
16947                         next_fm = NULL;
16948                         goto err_exit;
16949                 }
16950                 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
16951                                 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
16952                                 &attr, true, item,
16953                                 &color_rule->matcher, error)) {
16954                         rte_flow_error_set(error, errno,
16955                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
16956                                 "Failed to create hierarchy meter matcher.");
16957                         goto err_exit;
16958                 }
16959                 if (__flow_dv_create_policy_flow(dev, color_reg_c_idx,
16960                                         (enum rte_color)i,
16961                                         color_rule->matcher->matcher_object,
16962                                         acts.actions_n, acts.dv_actions,
16963                                         true, item,
16964                                         &color_rule->rule, &attr)) {
16965                         rte_flow_error_set(error, errno,
16966                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
16967                                 "Failed to create hierarchy meter rule.");
16968                         goto err_exit;
16969                 }
16970                 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
16971                                   color_rule, next_port);
16972         }
16973 exit:
16974         /**
16975          * Recursive call to iterate all meters in hierarchy and
16976          * create needed rules.
16977          */
16978         return flow_dv_meter_hierarchy_rule_create(dev, next_fm,
16979                                                 src_port, item, error);
16980 err_exit:
16981         if (color_rule) {
16982                 if (color_rule->rule)
16983                         mlx5_flow_os_destroy_flow(color_rule->rule);
16984                 if (color_rule->matcher) {
16985                         struct mlx5_flow_tbl_data_entry *tbl =
16986                                 container_of(color_rule->matcher->tbl,
16987                                                 typeof(*tbl), tbl);
16988                         mlx5_list_unregister(tbl->matchers,
16989                                                 &color_rule->matcher->entry);
16990                 }
16991                 mlx5_free(color_rule);
16992         }
16993         if (next_fm)
16994                 mlx5_flow_meter_detach(priv, next_fm);
16995         return -rte_errno;
16996 }
16997
16998 /**
16999  * Destroy the sub policy table with RX queue.
17000  *
17001  * @param[in] dev
17002  *   Pointer to Ethernet device.
17003  * @param[in] mtr_policy
17004  *   Pointer to meter policy table.
17005  */
17006 static void
17007 flow_dv_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
17008                                     struct mlx5_flow_meter_policy *mtr_policy)
17009 {
17010         struct mlx5_priv *priv = dev->data->dev_private;
17011         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
17012         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
17013         uint32_t i, j;
17014         uint16_t sub_policy_num, new_policy_num;
17015
17016         rte_spinlock_lock(&mtr_policy->sl);
17017         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
17018                 switch (mtr_policy->act_cnt[i].fate_action) {
17019                 case MLX5_FLOW_FATE_SHARED_RSS:
17020                         sub_policy_num = (mtr_policy->sub_policy_num >>
17021                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17022                         MLX5_MTR_SUB_POLICY_NUM_MASK;
17023                         new_policy_num = sub_policy_num;
17024                         for (j = 0; j < sub_policy_num; j++) {
17025                                 sub_policy =
17026                                         mtr_policy->sub_policys[domain][j];
17027                                 if (sub_policy) {
17028                                         __flow_dv_destroy_sub_policy_rules(dev,
17029                                                 sub_policy);
17030                                 if (sub_policy !=
17031                                         mtr_policy->sub_policys[domain][0]) {
17032                                         mtr_policy->sub_policys[domain][j] =
17033                                                                 NULL;
17034                                         mlx5_ipool_free
17035                                 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17036                                                 sub_policy->idx);
17037                                                 new_policy_num--;
17038                                         }
17039                                 }
17040                         }
17041                         if (new_policy_num != sub_policy_num) {
17042                                 mtr_policy->sub_policy_num &=
17043                                 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17044                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
17045                                 mtr_policy->sub_policy_num |=
17046                                 (new_policy_num &
17047                                         MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17048                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
17049                         }
17050                         break;
17051                 case MLX5_FLOW_FATE_QUEUE:
17052                         sub_policy = mtr_policy->sub_policys[domain][0];
17053                         __flow_dv_destroy_sub_policy_rules(dev,
17054                                                            sub_policy);
17055                         break;
17056                 default:
17057                         /*Other actions without queue and do nothing*/
17058                         break;
17059                 }
17060         }
17061         rte_spinlock_unlock(&mtr_policy->sl);
17062 }
17063 /**
17064  * Check whether the DR drop action is supported on the root table or not.
17065  *
17066  * Create a simple flow with DR drop action on root table to validate
17067  * if DR drop action on root table is supported or not.
17068  *
17069  * @param[in] dev
17070  *   Pointer to rte_eth_dev structure.
17071  *
17072  * @return
17073  *   0 on success, a negative errno value otherwise and rte_errno is set.
17074  */
17075 int
17076 mlx5_flow_discover_dr_action_support(struct rte_eth_dev *dev)
17077 {
17078         struct mlx5_priv *priv = dev->data->dev_private;
17079         struct mlx5_dev_ctx_shared *sh = priv->sh;
17080         struct mlx5_flow_dv_match_params mask = {
17081                 .size = sizeof(mask.buf),
17082         };
17083         struct mlx5_flow_dv_match_params value = {
17084                 .size = sizeof(value.buf),
17085         };
17086         struct mlx5dv_flow_matcher_attr dv_attr = {
17087                 .type = IBV_FLOW_ATTR_NORMAL,
17088                 .priority = 0,
17089                 .match_criteria_enable = 0,
17090                 .match_mask = (void *)&mask,
17091         };
17092         struct mlx5_flow_tbl_resource *tbl = NULL;
17093         void *matcher = NULL;
17094         void *flow = NULL;
17095         int ret = -1;
17096
17097         tbl = flow_dv_tbl_resource_get(dev, 0, 0, 0, false, NULL,
17098                                         0, 0, 0, NULL);
17099         if (!tbl)
17100                 goto err;
17101         dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17102         __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17103         ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
17104                                                tbl->obj, &matcher);
17105         if (ret)
17106                 goto err;
17107         __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17108         ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17109                                        &sh->dr_drop_action, &flow);
17110 err:
17111         /*
17112          * If DR drop action is not supported on root table, flow create will
17113          * be failed with EOPNOTSUPP or EPROTONOSUPPORT.
17114          */
17115         if (!flow) {
17116                 if (matcher &&
17117                     (errno == EPROTONOSUPPORT || errno == EOPNOTSUPP))
17118                         DRV_LOG(INFO, "DR drop action is not supported in root table.");
17119                 else
17120                         DRV_LOG(ERR, "Unexpected error in DR drop action support detection");
17121                 ret = -1;
17122         } else {
17123                 claim_zero(mlx5_flow_os_destroy_flow(flow));
17124         }
17125         if (matcher)
17126                 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17127         if (tbl)
17128                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17129         return ret;
17130 }
17131
17132 /**
17133  * Validate the batch counter support in root table.
17134  *
17135  * Create a simple flow with invalid counter and drop action on root table to
17136  * validate if batch counter with offset on root table is supported or not.
17137  *
17138  * @param[in] dev
17139  *   Pointer to rte_eth_dev structure.
17140  *
17141  * @return
17142  *   0 on success, a negative errno value otherwise and rte_errno is set.
17143  */
17144 int
17145 mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)
17146 {
17147         struct mlx5_priv *priv = dev->data->dev_private;
17148         struct mlx5_dev_ctx_shared *sh = priv->sh;
17149         struct mlx5_flow_dv_match_params mask = {
17150                 .size = sizeof(mask.buf),
17151         };
17152         struct mlx5_flow_dv_match_params value = {
17153                 .size = sizeof(value.buf),
17154         };
17155         struct mlx5dv_flow_matcher_attr dv_attr = {
17156                 .type = IBV_FLOW_ATTR_NORMAL | IBV_FLOW_ATTR_FLAGS_EGRESS,
17157                 .priority = 0,
17158                 .match_criteria_enable = 0,
17159                 .match_mask = (void *)&mask,
17160         };
17161         void *actions[2] = { 0 };
17162         struct mlx5_flow_tbl_resource *tbl = NULL;
17163         struct mlx5_devx_obj *dcs = NULL;
17164         void *matcher = NULL;
17165         void *flow = NULL;
17166         int ret = -1;
17167
17168         tbl = flow_dv_tbl_resource_get(dev, 0, 1, 0, false, NULL,
17169                                         0, 0, 0, NULL);
17170         if (!tbl)
17171                 goto err;
17172         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0x4);
17173         if (!dcs)
17174                 goto err;
17175         ret = mlx5_flow_os_create_flow_action_count(dcs->obj, UINT16_MAX,
17176                                                     &actions[0]);
17177         if (ret)
17178                 goto err;
17179         dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17180         __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17181         ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
17182                                                tbl->obj, &matcher);
17183         if (ret)
17184                 goto err;
17185         __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17186         ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17187                                        actions, &flow);
17188 err:
17189         /*
17190          * If batch counter with offset is not supported, the driver will not
17191          * validate the invalid offset value, flow create should success.
17192          * In this case, it means batch counter is not supported in root table.
17193          *
17194          * Otherwise, if flow create is failed, counter offset is supported.
17195          */
17196         if (flow) {
17197                 DRV_LOG(INFO, "Batch counter is not supported in root "
17198                               "table. Switch to fallback mode.");
17199                 rte_errno = ENOTSUP;
17200                 ret = -rte_errno;
17201                 claim_zero(mlx5_flow_os_destroy_flow(flow));
17202         } else {
17203                 /* Check matcher to make sure validate fail at flow create. */
17204                 if (!matcher || (matcher && errno != EINVAL))
17205                         DRV_LOG(ERR, "Unexpected error in counter offset "
17206                                      "support detection");
17207                 ret = 0;
17208         }
17209         if (actions[0])
17210                 claim_zero(mlx5_flow_os_destroy_flow_action(actions[0]));
17211         if (matcher)
17212                 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17213         if (tbl)
17214                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17215         if (dcs)
17216                 claim_zero(mlx5_devx_cmd_destroy(dcs));
17217         return ret;
17218 }
17219
17220 /**
17221  * Query a devx counter.
17222  *
17223  * @param[in] dev
17224  *   Pointer to the Ethernet device structure.
17225  * @param[in] cnt
17226  *   Index to the flow counter.
17227  * @param[in] clear
17228  *   Set to clear the counter statistics.
17229  * @param[out] pkts
17230  *   The statistics value of packets.
17231  * @param[out] bytes
17232  *   The statistics value of bytes.
17233  *
17234  * @return
17235  *   0 on success, otherwise return -1.
17236  */
17237 static int
17238 flow_dv_counter_query(struct rte_eth_dev *dev, uint32_t counter, bool clear,
17239                       uint64_t *pkts, uint64_t *bytes)
17240 {
17241         struct mlx5_priv *priv = dev->data->dev_private;
17242         struct mlx5_flow_counter *cnt;
17243         uint64_t inn_pkts, inn_bytes;
17244         int ret;
17245
17246         if (!priv->sh->devx)
17247                 return -1;
17248
17249         ret = _flow_dv_query_count(dev, counter, &inn_pkts, &inn_bytes);
17250         if (ret)
17251                 return -1;
17252         cnt = flow_dv_counter_get_by_idx(dev, counter, NULL);
17253         *pkts = inn_pkts - cnt->hits;
17254         *bytes = inn_bytes - cnt->bytes;
17255         if (clear) {
17256                 cnt->hits = inn_pkts;
17257                 cnt->bytes = inn_bytes;
17258         }
17259         return 0;
17260 }
17261
17262 /**
17263  * Get aged-out flows.
17264  *
17265  * @param[in] dev
17266  *   Pointer to the Ethernet device structure.
17267  * @param[in] context
17268  *   The address of an array of pointers to the aged-out flows contexts.
17269  * @param[in] nb_contexts
17270  *   The length of context array pointers.
17271  * @param[out] error
17272  *   Perform verbose error reporting if not NULL. Initialized in case of
17273  *   error only.
17274  *
17275  * @return
17276  *   how many contexts get in success, otherwise negative errno value.
17277  *   if nb_contexts is 0, return the amount of all aged contexts.
17278  *   if nb_contexts is not 0 , return the amount of aged flows reported
17279  *   in the context array.
17280  * @note: only stub for now
17281  */
17282 static int
17283 flow_dv_get_aged_flows(struct rte_eth_dev *dev,
17284                     void **context,
17285                     uint32_t nb_contexts,
17286                     struct rte_flow_error *error)
17287 {
17288         struct mlx5_priv *priv = dev->data->dev_private;
17289         struct mlx5_age_info *age_info;
17290         struct mlx5_age_param *age_param;
17291         struct mlx5_flow_counter *counter;
17292         struct mlx5_aso_age_action *act;
17293         int nb_flows = 0;
17294
17295         if (nb_contexts && !context)
17296                 return rte_flow_error_set(error, EINVAL,
17297                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17298                                           NULL, "empty context");
17299         age_info = GET_PORT_AGE_INFO(priv);
17300         rte_spinlock_lock(&age_info->aged_sl);
17301         LIST_FOREACH(act, &age_info->aged_aso, next) {
17302                 nb_flows++;
17303                 if (nb_contexts) {
17304                         context[nb_flows - 1] =
17305                                                 act->age_params.context;
17306                         if (!(--nb_contexts))
17307                                 break;
17308                 }
17309         }
17310         TAILQ_FOREACH(counter, &age_info->aged_counters, next) {
17311                 nb_flows++;
17312                 if (nb_contexts) {
17313                         age_param = MLX5_CNT_TO_AGE(counter);
17314                         context[nb_flows - 1] = age_param->context;
17315                         if (!(--nb_contexts))
17316                                 break;
17317                 }
17318         }
17319         rte_spinlock_unlock(&age_info->aged_sl);
17320         MLX5_AGE_SET(age_info, MLX5_AGE_TRIGGER);
17321         return nb_flows;
17322 }
17323
17324 /*
17325  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
17326  */
17327 static uint32_t
17328 flow_dv_counter_allocate(struct rte_eth_dev *dev)
17329 {
17330         return flow_dv_counter_alloc(dev, 0);
17331 }
17332
17333 /**
17334  * Validate indirect action.
17335  * Dispatcher for action type specific validation.
17336  *
17337  * @param[in] dev
17338  *   Pointer to the Ethernet device structure.
17339  * @param[in] conf
17340  *   Indirect action configuration.
17341  * @param[in] action
17342  *   The indirect action object to validate.
17343  * @param[out] error
17344  *   Perform verbose error reporting if not NULL. Initialized in case of
17345  *   error only.
17346  *
17347  * @return
17348  *   0 on success, otherwise negative errno value.
17349  */
17350 static int
17351 flow_dv_action_validate(struct rte_eth_dev *dev,
17352                         const struct rte_flow_indir_action_conf *conf,
17353                         const struct rte_flow_action *action,
17354                         struct rte_flow_error *err)
17355 {
17356         struct mlx5_priv *priv = dev->data->dev_private;
17357
17358         RTE_SET_USED(conf);
17359         switch (action->type) {
17360         case RTE_FLOW_ACTION_TYPE_RSS:
17361                 /*
17362                  * priv->obj_ops is set according to driver capabilities.
17363                  * When DevX capabilities are
17364                  * sufficient, it is set to devx_obj_ops.
17365                  * Otherwise, it is set to ibv_obj_ops.
17366                  * ibv_obj_ops doesn't support ind_table_modify operation.
17367                  * In this case the indirect RSS action can't be used.
17368                  */
17369                 if (priv->obj_ops.ind_table_modify == NULL)
17370                         return rte_flow_error_set
17371                                         (err, ENOTSUP,
17372                                          RTE_FLOW_ERROR_TYPE_ACTION,
17373                                          NULL,
17374                                          "Indirect RSS action not supported");
17375                 return mlx5_validate_action_rss(dev, action, err);
17376         case RTE_FLOW_ACTION_TYPE_AGE:
17377                 if (!priv->sh->aso_age_mng)
17378                         return rte_flow_error_set(err, ENOTSUP,
17379                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17380                                                 NULL,
17381                                                 "Indirect age action not supported");
17382                 return flow_dv_validate_action_age(0, action, dev, err);
17383         case RTE_FLOW_ACTION_TYPE_COUNT:
17384                 return flow_dv_validate_action_count(dev, true, 0, err);
17385         case RTE_FLOW_ACTION_TYPE_CONNTRACK:
17386                 if (!priv->sh->ct_aso_en)
17387                         return rte_flow_error_set(err, ENOTSUP,
17388                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17389                                         "ASO CT is not supported");
17390                 return mlx5_validate_action_ct(dev, action->conf, err);
17391         default:
17392                 return rte_flow_error_set(err, ENOTSUP,
17393                                           RTE_FLOW_ERROR_TYPE_ACTION,
17394                                           NULL,
17395                                           "action type not supported");
17396         }
17397 }
17398
17399 /*
17400  * Check if the RSS configurations for colors of a meter policy match
17401  * each other, except the queues.
17402  *
17403  * @param[in] r1
17404  *   Pointer to the first RSS flow action.
17405  * @param[in] r2
17406  *   Pointer to the second RSS flow action.
17407  *
17408  * @return
17409  *   0 on match, 1 on conflict.
17410  */
17411 static inline int
17412 flow_dv_mtr_policy_rss_compare(const struct rte_flow_action_rss *r1,
17413                                const struct rte_flow_action_rss *r2)
17414 {
17415         if (!r1 || !r2)
17416                 return 0;
17417         if (r1->func != r2->func || r1->level != r2->level ||
17418             r1->types != r2->types || r1->key_len != r2->key_len ||
17419             memcmp(r1->key, r2->key, r1->key_len))
17420                 return 1;
17421         return 0;
17422 }
17423
17424 /**
17425  * Validate the meter hierarchy chain for meter policy.
17426  *
17427  * @param[in] dev
17428  *   Pointer to the Ethernet device structure.
17429  * @param[in] meter_id
17430  *   Meter id.
17431  * @param[in] action_flags
17432  *   Holds the actions detected until now.
17433  * @param[out] is_rss
17434  *   Is RSS or not.
17435  * @param[out] hierarchy_domain
17436  *   The domain bitmap for hierarchy policy.
17437  * @param[out] error
17438  *   Perform verbose error reporting if not NULL. Initialized in case of
17439  *   error only.
17440  *
17441  * @return
17442  *   0 on success, otherwise negative errno value with error set.
17443  */
17444 static int
17445 flow_dv_validate_policy_mtr_hierarchy(struct rte_eth_dev *dev,
17446                                   uint32_t meter_id,
17447                                   uint64_t action_flags,
17448                                   bool *is_rss,
17449                                   uint8_t *hierarchy_domain,
17450                                   struct rte_mtr_error *error)
17451 {
17452         struct mlx5_priv *priv = dev->data->dev_private;
17453         struct mlx5_flow_meter_info *fm;
17454         struct mlx5_flow_meter_policy *policy;
17455         uint8_t cnt = 1;
17456
17457         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
17458                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17459                 return -rte_mtr_error_set(error, EINVAL,
17460                                         RTE_MTR_ERROR_TYPE_POLICER_ACTION_GREEN,
17461                                         NULL,
17462                                         "Multiple fate actions not supported.");
17463         *hierarchy_domain = 0;
17464         while (true) {
17465                 fm = mlx5_flow_meter_find(priv, meter_id, NULL);
17466                 if (!fm)
17467                         return -rte_mtr_error_set(error, EINVAL,
17468                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17469                                         "Meter not found in meter hierarchy.");
17470                 if (fm->def_policy)
17471                         return -rte_mtr_error_set(error, EINVAL,
17472                                         RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17473                         "Non termination meter not supported in hierarchy.");
17474                 policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
17475                 MLX5_ASSERT(policy);
17476                 /**
17477                  * Only inherit the supported domains of the first meter in
17478                  * hierarchy.
17479                  * One meter supports at least one domain.
17480                  */
17481                 if (!*hierarchy_domain) {
17482                         if (policy->transfer)
17483                                 *hierarchy_domain |=
17484                                                 MLX5_MTR_DOMAIN_TRANSFER_BIT;
17485                         if (policy->ingress)
17486                                 *hierarchy_domain |=
17487                                                 MLX5_MTR_DOMAIN_INGRESS_BIT;
17488                         if (policy->egress)
17489                                 *hierarchy_domain |= MLX5_MTR_DOMAIN_EGRESS_BIT;
17490                 }
17491                 if (!policy->is_hierarchy) {
17492                         *is_rss = policy->is_rss;
17493                         break;
17494                 }
17495                 meter_id = policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id;
17496                 if (++cnt >= MLX5_MTR_CHAIN_MAX_NUM)
17497                         return -rte_mtr_error_set(error, EINVAL,
17498                                         RTE_MTR_ERROR_TYPE_METER_POLICY, NULL,
17499                                         "Exceed max hierarchy meter number.");
17500         }
17501         return 0;
17502 }
17503
17504 /**
17505  * Validate meter policy actions.
17506  * Dispatcher for action type specific validation.
17507  *
17508  * @param[in] dev
17509  *   Pointer to the Ethernet device structure.
17510  * @param[in] action
17511  *   The meter policy action object to validate.
17512  * @param[in] attr
17513  *   Attributes of flow to determine steering domain.
17514  * @param[out] error
17515  *   Perform verbose error reporting if not NULL. Initialized in case of
17516  *   error only.
17517  *
17518  * @return
17519  *   0 on success, otherwise negative errno value.
17520  */
17521 static int
17522 flow_dv_validate_mtr_policy_acts(struct rte_eth_dev *dev,
17523                         const struct rte_flow_action *actions[RTE_COLORS],
17524                         struct rte_flow_attr *attr,
17525                         bool *is_rss,
17526                         uint8_t *domain_bitmap,
17527                         uint8_t *policy_mode,
17528                         struct rte_mtr_error *error)
17529 {
17530         struct mlx5_priv *priv = dev->data->dev_private;
17531         struct mlx5_dev_config *dev_conf = &priv->config;
17532         const struct rte_flow_action *act;
17533         uint64_t action_flags[RTE_COLORS] = {0};
17534         int actions_n;
17535         int i, ret;
17536         struct rte_flow_error flow_err;
17537         uint8_t domain_color[RTE_COLORS] = {0};
17538         uint8_t def_domain = MLX5_MTR_ALL_DOMAIN_BIT;
17539         uint8_t hierarchy_domain = 0;
17540         const struct rte_flow_action_meter *mtr;
17541         bool def_green = false;
17542         bool def_yellow = false;
17543         const struct rte_flow_action_rss *rss_color[RTE_COLORS] = {NULL};
17544
17545         if (!priv->config.dv_esw_en)
17546                 def_domain &= ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
17547         *domain_bitmap = def_domain;
17548         /* Red color could only support DROP action. */
17549         if (!actions[RTE_COLOR_RED] ||
17550             actions[RTE_COLOR_RED]->type != RTE_FLOW_ACTION_TYPE_DROP)
17551                 return -rte_mtr_error_set(error, ENOTSUP,
17552                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17553                                 NULL, "Red color only supports drop action.");
17554         /*
17555          * Check default policy actions:
17556          * Green / Yellow: no action, Red: drop action
17557          * Either G or Y will trigger default policy actions to be created.
17558          */
17559         if (!actions[RTE_COLOR_GREEN] ||
17560             actions[RTE_COLOR_GREEN]->type == RTE_FLOW_ACTION_TYPE_END)
17561                 def_green = true;
17562         if (!actions[RTE_COLOR_YELLOW] ||
17563             actions[RTE_COLOR_YELLOW]->type == RTE_FLOW_ACTION_TYPE_END)
17564                 def_yellow = true;
17565         if (def_green && def_yellow) {
17566                 *policy_mode = MLX5_MTR_POLICY_MODE_DEF;
17567                 return 0;
17568         } else if (!def_green && def_yellow) {
17569                 *policy_mode = MLX5_MTR_POLICY_MODE_OG;
17570         } else if (def_green && !def_yellow) {
17571                 *policy_mode = MLX5_MTR_POLICY_MODE_OY;
17572         }
17573         /* Set to empty string in case of NULL pointer access by user. */
17574         flow_err.message = "";
17575         for (i = 0; i < RTE_COLORS; i++) {
17576                 act = actions[i];
17577                 for (action_flags[i] = 0, actions_n = 0;
17578                      act && act->type != RTE_FLOW_ACTION_TYPE_END;
17579                      act++) {
17580                         if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
17581                                 return -rte_mtr_error_set(error, ENOTSUP,
17582                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17583                                           NULL, "too many actions");
17584                         switch (act->type) {
17585                         case RTE_FLOW_ACTION_TYPE_PORT_ID:
17586                         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
17587                                 if (!priv->config.dv_esw_en)
17588                                         return -rte_mtr_error_set(error,
17589                                         ENOTSUP,
17590                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17591                                         NULL, "PORT action validate check"
17592                                         " fail for ESW disable");
17593                                 ret = flow_dv_validate_action_port_id(dev,
17594                                                 action_flags[i],
17595                                                 act, attr, &flow_err);
17596                                 if (ret)
17597                                         return -rte_mtr_error_set(error,
17598                                         ENOTSUP,
17599                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17600                                         NULL, flow_err.message ?
17601                                         flow_err.message :
17602                                         "PORT action validate check fail");
17603                                 ++actions_n;
17604                                 action_flags[i] |= MLX5_FLOW_ACTION_PORT_ID;
17605                                 break;
17606                         case RTE_FLOW_ACTION_TYPE_MARK:
17607                                 ret = flow_dv_validate_action_mark(dev, act,
17608                                                            action_flags[i],
17609                                                            attr, &flow_err);
17610                                 if (ret < 0)
17611                                         return -rte_mtr_error_set(error,
17612                                         ENOTSUP,
17613                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17614                                         NULL, flow_err.message ?
17615                                         flow_err.message :
17616                                         "Mark action validate check fail");
17617                                 if (dev_conf->dv_xmeta_en !=
17618                                         MLX5_XMETA_MODE_LEGACY)
17619                                         return -rte_mtr_error_set(error,
17620                                         ENOTSUP,
17621                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17622                                         NULL, "Extend MARK action is "
17623                                         "not supported. Please try use "
17624                                         "default policy for meter.");
17625                                 action_flags[i] |= MLX5_FLOW_ACTION_MARK;
17626                                 ++actions_n;
17627                                 break;
17628                         case RTE_FLOW_ACTION_TYPE_SET_TAG:
17629                                 ret = flow_dv_validate_action_set_tag(dev,
17630                                                         act, action_flags[i],
17631                                                         attr, &flow_err);
17632                                 if (ret)
17633                                         return -rte_mtr_error_set(error,
17634                                         ENOTSUP,
17635                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17636                                         NULL, flow_err.message ?
17637                                         flow_err.message :
17638                                         "Set tag action validate check fail");
17639                                 action_flags[i] |= MLX5_FLOW_ACTION_SET_TAG;
17640                                 ++actions_n;
17641                                 break;
17642                         case RTE_FLOW_ACTION_TYPE_DROP:
17643                                 ret = mlx5_flow_validate_action_drop
17644                                         (action_flags[i], attr, &flow_err);
17645                                 if (ret < 0)
17646                                         return -rte_mtr_error_set(error,
17647                                         ENOTSUP,
17648                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17649                                         NULL, flow_err.message ?
17650                                         flow_err.message :
17651                                         "Drop action validate check fail");
17652                                 action_flags[i] |= MLX5_FLOW_ACTION_DROP;
17653                                 ++actions_n;
17654                                 break;
17655                         case RTE_FLOW_ACTION_TYPE_QUEUE:
17656                                 /*
17657                                  * Check whether extensive
17658                                  * metadata feature is engaged.
17659                                  */
17660                                 if (dev_conf->dv_flow_en &&
17661                                     (dev_conf->dv_xmeta_en !=
17662                                      MLX5_XMETA_MODE_LEGACY) &&
17663                                     mlx5_flow_ext_mreg_supported(dev))
17664                                         return -rte_mtr_error_set(error,
17665                                           ENOTSUP,
17666                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17667                                           NULL, "Queue action with meta "
17668                                           "is not supported. Please try use "
17669                                           "default policy for meter.");
17670                                 ret = mlx5_flow_validate_action_queue(act,
17671                                                         action_flags[i], dev,
17672                                                         attr, &flow_err);
17673                                 if (ret < 0)
17674                                         return -rte_mtr_error_set(error,
17675                                           ENOTSUP,
17676                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17677                                           NULL, flow_err.message ?
17678                                           flow_err.message :
17679                                           "Queue action validate check fail");
17680                                 action_flags[i] |= MLX5_FLOW_ACTION_QUEUE;
17681                                 ++actions_n;
17682                                 break;
17683                         case RTE_FLOW_ACTION_TYPE_RSS:
17684                                 if (dev_conf->dv_flow_en &&
17685                                     (dev_conf->dv_xmeta_en !=
17686                                      MLX5_XMETA_MODE_LEGACY) &&
17687                                     mlx5_flow_ext_mreg_supported(dev))
17688                                         return -rte_mtr_error_set(error,
17689                                           ENOTSUP,
17690                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17691                                           NULL, "RSS action with meta "
17692                                           "is not supported. Please try use "
17693                                           "default policy for meter.");
17694                                 ret = mlx5_validate_action_rss(dev, act,
17695                                                                &flow_err);
17696                                 if (ret < 0)
17697                                         return -rte_mtr_error_set(error,
17698                                           ENOTSUP,
17699                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17700                                           NULL, flow_err.message ?
17701                                           flow_err.message :
17702                                           "RSS action validate check fail");
17703                                 action_flags[i] |= MLX5_FLOW_ACTION_RSS;
17704                                 ++actions_n;
17705                                 /* Either G or Y will set the RSS. */
17706                                 rss_color[i] = act->conf;
17707                                 break;
17708                         case RTE_FLOW_ACTION_TYPE_JUMP:
17709                                 ret = flow_dv_validate_action_jump(dev,
17710                                         NULL, act, action_flags[i],
17711                                         attr, true, &flow_err);
17712                                 if (ret)
17713                                         return -rte_mtr_error_set(error,
17714                                           ENOTSUP,
17715                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17716                                           NULL, flow_err.message ?
17717                                           flow_err.message :
17718                                           "Jump action validate check fail");
17719                                 ++actions_n;
17720                                 action_flags[i] |= MLX5_FLOW_ACTION_JUMP;
17721                                 break;
17722                         /*
17723                          * Only the last meter in the hierarchy will support
17724                          * the YELLOW color steering. Then in the meter policy
17725                          * actions list, there should be no other meter inside.
17726                          */
17727                         case RTE_FLOW_ACTION_TYPE_METER:
17728                                 if (i != RTE_COLOR_GREEN)
17729                                         return -rte_mtr_error_set(error,
17730                                                 ENOTSUP,
17731                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17732                                                 NULL,
17733                                                 "Meter hierarchy only supports GREEN color.");
17734                                 if (*policy_mode != MLX5_MTR_POLICY_MODE_OG)
17735                                         return -rte_mtr_error_set(error,
17736                                                 ENOTSUP,
17737                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17738                                                 NULL,
17739                                                 "No yellow policy should be provided in meter hierarchy.");
17740                                 mtr = act->conf;
17741                                 ret = flow_dv_validate_policy_mtr_hierarchy(dev,
17742                                                         mtr->mtr_id,
17743                                                         action_flags[i],
17744                                                         is_rss,
17745                                                         &hierarchy_domain,
17746                                                         error);
17747                                 if (ret)
17748                                         return ret;
17749                                 ++actions_n;
17750                                 action_flags[i] |=
17751                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
17752                                 break;
17753                         default:
17754                                 return -rte_mtr_error_set(error, ENOTSUP,
17755                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17756                                         NULL,
17757                                         "Doesn't support optional action");
17758                         }
17759                 }
17760                 if (action_flags[i] & MLX5_FLOW_ACTION_PORT_ID) {
17761                         domain_color[i] = MLX5_MTR_DOMAIN_TRANSFER_BIT;
17762                 } else if ((action_flags[i] &
17763                           (MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_QUEUE)) ||
17764                           (action_flags[i] & MLX5_FLOW_ACTION_MARK)) {
17765                         /*
17766                          * Only support MLX5_XMETA_MODE_LEGACY
17767                          * so MARK action is only in ingress domain.
17768                          */
17769                         domain_color[i] = MLX5_MTR_DOMAIN_INGRESS_BIT;
17770                 } else {
17771                         domain_color[i] = def_domain;
17772                         if (action_flags[i] &&
17773                             !(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17774                                 domain_color[i] &=
17775                                 ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
17776                 }
17777                 if (action_flags[i] &
17778                     MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
17779                         domain_color[i] &= hierarchy_domain;
17780                 /*
17781                  * Non-termination actions only support NIC Tx domain.
17782                  * The adjustion should be skipped when there is no
17783                  * action or only END is provided. The default domains
17784                  * bit-mask is set to find the MIN intersection.
17785                  * The action flags checking should also be skipped.
17786                  */
17787                 if ((def_green && i == RTE_COLOR_GREEN) ||
17788                     (def_yellow && i == RTE_COLOR_YELLOW))
17789                         continue;
17790                 /*
17791                  * Validate the drop action mutual exclusion
17792                  * with other actions. Drop action is mutually-exclusive
17793                  * with any other action, except for Count action.
17794                  */
17795                 if ((action_flags[i] & MLX5_FLOW_ACTION_DROP) &&
17796                     (action_flags[i] & ~MLX5_FLOW_ACTION_DROP)) {
17797                         return -rte_mtr_error_set(error, ENOTSUP,
17798                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17799                                 NULL, "Drop action is mutually-exclusive "
17800                                 "with any other action");
17801                 }
17802                 /* Eswitch has few restrictions on using items and actions */
17803                 if (domain_color[i] & MLX5_MTR_DOMAIN_TRANSFER_BIT) {
17804                         if (!mlx5_flow_ext_mreg_supported(dev) &&
17805                             action_flags[i] & MLX5_FLOW_ACTION_MARK)
17806                                 return -rte_mtr_error_set(error, ENOTSUP,
17807                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17808                                         NULL, "unsupported action MARK");
17809                         if (action_flags[i] & MLX5_FLOW_ACTION_QUEUE)
17810                                 return -rte_mtr_error_set(error, ENOTSUP,
17811                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17812                                         NULL, "unsupported action QUEUE");
17813                         if (action_flags[i] & MLX5_FLOW_ACTION_RSS)
17814                                 return -rte_mtr_error_set(error, ENOTSUP,
17815                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17816                                         NULL, "unsupported action RSS");
17817                         if (!(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17818                                 return -rte_mtr_error_set(error, ENOTSUP,
17819                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17820                                         NULL, "no fate action is found");
17821                 } else {
17822                         if (!(action_flags[i] & MLX5_FLOW_FATE_ACTIONS) &&
17823                             (domain_color[i] & MLX5_MTR_DOMAIN_INGRESS_BIT)) {
17824                                 if ((domain_color[i] &
17825                                      MLX5_MTR_DOMAIN_EGRESS_BIT))
17826                                         domain_color[i] =
17827                                                 MLX5_MTR_DOMAIN_EGRESS_BIT;
17828                                 else
17829                                         return -rte_mtr_error_set(error,
17830                                                 ENOTSUP,
17831                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17832                                                 NULL,
17833                                                 "no fate action is found");
17834                         }
17835                 }
17836         }
17837         /* If both colors have RSS, the attributes should be the same. */
17838         if (flow_dv_mtr_policy_rss_compare(rss_color[RTE_COLOR_GREEN],
17839                                            rss_color[RTE_COLOR_YELLOW]))
17840                 return -rte_mtr_error_set(error, EINVAL,
17841                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17842                                           NULL, "policy RSS attr conflict");
17843         if (rss_color[RTE_COLOR_GREEN] || rss_color[RTE_COLOR_YELLOW])
17844                 *is_rss = true;
17845         /* "domain_color[C]" is non-zero for each color, default is ALL. */
17846         if (!def_green && !def_yellow &&
17847             domain_color[RTE_COLOR_GREEN] != domain_color[RTE_COLOR_YELLOW] &&
17848             !(action_flags[RTE_COLOR_GREEN] & MLX5_FLOW_ACTION_DROP) &&
17849             !(action_flags[RTE_COLOR_YELLOW] & MLX5_FLOW_ACTION_DROP))
17850                 return -rte_mtr_error_set(error, EINVAL,
17851                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17852                                           NULL, "policy domains conflict");
17853         /*
17854          * At least one color policy is listed in the actions, the domains
17855          * to be supported should be the intersection.
17856          */
17857         *domain_bitmap = domain_color[RTE_COLOR_GREEN] &
17858                          domain_color[RTE_COLOR_YELLOW];
17859         return 0;
17860 }
17861
17862 static int
17863 flow_dv_sync_domain(struct rte_eth_dev *dev, uint32_t domains, uint32_t flags)
17864 {
17865         struct mlx5_priv *priv = dev->data->dev_private;
17866         int ret = 0;
17867
17868         if ((domains & MLX5_DOMAIN_BIT_NIC_RX) && priv->sh->rx_domain != NULL) {
17869                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->rx_domain,
17870                                                 flags);
17871                 if (ret != 0)
17872                         return ret;
17873         }
17874         if ((domains & MLX5_DOMAIN_BIT_NIC_TX) && priv->sh->tx_domain != NULL) {
17875                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->tx_domain, flags);
17876                 if (ret != 0)
17877                         return ret;
17878         }
17879         if ((domains & MLX5_DOMAIN_BIT_FDB) && priv->sh->fdb_domain != NULL) {
17880                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->fdb_domain, flags);
17881                 if (ret != 0)
17882                         return ret;
17883         }
17884         return 0;
17885 }
17886
17887 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
17888         .validate = flow_dv_validate,
17889         .prepare = flow_dv_prepare,
17890         .translate = flow_dv_translate,
17891         .apply = flow_dv_apply,
17892         .remove = flow_dv_remove,
17893         .destroy = flow_dv_destroy,
17894         .query = flow_dv_query,
17895         .create_mtr_tbls = flow_dv_create_mtr_tbls,
17896         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbls,
17897         .destroy_mtr_drop_tbls = flow_dv_destroy_mtr_drop_tbls,
17898         .create_meter = flow_dv_mtr_alloc,
17899         .free_meter = flow_dv_aso_mtr_release_to_pool,
17900         .validate_mtr_acts = flow_dv_validate_mtr_policy_acts,
17901         .create_mtr_acts = flow_dv_create_mtr_policy_acts,
17902         .destroy_mtr_acts = flow_dv_destroy_mtr_policy_acts,
17903         .create_policy_rules = flow_dv_create_policy_rules,
17904         .destroy_policy_rules = flow_dv_destroy_policy_rules,
17905         .create_def_policy = flow_dv_create_def_policy,
17906         .destroy_def_policy = flow_dv_destroy_def_policy,
17907         .meter_sub_policy_rss_prepare = flow_dv_meter_sub_policy_rss_prepare,
17908         .meter_hierarchy_rule_create = flow_dv_meter_hierarchy_rule_create,
17909         .destroy_sub_policy_with_rxq = flow_dv_destroy_sub_policy_with_rxq,
17910         .counter_alloc = flow_dv_counter_allocate,
17911         .counter_free = flow_dv_counter_free,
17912         .counter_query = flow_dv_counter_query,
17913         .get_aged_flows = flow_dv_get_aged_flows,
17914         .action_validate = flow_dv_action_validate,
17915         .action_create = flow_dv_action_create,
17916         .action_destroy = flow_dv_action_destroy,
17917         .action_update = flow_dv_action_update,
17918         .action_query = flow_dv_action_query,
17919         .sync_domain = flow_dv_sync_domain,
17920 };
17921
17922 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
17923