drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 #include <rte_common.h>
  12 #include <rte_ether.h>
  13 #include <ethdev_driver.h>
  14 #include <rte_flow.h>
  15 #include <rte_flow_driver.h>
  16 #include <rte_malloc.h>
  17 #include <rte_cycles.h>
  18 #include <rte_ip.h>
  19 #include <rte_gre.h>
  20 #include <rte_vxlan.h>
  21 #include <rte_gtp.h>
  22 #include <rte_eal_paging.h>
  23 #include <rte_mpls.h>
  24 #include <rte_mtr.h>
  25 #include <rte_mtr_driver.h>
  26 #include <rte_tailq.h>
  27
  28 #include <mlx5_glue.h>
  29 #include <mlx5_devx_cmds.h>
  30 #include <mlx5_prm.h>
  31 #include <mlx5_malloc.h>
  32
  33 #include "mlx5_defs.h"
  34 #include "mlx5.h"
  35 #include "mlx5_common_os.h"
  36 #include "mlx5_flow.h"
  37 #include "mlx5_flow_os.h"
  38 #include "mlx5_rx.h"
  39 #include "mlx5_tx.h"
  40 #include "rte_pmd_mlx5.h"
  41
  42 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  43
  44 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  45 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  46 #endif
  47
  48 #ifndef HAVE_MLX5DV_DR_ESWITCH
  49 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  50 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  51 #endif
  52 #endif
  53
  54 #ifndef HAVE_MLX5DV_DR
  55 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  56 #endif
  57
  58 /* VLAN header definitions */
  59 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  60 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  61 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  62 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  63 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  64
  65 union flow_dv_attr {
  66         struct {
  67                 uint32_t valid:1;
  68                 uint32_t ipv4:1;
  69                 uint32_t ipv6:1;
  70                 uint32_t tcp:1;
  71                 uint32_t udp:1;
  72                 uint32_t reserved:27;
  73         };
  74         uint32_t attr;
  75 };
  76
  77 static int
  78 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
  79                              struct mlx5_flow_tbl_resource *tbl);
  80
  81 static int
  82 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
  83                                      uint32_t encap_decap_idx);
  84
  85 static int
  86 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
  87                                         uint32_t port_id);
  88 static void
  89 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss);
  90
  91 static int
  92 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
  93                                   uint32_t rix_jump);
  94
  95 /**
  96  * Initialize flow attributes structure according to flow items' types.
  97  *
  98  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
  99  * mode. For tunnel mode, the items to be modified are the outermost ones.
 100  *
 101  * @param[in] item
 102  *   Pointer to item specification.
 103  * @param[out] attr
 104  *   Pointer to flow attributes structure.
 105  * @param[in] dev_flow
 106  *   Pointer to the sub flow.
 107  * @param[in] tunnel_decap
 108  *   Whether action is after tunnel decapsulation.
 109  */
 110 static void
 111 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
 112                   struct mlx5_flow *dev_flow, bool tunnel_decap)
 113 {
 114         uint64_t layers = dev_flow->handle->layers;
 115
 116         /*
 117          * If layers is already initialized, it means this dev_flow is the
 118          * suffix flow, the layers flags is set by the prefix flow. Need to
 119          * use the layer flags from prefix flow as the suffix flow may not
 120          * have the user defined items as the flow is split.
 121          */
 122         if (layers) {
 123                 if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
 124                         attr->ipv4 = 1;
 125                 else if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
 126                         attr->ipv6 = 1;
 127                 if (layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
 128                         attr->tcp = 1;
 129                 else if (layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
 130                         attr->udp = 1;
 131                 attr->valid = 1;
 132                 return;
 133         }
 134         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 135                 uint8_t next_protocol = 0xff;
 136                 switch (item->type) {
 137                 case RTE_FLOW_ITEM_TYPE_GRE:
 138                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 139                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 140                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 141                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 142                 case RTE_FLOW_ITEM_TYPE_MPLS:
 143                         if (tunnel_decap)
 144                                 attr->attr = 0;
 145                         break;
 146                 case RTE_FLOW_ITEM_TYPE_IPV4:
 147                         if (!attr->ipv6)
 148                                 attr->ipv4 = 1;
 149                         if (item->mask != NULL &&
 150                             ((const struct rte_flow_item_ipv4 *)
 151                             item->mask)->hdr.next_proto_id)
 152                                 next_protocol =
 153                                     ((const struct rte_flow_item_ipv4 *)
 154                                       (item->spec))->hdr.next_proto_id &
 155                                     ((const struct rte_flow_item_ipv4 *)
 156                                       (item->mask))->hdr.next_proto_id;
 157                         if ((next_protocol == IPPROTO_IPIP ||
 158                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 159                                 attr->attr = 0;
 160                         break;
 161                 case RTE_FLOW_ITEM_TYPE_IPV6:
 162                         if (!attr->ipv4)
 163                                 attr->ipv6 = 1;
 164                         if (item->mask != NULL &&
 165                             ((const struct rte_flow_item_ipv6 *)
 166                             item->mask)->hdr.proto)
 167                                 next_protocol =
 168                                     ((const struct rte_flow_item_ipv6 *)
 169                                       (item->spec))->hdr.proto &
 170                                     ((const struct rte_flow_item_ipv6 *)
 171                                       (item->mask))->hdr.proto;
 172                         if ((next_protocol == IPPROTO_IPIP ||
 173                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 174                                 attr->attr = 0;
 175                         break;
 176                 case RTE_FLOW_ITEM_TYPE_UDP:
 177                         if (!attr->tcp)
 178                                 attr->udp = 1;
 179                         break;
 180                 case RTE_FLOW_ITEM_TYPE_TCP:
 181                         if (!attr->udp)
 182                                 attr->tcp = 1;
 183                         break;
 184                 default:
 185                         break;
 186                 }
 187         }
 188         attr->valid = 1;
 189 }
 190
 191 /*
 192  * Convert rte_mtr_color to mlx5 color.
 193  *
 194  * @param[in] rcol
 195  *   rte_mtr_color.
 196  *
 197  * @return
 198  *   mlx5 color.
 199  */
 200 static inline int
 201 rte_col_2_mlx5_col(enum rte_color rcol)
 202 {
 203         switch (rcol) {
 204         case RTE_COLOR_GREEN:
 205                 return MLX5_FLOW_COLOR_GREEN;
 206         case RTE_COLOR_YELLOW:
 207                 return MLX5_FLOW_COLOR_YELLOW;
 208         case RTE_COLOR_RED:
 209                 return MLX5_FLOW_COLOR_RED;
 210         default:
 211                 break;
 212         }
 213         return MLX5_FLOW_COLOR_UNDEFINED;
 214 }
 215
 216 struct field_modify_info {
 217         uint32_t size; /* Size of field in protocol header, in bytes. */
 218         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 219         enum mlx5_modification_field id;
 220 };
 221
 222 struct field_modify_info modify_eth[] = {
 223         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 224         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 225         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 226         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 227         {0, 0, 0},
 228 };
 229
 230 struct field_modify_info modify_vlan_out_first_vid[] = {
 231         /* Size in bits !!! */
 232         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 233         {0, 0, 0},
 234 };
 235
 236 struct field_modify_info modify_ipv4[] = {
 237         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 238         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 239         {4, 12, MLX5_MODI_OUT_SIPV4},
 240         {4, 16, MLX5_MODI_OUT_DIPV4},
 241         {0, 0, 0},
 242 };
 243
 244 struct field_modify_info modify_ipv6[] = {
 245         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 246         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 247         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 248         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 249         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 250         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 251         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 252         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 253         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 254         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 255         {0, 0, 0},
 256 };
 257
 258 struct field_modify_info modify_udp[] = {
 259         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 260         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 261         {0, 0, 0},
 262 };
 263
 264 struct field_modify_info modify_tcp[] = {
 265         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 266         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 267         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 268         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 269         {0, 0, 0},
 270 };
 271
 272 static const struct rte_flow_item *
 273 mlx5_flow_find_tunnel_item(const struct rte_flow_item *item)
 274 {
 275         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 276                 switch (item->type) {
 277                 default:
 278                         break;
 279                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 280                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 281                 case RTE_FLOW_ITEM_TYPE_GRE:
 282                 case RTE_FLOW_ITEM_TYPE_MPLS:
 283                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 284                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 285                         return item;
 286                 case RTE_FLOW_ITEM_TYPE_IPV4:
 287                 case RTE_FLOW_ITEM_TYPE_IPV6:
 288                         if (item[1].type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 289                             item[1].type == RTE_FLOW_ITEM_TYPE_IPV6)
 290                                 return item;
 291                         break;
 292                 }
 293         }
 294         return NULL;
 295 }
 296
 297 static void
 298 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 299                           uint8_t next_protocol, uint64_t *item_flags,
 300                           int *tunnel)
 301 {
 302         MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 303                     item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 304         if (next_protocol == IPPROTO_IPIP) {
 305                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 306                 *tunnel = 1;
 307         }
 308         if (next_protocol == IPPROTO_IPV6) {
 309                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 310                 *tunnel = 1;
 311         }
 312 }
 313
 314 static inline struct mlx5_hlist *
 315 flow_dv_hlist_prepare(struct mlx5_dev_ctx_shared *sh, struct mlx5_hlist **phl,
 316                      const char *name, uint32_t size, bool direct_key,
 317                      bool lcores_share, void *ctx,
 318                      mlx5_list_create_cb cb_create,
 319                      mlx5_list_match_cb cb_match,
 320                      mlx5_list_remove_cb cb_remove,
 321                      mlx5_list_clone_cb cb_clone,
 322                      mlx5_list_clone_free_cb cb_clone_free)
 323 {
 324         struct mlx5_hlist *hl;
 325         struct mlx5_hlist *expected = NULL;
 326         char s[MLX5_NAME_SIZE];
 327
 328         hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
 329         if (likely(hl))
 330                 return hl;
 331         snprintf(s, sizeof(s), "%s_%s", sh->ibdev_name, name);
 332         hl = mlx5_hlist_create(s, size, direct_key, lcores_share,
 333                         ctx, cb_create, cb_match, cb_remove, cb_clone,
 334                         cb_clone_free);
 335         if (!hl) {
 336                 DRV_LOG(ERR, "%s hash creation failed", name);
 337                 rte_errno = ENOMEM;
 338                 return NULL;
 339         }
 340         if (!__atomic_compare_exchange_n(phl, &expected, hl, false,
 341                                          __ATOMIC_SEQ_CST,
 342                                          __ATOMIC_SEQ_CST)) {
 343                 mlx5_hlist_destroy(hl);
 344                 hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
 345         }
 346         return hl;
 347 }
 348
 349 /* Update VLAN's VID/PCP based on input rte_flow_action.
 350  *
 351  * @param[in] action
 352  *   Pointer to struct rte_flow_action.
 353  * @param[out] vlan
 354  *   Pointer to struct rte_vlan_hdr.
 355  */
 356 static void
 357 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 358                          struct rte_vlan_hdr *vlan)
 359 {
 360         uint16_t vlan_tci;
 361         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 362                 vlan_tci =
 363                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 364                                                action->conf)->vlan_pcp;
 365                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 366                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 367                 vlan->vlan_tci |= vlan_tci;
 368         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 369                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 370                 vlan->vlan_tci |= rte_be_to_cpu_16
 371                     (((const struct rte_flow_action_of_set_vlan_vid *)
 372                                              action->conf)->vlan_vid);
 373         }
 374 }
 375
 376 /**
 377  * Fetch 1, 2, 3 or 4 byte field from the byte array
 378  * and return as unsigned integer in host-endian format.
 379  *
 380  * @param[in] data
 381  *   Pointer to data array.
 382  * @param[in] size
 383  *   Size of field to extract.
 384  *
 385  * @return
 386  *   converted field in host endian format.
 387  */
 388 static inline uint32_t
 389 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 390 {
 391         uint32_t ret;
 392
 393         switch (size) {
 394         case 1:
 395                 ret = *data;
 396                 break;
 397         case 2:
 398                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 399                 break;
 400         case 3:
 401                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 402                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 403                 break;
 404         case 4:
 405                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 406                 break;
 407         default:
 408                 MLX5_ASSERT(false);
 409                 ret = 0;
 410                 break;
 411         }
 412         return ret;
 413 }
 414
 415 /**
 416  * Convert modify-header action to DV specification.
 417  *
 418  * Data length of each action is determined by provided field description
 419  * and the item mask. Data bit offset and width of each action is determined
 420  * by provided item mask.
 421  *
 422  * @param[in] item
 423  *   Pointer to item specification.
 424  * @param[in] field
 425  *   Pointer to field modification information.
 426  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 427  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 428  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 429  * @param[in] dcopy
 430  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 431  *   Negative offset value sets the same offset as source offset.
 432  *   size field is ignored, value is taken from source field.
 433  * @param[in,out] resource
 434  *   Pointer to the modify-header resource.
 435  * @param[in] type
 436  *   Type of modification.
 437  * @param[out] error
 438  *   Pointer to the error structure.
 439  *
 440  * @return
 441  *   0 on success, a negative errno value otherwise and rte_errno is set.
 442  */
 443 static int
 444 flow_dv_convert_modify_action(struct rte_flow_item *item,
 445                               struct field_modify_info *field,
 446                               struct field_modify_info *dcopy,
 447                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 448                               uint32_t type, struct rte_flow_error *error)
 449 {
 450         uint32_t i = resource->actions_num;
 451         struct mlx5_modification_cmd *actions = resource->actions;
 452         uint32_t carry_b = 0;
 453
 454         /*
 455          * The item and mask are provided in big-endian format.
 456          * The fields should be presented as in big-endian format either.
 457          * Mask must be always present, it defines the actual field width.
 458          */
 459         MLX5_ASSERT(item->mask);
 460         MLX5_ASSERT(field->size);
 461         do {
 462                 uint32_t size_b;
 463                 uint32_t off_b;
 464                 uint32_t mask;
 465                 uint32_t data;
 466                 bool next_field = true;
 467                 bool next_dcopy = true;
 468
 469                 if (i >= MLX5_MAX_MODIFY_NUM)
 470                         return rte_flow_error_set(error, EINVAL,
 471                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 472                                  "too many items to modify");
 473                 /* Fetch variable byte size mask from the array. */
 474                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 475                                            field->offset, field->size);
 476                 if (!mask) {
 477                         ++field;
 478                         continue;
 479                 }
 480                 /* Deduce actual data width in bits from mask value. */
 481                 off_b = rte_bsf32(mask) + carry_b;
 482                 size_b = sizeof(uint32_t) * CHAR_BIT -
 483                          off_b - __builtin_clz(mask);
 484                 MLX5_ASSERT(size_b);
 485                 actions[i] = (struct mlx5_modification_cmd) {
 486                         .action_type = type,
 487                         .field = field->id,
 488                         .offset = off_b,
 489                         .length = (size_b == sizeof(uint32_t) * CHAR_BIT) ?
 490                                 0 : size_b,
 491                 };
 492                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 493                         MLX5_ASSERT(dcopy);
 494                         actions[i].dst_field = dcopy->id;
 495                         actions[i].dst_offset =
 496                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 497                         /* Convert entire record to big-endian format. */
 498                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 499                         /*
 500                          * Destination field overflow. Copy leftovers of
 501                          * a source field to the next destination field.
 502                          */
 503                         carry_b = 0;
 504                         if ((size_b > dcopy->size * CHAR_BIT - dcopy->offset) &&
 505                             dcopy->size != 0) {
 506                                 actions[i].length =
 507                                         dcopy->size * CHAR_BIT - dcopy->offset;
 508                                 carry_b = actions[i].length;
 509                                 next_field = false;
 510                         }
 511                         /*
 512                          * Not enough bits in a source filed to fill a
 513                          * destination field. Switch to the next source.
 514                          */
 515                         if ((size_b < dcopy->size * CHAR_BIT - dcopy->offset) &&
 516                             (size_b == field->size * CHAR_BIT - off_b)) {
 517                                 actions[i].length =
 518                                         field->size * CHAR_BIT - off_b;
 519                                 dcopy->offset += actions[i].length;
 520                                 next_dcopy = false;
 521                         }
 522                         if (next_dcopy)
 523                                 ++dcopy;
 524                 } else {
 525                         MLX5_ASSERT(item->spec);
 526                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 527                                                    field->offset, field->size);
 528                         /* Shift out the trailing masked bits from data. */
 529                         data = (data & mask) >> off_b;
 530                         actions[i].data1 = rte_cpu_to_be_32(data);
 531                 }
 532                 /* Convert entire record to expected big-endian format. */
 533                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 534                 if (next_field)
 535                         ++field;
 536                 ++i;
 537         } while (field->size);
 538         if (resource->actions_num == i)
 539                 return rte_flow_error_set(error, EINVAL,
 540                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 541                                           "invalid modification flow item");
 542         resource->actions_num = i;
 543         return 0;
 544 }
 545
 546 /**
 547  * Convert modify-header set IPv4 address action to DV specification.
 548  *
 549  * @param[in,out] resource
 550  *   Pointer to the modify-header resource.
 551  * @param[in] action
 552  *   Pointer to action specification.
 553  * @param[out] error
 554  *   Pointer to the error structure.
 555  *
 556  * @return
 557  *   0 on success, a negative errno value otherwise and rte_errno is set.
 558  */
 559 static int
 560 flow_dv_convert_action_modify_ipv4
 561                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 562                          const struct rte_flow_action *action,
 563                          struct rte_flow_error *error)
 564 {
 565         const struct rte_flow_action_set_ipv4 *conf =
 566                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 567         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 568         struct rte_flow_item_ipv4 ipv4;
 569         struct rte_flow_item_ipv4 ipv4_mask;
 570
 571         memset(&ipv4, 0, sizeof(ipv4));
 572         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 573         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 574                 ipv4.hdr.src_addr = conf->ipv4_addr;
 575                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 576         } else {
 577                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 578                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 579         }
 580         item.spec = &ipv4;
 581         item.mask = &ipv4_mask;
 582         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 583                                              MLX5_MODIFICATION_TYPE_SET, error);
 584 }
 585
 586 /**
 587  * Convert modify-header set IPv6 address action to DV specification.
 588  *
 589  * @param[in,out] resource
 590  *   Pointer to the modify-header resource.
 591  * @param[in] action
 592  *   Pointer to action specification.
 593  * @param[out] error
 594  *   Pointer to the error structure.
 595  *
 596  * @return
 597  *   0 on success, a negative errno value otherwise and rte_errno is set.
 598  */
 599 static int
 600 flow_dv_convert_action_modify_ipv6
 601                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 602                          const struct rte_flow_action *action,
 603                          struct rte_flow_error *error)
 604 {
 605         const struct rte_flow_action_set_ipv6 *conf =
 606                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 607         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 608         struct rte_flow_item_ipv6 ipv6;
 609         struct rte_flow_item_ipv6 ipv6_mask;
 610
 611         memset(&ipv6, 0, sizeof(ipv6));
 612         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 613         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 614                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 615                        sizeof(ipv6.hdr.src_addr));
 616                 memcpy(&ipv6_mask.hdr.src_addr,
 617                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 618                        sizeof(ipv6.hdr.src_addr));
 619         } else {
 620                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 621                        sizeof(ipv6.hdr.dst_addr));
 622                 memcpy(&ipv6_mask.hdr.dst_addr,
 623                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 624                        sizeof(ipv6.hdr.dst_addr));
 625         }
 626         item.spec = &ipv6;
 627         item.mask = &ipv6_mask;
 628         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 629                                              MLX5_MODIFICATION_TYPE_SET, error);
 630 }
 631
 632 /**
 633  * Convert modify-header set MAC address action to DV specification.
 634  *
 635  * @param[in,out] resource
 636  *   Pointer to the modify-header resource.
 637  * @param[in] action
 638  *   Pointer to action specification.
 639  * @param[out] error
 640  *   Pointer to the error structure.
 641  *
 642  * @return
 643  *   0 on success, a negative errno value otherwise and rte_errno is set.
 644  */
 645 static int
 646 flow_dv_convert_action_modify_mac
 647                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 648                          const struct rte_flow_action *action,
 649                          struct rte_flow_error *error)
 650 {
 651         const struct rte_flow_action_set_mac *conf =
 652                 (const struct rte_flow_action_set_mac *)(action->conf);
 653         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 654         struct rte_flow_item_eth eth;
 655         struct rte_flow_item_eth eth_mask;
 656
 657         memset(&eth, 0, sizeof(eth));
 658         memset(&eth_mask, 0, sizeof(eth_mask));
 659         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 660                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 661                        sizeof(eth.src.addr_bytes));
 662                 memcpy(&eth_mask.src.addr_bytes,
 663                        &rte_flow_item_eth_mask.src.addr_bytes,
 664                        sizeof(eth_mask.src.addr_bytes));
 665         } else {
 666                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 667                        sizeof(eth.dst.addr_bytes));
 668                 memcpy(&eth_mask.dst.addr_bytes,
 669                        &rte_flow_item_eth_mask.dst.addr_bytes,
 670                        sizeof(eth_mask.dst.addr_bytes));
 671         }
 672         item.spec = &eth;
 673         item.mask = &eth_mask;
 674         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 675                                              MLX5_MODIFICATION_TYPE_SET, error);
 676 }
 677
 678 /**
 679  * Convert modify-header set VLAN VID action to DV specification.
 680  *
 681  * @param[in,out] resource
 682  *   Pointer to the modify-header resource.
 683  * @param[in] action
 684  *   Pointer to action specification.
 685  * @param[out] error
 686  *   Pointer to the error structure.
 687  *
 688  * @return
 689  *   0 on success, a negative errno value otherwise and rte_errno is set.
 690  */
 691 static int
 692 flow_dv_convert_action_modify_vlan_vid
 693                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 694                          const struct rte_flow_action *action,
 695                          struct rte_flow_error *error)
 696 {
 697         const struct rte_flow_action_of_set_vlan_vid *conf =
 698                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 699         int i = resource->actions_num;
 700         struct mlx5_modification_cmd *actions = resource->actions;
 701         struct field_modify_info *field = modify_vlan_out_first_vid;
 702
 703         if (i >= MLX5_MAX_MODIFY_NUM)
 704                 return rte_flow_error_set(error, EINVAL,
 705                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 706                          "too many items to modify");
 707         actions[i] = (struct mlx5_modification_cmd) {
 708                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 709                 .field = field->id,
 710                 .length = field->size,
 711                 .offset = field->offset,
 712         };
 713         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 714         actions[i].data1 = conf->vlan_vid;
 715         actions[i].data1 = actions[i].data1 << 16;
 716         resource->actions_num = ++i;
 717         return 0;
 718 }
 719
 720 /**
 721  * Convert modify-header set TP action to DV specification.
 722  *
 723  * @param[in,out] resource
 724  *   Pointer to the modify-header resource.
 725  * @param[in] action
 726  *   Pointer to action specification.
 727  * @param[in] items
 728  *   Pointer to rte_flow_item objects list.
 729  * @param[in] attr
 730  *   Pointer to flow attributes structure.
 731  * @param[in] dev_flow
 732  *   Pointer to the sub flow.
 733  * @param[in] tunnel_decap
 734  *   Whether action is after tunnel decapsulation.
 735  * @param[out] error
 736  *   Pointer to the error structure.
 737  *
 738  * @return
 739  *   0 on success, a negative errno value otherwise and rte_errno is set.
 740  */
 741 static int
 742 flow_dv_convert_action_modify_tp
 743                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 744                          const struct rte_flow_action *action,
 745                          const struct rte_flow_item *items,
 746                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 747                          bool tunnel_decap, struct rte_flow_error *error)
 748 {
 749         const struct rte_flow_action_set_tp *conf =
 750                 (const struct rte_flow_action_set_tp *)(action->conf);
 751         struct rte_flow_item item;
 752         struct rte_flow_item_udp udp;
 753         struct rte_flow_item_udp udp_mask;
 754         struct rte_flow_item_tcp tcp;
 755         struct rte_flow_item_tcp tcp_mask;
 756         struct field_modify_info *field;
 757
 758         if (!attr->valid)
 759                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 760         if (attr->udp) {
 761                 memset(&udp, 0, sizeof(udp));
 762                 memset(&udp_mask, 0, sizeof(udp_mask));
 763                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 764                         udp.hdr.src_port = conf->port;
 765                         udp_mask.hdr.src_port =
 766                                         rte_flow_item_udp_mask.hdr.src_port;
 767                 } else {
 768                         udp.hdr.dst_port = conf->port;
 769                         udp_mask.hdr.dst_port =
 770                                         rte_flow_item_udp_mask.hdr.dst_port;
 771                 }
 772                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 773                 item.spec = &udp;
 774                 item.mask = &udp_mask;
 775                 field = modify_udp;
 776         } else {
 777                 MLX5_ASSERT(attr->tcp);
 778                 memset(&tcp, 0, sizeof(tcp));
 779                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 780                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 781                         tcp.hdr.src_port = conf->port;
 782                         tcp_mask.hdr.src_port =
 783                                         rte_flow_item_tcp_mask.hdr.src_port;
 784                 } else {
 785                         tcp.hdr.dst_port = conf->port;
 786                         tcp_mask.hdr.dst_port =
 787                                         rte_flow_item_tcp_mask.hdr.dst_port;
 788                 }
 789                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 790                 item.spec = &tcp;
 791                 item.mask = &tcp_mask;
 792                 field = modify_tcp;
 793         }
 794         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 795                                              MLX5_MODIFICATION_TYPE_SET, error);
 796 }
 797
 798 /**
 799  * Convert modify-header set TTL action to DV specification.
 800  *
 801  * @param[in,out] resource
 802  *   Pointer to the modify-header resource.
 803  * @param[in] action
 804  *   Pointer to action specification.
 805  * @param[in] items
 806  *   Pointer to rte_flow_item objects list.
 807  * @param[in] attr
 808  *   Pointer to flow attributes structure.
 809  * @param[in] dev_flow
 810  *   Pointer to the sub flow.
 811  * @param[in] tunnel_decap
 812  *   Whether action is after tunnel decapsulation.
 813  * @param[out] error
 814  *   Pointer to the error structure.
 815  *
 816  * @return
 817  *   0 on success, a negative errno value otherwise and rte_errno is set.
 818  */
 819 static int
 820 flow_dv_convert_action_modify_ttl
 821                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 822                          const struct rte_flow_action *action,
 823                          const struct rte_flow_item *items,
 824                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 825                          bool tunnel_decap, struct rte_flow_error *error)
 826 {
 827         const struct rte_flow_action_set_ttl *conf =
 828                 (const struct rte_flow_action_set_ttl *)(action->conf);
 829         struct rte_flow_item item;
 830         struct rte_flow_item_ipv4 ipv4;
 831         struct rte_flow_item_ipv4 ipv4_mask;
 832         struct rte_flow_item_ipv6 ipv6;
 833         struct rte_flow_item_ipv6 ipv6_mask;
 834         struct field_modify_info *field;
 835
 836         if (!attr->valid)
 837                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 838         if (attr->ipv4) {
 839                 memset(&ipv4, 0, sizeof(ipv4));
 840                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 841                 ipv4.hdr.time_to_live = conf->ttl_value;
 842                 ipv4_mask.hdr.time_to_live = 0xFF;
 843                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 844                 item.spec = &ipv4;
 845                 item.mask = &ipv4_mask;
 846                 field = modify_ipv4;
 847         } else {
 848                 MLX5_ASSERT(attr->ipv6);
 849                 memset(&ipv6, 0, sizeof(ipv6));
 850                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 851                 ipv6.hdr.hop_limits = conf->ttl_value;
 852                 ipv6_mask.hdr.hop_limits = 0xFF;
 853                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 854                 item.spec = &ipv6;
 855                 item.mask = &ipv6_mask;
 856                 field = modify_ipv6;
 857         }
 858         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 859                                              MLX5_MODIFICATION_TYPE_SET, error);
 860 }
 861
 862 /**
 863  * Convert modify-header decrement TTL action to DV specification.
 864  *
 865  * @param[in,out] resource
 866  *   Pointer to the modify-header resource.
 867  * @param[in] action
 868  *   Pointer to action specification.
 869  * @param[in] items
 870  *   Pointer to rte_flow_item objects list.
 871  * @param[in] attr
 872  *   Pointer to flow attributes structure.
 873  * @param[in] dev_flow
 874  *   Pointer to the sub flow.
 875  * @param[in] tunnel_decap
 876  *   Whether action is after tunnel decapsulation.
 877  * @param[out] error
 878  *   Pointer to the error structure.
 879  *
 880  * @return
 881  *   0 on success, a negative errno value otherwise and rte_errno is set.
 882  */
 883 static int
 884 flow_dv_convert_action_modify_dec_ttl
 885                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 886                          const struct rte_flow_item *items,
 887                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 888                          bool tunnel_decap, struct rte_flow_error *error)
 889 {
 890         struct rte_flow_item item;
 891         struct rte_flow_item_ipv4 ipv4;
 892         struct rte_flow_item_ipv4 ipv4_mask;
 893         struct rte_flow_item_ipv6 ipv6;
 894         struct rte_flow_item_ipv6 ipv6_mask;
 895         struct field_modify_info *field;
 896
 897         if (!attr->valid)
 898                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 899         if (attr->ipv4) {
 900                 memset(&ipv4, 0, sizeof(ipv4));
 901                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 902                 ipv4.hdr.time_to_live = 0xFF;
 903                 ipv4_mask.hdr.time_to_live = 0xFF;
 904                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 905                 item.spec = &ipv4;
 906                 item.mask = &ipv4_mask;
 907                 field = modify_ipv4;
 908         } else {
 909                 MLX5_ASSERT(attr->ipv6);
 910                 memset(&ipv6, 0, sizeof(ipv6));
 911                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 912                 ipv6.hdr.hop_limits = 0xFF;
 913                 ipv6_mask.hdr.hop_limits = 0xFF;
 914                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 915                 item.spec = &ipv6;
 916                 item.mask = &ipv6_mask;
 917                 field = modify_ipv6;
 918         }
 919         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 920                                              MLX5_MODIFICATION_TYPE_ADD, error);
 921 }
 922
 923 /**
 924  * Convert modify-header increment/decrement TCP Sequence number
 925  * to DV specification.
 926  *
 927  * @param[in,out] resource
 928  *   Pointer to the modify-header resource.
 929  * @param[in] action
 930  *   Pointer to action specification.
 931  * @param[out] error
 932  *   Pointer to the error structure.
 933  *
 934  * @return
 935  *   0 on success, a negative errno value otherwise and rte_errno is set.
 936  */
 937 static int
 938 flow_dv_convert_action_modify_tcp_seq
 939                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 940                          const struct rte_flow_action *action,
 941                          struct rte_flow_error *error)
 942 {
 943         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 944         uint64_t value = rte_be_to_cpu_32(*conf);
 945         struct rte_flow_item item;
 946         struct rte_flow_item_tcp tcp;
 947         struct rte_flow_item_tcp tcp_mask;
 948
 949         memset(&tcp, 0, sizeof(tcp));
 950         memset(&tcp_mask, 0, sizeof(tcp_mask));
 951         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 952                 /*
 953                  * The HW has no decrement operation, only increment operation.
 954                  * To simulate decrement X from Y using increment operation
 955                  * we need to add UINT32_MAX X times to Y.
 956                  * Each adding of UINT32_MAX decrements Y by 1.
 957                  */
 958                 value *= UINT32_MAX;
 959         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 960         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 961         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 962         item.spec = &tcp;
 963         item.mask = &tcp_mask;
 964         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 965                                              MLX5_MODIFICATION_TYPE_ADD, error);
 966 }
 967
 968 /**
 969  * Convert modify-header increment/decrement TCP Acknowledgment number
 970  * to DV specification.
 971  *
 972  * @param[in,out] resource
 973  *   Pointer to the modify-header resource.
 974  * @param[in] action
 975  *   Pointer to action specification.
 976  * @param[out] error
 977  *   Pointer to the error structure.
 978  *
 979  * @return
 980  *   0 on success, a negative errno value otherwise and rte_errno is set.
 981  */
 982 static int
 983 flow_dv_convert_action_modify_tcp_ack
 984                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 985                          const struct rte_flow_action *action,
 986                          struct rte_flow_error *error)
 987 {
 988         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 989         uint64_t value = rte_be_to_cpu_32(*conf);
 990         struct rte_flow_item item;
 991         struct rte_flow_item_tcp tcp;
 992         struct rte_flow_item_tcp tcp_mask;
 993
 994         memset(&tcp, 0, sizeof(tcp));
 995         memset(&tcp_mask, 0, sizeof(tcp_mask));
 996         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 997                 /*
 998                  * The HW has no decrement operation, only increment operation.
 999                  * To simulate decrement X from Y using increment operation
1000                  * we need to add UINT32_MAX X times to Y.
1001                  * Each adding of UINT32_MAX decrements Y by 1.
1002                  */
1003                 value *= UINT32_MAX;
1004         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
1005         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
1006         item.type = RTE_FLOW_ITEM_TYPE_TCP;
1007         item.spec = &tcp;
1008         item.mask = &tcp_mask;
1009         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
1010                                              MLX5_MODIFICATION_TYPE_ADD, error);
1011 }
1012
1013 static enum mlx5_modification_field reg_to_field[] = {
1014         [REG_NON] = MLX5_MODI_OUT_NONE,
1015         [REG_A] = MLX5_MODI_META_DATA_REG_A,
1016         [REG_B] = MLX5_MODI_META_DATA_REG_B,
1017         [REG_C_0] = MLX5_MODI_META_REG_C_0,
1018         [REG_C_1] = MLX5_MODI_META_REG_C_1,
1019         [REG_C_2] = MLX5_MODI_META_REG_C_2,
1020         [REG_C_3] = MLX5_MODI_META_REG_C_3,
1021         [REG_C_4] = MLX5_MODI_META_REG_C_4,
1022         [REG_C_5] = MLX5_MODI_META_REG_C_5,
1023         [REG_C_6] = MLX5_MODI_META_REG_C_6,
1024         [REG_C_7] = MLX5_MODI_META_REG_C_7,
1025 };
1026
1027 /**
1028  * Convert register set to DV specification.
1029  *
1030  * @param[in,out] resource
1031  *   Pointer to the modify-header resource.
1032  * @param[in] action
1033  *   Pointer to action specification.
1034  * @param[out] error
1035  *   Pointer to the error structure.
1036  *
1037  * @return
1038  *   0 on success, a negative errno value otherwise and rte_errno is set.
1039  */
1040 static int
1041 flow_dv_convert_action_set_reg
1042                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1043                          const struct rte_flow_action *action,
1044                          struct rte_flow_error *error)
1045 {
1046         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
1047         struct mlx5_modification_cmd *actions = resource->actions;
1048         uint32_t i = resource->actions_num;
1049
1050         if (i >= MLX5_MAX_MODIFY_NUM)
1051                 return rte_flow_error_set(error, EINVAL,
1052                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1053                                           "too many items to modify");
1054         MLX5_ASSERT(conf->id != REG_NON);
1055         MLX5_ASSERT(conf->id < (enum modify_reg)RTE_DIM(reg_to_field));
1056         actions[i] = (struct mlx5_modification_cmd) {
1057                 .action_type = MLX5_MODIFICATION_TYPE_SET,
1058                 .field = reg_to_field[conf->id],
1059                 .offset = conf->offset,
1060                 .length = conf->length,
1061         };
1062         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
1063         actions[i].data1 = rte_cpu_to_be_32(conf->data);
1064         ++i;
1065         resource->actions_num = i;
1066         return 0;
1067 }
1068
1069 /**
1070  * Convert SET_TAG action to DV specification.
1071  *
1072  * @param[in] dev
1073  *   Pointer to the rte_eth_dev structure.
1074  * @param[in,out] resource
1075  *   Pointer to the modify-header resource.
1076  * @param[in] conf
1077  *   Pointer to action specification.
1078  * @param[out] error
1079  *   Pointer to the error structure.
1080  *
1081  * @return
1082  *   0 on success, a negative errno value otherwise and rte_errno is set.
1083  */
1084 static int
1085 flow_dv_convert_action_set_tag
1086                         (struct rte_eth_dev *dev,
1087                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1088                          const struct rte_flow_action_set_tag *conf,
1089                          struct rte_flow_error *error)
1090 {
1091         rte_be32_t data = rte_cpu_to_be_32(conf->data);
1092         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
1093         struct rte_flow_item item = {
1094                 .spec = &data,
1095                 .mask = &mask,
1096         };
1097         struct field_modify_info reg_c_x[] = {
1098                 [1] = {0, 0, 0},
1099         };
1100         enum mlx5_modification_field reg_type;
1101         int ret;
1102
1103         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1104         if (ret < 0)
1105                 return ret;
1106         MLX5_ASSERT(ret != REG_NON);
1107         MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1108         reg_type = reg_to_field[ret];
1109         MLX5_ASSERT(reg_type > 0);
1110         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1111         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1112                                              MLX5_MODIFICATION_TYPE_SET, error);
1113 }
1114
1115 /**
1116  * Convert internal COPY_REG action to DV specification.
1117  *
1118  * @param[in] dev
1119  *   Pointer to the rte_eth_dev structure.
1120  * @param[in,out] res
1121  *   Pointer to the modify-header resource.
1122  * @param[in] action
1123  *   Pointer to action specification.
1124  * @param[out] error
1125  *   Pointer to the error structure.
1126  *
1127  * @return
1128  *   0 on success, a negative errno value otherwise and rte_errno is set.
1129  */
1130 static int
1131 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1132                                  struct mlx5_flow_dv_modify_hdr_resource *res,
1133                                  const struct rte_flow_action *action,
1134                                  struct rte_flow_error *error)
1135 {
1136         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1137         rte_be32_t mask = RTE_BE32(UINT32_MAX);
1138         struct rte_flow_item item = {
1139                 .spec = NULL,
1140                 .mask = &mask,
1141         };
1142         struct field_modify_info reg_src[] = {
1143                 {4, 0, reg_to_field[conf->src]},
1144                 {0, 0, 0},
1145         };
1146         struct field_modify_info reg_dst = {
1147                 .offset = 0,
1148                 .id = reg_to_field[conf->dst],
1149         };
1150         /* Adjust reg_c[0] usage according to reported mask. */
1151         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1152                 struct mlx5_priv *priv = dev->data->dev_private;
1153                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1154
1155                 MLX5_ASSERT(reg_c0);
1156                 MLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1157                 if (conf->dst == REG_C_0) {
1158                         /* Copy to reg_c[0], within mask only. */
1159                         reg_dst.offset = rte_bsf32(reg_c0);
1160                         mask = rte_cpu_to_be_32(reg_c0 >> reg_dst.offset);
1161                 } else {
1162                         reg_dst.offset = 0;
1163                         mask = rte_cpu_to_be_32(reg_c0);
1164                 }
1165         }
1166         return flow_dv_convert_modify_action(&item,
1167                                              reg_src, &reg_dst, res,
1168                                              MLX5_MODIFICATION_TYPE_COPY,
1169                                              error);
1170 }
1171
1172 /**
1173  * Convert MARK action to DV specification. This routine is used
1174  * in extensive metadata only and requires metadata register to be
1175  * handled. In legacy mode hardware tag resource is engaged.
1176  *
1177  * @param[in] dev
1178  *   Pointer to the rte_eth_dev structure.
1179  * @param[in] conf
1180  *   Pointer to MARK action specification.
1181  * @param[in,out] resource
1182  *   Pointer to the modify-header resource.
1183  * @param[out] error
1184  *   Pointer to the error structure.
1185  *
1186  * @return
1187  *   0 on success, a negative errno value otherwise and rte_errno is set.
1188  */
1189 static int
1190 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1191                             const struct rte_flow_action_mark *conf,
1192                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1193                             struct rte_flow_error *error)
1194 {
1195         struct mlx5_priv *priv = dev->data->dev_private;
1196         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1197                                            priv->sh->dv_mark_mask);
1198         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1199         struct rte_flow_item item = {
1200                 .spec = &data,
1201                 .mask = &mask,
1202         };
1203         struct field_modify_info reg_c_x[] = {
1204                 [1] = {0, 0, 0},
1205         };
1206         int reg;
1207
1208         if (!mask)
1209                 return rte_flow_error_set(error, EINVAL,
1210                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1211                                           NULL, "zero mark action mask");
1212         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1213         if (reg < 0)
1214                 return reg;
1215         MLX5_ASSERT(reg > 0);
1216         if (reg == REG_C_0) {
1217                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1218                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1219
1220                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1221                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1222                 mask = rte_cpu_to_be_32(mask << shl_c0);
1223         }
1224         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1225         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1226                                              MLX5_MODIFICATION_TYPE_SET, error);
1227 }
1228
1229 /**
1230  * Get metadata register index for specified steering domain.
1231  *
1232  * @param[in] dev
1233  *   Pointer to the rte_eth_dev structure.
1234  * @param[in] attr
1235  *   Attributes of flow to determine steering domain.
1236  * @param[out] error
1237  *   Pointer to the error structure.
1238  *
1239  * @return
1240  *   positive index on success, a negative errno value otherwise
1241  *   and rte_errno is set.
1242  */
1243 static enum modify_reg
1244 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1245                          const struct rte_flow_attr *attr,
1246                          struct rte_flow_error *error)
1247 {
1248         int reg =
1249                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1250                                           MLX5_METADATA_FDB :
1251                                             attr->egress ?
1252                                             MLX5_METADATA_TX :
1253                                             MLX5_METADATA_RX, 0, error);
1254         if (reg < 0)
1255                 return rte_flow_error_set(error,
1256                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1257                                           NULL, "unavailable "
1258                                           "metadata register");
1259         return reg;
1260 }
1261
1262 /**
1263  * Convert SET_META action to DV specification.
1264  *
1265  * @param[in] dev
1266  *   Pointer to the rte_eth_dev structure.
1267  * @param[in,out] resource
1268  *   Pointer to the modify-header resource.
1269  * @param[in] attr
1270  *   Attributes of flow that includes this item.
1271  * @param[in] conf
1272  *   Pointer to action specification.
1273  * @param[out] error
1274  *   Pointer to the error structure.
1275  *
1276  * @return
1277  *   0 on success, a negative errno value otherwise and rte_errno is set.
1278  */
1279 static int
1280 flow_dv_convert_action_set_meta
1281                         (struct rte_eth_dev *dev,
1282                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1283                          const struct rte_flow_attr *attr,
1284                          const struct rte_flow_action_set_meta *conf,
1285                          struct rte_flow_error *error)
1286 {
1287         uint32_t mask = rte_cpu_to_be_32(conf->mask);
1288         uint32_t data = rte_cpu_to_be_32(conf->data) & mask;
1289         struct rte_flow_item item = {
1290                 .spec = &data,
1291                 .mask = &mask,
1292         };
1293         struct field_modify_info reg_c_x[] = {
1294                 [1] = {0, 0, 0},
1295         };
1296         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1297
1298         if (reg < 0)
1299                 return reg;
1300         MLX5_ASSERT(reg != REG_NON);
1301         if (reg == REG_C_0) {
1302                 struct mlx5_priv *priv = dev->data->dev_private;
1303                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1304                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1305
1306                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1307                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1308                 mask = rte_cpu_to_be_32(mask << shl_c0);
1309         }
1310         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1311         /* The routine expects parameters in memory as big-endian ones. */
1312         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1313                                              MLX5_MODIFICATION_TYPE_SET, error);
1314 }
1315
1316 /**
1317  * Convert modify-header set IPv4 DSCP action to DV specification.
1318  *
1319  * @param[in,out] resource
1320  *   Pointer to the modify-header resource.
1321  * @param[in] action
1322  *   Pointer to action specification.
1323  * @param[out] error
1324  *   Pointer to the error structure.
1325  *
1326  * @return
1327  *   0 on success, a negative errno value otherwise and rte_errno is set.
1328  */
1329 static int
1330 flow_dv_convert_action_modify_ipv4_dscp
1331                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1332                          const struct rte_flow_action *action,
1333                          struct rte_flow_error *error)
1334 {
1335         const struct rte_flow_action_set_dscp *conf =
1336                 (const struct rte_flow_action_set_dscp *)(action->conf);
1337         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1338         struct rte_flow_item_ipv4 ipv4;
1339         struct rte_flow_item_ipv4 ipv4_mask;
1340
1341         memset(&ipv4, 0, sizeof(ipv4));
1342         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1343         ipv4.hdr.type_of_service = conf->dscp;
1344         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1345         item.spec = &ipv4;
1346         item.mask = &ipv4_mask;
1347         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1348                                              MLX5_MODIFICATION_TYPE_SET, error);
1349 }
1350
1351 /**
1352  * Convert modify-header set IPv6 DSCP action to DV specification.
1353  *
1354  * @param[in,out] resource
1355  *   Pointer to the modify-header resource.
1356  * @param[in] action
1357  *   Pointer to action specification.
1358  * @param[out] error
1359  *   Pointer to the error structure.
1360  *
1361  * @return
1362  *   0 on success, a negative errno value otherwise and rte_errno is set.
1363  */
1364 static int
1365 flow_dv_convert_action_modify_ipv6_dscp
1366                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1367                          const struct rte_flow_action *action,
1368                          struct rte_flow_error *error)
1369 {
1370         const struct rte_flow_action_set_dscp *conf =
1371                 (const struct rte_flow_action_set_dscp *)(action->conf);
1372         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1373         struct rte_flow_item_ipv6 ipv6;
1374         struct rte_flow_item_ipv6 ipv6_mask;
1375
1376         memset(&ipv6, 0, sizeof(ipv6));
1377         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1378         /*
1379          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1380          * rdma-core only accept the DSCP bits byte aligned start from
1381          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1382          * bits in IPv6 case as rdma-core requires byte aligned value.
1383          */
1384         ipv6.hdr.vtc_flow = conf->dscp;
1385         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1386         item.spec = &ipv6;
1387         item.mask = &ipv6_mask;
1388         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1389                                              MLX5_MODIFICATION_TYPE_SET, error);
1390 }
1391
1392 static int
1393 mlx5_flow_item_field_width(struct mlx5_priv *priv,
1394                            enum rte_flow_field_id field)
1395 {
1396         switch (field) {
1397         case RTE_FLOW_FIELD_START:
1398                 return 32;
1399         case RTE_FLOW_FIELD_MAC_DST:
1400         case RTE_FLOW_FIELD_MAC_SRC:
1401                 return 48;
1402         case RTE_FLOW_FIELD_VLAN_TYPE:
1403                 return 16;
1404         case RTE_FLOW_FIELD_VLAN_ID:
1405                 return 12;
1406         case RTE_FLOW_FIELD_MAC_TYPE:
1407                 return 16;
1408         case RTE_FLOW_FIELD_IPV4_DSCP:
1409                 return 6;
1410         case RTE_FLOW_FIELD_IPV4_TTL:
1411                 return 8;
1412         case RTE_FLOW_FIELD_IPV4_SRC:
1413         case RTE_FLOW_FIELD_IPV4_DST:
1414                 return 32;
1415         case RTE_FLOW_FIELD_IPV6_DSCP:
1416                 return 6;
1417         case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1418                 return 8;
1419         case RTE_FLOW_FIELD_IPV6_SRC:
1420         case RTE_FLOW_FIELD_IPV6_DST:
1421                 return 128;
1422         case RTE_FLOW_FIELD_TCP_PORT_SRC:
1423         case RTE_FLOW_FIELD_TCP_PORT_DST:
1424                 return 16;
1425         case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1426         case RTE_FLOW_FIELD_TCP_ACK_NUM:
1427                 return 32;
1428         case RTE_FLOW_FIELD_TCP_FLAGS:
1429                 return 9;
1430         case RTE_FLOW_FIELD_UDP_PORT_SRC:
1431         case RTE_FLOW_FIELD_UDP_PORT_DST:
1432                 return 16;
1433         case RTE_FLOW_FIELD_VXLAN_VNI:
1434         case RTE_FLOW_FIELD_GENEVE_VNI:
1435                 return 24;
1436         case RTE_FLOW_FIELD_GTP_TEID:
1437         case RTE_FLOW_FIELD_TAG:
1438                 return 32;
1439         case RTE_FLOW_FIELD_MARK:
1440                 return __builtin_popcount(priv->sh->dv_mark_mask);
1441         case RTE_FLOW_FIELD_META:
1442                 return __builtin_popcount(priv->sh->dv_meta_mask);
1443         case RTE_FLOW_FIELD_POINTER:
1444         case RTE_FLOW_FIELD_VALUE:
1445                 return 64;
1446         default:
1447                 MLX5_ASSERT(false);
1448         }
1449         return 0;
1450 }
1451
1452 static void
1453 mlx5_flow_field_id_to_modify_info
1454                 (const struct rte_flow_action_modify_data *data,
1455                  struct field_modify_info *info,
1456                  uint32_t *mask, uint32_t *value,
1457                  uint32_t width, uint32_t dst_width,
1458                  uint32_t *shift, struct rte_eth_dev *dev,
1459                  const struct rte_flow_attr *attr,
1460                  struct rte_flow_error *error)
1461 {
1462         struct mlx5_priv *priv = dev->data->dev_private;
1463         uint32_t idx = 0;
1464         uint32_t off = 0;
1465         uint64_t val = 0;
1466         switch (data->field) {
1467         case RTE_FLOW_FIELD_START:
1468                 /* not supported yet */
1469                 MLX5_ASSERT(false);
1470                 break;
1471         case RTE_FLOW_FIELD_MAC_DST:
1472                 off = data->offset > 16 ? data->offset - 16 : 0;
1473                 if (mask) {
1474                         if (data->offset < 16) {
1475                                 info[idx] = (struct field_modify_info){2, 0,
1476                                                 MLX5_MODI_OUT_DMAC_15_0};
1477                                 if (width < 16) {
1478                                         mask[idx] = rte_cpu_to_be_16(0xffff >>
1479                                                                  (16 - width));
1480                                         width = 0;
1481                                 } else {
1482                                         mask[idx] = RTE_BE16(0xffff);
1483                                         width -= 16;
1484                                 }
1485                                 if (!width)
1486                                         break;
1487                                 ++idx;
1488                         }
1489                         info[idx] = (struct field_modify_info){4, 4 * idx,
1490                                                 MLX5_MODI_OUT_DMAC_47_16};
1491                         mask[idx] = rte_cpu_to_be_32((0xffffffff >>
1492                                                       (32 - width)) << off);
1493                 } else {
1494                         if (data->offset < 16)
1495                                 info[idx++] = (struct field_modify_info){2, 0,
1496                                                 MLX5_MODI_OUT_DMAC_15_0};
1497                         info[idx] = (struct field_modify_info){4, off,
1498                                                 MLX5_MODI_OUT_DMAC_47_16};
1499                 }
1500                 break;
1501         case RTE_FLOW_FIELD_MAC_SRC:
1502                 off = data->offset > 16 ? data->offset - 16 : 0;
1503                 if (mask) {
1504                         if (data->offset < 16) {
1505                                 info[idx] = (struct field_modify_info){2, 0,
1506                                                 MLX5_MODI_OUT_SMAC_15_0};
1507                                 if (width < 16) {
1508                                         mask[idx] = rte_cpu_to_be_16(0xffff >>
1509                                                                  (16 - width));
1510                                         width = 0;
1511                                 } else {
1512                                         mask[idx] = RTE_BE16(0xffff);
1513                                         width -= 16;
1514                                 }
1515                                 if (!width)
1516                                         break;
1517                                 ++idx;
1518                         }
1519                         info[idx] = (struct field_modify_info){4, 4 * idx,
1520                                                 MLX5_MODI_OUT_SMAC_47_16};
1521                         mask[idx] = rte_cpu_to_be_32((0xffffffff >>
1522                                                       (32 - width)) << off);
1523                 } else {
1524                         if (data->offset < 16)
1525                                 info[idx++] = (struct field_modify_info){2, 0,
1526                                                 MLX5_MODI_OUT_SMAC_15_0};
1527                         info[idx] = (struct field_modify_info){4, off,
1528                                                 MLX5_MODI_OUT_SMAC_47_16};
1529                 }
1530                 break;
1531         case RTE_FLOW_FIELD_VLAN_TYPE:
1532                 /* not supported yet */
1533                 break;
1534         case RTE_FLOW_FIELD_VLAN_ID:
1535                 info[idx] = (struct field_modify_info){2, 0,
1536                                         MLX5_MODI_OUT_FIRST_VID};
1537                 if (mask)
1538                         mask[idx] = rte_cpu_to_be_16(0x0fff >> (12 - width));
1539                 break;
1540         case RTE_FLOW_FIELD_MAC_TYPE:
1541                 info[idx] = (struct field_modify_info){2, 0,
1542                                         MLX5_MODI_OUT_ETHERTYPE};
1543                 if (mask)
1544                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1545                 break;
1546         case RTE_FLOW_FIELD_IPV4_DSCP:
1547                 info[idx] = (struct field_modify_info){1, 0,
1548                                         MLX5_MODI_OUT_IP_DSCP};
1549                 if (mask)
1550                         mask[idx] = 0x3f >> (6 - width);
1551                 break;
1552         case RTE_FLOW_FIELD_IPV4_TTL:
1553                 info[idx] = (struct field_modify_info){1, 0,
1554                                         MLX5_MODI_OUT_IPV4_TTL};
1555                 if (mask)
1556                         mask[idx] = 0xff >> (8 - width);
1557                 break;
1558         case RTE_FLOW_FIELD_IPV4_SRC:
1559                 info[idx] = (struct field_modify_info){4, 0,
1560                                         MLX5_MODI_OUT_SIPV4};
1561                 if (mask)
1562                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1563                                                      (32 - width));
1564                 break;
1565         case RTE_FLOW_FIELD_IPV4_DST:
1566                 info[idx] = (struct field_modify_info){4, 0,
1567                                         MLX5_MODI_OUT_DIPV4};
1568                 if (mask)
1569                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1570                                                      (32 - width));
1571                 break;
1572         case RTE_FLOW_FIELD_IPV6_DSCP:
1573                 info[idx] = (struct field_modify_info){1, 0,
1574                                         MLX5_MODI_OUT_IP_DSCP};
1575                 if (mask)
1576                         mask[idx] = 0x3f >> (6 - width);
1577                 break;
1578         case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1579                 info[idx] = (struct field_modify_info){1, 0,
1580                                         MLX5_MODI_OUT_IPV6_HOPLIMIT};
1581                 if (mask)
1582                         mask[idx] = 0xff >> (8 - width);
1583                 break;
1584         case RTE_FLOW_FIELD_IPV6_SRC:
1585                 if (mask) {
1586                         if (data->offset < 32) {
1587                                 info[idx] = (struct field_modify_info){4,
1588                                                 4 * idx,
1589                                                 MLX5_MODI_OUT_SIPV6_31_0};
1590                                 if (width < 32) {
1591                                         mask[idx] =
1592                                                 rte_cpu_to_be_32(0xffffffff >>
1593                                                                  (32 - width));
1594                                         width = 0;
1595                                 } else {
1596                                         mask[idx] = RTE_BE32(0xffffffff);
1597                                         width -= 32;
1598                                 }
1599                                 if (!width)
1600                                         break;
1601                                 ++idx;
1602                         }
1603                         if (data->offset < 64) {
1604                                 info[idx] = (struct field_modify_info){4,
1605                                                 4 * idx,
1606                                                 MLX5_MODI_OUT_SIPV6_63_32};
1607                                 if (width < 32) {
1608                                         mask[idx] =
1609                                                 rte_cpu_to_be_32(0xffffffff >>
1610                                                                  (32 - width));
1611                                         width = 0;
1612                                 } else {
1613                                         mask[idx] = RTE_BE32(0xffffffff);
1614                                         width -= 32;
1615                                 }
1616                                 if (!width)
1617                                         break;
1618                                 ++idx;
1619                         }
1620                         if (data->offset < 96) {
1621                                 info[idx] = (struct field_modify_info){4,
1622                                                 4 * idx,
1623                                                 MLX5_MODI_OUT_SIPV6_95_64};
1624                                 if (width < 32) {
1625                                         mask[idx] =
1626                                                 rte_cpu_to_be_32(0xffffffff >>
1627                                                                  (32 - width));
1628                                         width = 0;
1629                                 } else {
1630                                         mask[idx] = RTE_BE32(0xffffffff);
1631                                         width -= 32;
1632                                 }
1633                                 if (!width)
1634                                         break;
1635                                 ++idx;
1636                         }
1637                         info[idx] = (struct field_modify_info){4, 4 * idx,
1638                                                 MLX5_MODI_OUT_SIPV6_127_96};
1639                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1640                                                      (32 - width));
1641                 } else {
1642                         if (data->offset < 32)
1643                                 info[idx++] = (struct field_modify_info){4, 0,
1644                                                 MLX5_MODI_OUT_SIPV6_31_0};
1645                         if (data->offset < 64)
1646                                 info[idx++] = (struct field_modify_info){4, 0,
1647                                                 MLX5_MODI_OUT_SIPV6_63_32};
1648                         if (data->offset < 96)
1649                                 info[idx++] = (struct field_modify_info){4, 0,
1650                                                 MLX5_MODI_OUT_SIPV6_95_64};
1651                         if (data->offset < 128)
1652                                 info[idx++] = (struct field_modify_info){4, 0,
1653                                                 MLX5_MODI_OUT_SIPV6_127_96};
1654                 }
1655                 break;
1656         case RTE_FLOW_FIELD_IPV6_DST:
1657                 if (mask) {
1658                         if (data->offset < 32) {
1659                                 info[idx] = (struct field_modify_info){4,
1660                                                 4 * idx,
1661                                                 MLX5_MODI_OUT_DIPV6_31_0};
1662                                 if (width < 32) {
1663                                         mask[idx] =
1664                                                 rte_cpu_to_be_32(0xffffffff >>
1665                                                                  (32 - width));
1666                                         width = 0;
1667                                 } else {
1668                                         mask[idx] = RTE_BE32(0xffffffff);
1669                                         width -= 32;
1670                                 }
1671                                 if (!width)
1672                                         break;
1673                                 ++idx;
1674                         }
1675                         if (data->offset < 64) {
1676                                 info[idx] = (struct field_modify_info){4,
1677                                                 4 * idx,
1678                                                 MLX5_MODI_OUT_DIPV6_63_32};
1679                                 if (width < 32) {
1680                                         mask[idx] =
1681                                                 rte_cpu_to_be_32(0xffffffff >>
1682                                                                  (32 - width));
1683                                         width = 0;
1684                                 } else {
1685                                         mask[idx] = RTE_BE32(0xffffffff);
1686                                         width -= 32;
1687                                 }
1688                                 if (!width)
1689                                         break;
1690                                 ++idx;
1691                         }
1692                         if (data->offset < 96) {
1693                                 info[idx] = (struct field_modify_info){4,
1694                                                 4 * idx,
1695                                                 MLX5_MODI_OUT_DIPV6_95_64};
1696                                 if (width < 32) {
1697                                         mask[idx] =
1698                                                 rte_cpu_to_be_32(0xffffffff >>
1699                                                                  (32 - width));
1700                                         width = 0;
1701                                 } else {
1702                                         mask[idx] = RTE_BE32(0xffffffff);
1703                                         width -= 32;
1704                                 }
1705                                 if (!width)
1706                                         break;
1707                                 ++idx;
1708                         }
1709                         info[idx] = (struct field_modify_info){4, 4 * idx,
1710                                                 MLX5_MODI_OUT_DIPV6_127_96};
1711                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1712                                                      (32 - width));
1713                 } else {
1714                         if (data->offset < 32)
1715                                 info[idx++] = (struct field_modify_info){4, 0,
1716                                                 MLX5_MODI_OUT_DIPV6_31_0};
1717                         if (data->offset < 64)
1718                                 info[idx++] = (struct field_modify_info){4, 0,
1719                                                 MLX5_MODI_OUT_DIPV6_63_32};
1720                         if (data->offset < 96)
1721                                 info[idx++] = (struct field_modify_info){4, 0,
1722                                                 MLX5_MODI_OUT_DIPV6_95_64};
1723                         if (data->offset < 128)
1724                                 info[idx++] = (struct field_modify_info){4, 0,
1725                                                 MLX5_MODI_OUT_DIPV6_127_96};
1726                 }
1727                 break;
1728         case RTE_FLOW_FIELD_TCP_PORT_SRC:
1729                 info[idx] = (struct field_modify_info){2, 0,
1730                                         MLX5_MODI_OUT_TCP_SPORT};
1731                 if (mask)
1732                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1733                 break;
1734         case RTE_FLOW_FIELD_TCP_PORT_DST:
1735                 info[idx] = (struct field_modify_info){2, 0,
1736                                         MLX5_MODI_OUT_TCP_DPORT};
1737                 if (mask)
1738                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1739                 break;
1740         case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1741                 info[idx] = (struct field_modify_info){4, 0,
1742                                         MLX5_MODI_OUT_TCP_SEQ_NUM};
1743                 if (mask)
1744                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1745                                                      (32 - width));
1746                 break;
1747         case RTE_FLOW_FIELD_TCP_ACK_NUM:
1748                 info[idx] = (struct field_modify_info){4, 0,
1749                                         MLX5_MODI_OUT_TCP_ACK_NUM};
1750                 if (mask)
1751                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1752                                                      (32 - width));
1753                 break;
1754         case RTE_FLOW_FIELD_TCP_FLAGS:
1755                 info[idx] = (struct field_modify_info){2, 0,
1756                                         MLX5_MODI_OUT_TCP_FLAGS};
1757                 if (mask)
1758                         mask[idx] = rte_cpu_to_be_16(0x1ff >> (9 - width));
1759                 break;
1760         case RTE_FLOW_FIELD_UDP_PORT_SRC:
1761                 info[idx] = (struct field_modify_info){2, 0,
1762                                         MLX5_MODI_OUT_UDP_SPORT};
1763                 if (mask)
1764                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1765                 break;
1766         case RTE_FLOW_FIELD_UDP_PORT_DST:
1767                 info[idx] = (struct field_modify_info){2, 0,
1768                                         MLX5_MODI_OUT_UDP_DPORT};
1769                 if (mask)
1770                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1771                 break;
1772         case RTE_FLOW_FIELD_VXLAN_VNI:
1773                 /* not supported yet */
1774                 break;
1775         case RTE_FLOW_FIELD_GENEVE_VNI:
1776                 /* not supported yet*/
1777                 break;
1778         case RTE_FLOW_FIELD_GTP_TEID:
1779                 info[idx] = (struct field_modify_info){4, 0,
1780                                         MLX5_MODI_GTP_TEID};
1781                 if (mask)
1782                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1783                                                      (32 - width));
1784                 break;
1785         case RTE_FLOW_FIELD_TAG:
1786                 {
1787                         int reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG,
1788                                                    data->level, error);
1789                         if (reg < 0)
1790                                 return;
1791                         MLX5_ASSERT(reg != REG_NON);
1792                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1793                         info[idx] = (struct field_modify_info){4, 0,
1794                                                 reg_to_field[reg]};
1795                         if (mask)
1796                                 mask[idx] =
1797                                         rte_cpu_to_be_32(0xffffffff >>
1798                                                          (32 - width));
1799                 }
1800                 break;
1801         case RTE_FLOW_FIELD_MARK:
1802                 {
1803                         uint32_t mark_mask = priv->sh->dv_mark_mask;
1804                         uint32_t mark_count = __builtin_popcount(mark_mask);
1805                         int reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK,
1806                                                        0, error);
1807                         if (reg < 0)
1808                                 return;
1809                         MLX5_ASSERT(reg != REG_NON);
1810                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1811                         info[idx] = (struct field_modify_info){4, 0,
1812                                                 reg_to_field[reg]};
1813                         if (mask)
1814                                 mask[idx] = rte_cpu_to_be_32((mark_mask >>
1815                                          (mark_count - width)) & mark_mask);
1816                 }
1817                 break;
1818         case RTE_FLOW_FIELD_META:
1819                 {
1820                         uint32_t meta_mask = priv->sh->dv_meta_mask;
1821                         uint32_t meta_count = __builtin_popcount(meta_mask);
1822                         uint32_t msk_c0 =
1823                                 rte_cpu_to_be_32(priv->sh->dv_regc0_mask);
1824                         uint32_t shl_c0 = rte_bsf32(msk_c0);
1825                         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1826                         if (reg < 0)
1827                                 return;
1828                         MLX5_ASSERT(reg != REG_NON);
1829                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1830                         if (reg == REG_C_0)
1831                                 *shift = shl_c0;
1832                         info[idx] = (struct field_modify_info){4, 0,
1833                                                 reg_to_field[reg]};
1834                         if (mask)
1835                                 mask[idx] = rte_cpu_to_be_32((meta_mask >>
1836                                         (meta_count - width)) & meta_mask);
1837                 }
1838                 break;
1839         case RTE_FLOW_FIELD_POINTER:
1840         case RTE_FLOW_FIELD_VALUE:
1841                 if (data->field == RTE_FLOW_FIELD_POINTER)
1842                         memcpy(&val, (void *)(uintptr_t)data->value,
1843                                sizeof(uint64_t));
1844                 else
1845                         val = data->value;
1846                 for (idx = 0; idx < MLX5_ACT_MAX_MOD_FIELDS; idx++) {
1847                         if (mask[idx]) {
1848                                 if (dst_width == 48) {
1849                                         /*special case for MAC addresses */
1850                                         value[idx] = rte_cpu_to_be_16(val);
1851                                         val >>= 16;
1852                                         dst_width -= 16;
1853                                 } else if (dst_width > 16) {
1854                                         value[idx] = rte_cpu_to_be_32(val);
1855                                         val >>= 32;
1856                                 } else if (dst_width > 8) {
1857                                         value[idx] = rte_cpu_to_be_16(val);
1858                                         val >>= 16;
1859                                 } else {
1860                                         value[idx] = (uint8_t)val;
1861                                         val >>= 8;
1862                                 }
1863                                 if (*shift)
1864                                         value[idx] <<= *shift;
1865                                 if (!val)
1866                                         break;
1867                         }
1868                 }
1869                 break;
1870         default:
1871                 MLX5_ASSERT(false);
1872                 break;
1873         }
1874 }
1875
1876 /**
1877  * Convert modify_field action to DV specification.
1878  *
1879  * @param[in] dev
1880  *   Pointer to the rte_eth_dev structure.
1881  * @param[in,out] resource
1882  *   Pointer to the modify-header resource.
1883  * @param[in] action
1884  *   Pointer to action specification.
1885  * @param[in] attr
1886  *   Attributes of flow that includes this item.
1887  * @param[out] error
1888  *   Pointer to the error structure.
1889  *
1890  * @return
1891  *   0 on success, a negative errno value otherwise and rte_errno is set.
1892  */
1893 static int
1894 flow_dv_convert_action_modify_field
1895                         (struct rte_eth_dev *dev,
1896                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1897                          const struct rte_flow_action *action,
1898                          const struct rte_flow_attr *attr,
1899                          struct rte_flow_error *error)
1900 {
1901         struct mlx5_priv *priv = dev->data->dev_private;
1902         const struct rte_flow_action_modify_field *conf =
1903                 (const struct rte_flow_action_modify_field *)(action->conf);
1904         struct rte_flow_item item;
1905         struct field_modify_info field[MLX5_ACT_MAX_MOD_FIELDS] = {
1906                                                                 {0, 0, 0} };
1907         struct field_modify_info dcopy[MLX5_ACT_MAX_MOD_FIELDS] = {
1908                                                                 {0, 0, 0} };
1909         uint32_t mask[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1910         uint32_t value[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1911         uint32_t type;
1912         uint32_t shift = 0;
1913         uint32_t dst_width = mlx5_flow_item_field_width(priv, conf->dst.field);
1914
1915         if (conf->src.field == RTE_FLOW_FIELD_POINTER ||
1916                 conf->src.field == RTE_FLOW_FIELD_VALUE) {
1917                 type = MLX5_MODIFICATION_TYPE_SET;
1918                 /** For SET fill the destination field (field) first. */
1919                 mlx5_flow_field_id_to_modify_info(&conf->dst, field, mask,
1920                                                   value, conf->width, dst_width,
1921                                                   &shift, dev, attr, error);
1922                 /** Then copy immediate value from source as per mask. */
1923                 mlx5_flow_field_id_to_modify_info(&conf->src, dcopy, mask,
1924                                                   value, conf->width, dst_width,
1925                                                   &shift, dev, attr, error);
1926                 item.spec = &value;
1927         } else {
1928                 type = MLX5_MODIFICATION_TYPE_COPY;
1929                 /** For COPY fill the destination field (dcopy) without mask. */
1930                 mlx5_flow_field_id_to_modify_info(&conf->dst, dcopy, NULL,
1931                                                   value, conf->width, dst_width,
1932                                                   &shift, dev, attr, error);
1933                 /** Then construct the source field (field) with mask. */
1934                 mlx5_flow_field_id_to_modify_info(&conf->src, field, mask,
1935                                                   value, conf->width, dst_width,
1936                                                   &shift, dev, attr, error);
1937         }
1938         item.mask = &mask;
1939         return flow_dv_convert_modify_action(&item,
1940                         field, dcopy, resource, type, error);
1941 }
1942
1943 /**
1944  * Validate MARK item.
1945  *
1946  * @param[in] dev
1947  *   Pointer to the rte_eth_dev structure.
1948  * @param[in] item
1949  *   Item specification.
1950  * @param[in] attr
1951  *   Attributes of flow that includes this item.
1952  * @param[out] error
1953  *   Pointer to error structure.
1954  *
1955  * @return
1956  *   0 on success, a negative errno value otherwise and rte_errno is set.
1957  */
1958 static int
1959 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1960                            const struct rte_flow_item *item,
1961                            const struct rte_flow_attr *attr __rte_unused,
1962                            struct rte_flow_error *error)
1963 {
1964         struct mlx5_priv *priv = dev->data->dev_private;
1965         struct mlx5_dev_config *config = &priv->config;
1966         const struct rte_flow_item_mark *spec = item->spec;
1967         const struct rte_flow_item_mark *mask = item->mask;
1968         const struct rte_flow_item_mark nic_mask = {
1969                 .id = priv->sh->dv_mark_mask,
1970         };
1971         int ret;
1972
1973         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1974                 return rte_flow_error_set(error, ENOTSUP,
1975                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1976                                           "extended metadata feature"
1977                                           " isn't enabled");
1978         if (!mlx5_flow_ext_mreg_supported(dev))
1979                 return rte_flow_error_set(error, ENOTSUP,
1980                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1981                                           "extended metadata register"
1982                                           " isn't supported");
1983         if (!nic_mask.id)
1984                 return rte_flow_error_set(error, ENOTSUP,
1985                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1986                                           "extended metadata register"
1987                                           " isn't available");
1988         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1989         if (ret < 0)
1990                 return ret;
1991         if (!spec)
1992                 return rte_flow_error_set(error, EINVAL,
1993                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1994                                           item->spec,
1995                                           "data cannot be empty");
1996         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1997                 return rte_flow_error_set(error, EINVAL,
1998                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1999                                           &spec->id,
2000                                           "mark id exceeds the limit");
2001         if (!mask)
2002                 mask = &nic_mask;
2003         if (!mask->id)
2004                 return rte_flow_error_set(error, EINVAL,
2005                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2006                                         "mask cannot be zero");
2007
2008         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2009                                         (const uint8_t *)&nic_mask,
2010                                         sizeof(struct rte_flow_item_mark),
2011                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2012         if (ret < 0)
2013                 return ret;
2014         return 0;
2015 }
2016
2017 /**
2018  * Validate META item.
2019  *
2020  * @param[in] dev
2021  *   Pointer to the rte_eth_dev structure.
2022  * @param[in] item
2023  *   Item specification.
2024  * @param[in] attr
2025  *   Attributes of flow that includes this item.
2026  * @param[out] error
2027  *   Pointer to error structure.
2028  *
2029  * @return
2030  *   0 on success, a negative errno value otherwise and rte_errno is set.
2031  */
2032 static int
2033 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
2034                            const struct rte_flow_item *item,
2035                            const struct rte_flow_attr *attr,
2036                            struct rte_flow_error *error)
2037 {
2038         struct mlx5_priv *priv = dev->data->dev_private;
2039         struct mlx5_dev_config *config = &priv->config;
2040         const struct rte_flow_item_meta *spec = item->spec;
2041         const struct rte_flow_item_meta *mask = item->mask;
2042         struct rte_flow_item_meta nic_mask = {
2043                 .data = UINT32_MAX
2044         };
2045         int reg;
2046         int ret;
2047
2048         if (!spec)
2049                 return rte_flow_error_set(error, EINVAL,
2050                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2051                                           item->spec,
2052                                           "data cannot be empty");
2053         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2054                 if (!mlx5_flow_ext_mreg_supported(dev))
2055                         return rte_flow_error_set(error, ENOTSUP,
2056                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2057                                           "extended metadata register"
2058                                           " isn't supported");
2059                 reg = flow_dv_get_metadata_reg(dev, attr, error);
2060                 if (reg < 0)
2061                         return reg;
2062                 if (reg == REG_NON)
2063                         return rte_flow_error_set(error, ENOTSUP,
2064                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2065                                         "unavalable extended metadata register");
2066                 if (reg == REG_B)
2067                         return rte_flow_error_set(error, ENOTSUP,
2068                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2069                                           "match on reg_b "
2070                                           "isn't supported");
2071                 if (reg != REG_A)
2072                         nic_mask.data = priv->sh->dv_meta_mask;
2073         } else {
2074                 if (attr->transfer)
2075                         return rte_flow_error_set(error, ENOTSUP,
2076                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2077                                         "extended metadata feature "
2078                                         "should be enabled when "
2079                                         "meta item is requested "
2080                                         "with e-switch mode ");
2081                 if (attr->ingress)
2082                         return rte_flow_error_set(error, ENOTSUP,
2083                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2084                                         "match on metadata for ingress "
2085                                         "is not supported in legacy "
2086                                         "metadata mode");
2087         }
2088         if (!mask)
2089                 mask = &rte_flow_item_meta_mask;
2090         if (!mask->data)
2091                 return rte_flow_error_set(error, EINVAL,
2092                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2093                                         "mask cannot be zero");
2094
2095         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2096                                         (const uint8_t *)&nic_mask,
2097                                         sizeof(struct rte_flow_item_meta),
2098                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2099         return ret;
2100 }
2101
2102 /**
2103  * Validate TAG item.
2104  *
2105  * @param[in] dev
2106  *   Pointer to the rte_eth_dev structure.
2107  * @param[in] item
2108  *   Item specification.
2109  * @param[in] attr
2110  *   Attributes of flow that includes this item.
2111  * @param[out] error
2112  *   Pointer to error structure.
2113  *
2114  * @return
2115  *   0 on success, a negative errno value otherwise and rte_errno is set.
2116  */
2117 static int
2118 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
2119                           const struct rte_flow_item *item,
2120                           const struct rte_flow_attr *attr __rte_unused,
2121                           struct rte_flow_error *error)
2122 {
2123         const struct rte_flow_item_tag *spec = item->spec;
2124         const struct rte_flow_item_tag *mask = item->mask;
2125         const struct rte_flow_item_tag nic_mask = {
2126                 .data = RTE_BE32(UINT32_MAX),
2127                 .index = 0xff,
2128         };
2129         int ret;
2130
2131         if (!mlx5_flow_ext_mreg_supported(dev))
2132                 return rte_flow_error_set(error, ENOTSUP,
2133                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2134                                           "extensive metadata register"
2135                                           " isn't supported");
2136         if (!spec)
2137                 return rte_flow_error_set(error, EINVAL,
2138                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2139                                           item->spec,
2140                                           "data cannot be empty");
2141         if (!mask)
2142                 mask = &rte_flow_item_tag_mask;
2143         if (!mask->data)
2144                 return rte_flow_error_set(error, EINVAL,
2145                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2146                                         "mask cannot be zero");
2147
2148         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2149                                         (const uint8_t *)&nic_mask,
2150                                         sizeof(struct rte_flow_item_tag),
2151                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2152         if (ret < 0)
2153                 return ret;
2154         if (mask->index != 0xff)
2155                 return rte_flow_error_set(error, EINVAL,
2156                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2157                                           "partial mask for tag index"
2158                                           " is not supported");
2159         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
2160         if (ret < 0)
2161                 return ret;
2162         MLX5_ASSERT(ret != REG_NON);
2163         return 0;
2164 }
2165
2166 /**
2167  * Validate vport item.
2168  *
2169  * @param[in] dev
2170  *   Pointer to the rte_eth_dev structure.
2171  * @param[in] item
2172  *   Item specification.
2173  * @param[in] attr
2174  *   Attributes of flow that includes this item.
2175  * @param[in] item_flags
2176  *   Bit-fields that holds the items detected until now.
2177  * @param[out] error
2178  *   Pointer to error structure.
2179  *
2180  * @return
2181  *   0 on success, a negative errno value otherwise and rte_errno is set.
2182  */
2183 static int
2184 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
2185                               const struct rte_flow_item *item,
2186                               const struct rte_flow_attr *attr,
2187                               uint64_t item_flags,
2188                               struct rte_flow_error *error)
2189 {
2190         const struct rte_flow_item_port_id *spec = item->spec;
2191         const struct rte_flow_item_port_id *mask = item->mask;
2192         const struct rte_flow_item_port_id switch_mask = {
2193                         .id = 0xffffffff,
2194         };
2195         struct mlx5_priv *esw_priv;
2196         struct mlx5_priv *dev_priv;
2197         int ret;
2198
2199         if (!attr->transfer)
2200                 return rte_flow_error_set(error, EINVAL,
2201                                           RTE_FLOW_ERROR_TYPE_ITEM,
2202                                           NULL,
2203                                           "match on port id is valid only"
2204                                           " when transfer flag is enabled");
2205         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
2206                 return rte_flow_error_set(error, ENOTSUP,
2207                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2208                                           "multiple source ports are not"
2209                                           " supported");
2210         if (!mask)
2211                 mask = &switch_mask;
2212         if (mask->id != 0xffffffff)
2213                 return rte_flow_error_set(error, ENOTSUP,
2214                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2215                                            mask,
2216                                            "no support for partial mask on"
2217                                            " \"id\" field");
2218         ret = mlx5_flow_item_acceptable
2219                                 (item, (const uint8_t *)mask,
2220                                  (const uint8_t *)&rte_flow_item_port_id_mask,
2221                                  sizeof(struct rte_flow_item_port_id),
2222                                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2223         if (ret)
2224                 return ret;
2225         if (!spec)
2226                 return 0;
2227         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
2228         if (!esw_priv)
2229                 return rte_flow_error_set(error, rte_errno,
2230                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2231                                           "failed to obtain E-Switch info for"
2232                                           " port");
2233         dev_priv = mlx5_dev_to_eswitch_info(dev);
2234         if (!dev_priv)
2235                 return rte_flow_error_set(error, rte_errno,
2236                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2237                                           NULL,
2238                                           "failed to obtain E-Switch info");
2239         if (esw_priv->domain_id != dev_priv->domain_id)
2240                 return rte_flow_error_set(error, EINVAL,
2241                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2242                                           "cannot match on a port from a"
2243                                           " different E-Switch");
2244         return 0;
2245 }
2246
2247 /**
2248  * Validate VLAN item.
2249  *
2250  * @param[in] item
2251  *   Item specification.
2252  * @param[in] item_flags
2253  *   Bit-fields that holds the items detected until now.
2254  * @param[in] dev
2255  *   Ethernet device flow is being created on.
2256  * @param[out] error
2257  *   Pointer to error structure.
2258  *
2259  * @return
2260  *   0 on success, a negative errno value otherwise and rte_errno is set.
2261  */
2262 static int
2263 flow_dv_validate_item_vlan(const struct rte_flow_item *item,
2264                            uint64_t item_flags,
2265                            struct rte_eth_dev *dev,
2266                            struct rte_flow_error *error)
2267 {
2268         const struct rte_flow_item_vlan *mask = item->mask;
2269         const struct rte_flow_item_vlan nic_mask = {
2270                 .tci = RTE_BE16(UINT16_MAX),
2271                 .inner_type = RTE_BE16(UINT16_MAX),
2272                 .has_more_vlan = 1,
2273         };
2274         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2275         int ret;
2276         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2277                                         MLX5_FLOW_LAYER_INNER_L4) :
2278                                        (MLX5_FLOW_LAYER_OUTER_L3 |
2279                                         MLX5_FLOW_LAYER_OUTER_L4);
2280         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2281                                         MLX5_FLOW_LAYER_OUTER_VLAN;
2282
2283         if (item_flags & vlanm)
2284                 return rte_flow_error_set(error, EINVAL,
2285                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2286                                           "multiple VLAN layers not supported");
2287         else if ((item_flags & l34m) != 0)
2288                 return rte_flow_error_set(error, EINVAL,
2289                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2290                                           "VLAN cannot follow L3/L4 layer");
2291         if (!mask)
2292                 mask = &rte_flow_item_vlan_mask;
2293         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2294                                         (const uint8_t *)&nic_mask,
2295                                         sizeof(struct rte_flow_item_vlan),
2296                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2297         if (ret)
2298                 return ret;
2299         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2300                 struct mlx5_priv *priv = dev->data->dev_private;
2301
2302                 if (priv->vmwa_context) {
2303                         /*
2304                          * Non-NULL context means we have a virtual machine
2305                          * and SR-IOV enabled, we have to create VLAN interface
2306                          * to make hypervisor to setup E-Switch vport
2307                          * context correctly. We avoid creating the multiple
2308                          * VLAN interfaces, so we cannot support VLAN tag mask.
2309                          */
2310                         return rte_flow_error_set(error, EINVAL,
2311                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2312                                                   item,
2313                                                   "VLAN tag mask is not"
2314                                                   " supported in virtual"
2315                                                   " environment");
2316                 }
2317         }
2318         return 0;
2319 }
2320
2321 /*
2322  * GTP flags are contained in 1 byte of the format:
2323  * -------------------------------------------
2324  * | bit   | 0 - 2   | 3  | 4   | 5 | 6 | 7  |
2325  * |-----------------------------------------|
2326  * | value | Version | PT | Res | E | S | PN |
2327  * -------------------------------------------
2328  *
2329  * Matching is supported only for GTP flags E, S, PN.
2330  */
2331 #define MLX5_GTP_FLAGS_MASK     0x07
2332
2333 /**
2334  * Validate GTP item.
2335  *
2336  * @param[in] dev
2337  *   Pointer to the rte_eth_dev structure.
2338  * @param[in] item
2339  *   Item specification.
2340  * @param[in] item_flags
2341  *   Bit-fields that holds the items detected until now.
2342  * @param[out] error
2343  *   Pointer to error structure.
2344  *
2345  * @return
2346  *   0 on success, a negative errno value otherwise and rte_errno is set.
2347  */
2348 static int
2349 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
2350                           const struct rte_flow_item *item,
2351                           uint64_t item_flags,
2352                           struct rte_flow_error *error)
2353 {
2354         struct mlx5_priv *priv = dev->data->dev_private;
2355         const struct rte_flow_item_gtp *spec = item->spec;
2356         const struct rte_flow_item_gtp *mask = item->mask;
2357         const struct rte_flow_item_gtp nic_mask = {
2358                 .v_pt_rsv_flags = MLX5_GTP_FLAGS_MASK,
2359                 .msg_type = 0xff,
2360                 .teid = RTE_BE32(0xffffffff),
2361         };
2362
2363         if (!priv->config.hca_attr.tunnel_stateless_gtp)
2364                 return rte_flow_error_set(error, ENOTSUP,
2365                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2366                                           "GTP support is not enabled");
2367         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2368                 return rte_flow_error_set(error, ENOTSUP,
2369                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2370                                           "multiple tunnel layers not"
2371                                           " supported");
2372         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2373                 return rte_flow_error_set(error, EINVAL,
2374                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2375                                           "no outer UDP layer found");
2376         if (!mask)
2377                 mask = &rte_flow_item_gtp_mask;
2378         if (spec && spec->v_pt_rsv_flags & ~MLX5_GTP_FLAGS_MASK)
2379                 return rte_flow_error_set(error, ENOTSUP,
2380                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2381                                           "Match is supported for GTP"
2382                                           " flags only");
2383         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2384                                          (const uint8_t *)&nic_mask,
2385                                          sizeof(struct rte_flow_item_gtp),
2386                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2387 }
2388
2389 /**
2390  * Validate GTP PSC item.
2391  *
2392  * @param[in] item
2393  *   Item specification.
2394  * @param[in] last_item
2395  *   Previous validated item in the pattern items.
2396  * @param[in] gtp_item
2397  *   Previous GTP item specification.
2398  * @param[in] attr
2399  *   Pointer to flow attributes.
2400  * @param[out] error
2401  *   Pointer to error structure.
2402  *
2403  * @return
2404  *   0 on success, a negative errno value otherwise and rte_errno is set.
2405  */
2406 static int
2407 flow_dv_validate_item_gtp_psc(const struct rte_flow_item *item,
2408                               uint64_t last_item,
2409                               const struct rte_flow_item *gtp_item,
2410                               const struct rte_flow_attr *attr,
2411                               struct rte_flow_error *error)
2412 {
2413         const struct rte_flow_item_gtp *gtp_spec;
2414         const struct rte_flow_item_gtp *gtp_mask;
2415         const struct rte_flow_item_gtp_psc *mask;
2416         const struct rte_flow_item_gtp_psc nic_mask = {
2417                 .hdr.type = 0xF,
2418                 .hdr.qfi = 0x3F,
2419         };
2420
2421         if (!gtp_item || !(last_item & MLX5_FLOW_LAYER_GTP))
2422                 return rte_flow_error_set
2423                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2424                          "GTP PSC item must be preceded with GTP item");
2425         gtp_spec = gtp_item->spec;
2426         gtp_mask = gtp_item->mask ? gtp_item->mask : &rte_flow_item_gtp_mask;
2427         /* GTP spec and E flag is requested to match zero. */
2428         if (gtp_spec &&
2429                 (gtp_mask->v_pt_rsv_flags &
2430                 ~gtp_spec->v_pt_rsv_flags & MLX5_GTP_EXT_HEADER_FLAG))
2431                 return rte_flow_error_set
2432                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2433                          "GTP E flag must be 1 to match GTP PSC");
2434         /* Check the flow is not created in group zero. */
2435         if (!attr->transfer && !attr->group)
2436                 return rte_flow_error_set
2437                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2438                          "GTP PSC is not supported for group 0");
2439         /* GTP spec is here and E flag is requested to match zero. */
2440         if (!item->spec)
2441                 return 0;
2442         mask = item->mask ? item->mask : &rte_flow_item_gtp_psc_mask;
2443         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2444                                          (const uint8_t *)&nic_mask,
2445                                          sizeof(struct rte_flow_item_gtp_psc),
2446                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2447 }
2448
2449 /**
2450  * Validate IPV4 item.
2451  * Use existing validation function mlx5_flow_validate_item_ipv4(), and
2452  * add specific validation of fragment_offset field,
2453  *
2454  * @param[in] item
2455  *   Item specification.
2456  * @param[in] item_flags
2457  *   Bit-fields that holds the items detected until now.
2458  * @param[out] error
2459  *   Pointer to error structure.
2460  *
2461  * @return
2462  *   0 on success, a negative errno value otherwise and rte_errno is set.
2463  */
2464 static int
2465 flow_dv_validate_item_ipv4(struct rte_eth_dev *dev,
2466                            const struct rte_flow_item *item,
2467                            uint64_t item_flags, uint64_t last_item,
2468                            uint16_t ether_type, struct rte_flow_error *error)
2469 {
2470         int ret;
2471         struct mlx5_priv *priv = dev->data->dev_private;
2472         const struct rte_flow_item_ipv4 *spec = item->spec;
2473         const struct rte_flow_item_ipv4 *last = item->last;
2474         const struct rte_flow_item_ipv4 *mask = item->mask;
2475         rte_be16_t fragment_offset_spec = 0;
2476         rte_be16_t fragment_offset_last = 0;
2477         struct rte_flow_item_ipv4 nic_ipv4_mask = {
2478                 .hdr = {
2479                         .src_addr = RTE_BE32(0xffffffff),
2480                         .dst_addr = RTE_BE32(0xffffffff),
2481                         .type_of_service = 0xff,
2482                         .fragment_offset = RTE_BE16(0xffff),
2483                         .next_proto_id = 0xff,
2484                         .time_to_live = 0xff,
2485                 },
2486         };
2487
2488         if (mask && (mask->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK)) {
2489                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2490                 bool ihl_cap = !tunnel ? priv->config.hca_attr.outer_ipv4_ihl :
2491                                priv->config.hca_attr.inner_ipv4_ihl;
2492                 if (!ihl_cap)
2493                         return rte_flow_error_set(error, ENOTSUP,
2494                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2495                                                   item,
2496                                                   "IPV4 ihl offload not supported");
2497                 nic_ipv4_mask.hdr.version_ihl = mask->hdr.version_ihl;
2498         }
2499         ret = mlx5_flow_validate_item_ipv4(item, item_flags, last_item,
2500                                            ether_type, &nic_ipv4_mask,
2501                                            MLX5_ITEM_RANGE_ACCEPTED, error);
2502         if (ret < 0)
2503                 return ret;
2504         if (spec && mask)
2505                 fragment_offset_spec = spec->hdr.fragment_offset &
2506                                        mask->hdr.fragment_offset;
2507         if (!fragment_offset_spec)
2508                 return 0;
2509         /*
2510          * spec and mask are valid, enforce using full mask to make sure the
2511          * complete value is used correctly.
2512          */
2513         if ((mask->hdr.fragment_offset & RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2514                         != RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2515                 return rte_flow_error_set(error, EINVAL,
2516                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2517                                           item, "must use full mask for"
2518                                           " fragment_offset");
2519         /*
2520          * Match on fragment_offset 0x2000 means MF is 1 and frag-offset is 0,
2521          * indicating this is 1st fragment of fragmented packet.
2522          * This is not yet supported in MLX5, return appropriate error message.
2523          */
2524         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG))
2525                 return rte_flow_error_set(error, ENOTSUP,
2526                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2527                                           "match on first fragment not "
2528                                           "supported");
2529         if (fragment_offset_spec && !last)
2530                 return rte_flow_error_set(error, ENOTSUP,
2531                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2532                                           "specified value not supported");
2533         /* spec and last are valid, validate the specified range. */
2534         fragment_offset_last = last->hdr.fragment_offset &
2535                                mask->hdr.fragment_offset;
2536         /*
2537          * Match on fragment_offset spec 0x2001 and last 0x3fff
2538          * means MF is 1 and frag-offset is > 0.
2539          * This packet is fragment 2nd and onward, excluding last.
2540          * This is not yet supported in MLX5, return appropriate
2541          * error message.
2542          */
2543         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG + 1) &&
2544             fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2545                 return rte_flow_error_set(error, ENOTSUP,
2546                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2547                                           last, "match on following "
2548                                           "fragments not supported");
2549         /*
2550          * Match on fragment_offset spec 0x0001 and last 0x1fff
2551          * means MF is 0 and frag-offset is > 0.
2552          * This packet is last fragment of fragmented packet.
2553          * This is not yet supported in MLX5, return appropriate
2554          * error message.
2555          */
2556         if (fragment_offset_spec == RTE_BE16(1) &&
2557             fragment_offset_last == RTE_BE16(RTE_IPV4_HDR_OFFSET_MASK))
2558                 return rte_flow_error_set(error, ENOTSUP,
2559                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2560                                           last, "match on last "
2561                                           "fragment not supported");
2562         /*
2563          * Match on fragment_offset spec 0x0001 and last 0x3fff
2564          * means MF and/or frag-offset is not 0.
2565          * This is a fragmented packet.
2566          * Other range values are invalid and rejected.
2567          */
2568         if (!(fragment_offset_spec == RTE_BE16(1) &&
2569               fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK)))
2570                 return rte_flow_error_set(error, ENOTSUP,
2571                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2572                                           "specified range not supported");
2573         return 0;
2574 }
2575
2576 /**
2577  * Validate IPV6 fragment extension item.
2578  *
2579  * @param[in] item
2580  *   Item specification.
2581  * @param[in] item_flags
2582  *   Bit-fields that holds the items detected until now.
2583  * @param[out] error
2584  *   Pointer to error structure.
2585  *
2586  * @return
2587  *   0 on success, a negative errno value otherwise and rte_errno is set.
2588  */
2589 static int
2590 flow_dv_validate_item_ipv6_frag_ext(const struct rte_flow_item *item,
2591                                     uint64_t item_flags,
2592                                     struct rte_flow_error *error)
2593 {
2594         const struct rte_flow_item_ipv6_frag_ext *spec = item->spec;
2595         const struct rte_flow_item_ipv6_frag_ext *last = item->last;
2596         const struct rte_flow_item_ipv6_frag_ext *mask = item->mask;
2597         rte_be16_t frag_data_spec = 0;
2598         rte_be16_t frag_data_last = 0;
2599         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2600         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2601                                       MLX5_FLOW_LAYER_OUTER_L4;
2602         int ret = 0;
2603         struct rte_flow_item_ipv6_frag_ext nic_mask = {
2604                 .hdr = {
2605                         .next_header = 0xff,
2606                         .frag_data = RTE_BE16(0xffff),
2607                 },
2608         };
2609
2610         if (item_flags & l4m)
2611                 return rte_flow_error_set(error, EINVAL,
2612                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2613                                           "ipv6 fragment extension item cannot "
2614                                           "follow L4 item.");
2615         if ((tunnel && !(item_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
2616             (!tunnel && !(item_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV6)))
2617                 return rte_flow_error_set(error, EINVAL,
2618                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2619                                           "ipv6 fragment extension item must "
2620                                           "follow ipv6 item");
2621         if (spec && mask)
2622                 frag_data_spec = spec->hdr.frag_data & mask->hdr.frag_data;
2623         if (!frag_data_spec)
2624                 return 0;
2625         /*
2626          * spec and mask are valid, enforce using full mask to make sure the
2627          * complete value is used correctly.
2628          */
2629         if ((mask->hdr.frag_data & RTE_BE16(RTE_IPV6_FRAG_USED_MASK)) !=
2630                                 RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2631                 return rte_flow_error_set(error, EINVAL,
2632                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2633                                           item, "must use full mask for"
2634                                           " frag_data");
2635         /*
2636          * Match on frag_data 0x00001 means M is 1 and frag-offset is 0.
2637          * This is 1st fragment of fragmented packet.
2638          */
2639         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_MF_MASK))
2640                 return rte_flow_error_set(error, ENOTSUP,
2641                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2642                                           "match on first fragment not "
2643                                           "supported");
2644         if (frag_data_spec && !last)
2645                 return rte_flow_error_set(error, EINVAL,
2646                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2647                                           "specified value not supported");
2648         ret = mlx5_flow_item_acceptable
2649                                 (item, (const uint8_t *)mask,
2650                                  (const uint8_t *)&nic_mask,
2651                                  sizeof(struct rte_flow_item_ipv6_frag_ext),
2652                                  MLX5_ITEM_RANGE_ACCEPTED, error);
2653         if (ret)
2654                 return ret;
2655         /* spec and last are valid, validate the specified range. */
2656         frag_data_last = last->hdr.frag_data & mask->hdr.frag_data;
2657         /*
2658          * Match on frag_data spec 0x0009 and last 0xfff9
2659          * means M is 1 and frag-offset is > 0.
2660          * This packet is fragment 2nd and onward, excluding last.
2661          * This is not yet supported in MLX5, return appropriate
2662          * error message.
2663          */
2664         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN |
2665                                        RTE_IPV6_EHDR_MF_MASK) &&
2666             frag_data_last == RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2667                 return rte_flow_error_set(error, ENOTSUP,
2668                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2669                                           last, "match on following "
2670                                           "fragments not supported");
2671         /*
2672          * Match on frag_data spec 0x0008 and last 0xfff8
2673          * means M is 0 and frag-offset is > 0.
2674          * This packet is last fragment of fragmented packet.
2675          * This is not yet supported in MLX5, return appropriate
2676          * error message.
2677          */
2678         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN) &&
2679             frag_data_last == RTE_BE16(RTE_IPV6_EHDR_FO_MASK))
2680                 return rte_flow_error_set(error, ENOTSUP,
2681                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2682                                           last, "match on last "
2683                                           "fragment not supported");
2684         /* Other range values are invalid and rejected. */
2685         return rte_flow_error_set(error, EINVAL,
2686                                   RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2687                                   "specified range not supported");
2688 }
2689
2690 /*
2691  * Validate ASO CT item.
2692  *
2693  * @param[in] dev
2694  *   Pointer to the rte_eth_dev structure.
2695  * @param[in] item
2696  *   Item specification.
2697  * @param[in] item_flags
2698  *   Pointer to bit-fields that holds the items detected until now.
2699  * @param[out] error
2700  *   Pointer to error structure.
2701  *
2702  * @return
2703  *   0 on success, a negative errno value otherwise and rte_errno is set.
2704  */
2705 static int
2706 flow_dv_validate_item_aso_ct(struct rte_eth_dev *dev,
2707                              const struct rte_flow_item *item,
2708                              uint64_t *item_flags,
2709                              struct rte_flow_error *error)
2710 {
2711         const struct rte_flow_item_conntrack *spec = item->spec;
2712         const struct rte_flow_item_conntrack *mask = item->mask;
2713         RTE_SET_USED(dev);
2714         uint32_t flags;
2715
2716         if (*item_flags & MLX5_FLOW_LAYER_ASO_CT)
2717                 return rte_flow_error_set(error, EINVAL,
2718                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2719                                           "Only one CT is supported");
2720         if (!mask)
2721                 mask = &rte_flow_item_conntrack_mask;
2722         flags = spec->flags & mask->flags;
2723         if ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID) &&
2724             ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID) ||
2725              (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD) ||
2726              (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)))
2727                 return rte_flow_error_set(error, EINVAL,
2728                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2729                                           "Conflict status bits");
2730         /* State change also needs to be considered. */
2731         *item_flags |= MLX5_FLOW_LAYER_ASO_CT;
2732         return 0;
2733 }
2734
2735 /**
2736  * Validate the pop VLAN action.
2737  *
2738  * @param[in] dev
2739  *   Pointer to the rte_eth_dev structure.
2740  * @param[in] action_flags
2741  *   Holds the actions detected until now.
2742  * @param[in] action
2743  *   Pointer to the pop vlan action.
2744  * @param[in] item_flags
2745  *   The items found in this flow rule.
2746  * @param[in] attr
2747  *   Pointer to flow attributes.
2748  * @param[out] error
2749  *   Pointer to error structure.
2750  *
2751  * @return
2752  *   0 on success, a negative errno value otherwise and rte_errno is set.
2753  */
2754 static int
2755 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
2756                                  uint64_t action_flags,
2757                                  const struct rte_flow_action *action,
2758                                  uint64_t item_flags,
2759                                  const struct rte_flow_attr *attr,
2760                                  struct rte_flow_error *error)
2761 {
2762         const struct mlx5_priv *priv = dev->data->dev_private;
2763         struct mlx5_dev_ctx_shared *sh = priv->sh;
2764         bool direction_error = false;
2765
2766         if (!priv->sh->pop_vlan_action)
2767                 return rte_flow_error_set(error, ENOTSUP,
2768                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2769                                           NULL,
2770                                           "pop vlan action is not supported");
2771         /* Pop VLAN is not supported in egress except for CX6 FDB mode. */
2772         if (attr->transfer) {
2773                 bool fdb_tx = priv->representor_id != UINT16_MAX;
2774                 bool is_cx5 = sh->steering_format_version ==
2775                     MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2776
2777                 if (fdb_tx && is_cx5)
2778                         direction_error = true;
2779         } else if (attr->egress) {
2780                 direction_error = true;
2781         }
2782         if (direction_error)
2783                 return rte_flow_error_set(error, ENOTSUP,
2784                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2785                                           NULL,
2786                                           "pop vlan action not supported for egress");
2787         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
2788                 return rte_flow_error_set(error, ENOTSUP,
2789                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2790                                           "no support for multiple VLAN "
2791                                           "actions");
2792         /* Pop VLAN with preceding Decap requires inner header with VLAN. */
2793         if ((action_flags & MLX5_FLOW_ACTION_DECAP) &&
2794             !(item_flags & MLX5_FLOW_LAYER_INNER_VLAN))
2795                 return rte_flow_error_set(error, ENOTSUP,
2796                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2797                                           NULL,
2798                                           "cannot pop vlan after decap without "
2799                                           "match on inner vlan in the flow");
2800         /* Pop VLAN without preceding Decap requires outer header with VLAN. */
2801         if (!(action_flags & MLX5_FLOW_ACTION_DECAP) &&
2802             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2803                 return rte_flow_error_set(error, ENOTSUP,
2804                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2805                                           NULL,
2806                                           "cannot pop vlan without a "
2807                                           "match on (outer) vlan in the flow");
2808         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2809                 return rte_flow_error_set(error, EINVAL,
2810                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2811                                           "wrong action order, port_id should "
2812                                           "be after pop VLAN action");
2813         if (!attr->transfer && priv->representor)
2814                 return rte_flow_error_set(error, ENOTSUP,
2815                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2816                                           "pop vlan action for VF representor "
2817                                           "not supported on NIC table");
2818         return 0;
2819 }
2820
2821 /**
2822  * Get VLAN default info from vlan match info.
2823  *
2824  * @param[in] items
2825  *   the list of item specifications.
2826  * @param[out] vlan
2827  *   pointer VLAN info to fill to.
2828  *
2829  * @return
2830  *   0 on success, a negative errno value otherwise and rte_errno is set.
2831  */
2832 static void
2833 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
2834                                   struct rte_vlan_hdr *vlan)
2835 {
2836         const struct rte_flow_item_vlan nic_mask = {
2837                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
2838                                 MLX5DV_FLOW_VLAN_VID_MASK),
2839                 .inner_type = RTE_BE16(0xffff),
2840         };
2841
2842         if (items == NULL)
2843                 return;
2844         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2845                 int type = items->type;
2846
2847                 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
2848                     type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
2849                         break;
2850         }
2851         if (items->type != RTE_FLOW_ITEM_TYPE_END) {
2852                 const struct rte_flow_item_vlan *vlan_m = items->mask;
2853                 const struct rte_flow_item_vlan *vlan_v = items->spec;
2854
2855                 /* If VLAN item in pattern doesn't contain data, return here. */
2856                 if (!vlan_v)
2857                         return;
2858                 if (!vlan_m)
2859                         vlan_m = &nic_mask;
2860                 /* Only full match values are accepted */
2861                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
2862                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
2863                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
2864                         vlan->vlan_tci |=
2865                                 rte_be_to_cpu_16(vlan_v->tci &
2866                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
2867                 }
2868                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
2869                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
2870                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
2871                         vlan->vlan_tci |=
2872                                 rte_be_to_cpu_16(vlan_v->tci &
2873                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
2874                 }
2875                 if (vlan_m->inner_type == nic_mask.inner_type)
2876                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
2877                                                            vlan_m->inner_type);
2878         }
2879 }
2880
2881 /**
2882  * Validate the push VLAN action.
2883  *
2884  * @param[in] dev
2885  *   Pointer to the rte_eth_dev structure.
2886  * @param[in] action_flags
2887  *   Holds the actions detected until now.
2888  * @param[in] item_flags
2889  *   The items found in this flow rule.
2890  * @param[in] action
2891  *   Pointer to the action structure.
2892  * @param[in] attr
2893  *   Pointer to flow attributes
2894  * @param[out] error
2895  *   Pointer to error structure.
2896  *
2897  * @return
2898  *   0 on success, a negative errno value otherwise and rte_errno is set.
2899  */
2900 static int
2901 flow_dv_validate_action_push_vlan(struct rte_eth_dev *dev,
2902                                   uint64_t action_flags,
2903                                   const struct rte_flow_item_vlan *vlan_m,
2904                                   const struct rte_flow_action *action,
2905                                   const struct rte_flow_attr *attr,
2906                                   struct rte_flow_error *error)
2907 {
2908         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
2909         const struct mlx5_priv *priv = dev->data->dev_private;
2910         struct mlx5_dev_ctx_shared *sh = priv->sh;
2911         bool direction_error = false;
2912
2913         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
2914             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
2915                 return rte_flow_error_set(error, EINVAL,
2916                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2917                                           "invalid vlan ethertype");
2918         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2919                 return rte_flow_error_set(error, EINVAL,
2920                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2921                                           "wrong action order, port_id should "
2922                                           "be after push VLAN");
2923         /* Push VLAN is not supported in ingress except for CX6 FDB mode. */
2924         if (attr->transfer) {
2925                 bool fdb_tx = priv->representor_id != UINT16_MAX;
2926                 bool is_cx5 = sh->steering_format_version ==
2927                     MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2928
2929                 if (!fdb_tx && is_cx5)
2930                         direction_error = true;
2931         } else if (attr->ingress) {
2932                 direction_error = true;
2933         }
2934         if (direction_error)
2935                 return rte_flow_error_set(error, ENOTSUP,
2936                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2937                                           NULL,
2938                                           "push vlan action not supported for ingress");
2939         if (!attr->transfer && priv->representor)
2940                 return rte_flow_error_set(error, ENOTSUP,
2941                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2942                                           "push vlan action for VF representor "
2943                                           "not supported on NIC table");
2944         if (vlan_m &&
2945             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) &&
2946             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) !=
2947                 MLX5DV_FLOW_VLAN_PCP_MASK_BE &&
2948             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP) &&
2949             !(mlx5_flow_find_action
2950                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP)))
2951                 return rte_flow_error_set(error, EINVAL,
2952                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2953                                           "not full match mask on VLAN PCP and "
2954                                           "there is no of_set_vlan_pcp action, "
2955                                           "push VLAN action cannot figure out "
2956                                           "PCP value");
2957         if (vlan_m &&
2958             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) &&
2959             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) !=
2960                 MLX5DV_FLOW_VLAN_VID_MASK_BE &&
2961             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID) &&
2962             !(mlx5_flow_find_action
2963                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID)))
2964                 return rte_flow_error_set(error, EINVAL,
2965                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2966                                           "not full match mask on VLAN VID and "
2967                                           "there is no of_set_vlan_vid action, "
2968                                           "push VLAN action cannot figure out "
2969                                           "VID value");
2970         (void)attr;
2971         return 0;
2972 }
2973
2974 /**
2975  * Validate the set VLAN PCP.
2976  *
2977  * @param[in] action_flags
2978  *   Holds the actions detected until now.
2979  * @param[in] actions
2980  *   Pointer to the list of actions remaining in the flow rule.
2981  * @param[out] error
2982  *   Pointer to error structure.
2983  *
2984  * @return
2985  *   0 on success, a negative errno value otherwise and rte_errno is set.
2986  */
2987 static int
2988 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
2989                                      const struct rte_flow_action actions[],
2990                                      struct rte_flow_error *error)
2991 {
2992         const struct rte_flow_action *action = actions;
2993         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
2994
2995         if (conf->vlan_pcp > 7)
2996                 return rte_flow_error_set(error, EINVAL,
2997                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2998                                           "VLAN PCP value is too big");
2999         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
3000                 return rte_flow_error_set(error, ENOTSUP,
3001                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3002                                           "set VLAN PCP action must follow "
3003                                           "the push VLAN action");
3004         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
3005                 return rte_flow_error_set(error, ENOTSUP,
3006                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3007                                           "Multiple VLAN PCP modification are "
3008                                           "not supported");
3009         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
3010                 return rte_flow_error_set(error, EINVAL,
3011                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3012                                           "wrong action order, port_id should "
3013                                           "be after set VLAN PCP");
3014         return 0;
3015 }
3016
3017 /**
3018  * Validate the set VLAN VID.
3019  *
3020  * @param[in] item_flags
3021  *   Holds the items detected in this rule.
3022  * @param[in] action_flags
3023  *   Holds the actions detected until now.
3024  * @param[in] actions
3025  *   Pointer to the list of actions remaining in the flow rule.
3026  * @param[out] error
3027  *   Pointer to error structure.
3028  *
3029  * @return
3030  *   0 on success, a negative errno value otherwise and rte_errno is set.
3031  */
3032 static int
3033 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
3034                                      uint64_t action_flags,
3035                                      const struct rte_flow_action actions[],
3036                                      struct rte_flow_error *error)
3037 {
3038         const struct rte_flow_action *action = actions;
3039         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
3040
3041         if (rte_be_to_cpu_16(conf->vlan_vid) > 0xFFE)
3042                 return rte_flow_error_set(error, EINVAL,
3043                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3044                                           "VLAN VID value is too big");
3045         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
3046             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
3047                 return rte_flow_error_set(error, ENOTSUP,
3048                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3049                                           "set VLAN VID action must follow push"
3050                                           " VLAN action or match on VLAN item");
3051         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
3052                 return rte_flow_error_set(error, ENOTSUP,
3053                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3054                                           "Multiple VLAN VID modifications are "
3055                                           "not supported");
3056         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
3057                 return rte_flow_error_set(error, EINVAL,
3058                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3059                                           "wrong action order, port_id should "
3060                                           "be after set VLAN VID");
3061         return 0;
3062 }
3063
3064 /*
3065  * Validate the FLAG action.
3066  *
3067  * @param[in] dev
3068  *   Pointer to the rte_eth_dev structure.
3069  * @param[in] action_flags
3070  *   Holds the actions detected until now.
3071  * @param[in] attr
3072  *   Pointer to flow attributes
3073  * @param[out] error
3074  *   Pointer to error structure.
3075  *
3076  * @return
3077  *   0 on success, a negative errno value otherwise and rte_errno is set.
3078  */
3079 static int
3080 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
3081                              uint64_t action_flags,
3082                              const struct rte_flow_attr *attr,
3083                              struct rte_flow_error *error)
3084 {
3085         struct mlx5_priv *priv = dev->data->dev_private;
3086         struct mlx5_dev_config *config = &priv->config;
3087         int ret;
3088
3089         /* Fall back if no extended metadata register support. */
3090         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3091                 return mlx5_flow_validate_action_flag(action_flags, attr,
3092                                                       error);
3093         /* Extensive metadata mode requires registers. */
3094         if (!mlx5_flow_ext_mreg_supported(dev))
3095                 return rte_flow_error_set(error, ENOTSUP,
3096                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3097                                           "no metadata registers "
3098                                           "to support flag action");
3099         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
3100                 return rte_flow_error_set(error, ENOTSUP,
3101                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3102                                           "extended metadata register"
3103                                           " isn't available");
3104         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3105         if (ret < 0)
3106                 return ret;
3107         MLX5_ASSERT(ret > 0);
3108         if (action_flags & MLX5_FLOW_ACTION_MARK)
3109                 return rte_flow_error_set(error, EINVAL,
3110                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3111                                           "can't mark and flag in same flow");
3112         if (action_flags & MLX5_FLOW_ACTION_FLAG)
3113                 return rte_flow_error_set(error, EINVAL,
3114                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3115                                           "can't have 2 flag"
3116                                           " actions in same flow");
3117         return 0;
3118 }
3119
3120 /**
3121  * Validate MARK action.
3122  *
3123  * @param[in] dev
3124  *   Pointer to the rte_eth_dev structure.
3125  * @param[in] action
3126  *   Pointer to action.
3127  * @param[in] action_flags
3128  *   Holds the actions detected until now.
3129  * @param[in] attr
3130  *   Pointer to flow attributes
3131  * @param[out] error
3132  *   Pointer to error structure.
3133  *
3134  * @return
3135  *   0 on success, a negative errno value otherwise and rte_errno is set.
3136  */
3137 static int
3138 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
3139                              const struct rte_flow_action *action,
3140                              uint64_t action_flags,
3141                              const struct rte_flow_attr *attr,
3142                              struct rte_flow_error *error)
3143 {
3144         struct mlx5_priv *priv = dev->data->dev_private;
3145         struct mlx5_dev_config *config = &priv->config;
3146         const struct rte_flow_action_mark *mark = action->conf;
3147         int ret;
3148
3149         if (is_tunnel_offload_active(dev))
3150                 return rte_flow_error_set(error, ENOTSUP,
3151                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3152                                           "no mark action "
3153                                           "if tunnel offload active");
3154         /* Fall back if no extended metadata register support. */
3155         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3156                 return mlx5_flow_validate_action_mark(action, action_flags,
3157                                                       attr, error);
3158         /* Extensive metadata mode requires registers. */
3159         if (!mlx5_flow_ext_mreg_supported(dev))
3160                 return rte_flow_error_set(error, ENOTSUP,
3161                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3162                                           "no metadata registers "
3163                                           "to support mark action");
3164         if (!priv->sh->dv_mark_mask)
3165                 return rte_flow_error_set(error, ENOTSUP,
3166                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3167                                           "extended metadata register"
3168                                           " isn't available");
3169         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3170         if (ret < 0)
3171                 return ret;
3172         MLX5_ASSERT(ret > 0);
3173         if (!mark)
3174                 return rte_flow_error_set(error, EINVAL,
3175                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3176                                           "configuration cannot be null");
3177         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
3178                 return rte_flow_error_set(error, EINVAL,
3179                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3180                                           &mark->id,
3181                                           "mark id exceeds the limit");
3182         if (action_flags & MLX5_FLOW_ACTION_FLAG)
3183                 return rte_flow_error_set(error, EINVAL,
3184                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3185                                           "can't flag and mark in same flow");
3186         if (action_flags & MLX5_FLOW_ACTION_MARK)
3187                 return rte_flow_error_set(error, EINVAL,
3188                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3189                                           "can't have 2 mark actions in same"
3190                                           " flow");
3191         return 0;
3192 }
3193
3194 /**
3195  * Validate SET_META action.
3196  *
3197  * @param[in] dev
3198  *   Pointer to the rte_eth_dev structure.
3199  * @param[in] action
3200  *   Pointer to the action structure.
3201  * @param[in] action_flags
3202  *   Holds the actions detected until now.
3203  * @param[in] attr
3204  *   Pointer to flow attributes
3205  * @param[out] error
3206  *   Pointer to error structure.
3207  *
3208  * @return
3209  *   0 on success, a negative errno value otherwise and rte_errno is set.
3210  */
3211 static int
3212 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
3213                                  const struct rte_flow_action *action,
3214                                  uint64_t action_flags __rte_unused,
3215                                  const struct rte_flow_attr *attr,
3216                                  struct rte_flow_error *error)
3217 {
3218         const struct rte_flow_action_set_meta *conf;
3219         uint32_t nic_mask = UINT32_MAX;
3220         int reg;
3221
3222         if (!mlx5_flow_ext_mreg_supported(dev))
3223                 return rte_flow_error_set(error, ENOTSUP,
3224                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3225                                           "extended metadata register"
3226                                           " isn't supported");
3227         reg = flow_dv_get_metadata_reg(dev, attr, error);
3228         if (reg < 0)
3229                 return reg;
3230         if (reg == REG_NON)
3231                 return rte_flow_error_set(error, ENOTSUP,
3232                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3233                                           "unavalable extended metadata register");
3234         if (reg != REG_A && reg != REG_B) {
3235                 struct mlx5_priv *priv = dev->data->dev_private;
3236
3237                 nic_mask = priv->sh->dv_meta_mask;
3238         }
3239         if (!(action->conf))
3240                 return rte_flow_error_set(error, EINVAL,
3241                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3242                                           "configuration cannot be null");
3243         conf = (const struct rte_flow_action_set_meta *)action->conf;
3244         if (!conf->mask)
3245                 return rte_flow_error_set(error, EINVAL,
3246                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3247                                           "zero mask doesn't have any effect");
3248         if (conf->mask & ~nic_mask)
3249                 return rte_flow_error_set(error, EINVAL,
3250                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3251                                           "meta data must be within reg C0");
3252         return 0;
3253 }
3254
3255 /**
3256  * Validate SET_TAG action.
3257  *
3258  * @param[in] dev
3259  *   Pointer to the rte_eth_dev structure.
3260  * @param[in] action
3261  *   Pointer to the action structure.
3262  * @param[in] action_flags
3263  *   Holds the actions detected until now.
3264  * @param[in] attr
3265  *   Pointer to flow attributes
3266  * @param[out] error
3267  *   Pointer to error structure.
3268  *
3269  * @return
3270  *   0 on success, a negative errno value otherwise and rte_errno is set.
3271  */
3272 static int
3273 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
3274                                 const struct rte_flow_action *action,
3275                                 uint64_t action_flags,
3276                                 const struct rte_flow_attr *attr,
3277                                 struct rte_flow_error *error)
3278 {
3279         const struct rte_flow_action_set_tag *conf;
3280         const uint64_t terminal_action_flags =
3281                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
3282                 MLX5_FLOW_ACTION_RSS;
3283         int ret;
3284
3285         if (!mlx5_flow_ext_mreg_supported(dev))
3286                 return rte_flow_error_set(error, ENOTSUP,
3287                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3288                                           "extensive metadata register"
3289                                           " isn't supported");
3290         if (!(action->conf))
3291                 return rte_flow_error_set(error, EINVAL,
3292                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3293                                           "configuration cannot be null");
3294         conf = (const struct rte_flow_action_set_tag *)action->conf;
3295         if (!conf->mask)
3296                 return rte_flow_error_set(error, EINVAL,
3297                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3298                                           "zero mask doesn't have any effect");
3299         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
3300         if (ret < 0)
3301                 return ret;
3302         if (!attr->transfer && attr->ingress &&
3303             (action_flags & terminal_action_flags))
3304                 return rte_flow_error_set(error, EINVAL,
3305                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3306                                           "set_tag has no effect"
3307                                           " with terminal actions");
3308         return 0;
3309 }
3310
3311 /**
3312  * Validate count action.
3313  *
3314  * @param[in] dev
3315  *   Pointer to rte_eth_dev structure.
3316  * @param[in] shared
3317  *   Indicator if action is shared.
3318  * @param[in] action_flags
3319  *   Holds the actions detected until now.
3320  * @param[out] error
3321  *   Pointer to error structure.
3322  *
3323  * @return
3324  *   0 on success, a negative errno value otherwise and rte_errno is set.
3325  */
3326 static int
3327 flow_dv_validate_action_count(struct rte_eth_dev *dev, bool shared,
3328                               uint64_t action_flags,
3329                               struct rte_flow_error *error)
3330 {
3331         struct mlx5_priv *priv = dev->data->dev_private;
3332
3333         if (!priv->config.devx)
3334                 goto notsup_err;
3335         if (action_flags & MLX5_FLOW_ACTION_COUNT)
3336                 return rte_flow_error_set(error, EINVAL,
3337                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3338                                           "duplicate count actions set");
3339         if (shared && (action_flags & MLX5_FLOW_ACTION_AGE) &&
3340             !priv->sh->flow_hit_aso_en)
3341                 return rte_flow_error_set(error, EINVAL,
3342                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3343                                           "old age and shared count combination is not supported");
3344 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
3345         return 0;
3346 #endif
3347 notsup_err:
3348         return rte_flow_error_set
3349                       (error, ENOTSUP,
3350                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3351                        NULL,
3352                        "count action not supported");
3353 }
3354
3355 /**
3356  * Validate the L2 encap action.
3357  *
3358  * @param[in] dev
3359  *   Pointer to the rte_eth_dev structure.
3360  * @param[in] action_flags
3361  *   Holds the actions detected until now.
3362  * @param[in] action
3363  *   Pointer to the action structure.
3364  * @param[in] attr
3365  *   Pointer to flow attributes.
3366  * @param[out] error
3367  *   Pointer to error structure.
3368  *
3369  * @return
3370  *   0 on success, a negative errno value otherwise and rte_errno is set.
3371  */
3372 static int
3373 flow_dv_validate_action_l2_encap(struct rte_eth_dev *dev,
3374                                  uint64_t action_flags,
3375                                  const struct rte_flow_action *action,
3376                                  const struct rte_flow_attr *attr,
3377                                  struct rte_flow_error *error)
3378 {
3379         const struct mlx5_priv *priv = dev->data->dev_private;
3380
3381         if (!(action->conf))
3382                 return rte_flow_error_set(error, EINVAL,
3383                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3384                                           "configuration cannot be null");
3385         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3386                 return rte_flow_error_set(error, EINVAL,
3387                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3388                                           "can only have a single encap action "
3389                                           "in a flow");
3390         if (!attr->transfer && priv->representor)
3391                 return rte_flow_error_set(error, ENOTSUP,
3392                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3393                                           "encap action for VF representor "
3394                                           "not supported on NIC table");
3395         return 0;
3396 }
3397
3398 /**
3399  * Validate a decap action.
3400  *
3401  * @param[in] dev
3402  *   Pointer to the rte_eth_dev structure.
3403  * @param[in] action_flags
3404  *   Holds the actions detected until now.
3405  * @param[in] action
3406  *   Pointer to the action structure.
3407  * @param[in] item_flags
3408  *   Holds the items detected.
3409  * @param[in] attr
3410  *   Pointer to flow attributes
3411  * @param[out] error
3412  *   Pointer to error structure.
3413  *
3414  * @return
3415  *   0 on success, a negative errno value otherwise and rte_errno is set.
3416  */
3417 static int
3418 flow_dv_validate_action_decap(struct rte_eth_dev *dev,
3419                               uint64_t action_flags,
3420                               const struct rte_flow_action *action,
3421                               const uint64_t item_flags,
3422                               const struct rte_flow_attr *attr,
3423                               struct rte_flow_error *error)
3424 {
3425         const struct mlx5_priv *priv = dev->data->dev_private;
3426
3427         if (priv->config.hca_attr.scatter_fcs_w_decap_disable &&
3428             !priv->config.decap_en)
3429                 return rte_flow_error_set(error, ENOTSUP,
3430                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3431                                           "decap is not enabled");
3432         if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
3433                 return rte_flow_error_set(error, ENOTSUP,
3434                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3435                                           action_flags &
3436                                           MLX5_FLOW_ACTION_DECAP ? "can only "
3437                                           "have a single decap action" : "decap "
3438                                           "after encap is not supported");
3439         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
3440                 return rte_flow_error_set(error, EINVAL,
3441                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3442                                           "can't have decap action after"
3443                                           " modify action");
3444         if (attr->egress)
3445                 return rte_flow_error_set(error, ENOTSUP,
3446                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
3447                                           NULL,
3448                                           "decap action not supported for "
3449                                           "egress");
3450         if (!attr->transfer && priv->representor)
3451                 return rte_flow_error_set(error, ENOTSUP,
3452                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3453                                           "decap action for VF representor "
3454                                           "not supported on NIC table");
3455         if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_DECAP &&
3456             !(item_flags & MLX5_FLOW_LAYER_VXLAN))
3457                 return rte_flow_error_set(error, ENOTSUP,
3458                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3459                                 "VXLAN item should be present for VXLAN decap");
3460         return 0;
3461 }
3462
3463 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
3464
3465 /**
3466  * Validate the raw encap and decap actions.
3467  *
3468  * @param[in] dev
3469  *   Pointer to the rte_eth_dev structure.
3470  * @param[in] decap
3471  *   Pointer to the decap action.
3472  * @param[in] encap
3473  *   Pointer to the encap action.
3474  * @param[in] attr
3475  *   Pointer to flow attributes
3476  * @param[in/out] action_flags
3477  *   Holds the actions detected until now.
3478  * @param[out] actions_n
3479  *   pointer to the number of actions counter.
3480  * @param[in] action
3481  *   Pointer to the action structure.
3482  * @param[in] item_flags
3483  *   Holds the items detected.
3484  * @param[out] error
3485  *   Pointer to error structure.
3486  *
3487  * @return
3488  *   0 on success, a negative errno value otherwise and rte_errno is set.
3489  */
3490 static int
3491 flow_dv_validate_action_raw_encap_decap
3492         (struct rte_eth_dev *dev,
3493          const struct rte_flow_action_raw_decap *decap,
3494          const struct rte_flow_action_raw_encap *encap,
3495          const struct rte_flow_attr *attr, uint64_t *action_flags,
3496          int *actions_n, const struct rte_flow_action *action,
3497          uint64_t item_flags, struct rte_flow_error *error)
3498 {
3499         const struct mlx5_priv *priv = dev->data->dev_private;
3500         int ret;
3501
3502         if (encap && (!encap->size || !encap->data))
3503                 return rte_flow_error_set(error, EINVAL,
3504                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3505                                           "raw encap data cannot be empty");
3506         if (decap && encap) {
3507                 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
3508                     encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3509                         /* L3 encap. */
3510                         decap = NULL;
3511                 else if (encap->size <=
3512                            MLX5_ENCAPSULATION_DECISION_SIZE &&
3513                            decap->size >
3514                            MLX5_ENCAPSULATION_DECISION_SIZE)
3515                         /* L3 decap. */
3516                         encap = NULL;
3517                 else if (encap->size >
3518                            MLX5_ENCAPSULATION_DECISION_SIZE &&
3519                            decap->size >
3520                            MLX5_ENCAPSULATION_DECISION_SIZE)
3521                         /* 2 L2 actions: encap and decap. */
3522                         ;
3523                 else
3524                         return rte_flow_error_set(error,
3525                                 ENOTSUP,
3526                                 RTE_FLOW_ERROR_TYPE_ACTION,
3527                                 NULL, "unsupported too small "
3528                                 "raw decap and too small raw "
3529                                 "encap combination");
3530         }
3531         if (decap) {
3532                 ret = flow_dv_validate_action_decap(dev, *action_flags, action,
3533                                                     item_flags, attr, error);
3534                 if (ret < 0)
3535                         return ret;
3536                 *action_flags |= MLX5_FLOW_ACTION_DECAP;
3537                 ++(*actions_n);
3538         }
3539         if (encap) {
3540                 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
3541                         return rte_flow_error_set(error, ENOTSUP,
3542                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3543                                                   NULL,
3544                                                   "small raw encap size");
3545                 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
3546                         return rte_flow_error_set(error, EINVAL,
3547                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3548                                                   NULL,
3549                                                   "more than one encap action");
3550                 if (!attr->transfer && priv->representor)
3551                         return rte_flow_error_set
3552                                         (error, ENOTSUP,
3553                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3554                                          "encap action for VF representor "
3555                                          "not supported on NIC table");
3556                 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
3557                 ++(*actions_n);
3558         }
3559         return 0;
3560 }
3561
3562 /*
3563  * Validate the ASO CT action.
3564  *
3565  * @param[in] dev
3566  *   Pointer to the rte_eth_dev structure.
3567  * @param[in] action_flags
3568  *   Holds the actions detected until now.
3569  * @param[in] item_flags
3570  *   The items found in this flow rule.
3571  * @param[in] attr
3572  *   Pointer to flow attributes.
3573  * @param[out] error
3574  *   Pointer to error structure.
3575  *
3576  * @return
3577  *   0 on success, a negative errno value otherwise and rte_errno is set.
3578  */
3579 static int
3580 flow_dv_validate_action_aso_ct(struct rte_eth_dev *dev,
3581                                uint64_t action_flags,
3582                                uint64_t item_flags,
3583                                const struct rte_flow_attr *attr,
3584                                struct rte_flow_error *error)
3585 {
3586         RTE_SET_USED(dev);
3587
3588         if (attr->group == 0 && !attr->transfer)
3589                 return rte_flow_error_set(error, ENOTSUP,
3590                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3591                                           NULL,
3592                                           "Only support non-root table");
3593         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
3594                 return rte_flow_error_set(error, ENOTSUP,
3595                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3596                                           "CT cannot follow a fate action");
3597         if ((action_flags & MLX5_FLOW_ACTION_METER) ||
3598             (action_flags & MLX5_FLOW_ACTION_AGE))
3599                 return rte_flow_error_set(error, EINVAL,
3600                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3601                                           "Only one ASO action is supported");
3602         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3603                 return rte_flow_error_set(error, EINVAL,
3604                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3605                                           "Encap cannot exist before CT");
3606         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3607                 return rte_flow_error_set(error, EINVAL,
3608                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3609                                           "Not a outer TCP packet");
3610         return 0;
3611 }
3612
3613 int
3614 flow_dv_encap_decap_match_cb(void *tool_ctx __rte_unused,
3615                              struct mlx5_list_entry *entry, void *cb_ctx)
3616 {
3617         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3618         struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3619         struct mlx5_flow_dv_encap_decap_resource *resource;
3620
3621         resource = container_of(entry, struct mlx5_flow_dv_encap_decap_resource,
3622                                 entry);
3623         if (resource->reformat_type == ctx_resource->reformat_type &&
3624             resource->ft_type == ctx_resource->ft_type &&
3625             resource->flags == ctx_resource->flags &&
3626             resource->size == ctx_resource->size &&
3627             !memcmp((const void *)resource->buf,
3628                     (const void *)ctx_resource->buf,
3629                     resource->size))
3630                 return 0;
3631         return -1;
3632 }
3633
3634 struct mlx5_list_entry *
3635 flow_dv_encap_decap_create_cb(void *tool_ctx, void *cb_ctx)
3636 {
3637         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3638         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3639         struct mlx5dv_dr_domain *domain;
3640         struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3641         struct mlx5_flow_dv_encap_decap_resource *resource;
3642         uint32_t idx;
3643         int ret;
3644
3645         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3646                 domain = sh->fdb_domain;
3647         else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3648                 domain = sh->rx_domain;
3649         else
3650                 domain = sh->tx_domain;
3651         /* Register new encap/decap resource. */
3652         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], &idx);
3653         if (!resource) {
3654                 rte_flow_error_set(ctx->error, ENOMEM,
3655                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3656                                    "cannot allocate resource memory");
3657                 return NULL;
3658         }
3659         *resource = *ctx_resource;
3660         resource->idx = idx;
3661         ret = mlx5_flow_os_create_flow_action_packet_reformat(sh->ctx, domain,
3662                                                               resource,
3663                                                              &resource->action);
3664         if (ret) {
3665                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], idx);
3666                 rte_flow_error_set(ctx->error, ENOMEM,
3667                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3668                                    NULL, "cannot create action");
3669                 return NULL;
3670         }
3671
3672         return &resource->entry;
3673 }
3674
3675 struct mlx5_list_entry *
3676 flow_dv_encap_decap_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
3677                              void *cb_ctx)
3678 {
3679         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3680         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3681         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
3682         uint32_t idx;
3683
3684         cache_resource = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
3685                                            &idx);
3686         if (!cache_resource) {
3687                 rte_flow_error_set(ctx->error, ENOMEM,
3688                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3689                                    "cannot allocate resource memory");
3690                 return NULL;
3691         }
3692         memcpy(cache_resource, oentry, sizeof(*cache_resource));
3693         cache_resource->idx = idx;
3694         return &cache_resource->entry;
3695 }
3696
3697 void
3698 flow_dv_encap_decap_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3699 {
3700         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3701         struct mlx5_flow_dv_encap_decap_resource *res =
3702                                        container_of(entry, typeof(*res), entry);
3703
3704         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
3705 }
3706
3707 /**
3708  * Find existing encap/decap resource or create and register a new one.
3709  *
3710  * @param[in, out] dev
3711  *   Pointer to rte_eth_dev structure.
3712  * @param[in, out] resource
3713  *   Pointer to encap/decap resource.
3714  * @parm[in, out] dev_flow
3715  *   Pointer to the dev_flow.
3716  * @param[out] error
3717  *   pointer to error structure.
3718  *
3719  * @return
3720  *   0 on success otherwise -errno and errno is set.
3721  */
3722 static int
3723 flow_dv_encap_decap_resource_register
3724                         (struct rte_eth_dev *dev,
3725                          struct mlx5_flow_dv_encap_decap_resource *resource,
3726                          struct mlx5_flow *dev_flow,
3727                          struct rte_flow_error *error)
3728 {
3729         struct mlx5_priv *priv = dev->data->dev_private;
3730         struct mlx5_dev_ctx_shared *sh = priv->sh;
3731         struct mlx5_list_entry *entry;
3732         union {
3733                 struct {
3734                         uint32_t ft_type:8;
3735                         uint32_t refmt_type:8;
3736                         /*
3737                          * Header reformat actions can be shared between
3738                          * non-root tables. One bit to indicate non-root
3739                          * table or not.
3740                          */
3741                         uint32_t is_root:1;
3742                         uint32_t reserve:15;
3743                 };
3744                 uint32_t v32;
3745         } encap_decap_key = {
3746                 {
3747                         .ft_type = resource->ft_type,
3748                         .refmt_type = resource->reformat_type,
3749                         .is_root = !!dev_flow->dv.group,
3750                         .reserve = 0,
3751                 }
3752         };
3753         struct mlx5_flow_cb_ctx ctx = {
3754                 .error = error,
3755                 .data = resource,
3756         };
3757         struct mlx5_hlist *encaps_decaps;
3758         uint64_t key64;
3759
3760         encaps_decaps = flow_dv_hlist_prepare(sh, &sh->encaps_decaps,
3761                                 "encaps_decaps",
3762                                 MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
3763                                 true, true, sh,
3764                                 flow_dv_encap_decap_create_cb,
3765                                 flow_dv_encap_decap_match_cb,
3766                                 flow_dv_encap_decap_remove_cb,
3767                                 flow_dv_encap_decap_clone_cb,
3768                                 flow_dv_encap_decap_clone_free_cb);
3769         if (unlikely(!encaps_decaps))
3770                 return -rte_errno;
3771         resource->flags = dev_flow->dv.group ? 0 : 1;
3772         key64 =  __rte_raw_cksum(&encap_decap_key.v32,
3773                                  sizeof(encap_decap_key.v32), 0);
3774         if (resource->reformat_type !=
3775             MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2 &&
3776             resource->size)
3777                 key64 = __rte_raw_cksum(resource->buf, resource->size, key64);
3778         entry = mlx5_hlist_register(encaps_decaps, key64, &ctx);
3779         if (!entry)
3780                 return -rte_errno;
3781         resource = container_of(entry, typeof(*resource), entry);
3782         dev_flow->dv.encap_decap = resource;
3783         dev_flow->handle->dvh.rix_encap_decap = resource->idx;
3784         return 0;
3785 }
3786
3787 /**
3788  * Find existing table jump resource or create and register a new one.
3789  *
3790  * @param[in, out] dev
3791  *   Pointer to rte_eth_dev structure.
3792  * @param[in, out] tbl
3793  *   Pointer to flow table resource.
3794  * @parm[in, out] dev_flow
3795  *   Pointer to the dev_flow.
3796  * @param[out] error
3797  *   pointer to error structure.
3798  *
3799  * @return
3800  *   0 on success otherwise -errno and errno is set.
3801  */
3802 static int
3803 flow_dv_jump_tbl_resource_register
3804                         (struct rte_eth_dev *dev __rte_unused,
3805                          struct mlx5_flow_tbl_resource *tbl,
3806                          struct mlx5_flow *dev_flow,
3807                          struct rte_flow_error *error __rte_unused)
3808 {
3809         struct mlx5_flow_tbl_data_entry *tbl_data =
3810                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
3811
3812         MLX5_ASSERT(tbl);
3813         MLX5_ASSERT(tbl_data->jump.action);
3814         dev_flow->handle->rix_jump = tbl_data->idx;
3815         dev_flow->dv.jump = &tbl_data->jump;
3816         return 0;
3817 }
3818
3819 int
3820 flow_dv_port_id_match_cb(void *tool_ctx __rte_unused,
3821                          struct mlx5_list_entry *entry, void *cb_ctx)
3822 {
3823         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3824         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3825         struct mlx5_flow_dv_port_id_action_resource *res =
3826                                        container_of(entry, typeof(*res), entry);
3827
3828         return ref->port_id != res->port_id;
3829 }
3830
3831 struct mlx5_list_entry *
3832 flow_dv_port_id_create_cb(void *tool_ctx, void *cb_ctx)
3833 {
3834         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3835         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3836         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3837         struct mlx5_flow_dv_port_id_action_resource *resource;
3838         uint32_t idx;
3839         int ret;
3840
3841         /* Register new port id action resource. */
3842         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3843         if (!resource) {
3844                 rte_flow_error_set(ctx->error, ENOMEM,
3845                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3846                                    "cannot allocate port_id action memory");
3847                 return NULL;
3848         }
3849         *resource = *ref;
3850         ret = mlx5_flow_os_create_flow_action_dest_port(sh->fdb_domain,
3851                                                         ref->port_id,
3852                                                         &resource->action);
3853         if (ret) {
3854                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], idx);
3855                 rte_flow_error_set(ctx->error, ENOMEM,
3856                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3857                                    "cannot create action");
3858                 return NULL;
3859         }
3860         resource->idx = idx;
3861         return &resource->entry;
3862 }
3863
3864 struct mlx5_list_entry *
3865 flow_dv_port_id_clone_cb(void *tool_ctx,
3866                          struct mlx5_list_entry *entry __rte_unused,
3867                          void *cb_ctx)
3868 {
3869         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3870         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3871         struct mlx5_flow_dv_port_id_action_resource *resource;
3872         uint32_t idx;
3873
3874         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3875         if (!resource) {
3876                 rte_flow_error_set(ctx->error, ENOMEM,
3877                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3878                                    "cannot allocate port_id action memory");
3879                 return NULL;
3880         }
3881         memcpy(resource, entry, sizeof(*resource));
3882         resource->idx = idx;
3883         return &resource->entry;
3884 }
3885
3886 void
3887 flow_dv_port_id_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3888 {
3889         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3890         struct mlx5_flow_dv_port_id_action_resource *resource =
3891                                   container_of(entry, typeof(*resource), entry);
3892
3893         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
3894 }
3895
3896 /**
3897  * Find existing table port ID resource or create and register a new one.
3898  *
3899  * @param[in, out] dev
3900  *   Pointer to rte_eth_dev structure.
3901  * @param[in, out] ref
3902  *   Pointer to port ID action resource reference.
3903  * @parm[in, out] dev_flow
3904  *   Pointer to the dev_flow.
3905  * @param[out] error
3906  *   pointer to error structure.
3907  *
3908  * @return
3909  *   0 on success otherwise -errno and errno is set.
3910  */
3911 static int
3912 flow_dv_port_id_action_resource_register
3913                         (struct rte_eth_dev *dev,
3914                          struct mlx5_flow_dv_port_id_action_resource *ref,
3915                          struct mlx5_flow *dev_flow,
3916                          struct rte_flow_error *error)
3917 {
3918         struct mlx5_priv *priv = dev->data->dev_private;
3919         struct mlx5_list_entry *entry;
3920         struct mlx5_flow_dv_port_id_action_resource *resource;
3921         struct mlx5_flow_cb_ctx ctx = {
3922                 .error = error,
3923                 .data = ref,
3924         };
3925
3926         entry = mlx5_list_register(priv->sh->port_id_action_list, &ctx);
3927         if (!entry)
3928                 return -rte_errno;
3929         resource = container_of(entry, typeof(*resource), entry);
3930         dev_flow->dv.port_id_action = resource;
3931         dev_flow->handle->rix_port_id_action = resource->idx;
3932         return 0;
3933 }
3934
3935 int
3936 flow_dv_push_vlan_match_cb(void *tool_ctx __rte_unused,
3937                            struct mlx5_list_entry *entry, void *cb_ctx)
3938 {
3939         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3940         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3941         struct mlx5_flow_dv_push_vlan_action_resource *res =
3942                                        container_of(entry, typeof(*res), entry);
3943
3944         return ref->vlan_tag != res->vlan_tag || ref->ft_type != res->ft_type;
3945 }
3946
3947 struct mlx5_list_entry *
3948 flow_dv_push_vlan_create_cb(void *tool_ctx, void *cb_ctx)
3949 {
3950         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3951         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3952         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3953         struct mlx5_flow_dv_push_vlan_action_resource *resource;
3954         struct mlx5dv_dr_domain *domain;
3955         uint32_t idx;
3956         int ret;
3957
3958         /* Register new port id action resource. */
3959         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3960         if (!resource) {
3961                 rte_flow_error_set(ctx->error, ENOMEM,
3962                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3963                                    "cannot allocate push_vlan action memory");
3964                 return NULL;
3965         }
3966         *resource = *ref;
3967         if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3968                 domain = sh->fdb_domain;
3969         else if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3970                 domain = sh->rx_domain;
3971         else
3972                 domain = sh->tx_domain;
3973         ret = mlx5_flow_os_create_flow_action_push_vlan(domain, ref->vlan_tag,
3974                                                         &resource->action);
3975         if (ret) {
3976                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
3977                 rte_flow_error_set(ctx->error, ENOMEM,
3978                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3979                                    "cannot create push vlan action");
3980                 return NULL;
3981         }
3982         resource->idx = idx;
3983         return &resource->entry;
3984 }
3985
3986 struct mlx5_list_entry *
3987 flow_dv_push_vlan_clone_cb(void *tool_ctx,
3988                            struct mlx5_list_entry *entry __rte_unused,
3989                            void *cb_ctx)
3990 {
3991         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3992         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3993         struct mlx5_flow_dv_push_vlan_action_resource *resource;
3994         uint32_t idx;
3995
3996         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3997         if (!resource) {
3998                 rte_flow_error_set(ctx->error, ENOMEM,
3999                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4000                                    "cannot allocate push_vlan action memory");
4001                 return NULL;
4002         }
4003         memcpy(resource, entry, sizeof(*resource));
4004         resource->idx = idx;
4005         return &resource->entry;
4006 }
4007
4008 void
4009 flow_dv_push_vlan_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4010 {
4011         struct mlx5_dev_ctx_shared *sh = tool_ctx;
4012         struct mlx5_flow_dv_push_vlan_action_resource *resource =
4013                                   container_of(entry, typeof(*resource), entry);
4014
4015         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
4016 }
4017
4018 /**
4019  * Find existing push vlan resource or create and register a new one.
4020  *
4021  * @param [in, out] dev
4022  *   Pointer to rte_eth_dev structure.
4023  * @param[in, out] ref
4024  *   Pointer to port ID action resource reference.
4025  * @parm[in, out] dev_flow
4026  *   Pointer to the dev_flow.
4027  * @param[out] error
4028  *   pointer to error structure.
4029  *
4030  * @return
4031  *   0 on success otherwise -errno and errno is set.
4032  */
4033 static int
4034 flow_dv_push_vlan_action_resource_register
4035                        (struct rte_eth_dev *dev,
4036                         struct mlx5_flow_dv_push_vlan_action_resource *ref,
4037                         struct mlx5_flow *dev_flow,
4038                         struct rte_flow_error *error)
4039 {
4040         struct mlx5_priv *priv = dev->data->dev_private;
4041         struct mlx5_flow_dv_push_vlan_action_resource *resource;
4042         struct mlx5_list_entry *entry;
4043         struct mlx5_flow_cb_ctx ctx = {
4044                 .error = error,
4045                 .data = ref,
4046         };
4047
4048         entry = mlx5_list_register(priv->sh->push_vlan_action_list, &ctx);
4049         if (!entry)
4050                 return -rte_errno;
4051         resource = container_of(entry, typeof(*resource), entry);
4052
4053         dev_flow->handle->dvh.rix_push_vlan = resource->idx;
4054         dev_flow->dv.push_vlan_res = resource;
4055         return 0;
4056 }
4057
4058 /**
4059  * Get the size of specific rte_flow_item_type hdr size
4060  *
4061  * @param[in] item_type
4062  *   Tested rte_flow_item_type.
4063  *
4064  * @return
4065  *   sizeof struct item_type, 0 if void or irrelevant.
4066  */
4067 static size_t
4068 flow_dv_get_item_hdr_len(const enum rte_flow_item_type item_type)
4069 {
4070         size_t retval;
4071
4072         switch (item_type) {
4073         case RTE_FLOW_ITEM_TYPE_ETH:
4074                 retval = sizeof(struct rte_ether_hdr);
4075                 break;
4076         case RTE_FLOW_ITEM_TYPE_VLAN:
4077                 retval = sizeof(struct rte_vlan_hdr);
4078                 break;
4079         case RTE_FLOW_ITEM_TYPE_IPV4:
4080                 retval = sizeof(struct rte_ipv4_hdr);
4081                 break;
4082         case RTE_FLOW_ITEM_TYPE_IPV6:
4083                 retval = sizeof(struct rte_ipv6_hdr);
4084                 break;
4085         case RTE_FLOW_ITEM_TYPE_UDP:
4086                 retval = sizeof(struct rte_udp_hdr);
4087                 break;
4088         case RTE_FLOW_ITEM_TYPE_TCP:
4089                 retval = sizeof(struct rte_tcp_hdr);
4090                 break;
4091         case RTE_FLOW_ITEM_TYPE_VXLAN:
4092         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4093                 retval = sizeof(struct rte_vxlan_hdr);
4094                 break;
4095         case RTE_FLOW_ITEM_TYPE_GRE:
4096         case RTE_FLOW_ITEM_TYPE_NVGRE:
4097                 retval = sizeof(struct rte_gre_hdr);
4098                 break;
4099         case RTE_FLOW_ITEM_TYPE_MPLS:
4100                 retval = sizeof(struct rte_mpls_hdr);
4101                 break;
4102         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
4103         default:
4104                 retval = 0;
4105                 break;
4106         }
4107         return retval;
4108 }
4109
4110 #define MLX5_ENCAP_IPV4_VERSION         0x40
4111 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
4112 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
4113 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
4114 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
4115 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
4116 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
4117
4118 /**
4119  * Convert the encap action data from list of rte_flow_item to raw buffer
4120  *
4121  * @param[in] items
4122  *   Pointer to rte_flow_item objects list.
4123  * @param[out] buf
4124  *   Pointer to the output buffer.
4125  * @param[out] size
4126  *   Pointer to the output buffer size.
4127  * @param[out] error
4128  *   Pointer to the error structure.
4129  *
4130  * @return
4131  *   0 on success, a negative errno value otherwise and rte_errno is set.
4132  */
4133 static int
4134 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
4135                            size_t *size, struct rte_flow_error *error)
4136 {
4137         struct rte_ether_hdr *eth = NULL;
4138         struct rte_vlan_hdr *vlan = NULL;
4139         struct rte_ipv4_hdr *ipv4 = NULL;
4140         struct rte_ipv6_hdr *ipv6 = NULL;
4141         struct rte_udp_hdr *udp = NULL;
4142         struct rte_vxlan_hdr *vxlan = NULL;
4143         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
4144         struct rte_gre_hdr *gre = NULL;
4145         size_t len;
4146         size_t temp_size = 0;
4147
4148         if (!items)
4149                 return rte_flow_error_set(error, EINVAL,
4150                                           RTE_FLOW_ERROR_TYPE_ACTION,
4151                                           NULL, "invalid empty data");
4152         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4153                 len = flow_dv_get_item_hdr_len(items->type);
4154                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
4155                         return rte_flow_error_set(error, EINVAL,
4156                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4157                                                   (void *)items->type,
4158                                                   "items total size is too big"
4159                                                   " for encap action");
4160                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
4161                 switch (items->type) {
4162                 case RTE_FLOW_ITEM_TYPE_ETH:
4163                         eth = (struct rte_ether_hdr *)&buf[temp_size];
4164                         break;
4165                 case RTE_FLOW_ITEM_TYPE_VLAN:
4166                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
4167                         if (!eth)
4168                                 return rte_flow_error_set(error, EINVAL,
4169                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4170                                                 (void *)items->type,
4171                                                 "eth header not found");
4172                         if (!eth->ether_type)
4173                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
4174                         break;
4175                 case RTE_FLOW_ITEM_TYPE_IPV4:
4176                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
4177                         if (!vlan && !eth)
4178                                 return rte_flow_error_set(error, EINVAL,
4179                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4180                                                 (void *)items->type,
4181                                                 "neither eth nor vlan"
4182                                                 " header found");
4183                         if (vlan && !vlan->eth_proto)
4184                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4185                         else if (eth && !eth->ether_type)
4186                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4187                         if (!ipv4->version_ihl)
4188                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
4189                                                     MLX5_ENCAP_IPV4_IHL_MIN;
4190                         if (!ipv4->time_to_live)
4191                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
4192                         break;
4193                 case RTE_FLOW_ITEM_TYPE_IPV6:
4194                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
4195                         if (!vlan && !eth)
4196                                 return rte_flow_error_set(error, EINVAL,
4197                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4198                                                 (void *)items->type,
4199                                                 "neither eth nor vlan"
4200                                                 " header found");
4201                         if (vlan && !vlan->eth_proto)
4202                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4203                         else if (eth && !eth->ether_type)
4204                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4205                         if (!ipv6->vtc_flow)
4206                                 ipv6->vtc_flow =
4207                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
4208                         if (!ipv6->hop_limits)
4209                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
4210                         break;
4211                 case RTE_FLOW_ITEM_TYPE_UDP:
4212                         udp = (struct rte_udp_hdr *)&buf[temp_size];
4213                         if (!ipv4 && !ipv6)
4214                                 return rte_flow_error_set(error, EINVAL,
4215                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4216                                                 (void *)items->type,
4217                                                 "ip header not found");
4218                         if (ipv4 && !ipv4->next_proto_id)
4219                                 ipv4->next_proto_id = IPPROTO_UDP;
4220                         else if (ipv6 && !ipv6->proto)
4221                                 ipv6->proto = IPPROTO_UDP;
4222                         break;
4223                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4224                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
4225                         if (!udp)
4226                                 return rte_flow_error_set(error, EINVAL,
4227                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4228                                                 (void *)items->type,
4229                                                 "udp header not found");
4230                         if (!udp->dst_port)
4231                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
4232                         if (!vxlan->vx_flags)
4233                                 vxlan->vx_flags =
4234                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
4235                         break;
4236                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4237                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
4238                         if (!udp)
4239                                 return rte_flow_error_set(error, EINVAL,
4240                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4241                                                 (void *)items->type,
4242                                                 "udp header not found");
4243                         if (!vxlan_gpe->proto)
4244                                 return rte_flow_error_set(error, EINVAL,
4245                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4246                                                 (void *)items->type,
4247                                                 "next protocol not found");
4248                         if (!udp->dst_port)
4249                                 udp->dst_port =
4250                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
4251                         if (!vxlan_gpe->vx_flags)
4252                                 vxlan_gpe->vx_flags =
4253                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
4254                         break;
4255                 case RTE_FLOW_ITEM_TYPE_GRE:
4256                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4257                         gre = (struct rte_gre_hdr *)&buf[temp_size];
4258                         if (!gre->proto)
4259                                 return rte_flow_error_set(error, EINVAL,
4260                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4261                                                 (void *)items->type,
4262                                                 "next protocol not found");
4263                         if (!ipv4 && !ipv6)
4264                                 return rte_flow_error_set(error, EINVAL,
4265                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4266                                                 (void *)items->type,
4267                                                 "ip header not found");
4268                         if (ipv4 && !ipv4->next_proto_id)
4269                                 ipv4->next_proto_id = IPPROTO_GRE;
4270                         else if (ipv6 && !ipv6->proto)
4271                                 ipv6->proto = IPPROTO_GRE;
4272                         break;
4273                 case RTE_FLOW_ITEM_TYPE_VOID:
4274                         break;
4275                 default:
4276                         return rte_flow_error_set(error, EINVAL,
4277                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4278                                                   (void *)items->type,
4279                                                   "unsupported item type");
4280                         break;
4281                 }
4282                 temp_size += len;
4283         }
4284         *size = temp_size;
4285         return 0;
4286 }
4287
4288 static int
4289 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
4290 {
4291         struct rte_ether_hdr *eth = NULL;
4292         struct rte_vlan_hdr *vlan = NULL;
4293         struct rte_ipv6_hdr *ipv6 = NULL;
4294         struct rte_udp_hdr *udp = NULL;
4295         char *next_hdr;
4296         uint16_t proto;
4297
4298         eth = (struct rte_ether_hdr *)data;
4299         next_hdr = (char *)(eth + 1);
4300         proto = RTE_BE16(eth->ether_type);
4301
4302         /* VLAN skipping */
4303         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
4304                 vlan = (struct rte_vlan_hdr *)next_hdr;
4305                 proto = RTE_BE16(vlan->eth_proto);
4306                 next_hdr += sizeof(struct rte_vlan_hdr);
4307         }
4308
4309         /* HW calculates IPv4 csum. no need to proceed */
4310         if (proto == RTE_ETHER_TYPE_IPV4)
4311                 return 0;
4312
4313         /* non IPv4/IPv6 header. not supported */
4314         if (proto != RTE_ETHER_TYPE_IPV6) {
4315                 return rte_flow_error_set(error, ENOTSUP,
4316                                           RTE_FLOW_ERROR_TYPE_ACTION,
4317                                           NULL, "Cannot offload non IPv4/IPv6");
4318         }
4319
4320         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
4321
4322         /* ignore non UDP */
4323         if (ipv6->proto != IPPROTO_UDP)
4324                 return 0;
4325
4326         udp = (struct rte_udp_hdr *)(ipv6 + 1);
4327         udp->dgram_cksum = 0;
4328
4329         return 0;
4330 }
4331
4332 /**
4333  * Convert L2 encap action to DV specification.
4334  *
4335  * @param[in] dev
4336  *   Pointer to rte_eth_dev structure.
4337  * @param[in] action
4338  *   Pointer to action structure.
4339  * @param[in, out] dev_flow
4340  *   Pointer to the mlx5_flow.
4341  * @param[in] transfer
4342  *   Mark if the flow is E-Switch flow.
4343  * @param[out] error
4344  *   Pointer to the error structure.
4345  *
4346  * @return
4347  *   0 on success, a negative errno value otherwise and rte_errno is set.
4348  */
4349 static int
4350 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
4351                                const struct rte_flow_action *action,
4352                                struct mlx5_flow *dev_flow,
4353                                uint8_t transfer,
4354                                struct rte_flow_error *error)
4355 {
4356         const struct rte_flow_item *encap_data;
4357         const struct rte_flow_action_raw_encap *raw_encap_data;
4358         struct mlx5_flow_dv_encap_decap_resource res = {
4359                 .reformat_type =
4360                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
4361                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4362                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
4363         };
4364
4365         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4366                 raw_encap_data =
4367                         (const struct rte_flow_action_raw_encap *)action->conf;
4368                 res.size = raw_encap_data->size;
4369                 memcpy(res.buf, raw_encap_data->data, res.size);
4370         } else {
4371                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
4372                         encap_data =
4373                                 ((const struct rte_flow_action_vxlan_encap *)
4374                                                 action->conf)->definition;
4375                 else
4376                         encap_data =
4377                                 ((const struct rte_flow_action_nvgre_encap *)
4378                                                 action->conf)->definition;
4379                 if (flow_dv_convert_encap_data(encap_data, res.buf,
4380                                                &res.size, error))
4381                         return -rte_errno;
4382         }
4383         if (flow_dv_zero_encap_udp_csum(res.buf, error))
4384                 return -rte_errno;
4385         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4386                 return rte_flow_error_set(error, EINVAL,
4387                                           RTE_FLOW_ERROR_TYPE_ACTION,
4388                                           NULL, "can't create L2 encap action");
4389         return 0;
4390 }
4391
4392 /**
4393  * Convert L2 decap action to DV specification.
4394  *
4395  * @param[in] dev
4396  *   Pointer to rte_eth_dev structure.
4397  * @param[in, out] dev_flow
4398  *   Pointer to the mlx5_flow.
4399  * @param[in] transfer
4400  *   Mark if the flow is E-Switch flow.
4401  * @param[out] error
4402  *   Pointer to the error structure.
4403  *
4404  * @return
4405  *   0 on success, a negative errno value otherwise and rte_errno is set.
4406  */
4407 static int
4408 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
4409                                struct mlx5_flow *dev_flow,
4410                                uint8_t transfer,
4411                                struct rte_flow_error *error)
4412 {
4413         struct mlx5_flow_dv_encap_decap_resource res = {
4414                 .size = 0,
4415                 .reformat_type =
4416                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
4417                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4418                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
4419         };
4420
4421         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4422                 return rte_flow_error_set(error, EINVAL,
4423                                           RTE_FLOW_ERROR_TYPE_ACTION,
4424                                           NULL, "can't create L2 decap action");
4425         return 0;
4426 }
4427
4428 /**
4429  * Convert raw decap/encap (L3 tunnel) action to DV specification.
4430  *
4431  * @param[in] dev
4432  *   Pointer to rte_eth_dev structure.
4433  * @param[in] action
4434  *   Pointer to action structure.
4435  * @param[in, out] dev_flow
4436  *   Pointer to the mlx5_flow.
4437  * @param[in] attr
4438  *   Pointer to the flow attributes.
4439  * @param[out] error
4440  *   Pointer to the error structure.
4441  *
4442  * @return
4443  *   0 on success, a negative errno value otherwise and rte_errno is set.
4444  */
4445 static int
4446 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
4447                                 const struct rte_flow_action *action,
4448                                 struct mlx5_flow *dev_flow,
4449                                 const struct rte_flow_attr *attr,
4450                                 struct rte_flow_error *error)
4451 {
4452         const struct rte_flow_action_raw_encap *encap_data;
4453         struct mlx5_flow_dv_encap_decap_resource res;
4454
4455         memset(&res, 0, sizeof(res));
4456         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
4457         res.size = encap_data->size;
4458         memcpy(res.buf, encap_data->data, res.size);
4459         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
4460                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
4461                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
4462         if (attr->transfer)
4463                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4464         else
4465                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4466                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4467         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4468                 return rte_flow_error_set(error, EINVAL,
4469                                           RTE_FLOW_ERROR_TYPE_ACTION,
4470                                           NULL, "can't create encap action");
4471         return 0;
4472 }
4473
4474 /**
4475  * Create action push VLAN.
4476  *
4477  * @param[in] dev
4478  *   Pointer to rte_eth_dev structure.
4479  * @param[in] attr
4480  *   Pointer to the flow attributes.
4481  * @param[in] vlan
4482  *   Pointer to the vlan to push to the Ethernet header.
4483  * @param[in, out] dev_flow
4484  *   Pointer to the mlx5_flow.
4485  * @param[out] error
4486  *   Pointer to the error structure.
4487  *
4488  * @return
4489  *   0 on success, a negative errno value otherwise and rte_errno is set.
4490  */
4491 static int
4492 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
4493                                 const struct rte_flow_attr *attr,
4494                                 const struct rte_vlan_hdr *vlan,
4495                                 struct mlx5_flow *dev_flow,
4496                                 struct rte_flow_error *error)
4497 {
4498         struct mlx5_flow_dv_push_vlan_action_resource res;
4499
4500         memset(&res, 0, sizeof(res));
4501         res.vlan_tag =
4502                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
4503                                  vlan->vlan_tci);
4504         if (attr->transfer)
4505                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4506         else
4507                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4508                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4509         return flow_dv_push_vlan_action_resource_register
4510                                             (dev, &res, dev_flow, error);
4511 }
4512
4513 /**
4514  * Validate the modify-header actions.
4515  *
4516  * @param[in] action_flags
4517  *   Holds the actions detected until now.
4518  * @param[in] action
4519  *   Pointer to the modify action.
4520  * @param[out] error
4521  *   Pointer to error structure.
4522  *
4523  * @return
4524  *   0 on success, a negative errno value otherwise and rte_errno is set.
4525  */
4526 static int
4527 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
4528                                    const struct rte_flow_action *action,
4529                                    struct rte_flow_error *error)
4530 {
4531         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
4532                 return rte_flow_error_set(error, EINVAL,
4533                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4534                                           NULL, "action configuration not set");
4535         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
4536                 return rte_flow_error_set(error, EINVAL,
4537                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4538                                           "can't have encap action before"
4539                                           " modify action");
4540         return 0;
4541 }
4542
4543 /**
4544  * Validate the modify-header MAC address actions.
4545  *
4546  * @param[in] action_flags
4547  *   Holds the actions detected until now.
4548  * @param[in] action
4549  *   Pointer to the modify action.
4550  * @param[in] item_flags
4551  *   Holds the items detected.
4552  * @param[out] error
4553  *   Pointer to error structure.
4554  *
4555  * @return
4556  *   0 on success, a negative errno value otherwise and rte_errno is set.
4557  */
4558 static int
4559 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
4560                                    const struct rte_flow_action *action,
4561                                    const uint64_t item_flags,
4562                                    struct rte_flow_error *error)
4563 {
4564         int ret = 0;
4565
4566         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4567         if (!ret) {
4568                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
4569                         return rte_flow_error_set(error, EINVAL,
4570                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4571                                                   NULL,
4572                                                   "no L2 item in pattern");
4573         }
4574         return ret;
4575 }
4576
4577 /**
4578  * Validate the modify-header IPv4 address actions.
4579  *
4580  * @param[in] action_flags
4581  *   Holds the actions detected until now.
4582  * @param[in] action
4583  *   Pointer to the modify action.
4584  * @param[in] item_flags
4585  *   Holds the items detected.
4586  * @param[out] error
4587  *   Pointer to error structure.
4588  *
4589  * @return
4590  *   0 on success, a negative errno value otherwise and rte_errno is set.
4591  */
4592 static int
4593 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
4594                                     const struct rte_flow_action *action,
4595                                     const uint64_t item_flags,
4596                                     struct rte_flow_error *error)
4597 {
4598         int ret = 0;
4599         uint64_t layer;
4600
4601         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4602         if (!ret) {
4603                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4604                                  MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4605                                  MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4606                 if (!(item_flags & layer))
4607                         return rte_flow_error_set(error, EINVAL,
4608                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4609                                                   NULL,
4610                                                   "no ipv4 item in pattern");
4611         }
4612         return ret;
4613 }
4614
4615 /**
4616  * Validate the modify-header IPv6 address actions.
4617  *
4618  * @param[in] action_flags
4619  *   Holds the actions detected until now.
4620  * @param[in] action
4621  *   Pointer to the modify action.
4622  * @param[in] item_flags
4623  *   Holds the items detected.
4624  * @param[out] error
4625  *   Pointer to error structure.
4626  *
4627  * @return
4628  *   0 on success, a negative errno value otherwise and rte_errno is set.
4629  */
4630 static int
4631 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
4632                                     const struct rte_flow_action *action,
4633                                     const uint64_t item_flags,
4634                                     struct rte_flow_error *error)
4635 {
4636         int ret = 0;
4637         uint64_t layer;
4638
4639         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4640         if (!ret) {
4641                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4642                                  MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4643                                  MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4644                 if (!(item_flags & layer))
4645                         return rte_flow_error_set(error, EINVAL,
4646                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4647                                                   NULL,
4648                                                   "no ipv6 item in pattern");
4649         }
4650         return ret;
4651 }
4652
4653 /**
4654  * Validate the modify-header TP actions.
4655  *
4656  * @param[in] action_flags
4657  *   Holds the actions detected until now.
4658  * @param[in] action
4659  *   Pointer to the modify action.
4660  * @param[in] item_flags
4661  *   Holds the items detected.
4662  * @param[out] error
4663  *   Pointer to error structure.
4664  *
4665  * @return
4666  *   0 on success, a negative errno value otherwise and rte_errno is set.
4667  */
4668 static int
4669 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
4670                                   const struct rte_flow_action *action,
4671                                   const uint64_t item_flags,
4672                                   struct rte_flow_error *error)
4673 {
4674         int ret = 0;
4675         uint64_t layer;
4676
4677         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4678         if (!ret) {
4679                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4680                                  MLX5_FLOW_LAYER_INNER_L4 :
4681                                  MLX5_FLOW_LAYER_OUTER_L4;
4682                 if (!(item_flags & layer))
4683                         return rte_flow_error_set(error, EINVAL,
4684                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4685                                                   NULL, "no transport layer "
4686                                                   "in pattern");
4687         }
4688         return ret;
4689 }
4690
4691 /**
4692  * Validate the modify-header actions of increment/decrement
4693  * TCP Sequence-number.
4694  *
4695  * @param[in] action_flags
4696  *   Holds the actions detected until now.
4697  * @param[in] action
4698  *   Pointer to the modify action.
4699  * @param[in] item_flags
4700  *   Holds the items detected.
4701  * @param[out] error
4702  *   Pointer to error structure.
4703  *
4704  * @return
4705  *   0 on success, a negative errno value otherwise and rte_errno is set.
4706  */
4707 static int
4708 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
4709                                        const struct rte_flow_action *action,
4710                                        const uint64_t item_flags,
4711                                        struct rte_flow_error *error)
4712 {
4713         int ret = 0;
4714         uint64_t layer;
4715
4716         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4717         if (!ret) {
4718                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4719                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
4720                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
4721                 if (!(item_flags & layer))
4722                         return rte_flow_error_set(error, EINVAL,
4723                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4724                                                   NULL, "no TCP item in"
4725                                                   " pattern");
4726                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
4727                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
4728                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
4729                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
4730                         return rte_flow_error_set(error, EINVAL,
4731                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4732                                                   NULL,
4733                                                   "cannot decrease and increase"
4734                                                   " TCP sequence number"
4735                                                   " at the same time");
4736         }
4737         return ret;
4738 }
4739
4740 /**
4741  * Validate the modify-header actions of increment/decrement
4742  * TCP Acknowledgment number.
4743  *
4744  * @param[in] action_flags
4745  *   Holds the actions detected until now.
4746  * @param[in] action
4747  *   Pointer to the modify action.
4748  * @param[in] item_flags
4749  *   Holds the items detected.
4750  * @param[out] error
4751  *   Pointer to error structure.
4752  *
4753  * @return
4754  *   0 on success, a negative errno value otherwise and rte_errno is set.
4755  */
4756 static int
4757 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
4758                                        const struct rte_flow_action *action,
4759                                        const uint64_t item_flags,
4760                                        struct rte_flow_error *error)
4761 {
4762         int ret = 0;
4763         uint64_t layer;
4764
4765         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4766         if (!ret) {
4767                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4768                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
4769                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
4770                 if (!(item_flags & layer))
4771                         return rte_flow_error_set(error, EINVAL,
4772                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4773                                                   NULL, "no TCP item in"
4774                                                   " pattern");
4775                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
4776                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
4777                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
4778                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
4779                         return rte_flow_error_set(error, EINVAL,
4780                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4781                                                   NULL,
4782                                                   "cannot decrease and increase"
4783                                                   " TCP acknowledgment number"
4784                                                   " at the same time");
4785         }
4786         return ret;
4787 }
4788
4789 /**
4790  * Validate the modify-header TTL actions.
4791  *
4792  * @param[in] action_flags
4793  *   Holds the actions detected until now.
4794  * @param[in] action
4795  *   Pointer to the modify action.
4796  * @param[in] item_flags
4797  *   Holds the items detected.
4798  * @param[out] error
4799  *   Pointer to error structure.
4800  *
4801  * @return
4802  *   0 on success, a negative errno value otherwise and rte_errno is set.
4803  */
4804 static int
4805 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
4806                                    const struct rte_flow_action *action,
4807                                    const uint64_t item_flags,
4808                                    struct rte_flow_error *error)
4809 {
4810         int ret = 0;
4811         uint64_t layer;
4812
4813         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4814         if (!ret) {
4815                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4816                                  MLX5_FLOW_LAYER_INNER_L3 :
4817                                  MLX5_FLOW_LAYER_OUTER_L3;
4818                 if (!(item_flags & layer))
4819                         return rte_flow_error_set(error, EINVAL,
4820                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4821                                                   NULL,
4822                                                   "no IP protocol in pattern");
4823         }
4824         return ret;
4825 }
4826
4827 /**
4828  * Validate the generic modify field actions.
4829  * @param[in] dev
4830  *   Pointer to the rte_eth_dev structure.
4831  * @param[in] action_flags
4832  *   Holds the actions detected until now.
4833  * @param[in] action
4834  *   Pointer to the modify action.
4835  * @param[in] attr
4836  *   Pointer to the flow attributes.
4837  * @param[out] error
4838  *   Pointer to error structure.
4839  *
4840  * @return
4841  *   Number of header fields to modify (0 or more) on success,
4842  *   a negative errno value otherwise and rte_errno is set.
4843  */
4844 static int
4845 flow_dv_validate_action_modify_field(struct rte_eth_dev *dev,
4846                                    const uint64_t action_flags,
4847                                    const struct rte_flow_action *action,
4848                                    const struct rte_flow_attr *attr,
4849                                    struct rte_flow_error *error)
4850 {
4851         int ret = 0;
4852         struct mlx5_priv *priv = dev->data->dev_private;
4853         struct mlx5_dev_config *config = &priv->config;
4854         const struct rte_flow_action_modify_field *action_modify_field =
4855                 action->conf;
4856         uint32_t dst_width = mlx5_flow_item_field_width(priv,
4857                                 action_modify_field->dst.field);
4858         uint32_t src_width = mlx5_flow_item_field_width(priv,
4859                                 action_modify_field->src.field);
4860
4861         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4862         if (ret)
4863                 return ret;
4864
4865         if (action_modify_field->width == 0)
4866                 return rte_flow_error_set(error, EINVAL,
4867                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4868                                 "no bits are requested to be modified");
4869         else if (action_modify_field->width > dst_width ||
4870                  action_modify_field->width > src_width)
4871                 return rte_flow_error_set(error, EINVAL,
4872                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4873                                 "cannot modify more bits than"
4874                                 " the width of a field");
4875         if (action_modify_field->dst.field != RTE_FLOW_FIELD_VALUE &&
4876             action_modify_field->dst.field != RTE_FLOW_FIELD_POINTER) {
4877                 if ((action_modify_field->dst.offset +
4878                      action_modify_field->width > dst_width) ||
4879                     (action_modify_field->dst.offset % 32))
4880                         return rte_flow_error_set(error, EINVAL,
4881                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4882                                         "destination offset is too big"
4883                                         " or not aligned to 4 bytes");
4884                 if (action_modify_field->dst.level &&
4885                     action_modify_field->dst.field != RTE_FLOW_FIELD_TAG)
4886                         return rte_flow_error_set(error, ENOTSUP,
4887                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4888                                         "inner header fields modification"
4889                                         " is not supported");
4890         }
4891         if (action_modify_field->src.field != RTE_FLOW_FIELD_VALUE &&
4892             action_modify_field->src.field != RTE_FLOW_FIELD_POINTER) {
4893                 if (!attr->transfer && !attr->group)
4894                         return rte_flow_error_set(error, ENOTSUP,
4895                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4896                                         "modify field action is not"
4897                                         " supported for group 0");
4898                 if ((action_modify_field->src.offset +
4899                      action_modify_field->width > src_width) ||
4900                     (action_modify_field->src.offset % 32))
4901                         return rte_flow_error_set(error, EINVAL,
4902                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4903                                         "source offset is too big"
4904                                         " or not aligned to 4 bytes");
4905                 if (action_modify_field->src.level &&
4906                     action_modify_field->src.field != RTE_FLOW_FIELD_TAG)
4907                         return rte_flow_error_set(error, ENOTSUP,
4908                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4909                                         "inner header fields modification"
4910                                         " is not supported");
4911         }
4912         if ((action_modify_field->dst.field ==
4913              action_modify_field->src.field) &&
4914             (action_modify_field->dst.level ==
4915              action_modify_field->src.level))
4916                 return rte_flow_error_set(error, EINVAL,
4917                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4918                                 "source and destination fields"
4919                                 " cannot be the same");
4920         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VALUE ||
4921             action_modify_field->dst.field == RTE_FLOW_FIELD_POINTER ||
4922             action_modify_field->dst.field == RTE_FLOW_FIELD_MARK)
4923                 return rte_flow_error_set(error, EINVAL,
4924                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4925                                 "mark, immediate value or a pointer to it"
4926                                 " cannot be used as a destination");
4927         if (action_modify_field->dst.field == RTE_FLOW_FIELD_START ||
4928             action_modify_field->src.field == RTE_FLOW_FIELD_START)
4929                 return rte_flow_error_set(error, ENOTSUP,
4930                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4931                                 "modifications of an arbitrary"
4932                                 " place in a packet is not supported");
4933         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VLAN_TYPE ||
4934             action_modify_field->src.field == RTE_FLOW_FIELD_VLAN_TYPE)
4935                 return rte_flow_error_set(error, ENOTSUP,
4936                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4937                                 "modifications of the 802.1Q Tag"
4938                                 " Identifier is not supported");
4939         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VXLAN_VNI ||
4940             action_modify_field->src.field == RTE_FLOW_FIELD_VXLAN_VNI)
4941                 return rte_flow_error_set(error, ENOTSUP,
4942                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4943                                 "modifications of the VXLAN Network"
4944                                 " Identifier is not supported");
4945         if (action_modify_field->dst.field == RTE_FLOW_FIELD_GENEVE_VNI ||
4946             action_modify_field->src.field == RTE_FLOW_FIELD_GENEVE_VNI)
4947                 return rte_flow_error_set(error, ENOTSUP,
4948                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4949                                 "modifications of the GENEVE Network"
4950                                 " Identifier is not supported");
4951         if (action_modify_field->dst.field == RTE_FLOW_FIELD_MARK ||
4952             action_modify_field->src.field == RTE_FLOW_FIELD_MARK ||
4953             action_modify_field->dst.field == RTE_FLOW_FIELD_META ||
4954             action_modify_field->src.field == RTE_FLOW_FIELD_META) {
4955                 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4956                     !mlx5_flow_ext_mreg_supported(dev))
4957                         return rte_flow_error_set(error, ENOTSUP,
4958                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4959                                         "cannot modify mark or metadata without"
4960                                         " extended metadata register support");
4961         }
4962         if (action_modify_field->operation != RTE_FLOW_MODIFY_SET)
4963                 return rte_flow_error_set(error, ENOTSUP,
4964                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4965                                 "add and sub operations"
4966                                 " are not supported");
4967         return (action_modify_field->width / 32) +
4968                !!(action_modify_field->width % 32);
4969 }
4970
4971 /**
4972  * Validate jump action.
4973  *
4974  * @param[in] action
4975  *   Pointer to the jump action.
4976  * @param[in] action_flags
4977  *   Holds the actions detected until now.
4978  * @param[in] attributes
4979  *   Pointer to flow attributes
4980  * @param[in] external
4981  *   Action belongs to flow rule created by request external to PMD.
4982  * @param[out] error
4983  *   Pointer to error structure.
4984  *
4985  * @return
4986  *   0 on success, a negative errno value otherwise and rte_errno is set.
4987  */
4988 static int
4989 flow_dv_validate_action_jump(struct rte_eth_dev *dev,
4990                              const struct mlx5_flow_tunnel *tunnel,
4991                              const struct rte_flow_action *action,
4992                              uint64_t action_flags,
4993                              const struct rte_flow_attr *attributes,
4994                              bool external, struct rte_flow_error *error)
4995 {
4996         uint32_t target_group, table;
4997         int ret = 0;
4998         struct flow_grp_info grp_info = {
4999                 .external = !!external,
5000                 .transfer = !!attributes->transfer,
5001                 .fdb_def_rule = 1,
5002                 .std_tbl_fix = 0
5003         };
5004         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
5005                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5006                 return rte_flow_error_set(error, EINVAL,
5007                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5008                                           "can't have 2 fate actions in"
5009                                           " same flow");
5010         if (!action->conf)
5011                 return rte_flow_error_set(error, EINVAL,
5012                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5013                                           NULL, "action configuration not set");
5014         target_group =
5015                 ((const struct rte_flow_action_jump *)action->conf)->group;
5016         ret = mlx5_flow_group_to_table(dev, tunnel, target_group, &table,
5017                                        &grp_info, error);
5018         if (ret)
5019                 return ret;
5020         if (attributes->group == target_group &&
5021             !(action_flags & (MLX5_FLOW_ACTION_TUNNEL_SET |
5022                               MLX5_FLOW_ACTION_TUNNEL_MATCH)))
5023                 return rte_flow_error_set(error, EINVAL,
5024                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5025                                           "target group must be other than"
5026                                           " the current flow group");
5027         return 0;
5028 }
5029
5030 /*
5031  * Validate action PORT_ID / REPRESENTED_PORT.
5032  *
5033  * @param[in] dev
5034  *   Pointer to rte_eth_dev structure.
5035  * @param[in] action_flags
5036  *   Bit-fields that holds the actions detected until now.
5037  * @param[in] action
5038  *   PORT_ID / REPRESENTED_PORT action structure.
5039  * @param[in] attr
5040  *   Attributes of flow that includes this action.
5041  * @param[out] error
5042  *   Pointer to error structure.
5043  *
5044  * @return
5045  *   0 on success, a negative errno value otherwise and rte_errno is set.
5046  */
5047 static int
5048 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
5049                                 uint64_t action_flags,
5050                                 const struct rte_flow_action *action,
5051                                 const struct rte_flow_attr *attr,
5052                                 struct rte_flow_error *error)
5053 {
5054         const struct rte_flow_action_port_id *port_id;
5055         const struct rte_flow_action_ethdev *ethdev;
5056         struct mlx5_priv *act_priv;
5057         struct mlx5_priv *dev_priv;
5058         uint16_t port;
5059
5060         if (!attr->transfer)
5061                 return rte_flow_error_set(error, ENOTSUP,
5062                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5063                                           NULL,
5064                                           "port action is valid in transfer"
5065                                           " mode only");
5066         if (!action || !action->conf)
5067                 return rte_flow_error_set(error, ENOTSUP,
5068                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5069                                           NULL,
5070                                           "port action parameters must be"
5071                                           " specified");
5072         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
5073                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5074                 return rte_flow_error_set(error, EINVAL,
5075                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5076                                           "can have only one fate actions in"
5077                                           " a flow");
5078         dev_priv = mlx5_dev_to_eswitch_info(dev);
5079         if (!dev_priv)
5080                 return rte_flow_error_set(error, rte_errno,
5081                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5082                                           NULL,
5083                                           "failed to obtain E-Switch info");
5084         switch (action->type) {
5085         case RTE_FLOW_ACTION_TYPE_PORT_ID:
5086                 port_id = action->conf;
5087                 port = port_id->original ? dev->data->port_id : port_id->id;
5088                 break;
5089         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
5090                 ethdev = action->conf;
5091                 port = ethdev->port_id;
5092                 break;
5093         default:
5094                 MLX5_ASSERT(false);
5095                 return rte_flow_error_set
5096                                 (error, EINVAL,
5097                                  RTE_FLOW_ERROR_TYPE_ACTION, action,
5098                                  "unknown E-Switch action");
5099         }
5100         act_priv = mlx5_port_to_eswitch_info(port, false);
5101         if (!act_priv)
5102                 return rte_flow_error_set
5103                                 (error, rte_errno,
5104                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, action->conf,
5105                                  "failed to obtain E-Switch port id for port");
5106         if (act_priv->domain_id != dev_priv->domain_id)
5107                 return rte_flow_error_set
5108                                 (error, EINVAL,
5109                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5110                                  "port does not belong to"
5111                                  " E-Switch being configured");
5112         return 0;
5113 }
5114
5115 /**
5116  * Get the maximum number of modify header actions.
5117  *
5118  * @param dev
5119  *   Pointer to rte_eth_dev structure.
5120  * @param root
5121  *   Whether action is on root table.
5122  *
5123  * @return
5124  *   Max number of modify header actions device can support.
5125  */
5126 static inline unsigned int
5127 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev __rte_unused,
5128                               bool root)
5129 {
5130         /*
5131          * There's no way to directly query the max capacity from FW.
5132          * The maximal value on root table should be assumed to be supported.
5133          */
5134         if (!root)
5135                 return MLX5_MAX_MODIFY_NUM;
5136         else
5137                 return MLX5_ROOT_TBL_MODIFY_NUM;
5138 }
5139
5140 /**
5141  * Validate the meter action.
5142  *
5143  * @param[in] dev
5144  *   Pointer to rte_eth_dev structure.
5145  * @param[in] action_flags
5146  *   Bit-fields that holds the actions detected until now.
5147  * @param[in] action
5148  *   Pointer to the meter action.
5149  * @param[in] attr
5150  *   Attributes of flow that includes this action.
5151  * @param[in] port_id_item
5152  *   Pointer to item indicating port id.
5153  * @param[out] error
5154  *   Pointer to error structure.
5155  *
5156  * @return
5157  *   0 on success, a negative errno value otherwise and rte_ernno is set.
5158  */
5159 static int
5160 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
5161                                 uint64_t action_flags,
5162                                 const struct rte_flow_action *action,
5163                                 const struct rte_flow_attr *attr,
5164                                 const struct rte_flow_item *port_id_item,
5165                                 bool *def_policy,
5166                                 struct rte_flow_error *error)
5167 {
5168         struct mlx5_priv *priv = dev->data->dev_private;
5169         const struct rte_flow_action_meter *am = action->conf;
5170         struct mlx5_flow_meter_info *fm;
5171         struct mlx5_flow_meter_policy *mtr_policy;
5172         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
5173
5174         if (!am)
5175                 return rte_flow_error_set(error, EINVAL,
5176                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5177                                           "meter action conf is NULL");
5178
5179         if (action_flags & MLX5_FLOW_ACTION_METER)
5180                 return rte_flow_error_set(error, ENOTSUP,
5181                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5182                                           "meter chaining not support");
5183         if (action_flags & MLX5_FLOW_ACTION_JUMP)
5184                 return rte_flow_error_set(error, ENOTSUP,
5185                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5186                                           "meter with jump not support");
5187         if (!priv->mtr_en)
5188                 return rte_flow_error_set(error, ENOTSUP,
5189                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5190                                           NULL,
5191                                           "meter action not supported");
5192         fm = mlx5_flow_meter_find(priv, am->mtr_id, NULL);
5193         if (!fm)
5194                 return rte_flow_error_set(error, EINVAL,
5195                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5196                                           "Meter not found");
5197         /* aso meter can always be shared by different domains */
5198         if (fm->ref_cnt && !priv->sh->meter_aso_en &&
5199             !(fm->transfer == attr->transfer ||
5200               (!fm->ingress && !attr->ingress && attr->egress) ||
5201               (!fm->egress && !attr->egress && attr->ingress)))
5202                 return rte_flow_error_set(error, EINVAL,
5203                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5204                         "Flow attributes domain are either invalid "
5205                         "or have a domain conflict with current "
5206                         "meter attributes");
5207         if (fm->def_policy) {
5208                 if (!((attr->transfer &&
5209                         mtrmng->def_policy[MLX5_MTR_DOMAIN_TRANSFER]) ||
5210                         (attr->egress &&
5211                         mtrmng->def_policy[MLX5_MTR_DOMAIN_EGRESS]) ||
5212                         (attr->ingress &&
5213                         mtrmng->def_policy[MLX5_MTR_DOMAIN_INGRESS])))
5214                         return rte_flow_error_set(error, EINVAL,
5215                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5216                                           "Flow attributes domain "
5217                                           "have a conflict with current "
5218                                           "meter domain attributes");
5219                 *def_policy = true;
5220         } else {
5221                 mtr_policy = mlx5_flow_meter_policy_find(dev,
5222                                                 fm->policy_id, NULL);
5223                 if (!mtr_policy)
5224                         return rte_flow_error_set(error, EINVAL,
5225                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5226                                           "Invalid policy id for meter ");
5227                 if (!((attr->transfer && mtr_policy->transfer) ||
5228                         (attr->egress && mtr_policy->egress) ||
5229                         (attr->ingress && mtr_policy->ingress)))
5230                         return rte_flow_error_set(error, EINVAL,
5231                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5232                                           "Flow attributes domain "
5233                                           "have a conflict with current "
5234                                           "meter domain attributes");
5235                 if (attr->transfer && mtr_policy->dev) {
5236                         /**
5237                          * When policy has fate action of port_id,
5238                          * the flow should have the same src port as policy.
5239                          */
5240                         struct mlx5_priv *policy_port_priv =
5241                                         mtr_policy->dev->data->dev_private;
5242                         int32_t flow_src_port = priv->representor_id;
5243
5244                         if (port_id_item) {
5245                                 const struct rte_flow_item_port_id *spec =
5246                                                         port_id_item->spec;
5247                                 struct mlx5_priv *port_priv =
5248                                         mlx5_port_to_eswitch_info(spec->id,
5249                                                                   false);
5250                                 if (!port_priv)
5251                                         return rte_flow_error_set(error,
5252                                                 rte_errno,
5253                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5254                                                 spec,
5255                                                 "Failed to get port info.");
5256                                 flow_src_port = port_priv->representor_id;
5257                         }
5258                         if (flow_src_port != policy_port_priv->representor_id)
5259                                 return rte_flow_error_set(error,
5260                                                 rte_errno,
5261                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5262                                                 NULL,
5263                                                 "Flow and meter policy "
5264                                                 "have different src port.");
5265                 }
5266                 *def_policy = false;
5267         }
5268         return 0;
5269 }
5270
5271 /**
5272  * Validate the age action.
5273  *
5274  * @param[in] action_flags
5275  *   Holds the actions detected until now.
5276  * @param[in] action
5277  *   Pointer to the age action.
5278  * @param[in] dev
5279  *   Pointer to the Ethernet device structure.
5280  * @param[out] error
5281  *   Pointer to error structure.
5282  *
5283  * @return
5284  *   0 on success, a negative errno value otherwise and rte_errno is set.
5285  */
5286 static int
5287 flow_dv_validate_action_age(uint64_t action_flags,
5288                             const struct rte_flow_action *action,
5289                             struct rte_eth_dev *dev,
5290                             struct rte_flow_error *error)
5291 {
5292         struct mlx5_priv *priv = dev->data->dev_private;
5293         const struct rte_flow_action_age *age = action->conf;
5294
5295         if (!priv->config.devx || (priv->sh->cmng.counter_fallback &&
5296             !priv->sh->aso_age_mng))
5297                 return rte_flow_error_set(error, ENOTSUP,
5298                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5299                                           NULL,
5300                                           "age action not supported");
5301         if (!(action->conf))
5302                 return rte_flow_error_set(error, EINVAL,
5303                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5304                                           "configuration cannot be null");
5305         if (!(age->timeout))
5306                 return rte_flow_error_set(error, EINVAL,
5307                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5308                                           "invalid timeout value 0");
5309         if (action_flags & MLX5_FLOW_ACTION_AGE)
5310                 return rte_flow_error_set(error, EINVAL,
5311                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5312                                           "duplicate age actions set");
5313         return 0;
5314 }
5315
5316 /**
5317  * Validate the modify-header IPv4 DSCP actions.
5318  *
5319  * @param[in] action_flags
5320  *   Holds the actions detected until now.
5321  * @param[in] action
5322  *   Pointer to the modify action.
5323  * @param[in] item_flags
5324  *   Holds the items detected.
5325  * @param[out] error
5326  *   Pointer to error structure.
5327  *
5328  * @return
5329  *   0 on success, a negative errno value otherwise and rte_errno is set.
5330  */
5331 static int
5332 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
5333                                          const struct rte_flow_action *action,
5334                                          const uint64_t item_flags,
5335                                          struct rte_flow_error *error)
5336 {
5337         int ret = 0;
5338
5339         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5340         if (!ret) {
5341                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
5342                         return rte_flow_error_set(error, EINVAL,
5343                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5344                                                   NULL,
5345                                                   "no ipv4 item in pattern");
5346         }
5347         return ret;
5348 }
5349
5350 /**
5351  * Validate the modify-header IPv6 DSCP actions.
5352  *
5353  * @param[in] action_flags
5354  *   Holds the actions detected until now.
5355  * @param[in] action
5356  *   Pointer to the modify action.
5357  * @param[in] item_flags
5358  *   Holds the items detected.
5359  * @param[out] error
5360  *   Pointer to error structure.
5361  *
5362  * @return
5363  *   0 on success, a negative errno value otherwise and rte_errno is set.
5364  */
5365 static int
5366 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
5367                                          const struct rte_flow_action *action,
5368                                          const uint64_t item_flags,
5369                                          struct rte_flow_error *error)
5370 {
5371         int ret = 0;
5372
5373         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5374         if (!ret) {
5375                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
5376                         return rte_flow_error_set(error, EINVAL,
5377                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5378                                                   NULL,
5379                                                   "no ipv6 item in pattern");
5380         }
5381         return ret;
5382 }
5383
5384 int
5385 flow_dv_modify_match_cb(void *tool_ctx __rte_unused,
5386                         struct mlx5_list_entry *entry, void *cb_ctx)
5387 {
5388         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5389         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5390         struct mlx5_flow_dv_modify_hdr_resource *resource =
5391                                   container_of(entry, typeof(*resource), entry);
5392         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5393
5394         key_len += ref->actions_num * sizeof(ref->actions[0]);
5395         return ref->actions_num != resource->actions_num ||
5396                memcmp(&ref->ft_type, &resource->ft_type, key_len);
5397 }
5398
5399 static struct mlx5_indexed_pool *
5400 flow_dv_modify_ipool_get(struct mlx5_dev_ctx_shared *sh, uint8_t index)
5401 {
5402         struct mlx5_indexed_pool *ipool = __atomic_load_n
5403                                      (&sh->mdh_ipools[index], __ATOMIC_SEQ_CST);
5404
5405         if (!ipool) {
5406                 struct mlx5_indexed_pool *expected = NULL;
5407                 struct mlx5_indexed_pool_config cfg =
5408                     (struct mlx5_indexed_pool_config) {
5409                        .size = sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
5410                                                                    (index + 1) *
5411                                            sizeof(struct mlx5_modification_cmd),
5412                        .trunk_size = 64,
5413                        .grow_trunk = 3,
5414                        .grow_shift = 2,
5415                        .need_lock = 1,
5416                        .release_mem_en = !!sh->reclaim_mode,
5417                        .per_core_cache = sh->reclaim_mode ? 0 : (1 << 16),
5418                        .malloc = mlx5_malloc,
5419                        .free = mlx5_free,
5420                        .type = "mlx5_modify_action_resource",
5421                 };
5422
5423                 cfg.size = RTE_ALIGN(cfg.size, sizeof(ipool));
5424                 ipool = mlx5_ipool_create(&cfg);
5425                 if (!ipool)
5426                         return NULL;
5427                 if (!__atomic_compare_exchange_n(&sh->mdh_ipools[index],
5428                                                  &expected, ipool, false,
5429                                                  __ATOMIC_SEQ_CST,
5430                                                  __ATOMIC_SEQ_CST)) {
5431                         mlx5_ipool_destroy(ipool);
5432                         ipool = __atomic_load_n(&sh->mdh_ipools[index],
5433                                                 __ATOMIC_SEQ_CST);
5434                 }
5435         }
5436         return ipool;
5437 }
5438
5439 struct mlx5_list_entry *
5440 flow_dv_modify_create_cb(void *tool_ctx, void *cb_ctx)
5441 {
5442         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5443         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5444         struct mlx5dv_dr_domain *ns;
5445         struct mlx5_flow_dv_modify_hdr_resource *entry;
5446         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5447         struct mlx5_indexed_pool *ipool = flow_dv_modify_ipool_get(sh,
5448                                                           ref->actions_num - 1);
5449         int ret;
5450         uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5451         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5452         uint32_t idx;
5453
5454         if (unlikely(!ipool)) {
5455                 rte_flow_error_set(ctx->error, ENOMEM,
5456                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5457                                    NULL, "cannot allocate modify ipool");
5458                 return NULL;
5459         }
5460         entry = mlx5_ipool_zmalloc(ipool, &idx);
5461         if (!entry) {
5462                 rte_flow_error_set(ctx->error, ENOMEM,
5463                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5464                                    "cannot allocate resource memory");
5465                 return NULL;
5466         }
5467         rte_memcpy(&entry->ft_type,
5468                    RTE_PTR_ADD(ref, offsetof(typeof(*ref), ft_type)),
5469                    key_len + data_len);
5470         if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
5471                 ns = sh->fdb_domain;
5472         else if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
5473                 ns = sh->tx_domain;
5474         else
5475                 ns = sh->rx_domain;
5476         ret = mlx5_flow_os_create_flow_action_modify_header
5477                                         (sh->ctx, ns, entry,
5478                                          data_len, &entry->action);
5479         if (ret) {
5480                 mlx5_ipool_free(sh->mdh_ipools[ref->actions_num - 1], idx);
5481                 rte_flow_error_set(ctx->error, ENOMEM,
5482                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5483                                    NULL, "cannot create modification action");
5484                 return NULL;
5485         }
5486         entry->idx = idx;
5487         return &entry->entry;
5488 }
5489
5490 struct mlx5_list_entry *
5491 flow_dv_modify_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
5492                         void *cb_ctx)
5493 {
5494         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5495         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5496         struct mlx5_flow_dv_modify_hdr_resource *entry;
5497         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5498         uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5499         uint32_t idx;
5500
5501         entry = mlx5_ipool_malloc(sh->mdh_ipools[ref->actions_num - 1],
5502                                   &idx);
5503         if (!entry) {
5504                 rte_flow_error_set(ctx->error, ENOMEM,
5505                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5506                                    "cannot allocate resource memory");
5507                 return NULL;
5508         }
5509         memcpy(entry, oentry, sizeof(*entry) + data_len);
5510         entry->idx = idx;
5511         return &entry->entry;
5512 }
5513
5514 void
5515 flow_dv_modify_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
5516 {
5517         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5518         struct mlx5_flow_dv_modify_hdr_resource *res =
5519                 container_of(entry, typeof(*res), entry);
5520
5521         mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
5522 }
5523
5524 /**
5525  * Validate the sample action.
5526  *
5527  * @param[in, out] action_flags
5528  *   Holds the actions detected until now.
5529  * @param[in] action
5530  *   Pointer to the sample action.
5531  * @param[in] dev
5532  *   Pointer to the Ethernet device structure.
5533  * @param[in] attr
5534  *   Attributes of flow that includes this action.
5535  * @param[in] item_flags
5536  *   Holds the items detected.
5537  * @param[in] rss
5538  *   Pointer to the RSS action.
5539  * @param[out] sample_rss
5540  *   Pointer to the RSS action in sample action list.
5541  * @param[out] count
5542  *   Pointer to the COUNT action in sample action list.
5543  * @param[out] fdb_mirror_limit
5544  *   Pointer to the FDB mirror limitation flag.
5545  * @param[out] error
5546  *   Pointer to error structure.
5547  *
5548  * @return
5549  *   0 on success, a negative errno value otherwise and rte_errno is set.
5550  */
5551 static int
5552 flow_dv_validate_action_sample(uint64_t *action_flags,
5553                                const struct rte_flow_action *action,
5554                                struct rte_eth_dev *dev,
5555                                const struct rte_flow_attr *attr,
5556                                uint64_t item_flags,
5557                                const struct rte_flow_action_rss *rss,
5558                                const struct rte_flow_action_rss **sample_rss,
5559                                const struct rte_flow_action_count **count,
5560                                int *fdb_mirror_limit,
5561                                struct rte_flow_error *error)
5562 {
5563         struct mlx5_priv *priv = dev->data->dev_private;
5564         struct mlx5_dev_config *dev_conf = &priv->config;
5565         const struct rte_flow_action_sample *sample = action->conf;
5566         const struct rte_flow_action *act;
5567         uint64_t sub_action_flags = 0;
5568         uint16_t queue_index = 0xFFFF;
5569         int actions_n = 0;
5570         int ret;
5571
5572         if (!sample)
5573                 return rte_flow_error_set(error, EINVAL,
5574                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5575                                           "configuration cannot be NULL");
5576         if (sample->ratio == 0)
5577                 return rte_flow_error_set(error, EINVAL,
5578                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5579                                           "ratio value starts from 1");
5580         if (!priv->config.devx || (sample->ratio > 0 && !priv->sampler_en))
5581                 return rte_flow_error_set(error, ENOTSUP,
5582                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5583                                           NULL,
5584                                           "sample action not supported");
5585         if (*action_flags & MLX5_FLOW_ACTION_SAMPLE)
5586                 return rte_flow_error_set(error, EINVAL,
5587                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5588                                           "Multiple sample actions not "
5589                                           "supported");
5590         if (*action_flags & MLX5_FLOW_ACTION_METER)
5591                 return rte_flow_error_set(error, EINVAL,
5592                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5593                                           "wrong action order, meter should "
5594                                           "be after sample action");
5595         if (*action_flags & MLX5_FLOW_ACTION_JUMP)
5596                 return rte_flow_error_set(error, EINVAL,
5597                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5598                                           "wrong action order, jump should "
5599                                           "be after sample action");
5600         act = sample->actions;
5601         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
5602                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
5603                         return rte_flow_error_set(error, ENOTSUP,
5604                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5605                                                   act, "too many actions");
5606                 switch (act->type) {
5607                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5608                         ret = mlx5_flow_validate_action_queue(act,
5609                                                               sub_action_flags,
5610                                                               dev,
5611                                                               attr, error);
5612                         if (ret < 0)
5613                                 return ret;
5614                         queue_index = ((const struct rte_flow_action_queue *)
5615                                                         (act->conf))->index;
5616                         sub_action_flags |= MLX5_FLOW_ACTION_QUEUE;
5617                         ++actions_n;
5618                         break;
5619                 case RTE_FLOW_ACTION_TYPE_RSS:
5620                         *sample_rss = act->conf;
5621                         ret = mlx5_flow_validate_action_rss(act,
5622                                                             sub_action_flags,
5623                                                             dev, attr,
5624                                                             item_flags,
5625                                                             error);
5626                         if (ret < 0)
5627                                 return ret;
5628                         if (rss && *sample_rss &&
5629                             ((*sample_rss)->level != rss->level ||
5630                             (*sample_rss)->types != rss->types))
5631                                 return rte_flow_error_set(error, ENOTSUP,
5632                                         RTE_FLOW_ERROR_TYPE_ACTION,
5633                                         NULL,
5634                                         "Can't use the different RSS types "
5635                                         "or level in the same flow");
5636                         if (*sample_rss != NULL && (*sample_rss)->queue_num)
5637                                 queue_index = (*sample_rss)->queue[0];
5638                         sub_action_flags |= MLX5_FLOW_ACTION_RSS;
5639                         ++actions_n;
5640                         break;
5641                 case RTE_FLOW_ACTION_TYPE_MARK:
5642                         ret = flow_dv_validate_action_mark(dev, act,
5643                                                            sub_action_flags,
5644                                                            attr, error);
5645                         if (ret < 0)
5646                                 return ret;
5647                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
5648                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK |
5649                                                 MLX5_FLOW_ACTION_MARK_EXT;
5650                         else
5651                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK;
5652                         ++actions_n;
5653                         break;
5654                 case RTE_FLOW_ACTION_TYPE_COUNT:
5655                         ret = flow_dv_validate_action_count
5656                                 (dev, false, *action_flags | sub_action_flags,
5657                                  error);
5658                         if (ret < 0)
5659                                 return ret;
5660                         *count = act->conf;
5661                         sub_action_flags |= MLX5_FLOW_ACTION_COUNT;
5662                         *action_flags |= MLX5_FLOW_ACTION_COUNT;
5663                         ++actions_n;
5664                         break;
5665                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5666                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
5667                         ret = flow_dv_validate_action_port_id(dev,
5668                                                               sub_action_flags,
5669                                                               act,
5670                                                               attr,
5671                                                               error);
5672                         if (ret)
5673                                 return ret;
5674                         sub_action_flags |= MLX5_FLOW_ACTION_PORT_ID;
5675                         ++actions_n;
5676                         break;
5677                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5678                         ret = flow_dv_validate_action_raw_encap_decap
5679                                 (dev, NULL, act->conf, attr, &sub_action_flags,
5680                                  &actions_n, action, item_flags, error);
5681                         if (ret < 0)
5682                                 return ret;
5683                         ++actions_n;
5684                         break;
5685                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5686                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5687                         ret = flow_dv_validate_action_l2_encap(dev,
5688                                                                sub_action_flags,
5689                                                                act, attr,
5690                                                                error);
5691                         if (ret < 0)
5692                                 return ret;
5693                         sub_action_flags |= MLX5_FLOW_ACTION_ENCAP;
5694                         ++actions_n;
5695                         break;
5696                 default:
5697                         return rte_flow_error_set(error, ENOTSUP,
5698                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5699                                                   NULL,
5700                                                   "Doesn't support optional "
5701                                                   "action");
5702                 }
5703         }
5704         if (attr->ingress && !attr->transfer) {
5705                 if (!(sub_action_flags & (MLX5_FLOW_ACTION_QUEUE |
5706                                           MLX5_FLOW_ACTION_RSS)))
5707                         return rte_flow_error_set(error, EINVAL,
5708                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5709                                                   NULL,
5710                                                   "Ingress must has a dest "
5711                                                   "QUEUE for Sample");
5712         } else if (attr->egress && !attr->transfer) {
5713                 return rte_flow_error_set(error, ENOTSUP,
5714                                           RTE_FLOW_ERROR_TYPE_ACTION,
5715                                           NULL,
5716                                           "Sample Only support Ingress "
5717                                           "or E-Switch");
5718         } else if (sample->actions->type != RTE_FLOW_ACTION_TYPE_END) {
5719                 MLX5_ASSERT(attr->transfer);
5720                 if (sample->ratio > 1)
5721                         return rte_flow_error_set(error, ENOTSUP,
5722                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5723                                                   NULL,
5724                                                   "E-Switch doesn't support "
5725                                                   "any optional action "
5726                                                   "for sampling");
5727                 if (sub_action_flags & MLX5_FLOW_ACTION_QUEUE)
5728                         return rte_flow_error_set(error, ENOTSUP,
5729                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5730                                                   NULL,
5731                                                   "unsupported action QUEUE");
5732                 if (sub_action_flags & MLX5_FLOW_ACTION_RSS)
5733                         return rte_flow_error_set(error, ENOTSUP,
5734                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5735                                                   NULL,
5736                                                   "unsupported action QUEUE");
5737                 if (!(sub_action_flags & MLX5_FLOW_ACTION_PORT_ID))
5738                         return rte_flow_error_set(error, EINVAL,
5739                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5740                                                   NULL,
5741                                                   "E-Switch must has a dest "
5742                                                   "port for mirroring");
5743                 if (!priv->config.hca_attr.reg_c_preserve &&
5744                      priv->representor_id != UINT16_MAX)
5745                         *fdb_mirror_limit = 1;
5746         }
5747         /* Continue validation for Xcap actions.*/
5748         if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) &&
5749             (queue_index == 0xFFFF ||
5750              mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
5751                 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5752                      MLX5_FLOW_XCAP_ACTIONS)
5753                         return rte_flow_error_set(error, ENOTSUP,
5754                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5755                                                   NULL, "encap and decap "
5756                                                   "combination aren't "
5757                                                   "supported");
5758                 if (!attr->transfer && attr->ingress && (sub_action_flags &
5759                                                         MLX5_FLOW_ACTION_ENCAP))
5760                         return rte_flow_error_set(error, ENOTSUP,
5761                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5762                                                   NULL, "encap is not supported"
5763                                                   " for ingress traffic");
5764         }
5765         return 0;
5766 }
5767
5768 /**
5769  * Find existing modify-header resource or create and register a new one.
5770  *
5771  * @param dev[in, out]
5772  *   Pointer to rte_eth_dev structure.
5773  * @param[in, out] resource
5774  *   Pointer to modify-header resource.
5775  * @parm[in, out] dev_flow
5776  *   Pointer to the dev_flow.
5777  * @param[out] error
5778  *   pointer to error structure.
5779  *
5780  * @return
5781  *   0 on success otherwise -errno and errno is set.
5782  */
5783 static int
5784 flow_dv_modify_hdr_resource_register
5785                         (struct rte_eth_dev *dev,
5786                          struct mlx5_flow_dv_modify_hdr_resource *resource,
5787                          struct mlx5_flow *dev_flow,
5788                          struct rte_flow_error *error)
5789 {
5790         struct mlx5_priv *priv = dev->data->dev_private;
5791         struct mlx5_dev_ctx_shared *sh = priv->sh;
5792         uint32_t key_len = sizeof(*resource) -
5793                            offsetof(typeof(*resource), ft_type) +
5794                            resource->actions_num * sizeof(resource->actions[0]);
5795         struct mlx5_list_entry *entry;
5796         struct mlx5_flow_cb_ctx ctx = {
5797                 .error = error,
5798                 .data = resource,
5799         };
5800         struct mlx5_hlist *modify_cmds;
5801         uint64_t key64;
5802
5803         modify_cmds = flow_dv_hlist_prepare(sh, &sh->modify_cmds,
5804                                 "hdr_modify",
5805                                 MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
5806                                 true, false, sh,
5807                                 flow_dv_modify_create_cb,
5808                                 flow_dv_modify_match_cb,
5809                                 flow_dv_modify_remove_cb,
5810                                 flow_dv_modify_clone_cb,
5811                                 flow_dv_modify_clone_free_cb);
5812         if (unlikely(!modify_cmds))
5813                 return -rte_errno;
5814         resource->root = !dev_flow->dv.group;
5815         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
5816                                                                 resource->root))
5817                 return rte_flow_error_set(error, EOVERFLOW,
5818                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5819                                           "too many modify header items");
5820         key64 = __rte_raw_cksum(&resource->ft_type, key_len, 0);
5821         entry = mlx5_hlist_register(modify_cmds, key64, &ctx);
5822         if (!entry)
5823                 return -rte_errno;
5824         resource = container_of(entry, typeof(*resource), entry);
5825         dev_flow->handle->dvh.modify_hdr = resource;
5826         return 0;
5827 }
5828
5829 /**
5830  * Get DV flow counter by index.
5831  *
5832  * @param[in] dev
5833  *   Pointer to the Ethernet device structure.
5834  * @param[in] idx
5835  *   mlx5 flow counter index in the container.
5836  * @param[out] ppool
5837  *   mlx5 flow counter pool in the container.
5838  *
5839  * @return
5840  *   Pointer to the counter, NULL otherwise.
5841  */
5842 static struct mlx5_flow_counter *
5843 flow_dv_counter_get_by_idx(struct rte_eth_dev *dev,
5844                            uint32_t idx,
5845                            struct mlx5_flow_counter_pool **ppool)
5846 {
5847         struct mlx5_priv *priv = dev->data->dev_private;
5848         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5849         struct mlx5_flow_counter_pool *pool;
5850
5851         /* Decrease to original index and clear shared bit. */
5852         idx = (idx - 1) & (MLX5_CNT_SHARED_OFFSET - 1);
5853         MLX5_ASSERT(idx / MLX5_COUNTERS_PER_POOL < cmng->n);
5854         pool = cmng->pools[idx / MLX5_COUNTERS_PER_POOL];
5855         MLX5_ASSERT(pool);
5856         if (ppool)
5857                 *ppool = pool;
5858         return MLX5_POOL_GET_CNT(pool, idx % MLX5_COUNTERS_PER_POOL);
5859 }
5860
5861 /**
5862  * Check the devx counter belongs to the pool.
5863  *
5864  * @param[in] pool
5865  *   Pointer to the counter pool.
5866  * @param[in] id
5867  *   The counter devx ID.
5868  *
5869  * @return
5870  *   True if counter belongs to the pool, false otherwise.
5871  */
5872 static bool
5873 flow_dv_is_counter_in_pool(struct mlx5_flow_counter_pool *pool, int id)
5874 {
5875         int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
5876                    MLX5_COUNTERS_PER_POOL;
5877
5878         if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
5879                 return true;
5880         return false;
5881 }
5882
5883 /**
5884  * Get a pool by devx counter ID.
5885  *
5886  * @param[in] cmng
5887  *   Pointer to the counter management.
5888  * @param[in] id
5889  *   The counter devx ID.
5890  *
5891  * @return
5892  *   The counter pool pointer if exists, NULL otherwise,
5893  */
5894 static struct mlx5_flow_counter_pool *
5895 flow_dv_find_pool_by_id(struct mlx5_flow_counter_mng *cmng, int id)
5896 {
5897         uint32_t i;
5898         struct mlx5_flow_counter_pool *pool = NULL;
5899
5900         rte_spinlock_lock(&cmng->pool_update_sl);
5901         /* Check last used pool. */
5902         if (cmng->last_pool_idx != POOL_IDX_INVALID &&
5903             flow_dv_is_counter_in_pool(cmng->pools[cmng->last_pool_idx], id)) {
5904                 pool = cmng->pools[cmng->last_pool_idx];
5905                 goto out;
5906         }
5907         /* ID out of range means no suitable pool in the container. */
5908         if (id > cmng->max_id || id < cmng->min_id)
5909                 goto out;
5910         /*
5911          * Find the pool from the end of the container, since mostly counter
5912          * ID is sequence increasing, and the last pool should be the needed
5913          * one.
5914          */
5915         i = cmng->n_valid;
5916         while (i--) {
5917                 struct mlx5_flow_counter_pool *pool_tmp = cmng->pools[i];
5918
5919                 if (flow_dv_is_counter_in_pool(pool_tmp, id)) {
5920                         pool = pool_tmp;
5921                         break;
5922                 }
5923         }
5924 out:
5925         rte_spinlock_unlock(&cmng->pool_update_sl);
5926         return pool;
5927 }
5928
5929 /**
5930  * Resize a counter container.
5931  *
5932  * @param[in] dev
5933  *   Pointer to the Ethernet device structure.
5934  *
5935  * @return
5936  *   0 on success, otherwise negative errno value and rte_errno is set.
5937  */
5938 static int
5939 flow_dv_container_resize(struct rte_eth_dev *dev)
5940 {
5941         struct mlx5_priv *priv = dev->data->dev_private;
5942         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5943         void *old_pools = cmng->pools;
5944         uint32_t resize = cmng->n + MLX5_CNT_CONTAINER_RESIZE;
5945         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
5946         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
5947
5948         if (!pools) {
5949                 rte_errno = ENOMEM;
5950                 return -ENOMEM;
5951         }
5952         if (old_pools)
5953                 memcpy(pools, old_pools, cmng->n *
5954                                        sizeof(struct mlx5_flow_counter_pool *));
5955         cmng->n = resize;
5956         cmng->pools = pools;
5957         if (old_pools)
5958                 mlx5_free(old_pools);
5959         return 0;
5960 }
5961
5962 /**
5963  * Query a devx flow counter.
5964  *
5965  * @param[in] dev
5966  *   Pointer to the Ethernet device structure.
5967  * @param[in] counter
5968  *   Index to the flow counter.
5969  * @param[out] pkts
5970  *   The statistics value of packets.
5971  * @param[out] bytes
5972  *   The statistics value of bytes.
5973  *
5974  * @return
5975  *   0 on success, otherwise a negative errno value and rte_errno is set.
5976  */
5977 static inline int
5978 _flow_dv_query_count(struct rte_eth_dev *dev, uint32_t counter, uint64_t *pkts,
5979                      uint64_t *bytes)
5980 {
5981         struct mlx5_priv *priv = dev->data->dev_private;
5982         struct mlx5_flow_counter_pool *pool = NULL;
5983         struct mlx5_flow_counter *cnt;
5984         int offset;
5985
5986         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
5987         MLX5_ASSERT(pool);
5988         if (priv->sh->cmng.counter_fallback)
5989                 return mlx5_devx_cmd_flow_counter_query(cnt->dcs_when_active, 0,
5990                                         0, pkts, bytes, 0, NULL, NULL, 0);
5991         rte_spinlock_lock(&pool->sl);
5992         if (!pool->raw) {
5993                 *pkts = 0;
5994                 *bytes = 0;
5995         } else {
5996                 offset = MLX5_CNT_ARRAY_IDX(pool, cnt);
5997                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
5998                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
5999         }
6000         rte_spinlock_unlock(&pool->sl);
6001         return 0;
6002 }
6003
6004 /**
6005  * Create and initialize a new counter pool.
6006  *
6007  * @param[in] dev
6008  *   Pointer to the Ethernet device structure.
6009  * @param[out] dcs
6010  *   The devX counter handle.
6011  * @param[in] age
6012  *   Whether the pool is for counter that was allocated for aging.
6013  * @param[in/out] cont_cur
6014  *   Pointer to the container pointer, it will be update in pool resize.
6015  *
6016  * @return
6017  *   The pool container pointer on success, NULL otherwise and rte_errno is set.
6018  */
6019 static struct mlx5_flow_counter_pool *
6020 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
6021                     uint32_t age)
6022 {
6023         struct mlx5_priv *priv = dev->data->dev_private;
6024         struct mlx5_flow_counter_pool *pool;
6025         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6026         bool fallback = priv->sh->cmng.counter_fallback;
6027         uint32_t size = sizeof(*pool);
6028
6029         size += MLX5_COUNTERS_PER_POOL * MLX5_CNT_SIZE;
6030         size += (!age ? 0 : MLX5_COUNTERS_PER_POOL * MLX5_AGE_SIZE);
6031         pool = mlx5_malloc(MLX5_MEM_ZERO, size, 0, SOCKET_ID_ANY);
6032         if (!pool) {
6033                 rte_errno = ENOMEM;
6034                 return NULL;
6035         }
6036         pool->raw = NULL;
6037         pool->is_aged = !!age;
6038         pool->query_gen = 0;
6039         pool->min_dcs = dcs;
6040         rte_spinlock_init(&pool->sl);
6041         rte_spinlock_init(&pool->csl);
6042         TAILQ_INIT(&pool->counters[0]);
6043         TAILQ_INIT(&pool->counters[1]);
6044         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
6045         rte_spinlock_lock(&cmng->pool_update_sl);
6046         pool->index = cmng->n_valid;
6047         if (pool->index == cmng->n && flow_dv_container_resize(dev)) {
6048                 mlx5_free(pool);
6049                 rte_spinlock_unlock(&cmng->pool_update_sl);
6050                 return NULL;
6051         }
6052         cmng->pools[pool->index] = pool;
6053         cmng->n_valid++;
6054         if (unlikely(fallback)) {
6055                 int base = RTE_ALIGN_FLOOR(dcs->id, MLX5_COUNTERS_PER_POOL);
6056
6057                 if (base < cmng->min_id)
6058                         cmng->min_id = base;
6059                 if (base > cmng->max_id)
6060                         cmng->max_id = base + MLX5_COUNTERS_PER_POOL - 1;
6061                 cmng->last_pool_idx = pool->index;
6062         }
6063         rte_spinlock_unlock(&cmng->pool_update_sl);
6064         return pool;
6065 }
6066
6067 /**
6068  * Prepare a new counter and/or a new counter pool.
6069  *
6070  * @param[in] dev
6071  *   Pointer to the Ethernet device structure.
6072  * @param[out] cnt_free
6073  *   Where to put the pointer of a new counter.
6074  * @param[in] age
6075  *   Whether the pool is for counter that was allocated for aging.
6076  *
6077  * @return
6078  *   The counter pool pointer and @p cnt_free is set on success,
6079  *   NULL otherwise and rte_errno is set.
6080  */
6081 static struct mlx5_flow_counter_pool *
6082 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
6083                              struct mlx5_flow_counter **cnt_free,
6084                              uint32_t age)
6085 {
6086         struct mlx5_priv *priv = dev->data->dev_private;
6087         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6088         struct mlx5_flow_counter_pool *pool;
6089         struct mlx5_counters tmp_tq;
6090         struct mlx5_devx_obj *dcs = NULL;
6091         struct mlx5_flow_counter *cnt;
6092         enum mlx5_counter_type cnt_type =
6093                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6094         bool fallback = priv->sh->cmng.counter_fallback;
6095         uint32_t i;
6096
6097         if (fallback) {
6098                 /* bulk_bitmap must be 0 for single counter allocation. */
6099                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
6100                 if (!dcs)
6101                         return NULL;
6102                 pool = flow_dv_find_pool_by_id(cmng, dcs->id);
6103                 if (!pool) {
6104                         pool = flow_dv_pool_create(dev, dcs, age);
6105                         if (!pool) {
6106                                 mlx5_devx_cmd_destroy(dcs);
6107                                 return NULL;
6108                         }
6109                 }
6110                 i = dcs->id % MLX5_COUNTERS_PER_POOL;
6111                 cnt = MLX5_POOL_GET_CNT(pool, i);
6112                 cnt->pool = pool;
6113                 cnt->dcs_when_free = dcs;
6114                 *cnt_free = cnt;
6115                 return pool;
6116         }
6117         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
6118         if (!dcs) {
6119                 rte_errno = ENODATA;
6120                 return NULL;
6121         }
6122         pool = flow_dv_pool_create(dev, dcs, age);
6123         if (!pool) {
6124                 mlx5_devx_cmd_destroy(dcs);
6125                 return NULL;
6126         }
6127         TAILQ_INIT(&tmp_tq);
6128         for (i = 1; i < MLX5_COUNTERS_PER_POOL; ++i) {
6129                 cnt = MLX5_POOL_GET_CNT(pool, i);
6130                 cnt->pool = pool;
6131                 TAILQ_INSERT_HEAD(&tmp_tq, cnt, next);
6132         }
6133         rte_spinlock_lock(&cmng->csl[cnt_type]);
6134         TAILQ_CONCAT(&cmng->counters[cnt_type], &tmp_tq, next);
6135         rte_spinlock_unlock(&cmng->csl[cnt_type]);
6136         *cnt_free = MLX5_POOL_GET_CNT(pool, 0);
6137         (*cnt_free)->pool = pool;
6138         return pool;
6139 }
6140
6141 /**
6142  * Allocate a flow counter.
6143  *
6144  * @param[in] dev
6145  *   Pointer to the Ethernet device structure.
6146  * @param[in] age
6147  *   Whether the counter was allocated for aging.
6148  *
6149  * @return
6150  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
6151  */
6152 static uint32_t
6153 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t age)
6154 {
6155         struct mlx5_priv *priv = dev->data->dev_private;
6156         struct mlx5_flow_counter_pool *pool = NULL;
6157         struct mlx5_flow_counter *cnt_free = NULL;
6158         bool fallback = priv->sh->cmng.counter_fallback;
6159         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6160         enum mlx5_counter_type cnt_type =
6161                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6162         uint32_t cnt_idx;
6163
6164         if (!priv->config.devx) {
6165                 rte_errno = ENOTSUP;
6166                 return 0;
6167         }
6168         /* Get free counters from container. */
6169         rte_spinlock_lock(&cmng->csl[cnt_type]);
6170         cnt_free = TAILQ_FIRST(&cmng->counters[cnt_type]);
6171         if (cnt_free)
6172                 TAILQ_REMOVE(&cmng->counters[cnt_type], cnt_free, next);
6173         rte_spinlock_unlock(&cmng->csl[cnt_type]);
6174         if (!cnt_free && !flow_dv_counter_pool_prepare(dev, &cnt_free, age))
6175                 goto err;
6176         pool = cnt_free->pool;
6177         if (fallback)
6178                 cnt_free->dcs_when_active = cnt_free->dcs_when_free;
6179         /* Create a DV counter action only in the first time usage. */
6180         if (!cnt_free->action) {
6181                 uint16_t offset;
6182                 struct mlx5_devx_obj *dcs;
6183                 int ret;
6184
6185                 if (!fallback) {
6186                         offset = MLX5_CNT_ARRAY_IDX(pool, cnt_free);
6187                         dcs = pool->min_dcs;
6188                 } else {
6189                         offset = 0;
6190                         dcs = cnt_free->dcs_when_free;
6191                 }
6192                 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, offset,
6193                                                             &cnt_free->action);
6194                 if (ret) {
6195                         rte_errno = errno;
6196                         goto err;
6197                 }
6198         }
6199         cnt_idx = MLX5_MAKE_CNT_IDX(pool->index,
6200                                 MLX5_CNT_ARRAY_IDX(pool, cnt_free));
6201         /* Update the counter reset values. */
6202         if (_flow_dv_query_count(dev, cnt_idx, &cnt_free->hits,
6203                                  &cnt_free->bytes))
6204                 goto err;
6205         if (!fallback && !priv->sh->cmng.query_thread_on)
6206                 /* Start the asynchronous batch query by the host thread. */
6207                 mlx5_set_query_alarm(priv->sh);
6208         /*
6209          * When the count action isn't shared (by ID), shared_info field is
6210          * used for indirect action API's refcnt.
6211          * When the counter action is not shared neither by ID nor by indirect
6212          * action API, shared info must be 1.
6213          */
6214         cnt_free->shared_info.refcnt = 1;
6215         return cnt_idx;
6216 err:
6217         if (cnt_free) {
6218                 cnt_free->pool = pool;
6219                 if (fallback)
6220                         cnt_free->dcs_when_free = cnt_free->dcs_when_active;
6221                 rte_spinlock_lock(&cmng->csl[cnt_type]);
6222                 TAILQ_INSERT_TAIL(&cmng->counters[cnt_type], cnt_free, next);
6223                 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6224         }
6225         return 0;
6226 }
6227
6228 /**
6229  * Get age param from counter index.
6230  *
6231  * @param[in] dev
6232  *   Pointer to the Ethernet device structure.
6233  * @param[in] counter
6234  *   Index to the counter handler.
6235  *
6236  * @return
6237  *   The aging parameter specified for the counter index.
6238  */
6239 static struct mlx5_age_param*
6240 flow_dv_counter_idx_get_age(struct rte_eth_dev *dev,
6241                                 uint32_t counter)
6242 {
6243         struct mlx5_flow_counter *cnt;
6244         struct mlx5_flow_counter_pool *pool = NULL;
6245
6246         flow_dv_counter_get_by_idx(dev, counter, &pool);
6247         counter = (counter - 1) % MLX5_COUNTERS_PER_POOL;
6248         cnt = MLX5_POOL_GET_CNT(pool, counter);
6249         return MLX5_CNT_TO_AGE(cnt);
6250 }
6251
6252 /**
6253  * Remove a flow counter from aged counter list.
6254  *
6255  * @param[in] dev
6256  *   Pointer to the Ethernet device structure.
6257  * @param[in] counter
6258  *   Index to the counter handler.
6259  * @param[in] cnt
6260  *   Pointer to the counter handler.
6261  */
6262 static void
6263 flow_dv_counter_remove_from_age(struct rte_eth_dev *dev,
6264                                 uint32_t counter, struct mlx5_flow_counter *cnt)
6265 {
6266         struct mlx5_age_info *age_info;
6267         struct mlx5_age_param *age_param;
6268         struct mlx5_priv *priv = dev->data->dev_private;
6269         uint16_t expected = AGE_CANDIDATE;
6270
6271         age_info = GET_PORT_AGE_INFO(priv);
6272         age_param = flow_dv_counter_idx_get_age(dev, counter);
6273         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
6274                                          AGE_FREE, false, __ATOMIC_RELAXED,
6275                                          __ATOMIC_RELAXED)) {
6276                 /**
6277                  * We need the lock even it is age timeout,
6278                  * since counter may still in process.
6279                  */
6280                 rte_spinlock_lock(&age_info->aged_sl);
6281                 TAILQ_REMOVE(&age_info->aged_counters, cnt, next);
6282                 rte_spinlock_unlock(&age_info->aged_sl);
6283                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
6284         }
6285 }
6286
6287 /**
6288  * Release a flow counter.
6289  *
6290  * @param[in] dev
6291  *   Pointer to the Ethernet device structure.
6292  * @param[in] counter
6293  *   Index to the counter handler.
6294  */
6295 static void
6296 flow_dv_counter_free(struct rte_eth_dev *dev, uint32_t counter)
6297 {
6298         struct mlx5_priv *priv = dev->data->dev_private;
6299         struct mlx5_flow_counter_pool *pool = NULL;
6300         struct mlx5_flow_counter *cnt;
6301         enum mlx5_counter_type cnt_type;
6302
6303         if (!counter)
6304                 return;
6305         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
6306         MLX5_ASSERT(pool);
6307         if (pool->is_aged) {
6308                 flow_dv_counter_remove_from_age(dev, counter, cnt);
6309         } else {
6310                 /*
6311                  * If the counter action is shared by indirect action API,
6312                  * the atomic function reduces its references counter.
6313                  * If after the reduction the action is still referenced, the
6314                  * function returns here and does not release it.
6315                  * When the counter action is not shared by
6316                  * indirect action API, shared info is 1 before the reduction,
6317                  * so this condition is failed and function doesn't return here.
6318                  */
6319                 if (__atomic_sub_fetch(&cnt->shared_info.refcnt, 1,
6320                                        __ATOMIC_RELAXED))
6321                         return;
6322         }
6323         cnt->pool = pool;
6324         /*
6325          * Put the counter back to list to be updated in none fallback mode.
6326          * Currently, we are using two list alternately, while one is in query,
6327          * add the freed counter to the other list based on the pool query_gen
6328          * value. After query finishes, add counter the list to the global
6329          * container counter list. The list changes while query starts. In
6330          * this case, lock will not be needed as query callback and release
6331          * function both operate with the different list.
6332          */
6333         if (!priv->sh->cmng.counter_fallback) {
6334                 rte_spinlock_lock(&pool->csl);
6335                 TAILQ_INSERT_TAIL(&pool->counters[pool->query_gen], cnt, next);
6336                 rte_spinlock_unlock(&pool->csl);
6337         } else {
6338                 cnt->dcs_when_free = cnt->dcs_when_active;
6339                 cnt_type = pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6340                                            MLX5_COUNTER_TYPE_ORIGIN;
6341                 rte_spinlock_lock(&priv->sh->cmng.csl[cnt_type]);
6342                 TAILQ_INSERT_TAIL(&priv->sh->cmng.counters[cnt_type],
6343                                   cnt, next);
6344                 rte_spinlock_unlock(&priv->sh->cmng.csl[cnt_type]);
6345         }
6346 }
6347
6348 /**
6349  * Resize a meter id container.
6350  *
6351  * @param[in] dev
6352  *   Pointer to the Ethernet device structure.
6353  *
6354  * @return
6355  *   0 on success, otherwise negative errno value and rte_errno is set.
6356  */
6357 static int
6358 flow_dv_mtr_container_resize(struct rte_eth_dev *dev)
6359 {
6360         struct mlx5_priv *priv = dev->data->dev_private;
6361         struct mlx5_aso_mtr_pools_mng *pools_mng =
6362                                 &priv->sh->mtrmng->pools_mng;
6363         void *old_pools = pools_mng->pools;
6364         uint32_t resize = pools_mng->n + MLX5_MTRS_CONTAINER_RESIZE;
6365         uint32_t mem_size = sizeof(struct mlx5_aso_mtr_pool *) * resize;
6366         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
6367
6368         if (!pools) {
6369                 rte_errno = ENOMEM;
6370                 return -ENOMEM;
6371         }
6372         if (!pools_mng->n)
6373                 if (mlx5_aso_queue_init(priv->sh, ASO_OPC_MOD_POLICER)) {
6374                         mlx5_free(pools);
6375                         return -ENOMEM;
6376                 }
6377         if (old_pools)
6378                 memcpy(pools, old_pools, pools_mng->n *
6379                                        sizeof(struct mlx5_aso_mtr_pool *));
6380         pools_mng->n = resize;
6381         pools_mng->pools = pools;
6382         if (old_pools)
6383                 mlx5_free(old_pools);
6384         return 0;
6385 }
6386
6387 /**
6388  * Prepare a new meter and/or a new meter pool.
6389  *
6390  * @param[in] dev
6391  *   Pointer to the Ethernet device structure.
6392  * @param[out] mtr_free
6393  *   Where to put the pointer of a new meter.g.
6394  *
6395  * @return
6396  *   The meter pool pointer and @mtr_free is set on success,
6397  *   NULL otherwise and rte_errno is set.
6398  */
6399 static struct mlx5_aso_mtr_pool *
6400 flow_dv_mtr_pool_create(struct rte_eth_dev *dev,
6401                              struct mlx5_aso_mtr **mtr_free)
6402 {
6403         struct mlx5_priv *priv = dev->data->dev_private;
6404         struct mlx5_aso_mtr_pools_mng *pools_mng =
6405                                 &priv->sh->mtrmng->pools_mng;
6406         struct mlx5_aso_mtr_pool *pool = NULL;
6407         struct mlx5_devx_obj *dcs = NULL;
6408         uint32_t i;
6409         uint32_t log_obj_size;
6410
6411         log_obj_size = rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
6412         dcs = mlx5_devx_cmd_create_flow_meter_aso_obj(priv->sh->ctx,
6413                         priv->sh->pdn, log_obj_size);
6414         if (!dcs) {
6415                 rte_errno = ENODATA;
6416                 return NULL;
6417         }
6418         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
6419         if (!pool) {
6420                 rte_errno = ENOMEM;
6421                 claim_zero(mlx5_devx_cmd_destroy(dcs));
6422                 return NULL;
6423         }
6424         pool->devx_obj = dcs;
6425         pool->index = pools_mng->n_valid;
6426         if (pool->index == pools_mng->n && flow_dv_mtr_container_resize(dev)) {
6427                 mlx5_free(pool);
6428                 claim_zero(mlx5_devx_cmd_destroy(dcs));
6429                 return NULL;
6430         }
6431         pools_mng->pools[pool->index] = pool;
6432         pools_mng->n_valid++;
6433         for (i = 1; i < MLX5_ASO_MTRS_PER_POOL; ++i) {
6434                 pool->mtrs[i].offset = i;
6435                 LIST_INSERT_HEAD(&pools_mng->meters,
6436                                                 &pool->mtrs[i], next);
6437         }
6438         pool->mtrs[0].offset = 0;
6439         *mtr_free = &pool->mtrs[0];
6440         return pool;
6441 }
6442
6443 /**
6444  * Release a flow meter into pool.
6445  *
6446  * @param[in] dev
6447  *   Pointer to the Ethernet device structure.
6448  * @param[in] mtr_idx
6449  *   Index to aso flow meter.
6450  */
6451 static void
6452 flow_dv_aso_mtr_release_to_pool(struct rte_eth_dev *dev, uint32_t mtr_idx)
6453 {
6454         struct mlx5_priv *priv = dev->data->dev_private;
6455         struct mlx5_aso_mtr_pools_mng *pools_mng =
6456                                 &priv->sh->mtrmng->pools_mng;
6457         struct mlx5_aso_mtr *aso_mtr = mlx5_aso_meter_by_idx(priv, mtr_idx);
6458
6459         MLX5_ASSERT(aso_mtr);
6460         rte_spinlock_lock(&pools_mng->mtrsl);
6461         memset(&aso_mtr->fm, 0, sizeof(struct mlx5_flow_meter_info));
6462         aso_mtr->state = ASO_METER_FREE;
6463         LIST_INSERT_HEAD(&pools_mng->meters, aso_mtr, next);
6464         rte_spinlock_unlock(&pools_mng->mtrsl);
6465 }
6466
6467 /**
6468  * Allocate a aso flow meter.
6469  *
6470  * @param[in] dev
6471  *   Pointer to the Ethernet device structure.
6472  *
6473  * @return
6474  *   Index to aso flow meter on success, 0 otherwise and rte_errno is set.
6475  */
6476 static uint32_t
6477 flow_dv_mtr_alloc(struct rte_eth_dev *dev)
6478 {
6479         struct mlx5_priv *priv = dev->data->dev_private;
6480         struct mlx5_aso_mtr *mtr_free = NULL;
6481         struct mlx5_aso_mtr_pools_mng *pools_mng =
6482                                 &priv->sh->mtrmng->pools_mng;
6483         struct mlx5_aso_mtr_pool *pool;
6484         uint32_t mtr_idx = 0;
6485
6486         if (!priv->config.devx) {
6487                 rte_errno = ENOTSUP;
6488                 return 0;
6489         }
6490         /* Allocate the flow meter memory. */
6491         /* Get free meters from management. */
6492         rte_spinlock_lock(&pools_mng->mtrsl);
6493         mtr_free = LIST_FIRST(&pools_mng->meters);
6494         if (mtr_free)
6495                 LIST_REMOVE(mtr_free, next);
6496         if (!mtr_free && !flow_dv_mtr_pool_create(dev, &mtr_free)) {
6497                 rte_spinlock_unlock(&pools_mng->mtrsl);
6498                 return 0;
6499         }
6500         mtr_free->state = ASO_METER_WAIT;
6501         rte_spinlock_unlock(&pools_mng->mtrsl);
6502         pool = container_of(mtr_free,
6503                         struct mlx5_aso_mtr_pool,
6504                         mtrs[mtr_free->offset]);
6505         mtr_idx = MLX5_MAKE_MTR_IDX(pool->index, mtr_free->offset);
6506         if (!mtr_free->fm.meter_action) {
6507 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
6508                 struct rte_flow_error error;
6509                 uint8_t reg_id;
6510
6511                 reg_id = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &error);
6512                 mtr_free->fm.meter_action =
6513                         mlx5_glue->dv_create_flow_action_aso
6514                                                 (priv->sh->rx_domain,
6515                                                  pool->devx_obj->obj,
6516                                                  mtr_free->offset,
6517                                                  (1 << MLX5_FLOW_COLOR_GREEN),
6518                                                  reg_id - REG_C_0);
6519 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
6520                 if (!mtr_free->fm.meter_action) {
6521                         flow_dv_aso_mtr_release_to_pool(dev, mtr_idx);
6522                         return 0;
6523                 }
6524         }
6525         return mtr_idx;
6526 }
6527
6528 /**
6529  * Verify the @p attributes will be correctly understood by the NIC and store
6530  * them in the @p flow if everything is correct.
6531  *
6532  * @param[in] dev
6533  *   Pointer to dev struct.
6534  * @param[in] attributes
6535  *   Pointer to flow attributes
6536  * @param[in] external
6537  *   This flow rule is created by request external to PMD.
6538  * @param[out] error
6539  *   Pointer to error structure.
6540  *
6541  * @return
6542  *   - 0 on success and non root table.
6543  *   - 1 on success and root table.
6544  *   - a negative errno value otherwise and rte_errno is set.
6545  */
6546 static int
6547 flow_dv_validate_attributes(struct rte_eth_dev *dev,
6548                             const struct mlx5_flow_tunnel *tunnel,
6549                             const struct rte_flow_attr *attributes,
6550                             const struct flow_grp_info *grp_info,
6551                             struct rte_flow_error *error)
6552 {
6553         struct mlx5_priv *priv = dev->data->dev_private;
6554         uint32_t lowest_priority = mlx5_get_lowest_priority(dev, attributes);
6555         int ret = 0;
6556
6557 #ifndef HAVE_MLX5DV_DR
6558         RTE_SET_USED(tunnel);
6559         RTE_SET_USED(grp_info);
6560         if (attributes->group)
6561                 return rte_flow_error_set(error, ENOTSUP,
6562                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6563                                           NULL,
6564                                           "groups are not supported");
6565 #else
6566         uint32_t table = 0;
6567
6568         ret = mlx5_flow_group_to_table(dev, tunnel, attributes->group, &table,
6569                                        grp_info, error);
6570         if (ret)
6571                 return ret;
6572         if (!table)
6573                 ret = MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
6574 #endif
6575         if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
6576             attributes->priority > lowest_priority)
6577                 return rte_flow_error_set(error, ENOTSUP,
6578                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
6579                                           NULL,
6580                                           "priority out of range");
6581         if (attributes->transfer) {
6582                 if (!priv->config.dv_esw_en)
6583                         return rte_flow_error_set
6584                                 (error, ENOTSUP,
6585                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6586                                  "E-Switch dr is not supported");
6587                 if (!(priv->representor || priv->master))
6588                         return rte_flow_error_set
6589                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6590                                  NULL, "E-Switch configuration can only be"
6591                                  " done by a master or a representor device");
6592                 if (attributes->egress)
6593                         return rte_flow_error_set
6594                                 (error, ENOTSUP,
6595                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
6596                                  "egress is not supported");
6597         }
6598         if (!(attributes->egress ^ attributes->ingress))
6599                 return rte_flow_error_set(error, ENOTSUP,
6600                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
6601                                           "must specify exactly one of "
6602                                           "ingress or egress");
6603         return ret;
6604 }
6605
6606 static uint16_t
6607 mlx5_flow_locate_proto_l3(const struct rte_flow_item **head,
6608                           const struct rte_flow_item *end)
6609 {
6610         const struct rte_flow_item *item = *head;
6611         uint16_t l3_protocol;
6612
6613         for (; item != end; item++) {
6614                 switch (item->type) {
6615                 default:
6616                         break;
6617                 case RTE_FLOW_ITEM_TYPE_IPV4:
6618                         l3_protocol = RTE_ETHER_TYPE_IPV4;
6619                         goto l3_ok;
6620                 case RTE_FLOW_ITEM_TYPE_IPV6:
6621                         l3_protocol = RTE_ETHER_TYPE_IPV6;
6622                         goto l3_ok;
6623                 case RTE_FLOW_ITEM_TYPE_ETH:
6624                         if (item->mask && item->spec) {
6625                                 MLX5_ETHER_TYPE_FROM_HEADER(rte_flow_item_eth,
6626                                                             type, item,
6627                                                             l3_protocol);
6628                                 if (l3_protocol == RTE_ETHER_TYPE_IPV4 ||
6629                                     l3_protocol == RTE_ETHER_TYPE_IPV6)
6630                                         goto l3_ok;
6631                         }
6632                         break;
6633                 case RTE_FLOW_ITEM_TYPE_VLAN:
6634                         if (item->mask && item->spec) {
6635                                 MLX5_ETHER_TYPE_FROM_HEADER(rte_flow_item_vlan,
6636                                                             inner_type, item,
6637                                                             l3_protocol);
6638                                 if (l3_protocol == RTE_ETHER_TYPE_IPV4 ||
6639                                     l3_protocol == RTE_ETHER_TYPE_IPV6)
6640                                         goto l3_ok;
6641                         }
6642                         break;
6643                 }
6644         }
6645         return 0;
6646 l3_ok:
6647         *head = item;
6648         return l3_protocol;
6649 }
6650
6651 static uint8_t
6652 mlx5_flow_locate_proto_l4(const struct rte_flow_item **head,
6653                           const struct rte_flow_item *end)
6654 {
6655         const struct rte_flow_item *item = *head;
6656         uint8_t l4_protocol;
6657
6658         for (; item != end; item++) {
6659                 switch (item->type) {
6660                 default:
6661                         break;
6662                 case RTE_FLOW_ITEM_TYPE_TCP:
6663                         l4_protocol = IPPROTO_TCP;
6664                         goto l4_ok;
6665                 case RTE_FLOW_ITEM_TYPE_UDP:
6666                         l4_protocol = IPPROTO_UDP;
6667                         goto l4_ok;
6668                 case RTE_FLOW_ITEM_TYPE_IPV4:
6669                         if (item->mask && item->spec) {
6670                                 const struct rte_flow_item_ipv4 *mask, *spec;
6671
6672                                 mask = (typeof(mask))item->mask;
6673                                 spec = (typeof(spec))item->spec;
6674                                 l4_protocol = mask->hdr.next_proto_id &
6675                                               spec->hdr.next_proto_id;
6676                                 if (l4_protocol == IPPROTO_TCP ||
6677                                     l4_protocol == IPPROTO_UDP)
6678                                         goto l4_ok;
6679                         }
6680                         break;
6681                 case RTE_FLOW_ITEM_TYPE_IPV6:
6682                         if (item->mask && item->spec) {
6683                                 const struct rte_flow_item_ipv6 *mask, *spec;
6684                                 mask = (typeof(mask))item->mask;
6685                                 spec = (typeof(spec))item->spec;
6686                                 l4_protocol = mask->hdr.proto & spec->hdr.proto;
6687                                 if (l4_protocol == IPPROTO_TCP ||
6688                                     l4_protocol == IPPROTO_UDP)
6689                                         goto l4_ok;
6690                         }
6691                         break;
6692                 }
6693         }
6694         return 0;
6695 l4_ok:
6696         *head = item;
6697         return l4_protocol;
6698 }
6699
6700 static int
6701 flow_dv_validate_item_integrity(struct rte_eth_dev *dev,
6702                                 const struct rte_flow_item *rule_items,
6703                                 const struct rte_flow_item *integrity_item,
6704                                 struct rte_flow_error *error)
6705 {
6706         struct mlx5_priv *priv = dev->data->dev_private;
6707         const struct rte_flow_item *tunnel_item, *end_item, *item = rule_items;
6708         const struct rte_flow_item_integrity *mask = (typeof(mask))
6709                                                      integrity_item->mask;
6710         const struct rte_flow_item_integrity *spec = (typeof(spec))
6711                                                      integrity_item->spec;
6712         uint32_t protocol;
6713
6714         if (!priv->config.hca_attr.pkt_integrity_match)
6715                 return rte_flow_error_set(error, ENOTSUP,
6716                                           RTE_FLOW_ERROR_TYPE_ITEM,
6717                                           integrity_item,
6718                                           "packet integrity integrity_item not supported");
6719         if (!mask)
6720                 mask = &rte_flow_item_integrity_mask;
6721         if (!mlx5_validate_integrity_item(mask))
6722                 return rte_flow_error_set(error, ENOTSUP,
6723                                           RTE_FLOW_ERROR_TYPE_ITEM,
6724                                           integrity_item,
6725                                           "unsupported integrity filter");
6726         tunnel_item = mlx5_flow_find_tunnel_item(rule_items);
6727         if (spec->level > 1) {
6728                 if (!tunnel_item)
6729                         return rte_flow_error_set(error, ENOTSUP,
6730                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6731                                                   integrity_item,
6732                                                   "missing tunnel item");
6733                 item = tunnel_item;
6734                 end_item = mlx5_find_end_item(tunnel_item);
6735         } else {
6736                 end_item = tunnel_item ? tunnel_item :
6737                            mlx5_find_end_item(integrity_item);
6738         }
6739         if (mask->l3_ok || mask->ipv4_csum_ok) {
6740                 protocol = mlx5_flow_locate_proto_l3(&item, end_item);
6741                 if (!protocol)
6742                         return rte_flow_error_set(error, EINVAL,
6743                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6744                                                   integrity_item,
6745                                                   "missing L3 protocol");
6746         }
6747         if (mask->l4_ok || mask->l4_csum_ok) {
6748                 protocol = mlx5_flow_locate_proto_l4(&item, end_item);
6749                 if (!protocol)
6750                         return rte_flow_error_set(error, EINVAL,
6751                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6752                                                   integrity_item,
6753                                                   "missing L4 protocol");
6754         }
6755         return 0;
6756 }
6757
6758 /**
6759  * Internal validation function. For validating both actions and items.
6760  *
6761  * @param[in] dev
6762  *   Pointer to the rte_eth_dev structure.
6763  * @param[in] attr
6764  *   Pointer to the flow attributes.
6765  * @param[in] items
6766  *   Pointer to the list of items.
6767  * @param[in] actions
6768  *   Pointer to the list of actions.
6769  * @param[in] external
6770  *   This flow rule is created by request external to PMD.
6771  * @param[in] hairpin
6772  *   Number of hairpin TX actions, 0 means classic flow.
6773  * @param[out] error
6774  *   Pointer to the error structure.
6775  *
6776  * @return
6777  *   0 on success, a negative errno value otherwise and rte_errno is set.
6778  */
6779 static int
6780 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
6781                  const struct rte_flow_item items[],
6782                  const struct rte_flow_action actions[],
6783                  bool external, int hairpin, struct rte_flow_error *error)
6784 {
6785         int ret;
6786         uint64_t action_flags = 0;
6787         uint64_t item_flags = 0;
6788         uint64_t last_item = 0;
6789         uint8_t next_protocol = 0xff;
6790         uint16_t ether_type = 0;
6791         int actions_n = 0;
6792         uint8_t item_ipv6_proto = 0;
6793         int fdb_mirror_limit = 0;
6794         int modify_after_mirror = 0;
6795         const struct rte_flow_item *geneve_item = NULL;
6796         const struct rte_flow_item *gre_item = NULL;
6797         const struct rte_flow_item *gtp_item = NULL;
6798         const struct rte_flow_action_raw_decap *decap;
6799         const struct rte_flow_action_raw_encap *encap;
6800         const struct rte_flow_action_rss *rss = NULL;
6801         const struct rte_flow_action_rss *sample_rss = NULL;
6802         const struct rte_flow_action_count *sample_count = NULL;
6803         const struct rte_flow_item_tcp nic_tcp_mask = {
6804                 .hdr = {
6805                         .tcp_flags = 0xFF,
6806                         .src_port = RTE_BE16(UINT16_MAX),
6807                         .dst_port = RTE_BE16(UINT16_MAX),
6808                 }
6809         };
6810         const struct rte_flow_item_ipv6 nic_ipv6_mask = {
6811                 .hdr = {
6812                         .src_addr =
6813                         "\xff\xff\xff\xff\xff\xff\xff\xff"
6814                         "\xff\xff\xff\xff\xff\xff\xff\xff",
6815                         .dst_addr =
6816                         "\xff\xff\xff\xff\xff\xff\xff\xff"
6817                         "\xff\xff\xff\xff\xff\xff\xff\xff",
6818                         .vtc_flow = RTE_BE32(0xffffffff),
6819                         .proto = 0xff,
6820                         .hop_limits = 0xff,
6821                 },
6822                 .has_frag_ext = 1,
6823         };
6824         const struct rte_flow_item_ecpri nic_ecpri_mask = {
6825                 .hdr = {
6826                         .common = {
6827                                 .u32 =
6828                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
6829                                         .type = 0xFF,
6830                                         }).u32),
6831                         },
6832                         .dummy[0] = 0xffffffff,
6833                 },
6834         };
6835         struct mlx5_priv *priv = dev->data->dev_private;
6836         struct mlx5_dev_config *dev_conf = &priv->config;
6837         uint16_t queue_index = 0xFFFF;
6838         const struct rte_flow_item_vlan *vlan_m = NULL;
6839         uint32_t rw_act_num = 0;
6840         uint64_t is_root;
6841         const struct mlx5_flow_tunnel *tunnel;
6842         enum mlx5_tof_rule_type tof_rule_type;
6843         struct flow_grp_info grp_info = {
6844                 .external = !!external,
6845                 .transfer = !!attr->transfer,
6846                 .fdb_def_rule = !!priv->fdb_def_rule,
6847                 .std_tbl_fix = true,
6848         };
6849         const struct rte_eth_hairpin_conf *conf;
6850         const struct rte_flow_item *rule_items = items;
6851         const struct rte_flow_item *port_id_item = NULL;
6852         bool def_policy = false;
6853         uint16_t udp_dport = 0;
6854
6855         if (items == NULL)
6856                 return -1;
6857         tunnel = is_tunnel_offload_active(dev) ?
6858                  mlx5_get_tof(items, actions, &tof_rule_type) : NULL;
6859         if (tunnel) {
6860                 if (priv->representor)
6861                         return rte_flow_error_set
6862                                 (error, ENOTSUP,
6863                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6864                                  NULL, "decap not supported for VF representor");
6865                 if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_SET_RULE)
6866                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
6867                 else if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_MATCH_RULE)
6868                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_MATCH |
6869                                         MLX5_FLOW_ACTION_DECAP;
6870                 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
6871                                         (dev, attr, tunnel, tof_rule_type);
6872         }
6873         ret = flow_dv_validate_attributes(dev, tunnel, attr, &grp_info, error);
6874         if (ret < 0)
6875                 return ret;
6876         is_root = (uint64_t)ret;
6877         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
6878                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
6879                 int type = items->type;
6880
6881                 if (!mlx5_flow_os_item_supported(type))
6882                         return rte_flow_error_set(error, ENOTSUP,
6883                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6884                                                   NULL, "item not supported");
6885                 switch (type) {
6886                 case RTE_FLOW_ITEM_TYPE_VOID:
6887                         break;
6888                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
6889                         ret = flow_dv_validate_item_port_id
6890                                         (dev, items, attr, item_flags, error);
6891                         if (ret < 0)
6892                                 return ret;
6893                         last_item = MLX5_FLOW_ITEM_PORT_ID;
6894                         port_id_item = items;
6895                         break;
6896                 case RTE_FLOW_ITEM_TYPE_ETH:
6897                         ret = mlx5_flow_validate_item_eth(items, item_flags,
6898                                                           true, error);
6899                         if (ret < 0)
6900                                 return ret;
6901                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
6902                                              MLX5_FLOW_LAYER_OUTER_L2;
6903                         if (items->mask != NULL && items->spec != NULL) {
6904                                 ether_type =
6905                                         ((const struct rte_flow_item_eth *)
6906                                          items->spec)->type;
6907                                 ether_type &=
6908                                         ((const struct rte_flow_item_eth *)
6909                                          items->mask)->type;
6910                                 ether_type = rte_be_to_cpu_16(ether_type);
6911                         } else {
6912                                 ether_type = 0;
6913                         }
6914                         break;
6915                 case RTE_FLOW_ITEM_TYPE_VLAN:
6916                         ret = flow_dv_validate_item_vlan(items, item_flags,
6917                                                          dev, error);
6918                         if (ret < 0)
6919                                 return ret;
6920                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
6921                                              MLX5_FLOW_LAYER_OUTER_VLAN;
6922                         if (items->mask != NULL && items->spec != NULL) {
6923                                 ether_type =
6924                                         ((const struct rte_flow_item_vlan *)
6925                                          items->spec)->inner_type;
6926                                 ether_type &=
6927                                         ((const struct rte_flow_item_vlan *)
6928                                          items->mask)->inner_type;
6929                                 ether_type = rte_be_to_cpu_16(ether_type);
6930                         } else {
6931                                 ether_type = 0;
6932                         }
6933                         /* Store outer VLAN mask for of_push_vlan action. */
6934                         if (!tunnel)
6935                                 vlan_m = items->mask;
6936                         break;
6937                 case RTE_FLOW_ITEM_TYPE_IPV4:
6938                         mlx5_flow_tunnel_ip_check(items, next_protocol,
6939                                                   &item_flags, &tunnel);
6940                         ret = flow_dv_validate_item_ipv4(dev, items, item_flags,
6941                                                          last_item, ether_type,
6942                                                          error);
6943                         if (ret < 0)
6944                                 return ret;
6945                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
6946                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
6947                         if (items->mask != NULL &&
6948                             ((const struct rte_flow_item_ipv4 *)
6949                              items->mask)->hdr.next_proto_id) {
6950                                 next_protocol =
6951                                         ((const struct rte_flow_item_ipv4 *)
6952                                          (items->spec))->hdr.next_proto_id;
6953                                 next_protocol &=
6954                                         ((const struct rte_flow_item_ipv4 *)
6955                                          (items->mask))->hdr.next_proto_id;
6956                         } else {
6957                                 /* Reset for inner layer. */
6958                                 next_protocol = 0xff;
6959                         }
6960                         break;
6961                 case RTE_FLOW_ITEM_TYPE_IPV6:
6962                         mlx5_flow_tunnel_ip_check(items, next_protocol,
6963                                                   &item_flags, &tunnel);
6964                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
6965                                                            last_item,
6966                                                            ether_type,
6967                                                            &nic_ipv6_mask,
6968                                                            error);
6969                         if (ret < 0)
6970                                 return ret;
6971                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
6972                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
6973                         if (items->mask != NULL &&
6974                             ((const struct rte_flow_item_ipv6 *)
6975                              items->mask)->hdr.proto) {
6976                                 item_ipv6_proto =
6977                                         ((const struct rte_flow_item_ipv6 *)
6978                                          items->spec)->hdr.proto;
6979                                 next_protocol =
6980                                         ((const struct rte_flow_item_ipv6 *)
6981                                          items->spec)->hdr.proto;
6982                                 next_protocol &=
6983                                         ((const struct rte_flow_item_ipv6 *)
6984                                          items->mask)->hdr.proto;
6985                         } else {
6986                                 /* Reset for inner layer. */
6987                                 next_protocol = 0xff;
6988                         }
6989                         break;
6990                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
6991                         ret = flow_dv_validate_item_ipv6_frag_ext(items,
6992                                                                   item_flags,
6993                                                                   error);
6994                         if (ret < 0)
6995                                 return ret;
6996                         last_item = tunnel ?
6997                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
6998                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
6999                         if (items->mask != NULL &&
7000                             ((const struct rte_flow_item_ipv6_frag_ext *)
7001                              items->mask)->hdr.next_header) {
7002                                 next_protocol =
7003                                 ((const struct rte_flow_item_ipv6_frag_ext *)
7004                                  items->spec)->hdr.next_header;
7005                                 next_protocol &=
7006                                 ((const struct rte_flow_item_ipv6_frag_ext *)
7007                                  items->mask)->hdr.next_header;
7008                         } else {
7009                                 /* Reset for inner layer. */
7010                                 next_protocol = 0xff;
7011                         }
7012                         break;
7013                 case RTE_FLOW_ITEM_TYPE_TCP:
7014                         ret = mlx5_flow_validate_item_tcp
7015                                                 (items, item_flags,
7016                                                  next_protocol,
7017                                                  &nic_tcp_mask,
7018                                                  error);
7019                         if (ret < 0)
7020                                 return ret;
7021                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7022                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7023                         break;
7024                 case RTE_FLOW_ITEM_TYPE_UDP:
7025                         ret = mlx5_flow_validate_item_udp(items, item_flags,
7026                                                           next_protocol,
7027                                                           error);
7028                         const struct rte_flow_item_udp *spec = items->spec;
7029                         const struct rte_flow_item_udp *mask = items->mask;
7030                         if (!mask)
7031                                 mask = &rte_flow_item_udp_mask;
7032                         if (spec != NULL)
7033                                 udp_dport = rte_be_to_cpu_16
7034                                                 (spec->hdr.dst_port &
7035                                                  mask->hdr.dst_port);
7036                         if (ret < 0)
7037                                 return ret;
7038                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7039                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7040                         break;
7041                 case RTE_FLOW_ITEM_TYPE_GRE:
7042                         ret = mlx5_flow_validate_item_gre(items, item_flags,
7043                                                           next_protocol, error);
7044                         if (ret < 0)
7045                                 return ret;
7046                         gre_item = items;
7047                         last_item = MLX5_FLOW_LAYER_GRE;
7048                         break;
7049                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7050                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
7051                                                             next_protocol,
7052                                                             error);
7053                         if (ret < 0)
7054                                 return ret;
7055                         last_item = MLX5_FLOW_LAYER_NVGRE;
7056                         break;
7057                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7058                         ret = mlx5_flow_validate_item_gre_key
7059                                 (items, item_flags, gre_item, error);
7060                         if (ret < 0)
7061                                 return ret;
7062                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7063                         break;
7064                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7065                         ret = mlx5_flow_validate_item_vxlan(dev, udp_dport,
7066                                                             items, item_flags,
7067                                                             attr, error);
7068                         if (ret < 0)
7069                                 return ret;
7070                         last_item = MLX5_FLOW_LAYER_VXLAN;
7071                         break;
7072                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7073                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
7074                                                                 item_flags, dev,
7075                                                                 error);
7076                         if (ret < 0)
7077                                 return ret;
7078                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7079                         break;
7080                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7081                         ret = mlx5_flow_validate_item_geneve(items,
7082                                                              item_flags, dev,
7083                                                              error);
7084                         if (ret < 0)
7085                                 return ret;
7086                         geneve_item = items;
7087                         last_item = MLX5_FLOW_LAYER_GENEVE;
7088                         break;
7089                 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
7090                         ret = mlx5_flow_validate_item_geneve_opt(items,
7091                                                                  last_item,
7092                                                                  geneve_item,
7093                                                                  dev,
7094                                                                  error);
7095                         if (ret < 0)
7096                                 return ret;
7097                         last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
7098                         break;
7099                 case RTE_FLOW_ITEM_TYPE_MPLS:
7100                         ret = mlx5_flow_validate_item_mpls(dev, items,
7101                                                            item_flags,
7102                                                            last_item, error);
7103                         if (ret < 0)
7104                                 return ret;
7105                         last_item = MLX5_FLOW_LAYER_MPLS;
7106                         break;
7107
7108                 case RTE_FLOW_ITEM_TYPE_MARK:
7109                         ret = flow_dv_validate_item_mark(dev, items, attr,
7110                                                          error);
7111                         if (ret < 0)
7112                                 return ret;
7113                         last_item = MLX5_FLOW_ITEM_MARK;
7114                         break;
7115                 case RTE_FLOW_ITEM_TYPE_META:
7116                         ret = flow_dv_validate_item_meta(dev, items, attr,
7117                                                          error);
7118                         if (ret < 0)
7119                                 return ret;
7120                         last_item = MLX5_FLOW_ITEM_METADATA;
7121                         break;
7122                 case RTE_FLOW_ITEM_TYPE_ICMP:
7123                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
7124                                                            next_protocol,
7125                                                            error);
7126                         if (ret < 0)
7127                                 return ret;
7128                         last_item = MLX5_FLOW_LAYER_ICMP;
7129                         break;
7130                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7131                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
7132                                                             next_protocol,
7133                                                             error);
7134                         if (ret < 0)
7135                                 return ret;
7136                         item_ipv6_proto = IPPROTO_ICMPV6;
7137                         last_item = MLX5_FLOW_LAYER_ICMP6;
7138                         break;
7139                 case RTE_FLOW_ITEM_TYPE_TAG:
7140                         ret = flow_dv_validate_item_tag(dev, items,
7141                                                         attr, error);
7142                         if (ret < 0)
7143                                 return ret;
7144                         last_item = MLX5_FLOW_ITEM_TAG;
7145                         break;
7146                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7147                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7148                         break;
7149                 case RTE_FLOW_ITEM_TYPE_GTP:
7150                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
7151                                                         error);
7152                         if (ret < 0)
7153                                 return ret;
7154                         gtp_item = items;
7155                         last_item = MLX5_FLOW_LAYER_GTP;
7156                         break;
7157                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
7158                         ret = flow_dv_validate_item_gtp_psc(items, last_item,
7159                                                             gtp_item, attr,
7160                                                             error);
7161                         if (ret < 0)
7162                                 return ret;
7163                         last_item = MLX5_FLOW_LAYER_GTP_PSC;
7164                         break;
7165                 case RTE_FLOW_ITEM_TYPE_ECPRI:
7166                         /* Capacity will be checked in the translate stage. */
7167                         ret = mlx5_flow_validate_item_ecpri(items, item_flags,
7168                                                             last_item,
7169                                                             ether_type,
7170                                                             &nic_ecpri_mask,
7171                                                             error);
7172                         if (ret < 0)
7173                                 return ret;
7174                         last_item = MLX5_FLOW_LAYER_ECPRI;
7175                         break;
7176                 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
7177                         if (item_flags & MLX5_FLOW_ITEM_INTEGRITY)
7178                                 return rte_flow_error_set
7179                                         (error, ENOTSUP,
7180                                          RTE_FLOW_ERROR_TYPE_ITEM,
7181                                          NULL, "multiple integrity items not supported");
7182                         ret = flow_dv_validate_item_integrity(dev, rule_items,
7183                                                               items, error);
7184                         if (ret < 0)
7185                                 return ret;
7186                         last_item = MLX5_FLOW_ITEM_INTEGRITY;
7187                         break;
7188                 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
7189                         ret = flow_dv_validate_item_aso_ct(dev, items,
7190                                                            &item_flags, error);
7191                         if (ret < 0)
7192                                 return ret;
7193                         break;
7194                 case MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL:
7195                         /* tunnel offload item was processed before
7196                          * list it here as a supported type
7197                          */
7198                         break;
7199                 default:
7200                         return rte_flow_error_set(error, ENOTSUP,
7201                                                   RTE_FLOW_ERROR_TYPE_ITEM,
7202                                                   NULL, "item not supported");
7203                 }
7204                 item_flags |= last_item;
7205         }
7206         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
7207                 int type = actions->type;
7208                 bool shared_count = false;
7209
7210                 if (!mlx5_flow_os_action_supported(type))
7211                         return rte_flow_error_set(error, ENOTSUP,
7212                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7213                                                   actions,
7214                                                   "action not supported");
7215                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
7216                         return rte_flow_error_set(error, ENOTSUP,
7217                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7218                                                   actions, "too many actions");
7219                 if (action_flags &
7220                         MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
7221                         return rte_flow_error_set(error, ENOTSUP,
7222                                 RTE_FLOW_ERROR_TYPE_ACTION,
7223                                 NULL, "meter action with policy "
7224                                 "must be the last action");
7225                 switch (type) {
7226                 case RTE_FLOW_ACTION_TYPE_VOID:
7227                         break;
7228                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7229                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
7230                         ret = flow_dv_validate_action_port_id(dev,
7231                                                               action_flags,
7232                                                               actions,
7233                                                               attr,
7234                                                               error);
7235                         if (ret)
7236                                 return ret;
7237                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7238                         ++actions_n;
7239                         break;
7240                 case RTE_FLOW_ACTION_TYPE_FLAG:
7241                         ret = flow_dv_validate_action_flag(dev, action_flags,
7242                                                            attr, error);
7243                         if (ret < 0)
7244                                 return ret;
7245                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7246                                 /* Count all modify-header actions as one. */
7247                                 if (!(action_flags &
7248                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
7249                                         ++actions_n;
7250                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
7251                                                 MLX5_FLOW_ACTION_MARK_EXT;
7252                                 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7253                                         modify_after_mirror = 1;
7254
7255                         } else {
7256                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
7257                                 ++actions_n;
7258                         }
7259                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
7260                         break;
7261                 case RTE_FLOW_ACTION_TYPE_MARK:
7262                         ret = flow_dv_validate_action_mark(dev, actions,
7263                                                            action_flags,
7264                                                            attr, error);
7265                         if (ret < 0)
7266                                 return ret;
7267                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7268                                 /* Count all modify-header actions as one. */
7269                                 if (!(action_flags &
7270                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
7271                                         ++actions_n;
7272                                 action_flags |= MLX5_FLOW_ACTION_MARK |
7273                                                 MLX5_FLOW_ACTION_MARK_EXT;
7274                                 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7275                                         modify_after_mirror = 1;
7276                         } else {
7277                                 action_flags |= MLX5_FLOW_ACTION_MARK;
7278                                 ++actions_n;
7279                         }
7280                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
7281                         break;
7282                 case RTE_FLOW_ACTION_TYPE_SET_META:
7283                         ret = flow_dv_validate_action_set_meta(dev, actions,
7284                                                                action_flags,
7285                                                                attr, error);
7286                         if (ret < 0)
7287                                 return ret;
7288                         /* Count all modify-header actions as one action. */
7289                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7290                                 ++actions_n;
7291                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7292                                 modify_after_mirror = 1;
7293                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7294                         rw_act_num += MLX5_ACT_NUM_SET_META;
7295                         break;
7296                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7297                         ret = flow_dv_validate_action_set_tag(dev, actions,
7298                                                               action_flags,
7299                                                               attr, error);
7300                         if (ret < 0)
7301                                 return ret;
7302                         /* Count all modify-header actions as one action. */
7303                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7304                                 ++actions_n;
7305                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7306                                 modify_after_mirror = 1;
7307                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7308                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7309                         break;
7310                 case RTE_FLOW_ACTION_TYPE_DROP:
7311                         ret = mlx5_flow_validate_action_drop(action_flags,
7312                                                              attr, error);
7313                         if (ret < 0)
7314                                 return ret;
7315                         action_flags |= MLX5_FLOW_ACTION_DROP;
7316                         ++actions_n;
7317                         break;
7318                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7319                         ret = mlx5_flow_validate_action_queue(actions,
7320                                                               action_flags, dev,
7321                                                               attr, error);
7322                         if (ret < 0)
7323                                 return ret;
7324                         queue_index = ((const struct rte_flow_action_queue *)
7325                                                         (actions->conf))->index;
7326                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7327                         ++actions_n;
7328                         break;
7329                 case RTE_FLOW_ACTION_TYPE_RSS:
7330                         rss = actions->conf;
7331                         ret = mlx5_flow_validate_action_rss(actions,
7332                                                             action_flags, dev,
7333                                                             attr, item_flags,
7334                                                             error);
7335                         if (ret < 0)
7336                                 return ret;
7337                         if (rss && sample_rss &&
7338                             (sample_rss->level != rss->level ||
7339                             sample_rss->types != rss->types))
7340                                 return rte_flow_error_set(error, ENOTSUP,
7341                                         RTE_FLOW_ERROR_TYPE_ACTION,
7342                                         NULL,
7343                                         "Can't use the different RSS types "
7344                                         "or level in the same flow");
7345                         if (rss != NULL && rss->queue_num)
7346                                 queue_index = rss->queue[0];
7347                         action_flags |= MLX5_FLOW_ACTION_RSS;
7348                         ++actions_n;
7349                         break;
7350                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
7351                         ret =
7352                         mlx5_flow_validate_action_default_miss(action_flags,
7353                                         attr, error);
7354                         if (ret < 0)
7355                                 return ret;
7356                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
7357                         ++actions_n;
7358                         break;
7359                 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
7360                         shared_count = true;
7361                         /* fall-through. */
7362                 case RTE_FLOW_ACTION_TYPE_COUNT:
7363                         ret = flow_dv_validate_action_count(dev, shared_count,
7364                                                             action_flags,
7365                                                             error);
7366                         if (ret < 0)
7367                                 return ret;
7368                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7369                         ++actions_n;
7370                         break;
7371                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7372                         if (flow_dv_validate_action_pop_vlan(dev,
7373                                                              action_flags,
7374                                                              actions,
7375                                                              item_flags, attr,
7376                                                              error))
7377                                 return -rte_errno;
7378                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7379                                 modify_after_mirror = 1;
7380                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7381                         ++actions_n;
7382                         break;
7383                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7384                         ret = flow_dv_validate_action_push_vlan(dev,
7385                                                                 action_flags,
7386                                                                 vlan_m,
7387                                                                 actions, attr,
7388                                                                 error);
7389                         if (ret < 0)
7390                                 return ret;
7391                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7392                                 modify_after_mirror = 1;
7393                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7394                         ++actions_n;
7395                         break;
7396                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7397                         ret = flow_dv_validate_action_set_vlan_pcp
7398                                                 (action_flags, actions, error);
7399                         if (ret < 0)
7400                                 return ret;
7401                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7402                                 modify_after_mirror = 1;
7403                         /* Count PCP with push_vlan command. */
7404                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
7405                         break;
7406                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7407                         ret = flow_dv_validate_action_set_vlan_vid
7408                                                 (item_flags, action_flags,
7409                                                  actions, error);
7410                         if (ret < 0)
7411                                 return ret;
7412                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7413                                 modify_after_mirror = 1;
7414                         /* Count VID with push_vlan command. */
7415                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7416                         rw_act_num += MLX5_ACT_NUM_MDF_VID;
7417                         break;
7418                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7419                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7420                         ret = flow_dv_validate_action_l2_encap(dev,
7421                                                                action_flags,
7422                                                                actions, attr,
7423                                                                error);
7424                         if (ret < 0)
7425                                 return ret;
7426                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
7427                         ++actions_n;
7428                         break;
7429                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7430                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7431                         ret = flow_dv_validate_action_decap(dev, action_flags,
7432                                                             actions, item_flags,
7433                                                             attr, error);
7434                         if (ret < 0)
7435                                 return ret;
7436                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7437                                 modify_after_mirror = 1;
7438                         action_flags |= MLX5_FLOW_ACTION_DECAP;
7439                         ++actions_n;
7440                         break;
7441                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7442                         ret = flow_dv_validate_action_raw_encap_decap
7443                                 (dev, NULL, actions->conf, attr, &action_flags,
7444                                  &actions_n, actions, item_flags, error);
7445                         if (ret < 0)
7446                                 return ret;
7447                         break;
7448                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7449                         decap = actions->conf;
7450                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
7451                                 ;
7452                         if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7453                                 encap = NULL;
7454                                 actions--;
7455                         } else {
7456                                 encap = actions->conf;
7457                         }
7458                         ret = flow_dv_validate_action_raw_encap_decap
7459                                            (dev,
7460                                             decap ? decap : &empty_decap, encap,
7461                                             attr, &action_flags, &actions_n,
7462                                             actions, item_flags, error);
7463                         if (ret < 0)
7464                                 return ret;
7465                         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7466                             (action_flags & MLX5_FLOW_ACTION_DECAP))
7467                                 modify_after_mirror = 1;
7468                         break;
7469                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7470                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7471                         ret = flow_dv_validate_action_modify_mac(action_flags,
7472                                                                  actions,
7473                                                                  item_flags,
7474                                                                  error);
7475                         if (ret < 0)
7476                                 return ret;
7477                         /* Count all modify-header actions as one action. */
7478                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7479                                 ++actions_n;
7480                         action_flags |= actions->type ==
7481                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7482                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
7483                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
7484                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7485                                 modify_after_mirror = 1;
7486                         /*
7487                          * Even if the source and destination MAC addresses have
7488                          * overlap in the header with 4B alignment, the convert
7489                          * function will handle them separately and 4 SW actions
7490                          * will be created. And 2 actions will be added each
7491                          * time no matter how many bytes of address will be set.
7492                          */
7493                         rw_act_num += MLX5_ACT_NUM_MDF_MAC;
7494                         break;
7495                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7496                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7497                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
7498                                                                   actions,
7499                                                                   item_flags,
7500                                                                   error);
7501                         if (ret < 0)
7502                                 return ret;
7503                         /* Count all modify-header actions as one action. */
7504                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7505                                 ++actions_n;
7506                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7507                                 modify_after_mirror = 1;
7508                         action_flags |= actions->type ==
7509                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7510                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
7511                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
7512                         rw_act_num += MLX5_ACT_NUM_MDF_IPV4;
7513                         break;
7514                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7515                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7516                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
7517                                                                   actions,
7518                                                                   item_flags,
7519                                                                   error);
7520                         if (ret < 0)
7521                                 return ret;
7522                         if (item_ipv6_proto == IPPROTO_ICMPV6)
7523                                 return rte_flow_error_set(error, ENOTSUP,
7524                                         RTE_FLOW_ERROR_TYPE_ACTION,
7525                                         actions,
7526                                         "Can't change header "
7527                                         "with ICMPv6 proto");
7528                         /* Count all modify-header actions as one action. */
7529                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7530                                 ++actions_n;
7531                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7532                                 modify_after_mirror = 1;
7533                         action_flags |= actions->type ==
7534                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7535                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
7536                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
7537                         rw_act_num += MLX5_ACT_NUM_MDF_IPV6;
7538                         break;
7539                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7540                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7541                         ret = flow_dv_validate_action_modify_tp(action_flags,
7542                                                                 actions,
7543                                                                 item_flags,
7544                                                                 error);
7545                         if (ret < 0)
7546                                 return ret;
7547                         /* Count all modify-header actions as one action. */
7548                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7549                                 ++actions_n;
7550                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7551                                 modify_after_mirror = 1;
7552                         action_flags |= actions->type ==
7553                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7554                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
7555                                                 MLX5_FLOW_ACTION_SET_TP_DST;
7556                         rw_act_num += MLX5_ACT_NUM_MDF_PORT;
7557                         break;
7558                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7559                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7560                         ret = flow_dv_validate_action_modify_ttl(action_flags,
7561                                                                  actions,
7562                                                                  item_flags,
7563                                                                  error);
7564                         if (ret < 0)
7565                                 return ret;
7566                         /* Count all modify-header actions as one action. */
7567                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7568                                 ++actions_n;
7569                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7570                                 modify_after_mirror = 1;
7571                         action_flags |= actions->type ==
7572                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
7573                                                 MLX5_FLOW_ACTION_SET_TTL :
7574                                                 MLX5_FLOW_ACTION_DEC_TTL;
7575                         rw_act_num += MLX5_ACT_NUM_MDF_TTL;
7576                         break;
7577                 case RTE_FLOW_ACTION_TYPE_JUMP:
7578                         ret = flow_dv_validate_action_jump(dev, tunnel, actions,
7579                                                            action_flags,
7580                                                            attr, external,
7581                                                            error);
7582                         if (ret)
7583                                 return ret;
7584                         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7585                             fdb_mirror_limit)
7586                                 return rte_flow_error_set(error, EINVAL,
7587                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7588                                                   NULL,
7589                                                   "sample and jump action combination is not supported");
7590                         ++actions_n;
7591                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7592                         break;
7593                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7594                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7595                         ret = flow_dv_validate_action_modify_tcp_seq
7596                                                                 (action_flags,
7597                                                                  actions,
7598                                                                  item_flags,
7599                                                                  error);
7600                         if (ret < 0)
7601                                 return ret;
7602                         /* Count all modify-header actions as one action. */
7603                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7604                                 ++actions_n;
7605                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7606                                 modify_after_mirror = 1;
7607                         action_flags |= actions->type ==
7608                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7609                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
7610                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7611                         rw_act_num += MLX5_ACT_NUM_MDF_TCPSEQ;
7612                         break;
7613                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7614                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7615                         ret = flow_dv_validate_action_modify_tcp_ack
7616                                                                 (action_flags,
7617                                                                  actions,
7618                                                                  item_flags,
7619                                                                  error);
7620                         if (ret < 0)
7621                                 return ret;
7622                         /* Count all modify-header actions as one action. */
7623                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7624                                 ++actions_n;
7625                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7626                                 modify_after_mirror = 1;
7627                         action_flags |= actions->type ==
7628                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7629                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
7630                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
7631                         rw_act_num += MLX5_ACT_NUM_MDF_TCPACK;
7632                         break;
7633                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7634                         break;
7635                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7636                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7637                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7638                         break;
7639                 case RTE_FLOW_ACTION_TYPE_METER:
7640                         ret = mlx5_flow_validate_action_meter(dev,
7641                                                               action_flags,
7642                                                               actions, attr,
7643                                                               port_id_item,
7644                                                               &def_policy,
7645                                                               error);
7646                         if (ret < 0)
7647                                 return ret;
7648                         action_flags |= MLX5_FLOW_ACTION_METER;
7649                         if (!def_policy)
7650                                 action_flags |=
7651                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
7652                         ++actions_n;
7653                         /* Meter action will add one more TAG action. */
7654                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7655                         break;
7656                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
7657                         if (!attr->transfer && !attr->group)
7658                                 return rte_flow_error_set(error, ENOTSUP,
7659                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7660                                                                            NULL,
7661                           "Shared ASO age action is not supported for group 0");
7662                         if (action_flags & MLX5_FLOW_ACTION_AGE)
7663                                 return rte_flow_error_set
7664                                                   (error, EINVAL,
7665                                                    RTE_FLOW_ERROR_TYPE_ACTION,
7666                                                    NULL,
7667                                                    "duplicate age actions set");
7668                         action_flags |= MLX5_FLOW_ACTION_AGE;
7669                         ++actions_n;
7670                         break;
7671                 case RTE_FLOW_ACTION_TYPE_AGE:
7672                         ret = flow_dv_validate_action_age(action_flags,
7673                                                           actions, dev,
7674                                                           error);
7675                         if (ret < 0)
7676                                 return ret;
7677                         /*
7678                          * Validate the regular AGE action (using counter)
7679                          * mutual exclusion with share counter actions.
7680                          */
7681                         if (!priv->sh->flow_hit_aso_en) {
7682                                 if (shared_count)
7683                                         return rte_flow_error_set
7684                                                 (error, EINVAL,
7685                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7686                                                 NULL,
7687                                                 "old age and shared count combination is not supported");
7688                                 if (sample_count)
7689                                         return rte_flow_error_set
7690                                                 (error, EINVAL,
7691                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7692                                                 NULL,
7693                                                 "old age action and count must be in the same sub flow");
7694                         }
7695                         action_flags |= MLX5_FLOW_ACTION_AGE;
7696                         ++actions_n;
7697                         break;
7698                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7699                         ret = flow_dv_validate_action_modify_ipv4_dscp
7700                                                          (action_flags,
7701                                                           actions,
7702                                                           item_flags,
7703                                                           error);
7704                         if (ret < 0)
7705                                 return ret;
7706                         /* Count all modify-header actions as one action. */
7707                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7708                                 ++actions_n;
7709                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7710                                 modify_after_mirror = 1;
7711                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7712                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7713                         break;
7714                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7715                         ret = flow_dv_validate_action_modify_ipv6_dscp
7716                                                                 (action_flags,
7717                                                                  actions,
7718                                                                  item_flags,
7719                                                                  error);
7720                         if (ret < 0)
7721                                 return ret;
7722                         /* Count all modify-header actions as one action. */
7723                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7724                                 ++actions_n;
7725                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7726                                 modify_after_mirror = 1;
7727                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7728                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7729                         break;
7730                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
7731                         ret = flow_dv_validate_action_sample(&action_flags,
7732                                                              actions, dev,
7733                                                              attr, item_flags,
7734                                                              rss, &sample_rss,
7735                                                              &sample_count,
7736                                                              &fdb_mirror_limit,
7737                                                              error);
7738                         if (ret < 0)
7739                                 return ret;
7740                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
7741                         ++actions_n;
7742                         break;
7743                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
7744                         ret = flow_dv_validate_action_modify_field(dev,
7745                                                                    action_flags,
7746                                                                    actions,
7747                                                                    attr,
7748                                                                    error);
7749                         if (ret < 0)
7750                                 return ret;
7751                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7752                                 modify_after_mirror = 1;
7753                         /* Count all modify-header actions as one action. */
7754                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7755                                 ++actions_n;
7756                         action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
7757                         rw_act_num += ret;
7758                         break;
7759                 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
7760                         ret = flow_dv_validate_action_aso_ct(dev, action_flags,
7761                                                              item_flags, attr,
7762                                                              error);
7763                         if (ret < 0)
7764                                 return ret;
7765                         action_flags |= MLX5_FLOW_ACTION_CT;
7766                         break;
7767                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
7768                         /* tunnel offload action was processed before
7769                          * list it here as a supported type
7770                          */
7771                         break;
7772                 default:
7773                         return rte_flow_error_set(error, ENOTSUP,
7774                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7775                                                   actions,
7776                                                   "action not supported");
7777                 }
7778         }
7779         /*
7780          * Validate actions in flow rules
7781          * - Explicit decap action is prohibited by the tunnel offload API.
7782          * - Drop action in tunnel steer rule is prohibited by the API.
7783          * - Application cannot use MARK action because it's value can mask
7784          *   tunnel default miss nitification.
7785          * - JUMP in tunnel match rule has no support in current PMD
7786          *   implementation.
7787          * - TAG & META are reserved for future uses.
7788          */
7789         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_SET) {
7790                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_DECAP    |
7791                                             MLX5_FLOW_ACTION_MARK     |
7792                                             MLX5_FLOW_ACTION_SET_TAG  |
7793                                             MLX5_FLOW_ACTION_SET_META |
7794                                             MLX5_FLOW_ACTION_DROP;
7795
7796                 if (action_flags & bad_actions_mask)
7797                         return rte_flow_error_set
7798                                         (error, EINVAL,
7799                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7800                                         "Invalid RTE action in tunnel "
7801                                         "set decap rule");
7802                 if (!(action_flags & MLX5_FLOW_ACTION_JUMP))
7803                         return rte_flow_error_set
7804                                         (error, EINVAL,
7805                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7806                                         "tunnel set decap rule must terminate "
7807                                         "with JUMP");
7808                 if (!attr->ingress)
7809                         return rte_flow_error_set
7810                                         (error, EINVAL,
7811                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7812                                         "tunnel flows for ingress traffic only");
7813         }
7814         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_MATCH) {
7815                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_JUMP    |
7816                                             MLX5_FLOW_ACTION_MARK    |
7817                                             MLX5_FLOW_ACTION_SET_TAG |
7818                                             MLX5_FLOW_ACTION_SET_META;
7819
7820                 if (action_flags & bad_actions_mask)
7821                         return rte_flow_error_set
7822                                         (error, EINVAL,
7823                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7824                                         "Invalid RTE action in tunnel "
7825                                         "set match rule");
7826         }
7827         /*
7828          * Validate the drop action mutual exclusion with other actions.
7829          * Drop action is mutually-exclusive with any other action, except for
7830          * Count action.
7831          * Drop action compatibility with tunnel offload was already validated.
7832          */
7833         if (action_flags & (MLX5_FLOW_ACTION_TUNNEL_MATCH |
7834                             MLX5_FLOW_ACTION_TUNNEL_MATCH));
7835         else if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
7836             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
7837                 return rte_flow_error_set(error, EINVAL,
7838                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7839                                           "Drop action is mutually-exclusive "
7840                                           "with any other action, except for "
7841                                           "Count action");
7842         /* Eswitch has few restrictions on using items and actions */
7843         if (attr->transfer) {
7844                 if (!mlx5_flow_ext_mreg_supported(dev) &&
7845                     action_flags & MLX5_FLOW_ACTION_FLAG)
7846                         return rte_flow_error_set(error, ENOTSUP,
7847                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7848                                                   NULL,
7849                                                   "unsupported action FLAG");
7850                 if (!mlx5_flow_ext_mreg_supported(dev) &&
7851                     action_flags & MLX5_FLOW_ACTION_MARK)
7852                         return rte_flow_error_set(error, ENOTSUP,
7853                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7854                                                   NULL,
7855                                                   "unsupported action MARK");
7856                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
7857                         return rte_flow_error_set(error, ENOTSUP,
7858                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7859                                                   NULL,
7860                                                   "unsupported action QUEUE");
7861                 if (action_flags & MLX5_FLOW_ACTION_RSS)
7862                         return rte_flow_error_set(error, ENOTSUP,
7863                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7864                                                   NULL,
7865                                                   "unsupported action RSS");
7866                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
7867                         return rte_flow_error_set(error, EINVAL,
7868                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7869                                                   actions,
7870                                                   "no fate action is found");
7871         } else {
7872                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
7873                         return rte_flow_error_set(error, EINVAL,
7874                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7875                                                   actions,
7876                                                   "no fate action is found");
7877         }
7878         /*
7879          * Continue validation for Xcap and VLAN actions.
7880          * If hairpin is working in explicit TX rule mode, there is no actions
7881          * splitting and the validation of hairpin ingress flow should be the
7882          * same as other standard flows.
7883          */
7884         if ((action_flags & (MLX5_FLOW_XCAP_ACTIONS |
7885                              MLX5_FLOW_VLAN_ACTIONS)) &&
7886             (queue_index == 0xFFFF ||
7887              mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN ||
7888              ((conf = mlx5_rxq_get_hairpin_conf(dev, queue_index)) != NULL &&
7889              conf->tx_explicit != 0))) {
7890                 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
7891                     MLX5_FLOW_XCAP_ACTIONS)
7892                         return rte_flow_error_set(error, ENOTSUP,
7893                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7894                                                   NULL, "encap and decap "
7895                                                   "combination aren't supported");
7896                 if (!attr->transfer && attr->ingress) {
7897                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7898                                 return rte_flow_error_set
7899                                                 (error, ENOTSUP,
7900                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7901                                                  NULL, "encap is not supported"
7902                                                  " for ingress traffic");
7903                         else if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7904                                 return rte_flow_error_set
7905                                                 (error, ENOTSUP,
7906                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7907                                                  NULL, "push VLAN action not "
7908                                                  "supported for ingress");
7909                         else if ((action_flags & MLX5_FLOW_VLAN_ACTIONS) ==
7910                                         MLX5_FLOW_VLAN_ACTIONS)
7911                                 return rte_flow_error_set
7912                                                 (error, ENOTSUP,
7913                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7914                                                  NULL, "no support for "
7915                                                  "multiple VLAN actions");
7916                 }
7917         }
7918         if (action_flags & MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY) {
7919                 if ((action_flags & (MLX5_FLOW_FATE_ACTIONS &
7920                         ~MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)) &&
7921                         attr->ingress)
7922                         return rte_flow_error_set
7923                                 (error, ENOTSUP,
7924                                 RTE_FLOW_ERROR_TYPE_ACTION,
7925                                 NULL, "fate action not supported for "
7926                                 "meter with policy");
7927                 if (attr->egress) {
7928                         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
7929                                 return rte_flow_error_set
7930                                         (error, ENOTSUP,
7931                                         RTE_FLOW_ERROR_TYPE_ACTION,
7932                                         NULL, "modify header action in egress "
7933                                         "cannot be done before meter action");
7934                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7935                                 return rte_flow_error_set
7936                                         (error, ENOTSUP,
7937                                         RTE_FLOW_ERROR_TYPE_ACTION,
7938                                         NULL, "encap action in egress "
7939                                         "cannot be done before meter action");
7940                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7941                                 return rte_flow_error_set
7942                                         (error, ENOTSUP,
7943                                         RTE_FLOW_ERROR_TYPE_ACTION,
7944                                         NULL, "push vlan action in egress "
7945                                         "cannot be done before meter action");
7946                 }
7947         }
7948         /*
7949          * Hairpin flow will add one more TAG action in TX implicit mode.
7950          * In TX explicit mode, there will be no hairpin flow ID.
7951          */
7952         if (hairpin > 0)
7953                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7954         /* extra metadata enabled: one more TAG action will be add. */
7955         if (dev_conf->dv_flow_en &&
7956             dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
7957             mlx5_flow_ext_mreg_supported(dev))
7958                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7959         if (rw_act_num >
7960                         flow_dv_modify_hdr_action_max(dev, is_root)) {
7961                 return rte_flow_error_set(error, ENOTSUP,
7962                                           RTE_FLOW_ERROR_TYPE_ACTION,
7963                                           NULL, "too many header modify"
7964                                           " actions to support");
7965         }
7966         /* Eswitch egress mirror and modify flow has limitation on CX5 */
7967         if (fdb_mirror_limit && modify_after_mirror)
7968                 return rte_flow_error_set(error, EINVAL,
7969                                 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7970                                 "sample before modify action is not supported");
7971         return 0;
7972 }
7973
7974 /**
7975  * Internal preparation function. Allocates the DV flow size,
7976  * this size is constant.
7977  *
7978  * @param[in] dev
7979  *   Pointer to the rte_eth_dev structure.
7980  * @param[in] attr
7981  *   Pointer to the flow attributes.
7982  * @param[in] items
7983  *   Pointer to the list of items.
7984  * @param[in] actions
7985  *   Pointer to the list of actions.
7986  * @param[out] error
7987  *   Pointer to the error structure.
7988  *
7989  * @return
7990  *   Pointer to mlx5_flow object on success,
7991  *   otherwise NULL and rte_errno is set.
7992  */
7993 static struct mlx5_flow *
7994 flow_dv_prepare(struct rte_eth_dev *dev,
7995                 const struct rte_flow_attr *attr __rte_unused,
7996                 const struct rte_flow_item items[] __rte_unused,
7997                 const struct rte_flow_action actions[] __rte_unused,
7998                 struct rte_flow_error *error)
7999 {
8000         uint32_t handle_idx = 0;
8001         struct mlx5_flow *dev_flow;
8002         struct mlx5_flow_handle *dev_handle;
8003         struct mlx5_priv *priv = dev->data->dev_private;
8004         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
8005
8006         MLX5_ASSERT(wks);
8007         wks->skip_matcher_reg = 0;
8008         wks->policy = NULL;
8009         wks->final_policy = NULL;
8010         /* In case of corrupting the memory. */
8011         if (wks->flow_idx >= MLX5_NUM_MAX_DEV_FLOWS) {
8012                 rte_flow_error_set(error, ENOSPC,
8013                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8014                                    "not free temporary device flow");
8015                 return NULL;
8016         }
8017         dev_handle = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
8018                                    &handle_idx);
8019         if (!dev_handle) {
8020                 rte_flow_error_set(error, ENOMEM,
8021                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8022                                    "not enough memory to create flow handle");
8023                 return NULL;
8024         }
8025         MLX5_ASSERT(wks->flow_idx < RTE_DIM(wks->flows));
8026         dev_flow = &wks->flows[wks->flow_idx++];
8027         memset(dev_flow, 0, sizeof(*dev_flow));
8028         dev_flow->handle = dev_handle;
8029         dev_flow->handle_idx = handle_idx;
8030         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
8031         dev_flow->ingress = attr->ingress;
8032         dev_flow->dv.transfer = attr->transfer;
8033         return dev_flow;
8034 }
8035
8036 #ifdef RTE_LIBRTE_MLX5_DEBUG
8037 /**
8038  * Sanity check for match mask and value. Similar to check_valid_spec() in
8039  * kernel driver. If unmasked bit is present in value, it returns failure.
8040  *
8041  * @param match_mask
8042  *   pointer to match mask buffer.
8043  * @param match_value
8044  *   pointer to match value buffer.
8045  *
8046  * @return
8047  *   0 if valid, -EINVAL otherwise.
8048  */
8049 static int
8050 flow_dv_check_valid_spec(void *match_mask, void *match_value)
8051 {
8052         uint8_t *m = match_mask;
8053         uint8_t *v = match_value;
8054         unsigned int i;
8055
8056         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
8057                 if (v[i] & ~m[i]) {
8058                         DRV_LOG(ERR,
8059                                 "match_value differs from match_criteria"
8060                                 " %p[%u] != %p[%u]",
8061                                 match_value, i, match_mask, i);
8062                         return -EINVAL;
8063                 }
8064         }
8065         return 0;
8066 }
8067 #endif
8068
8069 /**
8070  * Add match of ip_version.
8071  *
8072  * @param[in] group
8073  *   Flow group.
8074  * @param[in] headers_v
8075  *   Values header pointer.
8076  * @param[in] headers_m
8077  *   Masks header pointer.
8078  * @param[in] ip_version
8079  *   The IP version to set.
8080  */
8081 static inline void
8082 flow_dv_set_match_ip_version(uint32_t group,
8083                              void *headers_v,
8084                              void *headers_m,
8085                              uint8_t ip_version)
8086 {
8087         if (group == 0)
8088                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
8089         else
8090                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version,
8091                          ip_version);
8092         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, ip_version);
8093         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, 0);
8094         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype, 0);
8095 }
8096
8097 /**
8098  * Add Ethernet item to matcher and to the value.
8099  *
8100  * @param[in, out] matcher
8101  *   Flow matcher.
8102  * @param[in, out] key
8103  *   Flow matcher value.
8104  * @param[in] item
8105  *   Flow pattern to translate.
8106  * @param[in] inner
8107  *   Item is inner pattern.
8108  */
8109 static void
8110 flow_dv_translate_item_eth(void *matcher, void *key,
8111                            const struct rte_flow_item *item, int inner,
8112                            uint32_t group)
8113 {
8114         const struct rte_flow_item_eth *eth_m = item->mask;
8115         const struct rte_flow_item_eth *eth_v = item->spec;
8116         const struct rte_flow_item_eth nic_mask = {
8117                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8118                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8119                 .type = RTE_BE16(0xffff),
8120                 .has_vlan = 0,
8121         };
8122         void *hdrs_m;
8123         void *hdrs_v;
8124         char *l24_v;
8125         unsigned int i;
8126
8127         if (!eth_v)
8128                 return;
8129         if (!eth_m)
8130                 eth_m = &nic_mask;
8131         if (inner) {
8132                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8133                                          inner_headers);
8134                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8135         } else {
8136                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8137                                          outer_headers);
8138                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8139         }
8140         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, dmac_47_16),
8141                &eth_m->dst, sizeof(eth_m->dst));
8142         /* The value must be in the range of the mask. */
8143         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, dmac_47_16);
8144         for (i = 0; i < sizeof(eth_m->dst); ++i)
8145                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
8146         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, smac_47_16),
8147                &eth_m->src, sizeof(eth_m->src));
8148         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, smac_47_16);
8149         /* The value must be in the range of the mask. */
8150         for (i = 0; i < sizeof(eth_m->dst); ++i)
8151                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
8152         /*
8153          * HW supports match on one Ethertype, the Ethertype following the last
8154          * VLAN tag of the packet (see PRM).
8155          * Set match on ethertype only if ETH header is not followed by VLAN.
8156          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8157          * ethertype, and use ip_version field instead.
8158          * eCPRI over Ether layer will use type value 0xAEFE.
8159          */
8160         if (eth_m->type == 0xFFFF) {
8161                 /* Set cvlan_tag mask for any single\multi\un-tagged case. */
8162                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8163                 switch (eth_v->type) {
8164                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8165                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8166                         return;
8167                 case RTE_BE16(RTE_ETHER_TYPE_QINQ):
8168                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8169                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8170                         return;
8171                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8172                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8173                         return;
8174                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8175                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8176                         return;
8177                 default:
8178                         break;
8179                 }
8180         }
8181         if (eth_m->has_vlan) {
8182                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8183                 if (eth_v->has_vlan) {
8184                         /*
8185                          * Here, when also has_more_vlan field in VLAN item is
8186                          * not set, only single-tagged packets will be matched.
8187                          */
8188                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8189                         return;
8190                 }
8191         }
8192         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8193                  rte_be_to_cpu_16(eth_m->type));
8194         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
8195         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
8196 }
8197
8198 /**
8199  * Add VLAN item to matcher and to the value.
8200  *
8201  * @param[in, out] dev_flow
8202  *   Flow descriptor.
8203  * @param[in, out] matcher
8204  *   Flow matcher.
8205  * @param[in, out] key
8206  *   Flow matcher value.
8207  * @param[in] item
8208  *   Flow pattern to translate.
8209  * @param[in] inner
8210  *   Item is inner pattern.
8211  */
8212 static void
8213 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
8214                             void *matcher, void *key,
8215                             const struct rte_flow_item *item,
8216                             int inner, uint32_t group)
8217 {
8218         const struct rte_flow_item_vlan *vlan_m = item->mask;
8219         const struct rte_flow_item_vlan *vlan_v = item->spec;
8220         void *hdrs_m;
8221         void *hdrs_v;
8222         uint16_t tci_m;
8223         uint16_t tci_v;
8224
8225         if (inner) {
8226                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8227                                          inner_headers);
8228                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8229         } else {
8230                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8231                                          outer_headers);
8232                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8233                 /*
8234                  * This is workaround, masks are not supported,
8235                  * and pre-validated.
8236                  */
8237                 if (vlan_v)
8238                         dev_flow->handle->vf_vlan.tag =
8239                                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
8240         }
8241         /*
8242          * When VLAN item exists in flow, mark packet as tagged,
8243          * even if TCI is not specified.
8244          */
8245         if (!MLX5_GET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag)) {
8246                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8247                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8248         }
8249         if (!vlan_v)
8250                 return;
8251         if (!vlan_m)
8252                 vlan_m = &rte_flow_item_vlan_mask;
8253         tci_m = rte_be_to_cpu_16(vlan_m->tci);
8254         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
8255         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_vid, tci_m);
8256         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_vid, tci_v);
8257         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_cfi, tci_m >> 12);
8258         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_cfi, tci_v >> 12);
8259         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_prio, tci_m >> 13);
8260         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_prio, tci_v >> 13);
8261         /*
8262          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8263          * ethertype, and use ip_version field instead.
8264          */
8265         if (vlan_m->inner_type == 0xFFFF) {
8266                 switch (vlan_v->inner_type) {
8267                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8268                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8269                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8270                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8271                         return;
8272                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8273                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8274                         return;
8275                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8276                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8277                         return;
8278                 default:
8279                         break;
8280                 }
8281         }
8282         if (vlan_m->has_more_vlan && vlan_v->has_more_vlan) {
8283                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8284                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8285                 /* Only one vlan_tag bit can be set. */
8286                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8287                 return;
8288         }
8289         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8290                  rte_be_to_cpu_16(vlan_m->inner_type));
8291         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, ethertype,
8292                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
8293 }
8294
8295 /**
8296  * Add IPV4 item to matcher and to the value.
8297  *
8298  * @param[in, out] matcher
8299  *   Flow matcher.
8300  * @param[in, out] key
8301  *   Flow matcher value.
8302  * @param[in] item
8303  *   Flow pattern to translate.
8304  * @param[in] inner
8305  *   Item is inner pattern.
8306  * @param[in] group
8307  *   The group to insert the rule.
8308  */
8309 static void
8310 flow_dv_translate_item_ipv4(void *matcher, void *key,
8311                             const struct rte_flow_item *item,
8312                             int inner, uint32_t group)
8313 {
8314         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
8315         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
8316         const struct rte_flow_item_ipv4 nic_mask = {
8317                 .hdr = {
8318                         .src_addr = RTE_BE32(0xffffffff),
8319                         .dst_addr = RTE_BE32(0xffffffff),
8320                         .type_of_service = 0xff,
8321                         .next_proto_id = 0xff,
8322                         .time_to_live = 0xff,
8323                 },
8324         };
8325         void *headers_m;
8326         void *headers_v;
8327         char *l24_m;
8328         char *l24_v;
8329         uint8_t tos, ihl_m, ihl_v;
8330
8331         if (inner) {
8332                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8333                                          inner_headers);
8334                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8335         } else {
8336                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8337                                          outer_headers);
8338                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8339         }
8340         flow_dv_set_match_ip_version(group, headers_v, headers_m, 4);
8341         if (!ipv4_v)
8342                 return;
8343         if (!ipv4_m)
8344                 ipv4_m = &nic_mask;
8345         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8346                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8347         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8348                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8349         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
8350         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
8351         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8352                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
8353         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8354                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
8355         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
8356         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
8357         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
8358         ihl_m = ipv4_m->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8359         ihl_v = ipv4_v->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8360         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_ihl, ihl_m);
8361         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_ihl, ihl_m & ihl_v);
8362         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
8363                  ipv4_m->hdr.type_of_service);
8364         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
8365         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
8366                  ipv4_m->hdr.type_of_service >> 2);
8367         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
8368         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8369                  ipv4_m->hdr.next_proto_id);
8370         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8371                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
8372         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8373                  ipv4_m->hdr.time_to_live);
8374         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8375                  ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
8376         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8377                  !!(ipv4_m->hdr.fragment_offset));
8378         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8379                  !!(ipv4_v->hdr.fragment_offset & ipv4_m->hdr.fragment_offset));
8380 }
8381
8382 /**
8383  * Add IPV6 item to matcher and to the value.
8384  *
8385  * @param[in, out] matcher
8386  *   Flow matcher.
8387  * @param[in, out] key
8388  *   Flow matcher value.
8389  * @param[in] item
8390  *   Flow pattern to translate.
8391  * @param[in] inner
8392  *   Item is inner pattern.
8393  * @param[in] group
8394  *   The group to insert the rule.
8395  */
8396 static void
8397 flow_dv_translate_item_ipv6(void *matcher, void *key,
8398                             const struct rte_flow_item *item,
8399                             int inner, uint32_t group)
8400 {
8401         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
8402         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
8403         const struct rte_flow_item_ipv6 nic_mask = {
8404                 .hdr = {
8405                         .src_addr =
8406                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
8407                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
8408                         .dst_addr =
8409                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
8410                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
8411                         .vtc_flow = RTE_BE32(0xffffffff),
8412                         .proto = 0xff,
8413                         .hop_limits = 0xff,
8414                 },
8415         };
8416         void *headers_m;
8417         void *headers_v;
8418         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8419         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8420         char *l24_m;
8421         char *l24_v;
8422         uint32_t vtc_m;
8423         uint32_t vtc_v;
8424         int i;
8425         int size;
8426
8427         if (inner) {
8428                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8429                                          inner_headers);
8430                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8431         } else {
8432                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8433                                          outer_headers);
8434                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8435         }
8436         flow_dv_set_match_ip_version(group, headers_v, headers_m, 6);
8437         if (!ipv6_v)
8438                 return;
8439         if (!ipv6_m)
8440                 ipv6_m = &nic_mask;
8441         size = sizeof(ipv6_m->hdr.dst_addr);
8442         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8443                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8444         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8445                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8446         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
8447         for (i = 0; i < size; ++i)
8448                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
8449         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8450                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
8451         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8452                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
8453         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
8454         for (i = 0; i < size; ++i)
8455                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
8456         /* TOS. */
8457         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
8458         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
8459         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
8460         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
8461         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
8462         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
8463         /* Label. */
8464         if (inner) {
8465                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
8466                          vtc_m);
8467                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
8468                          vtc_v);
8469         } else {
8470                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
8471                          vtc_m);
8472                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
8473                          vtc_v);
8474         }
8475         /* Protocol. */
8476         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8477                  ipv6_m->hdr.proto);
8478         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8479                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
8480         /* Hop limit. */
8481         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8482                  ipv6_m->hdr.hop_limits);
8483         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8484                  ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
8485         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8486                  !!(ipv6_m->has_frag_ext));
8487         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8488                  !!(ipv6_v->has_frag_ext & ipv6_m->has_frag_ext));
8489 }
8490
8491 /**
8492  * Add IPV6 fragment extension item to matcher and to the value.
8493  *
8494  * @param[in, out] matcher
8495  *   Flow matcher.
8496  * @param[in, out] key
8497  *   Flow matcher value.
8498  * @param[in] item
8499  *   Flow pattern to translate.
8500  * @param[in] inner
8501  *   Item is inner pattern.
8502  */
8503 static void
8504 flow_dv_translate_item_ipv6_frag_ext(void *matcher, void *key,
8505                                      const struct rte_flow_item *item,
8506                                      int inner)
8507 {
8508         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_m = item->mask;
8509         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_v = item->spec;
8510         const struct rte_flow_item_ipv6_frag_ext nic_mask = {
8511                 .hdr = {
8512                         .next_header = 0xff,
8513                         .frag_data = RTE_BE16(0xffff),
8514                 },
8515         };
8516         void *headers_m;
8517         void *headers_v;
8518
8519         if (inner) {
8520                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8521                                          inner_headers);
8522                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8523         } else {
8524                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8525                                          outer_headers);
8526                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8527         }
8528         /* IPv6 fragment extension item exists, so packet is IP fragment. */
8529         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
8530         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 1);
8531         if (!ipv6_frag_ext_v)
8532                 return;
8533         if (!ipv6_frag_ext_m)
8534                 ipv6_frag_ext_m = &nic_mask;
8535         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8536                  ipv6_frag_ext_m->hdr.next_header);
8537         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8538                  ipv6_frag_ext_v->hdr.next_header &
8539                  ipv6_frag_ext_m->hdr.next_header);
8540 }
8541
8542 /**
8543  * Add TCP item to matcher and to the value.
8544  *
8545  * @param[in, out] matcher
8546  *   Flow matcher.
8547  * @param[in, out] key
8548  *   Flow matcher value.
8549  * @param[in] item
8550  *   Flow pattern to translate.
8551  * @param[in] inner
8552  *   Item is inner pattern.
8553  */
8554 static void
8555 flow_dv_translate_item_tcp(void *matcher, void *key,
8556                            const struct rte_flow_item *item,
8557                            int inner)
8558 {
8559         const struct rte_flow_item_tcp *tcp_m = item->mask;
8560         const struct rte_flow_item_tcp *tcp_v = item->spec;
8561         void *headers_m;
8562         void *headers_v;
8563
8564         if (inner) {
8565                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8566                                          inner_headers);
8567                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8568         } else {
8569                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8570                                          outer_headers);
8571                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8572         }
8573         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8574         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
8575         if (!tcp_v)
8576                 return;
8577         if (!tcp_m)
8578                 tcp_m = &rte_flow_item_tcp_mask;
8579         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
8580                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
8581         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
8582                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
8583         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
8584                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
8585         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
8586                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
8587         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
8588                  tcp_m->hdr.tcp_flags);
8589         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
8590                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
8591 }
8592
8593 /**
8594  * Add UDP item to matcher and to the value.
8595  *
8596  * @param[in, out] matcher
8597  *   Flow matcher.
8598  * @param[in, out] key
8599  *   Flow matcher value.
8600  * @param[in] item
8601  *   Flow pattern to translate.
8602  * @param[in] inner
8603  *   Item is inner pattern.
8604  */
8605 static void
8606 flow_dv_translate_item_udp(void *matcher, void *key,
8607                            const struct rte_flow_item *item,
8608                            int inner)
8609 {
8610         const struct rte_flow_item_udp *udp_m = item->mask;
8611         const struct rte_flow_item_udp *udp_v = item->spec;
8612         void *headers_m;
8613         void *headers_v;
8614
8615         if (inner) {
8616                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8617                                          inner_headers);
8618                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8619         } else {
8620                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8621                                          outer_headers);
8622                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8623         }
8624         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8625         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
8626         if (!udp_v)
8627                 return;
8628         if (!udp_m)
8629                 udp_m = &rte_flow_item_udp_mask;
8630         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
8631                  rte_be_to_cpu_16(udp_m->hdr.src_port));
8632         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
8633                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
8634         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
8635                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
8636         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
8637                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
8638 }
8639
8640 /**
8641  * Add GRE optional Key item to matcher and to the value.
8642  *
8643  * @param[in, out] matcher
8644  *   Flow matcher.
8645  * @param[in, out] key
8646  *   Flow matcher value.
8647  * @param[in] item
8648  *   Flow pattern to translate.
8649  * @param[in] inner
8650  *   Item is inner pattern.
8651  */
8652 static void
8653 flow_dv_translate_item_gre_key(void *matcher, void *key,
8654                                    const struct rte_flow_item *item)
8655 {
8656         const rte_be32_t *key_m = item->mask;
8657         const rte_be32_t *key_v = item->spec;
8658         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8659         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8660         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
8661
8662         /* GRE K bit must be on and should already be validated */
8663         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
8664         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
8665         if (!key_v)
8666                 return;
8667         if (!key_m)
8668                 key_m = &gre_key_default_mask;
8669         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
8670                  rte_be_to_cpu_32(*key_m) >> 8);
8671         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
8672                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
8673         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
8674                  rte_be_to_cpu_32(*key_m) & 0xFF);
8675         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
8676                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
8677 }
8678
8679 /**
8680  * Add GRE item to matcher and to the value.
8681  *
8682  * @param[in, out] matcher
8683  *   Flow matcher.
8684  * @param[in, out] key
8685  *   Flow matcher value.
8686  * @param[in] item
8687  *   Flow pattern to translate.
8688  * @param[in] inner
8689  *   Item is inner pattern.
8690  */
8691 static void
8692 flow_dv_translate_item_gre(void *matcher, void *key,
8693                            const struct rte_flow_item *item,
8694                            int inner)
8695 {
8696         const struct rte_flow_item_gre *gre_m = item->mask;
8697         const struct rte_flow_item_gre *gre_v = item->spec;
8698         void *headers_m;
8699         void *headers_v;
8700         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8701         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8702         struct {
8703                 union {
8704                         __extension__
8705                         struct {
8706                                 uint16_t version:3;
8707                                 uint16_t rsvd0:9;
8708                                 uint16_t s_present:1;
8709                                 uint16_t k_present:1;
8710                                 uint16_t rsvd_bit1:1;
8711                                 uint16_t c_present:1;
8712                         };
8713                         uint16_t value;
8714                 };
8715         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
8716
8717         if (inner) {
8718                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8719                                          inner_headers);
8720                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8721         } else {
8722                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8723                                          outer_headers);
8724                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8725         }
8726         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8727         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
8728         if (!gre_v)
8729                 return;
8730         if (!gre_m)
8731                 gre_m = &rte_flow_item_gre_mask;
8732         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
8733                  rte_be_to_cpu_16(gre_m->protocol));
8734         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
8735                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
8736         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
8737         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
8738         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
8739                  gre_crks_rsvd0_ver_m.c_present);
8740         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
8741                  gre_crks_rsvd0_ver_v.c_present &
8742                  gre_crks_rsvd0_ver_m.c_present);
8743         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
8744                  gre_crks_rsvd0_ver_m.k_present);
8745         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
8746                  gre_crks_rsvd0_ver_v.k_present &
8747                  gre_crks_rsvd0_ver_m.k_present);
8748         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
8749                  gre_crks_rsvd0_ver_m.s_present);
8750         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
8751                  gre_crks_rsvd0_ver_v.s_present &
8752                  gre_crks_rsvd0_ver_m.s_present);
8753 }
8754
8755 /**
8756  * Add NVGRE item to matcher and to the value.
8757  *
8758  * @param[in, out] matcher
8759  *   Flow matcher.
8760  * @param[in, out] key
8761  *   Flow matcher value.
8762  * @param[in] item
8763  *   Flow pattern to translate.
8764  * @param[in] inner
8765  *   Item is inner pattern.
8766  */
8767 static void
8768 flow_dv_translate_item_nvgre(void *matcher, void *key,
8769                              const struct rte_flow_item *item,
8770                              int inner)
8771 {
8772         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
8773         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
8774         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8775         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8776         const char *tni_flow_id_m;
8777         const char *tni_flow_id_v;
8778         char *gre_key_m;
8779         char *gre_key_v;
8780         int size;
8781         int i;
8782
8783         /* For NVGRE, GRE header fields must be set with defined values. */
8784         const struct rte_flow_item_gre gre_spec = {
8785                 .c_rsvd0_ver = RTE_BE16(0x2000),
8786                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
8787         };
8788         const struct rte_flow_item_gre gre_mask = {
8789                 .c_rsvd0_ver = RTE_BE16(0xB000),
8790                 .protocol = RTE_BE16(UINT16_MAX),
8791         };
8792         const struct rte_flow_item gre_item = {
8793                 .spec = &gre_spec,
8794                 .mask = &gre_mask,
8795                 .last = NULL,
8796         };
8797         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
8798         if (!nvgre_v)
8799                 return;
8800         if (!nvgre_m)
8801                 nvgre_m = &rte_flow_item_nvgre_mask;
8802         tni_flow_id_m = (const char *)nvgre_m->tni;
8803         tni_flow_id_v = (const char *)nvgre_v->tni;
8804         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
8805         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
8806         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
8807         memcpy(gre_key_m, tni_flow_id_m, size);
8808         for (i = 0; i < size; ++i)
8809                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
8810 }
8811
8812 /**
8813  * Add VXLAN item to matcher and to the value.
8814  *
8815  * @param[in] dev
8816  *   Pointer to the Ethernet device structure.
8817  * @param[in] attr
8818  *   Flow rule attributes.
8819  * @param[in, out] matcher
8820  *   Flow matcher.
8821  * @param[in, out] key
8822  *   Flow matcher value.
8823  * @param[in] item
8824  *   Flow pattern to translate.
8825  * @param[in] inner
8826  *   Item is inner pattern.
8827  */
8828 static void
8829 flow_dv_translate_item_vxlan(struct rte_eth_dev *dev,
8830                              const struct rte_flow_attr *attr,
8831                              void *matcher, void *key,
8832                              const struct rte_flow_item *item,
8833                              int inner)
8834 {
8835         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
8836         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
8837         void *headers_m;
8838         void *headers_v;
8839         void *misc5_m;
8840         void *misc5_v;
8841         uint32_t *tunnel_header_v;
8842         uint32_t *tunnel_header_m;
8843         uint16_t dport;
8844         struct mlx5_priv *priv = dev->data->dev_private;
8845         const struct rte_flow_item_vxlan nic_mask = {
8846                 .vni = "\xff\xff\xff",
8847                 .rsvd1 = 0xff,
8848         };
8849
8850         if (inner) {
8851                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8852                                          inner_headers);
8853                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8854         } else {
8855                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8856                                          outer_headers);
8857                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8858         }
8859         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
8860                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
8861         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8862                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8863                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8864         }
8865         dport = MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport);
8866         if (!vxlan_v)
8867                 return;
8868         if (!vxlan_m) {
8869                 if ((!attr->group && !priv->sh->tunnel_header_0_1) ||
8870                     (attr->group && !priv->sh->misc5_cap))
8871                         vxlan_m = &rte_flow_item_vxlan_mask;
8872                 else
8873                         vxlan_m = &nic_mask;
8874         }
8875         if ((priv->sh->steering_format_version ==
8876             MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5 &&
8877             dport != MLX5_UDP_PORT_VXLAN) ||
8878             (!attr->group && !attr->transfer && !priv->sh->tunnel_header_0_1) ||
8879             ((attr->group || attr->transfer) && !priv->sh->misc5_cap)) {
8880                 void *misc_m;
8881                 void *misc_v;
8882                 char *vni_m;
8883                 char *vni_v;
8884                 int size;
8885                 int i;
8886                 misc_m = MLX5_ADDR_OF(fte_match_param,
8887                                       matcher, misc_parameters);
8888                 misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8889                 size = sizeof(vxlan_m->vni);
8890                 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
8891                 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
8892                 memcpy(vni_m, vxlan_m->vni, size);
8893                 for (i = 0; i < size; ++i)
8894                         vni_v[i] = vni_m[i] & vxlan_v->vni[i];
8895                 return;
8896         }
8897         misc5_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_5);
8898         misc5_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_5);
8899         tunnel_header_v = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8900                                                    misc5_v,
8901                                                    tunnel_header_1);
8902         tunnel_header_m = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8903                                                    misc5_m,
8904                                                    tunnel_header_1);
8905         *tunnel_header_v = (vxlan_v->vni[0] & vxlan_m->vni[0]) |
8906                            (vxlan_v->vni[1] & vxlan_m->vni[1]) << 8 |
8907                            (vxlan_v->vni[2] & vxlan_m->vni[2]) << 16;
8908         if (*tunnel_header_v)
8909                 *tunnel_header_m = vxlan_m->vni[0] |
8910                         vxlan_m->vni[1] << 8 |
8911                         vxlan_m->vni[2] << 16;
8912         else
8913                 *tunnel_header_m = 0x0;
8914         *tunnel_header_v |= (vxlan_v->rsvd1 & vxlan_m->rsvd1) << 24;
8915         if (vxlan_v->rsvd1 & vxlan_m->rsvd1)
8916                 *tunnel_header_m |= vxlan_m->rsvd1 << 24;
8917 }
8918
8919 /**
8920  * Add VXLAN-GPE item to matcher and to the value.
8921  *
8922  * @param[in, out] matcher
8923  *   Flow matcher.
8924  * @param[in, out] key
8925  *   Flow matcher value.
8926  * @param[in] item
8927  *   Flow pattern to translate.
8928  * @param[in] inner
8929  *   Item is inner pattern.
8930  */
8931
8932 static void
8933 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
8934                                  const struct rte_flow_item *item, int inner)
8935 {
8936         const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
8937         const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
8938         void *headers_m;
8939         void *headers_v;
8940         void *misc_m =
8941                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
8942         void *misc_v =
8943                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
8944         char *vni_m;
8945         char *vni_v;
8946         uint16_t dport;
8947         int size;
8948         int i;
8949         uint8_t flags_m = 0xff;
8950         uint8_t flags_v = 0xc;
8951
8952         if (inner) {
8953                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8954                                          inner_headers);
8955                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8956         } else {
8957                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8958                                          outer_headers);
8959                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8960         }
8961         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
8962                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
8963         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8964                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8965                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8966         }
8967         if (!vxlan_v)
8968                 return;
8969         if (!vxlan_m)
8970                 vxlan_m = &rte_flow_item_vxlan_gpe_mask;
8971         size = sizeof(vxlan_m->vni);
8972         vni_m = MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
8973         vni_v = MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
8974         memcpy(vni_m, vxlan_m->vni, size);
8975         for (i = 0; i < size; ++i)
8976                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
8977         if (vxlan_m->flags) {
8978                 flags_m = vxlan_m->flags;
8979                 flags_v = vxlan_v->flags;
8980         }
8981         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
8982         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
8983         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_next_protocol,
8984                  vxlan_m->protocol);
8985         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_next_protocol,
8986                  vxlan_v->protocol);
8987 }
8988
8989 /**
8990  * Add Geneve item to matcher and to the value.
8991  *
8992  * @param[in, out] matcher
8993  *   Flow matcher.
8994  * @param[in, out] key
8995  *   Flow matcher value.
8996  * @param[in] item
8997  *   Flow pattern to translate.
8998  * @param[in] inner
8999  *   Item is inner pattern.
9000  */
9001
9002 static void
9003 flow_dv_translate_item_geneve(void *matcher, void *key,
9004                               const struct rte_flow_item *item, int inner)
9005 {
9006         const struct rte_flow_item_geneve *geneve_m = item->mask;
9007         const struct rte_flow_item_geneve *geneve_v = item->spec;
9008         void *headers_m;
9009         void *headers_v;
9010         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9011         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9012         uint16_t dport;
9013         uint16_t gbhdr_m;
9014         uint16_t gbhdr_v;
9015         char *vni_m;
9016         char *vni_v;
9017         size_t size, i;
9018
9019         if (inner) {
9020                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9021                                          inner_headers);
9022                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9023         } else {
9024                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9025                                          outer_headers);
9026                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9027         }
9028         dport = MLX5_UDP_PORT_GENEVE;
9029         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9030                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9031                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9032         }
9033         if (!geneve_v)
9034                 return;
9035         if (!geneve_m)
9036                 geneve_m = &rte_flow_item_geneve_mask;
9037         size = sizeof(geneve_m->vni);
9038         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
9039         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
9040         memcpy(vni_m, geneve_m->vni, size);
9041         for (i = 0; i < size; ++i)
9042                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
9043         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
9044                  rte_be_to_cpu_16(geneve_m->protocol));
9045         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
9046                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
9047         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
9048         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
9049         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
9050                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9051         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
9052                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9053         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9054                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9055         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9056                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
9057                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9058 }
9059
9060 /**
9061  * Create Geneve TLV option resource.
9062  *
9063  * @param dev[in, out]
9064  *   Pointer to rte_eth_dev structure.
9065  * @param[in, out] tag_be24
9066  *   Tag value in big endian then R-shift 8.
9067  * @parm[in, out] dev_flow
9068  *   Pointer to the dev_flow.
9069  * @param[out] error
9070  *   pointer to error structure.
9071  *
9072  * @return
9073  *   0 on success otherwise -errno and errno is set.
9074  */
9075
9076 int
9077 flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev,
9078                                              const struct rte_flow_item *item,
9079                                              struct rte_flow_error *error)
9080 {
9081         struct mlx5_priv *priv = dev->data->dev_private;
9082         struct mlx5_dev_ctx_shared *sh = priv->sh;
9083         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
9084                         sh->geneve_tlv_option_resource;
9085         struct mlx5_devx_obj *obj;
9086         const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9087         int ret = 0;
9088
9089         if (!geneve_opt_v)
9090                 return -1;
9091         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
9092         if (geneve_opt_resource != NULL) {
9093                 if (geneve_opt_resource->option_class ==
9094                         geneve_opt_v->option_class &&
9095                         geneve_opt_resource->option_type ==
9096                         geneve_opt_v->option_type &&
9097                         geneve_opt_resource->length ==
9098                         geneve_opt_v->option_len) {
9099                         /* We already have GENVE TLV option obj allocated. */
9100                         __atomic_fetch_add(&geneve_opt_resource->refcnt, 1,
9101                                            __ATOMIC_RELAXED);
9102                 } else {
9103                         ret = rte_flow_error_set(error, ENOMEM,
9104                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9105                                 "Only one GENEVE TLV option supported");
9106                         goto exit;
9107                 }
9108         } else {
9109                 /* Create a GENEVE TLV object and resource. */
9110                 obj = mlx5_devx_cmd_create_geneve_tlv_option(sh->ctx,
9111                                 geneve_opt_v->option_class,
9112                                 geneve_opt_v->option_type,
9113                                 geneve_opt_v->option_len);
9114                 if (!obj) {
9115                         ret = rte_flow_error_set(error, ENODATA,
9116                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9117                                 "Failed to create GENEVE TLV Devx object");
9118                         goto exit;
9119                 }
9120                 sh->geneve_tlv_option_resource =
9121                                 mlx5_malloc(MLX5_MEM_ZERO,
9122                                                 sizeof(*geneve_opt_resource),
9123                                                 0, SOCKET_ID_ANY);
9124                 if (!sh->geneve_tlv_option_resource) {
9125                         claim_zero(mlx5_devx_cmd_destroy(obj));
9126                         ret = rte_flow_error_set(error, ENOMEM,
9127                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9128                                 "GENEVE TLV object memory allocation failed");
9129                         goto exit;
9130                 }
9131                 geneve_opt_resource = sh->geneve_tlv_option_resource;
9132                 geneve_opt_resource->obj = obj;
9133                 geneve_opt_resource->option_class = geneve_opt_v->option_class;
9134                 geneve_opt_resource->option_type = geneve_opt_v->option_type;
9135                 geneve_opt_resource->length = geneve_opt_v->option_len;
9136                 __atomic_store_n(&geneve_opt_resource->refcnt, 1,
9137                                 __ATOMIC_RELAXED);
9138         }
9139 exit:
9140         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
9141         return ret;
9142 }
9143
9144 /**
9145  * Add Geneve TLV option item to matcher.
9146  *
9147  * @param[in, out] dev
9148  *   Pointer to rte_eth_dev structure.
9149  * @param[in, out] matcher
9150  *   Flow matcher.
9151  * @param[in, out] key
9152  *   Flow matcher value.
9153  * @param[in] item
9154  *   Flow pattern to translate.
9155  * @param[out] error
9156  *   Pointer to error structure.
9157  */
9158 static int
9159 flow_dv_translate_item_geneve_opt(struct rte_eth_dev *dev, void *matcher,
9160                                   void *key, const struct rte_flow_item *item,
9161                                   struct rte_flow_error *error)
9162 {
9163         const struct rte_flow_item_geneve_opt *geneve_opt_m = item->mask;
9164         const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9165         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9166         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9167         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9168                         misc_parameters_3);
9169         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9170         rte_be32_t opt_data_key = 0, opt_data_mask = 0;
9171         int ret = 0;
9172
9173         if (!geneve_opt_v)
9174                 return -1;
9175         if (!geneve_opt_m)
9176                 geneve_opt_m = &rte_flow_item_geneve_opt_mask;
9177         ret = flow_dev_geneve_tlv_option_resource_register(dev, item,
9178                                                            error);
9179         if (ret) {
9180                 DRV_LOG(ERR, "Failed to create geneve_tlv_obj");
9181                 return ret;
9182         }
9183         /*
9184          * Set the option length in GENEVE header if not requested.
9185          * The GENEVE TLV option length is expressed by the option length field
9186          * in the GENEVE header.
9187          * If the option length was not requested but the GENEVE TLV option item
9188          * is present we set the option length field implicitly.
9189          */
9190         if (!MLX5_GET16(fte_match_set_misc, misc_m, geneve_opt_len)) {
9191                 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9192                          MLX5_GENEVE_OPTLEN_MASK);
9193                 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9194                          geneve_opt_v->option_len + 1);
9195         }
9196         MLX5_SET(fte_match_set_misc, misc_m, geneve_tlv_option_0_exist, 1);
9197         MLX5_SET(fte_match_set_misc, misc_v, geneve_tlv_option_0_exist, 1);
9198         /* Set the data. */
9199         if (geneve_opt_v->data) {
9200                 memcpy(&opt_data_key, geneve_opt_v->data,
9201                         RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9202                                 sizeof(opt_data_key)));
9203                 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9204                                 sizeof(opt_data_key));
9205                 memcpy(&opt_data_mask, geneve_opt_m->data,
9206                         RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9207                                 sizeof(opt_data_mask)));
9208                 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9209                                 sizeof(opt_data_mask));
9210                 MLX5_SET(fte_match_set_misc3, misc3_m,
9211                                 geneve_tlv_option_0_data,
9212                                 rte_be_to_cpu_32(opt_data_mask));
9213                 MLX5_SET(fte_match_set_misc3, misc3_v,
9214                                 geneve_tlv_option_0_data,
9215                         rte_be_to_cpu_32(opt_data_key & opt_data_mask));
9216         }
9217         return ret;
9218 }
9219
9220 /**
9221  * Add MPLS item to matcher and to the value.
9222  *
9223  * @param[in, out] matcher
9224  *   Flow matcher.
9225  * @param[in, out] key
9226  *   Flow matcher value.
9227  * @param[in] item
9228  *   Flow pattern to translate.
9229  * @param[in] prev_layer
9230  *   The protocol layer indicated in previous item.
9231  * @param[in] inner
9232  *   Item is inner pattern.
9233  */
9234 static void
9235 flow_dv_translate_item_mpls(void *matcher, void *key,
9236                             const struct rte_flow_item *item,
9237                             uint64_t prev_layer,
9238                             int inner)
9239 {
9240         const uint32_t *in_mpls_m = item->mask;
9241         const uint32_t *in_mpls_v = item->spec;
9242         uint32_t *out_mpls_m = 0;
9243         uint32_t *out_mpls_v = 0;
9244         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9245         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9246         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
9247                                      misc_parameters_2);
9248         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9249         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9250         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9251
9252         switch (prev_layer) {
9253         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9254                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
9255                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9256                          MLX5_UDP_PORT_MPLS);
9257                 break;
9258         case MLX5_FLOW_LAYER_GRE:
9259                 /* Fall-through. */
9260         case MLX5_FLOW_LAYER_GRE_KEY:
9261                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
9262                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
9263                          RTE_ETHER_TYPE_MPLS);
9264                 break;
9265         default:
9266                 break;
9267         }
9268         if (!in_mpls_v)
9269                 return;
9270         if (!in_mpls_m)
9271                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
9272         switch (prev_layer) {
9273         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9274                 out_mpls_m =
9275                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9276                                                  outer_first_mpls_over_udp);
9277                 out_mpls_v =
9278                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9279                                                  outer_first_mpls_over_udp);
9280                 break;
9281         case MLX5_FLOW_LAYER_GRE:
9282                 out_mpls_m =
9283                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9284                                                  outer_first_mpls_over_gre);
9285                 out_mpls_v =
9286                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9287                                                  outer_first_mpls_over_gre);
9288                 break;
9289         default:
9290                 /* Inner MPLS not over GRE is not supported. */
9291                 if (!inner) {
9292                         out_mpls_m =
9293                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9294                                                          misc2_m,
9295                                                          outer_first_mpls);
9296                         out_mpls_v =
9297                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9298                                                          misc2_v,
9299                                                          outer_first_mpls);
9300                 }
9301                 break;
9302         }
9303         if (out_mpls_m && out_mpls_v) {
9304                 *out_mpls_m = *in_mpls_m;
9305                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
9306         }
9307 }
9308
9309 /**
9310  * Add metadata register item to matcher
9311  *
9312  * @param[in, out] matcher
9313  *   Flow matcher.
9314  * @param[in, out] key
9315  *   Flow matcher value.
9316  * @param[in] reg_type
9317  *   Type of device metadata register
9318  * @param[in] value
9319  *   Register value
9320  * @param[in] mask
9321  *   Register mask
9322  */
9323 static void
9324 flow_dv_match_meta_reg(void *matcher, void *key,
9325                        enum modify_reg reg_type,
9326                        uint32_t data, uint32_t mask)
9327 {
9328         void *misc2_m =
9329                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
9330         void *misc2_v =
9331                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9332         uint32_t temp;
9333
9334         data &= mask;
9335         switch (reg_type) {
9336         case REG_A:
9337                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
9338                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
9339                 break;
9340         case REG_B:
9341                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
9342                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
9343                 break;
9344         case REG_C_0:
9345                 /*
9346                  * The metadata register C0 field might be divided into
9347                  * source vport index and META item value, we should set
9348                  * this field according to specified mask, not as whole one.
9349                  */
9350                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
9351                 temp |= mask;
9352                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
9353                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
9354                 temp &= ~mask;
9355                 temp |= data;
9356                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
9357                 break;
9358         case REG_C_1:
9359                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
9360                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
9361                 break;
9362         case REG_C_2:
9363                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
9364                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
9365                 break;
9366         case REG_C_3:
9367                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
9368                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
9369                 break;
9370         case REG_C_4:
9371                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
9372                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
9373                 break;
9374         case REG_C_5:
9375                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
9376                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
9377                 break;
9378         case REG_C_6:
9379                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
9380                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
9381                 break;
9382         case REG_C_7:
9383                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
9384                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
9385                 break;
9386         default:
9387                 MLX5_ASSERT(false);
9388                 break;
9389         }
9390 }
9391
9392 /**
9393  * Add MARK item to matcher
9394  *
9395  * @param[in] dev
9396  *   The device to configure through.
9397  * @param[in, out] matcher
9398  *   Flow matcher.
9399  * @param[in, out] key
9400  *   Flow matcher value.
9401  * @param[in] item
9402  *   Flow pattern to translate.
9403  */
9404 static void
9405 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
9406                             void *matcher, void *key,
9407                             const struct rte_flow_item *item)
9408 {
9409         struct mlx5_priv *priv = dev->data->dev_private;
9410         const struct rte_flow_item_mark *mark;
9411         uint32_t value;
9412         uint32_t mask;
9413
9414         mark = item->mask ? (const void *)item->mask :
9415                             &rte_flow_item_mark_mask;
9416         mask = mark->id & priv->sh->dv_mark_mask;
9417         mark = (const void *)item->spec;
9418         MLX5_ASSERT(mark);
9419         value = mark->id & priv->sh->dv_mark_mask & mask;
9420         if (mask) {
9421                 enum modify_reg reg;
9422
9423                 /* Get the metadata register index for the mark. */
9424                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
9425                 MLX5_ASSERT(reg > 0);
9426                 if (reg == REG_C_0) {
9427                         struct mlx5_priv *priv = dev->data->dev_private;
9428                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9429                         uint32_t shl_c0 = rte_bsf32(msk_c0);
9430
9431                         mask &= msk_c0;
9432                         mask <<= shl_c0;
9433                         value <<= shl_c0;
9434                 }
9435                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9436         }
9437 }
9438
9439 /**
9440  * Add META item to matcher
9441  *
9442  * @param[in] dev
9443  *   The devich to configure through.
9444  * @param[in, out] matcher
9445  *   Flow matcher.
9446  * @param[in, out] key
9447  *   Flow matcher value.
9448  * @param[in] attr
9449  *   Attributes of flow that includes this item.
9450  * @param[in] item
9451  *   Flow pattern to translate.
9452  */
9453 static void
9454 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
9455                             void *matcher, void *key,
9456                             const struct rte_flow_attr *attr,
9457                             const struct rte_flow_item *item)
9458 {
9459         const struct rte_flow_item_meta *meta_m;
9460         const struct rte_flow_item_meta *meta_v;
9461
9462         meta_m = (const void *)item->mask;
9463         if (!meta_m)
9464                 meta_m = &rte_flow_item_meta_mask;
9465         meta_v = (const void *)item->spec;
9466         if (meta_v) {
9467                 int reg;
9468                 uint32_t value = meta_v->data;
9469                 uint32_t mask = meta_m->data;
9470
9471                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
9472                 if (reg < 0)
9473                         return;
9474                 MLX5_ASSERT(reg != REG_NON);
9475                 if (reg == REG_C_0) {
9476                         struct mlx5_priv *priv = dev->data->dev_private;
9477                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9478                         uint32_t shl_c0 = rte_bsf32(msk_c0);
9479
9480                         mask &= msk_c0;
9481                         mask <<= shl_c0;
9482                         value <<= shl_c0;
9483                 }
9484                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9485         }
9486 }
9487
9488 /**
9489  * Add vport metadata Reg C0 item to matcher
9490  *
9491  * @param[in, out] matcher
9492  *   Flow matcher.
9493  * @param[in, out] key
9494  *   Flow matcher value.
9495  * @param[in] reg
9496  *   Flow pattern to translate.
9497  */
9498 static void
9499 flow_dv_translate_item_meta_vport(void *matcher, void *key,
9500                                   uint32_t value, uint32_t mask)
9501 {
9502         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
9503 }
9504
9505 /**
9506  * Add tag item to matcher
9507  *
9508  * @param[in] dev
9509  *   The devich to configure through.
9510  * @param[in, out] matcher
9511  *   Flow matcher.
9512  * @param[in, out] key
9513  *   Flow matcher value.
9514  * @param[in] item
9515  *   Flow pattern to translate.
9516  */
9517 static void
9518 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
9519                                 void *matcher, void *key,
9520                                 const struct rte_flow_item *item)
9521 {
9522         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
9523         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
9524         uint32_t mask, value;
9525
9526         MLX5_ASSERT(tag_v);
9527         value = tag_v->data;
9528         mask = tag_m ? tag_m->data : UINT32_MAX;
9529         if (tag_v->id == REG_C_0) {
9530                 struct mlx5_priv *priv = dev->data->dev_private;
9531                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9532                 uint32_t shl_c0 = rte_bsf32(msk_c0);
9533
9534                 mask &= msk_c0;
9535                 mask <<= shl_c0;
9536                 value <<= shl_c0;
9537         }
9538         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
9539 }
9540
9541 /**
9542  * Add TAG item to matcher
9543  *
9544  * @param[in] dev
9545  *   The devich to configure through.
9546  * @param[in, out] matcher
9547  *   Flow matcher.
9548  * @param[in, out] key
9549  *   Flow matcher value.
9550  * @param[in] item
9551  *   Flow pattern to translate.
9552  */
9553 static void
9554 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
9555                            void *matcher, void *key,
9556                            const struct rte_flow_item *item)
9557 {
9558         const struct rte_flow_item_tag *tag_v = item->spec;
9559         const struct rte_flow_item_tag *tag_m = item->mask;
9560         enum modify_reg reg;
9561
9562         MLX5_ASSERT(tag_v);
9563         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
9564         /* Get the metadata register index for the tag. */
9565         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
9566         MLX5_ASSERT(reg > 0);
9567         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
9568 }
9569
9570 /**
9571  * Add source vport match to the specified matcher.
9572  *
9573  * @param[in, out] matcher
9574  *   Flow matcher.
9575  * @param[in, out] key
9576  *   Flow matcher value.
9577  * @param[in] port
9578  *   Source vport value to match
9579  * @param[in] mask
9580  *   Mask
9581  */
9582 static void
9583 flow_dv_translate_item_source_vport(void *matcher, void *key,
9584                                     int16_t port, uint16_t mask)
9585 {
9586         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9587         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9588
9589         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
9590         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
9591 }
9592
9593 /**
9594  * Translate port-id item to eswitch match on  port-id.
9595  *
9596  * @param[in] dev
9597  *   The devich to configure through.
9598  * @param[in, out] matcher
9599  *   Flow matcher.
9600  * @param[in, out] key
9601  *   Flow matcher value.
9602  * @param[in] item
9603  *   Flow pattern to translate.
9604  * @param[in]
9605  *   Flow attributes.
9606  *
9607  * @return
9608  *   0 on success, a negative errno value otherwise.
9609  */
9610 static int
9611 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
9612                                void *key, const struct rte_flow_item *item,
9613                                const struct rte_flow_attr *attr)
9614 {
9615         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
9616         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
9617         struct mlx5_priv *priv;
9618         uint16_t mask, id;
9619
9620         mask = pid_m ? pid_m->id : 0xffff;
9621         id = pid_v ? pid_v->id : dev->data->port_id;
9622         priv = mlx5_port_to_eswitch_info(id, item == NULL);
9623         if (!priv)
9624                 return -rte_errno;
9625         /*
9626          * Translate to vport field or to metadata, depending on mode.
9627          * Kernel can use either misc.source_port or half of C0 metadata
9628          * register.
9629          */
9630         if (priv->vport_meta_mask) {
9631                 /*
9632                  * Provide the hint for SW steering library
9633                  * to insert the flow into ingress domain and
9634                  * save the extra vport match.
9635                  */
9636                 if (mask == 0xffff && priv->vport_id == 0xffff &&
9637                     priv->pf_bond < 0 && attr->transfer)
9638                         flow_dv_translate_item_source_vport
9639                                 (matcher, key, priv->vport_id, mask);
9640                 /*
9641                  * We should always set the vport metadata register,
9642                  * otherwise the SW steering library can drop
9643                  * the rule if wire vport metadata value is not zero,
9644                  * it depends on kernel configuration.
9645                  */
9646                 flow_dv_translate_item_meta_vport(matcher, key,
9647                                                   priv->vport_meta_tag,
9648                                                   priv->vport_meta_mask);
9649         } else {
9650                 flow_dv_translate_item_source_vport(matcher, key,
9651                                                     priv->vport_id, mask);
9652         }
9653         return 0;
9654 }
9655
9656 /**
9657  * Add ICMP6 item to matcher and to the value.
9658  *
9659  * @param[in, out] matcher
9660  *   Flow matcher.
9661  * @param[in, out] key
9662  *   Flow matcher value.
9663  * @param[in] item
9664  *   Flow pattern to translate.
9665  * @param[in] inner
9666  *   Item is inner pattern.
9667  */
9668 static void
9669 flow_dv_translate_item_icmp6(void *matcher, void *key,
9670                               const struct rte_flow_item *item,
9671                               int inner)
9672 {
9673         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
9674         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
9675         void *headers_m;
9676         void *headers_v;
9677         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9678                                      misc_parameters_3);
9679         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9680         if (inner) {
9681                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9682                                          inner_headers);
9683                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9684         } else {
9685                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9686                                          outer_headers);
9687                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9688         }
9689         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9690         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
9691         if (!icmp6_v)
9692                 return;
9693         if (!icmp6_m)
9694                 icmp6_m = &rte_flow_item_icmp6_mask;
9695         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
9696         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
9697                  icmp6_v->type & icmp6_m->type);
9698         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
9699         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
9700                  icmp6_v->code & icmp6_m->code);
9701 }
9702
9703 /**
9704  * Add ICMP item to matcher and to the value.
9705  *
9706  * @param[in, out] matcher
9707  *   Flow matcher.
9708  * @param[in, out] key
9709  *   Flow matcher value.
9710  * @param[in] item
9711  *   Flow pattern to translate.
9712  * @param[in] inner
9713  *   Item is inner pattern.
9714  */
9715 static void
9716 flow_dv_translate_item_icmp(void *matcher, void *key,
9717                             const struct rte_flow_item *item,
9718                             int inner)
9719 {
9720         const struct rte_flow_item_icmp *icmp_m = item->mask;
9721         const struct rte_flow_item_icmp *icmp_v = item->spec;
9722         uint32_t icmp_header_data_m = 0;
9723         uint32_t icmp_header_data_v = 0;
9724         void *headers_m;
9725         void *headers_v;
9726         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9727                                      misc_parameters_3);
9728         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9729         if (inner) {
9730                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9731                                          inner_headers);
9732                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9733         } else {
9734                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9735                                          outer_headers);
9736                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9737         }
9738         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9739         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
9740         if (!icmp_v)
9741                 return;
9742         if (!icmp_m)
9743                 icmp_m = &rte_flow_item_icmp_mask;
9744         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
9745                  icmp_m->hdr.icmp_type);
9746         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
9747                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
9748         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
9749                  icmp_m->hdr.icmp_code);
9750         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
9751                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
9752         icmp_header_data_m = rte_be_to_cpu_16(icmp_m->hdr.icmp_seq_nb);
9753         icmp_header_data_m |= rte_be_to_cpu_16(icmp_m->hdr.icmp_ident) << 16;
9754         if (icmp_header_data_m) {
9755                 icmp_header_data_v = rte_be_to_cpu_16(icmp_v->hdr.icmp_seq_nb);
9756                 icmp_header_data_v |=
9757                          rte_be_to_cpu_16(icmp_v->hdr.icmp_ident) << 16;
9758                 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_header_data,
9759                          icmp_header_data_m);
9760                 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_header_data,
9761                          icmp_header_data_v & icmp_header_data_m);
9762         }
9763 }
9764
9765 /**
9766  * Add GTP item to matcher and to the value.
9767  *
9768  * @param[in, out] matcher
9769  *   Flow matcher.
9770  * @param[in, out] key
9771  *   Flow matcher value.
9772  * @param[in] item
9773  *   Flow pattern to translate.
9774  * @param[in] inner
9775  *   Item is inner pattern.
9776  */
9777 static void
9778 flow_dv_translate_item_gtp(void *matcher, void *key,
9779                            const struct rte_flow_item *item, int inner)
9780 {
9781         const struct rte_flow_item_gtp *gtp_m = item->mask;
9782         const struct rte_flow_item_gtp *gtp_v = item->spec;
9783         void *headers_m;
9784         void *headers_v;
9785         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9786                                      misc_parameters_3);
9787         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9788         uint16_t dport = RTE_GTPU_UDP_PORT;
9789
9790         if (inner) {
9791                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9792                                          inner_headers);
9793                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9794         } else {
9795                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9796                                          outer_headers);
9797                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9798         }
9799         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9800                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9801                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9802         }
9803         if (!gtp_v)
9804                 return;
9805         if (!gtp_m)
9806                 gtp_m = &rte_flow_item_gtp_mask;
9807         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags,
9808                  gtp_m->v_pt_rsv_flags);
9809         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags,
9810                  gtp_v->v_pt_rsv_flags & gtp_m->v_pt_rsv_flags);
9811         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
9812         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
9813                  gtp_v->msg_type & gtp_m->msg_type);
9814         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
9815                  rte_be_to_cpu_32(gtp_m->teid));
9816         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
9817                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
9818 }
9819
9820 /**
9821  * Add GTP PSC item to matcher.
9822  *
9823  * @param[in, out] matcher
9824  *   Flow matcher.
9825  * @param[in, out] key
9826  *   Flow matcher value.
9827  * @param[in] item
9828  *   Flow pattern to translate.
9829  */
9830 static int
9831 flow_dv_translate_item_gtp_psc(void *matcher, void *key,
9832                                const struct rte_flow_item *item)
9833 {
9834         const struct rte_flow_item_gtp_psc *gtp_psc_m = item->mask;
9835         const struct rte_flow_item_gtp_psc *gtp_psc_v = item->spec;
9836         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9837                         misc_parameters_3);
9838         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9839         union {
9840                 uint32_t w32;
9841                 struct {
9842                         uint16_t seq_num;
9843                         uint8_t npdu_num;
9844                         uint8_t next_ext_header_type;
9845                 };
9846         } dw_2;
9847         uint8_t gtp_flags;
9848
9849         /* Always set E-flag match on one, regardless of GTP item settings. */
9850         gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_m, gtpu_msg_flags);
9851         gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9852         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags, gtp_flags);
9853         gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_v, gtpu_msg_flags);
9854         gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9855         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags, gtp_flags);
9856         /*Set next extension header type. */
9857         dw_2.seq_num = 0;
9858         dw_2.npdu_num = 0;
9859         dw_2.next_ext_header_type = 0xff;
9860         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_dw_2,
9861                  rte_cpu_to_be_32(dw_2.w32));
9862         dw_2.seq_num = 0;
9863         dw_2.npdu_num = 0;
9864         dw_2.next_ext_header_type = 0x85;
9865         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_dw_2,
9866                  rte_cpu_to_be_32(dw_2.w32));
9867         if (gtp_psc_v) {
9868                 union {
9869                         uint32_t w32;
9870                         struct {
9871                                 uint8_t len;
9872                                 uint8_t type_flags;
9873                                 uint8_t qfi;
9874                                 uint8_t reserved;
9875                         };
9876                 } dw_0;
9877
9878                 /*Set extension header PDU type and Qos. */
9879                 if (!gtp_psc_m)
9880                         gtp_psc_m = &rte_flow_item_gtp_psc_mask;
9881                 dw_0.w32 = 0;
9882                 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_m->hdr.type);
9883                 dw_0.qfi = gtp_psc_m->hdr.qfi;
9884                 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_first_ext_dw_0,
9885                          rte_cpu_to_be_32(dw_0.w32));
9886                 dw_0.w32 = 0;
9887                 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_v->hdr.type &
9888                                                         gtp_psc_m->hdr.type);
9889                 dw_0.qfi = gtp_psc_v->hdr.qfi & gtp_psc_m->hdr.qfi;
9890                 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_first_ext_dw_0,
9891                          rte_cpu_to_be_32(dw_0.w32));
9892         }
9893         return 0;
9894 }
9895
9896 /**
9897  * Add eCPRI item to matcher and to the value.
9898  *
9899  * @param[in] dev
9900  *   The devich to configure through.
9901  * @param[in, out] matcher
9902  *   Flow matcher.
9903  * @param[in, out] key
9904  *   Flow matcher value.
9905  * @param[in] item
9906  *   Flow pattern to translate.
9907  * @param[in] last_item
9908  *   Last item flags.
9909  */
9910 static void
9911 flow_dv_translate_item_ecpri(struct rte_eth_dev *dev, void *matcher,
9912                              void *key, const struct rte_flow_item *item,
9913                              uint64_t last_item)
9914 {
9915         struct mlx5_priv *priv = dev->data->dev_private;
9916         const struct rte_flow_item_ecpri *ecpri_m = item->mask;
9917         const struct rte_flow_item_ecpri *ecpri_v = item->spec;
9918         struct rte_ecpri_common_hdr common;
9919         void *misc4_m = MLX5_ADDR_OF(fte_match_param, matcher,
9920                                      misc_parameters_4);
9921         void *misc4_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_4);
9922         uint32_t *samples;
9923         void *dw_m;
9924         void *dw_v;
9925
9926         /*
9927          * In case of eCPRI over Ethernet, if EtherType is not specified,
9928          * match on eCPRI EtherType implicitly.
9929          */
9930         if (last_item & MLX5_FLOW_LAYER_OUTER_L2) {
9931                 void *hdrs_m, *hdrs_v, *l2m, *l2v;
9932
9933                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9934                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9935                 l2m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, ethertype);
9936                 l2v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
9937                 if (*(uint16_t *)l2m == 0 && *(uint16_t *)l2v == 0) {
9938                         *(uint16_t *)l2m = UINT16_MAX;
9939                         *(uint16_t *)l2v = RTE_BE16(RTE_ETHER_TYPE_ECPRI);
9940                 }
9941         }
9942         if (!ecpri_v)
9943                 return;
9944         if (!ecpri_m)
9945                 ecpri_m = &rte_flow_item_ecpri_mask;
9946         /*
9947          * Maximal four DW samples are supported in a single matching now.
9948          * Two are used now for a eCPRI matching:
9949          * 1. Type: one byte, mask should be 0x00ff0000 in network order
9950          * 2. ID of a message: one or two bytes, mask 0xffff0000 or 0xff000000
9951          *    if any.
9952          */
9953         if (!ecpri_m->hdr.common.u32)
9954                 return;
9955         samples = priv->sh->fp[MLX5_FLEX_PARSER_ECPRI_0].ids;
9956         /* Need to take the whole DW as the mask to fill the entry. */
9957         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
9958                             prog_sample_field_value_0);
9959         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
9960                             prog_sample_field_value_0);
9961         /* Already big endian (network order) in the header. */
9962         *(uint32_t *)dw_m = ecpri_m->hdr.common.u32;
9963         *(uint32_t *)dw_v = ecpri_v->hdr.common.u32 & ecpri_m->hdr.common.u32;
9964         /* Sample#0, used for matching type, offset 0. */
9965         MLX5_SET(fte_match_set_misc4, misc4_m,
9966                  prog_sample_field_id_0, samples[0]);
9967         /* It makes no sense to set the sample ID in the mask field. */
9968         MLX5_SET(fte_match_set_misc4, misc4_v,
9969                  prog_sample_field_id_0, samples[0]);
9970         /*
9971          * Checking if message body part needs to be matched.
9972          * Some wildcard rules only matching type field should be supported.
9973          */
9974         if (ecpri_m->hdr.dummy[0]) {
9975                 common.u32 = rte_be_to_cpu_32(ecpri_v->hdr.common.u32);
9976                 switch (common.type) {
9977                 case RTE_ECPRI_MSG_TYPE_IQ_DATA:
9978                 case RTE_ECPRI_MSG_TYPE_RTC_CTRL:
9979                 case RTE_ECPRI_MSG_TYPE_DLY_MSR:
9980                         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
9981                                             prog_sample_field_value_1);
9982                         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
9983                                             prog_sample_field_value_1);
9984                         *(uint32_t *)dw_m = ecpri_m->hdr.dummy[0];
9985                         *(uint32_t *)dw_v = ecpri_v->hdr.dummy[0] &
9986                                             ecpri_m->hdr.dummy[0];
9987                         /* Sample#1, to match message body, offset 4. */
9988                         MLX5_SET(fte_match_set_misc4, misc4_m,
9989                                  prog_sample_field_id_1, samples[1]);
9990                         MLX5_SET(fte_match_set_misc4, misc4_v,
9991                                  prog_sample_field_id_1, samples[1]);
9992                         break;
9993                 default:
9994                         /* Others, do not match any sample ID. */
9995                         break;
9996                 }
9997         }
9998 }
9999
10000 /*
10001  * Add connection tracking status item to matcher
10002  *
10003  * @param[in] dev
10004  *   The devich to configure through.
10005  * @param[in, out] matcher
10006  *   Flow matcher.
10007  * @param[in, out] key
10008  *   Flow matcher value.
10009  * @param[in] item
10010  *   Flow pattern to translate.
10011  */
10012 static void
10013 flow_dv_translate_item_aso_ct(struct rte_eth_dev *dev,
10014                               void *matcher, void *key,
10015                               const struct rte_flow_item *item)
10016 {
10017         uint32_t reg_value = 0;
10018         int reg_id;
10019         /* 8LSB 0b 11/0000/11, middle 4 bits are reserved. */
10020         uint32_t reg_mask = 0;
10021         const struct rte_flow_item_conntrack *spec = item->spec;
10022         const struct rte_flow_item_conntrack *mask = item->mask;
10023         uint32_t flags;
10024         struct rte_flow_error error;
10025
10026         if (!mask)
10027                 mask = &rte_flow_item_conntrack_mask;
10028         if (!spec || !mask->flags)
10029                 return;
10030         flags = spec->flags & mask->flags;
10031         /* The conflict should be checked in the validation. */
10032         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID)
10033                 reg_value |= MLX5_CT_SYNDROME_VALID;
10034         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10035                 reg_value |= MLX5_CT_SYNDROME_STATE_CHANGE;
10036         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID)
10037                 reg_value |= MLX5_CT_SYNDROME_INVALID;
10038         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)
10039                 reg_value |= MLX5_CT_SYNDROME_TRAP;
10040         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10041                 reg_value |= MLX5_CT_SYNDROME_BAD_PACKET;
10042         if (mask->flags & (RTE_FLOW_CONNTRACK_PKT_STATE_VALID |
10043                            RTE_FLOW_CONNTRACK_PKT_STATE_INVALID |
10044                            RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED))
10045                 reg_mask |= 0xc0;
10046         if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10047                 reg_mask |= MLX5_CT_SYNDROME_STATE_CHANGE;
10048         if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10049                 reg_mask |= MLX5_CT_SYNDROME_BAD_PACKET;
10050         /* The REG_C_x value could be saved during startup. */
10051         reg_id = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, &error);
10052         if (reg_id == REG_NON)
10053                 return;
10054         flow_dv_match_meta_reg(matcher, key, (enum modify_reg)reg_id,
10055                                reg_value, reg_mask);
10056 }
10057
10058 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
10059
10060 #define HEADER_IS_ZERO(match_criteria, headers)                              \
10061         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
10062                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
10063
10064 /**
10065  * Calculate flow matcher enable bitmap.
10066  *
10067  * @param match_criteria
10068  *   Pointer to flow matcher criteria.
10069  *
10070  * @return
10071  *   Bitmap of enabled fields.
10072  */
10073 static uint8_t
10074 flow_dv_matcher_enable(uint32_t *match_criteria)
10075 {
10076         uint8_t match_criteria_enable;
10077
10078         match_criteria_enable =
10079                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
10080                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
10081         match_criteria_enable |=
10082                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
10083                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
10084         match_criteria_enable |=
10085                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
10086                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
10087         match_criteria_enable |=
10088                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
10089                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
10090         match_criteria_enable |=
10091                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
10092                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
10093         match_criteria_enable |=
10094                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_4)) <<
10095                 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT;
10096         match_criteria_enable |=
10097                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_5)) <<
10098                 MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT;
10099         return match_criteria_enable;
10100 }
10101
10102 static void
10103 __flow_dv_adjust_buf_size(size_t *size, uint8_t match_criteria)
10104 {
10105         /*
10106          * Check flow matching criteria first, subtract misc5/4 length if flow
10107          * doesn't own misc5/4 parameters. In some old rdma-core releases,
10108          * misc5/4 are not supported, and matcher creation failure is expected
10109          * w/o subtration. If misc5 is provided, misc4 must be counted in since
10110          * misc5 is right after misc4.
10111          */
10112         if (!(match_criteria & (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT))) {
10113                 *size = MLX5_ST_SZ_BYTES(fte_match_param) -
10114                         MLX5_ST_SZ_BYTES(fte_match_set_misc5);
10115                 if (!(match_criteria & (1 <<
10116                         MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT))) {
10117                         *size -= MLX5_ST_SZ_BYTES(fte_match_set_misc4);
10118                 }
10119         }
10120 }
10121
10122 static struct mlx5_list_entry *
10123 flow_dv_matcher_clone_cb(void *tool_ctx __rte_unused,
10124                          struct mlx5_list_entry *entry, void *cb_ctx)
10125 {
10126         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10127         struct mlx5_flow_dv_matcher *ref = ctx->data;
10128         struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10129                                                             typeof(*tbl), tbl);
10130         struct mlx5_flow_dv_matcher *resource = mlx5_malloc(MLX5_MEM_ANY,
10131                                                             sizeof(*resource),
10132                                                             0, SOCKET_ID_ANY);
10133
10134         if (!resource) {
10135                 rte_flow_error_set(ctx->error, ENOMEM,
10136                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10137                                    "cannot create matcher");
10138                 return NULL;
10139         }
10140         memcpy(resource, entry, sizeof(*resource));
10141         resource->tbl = &tbl->tbl;
10142         return &resource->entry;
10143 }
10144
10145 static void
10146 flow_dv_matcher_clone_free_cb(void *tool_ctx __rte_unused,
10147                              struct mlx5_list_entry *entry)
10148 {
10149         mlx5_free(entry);
10150 }
10151
10152 struct mlx5_list_entry *
10153 flow_dv_tbl_create_cb(void *tool_ctx, void *cb_ctx)
10154 {
10155         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10156         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10157         struct rte_eth_dev *dev = ctx->dev;
10158         struct mlx5_flow_tbl_data_entry *tbl_data;
10159         struct mlx5_flow_tbl_tunnel_prm *tt_prm = ctx->data2;
10160         struct rte_flow_error *error = ctx->error;
10161         union mlx5_flow_tbl_key key = { .v64 = *(uint64_t *)(ctx->data) };
10162         struct mlx5_flow_tbl_resource *tbl;
10163         void *domain;
10164         uint32_t idx = 0;
10165         int ret;
10166
10167         tbl_data = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10168         if (!tbl_data) {
10169                 rte_flow_error_set(error, ENOMEM,
10170                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10171                                    NULL,
10172                                    "cannot allocate flow table data entry");
10173                 return NULL;
10174         }
10175         tbl_data->idx = idx;
10176         tbl_data->tunnel = tt_prm->tunnel;
10177         tbl_data->group_id = tt_prm->group_id;
10178         tbl_data->external = !!tt_prm->external;
10179         tbl_data->tunnel_offload = is_tunnel_offload_active(dev);
10180         tbl_data->is_egress = !!key.is_egress;
10181         tbl_data->is_transfer = !!key.is_fdb;
10182         tbl_data->dummy = !!key.dummy;
10183         tbl_data->level = key.level;
10184         tbl_data->id = key.id;
10185         tbl = &tbl_data->tbl;
10186         if (key.dummy)
10187                 return &tbl_data->entry;
10188         if (key.is_fdb)
10189                 domain = sh->fdb_domain;
10190         else if (key.is_egress)
10191                 domain = sh->tx_domain;
10192         else
10193                 domain = sh->rx_domain;
10194         ret = mlx5_flow_os_create_flow_tbl(domain, key.level, &tbl->obj);
10195         if (ret) {
10196                 rte_flow_error_set(error, ENOMEM,
10197                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10198                                    NULL, "cannot create flow table object");
10199                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10200                 return NULL;
10201         }
10202         if (key.level != 0) {
10203                 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
10204                                         (tbl->obj, &tbl_data->jump.action);
10205                 if (ret) {
10206                         rte_flow_error_set(error, ENOMEM,
10207                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10208                                            NULL,
10209                                            "cannot create flow jump action");
10210                         mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10211                         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10212                         return NULL;
10213                 }
10214         }
10215         MKSTR(matcher_name, "%s_%s_%u_%u_matcher_list",
10216               key.is_fdb ? "FDB" : "NIC", key.is_egress ? "egress" : "ingress",
10217               key.level, key.id);
10218         tbl_data->matchers = mlx5_list_create(matcher_name, sh, true,
10219                                               flow_dv_matcher_create_cb,
10220                                               flow_dv_matcher_match_cb,
10221                                               flow_dv_matcher_remove_cb,
10222                                               flow_dv_matcher_clone_cb,
10223                                               flow_dv_matcher_clone_free_cb);
10224         if (!tbl_data->matchers) {
10225                 rte_flow_error_set(error, ENOMEM,
10226                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10227                                    NULL,
10228                                    "cannot create tbl matcher list");
10229                 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10230                 mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10231                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10232                 return NULL;
10233         }
10234         return &tbl_data->entry;
10235 }
10236
10237 int
10238 flow_dv_tbl_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10239                      void *cb_ctx)
10240 {
10241         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10242         struct mlx5_flow_tbl_data_entry *tbl_data =
10243                 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10244         union mlx5_flow_tbl_key key = { .v64 =  *(uint64_t *)(ctx->data) };
10245
10246         return tbl_data->level != key.level ||
10247                tbl_data->id != key.id ||
10248                tbl_data->dummy != key.dummy ||
10249                tbl_data->is_transfer != !!key.is_fdb ||
10250                tbl_data->is_egress != !!key.is_egress;
10251 }
10252
10253 struct mlx5_list_entry *
10254 flow_dv_tbl_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10255                       void *cb_ctx)
10256 {
10257         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10258         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10259         struct mlx5_flow_tbl_data_entry *tbl_data;
10260         struct rte_flow_error *error = ctx->error;
10261         uint32_t idx = 0;
10262
10263         tbl_data = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10264         if (!tbl_data) {
10265                 rte_flow_error_set(error, ENOMEM,
10266                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10267                                    NULL,
10268                                    "cannot allocate flow table data entry");
10269                 return NULL;
10270         }
10271         memcpy(tbl_data, oentry, sizeof(*tbl_data));
10272         tbl_data->idx = idx;
10273         return &tbl_data->entry;
10274 }
10275
10276 void
10277 flow_dv_tbl_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10278 {
10279         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10280         struct mlx5_flow_tbl_data_entry *tbl_data =
10281                     container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10282
10283         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10284 }
10285
10286 /**
10287  * Get a flow table.
10288  *
10289  * @param[in, out] dev
10290  *   Pointer to rte_eth_dev structure.
10291  * @param[in] table_level
10292  *   Table level to use.
10293  * @param[in] egress
10294  *   Direction of the table.
10295  * @param[in] transfer
10296  *   E-Switch or NIC flow.
10297  * @param[in] dummy
10298  *   Dummy entry for dv API.
10299  * @param[in] table_id
10300  *   Table id to use.
10301  * @param[out] error
10302  *   pointer to error structure.
10303  *
10304  * @return
10305  *   Returns tables resource based on the index, NULL in case of failed.
10306  */
10307 struct mlx5_flow_tbl_resource *
10308 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
10309                          uint32_t table_level, uint8_t egress,
10310                          uint8_t transfer,
10311                          bool external,
10312                          const struct mlx5_flow_tunnel *tunnel,
10313                          uint32_t group_id, uint8_t dummy,
10314                          uint32_t table_id,
10315                          struct rte_flow_error *error)
10316 {
10317         struct mlx5_priv *priv = dev->data->dev_private;
10318         union mlx5_flow_tbl_key table_key = {
10319                 {
10320                         .level = table_level,
10321                         .id = table_id,
10322                         .reserved = 0,
10323                         .dummy = !!dummy,
10324                         .is_fdb = !!transfer,
10325                         .is_egress = !!egress,
10326                 }
10327         };
10328         struct mlx5_flow_tbl_tunnel_prm tt_prm = {
10329                 .tunnel = tunnel,
10330                 .group_id = group_id,
10331                 .external = external,
10332         };
10333         struct mlx5_flow_cb_ctx ctx = {
10334                 .dev = dev,
10335                 .error = error,
10336                 .data = &table_key.v64,
10337                 .data2 = &tt_prm,
10338         };
10339         struct mlx5_list_entry *entry;
10340         struct mlx5_flow_tbl_data_entry *tbl_data;
10341
10342         entry = mlx5_hlist_register(priv->sh->flow_tbls, table_key.v64, &ctx);
10343         if (!entry) {
10344                 rte_flow_error_set(error, ENOMEM,
10345                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10346                                    "cannot get table");
10347                 return NULL;
10348         }
10349         DRV_LOG(DEBUG, "table_level %u table_id %u "
10350                 "tunnel %u group %u registered.",
10351                 table_level, table_id,
10352                 tunnel ? tunnel->tunnel_id : 0, group_id);
10353         tbl_data = container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10354         return &tbl_data->tbl;
10355 }
10356
10357 void
10358 flow_dv_tbl_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10359 {
10360         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10361         struct mlx5_flow_tbl_data_entry *tbl_data =
10362                     container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10363
10364         MLX5_ASSERT(entry && sh);
10365         if (tbl_data->jump.action)
10366                 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10367         if (tbl_data->tbl.obj)
10368                 mlx5_flow_os_destroy_flow_tbl(tbl_data->tbl.obj);
10369         if (tbl_data->tunnel_offload && tbl_data->external) {
10370                 struct mlx5_list_entry *he;
10371                 struct mlx5_hlist *tunnel_grp_hash;
10372                 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
10373                 union tunnel_tbl_key tunnel_key = {
10374                         .tunnel_id = tbl_data->tunnel ?
10375                                         tbl_data->tunnel->tunnel_id : 0,
10376                         .group = tbl_data->group_id
10377                 };
10378                 uint32_t table_level = tbl_data->level;
10379                 struct mlx5_flow_cb_ctx ctx = {
10380                         .data = (void *)&tunnel_key.val,
10381                 };
10382
10383                 tunnel_grp_hash = tbl_data->tunnel ?
10384                                         tbl_data->tunnel->groups :
10385                                         thub->groups;
10386                 he = mlx5_hlist_lookup(tunnel_grp_hash, tunnel_key.val, &ctx);
10387                 if (he)
10388                         mlx5_hlist_unregister(tunnel_grp_hash, he);
10389                 DRV_LOG(DEBUG,
10390                         "table_level %u id %u tunnel %u group %u released.",
10391                         table_level,
10392                         tbl_data->id,
10393                         tbl_data->tunnel ?
10394                         tbl_data->tunnel->tunnel_id : 0,
10395                         tbl_data->group_id);
10396         }
10397         mlx5_list_destroy(tbl_data->matchers);
10398         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10399 }
10400
10401 /**
10402  * Release a flow table.
10403  *
10404  * @param[in] sh
10405  *   Pointer to device shared structure.
10406  * @param[in] tbl
10407  *   Table resource to be released.
10408  *
10409  * @return
10410  *   Returns 0 if table was released, else return 1;
10411  */
10412 static int
10413 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
10414                              struct mlx5_flow_tbl_resource *tbl)
10415 {
10416         struct mlx5_flow_tbl_data_entry *tbl_data =
10417                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10418
10419         if (!tbl)
10420                 return 0;
10421         return mlx5_hlist_unregister(sh->flow_tbls, &tbl_data->entry);
10422 }
10423
10424 int
10425 flow_dv_matcher_match_cb(void *tool_ctx __rte_unused,
10426                          struct mlx5_list_entry *entry, void *cb_ctx)
10427 {
10428         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10429         struct mlx5_flow_dv_matcher *ref = ctx->data;
10430         struct mlx5_flow_dv_matcher *cur = container_of(entry, typeof(*cur),
10431                                                         entry);
10432
10433         return cur->crc != ref->crc ||
10434                cur->priority != ref->priority ||
10435                memcmp((const void *)cur->mask.buf,
10436                       (const void *)ref->mask.buf, ref->mask.size);
10437 }
10438
10439 struct mlx5_list_entry *
10440 flow_dv_matcher_create_cb(void *tool_ctx, void *cb_ctx)
10441 {
10442         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10443         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10444         struct mlx5_flow_dv_matcher *ref = ctx->data;
10445         struct mlx5_flow_dv_matcher *resource;
10446         struct mlx5dv_flow_matcher_attr dv_attr = {
10447                 .type = IBV_FLOW_ATTR_NORMAL,
10448                 .match_mask = (void *)&ref->mask,
10449         };
10450         struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10451                                                             typeof(*tbl), tbl);
10452         int ret;
10453
10454         resource = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*resource), 0,
10455                                SOCKET_ID_ANY);
10456         if (!resource) {
10457                 rte_flow_error_set(ctx->error, ENOMEM,
10458                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10459                                    "cannot create matcher");
10460                 return NULL;
10461         }
10462         *resource = *ref;
10463         dv_attr.match_criteria_enable =
10464                 flow_dv_matcher_enable(resource->mask.buf);
10465         __flow_dv_adjust_buf_size(&ref->mask.size,
10466                                   dv_attr.match_criteria_enable);
10467         dv_attr.priority = ref->priority;
10468         if (tbl->is_egress)
10469                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
10470         ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->tbl.obj,
10471                                                &resource->matcher_object);
10472         if (ret) {
10473                 mlx5_free(resource);
10474                 rte_flow_error_set(ctx->error, ENOMEM,
10475                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10476                                    "cannot create matcher");
10477                 return NULL;
10478         }
10479         return &resource->entry;
10480 }
10481
10482 /**
10483  * Register the flow matcher.
10484  *
10485  * @param[in, out] dev
10486  *   Pointer to rte_eth_dev structure.
10487  * @param[in, out] matcher
10488  *   Pointer to flow matcher.
10489  * @param[in, out] key
10490  *   Pointer to flow table key.
10491  * @parm[in, out] dev_flow
10492  *   Pointer to the dev_flow.
10493  * @param[out] error
10494  *   pointer to error structure.
10495  *
10496  * @return
10497  *   0 on success otherwise -errno and errno is set.
10498  */
10499 static int
10500 flow_dv_matcher_register(struct rte_eth_dev *dev,
10501                          struct mlx5_flow_dv_matcher *ref,
10502                          union mlx5_flow_tbl_key *key,
10503                          struct mlx5_flow *dev_flow,
10504                          const struct mlx5_flow_tunnel *tunnel,
10505                          uint32_t group_id,
10506                          struct rte_flow_error *error)
10507 {
10508         struct mlx5_list_entry *entry;
10509         struct mlx5_flow_dv_matcher *resource;
10510         struct mlx5_flow_tbl_resource *tbl;
10511         struct mlx5_flow_tbl_data_entry *tbl_data;
10512         struct mlx5_flow_cb_ctx ctx = {
10513                 .error = error,
10514                 .data = ref,
10515         };
10516         /**
10517          * tunnel offload API requires this registration for cases when
10518          * tunnel match rule was inserted before tunnel set rule.
10519          */
10520         tbl = flow_dv_tbl_resource_get(dev, key->level,
10521                                        key->is_egress, key->is_fdb,
10522                                        dev_flow->external, tunnel,
10523                                        group_id, 0, key->id, error);
10524         if (!tbl)
10525                 return -rte_errno;      /* No need to refill the error info */
10526         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10527         ref->tbl = tbl;
10528         entry = mlx5_list_register(tbl_data->matchers, &ctx);
10529         if (!entry) {
10530                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
10531                 return rte_flow_error_set(error, ENOMEM,
10532                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10533                                           "cannot allocate ref memory");
10534         }
10535         resource = container_of(entry, typeof(*resource), entry);
10536         dev_flow->handle->dvh.matcher = resource;
10537         return 0;
10538 }
10539
10540 struct mlx5_list_entry *
10541 flow_dv_tag_create_cb(void *tool_ctx, void *cb_ctx)
10542 {
10543         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10544         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10545         struct mlx5_flow_dv_tag_resource *entry;
10546         uint32_t idx = 0;
10547         int ret;
10548
10549         entry = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10550         if (!entry) {
10551                 rte_flow_error_set(ctx->error, ENOMEM,
10552                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10553                                    "cannot allocate resource memory");
10554                 return NULL;
10555         }
10556         entry->idx = idx;
10557         entry->tag_id = *(uint32_t *)(ctx->data);
10558         ret = mlx5_flow_os_create_flow_action_tag(entry->tag_id,
10559                                                   &entry->action);
10560         if (ret) {
10561                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], idx);
10562                 rte_flow_error_set(ctx->error, ENOMEM,
10563                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10564                                    NULL, "cannot create action");
10565                 return NULL;
10566         }
10567         return &entry->entry;
10568 }
10569
10570 int
10571 flow_dv_tag_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10572                      void *cb_ctx)
10573 {
10574         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10575         struct mlx5_flow_dv_tag_resource *tag =
10576                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10577
10578         return *(uint32_t *)(ctx->data) != tag->tag_id;
10579 }
10580
10581 struct mlx5_list_entry *
10582 flow_dv_tag_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10583                      void *cb_ctx)
10584 {
10585         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10586         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10587         struct mlx5_flow_dv_tag_resource *entry;
10588         uint32_t idx = 0;
10589
10590         entry = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10591         if (!entry) {
10592                 rte_flow_error_set(ctx->error, ENOMEM,
10593                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10594                                    "cannot allocate tag resource memory");
10595                 return NULL;
10596         }
10597         memcpy(entry, oentry, sizeof(*entry));
10598         entry->idx = idx;
10599         return &entry->entry;
10600 }
10601
10602 void
10603 flow_dv_tag_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10604 {
10605         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10606         struct mlx5_flow_dv_tag_resource *tag =
10607                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10608
10609         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10610 }
10611
10612 /**
10613  * Find existing tag resource or create and register a new one.
10614  *
10615  * @param dev[in, out]
10616  *   Pointer to rte_eth_dev structure.
10617  * @param[in, out] tag_be24
10618  *   Tag value in big endian then R-shift 8.
10619  * @parm[in, out] dev_flow
10620  *   Pointer to the dev_flow.
10621  * @param[out] error
10622  *   pointer to error structure.
10623  *
10624  * @return
10625  *   0 on success otherwise -errno and errno is set.
10626  */
10627 static int
10628 flow_dv_tag_resource_register
10629                         (struct rte_eth_dev *dev,
10630                          uint32_t tag_be24,
10631                          struct mlx5_flow *dev_flow,
10632                          struct rte_flow_error *error)
10633 {
10634         struct mlx5_priv *priv = dev->data->dev_private;
10635         struct mlx5_flow_dv_tag_resource *resource;
10636         struct mlx5_list_entry *entry;
10637         struct mlx5_flow_cb_ctx ctx = {
10638                                         .error = error,
10639                                         .data = &tag_be24,
10640                                         };
10641         struct mlx5_hlist *tag_table;
10642
10643         tag_table = flow_dv_hlist_prepare(priv->sh, &priv->sh->tag_table,
10644                                       "tags",
10645                                       MLX5_TAGS_HLIST_ARRAY_SIZE,
10646                                       false, false, priv->sh,
10647                                       flow_dv_tag_create_cb,
10648                                       flow_dv_tag_match_cb,
10649                                       flow_dv_tag_remove_cb,
10650                                       flow_dv_tag_clone_cb,
10651                                       flow_dv_tag_clone_free_cb);
10652         if (unlikely(!tag_table))
10653                 return -rte_errno;
10654         entry = mlx5_hlist_register(tag_table, tag_be24, &ctx);
10655         if (entry) {
10656                 resource = container_of(entry, struct mlx5_flow_dv_tag_resource,
10657                                         entry);
10658                 dev_flow->handle->dvh.rix_tag = resource->idx;
10659                 dev_flow->dv.tag_resource = resource;
10660                 return 0;
10661         }
10662         return -rte_errno;
10663 }
10664
10665 void
10666 flow_dv_tag_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10667 {
10668         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10669         struct mlx5_flow_dv_tag_resource *tag =
10670                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10671
10672         MLX5_ASSERT(tag && sh && tag->action);
10673         claim_zero(mlx5_flow_os_destroy_flow_action(tag->action));
10674         DRV_LOG(DEBUG, "Tag %p: removed.", (void *)tag);
10675         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10676 }
10677
10678 /**
10679  * Release the tag.
10680  *
10681  * @param dev
10682  *   Pointer to Ethernet device.
10683  * @param tag_idx
10684  *   Tag index.
10685  *
10686  * @return
10687  *   1 while a reference on it exists, 0 when freed.
10688  */
10689 static int
10690 flow_dv_tag_release(struct rte_eth_dev *dev,
10691                     uint32_t tag_idx)
10692 {
10693         struct mlx5_priv *priv = dev->data->dev_private;
10694         struct mlx5_flow_dv_tag_resource *tag;
10695
10696         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG], tag_idx);
10697         if (!tag)
10698                 return 0;
10699         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
10700                 dev->data->port_id, (void *)tag, tag->entry.ref_cnt);
10701         return mlx5_hlist_unregister(priv->sh->tag_table, &tag->entry);
10702 }
10703
10704 /**
10705  * Translate action PORT_ID / REPRESENTED_PORT to vport.
10706  *
10707  * @param[in] dev
10708  *   Pointer to rte_eth_dev structure.
10709  * @param[in] action
10710  *   Pointer to action PORT_ID / REPRESENTED_PORT.
10711  * @param[out] dst_port_id
10712  *   The target port ID.
10713  * @param[out] error
10714  *   Pointer to the error structure.
10715  *
10716  * @return
10717  *   0 on success, a negative errno value otherwise and rte_errno is set.
10718  */
10719 static int
10720 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
10721                                  const struct rte_flow_action *action,
10722                                  uint32_t *dst_port_id,
10723                                  struct rte_flow_error *error)
10724 {
10725         uint32_t port;
10726         struct mlx5_priv *priv;
10727
10728         switch (action->type) {
10729         case RTE_FLOW_ACTION_TYPE_PORT_ID: {
10730                 const struct rte_flow_action_port_id *conf;
10731
10732                 conf = (const struct rte_flow_action_port_id *)action->conf;
10733                 port = conf->original ? dev->data->port_id : conf->id;
10734                 break;
10735         }
10736         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT: {
10737                 const struct rte_flow_action_ethdev *ethdev;
10738
10739                 ethdev = (const struct rte_flow_action_ethdev *)action->conf;
10740                 port = ethdev->port_id;
10741                 break;
10742         }
10743         default:
10744                 MLX5_ASSERT(false);
10745                 return rte_flow_error_set(error, EINVAL,
10746                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
10747                                           "unknown E-Switch action");
10748         }
10749
10750         priv = mlx5_port_to_eswitch_info(port, false);
10751         if (!priv)
10752                 return rte_flow_error_set(error, -rte_errno,
10753                                           RTE_FLOW_ERROR_TYPE_ACTION,
10754                                           NULL,
10755                                           "No eswitch info was found for port");
10756 #ifdef HAVE_MLX5DV_DR_CREATE_DEST_IB_PORT
10757         /*
10758          * This parameter is transferred to
10759          * mlx5dv_dr_action_create_dest_ib_port().
10760          */
10761         *dst_port_id = priv->dev_port;
10762 #else
10763         /*
10764          * Legacy mode, no LAG configurations is supported.
10765          * This parameter is transferred to
10766          * mlx5dv_dr_action_create_dest_vport().
10767          */
10768         *dst_port_id = priv->vport_id;
10769 #endif
10770         return 0;
10771 }
10772
10773 /**
10774  * Create a counter with aging configuration.
10775  *
10776  * @param[in] dev
10777  *   Pointer to rte_eth_dev structure.
10778  * @param[in] dev_flow
10779  *   Pointer to the mlx5_flow.
10780  * @param[out] count
10781  *   Pointer to the counter action configuration.
10782  * @param[in] age
10783  *   Pointer to the aging action configuration.
10784  *
10785  * @return
10786  *   Index to flow counter on success, 0 otherwise.
10787  */
10788 static uint32_t
10789 flow_dv_translate_create_counter(struct rte_eth_dev *dev,
10790                                 struct mlx5_flow *dev_flow,
10791                                 const struct rte_flow_action_count *count
10792                                         __rte_unused,
10793                                 const struct rte_flow_action_age *age)
10794 {
10795         uint32_t counter;
10796         struct mlx5_age_param *age_param;
10797
10798         counter = flow_dv_counter_alloc(dev, !!age);
10799         if (!counter || age == NULL)
10800                 return counter;
10801         age_param = flow_dv_counter_idx_get_age(dev, counter);
10802         age_param->context = age->context ? age->context :
10803                 (void *)(uintptr_t)(dev_flow->flow_idx);
10804         age_param->timeout = age->timeout;
10805         age_param->port_id = dev->data->port_id;
10806         __atomic_store_n(&age_param->sec_since_last_hit, 0, __ATOMIC_RELAXED);
10807         __atomic_store_n(&age_param->state, AGE_CANDIDATE, __ATOMIC_RELAXED);
10808         return counter;
10809 }
10810
10811 /**
10812  * Add Tx queue matcher
10813  *
10814  * @param[in] dev
10815  *   Pointer to the dev struct.
10816  * @param[in, out] matcher
10817  *   Flow matcher.
10818  * @param[in, out] key
10819  *   Flow matcher value.
10820  * @param[in] item
10821  *   Flow pattern to translate.
10822  * @param[in] inner
10823  *   Item is inner pattern.
10824  */
10825 static void
10826 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
10827                                 void *matcher, void *key,
10828                                 const struct rte_flow_item *item)
10829 {
10830         const struct mlx5_rte_flow_item_tx_queue *queue_m;
10831         const struct mlx5_rte_flow_item_tx_queue *queue_v;
10832         void *misc_m =
10833                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
10834         void *misc_v =
10835                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
10836         struct mlx5_txq_ctrl *txq;
10837         uint32_t queue;
10838
10839
10840         queue_m = (const void *)item->mask;
10841         if (!queue_m)
10842                 return;
10843         queue_v = (const void *)item->spec;
10844         if (!queue_v)
10845                 return;
10846         txq = mlx5_txq_get(dev, queue_v->queue);
10847         if (!txq)
10848                 return;
10849         queue = txq->obj->sq->id;
10850         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
10851         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
10852                  queue & queue_m->queue);
10853         mlx5_txq_release(dev, queue_v->queue);
10854 }
10855
10856 /**
10857  * Set the hash fields according to the @p flow information.
10858  *
10859  * @param[in] dev_flow
10860  *   Pointer to the mlx5_flow.
10861  * @param[in] rss_desc
10862  *   Pointer to the mlx5_flow_rss_desc.
10863  */
10864 static void
10865 flow_dv_hashfields_set(struct mlx5_flow *dev_flow,
10866                        struct mlx5_flow_rss_desc *rss_desc)
10867 {
10868         uint64_t items = dev_flow->handle->layers;
10869         int rss_inner = 0;
10870         uint64_t rss_types = rte_eth_rss_hf_refine(rss_desc->types);
10871
10872         dev_flow->hash_fields = 0;
10873 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
10874         if (rss_desc->level >= 2)
10875                 rss_inner = 1;
10876 #endif
10877         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
10878             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
10879                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
10880                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
10881                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
10882                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
10883                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
10884                         else
10885                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
10886                 }
10887         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
10888                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
10889                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
10890                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
10891                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
10892                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
10893                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
10894                         else
10895                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
10896                 }
10897         }
10898         if (dev_flow->hash_fields == 0)
10899                 /*
10900                  * There is no match between the RSS types and the
10901                  * L3 protocol (IPv4/IPv6) defined in the flow rule.
10902                  */
10903                 return;
10904         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
10905             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
10906                 if (rss_types & ETH_RSS_UDP) {
10907                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
10908                                 dev_flow->hash_fields |=
10909                                                 IBV_RX_HASH_SRC_PORT_UDP;
10910                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
10911                                 dev_flow->hash_fields |=
10912                                                 IBV_RX_HASH_DST_PORT_UDP;
10913                         else
10914                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
10915                 }
10916         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
10917                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
10918                 if (rss_types & ETH_RSS_TCP) {
10919                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
10920                                 dev_flow->hash_fields |=
10921                                                 IBV_RX_HASH_SRC_PORT_TCP;
10922                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
10923                                 dev_flow->hash_fields |=
10924                                                 IBV_RX_HASH_DST_PORT_TCP;
10925                         else
10926                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
10927                 }
10928         }
10929         if (rss_inner)
10930                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
10931 }
10932
10933 /**
10934  * Prepare an Rx Hash queue.
10935  *
10936  * @param dev
10937  *   Pointer to Ethernet device.
10938  * @param[in] dev_flow
10939  *   Pointer to the mlx5_flow.
10940  * @param[in] rss_desc
10941  *   Pointer to the mlx5_flow_rss_desc.
10942  * @param[out] hrxq_idx
10943  *   Hash Rx queue index.
10944  *
10945  * @return
10946  *   The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
10947  */
10948 static struct mlx5_hrxq *
10949 flow_dv_hrxq_prepare(struct rte_eth_dev *dev,
10950                      struct mlx5_flow *dev_flow,
10951                      struct mlx5_flow_rss_desc *rss_desc,
10952                      uint32_t *hrxq_idx)
10953 {
10954         struct mlx5_priv *priv = dev->data->dev_private;
10955         struct mlx5_flow_handle *dh = dev_flow->handle;
10956         struct mlx5_hrxq *hrxq;
10957
10958         MLX5_ASSERT(rss_desc->queue_num);
10959         rss_desc->key_len = MLX5_RSS_HASH_KEY_LEN;
10960         rss_desc->hash_fields = dev_flow->hash_fields;
10961         rss_desc->tunnel = !!(dh->layers & MLX5_FLOW_LAYER_TUNNEL);
10962         rss_desc->shared_rss = 0;
10963         if (rss_desc->hash_fields == 0)
10964                 rss_desc->queue_num = 1;
10965         *hrxq_idx = mlx5_hrxq_get(dev, rss_desc);
10966         if (!*hrxq_idx)
10967                 return NULL;
10968         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
10969                               *hrxq_idx);
10970         return hrxq;
10971 }
10972
10973 /**
10974  * Release sample sub action resource.
10975  *
10976  * @param[in, out] dev
10977  *   Pointer to rte_eth_dev structure.
10978  * @param[in] act_res
10979  *   Pointer to sample sub action resource.
10980  */
10981 static void
10982 flow_dv_sample_sub_actions_release(struct rte_eth_dev *dev,
10983                                    struct mlx5_flow_sub_actions_idx *act_res)
10984 {
10985         if (act_res->rix_hrxq) {
10986                 mlx5_hrxq_release(dev, act_res->rix_hrxq);
10987                 act_res->rix_hrxq = 0;
10988         }
10989         if (act_res->rix_encap_decap) {
10990                 flow_dv_encap_decap_resource_release(dev,
10991                                                      act_res->rix_encap_decap);
10992                 act_res->rix_encap_decap = 0;
10993         }
10994         if (act_res->rix_port_id_action) {
10995                 flow_dv_port_id_action_resource_release(dev,
10996                                                 act_res->rix_port_id_action);
10997                 act_res->rix_port_id_action = 0;
10998         }
10999         if (act_res->rix_tag) {
11000                 flow_dv_tag_release(dev, act_res->rix_tag);
11001                 act_res->rix_tag = 0;
11002         }
11003         if (act_res->rix_jump) {
11004                 flow_dv_jump_tbl_resource_release(dev, act_res->rix_jump);
11005                 act_res->rix_jump = 0;
11006         }
11007 }
11008
11009 int
11010 flow_dv_sample_match_cb(void *tool_ctx __rte_unused,
11011                         struct mlx5_list_entry *entry, void *cb_ctx)
11012 {
11013         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11014         struct rte_eth_dev *dev = ctx->dev;
11015         struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11016         struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
11017                                                               typeof(*resource),
11018                                                               entry);
11019
11020         if (ctx_resource->ratio == resource->ratio &&
11021             ctx_resource->ft_type == resource->ft_type &&
11022             ctx_resource->ft_id == resource->ft_id &&
11023             ctx_resource->set_action == resource->set_action &&
11024             !memcmp((void *)&ctx_resource->sample_act,
11025                     (void *)&resource->sample_act,
11026                     sizeof(struct mlx5_flow_sub_actions_list))) {
11027                 /*
11028                  * Existing sample action should release the prepared
11029                  * sub-actions reference counter.
11030                  */
11031                 flow_dv_sample_sub_actions_release(dev,
11032                                                    &ctx_resource->sample_idx);
11033                 return 0;
11034         }
11035         return 1;
11036 }
11037
11038 struct mlx5_list_entry *
11039 flow_dv_sample_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11040 {
11041         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11042         struct rte_eth_dev *dev = ctx->dev;
11043         struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11044         void **sample_dv_actions = ctx_resource->sub_actions;
11045         struct mlx5_flow_dv_sample_resource *resource;
11046         struct mlx5dv_dr_flow_sampler_attr sampler_attr;
11047         struct mlx5_priv *priv = dev->data->dev_private;
11048         struct mlx5_dev_ctx_shared *sh = priv->sh;
11049         struct mlx5_flow_tbl_resource *tbl;
11050         uint32_t idx = 0;
11051         const uint32_t next_ft_step = 1;
11052         uint32_t next_ft_id = ctx_resource->ft_id + next_ft_step;
11053         uint8_t is_egress = 0;
11054         uint8_t is_transfer = 0;
11055         struct rte_flow_error *error = ctx->error;
11056
11057         /* Register new sample resource. */
11058         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11059         if (!resource) {
11060                 rte_flow_error_set(error, ENOMEM,
11061                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11062                                           NULL,
11063                                           "cannot allocate resource memory");
11064                 return NULL;
11065         }
11066         *resource = *ctx_resource;
11067         /* Create normal path table level */
11068         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11069                 is_transfer = 1;
11070         else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
11071                 is_egress = 1;
11072         tbl = flow_dv_tbl_resource_get(dev, next_ft_id,
11073                                         is_egress, is_transfer,
11074                                         true, NULL, 0, 0, 0, error);
11075         if (!tbl) {
11076                 rte_flow_error_set(error, ENOMEM,
11077                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11078                                           NULL,
11079                                           "fail to create normal path table "
11080                                           "for sample");
11081                 goto error;
11082         }
11083         resource->normal_path_tbl = tbl;
11084         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
11085                 if (!sh->default_miss_action) {
11086                         rte_flow_error_set(error, ENOMEM,
11087                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11088                                                 NULL,
11089                                                 "default miss action was not "
11090                                                 "created");
11091                         goto error;
11092                 }
11093                 sample_dv_actions[ctx_resource->sample_act.actions_num++] =
11094                                                 sh->default_miss_action;
11095         }
11096         /* Create a DR sample action */
11097         sampler_attr.sample_ratio = resource->ratio;
11098         sampler_attr.default_next_table = tbl->obj;
11099         sampler_attr.num_sample_actions = ctx_resource->sample_act.actions_num;
11100         sampler_attr.sample_actions = (struct mlx5dv_dr_action **)
11101                                                         &sample_dv_actions[0];
11102         sampler_attr.action = resource->set_action;
11103         if (mlx5_os_flow_dr_create_flow_action_sampler
11104                         (&sampler_attr, &resource->verbs_action)) {
11105                 rte_flow_error_set(error, ENOMEM,
11106                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11107                                         NULL, "cannot create sample action");
11108                 goto error;
11109         }
11110         resource->idx = idx;
11111         resource->dev = dev;
11112         return &resource->entry;
11113 error:
11114         if (resource->ft_type != MLX5DV_FLOW_TABLE_TYPE_FDB)
11115                 flow_dv_sample_sub_actions_release(dev,
11116                                                    &resource->sample_idx);
11117         if (resource->normal_path_tbl)
11118                 flow_dv_tbl_resource_release(MLX5_SH(dev),
11119                                 resource->normal_path_tbl);
11120         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_SAMPLE], idx);
11121         return NULL;
11122
11123 }
11124
11125 struct mlx5_list_entry *
11126 flow_dv_sample_clone_cb(void *tool_ctx __rte_unused,
11127                          struct mlx5_list_entry *entry __rte_unused,
11128                          void *cb_ctx)
11129 {
11130         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11131         struct rte_eth_dev *dev = ctx->dev;
11132         struct mlx5_flow_dv_sample_resource *resource;
11133         struct mlx5_priv *priv = dev->data->dev_private;
11134         struct mlx5_dev_ctx_shared *sh = priv->sh;
11135         uint32_t idx = 0;
11136
11137         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11138         if (!resource) {
11139                 rte_flow_error_set(ctx->error, ENOMEM,
11140                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11141                                           NULL,
11142                                           "cannot allocate resource memory");
11143                 return NULL;
11144         }
11145         memcpy(resource, entry, sizeof(*resource));
11146         resource->idx = idx;
11147         resource->dev = dev;
11148         return &resource->entry;
11149 }
11150
11151 void
11152 flow_dv_sample_clone_free_cb(void *tool_ctx __rte_unused,
11153                              struct mlx5_list_entry *entry)
11154 {
11155         struct mlx5_flow_dv_sample_resource *resource =
11156                                   container_of(entry, typeof(*resource), entry);
11157         struct rte_eth_dev *dev = resource->dev;
11158         struct mlx5_priv *priv = dev->data->dev_private;
11159
11160         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
11161 }
11162
11163 /**
11164  * Find existing sample resource or create and register a new one.
11165  *
11166  * @param[in, out] dev
11167  *   Pointer to rte_eth_dev structure.
11168  * @param[in] ref
11169  *   Pointer to sample resource reference.
11170  * @parm[in, out] dev_flow
11171  *   Pointer to the dev_flow.
11172  * @param[out] error
11173  *   pointer to error structure.
11174  *
11175  * @return
11176  *   0 on success otherwise -errno and errno is set.
11177  */
11178 static int
11179 flow_dv_sample_resource_register(struct rte_eth_dev *dev,
11180                          struct mlx5_flow_dv_sample_resource *ref,
11181                          struct mlx5_flow *dev_flow,
11182                          struct rte_flow_error *error)
11183 {
11184         struct mlx5_flow_dv_sample_resource *resource;
11185         struct mlx5_list_entry *entry;
11186         struct mlx5_priv *priv = dev->data->dev_private;
11187         struct mlx5_flow_cb_ctx ctx = {
11188                 .dev = dev,
11189                 .error = error,
11190                 .data = ref,
11191         };
11192
11193         entry = mlx5_list_register(priv->sh->sample_action_list, &ctx);
11194         if (!entry)
11195                 return -rte_errno;
11196         resource = container_of(entry, typeof(*resource), entry);
11197         dev_flow->handle->dvh.rix_sample = resource->idx;
11198         dev_flow->dv.sample_res = resource;
11199         return 0;
11200 }
11201
11202 int
11203 flow_dv_dest_array_match_cb(void *tool_ctx __rte_unused,
11204                             struct mlx5_list_entry *entry, void *cb_ctx)
11205 {
11206         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11207         struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11208         struct rte_eth_dev *dev = ctx->dev;
11209         struct mlx5_flow_dv_dest_array_resource *resource =
11210                                   container_of(entry, typeof(*resource), entry);
11211         uint32_t idx = 0;
11212
11213         if (ctx_resource->num_of_dest == resource->num_of_dest &&
11214             ctx_resource->ft_type == resource->ft_type &&
11215             !memcmp((void *)resource->sample_act,
11216                     (void *)ctx_resource->sample_act,
11217                    (ctx_resource->num_of_dest *
11218                    sizeof(struct mlx5_flow_sub_actions_list)))) {
11219                 /*
11220                  * Existing sample action should release the prepared
11221                  * sub-actions reference counter.
11222                  */
11223                 for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11224                         flow_dv_sample_sub_actions_release(dev,
11225                                         &ctx_resource->sample_idx[idx]);
11226                 return 0;
11227         }
11228         return 1;
11229 }
11230
11231 struct mlx5_list_entry *
11232 flow_dv_dest_array_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11233 {
11234         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11235         struct rte_eth_dev *dev = ctx->dev;
11236         struct mlx5_flow_dv_dest_array_resource *resource;
11237         struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11238         struct mlx5dv_dr_action_dest_attr *dest_attr[MLX5_MAX_DEST_NUM] = { 0 };
11239         struct mlx5dv_dr_action_dest_reformat dest_reformat[MLX5_MAX_DEST_NUM];
11240         struct mlx5_priv *priv = dev->data->dev_private;
11241         struct mlx5_dev_ctx_shared *sh = priv->sh;
11242         struct mlx5_flow_sub_actions_list *sample_act;
11243         struct mlx5dv_dr_domain *domain;
11244         uint32_t idx = 0, res_idx = 0;
11245         struct rte_flow_error *error = ctx->error;
11246         uint64_t action_flags;
11247         int ret;
11248
11249         /* Register new destination array resource. */
11250         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11251                                             &res_idx);
11252         if (!resource) {
11253                 rte_flow_error_set(error, ENOMEM,
11254                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11255                                           NULL,
11256                                           "cannot allocate resource memory");
11257                 return NULL;
11258         }
11259         *resource = *ctx_resource;
11260         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11261                 domain = sh->fdb_domain;
11262         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
11263                 domain = sh->rx_domain;
11264         else
11265                 domain = sh->tx_domain;
11266         for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11267                 dest_attr[idx] = (struct mlx5dv_dr_action_dest_attr *)
11268                                  mlx5_malloc(MLX5_MEM_ZERO,
11269                                  sizeof(struct mlx5dv_dr_action_dest_attr),
11270                                  0, SOCKET_ID_ANY);
11271                 if (!dest_attr[idx]) {
11272                         rte_flow_error_set(error, ENOMEM,
11273                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11274                                            NULL,
11275                                            "cannot allocate resource memory");
11276                         goto error;
11277                 }
11278                 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST;
11279                 sample_act = &ctx_resource->sample_act[idx];
11280                 action_flags = sample_act->action_flags;
11281                 switch (action_flags) {
11282                 case MLX5_FLOW_ACTION_QUEUE:
11283                         dest_attr[idx]->dest = sample_act->dr_queue_action;
11284                         break;
11285                 case (MLX5_FLOW_ACTION_PORT_ID | MLX5_FLOW_ACTION_ENCAP):
11286                         dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST_REFORMAT;
11287                         dest_attr[idx]->dest_reformat = &dest_reformat[idx];
11288                         dest_attr[idx]->dest_reformat->reformat =
11289                                         sample_act->dr_encap_action;
11290                         dest_attr[idx]->dest_reformat->dest =
11291                                         sample_act->dr_port_id_action;
11292                         break;
11293                 case MLX5_FLOW_ACTION_PORT_ID:
11294                         dest_attr[idx]->dest = sample_act->dr_port_id_action;
11295                         break;
11296                 case MLX5_FLOW_ACTION_JUMP:
11297                         dest_attr[idx]->dest = sample_act->dr_jump_action;
11298                         break;
11299                 default:
11300                         rte_flow_error_set(error, EINVAL,
11301                                            RTE_FLOW_ERROR_TYPE_ACTION,
11302                                            NULL,
11303                                            "unsupported actions type");
11304                         goto error;
11305                 }
11306         }
11307         /* create a dest array actioin */
11308         ret = mlx5_os_flow_dr_create_flow_action_dest_array
11309                                                 (domain,
11310                                                  resource->num_of_dest,
11311                                                  dest_attr,
11312                                                  &resource->action);
11313         if (ret) {
11314                 rte_flow_error_set(error, ENOMEM,
11315                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11316                                    NULL,
11317                                    "cannot create destination array action");
11318                 goto error;
11319         }
11320         resource->idx = res_idx;
11321         resource->dev = dev;
11322         for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11323                 mlx5_free(dest_attr[idx]);
11324         return &resource->entry;
11325 error:
11326         for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11327                 flow_dv_sample_sub_actions_release(dev,
11328                                                    &resource->sample_idx[idx]);
11329                 if (dest_attr[idx])
11330                         mlx5_free(dest_attr[idx]);
11331         }
11332         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DEST_ARRAY], res_idx);
11333         return NULL;
11334 }
11335
11336 struct mlx5_list_entry *
11337 flow_dv_dest_array_clone_cb(void *tool_ctx __rte_unused,
11338                             struct mlx5_list_entry *entry __rte_unused,
11339                             void *cb_ctx)
11340 {
11341         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11342         struct rte_eth_dev *dev = ctx->dev;
11343         struct mlx5_flow_dv_dest_array_resource *resource;
11344         struct mlx5_priv *priv = dev->data->dev_private;
11345         struct mlx5_dev_ctx_shared *sh = priv->sh;
11346         uint32_t res_idx = 0;
11347         struct rte_flow_error *error = ctx->error;
11348
11349         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11350                                       &res_idx);
11351         if (!resource) {
11352                 rte_flow_error_set(error, ENOMEM,
11353                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11354                                           NULL,
11355                                           "cannot allocate dest-array memory");
11356                 return NULL;
11357         }
11358         memcpy(resource, entry, sizeof(*resource));
11359         resource->idx = res_idx;
11360         resource->dev = dev;
11361         return &resource->entry;
11362 }
11363
11364 void
11365 flow_dv_dest_array_clone_free_cb(void *tool_ctx __rte_unused,
11366                                  struct mlx5_list_entry *entry)
11367 {
11368         struct mlx5_flow_dv_dest_array_resource *resource =
11369                         container_of(entry, typeof(*resource), entry);
11370         struct rte_eth_dev *dev = resource->dev;
11371         struct mlx5_priv *priv = dev->data->dev_private;
11372
11373         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
11374 }
11375
11376 /**
11377  * Find existing destination array resource or create and register a new one.
11378  *
11379  * @param[in, out] dev
11380  *   Pointer to rte_eth_dev structure.
11381  * @param[in] ref
11382  *   Pointer to destination array resource reference.
11383  * @parm[in, out] dev_flow
11384  *   Pointer to the dev_flow.
11385  * @param[out] error
11386  *   pointer to error structure.
11387  *
11388  * @return
11389  *   0 on success otherwise -errno and errno is set.
11390  */
11391 static int
11392 flow_dv_dest_array_resource_register(struct rte_eth_dev *dev,
11393                          struct mlx5_flow_dv_dest_array_resource *ref,
11394                          struct mlx5_flow *dev_flow,
11395                          struct rte_flow_error *error)
11396 {
11397         struct mlx5_flow_dv_dest_array_resource *resource;
11398         struct mlx5_priv *priv = dev->data->dev_private;
11399         struct mlx5_list_entry *entry;
11400         struct mlx5_flow_cb_ctx ctx = {
11401                 .dev = dev,
11402                 .error = error,
11403                 .data = ref,
11404         };
11405
11406         entry = mlx5_list_register(priv->sh->dest_array_list, &ctx);
11407         if (!entry)
11408                 return -rte_errno;
11409         resource = container_of(entry, typeof(*resource), entry);
11410         dev_flow->handle->dvh.rix_dest_array = resource->idx;
11411         dev_flow->dv.dest_array_res = resource;
11412         return 0;
11413 }
11414
11415 /**
11416  * Convert Sample action to DV specification.
11417  *
11418  * @param[in] dev
11419  *   Pointer to rte_eth_dev structure.
11420  * @param[in] action
11421  *   Pointer to sample action structure.
11422  * @param[in, out] dev_flow
11423  *   Pointer to the mlx5_flow.
11424  * @param[in] attr
11425  *   Pointer to the flow attributes.
11426  * @param[in, out] num_of_dest
11427  *   Pointer to the num of destination.
11428  * @param[in, out] sample_actions
11429  *   Pointer to sample actions list.
11430  * @param[in, out] res
11431  *   Pointer to sample resource.
11432  * @param[out] error
11433  *   Pointer to the error structure.
11434  *
11435  * @return
11436  *   0 on success, a negative errno value otherwise and rte_errno is set.
11437  */
11438 static int
11439 flow_dv_translate_action_sample(struct rte_eth_dev *dev,
11440                                 const struct rte_flow_action_sample *action,
11441                                 struct mlx5_flow *dev_flow,
11442                                 const struct rte_flow_attr *attr,
11443                                 uint32_t *num_of_dest,
11444                                 void **sample_actions,
11445                                 struct mlx5_flow_dv_sample_resource *res,
11446                                 struct rte_flow_error *error)
11447 {
11448         struct mlx5_priv *priv = dev->data->dev_private;
11449         const struct rte_flow_action *sub_actions;
11450         struct mlx5_flow_sub_actions_list *sample_act;
11451         struct mlx5_flow_sub_actions_idx *sample_idx;
11452         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11453         struct rte_flow *flow = dev_flow->flow;
11454         struct mlx5_flow_rss_desc *rss_desc;
11455         uint64_t action_flags = 0;
11456
11457         MLX5_ASSERT(wks);
11458         rss_desc = &wks->rss_desc;
11459         sample_act = &res->sample_act;
11460         sample_idx = &res->sample_idx;
11461         res->ratio = action->ratio;
11462         sub_actions = action->actions;
11463         for (; sub_actions->type != RTE_FLOW_ACTION_TYPE_END; sub_actions++) {
11464                 int type = sub_actions->type;
11465                 uint32_t pre_rix = 0;
11466                 void *pre_r;
11467                 switch (type) {
11468                 case RTE_FLOW_ACTION_TYPE_QUEUE:
11469                 {
11470                         const struct rte_flow_action_queue *queue;
11471                         struct mlx5_hrxq *hrxq;
11472                         uint32_t hrxq_idx;
11473
11474                         queue = sub_actions->conf;
11475                         rss_desc->queue_num = 1;
11476                         rss_desc->queue[0] = queue->index;
11477                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11478                                                     rss_desc, &hrxq_idx);
11479                         if (!hrxq)
11480                                 return rte_flow_error_set
11481                                         (error, rte_errno,
11482                                          RTE_FLOW_ERROR_TYPE_ACTION,
11483                                          NULL,
11484                                          "cannot create fate queue");
11485                         sample_act->dr_queue_action = hrxq->action;
11486                         sample_idx->rix_hrxq = hrxq_idx;
11487                         sample_actions[sample_act->actions_num++] =
11488                                                 hrxq->action;
11489                         (*num_of_dest)++;
11490                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
11491                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11492                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11493                         dev_flow->handle->fate_action =
11494                                         MLX5_FLOW_FATE_QUEUE;
11495                         break;
11496                 }
11497                 case RTE_FLOW_ACTION_TYPE_RSS:
11498                 {
11499                         struct mlx5_hrxq *hrxq;
11500                         uint32_t hrxq_idx;
11501                         const struct rte_flow_action_rss *rss;
11502                         const uint8_t *rss_key;
11503
11504                         rss = sub_actions->conf;
11505                         memcpy(rss_desc->queue, rss->queue,
11506                                rss->queue_num * sizeof(uint16_t));
11507                         rss_desc->queue_num = rss->queue_num;
11508                         /* NULL RSS key indicates default RSS key. */
11509                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
11510                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
11511                         /*
11512                          * rss->level and rss.types should be set in advance
11513                          * when expanding items for RSS.
11514                          */
11515                         flow_dv_hashfields_set(dev_flow, rss_desc);
11516                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11517                                                     rss_desc, &hrxq_idx);
11518                         if (!hrxq)
11519                                 return rte_flow_error_set
11520                                         (error, rte_errno,
11521                                          RTE_FLOW_ERROR_TYPE_ACTION,
11522                                          NULL,
11523                                          "cannot create fate queue");
11524                         sample_act->dr_queue_action = hrxq->action;
11525                         sample_idx->rix_hrxq = hrxq_idx;
11526                         sample_actions[sample_act->actions_num++] =
11527                                                 hrxq->action;
11528                         (*num_of_dest)++;
11529                         action_flags |= MLX5_FLOW_ACTION_RSS;
11530                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11531                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11532                         dev_flow->handle->fate_action =
11533                                         MLX5_FLOW_FATE_QUEUE;
11534                         break;
11535                 }
11536                 case RTE_FLOW_ACTION_TYPE_MARK:
11537                 {
11538                         uint32_t tag_be = mlx5_flow_mark_set
11539                                 (((const struct rte_flow_action_mark *)
11540                                 (sub_actions->conf))->id);
11541
11542                         dev_flow->handle->mark = 1;
11543                         pre_rix = dev_flow->handle->dvh.rix_tag;
11544                         /* Save the mark resource before sample */
11545                         pre_r = dev_flow->dv.tag_resource;
11546                         if (flow_dv_tag_resource_register(dev, tag_be,
11547                                                   dev_flow, error))
11548                                 return -rte_errno;
11549                         MLX5_ASSERT(dev_flow->dv.tag_resource);
11550                         sample_act->dr_tag_action =
11551                                 dev_flow->dv.tag_resource->action;
11552                         sample_idx->rix_tag =
11553                                 dev_flow->handle->dvh.rix_tag;
11554                         sample_actions[sample_act->actions_num++] =
11555                                                 sample_act->dr_tag_action;
11556                         /* Recover the mark resource after sample */
11557                         dev_flow->dv.tag_resource = pre_r;
11558                         dev_flow->handle->dvh.rix_tag = pre_rix;
11559                         action_flags |= MLX5_FLOW_ACTION_MARK;
11560                         break;
11561                 }
11562                 case RTE_FLOW_ACTION_TYPE_COUNT:
11563                 {
11564                         if (!flow->counter) {
11565                                 flow->counter =
11566                                         flow_dv_translate_create_counter(dev,
11567                                                 dev_flow, sub_actions->conf,
11568                                                 0);
11569                                 if (!flow->counter)
11570                                         return rte_flow_error_set
11571                                                 (error, rte_errno,
11572                                                 RTE_FLOW_ERROR_TYPE_ACTION,
11573                                                 NULL,
11574                                                 "cannot create counter"
11575                                                 " object.");
11576                         }
11577                         sample_act->dr_cnt_action =
11578                                   (flow_dv_counter_get_by_idx(dev,
11579                                   flow->counter, NULL))->action;
11580                         sample_actions[sample_act->actions_num++] =
11581                                                 sample_act->dr_cnt_action;
11582                         action_flags |= MLX5_FLOW_ACTION_COUNT;
11583                         break;
11584                 }
11585                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
11586                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
11587                 {
11588                         struct mlx5_flow_dv_port_id_action_resource
11589                                         port_id_resource;
11590                         uint32_t port_id = 0;
11591
11592                         memset(&port_id_resource, 0, sizeof(port_id_resource));
11593                         /* Save the port id resource before sample */
11594                         pre_rix = dev_flow->handle->rix_port_id_action;
11595                         pre_r = dev_flow->dv.port_id_action;
11596                         if (flow_dv_translate_action_port_id(dev, sub_actions,
11597                                                              &port_id, error))
11598                                 return -rte_errno;
11599                         port_id_resource.port_id = port_id;
11600                         if (flow_dv_port_id_action_resource_register
11601                             (dev, &port_id_resource, dev_flow, error))
11602                                 return -rte_errno;
11603                         sample_act->dr_port_id_action =
11604                                 dev_flow->dv.port_id_action->action;
11605                         sample_idx->rix_port_id_action =
11606                                 dev_flow->handle->rix_port_id_action;
11607                         sample_actions[sample_act->actions_num++] =
11608                                                 sample_act->dr_port_id_action;
11609                         /* Recover the port id resource after sample */
11610                         dev_flow->dv.port_id_action = pre_r;
11611                         dev_flow->handle->rix_port_id_action = pre_rix;
11612                         (*num_of_dest)++;
11613                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
11614                         break;
11615                 }
11616                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
11617                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
11618                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
11619                         /* Save the encap resource before sample */
11620                         pre_rix = dev_flow->handle->dvh.rix_encap_decap;
11621                         pre_r = dev_flow->dv.encap_decap;
11622                         if (flow_dv_create_action_l2_encap(dev, sub_actions,
11623                                                            dev_flow,
11624                                                            attr->transfer,
11625                                                            error))
11626                                 return -rte_errno;
11627                         sample_act->dr_encap_action =
11628                                 dev_flow->dv.encap_decap->action;
11629                         sample_idx->rix_encap_decap =
11630                                 dev_flow->handle->dvh.rix_encap_decap;
11631                         sample_actions[sample_act->actions_num++] =
11632                                                 sample_act->dr_encap_action;
11633                         /* Recover the encap resource after sample */
11634                         dev_flow->dv.encap_decap = pre_r;
11635                         dev_flow->handle->dvh.rix_encap_decap = pre_rix;
11636                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
11637                         break;
11638                 default:
11639                         return rte_flow_error_set(error, EINVAL,
11640                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11641                                 NULL,
11642                                 "Not support for sampler action");
11643                 }
11644         }
11645         sample_act->action_flags = action_flags;
11646         res->ft_id = dev_flow->dv.group;
11647         if (attr->transfer) {
11648                 union {
11649                         uint32_t action_in[MLX5_ST_SZ_DW(set_action_in)];
11650                         uint64_t set_action;
11651                 } action_ctx = { .set_action = 0 };
11652
11653                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
11654                 MLX5_SET(set_action_in, action_ctx.action_in, action_type,
11655                          MLX5_MODIFICATION_TYPE_SET);
11656                 MLX5_SET(set_action_in, action_ctx.action_in, field,
11657                          MLX5_MODI_META_REG_C_0);
11658                 MLX5_SET(set_action_in, action_ctx.action_in, data,
11659                          priv->vport_meta_tag);
11660                 res->set_action = action_ctx.set_action;
11661         } else if (attr->ingress) {
11662                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
11663         } else {
11664                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_TX;
11665         }
11666         return 0;
11667 }
11668
11669 /**
11670  * Convert Sample action to DV specification.
11671  *
11672  * @param[in] dev
11673  *   Pointer to rte_eth_dev structure.
11674  * @param[in, out] dev_flow
11675  *   Pointer to the mlx5_flow.
11676  * @param[in] num_of_dest
11677  *   The num of destination.
11678  * @param[in, out] res
11679  *   Pointer to sample resource.
11680  * @param[in, out] mdest_res
11681  *   Pointer to destination array resource.
11682  * @param[in] sample_actions
11683  *   Pointer to sample path actions list.
11684  * @param[in] action_flags
11685  *   Holds the actions detected until now.
11686  * @param[out] error
11687  *   Pointer to the error structure.
11688  *
11689  * @return
11690  *   0 on success, a negative errno value otherwise and rte_errno is set.
11691  */
11692 static int
11693 flow_dv_create_action_sample(struct rte_eth_dev *dev,
11694                              struct mlx5_flow *dev_flow,
11695                              uint32_t num_of_dest,
11696                              struct mlx5_flow_dv_sample_resource *res,
11697                              struct mlx5_flow_dv_dest_array_resource *mdest_res,
11698                              void **sample_actions,
11699                              uint64_t action_flags,
11700                              struct rte_flow_error *error)
11701 {
11702         /* update normal path action resource into last index of array */
11703         uint32_t dest_index = MLX5_MAX_DEST_NUM - 1;
11704         struct mlx5_flow_sub_actions_list *sample_act =
11705                                         &mdest_res->sample_act[dest_index];
11706         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11707         struct mlx5_flow_rss_desc *rss_desc;
11708         uint32_t normal_idx = 0;
11709         struct mlx5_hrxq *hrxq;
11710         uint32_t hrxq_idx;
11711
11712         MLX5_ASSERT(wks);
11713         rss_desc = &wks->rss_desc;
11714         if (num_of_dest > 1) {
11715                 if (sample_act->action_flags & MLX5_FLOW_ACTION_QUEUE) {
11716                         /* Handle QP action for mirroring */
11717                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11718                                                     rss_desc, &hrxq_idx);
11719                         if (!hrxq)
11720                                 return rte_flow_error_set
11721                                      (error, rte_errno,
11722                                       RTE_FLOW_ERROR_TYPE_ACTION,
11723                                       NULL,
11724                                       "cannot create rx queue");
11725                         normal_idx++;
11726                         mdest_res->sample_idx[dest_index].rix_hrxq = hrxq_idx;
11727                         sample_act->dr_queue_action = hrxq->action;
11728                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11729                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11730                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
11731                 }
11732                 if (sample_act->action_flags & MLX5_FLOW_ACTION_ENCAP) {
11733                         normal_idx++;
11734                         mdest_res->sample_idx[dest_index].rix_encap_decap =
11735                                 dev_flow->handle->dvh.rix_encap_decap;
11736                         sample_act->dr_encap_action =
11737                                 dev_flow->dv.encap_decap->action;
11738                         dev_flow->handle->dvh.rix_encap_decap = 0;
11739                 }
11740                 if (sample_act->action_flags & MLX5_FLOW_ACTION_PORT_ID) {
11741                         normal_idx++;
11742                         mdest_res->sample_idx[dest_index].rix_port_id_action =
11743                                 dev_flow->handle->rix_port_id_action;
11744                         sample_act->dr_port_id_action =
11745                                 dev_flow->dv.port_id_action->action;
11746                         dev_flow->handle->rix_port_id_action = 0;
11747                 }
11748                 if (sample_act->action_flags & MLX5_FLOW_ACTION_JUMP) {
11749                         normal_idx++;
11750                         mdest_res->sample_idx[dest_index].rix_jump =
11751                                 dev_flow->handle->rix_jump;
11752                         sample_act->dr_jump_action =
11753                                 dev_flow->dv.jump->action;
11754                         dev_flow->handle->rix_jump = 0;
11755                 }
11756                 sample_act->actions_num = normal_idx;
11757                 /* update sample action resource into first index of array */
11758                 mdest_res->ft_type = res->ft_type;
11759                 memcpy(&mdest_res->sample_idx[0], &res->sample_idx,
11760                                 sizeof(struct mlx5_flow_sub_actions_idx));
11761                 memcpy(&mdest_res->sample_act[0], &res->sample_act,
11762                                 sizeof(struct mlx5_flow_sub_actions_list));
11763                 mdest_res->num_of_dest = num_of_dest;
11764                 if (flow_dv_dest_array_resource_register(dev, mdest_res,
11765                                                          dev_flow, error))
11766                         return rte_flow_error_set(error, EINVAL,
11767                                                   RTE_FLOW_ERROR_TYPE_ACTION,
11768                                                   NULL, "can't create sample "
11769                                                   "action");
11770         } else {
11771                 res->sub_actions = sample_actions;
11772                 if (flow_dv_sample_resource_register(dev, res, dev_flow, error))
11773                         return rte_flow_error_set(error, EINVAL,
11774                                                   RTE_FLOW_ERROR_TYPE_ACTION,
11775                                                   NULL,
11776                                                   "can't create sample action");
11777         }
11778         return 0;
11779 }
11780
11781 /**
11782  * Remove an ASO age action from age actions list.
11783  *
11784  * @param[in] dev
11785  *   Pointer to the Ethernet device structure.
11786  * @param[in] age
11787  *   Pointer to the aso age action handler.
11788  */
11789 static void
11790 flow_dv_aso_age_remove_from_age(struct rte_eth_dev *dev,
11791                                 struct mlx5_aso_age_action *age)
11792 {
11793         struct mlx5_age_info *age_info;
11794         struct mlx5_age_param *age_param = &age->age_params;
11795         struct mlx5_priv *priv = dev->data->dev_private;
11796         uint16_t expected = AGE_CANDIDATE;
11797
11798         age_info = GET_PORT_AGE_INFO(priv);
11799         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
11800                                          AGE_FREE, false, __ATOMIC_RELAXED,
11801                                          __ATOMIC_RELAXED)) {
11802                 /**
11803                  * We need the lock even it is age timeout,
11804                  * since age action may still in process.
11805                  */
11806                 rte_spinlock_lock(&age_info->aged_sl);
11807                 LIST_REMOVE(age, next);
11808                 rte_spinlock_unlock(&age_info->aged_sl);
11809                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
11810         }
11811 }
11812
11813 /**
11814  * Release an ASO age action.
11815  *
11816  * @param[in] dev
11817  *   Pointer to the Ethernet device structure.
11818  * @param[in] age_idx
11819  *   Index of ASO age action to release.
11820  * @param[in] flow
11821  *   True if the release operation is during flow destroy operation.
11822  *   False if the release operation is during action destroy operation.
11823  *
11824  * @return
11825  *   0 when age action was removed, otherwise the number of references.
11826  */
11827 static int
11828 flow_dv_aso_age_release(struct rte_eth_dev *dev, uint32_t age_idx)
11829 {
11830         struct mlx5_priv *priv = dev->data->dev_private;
11831         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11832         struct mlx5_aso_age_action *age = flow_aso_age_get_by_idx(dev, age_idx);
11833         uint32_t ret = __atomic_sub_fetch(&age->refcnt, 1, __ATOMIC_RELAXED);
11834
11835         if (!ret) {
11836                 flow_dv_aso_age_remove_from_age(dev, age);
11837                 rte_spinlock_lock(&mng->free_sl);
11838                 LIST_INSERT_HEAD(&mng->free, age, next);
11839                 rte_spinlock_unlock(&mng->free_sl);
11840         }
11841         return ret;
11842 }
11843
11844 /**
11845  * Resize the ASO age pools array by MLX5_CNT_CONTAINER_RESIZE pools.
11846  *
11847  * @param[in] dev
11848  *   Pointer to the Ethernet device structure.
11849  *
11850  * @return
11851  *   0 on success, otherwise negative errno value and rte_errno is set.
11852  */
11853 static int
11854 flow_dv_aso_age_pools_resize(struct rte_eth_dev *dev)
11855 {
11856         struct mlx5_priv *priv = dev->data->dev_private;
11857         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11858         void *old_pools = mng->pools;
11859         uint32_t resize = mng->n + MLX5_CNT_CONTAINER_RESIZE;
11860         uint32_t mem_size = sizeof(struct mlx5_aso_age_pool *) * resize;
11861         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
11862
11863         if (!pools) {
11864                 rte_errno = ENOMEM;
11865                 return -ENOMEM;
11866         }
11867         if (old_pools) {
11868                 memcpy(pools, old_pools,
11869                        mng->n * sizeof(struct mlx5_flow_counter_pool *));
11870                 mlx5_free(old_pools);
11871         } else {
11872                 /* First ASO flow hit allocation - starting ASO data-path. */
11873                 int ret = mlx5_aso_flow_hit_queue_poll_start(priv->sh);
11874
11875                 if (ret) {
11876                         mlx5_free(pools);
11877                         return ret;
11878                 }
11879         }
11880         mng->n = resize;
11881         mng->pools = pools;
11882         return 0;
11883 }
11884
11885 /**
11886  * Create and initialize a new ASO aging pool.
11887  *
11888  * @param[in] dev
11889  *   Pointer to the Ethernet device structure.
11890  * @param[out] age_free
11891  *   Where to put the pointer of a new age action.
11892  *
11893  * @return
11894  *   The age actions pool pointer and @p age_free is set on success,
11895  *   NULL otherwise and rte_errno is set.
11896  */
11897 static struct mlx5_aso_age_pool *
11898 flow_dv_age_pool_create(struct rte_eth_dev *dev,
11899                         struct mlx5_aso_age_action **age_free)
11900 {
11901         struct mlx5_priv *priv = dev->data->dev_private;
11902         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11903         struct mlx5_aso_age_pool *pool = NULL;
11904         struct mlx5_devx_obj *obj = NULL;
11905         uint32_t i;
11906
11907         obj = mlx5_devx_cmd_create_flow_hit_aso_obj(priv->sh->ctx,
11908                                                     priv->sh->pdn);
11909         if (!obj) {
11910                 rte_errno = ENODATA;
11911                 DRV_LOG(ERR, "Failed to create flow_hit_aso_obj using DevX.");
11912                 return NULL;
11913         }
11914         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
11915         if (!pool) {
11916                 claim_zero(mlx5_devx_cmd_destroy(obj));
11917                 rte_errno = ENOMEM;
11918                 return NULL;
11919         }
11920         pool->flow_hit_aso_obj = obj;
11921         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
11922         rte_spinlock_lock(&mng->resize_sl);
11923         pool->index = mng->next;
11924         /* Resize pools array if there is no room for the new pool in it. */
11925         if (pool->index == mng->n && flow_dv_aso_age_pools_resize(dev)) {
11926                 claim_zero(mlx5_devx_cmd_destroy(obj));
11927                 mlx5_free(pool);
11928                 rte_spinlock_unlock(&mng->resize_sl);
11929                 return NULL;
11930         }
11931         mng->pools[pool->index] = pool;
11932         mng->next++;
11933         rte_spinlock_unlock(&mng->resize_sl);
11934         /* Assign the first action in the new pool, the rest go to free list. */
11935         *age_free = &pool->actions[0];
11936         for (i = 1; i < MLX5_ASO_AGE_ACTIONS_PER_POOL; i++) {
11937                 pool->actions[i].offset = i;
11938                 LIST_INSERT_HEAD(&mng->free, &pool->actions[i], next);
11939         }
11940         return pool;
11941 }
11942
11943 /**
11944  * Allocate a ASO aging bit.
11945  *
11946  * @param[in] dev
11947  *   Pointer to the Ethernet device structure.
11948  * @param[out] error
11949  *   Pointer to the error structure.
11950  *
11951  * @return
11952  *   Index to ASO age action on success, 0 otherwise and rte_errno is set.
11953  */
11954 static uint32_t
11955 flow_dv_aso_age_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
11956 {
11957         struct mlx5_priv *priv = dev->data->dev_private;
11958         const struct mlx5_aso_age_pool *pool;
11959         struct mlx5_aso_age_action *age_free = NULL;
11960         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11961
11962         MLX5_ASSERT(mng);
11963         /* Try to get the next free age action bit. */
11964         rte_spinlock_lock(&mng->free_sl);
11965         age_free = LIST_FIRST(&mng->free);
11966         if (age_free) {
11967                 LIST_REMOVE(age_free, next);
11968         } else if (!flow_dv_age_pool_create(dev, &age_free)) {
11969                 rte_spinlock_unlock(&mng->free_sl);
11970                 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
11971                                    NULL, "failed to create ASO age pool");
11972                 return 0; /* 0 is an error. */
11973         }
11974         rte_spinlock_unlock(&mng->free_sl);
11975         pool = container_of
11976           ((const struct mlx5_aso_age_action (*)[MLX5_ASO_AGE_ACTIONS_PER_POOL])
11977                   (age_free - age_free->offset), const struct mlx5_aso_age_pool,
11978                                                                        actions);
11979         if (!age_free->dr_action) {
11980                 int reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_FLOW_HIT, 0,
11981                                                  error);
11982
11983                 if (reg_c < 0) {
11984                         rte_flow_error_set(error, rte_errno,
11985                                            RTE_FLOW_ERROR_TYPE_ACTION,
11986                                            NULL, "failed to get reg_c "
11987                                            "for ASO flow hit");
11988                         return 0; /* 0 is an error. */
11989                 }
11990 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
11991                 age_free->dr_action = mlx5_glue->dv_create_flow_action_aso
11992                                 (priv->sh->rx_domain,
11993                                  pool->flow_hit_aso_obj->obj, age_free->offset,
11994                                  MLX5DV_DR_ACTION_FLAGS_ASO_FIRST_HIT_SET,
11995                                  (reg_c - REG_C_0));
11996 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
11997                 if (!age_free->dr_action) {
11998                         rte_errno = errno;
11999                         rte_spinlock_lock(&mng->free_sl);
12000                         LIST_INSERT_HEAD(&mng->free, age_free, next);
12001                         rte_spinlock_unlock(&mng->free_sl);
12002                         rte_flow_error_set(error, rte_errno,
12003                                            RTE_FLOW_ERROR_TYPE_ACTION,
12004                                            NULL, "failed to create ASO "
12005                                            "flow hit action");
12006                         return 0; /* 0 is an error. */
12007                 }
12008         }
12009         __atomic_store_n(&age_free->refcnt, 1, __ATOMIC_RELAXED);
12010         return pool->index | ((age_free->offset + 1) << 16);
12011 }
12012
12013 /**
12014  * Initialize flow ASO age parameters.
12015  *
12016  * @param[in] dev
12017  *   Pointer to rte_eth_dev structure.
12018  * @param[in] age_idx
12019  *   Index of ASO age action.
12020  * @param[in] context
12021  *   Pointer to flow counter age context.
12022  * @param[in] timeout
12023  *   Aging timeout in seconds.
12024  *
12025  */
12026 static void
12027 flow_dv_aso_age_params_init(struct rte_eth_dev *dev,
12028                             uint32_t age_idx,
12029                             void *context,
12030                             uint32_t timeout)
12031 {
12032         struct mlx5_aso_age_action *aso_age;
12033
12034         aso_age = flow_aso_age_get_by_idx(dev, age_idx);
12035         MLX5_ASSERT(aso_age);
12036         aso_age->age_params.context = context;
12037         aso_age->age_params.timeout = timeout;
12038         aso_age->age_params.port_id = dev->data->port_id;
12039         __atomic_store_n(&aso_age->age_params.sec_since_last_hit, 0,
12040                          __ATOMIC_RELAXED);
12041         __atomic_store_n(&aso_age->age_params.state, AGE_CANDIDATE,
12042                          __ATOMIC_RELAXED);
12043 }
12044
12045 static void
12046 flow_dv_translate_integrity_l4(const struct rte_flow_item_integrity *mask,
12047                                const struct rte_flow_item_integrity *value,
12048                                void *headers_m, void *headers_v)
12049 {
12050         if (mask->l4_ok) {
12051                 /* application l4_ok filter aggregates all hardware l4 filters
12052                  * therefore hw l4_checksum_ok must be implicitly added here.
12053                  */
12054                 struct rte_flow_item_integrity local_item;
12055
12056                 local_item.l4_csum_ok = 1;
12057                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
12058                          local_item.l4_csum_ok);
12059                 if (value->l4_ok) {
12060                         /* application l4_ok = 1 matches sets both hw flags
12061                          * l4_ok and l4_checksum_ok flags to 1.
12062                          */
12063                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12064                                  l4_checksum_ok, local_item.l4_csum_ok);
12065                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_ok,
12066                                  mask->l4_ok);
12067                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_ok,
12068                                  value->l4_ok);
12069                 } else {
12070                         /* application l4_ok = 0 matches on hw flag
12071                          * l4_checksum_ok = 0 only.
12072                          */
12073                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12074                                  l4_checksum_ok, 0);
12075                 }
12076         } else if (mask->l4_csum_ok) {
12077                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
12078                          mask->l4_csum_ok);
12079                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_checksum_ok,
12080                          value->l4_csum_ok);
12081         }
12082 }
12083
12084 static void
12085 flow_dv_translate_integrity_l3(const struct rte_flow_item_integrity *mask,
12086                                const struct rte_flow_item_integrity *value,
12087                                void *headers_m, void *headers_v,
12088                                bool is_ipv4)
12089 {
12090         if (mask->l3_ok) {
12091                 /* application l3_ok filter aggregates all hardware l3 filters
12092                  * therefore hw ipv4_checksum_ok must be implicitly added here.
12093                  */
12094                 struct rte_flow_item_integrity local_item;
12095
12096                 local_item.ipv4_csum_ok = !!is_ipv4;
12097                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
12098                          local_item.ipv4_csum_ok);
12099                 if (value->l3_ok) {
12100                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12101                                  ipv4_checksum_ok, local_item.ipv4_csum_ok);
12102                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, l3_ok,
12103                                  mask->l3_ok);
12104                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, l3_ok,
12105                                  value->l3_ok);
12106                 } else {
12107                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12108                                  ipv4_checksum_ok, 0);
12109                 }
12110         } else if (mask->ipv4_csum_ok) {
12111                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
12112                          mask->ipv4_csum_ok);
12113                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_checksum_ok,
12114                          value->ipv4_csum_ok);
12115         }
12116 }
12117
12118 static void
12119 flow_dv_translate_item_integrity(void *matcher, void *key,
12120                                  const struct rte_flow_item *head_item,
12121                                  const struct rte_flow_item *integrity_item)
12122 {
12123         const struct rte_flow_item_integrity *mask = integrity_item->mask;
12124         const struct rte_flow_item_integrity *value = integrity_item->spec;
12125         const struct rte_flow_item *tunnel_item, *end_item, *item;
12126         void *headers_m;
12127         void *headers_v;
12128         uint32_t l3_protocol;
12129
12130         if (!value)
12131                 return;
12132         if (!mask)
12133                 mask = &rte_flow_item_integrity_mask;
12134         if (value->level > 1) {
12135                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12136                                          inner_headers);
12137                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
12138         } else {
12139                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12140                                          outer_headers);
12141                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
12142         }
12143         tunnel_item = mlx5_flow_find_tunnel_item(head_item);
12144         if (value->level > 1) {
12145                 /* tunnel item was verified during the item validation */
12146                 item = tunnel_item;
12147                 end_item = mlx5_find_end_item(tunnel_item);
12148         } else {
12149                 item = head_item;
12150                 end_item = tunnel_item ? tunnel_item :
12151                            mlx5_find_end_item(integrity_item);
12152         }
12153         l3_protocol = mask->l3_ok ?
12154                       mlx5_flow_locate_proto_l3(&item, end_item) : 0;
12155         flow_dv_translate_integrity_l3(mask, value, headers_m, headers_v,
12156                                        l3_protocol == RTE_ETHER_TYPE_IPV4);
12157         flow_dv_translate_integrity_l4(mask, value, headers_m, headers_v);
12158 }
12159
12160 /**
12161  * Prepares DV flow counter with aging configuration.
12162  * Gets it by index when exists, creates a new one when doesn't.
12163  *
12164  * @param[in] dev
12165  *   Pointer to rte_eth_dev structure.
12166  * @param[in] dev_flow
12167  *   Pointer to the mlx5_flow.
12168  * @param[in, out] flow
12169  *   Pointer to the sub flow.
12170  * @param[in] count
12171  *   Pointer to the counter action configuration.
12172  * @param[in] age
12173  *   Pointer to the aging action configuration.
12174  * @param[out] error
12175  *   Pointer to the error structure.
12176  *
12177  * @return
12178  *   Pointer to the counter, NULL otherwise.
12179  */
12180 static struct mlx5_flow_counter *
12181 flow_dv_prepare_counter(struct rte_eth_dev *dev,
12182                         struct mlx5_flow *dev_flow,
12183                         struct rte_flow *flow,
12184                         const struct rte_flow_action_count *count,
12185                         const struct rte_flow_action_age *age,
12186                         struct rte_flow_error *error)
12187 {
12188         if (!flow->counter) {
12189                 flow->counter = flow_dv_translate_create_counter(dev, dev_flow,
12190                                                                  count, age);
12191                 if (!flow->counter) {
12192                         rte_flow_error_set(error, rte_errno,
12193                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12194                                            "cannot create counter object.");
12195                         return NULL;
12196                 }
12197         }
12198         return flow_dv_counter_get_by_idx(dev, flow->counter, NULL);
12199 }
12200
12201 /*
12202  * Release an ASO CT action by its own device.
12203  *
12204  * @param[in] dev
12205  *   Pointer to the Ethernet device structure.
12206  * @param[in] idx
12207  *   Index of ASO CT action to release.
12208  *
12209  * @return
12210  *   0 when CT action was removed, otherwise the number of references.
12211  */
12212 static inline int
12213 flow_dv_aso_ct_dev_release(struct rte_eth_dev *dev, uint32_t idx)
12214 {
12215         struct mlx5_priv *priv = dev->data->dev_private;
12216         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12217         uint32_t ret;
12218         struct mlx5_aso_ct_action *ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12219         enum mlx5_aso_ct_state state =
12220                         __atomic_load_n(&ct->state, __ATOMIC_RELAXED);
12221
12222         /* Cannot release when CT is in the ASO SQ. */
12223         if (state == ASO_CONNTRACK_WAIT || state == ASO_CONNTRACK_QUERY)
12224                 return -1;
12225         ret = __atomic_sub_fetch(&ct->refcnt, 1, __ATOMIC_RELAXED);
12226         if (!ret) {
12227                 if (ct->dr_action_orig) {
12228 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12229                         claim_zero(mlx5_glue->destroy_flow_action
12230                                         (ct->dr_action_orig));
12231 #endif
12232                         ct->dr_action_orig = NULL;
12233                 }
12234                 if (ct->dr_action_rply) {
12235 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12236                         claim_zero(mlx5_glue->destroy_flow_action
12237                                         (ct->dr_action_rply));
12238 #endif
12239                         ct->dr_action_rply = NULL;
12240                 }
12241                 /* Clear the state to free, no need in 1st allocation. */
12242                 MLX5_ASO_CT_UPDATE_STATE(ct, ASO_CONNTRACK_FREE);
12243                 rte_spinlock_lock(&mng->ct_sl);
12244                 LIST_INSERT_HEAD(&mng->free_cts, ct, next);
12245                 rte_spinlock_unlock(&mng->ct_sl);
12246         }
12247         return (int)ret;
12248 }
12249
12250 static inline int
12251 flow_dv_aso_ct_release(struct rte_eth_dev *dev, uint32_t own_idx,
12252                        struct rte_flow_error *error)
12253 {
12254         uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(own_idx);
12255         uint32_t idx = MLX5_INDIRECT_ACT_CT_GET_IDX(own_idx);
12256         struct rte_eth_dev *owndev = &rte_eth_devices[owner];
12257         int ret;
12258
12259         MLX5_ASSERT(owner < RTE_MAX_ETHPORTS);
12260         if (dev->data->dev_started != 1)
12261                 return rte_flow_error_set(error, EAGAIN,
12262                                           RTE_FLOW_ERROR_TYPE_ACTION,
12263                                           NULL,
12264                                           "Indirect CT action cannot be destroyed when the port is stopped");
12265         ret = flow_dv_aso_ct_dev_release(owndev, idx);
12266         if (ret < 0)
12267                 return rte_flow_error_set(error, EAGAIN,
12268                                           RTE_FLOW_ERROR_TYPE_ACTION,
12269                                           NULL,
12270                                           "Current state prevents indirect CT action from being destroyed");
12271         return ret;
12272 }
12273
12274 /*
12275  * Resize the ASO CT pools array by 64 pools.
12276  *
12277  * @param[in] dev
12278  *   Pointer to the Ethernet device structure.
12279  *
12280  * @return
12281  *   0 on success, otherwise negative errno value and rte_errno is set.
12282  */
12283 static int
12284 flow_dv_aso_ct_pools_resize(struct rte_eth_dev *dev)
12285 {
12286         struct mlx5_priv *priv = dev->data->dev_private;
12287         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12288         void *old_pools = mng->pools;
12289         /* Magic number now, need a macro. */
12290         uint32_t resize = mng->n + 64;
12291         uint32_t mem_size = sizeof(struct mlx5_aso_ct_pool *) * resize;
12292         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
12293
12294         if (!pools) {
12295                 rte_errno = ENOMEM;
12296                 return -rte_errno;
12297         }
12298         rte_rwlock_write_lock(&mng->resize_rwl);
12299         /* ASO SQ/QP was already initialized in the startup. */
12300         if (old_pools) {
12301                 /* Realloc could be an alternative choice. */
12302                 rte_memcpy(pools, old_pools,
12303                            mng->n * sizeof(struct mlx5_aso_ct_pool *));
12304                 mlx5_free(old_pools);
12305         }
12306         mng->n = resize;
12307         mng->pools = pools;
12308         rte_rwlock_write_unlock(&mng->resize_rwl);
12309         return 0;
12310 }
12311
12312 /*
12313  * Create and initialize a new ASO CT pool.
12314  *
12315  * @param[in] dev
12316  *   Pointer to the Ethernet device structure.
12317  * @param[out] ct_free
12318  *   Where to put the pointer of a new CT action.
12319  *
12320  * @return
12321  *   The CT actions pool pointer and @p ct_free is set on success,
12322  *   NULL otherwise and rte_errno is set.
12323  */
12324 static struct mlx5_aso_ct_pool *
12325 flow_dv_ct_pool_create(struct rte_eth_dev *dev,
12326                        struct mlx5_aso_ct_action **ct_free)
12327 {
12328         struct mlx5_priv *priv = dev->data->dev_private;
12329         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12330         struct mlx5_aso_ct_pool *pool = NULL;
12331         struct mlx5_devx_obj *obj = NULL;
12332         uint32_t i;
12333         uint32_t log_obj_size = rte_log2_u32(MLX5_ASO_CT_ACTIONS_PER_POOL);
12334
12335         obj = mlx5_devx_cmd_create_conn_track_offload_obj(priv->sh->ctx,
12336                                                 priv->sh->pdn, log_obj_size);
12337         if (!obj) {
12338                 rte_errno = ENODATA;
12339                 DRV_LOG(ERR, "Failed to create conn_track_offload_obj using DevX.");
12340                 return NULL;
12341         }
12342         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
12343         if (!pool) {
12344                 rte_errno = ENOMEM;
12345                 claim_zero(mlx5_devx_cmd_destroy(obj));
12346                 return NULL;
12347         }
12348         pool->devx_obj = obj;
12349         pool->index = mng->next;
12350         /* Resize pools array if there is no room for the new pool in it. */
12351         if (pool->index == mng->n && flow_dv_aso_ct_pools_resize(dev)) {
12352                 claim_zero(mlx5_devx_cmd_destroy(obj));
12353                 mlx5_free(pool);
12354                 return NULL;
12355         }
12356         mng->pools[pool->index] = pool;
12357         mng->next++;
12358         /* Assign the first action in the new pool, the rest go to free list. */
12359         *ct_free = &pool->actions[0];
12360         /* Lock outside, the list operation is safe here. */
12361         for (i = 1; i < MLX5_ASO_CT_ACTIONS_PER_POOL; i++) {
12362                 /* refcnt is 0 when allocating the memory. */
12363                 pool->actions[i].offset = i;
12364                 LIST_INSERT_HEAD(&mng->free_cts, &pool->actions[i], next);
12365         }
12366         return pool;
12367 }
12368
12369 /*
12370  * Allocate a ASO CT action from free list.
12371  *
12372  * @param[in] dev
12373  *   Pointer to the Ethernet device structure.
12374  * @param[out] error
12375  *   Pointer to the error structure.
12376  *
12377  * @return
12378  *   Index to ASO CT action on success, 0 otherwise and rte_errno is set.
12379  */
12380 static uint32_t
12381 flow_dv_aso_ct_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
12382 {
12383         struct mlx5_priv *priv = dev->data->dev_private;
12384         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12385         struct mlx5_aso_ct_action *ct = NULL;
12386         struct mlx5_aso_ct_pool *pool;
12387         uint8_t reg_c;
12388         uint32_t ct_idx;
12389
12390         MLX5_ASSERT(mng);
12391         if (!priv->config.devx) {
12392                 rte_errno = ENOTSUP;
12393                 return 0;
12394         }
12395         /* Get a free CT action, if no, a new pool will be created. */
12396         rte_spinlock_lock(&mng->ct_sl);
12397         ct = LIST_FIRST(&mng->free_cts);
12398         if (ct) {
12399                 LIST_REMOVE(ct, next);
12400         } else if (!flow_dv_ct_pool_create(dev, &ct)) {
12401                 rte_spinlock_unlock(&mng->ct_sl);
12402                 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12403                                    NULL, "failed to create ASO CT pool");
12404                 return 0;
12405         }
12406         rte_spinlock_unlock(&mng->ct_sl);
12407         pool = container_of(ct, struct mlx5_aso_ct_pool, actions[ct->offset]);
12408         ct_idx = MLX5_MAKE_CT_IDX(pool->index, ct->offset);
12409         /* 0: inactive, 1: created, 2+: used by flows. */
12410         __atomic_store_n(&ct->refcnt, 1, __ATOMIC_RELAXED);
12411         reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, error);
12412         if (!ct->dr_action_orig) {
12413 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12414                 ct->dr_action_orig = mlx5_glue->dv_create_flow_action_aso
12415                         (priv->sh->rx_domain, pool->devx_obj->obj,
12416                          ct->offset,
12417                          MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_INITIATOR,
12418                          reg_c - REG_C_0);
12419 #else
12420                 RTE_SET_USED(reg_c);
12421 #endif
12422                 if (!ct->dr_action_orig) {
12423                         flow_dv_aso_ct_dev_release(dev, ct_idx);
12424                         rte_flow_error_set(error, rte_errno,
12425                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12426                                            "failed to create ASO CT action");
12427                         return 0;
12428                 }
12429         }
12430         if (!ct->dr_action_rply) {
12431 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12432                 ct->dr_action_rply = mlx5_glue->dv_create_flow_action_aso
12433                         (priv->sh->rx_domain, pool->devx_obj->obj,
12434                          ct->offset,
12435                          MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_RESPONDER,
12436                          reg_c - REG_C_0);
12437 #endif
12438                 if (!ct->dr_action_rply) {
12439                         flow_dv_aso_ct_dev_release(dev, ct_idx);
12440                         rte_flow_error_set(error, rte_errno,
12441                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12442                                            "failed to create ASO CT action");
12443                         return 0;
12444                 }
12445         }
12446         return ct_idx;
12447 }
12448
12449 /*
12450  * Create a conntrack object with context and actions by using ASO mechanism.
12451  *
12452  * @param[in] dev
12453  *   Pointer to rte_eth_dev structure.
12454  * @param[in] pro
12455  *   Pointer to conntrack information profile.
12456  * @param[out] error
12457  *   Pointer to the error structure.
12458  *
12459  * @return
12460  *   Index to conntrack object on success, 0 otherwise.
12461  */
12462 static uint32_t
12463 flow_dv_translate_create_conntrack(struct rte_eth_dev *dev,
12464                                    const struct rte_flow_action_conntrack *pro,
12465                                    struct rte_flow_error *error)
12466 {
12467         struct mlx5_priv *priv = dev->data->dev_private;
12468         struct mlx5_dev_ctx_shared *sh = priv->sh;
12469         struct mlx5_aso_ct_action *ct;
12470         uint32_t idx;
12471
12472         if (!sh->ct_aso_en)
12473                 return rte_flow_error_set(error, ENOTSUP,
12474                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12475                                           "Connection is not supported");
12476         idx = flow_dv_aso_ct_alloc(dev, error);
12477         if (!idx)
12478                 return rte_flow_error_set(error, rte_errno,
12479                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12480                                           "Failed to allocate CT object");
12481         ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12482         if (mlx5_aso_ct_update_by_wqe(sh, ct, pro))
12483                 return rte_flow_error_set(error, EBUSY,
12484                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12485                                           "Failed to update CT");
12486         ct->is_original = !!pro->is_original_dir;
12487         ct->peer = pro->peer_port;
12488         return idx;
12489 }
12490
12491 /**
12492  * Fill the flow with DV spec, lock free
12493  * (mutex should be acquired by caller).
12494  *
12495  * @param[in] dev
12496  *   Pointer to rte_eth_dev structure.
12497  * @param[in, out] dev_flow
12498  *   Pointer to the sub flow.
12499  * @param[in] attr
12500  *   Pointer to the flow attributes.
12501  * @param[in] items
12502  *   Pointer to the list of items.
12503  * @param[in] actions
12504  *   Pointer to the list of actions.
12505  * @param[out] error
12506  *   Pointer to the error structure.
12507  *
12508  * @return
12509  *   0 on success, a negative errno value otherwise and rte_errno is set.
12510  */
12511 static int
12512 flow_dv_translate(struct rte_eth_dev *dev,
12513                   struct mlx5_flow *dev_flow,
12514                   const struct rte_flow_attr *attr,
12515                   const struct rte_flow_item items[],
12516                   const struct rte_flow_action actions[],
12517                   struct rte_flow_error *error)
12518 {
12519         struct mlx5_priv *priv = dev->data->dev_private;
12520         struct mlx5_dev_config *dev_conf = &priv->config;
12521         struct rte_flow *flow = dev_flow->flow;
12522         struct mlx5_flow_handle *handle = dev_flow->handle;
12523         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
12524         struct mlx5_flow_rss_desc *rss_desc;
12525         uint64_t item_flags = 0;
12526         uint64_t last_item = 0;
12527         uint64_t action_flags = 0;
12528         struct mlx5_flow_dv_matcher matcher = {
12529                 .mask = {
12530                         .size = sizeof(matcher.mask.buf),
12531                 },
12532         };
12533         int actions_n = 0;
12534         bool actions_end = false;
12535         union {
12536                 struct mlx5_flow_dv_modify_hdr_resource res;
12537                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
12538                             sizeof(struct mlx5_modification_cmd) *
12539                             (MLX5_MAX_MODIFY_NUM + 1)];
12540         } mhdr_dummy;
12541         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
12542         const struct rte_flow_action_count *count = NULL;
12543         const struct rte_flow_action_age *non_shared_age = NULL;
12544         union flow_dv_attr flow_attr = { .attr = 0 };
12545         uint32_t tag_be;
12546         union mlx5_flow_tbl_key tbl_key;
12547         uint32_t modify_action_position = UINT32_MAX;
12548         void *match_mask = matcher.mask.buf;
12549         void *match_value = dev_flow->dv.value.buf;
12550         uint8_t next_protocol = 0xff;
12551         struct rte_vlan_hdr vlan = { 0 };
12552         struct mlx5_flow_dv_dest_array_resource mdest_res;
12553         struct mlx5_flow_dv_sample_resource sample_res;
12554         void *sample_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
12555         const struct rte_flow_action_sample *sample = NULL;
12556         struct mlx5_flow_sub_actions_list *sample_act;
12557         uint32_t sample_act_pos = UINT32_MAX;
12558         uint32_t age_act_pos = UINT32_MAX;
12559         uint32_t num_of_dest = 0;
12560         int tmp_actions_n = 0;
12561         uint32_t table;
12562         int ret = 0;
12563         const struct mlx5_flow_tunnel *tunnel = NULL;
12564         struct flow_grp_info grp_info = {
12565                 .external = !!dev_flow->external,
12566                 .transfer = !!attr->transfer,
12567                 .fdb_def_rule = !!priv->fdb_def_rule,
12568                 .skip_scale = dev_flow->skip_scale &
12569                         (1 << MLX5_SCALE_FLOW_GROUP_BIT),
12570                 .std_tbl_fix = true,
12571         };
12572         const struct rte_flow_item *head_item = items;
12573
12574         if (!wks)
12575                 return rte_flow_error_set(error, ENOMEM,
12576                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12577                                           NULL,
12578                                           "failed to push flow workspace");
12579         rss_desc = &wks->rss_desc;
12580         memset(&mdest_res, 0, sizeof(struct mlx5_flow_dv_dest_array_resource));
12581         memset(&sample_res, 0, sizeof(struct mlx5_flow_dv_sample_resource));
12582         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12583                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12584         /* update normal path action resource into last index of array */
12585         sample_act = &mdest_res.sample_act[MLX5_MAX_DEST_NUM - 1];
12586         if (is_tunnel_offload_active(dev)) {
12587                 if (dev_flow->tunnel) {
12588                         RTE_VERIFY(dev_flow->tof_type ==
12589                                    MLX5_TUNNEL_OFFLOAD_MISS_RULE);
12590                         tunnel = dev_flow->tunnel;
12591                 } else {
12592                         tunnel = mlx5_get_tof(items, actions,
12593                                               &dev_flow->tof_type);
12594                         dev_flow->tunnel = tunnel;
12595                 }
12596                 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
12597                                         (dev, attr, tunnel, dev_flow->tof_type);
12598         }
12599         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12600                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12601         ret = mlx5_flow_group_to_table(dev, tunnel, attr->group, &table,
12602                                        &grp_info, error);
12603         if (ret)
12604                 return ret;
12605         dev_flow->dv.group = table;
12606         if (attr->transfer)
12607                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
12608         /* number of actions must be set to 0 in case of dirty stack. */
12609         mhdr_res->actions_num = 0;
12610         if (is_flow_tunnel_match_rule(dev_flow->tof_type)) {
12611                 /*
12612                  * do not add decap action if match rule drops packet
12613                  * HW rejects rules with decap & drop
12614                  *
12615                  * if tunnel match rule was inserted before matching tunnel set
12616                  * rule flow table used in the match rule must be registered.
12617                  * current implementation handles that in the
12618                  * flow_dv_match_register() at the function end.
12619                  */
12620                 bool add_decap = true;
12621                 const struct rte_flow_action *ptr = actions;
12622
12623                 for (; ptr->type != RTE_FLOW_ACTION_TYPE_END; ptr++) {
12624                         if (ptr->type == RTE_FLOW_ACTION_TYPE_DROP) {
12625                                 add_decap = false;
12626                                 break;
12627                         }
12628                 }
12629                 if (add_decap) {
12630                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
12631                                                            attr->transfer,
12632                                                            error))
12633                                 return -rte_errno;
12634                         dev_flow->dv.actions[actions_n++] =
12635                                         dev_flow->dv.encap_decap->action;
12636                         action_flags |= MLX5_FLOW_ACTION_DECAP;
12637                 }
12638         }
12639         for (; !actions_end ; actions++) {
12640                 const struct rte_flow_action_queue *queue;
12641                 const struct rte_flow_action_rss *rss;
12642                 const struct rte_flow_action *action = actions;
12643                 const uint8_t *rss_key;
12644                 struct mlx5_flow_tbl_resource *tbl;
12645                 struct mlx5_aso_age_action *age_act;
12646                 struct mlx5_flow_counter *cnt_act;
12647                 uint32_t port_id = 0;
12648                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
12649                 int action_type = actions->type;
12650                 const struct rte_flow_action *found_action = NULL;
12651                 uint32_t jump_group = 0;
12652                 uint32_t owner_idx;
12653                 struct mlx5_aso_ct_action *ct;
12654
12655                 if (!mlx5_flow_os_action_supported(action_type))
12656                         return rte_flow_error_set(error, ENOTSUP,
12657                                                   RTE_FLOW_ERROR_TYPE_ACTION,
12658                                                   actions,
12659                                                   "action not supported");
12660                 switch (action_type) {
12661                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
12662                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
12663                         break;
12664                 case RTE_FLOW_ACTION_TYPE_VOID:
12665                         break;
12666                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
12667                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
12668                         if (flow_dv_translate_action_port_id(dev, action,
12669                                                              &port_id, error))
12670                                 return -rte_errno;
12671                         port_id_resource.port_id = port_id;
12672                         MLX5_ASSERT(!handle->rix_port_id_action);
12673                         if (flow_dv_port_id_action_resource_register
12674                             (dev, &port_id_resource, dev_flow, error))
12675                                 return -rte_errno;
12676                         dev_flow->dv.actions[actions_n++] =
12677                                         dev_flow->dv.port_id_action->action;
12678                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12679                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_PORT_ID;
12680                         sample_act->action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12681                         num_of_dest++;
12682                         break;
12683                 case RTE_FLOW_ACTION_TYPE_FLAG:
12684                         action_flags |= MLX5_FLOW_ACTION_FLAG;
12685                         dev_flow->handle->mark = 1;
12686                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12687                                 struct rte_flow_action_mark mark = {
12688                                         .id = MLX5_FLOW_MARK_DEFAULT,
12689                                 };
12690
12691                                 if (flow_dv_convert_action_mark(dev, &mark,
12692                                                                 mhdr_res,
12693                                                                 error))
12694                                         return -rte_errno;
12695                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12696                                 break;
12697                         }
12698                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
12699                         /*
12700                          * Only one FLAG or MARK is supported per device flow
12701                          * right now. So the pointer to the tag resource must be
12702                          * zero before the register process.
12703                          */
12704                         MLX5_ASSERT(!handle->dvh.rix_tag);
12705                         if (flow_dv_tag_resource_register(dev, tag_be,
12706                                                           dev_flow, error))
12707                                 return -rte_errno;
12708                         MLX5_ASSERT(dev_flow->dv.tag_resource);
12709                         dev_flow->dv.actions[actions_n++] =
12710                                         dev_flow->dv.tag_resource->action;
12711                         break;
12712                 case RTE_FLOW_ACTION_TYPE_MARK:
12713                         action_flags |= MLX5_FLOW_ACTION_MARK;
12714                         dev_flow->handle->mark = 1;
12715                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12716                                 const struct rte_flow_action_mark *mark =
12717                                         (const struct rte_flow_action_mark *)
12718                                                 actions->conf;
12719
12720                                 if (flow_dv_convert_action_mark(dev, mark,
12721                                                                 mhdr_res,
12722                                                                 error))
12723                                         return -rte_errno;
12724                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12725                                 break;
12726                         }
12727                         /* Fall-through */
12728                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
12729                         /* Legacy (non-extensive) MARK action. */
12730                         tag_be = mlx5_flow_mark_set
12731                               (((const struct rte_flow_action_mark *)
12732                                (actions->conf))->id);
12733                         MLX5_ASSERT(!handle->dvh.rix_tag);
12734                         if (flow_dv_tag_resource_register(dev, tag_be,
12735                                                           dev_flow, error))
12736                                 return -rte_errno;
12737                         MLX5_ASSERT(dev_flow->dv.tag_resource);
12738                         dev_flow->dv.actions[actions_n++] =
12739                                         dev_flow->dv.tag_resource->action;
12740                         break;
12741                 case RTE_FLOW_ACTION_TYPE_SET_META:
12742                         if (flow_dv_convert_action_set_meta
12743                                 (dev, mhdr_res, attr,
12744                                  (const struct rte_flow_action_set_meta *)
12745                                   actions->conf, error))
12746                                 return -rte_errno;
12747                         action_flags |= MLX5_FLOW_ACTION_SET_META;
12748                         break;
12749                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
12750                         if (flow_dv_convert_action_set_tag
12751                                 (dev, mhdr_res,
12752                                  (const struct rte_flow_action_set_tag *)
12753                                   actions->conf, error))
12754                                 return -rte_errno;
12755                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
12756                         break;
12757                 case RTE_FLOW_ACTION_TYPE_DROP:
12758                         action_flags |= MLX5_FLOW_ACTION_DROP;
12759                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_DROP;
12760                         break;
12761                 case RTE_FLOW_ACTION_TYPE_QUEUE:
12762                         queue = actions->conf;
12763                         rss_desc->queue_num = 1;
12764                         rss_desc->queue[0] = queue->index;
12765                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
12766                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
12767                         sample_act->action_flags |= MLX5_FLOW_ACTION_QUEUE;
12768                         num_of_dest++;
12769                         break;
12770                 case RTE_FLOW_ACTION_TYPE_RSS:
12771                         rss = actions->conf;
12772                         memcpy(rss_desc->queue, rss->queue,
12773                                rss->queue_num * sizeof(uint16_t));
12774                         rss_desc->queue_num = rss->queue_num;
12775                         /* NULL RSS key indicates default RSS key. */
12776                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
12777                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
12778                         /*
12779                          * rss->level and rss.types should be set in advance
12780                          * when expanding items for RSS.
12781                          */
12782                         action_flags |= MLX5_FLOW_ACTION_RSS;
12783                         dev_flow->handle->fate_action = rss_desc->shared_rss ?
12784                                 MLX5_FLOW_FATE_SHARED_RSS :
12785                                 MLX5_FLOW_FATE_QUEUE;
12786                         break;
12787                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
12788                         owner_idx = (uint32_t)(uintptr_t)action->conf;
12789                         age_act = flow_aso_age_get_by_idx(dev, owner_idx);
12790                         if (flow->age == 0) {
12791                                 flow->age = owner_idx;
12792                                 __atomic_fetch_add(&age_act->refcnt, 1,
12793                                                    __ATOMIC_RELAXED);
12794                         }
12795                         age_act_pos = actions_n++;
12796                         action_flags |= MLX5_FLOW_ACTION_AGE;
12797                         break;
12798                 case RTE_FLOW_ACTION_TYPE_AGE:
12799                         non_shared_age = action->conf;
12800                         age_act_pos = actions_n++;
12801                         action_flags |= MLX5_FLOW_ACTION_AGE;
12802                         break;
12803                 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
12804                         owner_idx = (uint32_t)(uintptr_t)action->conf;
12805                         cnt_act = flow_dv_counter_get_by_idx(dev, owner_idx,
12806                                                              NULL);
12807                         MLX5_ASSERT(cnt_act != NULL);
12808                         /**
12809                          * When creating meter drop flow in drop table, the
12810                          * counter should not overwrite the rte flow counter.
12811                          */
12812                         if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
12813                             dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP) {
12814                                 dev_flow->dv.actions[actions_n++] =
12815                                                         cnt_act->action;
12816                         } else {
12817                                 if (flow->counter == 0) {
12818                                         flow->counter = owner_idx;
12819                                         __atomic_fetch_add
12820                                                 (&cnt_act->shared_info.refcnt,
12821                                                  1, __ATOMIC_RELAXED);
12822                                 }
12823                                 /* Save information first, will apply later. */
12824                                 action_flags |= MLX5_FLOW_ACTION_COUNT;
12825                         }
12826                         break;
12827                 case RTE_FLOW_ACTION_TYPE_COUNT:
12828                         if (!dev_conf->devx) {
12829                                 return rte_flow_error_set
12830                                               (error, ENOTSUP,
12831                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12832                                                NULL,
12833                                                "count action not supported");
12834                         }
12835                         /* Save information first, will apply later. */
12836                         count = action->conf;
12837                         action_flags |= MLX5_FLOW_ACTION_COUNT;
12838                         break;
12839                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
12840                         dev_flow->dv.actions[actions_n++] =
12841                                                 priv->sh->pop_vlan_action;
12842                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
12843                         break;
12844                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
12845                         if (!(action_flags &
12846                               MLX5_FLOW_ACTION_OF_SET_VLAN_VID))
12847                                 flow_dev_get_vlan_info_from_items(items, &vlan);
12848                         vlan.eth_proto = rte_be_to_cpu_16
12849                              ((((const struct rte_flow_action_of_push_vlan *)
12850                                                    actions->conf)->ethertype));
12851                         found_action = mlx5_flow_find_action
12852                                         (actions + 1,
12853                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
12854                         if (found_action)
12855                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12856                         found_action = mlx5_flow_find_action
12857                                         (actions + 1,
12858                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
12859                         if (found_action)
12860                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12861                         if (flow_dv_create_action_push_vlan
12862                                             (dev, attr, &vlan, dev_flow, error))
12863                                 return -rte_errno;
12864                         dev_flow->dv.actions[actions_n++] =
12865                                         dev_flow->dv.push_vlan_res->action;
12866                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
12867                         break;
12868                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
12869                         /* of_vlan_push action handled this action */
12870                         MLX5_ASSERT(action_flags &
12871                                     MLX5_FLOW_ACTION_OF_PUSH_VLAN);
12872                         break;
12873                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
12874                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
12875                                 break;
12876                         flow_dev_get_vlan_info_from_items(items, &vlan);
12877                         mlx5_update_vlan_vid_pcp(actions, &vlan);
12878                         /* If no VLAN push - this is a modify header action */
12879                         if (flow_dv_convert_action_modify_vlan_vid
12880                                                 (mhdr_res, actions, error))
12881                                 return -rte_errno;
12882                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
12883                         break;
12884                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
12885                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
12886                         if (flow_dv_create_action_l2_encap(dev, actions,
12887                                                            dev_flow,
12888                                                            attr->transfer,
12889                                                            error))
12890                                 return -rte_errno;
12891                         dev_flow->dv.actions[actions_n++] =
12892                                         dev_flow->dv.encap_decap->action;
12893                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
12894                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12895                                 sample_act->action_flags |=
12896                                                         MLX5_FLOW_ACTION_ENCAP;
12897                         break;
12898                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
12899                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
12900                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
12901                                                            attr->transfer,
12902                                                            error))
12903                                 return -rte_errno;
12904                         dev_flow->dv.actions[actions_n++] =
12905                                         dev_flow->dv.encap_decap->action;
12906                         action_flags |= MLX5_FLOW_ACTION_DECAP;
12907                         break;
12908                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
12909                         /* Handle encap with preceding decap. */
12910                         if (action_flags & MLX5_FLOW_ACTION_DECAP) {
12911                                 if (flow_dv_create_action_raw_encap
12912                                         (dev, actions, dev_flow, attr, error))
12913                                         return -rte_errno;
12914                                 dev_flow->dv.actions[actions_n++] =
12915                                         dev_flow->dv.encap_decap->action;
12916                         } else {
12917                                 /* Handle encap without preceding decap. */
12918                                 if (flow_dv_create_action_l2_encap
12919                                     (dev, actions, dev_flow, attr->transfer,
12920                                      error))
12921                                         return -rte_errno;
12922                                 dev_flow->dv.actions[actions_n++] =
12923                                         dev_flow->dv.encap_decap->action;
12924                         }
12925                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
12926                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12927                                 sample_act->action_flags |=
12928                                                         MLX5_FLOW_ACTION_ENCAP;
12929                         break;
12930                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
12931                         while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
12932                                 ;
12933                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
12934                                 if (flow_dv_create_action_l2_decap
12935                                     (dev, dev_flow, attr->transfer, error))
12936                                         return -rte_errno;
12937                                 dev_flow->dv.actions[actions_n++] =
12938                                         dev_flow->dv.encap_decap->action;
12939                         }
12940                         /* If decap is followed by encap, handle it at encap. */
12941                         action_flags |= MLX5_FLOW_ACTION_DECAP;
12942                         break;
12943                 case MLX5_RTE_FLOW_ACTION_TYPE_JUMP:
12944                         dev_flow->dv.actions[actions_n++] =
12945                                 (void *)(uintptr_t)action->conf;
12946                         action_flags |= MLX5_FLOW_ACTION_JUMP;
12947                         break;
12948                 case RTE_FLOW_ACTION_TYPE_JUMP:
12949                         jump_group = ((const struct rte_flow_action_jump *)
12950                                                         action->conf)->group;
12951                         grp_info.std_tbl_fix = 0;
12952                         if (dev_flow->skip_scale &
12953                                 (1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT))
12954                                 grp_info.skip_scale = 1;
12955                         else
12956                                 grp_info.skip_scale = 0;
12957                         ret = mlx5_flow_group_to_table(dev, tunnel,
12958                                                        jump_group,
12959                                                        &table,
12960                                                        &grp_info, error);
12961                         if (ret)
12962                                 return ret;
12963                         tbl = flow_dv_tbl_resource_get(dev, table, attr->egress,
12964                                                        attr->transfer,
12965                                                        !!dev_flow->external,
12966                                                        tunnel, jump_group, 0,
12967                                                        0, error);
12968                         if (!tbl)
12969                                 return rte_flow_error_set
12970                                                 (error, errno,
12971                                                  RTE_FLOW_ERROR_TYPE_ACTION,
12972                                                  NULL,
12973                                                  "cannot create jump action.");
12974                         if (flow_dv_jump_tbl_resource_register
12975                             (dev, tbl, dev_flow, error)) {
12976                                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
12977                                 return rte_flow_error_set
12978                                                 (error, errno,
12979                                                  RTE_FLOW_ERROR_TYPE_ACTION,
12980                                                  NULL,
12981                                                  "cannot create jump action.");
12982                         }
12983                         dev_flow->dv.actions[actions_n++] =
12984                                         dev_flow->dv.jump->action;
12985                         action_flags |= MLX5_FLOW_ACTION_JUMP;
12986                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_JUMP;
12987                         sample_act->action_flags |= MLX5_FLOW_ACTION_JUMP;
12988                         num_of_dest++;
12989                         break;
12990                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
12991                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
12992                         if (flow_dv_convert_action_modify_mac
12993                                         (mhdr_res, actions, error))
12994                                 return -rte_errno;
12995                         action_flags |= actions->type ==
12996                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
12997                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
12998                                         MLX5_FLOW_ACTION_SET_MAC_DST;
12999                         break;
13000                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
13001                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
13002                         if (flow_dv_convert_action_modify_ipv4
13003                                         (mhdr_res, actions, error))
13004                                 return -rte_errno;
13005                         action_flags |= actions->type ==
13006                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
13007                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
13008                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
13009                         break;
13010                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
13011                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
13012                         if (flow_dv_convert_action_modify_ipv6
13013                                         (mhdr_res, actions, error))
13014                                 return -rte_errno;
13015                         action_flags |= actions->type ==
13016                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
13017                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
13018                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
13019                         break;
13020                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
13021                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
13022                         if (flow_dv_convert_action_modify_tp
13023                                         (mhdr_res, actions, items,
13024                                          &flow_attr, dev_flow, !!(action_flags &
13025                                          MLX5_FLOW_ACTION_DECAP), error))
13026                                 return -rte_errno;
13027                         action_flags |= actions->type ==
13028                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
13029                                         MLX5_FLOW_ACTION_SET_TP_SRC :
13030                                         MLX5_FLOW_ACTION_SET_TP_DST;
13031                         break;
13032                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
13033                         if (flow_dv_convert_action_modify_dec_ttl
13034                                         (mhdr_res, items, &flow_attr, dev_flow,
13035                                          !!(action_flags &
13036                                          MLX5_FLOW_ACTION_DECAP), error))
13037                                 return -rte_errno;
13038                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
13039                         break;
13040                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
13041                         if (flow_dv_convert_action_modify_ttl
13042                                         (mhdr_res, actions, items, &flow_attr,
13043                                          dev_flow, !!(action_flags &
13044                                          MLX5_FLOW_ACTION_DECAP), error))
13045                                 return -rte_errno;
13046                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
13047                         break;
13048                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
13049                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
13050                         if (flow_dv_convert_action_modify_tcp_seq
13051                                         (mhdr_res, actions, error))
13052                                 return -rte_errno;
13053                         action_flags |= actions->type ==
13054                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
13055                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
13056                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
13057                         break;
13058
13059                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
13060                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
13061                         if (flow_dv_convert_action_modify_tcp_ack
13062                                         (mhdr_res, actions, error))
13063                                 return -rte_errno;
13064                         action_flags |= actions->type ==
13065                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
13066                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
13067                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
13068                         break;
13069                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
13070                         if (flow_dv_convert_action_set_reg
13071                                         (mhdr_res, actions, error))
13072                                 return -rte_errno;
13073                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13074                         break;
13075                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
13076                         if (flow_dv_convert_action_copy_mreg
13077                                         (dev, mhdr_res, actions, error))
13078                                 return -rte_errno;
13079                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13080                         break;
13081                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
13082                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
13083                         dev_flow->handle->fate_action =
13084                                         MLX5_FLOW_FATE_DEFAULT_MISS;
13085                         break;
13086                 case RTE_FLOW_ACTION_TYPE_METER:
13087                         if (!wks->fm)
13088                                 return rte_flow_error_set(error, rte_errno,
13089                                         RTE_FLOW_ERROR_TYPE_ACTION,
13090                                         NULL, "Failed to get meter in flow.");
13091                         /* Set the meter action. */
13092                         dev_flow->dv.actions[actions_n++] =
13093                                 wks->fm->meter_action;
13094                         action_flags |= MLX5_FLOW_ACTION_METER;
13095                         break;
13096                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
13097                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
13098                                                               actions, error))
13099                                 return -rte_errno;
13100                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
13101                         break;
13102                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
13103                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
13104                                                               actions, error))
13105                                 return -rte_errno;
13106                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
13107                         break;
13108                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
13109                         sample_act_pos = actions_n;
13110                         sample = (const struct rte_flow_action_sample *)
13111                                  action->conf;
13112                         actions_n++;
13113                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
13114                         /* put encap action into group if work with port id */
13115                         if ((action_flags & MLX5_FLOW_ACTION_ENCAP) &&
13116                             (action_flags & MLX5_FLOW_ACTION_PORT_ID))
13117                                 sample_act->action_flags |=
13118                                                         MLX5_FLOW_ACTION_ENCAP;
13119                         break;
13120                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
13121                         if (flow_dv_convert_action_modify_field
13122                                         (dev, mhdr_res, actions, attr, error))
13123                                 return -rte_errno;
13124                         action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
13125                         break;
13126                 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
13127                         owner_idx = (uint32_t)(uintptr_t)action->conf;
13128                         ct = flow_aso_ct_get_by_idx(dev, owner_idx);
13129                         if (!ct)
13130                                 return rte_flow_error_set(error, EINVAL,
13131                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13132                                                 NULL,
13133                                                 "Failed to get CT object.");
13134                         if (mlx5_aso_ct_available(priv->sh, ct))
13135                                 return rte_flow_error_set(error, rte_errno,
13136                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13137                                                 NULL,
13138                                                 "CT is unavailable.");
13139                         if (ct->is_original)
13140                                 dev_flow->dv.actions[actions_n] =
13141                                                         ct->dr_action_orig;
13142                         else
13143                                 dev_flow->dv.actions[actions_n] =
13144                                                         ct->dr_action_rply;
13145                         if (flow->ct == 0) {
13146                                 flow->indirect_type =
13147                                                 MLX5_INDIRECT_ACTION_TYPE_CT;
13148                                 flow->ct = owner_idx;
13149                                 __atomic_fetch_add(&ct->refcnt, 1,
13150                                                    __ATOMIC_RELAXED);
13151                         }
13152                         actions_n++;
13153                         action_flags |= MLX5_FLOW_ACTION_CT;
13154                         break;
13155                 case RTE_FLOW_ACTION_TYPE_END:
13156                         actions_end = true;
13157                         if (mhdr_res->actions_num) {
13158                                 /* create modify action if needed. */
13159                                 if (flow_dv_modify_hdr_resource_register
13160                                         (dev, mhdr_res, dev_flow, error))
13161                                         return -rte_errno;
13162                                 dev_flow->dv.actions[modify_action_position] =
13163                                         handle->dvh.modify_hdr->action;
13164                         }
13165                         /*
13166                          * Handle AGE and COUNT action by single HW counter
13167                          * when they are not shared.
13168                          */
13169                         if (action_flags & MLX5_FLOW_ACTION_AGE) {
13170                                 if ((non_shared_age && count) ||
13171                                     !(priv->sh->flow_hit_aso_en &&
13172                                       (attr->group || attr->transfer))) {
13173                                         /* Creates age by counters. */
13174                                         cnt_act = flow_dv_prepare_counter
13175                                                                 (dev, dev_flow,
13176                                                                  flow, count,
13177                                                                  non_shared_age,
13178                                                                  error);
13179                                         if (!cnt_act)
13180                                                 return -rte_errno;
13181                                         dev_flow->dv.actions[age_act_pos] =
13182                                                                 cnt_act->action;
13183                                         break;
13184                                 }
13185                                 if (!flow->age && non_shared_age) {
13186                                         flow->age = flow_dv_aso_age_alloc
13187                                                                 (dev, error);
13188                                         if (!flow->age)
13189                                                 return -rte_errno;
13190                                         flow_dv_aso_age_params_init
13191                                                     (dev, flow->age,
13192                                                      non_shared_age->context ?
13193                                                      non_shared_age->context :
13194                                                      (void *)(uintptr_t)
13195                                                      (dev_flow->flow_idx),
13196                                                      non_shared_age->timeout);
13197                                 }
13198                                 age_act = flow_aso_age_get_by_idx(dev,
13199                                                                   flow->age);
13200                                 dev_flow->dv.actions[age_act_pos] =
13201                                                              age_act->dr_action;
13202                         }
13203                         if (action_flags & MLX5_FLOW_ACTION_COUNT) {
13204                                 /*
13205                                  * Create one count action, to be used
13206                                  * by all sub-flows.
13207                                  */
13208                                 cnt_act = flow_dv_prepare_counter(dev, dev_flow,
13209                                                                   flow, count,
13210                                                                   NULL, error);
13211                                 if (!cnt_act)
13212                                         return -rte_errno;
13213                                 dev_flow->dv.actions[actions_n++] =
13214                                                                 cnt_act->action;
13215                         }
13216                 default:
13217                         break;
13218                 }
13219                 if (mhdr_res->actions_num &&
13220                     modify_action_position == UINT32_MAX)
13221                         modify_action_position = actions_n++;
13222         }
13223         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
13224                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
13225                 int item_type = items->type;
13226
13227                 if (!mlx5_flow_os_item_supported(item_type))
13228                         return rte_flow_error_set(error, ENOTSUP,
13229                                                   RTE_FLOW_ERROR_TYPE_ITEM,
13230                                                   NULL, "item not supported");
13231                 switch (item_type) {
13232                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
13233                         flow_dv_translate_item_port_id
13234                                 (dev, match_mask, match_value, items, attr);
13235                         last_item = MLX5_FLOW_ITEM_PORT_ID;
13236                         break;
13237                 case RTE_FLOW_ITEM_TYPE_ETH:
13238                         flow_dv_translate_item_eth(match_mask, match_value,
13239                                                    items, tunnel,
13240                                                    dev_flow->dv.group);
13241                         matcher.priority = action_flags &
13242                                         MLX5_FLOW_ACTION_DEFAULT_MISS &&
13243                                         !dev_flow->external ?
13244                                         MLX5_PRIORITY_MAP_L3 :
13245                                         MLX5_PRIORITY_MAP_L2;
13246                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
13247                                              MLX5_FLOW_LAYER_OUTER_L2;
13248                         break;
13249                 case RTE_FLOW_ITEM_TYPE_VLAN:
13250                         flow_dv_translate_item_vlan(dev_flow,
13251                                                     match_mask, match_value,
13252                                                     items, tunnel,
13253                                                     dev_flow->dv.group);
13254                         matcher.priority = MLX5_PRIORITY_MAP_L2;
13255                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
13256                                               MLX5_FLOW_LAYER_INNER_VLAN) :
13257                                              (MLX5_FLOW_LAYER_OUTER_L2 |
13258                                               MLX5_FLOW_LAYER_OUTER_VLAN);
13259                         break;
13260                 case RTE_FLOW_ITEM_TYPE_IPV4:
13261                         mlx5_flow_tunnel_ip_check(items, next_protocol,
13262                                                   &item_flags, &tunnel);
13263                         flow_dv_translate_item_ipv4(match_mask, match_value,
13264                                                     items, tunnel,
13265                                                     dev_flow->dv.group);
13266                         matcher.priority = MLX5_PRIORITY_MAP_L3;
13267                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
13268                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
13269                         if (items->mask != NULL &&
13270                             ((const struct rte_flow_item_ipv4 *)
13271                              items->mask)->hdr.next_proto_id) {
13272                                 next_protocol =
13273                                         ((const struct rte_flow_item_ipv4 *)
13274                                          (items->spec))->hdr.next_proto_id;
13275                                 next_protocol &=
13276                                         ((const struct rte_flow_item_ipv4 *)
13277                                          (items->mask))->hdr.next_proto_id;
13278                         } else {
13279                                 /* Reset for inner layer. */
13280                                 next_protocol = 0xff;
13281                         }
13282                         break;
13283                 case RTE_FLOW_ITEM_TYPE_IPV6:
13284                         mlx5_flow_tunnel_ip_check(items, next_protocol,
13285                                                   &item_flags, &tunnel);
13286                         flow_dv_translate_item_ipv6(match_mask, match_value,
13287                                                     items, tunnel,
13288                                                     dev_flow->dv.group);
13289                         matcher.priority = MLX5_PRIORITY_MAP_L3;
13290                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
13291                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
13292                         if (items->mask != NULL &&
13293                             ((const struct rte_flow_item_ipv6 *)
13294                              items->mask)->hdr.proto) {
13295                                 next_protocol =
13296                                         ((const struct rte_flow_item_ipv6 *)
13297                                          items->spec)->hdr.proto;
13298                                 next_protocol &=
13299                                         ((const struct rte_flow_item_ipv6 *)
13300                                          items->mask)->hdr.proto;
13301                         } else {
13302                                 /* Reset for inner layer. */
13303                                 next_protocol = 0xff;
13304                         }
13305                         break;
13306                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
13307                         flow_dv_translate_item_ipv6_frag_ext(match_mask,
13308                                                              match_value,
13309                                                              items, tunnel);
13310                         last_item = tunnel ?
13311                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
13312                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
13313                         if (items->mask != NULL &&
13314                             ((const struct rte_flow_item_ipv6_frag_ext *)
13315                              items->mask)->hdr.next_header) {
13316                                 next_protocol =
13317                                 ((const struct rte_flow_item_ipv6_frag_ext *)
13318                                  items->spec)->hdr.next_header;
13319                                 next_protocol &=
13320                                 ((const struct rte_flow_item_ipv6_frag_ext *)
13321                                  items->mask)->hdr.next_header;
13322                         } else {
13323                                 /* Reset for inner layer. */
13324                                 next_protocol = 0xff;
13325                         }
13326                         break;
13327                 case RTE_FLOW_ITEM_TYPE_TCP:
13328                         flow_dv_translate_item_tcp(match_mask, match_value,
13329                                                    items, tunnel);
13330                         matcher.priority = MLX5_PRIORITY_MAP_L4;
13331                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
13332                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
13333                         break;
13334                 case RTE_FLOW_ITEM_TYPE_UDP:
13335                         flow_dv_translate_item_udp(match_mask, match_value,
13336                                                    items, tunnel);
13337                         matcher.priority = MLX5_PRIORITY_MAP_L4;
13338                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
13339                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
13340                         break;
13341                 case RTE_FLOW_ITEM_TYPE_GRE:
13342                         flow_dv_translate_item_gre(match_mask, match_value,
13343                                                    items, tunnel);
13344                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13345                         last_item = MLX5_FLOW_LAYER_GRE;
13346                         break;
13347                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
13348                         flow_dv_translate_item_gre_key(match_mask,
13349                                                        match_value, items);
13350                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
13351                         break;
13352                 case RTE_FLOW_ITEM_TYPE_NVGRE:
13353                         flow_dv_translate_item_nvgre(match_mask, match_value,
13354                                                      items, tunnel);
13355                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13356                         last_item = MLX5_FLOW_LAYER_GRE;
13357                         break;
13358                 case RTE_FLOW_ITEM_TYPE_VXLAN:
13359                         flow_dv_translate_item_vxlan(dev, attr,
13360                                                      match_mask, match_value,
13361                                                      items, tunnel);
13362                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13363                         last_item = MLX5_FLOW_LAYER_VXLAN;
13364                         break;
13365                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
13366                         flow_dv_translate_item_vxlan_gpe(match_mask,
13367                                                          match_value, items,
13368                                                          tunnel);
13369                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13370                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
13371                         break;
13372                 case RTE_FLOW_ITEM_TYPE_GENEVE:
13373                         flow_dv_translate_item_geneve(match_mask, match_value,
13374                                                       items, tunnel);
13375                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13376                         last_item = MLX5_FLOW_LAYER_GENEVE;
13377                         break;
13378                 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
13379                         ret = flow_dv_translate_item_geneve_opt(dev, match_mask,
13380                                                           match_value,
13381                                                           items, error);
13382                         if (ret)
13383                                 return rte_flow_error_set(error, -ret,
13384                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13385                                         "cannot create GENEVE TLV option");
13386                         flow->geneve_tlv_option = 1;
13387                         last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
13388                         break;
13389                 case RTE_FLOW_ITEM_TYPE_MPLS:
13390                         flow_dv_translate_item_mpls(match_mask, match_value,
13391                                                     items, last_item, tunnel);
13392                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13393                         last_item = MLX5_FLOW_LAYER_MPLS;
13394                         break;
13395                 case RTE_FLOW_ITEM_TYPE_MARK:
13396                         flow_dv_translate_item_mark(dev, match_mask,
13397                                                     match_value, items);
13398                         last_item = MLX5_FLOW_ITEM_MARK;
13399                         break;
13400                 case RTE_FLOW_ITEM_TYPE_META:
13401                         flow_dv_translate_item_meta(dev, match_mask,
13402                                                     match_value, attr, items);
13403                         last_item = MLX5_FLOW_ITEM_METADATA;
13404                         break;
13405                 case RTE_FLOW_ITEM_TYPE_ICMP:
13406                         flow_dv_translate_item_icmp(match_mask, match_value,
13407                                                     items, tunnel);
13408                         last_item = MLX5_FLOW_LAYER_ICMP;
13409                         break;
13410                 case RTE_FLOW_ITEM_TYPE_ICMP6:
13411                         flow_dv_translate_item_icmp6(match_mask, match_value,
13412                                                       items, tunnel);
13413                         last_item = MLX5_FLOW_LAYER_ICMP6;
13414                         break;
13415                 case RTE_FLOW_ITEM_TYPE_TAG:
13416                         flow_dv_translate_item_tag(dev, match_mask,
13417                                                    match_value, items);
13418                         last_item = MLX5_FLOW_ITEM_TAG;
13419                         break;
13420                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
13421                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
13422                                                         match_value, items);
13423                         last_item = MLX5_FLOW_ITEM_TAG;
13424                         break;
13425                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
13426                         flow_dv_translate_item_tx_queue(dev, match_mask,
13427                                                         match_value,
13428                                                         items);
13429                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
13430                         break;
13431                 case RTE_FLOW_ITEM_TYPE_GTP:
13432                         flow_dv_translate_item_gtp(match_mask, match_value,
13433                                                    items, tunnel);
13434                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13435                         last_item = MLX5_FLOW_LAYER_GTP;
13436                         break;
13437                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
13438                         ret = flow_dv_translate_item_gtp_psc(match_mask,
13439                                                           match_value,
13440                                                           items);
13441                         if (ret)
13442                                 return rte_flow_error_set(error, -ret,
13443                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13444                                         "cannot create GTP PSC item");
13445                         last_item = MLX5_FLOW_LAYER_GTP_PSC;
13446                         break;
13447                 case RTE_FLOW_ITEM_TYPE_ECPRI:
13448                         if (!mlx5_flex_parser_ecpri_exist(dev)) {
13449                                 /* Create it only the first time to be used. */
13450                                 ret = mlx5_flex_parser_ecpri_alloc(dev);
13451                                 if (ret)
13452                                         return rte_flow_error_set
13453                                                 (error, -ret,
13454                                                 RTE_FLOW_ERROR_TYPE_ITEM,
13455                                                 NULL,
13456                                                 "cannot create eCPRI parser");
13457                         }
13458                         flow_dv_translate_item_ecpri(dev, match_mask,
13459                                                      match_value, items,
13460                                                      last_item);
13461                         /* No other protocol should follow eCPRI layer. */
13462                         last_item = MLX5_FLOW_LAYER_ECPRI;
13463                         break;
13464                 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
13465                         flow_dv_translate_item_integrity(match_mask,
13466                                                          match_value,
13467                                                          head_item, items);
13468                         break;
13469                 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
13470                         flow_dv_translate_item_aso_ct(dev, match_mask,
13471                                                       match_value, items);
13472                         break;
13473                 default:
13474                         break;
13475                 }
13476                 item_flags |= last_item;
13477         }
13478         /*
13479          * When E-Switch mode is enabled, we have two cases where we need to
13480          * set the source port manually.
13481          * The first one, is in case of Nic steering rule, and the second is
13482          * E-Switch rule where no port_id item was found. In both cases
13483          * the source port is set according the current port in use.
13484          */
13485         if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
13486             (priv->representor || priv->master)) {
13487                 if (flow_dv_translate_item_port_id(dev, match_mask,
13488                                                    match_value, NULL, attr))
13489                         return -rte_errno;
13490         }
13491 #ifdef RTE_LIBRTE_MLX5_DEBUG
13492         MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
13493                                               dev_flow->dv.value.buf));
13494 #endif
13495         /*
13496          * Layers may be already initialized from prefix flow if this dev_flow
13497          * is the suffix flow.
13498          */
13499         handle->layers |= item_flags;
13500         if (action_flags & MLX5_FLOW_ACTION_RSS)
13501                 flow_dv_hashfields_set(dev_flow, rss_desc);
13502         /* If has RSS action in the sample action, the Sample/Mirror resource
13503          * should be registered after the hash filed be update.
13504          */
13505         if (action_flags & MLX5_FLOW_ACTION_SAMPLE) {
13506                 ret = flow_dv_translate_action_sample(dev,
13507                                                       sample,
13508                                                       dev_flow, attr,
13509                                                       &num_of_dest,
13510                                                       sample_actions,
13511                                                       &sample_res,
13512                                                       error);
13513                 if (ret < 0)
13514                         return ret;
13515                 ret = flow_dv_create_action_sample(dev,
13516                                                    dev_flow,
13517                                                    num_of_dest,
13518                                                    &sample_res,
13519                                                    &mdest_res,
13520                                                    sample_actions,
13521                                                    action_flags,
13522                                                    error);
13523                 if (ret < 0)
13524                         return rte_flow_error_set
13525                                                 (error, rte_errno,
13526                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13527                                                 NULL,
13528                                                 "cannot create sample action");
13529                 if (num_of_dest > 1) {
13530                         dev_flow->dv.actions[sample_act_pos] =
13531                         dev_flow->dv.dest_array_res->action;
13532                 } else {
13533                         dev_flow->dv.actions[sample_act_pos] =
13534                         dev_flow->dv.sample_res->verbs_action;
13535                 }
13536         }
13537         /*
13538          * For multiple destination (sample action with ratio=1), the encap
13539          * action and port id action will be combined into group action.
13540          * So need remove the original these actions in the flow and only
13541          * use the sample action instead of.
13542          */
13543         if (num_of_dest > 1 &&
13544             (sample_act->dr_port_id_action || sample_act->dr_jump_action)) {
13545                 int i;
13546                 void *temp_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
13547
13548                 for (i = 0; i < actions_n; i++) {
13549                         if ((sample_act->dr_encap_action &&
13550                                 sample_act->dr_encap_action ==
13551                                 dev_flow->dv.actions[i]) ||
13552                                 (sample_act->dr_port_id_action &&
13553                                 sample_act->dr_port_id_action ==
13554                                 dev_flow->dv.actions[i]) ||
13555                                 (sample_act->dr_jump_action &&
13556                                 sample_act->dr_jump_action ==
13557                                 dev_flow->dv.actions[i]))
13558                                 continue;
13559                         temp_actions[tmp_actions_n++] = dev_flow->dv.actions[i];
13560                 }
13561                 memcpy((void *)dev_flow->dv.actions,
13562                                 (void *)temp_actions,
13563                                 tmp_actions_n * sizeof(void *));
13564                 actions_n = tmp_actions_n;
13565         }
13566         dev_flow->dv.actions_n = actions_n;
13567         dev_flow->act_flags = action_flags;
13568         if (wks->skip_matcher_reg)
13569                 return 0;
13570         /* Register matcher. */
13571         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
13572                                     matcher.mask.size);
13573         matcher.priority = mlx5_get_matcher_priority(dev, attr,
13574                                         matcher.priority);
13575         /**
13576          * When creating meter drop flow in drop table, using original
13577          * 5-tuple match, the matcher priority should be lower than
13578          * mtr_id matcher.
13579          */
13580         if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
13581             dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP &&
13582             matcher.priority <= MLX5_REG_BITS)
13583                 matcher.priority += MLX5_REG_BITS;
13584         /* reserved field no needs to be set to 0 here. */
13585         tbl_key.is_fdb = attr->transfer;
13586         tbl_key.is_egress = attr->egress;
13587         tbl_key.level = dev_flow->dv.group;
13588         tbl_key.id = dev_flow->dv.table_id;
13589         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow,
13590                                      tunnel, attr->group, error))
13591                 return -rte_errno;
13592         return 0;
13593 }
13594
13595 /**
13596  * Set hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13597  * and tunnel.
13598  *
13599  * @param[in, out] action
13600  *   Shred RSS action holding hash RX queue objects.
13601  * @param[in] hash_fields
13602  *   Defines combination of packet fields to participate in RX hash.
13603  * @param[in] tunnel
13604  *   Tunnel type
13605  * @param[in] hrxq_idx
13606  *   Hash RX queue index to set.
13607  *
13608  * @return
13609  *   0 on success, otherwise negative errno value.
13610  */
13611 static int
13612 __flow_dv_action_rss_hrxq_set(struct mlx5_shared_action_rss *action,
13613                               const uint64_t hash_fields,
13614                               uint32_t hrxq_idx)
13615 {
13616         uint32_t *hrxqs = action->hrxq;
13617
13618         switch (hash_fields & ~IBV_RX_HASH_INNER) {
13619         case MLX5_RSS_HASH_IPV4:
13620                 /* fall-through. */
13621         case MLX5_RSS_HASH_IPV4_DST_ONLY:
13622                 /* fall-through. */
13623         case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13624                 hrxqs[0] = hrxq_idx;
13625                 return 0;
13626         case MLX5_RSS_HASH_IPV4_TCP:
13627                 /* fall-through. */
13628         case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13629                 /* fall-through. */
13630         case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13631                 hrxqs[1] = hrxq_idx;
13632                 return 0;
13633         case MLX5_RSS_HASH_IPV4_UDP:
13634                 /* fall-through. */
13635         case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13636                 /* fall-through. */
13637         case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13638                 hrxqs[2] = hrxq_idx;
13639                 return 0;
13640         case MLX5_RSS_HASH_IPV6:
13641                 /* fall-through. */
13642         case MLX5_RSS_HASH_IPV6_DST_ONLY:
13643                 /* fall-through. */
13644         case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13645                 hrxqs[3] = hrxq_idx;
13646                 return 0;
13647         case MLX5_RSS_HASH_IPV6_TCP:
13648                 /* fall-through. */
13649         case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13650                 /* fall-through. */
13651         case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13652                 hrxqs[4] = hrxq_idx;
13653                 return 0;
13654         case MLX5_RSS_HASH_IPV6_UDP:
13655                 /* fall-through. */
13656         case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13657                 /* fall-through. */
13658         case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13659                 hrxqs[5] = hrxq_idx;
13660                 return 0;
13661         case MLX5_RSS_HASH_NONE:
13662                 hrxqs[6] = hrxq_idx;
13663                 return 0;
13664         default:
13665                 return -1;
13666         }
13667 }
13668
13669 /**
13670  * Look up for hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13671  * and tunnel.
13672  *
13673  * @param[in] dev
13674  *   Pointer to the Ethernet device structure.
13675  * @param[in] idx
13676  *   Shared RSS action ID holding hash RX queue objects.
13677  * @param[in] hash_fields
13678  *   Defines combination of packet fields to participate in RX hash.
13679  * @param[in] tunnel
13680  *   Tunnel type
13681  *
13682  * @return
13683  *   Valid hash RX queue index, otherwise 0.
13684  */
13685 static uint32_t
13686 __flow_dv_action_rss_hrxq_lookup(struct rte_eth_dev *dev, uint32_t idx,
13687                                  const uint64_t hash_fields)
13688 {
13689         struct mlx5_priv *priv = dev->data->dev_private;
13690         struct mlx5_shared_action_rss *shared_rss =
13691             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
13692         const uint32_t *hrxqs = shared_rss->hrxq;
13693
13694         switch (hash_fields & ~IBV_RX_HASH_INNER) {
13695         case MLX5_RSS_HASH_IPV4:
13696                 /* fall-through. */
13697         case MLX5_RSS_HASH_IPV4_DST_ONLY:
13698                 /* fall-through. */
13699         case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13700                 return hrxqs[0];
13701         case MLX5_RSS_HASH_IPV4_TCP:
13702                 /* fall-through. */
13703         case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13704                 /* fall-through. */
13705         case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13706                 return hrxqs[1];
13707         case MLX5_RSS_HASH_IPV4_UDP:
13708                 /* fall-through. */
13709         case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13710                 /* fall-through. */
13711         case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13712                 return hrxqs[2];
13713         case MLX5_RSS_HASH_IPV6:
13714                 /* fall-through. */
13715         case MLX5_RSS_HASH_IPV6_DST_ONLY:
13716                 /* fall-through. */
13717         case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13718                 return hrxqs[3];
13719         case MLX5_RSS_HASH_IPV6_TCP:
13720                 /* fall-through. */
13721         case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13722                 /* fall-through. */
13723         case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13724                 return hrxqs[4];
13725         case MLX5_RSS_HASH_IPV6_UDP:
13726                 /* fall-through. */
13727         case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13728                 /* fall-through. */
13729         case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13730                 return hrxqs[5];
13731         case MLX5_RSS_HASH_NONE:
13732                 return hrxqs[6];
13733         default:
13734                 return 0;
13735         }
13736
13737 }
13738
13739 /**
13740  * Apply the flow to the NIC, lock free,
13741  * (mutex should be acquired by caller).
13742  *
13743  * @param[in] dev
13744  *   Pointer to the Ethernet device structure.
13745  * @param[in, out] flow
13746  *   Pointer to flow structure.
13747  * @param[out] error
13748  *   Pointer to error structure.
13749  *
13750  * @return
13751  *   0 on success, a negative errno value otherwise and rte_errno is set.
13752  */
13753 static int
13754 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
13755               struct rte_flow_error *error)
13756 {
13757         struct mlx5_flow_dv_workspace *dv;
13758         struct mlx5_flow_handle *dh;
13759         struct mlx5_flow_handle_dv *dv_h;
13760         struct mlx5_flow *dev_flow;
13761         struct mlx5_priv *priv = dev->data->dev_private;
13762         uint32_t handle_idx;
13763         int n;
13764         int err;
13765         int idx;
13766         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
13767         struct mlx5_flow_rss_desc *rss_desc = &wks->rss_desc;
13768         uint8_t misc_mask;
13769
13770         MLX5_ASSERT(wks);
13771         for (idx = wks->flow_idx - 1; idx >= 0; idx--) {
13772                 dev_flow = &wks->flows[idx];
13773                 dv = &dev_flow->dv;
13774                 dh = dev_flow->handle;
13775                 dv_h = &dh->dvh;
13776                 n = dv->actions_n;
13777                 if (dh->fate_action == MLX5_FLOW_FATE_DROP) {
13778                         if (dv->transfer) {
13779                                 MLX5_ASSERT(priv->sh->dr_drop_action);
13780                                 dv->actions[n++] = priv->sh->dr_drop_action;
13781                         } else {
13782 #ifdef HAVE_MLX5DV_DR
13783                                 /* DR supports drop action placeholder. */
13784                                 MLX5_ASSERT(priv->sh->dr_drop_action);
13785                                 dv->actions[n++] = dv->group ?
13786                                         priv->sh->dr_drop_action :
13787                                         priv->root_drop_action;
13788 #else
13789                                 /* For DV we use the explicit drop queue. */
13790                                 MLX5_ASSERT(priv->drop_queue.hrxq);
13791                                 dv->actions[n++] =
13792                                                 priv->drop_queue.hrxq->action;
13793 #endif
13794                         }
13795                 } else if ((dh->fate_action == MLX5_FLOW_FATE_QUEUE &&
13796                            !dv_h->rix_sample && !dv_h->rix_dest_array)) {
13797                         struct mlx5_hrxq *hrxq;
13798                         uint32_t hrxq_idx;
13799
13800                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow, rss_desc,
13801                                                     &hrxq_idx);
13802                         if (!hrxq) {
13803                                 rte_flow_error_set
13804                                         (error, rte_errno,
13805                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13806                                          "cannot get hash queue");
13807                                 goto error;
13808                         }
13809                         dh->rix_hrxq = hrxq_idx;
13810                         dv->actions[n++] = hrxq->action;
13811                 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13812                         struct mlx5_hrxq *hrxq = NULL;
13813                         uint32_t hrxq_idx;
13814
13815                         hrxq_idx = __flow_dv_action_rss_hrxq_lookup(dev,
13816                                                 rss_desc->shared_rss,
13817                                                 dev_flow->hash_fields);
13818                         if (hrxq_idx)
13819                                 hrxq = mlx5_ipool_get
13820                                         (priv->sh->ipool[MLX5_IPOOL_HRXQ],
13821                                          hrxq_idx);
13822                         if (!hrxq) {
13823                                 rte_flow_error_set
13824                                         (error, rte_errno,
13825                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13826                                          "cannot get hash queue");
13827                                 goto error;
13828                         }
13829                         dh->rix_srss = rss_desc->shared_rss;
13830                         dv->actions[n++] = hrxq->action;
13831                 } else if (dh->fate_action == MLX5_FLOW_FATE_DEFAULT_MISS) {
13832                         if (!priv->sh->default_miss_action) {
13833                                 rte_flow_error_set
13834                                         (error, rte_errno,
13835                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13836                                          "default miss action not be created.");
13837                                 goto error;
13838                         }
13839                         dv->actions[n++] = priv->sh->default_miss_action;
13840                 }
13841                 misc_mask = flow_dv_matcher_enable(dv->value.buf);
13842                 __flow_dv_adjust_buf_size(&dv->value.size, misc_mask);
13843                 err = mlx5_flow_os_create_flow(dv_h->matcher->matcher_object,
13844                                                (void *)&dv->value, n,
13845                                                dv->actions, &dh->drv_flow);
13846                 if (err) {
13847                         rte_flow_error_set
13848                                 (error, errno,
13849                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
13850                                 NULL,
13851                                 (!priv->config.allow_duplicate_pattern &&
13852                                 errno == EEXIST) ?
13853                                 "duplicating pattern is not allowed" :
13854                                 "hardware refuses to create flow");
13855                         goto error;
13856                 }
13857                 if (priv->vmwa_context &&
13858                     dh->vf_vlan.tag && !dh->vf_vlan.created) {
13859                         /*
13860                          * The rule contains the VLAN pattern.
13861                          * For VF we are going to create VLAN
13862                          * interface to make hypervisor set correct
13863                          * e-Switch vport context.
13864                          */
13865                         mlx5_vlan_vmwa_acquire(dev, &dh->vf_vlan);
13866                 }
13867         }
13868         return 0;
13869 error:
13870         err = rte_errno; /* Save rte_errno before cleanup. */
13871         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
13872                        handle_idx, dh, next) {
13873                 /* hrxq is union, don't clear it if the flag is not set. */
13874                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE && dh->rix_hrxq) {
13875                         mlx5_hrxq_release(dev, dh->rix_hrxq);
13876                         dh->rix_hrxq = 0;
13877                 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13878                         dh->rix_srss = 0;
13879                 }
13880                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
13881                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
13882         }
13883         rte_errno = err; /* Restore rte_errno. */
13884         return -rte_errno;
13885 }
13886
13887 void
13888 flow_dv_matcher_remove_cb(void *tool_ctx __rte_unused,
13889                           struct mlx5_list_entry *entry)
13890 {
13891         struct mlx5_flow_dv_matcher *resource = container_of(entry,
13892                                                              typeof(*resource),
13893                                                              entry);
13894
13895         claim_zero(mlx5_flow_os_destroy_flow_matcher(resource->matcher_object));
13896         mlx5_free(resource);
13897 }
13898
13899 /**
13900  * Release the flow matcher.
13901  *
13902  * @param dev
13903  *   Pointer to Ethernet device.
13904  * @param port_id
13905  *   Index to port ID action resource.
13906  *
13907  * @return
13908  *   1 while a reference on it exists, 0 when freed.
13909  */
13910 static int
13911 flow_dv_matcher_release(struct rte_eth_dev *dev,
13912                         struct mlx5_flow_handle *handle)
13913 {
13914         struct mlx5_flow_dv_matcher *matcher = handle->dvh.matcher;
13915         struct mlx5_flow_tbl_data_entry *tbl = container_of(matcher->tbl,
13916                                                             typeof(*tbl), tbl);
13917         int ret;
13918
13919         MLX5_ASSERT(matcher->matcher_object);
13920         ret = mlx5_list_unregister(tbl->matchers, &matcher->entry);
13921         flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl->tbl);
13922         return ret;
13923 }
13924
13925 void
13926 flow_dv_encap_decap_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
13927 {
13928         struct mlx5_dev_ctx_shared *sh = tool_ctx;
13929         struct mlx5_flow_dv_encap_decap_resource *res =
13930                                        container_of(entry, typeof(*res), entry);
13931
13932         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
13933         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
13934 }
13935
13936 /**
13937  * Release an encap/decap resource.
13938  *
13939  * @param dev
13940  *   Pointer to Ethernet device.
13941  * @param encap_decap_idx
13942  *   Index of encap decap resource.
13943  *
13944  * @return
13945  *   1 while a reference on it exists, 0 when freed.
13946  */
13947 static int
13948 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
13949                                      uint32_t encap_decap_idx)
13950 {
13951         struct mlx5_priv *priv = dev->data->dev_private;
13952         struct mlx5_flow_dv_encap_decap_resource *resource;
13953
13954         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
13955                                   encap_decap_idx);
13956         if (!resource)
13957                 return 0;
13958         MLX5_ASSERT(resource->action);
13959         return mlx5_hlist_unregister(priv->sh->encaps_decaps, &resource->entry);
13960 }
13961
13962 /**
13963  * Release an jump to table action resource.
13964  *
13965  * @param dev
13966  *   Pointer to Ethernet device.
13967  * @param rix_jump
13968  *   Index to the jump action resource.
13969  *
13970  * @return
13971  *   1 while a reference on it exists, 0 when freed.
13972  */
13973 static int
13974 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
13975                                   uint32_t rix_jump)
13976 {
13977         struct mlx5_priv *priv = dev->data->dev_private;
13978         struct mlx5_flow_tbl_data_entry *tbl_data;
13979
13980         tbl_data = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_JUMP],
13981                                   rix_jump);
13982         if (!tbl_data)
13983                 return 0;
13984         return flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl_data->tbl);
13985 }
13986
13987 void
13988 flow_dv_modify_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
13989 {
13990         struct mlx5_flow_dv_modify_hdr_resource *res =
13991                 container_of(entry, typeof(*res), entry);
13992         struct mlx5_dev_ctx_shared *sh = tool_ctx;
13993
13994         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
13995         mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
13996 }
13997
13998 /**
13999  * Release a modify-header resource.
14000  *
14001  * @param dev
14002  *   Pointer to Ethernet device.
14003  * @param handle
14004  *   Pointer to mlx5_flow_handle.
14005  *
14006  * @return
14007  *   1 while a reference on it exists, 0 when freed.
14008  */
14009 static int
14010 flow_dv_modify_hdr_resource_release(struct rte_eth_dev *dev,
14011                                     struct mlx5_flow_handle *handle)
14012 {
14013         struct mlx5_priv *priv = dev->data->dev_private;
14014         struct mlx5_flow_dv_modify_hdr_resource *entry = handle->dvh.modify_hdr;
14015
14016         MLX5_ASSERT(entry->action);
14017         return mlx5_hlist_unregister(priv->sh->modify_cmds, &entry->entry);
14018 }
14019
14020 void
14021 flow_dv_port_id_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14022 {
14023         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14024         struct mlx5_flow_dv_port_id_action_resource *resource =
14025                                   container_of(entry, typeof(*resource), entry);
14026
14027         claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14028         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
14029 }
14030
14031 /**
14032  * Release port ID action resource.
14033  *
14034  * @param dev
14035  *   Pointer to Ethernet device.
14036  * @param handle
14037  *   Pointer to mlx5_flow_handle.
14038  *
14039  * @return
14040  *   1 while a reference on it exists, 0 when freed.
14041  */
14042 static int
14043 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
14044                                         uint32_t port_id)
14045 {
14046         struct mlx5_priv *priv = dev->data->dev_private;
14047         struct mlx5_flow_dv_port_id_action_resource *resource;
14048
14049         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PORT_ID], port_id);
14050         if (!resource)
14051                 return 0;
14052         MLX5_ASSERT(resource->action);
14053         return mlx5_list_unregister(priv->sh->port_id_action_list,
14054                                     &resource->entry);
14055 }
14056
14057 /**
14058  * Release shared RSS action resource.
14059  *
14060  * @param dev
14061  *   Pointer to Ethernet device.
14062  * @param srss
14063  *   Shared RSS action index.
14064  */
14065 static void
14066 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss)
14067 {
14068         struct mlx5_priv *priv = dev->data->dev_private;
14069         struct mlx5_shared_action_rss *shared_rss;
14070
14071         shared_rss = mlx5_ipool_get
14072                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], srss);
14073         __atomic_sub_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14074 }
14075
14076 void
14077 flow_dv_push_vlan_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14078 {
14079         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14080         struct mlx5_flow_dv_push_vlan_action_resource *resource =
14081                         container_of(entry, typeof(*resource), entry);
14082
14083         claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14084         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
14085 }
14086
14087 /**
14088  * Release push vlan action resource.
14089  *
14090  * @param dev
14091  *   Pointer to Ethernet device.
14092  * @param handle
14093  *   Pointer to mlx5_flow_handle.
14094  *
14095  * @return
14096  *   1 while a reference on it exists, 0 when freed.
14097  */
14098 static int
14099 flow_dv_push_vlan_action_resource_release(struct rte_eth_dev *dev,
14100                                           struct mlx5_flow_handle *handle)
14101 {
14102         struct mlx5_priv *priv = dev->data->dev_private;
14103         struct mlx5_flow_dv_push_vlan_action_resource *resource;
14104         uint32_t idx = handle->dvh.rix_push_vlan;
14105
14106         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
14107         if (!resource)
14108                 return 0;
14109         MLX5_ASSERT(resource->action);
14110         return mlx5_list_unregister(priv->sh->push_vlan_action_list,
14111                                     &resource->entry);
14112 }
14113
14114 /**
14115  * Release the fate resource.
14116  *
14117  * @param dev
14118  *   Pointer to Ethernet device.
14119  * @param handle
14120  *   Pointer to mlx5_flow_handle.
14121  */
14122 static void
14123 flow_dv_fate_resource_release(struct rte_eth_dev *dev,
14124                                struct mlx5_flow_handle *handle)
14125 {
14126         if (!handle->rix_fate)
14127                 return;
14128         switch (handle->fate_action) {
14129         case MLX5_FLOW_FATE_QUEUE:
14130                 if (!handle->dvh.rix_sample && !handle->dvh.rix_dest_array)
14131                         mlx5_hrxq_release(dev, handle->rix_hrxq);
14132                 break;
14133         case MLX5_FLOW_FATE_JUMP:
14134                 flow_dv_jump_tbl_resource_release(dev, handle->rix_jump);
14135                 break;
14136         case MLX5_FLOW_FATE_PORT_ID:
14137                 flow_dv_port_id_action_resource_release(dev,
14138                                 handle->rix_port_id_action);
14139                 break;
14140         default:
14141                 DRV_LOG(DEBUG, "Incorrect fate action:%d", handle->fate_action);
14142                 break;
14143         }
14144         handle->rix_fate = 0;
14145 }
14146
14147 void
14148 flow_dv_sample_remove_cb(void *tool_ctx __rte_unused,
14149                          struct mlx5_list_entry *entry)
14150 {
14151         struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
14152                                                               typeof(*resource),
14153                                                               entry);
14154         struct rte_eth_dev *dev = resource->dev;
14155         struct mlx5_priv *priv = dev->data->dev_private;
14156
14157         if (resource->verbs_action)
14158                 claim_zero(mlx5_flow_os_destroy_flow_action
14159                                                       (resource->verbs_action));
14160         if (resource->normal_path_tbl)
14161                 flow_dv_tbl_resource_release(MLX5_SH(dev),
14162                                              resource->normal_path_tbl);
14163         flow_dv_sample_sub_actions_release(dev, &resource->sample_idx);
14164         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
14165         DRV_LOG(DEBUG, "sample resource %p: removed", (void *)resource);
14166 }
14167
14168 /**
14169  * Release an sample resource.
14170  *
14171  * @param dev
14172  *   Pointer to Ethernet device.
14173  * @param handle
14174  *   Pointer to mlx5_flow_handle.
14175  *
14176  * @return
14177  *   1 while a reference on it exists, 0 when freed.
14178  */
14179 static int
14180 flow_dv_sample_resource_release(struct rte_eth_dev *dev,
14181                                      struct mlx5_flow_handle *handle)
14182 {
14183         struct mlx5_priv *priv = dev->data->dev_private;
14184         struct mlx5_flow_dv_sample_resource *resource;
14185
14186         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
14187                                   handle->dvh.rix_sample);
14188         if (!resource)
14189                 return 0;
14190         MLX5_ASSERT(resource->verbs_action);
14191         return mlx5_list_unregister(priv->sh->sample_action_list,
14192                                     &resource->entry);
14193 }
14194
14195 void
14196 flow_dv_dest_array_remove_cb(void *tool_ctx __rte_unused,
14197                              struct mlx5_list_entry *entry)
14198 {
14199         struct mlx5_flow_dv_dest_array_resource *resource =
14200                         container_of(entry, typeof(*resource), entry);
14201         struct rte_eth_dev *dev = resource->dev;
14202         struct mlx5_priv *priv = dev->data->dev_private;
14203         uint32_t i = 0;
14204
14205         MLX5_ASSERT(resource->action);
14206         if (resource->action)
14207                 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14208         for (; i < resource->num_of_dest; i++)
14209                 flow_dv_sample_sub_actions_release(dev,
14210                                                    &resource->sample_idx[i]);
14211         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
14212         DRV_LOG(DEBUG, "destination array resource %p: removed",
14213                 (void *)resource);
14214 }
14215
14216 /**
14217  * Release an destination array resource.
14218  *
14219  * @param dev
14220  *   Pointer to Ethernet device.
14221  * @param handle
14222  *   Pointer to mlx5_flow_handle.
14223  *
14224  * @return
14225  *   1 while a reference on it exists, 0 when freed.
14226  */
14227 static int
14228 flow_dv_dest_array_resource_release(struct rte_eth_dev *dev,
14229                                     struct mlx5_flow_handle *handle)
14230 {
14231         struct mlx5_priv *priv = dev->data->dev_private;
14232         struct mlx5_flow_dv_dest_array_resource *resource;
14233
14234         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
14235                                   handle->dvh.rix_dest_array);
14236         if (!resource)
14237                 return 0;
14238         MLX5_ASSERT(resource->action);
14239         return mlx5_list_unregister(priv->sh->dest_array_list,
14240                                     &resource->entry);
14241 }
14242
14243 static void
14244 flow_dv_geneve_tlv_option_resource_release(struct rte_eth_dev *dev)
14245 {
14246         struct mlx5_priv *priv = dev->data->dev_private;
14247         struct mlx5_dev_ctx_shared *sh = priv->sh;
14248         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
14249                                 sh->geneve_tlv_option_resource;
14250         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
14251         if (geneve_opt_resource) {
14252                 if (!(__atomic_sub_fetch(&geneve_opt_resource->refcnt, 1,
14253                                          __ATOMIC_RELAXED))) {
14254                         claim_zero(mlx5_devx_cmd_destroy
14255                                         (geneve_opt_resource->obj));
14256                         mlx5_free(sh->geneve_tlv_option_resource);
14257                         sh->geneve_tlv_option_resource = NULL;
14258                 }
14259         }
14260         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
14261 }
14262
14263 /**
14264  * Remove the flow from the NIC but keeps it in memory.
14265  * Lock free, (mutex should be acquired by caller).
14266  *
14267  * @param[in] dev
14268  *   Pointer to Ethernet device.
14269  * @param[in, out] flow
14270  *   Pointer to flow structure.
14271  */
14272 static void
14273 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
14274 {
14275         struct mlx5_flow_handle *dh;
14276         uint32_t handle_idx;
14277         struct mlx5_priv *priv = dev->data->dev_private;
14278
14279         if (!flow)
14280                 return;
14281         handle_idx = flow->dev_handles;
14282         while (handle_idx) {
14283                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14284                                     handle_idx);
14285                 if (!dh)
14286                         return;
14287                 if (dh->drv_flow) {
14288                         claim_zero(mlx5_flow_os_destroy_flow(dh->drv_flow));
14289                         dh->drv_flow = NULL;
14290                 }
14291                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE)
14292                         flow_dv_fate_resource_release(dev, dh);
14293                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
14294                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
14295                 handle_idx = dh->next.next;
14296         }
14297 }
14298
14299 /**
14300  * Remove the flow from the NIC and the memory.
14301  * Lock free, (mutex should be acquired by caller).
14302  *
14303  * @param[in] dev
14304  *   Pointer to the Ethernet device structure.
14305  * @param[in, out] flow
14306  *   Pointer to flow structure.
14307  */
14308 static void
14309 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
14310 {
14311         struct mlx5_flow_handle *dev_handle;
14312         struct mlx5_priv *priv = dev->data->dev_private;
14313         struct mlx5_flow_meter_info *fm = NULL;
14314         uint32_t srss = 0;
14315
14316         if (!flow)
14317                 return;
14318         flow_dv_remove(dev, flow);
14319         if (flow->counter) {
14320                 flow_dv_counter_free(dev, flow->counter);
14321                 flow->counter = 0;
14322         }
14323         if (flow->meter) {
14324                 fm = flow_dv_meter_find_by_idx(priv, flow->meter);
14325                 if (fm)
14326                         mlx5_flow_meter_detach(priv, fm);
14327                 flow->meter = 0;
14328         }
14329         /* Keep the current age handling by default. */
14330         if (flow->indirect_type == MLX5_INDIRECT_ACTION_TYPE_CT && flow->ct)
14331                 flow_dv_aso_ct_release(dev, flow->ct, NULL);
14332         else if (flow->age)
14333                 flow_dv_aso_age_release(dev, flow->age);
14334         if (flow->geneve_tlv_option) {
14335                 flow_dv_geneve_tlv_option_resource_release(dev);
14336                 flow->geneve_tlv_option = 0;
14337         }
14338         while (flow->dev_handles) {
14339                 uint32_t tmp_idx = flow->dev_handles;
14340
14341                 dev_handle = mlx5_ipool_get(priv->sh->ipool
14342                                             [MLX5_IPOOL_MLX5_FLOW], tmp_idx);
14343                 if (!dev_handle)
14344                         return;
14345                 flow->dev_handles = dev_handle->next.next;
14346                 if (dev_handle->dvh.matcher)
14347                         flow_dv_matcher_release(dev, dev_handle);
14348                 if (dev_handle->dvh.rix_sample)
14349                         flow_dv_sample_resource_release(dev, dev_handle);
14350                 if (dev_handle->dvh.rix_dest_array)
14351                         flow_dv_dest_array_resource_release(dev, dev_handle);
14352                 if (dev_handle->dvh.rix_encap_decap)
14353                         flow_dv_encap_decap_resource_release(dev,
14354                                 dev_handle->dvh.rix_encap_decap);
14355                 if (dev_handle->dvh.modify_hdr)
14356                         flow_dv_modify_hdr_resource_release(dev, dev_handle);
14357                 if (dev_handle->dvh.rix_push_vlan)
14358                         flow_dv_push_vlan_action_resource_release(dev,
14359                                                                   dev_handle);
14360                 if (dev_handle->dvh.rix_tag)
14361                         flow_dv_tag_release(dev,
14362                                             dev_handle->dvh.rix_tag);
14363                 if (dev_handle->fate_action != MLX5_FLOW_FATE_SHARED_RSS)
14364                         flow_dv_fate_resource_release(dev, dev_handle);
14365                 else if (!srss)
14366                         srss = dev_handle->rix_srss;
14367                 if (fm && dev_handle->is_meter_flow_id &&
14368                     dev_handle->split_flow_id)
14369                         mlx5_ipool_free(fm->flow_ipool,
14370                                         dev_handle->split_flow_id);
14371                 else if (dev_handle->split_flow_id &&
14372                     !dev_handle->is_meter_flow_id)
14373                         mlx5_ipool_free(priv->sh->ipool
14374                                         [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
14375                                         dev_handle->split_flow_id);
14376                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14377                            tmp_idx);
14378         }
14379         if (srss)
14380                 flow_dv_shared_rss_action_release(dev, srss);
14381 }
14382
14383 /**
14384  * Release array of hash RX queue objects.
14385  * Helper function.
14386  *
14387  * @param[in] dev
14388  *   Pointer to the Ethernet device structure.
14389  * @param[in, out] hrxqs
14390  *   Array of hash RX queue objects.
14391  *
14392  * @return
14393  *   Total number of references to hash RX queue objects in *hrxqs* array
14394  *   after this operation.
14395  */
14396 static int
14397 __flow_dv_hrxqs_release(struct rte_eth_dev *dev,
14398                         uint32_t (*hrxqs)[MLX5_RSS_HASH_FIELDS_LEN])
14399 {
14400         size_t i;
14401         int remaining = 0;
14402
14403         for (i = 0; i < RTE_DIM(*hrxqs); i++) {
14404                 int ret = mlx5_hrxq_release(dev, (*hrxqs)[i]);
14405
14406                 if (!ret)
14407                         (*hrxqs)[i] = 0;
14408                 remaining += ret;
14409         }
14410         return remaining;
14411 }
14412
14413 /**
14414  * Release all hash RX queue objects representing shared RSS action.
14415  *
14416  * @param[in] dev
14417  *   Pointer to the Ethernet device structure.
14418  * @param[in, out] action
14419  *   Shared RSS action to remove hash RX queue objects from.
14420  *
14421  * @return
14422  *   Total number of references to hash RX queue objects stored in *action*
14423  *   after this operation.
14424  *   Expected to be 0 if no external references held.
14425  */
14426 static int
14427 __flow_dv_action_rss_hrxqs_release(struct rte_eth_dev *dev,
14428                                  struct mlx5_shared_action_rss *shared_rss)
14429 {
14430         return __flow_dv_hrxqs_release(dev, &shared_rss->hrxq);
14431 }
14432
14433 /**
14434  * Adjust L3/L4 hash value of pre-created shared RSS hrxq according to
14435  * user input.
14436  *
14437  * Only one hash value is available for one L3+L4 combination:
14438  * for example:
14439  * MLX5_RSS_HASH_IPV4, MLX5_RSS_HASH_IPV4_SRC_ONLY, and
14440  * MLX5_RSS_HASH_IPV4_DST_ONLY are mutually exclusive so they can share
14441  * same slot in mlx5_rss_hash_fields.
14442  *
14443  * @param[in] rss
14444  *   Pointer to the shared action RSS conf.
14445  * @param[in, out] hash_field
14446  *   hash_field variable needed to be adjusted.
14447  *
14448  * @return
14449  *   void
14450  */
14451 static void
14452 __flow_dv_action_rss_l34_hash_adjust(struct mlx5_shared_action_rss *rss,
14453                                      uint64_t *hash_field)
14454 {
14455         uint64_t rss_types = rss->origin.types;
14456
14457         switch (*hash_field & ~IBV_RX_HASH_INNER) {
14458         case MLX5_RSS_HASH_IPV4:
14459                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
14460                         *hash_field &= ~MLX5_RSS_HASH_IPV4;
14461                         if (rss_types & ETH_RSS_L3_DST_ONLY)
14462                                 *hash_field |= IBV_RX_HASH_DST_IPV4;
14463                         else if (rss_types & ETH_RSS_L3_SRC_ONLY)
14464                                 *hash_field |= IBV_RX_HASH_SRC_IPV4;
14465                         else
14466                                 *hash_field |= MLX5_RSS_HASH_IPV4;
14467                 }
14468                 return;
14469         case MLX5_RSS_HASH_IPV6:
14470                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
14471                         *hash_field &= ~MLX5_RSS_HASH_IPV6;
14472                         if (rss_types & ETH_RSS_L3_DST_ONLY)
14473                                 *hash_field |= IBV_RX_HASH_DST_IPV6;
14474                         else if (rss_types & ETH_RSS_L3_SRC_ONLY)
14475                                 *hash_field |= IBV_RX_HASH_SRC_IPV6;
14476                         else
14477                                 *hash_field |= MLX5_RSS_HASH_IPV6;
14478                 }
14479                 return;
14480         case MLX5_RSS_HASH_IPV4_UDP:
14481                 /* fall-through. */
14482         case MLX5_RSS_HASH_IPV6_UDP:
14483                 if (rss_types & ETH_RSS_UDP) {
14484                         *hash_field &= ~MLX5_UDP_IBV_RX_HASH;
14485                         if (rss_types & ETH_RSS_L4_DST_ONLY)
14486                                 *hash_field |= IBV_RX_HASH_DST_PORT_UDP;
14487                         else if (rss_types & ETH_RSS_L4_SRC_ONLY)
14488                                 *hash_field |= IBV_RX_HASH_SRC_PORT_UDP;
14489                         else
14490                                 *hash_field |= MLX5_UDP_IBV_RX_HASH;
14491                 }
14492                 return;
14493         case MLX5_RSS_HASH_IPV4_TCP:
14494                 /* fall-through. */
14495         case MLX5_RSS_HASH_IPV6_TCP:
14496                 if (rss_types & ETH_RSS_TCP) {
14497                         *hash_field &= ~MLX5_TCP_IBV_RX_HASH;
14498                         if (rss_types & ETH_RSS_L4_DST_ONLY)
14499                                 *hash_field |= IBV_RX_HASH_DST_PORT_TCP;
14500                         else if (rss_types & ETH_RSS_L4_SRC_ONLY)
14501                                 *hash_field |= IBV_RX_HASH_SRC_PORT_TCP;
14502                         else
14503                                 *hash_field |= MLX5_TCP_IBV_RX_HASH;
14504                 }
14505                 return;
14506         default:
14507                 return;
14508         }
14509 }
14510
14511 /**
14512  * Setup shared RSS action.
14513  * Prepare set of hash RX queue objects sufficient to handle all valid
14514  * hash_fields combinations (see enum ibv_rx_hash_fields).
14515  *
14516  * @param[in] dev
14517  *   Pointer to the Ethernet device structure.
14518  * @param[in] action_idx
14519  *   Shared RSS action ipool index.
14520  * @param[in, out] action
14521  *   Partially initialized shared RSS action.
14522  * @param[out] error
14523  *   Perform verbose error reporting if not NULL. Initialized in case of
14524  *   error only.
14525  *
14526  * @return
14527  *   0 on success, otherwise negative errno value.
14528  */
14529 static int
14530 __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
14531                            uint32_t action_idx,
14532                            struct mlx5_shared_action_rss *shared_rss,
14533                            struct rte_flow_error *error)
14534 {
14535         struct mlx5_flow_rss_desc rss_desc = { 0 };
14536         size_t i;
14537         int err;
14538
14539         if (mlx5_ind_table_obj_setup(dev, shared_rss->ind_tbl)) {
14540                 return rte_flow_error_set(error, rte_errno,
14541                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14542                                           "cannot setup indirection table");
14543         }
14544         memcpy(rss_desc.key, shared_rss->origin.key, MLX5_RSS_HASH_KEY_LEN);
14545         rss_desc.key_len = MLX5_RSS_HASH_KEY_LEN;
14546         rss_desc.const_q = shared_rss->origin.queue;
14547         rss_desc.queue_num = shared_rss->origin.queue_num;
14548         /* Set non-zero value to indicate a shared RSS. */
14549         rss_desc.shared_rss = action_idx;
14550         rss_desc.ind_tbl = shared_rss->ind_tbl;
14551         for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
14552                 uint32_t hrxq_idx;
14553                 uint64_t hash_fields = mlx5_rss_hash_fields[i];
14554                 int tunnel = 0;
14555
14556                 __flow_dv_action_rss_l34_hash_adjust(shared_rss, &hash_fields);
14557                 if (shared_rss->origin.level > 1) {
14558                         hash_fields |= IBV_RX_HASH_INNER;
14559                         tunnel = 1;
14560                 }
14561                 rss_desc.tunnel = tunnel;
14562                 rss_desc.hash_fields = hash_fields;
14563                 hrxq_idx = mlx5_hrxq_get(dev, &rss_desc);
14564                 if (!hrxq_idx) {
14565                         rte_flow_error_set
14566                                 (error, rte_errno,
14567                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14568                                  "cannot get hash queue");
14569                         goto error_hrxq_new;
14570                 }
14571                 err = __flow_dv_action_rss_hrxq_set
14572                         (shared_rss, hash_fields, hrxq_idx);
14573                 MLX5_ASSERT(!err);
14574         }
14575         return 0;
14576 error_hrxq_new:
14577         err = rte_errno;
14578         __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14579         if (!mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true))
14580                 shared_rss->ind_tbl = NULL;
14581         rte_errno = err;
14582         return -rte_errno;
14583 }
14584
14585 /**
14586  * Create shared RSS action.
14587  *
14588  * @param[in] dev
14589  *   Pointer to the Ethernet device structure.
14590  * @param[in] conf
14591  *   Shared action configuration.
14592  * @param[in] rss
14593  *   RSS action specification used to create shared action.
14594  * @param[out] error
14595  *   Perform verbose error reporting if not NULL. Initialized in case of
14596  *   error only.
14597  *
14598  * @return
14599  *   A valid shared action ID in case of success, 0 otherwise and
14600  *   rte_errno is set.
14601  */
14602 static uint32_t
14603 __flow_dv_action_rss_create(struct rte_eth_dev *dev,
14604                             const struct rte_flow_indir_action_conf *conf,
14605                             const struct rte_flow_action_rss *rss,
14606                             struct rte_flow_error *error)
14607 {
14608         struct mlx5_priv *priv = dev->data->dev_private;
14609         struct mlx5_shared_action_rss *shared_rss = NULL;
14610         void *queue = NULL;
14611         struct rte_flow_action_rss *origin;
14612         const uint8_t *rss_key;
14613         uint32_t queue_size = rss->queue_num * sizeof(uint16_t);
14614         uint32_t idx;
14615
14616         RTE_SET_USED(conf);
14617         queue = mlx5_malloc(0, RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14618                             0, SOCKET_ID_ANY);
14619         shared_rss = mlx5_ipool_zmalloc
14620                          (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], &idx);
14621         if (!shared_rss || !queue) {
14622                 rte_flow_error_set(error, ENOMEM,
14623                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14624                                    "cannot allocate resource memory");
14625                 goto error_rss_init;
14626         }
14627         if (idx > (1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET)) {
14628                 rte_flow_error_set(error, E2BIG,
14629                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14630                                    "rss action number out of range");
14631                 goto error_rss_init;
14632         }
14633         shared_rss->ind_tbl = mlx5_malloc(MLX5_MEM_ZERO,
14634                                           sizeof(*shared_rss->ind_tbl),
14635                                           0, SOCKET_ID_ANY);
14636         if (!shared_rss->ind_tbl) {
14637                 rte_flow_error_set(error, ENOMEM,
14638                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14639                                    "cannot allocate resource memory");
14640                 goto error_rss_init;
14641         }
14642         memcpy(queue, rss->queue, queue_size);
14643         shared_rss->ind_tbl->queues = queue;
14644         shared_rss->ind_tbl->queues_n = rss->queue_num;
14645         origin = &shared_rss->origin;
14646         origin->func = rss->func;
14647         origin->level = rss->level;
14648         /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
14649         origin->types = !rss->types ? ETH_RSS_IP : rss->types;
14650         /* NULL RSS key indicates default RSS key. */
14651         rss_key = !rss->key ? rss_hash_default_key : rss->key;
14652         memcpy(shared_rss->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
14653         origin->key = &shared_rss->key[0];
14654         origin->key_len = MLX5_RSS_HASH_KEY_LEN;
14655         origin->queue = queue;
14656         origin->queue_num = rss->queue_num;
14657         if (__flow_dv_action_rss_setup(dev, idx, shared_rss, error))
14658                 goto error_rss_init;
14659         rte_spinlock_init(&shared_rss->action_rss_sl);
14660         __atomic_add_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14661         rte_spinlock_lock(&priv->shared_act_sl);
14662         ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14663                      &priv->rss_shared_actions, idx, shared_rss, next);
14664         rte_spinlock_unlock(&priv->shared_act_sl);
14665         return idx;
14666 error_rss_init:
14667         if (shared_rss) {
14668                 if (shared_rss->ind_tbl)
14669                         mlx5_free(shared_rss->ind_tbl);
14670                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14671                                 idx);
14672         }
14673         if (queue)
14674                 mlx5_free(queue);
14675         return 0;
14676 }
14677
14678 /**
14679  * Destroy the shared RSS action.
14680  * Release related hash RX queue objects.
14681  *
14682  * @param[in] dev
14683  *   Pointer to the Ethernet device structure.
14684  * @param[in] idx
14685  *   The shared RSS action object ID to be removed.
14686  * @param[out] error
14687  *   Perform verbose error reporting if not NULL. Initialized in case of
14688  *   error only.
14689  *
14690  * @return
14691  *   0 on success, otherwise negative errno value.
14692  */
14693 static int
14694 __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
14695                              struct rte_flow_error *error)
14696 {
14697         struct mlx5_priv *priv = dev->data->dev_private;
14698         struct mlx5_shared_action_rss *shared_rss =
14699             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14700         uint32_t old_refcnt = 1;
14701         int remaining;
14702         uint16_t *queue = NULL;
14703
14704         if (!shared_rss)
14705                 return rte_flow_error_set(error, EINVAL,
14706                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14707                                           "invalid shared action");
14708         if (!__atomic_compare_exchange_n(&shared_rss->refcnt, &old_refcnt,
14709                                          0, 0, __ATOMIC_ACQUIRE,
14710                                          __ATOMIC_RELAXED))
14711                 return rte_flow_error_set(error, EBUSY,
14712                                           RTE_FLOW_ERROR_TYPE_ACTION,
14713                                           NULL,
14714                                           "shared rss has references");
14715         remaining = __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14716         if (remaining)
14717                 return rte_flow_error_set(error, EBUSY,
14718                                           RTE_FLOW_ERROR_TYPE_ACTION,
14719                                           NULL,
14720                                           "shared rss hrxq has references");
14721         queue = shared_rss->ind_tbl->queues;
14722         remaining = mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true);
14723         if (remaining)
14724                 return rte_flow_error_set(error, EBUSY,
14725                                           RTE_FLOW_ERROR_TYPE_ACTION,
14726                                           NULL,
14727                                           "shared rss indirection table has"
14728                                           " references");
14729         mlx5_free(queue);
14730         rte_spinlock_lock(&priv->shared_act_sl);
14731         ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14732                      &priv->rss_shared_actions, idx, shared_rss, next);
14733         rte_spinlock_unlock(&priv->shared_act_sl);
14734         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14735                         idx);
14736         return 0;
14737 }
14738
14739 /**
14740  * Create indirect action, lock free,
14741  * (mutex should be acquired by caller).
14742  * Dispatcher for action type specific call.
14743  *
14744  * @param[in] dev
14745  *   Pointer to the Ethernet device structure.
14746  * @param[in] conf
14747  *   Shared action configuration.
14748  * @param[in] action
14749  *   Action specification used to create indirect action.
14750  * @param[out] error
14751  *   Perform verbose error reporting if not NULL. Initialized in case of
14752  *   error only.
14753  *
14754  * @return
14755  *   A valid shared action handle in case of success, NULL otherwise and
14756  *   rte_errno is set.
14757  */
14758 static struct rte_flow_action_handle *
14759 flow_dv_action_create(struct rte_eth_dev *dev,
14760                       const struct rte_flow_indir_action_conf *conf,
14761                       const struct rte_flow_action *action,
14762                       struct rte_flow_error *err)
14763 {
14764         struct mlx5_priv *priv = dev->data->dev_private;
14765         uint32_t age_idx = 0;
14766         uint32_t idx = 0;
14767         uint32_t ret = 0;
14768
14769         switch (action->type) {
14770         case RTE_FLOW_ACTION_TYPE_RSS:
14771                 ret = __flow_dv_action_rss_create(dev, conf, action->conf, err);
14772                 idx = (MLX5_INDIRECT_ACTION_TYPE_RSS <<
14773                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14774                 break;
14775         case RTE_FLOW_ACTION_TYPE_AGE:
14776                 age_idx = flow_dv_aso_age_alloc(dev, err);
14777                 if (!age_idx) {
14778                         ret = -rte_errno;
14779                         break;
14780                 }
14781                 idx = (MLX5_INDIRECT_ACTION_TYPE_AGE <<
14782                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | age_idx;
14783                 flow_dv_aso_age_params_init(dev, age_idx,
14784                                         ((const struct rte_flow_action_age *)
14785                                                 action->conf)->context ?
14786                                         ((const struct rte_flow_action_age *)
14787                                                 action->conf)->context :
14788                                         (void *)(uintptr_t)idx,
14789                                         ((const struct rte_flow_action_age *)
14790                                                 action->conf)->timeout);
14791                 ret = age_idx;
14792                 break;
14793         case RTE_FLOW_ACTION_TYPE_COUNT:
14794                 ret = flow_dv_translate_create_counter(dev, NULL, NULL, NULL);
14795                 idx = (MLX5_INDIRECT_ACTION_TYPE_COUNT <<
14796                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14797                 break;
14798         case RTE_FLOW_ACTION_TYPE_CONNTRACK:
14799                 ret = flow_dv_translate_create_conntrack(dev, action->conf,
14800                                                          err);
14801                 idx = MLX5_INDIRECT_ACT_CT_GEN_IDX(PORT_ID(priv), ret);
14802                 break;
14803         default:
14804                 rte_flow_error_set(err, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
14805                                    NULL, "action type not supported");
14806                 break;
14807         }
14808         return ret ? (struct rte_flow_action_handle *)(uintptr_t)idx : NULL;
14809 }
14810
14811 /**
14812  * Destroy the indirect action.
14813  * Release action related resources on the NIC and the memory.
14814  * Lock free, (mutex should be acquired by caller).
14815  * Dispatcher for action type specific call.
14816  *
14817  * @param[in] dev
14818  *   Pointer to the Ethernet device structure.
14819  * @param[in] handle
14820  *   The indirect action object handle to be removed.
14821  * @param[out] error
14822  *   Perform verbose error reporting if not NULL. Initialized in case of
14823  *   error only.
14824  *
14825  * @return
14826  *   0 on success, otherwise negative errno value.
14827  */
14828 static int
14829 flow_dv_action_destroy(struct rte_eth_dev *dev,
14830                        struct rte_flow_action_handle *handle,
14831                        struct rte_flow_error *error)
14832 {
14833         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
14834         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
14835         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
14836         struct mlx5_flow_counter *cnt;
14837         uint32_t no_flow_refcnt = 1;
14838         int ret;
14839
14840         switch (type) {
14841         case MLX5_INDIRECT_ACTION_TYPE_RSS:
14842                 return __flow_dv_action_rss_release(dev, idx, error);
14843         case MLX5_INDIRECT_ACTION_TYPE_COUNT:
14844                 cnt = flow_dv_counter_get_by_idx(dev, idx, NULL);
14845                 if (!__atomic_compare_exchange_n(&cnt->shared_info.refcnt,
14846                                                  &no_flow_refcnt, 1, false,
14847                                                  __ATOMIC_ACQUIRE,
14848                                                  __ATOMIC_RELAXED))
14849                         return rte_flow_error_set(error, EBUSY,
14850                                                   RTE_FLOW_ERROR_TYPE_ACTION,
14851                                                   NULL,
14852                                                   "Indirect count action has references");
14853                 flow_dv_counter_free(dev, idx);
14854                 return 0;
14855         case MLX5_INDIRECT_ACTION_TYPE_AGE:
14856                 ret = flow_dv_aso_age_release(dev, idx);
14857                 if (ret)
14858                         /*
14859                          * In this case, the last flow has a reference will
14860                          * actually release the age action.
14861                          */
14862                         DRV_LOG(DEBUG, "Indirect age action %" PRIu32 " was"
14863                                 " released with references %d.", idx, ret);
14864                 return 0;
14865         case MLX5_INDIRECT_ACTION_TYPE_CT:
14866                 ret = flow_dv_aso_ct_release(dev, idx, error);
14867                 if (ret < 0)
14868                         return ret;
14869                 if (ret > 0)
14870                         DRV_LOG(DEBUG, "Connection tracking object %u still "
14871                                 "has references %d.", idx, ret);
14872                 return 0;
14873         default:
14874                 return rte_flow_error_set(error, ENOTSUP,
14875                                           RTE_FLOW_ERROR_TYPE_ACTION,
14876                                           NULL,
14877                                           "action type not supported");
14878         }
14879 }
14880
14881 /**
14882  * Updates in place shared RSS action configuration.
14883  *
14884  * @param[in] dev
14885  *   Pointer to the Ethernet device structure.
14886  * @param[in] idx
14887  *   The shared RSS action object ID to be updated.
14888  * @param[in] action_conf
14889  *   RSS action specification used to modify *shared_rss*.
14890  * @param[out] error
14891  *   Perform verbose error reporting if not NULL. Initialized in case of
14892  *   error only.
14893  *
14894  * @return
14895  *   0 on success, otherwise negative errno value.
14896  * @note: currently only support update of RSS queues.
14897  */
14898 static int
14899 __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
14900                             const struct rte_flow_action_rss *action_conf,
14901                             struct rte_flow_error *error)
14902 {
14903         struct mlx5_priv *priv = dev->data->dev_private;
14904         struct mlx5_shared_action_rss *shared_rss =
14905             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14906         int ret = 0;
14907         void *queue = NULL;
14908         uint16_t *queue_old = NULL;
14909         uint32_t queue_size = action_conf->queue_num * sizeof(uint16_t);
14910
14911         if (!shared_rss)
14912                 return rte_flow_error_set(error, EINVAL,
14913                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14914                                           "invalid shared action to update");
14915         if (priv->obj_ops.ind_table_modify == NULL)
14916                 return rte_flow_error_set(error, ENOTSUP,
14917                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14918                                           "cannot modify indirection table");
14919         queue = mlx5_malloc(MLX5_MEM_ZERO,
14920                             RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14921                             0, SOCKET_ID_ANY);
14922         if (!queue)
14923                 return rte_flow_error_set(error, ENOMEM,
14924                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14925                                           NULL,
14926                                           "cannot allocate resource memory");
14927         memcpy(queue, action_conf->queue, queue_size);
14928         MLX5_ASSERT(shared_rss->ind_tbl);
14929         rte_spinlock_lock(&shared_rss->action_rss_sl);
14930         queue_old = shared_rss->ind_tbl->queues;
14931         ret = mlx5_ind_table_obj_modify(dev, shared_rss->ind_tbl,
14932                                         queue, action_conf->queue_num, true);
14933         if (ret) {
14934                 mlx5_free(queue);
14935                 ret = rte_flow_error_set(error, rte_errno,
14936                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14937                                           "cannot update indirection table");
14938         } else {
14939                 mlx5_free(queue_old);
14940                 shared_rss->origin.queue = queue;
14941                 shared_rss->origin.queue_num = action_conf->queue_num;
14942         }
14943         rte_spinlock_unlock(&shared_rss->action_rss_sl);
14944         return ret;
14945 }
14946
14947 /*
14948  * Updates in place conntrack context or direction.
14949  * Context update should be synchronized.
14950  *
14951  * @param[in] dev
14952  *   Pointer to the Ethernet device structure.
14953  * @param[in] idx
14954  *   The conntrack object ID to be updated.
14955  * @param[in] update
14956  *   Pointer to the structure of information to update.
14957  * @param[out] error
14958  *   Perform verbose error reporting if not NULL. Initialized in case of
14959  *   error only.
14960  *
14961  * @return
14962  *   0 on success, otherwise negative errno value.
14963  */
14964 static int
14965 __flow_dv_action_ct_update(struct rte_eth_dev *dev, uint32_t idx,
14966                            const struct rte_flow_modify_conntrack *update,
14967                            struct rte_flow_error *error)
14968 {
14969         struct mlx5_priv *priv = dev->data->dev_private;
14970         struct mlx5_aso_ct_action *ct;
14971         const struct rte_flow_action_conntrack *new_prf;
14972         int ret = 0;
14973         uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
14974         uint32_t dev_idx;
14975
14976         if (PORT_ID(priv) != owner)
14977                 return rte_flow_error_set(error, EACCES,
14978                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14979                                           NULL,
14980                                           "CT object owned by another port");
14981         dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
14982         ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
14983         if (!ct->refcnt)
14984                 return rte_flow_error_set(error, ENOMEM,
14985                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14986                                           NULL,
14987                                           "CT object is inactive");
14988         new_prf = &update->new_ct;
14989         if (update->direction)
14990                 ct->is_original = !!new_prf->is_original_dir;
14991         if (update->state) {
14992                 /* Only validate the profile when it needs to be updated. */
14993                 ret = mlx5_validate_action_ct(dev, new_prf, error);
14994                 if (ret)
14995                         return ret;
14996                 ret = mlx5_aso_ct_update_by_wqe(priv->sh, ct, new_prf);
14997                 if (ret)
14998                         return rte_flow_error_set(error, EIO,
14999                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15000                                         NULL,
15001                                         "Failed to send CT context update WQE");
15002                 /* Block until ready or a failure. */
15003                 ret = mlx5_aso_ct_available(priv->sh, ct);
15004                 if (ret)
15005                         rte_flow_error_set(error, rte_errno,
15006                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15007                                            NULL,
15008                                            "Timeout to get the CT update");
15009         }
15010         return ret;
15011 }
15012
15013 /**
15014  * Updates in place shared action configuration, lock free,
15015  * (mutex should be acquired by caller).
15016  *
15017  * @param[in] dev
15018  *   Pointer to the Ethernet device structure.
15019  * @param[in] handle
15020  *   The indirect action object handle to be updated.
15021  * @param[in] update
15022  *   Action specification used to modify the action pointed by *handle*.
15023  *   *update* could be of same type with the action pointed by the *handle*
15024  *   handle argument, or some other structures like a wrapper, depending on
15025  *   the indirect action type.
15026  * @param[out] error
15027  *   Perform verbose error reporting if not NULL. Initialized in case of
15028  *   error only.
15029  *
15030  * @return
15031  *   0 on success, otherwise negative errno value.
15032  */
15033 static int
15034 flow_dv_action_update(struct rte_eth_dev *dev,
15035                         struct rte_flow_action_handle *handle,
15036                         const void *update,
15037                         struct rte_flow_error *err)
15038 {
15039         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15040         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15041         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15042         const void *action_conf;
15043
15044         switch (type) {
15045         case MLX5_INDIRECT_ACTION_TYPE_RSS:
15046                 action_conf = ((const struct rte_flow_action *)update)->conf;
15047                 return __flow_dv_action_rss_update(dev, idx, action_conf, err);
15048         case MLX5_INDIRECT_ACTION_TYPE_CT:
15049                 return __flow_dv_action_ct_update(dev, idx, update, err);
15050         default:
15051                 return rte_flow_error_set(err, ENOTSUP,
15052                                           RTE_FLOW_ERROR_TYPE_ACTION,
15053                                           NULL,
15054                                           "action type update not supported");
15055         }
15056 }
15057
15058 /**
15059  * Destroy the meter sub policy table rules.
15060  * Lock free, (mutex should be acquired by caller).
15061  *
15062  * @param[in] dev
15063  *   Pointer to Ethernet device.
15064  * @param[in] sub_policy
15065  *   Pointer to meter sub policy table.
15066  */
15067 static void
15068 __flow_dv_destroy_sub_policy_rules(struct rte_eth_dev *dev,
15069                              struct mlx5_flow_meter_sub_policy *sub_policy)
15070 {
15071         struct mlx5_priv *priv = dev->data->dev_private;
15072         struct mlx5_flow_tbl_data_entry *tbl;
15073         struct mlx5_flow_meter_policy *policy = sub_policy->main_policy;
15074         struct mlx5_flow_meter_info *next_fm;
15075         struct mlx5_sub_policy_color_rule *color_rule;
15076         void *tmp;
15077         uint32_t i;
15078
15079         for (i = 0; i < RTE_COLORS; i++) {
15080                 next_fm = NULL;
15081                 if (i == RTE_COLOR_GREEN && policy &&
15082                     policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR)
15083                         next_fm = mlx5_flow_meter_find(priv,
15084                                         policy->act_cnt[i].next_mtr_id, NULL);
15085                 RTE_TAILQ_FOREACH_SAFE(color_rule, &sub_policy->color_rules[i],
15086                                    next_port, tmp) {
15087                         claim_zero(mlx5_flow_os_destroy_flow(color_rule->rule));
15088                         tbl = container_of(color_rule->matcher->tbl,
15089                                            typeof(*tbl), tbl);
15090                         mlx5_list_unregister(tbl->matchers,
15091                                              &color_rule->matcher->entry);
15092                         TAILQ_REMOVE(&sub_policy->color_rules[i],
15093                                      color_rule, next_port);
15094                         mlx5_free(color_rule);
15095                         if (next_fm)
15096                                 mlx5_flow_meter_detach(priv, next_fm);
15097                 }
15098         }
15099         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15100                 if (sub_policy->rix_hrxq[i]) {
15101                         if (policy && !policy->is_hierarchy)
15102                                 mlx5_hrxq_release(dev, sub_policy->rix_hrxq[i]);
15103                         sub_policy->rix_hrxq[i] = 0;
15104                 }
15105                 if (sub_policy->jump_tbl[i]) {
15106                         flow_dv_tbl_resource_release(MLX5_SH(dev),
15107                                                      sub_policy->jump_tbl[i]);
15108                         sub_policy->jump_tbl[i] = NULL;
15109                 }
15110         }
15111         if (sub_policy->tbl_rsc) {
15112                 flow_dv_tbl_resource_release(MLX5_SH(dev),
15113                                              sub_policy->tbl_rsc);
15114                 sub_policy->tbl_rsc = NULL;
15115         }
15116 }
15117
15118 /**
15119  * Destroy policy rules, lock free,
15120  * (mutex should be acquired by caller).
15121  * Dispatcher for action type specific call.
15122  *
15123  * @param[in] dev
15124  *   Pointer to the Ethernet device structure.
15125  * @param[in] mtr_policy
15126  *   Meter policy struct.
15127  */
15128 static void
15129 flow_dv_destroy_policy_rules(struct rte_eth_dev *dev,
15130                              struct mlx5_flow_meter_policy *mtr_policy)
15131 {
15132         uint32_t i, j;
15133         struct mlx5_flow_meter_sub_policy *sub_policy;
15134         uint16_t sub_policy_num;
15135
15136         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15137                 sub_policy_num = (mtr_policy->sub_policy_num >>
15138                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15139                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15140                 for (j = 0; j < sub_policy_num; j++) {
15141                         sub_policy = mtr_policy->sub_policys[i][j];
15142                         if (sub_policy)
15143                                 __flow_dv_destroy_sub_policy_rules(dev,
15144                                                                    sub_policy);
15145                 }
15146         }
15147 }
15148
15149 /**
15150  * Destroy policy action, lock free,
15151  * (mutex should be acquired by caller).
15152  * Dispatcher for action type specific call.
15153  *
15154  * @param[in] dev
15155  *   Pointer to the Ethernet device structure.
15156  * @param[in] mtr_policy
15157  *   Meter policy struct.
15158  */
15159 static void
15160 flow_dv_destroy_mtr_policy_acts(struct rte_eth_dev *dev,
15161                       struct mlx5_flow_meter_policy *mtr_policy)
15162 {
15163         struct rte_flow_action *rss_action;
15164         struct mlx5_flow_handle dev_handle;
15165         uint32_t i, j;
15166
15167         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15168                 if (mtr_policy->act_cnt[i].rix_mark) {
15169                         flow_dv_tag_release(dev,
15170                                 mtr_policy->act_cnt[i].rix_mark);
15171                         mtr_policy->act_cnt[i].rix_mark = 0;
15172                 }
15173                 if (mtr_policy->act_cnt[i].modify_hdr) {
15174                         dev_handle.dvh.modify_hdr =
15175                                 mtr_policy->act_cnt[i].modify_hdr;
15176                         flow_dv_modify_hdr_resource_release(dev, &dev_handle);
15177                 }
15178                 switch (mtr_policy->act_cnt[i].fate_action) {
15179                 case MLX5_FLOW_FATE_SHARED_RSS:
15180                         rss_action = mtr_policy->act_cnt[i].rss;
15181                         mlx5_free(rss_action);
15182                         break;
15183                 case MLX5_FLOW_FATE_PORT_ID:
15184                         if (mtr_policy->act_cnt[i].rix_port_id_action) {
15185                                 flow_dv_port_id_action_resource_release(dev,
15186                                 mtr_policy->act_cnt[i].rix_port_id_action);
15187                                 mtr_policy->act_cnt[i].rix_port_id_action = 0;
15188                         }
15189                         break;
15190                 case MLX5_FLOW_FATE_DROP:
15191                 case MLX5_FLOW_FATE_JUMP:
15192                         for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15193                                 mtr_policy->act_cnt[i].dr_jump_action[j] =
15194                                                 NULL;
15195                         break;
15196                 default:
15197                         /*Queue action do nothing*/
15198                         break;
15199                 }
15200         }
15201         for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15202                 mtr_policy->dr_drop_action[j] = NULL;
15203 }
15204
15205 /**
15206  * Create policy action per domain, lock free,
15207  * (mutex should be acquired by caller).
15208  * Dispatcher for action type specific call.
15209  *
15210  * @param[in] dev
15211  *   Pointer to the Ethernet device structure.
15212  * @param[in] mtr_policy
15213  *   Meter policy struct.
15214  * @param[in] action
15215  *   Action specification used to create meter actions.
15216  * @param[out] error
15217  *   Perform verbose error reporting if not NULL. Initialized in case of
15218  *   error only.
15219  *
15220  * @return
15221  *   0 on success, otherwise negative errno value.
15222  */
15223 static int
15224 __flow_dv_create_domain_policy_acts(struct rte_eth_dev *dev,
15225                         struct mlx5_flow_meter_policy *mtr_policy,
15226                         const struct rte_flow_action *actions[RTE_COLORS],
15227                         enum mlx5_meter_domain domain,
15228                         struct rte_mtr_error *error)
15229 {
15230         struct mlx5_priv *priv = dev->data->dev_private;
15231         struct rte_flow_error flow_err;
15232         const struct rte_flow_action *act;
15233         uint64_t action_flags;
15234         struct mlx5_flow_handle dh;
15235         struct mlx5_flow dev_flow;
15236         struct mlx5_flow_dv_port_id_action_resource port_id_action;
15237         int i, ret;
15238         uint8_t egress, transfer;
15239         struct mlx5_meter_policy_action_container *act_cnt = NULL;
15240         union {
15241                 struct mlx5_flow_dv_modify_hdr_resource res;
15242                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
15243                             sizeof(struct mlx5_modification_cmd) *
15244                             (MLX5_MAX_MODIFY_NUM + 1)];
15245         } mhdr_dummy;
15246         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
15247
15248         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15249         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15250         memset(&dh, 0, sizeof(struct mlx5_flow_handle));
15251         memset(&dev_flow, 0, sizeof(struct mlx5_flow));
15252         memset(&port_id_action, 0,
15253                sizeof(struct mlx5_flow_dv_port_id_action_resource));
15254         memset(mhdr_res, 0, sizeof(*mhdr_res));
15255         mhdr_res->ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
15256                                        (egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
15257                                         MLX5DV_FLOW_TABLE_TYPE_NIC_RX);
15258         dev_flow.handle = &dh;
15259         dev_flow.dv.port_id_action = &port_id_action;
15260         dev_flow.external = true;
15261         for (i = 0; i < RTE_COLORS; i++) {
15262                 if (i < MLX5_MTR_RTE_COLORS)
15263                         act_cnt = &mtr_policy->act_cnt[i];
15264                 /* Skip the color policy actions creation. */
15265                 if ((i == RTE_COLOR_YELLOW && mtr_policy->skip_y) ||
15266                     (i == RTE_COLOR_GREEN && mtr_policy->skip_g))
15267                         continue;
15268                 action_flags = 0;
15269                 for (act = actions[i];
15270                      act && act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
15271                         switch (act->type) {
15272                         case RTE_FLOW_ACTION_TYPE_MARK:
15273                         {
15274                                 uint32_t tag_be = mlx5_flow_mark_set
15275                                         (((const struct rte_flow_action_mark *)
15276                                         (act->conf))->id);
15277
15278                                 if (i >= MLX5_MTR_RTE_COLORS)
15279                                         return -rte_mtr_error_set(error,
15280                                           ENOTSUP,
15281                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15282                                           NULL,
15283                                           "cannot create policy "
15284                                           "mark action for this color");
15285                                 dev_flow.handle->mark = 1;
15286                                 if (flow_dv_tag_resource_register(dev, tag_be,
15287                                                   &dev_flow, &flow_err))
15288                                         return -rte_mtr_error_set(error,
15289                                         ENOTSUP,
15290                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15291                                         NULL,
15292                                         "cannot setup policy mark action");
15293                                 MLX5_ASSERT(dev_flow.dv.tag_resource);
15294                                 act_cnt->rix_mark =
15295                                         dev_flow.handle->dvh.rix_tag;
15296                                 action_flags |= MLX5_FLOW_ACTION_MARK;
15297                                 break;
15298                         }
15299                         case RTE_FLOW_ACTION_TYPE_SET_TAG:
15300                                 if (i >= MLX5_MTR_RTE_COLORS)
15301                                         return -rte_mtr_error_set(error,
15302                                           ENOTSUP,
15303                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15304                                           NULL,
15305                                           "cannot create policy "
15306                                           "set tag action for this color");
15307                                 if (flow_dv_convert_action_set_tag
15308                                 (dev, mhdr_res,
15309                                 (const struct rte_flow_action_set_tag *)
15310                                 act->conf,  &flow_err))
15311                                         return -rte_mtr_error_set(error,
15312                                         ENOTSUP,
15313                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15314                                         NULL, "cannot convert policy "
15315                                         "set tag action");
15316                                 if (!mhdr_res->actions_num)
15317                                         return -rte_mtr_error_set(error,
15318                                         ENOTSUP,
15319                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15320                                         NULL, "cannot find policy "
15321                                         "set tag action");
15322                                 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
15323                                 break;
15324                         case RTE_FLOW_ACTION_TYPE_DROP:
15325                         {
15326                                 struct mlx5_flow_mtr_mng *mtrmng =
15327                                                 priv->sh->mtrmng;
15328                                 struct mlx5_flow_tbl_data_entry *tbl_data;
15329
15330                                 /*
15331                                  * Create the drop table with
15332                                  * METER DROP level.
15333                                  */
15334                                 if (!mtrmng->drop_tbl[domain]) {
15335                                         mtrmng->drop_tbl[domain] =
15336                                         flow_dv_tbl_resource_get(dev,
15337                                         MLX5_FLOW_TABLE_LEVEL_METER,
15338                                         egress, transfer, false, NULL, 0,
15339                                         0, MLX5_MTR_TABLE_ID_DROP, &flow_err);
15340                                         if (!mtrmng->drop_tbl[domain])
15341                                                 return -rte_mtr_error_set
15342                                         (error, ENOTSUP,
15343                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15344                                         NULL,
15345                                         "Failed to create meter drop table");
15346                                 }
15347                                 tbl_data = container_of
15348                                 (mtrmng->drop_tbl[domain],
15349                                 struct mlx5_flow_tbl_data_entry, tbl);
15350                                 if (i < MLX5_MTR_RTE_COLORS) {
15351                                         act_cnt->dr_jump_action[domain] =
15352                                                 tbl_data->jump.action;
15353                                         act_cnt->fate_action =
15354                                                 MLX5_FLOW_FATE_DROP;
15355                                 }
15356                                 if (i == RTE_COLOR_RED)
15357                                         mtr_policy->dr_drop_action[domain] =
15358                                                 tbl_data->jump.action;
15359                                 action_flags |= MLX5_FLOW_ACTION_DROP;
15360                                 break;
15361                         }
15362                         case RTE_FLOW_ACTION_TYPE_QUEUE:
15363                         {
15364                                 if (i >= MLX5_MTR_RTE_COLORS)
15365                                         return -rte_mtr_error_set(error,
15366                                         ENOTSUP,
15367                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15368                                         NULL, "cannot create policy "
15369                                         "fate queue for this color");
15370                                 act_cnt->queue =
15371                                 ((const struct rte_flow_action_queue *)
15372                                         (act->conf))->index;
15373                                 act_cnt->fate_action =
15374                                         MLX5_FLOW_FATE_QUEUE;
15375                                 dev_flow.handle->fate_action =
15376                                         MLX5_FLOW_FATE_QUEUE;
15377                                 mtr_policy->is_queue = 1;
15378                                 action_flags |= MLX5_FLOW_ACTION_QUEUE;
15379                                 break;
15380                         }
15381                         case RTE_FLOW_ACTION_TYPE_RSS:
15382                         {
15383                                 int rss_size;
15384
15385                                 if (i >= MLX5_MTR_RTE_COLORS)
15386                                         return -rte_mtr_error_set(error,
15387                                           ENOTSUP,
15388                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15389                                           NULL,
15390                                           "cannot create policy "
15391                                           "rss action for this color");
15392                                 /*
15393                                  * Save RSS conf into policy struct
15394                                  * for translate stage.
15395                                  */
15396                                 rss_size = (int)rte_flow_conv
15397                                         (RTE_FLOW_CONV_OP_ACTION,
15398                                         NULL, 0, act, &flow_err);
15399                                 if (rss_size <= 0)
15400                                         return -rte_mtr_error_set(error,
15401                                           ENOTSUP,
15402                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15403                                           NULL, "Get the wrong "
15404                                           "rss action struct size");
15405                                 act_cnt->rss = mlx5_malloc(MLX5_MEM_ZERO,
15406                                                 rss_size, 0, SOCKET_ID_ANY);
15407                                 if (!act_cnt->rss)
15408                                         return -rte_mtr_error_set(error,
15409                                           ENOTSUP,
15410                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15411                                           NULL,
15412                                           "Fail to malloc rss action memory");
15413                                 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ACTION,
15414                                         act_cnt->rss, rss_size,
15415                                         act, &flow_err);
15416                                 if (ret < 0)
15417                                         return -rte_mtr_error_set(error,
15418                                           ENOTSUP,
15419                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15420                                           NULL, "Fail to save "
15421                                           "rss action into policy struct");
15422                                 act_cnt->fate_action =
15423                                         MLX5_FLOW_FATE_SHARED_RSS;
15424                                 action_flags |= MLX5_FLOW_ACTION_RSS;
15425                                 break;
15426                         }
15427                         case RTE_FLOW_ACTION_TYPE_PORT_ID:
15428                         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
15429                         {
15430                                 struct mlx5_flow_dv_port_id_action_resource
15431                                         port_id_resource;
15432                                 uint32_t port_id = 0;
15433
15434                                 if (i >= MLX5_MTR_RTE_COLORS)
15435                                         return -rte_mtr_error_set(error,
15436                                         ENOTSUP,
15437                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15438                                         NULL, "cannot create policy "
15439                                         "port action for this color");
15440                                 memset(&port_id_resource, 0,
15441                                         sizeof(port_id_resource));
15442                                 if (flow_dv_translate_action_port_id(dev, act,
15443                                                 &port_id, &flow_err))
15444                                         return -rte_mtr_error_set(error,
15445                                         ENOTSUP,
15446                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15447                                         NULL, "cannot translate "
15448                                         "policy port action");
15449                                 port_id_resource.port_id = port_id;
15450                                 if (flow_dv_port_id_action_resource_register
15451                                         (dev, &port_id_resource,
15452                                         &dev_flow, &flow_err))
15453                                         return -rte_mtr_error_set(error,
15454                                         ENOTSUP,
15455                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15456                                         NULL, "cannot setup "
15457                                         "policy port action");
15458                                 act_cnt->rix_port_id_action =
15459                                         dev_flow.handle->rix_port_id_action;
15460                                 act_cnt->fate_action =
15461                                         MLX5_FLOW_FATE_PORT_ID;
15462                                 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
15463                                 break;
15464                         }
15465                         case RTE_FLOW_ACTION_TYPE_JUMP:
15466                         {
15467                                 uint32_t jump_group = 0;
15468                                 uint32_t table = 0;
15469                                 struct mlx5_flow_tbl_data_entry *tbl_data;
15470                                 struct flow_grp_info grp_info = {
15471                                         .external = !!dev_flow.external,
15472                                         .transfer = !!transfer,
15473                                         .fdb_def_rule = !!priv->fdb_def_rule,
15474                                         .std_tbl_fix = 0,
15475                                         .skip_scale = dev_flow.skip_scale &
15476                                         (1 << MLX5_SCALE_FLOW_GROUP_BIT),
15477                                 };
15478                                 struct mlx5_flow_meter_sub_policy *sub_policy =
15479                                         mtr_policy->sub_policys[domain][0];
15480
15481                                 if (i >= MLX5_MTR_RTE_COLORS)
15482                                         return -rte_mtr_error_set(error,
15483                                           ENOTSUP,
15484                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15485                                           NULL,
15486                                           "cannot create policy "
15487                                           "jump action for this color");
15488                                 jump_group =
15489                                 ((const struct rte_flow_action_jump *)
15490                                                         act->conf)->group;
15491                                 if (mlx5_flow_group_to_table(dev, NULL,
15492                                                        jump_group,
15493                                                        &table,
15494                                                        &grp_info, &flow_err))
15495                                         return -rte_mtr_error_set(error,
15496                                         ENOTSUP,
15497                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15498                                         NULL, "cannot setup "
15499                                         "policy jump action");
15500                                 sub_policy->jump_tbl[i] =
15501                                 flow_dv_tbl_resource_get(dev,
15502                                         table, egress,
15503                                         transfer,
15504                                         !!dev_flow.external,
15505                                         NULL, jump_group, 0,
15506                                         0, &flow_err);
15507                                 if
15508                                 (!sub_policy->jump_tbl[i])
15509                                         return  -rte_mtr_error_set(error,
15510                                         ENOTSUP,
15511                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15512                                         NULL, "cannot create jump action.");
15513                                 tbl_data = container_of
15514                                 (sub_policy->jump_tbl[i],
15515                                 struct mlx5_flow_tbl_data_entry, tbl);
15516                                 act_cnt->dr_jump_action[domain] =
15517                                         tbl_data->jump.action;
15518                                 act_cnt->fate_action =
15519                                         MLX5_FLOW_FATE_JUMP;
15520                                 action_flags |= MLX5_FLOW_ACTION_JUMP;
15521                                 break;
15522                         }
15523                         /*
15524                          * No need to check meter hierarchy for Y or R colors
15525                          * here since it is done in the validation stage.
15526                          */
15527                         case RTE_FLOW_ACTION_TYPE_METER:
15528                         {
15529                                 const struct rte_flow_action_meter *mtr;
15530                                 struct mlx5_flow_meter_info *next_fm;
15531                                 struct mlx5_flow_meter_policy *next_policy;
15532                                 struct rte_flow_action tag_action;
15533                                 struct mlx5_rte_flow_action_set_tag set_tag;
15534                                 uint32_t next_mtr_idx = 0;
15535
15536                                 mtr = act->conf;
15537                                 next_fm = mlx5_flow_meter_find(priv,
15538                                                         mtr->mtr_id,
15539                                                         &next_mtr_idx);
15540                                 if (!next_fm)
15541                                         return -rte_mtr_error_set(error, EINVAL,
15542                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15543                                                 "Fail to find next meter.");
15544                                 if (next_fm->def_policy)
15545                                         return -rte_mtr_error_set(error, EINVAL,
15546                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15547                                 "Hierarchy only supports termination meter.");
15548                                 next_policy = mlx5_flow_meter_policy_find(dev,
15549                                                 next_fm->policy_id, NULL);
15550                                 MLX5_ASSERT(next_policy);
15551                                 if (next_fm->drop_cnt) {
15552                                         set_tag.id =
15553                                                 (enum modify_reg)
15554                                                 mlx5_flow_get_reg_id(dev,
15555                                                 MLX5_MTR_ID,
15556                                                 0,
15557                                                 (struct rte_flow_error *)error);
15558                                         set_tag.offset = (priv->mtr_reg_share ?
15559                                                 MLX5_MTR_COLOR_BITS : 0);
15560                                         set_tag.length = (priv->mtr_reg_share ?
15561                                                MLX5_MTR_IDLE_BITS_IN_COLOR_REG :
15562                                                MLX5_REG_BITS);
15563                                         set_tag.data = next_mtr_idx;
15564                                         tag_action.type =
15565                                                 (enum rte_flow_action_type)
15566                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
15567                                         tag_action.conf = &set_tag;
15568                                         if (flow_dv_convert_action_set_reg
15569                                                 (mhdr_res, &tag_action,
15570                                                 (struct rte_flow_error *)error))
15571                                                 return -rte_errno;
15572                                         action_flags |=
15573                                                 MLX5_FLOW_ACTION_SET_TAG;
15574                                 }
15575                                 act_cnt->fate_action = MLX5_FLOW_FATE_MTR;
15576                                 act_cnt->next_mtr_id = next_fm->meter_id;
15577                                 act_cnt->next_sub_policy = NULL;
15578                                 mtr_policy->is_hierarchy = 1;
15579                                 mtr_policy->dev = next_policy->dev;
15580                                 action_flags |=
15581                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
15582                                 break;
15583                         }
15584                         default:
15585                                 return -rte_mtr_error_set(error, ENOTSUP,
15586                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15587                                           NULL, "action type not supported");
15588                         }
15589                         if (action_flags & MLX5_FLOW_ACTION_SET_TAG) {
15590                                 /* create modify action if needed. */
15591                                 dev_flow.dv.group = 1;
15592                                 if (flow_dv_modify_hdr_resource_register
15593                                         (dev, mhdr_res, &dev_flow, &flow_err))
15594                                         return -rte_mtr_error_set(error,
15595                                                 ENOTSUP,
15596                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
15597                                                 NULL, "cannot register policy "
15598                                                 "set tag action");
15599                                 act_cnt->modify_hdr =
15600                                         dev_flow.handle->dvh.modify_hdr;
15601                         }
15602                 }
15603         }
15604         return 0;
15605 }
15606
15607 /**
15608  * Create policy action per domain, lock free,
15609  * (mutex should be acquired by caller).
15610  * Dispatcher for action type specific call.
15611  *
15612  * @param[in] dev
15613  *   Pointer to the Ethernet device structure.
15614  * @param[in] mtr_policy
15615  *   Meter policy struct.
15616  * @param[in] action
15617  *   Action specification used to create meter actions.
15618  * @param[out] error
15619  *   Perform verbose error reporting if not NULL. Initialized in case of
15620  *   error only.
15621  *
15622  * @return
15623  *   0 on success, otherwise negative errno value.
15624  */
15625 static int
15626 flow_dv_create_mtr_policy_acts(struct rte_eth_dev *dev,
15627                       struct mlx5_flow_meter_policy *mtr_policy,
15628                       const struct rte_flow_action *actions[RTE_COLORS],
15629                       struct rte_mtr_error *error)
15630 {
15631         int ret, i;
15632         uint16_t sub_policy_num;
15633
15634         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15635                 sub_policy_num = (mtr_policy->sub_policy_num >>
15636                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15637                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15638                 if (sub_policy_num) {
15639                         ret = __flow_dv_create_domain_policy_acts(dev,
15640                                 mtr_policy, actions,
15641                                 (enum mlx5_meter_domain)i, error);
15642                         /* Cleaning resource is done in the caller level. */
15643                         if (ret)
15644                                 return ret;
15645                 }
15646         }
15647         return 0;
15648 }
15649
15650 /**
15651  * Query a DV flow rule for its statistics via DevX.
15652  *
15653  * @param[in] dev
15654  *   Pointer to Ethernet device.
15655  * @param[in] cnt_idx
15656  *   Index to the flow counter.
15657  * @param[out] data
15658  *   Data retrieved by the query.
15659  * @param[out] error
15660  *   Perform verbose error reporting if not NULL.
15661  *
15662  * @return
15663  *   0 on success, a negative errno value otherwise and rte_errno is set.
15664  */
15665 static int
15666 flow_dv_query_count(struct rte_eth_dev *dev, uint32_t cnt_idx, void *data,
15667                     struct rte_flow_error *error)
15668 {
15669         struct mlx5_priv *priv = dev->data->dev_private;
15670         struct rte_flow_query_count *qc = data;
15671
15672         if (!priv->config.devx)
15673                 return rte_flow_error_set(error, ENOTSUP,
15674                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15675                                           NULL,
15676                                           "counters are not supported");
15677         if (cnt_idx) {
15678                 uint64_t pkts, bytes;
15679                 struct mlx5_flow_counter *cnt;
15680                 int err = _flow_dv_query_count(dev, cnt_idx, &pkts, &bytes);
15681
15682                 if (err)
15683                         return rte_flow_error_set(error, -err,
15684                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15685                                         NULL, "cannot read counters");
15686                 cnt = flow_dv_counter_get_by_idx(dev, cnt_idx, NULL);
15687                 qc->hits_set = 1;
15688                 qc->bytes_set = 1;
15689                 qc->hits = pkts - cnt->hits;
15690                 qc->bytes = bytes - cnt->bytes;
15691                 if (qc->reset) {
15692                         cnt->hits = pkts;
15693                         cnt->bytes = bytes;
15694                 }
15695                 return 0;
15696         }
15697         return rte_flow_error_set(error, EINVAL,
15698                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15699                                   NULL,
15700                                   "counters are not available");
15701 }
15702
15703 static int
15704 flow_dv_action_query(struct rte_eth_dev *dev,
15705                      const struct rte_flow_action_handle *handle, void *data,
15706                      struct rte_flow_error *error)
15707 {
15708         struct mlx5_age_param *age_param;
15709         struct rte_flow_query_age *resp;
15710         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15711         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15712         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15713         struct mlx5_priv *priv = dev->data->dev_private;
15714         struct mlx5_aso_ct_action *ct;
15715         uint16_t owner;
15716         uint32_t dev_idx;
15717
15718         switch (type) {
15719         case MLX5_INDIRECT_ACTION_TYPE_AGE:
15720                 age_param = &flow_aso_age_get_by_idx(dev, idx)->age_params;
15721                 resp = data;
15722                 resp->aged = __atomic_load_n(&age_param->state,
15723                                               __ATOMIC_RELAXED) == AGE_TMOUT ?
15724                                                                           1 : 0;
15725                 resp->sec_since_last_hit_valid = !resp->aged;
15726                 if (resp->sec_since_last_hit_valid)
15727                         resp->sec_since_last_hit = __atomic_load_n
15728                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15729                 return 0;
15730         case MLX5_INDIRECT_ACTION_TYPE_COUNT:
15731                 return flow_dv_query_count(dev, idx, data, error);
15732         case MLX5_INDIRECT_ACTION_TYPE_CT:
15733                 owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
15734                 if (owner != PORT_ID(priv))
15735                         return rte_flow_error_set(error, EACCES,
15736                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15737                                         NULL,
15738                                         "CT object owned by another port");
15739                 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
15740                 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
15741                 MLX5_ASSERT(ct);
15742                 if (!ct->refcnt)
15743                         return rte_flow_error_set(error, EFAULT,
15744                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15745                                         NULL,
15746                                         "CT object is inactive");
15747                 ((struct rte_flow_action_conntrack *)data)->peer_port =
15748                                                         ct->peer;
15749                 ((struct rte_flow_action_conntrack *)data)->is_original_dir =
15750                                                         ct->is_original;
15751                 if (mlx5_aso_ct_query_by_wqe(priv->sh, ct, data))
15752                         return rte_flow_error_set(error, EIO,
15753                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15754                                         NULL,
15755                                         "Failed to query CT context");
15756                 return 0;
15757         default:
15758                 return rte_flow_error_set(error, ENOTSUP,
15759                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15760                                           "action type query not supported");
15761         }
15762 }
15763
15764 /**
15765  * Query a flow rule AGE action for aging information.
15766  *
15767  * @param[in] dev
15768  *   Pointer to Ethernet device.
15769  * @param[in] flow
15770  *   Pointer to the sub flow.
15771  * @param[out] data
15772  *   data retrieved by the query.
15773  * @param[out] error
15774  *   Perform verbose error reporting if not NULL.
15775  *
15776  * @return
15777  *   0 on success, a negative errno value otherwise and rte_errno is set.
15778  */
15779 static int
15780 flow_dv_query_age(struct rte_eth_dev *dev, struct rte_flow *flow,
15781                   void *data, struct rte_flow_error *error)
15782 {
15783         struct rte_flow_query_age *resp = data;
15784         struct mlx5_age_param *age_param;
15785
15786         if (flow->age) {
15787                 struct mlx5_aso_age_action *act =
15788                                      flow_aso_age_get_by_idx(dev, flow->age);
15789
15790                 age_param = &act->age_params;
15791         } else if (flow->counter) {
15792                 age_param = flow_dv_counter_idx_get_age(dev, flow->counter);
15793
15794                 if (!age_param || !age_param->timeout)
15795                         return rte_flow_error_set
15796                                         (error, EINVAL,
15797                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15798                                          NULL, "cannot read age data");
15799         } else {
15800                 return rte_flow_error_set(error, EINVAL,
15801                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15802                                           NULL, "age data not available");
15803         }
15804         resp->aged = __atomic_load_n(&age_param->state, __ATOMIC_RELAXED) ==
15805                                      AGE_TMOUT ? 1 : 0;
15806         resp->sec_since_last_hit_valid = !resp->aged;
15807         if (resp->sec_since_last_hit_valid)
15808                 resp->sec_since_last_hit = __atomic_load_n
15809                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15810         return 0;
15811 }
15812
15813 /**
15814  * Query a flow.
15815  *
15816  * @see rte_flow_query()
15817  * @see rte_flow_ops
15818  */
15819 static int
15820 flow_dv_query(struct rte_eth_dev *dev,
15821               struct rte_flow *flow __rte_unused,
15822               const struct rte_flow_action *actions __rte_unused,
15823               void *data __rte_unused,
15824               struct rte_flow_error *error __rte_unused)
15825 {
15826         int ret = -EINVAL;
15827
15828         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
15829                 switch (actions->type) {
15830                 case RTE_FLOW_ACTION_TYPE_VOID:
15831                         break;
15832                 case RTE_FLOW_ACTION_TYPE_COUNT:
15833                         ret = flow_dv_query_count(dev, flow->counter, data,
15834                                                   error);
15835                         break;
15836                 case RTE_FLOW_ACTION_TYPE_AGE:
15837                         ret = flow_dv_query_age(dev, flow, data, error);
15838                         break;
15839                 default:
15840                         return rte_flow_error_set(error, ENOTSUP,
15841                                                   RTE_FLOW_ERROR_TYPE_ACTION,
15842                                                   actions,
15843                                                   "action not supported");
15844                 }
15845         }
15846         return ret;
15847 }
15848
15849 /**
15850  * Destroy the meter table set.
15851  * Lock free, (mutex should be acquired by caller).
15852  *
15853  * @param[in] dev
15854  *   Pointer to Ethernet device.
15855  * @param[in] fm
15856  *   Meter information table.
15857  */
15858 static void
15859 flow_dv_destroy_mtr_tbls(struct rte_eth_dev *dev,
15860                         struct mlx5_flow_meter_info *fm)
15861 {
15862         struct mlx5_priv *priv = dev->data->dev_private;
15863         int i;
15864
15865         if (!fm || !priv->config.dv_flow_en)
15866                 return;
15867         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15868                 if (fm->drop_rule[i]) {
15869                         claim_zero(mlx5_flow_os_destroy_flow(fm->drop_rule[i]));
15870                         fm->drop_rule[i] = NULL;
15871                 }
15872         }
15873 }
15874
15875 static void
15876 flow_dv_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
15877 {
15878         struct mlx5_priv *priv = dev->data->dev_private;
15879         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
15880         struct mlx5_flow_tbl_data_entry *tbl;
15881         int i, j;
15882
15883         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15884                 if (mtrmng->def_rule[i]) {
15885                         claim_zero(mlx5_flow_os_destroy_flow
15886                                         (mtrmng->def_rule[i]));
15887                         mtrmng->def_rule[i] = NULL;
15888                 }
15889                 if (mtrmng->def_matcher[i]) {
15890                         tbl = container_of(mtrmng->def_matcher[i]->tbl,
15891                                 struct mlx5_flow_tbl_data_entry, tbl);
15892                         mlx5_list_unregister(tbl->matchers,
15893                                              &mtrmng->def_matcher[i]->entry);
15894                         mtrmng->def_matcher[i] = NULL;
15895                 }
15896                 for (j = 0; j < MLX5_REG_BITS; j++) {
15897                         if (mtrmng->drop_matcher[i][j]) {
15898                                 tbl =
15899                                 container_of(mtrmng->drop_matcher[i][j]->tbl,
15900                                              struct mlx5_flow_tbl_data_entry,
15901                                              tbl);
15902                                 mlx5_list_unregister(tbl->matchers,
15903                                             &mtrmng->drop_matcher[i][j]->entry);
15904                                 mtrmng->drop_matcher[i][j] = NULL;
15905                         }
15906                 }
15907                 if (mtrmng->drop_tbl[i]) {
15908                         flow_dv_tbl_resource_release(MLX5_SH(dev),
15909                                 mtrmng->drop_tbl[i]);
15910                         mtrmng->drop_tbl[i] = NULL;
15911                 }
15912         }
15913 }
15914
15915 /* Number of meter flow actions, count and jump or count and drop. */
15916 #define METER_ACTIONS 2
15917
15918 static void
15919 __flow_dv_destroy_domain_def_policy(struct rte_eth_dev *dev,
15920                                     enum mlx5_meter_domain domain)
15921 {
15922         struct mlx5_priv *priv = dev->data->dev_private;
15923         struct mlx5_flow_meter_def_policy *def_policy =
15924                         priv->sh->mtrmng->def_policy[domain];
15925
15926         __flow_dv_destroy_sub_policy_rules(dev, &def_policy->sub_policy);
15927         mlx5_free(def_policy);
15928         priv->sh->mtrmng->def_policy[domain] = NULL;
15929 }
15930
15931 /**
15932  * Destroy the default policy table set.
15933  *
15934  * @param[in] dev
15935  *   Pointer to Ethernet device.
15936  */
15937 static void
15938 flow_dv_destroy_def_policy(struct rte_eth_dev *dev)
15939 {
15940         struct mlx5_priv *priv = dev->data->dev_private;
15941         int i;
15942
15943         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++)
15944                 if (priv->sh->mtrmng->def_policy[i])
15945                         __flow_dv_destroy_domain_def_policy(dev,
15946                                         (enum mlx5_meter_domain)i);
15947         priv->sh->mtrmng->def_policy_id = MLX5_INVALID_POLICY_ID;
15948 }
15949
15950 static int
15951 __flow_dv_create_policy_flow(struct rte_eth_dev *dev,
15952                         uint32_t color_reg_c_idx,
15953                         enum rte_color color, void *matcher_object,
15954                         int actions_n, void *actions,
15955                         bool match_src_port, const struct rte_flow_item *item,
15956                         void **rule, const struct rte_flow_attr *attr)
15957 {
15958         int ret;
15959         struct mlx5_flow_dv_match_params value = {
15960                 .size = sizeof(value.buf),
15961         };
15962         struct mlx5_flow_dv_match_params matcher = {
15963                 .size = sizeof(matcher.buf),
15964         };
15965         struct mlx5_priv *priv = dev->data->dev_private;
15966         uint8_t misc_mask;
15967
15968         if (match_src_port && (priv->representor || priv->master)) {
15969                 if (flow_dv_translate_item_port_id(dev, matcher.buf,
15970                                                    value.buf, item, attr)) {
15971                         DRV_LOG(ERR, "Failed to create meter policy%d flow's"
15972                                 " value with port.", color);
15973                         return -1;
15974                 }
15975         }
15976         flow_dv_match_meta_reg(matcher.buf, value.buf,
15977                                (enum modify_reg)color_reg_c_idx,
15978                                rte_col_2_mlx5_col(color), UINT32_MAX);
15979         misc_mask = flow_dv_matcher_enable(value.buf);
15980         __flow_dv_adjust_buf_size(&value.size, misc_mask);
15981         ret = mlx5_flow_os_create_flow(matcher_object, (void *)&value,
15982                                        actions_n, actions, rule);
15983         if (ret) {
15984                 DRV_LOG(ERR, "Failed to create meter policy%d flow.", color);
15985                 return -1;
15986         }
15987         return 0;
15988 }
15989
15990 static int
15991 __flow_dv_create_policy_matcher(struct rte_eth_dev *dev,
15992                         uint32_t color_reg_c_idx,
15993                         uint16_t priority,
15994                         struct mlx5_flow_meter_sub_policy *sub_policy,
15995                         const struct rte_flow_attr *attr,
15996                         bool match_src_port,
15997                         const struct rte_flow_item *item,
15998                         struct mlx5_flow_dv_matcher **policy_matcher,
15999                         struct rte_flow_error *error)
16000 {
16001         struct mlx5_list_entry *entry;
16002         struct mlx5_flow_tbl_resource *tbl_rsc = sub_policy->tbl_rsc;
16003         struct mlx5_flow_dv_matcher matcher = {
16004                 .mask = {
16005                         .size = sizeof(matcher.mask.buf),
16006                 },
16007                 .tbl = tbl_rsc,
16008         };
16009         struct mlx5_flow_dv_match_params value = {
16010                 .size = sizeof(value.buf),
16011         };
16012         struct mlx5_flow_cb_ctx ctx = {
16013                 .error = error,
16014                 .data = &matcher,
16015         };
16016         struct mlx5_flow_tbl_data_entry *tbl_data;
16017         struct mlx5_priv *priv = dev->data->dev_private;
16018         const uint32_t color_mask = (UINT32_C(1) << MLX5_MTR_COLOR_BITS) - 1;
16019
16020         if (match_src_port && (priv->representor || priv->master)) {
16021                 if (flow_dv_translate_item_port_id(dev, matcher.mask.buf,
16022                                                    value.buf, item, attr)) {
16023                         DRV_LOG(ERR, "Failed to register meter policy%d matcher"
16024                                 " with port.", priority);
16025                         return -1;
16026                 }
16027         }
16028         tbl_data = container_of(tbl_rsc, struct mlx5_flow_tbl_data_entry, tbl);
16029         if (priority < RTE_COLOR_RED)
16030                 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16031                         (enum modify_reg)color_reg_c_idx, 0, color_mask);
16032         matcher.priority = priority;
16033         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
16034                                     matcher.mask.size);
16035         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16036         if (!entry) {
16037                 DRV_LOG(ERR, "Failed to register meter drop matcher.");
16038                 return -1;
16039         }
16040         *policy_matcher =
16041                 container_of(entry, struct mlx5_flow_dv_matcher, entry);
16042         return 0;
16043 }
16044
16045 /**
16046  * Create the policy rules per domain.
16047  *
16048  * @param[in] dev
16049  *   Pointer to Ethernet device.
16050  * @param[in] sub_policy
16051  *    Pointer to sub policy table..
16052  * @param[in] egress
16053  *   Direction of the table.
16054  * @param[in] transfer
16055  *   E-Switch or NIC flow.
16056  * @param[in] acts
16057  *   Pointer to policy action list per color.
16058  *
16059  * @return
16060  *   0 on success, -1 otherwise.
16061  */
16062 static int
16063 __flow_dv_create_domain_policy_rules(struct rte_eth_dev *dev,
16064                 struct mlx5_flow_meter_sub_policy *sub_policy,
16065                 uint8_t egress, uint8_t transfer, bool match_src_port,
16066                 struct mlx5_meter_policy_acts acts[RTE_COLORS])
16067 {
16068         struct mlx5_priv *priv = dev->data->dev_private;
16069         struct rte_flow_error flow_err;
16070         uint32_t color_reg_c_idx;
16071         struct rte_flow_attr attr = {
16072                 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
16073                 .priority = 0,
16074                 .ingress = 0,
16075                 .egress = !!egress,
16076                 .transfer = !!transfer,
16077                 .reserved = 0,
16078         };
16079         int i;
16080         int ret = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &flow_err);
16081         struct mlx5_sub_policy_color_rule *color_rule;
16082         bool svport_match;
16083         struct mlx5_sub_policy_color_rule *tmp_rules[RTE_COLORS] = {NULL};
16084
16085         if (ret < 0)
16086                 return -1;
16087         /* Create policy table with POLICY level. */
16088         if (!sub_policy->tbl_rsc)
16089                 sub_policy->tbl_rsc = flow_dv_tbl_resource_get(dev,
16090                                 MLX5_FLOW_TABLE_LEVEL_POLICY,
16091                                 egress, transfer, false, NULL, 0, 0,
16092                                 sub_policy->idx, &flow_err);
16093         if (!sub_policy->tbl_rsc) {
16094                 DRV_LOG(ERR,
16095                         "Failed to create meter sub policy table.");
16096                 return -1;
16097         }
16098         /* Prepare matchers. */
16099         color_reg_c_idx = ret;
16100         for (i = 0; i < RTE_COLORS; i++) {
16101                 TAILQ_INIT(&sub_policy->color_rules[i]);
16102                 if (!acts[i].actions_n)
16103                         continue;
16104                 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
16105                                 sizeof(struct mlx5_sub_policy_color_rule),
16106                                 0, SOCKET_ID_ANY);
16107                 if (!color_rule) {
16108                         DRV_LOG(ERR, "No memory to create color rule.");
16109                         goto err_exit;
16110                 }
16111                 tmp_rules[i] = color_rule;
16112                 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
16113                                   color_rule, next_port);
16114                 color_rule->src_port = priv->representor_id;
16115                 /* No use. */
16116                 attr.priority = i;
16117                 /* Create matchers for colors. */
16118                 svport_match = (i != RTE_COLOR_RED) ? match_src_port : false;
16119                 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
16120                                 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
16121                                 &attr, svport_match, NULL,
16122                                 &color_rule->matcher, &flow_err)) {
16123                         DRV_LOG(ERR, "Failed to create color%u matcher.", i);
16124                         goto err_exit;
16125                 }
16126                 /* Create flow, matching color. */
16127                 if (__flow_dv_create_policy_flow(dev,
16128                                 color_reg_c_idx, (enum rte_color)i,
16129                                 color_rule->matcher->matcher_object,
16130                                 acts[i].actions_n, acts[i].dv_actions,
16131                                 svport_match, NULL, &color_rule->rule,
16132                                 &attr)) {
16133                         DRV_LOG(ERR, "Failed to create color%u rule.", i);
16134                         goto err_exit;
16135                 }
16136         }
16137         return 0;
16138 err_exit:
16139         /* All the policy rules will be cleared. */
16140         do {
16141                 color_rule = tmp_rules[i];
16142                 if (color_rule) {
16143                         if (color_rule->rule)
16144                                 mlx5_flow_os_destroy_flow(color_rule->rule);
16145                         if (color_rule->matcher) {
16146                                 struct mlx5_flow_tbl_data_entry *tbl =
16147                                         container_of(color_rule->matcher->tbl,
16148                                                      typeof(*tbl), tbl);
16149                                 mlx5_list_unregister(tbl->matchers,
16150                                                 &color_rule->matcher->entry);
16151                         }
16152                         TAILQ_REMOVE(&sub_policy->color_rules[i],
16153                                      color_rule, next_port);
16154                         mlx5_free(color_rule);
16155                 }
16156         } while (i--);
16157         return -1;
16158 }
16159
16160 static int
16161 __flow_dv_create_policy_acts_rules(struct rte_eth_dev *dev,
16162                         struct mlx5_flow_meter_policy *mtr_policy,
16163                         struct mlx5_flow_meter_sub_policy *sub_policy,
16164                         uint32_t domain)
16165 {
16166         struct mlx5_priv *priv = dev->data->dev_private;
16167         struct mlx5_meter_policy_acts acts[RTE_COLORS];
16168         struct mlx5_flow_dv_tag_resource *tag;
16169         struct mlx5_flow_dv_port_id_action_resource *port_action;
16170         struct mlx5_hrxq *hrxq;
16171         struct mlx5_flow_meter_info *next_fm = NULL;
16172         struct mlx5_flow_meter_policy *next_policy;
16173         struct mlx5_flow_meter_sub_policy *next_sub_policy;
16174         struct mlx5_flow_tbl_data_entry *tbl_data;
16175         struct rte_flow_error error;
16176         uint8_t egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16177         uint8_t transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16178         bool mtr_first = egress || (transfer && priv->representor_id != UINT16_MAX);
16179         bool match_src_port = false;
16180         int i;
16181
16182         /* If RSS or Queue, no previous actions / rules is created. */
16183         for (i = 0; i < RTE_COLORS; i++) {
16184                 acts[i].actions_n = 0;
16185                 if (i == RTE_COLOR_RED) {
16186                         /* Only support drop on red. */
16187                         acts[i].dv_actions[0] =
16188                                 mtr_policy->dr_drop_action[domain];
16189                         acts[i].actions_n = 1;
16190                         continue;
16191                 }
16192                 if (i == RTE_COLOR_GREEN &&
16193                     mtr_policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR) {
16194                         struct rte_flow_attr attr = {
16195                                 .transfer = transfer
16196                         };
16197
16198                         next_fm = mlx5_flow_meter_find(priv,
16199                                         mtr_policy->act_cnt[i].next_mtr_id,
16200                                         NULL);
16201                         if (!next_fm) {
16202                                 DRV_LOG(ERR,
16203                                         "Failed to get next hierarchy meter.");
16204                                 goto err_exit;
16205                         }
16206                         if (mlx5_flow_meter_attach(priv, next_fm,
16207                                                    &attr, &error)) {
16208                                 DRV_LOG(ERR, "%s", error.message);
16209                                 next_fm = NULL;
16210                                 goto err_exit;
16211                         }
16212                         /* Meter action must be the first for TX. */
16213                         if (mtr_first) {
16214                                 acts[i].dv_actions[acts[i].actions_n] =
16215                                         next_fm->meter_action;
16216                                 acts[i].actions_n++;
16217                         }
16218                 }
16219                 if (mtr_policy->act_cnt[i].rix_mark) {
16220                         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG],
16221                                         mtr_policy->act_cnt[i].rix_mark);
16222                         if (!tag) {
16223                                 DRV_LOG(ERR, "Failed to find "
16224                                 "mark action for policy.");
16225                                 goto err_exit;
16226                         }
16227                         acts[i].dv_actions[acts[i].actions_n] = tag->action;
16228                         acts[i].actions_n++;
16229                 }
16230                 if (mtr_policy->act_cnt[i].modify_hdr) {
16231                         acts[i].dv_actions[acts[i].actions_n] =
16232                                 mtr_policy->act_cnt[i].modify_hdr->action;
16233                         acts[i].actions_n++;
16234                 }
16235                 if (mtr_policy->act_cnt[i].fate_action) {
16236                         switch (mtr_policy->act_cnt[i].fate_action) {
16237                         case MLX5_FLOW_FATE_PORT_ID:
16238                                 port_action = mlx5_ipool_get
16239                                         (priv->sh->ipool[MLX5_IPOOL_PORT_ID],
16240                                 mtr_policy->act_cnt[i].rix_port_id_action);
16241                                 if (!port_action) {
16242                                         DRV_LOG(ERR, "Failed to find "
16243                                                 "port action for policy.");
16244                                         goto err_exit;
16245                                 }
16246                                 acts[i].dv_actions[acts[i].actions_n] =
16247                                         port_action->action;
16248                                 acts[i].actions_n++;
16249                                 mtr_policy->dev = dev;
16250                                 match_src_port = true;
16251                                 break;
16252                         case MLX5_FLOW_FATE_DROP:
16253                         case MLX5_FLOW_FATE_JUMP:
16254                                 acts[i].dv_actions[acts[i].actions_n] =
16255                                 mtr_policy->act_cnt[i].dr_jump_action[domain];
16256                                 acts[i].actions_n++;
16257                                 break;
16258                         case MLX5_FLOW_FATE_SHARED_RSS:
16259                         case MLX5_FLOW_FATE_QUEUE:
16260                                 hrxq = mlx5_ipool_get
16261                                         (priv->sh->ipool[MLX5_IPOOL_HRXQ],
16262                                          sub_policy->rix_hrxq[i]);
16263                                 if (!hrxq) {
16264                                         DRV_LOG(ERR, "Failed to find "
16265                                                 "queue action for policy.");
16266                                         goto err_exit;
16267                                 }
16268                                 acts[i].dv_actions[acts[i].actions_n] =
16269                                         hrxq->action;
16270                                 acts[i].actions_n++;
16271                                 break;
16272                         case MLX5_FLOW_FATE_MTR:
16273                                 if (!next_fm) {
16274                                         DRV_LOG(ERR,
16275                                                 "No next hierarchy meter.");
16276                                         goto err_exit;
16277                                 }
16278                                 if (!mtr_first) {
16279                                         acts[i].dv_actions[acts[i].actions_n] =
16280                                                         next_fm->meter_action;
16281                                         acts[i].actions_n++;
16282                                 }
16283                                 if (mtr_policy->act_cnt[i].next_sub_policy) {
16284                                         next_sub_policy =
16285                                         mtr_policy->act_cnt[i].next_sub_policy;
16286                                 } else {
16287                                         next_policy =
16288                                                 mlx5_flow_meter_policy_find(dev,
16289                                                 next_fm->policy_id, NULL);
16290                                         MLX5_ASSERT(next_policy);
16291                                         next_sub_policy =
16292                                         next_policy->sub_policys[domain][0];
16293                                 }
16294                                 tbl_data =
16295                                         container_of(next_sub_policy->tbl_rsc,
16296                                         struct mlx5_flow_tbl_data_entry, tbl);
16297                                 acts[i].dv_actions[acts[i].actions_n++] =
16298                                                         tbl_data->jump.action;
16299                                 if (mtr_policy->act_cnt[i].modify_hdr)
16300                                         match_src_port = !!transfer;
16301                                 break;
16302                         default:
16303                                 /*Queue action do nothing*/
16304                                 break;
16305                         }
16306                 }
16307         }
16308         if (__flow_dv_create_domain_policy_rules(dev, sub_policy,
16309                                 egress, transfer, match_src_port, acts)) {
16310                 DRV_LOG(ERR,
16311                         "Failed to create policy rules per domain.");
16312                 goto err_exit;
16313         }
16314         return 0;
16315 err_exit:
16316         if (next_fm)
16317                 mlx5_flow_meter_detach(priv, next_fm);
16318         return -1;
16319 }
16320
16321 /**
16322  * Create the policy rules.
16323  *
16324  * @param[in] dev
16325  *   Pointer to Ethernet device.
16326  * @param[in,out] mtr_policy
16327  *   Pointer to meter policy table.
16328  *
16329  * @return
16330  *   0 on success, -1 otherwise.
16331  */
16332 static int
16333 flow_dv_create_policy_rules(struct rte_eth_dev *dev,
16334                              struct mlx5_flow_meter_policy *mtr_policy)
16335 {
16336         int i;
16337         uint16_t sub_policy_num;
16338
16339         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16340                 sub_policy_num = (mtr_policy->sub_policy_num >>
16341                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
16342                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16343                 if (!sub_policy_num)
16344                         continue;
16345                 /* Prepare actions list and create policy rules. */
16346                 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16347                         mtr_policy->sub_policys[i][0], i)) {
16348                         DRV_LOG(ERR, "Failed to create policy action "
16349                                 "list per domain.");
16350                         return -1;
16351                 }
16352         }
16353         return 0;
16354 }
16355
16356 static int
16357 __flow_dv_create_domain_def_policy(struct rte_eth_dev *dev, uint32_t domain)
16358 {
16359         struct mlx5_priv *priv = dev->data->dev_private;
16360         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16361         struct mlx5_flow_meter_def_policy *def_policy;
16362         struct mlx5_flow_tbl_resource *jump_tbl;
16363         struct mlx5_flow_tbl_data_entry *tbl_data;
16364         uint8_t egress, transfer;
16365         struct rte_flow_error error;
16366         struct mlx5_meter_policy_acts acts[RTE_COLORS];
16367         int ret;
16368
16369         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16370         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16371         def_policy = mtrmng->def_policy[domain];
16372         if (!def_policy) {
16373                 def_policy = mlx5_malloc(MLX5_MEM_ZERO,
16374                         sizeof(struct mlx5_flow_meter_def_policy),
16375                         RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
16376                 if (!def_policy) {
16377                         DRV_LOG(ERR, "Failed to alloc default policy table.");
16378                         goto def_policy_error;
16379                 }
16380                 mtrmng->def_policy[domain] = def_policy;
16381                 /* Create the meter suffix table with SUFFIX level. */
16382                 jump_tbl = flow_dv_tbl_resource_get(dev,
16383                                 MLX5_FLOW_TABLE_LEVEL_METER,
16384                                 egress, transfer, false, NULL, 0,
16385                                 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16386                 if (!jump_tbl) {
16387                         DRV_LOG(ERR,
16388                                 "Failed to create meter suffix table.");
16389                         goto def_policy_error;
16390                 }
16391                 def_policy->sub_policy.jump_tbl[RTE_COLOR_GREEN] = jump_tbl;
16392                 tbl_data = container_of(jump_tbl,
16393                                         struct mlx5_flow_tbl_data_entry, tbl);
16394                 def_policy->dr_jump_action[RTE_COLOR_GREEN] =
16395                                                 tbl_data->jump.action;
16396                 acts[RTE_COLOR_GREEN].dv_actions[0] = tbl_data->jump.action;
16397                 acts[RTE_COLOR_GREEN].actions_n = 1;
16398                 /*
16399                  * YELLOW has the same default policy as GREEN does.
16400                  * G & Y share the same table and action. The 2nd time of table
16401                  * resource getting is just to update the reference count for
16402                  * the releasing stage.
16403                  */
16404                 jump_tbl = flow_dv_tbl_resource_get(dev,
16405                                 MLX5_FLOW_TABLE_LEVEL_METER,
16406                                 egress, transfer, false, NULL, 0,
16407                                 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16408                 if (!jump_tbl) {
16409                         DRV_LOG(ERR,
16410                                 "Failed to get meter suffix table.");
16411                         goto def_policy_error;
16412                 }
16413                 def_policy->sub_policy.jump_tbl[RTE_COLOR_YELLOW] = jump_tbl;
16414                 tbl_data = container_of(jump_tbl,
16415                                         struct mlx5_flow_tbl_data_entry, tbl);
16416                 def_policy->dr_jump_action[RTE_COLOR_YELLOW] =
16417                                                 tbl_data->jump.action;
16418                 acts[RTE_COLOR_YELLOW].dv_actions[0] = tbl_data->jump.action;
16419                 acts[RTE_COLOR_YELLOW].actions_n = 1;
16420                 /* Create jump action to the drop table. */
16421                 if (!mtrmng->drop_tbl[domain]) {
16422                         mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get
16423                                 (dev, MLX5_FLOW_TABLE_LEVEL_METER,
16424                                  egress, transfer, false, NULL, 0,
16425                                  0, MLX5_MTR_TABLE_ID_DROP, &error);
16426                         if (!mtrmng->drop_tbl[domain]) {
16427                                 DRV_LOG(ERR, "Failed to create meter "
16428                                         "drop table for default policy.");
16429                                 goto def_policy_error;
16430                         }
16431                 }
16432                 /* all RED: unique Drop table for jump action. */
16433                 tbl_data = container_of(mtrmng->drop_tbl[domain],
16434                                         struct mlx5_flow_tbl_data_entry, tbl);
16435                 def_policy->dr_jump_action[RTE_COLOR_RED] =
16436                                                 tbl_data->jump.action;
16437                 acts[RTE_COLOR_RED].dv_actions[0] = tbl_data->jump.action;
16438                 acts[RTE_COLOR_RED].actions_n = 1;
16439                 /* Create default policy rules. */
16440                 ret = __flow_dv_create_domain_policy_rules(dev,
16441                                         &def_policy->sub_policy,
16442                                         egress, transfer, false, acts);
16443                 if (ret) {
16444                         DRV_LOG(ERR, "Failed to create default policy rules.");
16445                         goto def_policy_error;
16446                 }
16447         }
16448         return 0;
16449 def_policy_error:
16450         __flow_dv_destroy_domain_def_policy(dev,
16451                                             (enum mlx5_meter_domain)domain);
16452         return -1;
16453 }
16454
16455 /**
16456  * Create the default policy table set.
16457  *
16458  * @param[in] dev
16459  *   Pointer to Ethernet device.
16460  * @return
16461  *   0 on success, -1 otherwise.
16462  */
16463 static int
16464 flow_dv_create_def_policy(struct rte_eth_dev *dev)
16465 {
16466         struct mlx5_priv *priv = dev->data->dev_private;
16467         int i;
16468
16469         /* Non-termination policy table. */
16470         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16471                 if (!priv->config.dv_esw_en && i == MLX5_MTR_DOMAIN_TRANSFER)
16472                         continue;
16473                 if (__flow_dv_create_domain_def_policy(dev, i)) {
16474                         DRV_LOG(ERR, "Failed to create default policy");
16475                         /* Rollback the created default policies for others. */
16476                         flow_dv_destroy_def_policy(dev);
16477                         return -1;
16478                 }
16479         }
16480         return 0;
16481 }
16482
16483 /**
16484  * Create the needed meter tables.
16485  * Lock free, (mutex should be acquired by caller).
16486  *
16487  * @param[in] dev
16488  *   Pointer to Ethernet device.
16489  * @param[in] fm
16490  *   Meter information table.
16491  * @param[in] mtr_idx
16492  *   Meter index.
16493  * @param[in] domain_bitmap
16494  *   Domain bitmap.
16495  * @return
16496  *   0 on success, -1 otherwise.
16497  */
16498 static int
16499 flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,
16500                         struct mlx5_flow_meter_info *fm,
16501                         uint32_t mtr_idx,
16502                         uint8_t domain_bitmap)
16503 {
16504         struct mlx5_priv *priv = dev->data->dev_private;
16505         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16506         struct rte_flow_error error;
16507         struct mlx5_flow_tbl_data_entry *tbl_data;
16508         uint8_t egress, transfer;
16509         void *actions[METER_ACTIONS];
16510         int domain, ret, i;
16511         struct mlx5_flow_counter *cnt;
16512         struct mlx5_flow_dv_match_params value = {
16513                 .size = sizeof(value.buf),
16514         };
16515         struct mlx5_flow_dv_match_params matcher_para = {
16516                 .size = sizeof(matcher_para.buf),
16517         };
16518         int mtr_id_reg_c = mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
16519                                                      0, &error);
16520         uint32_t mtr_id_mask = (UINT32_C(1) << mtrmng->max_mtr_bits) - 1;
16521         uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
16522         struct mlx5_list_entry *entry;
16523         struct mlx5_flow_dv_matcher matcher = {
16524                 .mask = {
16525                         .size = sizeof(matcher.mask.buf),
16526                 },
16527         };
16528         struct mlx5_flow_dv_matcher *drop_matcher;
16529         struct mlx5_flow_cb_ctx ctx = {
16530                 .error = &error,
16531                 .data = &matcher,
16532         };
16533         uint8_t misc_mask;
16534
16535         if (!priv->mtr_en || mtr_id_reg_c < 0) {
16536                 rte_errno = ENOTSUP;
16537                 return -1;
16538         }
16539         for (domain = 0; domain < MLX5_MTR_DOMAIN_MAX; domain++) {
16540                 if (!(domain_bitmap & (1 << domain)) ||
16541                         (mtrmng->def_rule[domain] && !fm->drop_cnt))
16542                         continue;
16543                 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16544                 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16545                 /* Create the drop table with METER DROP level. */
16546                 if (!mtrmng->drop_tbl[domain]) {
16547                         mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get(dev,
16548                                         MLX5_FLOW_TABLE_LEVEL_METER,
16549                                         egress, transfer, false, NULL, 0,
16550                                         0, MLX5_MTR_TABLE_ID_DROP, &error);
16551                         if (!mtrmng->drop_tbl[domain]) {
16552                                 DRV_LOG(ERR, "Failed to create meter drop table.");
16553                                 goto policy_error;
16554                         }
16555                 }
16556                 /* Create default matcher in drop table. */
16557                 matcher.tbl = mtrmng->drop_tbl[domain],
16558                 tbl_data = container_of(mtrmng->drop_tbl[domain],
16559                                 struct mlx5_flow_tbl_data_entry, tbl);
16560                 if (!mtrmng->def_matcher[domain]) {
16561                         flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16562                                        (enum modify_reg)mtr_id_reg_c,
16563                                        0, 0);
16564                         matcher.priority = MLX5_MTRS_DEFAULT_RULE_PRIORITY;
16565                         matcher.crc = rte_raw_cksum
16566                                         ((const void *)matcher.mask.buf,
16567                                         matcher.mask.size);
16568                         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16569                         if (!entry) {
16570                                 DRV_LOG(ERR, "Failed to register meter "
16571                                 "drop default matcher.");
16572                                 goto policy_error;
16573                         }
16574                         mtrmng->def_matcher[domain] = container_of(entry,
16575                         struct mlx5_flow_dv_matcher, entry);
16576                 }
16577                 /* Create default rule in drop table. */
16578                 if (!mtrmng->def_rule[domain]) {
16579                         i = 0;
16580                         actions[i++] = priv->sh->dr_drop_action;
16581                         flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16582                                 (enum modify_reg)mtr_id_reg_c, 0, 0);
16583                         misc_mask = flow_dv_matcher_enable(value.buf);
16584                         __flow_dv_adjust_buf_size(&value.size, misc_mask);
16585                         ret = mlx5_flow_os_create_flow
16586                                 (mtrmng->def_matcher[domain]->matcher_object,
16587                                 (void *)&value, i, actions,
16588                                 &mtrmng->def_rule[domain]);
16589                         if (ret) {
16590                                 DRV_LOG(ERR, "Failed to create meter "
16591                                 "default drop rule for drop table.");
16592                                 goto policy_error;
16593                         }
16594                 }
16595                 if (!fm->drop_cnt)
16596                         continue;
16597                 MLX5_ASSERT(mtrmng->max_mtr_bits);
16598                 if (!mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1]) {
16599                         /* Create matchers for Drop. */
16600                         flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16601                                         (enum modify_reg)mtr_id_reg_c, 0,
16602                                         (mtr_id_mask << mtr_id_offset));
16603                         matcher.priority = MLX5_REG_BITS - mtrmng->max_mtr_bits;
16604                         matcher.crc = rte_raw_cksum
16605                                         ((const void *)matcher.mask.buf,
16606                                         matcher.mask.size);
16607                         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16608                         if (!entry) {
16609                                 DRV_LOG(ERR,
16610                                 "Failed to register meter drop matcher.");
16611                                 goto policy_error;
16612                         }
16613                         mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1] =
16614                                 container_of(entry, struct mlx5_flow_dv_matcher,
16615                                              entry);
16616                 }
16617                 drop_matcher =
16618                         mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1];
16619                 /* Create drop rule, matching meter_id only. */
16620                 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16621                                 (enum modify_reg)mtr_id_reg_c,
16622                                 (mtr_idx << mtr_id_offset), UINT32_MAX);
16623                 i = 0;
16624                 cnt = flow_dv_counter_get_by_idx(dev,
16625                                         fm->drop_cnt, NULL);
16626                 actions[i++] = cnt->action;
16627                 actions[i++] = priv->sh->dr_drop_action;
16628                 misc_mask = flow_dv_matcher_enable(value.buf);
16629                 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16630                 ret = mlx5_flow_os_create_flow(drop_matcher->matcher_object,
16631                                                (void *)&value, i, actions,
16632                                                &fm->drop_rule[domain]);
16633                 if (ret) {
16634                         DRV_LOG(ERR, "Failed to create meter "
16635                                 "drop rule for drop table.");
16636                                 goto policy_error;
16637                 }
16638         }
16639         return 0;
16640 policy_error:
16641         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16642                 if (fm->drop_rule[i]) {
16643                         claim_zero(mlx5_flow_os_destroy_flow
16644                                 (fm->drop_rule[i]));
16645                         fm->drop_rule[i] = NULL;
16646                 }
16647         }
16648         return -1;
16649 }
16650
16651 static struct mlx5_flow_meter_sub_policy *
16652 __flow_dv_meter_get_rss_sub_policy(struct rte_eth_dev *dev,
16653                 struct mlx5_flow_meter_policy *mtr_policy,
16654                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS],
16655                 struct mlx5_flow_meter_sub_policy *next_sub_policy,
16656                 bool *is_reuse)
16657 {
16658         struct mlx5_priv *priv = dev->data->dev_private;
16659         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16660         uint32_t sub_policy_idx = 0;
16661         uint32_t hrxq_idx[MLX5_MTR_RTE_COLORS] = {0};
16662         uint32_t i, j;
16663         struct mlx5_hrxq *hrxq;
16664         struct mlx5_flow_handle dh;
16665         struct mlx5_meter_policy_action_container *act_cnt;
16666         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16667         uint16_t sub_policy_num;
16668
16669         rte_spinlock_lock(&mtr_policy->sl);
16670         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16671                 if (!rss_desc[i])
16672                         continue;
16673                 hrxq_idx[i] = mlx5_hrxq_get(dev, rss_desc[i]);
16674                 if (!hrxq_idx[i]) {
16675                         rte_spinlock_unlock(&mtr_policy->sl);
16676                         return NULL;
16677                 }
16678         }
16679         sub_policy_num = (mtr_policy->sub_policy_num >>
16680                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16681                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16682         for (j = 0; j < sub_policy_num; j++) {
16683                 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16684                         if (rss_desc[i] &&
16685                             hrxq_idx[i] !=
16686                             mtr_policy->sub_policys[domain][j]->rix_hrxq[i])
16687                                 break;
16688                 }
16689                 if (i >= MLX5_MTR_RTE_COLORS) {
16690                         /*
16691                          * Found the sub policy table with
16692                          * the same queue per color.
16693                          */
16694                         rte_spinlock_unlock(&mtr_policy->sl);
16695                         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16696                                 mlx5_hrxq_release(dev, hrxq_idx[i]);
16697                         *is_reuse = true;
16698                         return mtr_policy->sub_policys[domain][j];
16699                 }
16700         }
16701         /* Create sub policy. */
16702         if (!mtr_policy->sub_policys[domain][0]->rix_hrxq[0]) {
16703                 /* Reuse the first pre-allocated sub_policy. */
16704                 sub_policy = mtr_policy->sub_policys[domain][0];
16705                 sub_policy_idx = sub_policy->idx;
16706         } else {
16707                 sub_policy = mlx5_ipool_zmalloc
16708                                 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16709                                  &sub_policy_idx);
16710                 if (!sub_policy ||
16711                     sub_policy_idx > MLX5_MAX_SUB_POLICY_TBL_NUM) {
16712                         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16713                                 mlx5_hrxq_release(dev, hrxq_idx[i]);
16714                         goto rss_sub_policy_error;
16715                 }
16716                 sub_policy->idx = sub_policy_idx;
16717                 sub_policy->main_policy = mtr_policy;
16718         }
16719         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16720                 if (!rss_desc[i])
16721                         continue;
16722                 sub_policy->rix_hrxq[i] = hrxq_idx[i];
16723                 if (mtr_policy->is_hierarchy) {
16724                         act_cnt = &mtr_policy->act_cnt[i];
16725                         act_cnt->next_sub_policy = next_sub_policy;
16726                         mlx5_hrxq_release(dev, hrxq_idx[i]);
16727                 } else {
16728                         /*
16729                          * Overwrite the last action from
16730                          * RSS action to Queue action.
16731                          */
16732                         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
16733                                               hrxq_idx[i]);
16734                         if (!hrxq) {
16735                                 DRV_LOG(ERR, "Failed to get policy hrxq");
16736                                 goto rss_sub_policy_error;
16737                         }
16738                         act_cnt = &mtr_policy->act_cnt[i];
16739                         if (act_cnt->rix_mark || act_cnt->modify_hdr) {
16740                                 memset(&dh, 0, sizeof(struct mlx5_flow_handle));
16741                                 if (act_cnt->rix_mark)
16742                                         dh.mark = 1;
16743                                 dh.fate_action = MLX5_FLOW_FATE_QUEUE;
16744                                 dh.rix_hrxq = hrxq_idx[i];
16745                                 flow_drv_rxq_flags_set(dev, &dh);
16746                         }
16747                 }
16748         }
16749         if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16750                                                sub_policy, domain)) {
16751                 DRV_LOG(ERR, "Failed to create policy "
16752                         "rules for ingress domain.");
16753                 goto rss_sub_policy_error;
16754         }
16755         if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16756                 i = (mtr_policy->sub_policy_num >>
16757                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16758                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16759                 if (i >= MLX5_MTR_RSS_MAX_SUB_POLICY) {
16760                         DRV_LOG(ERR, "No free sub-policy slot.");
16761                         goto rss_sub_policy_error;
16762                 }
16763                 mtr_policy->sub_policys[domain][i] = sub_policy;
16764                 i++;
16765                 mtr_policy->sub_policy_num &= ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16766                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
16767                 mtr_policy->sub_policy_num |=
16768                         (i & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16769                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
16770         }
16771         rte_spinlock_unlock(&mtr_policy->sl);
16772         *is_reuse = false;
16773         return sub_policy;
16774 rss_sub_policy_error:
16775         if (sub_policy) {
16776                 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16777                 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16778                         i = (mtr_policy->sub_policy_num >>
16779                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16780                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16781                         mtr_policy->sub_policys[domain][i] = NULL;
16782                         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16783                                         sub_policy->idx);
16784                 }
16785         }
16786         rte_spinlock_unlock(&mtr_policy->sl);
16787         return NULL;
16788 }
16789
16790 /**
16791  * Find the policy table for prefix table with RSS.
16792  *
16793  * @param[in] dev
16794  *   Pointer to Ethernet device.
16795  * @param[in] mtr_policy
16796  *   Pointer to meter policy table.
16797  * @param[in] rss_desc
16798  *   Pointer to rss_desc
16799  * @return
16800  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
16801  */
16802 static struct mlx5_flow_meter_sub_policy *
16803 flow_dv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
16804                 struct mlx5_flow_meter_policy *mtr_policy,
16805                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
16806 {
16807         struct mlx5_priv *priv = dev->data->dev_private;
16808         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16809         struct mlx5_flow_meter_info *next_fm;
16810         struct mlx5_flow_meter_policy *next_policy;
16811         struct mlx5_flow_meter_sub_policy *next_sub_policy = NULL;
16812         struct mlx5_flow_meter_policy *policies[MLX5_MTR_CHAIN_MAX_NUM];
16813         struct mlx5_flow_meter_sub_policy *sub_policies[MLX5_MTR_CHAIN_MAX_NUM];
16814         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16815         bool reuse_sub_policy;
16816         uint32_t i = 0;
16817         uint32_t j = 0;
16818
16819         while (true) {
16820                 /* Iterate hierarchy to get all policies in this hierarchy. */
16821                 policies[i++] = mtr_policy;
16822                 if (!mtr_policy->is_hierarchy)
16823                         break;
16824                 if (i >= MLX5_MTR_CHAIN_MAX_NUM) {
16825                         DRV_LOG(ERR, "Exceed max meter number in hierarchy.");
16826                         return NULL;
16827                 }
16828                 next_fm = mlx5_flow_meter_find(priv,
16829                         mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
16830                 if (!next_fm) {
16831                         DRV_LOG(ERR, "Failed to get next meter in hierarchy.");
16832                         return NULL;
16833                 }
16834                 next_policy =
16835                         mlx5_flow_meter_policy_find(dev, next_fm->policy_id,
16836                                                     NULL);
16837                 MLX5_ASSERT(next_policy);
16838                 mtr_policy = next_policy;
16839         }
16840         while (i) {
16841                 /**
16842                  * From last policy to the first one in hierarchy,
16843                  * create / get the sub policy for each of them.
16844                  */
16845                 sub_policy = __flow_dv_meter_get_rss_sub_policy(dev,
16846                                                         policies[--i],
16847                                                         rss_desc,
16848                                                         next_sub_policy,
16849                                                         &reuse_sub_policy);
16850                 if (!sub_policy) {
16851                         DRV_LOG(ERR, "Failed to get the sub policy.");
16852                         goto err_exit;
16853                 }
16854                 if (!reuse_sub_policy)
16855                         sub_policies[j++] = sub_policy;
16856                 next_sub_policy = sub_policy;
16857         }
16858         return sub_policy;
16859 err_exit:
16860         while (j) {
16861                 uint16_t sub_policy_num;
16862
16863                 sub_policy = sub_policies[--j];
16864                 mtr_policy = sub_policy->main_policy;
16865                 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16866                 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16867                         sub_policy_num = (mtr_policy->sub_policy_num >>
16868                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16869                                 MLX5_MTR_SUB_POLICY_NUM_MASK;
16870                         mtr_policy->sub_policys[domain][sub_policy_num - 1] =
16871                                                                         NULL;
16872                         sub_policy_num--;
16873                         mtr_policy->sub_policy_num &=
16874                                 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16875                                   (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i));
16876                         mtr_policy->sub_policy_num |=
16877                         (sub_policy_num & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16878                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i);
16879                         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16880                                         sub_policy->idx);
16881                 }
16882         }
16883         return NULL;
16884 }
16885
16886 /**
16887  * Create the sub policy tag rule for all meters in hierarchy.
16888  *
16889  * @param[in] dev
16890  *   Pointer to Ethernet device.
16891  * @param[in] fm
16892  *   Meter information table.
16893  * @param[in] src_port
16894  *   The src port this extra rule should use.
16895  * @param[in] item
16896  *   The src port match item.
16897  * @param[out] error
16898  *   Perform verbose error reporting if not NULL.
16899  * @return
16900  *   0 on success, a negative errno value otherwise and rte_errno is set.
16901  */
16902 static int
16903 flow_dv_meter_hierarchy_rule_create(struct rte_eth_dev *dev,
16904                                 struct mlx5_flow_meter_info *fm,
16905                                 int32_t src_port,
16906                                 const struct rte_flow_item *item,
16907                                 struct rte_flow_error *error)
16908 {
16909         struct mlx5_priv *priv = dev->data->dev_private;
16910         struct mlx5_flow_meter_policy *mtr_policy;
16911         struct mlx5_flow_meter_sub_policy *sub_policy;
16912         struct mlx5_flow_meter_info *next_fm = NULL;
16913         struct mlx5_flow_meter_policy *next_policy;
16914         struct mlx5_flow_meter_sub_policy *next_sub_policy;
16915         struct mlx5_flow_tbl_data_entry *tbl_data;
16916         struct mlx5_sub_policy_color_rule *color_rule;
16917         struct mlx5_meter_policy_acts acts;
16918         uint32_t color_reg_c_idx;
16919         bool mtr_first = (src_port != UINT16_MAX) ? true : false;
16920         struct rte_flow_attr attr = {
16921                 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
16922                 .priority = 0,
16923                 .ingress = 0,
16924                 .egress = 0,
16925                 .transfer = 1,
16926                 .reserved = 0,
16927         };
16928         uint32_t domain = MLX5_MTR_DOMAIN_TRANSFER;
16929         int i;
16930
16931         mtr_policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
16932         MLX5_ASSERT(mtr_policy);
16933         if (!mtr_policy->is_hierarchy)
16934                 return 0;
16935         next_fm = mlx5_flow_meter_find(priv,
16936                         mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
16937         if (!next_fm) {
16938                 return rte_flow_error_set(error, EINVAL,
16939                                 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
16940                                 "Failed to find next meter in hierarchy.");
16941         }
16942         if (!next_fm->drop_cnt)
16943                 goto exit;
16944         color_reg_c_idx = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, error);
16945         sub_policy = mtr_policy->sub_policys[domain][0];
16946         for (i = 0; i < RTE_COLORS; i++) {
16947                 bool rule_exist = false;
16948                 struct mlx5_meter_policy_action_container *act_cnt;
16949
16950                 if (i >= RTE_COLOR_YELLOW)
16951                         break;
16952                 TAILQ_FOREACH(color_rule,
16953                               &sub_policy->color_rules[i], next_port)
16954                         if (color_rule->src_port == src_port) {
16955                                 rule_exist = true;
16956                                 break;
16957                         }
16958                 if (rule_exist)
16959                         continue;
16960                 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
16961                                 sizeof(struct mlx5_sub_policy_color_rule),
16962                                 0, SOCKET_ID_ANY);
16963                 if (!color_rule)
16964                         return rte_flow_error_set(error, ENOMEM,
16965                                 RTE_FLOW_ERROR_TYPE_ACTION,
16966                                 NULL, "No memory to create tag color rule.");
16967                 color_rule->src_port = src_port;
16968                 attr.priority = i;
16969                 next_policy = mlx5_flow_meter_policy_find(dev,
16970                                                 next_fm->policy_id, NULL);
16971                 MLX5_ASSERT(next_policy);
16972                 next_sub_policy = next_policy->sub_policys[domain][0];
16973                 tbl_data = container_of(next_sub_policy->tbl_rsc,
16974                                         struct mlx5_flow_tbl_data_entry, tbl);
16975                 act_cnt = &mtr_policy->act_cnt[i];
16976                 if (mtr_first) {
16977                         acts.dv_actions[0] = next_fm->meter_action;
16978                         acts.dv_actions[1] = act_cnt->modify_hdr->action;
16979                 } else {
16980                         acts.dv_actions[0] = act_cnt->modify_hdr->action;
16981                         acts.dv_actions[1] = next_fm->meter_action;
16982                 }
16983                 acts.dv_actions[2] = tbl_data->jump.action;
16984                 acts.actions_n = 3;
16985                 if (mlx5_flow_meter_attach(priv, next_fm, &attr, error)) {
16986                         next_fm = NULL;
16987                         goto err_exit;
16988                 }
16989                 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
16990                                 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
16991                                 &attr, true, item,
16992                                 &color_rule->matcher, error)) {
16993                         rte_flow_error_set(error, errno,
16994                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
16995                                 "Failed to create hierarchy meter matcher.");
16996                         goto err_exit;
16997                 }
16998                 if (__flow_dv_create_policy_flow(dev, color_reg_c_idx,
16999                                         (enum rte_color)i,
17000                                         color_rule->matcher->matcher_object,
17001                                         acts.actions_n, acts.dv_actions,
17002                                         true, item,
17003                                         &color_rule->rule, &attr)) {
17004                         rte_flow_error_set(error, errno,
17005                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17006                                 "Failed to create hierarchy meter rule.");
17007                         goto err_exit;
17008                 }
17009                 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
17010                                   color_rule, next_port);
17011         }
17012 exit:
17013         /**
17014          * Recursive call to iterate all meters in hierarchy and
17015          * create needed rules.
17016          */
17017         return flow_dv_meter_hierarchy_rule_create(dev, next_fm,
17018                                                 src_port, item, error);
17019 err_exit:
17020         if (color_rule) {
17021                 if (color_rule->rule)
17022                         mlx5_flow_os_destroy_flow(color_rule->rule);
17023                 if (color_rule->matcher) {
17024                         struct mlx5_flow_tbl_data_entry *tbl =
17025                                 container_of(color_rule->matcher->tbl,
17026                                                 typeof(*tbl), tbl);
17027                         mlx5_list_unregister(tbl->matchers,
17028                                                 &color_rule->matcher->entry);
17029                 }
17030                 mlx5_free(color_rule);
17031         }
17032         if (next_fm)
17033                 mlx5_flow_meter_detach(priv, next_fm);
17034         return -rte_errno;
17035 }
17036
17037 /**
17038  * Destroy the sub policy table with RX queue.
17039  *
17040  * @param[in] dev
17041  *   Pointer to Ethernet device.
17042  * @param[in] mtr_policy
17043  *   Pointer to meter policy table.
17044  */
17045 static void
17046 flow_dv_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
17047                                     struct mlx5_flow_meter_policy *mtr_policy)
17048 {
17049         struct mlx5_priv *priv = dev->data->dev_private;
17050         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
17051         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
17052         uint32_t i, j;
17053         uint16_t sub_policy_num, new_policy_num;
17054
17055         rte_spinlock_lock(&mtr_policy->sl);
17056         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
17057                 switch (mtr_policy->act_cnt[i].fate_action) {
17058                 case MLX5_FLOW_FATE_SHARED_RSS:
17059                         sub_policy_num = (mtr_policy->sub_policy_num >>
17060                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17061                         MLX5_MTR_SUB_POLICY_NUM_MASK;
17062                         new_policy_num = sub_policy_num;
17063                         for (j = 0; j < sub_policy_num; j++) {
17064                                 sub_policy =
17065                                         mtr_policy->sub_policys[domain][j];
17066                                 if (sub_policy) {
17067                                         __flow_dv_destroy_sub_policy_rules(dev,
17068                                                 sub_policy);
17069                                 if (sub_policy !=
17070                                         mtr_policy->sub_policys[domain][0]) {
17071                                         mtr_policy->sub_policys[domain][j] =
17072                                                                 NULL;
17073                                         mlx5_ipool_free
17074                                 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17075                                                 sub_policy->idx);
17076                                                 new_policy_num--;
17077                                         }
17078                                 }
17079                         }
17080                         if (new_policy_num != sub_policy_num) {
17081                                 mtr_policy->sub_policy_num &=
17082                                 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17083                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
17084                                 mtr_policy->sub_policy_num |=
17085                                 (new_policy_num &
17086                                         MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17087                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
17088                         }
17089                         break;
17090                 case MLX5_FLOW_FATE_QUEUE:
17091                         sub_policy = mtr_policy->sub_policys[domain][0];
17092                         __flow_dv_destroy_sub_policy_rules(dev,
17093                                                            sub_policy);
17094                         break;
17095                 default:
17096                         /*Other actions without queue and do nothing*/
17097                         break;
17098                 }
17099         }
17100         rte_spinlock_unlock(&mtr_policy->sl);
17101 }
17102 /**
17103  * Check whether the DR drop action is supported on the root table or not.
17104  *
17105  * Create a simple flow with DR drop action on root table to validate
17106  * if DR drop action on root table is supported or not.
17107  *
17108  * @param[in] dev
17109  *   Pointer to rte_eth_dev structure.
17110  *
17111  * @return
17112  *   0 on success, a negative errno value otherwise and rte_errno is set.
17113  */
17114 int
17115 mlx5_flow_discover_dr_action_support(struct rte_eth_dev *dev)
17116 {
17117         struct mlx5_priv *priv = dev->data->dev_private;
17118         struct mlx5_dev_ctx_shared *sh = priv->sh;
17119         struct mlx5_flow_dv_match_params mask = {
17120                 .size = sizeof(mask.buf),
17121         };
17122         struct mlx5_flow_dv_match_params value = {
17123                 .size = sizeof(value.buf),
17124         };
17125         struct mlx5dv_flow_matcher_attr dv_attr = {
17126                 .type = IBV_FLOW_ATTR_NORMAL,
17127                 .priority = 0,
17128                 .match_criteria_enable = 0,
17129                 .match_mask = (void *)&mask,
17130         };
17131         struct mlx5_flow_tbl_resource *tbl = NULL;
17132         void *matcher = NULL;
17133         void *flow = NULL;
17134         int ret = -1;
17135
17136         tbl = flow_dv_tbl_resource_get(dev, 0, 0, 0, false, NULL,
17137                                         0, 0, 0, NULL);
17138         if (!tbl)
17139                 goto err;
17140         dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17141         __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17142         ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj,
17143                                                &matcher);
17144         if (ret)
17145                 goto err;
17146         __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17147         ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17148                                        &sh->dr_drop_action, &flow);
17149 err:
17150         /*
17151          * If DR drop action is not supported on root table, flow create will
17152          * be failed with EOPNOTSUPP or EPROTONOSUPPORT.
17153          */
17154         if (!flow) {
17155                 if (matcher &&
17156                     (errno == EPROTONOSUPPORT || errno == EOPNOTSUPP))
17157                         DRV_LOG(INFO, "DR drop action is not supported in root table.");
17158                 else
17159                         DRV_LOG(ERR, "Unexpected error in DR drop action support detection");
17160                 ret = -1;
17161         } else {
17162                 claim_zero(mlx5_flow_os_destroy_flow(flow));
17163         }
17164         if (matcher)
17165                 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17166         if (tbl)
17167                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17168         return ret;
17169 }
17170
17171 /**
17172  * Validate the batch counter support in root table.
17173  *
17174  * Create a simple flow with invalid counter and drop action on root table to
17175  * validate if batch counter with offset on root table is supported or not.
17176  *
17177  * @param[in] dev
17178  *   Pointer to rte_eth_dev structure.
17179  *
17180  * @return
17181  *   0 on success, a negative errno value otherwise and rte_errno is set.
17182  */
17183 int
17184 mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)
17185 {
17186         struct mlx5_priv *priv = dev->data->dev_private;
17187         struct mlx5_dev_ctx_shared *sh = priv->sh;
17188         struct mlx5_flow_dv_match_params mask = {
17189                 .size = sizeof(mask.buf),
17190         };
17191         struct mlx5_flow_dv_match_params value = {
17192                 .size = sizeof(value.buf),
17193         };
17194         struct mlx5dv_flow_matcher_attr dv_attr = {
17195                 .type = IBV_FLOW_ATTR_NORMAL | IBV_FLOW_ATTR_FLAGS_EGRESS,
17196                 .priority = 0,
17197                 .match_criteria_enable = 0,
17198                 .match_mask = (void *)&mask,
17199         };
17200         void *actions[2] = { 0 };
17201         struct mlx5_flow_tbl_resource *tbl = NULL;
17202         struct mlx5_devx_obj *dcs = NULL;
17203         void *matcher = NULL;
17204         void *flow = NULL;
17205         int ret = -1;
17206
17207         tbl = flow_dv_tbl_resource_get(dev, 0, 1, 0, false, NULL,
17208                                         0, 0, 0, NULL);
17209         if (!tbl)
17210                 goto err;
17211         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
17212         if (!dcs)
17213                 goto err;
17214         ret = mlx5_flow_os_create_flow_action_count(dcs->obj, UINT16_MAX,
17215                                                     &actions[0]);
17216         if (ret)
17217                 goto err;
17218         dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17219         __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17220         ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj,
17221                                                &matcher);
17222         if (ret)
17223                 goto err;
17224         __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17225         ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17226                                        actions, &flow);
17227 err:
17228         /*
17229          * If batch counter with offset is not supported, the driver will not
17230          * validate the invalid offset value, flow create should success.
17231          * In this case, it means batch counter is not supported in root table.
17232          *
17233          * Otherwise, if flow create is failed, counter offset is supported.
17234          */
17235         if (flow) {
17236                 DRV_LOG(INFO, "Batch counter is not supported in root "
17237                               "table. Switch to fallback mode.");
17238                 rte_errno = ENOTSUP;
17239                 ret = -rte_errno;
17240                 claim_zero(mlx5_flow_os_destroy_flow(flow));
17241         } else {
17242                 /* Check matcher to make sure validate fail at flow create. */
17243                 if (!matcher || (matcher && errno != EINVAL))
17244                         DRV_LOG(ERR, "Unexpected error in counter offset "
17245                                      "support detection");
17246                 ret = 0;
17247         }
17248         if (actions[0])
17249                 claim_zero(mlx5_flow_os_destroy_flow_action(actions[0]));
17250         if (matcher)
17251                 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17252         if (tbl)
17253                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17254         if (dcs)
17255                 claim_zero(mlx5_devx_cmd_destroy(dcs));
17256         return ret;
17257 }
17258
17259 /**
17260  * Query a devx counter.
17261  *
17262  * @param[in] dev
17263  *   Pointer to the Ethernet device structure.
17264  * @param[in] cnt
17265  *   Index to the flow counter.
17266  * @param[in] clear
17267  *   Set to clear the counter statistics.
17268  * @param[out] pkts
17269  *   The statistics value of packets.
17270  * @param[out] bytes
17271  *   The statistics value of bytes.
17272  *
17273  * @return
17274  *   0 on success, otherwise return -1.
17275  */
17276 static int
17277 flow_dv_counter_query(struct rte_eth_dev *dev, uint32_t counter, bool clear,
17278                       uint64_t *pkts, uint64_t *bytes)
17279 {
17280         struct mlx5_priv *priv = dev->data->dev_private;
17281         struct mlx5_flow_counter *cnt;
17282         uint64_t inn_pkts, inn_bytes;
17283         int ret;
17284
17285         if (!priv->config.devx)
17286                 return -1;
17287
17288         ret = _flow_dv_query_count(dev, counter, &inn_pkts, &inn_bytes);
17289         if (ret)
17290                 return -1;
17291         cnt = flow_dv_counter_get_by_idx(dev, counter, NULL);
17292         *pkts = inn_pkts - cnt->hits;
17293         *bytes = inn_bytes - cnt->bytes;
17294         if (clear) {
17295                 cnt->hits = inn_pkts;
17296                 cnt->bytes = inn_bytes;
17297         }
17298         return 0;
17299 }
17300
17301 /**
17302  * Get aged-out flows.
17303  *
17304  * @param[in] dev
17305  *   Pointer to the Ethernet device structure.
17306  * @param[in] context
17307  *   The address of an array of pointers to the aged-out flows contexts.
17308  * @param[in] nb_contexts
17309  *   The length of context array pointers.
17310  * @param[out] error
17311  *   Perform verbose error reporting if not NULL. Initialized in case of
17312  *   error only.
17313  *
17314  * @return
17315  *   how many contexts get in success, otherwise negative errno value.
17316  *   if nb_contexts is 0, return the amount of all aged contexts.
17317  *   if nb_contexts is not 0 , return the amount of aged flows reported
17318  *   in the context array.
17319  * @note: only stub for now
17320  */
17321 static int
17322 flow_dv_get_aged_flows(struct rte_eth_dev *dev,
17323                     void **context,
17324                     uint32_t nb_contexts,
17325                     struct rte_flow_error *error)
17326 {
17327         struct mlx5_priv *priv = dev->data->dev_private;
17328         struct mlx5_age_info *age_info;
17329         struct mlx5_age_param *age_param;
17330         struct mlx5_flow_counter *counter;
17331         struct mlx5_aso_age_action *act;
17332         int nb_flows = 0;
17333
17334         if (nb_contexts && !context)
17335                 return rte_flow_error_set(error, EINVAL,
17336                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17337                                           NULL, "empty context");
17338         age_info = GET_PORT_AGE_INFO(priv);
17339         rte_spinlock_lock(&age_info->aged_sl);
17340         LIST_FOREACH(act, &age_info->aged_aso, next) {
17341                 nb_flows++;
17342                 if (nb_contexts) {
17343                         context[nb_flows - 1] =
17344                                                 act->age_params.context;
17345                         if (!(--nb_contexts))
17346                                 break;
17347                 }
17348         }
17349         TAILQ_FOREACH(counter, &age_info->aged_counters, next) {
17350                 nb_flows++;
17351                 if (nb_contexts) {
17352                         age_param = MLX5_CNT_TO_AGE(counter);
17353                         context[nb_flows - 1] = age_param->context;
17354                         if (!(--nb_contexts))
17355                                 break;
17356                 }
17357         }
17358         rte_spinlock_unlock(&age_info->aged_sl);
17359         MLX5_AGE_SET(age_info, MLX5_AGE_TRIGGER);
17360         return nb_flows;
17361 }
17362
17363 /*
17364  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
17365  */
17366 static uint32_t
17367 flow_dv_counter_allocate(struct rte_eth_dev *dev)
17368 {
17369         return flow_dv_counter_alloc(dev, 0);
17370 }
17371
17372 /**
17373  * Validate indirect action.
17374  * Dispatcher for action type specific validation.
17375  *
17376  * @param[in] dev
17377  *   Pointer to the Ethernet device structure.
17378  * @param[in] conf
17379  *   Indirect action configuration.
17380  * @param[in] action
17381  *   The indirect action object to validate.
17382  * @param[out] error
17383  *   Perform verbose error reporting if not NULL. Initialized in case of
17384  *   error only.
17385  *
17386  * @return
17387  *   0 on success, otherwise negative errno value.
17388  */
17389 static int
17390 flow_dv_action_validate(struct rte_eth_dev *dev,
17391                         const struct rte_flow_indir_action_conf *conf,
17392                         const struct rte_flow_action *action,
17393                         struct rte_flow_error *err)
17394 {
17395         struct mlx5_priv *priv = dev->data->dev_private;
17396
17397         RTE_SET_USED(conf);
17398         switch (action->type) {
17399         case RTE_FLOW_ACTION_TYPE_RSS:
17400                 /*
17401                  * priv->obj_ops is set according to driver capabilities.
17402                  * When DevX capabilities are
17403                  * sufficient, it is set to devx_obj_ops.
17404                  * Otherwise, it is set to ibv_obj_ops.
17405                  * ibv_obj_ops doesn't support ind_table_modify operation.
17406                  * In this case the indirect RSS action can't be used.
17407                  */
17408                 if (priv->obj_ops.ind_table_modify == NULL)
17409                         return rte_flow_error_set
17410                                         (err, ENOTSUP,
17411                                          RTE_FLOW_ERROR_TYPE_ACTION,
17412                                          NULL,
17413                                          "Indirect RSS action not supported");
17414                 return mlx5_validate_action_rss(dev, action, err);
17415         case RTE_FLOW_ACTION_TYPE_AGE:
17416                 if (!priv->sh->aso_age_mng)
17417                         return rte_flow_error_set(err, ENOTSUP,
17418                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17419                                                 NULL,
17420                                                 "Indirect age action not supported");
17421                 return flow_dv_validate_action_age(0, action, dev, err);
17422         case RTE_FLOW_ACTION_TYPE_COUNT:
17423                 return flow_dv_validate_action_count(dev, true, 0, err);
17424         case RTE_FLOW_ACTION_TYPE_CONNTRACK:
17425                 if (!priv->sh->ct_aso_en)
17426                         return rte_flow_error_set(err, ENOTSUP,
17427                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17428                                         "ASO CT is not supported");
17429                 return mlx5_validate_action_ct(dev, action->conf, err);
17430         default:
17431                 return rte_flow_error_set(err, ENOTSUP,
17432                                           RTE_FLOW_ERROR_TYPE_ACTION,
17433                                           NULL,
17434                                           "action type not supported");
17435         }
17436 }
17437
17438 /*
17439  * Check if the RSS configurations for colors of a meter policy match
17440  * each other, except the queues.
17441  *
17442  * @param[in] r1
17443  *   Pointer to the first RSS flow action.
17444  * @param[in] r2
17445  *   Pointer to the second RSS flow action.
17446  *
17447  * @return
17448  *   0 on match, 1 on conflict.
17449  */
17450 static inline int
17451 flow_dv_mtr_policy_rss_compare(const struct rte_flow_action_rss *r1,
17452                                const struct rte_flow_action_rss *r2)
17453 {
17454         if (!r1 || !r2)
17455                 return 0;
17456         if (r1->func != r2->func || r1->level != r2->level ||
17457             r1->types != r2->types || r1->key_len != r2->key_len ||
17458             memcmp(r1->key, r2->key, r1->key_len))
17459                 return 1;
17460         return 0;
17461 }
17462
17463 /**
17464  * Validate the meter hierarchy chain for meter policy.
17465  *
17466  * @param[in] dev
17467  *   Pointer to the Ethernet device structure.
17468  * @param[in] meter_id
17469  *   Meter id.
17470  * @param[in] action_flags
17471  *   Holds the actions detected until now.
17472  * @param[out] is_rss
17473  *   Is RSS or not.
17474  * @param[out] hierarchy_domain
17475  *   The domain bitmap for hierarchy policy.
17476  * @param[out] error
17477  *   Perform verbose error reporting if not NULL. Initialized in case of
17478  *   error only.
17479  *
17480  * @return
17481  *   0 on success, otherwise negative errno value with error set.
17482  */
17483 static int
17484 flow_dv_validate_policy_mtr_hierarchy(struct rte_eth_dev *dev,
17485                                   uint32_t meter_id,
17486                                   uint64_t action_flags,
17487                                   bool *is_rss,
17488                                   uint8_t *hierarchy_domain,
17489                                   struct rte_mtr_error *error)
17490 {
17491         struct mlx5_priv *priv = dev->data->dev_private;
17492         struct mlx5_flow_meter_info *fm;
17493         struct mlx5_flow_meter_policy *policy;
17494         uint8_t cnt = 1;
17495
17496         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
17497                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17498                 return -rte_mtr_error_set(error, EINVAL,
17499                                         RTE_MTR_ERROR_TYPE_POLICER_ACTION_GREEN,
17500                                         NULL,
17501                                         "Multiple fate actions not supported.");
17502         *hierarchy_domain = 0;
17503         while (true) {
17504                 fm = mlx5_flow_meter_find(priv, meter_id, NULL);
17505                 if (!fm)
17506                         return -rte_mtr_error_set(error, EINVAL,
17507                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17508                                         "Meter not found in meter hierarchy.");
17509                 if (fm->def_policy)
17510                         return -rte_mtr_error_set(error, EINVAL,
17511                                         RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17512                         "Non termination meter not supported in hierarchy.");
17513                 policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
17514                 MLX5_ASSERT(policy);
17515                 /**
17516                  * Only inherit the supported domains of the first meter in
17517                  * hierarchy.
17518                  * One meter supports at least one domain.
17519                  */
17520                 if (!*hierarchy_domain) {
17521                         if (policy->transfer)
17522                                 *hierarchy_domain |=
17523                                                 MLX5_MTR_DOMAIN_TRANSFER_BIT;
17524                         if (policy->ingress)
17525                                 *hierarchy_domain |=
17526                                                 MLX5_MTR_DOMAIN_INGRESS_BIT;
17527                         if (policy->egress)
17528                                 *hierarchy_domain |= MLX5_MTR_DOMAIN_EGRESS_BIT;
17529                 }
17530                 if (!policy->is_hierarchy) {
17531                         *is_rss = policy->is_rss;
17532                         break;
17533                 }
17534                 meter_id = policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id;
17535                 if (++cnt >= MLX5_MTR_CHAIN_MAX_NUM)
17536                         return -rte_mtr_error_set(error, EINVAL,
17537                                         RTE_MTR_ERROR_TYPE_METER_POLICY, NULL,
17538                                         "Exceed max hierarchy meter number.");
17539         }
17540         return 0;
17541 }
17542
17543 /**
17544  * Validate meter policy actions.
17545  * Dispatcher for action type specific validation.
17546  *
17547  * @param[in] dev
17548  *   Pointer to the Ethernet device structure.
17549  * @param[in] action
17550  *   The meter policy action object to validate.
17551  * @param[in] attr
17552  *   Attributes of flow to determine steering domain.
17553  * @param[out] error
17554  *   Perform verbose error reporting if not NULL. Initialized in case of
17555  *   error only.
17556  *
17557  * @return
17558  *   0 on success, otherwise negative errno value.
17559  */
17560 static int
17561 flow_dv_validate_mtr_policy_acts(struct rte_eth_dev *dev,
17562                         const struct rte_flow_action *actions[RTE_COLORS],
17563                         struct rte_flow_attr *attr,
17564                         bool *is_rss,
17565                         uint8_t *domain_bitmap,
17566                         uint8_t *policy_mode,
17567                         struct rte_mtr_error *error)
17568 {
17569         struct mlx5_priv *priv = dev->data->dev_private;
17570         struct mlx5_dev_config *dev_conf = &priv->config;
17571         const struct rte_flow_action *act;
17572         uint64_t action_flags[RTE_COLORS] = {0};
17573         int actions_n;
17574         int i, ret;
17575         struct rte_flow_error flow_err;
17576         uint8_t domain_color[RTE_COLORS] = {0};
17577         uint8_t def_domain = MLX5_MTR_ALL_DOMAIN_BIT;
17578         uint8_t hierarchy_domain = 0;
17579         const struct rte_flow_action_meter *mtr;
17580         bool def_green = false;
17581         bool def_yellow = false;
17582         const struct rte_flow_action_rss *rss_color[RTE_COLORS] = {NULL};
17583
17584         if (!priv->config.dv_esw_en)
17585                 def_domain &= ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
17586         *domain_bitmap = def_domain;
17587         /* Red color could only support DROP action. */
17588         if (!actions[RTE_COLOR_RED] ||
17589             actions[RTE_COLOR_RED]->type != RTE_FLOW_ACTION_TYPE_DROP)
17590                 return -rte_mtr_error_set(error, ENOTSUP,
17591                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17592                                 NULL, "Red color only supports drop action.");
17593         /*
17594          * Check default policy actions:
17595          * Green / Yellow: no action, Red: drop action
17596          * Either G or Y will trigger default policy actions to be created.
17597          */
17598         if (!actions[RTE_COLOR_GREEN] ||
17599             actions[RTE_COLOR_GREEN]->type == RTE_FLOW_ACTION_TYPE_END)
17600                 def_green = true;
17601         if (!actions[RTE_COLOR_YELLOW] ||
17602             actions[RTE_COLOR_YELLOW]->type == RTE_FLOW_ACTION_TYPE_END)
17603                 def_yellow = true;
17604         if (def_green && def_yellow) {
17605                 *policy_mode = MLX5_MTR_POLICY_MODE_DEF;
17606                 return 0;
17607         } else if (!def_green && def_yellow) {
17608                 *policy_mode = MLX5_MTR_POLICY_MODE_OG;
17609         } else if (def_green && !def_yellow) {
17610                 *policy_mode = MLX5_MTR_POLICY_MODE_OY;
17611         }
17612         /* Set to empty string in case of NULL pointer access by user. */
17613         flow_err.message = "";
17614         for (i = 0; i < RTE_COLORS; i++) {
17615                 act = actions[i];
17616                 for (action_flags[i] = 0, actions_n = 0;
17617                      act && act->type != RTE_FLOW_ACTION_TYPE_END;
17618                      act++) {
17619                         if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
17620                                 return -rte_mtr_error_set(error, ENOTSUP,
17621                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17622                                           NULL, "too many actions");
17623                         switch (act->type) {
17624                         case RTE_FLOW_ACTION_TYPE_PORT_ID:
17625                         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
17626                                 if (!priv->config.dv_esw_en)
17627                                         return -rte_mtr_error_set(error,
17628                                         ENOTSUP,
17629                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17630                                         NULL, "PORT action validate check"
17631                                         " fail for ESW disable");
17632                                 ret = flow_dv_validate_action_port_id(dev,
17633                                                 action_flags[i],
17634                                                 act, attr, &flow_err);
17635                                 if (ret)
17636                                         return -rte_mtr_error_set(error,
17637                                         ENOTSUP,
17638                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17639                                         NULL, flow_err.message ?
17640                                         flow_err.message :
17641                                         "PORT action validate check fail");
17642                                 ++actions_n;
17643                                 action_flags[i] |= MLX5_FLOW_ACTION_PORT_ID;
17644                                 break;
17645                         case RTE_FLOW_ACTION_TYPE_MARK:
17646                                 ret = flow_dv_validate_action_mark(dev, act,
17647                                                            action_flags[i],
17648                                                            attr, &flow_err);
17649                                 if (ret < 0)
17650                                         return -rte_mtr_error_set(error,
17651                                         ENOTSUP,
17652                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17653                                         NULL, flow_err.message ?
17654                                         flow_err.message :
17655                                         "Mark action validate check fail");
17656                                 if (dev_conf->dv_xmeta_en !=
17657                                         MLX5_XMETA_MODE_LEGACY)
17658                                         return -rte_mtr_error_set(error,
17659                                         ENOTSUP,
17660                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17661                                         NULL, "Extend MARK action is "
17662                                         "not supported. Please try use "
17663                                         "default policy for meter.");
17664                                 action_flags[i] |= MLX5_FLOW_ACTION_MARK;
17665                                 ++actions_n;
17666                                 break;
17667                         case RTE_FLOW_ACTION_TYPE_SET_TAG:
17668                                 ret = flow_dv_validate_action_set_tag(dev,
17669                                                         act, action_flags[i],
17670                                                         attr, &flow_err);
17671                                 if (ret)
17672                                         return -rte_mtr_error_set(error,
17673                                         ENOTSUP,
17674                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17675                                         NULL, flow_err.message ?
17676                                         flow_err.message :
17677                                         "Set tag action validate check fail");
17678                                 action_flags[i] |= MLX5_FLOW_ACTION_SET_TAG;
17679                                 ++actions_n;
17680                                 break;
17681                         case RTE_FLOW_ACTION_TYPE_DROP:
17682                                 ret = mlx5_flow_validate_action_drop
17683                                         (action_flags[i], attr, &flow_err);
17684                                 if (ret < 0)
17685                                         return -rte_mtr_error_set(error,
17686                                         ENOTSUP,
17687                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17688                                         NULL, flow_err.message ?
17689                                         flow_err.message :
17690                                         "Drop action validate check fail");
17691                                 action_flags[i] |= MLX5_FLOW_ACTION_DROP;
17692                                 ++actions_n;
17693                                 break;
17694                         case RTE_FLOW_ACTION_TYPE_QUEUE:
17695                                 /*
17696                                  * Check whether extensive
17697                                  * metadata feature is engaged.
17698                                  */
17699                                 if (dev_conf->dv_flow_en &&
17700                                     (dev_conf->dv_xmeta_en !=
17701                                      MLX5_XMETA_MODE_LEGACY) &&
17702                                     mlx5_flow_ext_mreg_supported(dev))
17703                                         return -rte_mtr_error_set(error,
17704                                           ENOTSUP,
17705                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17706                                           NULL, "Queue action with meta "
17707                                           "is not supported. Please try use "
17708                                           "default policy for meter.");
17709                                 ret = mlx5_flow_validate_action_queue(act,
17710                                                         action_flags[i], dev,
17711                                                         attr, &flow_err);
17712                                 if (ret < 0)
17713                                         return -rte_mtr_error_set(error,
17714                                           ENOTSUP,
17715                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17716                                           NULL, flow_err.message ?
17717                                           flow_err.message :
17718                                           "Queue action validate check fail");
17719                                 action_flags[i] |= MLX5_FLOW_ACTION_QUEUE;
17720                                 ++actions_n;
17721                                 break;
17722                         case RTE_FLOW_ACTION_TYPE_RSS:
17723                                 if (dev_conf->dv_flow_en &&
17724                                     (dev_conf->dv_xmeta_en !=
17725                                      MLX5_XMETA_MODE_LEGACY) &&
17726                                     mlx5_flow_ext_mreg_supported(dev))
17727                                         return -rte_mtr_error_set(error,
17728                                           ENOTSUP,
17729                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17730                                           NULL, "RSS action with meta "
17731                                           "is not supported. Please try use "
17732                                           "default policy for meter.");
17733                                 ret = mlx5_validate_action_rss(dev, act,
17734                                                                &flow_err);
17735                                 if (ret < 0)
17736                                         return -rte_mtr_error_set(error,
17737                                           ENOTSUP,
17738                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17739                                           NULL, flow_err.message ?
17740                                           flow_err.message :
17741                                           "RSS action validate check fail");
17742                                 action_flags[i] |= MLX5_FLOW_ACTION_RSS;
17743                                 ++actions_n;
17744                                 /* Either G or Y will set the RSS. */
17745                                 rss_color[i] = act->conf;
17746                                 break;
17747                         case RTE_FLOW_ACTION_TYPE_JUMP:
17748                                 ret = flow_dv_validate_action_jump(dev,
17749                                         NULL, act, action_flags[i],
17750                                         attr, true, &flow_err);
17751                                 if (ret)
17752                                         return -rte_mtr_error_set(error,
17753                                           ENOTSUP,
17754                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17755                                           NULL, flow_err.message ?
17756                                           flow_err.message :
17757                                           "Jump action validate check fail");
17758                                 ++actions_n;
17759                                 action_flags[i] |= MLX5_FLOW_ACTION_JUMP;
17760                                 break;
17761                         /*
17762                          * Only the last meter in the hierarchy will support
17763                          * the YELLOW color steering. Then in the meter policy
17764                          * actions list, there should be no other meter inside.
17765                          */
17766                         case RTE_FLOW_ACTION_TYPE_METER:
17767                                 if (i != RTE_COLOR_GREEN)
17768                                         return -rte_mtr_error_set(error,
17769                                                 ENOTSUP,
17770                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17771                                                 NULL,
17772                                                 "Meter hierarchy only supports GREEN color.");
17773                                 if (*policy_mode != MLX5_MTR_POLICY_MODE_OG)
17774                                         return -rte_mtr_error_set(error,
17775                                                 ENOTSUP,
17776                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17777                                                 NULL,
17778                                                 "No yellow policy should be provided in meter hierarchy.");
17779                                 mtr = act->conf;
17780                                 ret = flow_dv_validate_policy_mtr_hierarchy(dev,
17781                                                         mtr->mtr_id,
17782                                                         action_flags[i],
17783                                                         is_rss,
17784                                                         &hierarchy_domain,
17785                                                         error);
17786                                 if (ret)
17787                                         return ret;
17788                                 ++actions_n;
17789                                 action_flags[i] |=
17790                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
17791                                 break;
17792                         default:
17793                                 return -rte_mtr_error_set(error, ENOTSUP,
17794                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17795                                         NULL,
17796                                         "Doesn't support optional action");
17797                         }
17798                 }
17799                 if (action_flags[i] & MLX5_FLOW_ACTION_PORT_ID)
17800                         domain_color[i] = MLX5_MTR_DOMAIN_TRANSFER_BIT;
17801                 else if ((action_flags[i] &
17802                           (MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_QUEUE)) ||
17803                          (action_flags[i] & MLX5_FLOW_ACTION_MARK))
17804                         /*
17805                          * Only support MLX5_XMETA_MODE_LEGACY
17806                          * so MARK action is only in ingress domain.
17807                          */
17808                         domain_color[i] = MLX5_MTR_DOMAIN_INGRESS_BIT;
17809                 else
17810                         domain_color[i] = def_domain;
17811                 if (action_flags[i] &
17812                     MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
17813                         domain_color[i] &= hierarchy_domain;
17814                 /*
17815                  * Non-termination actions only support NIC Tx domain.
17816                  * The adjustion should be skipped when there is no
17817                  * action or only END is provided. The default domains
17818                  * bit-mask is set to find the MIN intersection.
17819                  * The action flags checking should also be skipped.
17820                  */
17821                 if ((def_green && i == RTE_COLOR_GREEN) ||
17822                     (def_yellow && i == RTE_COLOR_YELLOW))
17823                         continue;
17824                 /*
17825                  * Validate the drop action mutual exclusion
17826                  * with other actions. Drop action is mutually-exclusive
17827                  * with any other action, except for Count action.
17828                  */
17829                 if ((action_flags[i] & MLX5_FLOW_ACTION_DROP) &&
17830                     (action_flags[i] & ~MLX5_FLOW_ACTION_DROP)) {
17831                         return -rte_mtr_error_set(error, ENOTSUP,
17832                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17833                                 NULL, "Drop action is mutually-exclusive "
17834                                 "with any other action");
17835                 }
17836                 /* Eswitch has few restrictions on using items and actions */
17837                 if (domain_color[i] & MLX5_MTR_DOMAIN_TRANSFER_BIT) {
17838                         if (!mlx5_flow_ext_mreg_supported(dev) &&
17839                             action_flags[i] & MLX5_FLOW_ACTION_MARK)
17840                                 return -rte_mtr_error_set(error, ENOTSUP,
17841                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17842                                         NULL, "unsupported action MARK");
17843                         if (action_flags[i] & MLX5_FLOW_ACTION_QUEUE)
17844                                 return -rte_mtr_error_set(error, ENOTSUP,
17845                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17846                                         NULL, "unsupported action QUEUE");
17847                         if (action_flags[i] & MLX5_FLOW_ACTION_RSS)
17848                                 return -rte_mtr_error_set(error, ENOTSUP,
17849                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17850                                         NULL, "unsupported action RSS");
17851                         if (!(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17852                                 return -rte_mtr_error_set(error, ENOTSUP,
17853                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17854                                         NULL, "no fate action is found");
17855                 } else {
17856                         if (!(action_flags[i] & MLX5_FLOW_FATE_ACTIONS) &&
17857                             (domain_color[i] & MLX5_MTR_DOMAIN_INGRESS_BIT)) {
17858                                 if ((domain_color[i] &
17859                                      MLX5_MTR_DOMAIN_EGRESS_BIT))
17860                                         domain_color[i] =
17861                                                 MLX5_MTR_DOMAIN_EGRESS_BIT;
17862                                 else
17863                                         return -rte_mtr_error_set(error,
17864                                                 ENOTSUP,
17865                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17866                                                 NULL,
17867                                                 "no fate action is found");
17868                         }
17869                 }
17870         }
17871         /* If both colors have RSS, the attributes should be the same. */
17872         if (flow_dv_mtr_policy_rss_compare(rss_color[RTE_COLOR_GREEN],
17873                                            rss_color[RTE_COLOR_YELLOW]))
17874                 return -rte_mtr_error_set(error, EINVAL,
17875                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17876                                           NULL, "policy RSS attr conflict");
17877         if (rss_color[RTE_COLOR_GREEN] || rss_color[RTE_COLOR_YELLOW])
17878                 *is_rss = true;
17879         /* "domain_color[C]" is non-zero for each color, default is ALL. */
17880         if (!def_green && !def_yellow &&
17881             domain_color[RTE_COLOR_GREEN] != domain_color[RTE_COLOR_YELLOW] &&
17882             !(action_flags[RTE_COLOR_GREEN] & MLX5_FLOW_ACTION_DROP) &&
17883             !(action_flags[RTE_COLOR_YELLOW] & MLX5_FLOW_ACTION_DROP))
17884                 return -rte_mtr_error_set(error, EINVAL,
17885                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17886                                           NULL, "policy domains conflict");
17887         /*
17888          * At least one color policy is listed in the actions, the domains
17889          * to be supported should be the intersection.
17890          */
17891         *domain_bitmap = domain_color[RTE_COLOR_GREEN] &
17892                          domain_color[RTE_COLOR_YELLOW];
17893         return 0;
17894 }
17895
17896 static int
17897 flow_dv_sync_domain(struct rte_eth_dev *dev, uint32_t domains, uint32_t flags)
17898 {
17899         struct mlx5_priv *priv = dev->data->dev_private;
17900         int ret = 0;
17901
17902         if ((domains & MLX5_DOMAIN_BIT_NIC_RX) && priv->sh->rx_domain != NULL) {
17903                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->rx_domain,
17904                                                 flags);
17905                 if (ret != 0)
17906                         return ret;
17907         }
17908         if ((domains & MLX5_DOMAIN_BIT_NIC_TX) && priv->sh->tx_domain != NULL) {
17909                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->tx_domain, flags);
17910                 if (ret != 0)
17911                         return ret;
17912         }
17913         if ((domains & MLX5_DOMAIN_BIT_FDB) && priv->sh->fdb_domain != NULL) {
17914                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->fdb_domain, flags);
17915                 if (ret != 0)
17916                         return ret;
17917         }
17918         return 0;
17919 }
17920
17921 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
17922         .validate = flow_dv_validate,
17923         .prepare = flow_dv_prepare,
17924         .translate = flow_dv_translate,
17925         .apply = flow_dv_apply,
17926         .remove = flow_dv_remove,
17927         .destroy = flow_dv_destroy,
17928         .query = flow_dv_query,
17929         .create_mtr_tbls = flow_dv_create_mtr_tbls,
17930         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbls,
17931         .destroy_mtr_drop_tbls = flow_dv_destroy_mtr_drop_tbls,
17932         .create_meter = flow_dv_mtr_alloc,
17933         .free_meter = flow_dv_aso_mtr_release_to_pool,
17934         .validate_mtr_acts = flow_dv_validate_mtr_policy_acts,
17935         .create_mtr_acts = flow_dv_create_mtr_policy_acts,
17936         .destroy_mtr_acts = flow_dv_destroy_mtr_policy_acts,
17937         .create_policy_rules = flow_dv_create_policy_rules,
17938         .destroy_policy_rules = flow_dv_destroy_policy_rules,
17939         .create_def_policy = flow_dv_create_def_policy,
17940         .destroy_def_policy = flow_dv_destroy_def_policy,
17941         .meter_sub_policy_rss_prepare = flow_dv_meter_sub_policy_rss_prepare,
17942         .meter_hierarchy_rule_create = flow_dv_meter_hierarchy_rule_create,
17943         .destroy_sub_policy_with_rxq = flow_dv_destroy_sub_policy_with_rxq,
17944         .counter_alloc = flow_dv_counter_allocate,
17945         .counter_free = flow_dv_counter_free,
17946         .counter_query = flow_dv_counter_query,
17947         .get_aged_flows = flow_dv_get_aged_flows,
17948         .action_validate = flow_dv_action_validate,
17949         .action_create = flow_dv_action_create,
17950         .action_destroy = flow_dv_action_destroy,
17951         .action_update = flow_dv_action_update,
17952         .action_query = flow_dv_action_query,
17953         .sync_domain = flow_dv_sync_domain,
17954 };
17955
17956 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
17957