drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9
  10 /* Verbs header. */
  11 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  12 #ifdef PEDANTIC
  13 #pragma GCC diagnostic ignored "-Wpedantic"
  14 #endif
  15 #include <infiniband/verbs.h>
  16 #ifdef PEDANTIC
  17 #pragma GCC diagnostic error "-Wpedantic"
  18 #endif
  19
  20 #include <rte_common.h>
  21 #include <rte_ether.h>
  22 #include <rte_ethdev_driver.h>
  23 #include <rte_flow.h>
  24 #include <rte_flow_driver.h>
  25 #include <rte_malloc.h>
  26 #include <rte_ip.h>
  27 #include <rte_gre.h>
  28
  29 #include "mlx5.h"
  30 #include "mlx5_defs.h"
  31 #include "mlx5_glue.h"
  32 #include "mlx5_flow.h"
  33 #include "mlx5_prm.h"
  34 #include "mlx5_rxtx.h"
  35
  36 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  37
  38 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  39 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  40 #endif
  41
  42 #ifndef HAVE_MLX5DV_DR_ESWITCH
  43 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  44 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  45 #endif
  46 #endif
  47
  48 #ifndef HAVE_MLX5DV_DR
  49 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  50 #endif
  51
  52 union flow_dv_attr {
  53         struct {
  54                 uint32_t valid:1;
  55                 uint32_t ipv4:1;
  56                 uint32_t ipv6:1;
  57                 uint32_t tcp:1;
  58                 uint32_t udp:1;
  59                 uint32_t reserved:27;
  60         };
  61         uint32_t attr;
  62 };
  63
  64 /**
  65  * Initialize flow attributes structure according to flow items' types.
  66  *
  67  * @param[in] item
  68  *   Pointer to item specification.
  69  * @param[out] attr
  70  *   Pointer to flow attributes structure.
  71  */
  72 static void
  73 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr)
  74 {
  75         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
  76                 switch (item->type) {
  77                 case RTE_FLOW_ITEM_TYPE_IPV4:
  78                         attr->ipv4 = 1;
  79                         break;
  80                 case RTE_FLOW_ITEM_TYPE_IPV6:
  81                         attr->ipv6 = 1;
  82                         break;
  83                 case RTE_FLOW_ITEM_TYPE_UDP:
  84                         attr->udp = 1;
  85                         break;
  86                 case RTE_FLOW_ITEM_TYPE_TCP:
  87                         attr->tcp = 1;
  88                         break;
  89                 default:
  90                         break;
  91                 }
  92         }
  93         attr->valid = 1;
  94 }
  95
  96 struct field_modify_info {
  97         uint32_t size; /* Size of field in protocol header, in bytes. */
  98         uint32_t offset; /* Offset of field in protocol header, in bytes. */
  99         enum mlx5_modification_field id;
 100 };
 101
 102 struct field_modify_info modify_eth[] = {
 103         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 104         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 105         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 106         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 107         {0, 0, 0},
 108 };
 109
 110 struct field_modify_info modify_ipv4[] = {
 111         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 112         {4, 12, MLX5_MODI_OUT_SIPV4},
 113         {4, 16, MLX5_MODI_OUT_DIPV4},
 114         {0, 0, 0},
 115 };
 116
 117 struct field_modify_info modify_ipv6[] = {
 118         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 119         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 120         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 121         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 122         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 123         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 124         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 125         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 126         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 127         {0, 0, 0},
 128 };
 129
 130 struct field_modify_info modify_udp[] = {
 131         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 132         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 133         {0, 0, 0},
 134 };
 135
 136 struct field_modify_info modify_tcp[] = {
 137         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 138         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 139         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 140         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 141         {0, 0, 0},
 142 };
 143
 144 /**
 145  * Acquire the synchronizing object to protect multithreaded access
 146  * to shared dv context. Lock occurs only if context is actually
 147  * shared, i.e. we have multiport IB device and representors are
 148  * created.
 149  *
 150  * @param[in] dev
 151  *   Pointer to the rte_eth_dev structure.
 152  */
 153 static void
 154 flow_d_shared_lock(struct rte_eth_dev *dev)
 155 {
 156         struct mlx5_priv *priv = dev->data->dev_private;
 157         struct mlx5_ibv_shared *sh = priv->sh;
 158
 159         if (sh->dv_refcnt > 1) {
 160                 int ret;
 161
 162                 ret = pthread_mutex_lock(&sh->dv_mutex);
 163                 assert(!ret);
 164                 (void)ret;
 165         }
 166 }
 167
 168 static void
 169 flow_d_shared_unlock(struct rte_eth_dev *dev)
 170 {
 171         struct mlx5_priv *priv = dev->data->dev_private;
 172         struct mlx5_ibv_shared *sh = priv->sh;
 173
 174         if (sh->dv_refcnt > 1) {
 175                 int ret;
 176
 177                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 178                 assert(!ret);
 179                 (void)ret;
 180         }
 181 }
 182
 183 /**
 184  * Convert modify-header action to DV specification.
 185  *
 186  * @param[in] item
 187  *   Pointer to item specification.
 188  * @param[in] field
 189  *   Pointer to field modification information.
 190  * @param[in,out] resource
 191  *   Pointer to the modify-header resource.
 192  * @param[in] type
 193  *   Type of modification.
 194  * @param[out] error
 195  *   Pointer to the error structure.
 196  *
 197  * @return
 198  *   0 on success, a negative errno value otherwise and rte_errno is set.
 199  */
 200 static int
 201 flow_dv_convert_modify_action(struct rte_flow_item *item,
 202                               struct field_modify_info *field,
 203                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 204                               uint32_t type,
 205                               struct rte_flow_error *error)
 206 {
 207         uint32_t i = resource->actions_num;
 208         struct mlx5_modification_cmd *actions = resource->actions;
 209         const uint8_t *spec = item->spec;
 210         const uint8_t *mask = item->mask;
 211         uint32_t set;
 212
 213         while (field->size) {
 214                 set = 0;
 215                 /* Generate modify command for each mask segment. */
 216                 memcpy(&set, &mask[field->offset], field->size);
 217                 if (set) {
 218                         if (i >= MLX5_MODIFY_NUM)
 219                                 return rte_flow_error_set(error, EINVAL,
 220                                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 221                                          "too many items to modify");
 222                         actions[i].action_type = type;
 223                         actions[i].field = field->id;
 224                         actions[i].length = field->size ==
 225                                         4 ? 0 : field->size * 8;
 226                         rte_memcpy(&actions[i].data[4 - field->size],
 227                                    &spec[field->offset], field->size);
 228                         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 229                         ++i;
 230                 }
 231                 if (resource->actions_num != i)
 232                         resource->actions_num = i;
 233                 field++;
 234         }
 235         if (!resource->actions_num)
 236                 return rte_flow_error_set(error, EINVAL,
 237                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 238                                           "invalid modification flow item");
 239         return 0;
 240 }
 241
 242 /**
 243  * Convert modify-header set IPv4 address action to DV specification.
 244  *
 245  * @param[in,out] resource
 246  *   Pointer to the modify-header resource.
 247  * @param[in] action
 248  *   Pointer to action specification.
 249  * @param[out] error
 250  *   Pointer to the error structure.
 251  *
 252  * @return
 253  *   0 on success, a negative errno value otherwise and rte_errno is set.
 254  */
 255 static int
 256 flow_dv_convert_action_modify_ipv4
 257                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 258                          const struct rte_flow_action *action,
 259                          struct rte_flow_error *error)
 260 {
 261         const struct rte_flow_action_set_ipv4 *conf =
 262                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 263         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 264         struct rte_flow_item_ipv4 ipv4;
 265         struct rte_flow_item_ipv4 ipv4_mask;
 266
 267         memset(&ipv4, 0, sizeof(ipv4));
 268         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 269         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 270                 ipv4.hdr.src_addr = conf->ipv4_addr;
 271                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 272         } else {
 273                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 274                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 275         }
 276         item.spec = &ipv4;
 277         item.mask = &ipv4_mask;
 278         return flow_dv_convert_modify_action(&item, modify_ipv4, resource,
 279                                              MLX5_MODIFICATION_TYPE_SET, error);
 280 }
 281
 282 /**
 283  * Convert modify-header set IPv6 address action to DV specification.
 284  *
 285  * @param[in,out] resource
 286  *   Pointer to the modify-header resource.
 287  * @param[in] action
 288  *   Pointer to action specification.
 289  * @param[out] error
 290  *   Pointer to the error structure.
 291  *
 292  * @return
 293  *   0 on success, a negative errno value otherwise and rte_errno is set.
 294  */
 295 static int
 296 flow_dv_convert_action_modify_ipv6
 297                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 298                          const struct rte_flow_action *action,
 299                          struct rte_flow_error *error)
 300 {
 301         const struct rte_flow_action_set_ipv6 *conf =
 302                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 303         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 304         struct rte_flow_item_ipv6 ipv6;
 305         struct rte_flow_item_ipv6 ipv6_mask;
 306
 307         memset(&ipv6, 0, sizeof(ipv6));
 308         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 309         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 310                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 311                        sizeof(ipv6.hdr.src_addr));
 312                 memcpy(&ipv6_mask.hdr.src_addr,
 313                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 314                        sizeof(ipv6.hdr.src_addr));
 315         } else {
 316                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 317                        sizeof(ipv6.hdr.dst_addr));
 318                 memcpy(&ipv6_mask.hdr.dst_addr,
 319                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 320                        sizeof(ipv6.hdr.dst_addr));
 321         }
 322         item.spec = &ipv6;
 323         item.mask = &ipv6_mask;
 324         return flow_dv_convert_modify_action(&item, modify_ipv6, resource,
 325                                              MLX5_MODIFICATION_TYPE_SET, error);
 326 }
 327
 328 /**
 329  * Convert modify-header set MAC address action to DV specification.
 330  *
 331  * @param[in,out] resource
 332  *   Pointer to the modify-header resource.
 333  * @param[in] action
 334  *   Pointer to action specification.
 335  * @param[out] error
 336  *   Pointer to the error structure.
 337  *
 338  * @return
 339  *   0 on success, a negative errno value otherwise and rte_errno is set.
 340  */
 341 static int
 342 flow_dv_convert_action_modify_mac
 343                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 344                          const struct rte_flow_action *action,
 345                          struct rte_flow_error *error)
 346 {
 347         const struct rte_flow_action_set_mac *conf =
 348                 (const struct rte_flow_action_set_mac *)(action->conf);
 349         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 350         struct rte_flow_item_eth eth;
 351         struct rte_flow_item_eth eth_mask;
 352
 353         memset(&eth, 0, sizeof(eth));
 354         memset(&eth_mask, 0, sizeof(eth_mask));
 355         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 356                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 357                        sizeof(eth.src.addr_bytes));
 358                 memcpy(&eth_mask.src.addr_bytes,
 359                        &rte_flow_item_eth_mask.src.addr_bytes,
 360                        sizeof(eth_mask.src.addr_bytes));
 361         } else {
 362                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 363                        sizeof(eth.dst.addr_bytes));
 364                 memcpy(&eth_mask.dst.addr_bytes,
 365                        &rte_flow_item_eth_mask.dst.addr_bytes,
 366                        sizeof(eth_mask.dst.addr_bytes));
 367         }
 368         item.spec = &eth;
 369         item.mask = &eth_mask;
 370         return flow_dv_convert_modify_action(&item, modify_eth, resource,
 371                                              MLX5_MODIFICATION_TYPE_SET, error);
 372 }
 373
 374 /**
 375  * Convert modify-header set TP action to DV specification.
 376  *
 377  * @param[in,out] resource
 378  *   Pointer to the modify-header resource.
 379  * @param[in] action
 380  *   Pointer to action specification.
 381  * @param[in] items
 382  *   Pointer to rte_flow_item objects list.
 383  * @param[in] attr
 384  *   Pointer to flow attributes structure.
 385  * @param[out] error
 386  *   Pointer to the error structure.
 387  *
 388  * @return
 389  *   0 on success, a negative errno value otherwise and rte_errno is set.
 390  */
 391 static int
 392 flow_dv_convert_action_modify_tp
 393                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 394                          const struct rte_flow_action *action,
 395                          const struct rte_flow_item *items,
 396                          union flow_dv_attr *attr,
 397                          struct rte_flow_error *error)
 398 {
 399         const struct rte_flow_action_set_tp *conf =
 400                 (const struct rte_flow_action_set_tp *)(action->conf);
 401         struct rte_flow_item item;
 402         struct rte_flow_item_udp udp;
 403         struct rte_flow_item_udp udp_mask;
 404         struct rte_flow_item_tcp tcp;
 405         struct rte_flow_item_tcp tcp_mask;
 406         struct field_modify_info *field;
 407
 408         if (!attr->valid)
 409                 flow_dv_attr_init(items, attr);
 410         if (attr->udp) {
 411                 memset(&udp, 0, sizeof(udp));
 412                 memset(&udp_mask, 0, sizeof(udp_mask));
 413                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 414                         udp.hdr.src_port = conf->port;
 415                         udp_mask.hdr.src_port =
 416                                         rte_flow_item_udp_mask.hdr.src_port;
 417                 } else {
 418                         udp.hdr.dst_port = conf->port;
 419                         udp_mask.hdr.dst_port =
 420                                         rte_flow_item_udp_mask.hdr.dst_port;
 421                 }
 422                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 423                 item.spec = &udp;
 424                 item.mask = &udp_mask;
 425                 field = modify_udp;
 426         }
 427         if (attr->tcp) {
 428                 memset(&tcp, 0, sizeof(tcp));
 429                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 430                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 431                         tcp.hdr.src_port = conf->port;
 432                         tcp_mask.hdr.src_port =
 433                                         rte_flow_item_tcp_mask.hdr.src_port;
 434                 } else {
 435                         tcp.hdr.dst_port = conf->port;
 436                         tcp_mask.hdr.dst_port =
 437                                         rte_flow_item_tcp_mask.hdr.dst_port;
 438                 }
 439                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 440                 item.spec = &tcp;
 441                 item.mask = &tcp_mask;
 442                 field = modify_tcp;
 443         }
 444         return flow_dv_convert_modify_action(&item, field, resource,
 445                                              MLX5_MODIFICATION_TYPE_SET, error);
 446 }
 447
 448 /**
 449  * Convert modify-header set TTL action to DV specification.
 450  *
 451  * @param[in,out] resource
 452  *   Pointer to the modify-header resource.
 453  * @param[in] action
 454  *   Pointer to action specification.
 455  * @param[in] items
 456  *   Pointer to rte_flow_item objects list.
 457  * @param[in] attr
 458  *   Pointer to flow attributes structure.
 459  * @param[out] error
 460  *   Pointer to the error structure.
 461  *
 462  * @return
 463  *   0 on success, a negative errno value otherwise and rte_errno is set.
 464  */
 465 static int
 466 flow_dv_convert_action_modify_ttl
 467                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 468                          const struct rte_flow_action *action,
 469                          const struct rte_flow_item *items,
 470                          union flow_dv_attr *attr,
 471                          struct rte_flow_error *error)
 472 {
 473         const struct rte_flow_action_set_ttl *conf =
 474                 (const struct rte_flow_action_set_ttl *)(action->conf);
 475         struct rte_flow_item item;
 476         struct rte_flow_item_ipv4 ipv4;
 477         struct rte_flow_item_ipv4 ipv4_mask;
 478         struct rte_flow_item_ipv6 ipv6;
 479         struct rte_flow_item_ipv6 ipv6_mask;
 480         struct field_modify_info *field;
 481
 482         if (!attr->valid)
 483                 flow_dv_attr_init(items, attr);
 484         if (attr->ipv4) {
 485                 memset(&ipv4, 0, sizeof(ipv4));
 486                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 487                 ipv4.hdr.time_to_live = conf->ttl_value;
 488                 ipv4_mask.hdr.time_to_live = 0xFF;
 489                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 490                 item.spec = &ipv4;
 491                 item.mask = &ipv4_mask;
 492                 field = modify_ipv4;
 493         }
 494         if (attr->ipv6) {
 495                 memset(&ipv6, 0, sizeof(ipv6));
 496                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 497                 ipv6.hdr.hop_limits = conf->ttl_value;
 498                 ipv6_mask.hdr.hop_limits = 0xFF;
 499                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 500                 item.spec = &ipv6;
 501                 item.mask = &ipv6_mask;
 502                 field = modify_ipv6;
 503         }
 504         return flow_dv_convert_modify_action(&item, field, resource,
 505                                              MLX5_MODIFICATION_TYPE_SET, error);
 506 }
 507
 508 /**
 509  * Convert modify-header decrement TTL action to DV specification.
 510  *
 511  * @param[in,out] resource
 512  *   Pointer to the modify-header resource.
 513  * @param[in] action
 514  *   Pointer to action specification.
 515  * @param[in] items
 516  *   Pointer to rte_flow_item objects list.
 517  * @param[in] attr
 518  *   Pointer to flow attributes structure.
 519  * @param[out] error
 520  *   Pointer to the error structure.
 521  *
 522  * @return
 523  *   0 on success, a negative errno value otherwise and rte_errno is set.
 524  */
 525 static int
 526 flow_dv_convert_action_modify_dec_ttl
 527                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 528                          const struct rte_flow_item *items,
 529                          union flow_dv_attr *attr,
 530                          struct rte_flow_error *error)
 531 {
 532         struct rte_flow_item item;
 533         struct rte_flow_item_ipv4 ipv4;
 534         struct rte_flow_item_ipv4 ipv4_mask;
 535         struct rte_flow_item_ipv6 ipv6;
 536         struct rte_flow_item_ipv6 ipv6_mask;
 537         struct field_modify_info *field;
 538
 539         if (!attr->valid)
 540                 flow_dv_attr_init(items, attr);
 541         if (attr->ipv4) {
 542                 memset(&ipv4, 0, sizeof(ipv4));
 543                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 544                 ipv4.hdr.time_to_live = 0xFF;
 545                 ipv4_mask.hdr.time_to_live = 0xFF;
 546                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 547                 item.spec = &ipv4;
 548                 item.mask = &ipv4_mask;
 549                 field = modify_ipv4;
 550         }
 551         if (attr->ipv6) {
 552                 memset(&ipv6, 0, sizeof(ipv6));
 553                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 554                 ipv6.hdr.hop_limits = 0xFF;
 555                 ipv6_mask.hdr.hop_limits = 0xFF;
 556                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 557                 item.spec = &ipv6;
 558                 item.mask = &ipv6_mask;
 559                 field = modify_ipv6;
 560         }
 561         return flow_dv_convert_modify_action(&item, field, resource,
 562                                              MLX5_MODIFICATION_TYPE_ADD, error);
 563 }
 564
 565 /**
 566  * Convert modify-header increment/decrement TCP Sequence number
 567  * to DV specification.
 568  *
 569  * @param[in,out] resource
 570  *   Pointer to the modify-header resource.
 571  * @param[in] action
 572  *   Pointer to action specification.
 573  * @param[out] error
 574  *   Pointer to the error structure.
 575  *
 576  * @return
 577  *   0 on success, a negative errno value otherwise and rte_errno is set.
 578  */
 579 static int
 580 flow_dv_convert_action_modify_tcp_seq
 581                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 582                          const struct rte_flow_action *action,
 583                          struct rte_flow_error *error)
 584 {
 585         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 586         uint64_t value = rte_be_to_cpu_32(*conf);
 587         struct rte_flow_item item;
 588         struct rte_flow_item_tcp tcp;
 589         struct rte_flow_item_tcp tcp_mask;
 590
 591         memset(&tcp, 0, sizeof(tcp));
 592         memset(&tcp_mask, 0, sizeof(tcp_mask));
 593         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 594                 /*
 595                  * The HW has no decrement operation, only increment operation.
 596                  * To simulate decrement X from Y using increment operation
 597                  * we need to add UINT32_MAX X times to Y.
 598                  * Each adding of UINT32_MAX decrements Y by 1.
 599                  */
 600                 value *= UINT32_MAX;
 601         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 602         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 603         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 604         item.spec = &tcp;
 605         item.mask = &tcp_mask;
 606         return flow_dv_convert_modify_action(&item, modify_tcp, resource,
 607                                              MLX5_MODIFICATION_TYPE_ADD, error);
 608 }
 609
 610 /**
 611  * Convert modify-header increment/decrement TCP Acknowledgment number
 612  * to DV specification.
 613  *
 614  * @param[in,out] resource
 615  *   Pointer to the modify-header resource.
 616  * @param[in] action
 617  *   Pointer to action specification.
 618  * @param[out] error
 619  *   Pointer to the error structure.
 620  *
 621  * @return
 622  *   0 on success, a negative errno value otherwise and rte_errno is set.
 623  */
 624 static int
 625 flow_dv_convert_action_modify_tcp_ack
 626                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 627                          const struct rte_flow_action *action,
 628                          struct rte_flow_error *error)
 629 {
 630         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 631         uint64_t value = rte_be_to_cpu_32(*conf);
 632         struct rte_flow_item item;
 633         struct rte_flow_item_tcp tcp;
 634         struct rte_flow_item_tcp tcp_mask;
 635
 636         memset(&tcp, 0, sizeof(tcp));
 637         memset(&tcp_mask, 0, sizeof(tcp_mask));
 638         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 639                 /*
 640                  * The HW has no decrement operation, only increment operation.
 641                  * To simulate decrement X from Y using increment operation
 642                  * we need to add UINT32_MAX X times to Y.
 643                  * Each adding of UINT32_MAX decrements Y by 1.
 644                  */
 645                 value *= UINT32_MAX;
 646         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 647         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 648         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 649         item.spec = &tcp;
 650         item.mask = &tcp_mask;
 651         return flow_dv_convert_modify_action(&item, modify_tcp, resource,
 652                                              MLX5_MODIFICATION_TYPE_ADD, error);
 653 }
 654
 655 /**
 656  * Validate META item.
 657  *
 658  * @param[in] dev
 659  *   Pointer to the rte_eth_dev structure.
 660  * @param[in] item
 661  *   Item specification.
 662  * @param[in] attr
 663  *   Attributes of flow that includes this item.
 664  * @param[out] error
 665  *   Pointer to error structure.
 666  *
 667  * @return
 668  *   0 on success, a negative errno value otherwise and rte_errno is set.
 669  */
 670 static int
 671 flow_dv_validate_item_meta(struct rte_eth_dev *dev,
 672                            const struct rte_flow_item *item,
 673                            const struct rte_flow_attr *attr,
 674                            struct rte_flow_error *error)
 675 {
 676         const struct rte_flow_item_meta *spec = item->spec;
 677         const struct rte_flow_item_meta *mask = item->mask;
 678         const struct rte_flow_item_meta nic_mask = {
 679                 .data = RTE_BE32(UINT32_MAX)
 680         };
 681         int ret;
 682         uint64_t offloads = dev->data->dev_conf.txmode.offloads;
 683
 684         if (!(offloads & DEV_TX_OFFLOAD_MATCH_METADATA))
 685                 return rte_flow_error_set(error, EPERM,
 686                                           RTE_FLOW_ERROR_TYPE_ITEM,
 687                                           NULL,
 688                                           "match on metadata offload "
 689                                           "configuration is off for this port");
 690         if (!spec)
 691                 return rte_flow_error_set(error, EINVAL,
 692                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
 693                                           item->spec,
 694                                           "data cannot be empty");
 695         if (!spec->data)
 696                 return rte_flow_error_set(error, EINVAL,
 697                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
 698                                           NULL,
 699                                           "data cannot be zero");
 700         if (!mask)
 701                 mask = &rte_flow_item_meta_mask;
 702         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
 703                                         (const uint8_t *)&nic_mask,
 704                                         sizeof(struct rte_flow_item_meta),
 705                                         error);
 706         if (ret < 0)
 707                 return ret;
 708         if (attr->ingress)
 709                 return rte_flow_error_set(error, ENOTSUP,
 710                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
 711                                           NULL,
 712                                           "pattern not supported for ingress");
 713         return 0;
 714 }
 715
 716 /**
 717  * Validate vport item.
 718  *
 719  * @param[in] dev
 720  *   Pointer to the rte_eth_dev structure.
 721  * @param[in] item
 722  *   Item specification.
 723  * @param[in] attr
 724  *   Attributes of flow that includes this item.
 725  * @param[in] item_flags
 726  *   Bit-fields that holds the items detected until now.
 727  * @param[out] error
 728  *   Pointer to error structure.
 729  *
 730  * @return
 731  *   0 on success, a negative errno value otherwise and rte_errno is set.
 732  */
 733 static int
 734 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
 735                               const struct rte_flow_item *item,
 736                               const struct rte_flow_attr *attr,
 737                               uint64_t item_flags,
 738                               struct rte_flow_error *error)
 739 {
 740         const struct rte_flow_item_port_id *spec = item->spec;
 741         const struct rte_flow_item_port_id *mask = item->mask;
 742         const struct rte_flow_item_port_id switch_mask = {
 743                         .id = 0xffffffff,
 744         };
 745         uint16_t esw_domain_id;
 746         uint16_t item_port_esw_domain_id;
 747         int ret;
 748
 749         if (!attr->transfer)
 750                 return rte_flow_error_set(error, EINVAL,
 751                                           RTE_FLOW_ERROR_TYPE_ITEM,
 752                                           NULL,
 753                                           "match on port id is valid only"
 754                                           " when transfer flag is enabled");
 755         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
 756                 return rte_flow_error_set(error, ENOTSUP,
 757                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
 758                                           "multiple source ports are not"
 759                                           " supported");
 760         if (!mask)
 761                 mask = &switch_mask;
 762         if (mask->id != 0xffffffff)
 763                 return rte_flow_error_set(error, ENOTSUP,
 764                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
 765                                            mask,
 766                                            "no support for partial mask on"
 767                                            " \"id\" field");
 768         ret = mlx5_flow_item_acceptable
 769                                 (item, (const uint8_t *)mask,
 770                                  (const uint8_t *)&rte_flow_item_port_id_mask,
 771                                  sizeof(struct rte_flow_item_port_id),
 772                                  error);
 773         if (ret)
 774                 return ret;
 775         if (!spec)
 776                 return 0;
 777         ret = mlx5_port_to_eswitch_info(spec->id, &item_port_esw_domain_id,
 778                                         NULL);
 779         if (ret)
 780                 return rte_flow_error_set(error, -ret,
 781                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
 782                                           "failed to obtain E-Switch info for"
 783                                           " port");
 784         ret = mlx5_port_to_eswitch_info(dev->data->port_id,
 785                                         &esw_domain_id, NULL);
 786         if (ret < 0)
 787                 return rte_flow_error_set(error, -ret,
 788                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 789                                           NULL,
 790                                           "failed to obtain E-Switch info");
 791         if (item_port_esw_domain_id != esw_domain_id)
 792                 return rte_flow_error_set(error, -ret,
 793                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
 794                                           "cannot match on a port from a"
 795                                           " different E-Switch");
 796         return 0;
 797 }
 798
 799 /**
 800  * Validate count action.
 801  *
 802  * @param[in] dev
 803  *   device otr.
 804  * @param[out] error
 805  *   Pointer to error structure.
 806  *
 807  * @return
 808  *   0 on success, a negative errno value otherwise and rte_errno is set.
 809  */
 810 static int
 811 flow_dv_validate_action_count(struct rte_eth_dev *dev,
 812                               struct rte_flow_error *error)
 813 {
 814         struct mlx5_priv *priv = dev->data->dev_private;
 815
 816         if (!priv->config.devx)
 817                 goto notsup_err;
 818 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
 819         return 0;
 820 #endif
 821 notsup_err:
 822         return rte_flow_error_set
 823                       (error, ENOTSUP,
 824                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 825                        NULL,
 826                        "count action not supported");
 827 }
 828
 829 /**
 830  * Validate the L2 encap action.
 831  *
 832  * @param[in] action_flags
 833  *   Holds the actions detected until now.
 834  * @param[in] action
 835  *   Pointer to the encap action.
 836  * @param[in] attr
 837  *   Pointer to flow attributes
 838  * @param[out] error
 839  *   Pointer to error structure.
 840  *
 841  * @return
 842  *   0 on success, a negative errno value otherwise and rte_errno is set.
 843  */
 844 static int
 845 flow_dv_validate_action_l2_encap(uint64_t action_flags,
 846                                  const struct rte_flow_action *action,
 847                                  const struct rte_flow_attr *attr,
 848                                  struct rte_flow_error *error)
 849 {
 850         if (!(action->conf))
 851                 return rte_flow_error_set(error, EINVAL,
 852                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
 853                                           "configuration cannot be null");
 854         if (action_flags & MLX5_FLOW_ACTION_DROP)
 855                 return rte_flow_error_set(error, EINVAL,
 856                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 857                                           "can't drop and encap in same flow");
 858         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
 859                 return rte_flow_error_set(error, EINVAL,
 860                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 861                                           "can only have a single encap or"
 862                                           " decap action in a flow");
 863         if (!attr->transfer && attr->ingress)
 864                 return rte_flow_error_set(error, ENOTSUP,
 865                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
 866                                           NULL,
 867                                           "encap action not supported for "
 868                                           "ingress");
 869         return 0;
 870 }
 871
 872 /**
 873  * Validate the L2 decap action.
 874  *
 875  * @param[in] action_flags
 876  *   Holds the actions detected until now.
 877  * @param[in] attr
 878  *   Pointer to flow attributes
 879  * @param[out] error
 880  *   Pointer to error structure.
 881  *
 882  * @return
 883  *   0 on success, a negative errno value otherwise and rte_errno is set.
 884  */
 885 static int
 886 flow_dv_validate_action_l2_decap(uint64_t action_flags,
 887                                  const struct rte_flow_attr *attr,
 888                                  struct rte_flow_error *error)
 889 {
 890         if (action_flags & MLX5_FLOW_ACTION_DROP)
 891                 return rte_flow_error_set(error, EINVAL,
 892                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 893                                           "can't drop and decap in same flow");
 894         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
 895                 return rte_flow_error_set(error, EINVAL,
 896                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 897                                           "can only have a single encap or"
 898                                           " decap action in a flow");
 899         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
 900                 return rte_flow_error_set(error, EINVAL,
 901                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 902                                           "can't have decap action after"
 903                                           " modify action");
 904         if (attr->egress)
 905                 return rte_flow_error_set(error, ENOTSUP,
 906                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
 907                                           NULL,
 908                                           "decap action not supported for "
 909                                           "egress");
 910         return 0;
 911 }
 912
 913 /**
 914  * Validate the raw encap action.
 915  *
 916  * @param[in] action_flags
 917  *   Holds the actions detected until now.
 918  * @param[in] action
 919  *   Pointer to the encap action.
 920  * @param[in] attr
 921  *   Pointer to flow attributes
 922  * @param[out] error
 923  *   Pointer to error structure.
 924  *
 925  * @return
 926  *   0 on success, a negative errno value otherwise and rte_errno is set.
 927  */
 928 static int
 929 flow_dv_validate_action_raw_encap(uint64_t action_flags,
 930                                   const struct rte_flow_action *action,
 931                                   const struct rte_flow_attr *attr,
 932                                   struct rte_flow_error *error)
 933 {
 934         if (!(action->conf))
 935                 return rte_flow_error_set(error, EINVAL,
 936                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
 937                                           "configuration cannot be null");
 938         if (action_flags & MLX5_FLOW_ACTION_DROP)
 939                 return rte_flow_error_set(error, EINVAL,
 940                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 941                                           "can't drop and encap in same flow");
 942         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
 943                 return rte_flow_error_set(error, EINVAL,
 944                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 945                                           "can only have a single encap"
 946                                           " action in a flow");
 947         /* encap without preceding decap is not supported for ingress */
 948         if (!attr->transfer &&  attr->ingress &&
 949             !(action_flags & MLX5_FLOW_ACTION_RAW_DECAP))
 950                 return rte_flow_error_set(error, ENOTSUP,
 951                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
 952                                           NULL,
 953                                           "encap action not supported for "
 954                                           "ingress");
 955         return 0;
 956 }
 957
 958 /**
 959  * Validate the raw decap action.
 960  *
 961  * @param[in] action_flags
 962  *   Holds the actions detected until now.
 963  * @param[in] action
 964  *   Pointer to the encap action.
 965  * @param[in] attr
 966  *   Pointer to flow attributes
 967  * @param[out] error
 968  *   Pointer to error structure.
 969  *
 970  * @return
 971  *   0 on success, a negative errno value otherwise and rte_errno is set.
 972  */
 973 static int
 974 flow_dv_validate_action_raw_decap(uint64_t action_flags,
 975                                   const struct rte_flow_action *action,
 976                                   const struct rte_flow_attr *attr,
 977                                   struct rte_flow_error *error)
 978 {
 979         if (action_flags & MLX5_FLOW_ACTION_DROP)
 980                 return rte_flow_error_set(error, EINVAL,
 981                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 982                                           "can't drop and decap in same flow");
 983         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
 984                 return rte_flow_error_set(error, EINVAL,
 985                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 986                                           "can't have encap action before"
 987                                           " decap action");
 988         if (action_flags & MLX5_FLOW_DECAP_ACTIONS)
 989                 return rte_flow_error_set(error, EINVAL,
 990                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 991                                           "can only have a single decap"
 992                                           " action in a flow");
 993         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
 994                 return rte_flow_error_set(error, EINVAL,
 995                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 996                                           "can't have decap action after"
 997                                           " modify action");
 998         /* decap action is valid on egress only if it is followed by encap */
 999         if (attr->egress) {
1000                 for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
1001                        action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
1002                        action++) {
1003                 }
1004                 if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP)
1005                         return rte_flow_error_set
1006                                         (error, ENOTSUP,
1007                                          RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
1008                                          NULL, "decap action not supported"
1009                                          " for egress");
1010         }
1011         return 0;
1012 }
1013
1014 /**
1015  * Find existing encap/decap resource or create and register a new one.
1016  *
1017  * @param dev[in, out]
1018  *   Pointer to rte_eth_dev structure.
1019  * @param[in, out] resource
1020  *   Pointer to encap/decap resource.
1021  * @parm[in, out] dev_flow
1022  *   Pointer to the dev_flow.
1023  * @param[out] error
1024  *   pointer to error structure.
1025  *
1026  * @return
1027  *   0 on success otherwise -errno and errno is set.
1028  */
1029 static int
1030 flow_dv_encap_decap_resource_register
1031                         (struct rte_eth_dev *dev,
1032                          struct mlx5_flow_dv_encap_decap_resource *resource,
1033                          struct mlx5_flow *dev_flow,
1034                          struct rte_flow_error *error)
1035 {
1036         struct mlx5_priv *priv = dev->data->dev_private;
1037         struct mlx5_ibv_shared *sh = priv->sh;
1038         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
1039         struct rte_flow *flow = dev_flow->flow;
1040         struct mlx5dv_dr_domain *domain;
1041
1042         resource->flags = flow->group ? 0 : 1;
1043         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
1044                 domain = sh->fdb_domain;
1045         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
1046                 domain = sh->rx_domain;
1047         else
1048                 domain = sh->tx_domain;
1049
1050         /* Lookup a matching resource from cache. */
1051         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
1052                 if (resource->reformat_type == cache_resource->reformat_type &&
1053                     resource->ft_type == cache_resource->ft_type &&
1054                     resource->flags == cache_resource->flags &&
1055                     resource->size == cache_resource->size &&
1056                     !memcmp((const void *)resource->buf,
1057                             (const void *)cache_resource->buf,
1058                             resource->size)) {
1059                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
1060                                 (void *)cache_resource,
1061                                 rte_atomic32_read(&cache_resource->refcnt));
1062                         rte_atomic32_inc(&cache_resource->refcnt);
1063                         dev_flow->dv.encap_decap = cache_resource;
1064                         return 0;
1065                 }
1066         }
1067         /* Register new encap/decap resource. */
1068         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
1069         if (!cache_resource)
1070                 return rte_flow_error_set(error, ENOMEM,
1071                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1072                                           "cannot allocate resource memory");
1073         *cache_resource = *resource;
1074         cache_resource->verbs_action =
1075                 mlx5_glue->dv_create_flow_action_packet_reformat
1076                         (sh->ctx, cache_resource->reformat_type,
1077                          cache_resource->ft_type, domain, cache_resource->flags,
1078                          cache_resource->size,
1079                          (cache_resource->size ? cache_resource->buf : NULL));
1080         if (!cache_resource->verbs_action) {
1081                 rte_free(cache_resource);
1082                 return rte_flow_error_set(error, ENOMEM,
1083                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1084                                           NULL, "cannot create action");
1085         }
1086         rte_atomic32_init(&cache_resource->refcnt);
1087         rte_atomic32_inc(&cache_resource->refcnt);
1088         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
1089         dev_flow->dv.encap_decap = cache_resource;
1090         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
1091                 (void *)cache_resource,
1092                 rte_atomic32_read(&cache_resource->refcnt));
1093         return 0;
1094 }
1095
1096 /**
1097  * Find existing table jump resource or create and register a new one.
1098  *
1099  * @param dev[in, out]
1100  *   Pointer to rte_eth_dev structure.
1101  * @param[in, out] resource
1102  *   Pointer to jump table resource.
1103  * @parm[in, out] dev_flow
1104  *   Pointer to the dev_flow.
1105  * @param[out] error
1106  *   pointer to error structure.
1107  *
1108  * @return
1109  *   0 on success otherwise -errno and errno is set.
1110  */
1111 static int
1112 flow_dv_jump_tbl_resource_register
1113                         (struct rte_eth_dev *dev,
1114                          struct mlx5_flow_dv_jump_tbl_resource *resource,
1115                          struct mlx5_flow *dev_flow,
1116                          struct rte_flow_error *error)
1117 {
1118         struct mlx5_priv *priv = dev->data->dev_private;
1119         struct mlx5_ibv_shared *sh = priv->sh;
1120         struct mlx5_flow_dv_jump_tbl_resource *cache_resource;
1121
1122         /* Lookup a matching resource from cache. */
1123         LIST_FOREACH(cache_resource, &sh->jump_tbl, next) {
1124                 if (resource->tbl == cache_resource->tbl) {
1125                         DRV_LOG(DEBUG, "jump table resource resource %p: refcnt %d++",
1126                                 (void *)cache_resource,
1127                                 rte_atomic32_read(&cache_resource->refcnt));
1128                         rte_atomic32_inc(&cache_resource->refcnt);
1129                         dev_flow->dv.jump = cache_resource;
1130                         return 0;
1131                 }
1132         }
1133         /* Register new jump table resource. */
1134         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
1135         if (!cache_resource)
1136                 return rte_flow_error_set(error, ENOMEM,
1137                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1138                                           "cannot allocate resource memory");
1139         *cache_resource = *resource;
1140         cache_resource->action =
1141                 mlx5_glue->dr_create_flow_action_dest_flow_tbl
1142                 (resource->tbl->obj);
1143         if (!cache_resource->action) {
1144                 rte_free(cache_resource);
1145                 return rte_flow_error_set(error, ENOMEM,
1146                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1147                                           NULL, "cannot create action");
1148         }
1149         rte_atomic32_init(&cache_resource->refcnt);
1150         rte_atomic32_inc(&cache_resource->refcnt);
1151         LIST_INSERT_HEAD(&sh->jump_tbl, cache_resource, next);
1152         dev_flow->dv.jump = cache_resource;
1153         DRV_LOG(DEBUG, "new jump table  resource %p: refcnt %d++",
1154                 (void *)cache_resource,
1155                 rte_atomic32_read(&cache_resource->refcnt));
1156         return 0;
1157 }
1158
1159 /**
1160  * Find existing table port ID resource or create and register a new one.
1161  *
1162  * @param dev[in, out]
1163  *   Pointer to rte_eth_dev structure.
1164  * @param[in, out] resource
1165  *   Pointer to port ID action resource.
1166  * @parm[in, out] dev_flow
1167  *   Pointer to the dev_flow.
1168  * @param[out] error
1169  *   pointer to error structure.
1170  *
1171  * @return
1172  *   0 on success otherwise -errno and errno is set.
1173  */
1174 static int
1175 flow_dv_port_id_action_resource_register
1176                         (struct rte_eth_dev *dev,
1177                          struct mlx5_flow_dv_port_id_action_resource *resource,
1178                          struct mlx5_flow *dev_flow,
1179                          struct rte_flow_error *error)
1180 {
1181         struct mlx5_priv *priv = dev->data->dev_private;
1182         struct mlx5_ibv_shared *sh = priv->sh;
1183         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
1184
1185         /* Lookup a matching resource from cache. */
1186         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
1187                 if (resource->port_id == cache_resource->port_id) {
1188                         DRV_LOG(DEBUG, "port id action resource resource %p: "
1189                                 "refcnt %d++",
1190                                 (void *)cache_resource,
1191                                 rte_atomic32_read(&cache_resource->refcnt));
1192                         rte_atomic32_inc(&cache_resource->refcnt);
1193                         dev_flow->dv.port_id_action = cache_resource;
1194                         return 0;
1195                 }
1196         }
1197         /* Register new port id action resource. */
1198         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
1199         if (!cache_resource)
1200                 return rte_flow_error_set(error, ENOMEM,
1201                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1202                                           "cannot allocate resource memory");
1203         *cache_resource = *resource;
1204         cache_resource->action =
1205                 mlx5_glue->dr_create_flow_action_dest_vport
1206                         (priv->sh->fdb_domain, resource->port_id);
1207         if (!cache_resource->action) {
1208                 rte_free(cache_resource);
1209                 return rte_flow_error_set(error, ENOMEM,
1210                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1211                                           NULL, "cannot create action");
1212         }
1213         rte_atomic32_init(&cache_resource->refcnt);
1214         rte_atomic32_inc(&cache_resource->refcnt);
1215         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
1216         dev_flow->dv.port_id_action = cache_resource;
1217         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
1218                 (void *)cache_resource,
1219                 rte_atomic32_read(&cache_resource->refcnt));
1220         return 0;
1221 }
1222
1223 /**
1224  * Get the size of specific rte_flow_item_type
1225  *
1226  * @param[in] item_type
1227  *   Tested rte_flow_item_type.
1228  *
1229  * @return
1230  *   sizeof struct item_type, 0 if void or irrelevant.
1231  */
1232 static size_t
1233 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
1234 {
1235         size_t retval;
1236
1237         switch (item_type) {
1238         case RTE_FLOW_ITEM_TYPE_ETH:
1239                 retval = sizeof(struct rte_flow_item_eth);
1240                 break;
1241         case RTE_FLOW_ITEM_TYPE_VLAN:
1242                 retval = sizeof(struct rte_flow_item_vlan);
1243                 break;
1244         case RTE_FLOW_ITEM_TYPE_IPV4:
1245                 retval = sizeof(struct rte_flow_item_ipv4);
1246                 break;
1247         case RTE_FLOW_ITEM_TYPE_IPV6:
1248                 retval = sizeof(struct rte_flow_item_ipv6);
1249                 break;
1250         case RTE_FLOW_ITEM_TYPE_UDP:
1251                 retval = sizeof(struct rte_flow_item_udp);
1252                 break;
1253         case RTE_FLOW_ITEM_TYPE_TCP:
1254                 retval = sizeof(struct rte_flow_item_tcp);
1255                 break;
1256         case RTE_FLOW_ITEM_TYPE_VXLAN:
1257                 retval = sizeof(struct rte_flow_item_vxlan);
1258                 break;
1259         case RTE_FLOW_ITEM_TYPE_GRE:
1260                 retval = sizeof(struct rte_flow_item_gre);
1261                 break;
1262         case RTE_FLOW_ITEM_TYPE_NVGRE:
1263                 retval = sizeof(struct rte_flow_item_nvgre);
1264                 break;
1265         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
1266                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
1267                 break;
1268         case RTE_FLOW_ITEM_TYPE_MPLS:
1269                 retval = sizeof(struct rte_flow_item_mpls);
1270                 break;
1271         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
1272         default:
1273                 retval = 0;
1274                 break;
1275         }
1276         return retval;
1277 }
1278
1279 #define MLX5_ENCAP_IPV4_VERSION         0x40
1280 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
1281 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
1282 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
1283 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
1284 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
1285 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
1286
1287 /**
1288  * Convert the encap action data from list of rte_flow_item to raw buffer
1289  *
1290  * @param[in] items
1291  *   Pointer to rte_flow_item objects list.
1292  * @param[out] buf
1293  *   Pointer to the output buffer.
1294  * @param[out] size
1295  *   Pointer to the output buffer size.
1296  * @param[out] error
1297  *   Pointer to the error structure.
1298  *
1299  * @return
1300  *   0 on success, a negative errno value otherwise and rte_errno is set.
1301  */
1302 static int
1303 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
1304                            size_t *size, struct rte_flow_error *error)
1305 {
1306         struct rte_ether_hdr *eth = NULL;
1307         struct rte_vlan_hdr *vlan = NULL;
1308         struct rte_ipv4_hdr *ipv4 = NULL;
1309         struct rte_ipv6_hdr *ipv6 = NULL;
1310         struct rte_udp_hdr *udp = NULL;
1311         struct rte_vxlan_hdr *vxlan = NULL;
1312         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
1313         struct rte_gre_hdr *gre = NULL;
1314         size_t len;
1315         size_t temp_size = 0;
1316
1317         if (!items)
1318                 return rte_flow_error_set(error, EINVAL,
1319                                           RTE_FLOW_ERROR_TYPE_ACTION,
1320                                           NULL, "invalid empty data");
1321         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
1322                 len = flow_dv_get_item_len(items->type);
1323                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
1324                         return rte_flow_error_set(error, EINVAL,
1325                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1326                                                   (void *)items->type,
1327                                                   "items total size is too big"
1328                                                   " for encap action");
1329                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
1330                 switch (items->type) {
1331                 case RTE_FLOW_ITEM_TYPE_ETH:
1332                         eth = (struct rte_ether_hdr *)&buf[temp_size];
1333                         break;
1334                 case RTE_FLOW_ITEM_TYPE_VLAN:
1335                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
1336                         if (!eth)
1337                                 return rte_flow_error_set(error, EINVAL,
1338                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1339                                                 (void *)items->type,
1340                                                 "eth header not found");
1341                         if (!eth->ether_type)
1342                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
1343                         break;
1344                 case RTE_FLOW_ITEM_TYPE_IPV4:
1345                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
1346                         if (!vlan && !eth)
1347                                 return rte_flow_error_set(error, EINVAL,
1348                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1349                                                 (void *)items->type,
1350                                                 "neither eth nor vlan"
1351                                                 " header found");
1352                         if (vlan && !vlan->eth_proto)
1353                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
1354                         else if (eth && !eth->ether_type)
1355                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
1356                         if (!ipv4->version_ihl)
1357                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
1358                                                     MLX5_ENCAP_IPV4_IHL_MIN;
1359                         if (!ipv4->time_to_live)
1360                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
1361                         break;
1362                 case RTE_FLOW_ITEM_TYPE_IPV6:
1363                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
1364                         if (!vlan && !eth)
1365                                 return rte_flow_error_set(error, EINVAL,
1366                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1367                                                 (void *)items->type,
1368                                                 "neither eth nor vlan"
1369                                                 " header found");
1370                         if (vlan && !vlan->eth_proto)
1371                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
1372                         else if (eth && !eth->ether_type)
1373                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
1374                         if (!ipv6->vtc_flow)
1375                                 ipv6->vtc_flow =
1376                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
1377                         if (!ipv6->hop_limits)
1378                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
1379                         break;
1380                 case RTE_FLOW_ITEM_TYPE_UDP:
1381                         udp = (struct rte_udp_hdr *)&buf[temp_size];
1382                         if (!ipv4 && !ipv6)
1383                                 return rte_flow_error_set(error, EINVAL,
1384                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1385                                                 (void *)items->type,
1386                                                 "ip header not found");
1387                         if (ipv4 && !ipv4->next_proto_id)
1388                                 ipv4->next_proto_id = IPPROTO_UDP;
1389                         else if (ipv6 && !ipv6->proto)
1390                                 ipv6->proto = IPPROTO_UDP;
1391                         break;
1392                 case RTE_FLOW_ITEM_TYPE_VXLAN:
1393                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
1394                         if (!udp)
1395                                 return rte_flow_error_set(error, EINVAL,
1396                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1397                                                 (void *)items->type,
1398                                                 "udp header not found");
1399                         if (!udp->dst_port)
1400                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
1401                         if (!vxlan->vx_flags)
1402                                 vxlan->vx_flags =
1403                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
1404                         break;
1405                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
1406                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
1407                         if (!udp)
1408                                 return rte_flow_error_set(error, EINVAL,
1409                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1410                                                 (void *)items->type,
1411                                                 "udp header not found");
1412                         if (!vxlan_gpe->proto)
1413                                 return rte_flow_error_set(error, EINVAL,
1414                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1415                                                 (void *)items->type,
1416                                                 "next protocol not found");
1417                         if (!udp->dst_port)
1418                                 udp->dst_port =
1419                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
1420                         if (!vxlan_gpe->vx_flags)
1421                                 vxlan_gpe->vx_flags =
1422                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
1423                         break;
1424                 case RTE_FLOW_ITEM_TYPE_GRE:
1425                 case RTE_FLOW_ITEM_TYPE_NVGRE:
1426                         gre = (struct rte_gre_hdr *)&buf[temp_size];
1427                         if (!gre->proto)
1428                                 return rte_flow_error_set(error, EINVAL,
1429                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1430                                                 (void *)items->type,
1431                                                 "next protocol not found");
1432                         if (!ipv4 && !ipv6)
1433                                 return rte_flow_error_set(error, EINVAL,
1434                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1435                                                 (void *)items->type,
1436                                                 "ip header not found");
1437                         if (ipv4 && !ipv4->next_proto_id)
1438                                 ipv4->next_proto_id = IPPROTO_GRE;
1439                         else if (ipv6 && !ipv6->proto)
1440                                 ipv6->proto = IPPROTO_GRE;
1441                         break;
1442                 case RTE_FLOW_ITEM_TYPE_VOID:
1443                         break;
1444                 default:
1445                         return rte_flow_error_set(error, EINVAL,
1446                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1447                                                   (void *)items->type,
1448                                                   "unsupported item type");
1449                         break;
1450                 }
1451                 temp_size += len;
1452         }
1453         *size = temp_size;
1454         return 0;
1455 }
1456
1457 static int
1458 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
1459 {
1460         struct rte_ether_hdr *eth = NULL;
1461         struct rte_vlan_hdr *vlan = NULL;
1462         struct rte_ipv6_hdr *ipv6 = NULL;
1463         struct rte_udp_hdr *udp = NULL;
1464         char *next_hdr;
1465         uint16_t proto;
1466
1467         eth = (struct rte_ether_hdr *)data;
1468         next_hdr = (char *)(eth + 1);
1469         proto = RTE_BE16(eth->ether_type);
1470
1471         /* VLAN skipping */
1472         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
1473                 next_hdr += sizeof(struct rte_vlan_hdr);
1474                 vlan = (struct rte_vlan_hdr *)next_hdr;
1475                 proto = RTE_BE16(vlan->eth_proto);
1476         }
1477
1478         /* HW calculates IPv4 csum. no need to proceed */
1479         if (proto == RTE_ETHER_TYPE_IPV4)
1480                 return 0;
1481
1482         /* non IPv4/IPv6 header. not supported */
1483         if (proto != RTE_ETHER_TYPE_IPV6) {
1484                 return rte_flow_error_set(error, ENOTSUP,
1485                                           RTE_FLOW_ERROR_TYPE_ACTION,
1486                                           NULL, "Cannot offload non IPv4/IPv6");
1487         }
1488
1489         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
1490
1491         /* ignore non UDP */
1492         if (ipv6->proto != IPPROTO_UDP)
1493                 return 0;
1494
1495         udp = (struct rte_udp_hdr *)(ipv6 + 1);
1496         udp->dgram_cksum = 0;
1497
1498         return 0;
1499 }
1500
1501 /**
1502  * Convert L2 encap action to DV specification.
1503  *
1504  * @param[in] dev
1505  *   Pointer to rte_eth_dev structure.
1506  * @param[in] action
1507  *   Pointer to action structure.
1508  * @param[in, out] dev_flow
1509  *   Pointer to the mlx5_flow.
1510  * @param[in] transfer
1511  *   Mark if the flow is E-Switch flow.
1512  * @param[out] error
1513  *   Pointer to the error structure.
1514  *
1515  * @return
1516  *   0 on success, a negative errno value otherwise and rte_errno is set.
1517  */
1518 static int
1519 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
1520                                const struct rte_flow_action *action,
1521                                struct mlx5_flow *dev_flow,
1522                                uint8_t transfer,
1523                                struct rte_flow_error *error)
1524 {
1525         const struct rte_flow_item *encap_data;
1526         const struct rte_flow_action_raw_encap *raw_encap_data;
1527         struct mlx5_flow_dv_encap_decap_resource res = {
1528                 .reformat_type =
1529                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
1530                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
1531                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
1532         };
1533
1534         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
1535                 raw_encap_data =
1536                         (const struct rte_flow_action_raw_encap *)action->conf;
1537                 res.size = raw_encap_data->size;
1538                 memcpy(res.buf, raw_encap_data->data, res.size);
1539                 if (flow_dv_zero_encap_udp_csum(res.buf, error))
1540                         return -rte_errno;
1541         } else {
1542                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
1543                         encap_data =
1544                                 ((const struct rte_flow_action_vxlan_encap *)
1545                                                 action->conf)->definition;
1546                 else
1547                         encap_data =
1548                                 ((const struct rte_flow_action_nvgre_encap *)
1549                                                 action->conf)->definition;
1550                 if (flow_dv_convert_encap_data(encap_data, res.buf,
1551                                                &res.size, error))
1552                         return -rte_errno;
1553         }
1554         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
1555                 return rte_flow_error_set(error, EINVAL,
1556                                           RTE_FLOW_ERROR_TYPE_ACTION,
1557                                           NULL, "can't create L2 encap action");
1558         return 0;
1559 }
1560
1561 /**
1562  * Convert L2 decap action to DV specification.
1563  *
1564  * @param[in] dev
1565  *   Pointer to rte_eth_dev structure.
1566  * @param[in, out] dev_flow
1567  *   Pointer to the mlx5_flow.
1568  * @param[in] transfer
1569  *   Mark if the flow is E-Switch flow.
1570  * @param[out] error
1571  *   Pointer to the error structure.
1572  *
1573  * @return
1574  *   0 on success, a negative errno value otherwise and rte_errno is set.
1575  */
1576 static int
1577 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
1578                                struct mlx5_flow *dev_flow,
1579                                uint8_t transfer,
1580                                struct rte_flow_error *error)
1581 {
1582         struct mlx5_flow_dv_encap_decap_resource res = {
1583                 .size = 0,
1584                 .reformat_type =
1585                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
1586                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
1587                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
1588         };
1589
1590         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
1591                 return rte_flow_error_set(error, EINVAL,
1592                                           RTE_FLOW_ERROR_TYPE_ACTION,
1593                                           NULL, "can't create L2 decap action");
1594         return 0;
1595 }
1596
1597 /**
1598  * Convert raw decap/encap (L3 tunnel) action to DV specification.
1599  *
1600  * @param[in] dev
1601  *   Pointer to rte_eth_dev structure.
1602  * @param[in] action
1603  *   Pointer to action structure.
1604  * @param[in, out] dev_flow
1605  *   Pointer to the mlx5_flow.
1606  * @param[in] attr
1607  *   Pointer to the flow attributes.
1608  * @param[out] error
1609  *   Pointer to the error structure.
1610  *
1611  * @return
1612  *   0 on success, a negative errno value otherwise and rte_errno is set.
1613  */
1614 static int
1615 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
1616                                 const struct rte_flow_action *action,
1617                                 struct mlx5_flow *dev_flow,
1618                                 const struct rte_flow_attr *attr,
1619                                 struct rte_flow_error *error)
1620 {
1621         const struct rte_flow_action_raw_encap *encap_data;
1622         struct mlx5_flow_dv_encap_decap_resource res;
1623
1624         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
1625         res.size = encap_data->size;
1626         memcpy(res.buf, encap_data->data, res.size);
1627         res.reformat_type = attr->egress ?
1628                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL :
1629                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2;
1630         if (attr->transfer)
1631                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
1632         else
1633                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
1634                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
1635         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
1636                 return rte_flow_error_set(error, EINVAL,
1637                                           RTE_FLOW_ERROR_TYPE_ACTION,
1638                                           NULL, "can't create encap action");
1639         return 0;
1640 }
1641
1642 /**
1643  * Validate the modify-header actions.
1644  *
1645  * @param[in] action_flags
1646  *   Holds the actions detected until now.
1647  * @param[in] action
1648  *   Pointer to the modify action.
1649  * @param[out] error
1650  *   Pointer to error structure.
1651  *
1652  * @return
1653  *   0 on success, a negative errno value otherwise and rte_errno is set.
1654  */
1655 static int
1656 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
1657                                    const struct rte_flow_action *action,
1658                                    struct rte_flow_error *error)
1659 {
1660         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
1661                 return rte_flow_error_set(error, EINVAL,
1662                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1663                                           NULL, "action configuration not set");
1664         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
1665                 return rte_flow_error_set(error, EINVAL,
1666                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1667                                           "can't have encap action before"
1668                                           " modify action");
1669         return 0;
1670 }
1671
1672 /**
1673  * Validate the modify-header MAC address actions.
1674  *
1675  * @param[in] action_flags
1676  *   Holds the actions detected until now.
1677  * @param[in] action
1678  *   Pointer to the modify action.
1679  * @param[in] item_flags
1680  *   Holds the items detected.
1681  * @param[out] error
1682  *   Pointer to error structure.
1683  *
1684  * @return
1685  *   0 on success, a negative errno value otherwise and rte_errno is set.
1686  */
1687 static int
1688 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
1689                                    const struct rte_flow_action *action,
1690                                    const uint64_t item_flags,
1691                                    struct rte_flow_error *error)
1692 {
1693         int ret = 0;
1694
1695         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1696         if (!ret) {
1697                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
1698                         return rte_flow_error_set(error, EINVAL,
1699                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1700                                                   NULL,
1701                                                   "no L2 item in pattern");
1702         }
1703         return ret;
1704 }
1705
1706 /**
1707  * Validate the modify-header IPv4 address actions.
1708  *
1709  * @param[in] action_flags
1710  *   Holds the actions detected until now.
1711  * @param[in] action
1712  *   Pointer to the modify action.
1713  * @param[in] item_flags
1714  *   Holds the items detected.
1715  * @param[out] error
1716  *   Pointer to error structure.
1717  *
1718  * @return
1719  *   0 on success, a negative errno value otherwise and rte_errno is set.
1720  */
1721 static int
1722 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
1723                                     const struct rte_flow_action *action,
1724                                     const uint64_t item_flags,
1725                                     struct rte_flow_error *error)
1726 {
1727         int ret = 0;
1728
1729         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1730         if (!ret) {
1731                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
1732                         return rte_flow_error_set(error, EINVAL,
1733                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1734                                                   NULL,
1735                                                   "no ipv4 item in pattern");
1736         }
1737         return ret;
1738 }
1739
1740 /**
1741  * Validate the modify-header IPv6 address actions.
1742  *
1743  * @param[in] action_flags
1744  *   Holds the actions detected until now.
1745  * @param[in] action
1746  *   Pointer to the modify action.
1747  * @param[in] item_flags
1748  *   Holds the items detected.
1749  * @param[out] error
1750  *   Pointer to error structure.
1751  *
1752  * @return
1753  *   0 on success, a negative errno value otherwise and rte_errno is set.
1754  */
1755 static int
1756 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
1757                                     const struct rte_flow_action *action,
1758                                     const uint64_t item_flags,
1759                                     struct rte_flow_error *error)
1760 {
1761         int ret = 0;
1762
1763         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1764         if (!ret) {
1765                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
1766                         return rte_flow_error_set(error, EINVAL,
1767                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1768                                                   NULL,
1769                                                   "no ipv6 item in pattern");
1770         }
1771         return ret;
1772 }
1773
1774 /**
1775  * Validate the modify-header TP actions.
1776  *
1777  * @param[in] action_flags
1778  *   Holds the actions detected until now.
1779  * @param[in] action
1780  *   Pointer to the modify action.
1781  * @param[in] item_flags
1782  *   Holds the items detected.
1783  * @param[out] error
1784  *   Pointer to error structure.
1785  *
1786  * @return
1787  *   0 on success, a negative errno value otherwise and rte_errno is set.
1788  */
1789 static int
1790 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
1791                                   const struct rte_flow_action *action,
1792                                   const uint64_t item_flags,
1793                                   struct rte_flow_error *error)
1794 {
1795         int ret = 0;
1796
1797         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1798         if (!ret) {
1799                 if (!(item_flags & MLX5_FLOW_LAYER_L4))
1800                         return rte_flow_error_set(error, EINVAL,
1801                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1802                                                   NULL, "no transport layer "
1803                                                   "in pattern");
1804         }
1805         return ret;
1806 }
1807
1808 /**
1809  * Validate the modify-header actions of increment/decrement
1810  * TCP Sequence-number.
1811  *
1812  * @param[in] action_flags
1813  *   Holds the actions detected until now.
1814  * @param[in] action
1815  *   Pointer to the modify action.
1816  * @param[in] item_flags
1817  *   Holds the items detected.
1818  * @param[out] error
1819  *   Pointer to error structure.
1820  *
1821  * @return
1822  *   0 on success, a negative errno value otherwise and rte_errno is set.
1823  */
1824 static int
1825 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
1826                                        const struct rte_flow_action *action,
1827                                        const uint64_t item_flags,
1828                                        struct rte_flow_error *error)
1829 {
1830         int ret = 0;
1831
1832         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1833         if (!ret) {
1834                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
1835                         return rte_flow_error_set(error, EINVAL,
1836                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1837                                                   NULL, "no TCP item in"
1838                                                   " pattern");
1839                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
1840                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
1841                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
1842                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
1843                         return rte_flow_error_set(error, EINVAL,
1844                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1845                                                   NULL,
1846                                                   "cannot decrease and increase"
1847                                                   " TCP sequence number"
1848                                                   " at the same time");
1849         }
1850         return ret;
1851 }
1852
1853 /**
1854  * Validate the modify-header actions of increment/decrement
1855  * TCP Acknowledgment number.
1856  *
1857  * @param[in] action_flags
1858  *   Holds the actions detected until now.
1859  * @param[in] action
1860  *   Pointer to the modify action.
1861  * @param[in] item_flags
1862  *   Holds the items detected.
1863  * @param[out] error
1864  *   Pointer to error structure.
1865  *
1866  * @return
1867  *   0 on success, a negative errno value otherwise and rte_errno is set.
1868  */
1869 static int
1870 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
1871                                        const struct rte_flow_action *action,
1872                                        const uint64_t item_flags,
1873                                        struct rte_flow_error *error)
1874 {
1875         int ret = 0;
1876
1877         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1878         if (!ret) {
1879                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
1880                         return rte_flow_error_set(error, EINVAL,
1881                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1882                                                   NULL, "no TCP item in"
1883                                                   " pattern");
1884                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
1885                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
1886                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
1887                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
1888                         return rte_flow_error_set(error, EINVAL,
1889                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1890                                                   NULL,
1891                                                   "cannot decrease and increase"
1892                                                   " TCP acknowledgment number"
1893                                                   " at the same time");
1894         }
1895         return ret;
1896 }
1897
1898 /**
1899  * Validate the modify-header TTL actions.
1900  *
1901  * @param[in] action_flags
1902  *   Holds the actions detected until now.
1903  * @param[in] action
1904  *   Pointer to the modify action.
1905  * @param[in] item_flags
1906  *   Holds the items detected.
1907  * @param[out] error
1908  *   Pointer to error structure.
1909  *
1910  * @return
1911  *   0 on success, a negative errno value otherwise and rte_errno is set.
1912  */
1913 static int
1914 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
1915                                    const struct rte_flow_action *action,
1916                                    const uint64_t item_flags,
1917                                    struct rte_flow_error *error)
1918 {
1919         int ret = 0;
1920
1921         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1922         if (!ret) {
1923                 if (!(item_flags & MLX5_FLOW_LAYER_L3))
1924                         return rte_flow_error_set(error, EINVAL,
1925                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1926                                                   NULL,
1927                                                   "no IP protocol in pattern");
1928         }
1929         return ret;
1930 }
1931
1932 /**
1933  * Validate jump action.
1934  *
1935  * @param[in] action
1936  *   Pointer to the modify action.
1937  * @param[in] group
1938  *   The group of the current flow.
1939  * @param[out] error
1940  *   Pointer to error structure.
1941  *
1942  * @return
1943  *   0 on success, a negative errno value otherwise and rte_errno is set.
1944  */
1945 static int
1946 flow_dv_validate_action_jump(const struct rte_flow_action *action,
1947                              uint32_t group,
1948                              struct rte_flow_error *error)
1949 {
1950         if (action->type != RTE_FLOW_ACTION_TYPE_JUMP && !action->conf)
1951                 return rte_flow_error_set(error, EINVAL,
1952                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1953                                           NULL, "action configuration not set");
1954         if (group >= ((const struct rte_flow_action_jump *)action->conf)->group)
1955                 return rte_flow_error_set(error, EINVAL,
1956                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1957                                           "target group must be higher then"
1958                                           " the current flow group");
1959         return 0;
1960 }
1961
1962 /*
1963  * Validate the port_id action.
1964  *
1965  * @param[in] dev
1966  *   Pointer to rte_eth_dev structure.
1967  * @param[in] action_flags
1968  *   Bit-fields that holds the actions detected until now.
1969  * @param[in] action
1970  *   Port_id RTE action structure.
1971  * @param[in] attr
1972  *   Attributes of flow that includes this action.
1973  * @param[out] error
1974  *   Pointer to error structure.
1975  *
1976  * @return
1977  *   0 on success, a negative errno value otherwise and rte_errno is set.
1978  */
1979 static int
1980 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
1981                                 uint64_t action_flags,
1982                                 const struct rte_flow_action *action,
1983                                 const struct rte_flow_attr *attr,
1984                                 struct rte_flow_error *error)
1985 {
1986         const struct rte_flow_action_port_id *port_id;
1987         uint16_t port;
1988         uint16_t esw_domain_id;
1989         uint16_t act_port_domain_id;
1990         int ret;
1991
1992         if (!attr->transfer)
1993                 return rte_flow_error_set(error, ENOTSUP,
1994                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1995                                           NULL,
1996                                           "port id action is valid in transfer"
1997                                           " mode only");
1998         if (!action || !action->conf)
1999                 return rte_flow_error_set(error, ENOTSUP,
2000                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2001                                           NULL,
2002                                           "port id action parameters must be"
2003                                           " specified");
2004         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
2005                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
2006                 return rte_flow_error_set(error, EINVAL,
2007                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2008                                           "can have only one fate actions in"
2009                                           " a flow");
2010         ret = mlx5_port_to_eswitch_info(dev->data->port_id,
2011                                         &esw_domain_id, NULL);
2012         if (ret < 0)
2013                 return rte_flow_error_set(error, -ret,
2014                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2015                                           NULL,
2016                                           "failed to obtain E-Switch info");
2017         port_id = action->conf;
2018         port = port_id->original ? dev->data->port_id : port_id->id;
2019         ret = mlx5_port_to_eswitch_info(port, &act_port_domain_id, NULL);
2020         if (ret)
2021                 return rte_flow_error_set
2022                                 (error, -ret,
2023                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
2024                                  "failed to obtain E-Switch port id for port");
2025         if (act_port_domain_id != esw_domain_id)
2026                 return rte_flow_error_set
2027                                 (error, -ret,
2028                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2029                                  "port does not belong to"
2030                                  " E-Switch being configured");
2031         return 0;
2032 }
2033
2034 /**
2035  * Find existing modify-header resource or create and register a new one.
2036  *
2037  * @param dev[in, out]
2038  *   Pointer to rte_eth_dev structure.
2039  * @param[in, out] resource
2040  *   Pointer to modify-header resource.
2041  * @parm[in, out] dev_flow
2042  *   Pointer to the dev_flow.
2043  * @param[out] error
2044  *   pointer to error structure.
2045  *
2046  * @return
2047  *   0 on success otherwise -errno and errno is set.
2048  */
2049 static int
2050 flow_dv_modify_hdr_resource_register
2051                         (struct rte_eth_dev *dev,
2052                          struct mlx5_flow_dv_modify_hdr_resource *resource,
2053                          struct mlx5_flow *dev_flow,
2054                          struct rte_flow_error *error)
2055 {
2056         struct mlx5_priv *priv = dev->data->dev_private;
2057         struct mlx5_ibv_shared *sh = priv->sh;
2058         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
2059         struct mlx5dv_dr_domain *ns;
2060
2061         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2062                 ns = sh->fdb_domain;
2063         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
2064                 ns = sh->tx_domain;
2065         else
2066                 ns = sh->rx_domain;
2067         resource->flags =
2068                 dev_flow->flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
2069         /* Lookup a matching resource from cache. */
2070         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
2071                 if (resource->ft_type == cache_resource->ft_type &&
2072                     resource->actions_num == cache_resource->actions_num &&
2073                     resource->flags == cache_resource->flags &&
2074                     !memcmp((const void *)resource->actions,
2075                             (const void *)cache_resource->actions,
2076                             (resource->actions_num *
2077                                             sizeof(resource->actions[0])))) {
2078                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
2079                                 (void *)cache_resource,
2080                                 rte_atomic32_read(&cache_resource->refcnt));
2081                         rte_atomic32_inc(&cache_resource->refcnt);
2082                         dev_flow->dv.modify_hdr = cache_resource;
2083                         return 0;
2084                 }
2085         }
2086         /* Register new modify-header resource. */
2087         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2088         if (!cache_resource)
2089                 return rte_flow_error_set(error, ENOMEM,
2090                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2091                                           "cannot allocate resource memory");
2092         *cache_resource = *resource;
2093         cache_resource->verbs_action =
2094                 mlx5_glue->dv_create_flow_action_modify_header
2095                                         (sh->ctx, cache_resource->ft_type,
2096                                          ns, cache_resource->flags,
2097                                          cache_resource->actions_num *
2098                                          sizeof(cache_resource->actions[0]),
2099                                          (uint64_t *)cache_resource->actions);
2100         if (!cache_resource->verbs_action) {
2101                 rte_free(cache_resource);
2102                 return rte_flow_error_set(error, ENOMEM,
2103                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2104                                           NULL, "cannot create action");
2105         }
2106         rte_atomic32_init(&cache_resource->refcnt);
2107         rte_atomic32_inc(&cache_resource->refcnt);
2108         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
2109         dev_flow->dv.modify_hdr = cache_resource;
2110         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
2111                 (void *)cache_resource,
2112                 rte_atomic32_read(&cache_resource->refcnt));
2113         return 0;
2114 }
2115
2116 /**
2117  * Get or create a flow counter.
2118  *
2119  * @param[in] dev
2120  *   Pointer to the Ethernet device structure.
2121  * @param[in] shared
2122  *   Indicate if this counter is shared with other flows.
2123  * @param[in] id
2124  *   Counter identifier.
2125  *
2126  * @return
2127  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
2128  */
2129 static struct mlx5_flow_counter *
2130 flow_dv_counter_new(struct rte_eth_dev *dev, uint32_t shared, uint32_t id)
2131 {
2132         struct mlx5_priv *priv = dev->data->dev_private;
2133         struct mlx5_flow_counter *cnt = NULL;
2134         struct mlx5_devx_counter_set *dcs = NULL;
2135         int ret;
2136
2137         if (!priv->config.devx) {
2138                 ret = -ENOTSUP;
2139                 goto error_exit;
2140         }
2141         if (shared) {
2142                 LIST_FOREACH(cnt, &priv->flow_counters, next) {
2143                         if (cnt->shared && cnt->id == id) {
2144                                 cnt->ref_cnt++;
2145                                 return cnt;
2146                         }
2147                 }
2148         }
2149         cnt = rte_calloc(__func__, 1, sizeof(*cnt), 0);
2150         dcs = rte_calloc(__func__, 1, sizeof(*dcs), 0);
2151         if (!dcs || !cnt) {
2152                 ret = -ENOMEM;
2153                 goto error_exit;
2154         }
2155         ret = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, dcs);
2156         if (ret)
2157                 goto error_exit;
2158         struct mlx5_flow_counter tmpl = {
2159                 .shared = shared,
2160                 .ref_cnt = 1,
2161                 .id = id,
2162                 .dcs = dcs,
2163         };
2164         tmpl.action = mlx5_glue->dv_create_flow_action_counter(dcs->obj, 0);
2165         if (!tmpl.action) {
2166                 ret = errno;
2167                 goto error_exit;
2168         }
2169         *cnt = tmpl;
2170         LIST_INSERT_HEAD(&priv->flow_counters, cnt, next);
2171         return cnt;
2172 error_exit:
2173         rte_free(cnt);
2174         rte_free(dcs);
2175         rte_errno = -ret;
2176         return NULL;
2177 }
2178
2179 /**
2180  * Release a flow counter.
2181  *
2182  * @param[in] counter
2183  *   Pointer to the counter handler.
2184  */
2185 static void
2186 flow_dv_counter_release(struct mlx5_flow_counter *counter)
2187 {
2188         int ret;
2189
2190         if (!counter)
2191                 return;
2192         if (--counter->ref_cnt == 0) {
2193                 ret = mlx5_devx_cmd_flow_counter_free(counter->dcs->obj);
2194                 if (ret)
2195                         DRV_LOG(ERR, "Failed to free devx counters, %d", ret);
2196                 LIST_REMOVE(counter, next);
2197                 rte_free(counter->dcs);
2198                 rte_free(counter);
2199         }
2200 }
2201
2202 /**
2203  * Verify the @p attributes will be correctly understood by the NIC and store
2204  * them in the @p flow if everything is correct.
2205  *
2206  * @param[in] dev
2207  *   Pointer to dev struct.
2208  * @param[in] attributes
2209  *   Pointer to flow attributes
2210  * @param[out] error
2211  *   Pointer to error structure.
2212  *
2213  * @return
2214  *   0 on success, a negative errno value otherwise and rte_errno is set.
2215  */
2216 static int
2217 flow_dv_validate_attributes(struct rte_eth_dev *dev,
2218                             const struct rte_flow_attr *attributes,
2219                             struct rte_flow_error *error)
2220 {
2221         struct mlx5_priv *priv = dev->data->dev_private;
2222         uint32_t priority_max = priv->config.flow_prio - 1;
2223
2224 #ifndef HAVE_MLX5DV_DR
2225         if (attributes->group)
2226                 return rte_flow_error_set(error, ENOTSUP,
2227                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
2228                                           NULL,
2229                                           "groups is not supported");
2230 #endif
2231         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
2232             attributes->priority >= priority_max)
2233                 return rte_flow_error_set(error, ENOTSUP,
2234                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
2235                                           NULL,
2236                                           "priority out of range");
2237         if (attributes->transfer) {
2238                 if (!priv->config.dv_esw_en)
2239                         return rte_flow_error_set
2240                                 (error, ENOTSUP,
2241                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2242                                  "E-Switch dr is not supported");
2243                 if (!(priv->representor || priv->master))
2244                         return rte_flow_error_set
2245                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2246                                  NULL, "E-Switch configurationd can only be"
2247                                  " done by a master or a representor device");
2248                 if (attributes->egress)
2249                         return rte_flow_error_set
2250                                 (error, ENOTSUP,
2251                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
2252                                  "egress is not supported");
2253                 if (attributes->group >= MLX5_MAX_TABLES_FDB)
2254                         return rte_flow_error_set
2255                                 (error, EINVAL,
2256                                  RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
2257                                  NULL, "group must be smaller than "
2258                                  RTE_STR(MLX5_MAX_FDB_TABLES));
2259         }
2260         if (!(attributes->egress ^ attributes->ingress))
2261                 return rte_flow_error_set(error, ENOTSUP,
2262                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
2263                                           "must specify exactly one of "
2264                                           "ingress or egress");
2265         return 0;
2266 }
2267
2268 /**
2269  * Internal validation function. For validating both actions and items.
2270  *
2271  * @param[in] dev
2272  *   Pointer to the rte_eth_dev structure.
2273  * @param[in] attr
2274  *   Pointer to the flow attributes.
2275  * @param[in] items
2276  *   Pointer to the list of items.
2277  * @param[in] actions
2278  *   Pointer to the list of actions.
2279  * @param[out] error
2280  *   Pointer to the error structure.
2281  *
2282  * @return
2283  *   0 on success, a negative errno value otherwise and rte_errno is set.
2284  */
2285 static int
2286 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
2287                  const struct rte_flow_item items[],
2288                  const struct rte_flow_action actions[],
2289                  struct rte_flow_error *error)
2290 {
2291         int ret;
2292         uint64_t action_flags = 0;
2293         uint64_t item_flags = 0;
2294         uint64_t last_item = 0;
2295         uint8_t next_protocol = 0xff;
2296         int actions_n = 0;
2297         struct rte_flow_item_tcp nic_tcp_mask = {
2298                 .hdr = {
2299                         .tcp_flags = 0xFF,
2300                         .src_port = RTE_BE16(UINT16_MAX),
2301                         .dst_port = RTE_BE16(UINT16_MAX),
2302                 }
2303         };
2304
2305         if (items == NULL)
2306                 return -1;
2307         ret = flow_dv_validate_attributes(dev, attr, error);
2308         if (ret < 0)
2309                 return ret;
2310         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2311                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2312                 switch (items->type) {
2313                 case RTE_FLOW_ITEM_TYPE_VOID:
2314                         break;
2315                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
2316                         ret = flow_dv_validate_item_port_id
2317                                         (dev, items, attr, item_flags, error);
2318                         if (ret < 0)
2319                                 return ret;
2320                         last_item |= MLX5_FLOW_ITEM_PORT_ID;
2321                         break;
2322                 case RTE_FLOW_ITEM_TYPE_ETH:
2323                         ret = mlx5_flow_validate_item_eth(items, item_flags,
2324                                                           error);
2325                         if (ret < 0)
2326                                 return ret;
2327                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
2328                                              MLX5_FLOW_LAYER_OUTER_L2;
2329                         break;
2330                 case RTE_FLOW_ITEM_TYPE_VLAN:
2331                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
2332                                                            error);
2333                         if (ret < 0)
2334                                 return ret;
2335                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2336                                              MLX5_FLOW_LAYER_OUTER_VLAN;
2337                         break;
2338                 case RTE_FLOW_ITEM_TYPE_IPV4:
2339                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
2340                                                            NULL, error);
2341                         if (ret < 0)
2342                                 return ret;
2343                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
2344                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
2345                         if (items->mask != NULL &&
2346                             ((const struct rte_flow_item_ipv4 *)
2347                              items->mask)->hdr.next_proto_id) {
2348                                 next_protocol =
2349                                         ((const struct rte_flow_item_ipv4 *)
2350                                          (items->spec))->hdr.next_proto_id;
2351                                 next_protocol &=
2352                                         ((const struct rte_flow_item_ipv4 *)
2353                                          (items->mask))->hdr.next_proto_id;
2354                         } else {
2355                                 /* Reset for inner layer. */
2356                                 next_protocol = 0xff;
2357                         }
2358                         break;
2359                 case RTE_FLOW_ITEM_TYPE_IPV6:
2360                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
2361                                                            NULL, error);
2362                         if (ret < 0)
2363                                 return ret;
2364                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
2365                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
2366                         if (items->mask != NULL &&
2367                             ((const struct rte_flow_item_ipv6 *)
2368                              items->mask)->hdr.proto) {
2369                                 next_protocol =
2370                                         ((const struct rte_flow_item_ipv6 *)
2371                                          items->spec)->hdr.proto;
2372                                 next_protocol &=
2373                                         ((const struct rte_flow_item_ipv6 *)
2374                                          items->mask)->hdr.proto;
2375                         } else {
2376                                 /* Reset for inner layer. */
2377                                 next_protocol = 0xff;
2378                         }
2379                         break;
2380                 case RTE_FLOW_ITEM_TYPE_TCP:
2381                         ret = mlx5_flow_validate_item_tcp
2382                                                 (items, item_flags,
2383                                                  next_protocol,
2384                                                  &nic_tcp_mask,
2385                                                  error);
2386                         if (ret < 0)
2387                                 return ret;
2388                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
2389                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
2390                         break;
2391                 case RTE_FLOW_ITEM_TYPE_UDP:
2392                         ret = mlx5_flow_validate_item_udp(items, item_flags,
2393                                                           next_protocol,
2394                                                           error);
2395                         if (ret < 0)
2396                                 return ret;
2397                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
2398                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
2399                         break;
2400                 case RTE_FLOW_ITEM_TYPE_GRE:
2401                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2402                         ret = mlx5_flow_validate_item_gre(items, item_flags,
2403                                                           next_protocol, error);
2404                         if (ret < 0)
2405                                 return ret;
2406                         last_item = MLX5_FLOW_LAYER_GRE;
2407                         break;
2408                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2409                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
2410                                                             error);
2411                         if (ret < 0)
2412                                 return ret;
2413                         last_item = MLX5_FLOW_LAYER_VXLAN;
2414                         break;
2415                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2416                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
2417                                                                 item_flags, dev,
2418                                                                 error);
2419                         if (ret < 0)
2420                                 return ret;
2421                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
2422                         break;
2423                 case RTE_FLOW_ITEM_TYPE_MPLS:
2424                         ret = mlx5_flow_validate_item_mpls(dev, items,
2425                                                            item_flags,
2426                                                            last_item, error);
2427                         if (ret < 0)
2428                                 return ret;
2429                         last_item = MLX5_FLOW_LAYER_MPLS;
2430                         break;
2431                 case RTE_FLOW_ITEM_TYPE_META:
2432                         ret = flow_dv_validate_item_meta(dev, items, attr,
2433                                                          error);
2434                         if (ret < 0)
2435                                 return ret;
2436                         last_item = MLX5_FLOW_ITEM_METADATA;
2437                         break;
2438                 case RTE_FLOW_ITEM_TYPE_ICMP:
2439                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
2440                                                            next_protocol,
2441                                                            error);
2442                         if (ret < 0)
2443                                 return ret;
2444                         item_flags |= MLX5_FLOW_LAYER_ICMP;
2445                         break;
2446                 case RTE_FLOW_ITEM_TYPE_ICMP6:
2447                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
2448                                                             next_protocol,
2449                                                             error);
2450                         if (ret < 0)
2451                                 return ret;
2452                         item_flags |= MLX5_FLOW_LAYER_ICMP6;
2453                         break;
2454                 default:
2455                         return rte_flow_error_set(error, ENOTSUP,
2456                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2457                                                   NULL, "item not supported");
2458                 }
2459                 item_flags |= last_item;
2460         }
2461         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2462                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
2463                         return rte_flow_error_set(error, ENOTSUP,
2464                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2465                                                   actions, "too many actions");
2466                 switch (actions->type) {
2467                 case RTE_FLOW_ACTION_TYPE_VOID:
2468                         break;
2469                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
2470                         ret = flow_dv_validate_action_port_id(dev,
2471                                                               action_flags,
2472                                                               actions,
2473                                                               attr,
2474                                                               error);
2475                         if (ret)
2476                                 return ret;
2477                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
2478                         ++actions_n;
2479                         break;
2480                 case RTE_FLOW_ACTION_TYPE_FLAG:
2481                         ret = mlx5_flow_validate_action_flag(action_flags,
2482                                                              attr, error);
2483                         if (ret < 0)
2484                                 return ret;
2485                         action_flags |= MLX5_FLOW_ACTION_FLAG;
2486                         ++actions_n;
2487                         break;
2488                 case RTE_FLOW_ACTION_TYPE_MARK:
2489                         ret = mlx5_flow_validate_action_mark(actions,
2490                                                              action_flags,
2491                                                              attr, error);
2492                         if (ret < 0)
2493                                 return ret;
2494                         action_flags |= MLX5_FLOW_ACTION_MARK;
2495                         ++actions_n;
2496                         break;
2497                 case RTE_FLOW_ACTION_TYPE_DROP:
2498                         ret = mlx5_flow_validate_action_drop(action_flags,
2499                                                              attr, error);
2500                         if (ret < 0)
2501                                 return ret;
2502                         action_flags |= MLX5_FLOW_ACTION_DROP;
2503                         ++actions_n;
2504                         break;
2505                 case RTE_FLOW_ACTION_TYPE_QUEUE:
2506                         ret = mlx5_flow_validate_action_queue(actions,
2507                                                               action_flags, dev,
2508                                                               attr, error);
2509                         if (ret < 0)
2510                                 return ret;
2511                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
2512                         ++actions_n;
2513                         break;
2514                 case RTE_FLOW_ACTION_TYPE_RSS:
2515                         ret = mlx5_flow_validate_action_rss(actions,
2516                                                             action_flags, dev,
2517                                                             attr, item_flags,
2518                                                             error);
2519                         if (ret < 0)
2520                                 return ret;
2521                         action_flags |= MLX5_FLOW_ACTION_RSS;
2522                         ++actions_n;
2523                         break;
2524                 case RTE_FLOW_ACTION_TYPE_COUNT:
2525                         ret = flow_dv_validate_action_count(dev, error);
2526                         if (ret < 0)
2527                                 return ret;
2528                         action_flags |= MLX5_FLOW_ACTION_COUNT;
2529                         ++actions_n;
2530                         break;
2531                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
2532                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
2533                         ret = flow_dv_validate_action_l2_encap(action_flags,
2534                                                                actions, attr,
2535                                                                error);
2536                         if (ret < 0)
2537                                 return ret;
2538                         action_flags |= actions->type ==
2539                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
2540                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
2541                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
2542                         ++actions_n;
2543                         break;
2544                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
2545                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
2546                         ret = flow_dv_validate_action_l2_decap(action_flags,
2547                                                                attr, error);
2548                         if (ret < 0)
2549                                 return ret;
2550                         action_flags |= actions->type ==
2551                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
2552                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
2553                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
2554                         ++actions_n;
2555                         break;
2556                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
2557                         ret = flow_dv_validate_action_raw_encap(action_flags,
2558                                                                 actions, attr,
2559                                                                 error);
2560                         if (ret < 0)
2561                                 return ret;
2562                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
2563                         ++actions_n;
2564                         break;
2565                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
2566                         ret = flow_dv_validate_action_raw_decap(action_flags,
2567                                                                 actions, attr,
2568                                                                 error);
2569                         if (ret < 0)
2570                                 return ret;
2571                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
2572                         ++actions_n;
2573                         break;
2574                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
2575                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
2576                         ret = flow_dv_validate_action_modify_mac(action_flags,
2577                                                                  actions,
2578                                                                  item_flags,
2579                                                                  error);
2580                         if (ret < 0)
2581                                 return ret;
2582                         /* Count all modify-header actions as one action. */
2583                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
2584                                 ++actions_n;
2585                         action_flags |= actions->type ==
2586                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
2587                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
2588                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
2589                         break;
2590
2591                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
2592                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
2593                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
2594                                                                   actions,
2595                                                                   item_flags,
2596                                                                   error);
2597                         if (ret < 0)
2598                                 return ret;
2599                         /* Count all modify-header actions as one action. */
2600                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
2601                                 ++actions_n;
2602                         action_flags |= actions->type ==
2603                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
2604                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
2605                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
2606                         break;
2607                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
2608                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
2609                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
2610                                                                   actions,
2611                                                                   item_flags,
2612                                                                   error);
2613                         if (ret < 0)
2614                                 return ret;
2615                         /* Count all modify-header actions as one action. */
2616                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
2617                                 ++actions_n;
2618                         action_flags |= actions->type ==
2619                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
2620                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
2621                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
2622                         break;
2623                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
2624                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
2625                         ret = flow_dv_validate_action_modify_tp(action_flags,
2626                                                                 actions,
2627                                                                 item_flags,
2628                                                                 error);
2629                         if (ret < 0)
2630                                 return ret;
2631                         /* Count all modify-header actions as one action. */
2632                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
2633                                 ++actions_n;
2634                         action_flags |= actions->type ==
2635                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
2636                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
2637                                                 MLX5_FLOW_ACTION_SET_TP_DST;
2638                         break;
2639                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
2640                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
2641                         ret = flow_dv_validate_action_modify_ttl(action_flags,
2642                                                                  actions,
2643                                                                  item_flags,
2644                                                                  error);
2645                         if (ret < 0)
2646                                 return ret;
2647                         /* Count all modify-header actions as one action. */
2648                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
2649                                 ++actions_n;
2650                         action_flags |= actions->type ==
2651                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
2652                                                 MLX5_FLOW_ACTION_SET_TTL :
2653                                                 MLX5_FLOW_ACTION_DEC_TTL;
2654                         break;
2655                 case RTE_FLOW_ACTION_TYPE_JUMP:
2656                         ret = flow_dv_validate_action_jump(actions,
2657                                                            attr->group, error);
2658                         if (ret)
2659                                 return ret;
2660                         ++actions_n;
2661                         action_flags |= MLX5_FLOW_ACTION_JUMP;
2662                         break;
2663                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
2664                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
2665                         ret = flow_dv_validate_action_modify_tcp_seq
2666                                                                 (action_flags,
2667                                                                  actions,
2668                                                                  item_flags,
2669                                                                  error);
2670                         if (ret < 0)
2671                                 return ret;
2672                         /* Count all modify-header actions as one action. */
2673                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
2674                                 ++actions_n;
2675                         action_flags |= actions->type ==
2676                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
2677                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
2678                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
2679                         break;
2680                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
2681                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
2682                         ret = flow_dv_validate_action_modify_tcp_ack
2683                                                                 (action_flags,
2684                                                                  actions,
2685                                                                  item_flags,
2686                                                                  error);
2687                         if (ret < 0)
2688                                 return ret;
2689                         /* Count all modify-header actions as one action. */
2690                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
2691                                 ++actions_n;
2692                         action_flags |= actions->type ==
2693                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
2694                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
2695                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
2696                         break;
2697                 default:
2698                         return rte_flow_error_set(error, ENOTSUP,
2699                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2700                                                   actions,
2701                                                   "action not supported");
2702                 }
2703         }
2704         /* Eswitch has few restrictions on using items and actions */
2705         if (attr->transfer) {
2706                 if (action_flags & MLX5_FLOW_ACTION_FLAG)
2707                         return rte_flow_error_set(error, ENOTSUP,
2708                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2709                                                   NULL,
2710                                                   "unsupported action FLAG");
2711                 if (action_flags & MLX5_FLOW_ACTION_MARK)
2712                         return rte_flow_error_set(error, ENOTSUP,
2713                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2714                                                   NULL,
2715                                                   "unsupported action MARK");
2716                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
2717                         return rte_flow_error_set(error, ENOTSUP,
2718                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2719                                                   NULL,
2720                                                   "unsupported action QUEUE");
2721                 if (action_flags & MLX5_FLOW_ACTION_RSS)
2722                         return rte_flow_error_set(error, ENOTSUP,
2723                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2724                                                   NULL,
2725                                                   "unsupported action RSS");
2726                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
2727                         return rte_flow_error_set(error, EINVAL,
2728                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2729                                                   actions,
2730                                                   "no fate action is found");
2731         } else {
2732                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
2733                         return rte_flow_error_set(error, EINVAL,
2734                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2735                                                   actions,
2736                                                   "no fate action is found");
2737         }
2738         return 0;
2739 }
2740
2741 /**
2742  * Internal preparation function. Allocates the DV flow size,
2743  * this size is constant.
2744  *
2745  * @param[in] attr
2746  *   Pointer to the flow attributes.
2747  * @param[in] items
2748  *   Pointer to the list of items.
2749  * @param[in] actions
2750  *   Pointer to the list of actions.
2751  * @param[out] error
2752  *   Pointer to the error structure.
2753  *
2754  * @return
2755  *   Pointer to mlx5_flow object on success,
2756  *   otherwise NULL and rte_errno is set.
2757  */
2758 static struct mlx5_flow *
2759 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
2760                 const struct rte_flow_item items[] __rte_unused,
2761                 const struct rte_flow_action actions[] __rte_unused,
2762                 struct rte_flow_error *error)
2763 {
2764         uint32_t size = sizeof(struct mlx5_flow);
2765         struct mlx5_flow *flow;
2766
2767         flow = rte_calloc(__func__, 1, size, 0);
2768         if (!flow) {
2769                 rte_flow_error_set(error, ENOMEM,
2770                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2771                                    "not enough memory to create flow");
2772                 return NULL;
2773         }
2774         flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
2775         return flow;
2776 }
2777
2778 #ifndef NDEBUG
2779 /**
2780  * Sanity check for match mask and value. Similar to check_valid_spec() in
2781  * kernel driver. If unmasked bit is present in value, it returns failure.
2782  *
2783  * @param match_mask
2784  *   pointer to match mask buffer.
2785  * @param match_value
2786  *   pointer to match value buffer.
2787  *
2788  * @return
2789  *   0 if valid, -EINVAL otherwise.
2790  */
2791 static int
2792 flow_dv_check_valid_spec(void *match_mask, void *match_value)
2793 {
2794         uint8_t *m = match_mask;
2795         uint8_t *v = match_value;
2796         unsigned int i;
2797
2798         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
2799                 if (v[i] & ~m[i]) {
2800                         DRV_LOG(ERR,
2801                                 "match_value differs from match_criteria"
2802                                 " %p[%u] != %p[%u]",
2803                                 match_value, i, match_mask, i);
2804                         return -EINVAL;
2805                 }
2806         }
2807         return 0;
2808 }
2809 #endif
2810
2811 /**
2812  * Add Ethernet item to matcher and to the value.
2813  *
2814  * @param[in, out] matcher
2815  *   Flow matcher.
2816  * @param[in, out] key
2817  *   Flow matcher value.
2818  * @param[in] item
2819  *   Flow pattern to translate.
2820  * @param[in] inner
2821  *   Item is inner pattern.
2822  */
2823 static void
2824 flow_dv_translate_item_eth(void *matcher, void *key,
2825                            const struct rte_flow_item *item, int inner)
2826 {
2827         const struct rte_flow_item_eth *eth_m = item->mask;
2828         const struct rte_flow_item_eth *eth_v = item->spec;
2829         const struct rte_flow_item_eth nic_mask = {
2830                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
2831                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
2832                 .type = RTE_BE16(0xffff),
2833         };
2834         void *headers_m;
2835         void *headers_v;
2836         char *l24_v;
2837         unsigned int i;
2838
2839         if (!eth_v)
2840                 return;
2841         if (!eth_m)
2842                 eth_m = &nic_mask;
2843         if (inner) {
2844                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
2845                                          inner_headers);
2846                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
2847         } else {
2848                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
2849                                          outer_headers);
2850                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
2851         }
2852         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
2853                &eth_m->dst, sizeof(eth_m->dst));
2854         /* The value must be in the range of the mask. */
2855         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
2856         for (i = 0; i < sizeof(eth_m->dst); ++i)
2857                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
2858         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
2859                &eth_m->src, sizeof(eth_m->src));
2860         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
2861         /* The value must be in the range of the mask. */
2862         for (i = 0; i < sizeof(eth_m->dst); ++i)
2863                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
2864         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
2865                  rte_be_to_cpu_16(eth_m->type));
2866         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
2867         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
2868 }
2869
2870 /**
2871  * Add VLAN item to matcher and to the value.
2872  *
2873  * @param[in, out] matcher
2874  *   Flow matcher.
2875  * @param[in, out] key
2876  *   Flow matcher value.
2877  * @param[in] item
2878  *   Flow pattern to translate.
2879  * @param[in] inner
2880  *   Item is inner pattern.
2881  */
2882 static void
2883 flow_dv_translate_item_vlan(void *matcher, void *key,
2884                             const struct rte_flow_item *item,
2885                             int inner)
2886 {
2887         const struct rte_flow_item_vlan *vlan_m = item->mask;
2888         const struct rte_flow_item_vlan *vlan_v = item->spec;
2889         const struct rte_flow_item_vlan nic_mask = {
2890                 .tci = RTE_BE16(0x0fff),
2891                 .inner_type = RTE_BE16(0xffff),
2892         };
2893         void *headers_m;
2894         void *headers_v;
2895         uint16_t tci_m;
2896         uint16_t tci_v;
2897
2898         if (!vlan_v)
2899                 return;
2900         if (!vlan_m)
2901                 vlan_m = &nic_mask;
2902         if (inner) {
2903                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
2904                                          inner_headers);
2905                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
2906         } else {
2907                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
2908                                          outer_headers);
2909                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
2910         }
2911         tci_m = rte_be_to_cpu_16(vlan_m->tci);
2912         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
2913         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
2914         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
2915         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
2916         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
2917         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
2918         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
2919         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
2920         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
2921 }
2922
2923 /**
2924  * Add IPV4 item to matcher and to the value.
2925  *
2926  * @param[in, out] matcher
2927  *   Flow matcher.
2928  * @param[in, out] key
2929  *   Flow matcher value.
2930  * @param[in] item
2931  *   Flow pattern to translate.
2932  * @param[in] inner
2933  *   Item is inner pattern.
2934  * @param[in] group
2935  *   The group to insert the rule.
2936  */
2937 static void
2938 flow_dv_translate_item_ipv4(void *matcher, void *key,
2939                             const struct rte_flow_item *item,
2940                             int inner, uint32_t group)
2941 {
2942         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
2943         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
2944         const struct rte_flow_item_ipv4 nic_mask = {
2945                 .hdr = {
2946                         .src_addr = RTE_BE32(0xffffffff),
2947                         .dst_addr = RTE_BE32(0xffffffff),
2948                         .type_of_service = 0xff,
2949                         .next_proto_id = 0xff,
2950                 },
2951         };
2952         void *headers_m;
2953         void *headers_v;
2954         char *l24_m;
2955         char *l24_v;
2956         uint8_t tos;
2957
2958         if (inner) {
2959                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
2960                                          inner_headers);
2961                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
2962         } else {
2963                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
2964                                          outer_headers);
2965                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
2966         }
2967         if (group == 0)
2968                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
2969         else
2970                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
2971         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
2972         if (!ipv4_v)
2973                 return;
2974         if (!ipv4_m)
2975                 ipv4_m = &nic_mask;
2976         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
2977                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
2978         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
2979                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
2980         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
2981         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
2982         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
2983                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
2984         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
2985                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
2986         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
2987         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
2988         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
2989         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
2990                  ipv4_m->hdr.type_of_service);
2991         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
2992         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
2993                  ipv4_m->hdr.type_of_service >> 2);
2994         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
2995         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
2996                  ipv4_m->hdr.next_proto_id);
2997         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
2998                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
2999 }
3000
3001 /**
3002  * Add IPV6 item to matcher and to the value.
3003  *
3004  * @param[in, out] matcher
3005  *   Flow matcher.
3006  * @param[in, out] key
3007  *   Flow matcher value.
3008  * @param[in] item
3009  *   Flow pattern to translate.
3010  * @param[in] inner
3011  *   Item is inner pattern.
3012  * @param[in] group
3013  *   The group to insert the rule.
3014  */
3015 static void
3016 flow_dv_translate_item_ipv6(void *matcher, void *key,
3017                             const struct rte_flow_item *item,
3018                             int inner, uint32_t group)
3019 {
3020         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
3021         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
3022         const struct rte_flow_item_ipv6 nic_mask = {
3023                 .hdr = {
3024                         .src_addr =
3025                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
3026                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
3027                         .dst_addr =
3028                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
3029                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
3030                         .vtc_flow = RTE_BE32(0xffffffff),
3031                         .proto = 0xff,
3032                         .hop_limits = 0xff,
3033                 },
3034         };
3035         void *headers_m;
3036         void *headers_v;
3037         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
3038         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
3039         char *l24_m;
3040         char *l24_v;
3041         uint32_t vtc_m;
3042         uint32_t vtc_v;
3043         int i;
3044         int size;
3045
3046         if (inner) {
3047                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3048                                          inner_headers);
3049                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3050         } else {
3051                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3052                                          outer_headers);
3053                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3054         }
3055         if (group == 0)
3056                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
3057         else
3058                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
3059         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
3060         if (!ipv6_v)
3061                 return;
3062         if (!ipv6_m)
3063                 ipv6_m = &nic_mask;
3064         size = sizeof(ipv6_m->hdr.dst_addr);
3065         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
3066                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
3067         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
3068                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
3069         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
3070         for (i = 0; i < size; ++i)
3071                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
3072         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
3073                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
3074         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
3075                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
3076         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
3077         for (i = 0; i < size; ++i)
3078                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
3079         /* TOS. */
3080         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
3081         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
3082         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
3083         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
3084         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
3085         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
3086         /* Label. */
3087         if (inner) {
3088                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
3089                          vtc_m);
3090                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
3091                          vtc_v);
3092         } else {
3093                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
3094                          vtc_m);
3095                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
3096                          vtc_v);
3097         }
3098         /* Protocol. */
3099         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
3100                  ipv6_m->hdr.proto);
3101         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
3102                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
3103 }
3104
3105 /**
3106  * Add TCP item to matcher and to the value.
3107  *
3108  * @param[in, out] matcher
3109  *   Flow matcher.
3110  * @param[in, out] key
3111  *   Flow matcher value.
3112  * @param[in] item
3113  *   Flow pattern to translate.
3114  * @param[in] inner
3115  *   Item is inner pattern.
3116  */
3117 static void
3118 flow_dv_translate_item_tcp(void *matcher, void *key,
3119                            const struct rte_flow_item *item,
3120                            int inner)
3121 {
3122         const struct rte_flow_item_tcp *tcp_m = item->mask;
3123         const struct rte_flow_item_tcp *tcp_v = item->spec;
3124         void *headers_m;
3125         void *headers_v;
3126
3127         if (inner) {
3128                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3129                                          inner_headers);
3130                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3131         } else {
3132                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3133                                          outer_headers);
3134                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3135         }
3136         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
3137         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
3138         if (!tcp_v)
3139                 return;
3140         if (!tcp_m)
3141                 tcp_m = &rte_flow_item_tcp_mask;
3142         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
3143                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
3144         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
3145                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
3146         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
3147                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
3148         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
3149                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
3150         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
3151                  tcp_m->hdr.tcp_flags);
3152         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
3153                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
3154 }
3155
3156 /**
3157  * Add UDP item to matcher and to the value.
3158  *
3159  * @param[in, out] matcher
3160  *   Flow matcher.
3161  * @param[in, out] key
3162  *   Flow matcher value.
3163  * @param[in] item
3164  *   Flow pattern to translate.
3165  * @param[in] inner
3166  *   Item is inner pattern.
3167  */
3168 static void
3169 flow_dv_translate_item_udp(void *matcher, void *key,
3170                            const struct rte_flow_item *item,
3171                            int inner)
3172 {
3173         const struct rte_flow_item_udp *udp_m = item->mask;
3174         const struct rte_flow_item_udp *udp_v = item->spec;
3175         void *headers_m;
3176         void *headers_v;
3177
3178         if (inner) {
3179                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3180                                          inner_headers);
3181                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3182         } else {
3183                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3184                                          outer_headers);
3185                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3186         }
3187         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
3188         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
3189         if (!udp_v)
3190                 return;
3191         if (!udp_m)
3192                 udp_m = &rte_flow_item_udp_mask;
3193         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
3194                  rte_be_to_cpu_16(udp_m->hdr.src_port));
3195         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
3196                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
3197         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
3198                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
3199         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
3200                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
3201 }
3202
3203 /**
3204  * Add GRE item to matcher and to the value.
3205  *
3206  * @param[in, out] matcher
3207  *   Flow matcher.
3208  * @param[in, out] key
3209  *   Flow matcher value.
3210  * @param[in] item
3211  *   Flow pattern to translate.
3212  * @param[in] inner
3213  *   Item is inner pattern.
3214  */
3215 static void
3216 flow_dv_translate_item_gre(void *matcher, void *key,
3217                            const struct rte_flow_item *item,
3218                            int inner)
3219 {
3220         const struct rte_flow_item_gre *gre_m = item->mask;
3221         const struct rte_flow_item_gre *gre_v = item->spec;
3222         void *headers_m;
3223         void *headers_v;
3224         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
3225         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
3226
3227         if (inner) {
3228                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3229                                          inner_headers);
3230                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3231         } else {
3232                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3233                                          outer_headers);
3234                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3235         }
3236         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
3237         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
3238         if (!gre_v)
3239                 return;
3240         if (!gre_m)
3241                 gre_m = &rte_flow_item_gre_mask;
3242         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
3243                  rte_be_to_cpu_16(gre_m->protocol));
3244         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
3245                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
3246 }
3247
3248 /**
3249  * Add NVGRE item to matcher and to the value.
3250  *
3251  * @param[in, out] matcher
3252  *   Flow matcher.
3253  * @param[in, out] key
3254  *   Flow matcher value.
3255  * @param[in] item
3256  *   Flow pattern to translate.
3257  * @param[in] inner
3258  *   Item is inner pattern.
3259  */
3260 static void
3261 flow_dv_translate_item_nvgre(void *matcher, void *key,
3262                              const struct rte_flow_item *item,
3263                              int inner)
3264 {
3265         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
3266         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
3267         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
3268         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
3269         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
3270         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
3271         char *gre_key_m;
3272         char *gre_key_v;
3273         int size;
3274         int i;
3275
3276         flow_dv_translate_item_gre(matcher, key, item, inner);
3277         if (!nvgre_v)
3278                 return;
3279         if (!nvgre_m)
3280                 nvgre_m = &rte_flow_item_nvgre_mask;
3281         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
3282         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
3283         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
3284         memcpy(gre_key_m, tni_flow_id_m, size);
3285         for (i = 0; i < size; ++i)
3286                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
3287 }
3288
3289 /**
3290  * Add VXLAN item to matcher and to the value.
3291  *
3292  * @param[in, out] matcher
3293  *   Flow matcher.
3294  * @param[in, out] key
3295  *   Flow matcher value.
3296  * @param[in] item
3297  *   Flow pattern to translate.
3298  * @param[in] inner
3299  *   Item is inner pattern.
3300  */
3301 static void
3302 flow_dv_translate_item_vxlan(void *matcher, void *key,
3303                              const struct rte_flow_item *item,
3304                              int inner)
3305 {
3306         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
3307         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
3308         void *headers_m;
3309         void *headers_v;
3310         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
3311         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
3312         char *vni_m;
3313         char *vni_v;
3314         uint16_t dport;
3315         int size;
3316         int i;
3317
3318         if (inner) {
3319                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3320                                          inner_headers);
3321                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3322         } else {
3323                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3324                                          outer_headers);
3325                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3326         }
3327         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
3328                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
3329         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
3330                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
3331                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
3332         }
3333         if (!vxlan_v)
3334                 return;
3335         if (!vxlan_m)
3336                 vxlan_m = &rte_flow_item_vxlan_mask;
3337         size = sizeof(vxlan_m->vni);
3338         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
3339         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
3340         memcpy(vni_m, vxlan_m->vni, size);
3341         for (i = 0; i < size; ++i)
3342                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
3343 }
3344
3345 /**
3346  * Add MPLS item to matcher and to the value.
3347  *
3348  * @param[in, out] matcher
3349  *   Flow matcher.
3350  * @param[in, out] key
3351  *   Flow matcher value.
3352  * @param[in] item
3353  *   Flow pattern to translate.
3354  * @param[in] prev_layer
3355  *   The protocol layer indicated in previous item.
3356  * @param[in] inner
3357  *   Item is inner pattern.
3358  */
3359 static void
3360 flow_dv_translate_item_mpls(void *matcher, void *key,
3361                             const struct rte_flow_item *item,
3362                             uint64_t prev_layer,
3363                             int inner)
3364 {
3365         const uint32_t *in_mpls_m = item->mask;
3366         const uint32_t *in_mpls_v = item->spec;
3367         uint32_t *out_mpls_m = 0;
3368         uint32_t *out_mpls_v = 0;
3369         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
3370         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
3371         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
3372                                      misc_parameters_2);
3373         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
3374         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
3375         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3376
3377         switch (prev_layer) {
3378         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
3379                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
3380                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
3381                          MLX5_UDP_PORT_MPLS);
3382                 break;
3383         case MLX5_FLOW_LAYER_GRE:
3384                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
3385                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
3386                          RTE_ETHER_TYPE_MPLS);
3387                 break;
3388         default:
3389                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
3390                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
3391                          IPPROTO_MPLS);
3392                 break;
3393         }
3394         if (!in_mpls_v)
3395                 return;
3396         if (!in_mpls_m)
3397                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
3398         switch (prev_layer) {
3399         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
3400                 out_mpls_m =
3401                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
3402                                                  outer_first_mpls_over_udp);
3403                 out_mpls_v =
3404                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
3405                                                  outer_first_mpls_over_udp);
3406                 break;
3407         case MLX5_FLOW_LAYER_GRE:
3408                 out_mpls_m =
3409                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
3410                                                  outer_first_mpls_over_gre);
3411                 out_mpls_v =
3412                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
3413                                                  outer_first_mpls_over_gre);
3414                 break;
3415         default:
3416                 /* Inner MPLS not over GRE is not supported. */
3417                 if (!inner) {
3418                         out_mpls_m =
3419                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
3420                                                          misc2_m,
3421                                                          outer_first_mpls);
3422                         out_mpls_v =
3423                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
3424                                                          misc2_v,
3425                                                          outer_first_mpls);
3426                 }
3427                 break;
3428         }
3429         if (out_mpls_m && out_mpls_v) {
3430                 *out_mpls_m = *in_mpls_m;
3431                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
3432         }
3433 }
3434
3435 /**
3436  * Add META item to matcher
3437  *
3438  * @param[in, out] matcher
3439  *   Flow matcher.
3440  * @param[in, out] key
3441  *   Flow matcher value.
3442  * @param[in] item
3443  *   Flow pattern to translate.
3444  * @param[in] inner
3445  *   Item is inner pattern.
3446  */
3447 static void
3448 flow_dv_translate_item_meta(void *matcher, void *key,
3449                             const struct rte_flow_item *item)
3450 {
3451         const struct rte_flow_item_meta *meta_m;
3452         const struct rte_flow_item_meta *meta_v;
3453         void *misc2_m =
3454                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
3455         void *misc2_v =
3456                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
3457
3458         meta_m = (const void *)item->mask;
3459         if (!meta_m)
3460                 meta_m = &rte_flow_item_meta_mask;
3461         meta_v = (const void *)item->spec;
3462         if (meta_v) {
3463                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a,
3464                          rte_be_to_cpu_32(meta_m->data));
3465                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a,
3466                          rte_be_to_cpu_32(meta_v->data & meta_m->data));
3467         }
3468 }
3469
3470 /**
3471  * Add source vport match to the specified matcher.
3472  *
3473  * @param[in, out] matcher
3474  *   Flow matcher.
3475  * @param[in, out] key
3476  *   Flow matcher value.
3477  * @param[in] port
3478  *   Source vport value to match
3479  * @param[in] mask
3480  *   Mask
3481  */
3482 static void
3483 flow_dv_translate_item_source_vport(void *matcher, void *key,
3484                                     int16_t port, uint16_t mask)
3485 {
3486         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
3487         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
3488
3489         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
3490         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
3491 }
3492
3493 /**
3494  * Translate port-id item to eswitch match on  port-id.
3495  *
3496  * @param[in] dev
3497  *   The devich to configure through.
3498  * @param[in, out] matcher
3499  *   Flow matcher.
3500  * @param[in, out] key
3501  *   Flow matcher value.
3502  * @param[in] item
3503  *   Flow pattern to translate.
3504  *
3505  * @return
3506  *   0 on success, a negative errno value otherwise.
3507  */
3508 static int
3509 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
3510                                void *key, const struct rte_flow_item *item)
3511 {
3512         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
3513         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
3514         uint16_t mask, val, id;
3515         int ret;
3516
3517         mask = pid_m ? pid_m->id : 0xffff;
3518         id = pid_v ? pid_v->id : dev->data->port_id;
3519         ret = mlx5_port_to_eswitch_info(id, NULL, &val);
3520         if (ret)
3521                 return ret;
3522         flow_dv_translate_item_source_vport(matcher, key, val, mask);
3523         return 0;
3524 }
3525
3526 /**
3527  * Add ICMP6 item to matcher and to the value.
3528  *
3529  * @param[in, out] matcher
3530  *   Flow matcher.
3531  * @param[in, out] key
3532  *   Flow matcher value.
3533  * @param[in] item
3534  *   Flow pattern to translate.
3535  * @param[in] inner
3536  *   Item is inner pattern.
3537  */
3538 static void
3539 flow_dv_translate_item_icmp6(void *matcher, void *key,
3540                               const struct rte_flow_item *item,
3541                               int inner)
3542 {
3543         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
3544         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
3545         void *headers_m;
3546         void *headers_v;
3547         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
3548                                      misc_parameters_3);
3549         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
3550         if (inner) {
3551                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3552                                          inner_headers);
3553                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3554         } else {
3555                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3556                                          outer_headers);
3557                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3558         }
3559         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
3560         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
3561         if (!icmp6_v)
3562                 return;
3563         if (!icmp6_m)
3564                 icmp6_m = &rte_flow_item_icmp6_mask;
3565         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
3566         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
3567                  icmp6_v->type & icmp6_m->type);
3568         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
3569         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
3570                  icmp6_v->code & icmp6_m->code);
3571 }
3572
3573 /**
3574  * Add ICMP item to matcher and to the value.
3575  *
3576  * @param[in, out] matcher
3577  *   Flow matcher.
3578  * @param[in, out] key
3579  *   Flow matcher value.
3580  * @param[in] item
3581  *   Flow pattern to translate.
3582  * @param[in] inner
3583  *   Item is inner pattern.
3584  */
3585 static void
3586 flow_dv_translate_item_icmp(void *matcher, void *key,
3587                             const struct rte_flow_item *item,
3588                             int inner)
3589 {
3590         const struct rte_flow_item_icmp *icmp_m = item->mask;
3591         const struct rte_flow_item_icmp *icmp_v = item->spec;
3592         void *headers_m;
3593         void *headers_v;
3594         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
3595                                      misc_parameters_3);
3596         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
3597         if (inner) {
3598                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3599                                          inner_headers);
3600                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3601         } else {
3602                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3603                                          outer_headers);
3604                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3605         }
3606         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
3607         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
3608         if (!icmp_v)
3609                 return;
3610         if (!icmp_m)
3611                 icmp_m = &rte_flow_item_icmp_mask;
3612         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
3613                  icmp_m->hdr.icmp_type);
3614         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
3615                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
3616         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
3617                  icmp_m->hdr.icmp_code);
3618         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
3619                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
3620 }
3621
3622 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
3623
3624 #define HEADER_IS_ZERO(match_criteria, headers)                              \
3625         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
3626                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
3627
3628 /**
3629  * Calculate flow matcher enable bitmap.
3630  *
3631  * @param match_criteria
3632  *   Pointer to flow matcher criteria.
3633  *
3634  * @return
3635  *   Bitmap of enabled fields.
3636  */
3637 static uint8_t
3638 flow_dv_matcher_enable(uint32_t *match_criteria)
3639 {
3640         uint8_t match_criteria_enable;
3641
3642         match_criteria_enable =
3643                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
3644                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
3645         match_criteria_enable |=
3646                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
3647                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
3648         match_criteria_enable |=
3649                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
3650                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
3651         match_criteria_enable |=
3652                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
3653                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
3654 #ifdef HAVE_MLX5DV_DR
3655         match_criteria_enable |=
3656                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
3657                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
3658 #endif
3659         return match_criteria_enable;
3660 }
3661
3662
3663 /**
3664  * Get a flow table.
3665  *
3666  * @param dev[in, out]
3667  *   Pointer to rte_eth_dev structure.
3668  * @param[in] table_id
3669  *   Table id to use.
3670  * @param[in] egress
3671  *   Direction of the table.
3672  * @param[in] transfer
3673  *   E-Switch or NIC flow.
3674  * @param[out] error
3675  *   pointer to error structure.
3676  *
3677  * @return
3678  *   Returns tables resource based on the index, NULL in case of failed.
3679  */
3680 static struct mlx5_flow_tbl_resource *
3681 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
3682                          uint32_t table_id, uint8_t egress,
3683                          uint8_t transfer,
3684                          struct rte_flow_error *error)
3685 {
3686         struct mlx5_priv *priv = dev->data->dev_private;
3687         struct mlx5_ibv_shared *sh = priv->sh;
3688         struct mlx5_flow_tbl_resource *tbl;
3689
3690 #ifdef HAVE_MLX5DV_DR
3691         if (transfer) {
3692                 tbl = &sh->fdb_tbl[table_id];
3693                 if (!tbl->obj)
3694                         tbl->obj = mlx5_glue->dr_create_flow_tbl
3695                                 (sh->fdb_domain, table_id);
3696         } else if (egress) {
3697                 tbl = &sh->tx_tbl[table_id];
3698                 if (!tbl->obj)
3699                         tbl->obj = mlx5_glue->dr_create_flow_tbl
3700                                 (sh->tx_domain, table_id);
3701         } else {
3702                 tbl = &sh->rx_tbl[table_id];
3703                 if (!tbl->obj)
3704                         tbl->obj = mlx5_glue->dr_create_flow_tbl
3705                                 (sh->rx_domain, table_id);
3706         }
3707         if (!tbl->obj) {
3708                 rte_flow_error_set(error, ENOMEM,
3709                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3710                                    NULL, "cannot create table");
3711                 return NULL;
3712         }
3713         rte_atomic32_inc(&tbl->refcnt);
3714         return tbl;
3715 #else
3716         (void)error;
3717         (void)tbl;
3718         if (transfer)
3719                 return &sh->fdb_tbl[table_id];
3720         else if (egress)
3721                 return &sh->tx_tbl[table_id];
3722         else
3723                 return &sh->rx_tbl[table_id];
3724 #endif
3725 }
3726
3727 /**
3728  * Release a flow table.
3729  *
3730  * @param[in] tbl
3731  *   Table resource to be released.
3732  *
3733  * @return
3734  *   Returns 0 if table was released, else return 1;
3735  */
3736 static int
3737 flow_dv_tbl_resource_release(struct mlx5_flow_tbl_resource *tbl)
3738 {
3739         if (!tbl)
3740                 return 0;
3741         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
3742                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
3743                 tbl->obj = NULL;
3744                 return 0;
3745         }
3746         return 1;
3747 }
3748
3749 /**
3750  * Register the flow matcher.
3751  *
3752  * @param dev[in, out]
3753  *   Pointer to rte_eth_dev structure.
3754  * @param[in, out] matcher
3755  *   Pointer to flow matcher.
3756  * @parm[in, out] dev_flow
3757  *   Pointer to the dev_flow.
3758  * @param[out] error
3759  *   pointer to error structure.
3760  *
3761  * @return
3762  *   0 on success otherwise -errno and errno is set.
3763  */
3764 static int
3765 flow_dv_matcher_register(struct rte_eth_dev *dev,
3766                          struct mlx5_flow_dv_matcher *matcher,
3767                          struct mlx5_flow *dev_flow,
3768                          struct rte_flow_error *error)
3769 {
3770         struct mlx5_priv *priv = dev->data->dev_private;
3771         struct mlx5_ibv_shared *sh = priv->sh;
3772         struct mlx5_flow_dv_matcher *cache_matcher;
3773         struct mlx5dv_flow_matcher_attr dv_attr = {
3774                 .type = IBV_FLOW_ATTR_NORMAL,
3775                 .match_mask = (void *)&matcher->mask,
3776         };
3777         struct mlx5_flow_tbl_resource *tbl = NULL;
3778
3779         /* Lookup from cache. */
3780         LIST_FOREACH(cache_matcher, &sh->matchers, next) {
3781                 if (matcher->crc == cache_matcher->crc &&
3782                     matcher->priority == cache_matcher->priority &&
3783                     matcher->egress == cache_matcher->egress &&
3784                     matcher->group == cache_matcher->group &&
3785                     matcher->transfer == cache_matcher->transfer &&
3786                     !memcmp((const void *)matcher->mask.buf,
3787                             (const void *)cache_matcher->mask.buf,
3788                             cache_matcher->mask.size)) {
3789                         DRV_LOG(DEBUG,
3790                                 "priority %hd use %s matcher %p: refcnt %d++",
3791                                 cache_matcher->priority,
3792                                 cache_matcher->egress ? "tx" : "rx",
3793                                 (void *)cache_matcher,
3794                                 rte_atomic32_read(&cache_matcher->refcnt));
3795                         rte_atomic32_inc(&cache_matcher->refcnt);
3796                         dev_flow->dv.matcher = cache_matcher;
3797                         return 0;
3798                 }
3799         }
3800         /* Register new matcher. */
3801         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
3802         if (!cache_matcher)
3803                 return rte_flow_error_set(error, ENOMEM,
3804                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3805                                           "cannot allocate matcher memory");
3806         tbl = flow_dv_tbl_resource_get(dev, matcher->group * MLX5_GROUP_FACTOR,
3807                                        matcher->egress, matcher->transfer,
3808                                        error);
3809         if (!tbl) {
3810                 rte_free(cache_matcher);
3811                 return rte_flow_error_set(error, ENOMEM,
3812                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3813                                           NULL, "cannot create table");
3814         }
3815         *cache_matcher = *matcher;
3816         dv_attr.match_criteria_enable =
3817                 flow_dv_matcher_enable(cache_matcher->mask.buf);
3818         dv_attr.priority = matcher->priority;
3819         if (matcher->egress)
3820                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
3821         cache_matcher->matcher_object =
3822                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
3823         if (!cache_matcher->matcher_object) {
3824                 rte_free(cache_matcher);
3825 #ifdef HAVE_MLX5DV_DR
3826                 flow_dv_tbl_resource_release(tbl);
3827 #endif
3828                 return rte_flow_error_set(error, ENOMEM,
3829                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3830                                           NULL, "cannot create matcher");
3831         }
3832         rte_atomic32_inc(&cache_matcher->refcnt);
3833         LIST_INSERT_HEAD(&sh->matchers, cache_matcher, next);
3834         dev_flow->dv.matcher = cache_matcher;
3835         DRV_LOG(DEBUG, "priority %hd new %s matcher %p: refcnt %d",
3836                 cache_matcher->priority,
3837                 cache_matcher->egress ? "tx" : "rx", (void *)cache_matcher,
3838                 rte_atomic32_read(&cache_matcher->refcnt));
3839         rte_atomic32_inc(&tbl->refcnt);
3840         return 0;
3841 }
3842
3843 /**
3844  * Find existing tag resource or create and register a new one.
3845  *
3846  * @param dev[in, out]
3847  *   Pointer to rte_eth_dev structure.
3848  * @param[in, out] resource
3849  *   Pointer to tag resource.
3850  * @parm[in, out] dev_flow
3851  *   Pointer to the dev_flow.
3852  * @param[out] error
3853  *   pointer to error structure.
3854  *
3855  * @return
3856  *   0 on success otherwise -errno and errno is set.
3857  */
3858 static int
3859 flow_dv_tag_resource_register
3860                         (struct rte_eth_dev *dev,
3861                          struct mlx5_flow_dv_tag_resource *resource,
3862                          struct mlx5_flow *dev_flow,
3863                          struct rte_flow_error *error)
3864 {
3865         struct mlx5_priv *priv = dev->data->dev_private;
3866         struct mlx5_ibv_shared *sh = priv->sh;
3867         struct mlx5_flow_dv_tag_resource *cache_resource;
3868
3869         /* Lookup a matching resource from cache. */
3870         LIST_FOREACH(cache_resource, &sh->tags, next) {
3871                 if (resource->tag == cache_resource->tag) {
3872                         DRV_LOG(DEBUG, "tag resource %p: refcnt %d++",
3873                                 (void *)cache_resource,
3874                                 rte_atomic32_read(&cache_resource->refcnt));
3875                         rte_atomic32_inc(&cache_resource->refcnt);
3876                         dev_flow->flow->tag_resource = cache_resource;
3877                         return 0;
3878                 }
3879         }
3880         /* Register new  resource. */
3881         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
3882         if (!cache_resource)
3883                 return rte_flow_error_set(error, ENOMEM,
3884                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3885                                           "cannot allocate resource memory");
3886         *cache_resource = *resource;
3887         cache_resource->action = mlx5_glue->dv_create_flow_action_tag
3888                 (resource->tag);
3889         if (!cache_resource->action) {
3890                 rte_free(cache_resource);
3891                 return rte_flow_error_set(error, ENOMEM,
3892                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3893                                           NULL, "cannot create action");
3894         }
3895         rte_atomic32_init(&cache_resource->refcnt);
3896         rte_atomic32_inc(&cache_resource->refcnt);
3897         LIST_INSERT_HEAD(&sh->tags, cache_resource, next);
3898         dev_flow->flow->tag_resource = cache_resource;
3899         DRV_LOG(DEBUG, "new tag resource %p: refcnt %d++",
3900                 (void *)cache_resource,
3901                 rte_atomic32_read(&cache_resource->refcnt));
3902         return 0;
3903 }
3904
3905 /**
3906  * Release the tag.
3907  *
3908  * @param dev
3909  *   Pointer to Ethernet device.
3910  * @param flow
3911  *   Pointer to mlx5_flow.
3912  *
3913  * @return
3914  *   1 while a reference on it exists, 0 when freed.
3915  */
3916 static int
3917 flow_dv_tag_release(struct rte_eth_dev *dev,
3918                     struct mlx5_flow_dv_tag_resource *tag)
3919 {
3920         assert(tag);
3921         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
3922                 dev->data->port_id, (void *)tag,
3923                 rte_atomic32_read(&tag->refcnt));
3924         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
3925                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
3926                 LIST_REMOVE(tag, next);
3927                 DRV_LOG(DEBUG, "port %u tag %p: removed",
3928                         dev->data->port_id, (void *)tag);
3929                 rte_free(tag);
3930                 return 0;
3931         }
3932         return 1;
3933 }
3934
3935 /**
3936  * Translate port ID action to vport.
3937  *
3938  * @param[in] dev
3939  *   Pointer to rte_eth_dev structure.
3940  * @param[in] action
3941  *   Pointer to the port ID action.
3942  * @param[out] dst_port_id
3943  *   The target port ID.
3944  * @param[out] error
3945  *   Pointer to the error structure.
3946  *
3947  * @return
3948  *   0 on success, a negative errno value otherwise and rte_errno is set.
3949  */
3950 static int
3951 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
3952                                  const struct rte_flow_action *action,
3953                                  uint32_t *dst_port_id,
3954                                  struct rte_flow_error *error)
3955 {
3956         uint32_t port;
3957         uint16_t port_id;
3958         int ret;
3959         const struct rte_flow_action_port_id *conf =
3960                         (const struct rte_flow_action_port_id *)action->conf;
3961
3962         port = conf->original ? dev->data->port_id : conf->id;
3963         ret = mlx5_port_to_eswitch_info(port, NULL, &port_id);
3964         if (ret)
3965                 return rte_flow_error_set(error, -ret,
3966                                           RTE_FLOW_ERROR_TYPE_ACTION,
3967                                           NULL,
3968                                           "No eswitch info was found for port");
3969         *dst_port_id = port_id;
3970         return 0;
3971 }
3972
3973 /**
3974  * Fill the flow with DV spec.
3975  *
3976  * @param[in] dev
3977  *   Pointer to rte_eth_dev structure.
3978  * @param[in, out] dev_flow
3979  *   Pointer to the sub flow.
3980  * @param[in] attr
3981  *   Pointer to the flow attributes.
3982  * @param[in] items
3983  *   Pointer to the list of items.
3984  * @param[in] actions
3985  *   Pointer to the list of actions.
3986  * @param[out] error
3987  *   Pointer to the error structure.
3988  *
3989  * @return
3990  *   0 on success, a negative errno value otherwise and rte_errno is set.
3991  */
3992 static int
3993 flow_dv_translate(struct rte_eth_dev *dev,
3994                   struct mlx5_flow *dev_flow,
3995                   const struct rte_flow_attr *attr,
3996                   const struct rte_flow_item items[],
3997                   const struct rte_flow_action actions[],
3998                   struct rte_flow_error *error)
3999 {
4000         struct mlx5_priv *priv = dev->data->dev_private;
4001         struct rte_flow *flow = dev_flow->flow;
4002         uint64_t item_flags = 0;
4003         uint64_t last_item = 0;
4004         uint64_t action_flags = 0;
4005         uint64_t priority = attr->priority;
4006         struct mlx5_flow_dv_matcher matcher = {
4007                 .mask = {
4008                         .size = sizeof(matcher.mask.buf),
4009                 },
4010         };
4011         int actions_n = 0;
4012         bool actions_end = false;
4013         struct mlx5_flow_dv_modify_hdr_resource res = {
4014                 .ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4015                                           MLX5DV_FLOW_TABLE_TYPE_NIC_RX
4016         };
4017         union flow_dv_attr flow_attr = { .attr = 0 };
4018         struct mlx5_flow_dv_tag_resource tag_resource;
4019         uint32_t modify_action_position = UINT32_MAX;
4020         void *match_mask = matcher.mask.buf;
4021         void *match_value = dev_flow->dv.value.buf;
4022
4023         flow->group = attr->group;
4024         if (attr->transfer)
4025                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4026         if (priority == MLX5_FLOW_PRIO_RSVD)
4027                 priority = priv->config.flow_prio - 1;
4028         for (; !actions_end ; actions++) {
4029                 const struct rte_flow_action_queue *queue;
4030                 const struct rte_flow_action_rss *rss;
4031                 const struct rte_flow_action *action = actions;
4032                 const struct rte_flow_action_count *count = action->conf;
4033                 const uint8_t *rss_key;
4034                 const struct rte_flow_action_jump *jump_data;
4035                 struct mlx5_flow_dv_jump_tbl_resource jump_tbl_resource;
4036                 struct mlx5_flow_tbl_resource *tbl;
4037                 uint32_t port_id = 0;
4038                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
4039
4040                 switch (actions->type) {
4041                 case RTE_FLOW_ACTION_TYPE_VOID:
4042                         break;
4043                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4044                         if (flow_dv_translate_action_port_id(dev, action,
4045                                                              &port_id, error))
4046                                 return -rte_errno;
4047                         port_id_resource.port_id = port_id;
4048                         if (flow_dv_port_id_action_resource_register
4049                             (dev, &port_id_resource, dev_flow, error))
4050                                 return -rte_errno;
4051                         dev_flow->dv.actions[actions_n++] =
4052                                 dev_flow->dv.port_id_action->action;
4053                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4054                         break;
4055                 case RTE_FLOW_ACTION_TYPE_FLAG:
4056                         tag_resource.tag =
4057                                 mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
4058                         if (!flow->tag_resource)
4059                                 if (flow_dv_tag_resource_register
4060                                     (dev, &tag_resource, dev_flow, error))
4061                                         return errno;
4062                         dev_flow->dv.actions[actions_n++] =
4063                                 flow->tag_resource->action;
4064                         action_flags |= MLX5_FLOW_ACTION_FLAG;
4065                         break;
4066                 case RTE_FLOW_ACTION_TYPE_MARK:
4067                         tag_resource.tag = mlx5_flow_mark_set
4068                               (((const struct rte_flow_action_mark *)
4069                                (actions->conf))->id);
4070                         if (!flow->tag_resource)
4071                                 if (flow_dv_tag_resource_register
4072                                     (dev, &tag_resource, dev_flow, error))
4073                                         return errno;
4074                         dev_flow->dv.actions[actions_n++] =
4075                                 flow->tag_resource->action;
4076                         action_flags |= MLX5_FLOW_ACTION_MARK;
4077                         break;
4078                 case RTE_FLOW_ACTION_TYPE_DROP:
4079                         action_flags |= MLX5_FLOW_ACTION_DROP;
4080                         break;
4081                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4082                         queue = actions->conf;
4083                         flow->rss.queue_num = 1;
4084                         (*flow->queue)[0] = queue->index;
4085                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
4086                         break;
4087                 case RTE_FLOW_ACTION_TYPE_RSS:
4088                         rss = actions->conf;
4089                         if (flow->queue)
4090                                 memcpy((*flow->queue), rss->queue,
4091                                        rss->queue_num * sizeof(uint16_t));
4092                         flow->rss.queue_num = rss->queue_num;
4093                         /* NULL RSS key indicates default RSS key. */
4094                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
4095                         memcpy(flow->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
4096                         /* RSS type 0 indicates default RSS type ETH_RSS_IP. */
4097                         flow->rss.types = !rss->types ? ETH_RSS_IP : rss->types;
4098                         flow->rss.level = rss->level;
4099                         action_flags |= MLX5_FLOW_ACTION_RSS;
4100                         break;
4101                 case RTE_FLOW_ACTION_TYPE_COUNT:
4102                         if (!priv->config.devx) {
4103                                 rte_errno = ENOTSUP;
4104                                 goto cnt_err;
4105                         }
4106                         flow->counter = flow_dv_counter_new(dev, count->shared,
4107                                                             count->id);
4108                         if (flow->counter == NULL)
4109                                 goto cnt_err;
4110                         dev_flow->dv.actions[actions_n++] =
4111                                 flow->counter->action;
4112                         action_flags |= MLX5_FLOW_ACTION_COUNT;
4113                         break;
4114 cnt_err:
4115                         if (rte_errno == ENOTSUP)
4116                                 return rte_flow_error_set
4117                                               (error, ENOTSUP,
4118                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4119                                                NULL,
4120                                                "count action not supported");
4121                         else
4122                                 return rte_flow_error_set
4123                                                 (error, rte_errno,
4124                                                  RTE_FLOW_ERROR_TYPE_ACTION,
4125                                                  action,
4126                                                  "cannot create counter"
4127                                                   " object.");
4128                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4129                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4130                         if (flow_dv_create_action_l2_encap(dev, actions,
4131                                                            dev_flow,
4132                                                            attr->transfer,
4133                                                            error))
4134                                 return -rte_errno;
4135                         dev_flow->dv.actions[actions_n++] =
4136                                 dev_flow->dv.encap_decap->verbs_action;
4137                         action_flags |= actions->type ==
4138                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
4139                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
4140                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
4141                         break;
4142                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4143                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4144                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
4145                                                            attr->transfer,
4146                                                            error))
4147                                 return -rte_errno;
4148                         dev_flow->dv.actions[actions_n++] =
4149                                 dev_flow->dv.encap_decap->verbs_action;
4150                         action_flags |= actions->type ==
4151                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
4152                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
4153                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
4154                         break;
4155                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4156                         /* Handle encap with preceding decap. */
4157                         if (action_flags & MLX5_FLOW_ACTION_RAW_DECAP) {
4158                                 if (flow_dv_create_action_raw_encap
4159                                         (dev, actions, dev_flow, attr, error))
4160                                         return -rte_errno;
4161                                 dev_flow->dv.actions[actions_n++] =
4162                                         dev_flow->dv.encap_decap->verbs_action;
4163                         } else {
4164                                 /* Handle encap without preceding decap. */
4165                                 if (flow_dv_create_action_l2_encap
4166                                     (dev, actions, dev_flow, attr->transfer,
4167                                      error))
4168                                         return -rte_errno;
4169                                 dev_flow->dv.actions[actions_n++] =
4170                                         dev_flow->dv.encap_decap->verbs_action;
4171                         }
4172                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
4173                         break;
4174                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4175                         /* Check if this decap is followed by encap. */
4176                         for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
4177                                action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
4178                                action++) {
4179                         }
4180                         /* Handle decap only if it isn't followed by encap. */
4181                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4182                                 if (flow_dv_create_action_l2_decap
4183                                     (dev, dev_flow, attr->transfer, error))
4184                                         return -rte_errno;
4185                                 dev_flow->dv.actions[actions_n++] =
4186                                         dev_flow->dv.encap_decap->verbs_action;
4187                         }
4188                         /* If decap is followed by encap, handle it at encap. */
4189                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
4190                         break;
4191                 case RTE_FLOW_ACTION_TYPE_JUMP:
4192                         jump_data = action->conf;
4193                         tbl = flow_dv_tbl_resource_get(dev, jump_data->group *
4194                                                        MLX5_GROUP_FACTOR,
4195                                                        attr->egress,
4196                                                        attr->transfer, error);
4197                         if (!tbl)
4198                                 return rte_flow_error_set
4199                                                 (error, errno,
4200                                                  RTE_FLOW_ERROR_TYPE_ACTION,
4201                                                  NULL,
4202                                                  "cannot create jump action.");
4203                         jump_tbl_resource.tbl = tbl;
4204                         if (flow_dv_jump_tbl_resource_register
4205                             (dev, &jump_tbl_resource, dev_flow, error)) {
4206                                 flow_dv_tbl_resource_release(tbl);
4207                                 return rte_flow_error_set
4208                                                 (error, errno,
4209                                                  RTE_FLOW_ERROR_TYPE_ACTION,
4210                                                  NULL,
4211                                                  "cannot create jump action.");
4212                         }
4213                         dev_flow->dv.actions[actions_n++] =
4214                                 dev_flow->dv.jump->action;
4215                         action_flags |= MLX5_FLOW_ACTION_JUMP;
4216                         break;
4217                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4218                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4219                         if (flow_dv_convert_action_modify_mac(&res, actions,
4220                                                               error))
4221                                 return -rte_errno;
4222                         action_flags |= actions->type ==
4223                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
4224                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
4225                                         MLX5_FLOW_ACTION_SET_MAC_DST;
4226                         break;
4227                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4228                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4229                         if (flow_dv_convert_action_modify_ipv4(&res, actions,
4230                                                                error))
4231                                 return -rte_errno;
4232                         action_flags |= actions->type ==
4233                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
4234                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
4235                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
4236                         break;
4237                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4238                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4239                         if (flow_dv_convert_action_modify_ipv6(&res, actions,
4240                                                                error))
4241                                 return -rte_errno;
4242                         action_flags |= actions->type ==
4243                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
4244                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
4245                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
4246                         break;
4247                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4248                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4249                         if (flow_dv_convert_action_modify_tp(&res, actions,
4250                                                              items, &flow_attr,
4251                                                              error))
4252                                 return -rte_errno;
4253                         action_flags |= actions->type ==
4254                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
4255                                         MLX5_FLOW_ACTION_SET_TP_SRC :
4256                                         MLX5_FLOW_ACTION_SET_TP_DST;
4257                         break;
4258                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4259                         if (flow_dv_convert_action_modify_dec_ttl(&res, items,
4260                                                                   &flow_attr,
4261                                                                   error))
4262                                 return -rte_errno;
4263                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
4264                         break;
4265                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
4266                         if (flow_dv_convert_action_modify_ttl(&res, actions,
4267                                                              items, &flow_attr,
4268                                                              error))
4269                                 return -rte_errno;
4270                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
4271                         break;
4272                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4273                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4274                         if (flow_dv_convert_action_modify_tcp_seq(&res, actions,
4275                                                                   error))
4276                                 return -rte_errno;
4277                         action_flags |= actions->type ==
4278                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
4279                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
4280                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
4281                         break;
4282
4283                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4284                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4285                         if (flow_dv_convert_action_modify_tcp_ack(&res, actions,
4286                                                                   error))
4287                                 return -rte_errno;
4288                         action_flags |= actions->type ==
4289                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
4290                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
4291                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
4292                         break;
4293                 case RTE_FLOW_ACTION_TYPE_END:
4294                         actions_end = true;
4295                         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS) {
4296                                 /* create modify action if needed. */
4297                                 if (flow_dv_modify_hdr_resource_register
4298                                                                 (dev, &res,
4299                                                                  dev_flow,
4300                                                                  error))
4301                                         return -rte_errno;
4302                                 dev_flow->dv.actions[modify_action_position] =
4303                                         dev_flow->dv.modify_hdr->verbs_action;
4304                         }
4305                         break;
4306                 default:
4307                         break;
4308                 }
4309                 if ((action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS) &&
4310                     modify_action_position == UINT32_MAX)
4311                         modify_action_position = actions_n++;
4312         }
4313         dev_flow->dv.actions_n = actions_n;
4314         flow->actions = action_flags;
4315         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4316                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
4317
4318                 switch (items->type) {
4319                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4320                         flow_dv_translate_item_port_id(dev, match_mask,
4321                                                        match_value, items);
4322                         last_item = MLX5_FLOW_ITEM_PORT_ID;
4323                         break;
4324                 case RTE_FLOW_ITEM_TYPE_ETH:
4325                         flow_dv_translate_item_eth(match_mask, match_value,
4326                                                    items, tunnel);
4327                         matcher.priority = MLX5_PRIORITY_MAP_L2;
4328                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
4329                                              MLX5_FLOW_LAYER_OUTER_L2;
4330                         break;
4331                 case RTE_FLOW_ITEM_TYPE_VLAN:
4332                         flow_dv_translate_item_vlan(match_mask, match_value,
4333                                                     items, tunnel);
4334                         matcher.priority = MLX5_PRIORITY_MAP_L2;
4335                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
4336                                               MLX5_FLOW_LAYER_INNER_VLAN) :
4337                                              (MLX5_FLOW_LAYER_OUTER_L2 |
4338                                               MLX5_FLOW_LAYER_OUTER_VLAN);
4339                         break;
4340                 case RTE_FLOW_ITEM_TYPE_IPV4:
4341                         flow_dv_translate_item_ipv4(match_mask, match_value,
4342                                                     items, tunnel, attr->group);
4343                         matcher.priority = MLX5_PRIORITY_MAP_L3;
4344                         dev_flow->dv.hash_fields |=
4345                                 mlx5_flow_hashfields_adjust
4346                                         (dev_flow, tunnel,
4347                                          MLX5_IPV4_LAYER_TYPES,
4348                                          MLX5_IPV4_IBV_RX_HASH);
4349                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4350                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4351                         break;
4352                 case RTE_FLOW_ITEM_TYPE_IPV6:
4353                         flow_dv_translate_item_ipv6(match_mask, match_value,
4354                                                     items, tunnel, attr->group);
4355                         matcher.priority = MLX5_PRIORITY_MAP_L3;
4356                         dev_flow->dv.hash_fields |=
4357                                 mlx5_flow_hashfields_adjust
4358                                         (dev_flow, tunnel,
4359                                          MLX5_IPV6_LAYER_TYPES,
4360                                          MLX5_IPV6_IBV_RX_HASH);
4361                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4362                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4363                         break;
4364                 case RTE_FLOW_ITEM_TYPE_TCP:
4365                         flow_dv_translate_item_tcp(match_mask, match_value,
4366                                                    items, tunnel);
4367                         matcher.priority = MLX5_PRIORITY_MAP_L4;
4368                         dev_flow->dv.hash_fields |=
4369                                 mlx5_flow_hashfields_adjust
4370                                         (dev_flow, tunnel, ETH_RSS_TCP,
4371                                          IBV_RX_HASH_SRC_PORT_TCP |
4372                                          IBV_RX_HASH_DST_PORT_TCP);
4373                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
4374                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
4375                         break;
4376                 case RTE_FLOW_ITEM_TYPE_UDP:
4377                         flow_dv_translate_item_udp(match_mask, match_value,
4378                                                    items, tunnel);
4379                         matcher.priority = MLX5_PRIORITY_MAP_L4;
4380                         dev_flow->dv.hash_fields |=
4381                                 mlx5_flow_hashfields_adjust
4382                                         (dev_flow, tunnel, ETH_RSS_UDP,
4383                                          IBV_RX_HASH_SRC_PORT_UDP |
4384                                          IBV_RX_HASH_DST_PORT_UDP);
4385                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
4386                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
4387                         break;
4388                 case RTE_FLOW_ITEM_TYPE_GRE:
4389                         flow_dv_translate_item_gre(match_mask, match_value,
4390                                                    items, tunnel);
4391                         last_item = MLX5_FLOW_LAYER_GRE;
4392                         break;
4393                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4394                         flow_dv_translate_item_nvgre(match_mask, match_value,
4395                                                      items, tunnel);
4396                         last_item = MLX5_FLOW_LAYER_GRE;
4397                         break;
4398                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4399                         flow_dv_translate_item_vxlan(match_mask, match_value,
4400                                                      items, tunnel);
4401                         last_item = MLX5_FLOW_LAYER_VXLAN;
4402                         break;
4403                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4404                         flow_dv_translate_item_vxlan(match_mask, match_value,
4405                                                      items, tunnel);
4406                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4407                         break;
4408                 case RTE_FLOW_ITEM_TYPE_MPLS:
4409                         flow_dv_translate_item_mpls(match_mask, match_value,
4410                                                     items, last_item, tunnel);
4411                         last_item = MLX5_FLOW_LAYER_MPLS;
4412                         break;
4413                 case RTE_FLOW_ITEM_TYPE_META:
4414                         flow_dv_translate_item_meta(match_mask, match_value,
4415                                                     items);
4416                         last_item = MLX5_FLOW_ITEM_METADATA;
4417                         break;
4418                 case RTE_FLOW_ITEM_TYPE_ICMP:
4419                         flow_dv_translate_item_icmp(match_mask, match_value,
4420                                                     items, tunnel);
4421                         item_flags |= MLX5_FLOW_LAYER_ICMP;
4422                         break;
4423                 case RTE_FLOW_ITEM_TYPE_ICMP6:
4424                         flow_dv_translate_item_icmp6(match_mask, match_value,
4425                                                       items, tunnel);
4426                         item_flags |= MLX5_FLOW_LAYER_ICMP6;
4427                         break;
4428                 default:
4429                         break;
4430                 }
4431                 item_flags |= last_item;
4432         }
4433         /*
4434          * In case of ingress traffic when E-Switch mode is enabled,
4435          * we have two cases where we need to set the source port manually.
4436          * The first one, is in case of Nic steering rule, and the second is
4437          * E-Switch rule where no port_id item was found. In both cases
4438          * the source port is set according the current port in use.
4439          */
4440         if ((attr->ingress && !(item_flags & MLX5_FLOW_ITEM_PORT_ID)) &&
4441             (priv->representor || priv->master)) {
4442                 if (flow_dv_translate_item_port_id(dev, match_mask,
4443                                                    match_value, NULL))
4444                         return -rte_errno;
4445         }
4446         assert(!flow_dv_check_valid_spec(matcher.mask.buf,
4447                                          dev_flow->dv.value.buf));
4448         dev_flow->layers = item_flags;
4449         /* Register matcher. */
4450         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
4451                                     matcher.mask.size);
4452         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
4453                                                      matcher.priority);
4454         matcher.egress = attr->egress;
4455         matcher.group = attr->group;
4456         matcher.transfer = attr->transfer;
4457         if (flow_dv_matcher_register(dev, &matcher, dev_flow, error))
4458                 return -rte_errno;
4459         return 0;
4460 }
4461
4462 /**
4463  * Apply the flow to the NIC.
4464  *
4465  * @param[in] dev
4466  *   Pointer to the Ethernet device structure.
4467  * @param[in, out] flow
4468  *   Pointer to flow structure.
4469  * @param[out] error
4470  *   Pointer to error structure.
4471  *
4472  * @return
4473  *   0 on success, a negative errno value otherwise and rte_errno is set.
4474  */
4475 static int
4476 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
4477               struct rte_flow_error *error)
4478 {
4479         struct mlx5_flow_dv *dv;
4480         struct mlx5_flow *dev_flow;
4481         struct mlx5_priv *priv = dev->data->dev_private;
4482         int n;
4483         int err;
4484
4485         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
4486                 dv = &dev_flow->dv;
4487                 n = dv->actions_n;
4488                 if (flow->actions & MLX5_FLOW_ACTION_DROP) {
4489                         if (flow->transfer) {
4490                                 dv->actions[n++] = priv->sh->esw_drop_action;
4491                         } else {
4492                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
4493                                 if (!dv->hrxq) {
4494                                         rte_flow_error_set
4495                                                 (error, errno,
4496                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4497                                                  NULL,
4498                                                  "cannot get drop hash queue");
4499                                         goto error;
4500                                 }
4501                                 dv->actions[n++] = dv->hrxq->action;
4502                         }
4503                 } else if (flow->actions &
4504                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
4505                         struct mlx5_hrxq *hrxq;
4506
4507                         hrxq = mlx5_hrxq_get(dev, flow->key,
4508                                              MLX5_RSS_HASH_KEY_LEN,
4509                                              dv->hash_fields,
4510                                              (*flow->queue),
4511                                              flow->rss.queue_num);
4512                         if (!hrxq)
4513                                 hrxq = mlx5_hrxq_new
4514                                         (dev, flow->key, MLX5_RSS_HASH_KEY_LEN,
4515                                          dv->hash_fields, (*flow->queue),
4516                                          flow->rss.queue_num,
4517                                          !!(dev_flow->layers &
4518                                             MLX5_FLOW_LAYER_TUNNEL));
4519                         if (!hrxq) {
4520                                 rte_flow_error_set
4521                                         (error, rte_errno,
4522                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4523                                          "cannot get hash queue");
4524                                 goto error;
4525                         }
4526                         dv->hrxq = hrxq;
4527                         dv->actions[n++] = dv->hrxq->action;
4528                 }
4529                 dv->flow =
4530                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
4531                                                   (void *)&dv->value, n,
4532                                                   dv->actions);
4533                 if (!dv->flow) {
4534                         rte_flow_error_set(error, errno,
4535                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4536                                            NULL,
4537                                            "hardware refuses to create flow");
4538                         goto error;
4539                 }
4540         }
4541         return 0;
4542 error:
4543         err = rte_errno; /* Save rte_errno before cleanup. */
4544         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
4545                 struct mlx5_flow_dv *dv = &dev_flow->dv;
4546                 if (dv->hrxq) {
4547                         if (flow->actions & MLX5_FLOW_ACTION_DROP)
4548                                 mlx5_hrxq_drop_release(dev);
4549                         else
4550                                 mlx5_hrxq_release(dev, dv->hrxq);
4551                         dv->hrxq = NULL;
4552                 }
4553         }
4554         rte_errno = err; /* Restore rte_errno. */
4555         return -rte_errno;
4556 }
4557
4558 /**
4559  * Release the flow matcher.
4560  *
4561  * @param dev
4562  *   Pointer to Ethernet device.
4563  * @param flow
4564  *   Pointer to mlx5_flow.
4565  *
4566  * @return
4567  *   1 while a reference on it exists, 0 when freed.
4568  */
4569 static int
4570 flow_dv_matcher_release(struct rte_eth_dev *dev,
4571                         struct mlx5_flow *flow)
4572 {
4573         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
4574         struct mlx5_priv *priv = dev->data->dev_private;
4575         struct mlx5_ibv_shared *sh = priv->sh;
4576         struct mlx5_flow_tbl_resource *tbl;
4577
4578         assert(matcher->matcher_object);
4579         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
4580                 dev->data->port_id, (void *)matcher,
4581                 rte_atomic32_read(&matcher->refcnt));
4582         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
4583                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
4584                            (matcher->matcher_object));
4585                 LIST_REMOVE(matcher, next);
4586                 if (matcher->egress)
4587                         tbl = &sh->tx_tbl[matcher->group];
4588                 else
4589                         tbl = &sh->rx_tbl[matcher->group];
4590                 flow_dv_tbl_resource_release(tbl);
4591                 rte_free(matcher);
4592                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
4593                         dev->data->port_id, (void *)matcher);
4594                 return 0;
4595         }
4596         return 1;
4597 }
4598
4599 /**
4600  * Release an encap/decap resource.
4601  *
4602  * @param flow
4603  *   Pointer to mlx5_flow.
4604  *
4605  * @return
4606  *   1 while a reference on it exists, 0 when freed.
4607  */
4608 static int
4609 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
4610 {
4611         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
4612                                                 flow->dv.encap_decap;
4613
4614         assert(cache_resource->verbs_action);
4615         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
4616                 (void *)cache_resource,
4617                 rte_atomic32_read(&cache_resource->refcnt));
4618         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
4619                 claim_zero(mlx5_glue->destroy_flow_action
4620                                 (cache_resource->verbs_action));
4621                 LIST_REMOVE(cache_resource, next);
4622                 rte_free(cache_resource);
4623                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
4624                         (void *)cache_resource);
4625                 return 0;
4626         }
4627         return 1;
4628 }
4629
4630 /**
4631  * Release an jump to table action resource.
4632  *
4633  * @param flow
4634  *   Pointer to mlx5_flow.
4635  *
4636  * @return
4637  *   1 while a reference on it exists, 0 when freed.
4638  */
4639 static int
4640 flow_dv_jump_tbl_resource_release(struct mlx5_flow *flow)
4641 {
4642         struct mlx5_flow_dv_jump_tbl_resource *cache_resource =
4643                                                 flow->dv.jump;
4644
4645         assert(cache_resource->action);
4646         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
4647                 (void *)cache_resource,
4648                 rte_atomic32_read(&cache_resource->refcnt));
4649         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
4650                 claim_zero(mlx5_glue->destroy_flow_action
4651                                 (cache_resource->action));
4652                 LIST_REMOVE(cache_resource, next);
4653                 flow_dv_tbl_resource_release(cache_resource->tbl);
4654                 rte_free(cache_resource);
4655                 DRV_LOG(DEBUG, "jump table resource %p: removed",
4656                         (void *)cache_resource);
4657                 return 0;
4658         }
4659         return 1;
4660 }
4661
4662 /**
4663  * Release a modify-header resource.
4664  *
4665  * @param flow
4666  *   Pointer to mlx5_flow.
4667  *
4668  * @return
4669  *   1 while a reference on it exists, 0 when freed.
4670  */
4671 static int
4672 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
4673 {
4674         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
4675                                                 flow->dv.modify_hdr;
4676
4677         assert(cache_resource->verbs_action);
4678         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
4679                 (void *)cache_resource,
4680                 rte_atomic32_read(&cache_resource->refcnt));
4681         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
4682                 claim_zero(mlx5_glue->destroy_flow_action
4683                                 (cache_resource->verbs_action));
4684                 LIST_REMOVE(cache_resource, next);
4685                 rte_free(cache_resource);
4686                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
4687                         (void *)cache_resource);
4688                 return 0;
4689         }
4690         return 1;
4691 }
4692
4693 /**
4694  * Release port ID action resource.
4695  *
4696  * @param flow
4697  *   Pointer to mlx5_flow.
4698  *
4699  * @return
4700  *   1 while a reference on it exists, 0 when freed.
4701  */
4702 static int
4703 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
4704 {
4705         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
4706                 flow->dv.port_id_action;
4707
4708         assert(cache_resource->action);
4709         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
4710                 (void *)cache_resource,
4711                 rte_atomic32_read(&cache_resource->refcnt));
4712         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
4713                 claim_zero(mlx5_glue->destroy_flow_action
4714                                 (cache_resource->action));
4715                 LIST_REMOVE(cache_resource, next);
4716                 rte_free(cache_resource);
4717                 DRV_LOG(DEBUG, "port id action resource %p: removed",
4718                         (void *)cache_resource);
4719                 return 0;
4720         }
4721         return 1;
4722 }
4723
4724 /**
4725  * Remove the flow from the NIC but keeps it in memory.
4726  *
4727  * @param[in] dev
4728  *   Pointer to Ethernet device.
4729  * @param[in, out] flow
4730  *   Pointer to flow structure.
4731  */
4732 static void
4733 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
4734 {
4735         struct mlx5_flow_dv *dv;
4736         struct mlx5_flow *dev_flow;
4737
4738         if (!flow)
4739                 return;
4740         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
4741                 dv = &dev_flow->dv;
4742                 if (dv->flow) {
4743                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
4744                         dv->flow = NULL;
4745                 }
4746                 if (dv->hrxq) {
4747                         if (flow->actions & MLX5_FLOW_ACTION_DROP)
4748                                 mlx5_hrxq_drop_release(dev);
4749                         else
4750                                 mlx5_hrxq_release(dev, dv->hrxq);
4751                         dv->hrxq = NULL;
4752                 }
4753         }
4754 }
4755
4756 /**
4757  * Remove the flow from the NIC and the memory.
4758  *
4759  * @param[in] dev
4760  *   Pointer to the Ethernet device structure.
4761  * @param[in, out] flow
4762  *   Pointer to flow structure.
4763  */
4764 static void
4765 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
4766 {
4767         struct mlx5_flow *dev_flow;
4768
4769         if (!flow)
4770                 return;
4771         flow_dv_remove(dev, flow);
4772         if (flow->counter) {
4773                 flow_dv_counter_release(flow->counter);
4774                 flow->counter = NULL;
4775         }
4776         if (flow->tag_resource) {
4777                 flow_dv_tag_release(dev, flow->tag_resource);
4778                 flow->tag_resource = NULL;
4779         }
4780         while (!LIST_EMPTY(&flow->dev_flows)) {
4781                 dev_flow = LIST_FIRST(&flow->dev_flows);
4782                 LIST_REMOVE(dev_flow, next);
4783                 if (dev_flow->dv.matcher)
4784                         flow_dv_matcher_release(dev, dev_flow);
4785                 if (dev_flow->dv.encap_decap)
4786                         flow_dv_encap_decap_resource_release(dev_flow);
4787                 if (dev_flow->dv.modify_hdr)
4788                         flow_dv_modify_hdr_resource_release(dev_flow);
4789                 if (dev_flow->dv.jump)
4790                         flow_dv_jump_tbl_resource_release(dev_flow);
4791                 if (dev_flow->dv.port_id_action)
4792                         flow_dv_port_id_action_resource_release(dev_flow);
4793                 rte_free(dev_flow);
4794         }
4795 }
4796
4797 /**
4798  * Query a dv flow  rule for its statistics via devx.
4799  *
4800  * @param[in] dev
4801  *   Pointer to Ethernet device.
4802  * @param[in] flow
4803  *   Pointer to the sub flow.
4804  * @param[out] data
4805  *   data retrieved by the query.
4806  * @param[out] error
4807  *   Perform verbose error reporting if not NULL.
4808  *
4809  * @return
4810  *   0 on success, a negative errno value otherwise and rte_errno is set.
4811  */
4812 static int
4813 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
4814                     void *data, struct rte_flow_error *error)
4815 {
4816         struct mlx5_priv *priv = dev->data->dev_private;
4817         struct rte_flow_query_count *qc = data;
4818         uint64_t pkts = 0;
4819         uint64_t bytes = 0;
4820         int err;
4821
4822         if (!priv->config.devx)
4823                 return rte_flow_error_set(error, ENOTSUP,
4824                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4825                                           NULL,
4826                                           "counters are not supported");
4827         if (flow->counter) {
4828                 err = mlx5_devx_cmd_flow_counter_query
4829                                                 (flow->counter->dcs,
4830                                                  qc->reset, &pkts, &bytes);
4831                 if (err)
4832                         return rte_flow_error_set
4833                                 (error, err,
4834                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4835                                  NULL,
4836                                  "cannot read counters");
4837                 qc->hits_set = 1;
4838                 qc->bytes_set = 1;
4839                 qc->hits = pkts - flow->counter->hits;
4840                 qc->bytes = bytes - flow->counter->bytes;
4841                 if (qc->reset) {
4842                         flow->counter->hits = pkts;
4843                         flow->counter->bytes = bytes;
4844                 }
4845                 return 0;
4846         }
4847         return rte_flow_error_set(error, EINVAL,
4848                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4849                                   NULL,
4850                                   "counters are not available");
4851 }
4852
4853 /**
4854  * Query a flow.
4855  *
4856  * @see rte_flow_query()
4857  * @see rte_flow_ops
4858  */
4859 static int
4860 flow_dv_query(struct rte_eth_dev *dev,
4861               struct rte_flow *flow __rte_unused,
4862               const struct rte_flow_action *actions __rte_unused,
4863               void *data __rte_unused,
4864               struct rte_flow_error *error __rte_unused)
4865 {
4866         int ret = -EINVAL;
4867
4868         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4869                 switch (actions->type) {
4870                 case RTE_FLOW_ACTION_TYPE_VOID:
4871                         break;
4872                 case RTE_FLOW_ACTION_TYPE_COUNT:
4873                         ret = flow_dv_query_count(dev, flow, data, error);
4874                         break;
4875                 default:
4876                         return rte_flow_error_set(error, ENOTSUP,
4877                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4878                                                   actions,
4879                                                   "action not supported");
4880                 }
4881         }
4882         return ret;
4883 }
4884
4885 /*
4886  * Mutex-protected thunk to flow_dv_translate().
4887  */
4888 static int
4889 flow_d_translate(struct rte_eth_dev *dev,
4890                  struct mlx5_flow *dev_flow,
4891                  const struct rte_flow_attr *attr,
4892                  const struct rte_flow_item items[],
4893                  const struct rte_flow_action actions[],
4894                  struct rte_flow_error *error)
4895 {
4896         int ret;
4897
4898         flow_d_shared_lock(dev);
4899         ret = flow_dv_translate(dev, dev_flow, attr, items, actions, error);
4900         flow_d_shared_unlock(dev);
4901         return ret;
4902 }
4903
4904 /*
4905  * Mutex-protected thunk to flow_dv_apply().
4906  */
4907 static int
4908 flow_d_apply(struct rte_eth_dev *dev,
4909              struct rte_flow *flow,
4910              struct rte_flow_error *error)
4911 {
4912         int ret;
4913
4914         flow_d_shared_lock(dev);
4915         ret = flow_dv_apply(dev, flow, error);
4916         flow_d_shared_unlock(dev);
4917         return ret;
4918 }
4919
4920 /*
4921  * Mutex-protected thunk to flow_dv_remove().
4922  */
4923 static void
4924 flow_d_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
4925 {
4926         flow_d_shared_lock(dev);
4927         flow_dv_remove(dev, flow);
4928         flow_d_shared_unlock(dev);
4929 }
4930
4931 /*
4932  * Mutex-protected thunk to flow_dv_destroy().
4933  */
4934 static void
4935 flow_d_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
4936 {
4937         flow_d_shared_lock(dev);
4938         flow_dv_destroy(dev, flow);
4939         flow_d_shared_unlock(dev);
4940 }
4941
4942 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
4943         .validate = flow_dv_validate,
4944         .prepare = flow_dv_prepare,
4945         .translate = flow_d_translate,
4946         .apply = flow_d_apply,
4947         .remove = flow_d_remove,
4948         .destroy = flow_d_destroy,
4949         .query = flow_dv_query,
4950 };
4951
4952 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */