drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29
  30 #include "mlx5.h"
  31 #include "mlx5_defs.h"
  32 #include "mlx5_glue.h"
  33 #include "mlx5_flow.h"
  34 #include "mlx5_prm.h"
  35 #include "mlx5_rxtx.h"
  36
  37 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  38
  39 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  40 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  41 #endif
  42
  43 #ifndef HAVE_MLX5DV_DR_ESWITCH
  44 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  45 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  46 #endif
  47 #endif
  48
  49 #ifndef HAVE_MLX5DV_DR
  50 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  51 #endif
  52
  53 /* VLAN header definitions */
  54 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  55 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  56 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  57 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  58 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  59
  60 union flow_dv_attr {
  61         struct {
  62                 uint32_t valid:1;
  63                 uint32_t ipv4:1;
  64                 uint32_t ipv6:1;
  65                 uint32_t tcp:1;
  66                 uint32_t udp:1;
  67                 uint32_t reserved:27;
  68         };
  69         uint32_t attr;
  70 };
  71
  72 /**
  73  * Initialize flow attributes structure according to flow items' types.
  74  *
  75  * @param[in] item
  76  *   Pointer to item specification.
  77  * @param[out] attr
  78  *   Pointer to flow attributes structure.
  79  */
  80 static void
  81 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr)
  82 {
  83         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
  84                 switch (item->type) {
  85                 case RTE_FLOW_ITEM_TYPE_IPV4:
  86                         attr->ipv4 = 1;
  87                         break;
  88                 case RTE_FLOW_ITEM_TYPE_IPV6:
  89                         attr->ipv6 = 1;
  90                         break;
  91                 case RTE_FLOW_ITEM_TYPE_UDP:
  92                         attr->udp = 1;
  93                         break;
  94                 case RTE_FLOW_ITEM_TYPE_TCP:
  95                         attr->tcp = 1;
  96                         break;
  97                 default:
  98                         break;
  99                 }
 100         }
 101         attr->valid = 1;
 102 }
 103
 104 struct field_modify_info {
 105         uint32_t size; /* Size of field in protocol header, in bytes. */
 106         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 107         enum mlx5_modification_field id;
 108 };
 109
 110 struct field_modify_info modify_eth[] = {
 111         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 112         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 113         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 114         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 115         {0, 0, 0},
 116 };
 117
 118 struct field_modify_info modify_vlan_out_first_vid[] = {
 119         /* Size in bits !!! */
 120         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 121         {0, 0, 0},
 122 };
 123
 124 struct field_modify_info modify_ipv4[] = {
 125         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 126         {4, 12, MLX5_MODI_OUT_SIPV4},
 127         {4, 16, MLX5_MODI_OUT_DIPV4},
 128         {0, 0, 0},
 129 };
 130
 131 struct field_modify_info modify_ipv6[] = {
 132         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 133         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 134         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 135         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 136         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 137         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 138         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 139         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 140         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 141         {0, 0, 0},
 142 };
 143
 144 struct field_modify_info modify_udp[] = {
 145         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 146         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 147         {0, 0, 0},
 148 };
 149
 150 struct field_modify_info modify_tcp[] = {
 151         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 152         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 153         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 154         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 155         {0, 0, 0},
 156 };
 157
 158 static void
 159 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 160                           uint8_t next_protocol, uint64_t *item_flags,
 161                           int *tunnel)
 162 {
 163         assert(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 164                item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 165         if (next_protocol == IPPROTO_IPIP) {
 166                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 167                 *tunnel = 1;
 168         }
 169         if (next_protocol == IPPROTO_IPV6) {
 170                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 171                 *tunnel = 1;
 172         }
 173 }
 174
 175 /**
 176  * Acquire the synchronizing object to protect multithreaded access
 177  * to shared dv context. Lock occurs only if context is actually
 178  * shared, i.e. we have multiport IB device and representors are
 179  * created.
 180  *
 181  * @param[in] dev
 182  *   Pointer to the rte_eth_dev structure.
 183  */
 184 static void
 185 flow_d_shared_lock(struct rte_eth_dev *dev)
 186 {
 187         struct mlx5_priv *priv = dev->data->dev_private;
 188         struct mlx5_ibv_shared *sh = priv->sh;
 189
 190         if (sh->dv_refcnt > 1) {
 191                 int ret;
 192
 193                 ret = pthread_mutex_lock(&sh->dv_mutex);
 194                 assert(!ret);
 195                 (void)ret;
 196         }
 197 }
 198
 199 static void
 200 flow_d_shared_unlock(struct rte_eth_dev *dev)
 201 {
 202         struct mlx5_priv *priv = dev->data->dev_private;
 203         struct mlx5_ibv_shared *sh = priv->sh;
 204
 205         if (sh->dv_refcnt > 1) {
 206                 int ret;
 207
 208                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 209                 assert(!ret);
 210                 (void)ret;
 211         }
 212 }
 213
 214 /**
 215  * Convert modify-header action to DV specification.
 216  *
 217  * @param[in] item
 218  *   Pointer to item specification.
 219  * @param[in] field
 220  *   Pointer to field modification information.
 221  * @param[in,out] resource
 222  *   Pointer to the modify-header resource.
 223  * @param[in] type
 224  *   Type of modification.
 225  * @param[out] error
 226  *   Pointer to the error structure.
 227  *
 228  * @return
 229  *   0 on success, a negative errno value otherwise and rte_errno is set.
 230  */
 231 static int
 232 flow_dv_convert_modify_action(struct rte_flow_item *item,
 233                               struct field_modify_info *field,
 234                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 235                               uint32_t type,
 236                               struct rte_flow_error *error)
 237 {
 238         uint32_t i = resource->actions_num;
 239         struct mlx5_modification_cmd *actions = resource->actions;
 240         const uint8_t *spec = item->spec;
 241         const uint8_t *mask = item->mask;
 242         uint32_t set;
 243
 244         while (field->size) {
 245                 set = 0;
 246                 /* Generate modify command for each mask segment. */
 247                 memcpy(&set, &mask[field->offset], field->size);
 248                 if (set) {
 249                         if (i >= MLX5_MODIFY_NUM)
 250                                 return rte_flow_error_set(error, EINVAL,
 251                                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 252                                          "too many items to modify");
 253                         actions[i].action_type = type;
 254                         actions[i].field = field->id;
 255                         actions[i].length = field->size ==
 256                                         4 ? 0 : field->size * 8;
 257                         rte_memcpy(&actions[i].data[4 - field->size],
 258                                    &spec[field->offset], field->size);
 259                         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 260                         ++i;
 261                 }
 262                 if (resource->actions_num != i)
 263                         resource->actions_num = i;
 264                 field++;
 265         }
 266         if (!resource->actions_num)
 267                 return rte_flow_error_set(error, EINVAL,
 268                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 269                                           "invalid modification flow item");
 270         return 0;
 271 }
 272
 273 /**
 274  * Convert modify-header set IPv4 address action to DV specification.
 275  *
 276  * @param[in,out] resource
 277  *   Pointer to the modify-header resource.
 278  * @param[in] action
 279  *   Pointer to action specification.
 280  * @param[out] error
 281  *   Pointer to the error structure.
 282  *
 283  * @return
 284  *   0 on success, a negative errno value otherwise and rte_errno is set.
 285  */
 286 static int
 287 flow_dv_convert_action_modify_ipv4
 288                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 289                          const struct rte_flow_action *action,
 290                          struct rte_flow_error *error)
 291 {
 292         const struct rte_flow_action_set_ipv4 *conf =
 293                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 294         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 295         struct rte_flow_item_ipv4 ipv4;
 296         struct rte_flow_item_ipv4 ipv4_mask;
 297
 298         memset(&ipv4, 0, sizeof(ipv4));
 299         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 300         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 301                 ipv4.hdr.src_addr = conf->ipv4_addr;
 302                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 303         } else {
 304                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 305                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 306         }
 307         item.spec = &ipv4;
 308         item.mask = &ipv4_mask;
 309         return flow_dv_convert_modify_action(&item, modify_ipv4, resource,
 310                                              MLX5_MODIFICATION_TYPE_SET, error);
 311 }
 312
 313 /**
 314  * Convert modify-header set IPv6 address action to DV specification.
 315  *
 316  * @param[in,out] resource
 317  *   Pointer to the modify-header resource.
 318  * @param[in] action
 319  *   Pointer to action specification.
 320  * @param[out] error
 321  *   Pointer to the error structure.
 322  *
 323  * @return
 324  *   0 on success, a negative errno value otherwise and rte_errno is set.
 325  */
 326 static int
 327 flow_dv_convert_action_modify_ipv6
 328                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 329                          const struct rte_flow_action *action,
 330                          struct rte_flow_error *error)
 331 {
 332         const struct rte_flow_action_set_ipv6 *conf =
 333                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 334         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 335         struct rte_flow_item_ipv6 ipv6;
 336         struct rte_flow_item_ipv6 ipv6_mask;
 337
 338         memset(&ipv6, 0, sizeof(ipv6));
 339         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 340         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 341                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 342                        sizeof(ipv6.hdr.src_addr));
 343                 memcpy(&ipv6_mask.hdr.src_addr,
 344                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 345                        sizeof(ipv6.hdr.src_addr));
 346         } else {
 347                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 348                        sizeof(ipv6.hdr.dst_addr));
 349                 memcpy(&ipv6_mask.hdr.dst_addr,
 350                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 351                        sizeof(ipv6.hdr.dst_addr));
 352         }
 353         item.spec = &ipv6;
 354         item.mask = &ipv6_mask;
 355         return flow_dv_convert_modify_action(&item, modify_ipv6, resource,
 356                                              MLX5_MODIFICATION_TYPE_SET, error);
 357 }
 358
 359 /**
 360  * Convert modify-header set MAC address action to DV specification.
 361  *
 362  * @param[in,out] resource
 363  *   Pointer to the modify-header resource.
 364  * @param[in] action
 365  *   Pointer to action specification.
 366  * @param[out] error
 367  *   Pointer to the error structure.
 368  *
 369  * @return
 370  *   0 on success, a negative errno value otherwise and rte_errno is set.
 371  */
 372 static int
 373 flow_dv_convert_action_modify_mac
 374                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 375                          const struct rte_flow_action *action,
 376                          struct rte_flow_error *error)
 377 {
 378         const struct rte_flow_action_set_mac *conf =
 379                 (const struct rte_flow_action_set_mac *)(action->conf);
 380         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 381         struct rte_flow_item_eth eth;
 382         struct rte_flow_item_eth eth_mask;
 383
 384         memset(&eth, 0, sizeof(eth));
 385         memset(&eth_mask, 0, sizeof(eth_mask));
 386         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 387                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 388                        sizeof(eth.src.addr_bytes));
 389                 memcpy(&eth_mask.src.addr_bytes,
 390                        &rte_flow_item_eth_mask.src.addr_bytes,
 391                        sizeof(eth_mask.src.addr_bytes));
 392         } else {
 393                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 394                        sizeof(eth.dst.addr_bytes));
 395                 memcpy(&eth_mask.dst.addr_bytes,
 396                        &rte_flow_item_eth_mask.dst.addr_bytes,
 397                        sizeof(eth_mask.dst.addr_bytes));
 398         }
 399         item.spec = &eth;
 400         item.mask = &eth_mask;
 401         return flow_dv_convert_modify_action(&item, modify_eth, resource,
 402                                              MLX5_MODIFICATION_TYPE_SET, error);
 403 }
 404
 405 /**
 406  * Convert modify-header set VLAN VID action to DV specification.
 407  *
 408  * @param[in,out] resource
 409  *   Pointer to the modify-header resource.
 410  * @param[in] action
 411  *   Pointer to action specification.
 412  * @param[out] error
 413  *   Pointer to the error structure.
 414  *
 415  * @return
 416  *   0 on success, a negative errno value otherwise and rte_errno is set.
 417  */
 418 static int
 419 flow_dv_convert_action_modify_vlan_vid
 420                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 421                          const struct rte_flow_action *action,
 422                          struct rte_flow_error *error)
 423 {
 424         const struct rte_flow_action_of_set_vlan_vid *conf =
 425                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 426         int i = resource->actions_num;
 427         struct mlx5_modification_cmd *actions = &resource->actions[i];
 428         struct field_modify_info *field = modify_vlan_out_first_vid;
 429
 430         if (i >= MLX5_MODIFY_NUM)
 431                 return rte_flow_error_set(error, EINVAL,
 432                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 433                          "too many items to modify");
 434         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 435         actions[i].field = field->id;
 436         actions[i].length = field->size;
 437         actions[i].offset = field->offset;
 438         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 439         actions[i].data1 = conf->vlan_vid;
 440         actions[i].data1 = actions[i].data1 << 16;
 441         resource->actions_num = ++i;
 442         return 0;
 443 }
 444
 445 /**
 446  * Convert modify-header set TP action to DV specification.
 447  *
 448  * @param[in,out] resource
 449  *   Pointer to the modify-header resource.
 450  * @param[in] action
 451  *   Pointer to action specification.
 452  * @param[in] items
 453  *   Pointer to rte_flow_item objects list.
 454  * @param[in] attr
 455  *   Pointer to flow attributes structure.
 456  * @param[out] error
 457  *   Pointer to the error structure.
 458  *
 459  * @return
 460  *   0 on success, a negative errno value otherwise and rte_errno is set.
 461  */
 462 static int
 463 flow_dv_convert_action_modify_tp
 464                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 465                          const struct rte_flow_action *action,
 466                          const struct rte_flow_item *items,
 467                          union flow_dv_attr *attr,
 468                          struct rte_flow_error *error)
 469 {
 470         const struct rte_flow_action_set_tp *conf =
 471                 (const struct rte_flow_action_set_tp *)(action->conf);
 472         struct rte_flow_item item;
 473         struct rte_flow_item_udp udp;
 474         struct rte_flow_item_udp udp_mask;
 475         struct rte_flow_item_tcp tcp;
 476         struct rte_flow_item_tcp tcp_mask;
 477         struct field_modify_info *field;
 478
 479         if (!attr->valid)
 480                 flow_dv_attr_init(items, attr);
 481         if (attr->udp) {
 482                 memset(&udp, 0, sizeof(udp));
 483                 memset(&udp_mask, 0, sizeof(udp_mask));
 484                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 485                         udp.hdr.src_port = conf->port;
 486                         udp_mask.hdr.src_port =
 487                                         rte_flow_item_udp_mask.hdr.src_port;
 488                 } else {
 489                         udp.hdr.dst_port = conf->port;
 490                         udp_mask.hdr.dst_port =
 491                                         rte_flow_item_udp_mask.hdr.dst_port;
 492                 }
 493                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 494                 item.spec = &udp;
 495                 item.mask = &udp_mask;
 496                 field = modify_udp;
 497         }
 498         if (attr->tcp) {
 499                 memset(&tcp, 0, sizeof(tcp));
 500                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 501                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 502                         tcp.hdr.src_port = conf->port;
 503                         tcp_mask.hdr.src_port =
 504                                         rte_flow_item_tcp_mask.hdr.src_port;
 505                 } else {
 506                         tcp.hdr.dst_port = conf->port;
 507                         tcp_mask.hdr.dst_port =
 508                                         rte_flow_item_tcp_mask.hdr.dst_port;
 509                 }
 510                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 511                 item.spec = &tcp;
 512                 item.mask = &tcp_mask;
 513                 field = modify_tcp;
 514         }
 515         return flow_dv_convert_modify_action(&item, field, resource,
 516                                              MLX5_MODIFICATION_TYPE_SET, error);
 517 }
 518
 519 /**
 520  * Convert modify-header set TTL action to DV specification.
 521  *
 522  * @param[in,out] resource
 523  *   Pointer to the modify-header resource.
 524  * @param[in] action
 525  *   Pointer to action specification.
 526  * @param[in] items
 527  *   Pointer to rte_flow_item objects list.
 528  * @param[in] attr
 529  *   Pointer to flow attributes structure.
 530  * @param[out] error
 531  *   Pointer to the error structure.
 532  *
 533  * @return
 534  *   0 on success, a negative errno value otherwise and rte_errno is set.
 535  */
 536 static int
 537 flow_dv_convert_action_modify_ttl
 538                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 539                          const struct rte_flow_action *action,
 540                          const struct rte_flow_item *items,
 541                          union flow_dv_attr *attr,
 542                          struct rte_flow_error *error)
 543 {
 544         const struct rte_flow_action_set_ttl *conf =
 545                 (const struct rte_flow_action_set_ttl *)(action->conf);
 546         struct rte_flow_item item;
 547         struct rte_flow_item_ipv4 ipv4;
 548         struct rte_flow_item_ipv4 ipv4_mask;
 549         struct rte_flow_item_ipv6 ipv6;
 550         struct rte_flow_item_ipv6 ipv6_mask;
 551         struct field_modify_info *field;
 552
 553         if (!attr->valid)
 554                 flow_dv_attr_init(items, attr);
 555         if (attr->ipv4) {
 556                 memset(&ipv4, 0, sizeof(ipv4));
 557                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 558                 ipv4.hdr.time_to_live = conf->ttl_value;
 559                 ipv4_mask.hdr.time_to_live = 0xFF;
 560                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 561                 item.spec = &ipv4;
 562                 item.mask = &ipv4_mask;
 563                 field = modify_ipv4;
 564         }
 565         if (attr->ipv6) {
 566                 memset(&ipv6, 0, sizeof(ipv6));
 567                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 568                 ipv6.hdr.hop_limits = conf->ttl_value;
 569                 ipv6_mask.hdr.hop_limits = 0xFF;
 570                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 571                 item.spec = &ipv6;
 572                 item.mask = &ipv6_mask;
 573                 field = modify_ipv6;
 574         }
 575         return flow_dv_convert_modify_action(&item, field, resource,
 576                                              MLX5_MODIFICATION_TYPE_SET, error);
 577 }
 578
 579 /**
 580  * Convert modify-header decrement TTL action to DV specification.
 581  *
 582  * @param[in,out] resource
 583  *   Pointer to the modify-header resource.
 584  * @param[in] action
 585  *   Pointer to action specification.
 586  * @param[in] items
 587  *   Pointer to rte_flow_item objects list.
 588  * @param[in] attr
 589  *   Pointer to flow attributes structure.
 590  * @param[out] error
 591  *   Pointer to the error structure.
 592  *
 593  * @return
 594  *   0 on success, a negative errno value otherwise and rte_errno is set.
 595  */
 596 static int
 597 flow_dv_convert_action_modify_dec_ttl
 598                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 599                          const struct rte_flow_item *items,
 600                          union flow_dv_attr *attr,
 601                          struct rte_flow_error *error)
 602 {
 603         struct rte_flow_item item;
 604         struct rte_flow_item_ipv4 ipv4;
 605         struct rte_flow_item_ipv4 ipv4_mask;
 606         struct rte_flow_item_ipv6 ipv6;
 607         struct rte_flow_item_ipv6 ipv6_mask;
 608         struct field_modify_info *field;
 609
 610         if (!attr->valid)
 611                 flow_dv_attr_init(items, attr);
 612         if (attr->ipv4) {
 613                 memset(&ipv4, 0, sizeof(ipv4));
 614                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 615                 ipv4.hdr.time_to_live = 0xFF;
 616                 ipv4_mask.hdr.time_to_live = 0xFF;
 617                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 618                 item.spec = &ipv4;
 619                 item.mask = &ipv4_mask;
 620                 field = modify_ipv4;
 621         }
 622         if (attr->ipv6) {
 623                 memset(&ipv6, 0, sizeof(ipv6));
 624                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 625                 ipv6.hdr.hop_limits = 0xFF;
 626                 ipv6_mask.hdr.hop_limits = 0xFF;
 627                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 628                 item.spec = &ipv6;
 629                 item.mask = &ipv6_mask;
 630                 field = modify_ipv6;
 631         }
 632         return flow_dv_convert_modify_action(&item, field, resource,
 633                                              MLX5_MODIFICATION_TYPE_ADD, error);
 634 }
 635
 636 /**
 637  * Convert modify-header increment/decrement TCP Sequence number
 638  * to DV specification.
 639  *
 640  * @param[in,out] resource
 641  *   Pointer to the modify-header resource.
 642  * @param[in] action
 643  *   Pointer to action specification.
 644  * @param[out] error
 645  *   Pointer to the error structure.
 646  *
 647  * @return
 648  *   0 on success, a negative errno value otherwise and rte_errno is set.
 649  */
 650 static int
 651 flow_dv_convert_action_modify_tcp_seq
 652                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 653                          const struct rte_flow_action *action,
 654                          struct rte_flow_error *error)
 655 {
 656         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 657         uint64_t value = rte_be_to_cpu_32(*conf);
 658         struct rte_flow_item item;
 659         struct rte_flow_item_tcp tcp;
 660         struct rte_flow_item_tcp tcp_mask;
 661
 662         memset(&tcp, 0, sizeof(tcp));
 663         memset(&tcp_mask, 0, sizeof(tcp_mask));
 664         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 665                 /*
 666                  * The HW has no decrement operation, only increment operation.
 667                  * To simulate decrement X from Y using increment operation
 668                  * we need to add UINT32_MAX X times to Y.
 669                  * Each adding of UINT32_MAX decrements Y by 1.
 670                  */
 671                 value *= UINT32_MAX;
 672         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 673         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 674         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 675         item.spec = &tcp;
 676         item.mask = &tcp_mask;
 677         return flow_dv_convert_modify_action(&item, modify_tcp, resource,
 678                                              MLX5_MODIFICATION_TYPE_ADD, error);
 679 }
 680
 681 /**
 682  * Convert modify-header increment/decrement TCP Acknowledgment number
 683  * to DV specification.
 684  *
 685  * @param[in,out] resource
 686  *   Pointer to the modify-header resource.
 687  * @param[in] action
 688  *   Pointer to action specification.
 689  * @param[out] error
 690  *   Pointer to the error structure.
 691  *
 692  * @return
 693  *   0 on success, a negative errno value otherwise and rte_errno is set.
 694  */
 695 static int
 696 flow_dv_convert_action_modify_tcp_ack
 697                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 698                          const struct rte_flow_action *action,
 699                          struct rte_flow_error *error)
 700 {
 701         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 702         uint64_t value = rte_be_to_cpu_32(*conf);
 703         struct rte_flow_item item;
 704         struct rte_flow_item_tcp tcp;
 705         struct rte_flow_item_tcp tcp_mask;
 706
 707         memset(&tcp, 0, sizeof(tcp));
 708         memset(&tcp_mask, 0, sizeof(tcp_mask));
 709         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 710                 /*
 711                  * The HW has no decrement operation, only increment operation.
 712                  * To simulate decrement X from Y using increment operation
 713                  * we need to add UINT32_MAX X times to Y.
 714                  * Each adding of UINT32_MAX decrements Y by 1.
 715                  */
 716                 value *= UINT32_MAX;
 717         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 718         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 719         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 720         item.spec = &tcp;
 721         item.mask = &tcp_mask;
 722         return flow_dv_convert_modify_action(&item, modify_tcp, resource,
 723                                              MLX5_MODIFICATION_TYPE_ADD, error);
 724 }
 725
 726 /**
 727  * Validate META item.
 728  *
 729  * @param[in] dev
 730  *   Pointer to the rte_eth_dev structure.
 731  * @param[in] item
 732  *   Item specification.
 733  * @param[in] attr
 734  *   Attributes of flow that includes this item.
 735  * @param[out] error
 736  *   Pointer to error structure.
 737  *
 738  * @return
 739  *   0 on success, a negative errno value otherwise and rte_errno is set.
 740  */
 741 static int
 742 flow_dv_validate_item_meta(struct rte_eth_dev *dev,
 743                            const struct rte_flow_item *item,
 744                            const struct rte_flow_attr *attr,
 745                            struct rte_flow_error *error)
 746 {
 747         const struct rte_flow_item_meta *spec = item->spec;
 748         const struct rte_flow_item_meta *mask = item->mask;
 749         const struct rte_flow_item_meta nic_mask = {
 750                 .data = RTE_BE32(UINT32_MAX)
 751         };
 752         int ret;
 753         uint64_t offloads = dev->data->dev_conf.txmode.offloads;
 754
 755         if (!(offloads & DEV_TX_OFFLOAD_MATCH_METADATA))
 756                 return rte_flow_error_set(error, EPERM,
 757                                           RTE_FLOW_ERROR_TYPE_ITEM,
 758                                           NULL,
 759                                           "match on metadata offload "
 760                                           "configuration is off for this port");
 761         if (!spec)
 762                 return rte_flow_error_set(error, EINVAL,
 763                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
 764                                           item->spec,
 765                                           "data cannot be empty");
 766         if (!spec->data)
 767                 return rte_flow_error_set(error, EINVAL,
 768                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
 769                                           NULL,
 770                                           "data cannot be zero");
 771         if (!mask)
 772                 mask = &rte_flow_item_meta_mask;
 773         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
 774                                         (const uint8_t *)&nic_mask,
 775                                         sizeof(struct rte_flow_item_meta),
 776                                         error);
 777         if (ret < 0)
 778                 return ret;
 779         if (attr->ingress)
 780                 return rte_flow_error_set(error, ENOTSUP,
 781                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
 782                                           NULL,
 783                                           "pattern not supported for ingress");
 784         return 0;
 785 }
 786
 787 /**
 788  * Validate vport item.
 789  *
 790  * @param[in] dev
 791  *   Pointer to the rte_eth_dev structure.
 792  * @param[in] item
 793  *   Item specification.
 794  * @param[in] attr
 795  *   Attributes of flow that includes this item.
 796  * @param[in] item_flags
 797  *   Bit-fields that holds the items detected until now.
 798  * @param[out] error
 799  *   Pointer to error structure.
 800  *
 801  * @return
 802  *   0 on success, a negative errno value otherwise and rte_errno is set.
 803  */
 804 static int
 805 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
 806                               const struct rte_flow_item *item,
 807                               const struct rte_flow_attr *attr,
 808                               uint64_t item_flags,
 809                               struct rte_flow_error *error)
 810 {
 811         const struct rte_flow_item_port_id *spec = item->spec;
 812         const struct rte_flow_item_port_id *mask = item->mask;
 813         const struct rte_flow_item_port_id switch_mask = {
 814                         .id = 0xffffffff,
 815         };
 816         struct mlx5_priv *esw_priv;
 817         struct mlx5_priv *dev_priv;
 818         int ret;
 819
 820         if (!attr->transfer)
 821                 return rte_flow_error_set(error, EINVAL,
 822                                           RTE_FLOW_ERROR_TYPE_ITEM,
 823                                           NULL,
 824                                           "match on port id is valid only"
 825                                           " when transfer flag is enabled");
 826         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
 827                 return rte_flow_error_set(error, ENOTSUP,
 828                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
 829                                           "multiple source ports are not"
 830                                           " supported");
 831         if (!mask)
 832                 mask = &switch_mask;
 833         if (mask->id != 0xffffffff)
 834                 return rte_flow_error_set(error, ENOTSUP,
 835                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
 836                                            mask,
 837                                            "no support for partial mask on"
 838                                            " \"id\" field");
 839         ret = mlx5_flow_item_acceptable
 840                                 (item, (const uint8_t *)mask,
 841                                  (const uint8_t *)&rte_flow_item_port_id_mask,
 842                                  sizeof(struct rte_flow_item_port_id),
 843                                  error);
 844         if (ret)
 845                 return ret;
 846         if (!spec)
 847                 return 0;
 848         esw_priv = mlx5_port_to_eswitch_info(spec->id);
 849         if (!esw_priv)
 850                 return rte_flow_error_set(error, rte_errno,
 851                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
 852                                           "failed to obtain E-Switch info for"
 853                                           " port");
 854         dev_priv = mlx5_dev_to_eswitch_info(dev);
 855         if (!dev_priv)
 856                 return rte_flow_error_set(error, rte_errno,
 857                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 858                                           NULL,
 859                                           "failed to obtain E-Switch info");
 860         if (esw_priv->domain_id != dev_priv->domain_id)
 861                 return rte_flow_error_set(error, EINVAL,
 862                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
 863                                           "cannot match on a port from a"
 864                                           " different E-Switch");
 865         return 0;
 866 }
 867
 868 /**
 869  * Validate the pop VLAN action.
 870  *
 871  * @param[in] dev
 872  *   Pointer to the rte_eth_dev structure.
 873  * @param[in] action_flags
 874  *   Holds the actions detected until now.
 875  * @param[in] action
 876  *   Pointer to the pop vlan action.
 877  * @param[in] item_flags
 878  *   The items found in this flow rule.
 879  * @param[in] attr
 880  *   Pointer to flow attributes.
 881  * @param[out] error
 882  *   Pointer to error structure.
 883  *
 884  * @return
 885  *   0 on success, a negative errno value otherwise and rte_errno is set.
 886  */
 887 static int
 888 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
 889                                  uint64_t action_flags,
 890                                  const struct rte_flow_action *action,
 891                                  uint64_t item_flags,
 892                                  const struct rte_flow_attr *attr,
 893                                  struct rte_flow_error *error)
 894 {
 895         struct mlx5_priv *priv = dev->data->dev_private;
 896
 897         (void)action;
 898         (void)attr;
 899         if (!priv->sh->pop_vlan_action)
 900                 return rte_flow_error_set(error, ENOTSUP,
 901                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 902                                           NULL,
 903                                           "pop vlan action is not supported");
 904         /*
 905          * Check for inconsistencies:
 906          *  fail strip_vlan in a flow that matches packets without VLAN tags.
 907          *  fail strip_vlan in a flow that matches packets without explicitly a
 908          *  matching on VLAN tag ?
 909          */
 910         if (action_flags & MLX5_FLOW_ACTION_OF_POP_VLAN)
 911                 return rte_flow_error_set(error, ENOTSUP,
 912                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 913                                           NULL,
 914                                           "no support for multiple vlan pop "
 915                                           "actions");
 916         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
 917                 return rte_flow_error_set(error, ENOTSUP,
 918                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 919                                           NULL,
 920                                           "cannot pop vlan without a "
 921                                           "match on (outer) vlan in the flow");
 922         return 0;
 923 }
 924
 925 /**
 926  * Get VLAN default info from vlan match info.
 927  *
 928  * @param[in] dev
 929  *   Pointer to the rte_eth_dev structure.
 930  * @param[in] item
 931  *   the list of item specifications.
 932  * @param[out] vlan
 933  *   pointer VLAN info to fill to.
 934  * @param[out] error
 935  *   Pointer to error structure.
 936  *
 937  * @return
 938  *   0 on success, a negative errno value otherwise and rte_errno is set.
 939  */
 940 static void
 941 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
 942                                   struct rte_vlan_hdr *vlan)
 943 {
 944         const struct rte_flow_item_vlan nic_mask = {
 945                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
 946                                 MLX5DV_FLOW_VLAN_VID_MASK),
 947                 .inner_type = RTE_BE16(0xffff),
 948         };
 949
 950         if (items == NULL)
 951                 return;
 952         for (; items->type != RTE_FLOW_ITEM_TYPE_END &&
 953                items->type != RTE_FLOW_ITEM_TYPE_VLAN; items++)
 954                 ;
 955         if (items->type == RTE_FLOW_ITEM_TYPE_VLAN) {
 956                 const struct rte_flow_item_vlan *vlan_m = items->mask;
 957                 const struct rte_flow_item_vlan *vlan_v = items->spec;
 958
 959                 if (!vlan_m)
 960                         vlan_m = &nic_mask;
 961                 /* Only full match values are accepted */
 962                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
 963                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
 964                         vlan->vlan_tci &= MLX5DV_FLOW_VLAN_PCP_MASK;
 965                         vlan->vlan_tci |=
 966                                 rte_be_to_cpu_16(vlan_v->tci &
 967                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
 968                 }
 969                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
 970                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
 971                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 972                         vlan->vlan_tci |=
 973                                 rte_be_to_cpu_16(vlan_v->tci &
 974                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
 975                 }
 976                 if (vlan_m->inner_type == nic_mask.inner_type)
 977                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
 978                                                            vlan_m->inner_type);
 979         }
 980 }
 981
 982 /**
 983  * Validate the push VLAN action.
 984  *
 985  * @param[in] action_flags
 986  *   Holds the actions detected until now.
 987  * @param[in] action
 988  *   Pointer to the encap action.
 989  * @param[in] attr
 990  *   Pointer to flow attributes
 991  * @param[out] error
 992  *   Pointer to error structure.
 993  *
 994  * @return
 995  *   0 on success, a negative errno value otherwise and rte_errno is set.
 996  */
 997 static int
 998 flow_dv_validate_action_push_vlan(uint64_t action_flags,
 999                                   const struct rte_flow_action *action,
1000                                   const struct rte_flow_attr *attr,
1001                                   struct rte_flow_error *error)
1002 {
1003         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
1004
1005         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
1006             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
1007                 return rte_flow_error_set(error, EINVAL,
1008                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1009                                           "invalid vlan ethertype");
1010         if (action_flags &
1011                 (MLX5_FLOW_ACTION_OF_POP_VLAN | MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1012                 return rte_flow_error_set(error, ENOTSUP,
1013                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1014                                           "no support for multiple VLAN "
1015                                           "actions");
1016         (void)attr;
1017         return 0;
1018 }
1019
1020 /**
1021  * Validate the set VLAN PCP.
1022  *
1023  * @param[in] action_flags
1024  *   Holds the actions detected until now.
1025  * @param[in] actions
1026  *   Pointer to the list of actions remaining in the flow rule.
1027  * @param[in] attr
1028  *   Pointer to flow attributes
1029  * @param[out] error
1030  *   Pointer to error structure.
1031  *
1032  * @return
1033  *   0 on success, a negative errno value otherwise and rte_errno is set.
1034  */
1035 static int
1036 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
1037                                      const struct rte_flow_action actions[],
1038                                      struct rte_flow_error *error)
1039 {
1040         const struct rte_flow_action *action = actions;
1041         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
1042
1043         if (conf->vlan_pcp > 7)
1044                 return rte_flow_error_set(error, EINVAL,
1045                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1046                                           "VLAN PCP value is too big");
1047         if (mlx5_flow_find_action(actions,
1048                                   RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN) == NULL)
1049                 return rte_flow_error_set(error, ENOTSUP,
1050                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1051                                           "set VLAN PCP can only be used "
1052                                           "with push VLAN action");
1053         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
1054                 return rte_flow_error_set(error, ENOTSUP,
1055                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1056                                           "set VLAN PCP action must precede "
1057                                           "the push VLAN action");
1058         return 0;
1059 }
1060
1061 /**
1062  * Validate the set VLAN VID.
1063  *
1064  * @param[in] item_flags
1065  *   Holds the items detected in this rule.
1066  * @param[in] actions
1067  *   Pointer to the list of actions remaining in the flow rule.
1068  * @param[in] attr
1069  *   Pointer to flow attributes
1070  * @param[out] error
1071  *   Pointer to error structure.
1072  *
1073  * @return
1074  *   0 on success, a negative errno value otherwise and rte_errno is set.
1075  */
1076 static int
1077 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
1078                                      const struct rte_flow_action actions[],
1079                                      struct rte_flow_error *error)
1080 {
1081         const struct rte_flow_action *action = actions;
1082         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
1083
1084         if (conf->vlan_vid > RTE_BE16(0xFFE))
1085                 return rte_flow_error_set(error, EINVAL,
1086                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1087                                           "VLAN VID value is too big");
1088         /* If a push VLAN action follows then it will handle this action */
1089         if (mlx5_flow_find_action(actions,
1090                                   RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN))
1091                 return 0;
1092
1093         /*
1094          * Action is on an existing VLAN header:
1095          *    Need to verify this is a single modify CID action.
1096          *   Rule mast include a match on outer VLAN.
1097          */
1098         if (mlx5_flow_find_action(++action,
1099                                   RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID))
1100                 return rte_flow_error_set(error, ENOTSUP,
1101                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1102                                           "Multiple VLAN VID modifications are "
1103                                           "not supported");
1104         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1105                 return rte_flow_error_set(error, EINVAL,
1106                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1107                                           "match on VLAN is required in order "
1108                                           "to set VLAN VID");
1109         return 0;
1110 }
1111
1112 /**
1113  * Validate count action.
1114  *
1115  * @param[in] dev
1116  *   device otr.
1117  * @param[out] error
1118  *   Pointer to error structure.
1119  *
1120  * @return
1121  *   0 on success, a negative errno value otherwise and rte_errno is set.
1122  */
1123 static int
1124 flow_dv_validate_action_count(struct rte_eth_dev *dev,
1125                               struct rte_flow_error *error)
1126 {
1127         struct mlx5_priv *priv = dev->data->dev_private;
1128
1129         if (!priv->config.devx)
1130                 goto notsup_err;
1131 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
1132         return 0;
1133 #endif
1134 notsup_err:
1135         return rte_flow_error_set
1136                       (error, ENOTSUP,
1137                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1138                        NULL,
1139                        "count action not supported");
1140 }
1141
1142 /**
1143  * Validate the L2 encap action.
1144  *
1145  * @param[in] action_flags
1146  *   Holds the actions detected until now.
1147  * @param[in] action
1148  *   Pointer to the encap action.
1149  * @param[in] attr
1150  *   Pointer to flow attributes
1151  * @param[out] error
1152  *   Pointer to error structure.
1153  *
1154  * @return
1155  *   0 on success, a negative errno value otherwise and rte_errno is set.
1156  */
1157 static int
1158 flow_dv_validate_action_l2_encap(uint64_t action_flags,
1159                                  const struct rte_flow_action *action,
1160                                  const struct rte_flow_attr *attr,
1161                                  struct rte_flow_error *error)
1162 {
1163         if (!(action->conf))
1164                 return rte_flow_error_set(error, EINVAL,
1165                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1166                                           "configuration cannot be null");
1167         if (action_flags & MLX5_FLOW_ACTION_DROP)
1168                 return rte_flow_error_set(error, EINVAL,
1169                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1170                                           "can't drop and encap in same flow");
1171         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
1172                 return rte_flow_error_set(error, EINVAL,
1173                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1174                                           "can only have a single encap or"
1175                                           " decap action in a flow");
1176         if (!attr->transfer && attr->ingress)
1177                 return rte_flow_error_set(error, ENOTSUP,
1178                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1179                                           NULL,
1180                                           "encap action not supported for "
1181                                           "ingress");
1182         return 0;
1183 }
1184
1185 /**
1186  * Validate the L2 decap action.
1187  *
1188  * @param[in] action_flags
1189  *   Holds the actions detected until now.
1190  * @param[in] attr
1191  *   Pointer to flow attributes
1192  * @param[out] error
1193  *   Pointer to error structure.
1194  *
1195  * @return
1196  *   0 on success, a negative errno value otherwise and rte_errno is set.
1197  */
1198 static int
1199 flow_dv_validate_action_l2_decap(uint64_t action_flags,
1200                                  const struct rte_flow_attr *attr,
1201                                  struct rte_flow_error *error)
1202 {
1203         if (action_flags & MLX5_FLOW_ACTION_DROP)
1204                 return rte_flow_error_set(error, EINVAL,
1205                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1206                                           "can't drop and decap in same flow");
1207         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
1208                 return rte_flow_error_set(error, EINVAL,
1209                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1210                                           "can only have a single encap or"
1211                                           " decap action in a flow");
1212         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
1213                 return rte_flow_error_set(error, EINVAL,
1214                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1215                                           "can't have decap action after"
1216                                           " modify action");
1217         if (attr->egress)
1218                 return rte_flow_error_set(error, ENOTSUP,
1219                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
1220                                           NULL,
1221                                           "decap action not supported for "
1222                                           "egress");
1223         return 0;
1224 }
1225
1226 /**
1227  * Validate the raw encap action.
1228  *
1229  * @param[in] action_flags
1230  *   Holds the actions detected until now.
1231  * @param[in] action
1232  *   Pointer to the encap action.
1233  * @param[in] attr
1234  *   Pointer to flow attributes
1235  * @param[out] error
1236  *   Pointer to error structure.
1237  *
1238  * @return
1239  *   0 on success, a negative errno value otherwise and rte_errno is set.
1240  */
1241 static int
1242 flow_dv_validate_action_raw_encap(uint64_t action_flags,
1243                                   const struct rte_flow_action *action,
1244                                   const struct rte_flow_attr *attr,
1245                                   struct rte_flow_error *error)
1246 {
1247         const struct rte_flow_action_raw_encap *raw_encap =
1248                 (const struct rte_flow_action_raw_encap *)action->conf;
1249         if (!(action->conf))
1250                 return rte_flow_error_set(error, EINVAL,
1251                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1252                                           "configuration cannot be null");
1253         if (action_flags & MLX5_FLOW_ACTION_DROP)
1254                 return rte_flow_error_set(error, EINVAL,
1255                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1256                                           "can't drop and encap in same flow");
1257         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
1258                 return rte_flow_error_set(error, EINVAL,
1259                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1260                                           "can only have a single encap"
1261                                           " action in a flow");
1262         /* encap without preceding decap is not supported for ingress */
1263         if (!attr->transfer &&  attr->ingress &&
1264             !(action_flags & MLX5_FLOW_ACTION_RAW_DECAP))
1265                 return rte_flow_error_set(error, ENOTSUP,
1266                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1267                                           NULL,
1268                                           "encap action not supported for "
1269                                           "ingress");
1270         if (!raw_encap->size || !raw_encap->data)
1271                 return rte_flow_error_set(error, EINVAL,
1272                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1273                                           "raw encap data cannot be empty");
1274         return 0;
1275 }
1276
1277 /**
1278  * Validate the raw decap action.
1279  *
1280  * @param[in] action_flags
1281  *   Holds the actions detected until now.
1282  * @param[in] action
1283  *   Pointer to the encap action.
1284  * @param[in] attr
1285  *   Pointer to flow attributes
1286  * @param[out] error
1287  *   Pointer to error structure.
1288  *
1289  * @return
1290  *   0 on success, a negative errno value otherwise and rte_errno is set.
1291  */
1292 static int
1293 flow_dv_validate_action_raw_decap(uint64_t action_flags,
1294                                   const struct rte_flow_action *action,
1295                                   const struct rte_flow_attr *attr,
1296                                   struct rte_flow_error *error)
1297 {
1298         if (action_flags & MLX5_FLOW_ACTION_DROP)
1299                 return rte_flow_error_set(error, EINVAL,
1300                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1301                                           "can't drop and decap in same flow");
1302         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
1303                 return rte_flow_error_set(error, EINVAL,
1304                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1305                                           "can't have encap action before"
1306                                           " decap action");
1307         if (action_flags & MLX5_FLOW_DECAP_ACTIONS)
1308                 return rte_flow_error_set(error, EINVAL,
1309                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1310                                           "can only have a single decap"
1311                                           " action in a flow");
1312         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
1313                 return rte_flow_error_set(error, EINVAL,
1314                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1315                                           "can't have decap action after"
1316                                           " modify action");
1317         /* decap action is valid on egress only if it is followed by encap */
1318         if (attr->egress) {
1319                 for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
1320                        action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
1321                        action++) {
1322                 }
1323                 if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP)
1324                         return rte_flow_error_set
1325                                         (error, ENOTSUP,
1326                                          RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
1327                                          NULL, "decap action not supported"
1328                                          " for egress");
1329         }
1330         return 0;
1331 }
1332
1333 /**
1334  * Find existing encap/decap resource or create and register a new one.
1335  *
1336  * @param dev[in, out]
1337  *   Pointer to rte_eth_dev structure.
1338  * @param[in, out] resource
1339  *   Pointer to encap/decap resource.
1340  * @parm[in, out] dev_flow
1341  *   Pointer to the dev_flow.
1342  * @param[out] error
1343  *   pointer to error structure.
1344  *
1345  * @return
1346  *   0 on success otherwise -errno and errno is set.
1347  */
1348 static int
1349 flow_dv_encap_decap_resource_register
1350                         (struct rte_eth_dev *dev,
1351                          struct mlx5_flow_dv_encap_decap_resource *resource,
1352                          struct mlx5_flow *dev_flow,
1353                          struct rte_flow_error *error)
1354 {
1355         struct mlx5_priv *priv = dev->data->dev_private;
1356         struct mlx5_ibv_shared *sh = priv->sh;
1357         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
1358         struct rte_flow *flow = dev_flow->flow;
1359         struct mlx5dv_dr_domain *domain;
1360
1361         resource->flags = flow->group ? 0 : 1;
1362         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
1363                 domain = sh->fdb_domain;
1364         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
1365                 domain = sh->rx_domain;
1366         else
1367                 domain = sh->tx_domain;
1368
1369         /* Lookup a matching resource from cache. */
1370         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
1371                 if (resource->reformat_type == cache_resource->reformat_type &&
1372                     resource->ft_type == cache_resource->ft_type &&
1373                     resource->flags == cache_resource->flags &&
1374                     resource->size == cache_resource->size &&
1375                     !memcmp((const void *)resource->buf,
1376                             (const void *)cache_resource->buf,
1377                             resource->size)) {
1378                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
1379                                 (void *)cache_resource,
1380                                 rte_atomic32_read(&cache_resource->refcnt));
1381                         rte_atomic32_inc(&cache_resource->refcnt);
1382                         dev_flow->dv.encap_decap = cache_resource;
1383                         return 0;
1384                 }
1385         }
1386         /* Register new encap/decap resource. */
1387         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
1388         if (!cache_resource)
1389                 return rte_flow_error_set(error, ENOMEM,
1390                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1391                                           "cannot allocate resource memory");
1392         *cache_resource = *resource;
1393         cache_resource->verbs_action =
1394                 mlx5_glue->dv_create_flow_action_packet_reformat
1395                         (sh->ctx, cache_resource->reformat_type,
1396                          cache_resource->ft_type, domain, cache_resource->flags,
1397                          cache_resource->size,
1398                          (cache_resource->size ? cache_resource->buf : NULL));
1399         if (!cache_resource->verbs_action) {
1400                 rte_free(cache_resource);
1401                 return rte_flow_error_set(error, ENOMEM,
1402                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1403                                           NULL, "cannot create action");
1404         }
1405         rte_atomic32_init(&cache_resource->refcnt);
1406         rte_atomic32_inc(&cache_resource->refcnt);
1407         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
1408         dev_flow->dv.encap_decap = cache_resource;
1409         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
1410                 (void *)cache_resource,
1411                 rte_atomic32_read(&cache_resource->refcnt));
1412         return 0;
1413 }
1414
1415 /**
1416  * Find existing table jump resource or create and register a new one.
1417  *
1418  * @param dev[in, out]
1419  *   Pointer to rte_eth_dev structure.
1420  * @param[in, out] resource
1421  *   Pointer to jump table resource.
1422  * @parm[in, out] dev_flow
1423  *   Pointer to the dev_flow.
1424  * @param[out] error
1425  *   pointer to error structure.
1426  *
1427  * @return
1428  *   0 on success otherwise -errno and errno is set.
1429  */
1430 static int
1431 flow_dv_jump_tbl_resource_register
1432                         (struct rte_eth_dev *dev,
1433                          struct mlx5_flow_dv_jump_tbl_resource *resource,
1434                          struct mlx5_flow *dev_flow,
1435                          struct rte_flow_error *error)
1436 {
1437         struct mlx5_priv *priv = dev->data->dev_private;
1438         struct mlx5_ibv_shared *sh = priv->sh;
1439         struct mlx5_flow_dv_jump_tbl_resource *cache_resource;
1440
1441         /* Lookup a matching resource from cache. */
1442         LIST_FOREACH(cache_resource, &sh->jump_tbl, next) {
1443                 if (resource->tbl == cache_resource->tbl) {
1444                         DRV_LOG(DEBUG, "jump table resource resource %p: refcnt %d++",
1445                                 (void *)cache_resource,
1446                                 rte_atomic32_read(&cache_resource->refcnt));
1447                         rte_atomic32_inc(&cache_resource->refcnt);
1448                         dev_flow->dv.jump = cache_resource;
1449                         return 0;
1450                 }
1451         }
1452         /* Register new jump table resource. */
1453         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
1454         if (!cache_resource)
1455                 return rte_flow_error_set(error, ENOMEM,
1456                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1457                                           "cannot allocate resource memory");
1458         *cache_resource = *resource;
1459         cache_resource->action =
1460                 mlx5_glue->dr_create_flow_action_dest_flow_tbl
1461                 (resource->tbl->obj);
1462         if (!cache_resource->action) {
1463                 rte_free(cache_resource);
1464                 return rte_flow_error_set(error, ENOMEM,
1465                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1466                                           NULL, "cannot create action");
1467         }
1468         rte_atomic32_init(&cache_resource->refcnt);
1469         rte_atomic32_inc(&cache_resource->refcnt);
1470         LIST_INSERT_HEAD(&sh->jump_tbl, cache_resource, next);
1471         dev_flow->dv.jump = cache_resource;
1472         DRV_LOG(DEBUG, "new jump table  resource %p: refcnt %d++",
1473                 (void *)cache_resource,
1474                 rte_atomic32_read(&cache_resource->refcnt));
1475         return 0;
1476 }
1477
1478 /**
1479  * Find existing table port ID resource or create and register a new one.
1480  *
1481  * @param dev[in, out]
1482  *   Pointer to rte_eth_dev structure.
1483  * @param[in, out] resource
1484  *   Pointer to port ID action resource.
1485  * @parm[in, out] dev_flow
1486  *   Pointer to the dev_flow.
1487  * @param[out] error
1488  *   pointer to error structure.
1489  *
1490  * @return
1491  *   0 on success otherwise -errno and errno is set.
1492  */
1493 static int
1494 flow_dv_port_id_action_resource_register
1495                         (struct rte_eth_dev *dev,
1496                          struct mlx5_flow_dv_port_id_action_resource *resource,
1497                          struct mlx5_flow *dev_flow,
1498                          struct rte_flow_error *error)
1499 {
1500         struct mlx5_priv *priv = dev->data->dev_private;
1501         struct mlx5_ibv_shared *sh = priv->sh;
1502         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
1503
1504         /* Lookup a matching resource from cache. */
1505         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
1506                 if (resource->port_id == cache_resource->port_id) {
1507                         DRV_LOG(DEBUG, "port id action resource resource %p: "
1508                                 "refcnt %d++",
1509                                 (void *)cache_resource,
1510                                 rte_atomic32_read(&cache_resource->refcnt));
1511                         rte_atomic32_inc(&cache_resource->refcnt);
1512                         dev_flow->dv.port_id_action = cache_resource;
1513                         return 0;
1514                 }
1515         }
1516         /* Register new port id action resource. */
1517         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
1518         if (!cache_resource)
1519                 return rte_flow_error_set(error, ENOMEM,
1520                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1521                                           "cannot allocate resource memory");
1522         *cache_resource = *resource;
1523         cache_resource->action =
1524                 mlx5_glue->dr_create_flow_action_dest_vport
1525                         (priv->sh->fdb_domain, resource->port_id);
1526         if (!cache_resource->action) {
1527                 rte_free(cache_resource);
1528                 return rte_flow_error_set(error, ENOMEM,
1529                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1530                                           NULL, "cannot create action");
1531         }
1532         rte_atomic32_init(&cache_resource->refcnt);
1533         rte_atomic32_inc(&cache_resource->refcnt);
1534         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
1535         dev_flow->dv.port_id_action = cache_resource;
1536         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
1537                 (void *)cache_resource,
1538                 rte_atomic32_read(&cache_resource->refcnt));
1539         return 0;
1540 }
1541
1542 /**
1543  * Find existing push vlan resource or create and register a new one.
1544  *
1545  * @param dev[in, out]
1546  *   Pointer to rte_eth_dev structure.
1547  * @param[in, out] resource
1548  *   Pointer to port ID action resource.
1549  * @parm[in, out] dev_flow
1550  *   Pointer to the dev_flow.
1551  * @param[out] error
1552  *   pointer to error structure.
1553  *
1554  * @return
1555  *   0 on success otherwise -errno and errno is set.
1556  */
1557 static int
1558 flow_dv_push_vlan_action_resource_register
1559                        (struct rte_eth_dev *dev,
1560                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
1561                         struct mlx5_flow *dev_flow,
1562                         struct rte_flow_error *error)
1563 {
1564         struct mlx5_priv *priv = dev->data->dev_private;
1565         struct mlx5_ibv_shared *sh = priv->sh;
1566         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource;
1567         struct mlx5dv_dr_domain *domain;
1568
1569         /* Lookup a matching resource from cache. */
1570         LIST_FOREACH(cache_resource, &sh->push_vlan_action_list, next) {
1571                 if (resource->vlan_tag == cache_resource->vlan_tag &&
1572                     resource->ft_type == cache_resource->ft_type) {
1573                         DRV_LOG(DEBUG, "push-VLAN action resource resource %p: "
1574                                 "refcnt %d++",
1575                                 (void *)cache_resource,
1576                                 rte_atomic32_read(&cache_resource->refcnt));
1577                         rte_atomic32_inc(&cache_resource->refcnt);
1578                         dev_flow->dv.push_vlan_res = cache_resource;
1579                         return 0;
1580                 }
1581         }
1582         /* Register new push_vlan action resource. */
1583         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
1584         if (!cache_resource)
1585                 return rte_flow_error_set(error, ENOMEM,
1586                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1587                                           "cannot allocate resource memory");
1588         *cache_resource = *resource;
1589         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
1590                 domain = sh->fdb_domain;
1591         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
1592                 domain = sh->rx_domain;
1593         else
1594                 domain = sh->tx_domain;
1595         cache_resource->action =
1596                 mlx5_glue->dr_create_flow_action_push_vlan(domain,
1597                                                            resource->vlan_tag);
1598         if (!cache_resource->action) {
1599                 rte_free(cache_resource);
1600                 return rte_flow_error_set(error, ENOMEM,
1601                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1602                                           NULL, "cannot create action");
1603         }
1604         rte_atomic32_init(&cache_resource->refcnt);
1605         rte_atomic32_inc(&cache_resource->refcnt);
1606         LIST_INSERT_HEAD(&sh->push_vlan_action_list, cache_resource, next);
1607         dev_flow->dv.push_vlan_res = cache_resource;
1608         DRV_LOG(DEBUG, "new push vlan action resource %p: refcnt %d++",
1609                 (void *)cache_resource,
1610                 rte_atomic32_read(&cache_resource->refcnt));
1611         return 0;
1612 }
1613 /**
1614  * Get the size of specific rte_flow_item_type
1615  *
1616  * @param[in] item_type
1617  *   Tested rte_flow_item_type.
1618  *
1619  * @return
1620  *   sizeof struct item_type, 0 if void or irrelevant.
1621  */
1622 static size_t
1623 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
1624 {
1625         size_t retval;
1626
1627         switch (item_type) {
1628         case RTE_FLOW_ITEM_TYPE_ETH:
1629                 retval = sizeof(struct rte_flow_item_eth);
1630                 break;
1631         case RTE_FLOW_ITEM_TYPE_VLAN:
1632                 retval = sizeof(struct rte_flow_item_vlan);
1633                 break;
1634         case RTE_FLOW_ITEM_TYPE_IPV4:
1635                 retval = sizeof(struct rte_flow_item_ipv4);
1636                 break;
1637         case RTE_FLOW_ITEM_TYPE_IPV6:
1638                 retval = sizeof(struct rte_flow_item_ipv6);
1639                 break;
1640         case RTE_FLOW_ITEM_TYPE_UDP:
1641                 retval = sizeof(struct rte_flow_item_udp);
1642                 break;
1643         case RTE_FLOW_ITEM_TYPE_TCP:
1644                 retval = sizeof(struct rte_flow_item_tcp);
1645                 break;
1646         case RTE_FLOW_ITEM_TYPE_VXLAN:
1647                 retval = sizeof(struct rte_flow_item_vxlan);
1648                 break;
1649         case RTE_FLOW_ITEM_TYPE_GRE:
1650                 retval = sizeof(struct rte_flow_item_gre);
1651                 break;
1652         case RTE_FLOW_ITEM_TYPE_NVGRE:
1653                 retval = sizeof(struct rte_flow_item_nvgre);
1654                 break;
1655         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
1656                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
1657                 break;
1658         case RTE_FLOW_ITEM_TYPE_MPLS:
1659                 retval = sizeof(struct rte_flow_item_mpls);
1660                 break;
1661         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
1662         default:
1663                 retval = 0;
1664                 break;
1665         }
1666         return retval;
1667 }
1668
1669 #define MLX5_ENCAP_IPV4_VERSION         0x40
1670 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
1671 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
1672 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
1673 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
1674 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
1675 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
1676
1677 /**
1678  * Convert the encap action data from list of rte_flow_item to raw buffer
1679  *
1680  * @param[in] items
1681  *   Pointer to rte_flow_item objects list.
1682  * @param[out] buf
1683  *   Pointer to the output buffer.
1684  * @param[out] size
1685  *   Pointer to the output buffer size.
1686  * @param[out] error
1687  *   Pointer to the error structure.
1688  *
1689  * @return
1690  *   0 on success, a negative errno value otherwise and rte_errno is set.
1691  */
1692 static int
1693 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
1694                            size_t *size, struct rte_flow_error *error)
1695 {
1696         struct rte_ether_hdr *eth = NULL;
1697         struct rte_vlan_hdr *vlan = NULL;
1698         struct rte_ipv4_hdr *ipv4 = NULL;
1699         struct rte_ipv6_hdr *ipv6 = NULL;
1700         struct rte_udp_hdr *udp = NULL;
1701         struct rte_vxlan_hdr *vxlan = NULL;
1702         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
1703         struct rte_gre_hdr *gre = NULL;
1704         size_t len;
1705         size_t temp_size = 0;
1706
1707         if (!items)
1708                 return rte_flow_error_set(error, EINVAL,
1709                                           RTE_FLOW_ERROR_TYPE_ACTION,
1710                                           NULL, "invalid empty data");
1711         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
1712                 len = flow_dv_get_item_len(items->type);
1713                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
1714                         return rte_flow_error_set(error, EINVAL,
1715                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1716                                                   (void *)items->type,
1717                                                   "items total size is too big"
1718                                                   " for encap action");
1719                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
1720                 switch (items->type) {
1721                 case RTE_FLOW_ITEM_TYPE_ETH:
1722                         eth = (struct rte_ether_hdr *)&buf[temp_size];
1723                         break;
1724                 case RTE_FLOW_ITEM_TYPE_VLAN:
1725                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
1726                         if (!eth)
1727                                 return rte_flow_error_set(error, EINVAL,
1728                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1729                                                 (void *)items->type,
1730                                                 "eth header not found");
1731                         if (!eth->ether_type)
1732                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
1733                         break;
1734                 case RTE_FLOW_ITEM_TYPE_IPV4:
1735                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
1736                         if (!vlan && !eth)
1737                                 return rte_flow_error_set(error, EINVAL,
1738                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1739                                                 (void *)items->type,
1740                                                 "neither eth nor vlan"
1741                                                 " header found");
1742                         if (vlan && !vlan->eth_proto)
1743                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
1744                         else if (eth && !eth->ether_type)
1745                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
1746                         if (!ipv4->version_ihl)
1747                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
1748                                                     MLX5_ENCAP_IPV4_IHL_MIN;
1749                         if (!ipv4->time_to_live)
1750                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
1751                         break;
1752                 case RTE_FLOW_ITEM_TYPE_IPV6:
1753                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
1754                         if (!vlan && !eth)
1755                                 return rte_flow_error_set(error, EINVAL,
1756                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1757                                                 (void *)items->type,
1758                                                 "neither eth nor vlan"
1759                                                 " header found");
1760                         if (vlan && !vlan->eth_proto)
1761                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
1762                         else if (eth && !eth->ether_type)
1763                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
1764                         if (!ipv6->vtc_flow)
1765                                 ipv6->vtc_flow =
1766                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
1767                         if (!ipv6->hop_limits)
1768                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
1769                         break;
1770                 case RTE_FLOW_ITEM_TYPE_UDP:
1771                         udp = (struct rte_udp_hdr *)&buf[temp_size];
1772                         if (!ipv4 && !ipv6)
1773                                 return rte_flow_error_set(error, EINVAL,
1774                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1775                                                 (void *)items->type,
1776                                                 "ip header not found");
1777                         if (ipv4 && !ipv4->next_proto_id)
1778                                 ipv4->next_proto_id = IPPROTO_UDP;
1779                         else if (ipv6 && !ipv6->proto)
1780                                 ipv6->proto = IPPROTO_UDP;
1781                         break;
1782                 case RTE_FLOW_ITEM_TYPE_VXLAN:
1783                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
1784                         if (!udp)
1785                                 return rte_flow_error_set(error, EINVAL,
1786                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1787                                                 (void *)items->type,
1788                                                 "udp header not found");
1789                         if (!udp->dst_port)
1790                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
1791                         if (!vxlan->vx_flags)
1792                                 vxlan->vx_flags =
1793                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
1794                         break;
1795                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
1796                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
1797                         if (!udp)
1798                                 return rte_flow_error_set(error, EINVAL,
1799                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1800                                                 (void *)items->type,
1801                                                 "udp header not found");
1802                         if (!vxlan_gpe->proto)
1803                                 return rte_flow_error_set(error, EINVAL,
1804                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1805                                                 (void *)items->type,
1806                                                 "next protocol not found");
1807                         if (!udp->dst_port)
1808                                 udp->dst_port =
1809                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
1810                         if (!vxlan_gpe->vx_flags)
1811                                 vxlan_gpe->vx_flags =
1812                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
1813                         break;
1814                 case RTE_FLOW_ITEM_TYPE_GRE:
1815                 case RTE_FLOW_ITEM_TYPE_NVGRE:
1816                         gre = (struct rte_gre_hdr *)&buf[temp_size];
1817                         if (!gre->proto)
1818                                 return rte_flow_error_set(error, EINVAL,
1819                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1820                                                 (void *)items->type,
1821                                                 "next protocol not found");
1822                         if (!ipv4 && !ipv6)
1823                                 return rte_flow_error_set(error, EINVAL,
1824                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1825                                                 (void *)items->type,
1826                                                 "ip header not found");
1827                         if (ipv4 && !ipv4->next_proto_id)
1828                                 ipv4->next_proto_id = IPPROTO_GRE;
1829                         else if (ipv6 && !ipv6->proto)
1830                                 ipv6->proto = IPPROTO_GRE;
1831                         break;
1832                 case RTE_FLOW_ITEM_TYPE_VOID:
1833                         break;
1834                 default:
1835                         return rte_flow_error_set(error, EINVAL,
1836                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1837                                                   (void *)items->type,
1838                                                   "unsupported item type");
1839                         break;
1840                 }
1841                 temp_size += len;
1842         }
1843         *size = temp_size;
1844         return 0;
1845 }
1846
1847 static int
1848 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
1849 {
1850         struct rte_ether_hdr *eth = NULL;
1851         struct rte_vlan_hdr *vlan = NULL;
1852         struct rte_ipv6_hdr *ipv6 = NULL;
1853         struct rte_udp_hdr *udp = NULL;
1854         char *next_hdr;
1855         uint16_t proto;
1856
1857         eth = (struct rte_ether_hdr *)data;
1858         next_hdr = (char *)(eth + 1);
1859         proto = RTE_BE16(eth->ether_type);
1860
1861         /* VLAN skipping */
1862         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
1863                 vlan = (struct rte_vlan_hdr *)next_hdr;
1864                 proto = RTE_BE16(vlan->eth_proto);
1865                 next_hdr += sizeof(struct rte_vlan_hdr);
1866         }
1867
1868         /* HW calculates IPv4 csum. no need to proceed */
1869         if (proto == RTE_ETHER_TYPE_IPV4)
1870                 return 0;
1871
1872         /* non IPv4/IPv6 header. not supported */
1873         if (proto != RTE_ETHER_TYPE_IPV6) {
1874                 return rte_flow_error_set(error, ENOTSUP,
1875                                           RTE_FLOW_ERROR_TYPE_ACTION,
1876                                           NULL, "Cannot offload non IPv4/IPv6");
1877         }
1878
1879         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
1880
1881         /* ignore non UDP */
1882         if (ipv6->proto != IPPROTO_UDP)
1883                 return 0;
1884
1885         udp = (struct rte_udp_hdr *)(ipv6 + 1);
1886         udp->dgram_cksum = 0;
1887
1888         return 0;
1889 }
1890
1891 /**
1892  * Convert L2 encap action to DV specification.
1893  *
1894  * @param[in] dev
1895  *   Pointer to rte_eth_dev structure.
1896  * @param[in] action
1897  *   Pointer to action structure.
1898  * @param[in, out] dev_flow
1899  *   Pointer to the mlx5_flow.
1900  * @param[in] transfer
1901  *   Mark if the flow is E-Switch flow.
1902  * @param[out] error
1903  *   Pointer to the error structure.
1904  *
1905  * @return
1906  *   0 on success, a negative errno value otherwise and rte_errno is set.
1907  */
1908 static int
1909 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
1910                                const struct rte_flow_action *action,
1911                                struct mlx5_flow *dev_flow,
1912                                uint8_t transfer,
1913                                struct rte_flow_error *error)
1914 {
1915         const struct rte_flow_item *encap_data;
1916         const struct rte_flow_action_raw_encap *raw_encap_data;
1917         struct mlx5_flow_dv_encap_decap_resource res = {
1918                 .reformat_type =
1919                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
1920                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
1921                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
1922         };
1923
1924         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
1925                 raw_encap_data =
1926                         (const struct rte_flow_action_raw_encap *)action->conf;
1927                 res.size = raw_encap_data->size;
1928                 memcpy(res.buf, raw_encap_data->data, res.size);
1929                 if (flow_dv_zero_encap_udp_csum(res.buf, error))
1930                         return -rte_errno;
1931         } else {
1932                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
1933                         encap_data =
1934                                 ((const struct rte_flow_action_vxlan_encap *)
1935                                                 action->conf)->definition;
1936                 else
1937                         encap_data =
1938                                 ((const struct rte_flow_action_nvgre_encap *)
1939                                                 action->conf)->definition;
1940                 if (flow_dv_convert_encap_data(encap_data, res.buf,
1941                                                &res.size, error))
1942                         return -rte_errno;
1943         }
1944         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
1945                 return rte_flow_error_set(error, EINVAL,
1946                                           RTE_FLOW_ERROR_TYPE_ACTION,
1947                                           NULL, "can't create L2 encap action");
1948         return 0;
1949 }
1950
1951 /**
1952  * Convert L2 decap action to DV specification.
1953  *
1954  * @param[in] dev
1955  *   Pointer to rte_eth_dev structure.
1956  * @param[in, out] dev_flow
1957  *   Pointer to the mlx5_flow.
1958  * @param[in] transfer
1959  *   Mark if the flow is E-Switch flow.
1960  * @param[out] error
1961  *   Pointer to the error structure.
1962  *
1963  * @return
1964  *   0 on success, a negative errno value otherwise and rte_errno is set.
1965  */
1966 static int
1967 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
1968                                struct mlx5_flow *dev_flow,
1969                                uint8_t transfer,
1970                                struct rte_flow_error *error)
1971 {
1972         struct mlx5_flow_dv_encap_decap_resource res = {
1973                 .size = 0,
1974                 .reformat_type =
1975                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
1976                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
1977                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
1978         };
1979
1980         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
1981                 return rte_flow_error_set(error, EINVAL,
1982                                           RTE_FLOW_ERROR_TYPE_ACTION,
1983                                           NULL, "can't create L2 decap action");
1984         return 0;
1985 }
1986
1987 /**
1988  * Convert raw decap/encap (L3 tunnel) action to DV specification.
1989  *
1990  * @param[in] dev
1991  *   Pointer to rte_eth_dev structure.
1992  * @param[in] action
1993  *   Pointer to action structure.
1994  * @param[in, out] dev_flow
1995  *   Pointer to the mlx5_flow.
1996  * @param[in] attr
1997  *   Pointer to the flow attributes.
1998  * @param[out] error
1999  *   Pointer to the error structure.
2000  *
2001  * @return
2002  *   0 on success, a negative errno value otherwise and rte_errno is set.
2003  */
2004 static int
2005 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
2006                                 const struct rte_flow_action *action,
2007                                 struct mlx5_flow *dev_flow,
2008                                 const struct rte_flow_attr *attr,
2009                                 struct rte_flow_error *error)
2010 {
2011         const struct rte_flow_action_raw_encap *encap_data;
2012         struct mlx5_flow_dv_encap_decap_resource res;
2013
2014         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
2015         res.size = encap_data->size;
2016         memcpy(res.buf, encap_data->data, res.size);
2017         res.reformat_type = attr->egress ?
2018                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL :
2019                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2;
2020         if (attr->transfer)
2021                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
2022         else
2023                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
2024                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
2025         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2026                 return rte_flow_error_set(error, EINVAL,
2027                                           RTE_FLOW_ERROR_TYPE_ACTION,
2028                                           NULL, "can't create encap action");
2029         return 0;
2030 }
2031
2032 /**
2033  * Create action push VLAN.
2034  *
2035  * @param[in] dev
2036  *   Pointer to rte_eth_dev structure.
2037  * @param[in] vlan_tag
2038  *   the vlan tag to push to the Ethernet header.
2039  * @param[in, out] dev_flow
2040  *   Pointer to the mlx5_flow.
2041  * @param[in] attr
2042  *   Pointer to the flow attributes.
2043  * @param[out] error
2044  *   Pointer to the error structure.
2045  *
2046  * @return
2047  *   0 on success, a negative errno value otherwise and rte_errno is set.
2048  */
2049 static int
2050 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
2051                                 const struct rte_flow_attr *attr,
2052                                 const struct rte_vlan_hdr *vlan,
2053                                 struct mlx5_flow *dev_flow,
2054                                 struct rte_flow_error *error)
2055 {
2056         struct mlx5_flow_dv_push_vlan_action_resource res;
2057
2058         res.vlan_tag =
2059                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
2060                                  vlan->vlan_tci);
2061         if (attr->transfer)
2062                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
2063         else
2064                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
2065                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
2066         return flow_dv_push_vlan_action_resource_register
2067                                             (dev, &res, dev_flow, error);
2068 }
2069
2070 /**
2071  * Validate the modify-header actions.
2072  *
2073  * @param[in] action_flags
2074  *   Holds the actions detected until now.
2075  * @param[in] action
2076  *   Pointer to the modify action.
2077  * @param[out] error
2078  *   Pointer to error structure.
2079  *
2080  * @return
2081  *   0 on success, a negative errno value otherwise and rte_errno is set.
2082  */
2083 static int
2084 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
2085                                    const struct rte_flow_action *action,
2086                                    struct rte_flow_error *error)
2087 {
2088         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
2089                 return rte_flow_error_set(error, EINVAL,
2090                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2091                                           NULL, "action configuration not set");
2092         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2093                 return rte_flow_error_set(error, EINVAL,
2094                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2095                                           "can't have encap action before"
2096                                           " modify action");
2097         return 0;
2098 }
2099
2100 /**
2101  * Validate the modify-header MAC address actions.
2102  *
2103  * @param[in] action_flags
2104  *   Holds the actions detected until now.
2105  * @param[in] action
2106  *   Pointer to the modify action.
2107  * @param[in] item_flags
2108  *   Holds the items detected.
2109  * @param[out] error
2110  *   Pointer to error structure.
2111  *
2112  * @return
2113  *   0 on success, a negative errno value otherwise and rte_errno is set.
2114  */
2115 static int
2116 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
2117                                    const struct rte_flow_action *action,
2118                                    const uint64_t item_flags,
2119                                    struct rte_flow_error *error)
2120 {
2121         int ret = 0;
2122
2123         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
2124         if (!ret) {
2125                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
2126                         return rte_flow_error_set(error, EINVAL,
2127                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2128                                                   NULL,
2129                                                   "no L2 item in pattern");
2130         }
2131         return ret;
2132 }
2133
2134 /**
2135  * Validate the modify-header IPv4 address actions.
2136  *
2137  * @param[in] action_flags
2138  *   Holds the actions detected until now.
2139  * @param[in] action
2140  *   Pointer to the modify action.
2141  * @param[in] item_flags
2142  *   Holds the items detected.
2143  * @param[out] error
2144  *   Pointer to error structure.
2145  *
2146  * @return
2147  *   0 on success, a negative errno value otherwise and rte_errno is set.
2148  */
2149 static int
2150 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
2151                                     const struct rte_flow_action *action,
2152                                     const uint64_t item_flags,
2153                                     struct rte_flow_error *error)
2154 {
2155         int ret = 0;
2156
2157         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
2158         if (!ret) {
2159                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
2160                         return rte_flow_error_set(error, EINVAL,
2161                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2162                                                   NULL,
2163                                                   "no ipv4 item in pattern");
2164         }
2165         return ret;
2166 }
2167
2168 /**
2169  * Validate the modify-header IPv6 address actions.
2170  *
2171  * @param[in] action_flags
2172  *   Holds the actions detected until now.
2173  * @param[in] action
2174  *   Pointer to the modify action.
2175  * @param[in] item_flags
2176  *   Holds the items detected.
2177  * @param[out] error
2178  *   Pointer to error structure.
2179  *
2180  * @return
2181  *   0 on success, a negative errno value otherwise and rte_errno is set.
2182  */
2183 static int
2184 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
2185                                     const struct rte_flow_action *action,
2186                                     const uint64_t item_flags,
2187                                     struct rte_flow_error *error)
2188 {
2189         int ret = 0;
2190
2191         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
2192         if (!ret) {
2193                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
2194                         return rte_flow_error_set(error, EINVAL,
2195                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2196                                                   NULL,
2197                                                   "no ipv6 item in pattern");
2198         }
2199         return ret;
2200 }
2201
2202 /**
2203  * Validate the modify-header TP actions.
2204  *
2205  * @param[in] action_flags
2206  *   Holds the actions detected until now.
2207  * @param[in] action
2208  *   Pointer to the modify action.
2209  * @param[in] item_flags
2210  *   Holds the items detected.
2211  * @param[out] error
2212  *   Pointer to error structure.
2213  *
2214  * @return
2215  *   0 on success, a negative errno value otherwise and rte_errno is set.
2216  */
2217 static int
2218 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
2219                                   const struct rte_flow_action *action,
2220                                   const uint64_t item_flags,
2221                                   struct rte_flow_error *error)
2222 {
2223         int ret = 0;
2224
2225         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
2226         if (!ret) {
2227                 if (!(item_flags & MLX5_FLOW_LAYER_L4))
2228                         return rte_flow_error_set(error, EINVAL,
2229                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2230                                                   NULL, "no transport layer "
2231                                                   "in pattern");
2232         }
2233         return ret;
2234 }
2235
2236 /**
2237  * Validate the modify-header actions of increment/decrement
2238  * TCP Sequence-number.
2239  *
2240  * @param[in] action_flags
2241  *   Holds the actions detected until now.
2242  * @param[in] action
2243  *   Pointer to the modify action.
2244  * @param[in] item_flags
2245  *   Holds the items detected.
2246  * @param[out] error
2247  *   Pointer to error structure.
2248  *
2249  * @return
2250  *   0 on success, a negative errno value otherwise and rte_errno is set.
2251  */
2252 static int
2253 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
2254                                        const struct rte_flow_action *action,
2255                                        const uint64_t item_flags,
2256                                        struct rte_flow_error *error)
2257 {
2258         int ret = 0;
2259
2260         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
2261         if (!ret) {
2262                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
2263                         return rte_flow_error_set(error, EINVAL,
2264                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2265                                                   NULL, "no TCP item in"
2266                                                   " pattern");
2267                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
2268                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
2269                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
2270                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
2271                         return rte_flow_error_set(error, EINVAL,
2272                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2273                                                   NULL,
2274                                                   "cannot decrease and increase"
2275                                                   " TCP sequence number"
2276                                                   " at the same time");
2277         }
2278         return ret;
2279 }
2280
2281 /**
2282  * Validate the modify-header actions of increment/decrement
2283  * TCP Acknowledgment number.
2284  *
2285  * @param[in] action_flags
2286  *   Holds the actions detected until now.
2287  * @param[in] action
2288  *   Pointer to the modify action.
2289  * @param[in] item_flags
2290  *   Holds the items detected.
2291  * @param[out] error
2292  *   Pointer to error structure.
2293  *
2294  * @return
2295  *   0 on success, a negative errno value otherwise and rte_errno is set.
2296  */
2297 static int
2298 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
2299                                        const struct rte_flow_action *action,
2300                                        const uint64_t item_flags,
2301                                        struct rte_flow_error *error)
2302 {
2303         int ret = 0;
2304
2305         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
2306         if (!ret) {
2307                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
2308                         return rte_flow_error_set(error, EINVAL,
2309                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2310                                                   NULL, "no TCP item in"
2311                                                   " pattern");
2312                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
2313                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
2314                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
2315                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
2316                         return rte_flow_error_set(error, EINVAL,
2317                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2318                                                   NULL,
2319                                                   "cannot decrease and increase"
2320                                                   " TCP acknowledgment number"
2321                                                   " at the same time");
2322         }
2323         return ret;
2324 }
2325
2326 /**
2327  * Validate the modify-header TTL actions.
2328  *
2329  * @param[in] action_flags
2330  *   Holds the actions detected until now.
2331  * @param[in] action
2332  *   Pointer to the modify action.
2333  * @param[in] item_flags
2334  *   Holds the items detected.
2335  * @param[out] error
2336  *   Pointer to error structure.
2337  *
2338  * @return
2339  *   0 on success, a negative errno value otherwise and rte_errno is set.
2340  */
2341 static int
2342 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
2343                                    const struct rte_flow_action *action,
2344                                    const uint64_t item_flags,
2345                                    struct rte_flow_error *error)
2346 {
2347         int ret = 0;
2348
2349         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
2350         if (!ret) {
2351                 if (!(item_flags & MLX5_FLOW_LAYER_L3))
2352                         return rte_flow_error_set(error, EINVAL,
2353                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2354                                                   NULL,
2355                                                   "no IP protocol in pattern");
2356         }
2357         return ret;
2358 }
2359
2360 /**
2361  * Validate jump action.
2362  *
2363  * @param[in] action
2364  *   Pointer to the jump action.
2365  * @param[in] action_flags
2366  *   Holds the actions detected until now.
2367  * @param[in] attributes
2368  *   Pointer to flow attributes
2369  * @param[in] external
2370  *   Action belongs to flow rule created by request external to PMD.
2371  * @param[out] error
2372  *   Pointer to error structure.
2373  *
2374  * @return
2375  *   0 on success, a negative errno value otherwise and rte_errno is set.
2376  */
2377 static int
2378 flow_dv_validate_action_jump(const struct rte_flow_action *action,
2379                              uint64_t action_flags,
2380                              const struct rte_flow_attr *attributes,
2381                              bool external, struct rte_flow_error *error)
2382 {
2383         uint32_t max_group = attributes->transfer ? MLX5_MAX_TABLES_FDB :
2384                                                     MLX5_MAX_TABLES;
2385         uint32_t target_group, table;
2386         int ret = 0;
2387
2388         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
2389                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
2390                 return rte_flow_error_set(error, EINVAL,
2391                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2392                                           "can't have 2 fate actions in"
2393                                           " same flow");
2394         if (!action->conf)
2395                 return rte_flow_error_set(error, EINVAL,
2396                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2397                                           NULL, "action configuration not set");
2398         target_group =
2399                 ((const struct rte_flow_action_jump *)action->conf)->group;
2400         ret = mlx5_flow_group_to_table(attributes, external, target_group,
2401                                        &table, error);
2402         if (ret)
2403                 return ret;
2404         if (table >= max_group)
2405                 return rte_flow_error_set(error, EINVAL,
2406                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
2407                                           "target group index out of range");
2408         if (attributes->group >= target_group)
2409                 return rte_flow_error_set(error, EINVAL,
2410                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2411                                           "target group must be higher than"
2412                                           " the current flow group");
2413         return 0;
2414 }
2415
2416 /*
2417  * Validate the port_id action.
2418  *
2419  * @param[in] dev
2420  *   Pointer to rte_eth_dev structure.
2421  * @param[in] action_flags
2422  *   Bit-fields that holds the actions detected until now.
2423  * @param[in] action
2424  *   Port_id RTE action structure.
2425  * @param[in] attr
2426  *   Attributes of flow that includes this action.
2427  * @param[out] error
2428  *   Pointer to error structure.
2429  *
2430  * @return
2431  *   0 on success, a negative errno value otherwise and rte_errno is set.
2432  */
2433 static int
2434 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
2435                                 uint64_t action_flags,
2436                                 const struct rte_flow_action *action,
2437                                 const struct rte_flow_attr *attr,
2438                                 struct rte_flow_error *error)
2439 {
2440         const struct rte_flow_action_port_id *port_id;
2441         struct mlx5_priv *act_priv;
2442         struct mlx5_priv *dev_priv;
2443         uint16_t port;
2444
2445         if (!attr->transfer)
2446                 return rte_flow_error_set(error, ENOTSUP,
2447                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2448                                           NULL,
2449                                           "port id action is valid in transfer"
2450                                           " mode only");
2451         if (!action || !action->conf)
2452                 return rte_flow_error_set(error, ENOTSUP,
2453                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2454                                           NULL,
2455                                           "port id action parameters must be"
2456                                           " specified");
2457         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
2458                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
2459                 return rte_flow_error_set(error, EINVAL,
2460                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2461                                           "can have only one fate actions in"
2462                                           " a flow");
2463         dev_priv = mlx5_dev_to_eswitch_info(dev);
2464         if (!dev_priv)
2465                 return rte_flow_error_set(error, rte_errno,
2466                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2467                                           NULL,
2468                                           "failed to obtain E-Switch info");
2469         port_id = action->conf;
2470         port = port_id->original ? dev->data->port_id : port_id->id;
2471         act_priv = mlx5_port_to_eswitch_info(port);
2472         if (!act_priv)
2473                 return rte_flow_error_set
2474                                 (error, rte_errno,
2475                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
2476                                  "failed to obtain E-Switch port id for port");
2477         if (act_priv->domain_id != dev_priv->domain_id)
2478                 return rte_flow_error_set
2479                                 (error, EINVAL,
2480                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2481                                  "port does not belong to"
2482                                  " E-Switch being configured");
2483         return 0;
2484 }
2485
2486 /**
2487  * Find existing modify-header resource or create and register a new one.
2488  *
2489  * @param dev[in, out]
2490  *   Pointer to rte_eth_dev structure.
2491  * @param[in, out] resource
2492  *   Pointer to modify-header resource.
2493  * @parm[in, out] dev_flow
2494  *   Pointer to the dev_flow.
2495  * @param[out] error
2496  *   pointer to error structure.
2497  *
2498  * @return
2499  *   0 on success otherwise -errno and errno is set.
2500  */
2501 static int
2502 flow_dv_modify_hdr_resource_register
2503                         (struct rte_eth_dev *dev,
2504                          struct mlx5_flow_dv_modify_hdr_resource *resource,
2505                          struct mlx5_flow *dev_flow,
2506                          struct rte_flow_error *error)
2507 {
2508         struct mlx5_priv *priv = dev->data->dev_private;
2509         struct mlx5_ibv_shared *sh = priv->sh;
2510         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
2511         struct mlx5dv_dr_domain *ns;
2512
2513         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2514                 ns = sh->fdb_domain;
2515         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
2516                 ns = sh->tx_domain;
2517         else
2518                 ns = sh->rx_domain;
2519         resource->flags =
2520                 dev_flow->flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
2521         /* Lookup a matching resource from cache. */
2522         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
2523                 if (resource->ft_type == cache_resource->ft_type &&
2524                     resource->actions_num == cache_resource->actions_num &&
2525                     resource->flags == cache_resource->flags &&
2526                     !memcmp((const void *)resource->actions,
2527                             (const void *)cache_resource->actions,
2528                             (resource->actions_num *
2529                                             sizeof(resource->actions[0])))) {
2530                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
2531                                 (void *)cache_resource,
2532                                 rte_atomic32_read(&cache_resource->refcnt));
2533                         rte_atomic32_inc(&cache_resource->refcnt);
2534                         dev_flow->dv.modify_hdr = cache_resource;
2535                         return 0;
2536                 }
2537         }
2538         /* Register new modify-header resource. */
2539         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2540         if (!cache_resource)
2541                 return rte_flow_error_set(error, ENOMEM,
2542                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2543                                           "cannot allocate resource memory");
2544         *cache_resource = *resource;
2545         cache_resource->verbs_action =
2546                 mlx5_glue->dv_create_flow_action_modify_header
2547                                         (sh->ctx, cache_resource->ft_type,
2548                                          ns, cache_resource->flags,
2549                                          cache_resource->actions_num *
2550                                          sizeof(cache_resource->actions[0]),
2551                                          (uint64_t *)cache_resource->actions);
2552         if (!cache_resource->verbs_action) {
2553                 rte_free(cache_resource);
2554                 return rte_flow_error_set(error, ENOMEM,
2555                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2556                                           NULL, "cannot create action");
2557         }
2558         rte_atomic32_init(&cache_resource->refcnt);
2559         rte_atomic32_inc(&cache_resource->refcnt);
2560         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
2561         dev_flow->dv.modify_hdr = cache_resource;
2562         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
2563                 (void *)cache_resource,
2564                 rte_atomic32_read(&cache_resource->refcnt));
2565         return 0;
2566 }
2567
2568 #define MLX5_CNT_CONTAINER_RESIZE 64
2569
2570 /**
2571  * Get or create a flow counter.
2572  *
2573  * @param[in] dev
2574  *   Pointer to the Ethernet device structure.
2575  * @param[in] shared
2576  *   Indicate if this counter is shared with other flows.
2577  * @param[in] id
2578  *   Counter identifier.
2579  *
2580  * @return
2581  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
2582  */
2583 static struct mlx5_flow_counter *
2584 flow_dv_counter_alloc_fallback(struct rte_eth_dev *dev, uint32_t shared,
2585                                uint32_t id)
2586 {
2587         struct mlx5_priv *priv = dev->data->dev_private;
2588         struct mlx5_flow_counter *cnt = NULL;
2589         struct mlx5_devx_obj *dcs = NULL;
2590
2591         if (!priv->config.devx) {
2592                 rte_errno = ENOTSUP;
2593                 return NULL;
2594         }
2595         if (shared) {
2596                 TAILQ_FOREACH(cnt, &priv->sh->cmng.flow_counters, next) {
2597                         if (cnt->shared && cnt->id == id) {
2598                                 cnt->ref_cnt++;
2599                                 return cnt;
2600                         }
2601                 }
2602         }
2603         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
2604         if (!dcs)
2605                 return NULL;
2606         cnt = rte_calloc(__func__, 1, sizeof(*cnt), 0);
2607         if (!cnt) {
2608                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
2609                 rte_errno = ENOMEM;
2610                 return NULL;
2611         }
2612         struct mlx5_flow_counter tmpl = {
2613                 .shared = shared,
2614                 .ref_cnt = 1,
2615                 .id = id,
2616                 .dcs = dcs,
2617         };
2618         tmpl.action = mlx5_glue->dv_create_flow_action_counter(dcs->obj, 0);
2619         if (!tmpl.action) {
2620                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
2621                 rte_errno = errno;
2622                 rte_free(cnt);
2623                 return NULL;
2624         }
2625         *cnt = tmpl;
2626         TAILQ_INSERT_HEAD(&priv->sh->cmng.flow_counters, cnt, next);
2627         return cnt;
2628 }
2629
2630 /**
2631  * Release a flow counter.
2632  *
2633  * @param[in] dev
2634  *   Pointer to the Ethernet device structure.
2635  * @param[in] counter
2636  *   Pointer to the counter handler.
2637  */
2638 static void
2639 flow_dv_counter_release_fallback(struct rte_eth_dev *dev,
2640                                  struct mlx5_flow_counter *counter)
2641 {
2642         struct mlx5_priv *priv = dev->data->dev_private;
2643
2644         if (!counter)
2645                 return;
2646         if (--counter->ref_cnt == 0) {
2647                 TAILQ_REMOVE(&priv->sh->cmng.flow_counters, counter, next);
2648                 claim_zero(mlx5_devx_cmd_destroy(counter->dcs));
2649                 rte_free(counter);
2650         }
2651 }
2652
2653 /**
2654  * Query a devx flow counter.
2655  *
2656  * @param[in] dev
2657  *   Pointer to the Ethernet device structure.
2658  * @param[in] cnt
2659  *   Pointer to the flow counter.
2660  * @param[out] pkts
2661  *   The statistics value of packets.
2662  * @param[out] bytes
2663  *   The statistics value of bytes.
2664  *
2665  * @return
2666  *   0 on success, otherwise a negative errno value and rte_errno is set.
2667  */
2668 static inline int
2669 _flow_dv_query_count_fallback(struct rte_eth_dev *dev __rte_unused,
2670                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
2671                      uint64_t *bytes)
2672 {
2673         return mlx5_devx_cmd_flow_counter_query(cnt->dcs, 0, 0, pkts, bytes,
2674                                                 0, NULL, NULL, 0);
2675 }
2676
2677 /**
2678  * Get a pool by a counter.
2679  *
2680  * @param[in] cnt
2681  *   Pointer to the counter.
2682  *
2683  * @return
2684  *   The counter pool.
2685  */
2686 static struct mlx5_flow_counter_pool *
2687 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
2688 {
2689         if (!cnt->batch) {
2690                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
2691                 return (struct mlx5_flow_counter_pool *)cnt - 1;
2692         }
2693         return cnt->pool;
2694 }
2695
2696 /**
2697  * Get a pool by devx counter ID.
2698  *
2699  * @param[in] cont
2700  *   Pointer to the counter container.
2701  * @param[in] id
2702  *   The counter devx ID.
2703  *
2704  * @return
2705  *   The counter pool pointer if exists, NULL otherwise,
2706  */
2707 static struct mlx5_flow_counter_pool *
2708 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
2709 {
2710         struct mlx5_flow_counter_pool *pool;
2711
2712         TAILQ_FOREACH(pool, &cont->pool_list, next) {
2713                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
2714                                 MLX5_COUNTERS_PER_POOL;
2715
2716                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
2717                         return pool;
2718         };
2719         return NULL;
2720 }
2721
2722 /**
2723  * Allocate a new memory for the counter values wrapped by all the needed
2724  * management.
2725  *
2726  * @param[in] dev
2727  *   Pointer to the Ethernet device structure.
2728  * @param[in] raws_n
2729  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
2730  *
2731  * @return
2732  *   The new memory management pointer on success, otherwise NULL and rte_errno
2733  *   is set.
2734  */
2735 static struct mlx5_counter_stats_mem_mng *
2736 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
2737 {
2738         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
2739                                         (dev->data->dev_private))->sh;
2740         struct mlx5_devx_mkey_attr mkey_attr;
2741         struct mlx5_counter_stats_mem_mng *mem_mng;
2742         volatile struct flow_counter_stats *raw_data;
2743         int size = (sizeof(struct flow_counter_stats) *
2744                         MLX5_COUNTERS_PER_POOL +
2745                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
2746                         sizeof(struct mlx5_counter_stats_mem_mng);
2747         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
2748         int i;
2749
2750         if (!mem) {
2751                 rte_errno = ENOMEM;
2752                 return NULL;
2753         }
2754         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
2755         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
2756         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
2757                                                  IBV_ACCESS_LOCAL_WRITE);
2758         if (!mem_mng->umem) {
2759                 rte_errno = errno;
2760                 rte_free(mem);
2761                 return NULL;
2762         }
2763         mkey_attr.addr = (uintptr_t)mem;
2764         mkey_attr.size = size;
2765         mkey_attr.umem_id = mem_mng->umem->umem_id;
2766         mkey_attr.pd = sh->pdn;
2767         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
2768         if (!mem_mng->dm) {
2769                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
2770                 rte_errno = errno;
2771                 rte_free(mem);
2772                 return NULL;
2773         }
2774         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
2775         raw_data = (volatile struct flow_counter_stats *)mem;
2776         for (i = 0; i < raws_n; ++i) {
2777                 mem_mng->raws[i].mem_mng = mem_mng;
2778                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
2779         }
2780         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
2781         return mem_mng;
2782 }
2783
2784 /**
2785  * Resize a counter container.
2786  *
2787  * @param[in] dev
2788  *   Pointer to the Ethernet device structure.
2789  * @param[in] batch
2790  *   Whether the pool is for counter that was allocated by batch command.
2791  *
2792  * @return
2793  *   The new container pointer on success, otherwise NULL and rte_errno is set.
2794  */
2795 static struct mlx5_pools_container *
2796 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
2797 {
2798         struct mlx5_priv *priv = dev->data->dev_private;
2799         struct mlx5_pools_container *cont =
2800                         MLX5_CNT_CONTAINER(priv->sh, batch, 0);
2801         struct mlx5_pools_container *new_cont =
2802                         MLX5_CNT_CONTAINER_UNUSED(priv->sh, batch, 0);
2803         struct mlx5_counter_stats_mem_mng *mem_mng;
2804         uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
2805         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
2806         int i;
2807
2808         if (cont != MLX5_CNT_CONTAINER(priv->sh, batch, 1)) {
2809                 /* The last resize still hasn't detected by the host thread. */
2810                 rte_errno = EAGAIN;
2811                 return NULL;
2812         }
2813         new_cont->pools = rte_calloc(__func__, 1, mem_size, 0);
2814         if (!new_cont->pools) {
2815                 rte_errno = ENOMEM;
2816                 return NULL;
2817         }
2818         if (cont->n)
2819                 memcpy(new_cont->pools, cont->pools, cont->n *
2820                        sizeof(struct mlx5_flow_counter_pool *));
2821         mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
2822                 MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES);
2823         if (!mem_mng) {
2824                 rte_free(new_cont->pools);
2825                 return NULL;
2826         }
2827         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
2828                 LIST_INSERT_HEAD(&priv->sh->cmng.free_stat_raws,
2829                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE +
2830                                  i, next);
2831         new_cont->n = resize;
2832         rte_atomic16_set(&new_cont->n_valid, rte_atomic16_read(&cont->n_valid));
2833         TAILQ_INIT(&new_cont->pool_list);
2834         TAILQ_CONCAT(&new_cont->pool_list, &cont->pool_list, next);
2835         new_cont->init_mem_mng = mem_mng;
2836         rte_cio_wmb();
2837          /* Flip the master container. */
2838         priv->sh->cmng.mhi[batch] ^= (uint8_t)1;
2839         return new_cont;
2840 }
2841
2842 /**
2843  * Query a devx flow counter.
2844  *
2845  * @param[in] dev
2846  *   Pointer to the Ethernet device structure.
2847  * @param[in] cnt
2848  *   Pointer to the flow counter.
2849  * @param[out] pkts
2850  *   The statistics value of packets.
2851  * @param[out] bytes
2852  *   The statistics value of bytes.
2853  *
2854  * @return
2855  *   0 on success, otherwise a negative errno value and rte_errno is set.
2856  */
2857 static inline int
2858 _flow_dv_query_count(struct rte_eth_dev *dev,
2859                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
2860                      uint64_t *bytes)
2861 {
2862         struct mlx5_priv *priv = dev->data->dev_private;
2863         struct mlx5_flow_counter_pool *pool =
2864                         flow_dv_counter_pool_get(cnt);
2865         int offset = cnt - &pool->counters_raw[0];
2866
2867         if (priv->counter_fallback)
2868                 return _flow_dv_query_count_fallback(dev, cnt, pkts, bytes);
2869
2870         rte_spinlock_lock(&pool->sl);
2871         /*
2872          * The single counters allocation may allocate smaller ID than the
2873          * current allocated in parallel to the host reading.
2874          * In this case the new counter values must be reported as 0.
2875          */
2876         if (unlikely(!cnt->batch && cnt->dcs->id < pool->raw->min_dcs_id)) {
2877                 *pkts = 0;
2878                 *bytes = 0;
2879         } else {
2880                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
2881                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
2882         }
2883         rte_spinlock_unlock(&pool->sl);
2884         return 0;
2885 }
2886
2887 /**
2888  * Create and initialize a new counter pool.
2889  *
2890  * @param[in] dev
2891  *   Pointer to the Ethernet device structure.
2892  * @param[out] dcs
2893  *   The devX counter handle.
2894  * @param[in] batch
2895  *   Whether the pool is for counter that was allocated by batch command.
2896  *
2897  * @return
2898  *   A new pool pointer on success, NULL otherwise and rte_errno is set.
2899  */
2900 static struct mlx5_flow_counter_pool *
2901 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
2902                     uint32_t batch)
2903 {
2904         struct mlx5_priv *priv = dev->data->dev_private;
2905         struct mlx5_flow_counter_pool *pool;
2906         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
2907                                                                0);
2908         int16_t n_valid = rte_atomic16_read(&cont->n_valid);
2909         uint32_t size;
2910
2911         if (cont->n == n_valid) {
2912                 cont = flow_dv_container_resize(dev, batch);
2913                 if (!cont)
2914                         return NULL;
2915         }
2916         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
2917                         sizeof(struct mlx5_flow_counter);
2918         pool = rte_calloc(__func__, 1, size, 0);
2919         if (!pool) {
2920                 rte_errno = ENOMEM;
2921                 return NULL;
2922         }
2923         pool->min_dcs = dcs;
2924         pool->raw = cont->init_mem_mng->raws + n_valid %
2925                                                      MLX5_CNT_CONTAINER_RESIZE;
2926         pool->raw_hw = NULL;
2927         rte_spinlock_init(&pool->sl);
2928         /*
2929          * The generation of the new allocated counters in this pool is 0, 2 in
2930          * the pool generation makes all the counters valid for allocation.
2931          */
2932         rte_atomic64_set(&pool->query_gen, 0x2);
2933         TAILQ_INIT(&pool->counters);
2934         TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
2935         cont->pools[n_valid] = pool;
2936         /* Pool initialization must be updated before host thread access. */
2937         rte_cio_wmb();
2938         rte_atomic16_add(&cont->n_valid, 1);
2939         return pool;
2940 }
2941
2942 /**
2943  * Prepare a new counter and/or a new counter pool.
2944  *
2945  * @param[in] dev
2946  *   Pointer to the Ethernet device structure.
2947  * @param[out] cnt_free
2948  *   Where to put the pointer of a new counter.
2949  * @param[in] batch
2950  *   Whether the pool is for counter that was allocated by batch command.
2951  *
2952  * @return
2953  *   The free counter pool pointer and @p cnt_free is set on success,
2954  *   NULL otherwise and rte_errno is set.
2955  */
2956 static struct mlx5_flow_counter_pool *
2957 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
2958                              struct mlx5_flow_counter **cnt_free,
2959                              uint32_t batch)
2960 {
2961         struct mlx5_priv *priv = dev->data->dev_private;
2962         struct mlx5_flow_counter_pool *pool;
2963         struct mlx5_devx_obj *dcs = NULL;
2964         struct mlx5_flow_counter *cnt;
2965         uint32_t i;
2966
2967         if (!batch) {
2968                 /* bulk_bitmap must be 0 for single counter allocation. */
2969                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
2970                 if (!dcs)
2971                         return NULL;
2972                 pool = flow_dv_find_pool_by_id
2973                         (MLX5_CNT_CONTAINER(priv->sh, batch, 0), dcs->id);
2974                 if (!pool) {
2975                         pool = flow_dv_pool_create(dev, dcs, batch);
2976                         if (!pool) {
2977                                 mlx5_devx_cmd_destroy(dcs);
2978                                 return NULL;
2979                         }
2980                 } else if (dcs->id < pool->min_dcs->id) {
2981                         rte_atomic64_set(&pool->a64_dcs,
2982                                          (int64_t)(uintptr_t)dcs);
2983                 }
2984                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
2985                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
2986                 cnt->dcs = dcs;
2987                 *cnt_free = cnt;
2988                 return pool;
2989         }
2990         /* bulk_bitmap is in 128 counters units. */
2991         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
2992                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
2993         if (!dcs) {
2994                 rte_errno = ENODATA;
2995                 return NULL;
2996         }
2997         pool = flow_dv_pool_create(dev, dcs, batch);
2998         if (!pool) {
2999                 mlx5_devx_cmd_destroy(dcs);
3000                 return NULL;
3001         }
3002         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
3003                 cnt = &pool->counters_raw[i];
3004                 cnt->pool = pool;
3005                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
3006         }
3007         *cnt_free = &pool->counters_raw[0];
3008         return pool;
3009 }
3010
3011 /**
3012  * Search for existed shared counter.
3013  *
3014  * @param[in] cont
3015  *   Pointer to the relevant counter pool container.
3016  * @param[in] id
3017  *   The shared counter ID to search.
3018  *
3019  * @return
3020  *   NULL if not existed, otherwise pointer to the shared counter.
3021  */
3022 static struct mlx5_flow_counter *
3023 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
3024                               uint32_t id)
3025 {
3026         static struct mlx5_flow_counter *cnt;
3027         struct mlx5_flow_counter_pool *pool;
3028         int i;
3029
3030         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3031                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
3032                         cnt = &pool->counters_raw[i];
3033                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
3034                                 return cnt;
3035                 }
3036         }
3037         return NULL;
3038 }
3039
3040 /**
3041  * Allocate a flow counter.
3042  *
3043  * @param[in] dev
3044  *   Pointer to the Ethernet device structure.
3045  * @param[in] shared
3046  *   Indicate if this counter is shared with other flows.
3047  * @param[in] id
3048  *   Counter identifier.
3049  * @param[in] group
3050  *   Counter flow group.
3051  *
3052  * @return
3053  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
3054  */
3055 static struct mlx5_flow_counter *
3056 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
3057                       uint16_t group)
3058 {
3059         struct mlx5_priv *priv = dev->data->dev_private;
3060         struct mlx5_flow_counter_pool *pool = NULL;
3061         struct mlx5_flow_counter *cnt_free = NULL;
3062         /*
3063          * Currently group 0 flow counter cannot be assigned to a flow if it is
3064          * not the first one in the batch counter allocation, so it is better
3065          * to allocate counters one by one for these flows in a separate
3066          * container.
3067          * A counter can be shared between different groups so need to take
3068          * shared counters from the single container.
3069          */
3070         uint32_t batch = (group && !shared) ? 1 : 0;
3071         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
3072                                                                0);
3073
3074         if (priv->counter_fallback)
3075                 return flow_dv_counter_alloc_fallback(dev, shared, id);
3076         if (!priv->config.devx) {
3077                 rte_errno = ENOTSUP;
3078                 return NULL;
3079         }
3080         if (shared) {
3081                 cnt_free = flow_dv_counter_shared_search(cont, id);
3082                 if (cnt_free) {
3083                         if (cnt_free->ref_cnt + 1 == 0) {
3084                                 rte_errno = E2BIG;
3085                                 return NULL;
3086                         }
3087                         cnt_free->ref_cnt++;
3088                         return cnt_free;
3089                 }
3090         }
3091         /* Pools which has a free counters are in the start. */
3092         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3093                 /*
3094                  * The free counter reset values must be updated between the
3095                  * counter release to the counter allocation, so, at least one
3096                  * query must be done in this time. ensure it by saving the
3097                  * query generation in the release time.
3098                  * The free list is sorted according to the generation - so if
3099                  * the first one is not updated, all the others are not
3100                  * updated too.
3101                  */
3102                 cnt_free = TAILQ_FIRST(&pool->counters);
3103                 if (cnt_free && cnt_free->query_gen + 1 <
3104                     rte_atomic64_read(&pool->query_gen))
3105                         break;
3106                 cnt_free = NULL;
3107         }
3108         if (!cnt_free) {
3109                 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
3110                 if (!pool)
3111                         return NULL;
3112         }
3113         cnt_free->batch = batch;
3114         /* Create a DV counter action only in the first time usage. */
3115         if (!cnt_free->action) {
3116                 uint16_t offset;
3117                 struct mlx5_devx_obj *dcs;
3118
3119                 if (batch) {
3120                         offset = cnt_free - &pool->counters_raw[0];
3121                         dcs = pool->min_dcs;
3122                 } else {
3123                         offset = 0;
3124                         dcs = cnt_free->dcs;
3125                 }
3126                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
3127                                         (dcs->obj, offset);
3128                 if (!cnt_free->action) {
3129                         rte_errno = errno;
3130                         return NULL;
3131                 }
3132         }
3133         /* Update the counter reset values. */
3134         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
3135                                  &cnt_free->bytes))
3136                 return NULL;
3137         cnt_free->shared = shared;
3138         cnt_free->ref_cnt = 1;
3139         cnt_free->id = id;
3140         if (!priv->sh->cmng.query_thread_on)
3141                 /* Start the asynchronous batch query by the host thread. */
3142                 mlx5_set_query_alarm(priv->sh);
3143         TAILQ_REMOVE(&pool->counters, cnt_free, next);
3144         if (TAILQ_EMPTY(&pool->counters)) {
3145                 /* Move the pool to the end of the container pool list. */
3146                 TAILQ_REMOVE(&cont->pool_list, pool, next);
3147                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
3148         }
3149         return cnt_free;
3150 }
3151
3152 /**
3153  * Release a flow counter.
3154  *
3155  * @param[in] dev
3156  *   Pointer to the Ethernet device structure.
3157  * @param[in] counter
3158  *   Pointer to the counter handler.
3159  */
3160 static void
3161 flow_dv_counter_release(struct rte_eth_dev *dev,
3162                         struct mlx5_flow_counter *counter)
3163 {
3164         struct mlx5_priv *priv = dev->data->dev_private;
3165
3166         if (!counter)
3167                 return;
3168         if (priv->counter_fallback) {
3169                 flow_dv_counter_release_fallback(dev, counter);
3170                 return;
3171         }
3172         if (--counter->ref_cnt == 0) {
3173                 struct mlx5_flow_counter_pool *pool =
3174                                 flow_dv_counter_pool_get(counter);
3175
3176                 /* Put the counter in the end - the last updated one. */
3177                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
3178                 counter->query_gen = rte_atomic64_read(&pool->query_gen);
3179         }
3180 }
3181
3182 /**
3183  * Verify the @p attributes will be correctly understood by the NIC and store
3184  * them in the @p flow if everything is correct.
3185  *
3186  * @param[in] dev
3187  *   Pointer to dev struct.
3188  * @param[in] attributes
3189  *   Pointer to flow attributes
3190  * @param[in] external
3191  *   This flow rule is created by request external to PMD.
3192  * @param[out] error
3193  *   Pointer to error structure.
3194  *
3195  * @return
3196  *   0 on success, a negative errno value otherwise and rte_errno is set.
3197  */
3198 static int
3199 flow_dv_validate_attributes(struct rte_eth_dev *dev,
3200                             const struct rte_flow_attr *attributes,
3201                             bool external __rte_unused,
3202                             struct rte_flow_error *error)
3203 {
3204         struct mlx5_priv *priv = dev->data->dev_private;
3205         uint32_t priority_max = priv->config.flow_prio - 1;
3206
3207 #ifndef HAVE_MLX5DV_DR
3208         if (attributes->group)
3209                 return rte_flow_error_set(error, ENOTSUP,
3210                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
3211                                           NULL,
3212                                           "groups are not supported");
3213 #else
3214         uint32_t max_group = attributes->transfer ? MLX5_MAX_TABLES_FDB :
3215                                                     MLX5_MAX_TABLES;
3216         uint32_t table;
3217         int ret;
3218
3219         ret = mlx5_flow_group_to_table(attributes, external,
3220                                        attributes->group,
3221                                        &table, error);
3222         if (ret)
3223                 return ret;
3224         if (table >= max_group)
3225                 return rte_flow_error_set(error, EINVAL,
3226                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
3227                                           "group index out of range");
3228 #endif
3229         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
3230             attributes->priority >= priority_max)
3231                 return rte_flow_error_set(error, ENOTSUP,
3232                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
3233                                           NULL,
3234                                           "priority out of range");
3235         if (attributes->transfer) {
3236                 if (!priv->config.dv_esw_en)
3237                         return rte_flow_error_set
3238                                 (error, ENOTSUP,
3239                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3240                                  "E-Switch dr is not supported");
3241                 if (!(priv->representor || priv->master))
3242                         return rte_flow_error_set
3243                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3244                                  NULL, "E-Switch configuration can only be"
3245                                  " done by a master or a representor device");
3246                 if (attributes->egress)
3247                         return rte_flow_error_set
3248                                 (error, ENOTSUP,
3249                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
3250                                  "egress is not supported");
3251         }
3252         if (!(attributes->egress ^ attributes->ingress))
3253                 return rte_flow_error_set(error, ENOTSUP,
3254                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
3255                                           "must specify exactly one of "
3256                                           "ingress or egress");
3257         return 0;
3258 }
3259
3260 /**
3261  * Internal validation function. For validating both actions and items.
3262  *
3263  * @param[in] dev
3264  *   Pointer to the rte_eth_dev structure.
3265  * @param[in] attr
3266  *   Pointer to the flow attributes.
3267  * @param[in] items
3268  *   Pointer to the list of items.
3269  * @param[in] actions
3270  *   Pointer to the list of actions.
3271  * @param[in] external
3272  *   This flow rule is created by request external to PMD.
3273  * @param[out] error
3274  *   Pointer to the error structure.
3275  *
3276  * @return
3277  *   0 on success, a negative errno value otherwise and rte_errno is set.
3278  */
3279 static int
3280 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
3281                  const struct rte_flow_item items[],
3282                  const struct rte_flow_action actions[],
3283                  bool external, struct rte_flow_error *error)
3284 {
3285         int ret;
3286         uint64_t action_flags = 0;
3287         uint64_t item_flags = 0;
3288         uint64_t last_item = 0;
3289         uint8_t next_protocol = 0xff;
3290         int actions_n = 0;
3291         const struct rte_flow_item *gre_item = NULL;
3292         struct rte_flow_item_tcp nic_tcp_mask = {
3293                 .hdr = {
3294                         .tcp_flags = 0xFF,
3295                         .src_port = RTE_BE16(UINT16_MAX),
3296                         .dst_port = RTE_BE16(UINT16_MAX),
3297                 }
3298         };
3299
3300         if (items == NULL)
3301                 return -1;
3302         ret = flow_dv_validate_attributes(dev, attr, external, error);
3303         if (ret < 0)
3304                 return ret;
3305         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
3306                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
3307                 switch (items->type) {
3308                 case RTE_FLOW_ITEM_TYPE_VOID:
3309                         break;
3310                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
3311                         ret = flow_dv_validate_item_port_id
3312                                         (dev, items, attr, item_flags, error);
3313                         if (ret < 0)
3314                                 return ret;
3315                         last_item = MLX5_FLOW_ITEM_PORT_ID;
3316                         break;
3317                 case RTE_FLOW_ITEM_TYPE_ETH:
3318                         ret = mlx5_flow_validate_item_eth(items, item_flags,
3319                                                           error);
3320                         if (ret < 0)
3321                                 return ret;
3322                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
3323                                              MLX5_FLOW_LAYER_OUTER_L2;
3324                         break;
3325                 case RTE_FLOW_ITEM_TYPE_VLAN:
3326                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
3327                                                            dev, error);
3328                         if (ret < 0)
3329                                 return ret;
3330                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
3331                                              MLX5_FLOW_LAYER_OUTER_VLAN;
3332                         break;
3333                 case RTE_FLOW_ITEM_TYPE_IPV4:
3334                         mlx5_flow_tunnel_ip_check(items, next_protocol,
3335                                                   &item_flags, &tunnel);
3336                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
3337                                                            NULL, error);
3338                         if (ret < 0)
3339                                 return ret;
3340                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
3341                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3342                         if (items->mask != NULL &&
3343                             ((const struct rte_flow_item_ipv4 *)
3344                              items->mask)->hdr.next_proto_id) {
3345                                 next_protocol =
3346                                         ((const struct rte_flow_item_ipv4 *)
3347                                          (items->spec))->hdr.next_proto_id;
3348                                 next_protocol &=
3349                                         ((const struct rte_flow_item_ipv4 *)
3350                                          (items->mask))->hdr.next_proto_id;
3351                         } else {
3352                                 /* Reset for inner layer. */
3353                                 next_protocol = 0xff;
3354                         }
3355                         break;
3356                 case RTE_FLOW_ITEM_TYPE_IPV6:
3357                         mlx5_flow_tunnel_ip_check(items, next_protocol,
3358                                                   &item_flags, &tunnel);
3359                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
3360                                                            NULL, error);
3361                         if (ret < 0)
3362                                 return ret;
3363                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
3364                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3365                         if (items->mask != NULL &&
3366                             ((const struct rte_flow_item_ipv6 *)
3367                              items->mask)->hdr.proto) {
3368                                 next_protocol =
3369                                         ((const struct rte_flow_item_ipv6 *)
3370                                          items->spec)->hdr.proto;
3371                                 next_protocol &=
3372                                         ((const struct rte_flow_item_ipv6 *)
3373                                          items->mask)->hdr.proto;
3374                         } else {
3375                                 /* Reset for inner layer. */
3376                                 next_protocol = 0xff;
3377                         }
3378                         break;
3379                 case RTE_FLOW_ITEM_TYPE_TCP:
3380                         ret = mlx5_flow_validate_item_tcp
3381                                                 (items, item_flags,
3382                                                  next_protocol,
3383                                                  &nic_tcp_mask,
3384                                                  error);
3385                         if (ret < 0)
3386                                 return ret;
3387                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
3388                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
3389                         break;
3390                 case RTE_FLOW_ITEM_TYPE_UDP:
3391                         ret = mlx5_flow_validate_item_udp(items, item_flags,
3392                                                           next_protocol,
3393                                                           error);
3394                         if (ret < 0)
3395                                 return ret;
3396                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
3397                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
3398                         break;
3399                 case RTE_FLOW_ITEM_TYPE_GRE:
3400                         ret = mlx5_flow_validate_item_gre(items, item_flags,
3401                                                           next_protocol, error);
3402                         if (ret < 0)
3403                                 return ret;
3404                         gre_item = items;
3405                         last_item = MLX5_FLOW_LAYER_GRE;
3406                         break;
3407                 case RTE_FLOW_ITEM_TYPE_NVGRE:
3408                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
3409                                                             next_protocol,
3410                                                             error);
3411                         if (ret < 0)
3412                                 return ret;
3413                         last_item = MLX5_FLOW_LAYER_NVGRE;
3414                         break;
3415                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
3416                         ret = mlx5_flow_validate_item_gre_key
3417                                 (items, item_flags, gre_item, error);
3418                         if (ret < 0)
3419                                 return ret;
3420                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
3421                         break;
3422                 case RTE_FLOW_ITEM_TYPE_VXLAN:
3423                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
3424                                                             error);
3425                         if (ret < 0)
3426                                 return ret;
3427                         last_item = MLX5_FLOW_LAYER_VXLAN;
3428                         break;
3429                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
3430                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
3431                                                                 item_flags, dev,
3432                                                                 error);
3433                         if (ret < 0)
3434                                 return ret;
3435                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
3436                         break;
3437                 case RTE_FLOW_ITEM_TYPE_GENEVE:
3438                         ret = mlx5_flow_validate_item_geneve(items,
3439                                                              item_flags, dev,
3440                                                              error);
3441                         if (ret < 0)
3442                                 return ret;
3443                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
3444                         break;
3445                 case RTE_FLOW_ITEM_TYPE_MPLS:
3446                         ret = mlx5_flow_validate_item_mpls(dev, items,
3447                                                            item_flags,
3448                                                            last_item, error);
3449                         if (ret < 0)
3450                                 return ret;
3451                         last_item = MLX5_FLOW_LAYER_MPLS;
3452                         break;
3453                 case RTE_FLOW_ITEM_TYPE_META:
3454                         ret = flow_dv_validate_item_meta(dev, items, attr,
3455                                                          error);
3456                         if (ret < 0)
3457                                 return ret;
3458                         last_item = MLX5_FLOW_ITEM_METADATA;
3459                         break;
3460                 case RTE_FLOW_ITEM_TYPE_ICMP:
3461                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
3462                                                            next_protocol,
3463                                                            error);
3464                         if (ret < 0)
3465                                 return ret;
3466                         last_item = MLX5_FLOW_LAYER_ICMP;
3467                         break;
3468                 case RTE_FLOW_ITEM_TYPE_ICMP6:
3469                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
3470                                                             next_protocol,
3471                                                             error);
3472                         if (ret < 0)
3473                                 return ret;
3474                         last_item = MLX5_FLOW_LAYER_ICMP6;
3475                         break;
3476                 default:
3477                         return rte_flow_error_set(error, ENOTSUP,
3478                                                   RTE_FLOW_ERROR_TYPE_ITEM,
3479                                                   NULL, "item not supported");
3480                 }
3481                 item_flags |= last_item;
3482         }
3483         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3484                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
3485                         return rte_flow_error_set(error, ENOTSUP,
3486                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3487                                                   actions, "too many actions");
3488                 switch (actions->type) {
3489                 case RTE_FLOW_ACTION_TYPE_VOID:
3490                         break;
3491                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
3492                         ret = flow_dv_validate_action_port_id(dev,
3493                                                               action_flags,
3494                                                               actions,
3495                                                               attr,
3496                                                               error);
3497                         if (ret)
3498                                 return ret;
3499                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
3500                         ++actions_n;
3501                         break;
3502                 case RTE_FLOW_ACTION_TYPE_FLAG:
3503                         ret = mlx5_flow_validate_action_flag(action_flags,
3504                                                              attr, error);
3505                         if (ret < 0)
3506                                 return ret;
3507                         action_flags |= MLX5_FLOW_ACTION_FLAG;
3508                         ++actions_n;
3509                         break;
3510                 case RTE_FLOW_ACTION_TYPE_MARK:
3511                         ret = mlx5_flow_validate_action_mark(actions,
3512                                                              action_flags,
3513                                                              attr, error);
3514                         if (ret < 0)
3515                                 return ret;
3516                         action_flags |= MLX5_FLOW_ACTION_MARK;
3517                         ++actions_n;
3518                         break;
3519                 case RTE_FLOW_ACTION_TYPE_DROP:
3520                         ret = mlx5_flow_validate_action_drop(action_flags,
3521                                                              attr, error);
3522                         if (ret < 0)
3523                                 return ret;
3524                         action_flags |= MLX5_FLOW_ACTION_DROP;
3525                         ++actions_n;
3526                         break;
3527                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3528                         ret = mlx5_flow_validate_action_queue(actions,
3529                                                               action_flags, dev,
3530                                                               attr, error);
3531                         if (ret < 0)
3532                                 return ret;
3533                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
3534                         ++actions_n;
3535                         break;
3536                 case RTE_FLOW_ACTION_TYPE_RSS:
3537                         ret = mlx5_flow_validate_action_rss(actions,
3538                                                             action_flags, dev,
3539                                                             attr, item_flags,
3540                                                             error);
3541                         if (ret < 0)
3542                                 return ret;
3543                         action_flags |= MLX5_FLOW_ACTION_RSS;
3544                         ++actions_n;
3545                         break;
3546                 case RTE_FLOW_ACTION_TYPE_COUNT:
3547                         ret = flow_dv_validate_action_count(dev, error);
3548                         if (ret < 0)
3549                                 return ret;
3550                         action_flags |= MLX5_FLOW_ACTION_COUNT;
3551                         ++actions_n;
3552                         break;
3553                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
3554                         if (flow_dv_validate_action_pop_vlan(dev,
3555                                                              action_flags,
3556                                                              actions,
3557                                                              item_flags, attr,
3558                                                              error))
3559                                 return -rte_errno;
3560                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
3561                         ++actions_n;
3562                         break;
3563                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3564                         ret = flow_dv_validate_action_push_vlan(action_flags,
3565                                                                 actions, attr,
3566                                                                 error);
3567                         if (ret < 0)
3568                                 return ret;
3569                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
3570                         ++actions_n;
3571                         break;
3572                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
3573                         ret = flow_dv_validate_action_set_vlan_pcp
3574                                                 (action_flags, actions, error);
3575                         if (ret < 0)
3576                                 return ret;
3577                         /* Count PCP with push_vlan command. */
3578                         break;
3579                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3580                         ret = flow_dv_validate_action_set_vlan_vid
3581                                                 (item_flags, actions, error);
3582                         if (ret < 0)
3583                                 return ret;
3584                         /* Count VID with push_vlan command. */
3585                         break;
3586                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3587                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3588                         ret = flow_dv_validate_action_l2_encap(action_flags,
3589                                                                actions, attr,
3590                                                                error);
3591                         if (ret < 0)
3592                                 return ret;
3593                         action_flags |= actions->type ==
3594                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
3595                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
3596                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
3597                         ++actions_n;
3598                         break;
3599                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
3600                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
3601                         ret = flow_dv_validate_action_l2_decap(action_flags,
3602                                                                attr, error);
3603                         if (ret < 0)
3604                                 return ret;
3605                         action_flags |= actions->type ==
3606                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
3607                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
3608                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
3609                         ++actions_n;
3610                         break;
3611                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3612                         ret = flow_dv_validate_action_raw_encap(action_flags,
3613                                                                 actions, attr,
3614                                                                 error);
3615                         if (ret < 0)
3616                                 return ret;
3617                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
3618                         ++actions_n;
3619                         break;
3620                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3621                         ret = flow_dv_validate_action_raw_decap(action_flags,
3622                                                                 actions, attr,
3623                                                                 error);
3624                         if (ret < 0)
3625                                 return ret;
3626                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
3627                         ++actions_n;
3628                         break;
3629                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
3630                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
3631                         ret = flow_dv_validate_action_modify_mac(action_flags,
3632                                                                  actions,
3633                                                                  item_flags,
3634                                                                  error);
3635                         if (ret < 0)
3636                                 return ret;
3637                         /* Count all modify-header actions as one action. */
3638                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3639                                 ++actions_n;
3640                         action_flags |= actions->type ==
3641                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
3642                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
3643                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
3644                         break;
3645
3646                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
3647                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
3648                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
3649                                                                   actions,
3650                                                                   item_flags,
3651                                                                   error);
3652                         if (ret < 0)
3653                                 return ret;
3654                         /* Count all modify-header actions as one action. */
3655                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3656                                 ++actions_n;
3657                         action_flags |= actions->type ==
3658                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
3659                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
3660                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
3661                         break;
3662                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
3663                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
3664                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
3665                                                                   actions,
3666                                                                   item_flags,
3667                                                                   error);
3668                         if (ret < 0)
3669                                 return ret;
3670                         /* Count all modify-header actions as one action. */
3671                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3672                                 ++actions_n;
3673                         action_flags |= actions->type ==
3674                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
3675                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
3676                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
3677                         break;
3678                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
3679                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
3680                         ret = flow_dv_validate_action_modify_tp(action_flags,
3681                                                                 actions,
3682                                                                 item_flags,
3683                                                                 error);
3684                         if (ret < 0)
3685                                 return ret;
3686                         /* Count all modify-header actions as one action. */
3687                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3688                                 ++actions_n;
3689                         action_flags |= actions->type ==
3690                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
3691                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
3692                                                 MLX5_FLOW_ACTION_SET_TP_DST;
3693                         break;
3694                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
3695                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
3696                         ret = flow_dv_validate_action_modify_ttl(action_flags,
3697                                                                  actions,
3698                                                                  item_flags,
3699                                                                  error);
3700                         if (ret < 0)
3701                                 return ret;
3702                         /* Count all modify-header actions as one action. */
3703                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3704                                 ++actions_n;
3705                         action_flags |= actions->type ==
3706                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
3707                                                 MLX5_FLOW_ACTION_SET_TTL :
3708                                                 MLX5_FLOW_ACTION_DEC_TTL;
3709                         break;
3710                 case RTE_FLOW_ACTION_TYPE_JUMP:
3711                         ret = flow_dv_validate_action_jump(actions,
3712                                                            action_flags,
3713                                                            attr, external,
3714                                                            error);
3715                         if (ret)
3716                                 return ret;
3717                         ++actions_n;
3718                         action_flags |= MLX5_FLOW_ACTION_JUMP;
3719                         break;
3720                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
3721                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
3722                         ret = flow_dv_validate_action_modify_tcp_seq
3723                                                                 (action_flags,
3724                                                                  actions,
3725                                                                  item_flags,
3726                                                                  error);
3727                         if (ret < 0)
3728                                 return ret;
3729                         /* Count all modify-header actions as one action. */
3730                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3731                                 ++actions_n;
3732                         action_flags |= actions->type ==
3733                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
3734                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
3735                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
3736                         break;
3737                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
3738                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
3739                         ret = flow_dv_validate_action_modify_tcp_ack
3740                                                                 (action_flags,
3741                                                                  actions,
3742                                                                  item_flags,
3743                                                                  error);
3744                         if (ret < 0)
3745                                 return ret;
3746                         /* Count all modify-header actions as one action. */
3747                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3748                                 ++actions_n;
3749                         action_flags |= actions->type ==
3750                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
3751                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
3752                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
3753                         break;
3754                 default:
3755                         return rte_flow_error_set(error, ENOTSUP,
3756                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3757                                                   actions,
3758                                                   "action not supported");
3759                 }
3760         }
3761         if ((action_flags & MLX5_FLOW_LAYER_TUNNEL) &&
3762             (action_flags & MLX5_FLOW_VLAN_ACTIONS))
3763                 return rte_flow_error_set(error, ENOTSUP,
3764                                           RTE_FLOW_ERROR_TYPE_ACTION,
3765                                           actions,
3766                                           "can't have vxlan and vlan"
3767                                           " actions in the same rule");
3768         /* Eswitch has few restrictions on using items and actions */
3769         if (attr->transfer) {
3770                 if (action_flags & MLX5_FLOW_ACTION_FLAG)
3771                         return rte_flow_error_set(error, ENOTSUP,
3772                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3773                                                   NULL,
3774                                                   "unsupported action FLAG");
3775                 if (action_flags & MLX5_FLOW_ACTION_MARK)
3776                         return rte_flow_error_set(error, ENOTSUP,
3777                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3778                                                   NULL,
3779                                                   "unsupported action MARK");
3780                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
3781                         return rte_flow_error_set(error, ENOTSUP,
3782                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3783                                                   NULL,
3784                                                   "unsupported action QUEUE");
3785                 if (action_flags & MLX5_FLOW_ACTION_RSS)
3786                         return rte_flow_error_set(error, ENOTSUP,
3787                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3788                                                   NULL,
3789                                                   "unsupported action RSS");
3790                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3791                         return rte_flow_error_set(error, EINVAL,
3792                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3793                                                   actions,
3794                                                   "no fate action is found");
3795         } else {
3796                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
3797                         return rte_flow_error_set(error, EINVAL,
3798                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3799                                                   actions,
3800                                                   "no fate action is found");
3801         }
3802         return 0;
3803 }
3804
3805 /**
3806  * Internal preparation function. Allocates the DV flow size,
3807  * this size is constant.
3808  *
3809  * @param[in] attr
3810  *   Pointer to the flow attributes.
3811  * @param[in] items
3812  *   Pointer to the list of items.
3813  * @param[in] actions
3814  *   Pointer to the list of actions.
3815  * @param[out] error
3816  *   Pointer to the error structure.
3817  *
3818  * @return
3819  *   Pointer to mlx5_flow object on success,
3820  *   otherwise NULL and rte_errno is set.
3821  */
3822 static struct mlx5_flow *
3823 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
3824                 const struct rte_flow_item items[] __rte_unused,
3825                 const struct rte_flow_action actions[] __rte_unused,
3826                 struct rte_flow_error *error)
3827 {
3828         uint32_t size = sizeof(struct mlx5_flow);
3829         struct mlx5_flow *flow;
3830
3831         flow = rte_calloc(__func__, 1, size, 0);
3832         if (!flow) {
3833                 rte_flow_error_set(error, ENOMEM,
3834                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3835                                    "not enough memory to create flow");
3836                 return NULL;
3837         }
3838         flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
3839         return flow;
3840 }
3841
3842 #ifndef NDEBUG
3843 /**
3844  * Sanity check for match mask and value. Similar to check_valid_spec() in
3845  * kernel driver. If unmasked bit is present in value, it returns failure.
3846  *
3847  * @param match_mask
3848  *   pointer to match mask buffer.
3849  * @param match_value
3850  *   pointer to match value buffer.
3851  *
3852  * @return
3853  *   0 if valid, -EINVAL otherwise.
3854  */
3855 static int
3856 flow_dv_check_valid_spec(void *match_mask, void *match_value)
3857 {
3858         uint8_t *m = match_mask;
3859         uint8_t *v = match_value;
3860         unsigned int i;
3861
3862         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
3863                 if (v[i] & ~m[i]) {
3864                         DRV_LOG(ERR,
3865                                 "match_value differs from match_criteria"
3866                                 " %p[%u] != %p[%u]",
3867                                 match_value, i, match_mask, i);
3868                         return -EINVAL;
3869                 }
3870         }
3871         return 0;
3872 }
3873 #endif
3874
3875 /**
3876  * Add Ethernet item to matcher and to the value.
3877  *
3878  * @param[in, out] matcher
3879  *   Flow matcher.
3880  * @param[in, out] key
3881  *   Flow matcher value.
3882  * @param[in] item
3883  *   Flow pattern to translate.
3884  * @param[in] inner
3885  *   Item is inner pattern.
3886  */
3887 static void
3888 flow_dv_translate_item_eth(void *matcher, void *key,
3889                            const struct rte_flow_item *item, int inner)
3890 {
3891         const struct rte_flow_item_eth *eth_m = item->mask;
3892         const struct rte_flow_item_eth *eth_v = item->spec;
3893         const struct rte_flow_item_eth nic_mask = {
3894                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
3895                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
3896                 .type = RTE_BE16(0xffff),
3897         };
3898         void *headers_m;
3899         void *headers_v;
3900         char *l24_v;
3901         unsigned int i;
3902
3903         if (!eth_v)
3904                 return;
3905         if (!eth_m)
3906                 eth_m = &nic_mask;
3907         if (inner) {
3908                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3909                                          inner_headers);
3910                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3911         } else {
3912                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3913                                          outer_headers);
3914                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3915         }
3916         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
3917                &eth_m->dst, sizeof(eth_m->dst));
3918         /* The value must be in the range of the mask. */
3919         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
3920         for (i = 0; i < sizeof(eth_m->dst); ++i)
3921                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
3922         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
3923                &eth_m->src, sizeof(eth_m->src));
3924         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
3925         /* The value must be in the range of the mask. */
3926         for (i = 0; i < sizeof(eth_m->dst); ++i)
3927                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
3928         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
3929                  rte_be_to_cpu_16(eth_m->type));
3930         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
3931         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
3932 }
3933
3934 /**
3935  * Add VLAN item to matcher and to the value.
3936  *
3937  * @param[in, out] dev_flow
3938  *   Flow descriptor.
3939  * @param[in, out] matcher
3940  *   Flow matcher.
3941  * @param[in, out] key
3942  *   Flow matcher value.
3943  * @param[in] item
3944  *   Flow pattern to translate.
3945  * @param[in] inner
3946  *   Item is inner pattern.
3947  */
3948 static void
3949 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
3950                             void *matcher, void *key,
3951                             const struct rte_flow_item *item,
3952                             int inner)
3953 {
3954         const struct rte_flow_item_vlan *vlan_m = item->mask;
3955         const struct rte_flow_item_vlan *vlan_v = item->spec;
3956         void *headers_m;
3957         void *headers_v;
3958         uint16_t tci_m;
3959         uint16_t tci_v;
3960
3961         if (!vlan_v)
3962                 return;
3963         if (!vlan_m)
3964                 vlan_m = &rte_flow_item_vlan_mask;
3965         if (inner) {
3966                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3967                                          inner_headers);
3968                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3969         } else {
3970                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3971                                          outer_headers);
3972                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3973                 /*
3974                  * This is workaround, masks are not supported,
3975                  * and pre-validated.
3976                  */
3977                 dev_flow->dv.vf_vlan.tag =
3978                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
3979         }
3980         tci_m = rte_be_to_cpu_16(vlan_m->tci);
3981         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
3982         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
3983         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
3984         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
3985         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
3986         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
3987         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
3988         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
3989         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
3990         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
3991                  rte_be_to_cpu_16(vlan_m->inner_type));
3992         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
3993                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
3994 }
3995
3996 /**
3997  * Add IPV4 item to matcher and to the value.
3998  *
3999  * @param[in, out] matcher
4000  *   Flow matcher.
4001  * @param[in, out] key
4002  *   Flow matcher value.
4003  * @param[in] item
4004  *   Flow pattern to translate.
4005  * @param[in] inner
4006  *   Item is inner pattern.
4007  * @param[in] group
4008  *   The group to insert the rule.
4009  */
4010 static void
4011 flow_dv_translate_item_ipv4(void *matcher, void *key,
4012                             const struct rte_flow_item *item,
4013                             int inner, uint32_t group)
4014 {
4015         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
4016         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
4017         const struct rte_flow_item_ipv4 nic_mask = {
4018                 .hdr = {
4019                         .src_addr = RTE_BE32(0xffffffff),
4020                         .dst_addr = RTE_BE32(0xffffffff),
4021                         .type_of_service = 0xff,
4022                         .next_proto_id = 0xff,
4023                 },
4024         };
4025         void *headers_m;
4026         void *headers_v;
4027         char *l24_m;
4028         char *l24_v;
4029         uint8_t tos;
4030
4031         if (inner) {
4032                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4033                                          inner_headers);
4034                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4035         } else {
4036                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4037                                          outer_headers);
4038                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4039         }
4040         if (group == 0)
4041                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
4042         else
4043                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
4044         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
4045         if (!ipv4_v)
4046                 return;
4047         if (!ipv4_m)
4048                 ipv4_m = &nic_mask;
4049         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
4050                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
4051         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
4052                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
4053         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
4054         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
4055         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
4056                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
4057         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
4058                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
4059         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
4060         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
4061         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
4062         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
4063                  ipv4_m->hdr.type_of_service);
4064         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
4065         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
4066                  ipv4_m->hdr.type_of_service >> 2);
4067         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
4068         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
4069                  ipv4_m->hdr.next_proto_id);
4070         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
4071                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
4072 }
4073
4074 /**
4075  * Add IPV6 item to matcher and to the value.
4076  *
4077  * @param[in, out] matcher
4078  *   Flow matcher.
4079  * @param[in, out] key
4080  *   Flow matcher value.
4081  * @param[in] item
4082  *   Flow pattern to translate.
4083  * @param[in] inner
4084  *   Item is inner pattern.
4085  * @param[in] group
4086  *   The group to insert the rule.
4087  */
4088 static void
4089 flow_dv_translate_item_ipv6(void *matcher, void *key,
4090                             const struct rte_flow_item *item,
4091                             int inner, uint32_t group)
4092 {
4093         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
4094         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
4095         const struct rte_flow_item_ipv6 nic_mask = {
4096                 .hdr = {
4097                         .src_addr =
4098                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
4099                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
4100                         .dst_addr =
4101                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
4102                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
4103                         .vtc_flow = RTE_BE32(0xffffffff),
4104                         .proto = 0xff,
4105                         .hop_limits = 0xff,
4106                 },
4107         };
4108         void *headers_m;
4109         void *headers_v;
4110         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
4111         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
4112         char *l24_m;
4113         char *l24_v;
4114         uint32_t vtc_m;
4115         uint32_t vtc_v;
4116         int i;
4117         int size;
4118
4119         if (inner) {
4120                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4121                                          inner_headers);
4122                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4123         } else {
4124                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4125                                          outer_headers);
4126                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4127         }
4128         if (group == 0)
4129                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
4130         else
4131                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
4132         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
4133         if (!ipv6_v)
4134                 return;
4135         if (!ipv6_m)
4136                 ipv6_m = &nic_mask;
4137         size = sizeof(ipv6_m->hdr.dst_addr);
4138         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
4139                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
4140         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
4141                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
4142         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
4143         for (i = 0; i < size; ++i)
4144                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
4145         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
4146                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
4147         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
4148                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
4149         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
4150         for (i = 0; i < size; ++i)
4151                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
4152         /* TOS. */
4153         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
4154         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
4155         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
4156         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
4157         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
4158         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
4159         /* Label. */
4160         if (inner) {
4161                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
4162                          vtc_m);
4163                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
4164                          vtc_v);
4165         } else {
4166                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
4167                          vtc_m);
4168                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
4169                          vtc_v);
4170         }
4171         /* Protocol. */
4172         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
4173                  ipv6_m->hdr.proto);
4174         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
4175                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
4176 }
4177
4178 /**
4179  * Add TCP item to matcher and to the value.
4180  *
4181  * @param[in, out] matcher
4182  *   Flow matcher.
4183  * @param[in, out] key
4184  *   Flow matcher value.
4185  * @param[in] item
4186  *   Flow pattern to translate.
4187  * @param[in] inner
4188  *   Item is inner pattern.
4189  */
4190 static void
4191 flow_dv_translate_item_tcp(void *matcher, void *key,
4192                            const struct rte_flow_item *item,
4193                            int inner)
4194 {
4195         const struct rte_flow_item_tcp *tcp_m = item->mask;
4196         const struct rte_flow_item_tcp *tcp_v = item->spec;
4197         void *headers_m;
4198         void *headers_v;
4199
4200         if (inner) {
4201                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4202                                          inner_headers);
4203                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4204         } else {
4205                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4206                                          outer_headers);
4207                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4208         }
4209         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
4210         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
4211         if (!tcp_v)
4212                 return;
4213         if (!tcp_m)
4214                 tcp_m = &rte_flow_item_tcp_mask;
4215         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
4216                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
4217         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
4218                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
4219         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
4220                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
4221         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
4222                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
4223         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
4224                  tcp_m->hdr.tcp_flags);
4225         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
4226                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
4227 }
4228
4229 /**
4230  * Add UDP item to matcher and to the value.
4231  *
4232  * @param[in, out] matcher
4233  *   Flow matcher.
4234  * @param[in, out] key
4235  *   Flow matcher value.
4236  * @param[in] item
4237  *   Flow pattern to translate.
4238  * @param[in] inner
4239  *   Item is inner pattern.
4240  */
4241 static void
4242 flow_dv_translate_item_udp(void *matcher, void *key,
4243                            const struct rte_flow_item *item,
4244                            int inner)
4245 {
4246         const struct rte_flow_item_udp *udp_m = item->mask;
4247         const struct rte_flow_item_udp *udp_v = item->spec;
4248         void *headers_m;
4249         void *headers_v;
4250
4251         if (inner) {
4252                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4253                                          inner_headers);
4254                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4255         } else {
4256                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4257                                          outer_headers);
4258                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4259         }
4260         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
4261         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
4262         if (!udp_v)
4263                 return;
4264         if (!udp_m)
4265                 udp_m = &rte_flow_item_udp_mask;
4266         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
4267                  rte_be_to_cpu_16(udp_m->hdr.src_port));
4268         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
4269                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
4270         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
4271                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
4272         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
4273                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
4274 }
4275
4276 /**
4277  * Add GRE optional Key item to matcher and to the value.
4278  *
4279  * @param[in, out] matcher
4280  *   Flow matcher.
4281  * @param[in, out] key
4282  *   Flow matcher value.
4283  * @param[in] item
4284  *   Flow pattern to translate.
4285  * @param[in] inner
4286  *   Item is inner pattern.
4287  */
4288 static void
4289 flow_dv_translate_item_gre_key(void *matcher, void *key,
4290                                    const struct rte_flow_item *item)
4291 {
4292         const rte_be32_t *key_m = item->mask;
4293         const rte_be32_t *key_v = item->spec;
4294         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
4295         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
4296         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
4297
4298         if (!key_v)
4299                 return;
4300         if (!key_m)
4301                 key_m = &gre_key_default_mask;
4302         /* GRE K bit must be on and should already be validated */
4303         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
4304         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
4305         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
4306                  rte_be_to_cpu_32(*key_m) >> 8);
4307         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
4308                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
4309         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
4310                  rte_be_to_cpu_32(*key_m) & 0xFF);
4311         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
4312                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
4313 }
4314
4315 /**
4316  * Add GRE item to matcher and to the value.
4317  *
4318  * @param[in, out] matcher
4319  *   Flow matcher.
4320  * @param[in, out] key
4321  *   Flow matcher value.
4322  * @param[in] item
4323  *   Flow pattern to translate.
4324  * @param[in] inner
4325  *   Item is inner pattern.
4326  */
4327 static void
4328 flow_dv_translate_item_gre(void *matcher, void *key,
4329                            const struct rte_flow_item *item,
4330                            int inner)
4331 {
4332         const struct rte_flow_item_gre *gre_m = item->mask;
4333         const struct rte_flow_item_gre *gre_v = item->spec;
4334         void *headers_m;
4335         void *headers_v;
4336         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
4337         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
4338         struct {
4339                 union {
4340                         __extension__
4341                         struct {
4342                                 uint16_t version:3;
4343                                 uint16_t rsvd0:9;
4344                                 uint16_t s_present:1;
4345                                 uint16_t k_present:1;
4346                                 uint16_t rsvd_bit1:1;
4347                                 uint16_t c_present:1;
4348                         };
4349                         uint16_t value;
4350                 };
4351         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
4352
4353         if (inner) {
4354                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4355                                          inner_headers);
4356                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4357         } else {
4358                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4359                                          outer_headers);
4360                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4361         }
4362         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
4363         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
4364         if (!gre_v)
4365                 return;
4366         if (!gre_m)
4367                 gre_m = &rte_flow_item_gre_mask;
4368         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
4369                  rte_be_to_cpu_16(gre_m->protocol));
4370         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
4371                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
4372         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
4373         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
4374         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
4375                  gre_crks_rsvd0_ver_m.c_present);
4376         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
4377                  gre_crks_rsvd0_ver_v.c_present &
4378                  gre_crks_rsvd0_ver_m.c_present);
4379         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
4380                  gre_crks_rsvd0_ver_m.k_present);
4381         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
4382                  gre_crks_rsvd0_ver_v.k_present &
4383                  gre_crks_rsvd0_ver_m.k_present);
4384         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
4385                  gre_crks_rsvd0_ver_m.s_present);
4386         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
4387                  gre_crks_rsvd0_ver_v.s_present &
4388                  gre_crks_rsvd0_ver_m.s_present);
4389 }
4390
4391 /**
4392  * Add NVGRE item to matcher and to the value.
4393  *
4394  * @param[in, out] matcher
4395  *   Flow matcher.
4396  * @param[in, out] key
4397  *   Flow matcher value.
4398  * @param[in] item
4399  *   Flow pattern to translate.
4400  * @param[in] inner
4401  *   Item is inner pattern.
4402  */
4403 static void
4404 flow_dv_translate_item_nvgre(void *matcher, void *key,
4405                              const struct rte_flow_item *item,
4406                              int inner)
4407 {
4408         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
4409         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
4410         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
4411         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
4412         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
4413         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
4414         char *gre_key_m;
4415         char *gre_key_v;
4416         int size;
4417         int i;
4418
4419         /* For NVGRE, GRE header fields must be set with defined values. */
4420         const struct rte_flow_item_gre gre_spec = {
4421                 .c_rsvd0_ver = RTE_BE16(0x2000),
4422                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
4423         };
4424         const struct rte_flow_item_gre gre_mask = {
4425                 .c_rsvd0_ver = RTE_BE16(0xB000),
4426                 .protocol = RTE_BE16(UINT16_MAX),
4427         };
4428         const struct rte_flow_item gre_item = {
4429                 .spec = &gre_spec,
4430                 .mask = &gre_mask,
4431                 .last = NULL,
4432         };
4433         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
4434         if (!nvgre_v)
4435                 return;
4436         if (!nvgre_m)
4437                 nvgre_m = &rte_flow_item_nvgre_mask;
4438         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
4439         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
4440         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
4441         memcpy(gre_key_m, tni_flow_id_m, size);
4442         for (i = 0; i < size; ++i)
4443                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
4444 }
4445
4446 /**
4447  * Add VXLAN item to matcher and to the value.
4448  *
4449  * @param[in, out] matcher
4450  *   Flow matcher.
4451  * @param[in, out] key
4452  *   Flow matcher value.
4453  * @param[in] item
4454  *   Flow pattern to translate.
4455  * @param[in] inner
4456  *   Item is inner pattern.
4457  */
4458 static void
4459 flow_dv_translate_item_vxlan(void *matcher, void *key,
4460                              const struct rte_flow_item *item,
4461                              int inner)
4462 {
4463         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
4464         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
4465         void *headers_m;
4466         void *headers_v;
4467         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
4468         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
4469         char *vni_m;
4470         char *vni_v;
4471         uint16_t dport;
4472         int size;
4473         int i;
4474
4475         if (inner) {
4476                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4477                                          inner_headers);
4478                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4479         } else {
4480                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4481                                          outer_headers);
4482                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4483         }
4484         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
4485                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
4486         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
4487                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
4488                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
4489         }
4490         if (!vxlan_v)
4491                 return;
4492         if (!vxlan_m)
4493                 vxlan_m = &rte_flow_item_vxlan_mask;
4494         size = sizeof(vxlan_m->vni);
4495         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
4496         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
4497         memcpy(vni_m, vxlan_m->vni, size);
4498         for (i = 0; i < size; ++i)
4499                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
4500 }
4501
4502 /**
4503  * Add Geneve item to matcher and to the value.
4504  *
4505  * @param[in, out] matcher
4506  *   Flow matcher.
4507  * @param[in, out] key
4508  *   Flow matcher value.
4509  * @param[in] item
4510  *   Flow pattern to translate.
4511  * @param[in] inner
4512  *   Item is inner pattern.
4513  */
4514
4515 static void
4516 flow_dv_translate_item_geneve(void *matcher, void *key,
4517                               const struct rte_flow_item *item, int inner)
4518 {
4519         const struct rte_flow_item_geneve *geneve_m = item->mask;
4520         const struct rte_flow_item_geneve *geneve_v = item->spec;
4521         void *headers_m;
4522         void *headers_v;
4523         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
4524         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
4525         uint16_t dport;
4526         uint16_t gbhdr_m;
4527         uint16_t gbhdr_v;
4528         char *vni_m;
4529         char *vni_v;
4530         size_t size, i;
4531
4532         if (inner) {
4533                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4534                                          inner_headers);
4535                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4536         } else {
4537                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4538                                          outer_headers);
4539                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4540         }
4541         dport = MLX5_UDP_PORT_GENEVE;
4542         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
4543                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
4544                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
4545         }
4546         if (!geneve_v)
4547                 return;
4548         if (!geneve_m)
4549                 geneve_m = &rte_flow_item_geneve_mask;
4550         size = sizeof(geneve_m->vni);
4551         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
4552         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
4553         memcpy(vni_m, geneve_m->vni, size);
4554         for (i = 0; i < size; ++i)
4555                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
4556         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
4557                  rte_be_to_cpu_16(geneve_m->protocol));
4558         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
4559                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
4560         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
4561         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
4562         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
4563                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
4564         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
4565                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
4566         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
4567                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
4568         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
4569                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
4570                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
4571 }
4572
4573 /**
4574  * Add MPLS item to matcher and to the value.
4575  *
4576  * @param[in, out] matcher
4577  *   Flow matcher.
4578  * @param[in, out] key
4579  *   Flow matcher value.
4580  * @param[in] item
4581  *   Flow pattern to translate.
4582  * @param[in] prev_layer
4583  *   The protocol layer indicated in previous item.
4584  * @param[in] inner
4585  *   Item is inner pattern.
4586  */
4587 static void
4588 flow_dv_translate_item_mpls(void *matcher, void *key,
4589                             const struct rte_flow_item *item,
4590                             uint64_t prev_layer,
4591                             int inner)
4592 {
4593         const uint32_t *in_mpls_m = item->mask;
4594         const uint32_t *in_mpls_v = item->spec;
4595         uint32_t *out_mpls_m = 0;
4596         uint32_t *out_mpls_v = 0;
4597         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
4598         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
4599         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
4600                                      misc_parameters_2);
4601         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
4602         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
4603         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4604
4605         switch (prev_layer) {
4606         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
4607                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
4608                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
4609                          MLX5_UDP_PORT_MPLS);
4610                 break;
4611         case MLX5_FLOW_LAYER_GRE:
4612                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
4613                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
4614                          RTE_ETHER_TYPE_MPLS);
4615                 break;
4616         default:
4617                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
4618                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
4619                          IPPROTO_MPLS);
4620                 break;
4621         }
4622         if (!in_mpls_v)
4623                 return;
4624         if (!in_mpls_m)
4625                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
4626         switch (prev_layer) {
4627         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
4628                 out_mpls_m =
4629                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
4630                                                  outer_first_mpls_over_udp);
4631                 out_mpls_v =
4632                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
4633                                                  outer_first_mpls_over_udp);
4634                 break;
4635         case MLX5_FLOW_LAYER_GRE:
4636                 out_mpls_m =
4637                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
4638                                                  outer_first_mpls_over_gre);
4639                 out_mpls_v =
4640                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
4641                                                  outer_first_mpls_over_gre);
4642                 break;
4643         default:
4644                 /* Inner MPLS not over GRE is not supported. */
4645                 if (!inner) {
4646                         out_mpls_m =
4647                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
4648                                                          misc2_m,
4649                                                          outer_first_mpls);
4650                         out_mpls_v =
4651                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
4652                                                          misc2_v,
4653                                                          outer_first_mpls);
4654                 }
4655                 break;
4656         }
4657         if (out_mpls_m && out_mpls_v) {
4658                 *out_mpls_m = *in_mpls_m;
4659                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
4660         }
4661 }
4662
4663 /**
4664  * Add META item to matcher
4665  *
4666  * @param[in, out] matcher
4667  *   Flow matcher.
4668  * @param[in, out] key
4669  *   Flow matcher value.
4670  * @param[in] item
4671  *   Flow pattern to translate.
4672  * @param[in] inner
4673  *   Item is inner pattern.
4674  */
4675 static void
4676 flow_dv_translate_item_meta(void *matcher, void *key,
4677                             const struct rte_flow_item *item)
4678 {
4679         const struct rte_flow_item_meta *meta_m;
4680         const struct rte_flow_item_meta *meta_v;
4681         void *misc2_m =
4682                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
4683         void *misc2_v =
4684                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
4685
4686         meta_m = (const void *)item->mask;
4687         if (!meta_m)
4688                 meta_m = &rte_flow_item_meta_mask;
4689         meta_v = (const void *)item->spec;
4690         if (meta_v) {
4691                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a,
4692                          rte_be_to_cpu_32(meta_m->data));
4693                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a,
4694                          rte_be_to_cpu_32(meta_v->data & meta_m->data));
4695         }
4696 }
4697
4698 /**
4699  * Add vport metadata Reg C0 item to matcher
4700  *
4701  * @param[in, out] matcher
4702  *   Flow matcher.
4703  * @param[in, out] key
4704  *   Flow matcher value.
4705  * @param[in] reg
4706  *   Flow pattern to translate.
4707  */
4708 static void
4709 flow_dv_translate_item_meta_vport(void *matcher, void *key,
4710                                   uint32_t value, uint32_t mask)
4711 {
4712         void *misc2_m =
4713                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
4714         void *misc2_v =
4715                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
4716
4717         MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, mask);
4718         MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, value);
4719 }
4720
4721 /**
4722  * Add source vport match to the specified matcher.
4723  *
4724  * @param[in, out] matcher
4725  *   Flow matcher.
4726  * @param[in, out] key
4727  *   Flow matcher value.
4728  * @param[in] port
4729  *   Source vport value to match
4730  * @param[in] mask
4731  *   Mask
4732  */
4733 static void
4734 flow_dv_translate_item_source_vport(void *matcher, void *key,
4735                                     int16_t port, uint16_t mask)
4736 {
4737         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
4738         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
4739
4740         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
4741         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
4742 }
4743
4744 /**
4745  * Translate port-id item to eswitch match on  port-id.
4746  *
4747  * @param[in] dev
4748  *   The devich to configure through.
4749  * @param[in, out] matcher
4750  *   Flow matcher.
4751  * @param[in, out] key
4752  *   Flow matcher value.
4753  * @param[in] item
4754  *   Flow pattern to translate.
4755  *
4756  * @return
4757  *   0 on success, a negative errno value otherwise.
4758  */
4759 static int
4760 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
4761                                void *key, const struct rte_flow_item *item)
4762 {
4763         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
4764         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
4765         struct mlx5_priv *priv;
4766         uint16_t mask, id;
4767
4768         mask = pid_m ? pid_m->id : 0xffff;
4769         id = pid_v ? pid_v->id : dev->data->port_id;
4770         priv = mlx5_port_to_eswitch_info(id);
4771         if (!priv)
4772                 return -rte_errno;
4773         /* Translate to vport field or to metadata, depending on mode. */
4774         if (priv->vport_meta_mask)
4775                 flow_dv_translate_item_meta_vport(matcher, key,
4776                                                   priv->vport_meta_tag,
4777                                                   priv->vport_meta_mask);
4778         else
4779                 flow_dv_translate_item_source_vport(matcher, key,
4780                                                     priv->vport_id, mask);
4781         return 0;
4782 }
4783
4784 /**
4785  * Add ICMP6 item to matcher and to the value.
4786  *
4787  * @param[in, out] matcher
4788  *   Flow matcher.
4789  * @param[in, out] key
4790  *   Flow matcher value.
4791  * @param[in] item
4792  *   Flow pattern to translate.
4793  * @param[in] inner
4794  *   Item is inner pattern.
4795  */
4796 static void
4797 flow_dv_translate_item_icmp6(void *matcher, void *key,
4798                               const struct rte_flow_item *item,
4799                               int inner)
4800 {
4801         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
4802         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
4803         void *headers_m;
4804         void *headers_v;
4805         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
4806                                      misc_parameters_3);
4807         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
4808         if (inner) {
4809                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4810                                          inner_headers);
4811                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4812         } else {
4813                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4814                                          outer_headers);
4815                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4816         }
4817         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
4818         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
4819         if (!icmp6_v)
4820                 return;
4821         if (!icmp6_m)
4822                 icmp6_m = &rte_flow_item_icmp6_mask;
4823         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
4824         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
4825                  icmp6_v->type & icmp6_m->type);
4826         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
4827         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
4828                  icmp6_v->code & icmp6_m->code);
4829 }
4830
4831 /**
4832  * Add ICMP item to matcher and to the value.
4833  *
4834  * @param[in, out] matcher
4835  *   Flow matcher.
4836  * @param[in, out] key
4837  *   Flow matcher value.
4838  * @param[in] item
4839  *   Flow pattern to translate.
4840  * @param[in] inner
4841  *   Item is inner pattern.
4842  */
4843 static void
4844 flow_dv_translate_item_icmp(void *matcher, void *key,
4845                             const struct rte_flow_item *item,
4846                             int inner)
4847 {
4848         const struct rte_flow_item_icmp *icmp_m = item->mask;
4849         const struct rte_flow_item_icmp *icmp_v = item->spec;
4850         void *headers_m;
4851         void *headers_v;
4852         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
4853                                      misc_parameters_3);
4854         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
4855         if (inner) {
4856                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4857                                          inner_headers);
4858                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4859         } else {
4860                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4861                                          outer_headers);
4862                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4863         }
4864         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
4865         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
4866         if (!icmp_v)
4867                 return;
4868         if (!icmp_m)
4869                 icmp_m = &rte_flow_item_icmp_mask;
4870         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
4871                  icmp_m->hdr.icmp_type);
4872         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
4873                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
4874         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
4875                  icmp_m->hdr.icmp_code);
4876         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
4877                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
4878 }
4879
4880 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
4881
4882 #define HEADER_IS_ZERO(match_criteria, headers)                              \
4883         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
4884                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
4885
4886 /**
4887  * Calculate flow matcher enable bitmap.
4888  *
4889  * @param match_criteria
4890  *   Pointer to flow matcher criteria.
4891  *
4892  * @return
4893  *   Bitmap of enabled fields.
4894  */
4895 static uint8_t
4896 flow_dv_matcher_enable(uint32_t *match_criteria)
4897 {
4898         uint8_t match_criteria_enable;
4899
4900         match_criteria_enable =
4901                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
4902                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
4903         match_criteria_enable |=
4904                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
4905                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
4906         match_criteria_enable |=
4907                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
4908                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
4909         match_criteria_enable |=
4910                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
4911                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
4912         match_criteria_enable |=
4913                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
4914                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
4915         return match_criteria_enable;
4916 }
4917
4918
4919 /**
4920  * Get a flow table.
4921  *
4922  * @param dev[in, out]
4923  *   Pointer to rte_eth_dev structure.
4924  * @param[in] table_id
4925  *   Table id to use.
4926  * @param[in] egress
4927  *   Direction of the table.
4928  * @param[in] transfer
4929  *   E-Switch or NIC flow.
4930  * @param[out] error
4931  *   pointer to error structure.
4932  *
4933  * @return
4934  *   Returns tables resource based on the index, NULL in case of failed.
4935  */
4936 static struct mlx5_flow_tbl_resource *
4937 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
4938                          uint32_t table_id, uint8_t egress,
4939                          uint8_t transfer,
4940                          struct rte_flow_error *error)
4941 {
4942         struct mlx5_priv *priv = dev->data->dev_private;
4943         struct mlx5_ibv_shared *sh = priv->sh;
4944         struct mlx5_flow_tbl_resource *tbl;
4945
4946 #ifdef HAVE_MLX5DV_DR
4947         if (transfer) {
4948                 tbl = &sh->fdb_tbl[table_id];
4949                 if (!tbl->obj)
4950                         tbl->obj = mlx5_glue->dr_create_flow_tbl
4951                                 (sh->fdb_domain, table_id);
4952         } else if (egress) {
4953                 tbl = &sh->tx_tbl[table_id];
4954                 if (!tbl->obj)
4955                         tbl->obj = mlx5_glue->dr_create_flow_tbl
4956                                 (sh->tx_domain, table_id);
4957         } else {
4958                 tbl = &sh->rx_tbl[table_id];
4959                 if (!tbl->obj)
4960                         tbl->obj = mlx5_glue->dr_create_flow_tbl
4961                                 (sh->rx_domain, table_id);
4962         }
4963         if (!tbl->obj) {
4964                 rte_flow_error_set(error, ENOMEM,
4965                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4966                                    NULL, "cannot create table");
4967                 return NULL;
4968         }
4969         rte_atomic32_inc(&tbl->refcnt);
4970         return tbl;
4971 #else
4972         (void)error;
4973         (void)tbl;
4974         if (transfer)
4975                 return &sh->fdb_tbl[table_id];
4976         else if (egress)
4977                 return &sh->tx_tbl[table_id];
4978         else
4979                 return &sh->rx_tbl[table_id];
4980 #endif
4981 }
4982
4983 /**
4984  * Release a flow table.
4985  *
4986  * @param[in] tbl
4987  *   Table resource to be released.
4988  *
4989  * @return
4990  *   Returns 0 if table was released, else return 1;
4991  */
4992 static int
4993 flow_dv_tbl_resource_release(struct mlx5_flow_tbl_resource *tbl)
4994 {
4995         if (!tbl)
4996                 return 0;
4997         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
4998                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
4999                 tbl->obj = NULL;
5000                 return 0;
5001         }
5002         return 1;
5003 }
5004
5005 /**
5006  * Register the flow matcher.
5007  *
5008  * @param dev[in, out]
5009  *   Pointer to rte_eth_dev structure.
5010  * @param[in, out] matcher
5011  *   Pointer to flow matcher.
5012  * @parm[in, out] dev_flow
5013  *   Pointer to the dev_flow.
5014  * @param[out] error
5015  *   pointer to error structure.
5016  *
5017  * @return
5018  *   0 on success otherwise -errno and errno is set.
5019  */
5020 static int
5021 flow_dv_matcher_register(struct rte_eth_dev *dev,
5022                          struct mlx5_flow_dv_matcher *matcher,
5023                          struct mlx5_flow *dev_flow,
5024                          struct rte_flow_error *error)
5025 {
5026         struct mlx5_priv *priv = dev->data->dev_private;
5027         struct mlx5_ibv_shared *sh = priv->sh;
5028         struct mlx5_flow_dv_matcher *cache_matcher;
5029         struct mlx5dv_flow_matcher_attr dv_attr = {
5030                 .type = IBV_FLOW_ATTR_NORMAL,
5031                 .match_mask = (void *)&matcher->mask,
5032         };
5033         struct mlx5_flow_tbl_resource *tbl = NULL;
5034
5035         /* Lookup from cache. */
5036         LIST_FOREACH(cache_matcher, &sh->matchers, next) {
5037                 if (matcher->crc == cache_matcher->crc &&
5038                     matcher->priority == cache_matcher->priority &&
5039                     matcher->egress == cache_matcher->egress &&
5040                     matcher->group == cache_matcher->group &&
5041                     matcher->transfer == cache_matcher->transfer &&
5042                     !memcmp((const void *)matcher->mask.buf,
5043                             (const void *)cache_matcher->mask.buf,
5044                             cache_matcher->mask.size)) {
5045                         DRV_LOG(DEBUG,
5046                                 "priority %hd use %s matcher %p: refcnt %d++",
5047                                 cache_matcher->priority,
5048                                 cache_matcher->egress ? "tx" : "rx",
5049                                 (void *)cache_matcher,
5050                                 rte_atomic32_read(&cache_matcher->refcnt));
5051                         rte_atomic32_inc(&cache_matcher->refcnt);
5052                         dev_flow->dv.matcher = cache_matcher;
5053                         return 0;
5054                 }
5055         }
5056         /* Register new matcher. */
5057         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
5058         if (!cache_matcher)
5059                 return rte_flow_error_set(error, ENOMEM,
5060                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5061                                           "cannot allocate matcher memory");
5062         tbl = flow_dv_tbl_resource_get(dev, matcher->group,
5063                                        matcher->egress, matcher->transfer,
5064                                        error);
5065         if (!tbl) {
5066                 rte_free(cache_matcher);
5067                 return rte_flow_error_set(error, ENOMEM,
5068                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5069                                           NULL, "cannot create table");
5070         }
5071         *cache_matcher = *matcher;
5072         dv_attr.match_criteria_enable =
5073                 flow_dv_matcher_enable(cache_matcher->mask.buf);
5074         dv_attr.priority = matcher->priority;
5075         if (matcher->egress)
5076                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
5077         cache_matcher->matcher_object =
5078                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
5079         if (!cache_matcher->matcher_object) {
5080                 rte_free(cache_matcher);
5081 #ifdef HAVE_MLX5DV_DR
5082                 flow_dv_tbl_resource_release(tbl);
5083 #endif
5084                 return rte_flow_error_set(error, ENOMEM,
5085                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5086                                           NULL, "cannot create matcher");
5087         }
5088         rte_atomic32_inc(&cache_matcher->refcnt);
5089         LIST_INSERT_HEAD(&sh->matchers, cache_matcher, next);
5090         dev_flow->dv.matcher = cache_matcher;
5091         DRV_LOG(DEBUG, "priority %hd new %s matcher %p: refcnt %d",
5092                 cache_matcher->priority,
5093                 cache_matcher->egress ? "tx" : "rx", (void *)cache_matcher,
5094                 rte_atomic32_read(&cache_matcher->refcnt));
5095         rte_atomic32_inc(&tbl->refcnt);
5096         return 0;
5097 }
5098
5099 /**
5100  * Find existing tag resource or create and register a new one.
5101  *
5102  * @param dev[in, out]
5103  *   Pointer to rte_eth_dev structure.
5104  * @param[in, out] resource
5105  *   Pointer to tag resource.
5106  * @parm[in, out] dev_flow
5107  *   Pointer to the dev_flow.
5108  * @param[out] error
5109  *   pointer to error structure.
5110  *
5111  * @return
5112  *   0 on success otherwise -errno and errno is set.
5113  */
5114 static int
5115 flow_dv_tag_resource_register
5116                         (struct rte_eth_dev *dev,
5117                          struct mlx5_flow_dv_tag_resource *resource,
5118                          struct mlx5_flow *dev_flow,
5119                          struct rte_flow_error *error)
5120 {
5121         struct mlx5_priv *priv = dev->data->dev_private;
5122         struct mlx5_ibv_shared *sh = priv->sh;
5123         struct mlx5_flow_dv_tag_resource *cache_resource;
5124
5125         /* Lookup a matching resource from cache. */
5126         LIST_FOREACH(cache_resource, &sh->tags, next) {
5127                 if (resource->tag == cache_resource->tag) {
5128                         DRV_LOG(DEBUG, "tag resource %p: refcnt %d++",
5129                                 (void *)cache_resource,
5130                                 rte_atomic32_read(&cache_resource->refcnt));
5131                         rte_atomic32_inc(&cache_resource->refcnt);
5132                         dev_flow->flow->tag_resource = cache_resource;
5133                         return 0;
5134                 }
5135         }
5136         /* Register new  resource. */
5137         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
5138         if (!cache_resource)
5139                 return rte_flow_error_set(error, ENOMEM,
5140                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5141                                           "cannot allocate resource memory");
5142         *cache_resource = *resource;
5143         cache_resource->action = mlx5_glue->dv_create_flow_action_tag
5144                 (resource->tag);
5145         if (!cache_resource->action) {
5146                 rte_free(cache_resource);
5147                 return rte_flow_error_set(error, ENOMEM,
5148                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5149                                           NULL, "cannot create action");
5150         }
5151         rte_atomic32_init(&cache_resource->refcnt);
5152         rte_atomic32_inc(&cache_resource->refcnt);
5153         LIST_INSERT_HEAD(&sh->tags, cache_resource, next);
5154         dev_flow->flow->tag_resource = cache_resource;
5155         DRV_LOG(DEBUG, "new tag resource %p: refcnt %d++",
5156                 (void *)cache_resource,
5157                 rte_atomic32_read(&cache_resource->refcnt));
5158         return 0;
5159 }
5160
5161 /**
5162  * Release the tag.
5163  *
5164  * @param dev
5165  *   Pointer to Ethernet device.
5166  * @param flow
5167  *   Pointer to mlx5_flow.
5168  *
5169  * @return
5170  *   1 while a reference on it exists, 0 when freed.
5171  */
5172 static int
5173 flow_dv_tag_release(struct rte_eth_dev *dev,
5174                     struct mlx5_flow_dv_tag_resource *tag)
5175 {
5176         assert(tag);
5177         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
5178                 dev->data->port_id, (void *)tag,
5179                 rte_atomic32_read(&tag->refcnt));
5180         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
5181                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
5182                 LIST_REMOVE(tag, next);
5183                 DRV_LOG(DEBUG, "port %u tag %p: removed",
5184                         dev->data->port_id, (void *)tag);
5185                 rte_free(tag);
5186                 return 0;
5187         }
5188         return 1;
5189 }
5190
5191 /**
5192  * Translate port ID action to vport.
5193  *
5194  * @param[in] dev
5195  *   Pointer to rte_eth_dev structure.
5196  * @param[in] action
5197  *   Pointer to the port ID action.
5198  * @param[out] dst_port_id
5199  *   The target port ID.
5200  * @param[out] error
5201  *   Pointer to the error structure.
5202  *
5203  * @return
5204  *   0 on success, a negative errno value otherwise and rte_errno is set.
5205  */
5206 static int
5207 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
5208                                  const struct rte_flow_action *action,
5209                                  uint32_t *dst_port_id,
5210                                  struct rte_flow_error *error)
5211 {
5212         uint32_t port;
5213         struct mlx5_priv *priv;
5214         const struct rte_flow_action_port_id *conf =
5215                         (const struct rte_flow_action_port_id *)action->conf;
5216
5217         port = conf->original ? dev->data->port_id : conf->id;
5218         priv = mlx5_port_to_eswitch_info(port);
5219         if (!priv)
5220                 return rte_flow_error_set(error, -rte_errno,
5221                                           RTE_FLOW_ERROR_TYPE_ACTION,
5222                                           NULL,
5223                                           "No eswitch info was found for port");
5224         if (priv->vport_meta_mask)
5225                 *dst_port_id = priv->vport_meta_tag;
5226         else
5227                 *dst_port_id = priv->vport_id;
5228         return 0;
5229 }
5230
5231 /**
5232  * Fill the flow with DV spec.
5233  *
5234  * @param[in] dev
5235  *   Pointer to rte_eth_dev structure.
5236  * @param[in, out] dev_flow
5237  *   Pointer to the sub flow.
5238  * @param[in] attr
5239  *   Pointer to the flow attributes.
5240  * @param[in] items
5241  *   Pointer to the list of items.
5242  * @param[in] actions
5243  *   Pointer to the list of actions.
5244  * @param[out] error
5245  *   Pointer to the error structure.
5246  *
5247  * @return
5248  *   0 on success, a negative errno value otherwise and rte_errno is set.
5249  */
5250 static int
5251 flow_dv_translate(struct rte_eth_dev *dev,
5252                   struct mlx5_flow *dev_flow,
5253                   const struct rte_flow_attr *attr,
5254                   const struct rte_flow_item items[],
5255                   const struct rte_flow_action actions[],
5256                   struct rte_flow_error *error)
5257 {
5258         struct mlx5_priv *priv = dev->data->dev_private;
5259         struct rte_flow *flow = dev_flow->flow;
5260         uint64_t item_flags = 0;
5261         uint64_t last_item = 0;
5262         uint64_t action_flags = 0;
5263         uint64_t priority = attr->priority;
5264         struct mlx5_flow_dv_matcher matcher = {
5265                 .mask = {
5266                         .size = sizeof(matcher.mask.buf),
5267                 },
5268         };
5269         int actions_n = 0;
5270         bool actions_end = false;
5271         struct mlx5_flow_dv_modify_hdr_resource res = {
5272                 .ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
5273                                           MLX5DV_FLOW_TABLE_TYPE_NIC_RX
5274         };
5275         union flow_dv_attr flow_attr = { .attr = 0 };
5276         struct mlx5_flow_dv_tag_resource tag_resource;
5277         uint32_t modify_action_position = UINT32_MAX;
5278         void *match_mask = matcher.mask.buf;
5279         void *match_value = dev_flow->dv.value.buf;
5280         uint8_t next_protocol = 0xff;
5281         struct rte_vlan_hdr vlan = { 0 };
5282         bool vlan_inherited = false;
5283         uint16_t vlan_tci;
5284         uint32_t table;
5285         int ret = 0;
5286
5287         ret = mlx5_flow_group_to_table(attr, dev_flow->external, attr->group,
5288                                        &table, error);
5289         if (ret)
5290                 return ret;
5291         flow->group = table;
5292         if (attr->transfer)
5293                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
5294         if (priority == MLX5_FLOW_PRIO_RSVD)
5295                 priority = priv->config.flow_prio - 1;
5296         for (; !actions_end ; actions++) {
5297                 const struct rte_flow_action_queue *queue;
5298                 const struct rte_flow_action_rss *rss;
5299                 const struct rte_flow_action *action = actions;
5300                 const struct rte_flow_action_count *count = action->conf;
5301                 const uint8_t *rss_key;
5302                 const struct rte_flow_action_jump *jump_data;
5303                 struct mlx5_flow_dv_jump_tbl_resource jump_tbl_resource;
5304                 struct mlx5_flow_tbl_resource *tbl;
5305                 uint32_t port_id = 0;
5306                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
5307
5308                 switch (actions->type) {
5309                 case RTE_FLOW_ACTION_TYPE_VOID:
5310                         break;
5311                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5312                         if (flow_dv_translate_action_port_id(dev, action,
5313                                                              &port_id, error))
5314                                 return -rte_errno;
5315                         port_id_resource.port_id = port_id;
5316                         if (flow_dv_port_id_action_resource_register
5317                             (dev, &port_id_resource, dev_flow, error))
5318                                 return -rte_errno;
5319                         dev_flow->dv.actions[actions_n++] =
5320                                 dev_flow->dv.port_id_action->action;
5321                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
5322                         break;
5323                 case RTE_FLOW_ACTION_TYPE_FLAG:
5324                         tag_resource.tag =
5325                                 mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
5326                         if (!flow->tag_resource)
5327                                 if (flow_dv_tag_resource_register
5328                                     (dev, &tag_resource, dev_flow, error))
5329                                         return errno;
5330                         dev_flow->dv.actions[actions_n++] =
5331                                 flow->tag_resource->action;
5332                         action_flags |= MLX5_FLOW_ACTION_FLAG;
5333                         break;
5334                 case RTE_FLOW_ACTION_TYPE_MARK:
5335                         tag_resource.tag = mlx5_flow_mark_set
5336                               (((const struct rte_flow_action_mark *)
5337                                (actions->conf))->id);
5338                         if (!flow->tag_resource)
5339                                 if (flow_dv_tag_resource_register
5340                                     (dev, &tag_resource, dev_flow, error))
5341                                         return errno;
5342                         dev_flow->dv.actions[actions_n++] =
5343                                 flow->tag_resource->action;
5344                         action_flags |= MLX5_FLOW_ACTION_MARK;
5345                         break;
5346                 case RTE_FLOW_ACTION_TYPE_DROP:
5347                         action_flags |= MLX5_FLOW_ACTION_DROP;
5348                         break;
5349                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5350                         queue = actions->conf;
5351                         flow->rss.queue_num = 1;
5352                         (*flow->queue)[0] = queue->index;
5353                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
5354                         break;
5355                 case RTE_FLOW_ACTION_TYPE_RSS:
5356                         rss = actions->conf;
5357                         if (flow->queue)
5358                                 memcpy((*flow->queue), rss->queue,
5359                                        rss->queue_num * sizeof(uint16_t));
5360                         flow->rss.queue_num = rss->queue_num;
5361                         /* NULL RSS key indicates default RSS key. */
5362                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
5363                         memcpy(flow->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
5364                         /* RSS type 0 indicates default RSS type ETH_RSS_IP. */
5365                         flow->rss.types = !rss->types ? ETH_RSS_IP : rss->types;
5366                         flow->rss.level = rss->level;
5367                         action_flags |= MLX5_FLOW_ACTION_RSS;
5368                         break;
5369                 case RTE_FLOW_ACTION_TYPE_COUNT:
5370                         if (!priv->config.devx) {
5371                                 rte_errno = ENOTSUP;
5372                                 goto cnt_err;
5373                         }
5374                         flow->counter = flow_dv_counter_alloc(dev,
5375                                                               count->shared,
5376                                                               count->id,
5377                                                               flow->group);
5378                         if (flow->counter == NULL)
5379                                 goto cnt_err;
5380                         dev_flow->dv.actions[actions_n++] =
5381                                 flow->counter->action;
5382                         action_flags |= MLX5_FLOW_ACTION_COUNT;
5383                         break;
5384 cnt_err:
5385                         if (rte_errno == ENOTSUP)
5386                                 return rte_flow_error_set
5387                                               (error, ENOTSUP,
5388                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5389                                                NULL,
5390                                                "count action not supported");
5391                         else
5392                                 return rte_flow_error_set
5393                                                 (error, rte_errno,
5394                                                  RTE_FLOW_ERROR_TYPE_ACTION,
5395                                                  action,
5396                                                  "cannot create counter"
5397                                                   " object.");
5398                         break;
5399                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
5400                         dev_flow->dv.actions[actions_n++] =
5401                                                 priv->sh->pop_vlan_action;
5402                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
5403                         break;
5404                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5405                         if (!vlan_inherited) {
5406                                 flow_dev_get_vlan_info_from_items(items, &vlan);
5407                                 vlan_inherited = true;
5408                         }
5409                         vlan.eth_proto = rte_be_to_cpu_16
5410                              ((((const struct rte_flow_action_of_push_vlan *)
5411                                                    actions->conf)->ethertype));
5412                         if (flow_dv_create_action_push_vlan
5413                                             (dev, attr, &vlan, dev_flow, error))
5414                                 return -rte_errno;
5415                         dev_flow->dv.actions[actions_n++] =
5416                                            dev_flow->dv.push_vlan_res->action;
5417                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
5418                         /* Push VLAN command is also handling this VLAN_VID */
5419                         action_flags &= ~MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
5420                         break;
5421                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
5422                         if (!vlan_inherited) {
5423                                 flow_dev_get_vlan_info_from_items(items, &vlan);
5424                                 vlan_inherited = true;
5425                         }
5426                         vlan_tci =
5427                             ((const struct rte_flow_action_of_set_vlan_pcp *)
5428                                                        actions->conf)->vlan_pcp;
5429                         vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
5430                         vlan.vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
5431                         vlan.vlan_tci |= vlan_tci;
5432                         /* Push VLAN command will use this value */
5433                         break;
5434                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
5435                         if (!vlan_inherited) {
5436                                 flow_dev_get_vlan_info_from_items(items, &vlan);
5437                                 vlan_inherited = true;
5438                         }
5439                         vlan.vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
5440                         vlan.vlan_tci |= rte_be_to_cpu_16
5441                             (((const struct rte_flow_action_of_set_vlan_vid *)
5442                                                      actions->conf)->vlan_vid);
5443                         /* Push VLAN command will use this value */
5444                         if (mlx5_flow_find_action
5445                                 (actions,
5446                                  RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN))
5447                                 break;
5448                         /* If no VLAN push - this is a modify header action */
5449                         if (flow_dv_convert_action_modify_vlan_vid
5450                                                         (&res, actions, error))
5451                                 return -rte_errno;
5452                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
5453                         break;
5454                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5455                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5456                         if (flow_dv_create_action_l2_encap(dev, actions,
5457                                                            dev_flow,
5458                                                            attr->transfer,
5459                                                            error))
5460                                 return -rte_errno;
5461                         dev_flow->dv.actions[actions_n++] =
5462                                 dev_flow->dv.encap_decap->verbs_action;
5463                         action_flags |= actions->type ==
5464                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
5465                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
5466                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
5467                         break;
5468                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5469                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5470                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
5471                                                            attr->transfer,
5472                                                            error))
5473                                 return -rte_errno;
5474                         dev_flow->dv.actions[actions_n++] =
5475                                 dev_flow->dv.encap_decap->verbs_action;
5476                         action_flags |= actions->type ==
5477                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
5478                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
5479                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
5480                         break;
5481                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5482                         /* Handle encap with preceding decap. */
5483                         if (action_flags & MLX5_FLOW_ACTION_RAW_DECAP) {
5484                                 if (flow_dv_create_action_raw_encap
5485                                         (dev, actions, dev_flow, attr, error))
5486                                         return -rte_errno;
5487                                 dev_flow->dv.actions[actions_n++] =
5488                                         dev_flow->dv.encap_decap->verbs_action;
5489                         } else {
5490                                 /* Handle encap without preceding decap. */
5491                                 if (flow_dv_create_action_l2_encap
5492                                     (dev, actions, dev_flow, attr->transfer,
5493                                      error))
5494                                         return -rte_errno;
5495                                 dev_flow->dv.actions[actions_n++] =
5496                                         dev_flow->dv.encap_decap->verbs_action;
5497                         }
5498                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
5499                         break;
5500                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5501                         /* Check if this decap is followed by encap. */
5502                         for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
5503                                action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
5504                                action++) {
5505                         }
5506                         /* Handle decap only if it isn't followed by encap. */
5507                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
5508                                 if (flow_dv_create_action_l2_decap
5509                                     (dev, dev_flow, attr->transfer, error))
5510                                         return -rte_errno;
5511                                 dev_flow->dv.actions[actions_n++] =
5512                                         dev_flow->dv.encap_decap->verbs_action;
5513                         }
5514                         /* If decap is followed by encap, handle it at encap. */
5515                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
5516                         break;
5517                 case RTE_FLOW_ACTION_TYPE_JUMP:
5518                         jump_data = action->conf;
5519                         ret = mlx5_flow_group_to_table(attr, dev_flow->external,
5520                                                        jump_data->group, &table,
5521                                                        error);
5522                         if (ret)
5523                                 return ret;
5524                         tbl = flow_dv_tbl_resource_get(dev, table,
5525                                                        attr->egress,
5526                                                        attr->transfer, error);
5527                         if (!tbl)
5528                                 return rte_flow_error_set
5529                                                 (error, errno,
5530                                                  RTE_FLOW_ERROR_TYPE_ACTION,
5531                                                  NULL,
5532                                                  "cannot create jump action.");
5533                         jump_tbl_resource.tbl = tbl;
5534                         if (flow_dv_jump_tbl_resource_register
5535                             (dev, &jump_tbl_resource, dev_flow, error)) {
5536                                 flow_dv_tbl_resource_release(tbl);
5537                                 return rte_flow_error_set
5538                                                 (error, errno,
5539                                                  RTE_FLOW_ERROR_TYPE_ACTION,
5540                                                  NULL,
5541                                                  "cannot create jump action.");
5542                         }
5543                         dev_flow->dv.actions[actions_n++] =
5544                                 dev_flow->dv.jump->action;
5545                         action_flags |= MLX5_FLOW_ACTION_JUMP;
5546                         break;
5547                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
5548                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
5549                         if (flow_dv_convert_action_modify_mac(&res, actions,
5550                                                               error))
5551                                 return -rte_errno;
5552                         action_flags |= actions->type ==
5553                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
5554                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
5555                                         MLX5_FLOW_ACTION_SET_MAC_DST;
5556                         break;
5557                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
5558                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
5559                         if (flow_dv_convert_action_modify_ipv4(&res, actions,
5560                                                                error))
5561                                 return -rte_errno;
5562                         action_flags |= actions->type ==
5563                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
5564                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
5565                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
5566                         break;
5567                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
5568                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
5569                         if (flow_dv_convert_action_modify_ipv6(&res, actions,
5570                                                                error))
5571                                 return -rte_errno;
5572                         action_flags |= actions->type ==
5573                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
5574                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
5575                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
5576                         break;
5577                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
5578                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
5579                         if (flow_dv_convert_action_modify_tp(&res, actions,
5580                                                              items, &flow_attr,
5581                                                              error))
5582                                 return -rte_errno;
5583                         action_flags |= actions->type ==
5584                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
5585                                         MLX5_FLOW_ACTION_SET_TP_SRC :
5586                                         MLX5_FLOW_ACTION_SET_TP_DST;
5587                         break;
5588                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
5589                         if (flow_dv_convert_action_modify_dec_ttl(&res, items,
5590                                                                   &flow_attr,
5591                                                                   error))
5592                                 return -rte_errno;
5593                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
5594                         break;
5595                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
5596                         if (flow_dv_convert_action_modify_ttl(&res, actions,
5597                                                              items, &flow_attr,
5598                                                              error))
5599                                 return -rte_errno;
5600                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
5601                         break;
5602                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
5603                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
5604                         if (flow_dv_convert_action_modify_tcp_seq(&res, actions,
5605                                                                   error))
5606                                 return -rte_errno;
5607                         action_flags |= actions->type ==
5608                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
5609                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
5610                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
5611                         break;
5612
5613                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5614                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5615                         if (flow_dv_convert_action_modify_tcp_ack(&res, actions,
5616                                                                   error))
5617                                 return -rte_errno;
5618                         action_flags |= actions->type ==
5619                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
5620                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
5621                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
5622                         break;
5623                 case RTE_FLOW_ACTION_TYPE_END:
5624                         actions_end = true;
5625                         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS) {
5626                                 /* create modify action if needed. */
5627                                 if (flow_dv_modify_hdr_resource_register
5628                                                                 (dev, &res,
5629                                                                  dev_flow,
5630                                                                  error))
5631                                         return -rte_errno;
5632                                 dev_flow->dv.actions[modify_action_position] =
5633                                         dev_flow->dv.modify_hdr->verbs_action;
5634                         }
5635                         break;
5636                 default:
5637                         break;
5638                 }
5639                 if ((action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS) &&
5640                     modify_action_position == UINT32_MAX)
5641                         modify_action_position = actions_n++;
5642         }
5643         dev_flow->dv.actions_n = actions_n;
5644         flow->actions = action_flags;
5645         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
5646                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
5647
5648                 switch (items->type) {
5649                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
5650                         flow_dv_translate_item_port_id(dev, match_mask,
5651                                                        match_value, items);
5652                         last_item = MLX5_FLOW_ITEM_PORT_ID;
5653                         break;
5654                 case RTE_FLOW_ITEM_TYPE_ETH:
5655                         flow_dv_translate_item_eth(match_mask, match_value,
5656                                                    items, tunnel);
5657                         matcher.priority = MLX5_PRIORITY_MAP_L2;
5658                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
5659                                              MLX5_FLOW_LAYER_OUTER_L2;
5660                         break;
5661                 case RTE_FLOW_ITEM_TYPE_VLAN:
5662                         flow_dv_translate_item_vlan(dev_flow,
5663                                                     match_mask, match_value,
5664                                                     items, tunnel);
5665                         matcher.priority = MLX5_PRIORITY_MAP_L2;
5666                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
5667                                               MLX5_FLOW_LAYER_INNER_VLAN) :
5668                                              (MLX5_FLOW_LAYER_OUTER_L2 |
5669                                               MLX5_FLOW_LAYER_OUTER_VLAN);
5670                         break;
5671                 case RTE_FLOW_ITEM_TYPE_IPV4:
5672                         mlx5_flow_tunnel_ip_check(items, next_protocol,
5673                                                   &item_flags, &tunnel);
5674                         flow_dv_translate_item_ipv4(match_mask, match_value,
5675                                                     items, tunnel, flow->group);
5676                         matcher.priority = MLX5_PRIORITY_MAP_L3;
5677                         dev_flow->dv.hash_fields |=
5678                                 mlx5_flow_hashfields_adjust
5679                                         (dev_flow, tunnel,
5680                                          MLX5_IPV4_LAYER_TYPES,
5681                                          MLX5_IPV4_IBV_RX_HASH);
5682                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
5683                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
5684                         if (items->mask != NULL &&
5685                             ((const struct rte_flow_item_ipv4 *)
5686                              items->mask)->hdr.next_proto_id) {
5687                                 next_protocol =
5688                                         ((const struct rte_flow_item_ipv4 *)
5689                                          (items->spec))->hdr.next_proto_id;
5690                                 next_protocol &=
5691                                         ((const struct rte_flow_item_ipv4 *)
5692                                          (items->mask))->hdr.next_proto_id;
5693                         } else {
5694                                 /* Reset for inner layer. */
5695                                 next_protocol = 0xff;
5696                         }
5697                         break;
5698                 case RTE_FLOW_ITEM_TYPE_IPV6:
5699                         mlx5_flow_tunnel_ip_check(items, next_protocol,
5700                                                   &item_flags, &tunnel);
5701                         flow_dv_translate_item_ipv6(match_mask, match_value,
5702                                                     items, tunnel, flow->group);
5703                         matcher.priority = MLX5_PRIORITY_MAP_L3;
5704                         dev_flow->dv.hash_fields |=
5705                                 mlx5_flow_hashfields_adjust
5706                                         (dev_flow, tunnel,
5707                                          MLX5_IPV6_LAYER_TYPES,
5708                                          MLX5_IPV6_IBV_RX_HASH);
5709                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
5710                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
5711                         if (items->mask != NULL &&
5712                             ((const struct rte_flow_item_ipv6 *)
5713                              items->mask)->hdr.proto) {
5714                                 next_protocol =
5715                                         ((const struct rte_flow_item_ipv6 *)
5716                                          items->spec)->hdr.proto;
5717                                 next_protocol &=
5718                                         ((const struct rte_flow_item_ipv6 *)
5719                                          items->mask)->hdr.proto;
5720                         } else {
5721                                 /* Reset for inner layer. */
5722                                 next_protocol = 0xff;
5723                         }
5724                         break;
5725                 case RTE_FLOW_ITEM_TYPE_TCP:
5726                         flow_dv_translate_item_tcp(match_mask, match_value,
5727                                                    items, tunnel);
5728                         matcher.priority = MLX5_PRIORITY_MAP_L4;
5729                         dev_flow->dv.hash_fields |=
5730                                 mlx5_flow_hashfields_adjust
5731                                         (dev_flow, tunnel, ETH_RSS_TCP,
5732                                          IBV_RX_HASH_SRC_PORT_TCP |
5733                                          IBV_RX_HASH_DST_PORT_TCP);
5734                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
5735                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
5736                         break;
5737                 case RTE_FLOW_ITEM_TYPE_UDP:
5738                         flow_dv_translate_item_udp(match_mask, match_value,
5739                                                    items, tunnel);
5740                         matcher.priority = MLX5_PRIORITY_MAP_L4;
5741                         dev_flow->dv.hash_fields |=
5742                                 mlx5_flow_hashfields_adjust
5743                                         (dev_flow, tunnel, ETH_RSS_UDP,
5744                                          IBV_RX_HASH_SRC_PORT_UDP |
5745                                          IBV_RX_HASH_DST_PORT_UDP);
5746                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
5747                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
5748                         break;
5749                 case RTE_FLOW_ITEM_TYPE_GRE:
5750                         flow_dv_translate_item_gre(match_mask, match_value,
5751                                                    items, tunnel);
5752                         last_item = MLX5_FLOW_LAYER_GRE;
5753                         break;
5754                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
5755                         flow_dv_translate_item_gre_key(match_mask,
5756                                                        match_value, items);
5757                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
5758                         break;
5759                 case RTE_FLOW_ITEM_TYPE_NVGRE:
5760                         flow_dv_translate_item_nvgre(match_mask, match_value,
5761                                                      items, tunnel);
5762                         last_item = MLX5_FLOW_LAYER_GRE;
5763                         break;
5764                 case RTE_FLOW_ITEM_TYPE_VXLAN:
5765                         flow_dv_translate_item_vxlan(match_mask, match_value,
5766                                                      items, tunnel);
5767                         last_item = MLX5_FLOW_LAYER_VXLAN;
5768                         break;
5769                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
5770                         flow_dv_translate_item_vxlan(match_mask, match_value,
5771                                                      items, tunnel);
5772                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
5773                         break;
5774                 case RTE_FLOW_ITEM_TYPE_GENEVE:
5775                         flow_dv_translate_item_geneve(match_mask, match_value,
5776                                                       items, tunnel);
5777                         last_item = MLX5_FLOW_LAYER_GENEVE;
5778                         break;
5779                 case RTE_FLOW_ITEM_TYPE_MPLS:
5780                         flow_dv_translate_item_mpls(match_mask, match_value,
5781                                                     items, last_item, tunnel);
5782                         last_item = MLX5_FLOW_LAYER_MPLS;
5783                         break;
5784                 case RTE_FLOW_ITEM_TYPE_META:
5785                         flow_dv_translate_item_meta(match_mask, match_value,
5786                                                     items);
5787                         last_item = MLX5_FLOW_ITEM_METADATA;
5788                         break;
5789                 case RTE_FLOW_ITEM_TYPE_ICMP:
5790                         flow_dv_translate_item_icmp(match_mask, match_value,
5791                                                     items, tunnel);
5792                         last_item = MLX5_FLOW_LAYER_ICMP;
5793                         break;
5794                 case RTE_FLOW_ITEM_TYPE_ICMP6:
5795                         flow_dv_translate_item_icmp6(match_mask, match_value,
5796                                                       items, tunnel);
5797                         last_item = MLX5_FLOW_LAYER_ICMP6;
5798                         break;
5799                 default:
5800                         break;
5801                 }
5802                 item_flags |= last_item;
5803         }
5804         /*
5805          * In case of ingress traffic when E-Switch mode is enabled,
5806          * we have two cases where we need to set the source port manually.
5807          * The first one, is in case of Nic steering rule, and the second is
5808          * E-Switch rule where no port_id item was found. In both cases
5809          * the source port is set according the current port in use.
5810          */
5811         if ((attr->ingress && !(item_flags & MLX5_FLOW_ITEM_PORT_ID)) &&
5812             (priv->representor || priv->master)) {
5813                 if (flow_dv_translate_item_port_id(dev, match_mask,
5814                                                    match_value, NULL))
5815                         return -rte_errno;
5816         }
5817         assert(!flow_dv_check_valid_spec(matcher.mask.buf,
5818                                          dev_flow->dv.value.buf));
5819         dev_flow->layers = item_flags;
5820         /* Register matcher. */
5821         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
5822                                     matcher.mask.size);
5823         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
5824                                                      matcher.priority);
5825         matcher.egress = attr->egress;
5826         matcher.group = flow->group;
5827         matcher.transfer = attr->transfer;
5828         if (flow_dv_matcher_register(dev, &matcher, dev_flow, error))
5829                 return -rte_errno;
5830         return 0;
5831 }
5832
5833 /**
5834  * Apply the flow to the NIC.
5835  *
5836  * @param[in] dev
5837  *   Pointer to the Ethernet device structure.
5838  * @param[in, out] flow
5839  *   Pointer to flow structure.
5840  * @param[out] error
5841  *   Pointer to error structure.
5842  *
5843  * @return
5844  *   0 on success, a negative errno value otherwise and rte_errno is set.
5845  */
5846 static int
5847 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
5848               struct rte_flow_error *error)
5849 {
5850         struct mlx5_flow_dv *dv;
5851         struct mlx5_flow *dev_flow;
5852         struct mlx5_priv *priv = dev->data->dev_private;
5853         int n;
5854         int err;
5855
5856         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
5857                 dv = &dev_flow->dv;
5858                 n = dv->actions_n;
5859                 if (flow->actions & MLX5_FLOW_ACTION_DROP) {
5860                         if (flow->transfer) {
5861                                 dv->actions[n++] = priv->sh->esw_drop_action;
5862                         } else {
5863                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
5864                                 if (!dv->hrxq) {
5865                                         rte_flow_error_set
5866                                                 (error, errno,
5867                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5868                                                  NULL,
5869                                                  "cannot get drop hash queue");
5870                                         goto error;
5871                                 }
5872                                 dv->actions[n++] = dv->hrxq->action;
5873                         }
5874                 } else if (flow->actions &
5875                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
5876                         struct mlx5_hrxq *hrxq;
5877
5878                         hrxq = mlx5_hrxq_get(dev, flow->key,
5879                                              MLX5_RSS_HASH_KEY_LEN,
5880                                              dv->hash_fields,
5881                                              (*flow->queue),
5882                                              flow->rss.queue_num);
5883                         if (!hrxq) {
5884                                 hrxq = mlx5_hrxq_new
5885                                         (dev, flow->key, MLX5_RSS_HASH_KEY_LEN,
5886                                          dv->hash_fields, (*flow->queue),
5887                                          flow->rss.queue_num,
5888                                          !!(dev_flow->layers &
5889                                             MLX5_FLOW_LAYER_TUNNEL));
5890                         }
5891                         if (!hrxq) {
5892                                 rte_flow_error_set
5893                                         (error, rte_errno,
5894                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5895                                          "cannot get hash queue");
5896                                 goto error;
5897                         }
5898                         dv->hrxq = hrxq;
5899                         dv->actions[n++] = dv->hrxq->action;
5900                 }
5901                 dv->flow =
5902                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
5903                                                   (void *)&dv->value, n,
5904                                                   dv->actions);
5905                 if (!dv->flow) {
5906                         rte_flow_error_set(error, errno,
5907                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5908                                            NULL,
5909                                            "hardware refuses to create flow");
5910                         goto error;
5911                 }
5912                 if (priv->vmwa_context &&
5913                     dev_flow->dv.vf_vlan.tag &&
5914                     !dev_flow->dv.vf_vlan.created) {
5915                         /*
5916                          * The rule contains the VLAN pattern.
5917                          * For VF we are going to create VLAN
5918                          * interface to make hypervisor set correct
5919                          * e-Switch vport context.
5920                          */
5921                         mlx5_vlan_vmwa_acquire(dev, &dev_flow->dv.vf_vlan);
5922                 }
5923         }
5924         return 0;
5925 error:
5926         err = rte_errno; /* Save rte_errno before cleanup. */
5927         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
5928                 struct mlx5_flow_dv *dv = &dev_flow->dv;
5929                 if (dv->hrxq) {
5930                         if (flow->actions & MLX5_FLOW_ACTION_DROP)
5931                                 mlx5_hrxq_drop_release(dev);
5932                         else
5933                                 mlx5_hrxq_release(dev, dv->hrxq);
5934                         dv->hrxq = NULL;
5935                 }
5936                 if (dev_flow->dv.vf_vlan.tag &&
5937                     dev_flow->dv.vf_vlan.created)
5938                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
5939         }
5940         rte_errno = err; /* Restore rte_errno. */
5941         return -rte_errno;
5942 }
5943
5944 /**
5945  * Release the flow matcher.
5946  *
5947  * @param dev
5948  *   Pointer to Ethernet device.
5949  * @param flow
5950  *   Pointer to mlx5_flow.
5951  *
5952  * @return
5953  *   1 while a reference on it exists, 0 when freed.
5954  */
5955 static int
5956 flow_dv_matcher_release(struct rte_eth_dev *dev,
5957                         struct mlx5_flow *flow)
5958 {
5959         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
5960         struct mlx5_priv *priv = dev->data->dev_private;
5961         struct mlx5_ibv_shared *sh = priv->sh;
5962         struct mlx5_flow_tbl_resource *tbl;
5963
5964         assert(matcher->matcher_object);
5965         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
5966                 dev->data->port_id, (void *)matcher,
5967                 rte_atomic32_read(&matcher->refcnt));
5968         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
5969                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
5970                            (matcher->matcher_object));
5971                 LIST_REMOVE(matcher, next);
5972                 if (matcher->egress)
5973                         tbl = &sh->tx_tbl[matcher->group];
5974                 else
5975                         tbl = &sh->rx_tbl[matcher->group];
5976                 flow_dv_tbl_resource_release(tbl);
5977                 rte_free(matcher);
5978                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
5979                         dev->data->port_id, (void *)matcher);
5980                 return 0;
5981         }
5982         return 1;
5983 }
5984
5985 /**
5986  * Release an encap/decap resource.
5987  *
5988  * @param flow
5989  *   Pointer to mlx5_flow.
5990  *
5991  * @return
5992  *   1 while a reference on it exists, 0 when freed.
5993  */
5994 static int
5995 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
5996 {
5997         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
5998                                                 flow->dv.encap_decap;
5999
6000         assert(cache_resource->verbs_action);
6001         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
6002                 (void *)cache_resource,
6003                 rte_atomic32_read(&cache_resource->refcnt));
6004         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
6005                 claim_zero(mlx5_glue->destroy_flow_action
6006                                 (cache_resource->verbs_action));
6007                 LIST_REMOVE(cache_resource, next);
6008                 rte_free(cache_resource);
6009                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
6010                         (void *)cache_resource);
6011                 return 0;
6012         }
6013         return 1;
6014 }
6015
6016 /**
6017  * Release an jump to table action resource.
6018  *
6019  * @param flow
6020  *   Pointer to mlx5_flow.
6021  *
6022  * @return
6023  *   1 while a reference on it exists, 0 when freed.
6024  */
6025 static int
6026 flow_dv_jump_tbl_resource_release(struct mlx5_flow *flow)
6027 {
6028         struct mlx5_flow_dv_jump_tbl_resource *cache_resource =
6029                                                 flow->dv.jump;
6030
6031         assert(cache_resource->action);
6032         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
6033                 (void *)cache_resource,
6034                 rte_atomic32_read(&cache_resource->refcnt));
6035         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
6036                 claim_zero(mlx5_glue->destroy_flow_action
6037                                 (cache_resource->action));
6038                 LIST_REMOVE(cache_resource, next);
6039                 flow_dv_tbl_resource_release(cache_resource->tbl);
6040                 rte_free(cache_resource);
6041                 DRV_LOG(DEBUG, "jump table resource %p: removed",
6042                         (void *)cache_resource);
6043                 return 0;
6044         }
6045         return 1;
6046 }
6047
6048 /**
6049  * Release a modify-header resource.
6050  *
6051  * @param flow
6052  *   Pointer to mlx5_flow.
6053  *
6054  * @return
6055  *   1 while a reference on it exists, 0 when freed.
6056  */
6057 static int
6058 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
6059 {
6060         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
6061                                                 flow->dv.modify_hdr;
6062
6063         assert(cache_resource->verbs_action);
6064         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
6065                 (void *)cache_resource,
6066                 rte_atomic32_read(&cache_resource->refcnt));
6067         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
6068                 claim_zero(mlx5_glue->destroy_flow_action
6069                                 (cache_resource->verbs_action));
6070                 LIST_REMOVE(cache_resource, next);
6071                 rte_free(cache_resource);
6072                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
6073                         (void *)cache_resource);
6074                 return 0;
6075         }
6076         return 1;
6077 }
6078
6079 /**
6080  * Release port ID action resource.
6081  *
6082  * @param flow
6083  *   Pointer to mlx5_flow.
6084  *
6085  * @return
6086  *   1 while a reference on it exists, 0 when freed.
6087  */
6088 static int
6089 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
6090 {
6091         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
6092                 flow->dv.port_id_action;
6093
6094         assert(cache_resource->action);
6095         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
6096                 (void *)cache_resource,
6097                 rte_atomic32_read(&cache_resource->refcnt));
6098         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
6099                 claim_zero(mlx5_glue->destroy_flow_action
6100                                 (cache_resource->action));
6101                 LIST_REMOVE(cache_resource, next);
6102                 rte_free(cache_resource);
6103                 DRV_LOG(DEBUG, "port id action resource %p: removed",
6104                         (void *)cache_resource);
6105                 return 0;
6106         }
6107         return 1;
6108 }
6109
6110 /**
6111  * Release push vlan action resource.
6112  *
6113  * @param flow
6114  *   Pointer to mlx5_flow.
6115  *
6116  * @return
6117  *   1 while a reference on it exists, 0 when freed.
6118  */
6119 static int
6120 flow_dv_push_vlan_action_resource_release(struct mlx5_flow *flow)
6121 {
6122         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource =
6123                 flow->dv.push_vlan_res;
6124
6125         assert(cache_resource->action);
6126         DRV_LOG(DEBUG, "push VLAN action resource %p: refcnt %d--",
6127                 (void *)cache_resource,
6128                 rte_atomic32_read(&cache_resource->refcnt));
6129         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
6130                 claim_zero(mlx5_glue->destroy_flow_action
6131                                 (cache_resource->action));
6132                 LIST_REMOVE(cache_resource, next);
6133                 rte_free(cache_resource);
6134                 DRV_LOG(DEBUG, "push vlan action resource %p: removed",
6135                         (void *)cache_resource);
6136                 return 0;
6137         }
6138         return 1;
6139 }
6140
6141 /**
6142  * Remove the flow from the NIC but keeps it in memory.
6143  *
6144  * @param[in] dev
6145  *   Pointer to Ethernet device.
6146  * @param[in, out] flow
6147  *   Pointer to flow structure.
6148  */
6149 static void
6150 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
6151 {
6152         struct mlx5_flow_dv *dv;
6153         struct mlx5_flow *dev_flow;
6154
6155         if (!flow)
6156                 return;
6157         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
6158                 dv = &dev_flow->dv;
6159                 if (dv->flow) {
6160                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
6161                         dv->flow = NULL;
6162                 }
6163                 if (dv->hrxq) {
6164                         if (flow->actions & MLX5_FLOW_ACTION_DROP)
6165                                 mlx5_hrxq_drop_release(dev);
6166                         else
6167                                 mlx5_hrxq_release(dev, dv->hrxq);
6168                         dv->hrxq = NULL;
6169                 }
6170                 if (dev_flow->dv.vf_vlan.tag &&
6171                     dev_flow->dv.vf_vlan.created)
6172                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
6173         }
6174 }
6175
6176 /**
6177  * Remove the flow from the NIC and the memory.
6178  *
6179  * @param[in] dev
6180  *   Pointer to the Ethernet device structure.
6181  * @param[in, out] flow
6182  *   Pointer to flow structure.
6183  */
6184 static void
6185 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
6186 {
6187         struct mlx5_flow *dev_flow;
6188
6189         if (!flow)
6190                 return;
6191         flow_dv_remove(dev, flow);
6192         if (flow->counter) {
6193                 flow_dv_counter_release(dev, flow->counter);
6194                 flow->counter = NULL;
6195         }
6196         if (flow->tag_resource) {
6197                 flow_dv_tag_release(dev, flow->tag_resource);
6198                 flow->tag_resource = NULL;
6199         }
6200         while (!LIST_EMPTY(&flow->dev_flows)) {
6201                 dev_flow = LIST_FIRST(&flow->dev_flows);
6202                 LIST_REMOVE(dev_flow, next);
6203                 if (dev_flow->dv.matcher)
6204                         flow_dv_matcher_release(dev, dev_flow);
6205                 if (dev_flow->dv.encap_decap)
6206                         flow_dv_encap_decap_resource_release(dev_flow);
6207                 if (dev_flow->dv.modify_hdr)
6208                         flow_dv_modify_hdr_resource_release(dev_flow);
6209                 if (dev_flow->dv.jump)
6210                         flow_dv_jump_tbl_resource_release(dev_flow);
6211                 if (dev_flow->dv.port_id_action)
6212                         flow_dv_port_id_action_resource_release(dev_flow);
6213                 if (dev_flow->dv.push_vlan_res)
6214                         flow_dv_push_vlan_action_resource_release(dev_flow);
6215                 rte_free(dev_flow);
6216         }
6217 }
6218
6219 /**
6220  * Query a dv flow  rule for its statistics via devx.
6221  *
6222  * @param[in] dev
6223  *   Pointer to Ethernet device.
6224  * @param[in] flow
6225  *   Pointer to the sub flow.
6226  * @param[out] data
6227  *   data retrieved by the query.
6228  * @param[out] error
6229  *   Perform verbose error reporting if not NULL.
6230  *
6231  * @return
6232  *   0 on success, a negative errno value otherwise and rte_errno is set.
6233  */
6234 static int
6235 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
6236                     void *data, struct rte_flow_error *error)
6237 {
6238         struct mlx5_priv *priv = dev->data->dev_private;
6239         struct rte_flow_query_count *qc = data;
6240
6241         if (!priv->config.devx)
6242                 return rte_flow_error_set(error, ENOTSUP,
6243                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6244                                           NULL,
6245                                           "counters are not supported");
6246         if (flow->counter) {
6247                 uint64_t pkts, bytes;
6248                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
6249                                                &bytes);
6250
6251                 if (err)
6252                         return rte_flow_error_set(error, -err,
6253                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6254                                         NULL, "cannot read counters");
6255                 qc->hits_set = 1;
6256                 qc->bytes_set = 1;
6257                 qc->hits = pkts - flow->counter->hits;
6258                 qc->bytes = bytes - flow->counter->bytes;
6259                 if (qc->reset) {
6260                         flow->counter->hits = pkts;
6261                         flow->counter->bytes = bytes;
6262                 }
6263                 return 0;
6264         }
6265         return rte_flow_error_set(error, EINVAL,
6266                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6267                                   NULL,
6268                                   "counters are not available");
6269 }
6270
6271 /**
6272  * Query a flow.
6273  *
6274  * @see rte_flow_query()
6275  * @see rte_flow_ops
6276  */
6277 static int
6278 flow_dv_query(struct rte_eth_dev *dev,
6279               struct rte_flow *flow __rte_unused,
6280               const struct rte_flow_action *actions __rte_unused,
6281               void *data __rte_unused,
6282               struct rte_flow_error *error __rte_unused)
6283 {
6284         int ret = -EINVAL;
6285
6286         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
6287                 switch (actions->type) {
6288                 case RTE_FLOW_ACTION_TYPE_VOID:
6289                         break;
6290                 case RTE_FLOW_ACTION_TYPE_COUNT:
6291                         ret = flow_dv_query_count(dev, flow, data, error);
6292                         break;
6293                 default:
6294                         return rte_flow_error_set(error, ENOTSUP,
6295                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6296                                                   actions,
6297                                                   "action not supported");
6298                 }
6299         }
6300         return ret;
6301 }
6302
6303 /*
6304  * Mutex-protected thunk to flow_dv_translate().
6305  */
6306 static int
6307 flow_d_translate(struct rte_eth_dev *dev,
6308                  struct mlx5_flow *dev_flow,
6309                  const struct rte_flow_attr *attr,
6310                  const struct rte_flow_item items[],
6311                  const struct rte_flow_action actions[],
6312                  struct rte_flow_error *error)
6313 {
6314         int ret;
6315
6316         flow_d_shared_lock(dev);
6317         ret = flow_dv_translate(dev, dev_flow, attr, items, actions, error);
6318         flow_d_shared_unlock(dev);
6319         return ret;
6320 }
6321
6322 /*
6323  * Mutex-protected thunk to flow_dv_apply().
6324  */
6325 static int
6326 flow_d_apply(struct rte_eth_dev *dev,
6327              struct rte_flow *flow,
6328              struct rte_flow_error *error)
6329 {
6330         int ret;
6331
6332         flow_d_shared_lock(dev);
6333         ret = flow_dv_apply(dev, flow, error);
6334         flow_d_shared_unlock(dev);
6335         return ret;
6336 }
6337
6338 /*
6339  * Mutex-protected thunk to flow_dv_remove().
6340  */
6341 static void
6342 flow_d_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
6343 {
6344         flow_d_shared_lock(dev);
6345         flow_dv_remove(dev, flow);
6346         flow_d_shared_unlock(dev);
6347 }
6348
6349 /*
6350  * Mutex-protected thunk to flow_dv_destroy().
6351  */
6352 static void
6353 flow_d_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
6354 {
6355         flow_d_shared_lock(dev);
6356         flow_dv_destroy(dev, flow);
6357         flow_d_shared_unlock(dev);
6358 }
6359
6360 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
6361         .validate = flow_dv_validate,
6362         .prepare = flow_dv_prepare,
6363         .translate = flow_d_translate,
6364         .apply = flow_d_apply,
6365         .remove = flow_d_remove,
6366         .destroy = flow_d_destroy,
6367         .query = flow_dv_query,
6368 };
6369
6370 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */