1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
11 #include <sys/queue.h>
14 #include <rte_malloc.h>
15 #include <ethdev_driver.h>
16 #include <rte_common.h>
17 #include <rte_interrupts.h>
18 #include <rte_debug.h>
20 #include <rte_eal_paging.h>
22 #include <mlx5_glue.h>
23 #include <mlx5_malloc.h>
24 #include <mlx5_common_mr.h>
26 #include "mlx5_defs.h"
30 #include "mlx5_utils.h"
31 #include "mlx5_autoconf.h"
34 /* Default RSS hash key also used for ConnectX-3. */
35 uint8_t rss_hash_default_key[] = {
36 0x2c, 0xc6, 0x81, 0xd1,
37 0x5b, 0xdb, 0xf4, 0xf7,
38 0xfc, 0xa2, 0x83, 0x19,
39 0xdb, 0x1a, 0x3e, 0x94,
40 0x6b, 0x9e, 0x38, 0xd9,
41 0x2c, 0x9c, 0x03, 0xd1,
42 0xad, 0x99, 0x44, 0xa7,
43 0xd9, 0x56, 0x3d, 0x59,
44 0x06, 0x3c, 0x25, 0xf3,
45 0xfc, 0x1f, 0xdc, 0x2a,
48 /* Length of the default RSS hash key. */
49 static_assert(MLX5_RSS_HASH_KEY_LEN ==
50 (unsigned int)sizeof(rss_hash_default_key),
51 "wrong RSS default key size.");
54 * Calculate the number of CQEs in CQ for the Rx queue.
57 * Pointer to receive queue structure.
60 * Number of CQEs in CQ.
63 mlx5_rxq_cqe_num(struct mlx5_rxq_data *rxq_data)
66 unsigned int wqe_n = 1 << rxq_data->elts_n;
68 if (mlx5_rxq_mprq_enabled(rxq_data))
69 cqe_n = wqe_n * (1 << rxq_data->strd_num_n) - 1;
76 * Allocate RX queue elements for Multi-Packet RQ.
79 * Pointer to RX queue structure.
82 * 0 on success, a negative errno value otherwise and rte_errno is set.
85 rxq_alloc_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
87 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
88 unsigned int wqe_n = 1 << rxq->elts_n;
92 /* Iterate on segments. */
93 for (i = 0; i <= wqe_n; ++i) {
94 struct mlx5_mprq_buf *buf;
96 if (rte_mempool_get(rxq->mprq_mp, (void **)&buf) < 0) {
97 DRV_LOG(ERR, "port %u empty mbuf pool", rxq->port_id);
102 (*rxq->mprq_bufs)[i] = buf;
104 rxq->mprq_repl = buf;
107 "port %u MPRQ queue %u allocated and configured %u segments",
108 rxq->port_id, rxq->idx, wqe_n);
111 err = rte_errno; /* Save rte_errno before cleanup. */
113 for (i = 0; (i != wqe_n); ++i) {
114 if ((*rxq->mprq_bufs)[i] != NULL)
115 rte_mempool_put(rxq->mprq_mp,
116 (*rxq->mprq_bufs)[i]);
117 (*rxq->mprq_bufs)[i] = NULL;
119 DRV_LOG(DEBUG, "port %u MPRQ queue %u failed, freed everything",
120 rxq->port_id, rxq->idx);
121 rte_errno = err; /* Restore rte_errno. */
126 * Allocate RX queue elements for Single-Packet RQ.
129 * Pointer to RX queue structure.
132 * 0 on success, negative errno value on failure.
135 rxq_alloc_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
137 const unsigned int sges_n = 1 << rxq_ctrl->rxq.sges_n;
138 unsigned int elts_n = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
139 (1 << rxq_ctrl->rxq.elts_n) * (1 << rxq_ctrl->rxq.strd_num_n) :
140 (1 << rxq_ctrl->rxq.elts_n);
144 /* Iterate on segments. */
145 for (i = 0; (i != elts_n); ++i) {
146 struct mlx5_eth_rxseg *seg = &rxq_ctrl->rxq.rxseg[i % sges_n];
147 struct rte_mbuf *buf;
149 buf = rte_pktmbuf_alloc(seg->mp);
151 DRV_LOG(ERR, "port %u empty mbuf pool",
152 PORT_ID(rxq_ctrl->priv));
156 /* Headroom is reserved by rte_pktmbuf_alloc(). */
157 MLX5_ASSERT(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
158 /* Buffer is supposed to be empty. */
159 MLX5_ASSERT(rte_pktmbuf_data_len(buf) == 0);
160 MLX5_ASSERT(rte_pktmbuf_pkt_len(buf) == 0);
161 MLX5_ASSERT(!buf->next);
162 SET_DATA_OFF(buf, seg->offset);
163 PORT(buf) = rxq_ctrl->rxq.port_id;
164 DATA_LEN(buf) = seg->length;
165 PKT_LEN(buf) = seg->length;
167 (*rxq_ctrl->rxq.elts)[i] = buf;
169 /* If Rx vector is activated. */
170 if (mlx5_rxq_check_vec_support(&rxq_ctrl->rxq) > 0) {
171 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
172 struct rte_mbuf *mbuf_init = &rxq->fake_mbuf;
173 struct rte_pktmbuf_pool_private *priv =
174 (struct rte_pktmbuf_pool_private *)
175 rte_mempool_get_priv(rxq_ctrl->rxq.mp);
178 /* Initialize default rearm_data for vPMD. */
179 mbuf_init->data_off = RTE_PKTMBUF_HEADROOM;
180 rte_mbuf_refcnt_set(mbuf_init, 1);
181 mbuf_init->nb_segs = 1;
182 mbuf_init->port = rxq->port_id;
183 if (priv->flags & RTE_PKTMBUF_POOL_F_PINNED_EXT_BUF)
184 mbuf_init->ol_flags = RTE_MBUF_F_EXTERNAL;
186 * prevent compiler reordering:
187 * rearm_data covers previous fields.
189 rte_compiler_barrier();
190 rxq->mbuf_initializer =
191 *(rte_xmm_t *)&mbuf_init->rearm_data;
192 /* Padding with a fake mbuf for vectorized Rx. */
193 for (j = 0; j < MLX5_VPMD_DESCS_PER_LOOP; ++j)
194 (*rxq->elts)[elts_n + j] = &rxq->fake_mbuf;
197 "port %u SPRQ queue %u allocated and configured %u segments"
199 PORT_ID(rxq_ctrl->priv), rxq_ctrl->rxq.idx, elts_n,
200 elts_n / (1 << rxq_ctrl->rxq.sges_n));
203 err = rte_errno; /* Save rte_errno before cleanup. */
205 for (i = 0; (i != elts_n); ++i) {
206 if ((*rxq_ctrl->rxq.elts)[i] != NULL)
207 rte_pktmbuf_free_seg((*rxq_ctrl->rxq.elts)[i]);
208 (*rxq_ctrl->rxq.elts)[i] = NULL;
210 DRV_LOG(DEBUG, "port %u SPRQ queue %u failed, freed everything",
211 PORT_ID(rxq_ctrl->priv), rxq_ctrl->rxq.idx);
212 rte_errno = err; /* Restore rte_errno. */
217 * Allocate RX queue elements.
220 * Pointer to RX queue structure.
223 * 0 on success, negative errno value on failure.
226 rxq_alloc_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
231 * For MPRQ we need to allocate both MPRQ buffers
232 * for WQEs and simple mbufs for vector processing.
234 if (mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq))
235 ret = rxq_alloc_elts_mprq(rxq_ctrl);
237 ret = rxq_alloc_elts_sprq(rxq_ctrl);
242 * Free RX queue elements for Multi-Packet RQ.
245 * Pointer to RX queue structure.
248 rxq_free_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
250 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
253 DRV_LOG(DEBUG, "port %u Multi-Packet Rx queue %u freeing %d WRs",
254 rxq->port_id, rxq->idx, (1u << rxq->elts_n));
255 if (rxq->mprq_bufs == NULL)
257 for (i = 0; (i != (1u << rxq->elts_n)); ++i) {
258 if ((*rxq->mprq_bufs)[i] != NULL)
259 mlx5_mprq_buf_free((*rxq->mprq_bufs)[i]);
260 (*rxq->mprq_bufs)[i] = NULL;
262 if (rxq->mprq_repl != NULL) {
263 mlx5_mprq_buf_free(rxq->mprq_repl);
264 rxq->mprq_repl = NULL;
269 * Free RX queue elements for Single-Packet RQ.
272 * Pointer to RX queue structure.
275 rxq_free_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
277 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
278 const uint16_t q_n = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
279 (1 << rxq->elts_n) * (1 << rxq->strd_num_n) :
281 const uint16_t q_mask = q_n - 1;
282 uint16_t elts_ci = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
283 rxq->elts_ci : rxq->rq_ci;
284 uint16_t used = q_n - (elts_ci - rxq->rq_pi);
287 DRV_LOG(DEBUG, "port %u Rx queue %u freeing %d WRs",
288 PORT_ID(rxq_ctrl->priv), rxq->idx, q_n);
289 if (rxq->elts == NULL)
292 * Some mbuf in the Ring belongs to the application.
293 * They cannot be freed.
295 if (mlx5_rxq_check_vec_support(rxq) > 0) {
296 for (i = 0; i < used; ++i)
297 (*rxq->elts)[(elts_ci + i) & q_mask] = NULL;
298 rxq->rq_pi = elts_ci;
300 for (i = 0; i != q_n; ++i) {
301 if ((*rxq->elts)[i] != NULL)
302 rte_pktmbuf_free_seg((*rxq->elts)[i]);
303 (*rxq->elts)[i] = NULL;
308 * Free RX queue elements.
311 * Pointer to RX queue structure.
314 rxq_free_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
317 * For MPRQ we need to allocate both MPRQ buffers
318 * for WQEs and simple mbufs for vector processing.
320 if (mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq))
321 rxq_free_elts_mprq(rxq_ctrl);
322 rxq_free_elts_sprq(rxq_ctrl);
326 * Returns the per-queue supported offloads.
329 * Pointer to Ethernet device.
332 * Supported Rx offloads.
335 mlx5_get_rx_queue_offloads(struct rte_eth_dev *dev)
337 struct mlx5_priv *priv = dev->data->dev_private;
338 struct mlx5_dev_config *config = &priv->config;
339 uint64_t offloads = (RTE_ETH_RX_OFFLOAD_SCATTER |
340 RTE_ETH_RX_OFFLOAD_TIMESTAMP |
341 RTE_ETH_RX_OFFLOAD_RSS_HASH);
343 if (!config->mprq.enabled)
344 offloads |= RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT;
345 if (config->hw_fcs_strip)
346 offloads |= RTE_ETH_RX_OFFLOAD_KEEP_CRC;
348 offloads |= (RTE_ETH_RX_OFFLOAD_IPV4_CKSUM |
349 RTE_ETH_RX_OFFLOAD_UDP_CKSUM |
350 RTE_ETH_RX_OFFLOAD_TCP_CKSUM);
351 if (config->hw_vlan_strip)
352 offloads |= RTE_ETH_RX_OFFLOAD_VLAN_STRIP;
353 if (MLX5_LRO_SUPPORTED(dev))
354 offloads |= RTE_ETH_RX_OFFLOAD_TCP_LRO;
360 * Returns the per-port supported offloads.
363 * Supported Rx offloads.
366 mlx5_get_rx_port_offloads(void)
368 uint64_t offloads = RTE_ETH_RX_OFFLOAD_VLAN_FILTER;
374 * Verify if the queue can be released.
377 * Pointer to Ethernet device.
382 * 1 if the queue can be released
383 * 0 if the queue can not be released, there are references to it.
384 * Negative errno and rte_errno is set if queue doesn't exist.
387 mlx5_rxq_releasable(struct rte_eth_dev *dev, uint16_t idx)
389 struct mlx5_priv *priv = dev->data->dev_private;
390 struct mlx5_rxq_ctrl *rxq_ctrl;
392 if (!(*priv->rxqs)[idx]) {
396 rxq_ctrl = container_of((*priv->rxqs)[idx], struct mlx5_rxq_ctrl, rxq);
397 return (__atomic_load_n(&rxq_ctrl->refcnt, __ATOMIC_RELAXED) == 1);
400 /* Fetches and drops all SW-owned and error CQEs to synchronize CQ. */
402 rxq_sync_cq(struct mlx5_rxq_data *rxq)
404 const uint16_t cqe_n = 1 << rxq->cqe_n;
405 const uint16_t cqe_mask = cqe_n - 1;
406 volatile struct mlx5_cqe *cqe;
411 cqe = &(*rxq->cqes)[rxq->cq_ci & cqe_mask];
412 ret = check_cqe(cqe, cqe_n, rxq->cq_ci);
413 if (ret == MLX5_CQE_STATUS_HW_OWN)
415 if (ret == MLX5_CQE_STATUS_ERR) {
419 MLX5_ASSERT(ret == MLX5_CQE_STATUS_SW_OWN);
420 if (MLX5_CQE_FORMAT(cqe->op_own) != MLX5_COMPRESSED) {
424 /* Compute the next non compressed CQE. */
425 rxq->cq_ci += rte_be_to_cpu_32(cqe->byte_cnt);
428 /* Move all CQEs to HW ownership, including possible MiniCQEs. */
429 for (i = 0; i < cqe_n; i++) {
430 cqe = &(*rxq->cqes)[i];
431 cqe->op_own = MLX5_CQE_INVALIDATE;
433 /* Resync CQE and WQE (WQ in RESET state). */
435 *rxq->cq_db = rte_cpu_to_be_32(rxq->cq_ci);
437 *rxq->rq_db = rte_cpu_to_be_32(0);
442 * Rx queue stop. Device queue goes to the RESET state,
443 * all involved mbufs are freed from WQ.
446 * Pointer to Ethernet device structure.
451 * 0 on success, a negative errno value otherwise and rte_errno is set.
454 mlx5_rx_queue_stop_primary(struct rte_eth_dev *dev, uint16_t idx)
456 struct mlx5_priv *priv = dev->data->dev_private;
457 struct mlx5_rxq_data *rxq = (*priv->rxqs)[idx];
458 struct mlx5_rxq_ctrl *rxq_ctrl =
459 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
462 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
463 ret = priv->obj_ops.rxq_obj_modify(rxq_ctrl->obj, MLX5_RXQ_MOD_RDY2RST);
465 DRV_LOG(ERR, "Cannot change Rx WQ state to RESET: %s",
470 /* Remove all processes CQEs. */
472 /* Free all involved mbufs. */
473 rxq_free_elts(rxq_ctrl);
474 /* Set the actual queue state. */
475 dev->data->rx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STOPPED;
480 * Rx queue stop. Device queue goes to the RESET state,
481 * all involved mbufs are freed from WQ.
484 * Pointer to Ethernet device structure.
489 * 0 on success, a negative errno value otherwise and rte_errno is set.
492 mlx5_rx_queue_stop(struct rte_eth_dev *dev, uint16_t idx)
494 eth_rx_burst_t pkt_burst = dev->rx_pkt_burst;
497 if (rte_eth_dev_is_rx_hairpin_queue(dev, idx)) {
498 DRV_LOG(ERR, "Hairpin queue can't be stopped");
502 if (dev->data->rx_queue_state[idx] == RTE_ETH_QUEUE_STATE_STOPPED)
505 * Vectorized Rx burst requires the CQ and RQ indices
506 * synchronized, that might be broken on RQ restart
507 * and cause Rx malfunction, so queue stopping is
508 * not supported if vectorized Rx burst is engaged.
509 * The routine pointer depends on the process
510 * type, should perform check there.
512 if (pkt_burst == mlx5_rx_burst_vec) {
513 DRV_LOG(ERR, "Rx queue stop is not supported "
514 "for vectorized Rx");
518 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
519 ret = mlx5_mp_os_req_queue_control(dev, idx,
520 MLX5_MP_REQ_QUEUE_RX_STOP);
522 ret = mlx5_rx_queue_stop_primary(dev, idx);
528 * Rx queue start. Device queue goes to the ready state,
529 * all required mbufs are allocated and WQ is replenished.
532 * Pointer to Ethernet device structure.
537 * 0 on success, a negative errno value otherwise and rte_errno is set.
540 mlx5_rx_queue_start_primary(struct rte_eth_dev *dev, uint16_t idx)
542 struct mlx5_priv *priv = dev->data->dev_private;
543 struct mlx5_rxq_data *rxq = (*priv->rxqs)[idx];
544 struct mlx5_rxq_ctrl *rxq_ctrl =
545 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
548 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
549 /* Allocate needed buffers. */
550 ret = rxq_alloc_elts(rxq_ctrl);
552 DRV_LOG(ERR, "Cannot reallocate buffers for Rx WQ");
557 *rxq->cq_db = rte_cpu_to_be_32(rxq->cq_ci);
559 /* Reset RQ consumer before moving queue to READY state. */
560 *rxq->rq_db = rte_cpu_to_be_32(0);
562 ret = priv->obj_ops.rxq_obj_modify(rxq_ctrl->obj, MLX5_RXQ_MOD_RST2RDY);
564 DRV_LOG(ERR, "Cannot change Rx WQ state to READY: %s",
569 /* Reinitialize RQ - set WQEs. */
570 mlx5_rxq_initialize(rxq);
571 rxq->err_state = MLX5_RXQ_ERR_STATE_NO_ERROR;
572 /* Set actual queue state. */
573 dev->data->rx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STARTED;
578 * Rx queue start. Device queue goes to the ready state,
579 * all required mbufs are allocated and WQ is replenished.
582 * Pointer to Ethernet device structure.
587 * 0 on success, a negative errno value otherwise and rte_errno is set.
590 mlx5_rx_queue_start(struct rte_eth_dev *dev, uint16_t idx)
594 if (rte_eth_dev_is_rx_hairpin_queue(dev, idx)) {
595 DRV_LOG(ERR, "Hairpin queue can't be started");
599 if (dev->data->rx_queue_state[idx] == RTE_ETH_QUEUE_STATE_STARTED)
601 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
602 ret = mlx5_mp_os_req_queue_control(dev, idx,
603 MLX5_MP_REQ_QUEUE_RX_START);
605 ret = mlx5_rx_queue_start_primary(dev, idx);
611 * Rx queue presetup checks.
614 * Pointer to Ethernet device structure.
618 * Number of descriptors to configure in queue.
621 * 0 on success, a negative errno value otherwise and rte_errno is set.
624 mlx5_rx_queue_pre_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t *desc)
626 struct mlx5_priv *priv = dev->data->dev_private;
628 if (!rte_is_power_of_2(*desc)) {
629 *desc = 1 << log2above(*desc);
631 "port %u increased number of descriptors in Rx queue %u"
632 " to the next power of two (%d)",
633 dev->data->port_id, idx, *desc);
635 DRV_LOG(DEBUG, "port %u configuring Rx queue %u for %u descriptors",
636 dev->data->port_id, idx, *desc);
637 if (idx >= priv->rxqs_n) {
638 DRV_LOG(ERR, "port %u Rx queue index out of range (%u >= %u)",
639 dev->data->port_id, idx, priv->rxqs_n);
640 rte_errno = EOVERFLOW;
643 if (!mlx5_rxq_releasable(dev, idx)) {
644 DRV_LOG(ERR, "port %u unable to release queue index %u",
645 dev->data->port_id, idx);
649 mlx5_rxq_release(dev, idx);
656 * Pointer to Ethernet device structure.
660 * Number of descriptors to configure in queue.
662 * NUMA socket on which memory must be allocated.
664 * Thresholds parameters.
666 * Memory pool for buffer allocations.
669 * 0 on success, a negative errno value otherwise and rte_errno is set.
672 mlx5_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
673 unsigned int socket, const struct rte_eth_rxconf *conf,
674 struct rte_mempool *mp)
676 struct mlx5_priv *priv = dev->data->dev_private;
677 struct mlx5_rxq_ctrl *rxq_ctrl;
678 struct rte_eth_rxseg_split *rx_seg =
679 (struct rte_eth_rxseg_split *)conf->rx_seg;
680 struct rte_eth_rxseg_split rx_single = {.mp = mp};
681 uint16_t n_seg = conf->rx_nseg;
686 * The parameters should be checked on rte_eth_dev layer.
687 * If mp is specified it means the compatible configuration
688 * without buffer split feature tuning.
694 uint64_t offloads = conf->offloads |
695 dev->data->dev_conf.rxmode.offloads;
697 /* The offloads should be checked on rte_eth_dev layer. */
698 MLX5_ASSERT(offloads & RTE_ETH_RX_OFFLOAD_SCATTER);
699 if (!(offloads & RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT)) {
700 DRV_LOG(ERR, "port %u queue index %u split "
701 "offload not configured",
702 dev->data->port_id, idx);
706 MLX5_ASSERT(n_seg < MLX5_MAX_RXQ_NSEG);
708 res = mlx5_rx_queue_pre_setup(dev, idx, &desc);
711 rxq_ctrl = mlx5_rxq_new(dev, idx, desc, socket, conf, rx_seg, n_seg);
713 DRV_LOG(ERR, "port %u unable to allocate queue index %u",
714 dev->data->port_id, idx);
718 DRV_LOG(DEBUG, "port %u adding Rx queue %u to list",
719 dev->data->port_id, idx);
720 (*priv->rxqs)[idx] = &rxq_ctrl->rxq;
727 * Pointer to Ethernet device structure.
731 * Number of descriptors to configure in queue.
732 * @param hairpin_conf
733 * Hairpin configuration parameters.
736 * 0 on success, a negative errno value otherwise and rte_errno is set.
739 mlx5_rx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t idx,
741 const struct rte_eth_hairpin_conf *hairpin_conf)
743 struct mlx5_priv *priv = dev->data->dev_private;
744 struct mlx5_rxq_ctrl *rxq_ctrl;
747 res = mlx5_rx_queue_pre_setup(dev, idx, &desc);
750 if (hairpin_conf->peer_count != 1) {
752 DRV_LOG(ERR, "port %u unable to setup Rx hairpin queue index %u"
753 " peer count is %u", dev->data->port_id,
754 idx, hairpin_conf->peer_count);
757 if (hairpin_conf->peers[0].port == dev->data->port_id) {
758 if (hairpin_conf->peers[0].queue >= priv->txqs_n) {
760 DRV_LOG(ERR, "port %u unable to setup Rx hairpin queue"
761 " index %u, Tx %u is larger than %u",
762 dev->data->port_id, idx,
763 hairpin_conf->peers[0].queue, priv->txqs_n);
767 if (hairpin_conf->manual_bind == 0 ||
768 hairpin_conf->tx_explicit == 0) {
770 DRV_LOG(ERR, "port %u unable to setup Rx hairpin queue"
771 " index %u peer port %u with attributes %u %u",
772 dev->data->port_id, idx,
773 hairpin_conf->peers[0].port,
774 hairpin_conf->manual_bind,
775 hairpin_conf->tx_explicit);
779 rxq_ctrl = mlx5_rxq_hairpin_new(dev, idx, desc, hairpin_conf);
781 DRV_LOG(ERR, "port %u unable to allocate queue index %u",
782 dev->data->port_id, idx);
786 DRV_LOG(DEBUG, "port %u adding Rx queue %u to list",
787 dev->data->port_id, idx);
788 (*priv->rxqs)[idx] = &rxq_ctrl->rxq;
793 * DPDK callback to release a RX queue.
796 * Pointer to Ethernet device structure.
798 * Receive queue index.
801 mlx5_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid)
803 struct mlx5_rxq_data *rxq = dev->data->rx_queues[qid];
807 if (!mlx5_rxq_releasable(dev, qid))
808 rte_panic("port %u Rx queue %u is still used by a flow and"
809 " cannot be removed\n", dev->data->port_id, qid);
810 mlx5_rxq_release(dev, qid);
814 * Allocate queue vector and fill epoll fd list for Rx interrupts.
817 * Pointer to Ethernet device.
820 * 0 on success, a negative errno value otherwise and rte_errno is set.
823 mlx5_rx_intr_vec_enable(struct rte_eth_dev *dev)
825 struct mlx5_priv *priv = dev->data->dev_private;
827 unsigned int rxqs_n = priv->rxqs_n;
828 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
829 unsigned int count = 0;
830 struct rte_intr_handle *intr_handle = dev->intr_handle;
832 if (!dev->data->dev_conf.intr_conf.rxq)
834 mlx5_rx_intr_vec_disable(dev);
835 if (rte_intr_vec_list_alloc(intr_handle, NULL, n)) {
837 "port %u failed to allocate memory for interrupt"
838 " vector, Rx interrupts will not be supported",
844 if (rte_intr_type_set(intr_handle, RTE_INTR_HANDLE_EXT))
847 for (i = 0; i != n; ++i) {
848 /* This rxq obj must not be released in this function. */
849 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_get(dev, i);
850 struct mlx5_rxq_obj *rxq_obj = rxq_ctrl ? rxq_ctrl->obj : NULL;
853 /* Skip queues that cannot request interrupts. */
854 if (!rxq_obj || (!rxq_obj->ibv_channel &&
855 !rxq_obj->devx_channel)) {
856 /* Use invalid intr_vec[] index to disable entry. */
857 if (rte_intr_vec_list_index_set(intr_handle, i,
858 RTE_INTR_VEC_RXTX_OFFSET + RTE_MAX_RXTX_INTR_VEC_ID))
860 /* Decrease the rxq_ctrl's refcnt */
862 mlx5_rxq_release(dev, i);
865 if (count >= RTE_MAX_RXTX_INTR_VEC_ID) {
867 "port %u too many Rx queues for interrupt"
868 " vector size (%d), Rx interrupts cannot be"
870 dev->data->port_id, RTE_MAX_RXTX_INTR_VEC_ID);
871 mlx5_rx_intr_vec_disable(dev);
875 rc = mlx5_os_set_nonblock_channel_fd(rxq_obj->fd);
879 "port %u failed to make Rx interrupt file"
880 " descriptor %d non-blocking for queue index"
882 dev->data->port_id, rxq_obj->fd, i);
883 mlx5_rx_intr_vec_disable(dev);
887 if (rte_intr_vec_list_index_set(intr_handle, i,
888 RTE_INTR_VEC_RXTX_OFFSET + count))
890 if (rte_intr_efds_index_set(intr_handle, count,
896 mlx5_rx_intr_vec_disable(dev);
897 else if (rte_intr_nb_efd_set(intr_handle, count))
903 * Clean up Rx interrupts handler.
906 * Pointer to Ethernet device.
909 mlx5_rx_intr_vec_disable(struct rte_eth_dev *dev)
911 struct mlx5_priv *priv = dev->data->dev_private;
912 struct rte_intr_handle *intr_handle = dev->intr_handle;
914 unsigned int rxqs_n = priv->rxqs_n;
915 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
917 if (!dev->data->dev_conf.intr_conf.rxq)
919 if (rte_intr_vec_list_index_get(intr_handle, 0) < 0)
921 for (i = 0; i != n; ++i) {
922 if (rte_intr_vec_list_index_get(intr_handle, i) ==
923 RTE_INTR_VEC_RXTX_OFFSET + RTE_MAX_RXTX_INTR_VEC_ID)
926 * Need to access directly the queue to release the reference
927 * kept in mlx5_rx_intr_vec_enable().
929 mlx5_rxq_release(dev, i);
932 rte_intr_free_epoll_fd(intr_handle);
934 rte_intr_vec_list_free(intr_handle);
936 rte_intr_nb_efd_set(intr_handle, 0);
940 * MLX5 CQ notification .
943 * Pointer to receive queue structure.
945 * Sequence number per receive queue .
948 mlx5_arm_cq(struct mlx5_rxq_data *rxq, int sq_n_rxq)
951 uint32_t doorbell_hi;
953 void *cq_db_reg = (char *)rxq->cq_uar + MLX5_CQ_DOORBELL;
955 sq_n = sq_n_rxq & MLX5_CQ_SQN_MASK;
956 doorbell_hi = sq_n << MLX5_CQ_SQN_OFFSET | (rxq->cq_ci & MLX5_CI_MASK);
957 doorbell = (uint64_t)doorbell_hi << 32;
958 doorbell |= rxq->cqn;
959 rxq->cq_db[MLX5_CQ_ARM_DB] = rte_cpu_to_be_32(doorbell_hi);
960 mlx5_uar_write64(rte_cpu_to_be_64(doorbell),
961 cq_db_reg, rxq->uar_lock_cq);
965 * DPDK callback for Rx queue interrupt enable.
968 * Pointer to Ethernet device structure.
973 * 0 on success, a negative errno value otherwise and rte_errno is set.
976 mlx5_rx_intr_enable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
978 struct mlx5_rxq_ctrl *rxq_ctrl;
980 rxq_ctrl = mlx5_rxq_get(dev, rx_queue_id);
984 if (!rxq_ctrl->obj) {
985 mlx5_rxq_release(dev, rx_queue_id);
988 mlx5_arm_cq(&rxq_ctrl->rxq, rxq_ctrl->rxq.cq_arm_sn);
990 mlx5_rxq_release(dev, rx_queue_id);
998 * DPDK callback for Rx queue interrupt disable.
1001 * Pointer to Ethernet device structure.
1002 * @param rx_queue_id
1006 * 0 on success, a negative errno value otherwise and rte_errno is set.
1009 mlx5_rx_intr_disable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1011 struct mlx5_priv *priv = dev->data->dev_private;
1012 struct mlx5_rxq_ctrl *rxq_ctrl;
1015 rxq_ctrl = mlx5_rxq_get(dev, rx_queue_id);
1022 if (rxq_ctrl->irq) {
1023 ret = priv->obj_ops.rxq_event_get(rxq_ctrl->obj);
1026 rxq_ctrl->rxq.cq_arm_sn++;
1028 mlx5_rxq_release(dev, rx_queue_id);
1032 * The ret variable may be EAGAIN which means the get_event function was
1033 * called before receiving one.
1039 ret = rte_errno; /* Save rte_errno before cleanup. */
1040 mlx5_rxq_release(dev, rx_queue_id);
1042 DRV_LOG(WARNING, "port %u unable to disable interrupt on Rx queue %d",
1043 dev->data->port_id, rx_queue_id);
1044 rte_errno = ret; /* Restore rte_errno. */
1049 * Verify the Rx queue objects list is empty
1052 * Pointer to Ethernet device.
1055 * The number of objects not released.
1058 mlx5_rxq_obj_verify(struct rte_eth_dev *dev)
1060 struct mlx5_priv *priv = dev->data->dev_private;
1062 struct mlx5_rxq_obj *rxq_obj;
1064 LIST_FOREACH(rxq_obj, &priv->rxqsobj, next) {
1065 DRV_LOG(DEBUG, "port %u Rx queue %u still referenced",
1066 dev->data->port_id, rxq_obj->rxq_ctrl->rxq.idx);
1073 * Callback function to initialize mbufs for Multi-Packet RQ.
1076 mlx5_mprq_buf_init(struct rte_mempool *mp, void *opaque_arg,
1077 void *_m, unsigned int i __rte_unused)
1079 struct mlx5_mprq_buf *buf = _m;
1080 struct rte_mbuf_ext_shared_info *shinfo;
1081 unsigned int strd_n = (unsigned int)(uintptr_t)opaque_arg;
1084 memset(_m, 0, sizeof(*buf));
1086 __atomic_store_n(&buf->refcnt, 1, __ATOMIC_RELAXED);
1087 for (j = 0; j != strd_n; ++j) {
1088 shinfo = &buf->shinfos[j];
1089 shinfo->free_cb = mlx5_mprq_buf_free_cb;
1090 shinfo->fcb_opaque = buf;
1095 * Free mempool of Multi-Packet RQ.
1098 * Pointer to Ethernet device.
1101 * 0 on success, negative errno value on failure.
1104 mlx5_mprq_free_mp(struct rte_eth_dev *dev)
1106 struct mlx5_priv *priv = dev->data->dev_private;
1107 struct rte_mempool *mp = priv->mprq_mp;
1112 DRV_LOG(DEBUG, "port %u freeing mempool (%s) for Multi-Packet RQ",
1113 dev->data->port_id, mp->name);
1115 * If a buffer in the pool has been externally attached to a mbuf and it
1116 * is still in use by application, destroying the Rx queue can spoil
1117 * the packet. It is unlikely to happen but if application dynamically
1118 * creates and destroys with holding Rx packets, this can happen.
1120 * TODO: It is unavoidable for now because the mempool for Multi-Packet
1121 * RQ isn't provided by application but managed by PMD.
1123 if (!rte_mempool_full(mp)) {
1125 "port %u mempool for Multi-Packet RQ is still in use",
1126 dev->data->port_id);
1130 rte_mempool_free(mp);
1131 /* Unset mempool for each Rx queue. */
1132 for (i = 0; i != priv->rxqs_n; ++i) {
1133 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1137 rxq->mprq_mp = NULL;
1139 priv->mprq_mp = NULL;
1144 * Allocate a mempool for Multi-Packet RQ. All configured Rx queues share the
1145 * mempool. If already allocated, reuse it if there're enough elements.
1146 * Otherwise, resize it.
1149 * Pointer to Ethernet device.
1152 * 0 on success, negative errno value on failure.
1155 mlx5_mprq_alloc_mp(struct rte_eth_dev *dev)
1157 struct mlx5_priv *priv = dev->data->dev_private;
1158 struct rte_mempool *mp = priv->mprq_mp;
1159 char name[RTE_MEMPOOL_NAMESIZE];
1160 unsigned int desc = 0;
1161 unsigned int buf_len;
1162 unsigned int obj_num;
1163 unsigned int obj_size;
1164 unsigned int strd_num_n = 0;
1165 unsigned int strd_sz_n = 0;
1167 unsigned int n_ibv = 0;
1170 if (!mlx5_mprq_enabled(dev))
1172 /* Count the total number of descriptors configured. */
1173 for (i = 0; i != priv->rxqs_n; ++i) {
1174 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1175 struct mlx5_rxq_ctrl *rxq_ctrl = container_of
1176 (rxq, struct mlx5_rxq_ctrl, rxq);
1178 if (rxq == NULL || rxq_ctrl->type != MLX5_RXQ_TYPE_STANDARD)
1181 desc += 1 << rxq->elts_n;
1182 /* Get the max number of strides. */
1183 if (strd_num_n < rxq->strd_num_n)
1184 strd_num_n = rxq->strd_num_n;
1185 /* Get the max size of a stride. */
1186 if (strd_sz_n < rxq->strd_sz_n)
1187 strd_sz_n = rxq->strd_sz_n;
1189 MLX5_ASSERT(strd_num_n && strd_sz_n);
1190 buf_len = (1 << strd_num_n) * (1 << strd_sz_n);
1191 obj_size = sizeof(struct mlx5_mprq_buf) + buf_len + (1 << strd_num_n) *
1192 sizeof(struct rte_mbuf_ext_shared_info) + RTE_PKTMBUF_HEADROOM;
1194 * Received packets can be either memcpy'd or externally referenced. In
1195 * case that the packet is attached to an mbuf as an external buffer, as
1196 * it isn't possible to predict how the buffers will be queued by
1197 * application, there's no option to exactly pre-allocate needed buffers
1198 * in advance but to speculatively prepares enough buffers.
1200 * In the data path, if this Mempool is depleted, PMD will try to memcpy
1201 * received packets to buffers provided by application (rxq->mp) until
1202 * this Mempool gets available again.
1205 obj_num = desc + MLX5_MPRQ_MP_CACHE_SZ * n_ibv;
1207 * rte_mempool_create_empty() has sanity check to refuse large cache
1208 * size compared to the number of elements.
1209 * CACHE_FLUSHTHRESH_MULTIPLIER is defined in a C file, so using a
1210 * constant number 2 instead.
1212 obj_num = RTE_MAX(obj_num, MLX5_MPRQ_MP_CACHE_SZ * 2);
1213 /* Check a mempool is already allocated and if it can be resued. */
1214 if (mp != NULL && mp->elt_size >= obj_size && mp->size >= obj_num) {
1215 DRV_LOG(DEBUG, "port %u mempool %s is being reused",
1216 dev->data->port_id, mp->name);
1219 } else if (mp != NULL) {
1220 DRV_LOG(DEBUG, "port %u mempool %s should be resized, freeing it",
1221 dev->data->port_id, mp->name);
1223 * If failed to free, which means it may be still in use, no way
1224 * but to keep using the existing one. On buffer underrun,
1225 * packets will be memcpy'd instead of external buffer
1228 if (mlx5_mprq_free_mp(dev)) {
1229 if (mp->elt_size >= obj_size)
1235 snprintf(name, sizeof(name), "port-%u-mprq", dev->data->port_id);
1236 mp = rte_mempool_create(name, obj_num, obj_size, MLX5_MPRQ_MP_CACHE_SZ,
1237 0, NULL, NULL, mlx5_mprq_buf_init,
1238 (void *)((uintptr_t)1 << strd_num_n),
1239 dev->device->numa_node, 0);
1242 "port %u failed to allocate a mempool for"
1243 " Multi-Packet RQ, count=%u, size=%u",
1244 dev->data->port_id, obj_num, obj_size);
1248 ret = mlx5_mr_mempool_register(&priv->sh->cdev->mr_scache,
1249 priv->sh->cdev->pd, mp, &priv->mp_id);
1250 if (ret < 0 && rte_errno != EEXIST) {
1252 DRV_LOG(ERR, "port %u failed to register a mempool for Multi-Packet RQ",
1253 dev->data->port_id);
1254 rte_mempool_free(mp);
1260 /* Set mempool for each Rx queue. */
1261 for (i = 0; i != priv->rxqs_n; ++i) {
1262 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1263 struct mlx5_rxq_ctrl *rxq_ctrl = container_of
1264 (rxq, struct mlx5_rxq_ctrl, rxq);
1266 if (rxq == NULL || rxq_ctrl->type != MLX5_RXQ_TYPE_STANDARD)
1270 DRV_LOG(INFO, "port %u Multi-Packet RQ is configured",
1271 dev->data->port_id);
1275 #define MLX5_MAX_TCP_HDR_OFFSET ((unsigned int)(sizeof(struct rte_ether_hdr) + \
1276 sizeof(struct rte_vlan_hdr) * 2 + \
1277 sizeof(struct rte_ipv6_hdr)))
1278 #define MAX_TCP_OPTION_SIZE 40u
1279 #define MLX5_MAX_LRO_HEADER_FIX ((unsigned int)(MLX5_MAX_TCP_HDR_OFFSET + \
1280 sizeof(struct rte_tcp_hdr) + \
1281 MAX_TCP_OPTION_SIZE))
1284 * Adjust the maximum LRO massage size.
1287 * Pointer to Ethernet device.
1290 * @param max_lro_size
1291 * The maximum size for LRO packet.
1294 mlx5_max_lro_msg_size_adjust(struct rte_eth_dev *dev, uint16_t idx,
1295 uint32_t max_lro_size)
1297 struct mlx5_priv *priv = dev->data->dev_private;
1299 if (priv->config.hca_attr.lro_max_msg_sz_mode ==
1300 MLX5_LRO_MAX_MSG_SIZE_START_FROM_L4 && max_lro_size >
1301 MLX5_MAX_TCP_HDR_OFFSET)
1302 max_lro_size -= MLX5_MAX_TCP_HDR_OFFSET;
1303 max_lro_size = RTE_MIN(max_lro_size, MLX5_MAX_LRO_SIZE);
1304 MLX5_ASSERT(max_lro_size >= MLX5_LRO_SEG_CHUNK_SIZE);
1305 max_lro_size /= MLX5_LRO_SEG_CHUNK_SIZE;
1306 if (priv->max_lro_msg_size)
1307 priv->max_lro_msg_size =
1308 RTE_MIN((uint32_t)priv->max_lro_msg_size, max_lro_size);
1310 priv->max_lro_msg_size = max_lro_size;
1312 "port %u Rx Queue %u max LRO message size adjusted to %u bytes",
1313 dev->data->port_id, idx,
1314 priv->max_lro_msg_size * MLX5_LRO_SEG_CHUNK_SIZE);
1318 * Create a DPDK Rx queue.
1321 * Pointer to Ethernet device.
1325 * Number of descriptors to configure in queue.
1327 * NUMA socket on which memory must be allocated.
1330 * A DPDK queue object on success, NULL otherwise and rte_errno is set.
1332 struct mlx5_rxq_ctrl *
1333 mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1334 unsigned int socket, const struct rte_eth_rxconf *conf,
1335 const struct rte_eth_rxseg_split *rx_seg, uint16_t n_seg)
1337 struct mlx5_priv *priv = dev->data->dev_private;
1338 struct mlx5_rxq_ctrl *tmpl;
1339 unsigned int mb_len = rte_pktmbuf_data_room_size(rx_seg[0].mp);
1340 struct mlx5_dev_config *config = &priv->config;
1341 uint64_t offloads = conf->offloads |
1342 dev->data->dev_conf.rxmode.offloads;
1343 unsigned int lro_on_queue = !!(offloads & RTE_ETH_RX_OFFLOAD_TCP_LRO);
1344 unsigned int max_rx_pktlen = lro_on_queue ?
1345 dev->data->dev_conf.rxmode.max_lro_pkt_size :
1346 dev->data->mtu + (unsigned int)RTE_ETHER_HDR_LEN +
1348 unsigned int non_scatter_min_mbuf_size = max_rx_pktlen +
1349 RTE_PKTMBUF_HEADROOM;
1350 unsigned int max_lro_size = 0;
1351 unsigned int first_mb_free_size = mb_len - RTE_PKTMBUF_HEADROOM;
1352 const int mprq_en = mlx5_check_mprq_support(dev) > 0 && n_seg == 1 &&
1353 !rx_seg[0].offset && !rx_seg[0].length;
1354 unsigned int mprq_stride_nums = config->mprq.stride_num_n ?
1355 config->mprq.stride_num_n : MLX5_MPRQ_STRIDE_NUM_N;
1356 unsigned int mprq_stride_size = non_scatter_min_mbuf_size <=
1357 (1U << config->mprq.max_stride_size_n) ?
1358 log2above(non_scatter_min_mbuf_size) : MLX5_MPRQ_STRIDE_SIZE_N;
1359 unsigned int mprq_stride_cap = (config->mprq.stride_num_n ?
1360 (1U << config->mprq.stride_num_n) : (1U << mprq_stride_nums)) *
1361 (config->mprq.stride_size_n ?
1362 (1U << config->mprq.stride_size_n) : (1U << mprq_stride_size));
1364 * Always allocate extra slots, even if eventually
1365 * the vector Rx will not be used.
1367 uint16_t desc_n = desc + config->rx_vec_en * MLX5_VPMD_DESCS_PER_LOOP;
1368 const struct rte_eth_rxseg_split *qs_seg = rx_seg;
1369 unsigned int tail_len;
1371 tmpl = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO,
1372 sizeof(*tmpl) + desc_n * sizeof(struct rte_mbuf *) +
1374 (desc >> mprq_stride_nums) * sizeof(struct mlx5_mprq_buf *),
1380 MLX5_ASSERT(n_seg && n_seg <= MLX5_MAX_RXQ_NSEG);
1382 * Build the array of actual buffer offsets and lengths.
1383 * Pad with the buffers from the last memory pool if
1384 * needed to handle max size packets, replace zero length
1385 * with the buffer length from the pool.
1387 tail_len = max_rx_pktlen;
1389 struct mlx5_eth_rxseg *hw_seg =
1390 &tmpl->rxq.rxseg[tmpl->rxq.rxseg_n];
1391 uint32_t buf_len, offset, seg_len;
1394 * For the buffers beyond descriptions offset is zero,
1395 * the first buffer contains head room.
1397 buf_len = rte_pktmbuf_data_room_size(qs_seg->mp);
1398 offset = (tmpl->rxq.rxseg_n >= n_seg ? 0 : qs_seg->offset) +
1399 (tmpl->rxq.rxseg_n ? 0 : RTE_PKTMBUF_HEADROOM);
1401 * For the buffers beyond descriptions the length is
1402 * pool buffer length, zero lengths are replaced with
1403 * pool buffer length either.
1405 seg_len = tmpl->rxq.rxseg_n >= n_seg ? buf_len :
1409 /* Check is done in long int, now overflows. */
1410 if (buf_len < seg_len + offset) {
1411 DRV_LOG(ERR, "port %u Rx queue %u: Split offset/length "
1412 "%u/%u can't be satisfied",
1413 dev->data->port_id, idx,
1414 qs_seg->length, qs_seg->offset);
1418 if (seg_len > tail_len)
1419 seg_len = buf_len - offset;
1420 if (++tmpl->rxq.rxseg_n > MLX5_MAX_RXQ_NSEG) {
1422 "port %u too many SGEs (%u) needed to handle"
1423 " requested maximum packet size %u, the maximum"
1424 " supported are %u", dev->data->port_id,
1425 tmpl->rxq.rxseg_n, max_rx_pktlen,
1427 rte_errno = ENOTSUP;
1430 /* Build the actual scattering element in the queue object. */
1431 hw_seg->mp = qs_seg->mp;
1432 MLX5_ASSERT(offset <= UINT16_MAX);
1433 MLX5_ASSERT(seg_len <= UINT16_MAX);
1434 hw_seg->offset = (uint16_t)offset;
1435 hw_seg->length = (uint16_t)seg_len;
1437 * Advance the segment descriptor, the padding is the based
1438 * on the attributes of the last descriptor.
1440 if (tmpl->rxq.rxseg_n < n_seg)
1442 tail_len -= RTE_MIN(tail_len, seg_len);
1443 } while (tail_len || !rte_is_power_of_2(tmpl->rxq.rxseg_n));
1444 MLX5_ASSERT(tmpl->rxq.rxseg_n &&
1445 tmpl->rxq.rxseg_n <= MLX5_MAX_RXQ_NSEG);
1446 if (tmpl->rxq.rxseg_n > 1 && !(offloads & RTE_ETH_RX_OFFLOAD_SCATTER)) {
1447 DRV_LOG(ERR, "port %u Rx queue %u: Scatter offload is not"
1448 " configured and no enough mbuf space(%u) to contain "
1449 "the maximum RX packet length(%u) with head-room(%u)",
1450 dev->data->port_id, idx, mb_len, max_rx_pktlen,
1451 RTE_PKTMBUF_HEADROOM);
1455 tmpl->type = MLX5_RXQ_TYPE_STANDARD;
1456 if (mlx5_mr_ctrl_init(&tmpl->rxq.mr_ctrl,
1457 &priv->sh->cdev->mr_scache.dev_gen, socket)) {
1458 /* rte_errno is already set. */
1461 tmpl->socket = socket;
1462 if (dev->data->dev_conf.intr_conf.rxq)
1465 * This Rx queue can be configured as a Multi-Packet RQ if all of the
1466 * following conditions are met:
1467 * - MPRQ is enabled.
1468 * - The number of descs is more than the number of strides.
1469 * - max_rx_pktlen plus overhead is less than the max size
1470 * of a stride or mprq_stride_size is specified by a user.
1471 * Need to make sure that there are enough strides to encap
1472 * the maximum packet size in case mprq_stride_size is set.
1473 * Otherwise, enable Rx scatter if necessary.
1475 if (mprq_en && desc > (1U << mprq_stride_nums) &&
1476 (non_scatter_min_mbuf_size <=
1477 (1U << config->mprq.max_stride_size_n) ||
1478 (config->mprq.stride_size_n &&
1479 non_scatter_min_mbuf_size <= mprq_stride_cap))) {
1480 /* TODO: Rx scatter isn't supported yet. */
1481 tmpl->rxq.sges_n = 0;
1482 /* Trim the number of descs needed. */
1483 desc >>= mprq_stride_nums;
1484 tmpl->rxq.strd_num_n = config->mprq.stride_num_n ?
1485 config->mprq.stride_num_n : mprq_stride_nums;
1486 tmpl->rxq.strd_sz_n = config->mprq.stride_size_n ?
1487 config->mprq.stride_size_n : mprq_stride_size;
1488 tmpl->rxq.strd_shift_en = MLX5_MPRQ_TWO_BYTE_SHIFT;
1489 tmpl->rxq.strd_scatter_en =
1490 !!(offloads & RTE_ETH_RX_OFFLOAD_SCATTER);
1491 tmpl->rxq.mprq_max_memcpy_len = RTE_MIN(first_mb_free_size,
1492 config->mprq.max_memcpy_len);
1493 max_lro_size = RTE_MIN(max_rx_pktlen,
1494 (1u << tmpl->rxq.strd_num_n) *
1495 (1u << tmpl->rxq.strd_sz_n));
1497 "port %u Rx queue %u: Multi-Packet RQ is enabled"
1498 " strd_num_n = %u, strd_sz_n = %u",
1499 dev->data->port_id, idx,
1500 tmpl->rxq.strd_num_n, tmpl->rxq.strd_sz_n);
1501 } else if (tmpl->rxq.rxseg_n == 1) {
1502 MLX5_ASSERT(max_rx_pktlen <= first_mb_free_size);
1503 tmpl->rxq.sges_n = 0;
1504 max_lro_size = max_rx_pktlen;
1505 } else if (offloads & RTE_ETH_RX_OFFLOAD_SCATTER) {
1506 unsigned int sges_n;
1508 if (lro_on_queue && first_mb_free_size <
1509 MLX5_MAX_LRO_HEADER_FIX) {
1510 DRV_LOG(ERR, "Not enough space in the first segment(%u)"
1511 " to include the max header size(%u) for LRO",
1512 first_mb_free_size, MLX5_MAX_LRO_HEADER_FIX);
1513 rte_errno = ENOTSUP;
1517 * Determine the number of SGEs needed for a full packet
1518 * and round it to the next power of two.
1520 sges_n = log2above(tmpl->rxq.rxseg_n);
1521 if (sges_n > MLX5_MAX_LOG_RQ_SEGS) {
1523 "port %u too many SGEs (%u) needed to handle"
1524 " requested maximum packet size %u, the maximum"
1525 " supported are %u", dev->data->port_id,
1526 1 << sges_n, max_rx_pktlen,
1527 1u << MLX5_MAX_LOG_RQ_SEGS);
1528 rte_errno = ENOTSUP;
1531 tmpl->rxq.sges_n = sges_n;
1532 max_lro_size = max_rx_pktlen;
1534 if (config->mprq.enabled && !mlx5_rxq_mprq_enabled(&tmpl->rxq))
1536 "port %u MPRQ is requested but cannot be enabled\n"
1537 " (requested: pkt_sz = %u, desc_num = %u,"
1538 " rxq_num = %u, stride_sz = %u, stride_num = %u\n"
1539 " supported: min_rxqs_num = %u,"
1540 " min_stride_sz = %u, max_stride_sz = %u).",
1541 dev->data->port_id, non_scatter_min_mbuf_size,
1543 config->mprq.stride_size_n ?
1544 (1U << config->mprq.stride_size_n) :
1545 (1U << mprq_stride_size),
1546 config->mprq.stride_num_n ?
1547 (1U << config->mprq.stride_num_n) :
1548 (1U << mprq_stride_nums),
1549 config->mprq.min_rxqs_num,
1550 (1U << config->mprq.min_stride_size_n),
1551 (1U << config->mprq.max_stride_size_n));
1552 DRV_LOG(DEBUG, "port %u maximum number of segments per packet: %u",
1553 dev->data->port_id, 1 << tmpl->rxq.sges_n);
1554 if (desc % (1 << tmpl->rxq.sges_n)) {
1556 "port %u number of Rx queue descriptors (%u) is not a"
1557 " multiple of SGEs per packet (%u)",
1560 1 << tmpl->rxq.sges_n);
1564 mlx5_max_lro_msg_size_adjust(dev, idx, max_lro_size);
1565 /* Toggle RX checksum offload if hardware supports it. */
1566 tmpl->rxq.csum = !!(offloads & RTE_ETH_RX_OFFLOAD_CHECKSUM);
1567 /* Configure Rx timestamp. */
1568 tmpl->rxq.hw_timestamp = !!(offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP);
1569 tmpl->rxq.timestamp_rx_flag = 0;
1570 if (tmpl->rxq.hw_timestamp && rte_mbuf_dyn_rx_timestamp_register(
1571 &tmpl->rxq.timestamp_offset,
1572 &tmpl->rxq.timestamp_rx_flag) != 0) {
1573 DRV_LOG(ERR, "Cannot register Rx timestamp field/flag");
1576 /* Configure VLAN stripping. */
1577 tmpl->rxq.vlan_strip = !!(offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP);
1578 /* By default, FCS (CRC) is stripped by hardware. */
1579 tmpl->rxq.crc_present = 0;
1580 tmpl->rxq.lro = lro_on_queue;
1581 if (offloads & RTE_ETH_RX_OFFLOAD_KEEP_CRC) {
1582 if (config->hw_fcs_strip) {
1584 * RQs used for LRO-enabled TIRs should not be
1585 * configured to scatter the FCS.
1589 "port %u CRC stripping has been "
1590 "disabled but will still be performed "
1591 "by hardware, because LRO is enabled",
1592 dev->data->port_id);
1594 tmpl->rxq.crc_present = 1;
1597 "port %u CRC stripping has been disabled but will"
1598 " still be performed by hardware, make sure MLNX_OFED"
1599 " and firmware are up to date",
1600 dev->data->port_id);
1604 "port %u CRC stripping is %s, %u bytes will be subtracted from"
1605 " incoming frames to hide it",
1607 tmpl->rxq.crc_present ? "disabled" : "enabled",
1608 tmpl->rxq.crc_present << 2);
1610 tmpl->rxq.rss_hash = !!priv->rss_conf.rss_hf &&
1611 (!!(dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS));
1612 tmpl->rxq.port_id = dev->data->port_id;
1614 tmpl->rxq.mp = rx_seg[0].mp;
1615 tmpl->rxq.elts_n = log2above(desc);
1616 tmpl->rxq.rq_repl_thresh =
1617 MLX5_VPMD_RXQ_RPLNSH_THRESH(desc_n);
1619 (struct rte_mbuf *(*)[desc_n])(tmpl + 1);
1620 tmpl->rxq.mprq_bufs =
1621 (struct mlx5_mprq_buf *(*)[desc])(*tmpl->rxq.elts + desc_n);
1623 tmpl->rxq.uar_lock_cq = &priv->sh->uar_lock_cq;
1625 tmpl->rxq.idx = idx;
1626 __atomic_fetch_add(&tmpl->refcnt, 1, __ATOMIC_RELAXED);
1627 LIST_INSERT_HEAD(&priv->rxqsctrl, tmpl, next);
1630 mlx5_mr_btree_free(&tmpl->rxq.mr_ctrl.cache_bh);
1636 * Create a DPDK Rx hairpin queue.
1639 * Pointer to Ethernet device.
1643 * Number of descriptors to configure in queue.
1644 * @param hairpin_conf
1645 * The hairpin binding configuration.
1648 * A DPDK queue object on success, NULL otherwise and rte_errno is set.
1650 struct mlx5_rxq_ctrl *
1651 mlx5_rxq_hairpin_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1652 const struct rte_eth_hairpin_conf *hairpin_conf)
1654 struct mlx5_priv *priv = dev->data->dev_private;
1655 struct mlx5_rxq_ctrl *tmpl;
1657 tmpl = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, sizeof(*tmpl), 0,
1663 tmpl->type = MLX5_RXQ_TYPE_HAIRPIN;
1664 tmpl->socket = SOCKET_ID_ANY;
1665 tmpl->rxq.rss_hash = 0;
1666 tmpl->rxq.port_id = dev->data->port_id;
1668 tmpl->rxq.mp = NULL;
1669 tmpl->rxq.elts_n = log2above(desc);
1670 tmpl->rxq.elts = NULL;
1671 tmpl->rxq.mr_ctrl.cache_bh = (struct mlx5_mr_btree) { 0 };
1672 tmpl->hairpin_conf = *hairpin_conf;
1673 tmpl->rxq.idx = idx;
1674 __atomic_fetch_add(&tmpl->refcnt, 1, __ATOMIC_RELAXED);
1675 LIST_INSERT_HEAD(&priv->rxqsctrl, tmpl, next);
1683 * Pointer to Ethernet device.
1688 * A pointer to the queue if it exists, NULL otherwise.
1690 struct mlx5_rxq_ctrl *
1691 mlx5_rxq_get(struct rte_eth_dev *dev, uint16_t idx)
1693 struct mlx5_priv *priv = dev->data->dev_private;
1694 struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx];
1695 struct mlx5_rxq_ctrl *rxq_ctrl = NULL;
1698 rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
1699 __atomic_fetch_add(&rxq_ctrl->refcnt, 1, __ATOMIC_RELAXED);
1705 * Release a Rx queue.
1708 * Pointer to Ethernet device.
1713 * 1 while a reference on it exists, 0 when freed.
1716 mlx5_rxq_release(struct rte_eth_dev *dev, uint16_t idx)
1718 struct mlx5_priv *priv = dev->data->dev_private;
1719 struct mlx5_rxq_ctrl *rxq_ctrl;
1721 if (priv->rxqs == NULL || (*priv->rxqs)[idx] == NULL)
1723 rxq_ctrl = container_of((*priv->rxqs)[idx], struct mlx5_rxq_ctrl, rxq);
1724 if (__atomic_sub_fetch(&rxq_ctrl->refcnt, 1, __ATOMIC_RELAXED) > 1)
1726 if (rxq_ctrl->obj) {
1727 priv->obj_ops.rxq_obj_release(rxq_ctrl->obj);
1728 LIST_REMOVE(rxq_ctrl->obj, next);
1729 mlx5_free(rxq_ctrl->obj);
1730 rxq_ctrl->obj = NULL;
1732 if (rxq_ctrl->type == MLX5_RXQ_TYPE_STANDARD) {
1733 rxq_free_elts(rxq_ctrl);
1734 dev->data->rx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STOPPED;
1736 if (!__atomic_load_n(&rxq_ctrl->refcnt, __ATOMIC_RELAXED)) {
1737 if (rxq_ctrl->type == MLX5_RXQ_TYPE_STANDARD)
1738 mlx5_mr_btree_free(&rxq_ctrl->rxq.mr_ctrl.cache_bh);
1739 LIST_REMOVE(rxq_ctrl, next);
1740 mlx5_free(rxq_ctrl);
1741 (*priv->rxqs)[idx] = NULL;
1747 * Verify the Rx Queue list is empty
1750 * Pointer to Ethernet device.
1753 * The number of object not released.
1756 mlx5_rxq_verify(struct rte_eth_dev *dev)
1758 struct mlx5_priv *priv = dev->data->dev_private;
1759 struct mlx5_rxq_ctrl *rxq_ctrl;
1762 LIST_FOREACH(rxq_ctrl, &priv->rxqsctrl, next) {
1763 DRV_LOG(DEBUG, "port %u Rx Queue %u still referenced",
1764 dev->data->port_id, rxq_ctrl->rxq.idx);
1771 * Get a Rx queue type.
1774 * Pointer to Ethernet device.
1779 * The Rx queue type.
1782 mlx5_rxq_get_type(struct rte_eth_dev *dev, uint16_t idx)
1784 struct mlx5_priv *priv = dev->data->dev_private;
1785 struct mlx5_rxq_ctrl *rxq_ctrl = NULL;
1787 if (idx < priv->rxqs_n && (*priv->rxqs)[idx]) {
1788 rxq_ctrl = container_of((*priv->rxqs)[idx],
1789 struct mlx5_rxq_ctrl,
1791 return rxq_ctrl->type;
1793 return MLX5_RXQ_TYPE_UNDEFINED;
1797 * Get a Rx hairpin queue configuration.
1800 * Pointer to Ethernet device.
1805 * Pointer to the configuration if a hairpin RX queue, otherwise NULL.
1807 const struct rte_eth_hairpin_conf *
1808 mlx5_rxq_get_hairpin_conf(struct rte_eth_dev *dev, uint16_t idx)
1810 struct mlx5_priv *priv = dev->data->dev_private;
1811 struct mlx5_rxq_ctrl *rxq_ctrl = NULL;
1813 if (idx < priv->rxqs_n && (*priv->rxqs)[idx]) {
1814 rxq_ctrl = container_of((*priv->rxqs)[idx],
1815 struct mlx5_rxq_ctrl,
1817 if (rxq_ctrl->type == MLX5_RXQ_TYPE_HAIRPIN)
1818 return &rxq_ctrl->hairpin_conf;
1824 * Match queues listed in arguments to queues contained in indirection table
1828 * Pointer to indirection table to match.
1830 * Queues to match to ques in indirection table.
1832 * Number of queues in the array.
1835 * 1 if all queues in indirection table match 0 othrwise.
1838 mlx5_ind_table_obj_match_queues(const struct mlx5_ind_table_obj *ind_tbl,
1839 const uint16_t *queues, uint32_t queues_n)
1841 return (ind_tbl->queues_n == queues_n) &&
1842 (!memcmp(ind_tbl->queues, queues,
1843 ind_tbl->queues_n * sizeof(ind_tbl->queues[0])));
1847 * Get an indirection table.
1850 * Pointer to Ethernet device.
1852 * Queues entering in the indirection table.
1854 * Number of queues in the array.
1857 * An indirection table if found.
1859 struct mlx5_ind_table_obj *
1860 mlx5_ind_table_obj_get(struct rte_eth_dev *dev, const uint16_t *queues,
1863 struct mlx5_priv *priv = dev->data->dev_private;
1864 struct mlx5_ind_table_obj *ind_tbl;
1866 rte_rwlock_read_lock(&priv->ind_tbls_lock);
1867 LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
1868 if ((ind_tbl->queues_n == queues_n) &&
1869 (memcmp(ind_tbl->queues, queues,
1870 ind_tbl->queues_n * sizeof(ind_tbl->queues[0]))
1872 __atomic_fetch_add(&ind_tbl->refcnt, 1,
1877 rte_rwlock_read_unlock(&priv->ind_tbls_lock);
1882 * Release an indirection table.
1885 * Pointer to Ethernet device.
1887 * Indirection table to release.
1889 * Indirection table for Standalone queue.
1892 * 1 while a reference on it exists, 0 when freed.
1895 mlx5_ind_table_obj_release(struct rte_eth_dev *dev,
1896 struct mlx5_ind_table_obj *ind_tbl,
1899 struct mlx5_priv *priv = dev->data->dev_private;
1900 unsigned int i, ret;
1902 rte_rwlock_write_lock(&priv->ind_tbls_lock);
1903 ret = __atomic_sub_fetch(&ind_tbl->refcnt, 1, __ATOMIC_RELAXED);
1904 if (!ret && !standalone)
1905 LIST_REMOVE(ind_tbl, next);
1906 rte_rwlock_write_unlock(&priv->ind_tbls_lock);
1909 priv->obj_ops.ind_table_destroy(ind_tbl);
1910 for (i = 0; i != ind_tbl->queues_n; ++i)
1911 claim_nonzero(mlx5_rxq_release(dev, ind_tbl->queues[i]));
1917 * Verify the Rx Queue list is empty
1920 * Pointer to Ethernet device.
1923 * The number of object not released.
1926 mlx5_ind_table_obj_verify(struct rte_eth_dev *dev)
1928 struct mlx5_priv *priv = dev->data->dev_private;
1929 struct mlx5_ind_table_obj *ind_tbl;
1932 rte_rwlock_read_lock(&priv->ind_tbls_lock);
1933 LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
1935 "port %u indirection table obj %p still referenced",
1936 dev->data->port_id, (void *)ind_tbl);
1939 rte_rwlock_read_unlock(&priv->ind_tbls_lock);
1944 * Setup an indirection table structure fields.
1947 * Pointer to Ethernet device.
1949 * Indirection table to modify.
1952 * 0 on success, a negative errno value otherwise and rte_errno is set.
1955 mlx5_ind_table_obj_setup(struct rte_eth_dev *dev,
1956 struct mlx5_ind_table_obj *ind_tbl)
1958 struct mlx5_priv *priv = dev->data->dev_private;
1959 uint32_t queues_n = ind_tbl->queues_n;
1960 uint16_t *queues = ind_tbl->queues;
1963 const unsigned int n = rte_is_power_of_2(queues_n) ?
1964 log2above(queues_n) :
1965 log2above(priv->config.ind_table_max_size);
1967 for (i = 0; i != queues_n; ++i) {
1968 if (!mlx5_rxq_get(dev, queues[i])) {
1973 ret = priv->obj_ops.ind_table_new(dev, n, ind_tbl);
1976 __atomic_fetch_add(&ind_tbl->refcnt, 1, __ATOMIC_RELAXED);
1980 for (j = 0; j < i; j++)
1981 mlx5_rxq_release(dev, ind_tbl->queues[j]);
1983 DRV_LOG(DEBUG, "Port %u cannot setup indirection table.",
1984 dev->data->port_id);
1989 * Create an indirection table.
1992 * Pointer to Ethernet device.
1994 * Queues entering in the indirection table.
1996 * Number of queues in the array.
1998 * Indirection table for Standalone queue.
2001 * The Verbs/DevX object initialized, NULL otherwise and rte_errno is set.
2003 static struct mlx5_ind_table_obj *
2004 mlx5_ind_table_obj_new(struct rte_eth_dev *dev, const uint16_t *queues,
2005 uint32_t queues_n, bool standalone)
2007 struct mlx5_priv *priv = dev->data->dev_private;
2008 struct mlx5_ind_table_obj *ind_tbl;
2011 ind_tbl = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*ind_tbl) +
2012 queues_n * sizeof(uint16_t), 0, SOCKET_ID_ANY);
2017 ind_tbl->queues_n = queues_n;
2018 ind_tbl->queues = (uint16_t *)(ind_tbl + 1);
2019 memcpy(ind_tbl->queues, queues, queues_n * sizeof(*queues));
2020 ret = mlx5_ind_table_obj_setup(dev, ind_tbl);
2026 rte_rwlock_write_lock(&priv->ind_tbls_lock);
2027 LIST_INSERT_HEAD(&priv->ind_tbls, ind_tbl, next);
2028 rte_rwlock_write_unlock(&priv->ind_tbls_lock);
2034 mlx5_ind_table_obj_check_standalone(struct rte_eth_dev *dev __rte_unused,
2035 struct mlx5_ind_table_obj *ind_tbl)
2039 refcnt = __atomic_load_n(&ind_tbl->refcnt, __ATOMIC_RELAXED);
2043 * Modification of indirection tables having more than 1
2044 * reference is unsupported.
2047 "Port %u cannot modify indirection table %p (refcnt %u > 1).",
2048 dev->data->port_id, (void *)ind_tbl, refcnt);
2054 * Modify an indirection table.
2057 * Pointer to Ethernet device.
2059 * Indirection table to modify.
2061 * Queues replacement for the indirection table.
2063 * Number of queues in the array.
2065 * Indirection table for Standalone queue.
2068 * 0 on success, a negative errno value otherwise and rte_errno is set.
2071 mlx5_ind_table_obj_modify(struct rte_eth_dev *dev,
2072 struct mlx5_ind_table_obj *ind_tbl,
2073 uint16_t *queues, const uint32_t queues_n,
2076 struct mlx5_priv *priv = dev->data->dev_private;
2079 const unsigned int n = rte_is_power_of_2(queues_n) ?
2080 log2above(queues_n) :
2081 log2above(priv->config.ind_table_max_size);
2083 MLX5_ASSERT(standalone);
2084 RTE_SET_USED(standalone);
2085 if (mlx5_ind_table_obj_check_standalone(dev, ind_tbl) < 0)
2087 for (i = 0; i != queues_n; ++i) {
2088 if (!mlx5_rxq_get(dev, queues[i])) {
2093 MLX5_ASSERT(priv->obj_ops.ind_table_modify);
2094 ret = priv->obj_ops.ind_table_modify(dev, n, queues, queues_n, ind_tbl);
2097 for (j = 0; j < ind_tbl->queues_n; j++)
2098 mlx5_rxq_release(dev, ind_tbl->queues[j]);
2099 ind_tbl->queues_n = queues_n;
2100 ind_tbl->queues = queues;
2104 for (j = 0; j < i; j++)
2105 mlx5_rxq_release(dev, queues[j]);
2107 DRV_LOG(DEBUG, "Port %u cannot setup indirection table.",
2108 dev->data->port_id);
2113 * Attach an indirection table to its queues.
2116 * Pointer to Ethernet device.
2118 * Indirection table to attach.
2121 * 0 on success, a negative errno value otherwise and rte_errno is set.
2124 mlx5_ind_table_obj_attach(struct rte_eth_dev *dev,
2125 struct mlx5_ind_table_obj *ind_tbl)
2130 ret = mlx5_ind_table_obj_modify(dev, ind_tbl, ind_tbl->queues,
2131 ind_tbl->queues_n, true);
2133 DRV_LOG(ERR, "Port %u could not modify indirect table obj %p",
2134 dev->data->port_id, (void *)ind_tbl);
2137 for (i = 0; i < ind_tbl->queues_n; i++)
2138 mlx5_rxq_get(dev, ind_tbl->queues[i]);
2143 * Detach an indirection table from its queues.
2146 * Pointer to Ethernet device.
2148 * Indirection table to detach.
2151 * 0 on success, a negative errno value otherwise and rte_errno is set.
2154 mlx5_ind_table_obj_detach(struct rte_eth_dev *dev,
2155 struct mlx5_ind_table_obj *ind_tbl)
2157 struct mlx5_priv *priv = dev->data->dev_private;
2158 const unsigned int n = rte_is_power_of_2(ind_tbl->queues_n) ?
2159 log2above(ind_tbl->queues_n) :
2160 log2above(priv->config.ind_table_max_size);
2164 ret = mlx5_ind_table_obj_check_standalone(dev, ind_tbl);
2167 MLX5_ASSERT(priv->obj_ops.ind_table_modify);
2168 ret = priv->obj_ops.ind_table_modify(dev, n, NULL, 0, ind_tbl);
2170 DRV_LOG(ERR, "Port %u could not modify indirect table obj %p",
2171 dev->data->port_id, (void *)ind_tbl);
2174 for (i = 0; i < ind_tbl->queues_n; i++)
2175 mlx5_rxq_release(dev, ind_tbl->queues[i]);
2180 mlx5_hrxq_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
2183 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2184 struct mlx5_flow_rss_desc *rss_desc = ctx->data;
2185 struct mlx5_hrxq *hrxq = container_of(entry, typeof(*hrxq), entry);
2187 return (hrxq->rss_key_len != rss_desc->key_len ||
2188 memcmp(hrxq->rss_key, rss_desc->key, rss_desc->key_len) ||
2189 hrxq->hash_fields != rss_desc->hash_fields ||
2190 hrxq->ind_table->queues_n != rss_desc->queue_num ||
2191 memcmp(hrxq->ind_table->queues, rss_desc->queue,
2192 rss_desc->queue_num * sizeof(rss_desc->queue[0])));
2196 * Modify an Rx Hash queue configuration.
2199 * Pointer to Ethernet device.
2201 * Index to Hash Rx queue to modify.
2203 * RSS key for the Rx hash queue.
2204 * @param rss_key_len
2206 * @param hash_fields
2207 * Verbs protocol hash field to make the RSS on.
2209 * Queues entering in hash queue. In case of empty hash_fields only the
2210 * first queue index will be taken for the indirection table.
2215 * 0 on success, a negative errno value otherwise and rte_errno is set.
2218 mlx5_hrxq_modify(struct rte_eth_dev *dev, uint32_t hrxq_idx,
2219 const uint8_t *rss_key, uint32_t rss_key_len,
2220 uint64_t hash_fields,
2221 const uint16_t *queues, uint32_t queues_n)
2224 struct mlx5_ind_table_obj *ind_tbl = NULL;
2225 struct mlx5_priv *priv = dev->data->dev_private;
2226 struct mlx5_hrxq *hrxq =
2227 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
2235 if (hrxq->rss_key_len != rss_key_len) {
2236 /* rss_key_len is fixed size 40 byte & not supposed to change */
2240 queues_n = hash_fields ? queues_n : 1;
2241 if (mlx5_ind_table_obj_match_queues(hrxq->ind_table,
2242 queues, queues_n)) {
2243 ind_tbl = hrxq->ind_table;
2245 if (hrxq->standalone) {
2247 * Replacement of indirection table unsupported for
2248 * stanalone hrxq objects (used by shared RSS).
2250 rte_errno = ENOTSUP;
2253 ind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n);
2255 ind_tbl = mlx5_ind_table_obj_new(dev, queues, queues_n,
2262 MLX5_ASSERT(priv->obj_ops.hrxq_modify);
2263 ret = priv->obj_ops.hrxq_modify(dev, hrxq, rss_key,
2264 hash_fields, ind_tbl);
2269 if (ind_tbl != hrxq->ind_table) {
2270 MLX5_ASSERT(!hrxq->standalone);
2271 mlx5_ind_table_obj_release(dev, hrxq->ind_table,
2273 hrxq->ind_table = ind_tbl;
2275 hrxq->hash_fields = hash_fields;
2276 memcpy(hrxq->rss_key, rss_key, rss_key_len);
2280 if (ind_tbl != hrxq->ind_table) {
2281 MLX5_ASSERT(!hrxq->standalone);
2282 mlx5_ind_table_obj_release(dev, ind_tbl, hrxq->standalone);
2289 __mlx5_hrxq_remove(struct rte_eth_dev *dev, struct mlx5_hrxq *hrxq)
2291 struct mlx5_priv *priv = dev->data->dev_private;
2293 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2294 mlx5_glue->destroy_flow_action(hrxq->action);
2296 priv->obj_ops.hrxq_destroy(hrxq);
2297 if (!hrxq->standalone) {
2298 mlx5_ind_table_obj_release(dev, hrxq->ind_table,
2301 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq->idx);
2305 * Release the hash Rx queue.
2308 * Pointer to Ethernet device.
2310 * Index to Hash Rx queue to release.
2313 * mlx5 list pointer.
2315 * Hash queue entry pointer.
2318 mlx5_hrxq_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
2320 struct rte_eth_dev *dev = tool_ctx;
2321 struct mlx5_hrxq *hrxq = container_of(entry, typeof(*hrxq), entry);
2323 __mlx5_hrxq_remove(dev, hrxq);
2326 static struct mlx5_hrxq *
2327 __mlx5_hrxq_create(struct rte_eth_dev *dev,
2328 struct mlx5_flow_rss_desc *rss_desc)
2330 struct mlx5_priv *priv = dev->data->dev_private;
2331 const uint8_t *rss_key = rss_desc->key;
2332 uint32_t rss_key_len = rss_desc->key_len;
2333 bool standalone = !!rss_desc->shared_rss;
2334 const uint16_t *queues =
2335 standalone ? rss_desc->const_q : rss_desc->queue;
2336 uint32_t queues_n = rss_desc->queue_num;
2337 struct mlx5_hrxq *hrxq = NULL;
2338 uint32_t hrxq_idx = 0;
2339 struct mlx5_ind_table_obj *ind_tbl = rss_desc->ind_tbl;
2342 queues_n = rss_desc->hash_fields ? queues_n : 1;
2344 ind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n);
2346 ind_tbl = mlx5_ind_table_obj_new(dev, queues, queues_n,
2350 hrxq = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_HRXQ], &hrxq_idx);
2353 hrxq->standalone = standalone;
2354 hrxq->idx = hrxq_idx;
2355 hrxq->ind_table = ind_tbl;
2356 hrxq->rss_key_len = rss_key_len;
2357 hrxq->hash_fields = rss_desc->hash_fields;
2358 memcpy(hrxq->rss_key, rss_key, rss_key_len);
2359 ret = priv->obj_ops.hrxq_new(dev, hrxq, rss_desc->tunnel);
2364 if (!rss_desc->ind_tbl)
2365 mlx5_ind_table_obj_release(dev, ind_tbl, standalone);
2367 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
2371 struct mlx5_list_entry *
2372 mlx5_hrxq_create_cb(void *tool_ctx, void *cb_ctx)
2374 struct rte_eth_dev *dev = tool_ctx;
2375 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2376 struct mlx5_flow_rss_desc *rss_desc = ctx->data;
2377 struct mlx5_hrxq *hrxq;
2379 hrxq = __mlx5_hrxq_create(dev, rss_desc);
2380 return hrxq ? &hrxq->entry : NULL;
2383 struct mlx5_list_entry *
2384 mlx5_hrxq_clone_cb(void *tool_ctx, struct mlx5_list_entry *entry,
2385 void *cb_ctx __rte_unused)
2387 struct rte_eth_dev *dev = tool_ctx;
2388 struct mlx5_priv *priv = dev->data->dev_private;
2389 struct mlx5_hrxq *hrxq;
2390 uint32_t hrxq_idx = 0;
2392 hrxq = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_HRXQ], &hrxq_idx);
2395 memcpy(hrxq, entry, sizeof(*hrxq) + MLX5_RSS_HASH_KEY_LEN);
2396 hrxq->idx = hrxq_idx;
2397 return &hrxq->entry;
2401 mlx5_hrxq_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
2403 struct rte_eth_dev *dev = tool_ctx;
2404 struct mlx5_priv *priv = dev->data->dev_private;
2405 struct mlx5_hrxq *hrxq = container_of(entry, typeof(*hrxq), entry);
2407 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq->idx);
2411 * Get an Rx Hash queue.
2414 * Pointer to Ethernet device.
2416 * RSS configuration for the Rx hash queue.
2419 * An hash Rx queue index on success.
2421 uint32_t mlx5_hrxq_get(struct rte_eth_dev *dev,
2422 struct mlx5_flow_rss_desc *rss_desc)
2424 struct mlx5_priv *priv = dev->data->dev_private;
2425 struct mlx5_hrxq *hrxq;
2426 struct mlx5_list_entry *entry;
2427 struct mlx5_flow_cb_ctx ctx = {
2431 if (rss_desc->shared_rss) {
2432 hrxq = __mlx5_hrxq_create(dev, rss_desc);
2434 entry = mlx5_list_register(priv->hrxqs, &ctx);
2437 hrxq = container_of(entry, typeof(*hrxq), entry);
2445 * Release the hash Rx queue.
2448 * Pointer to Ethernet device.
2450 * Index to Hash Rx queue to release.
2453 * 1 while a reference on it exists, 0 when freed.
2455 int mlx5_hrxq_release(struct rte_eth_dev *dev, uint32_t hrxq_idx)
2457 struct mlx5_priv *priv = dev->data->dev_private;
2458 struct mlx5_hrxq *hrxq;
2460 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
2463 if (!hrxq->standalone)
2464 return mlx5_list_unregister(priv->hrxqs, &hrxq->entry);
2465 __mlx5_hrxq_remove(dev, hrxq);
2470 * Create a drop Rx Hash queue.
2473 * Pointer to Ethernet device.
2476 * The Verbs/DevX object initialized, NULL otherwise and rte_errno is set.
2479 mlx5_drop_action_create(struct rte_eth_dev *dev)
2481 struct mlx5_priv *priv = dev->data->dev_private;
2482 struct mlx5_hrxq *hrxq = NULL;
2485 if (priv->drop_queue.hrxq)
2486 return priv->drop_queue.hrxq;
2487 hrxq = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*hrxq), 0, SOCKET_ID_ANY);
2490 "Port %u cannot allocate memory for drop queue.",
2491 dev->data->port_id);
2495 priv->drop_queue.hrxq = hrxq;
2496 hrxq->ind_table = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*hrxq->ind_table),
2498 if (!hrxq->ind_table) {
2502 ret = priv->obj_ops.drop_action_create(dev);
2508 if (hrxq->ind_table)
2509 mlx5_free(hrxq->ind_table);
2510 priv->drop_queue.hrxq = NULL;
2517 * Release a drop hash Rx queue.
2520 * Pointer to Ethernet device.
2523 mlx5_drop_action_destroy(struct rte_eth_dev *dev)
2525 struct mlx5_priv *priv = dev->data->dev_private;
2526 struct mlx5_hrxq *hrxq = priv->drop_queue.hrxq;
2528 if (!priv->drop_queue.hrxq)
2530 priv->obj_ops.drop_action_destroy(dev);
2531 mlx5_free(priv->drop_queue.rxq);
2532 mlx5_free(hrxq->ind_table);
2534 priv->drop_queue.rxq = NULL;
2535 priv->drop_queue.hrxq = NULL;
2539 * Verify the Rx Queue list is empty
2542 * Pointer to Ethernet device.
2545 * The number of object not released.
2548 mlx5_hrxq_verify(struct rte_eth_dev *dev)
2550 struct mlx5_priv *priv = dev->data->dev_private;
2552 return mlx5_list_get_entry_num(priv->hrxqs);
2556 * Set the Rx queue timestamp conversion parameters
2559 * Pointer to the Ethernet device structure.
2562 mlx5_rxq_timestamp_set(struct rte_eth_dev *dev)
2564 struct mlx5_priv *priv = dev->data->dev_private;
2565 struct mlx5_dev_ctx_shared *sh = priv->sh;
2566 struct mlx5_rxq_data *data;
2569 for (i = 0; i != priv->rxqs_n; ++i) {
2570 if (!(*priv->rxqs)[i])
2572 data = (*priv->rxqs)[i];
2574 data->rt_timestamp = priv->config.rt_timestamp;