drivers/net/mlx5/mlx5_rxq.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2015 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <assert.h>
   8 #include <errno.h>
   9 #include <string.h>
  10 #include <stdint.h>
  11 #include <fcntl.h>
  12 #include <sys/queue.h>
  13
  14 /* Verbs header. */
  15 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  16 #ifdef PEDANTIC
  17 #pragma GCC diagnostic ignored "-Wpedantic"
  18 #endif
  19 #include <infiniband/verbs.h>
  20 #include <infiniband/mlx5dv.h>
  21 #ifdef PEDANTIC
  22 #pragma GCC diagnostic error "-Wpedantic"
  23 #endif
  24
  25 #include <rte_mbuf.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ethdev_driver.h>
  28 #include <rte_common.h>
  29 #include <rte_interrupts.h>
  30 #include <rte_debug.h>
  31 #include <rte_io.h>
  32
  33 #include "mlx5.h"
  34 #include "mlx5_rxtx.h"
  35 #include "mlx5_utils.h"
  36 #include "mlx5_autoconf.h"
  37 #include "mlx5_defs.h"
  38 #include "mlx5_glue.h"
  39
  40 /* Default RSS hash key also used for ConnectX-3. */
  41 uint8_t rss_hash_default_key[] = {
  42         0x2c, 0xc6, 0x81, 0xd1,
  43         0x5b, 0xdb, 0xf4, 0xf7,
  44         0xfc, 0xa2, 0x83, 0x19,
  45         0xdb, 0x1a, 0x3e, 0x94,
  46         0x6b, 0x9e, 0x38, 0xd9,
  47         0x2c, 0x9c, 0x03, 0xd1,
  48         0xad, 0x99, 0x44, 0xa7,
  49         0xd9, 0x56, 0x3d, 0x59,
  50         0x06, 0x3c, 0x25, 0xf3,
  51         0xfc, 0x1f, 0xdc, 0x2a,
  52 };
  53
  54 /* Length of the default RSS hash key. */
  55 static_assert(MLX5_RSS_HASH_KEY_LEN ==
  56               (unsigned int)sizeof(rss_hash_default_key),
  57               "wrong RSS default key size.");
  58
  59 /**
  60  * Check whether Multi-Packet RQ can be enabled for the device.
  61  *
  62  * @param dev
  63  *   Pointer to Ethernet device.
  64  *
  65  * @return
  66  *   1 if supported, negative errno value if not.
  67  */
  68 inline int
  69 mlx5_check_mprq_support(struct rte_eth_dev *dev)
  70 {
  71         struct priv *priv = dev->data->dev_private;
  72
  73         if (priv->config.mprq.enabled &&
  74             priv->rxqs_n >= priv->config.mprq.min_rxqs_num)
  75                 return 1;
  76         return -ENOTSUP;
  77 }
  78
  79 /**
  80  * Check whether Multi-Packet RQ is enabled for the Rx queue.
  81  *
  82  *  @param rxq
  83  *     Pointer to receive queue structure.
  84  *
  85  * @return
  86  *   0 if disabled, otherwise enabled.
  87  */
  88 inline int
  89 mlx5_rxq_mprq_enabled(struct mlx5_rxq_data *rxq)
  90 {
  91         return rxq->strd_num_n > 0;
  92 }
  93
  94 /**
  95  * Check whether Multi-Packet RQ is enabled for the device.
  96  *
  97  * @param dev
  98  *   Pointer to Ethernet device.
  99  *
 100  * @return
 101  *   0 if disabled, otherwise enabled.
 102  */
 103 inline int
 104 mlx5_mprq_enabled(struct rte_eth_dev *dev)
 105 {
 106         struct priv *priv = dev->data->dev_private;
 107         uint16_t i;
 108         uint16_t n = 0;
 109
 110         if (mlx5_check_mprq_support(dev) < 0)
 111                 return 0;
 112         /* All the configured queues should be enabled. */
 113         for (i = 0; i < priv->rxqs_n; ++i) {
 114                 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
 115
 116                 if (!rxq)
 117                         continue;
 118                 if (mlx5_rxq_mprq_enabled(rxq))
 119                         ++n;
 120         }
 121         /* Multi-Packet RQ can't be partially configured. */
 122         assert(n == 0 || n == priv->rxqs_n);
 123         return n == priv->rxqs_n;
 124 }
 125
 126 /**
 127  * Allocate RX queue elements for Multi-Packet RQ.
 128  *
 129  * @param rxq_ctrl
 130  *   Pointer to RX queue structure.
 131  *
 132  * @return
 133  *   0 on success, a negative errno value otherwise and rte_errno is set.
 134  */
 135 static int
 136 rxq_alloc_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
 137 {
 138         struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
 139         unsigned int wqe_n = 1 << rxq->elts_n;
 140         unsigned int i;
 141         int err;
 142
 143         /* Iterate on segments. */
 144         for (i = 0; i <= wqe_n; ++i) {
 145                 struct mlx5_mprq_buf *buf;
 146
 147                 if (rte_mempool_get(rxq->mprq_mp, (void **)&buf) < 0) {
 148                         DRV_LOG(ERR, "port %u empty mbuf pool", rxq->port_id);
 149                         rte_errno = ENOMEM;
 150                         goto error;
 151                 }
 152                 if (i < wqe_n)
 153                         (*rxq->mprq_bufs)[i] = buf;
 154                 else
 155                         rxq->mprq_repl = buf;
 156         }
 157         DRV_LOG(DEBUG,
 158                 "port %u Rx queue %u allocated and configured %u segments",
 159                 rxq->port_id, rxq_ctrl->idx, wqe_n);
 160         return 0;
 161 error:
 162         err = rte_errno; /* Save rte_errno before cleanup. */
 163         wqe_n = i;
 164         for (i = 0; (i != wqe_n); ++i) {
 165                 if ((*rxq->mprq_bufs)[i] != NULL)
 166                         rte_mempool_put(rxq->mprq_mp,
 167                                         (*rxq->mprq_bufs)[i]);
 168                 (*rxq->mprq_bufs)[i] = NULL;
 169         }
 170         DRV_LOG(DEBUG, "port %u Rx queue %u failed, freed everything",
 171                 rxq->port_id, rxq_ctrl->idx);
 172         rte_errno = err; /* Restore rte_errno. */
 173         return -rte_errno;
 174 }
 175
 176 /**
 177  * Allocate RX queue elements for Single-Packet RQ.
 178  *
 179  * @param rxq_ctrl
 180  *   Pointer to RX queue structure.
 181  *
 182  * @return
 183  *   0 on success, errno value on failure.
 184  */
 185 static int
 186 rxq_alloc_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
 187 {
 188         const unsigned int sges_n = 1 << rxq_ctrl->rxq.sges_n;
 189         unsigned int elts_n = 1 << rxq_ctrl->rxq.elts_n;
 190         unsigned int i;
 191         int err;
 192
 193         /* Iterate on segments. */
 194         for (i = 0; (i != elts_n); ++i) {
 195                 struct rte_mbuf *buf;
 196
 197                 buf = rte_pktmbuf_alloc(rxq_ctrl->rxq.mp);
 198                 if (buf == NULL) {
 199                         DRV_LOG(ERR, "port %u empty mbuf pool",
 200                                 PORT_ID(rxq_ctrl->priv));
 201                         rte_errno = ENOMEM;
 202                         goto error;
 203                 }
 204                 /* Headroom is reserved by rte_pktmbuf_alloc(). */
 205                 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
 206                 /* Buffer is supposed to be empty. */
 207                 assert(rte_pktmbuf_data_len(buf) == 0);
 208                 assert(rte_pktmbuf_pkt_len(buf) == 0);
 209                 assert(!buf->next);
 210                 /* Only the first segment keeps headroom. */
 211                 if (i % sges_n)
 212                         SET_DATA_OFF(buf, 0);
 213                 PORT(buf) = rxq_ctrl->rxq.port_id;
 214                 DATA_LEN(buf) = rte_pktmbuf_tailroom(buf);
 215                 PKT_LEN(buf) = DATA_LEN(buf);
 216                 NB_SEGS(buf) = 1;
 217                 (*rxq_ctrl->rxq.elts)[i] = buf;
 218         }
 219         /* If Rx vector is activated. */
 220         if (mlx5_rxq_check_vec_support(&rxq_ctrl->rxq) > 0) {
 221                 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
 222                 struct rte_mbuf *mbuf_init = &rxq->fake_mbuf;
 223                 int j;
 224
 225                 /* Initialize default rearm_data for vPMD. */
 226                 mbuf_init->data_off = RTE_PKTMBUF_HEADROOM;
 227                 rte_mbuf_refcnt_set(mbuf_init, 1);
 228                 mbuf_init->nb_segs = 1;
 229                 mbuf_init->port = rxq->port_id;
 230                 /*
 231                  * prevent compiler reordering:
 232                  * rearm_data covers previous fields.
 233                  */
 234                 rte_compiler_barrier();
 235                 rxq->mbuf_initializer =
 236                         *(uint64_t *)&mbuf_init->rearm_data;
 237                 /* Padding with a fake mbuf for vectorized Rx. */
 238                 for (j = 0; j < MLX5_VPMD_DESCS_PER_LOOP; ++j)
 239                         (*rxq->elts)[elts_n + j] = &rxq->fake_mbuf;
 240         }
 241         DRV_LOG(DEBUG,
 242                 "port %u Rx queue %u allocated and configured %u segments"
 243                 " (max %u packets)",
 244                 PORT_ID(rxq_ctrl->priv), rxq_ctrl->idx, elts_n,
 245                 elts_n / (1 << rxq_ctrl->rxq.sges_n));
 246         return 0;
 247 error:
 248         err = rte_errno; /* Save rte_errno before cleanup. */
 249         elts_n = i;
 250         for (i = 0; (i != elts_n); ++i) {
 251                 if ((*rxq_ctrl->rxq.elts)[i] != NULL)
 252                         rte_pktmbuf_free_seg((*rxq_ctrl->rxq.elts)[i]);
 253                 (*rxq_ctrl->rxq.elts)[i] = NULL;
 254         }
 255         DRV_LOG(DEBUG, "port %u Rx queue %u failed, freed everything",
 256                 PORT_ID(rxq_ctrl->priv), rxq_ctrl->idx);
 257         rte_errno = err; /* Restore rte_errno. */
 258         return -rte_errno;
 259 }
 260
 261 /**
 262  * Allocate RX queue elements.
 263  *
 264  * @param rxq_ctrl
 265  *   Pointer to RX queue structure.
 266  *
 267  * @return
 268  *   0 on success, errno value on failure.
 269  */
 270 int
 271 rxq_alloc_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
 272 {
 273         return mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
 274                rxq_alloc_elts_mprq(rxq_ctrl) : rxq_alloc_elts_sprq(rxq_ctrl);
 275 }
 276
 277 /**
 278  * Free RX queue elements for Multi-Packet RQ.
 279  *
 280  * @param rxq_ctrl
 281  *   Pointer to RX queue structure.
 282  */
 283 static void
 284 rxq_free_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
 285 {
 286         struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
 287         uint16_t i;
 288
 289         DRV_LOG(DEBUG, "port %u Multi-Packet Rx queue %u freeing WRs",
 290                 rxq->port_id, rxq_ctrl->idx);
 291         if (rxq->mprq_bufs == NULL)
 292                 return;
 293         assert(mlx5_rxq_check_vec_support(rxq) < 0);
 294         for (i = 0; (i != (1u << rxq->elts_n)); ++i) {
 295                 if ((*rxq->mprq_bufs)[i] != NULL)
 296                         mlx5_mprq_buf_free((*rxq->mprq_bufs)[i]);
 297                 (*rxq->mprq_bufs)[i] = NULL;
 298         }
 299         if (rxq->mprq_repl != NULL) {
 300                 mlx5_mprq_buf_free(rxq->mprq_repl);
 301                 rxq->mprq_repl = NULL;
 302         }
 303 }
 304
 305 /**
 306  * Free RX queue elements for Single-Packet RQ.
 307  *
 308  * @param rxq_ctrl
 309  *   Pointer to RX queue structure.
 310  */
 311 static void
 312 rxq_free_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
 313 {
 314         struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
 315         const uint16_t q_n = (1 << rxq->elts_n);
 316         const uint16_t q_mask = q_n - 1;
 317         uint16_t used = q_n - (rxq->rq_ci - rxq->rq_pi);
 318         uint16_t i;
 319
 320         DRV_LOG(DEBUG, "port %u Rx queue %u freeing WRs",
 321                 PORT_ID(rxq_ctrl->priv), rxq_ctrl->idx);
 322         if (rxq->elts == NULL)
 323                 return;
 324         /**
 325          * Some mbuf in the Ring belongs to the application.  They cannot be
 326          * freed.
 327          */
 328         if (mlx5_rxq_check_vec_support(rxq) > 0) {
 329                 for (i = 0; i < used; ++i)
 330                         (*rxq->elts)[(rxq->rq_ci + i) & q_mask] = NULL;
 331                 rxq->rq_pi = rxq->rq_ci;
 332         }
 333         for (i = 0; (i != (1u << rxq->elts_n)); ++i) {
 334                 if ((*rxq->elts)[i] != NULL)
 335                         rte_pktmbuf_free_seg((*rxq->elts)[i]);
 336                 (*rxq->elts)[i] = NULL;
 337         }
 338 }
 339
 340 /**
 341  * Free RX queue elements.
 342  *
 343  * @param rxq_ctrl
 344  *   Pointer to RX queue structure.
 345  */
 346 static void
 347 rxq_free_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
 348 {
 349         if (mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq))
 350                 rxq_free_elts_mprq(rxq_ctrl);
 351         else
 352                 rxq_free_elts_sprq(rxq_ctrl);
 353 }
 354
 355 /**
 356  * Clean up a RX queue.
 357  *
 358  * Destroy objects, free allocated memory and reset the structure for reuse.
 359  *
 360  * @param rxq_ctrl
 361  *   Pointer to RX queue structure.
 362  */
 363 void
 364 mlx5_rxq_cleanup(struct mlx5_rxq_ctrl *rxq_ctrl)
 365 {
 366         DRV_LOG(DEBUG, "port %u cleaning up Rx queue %u",
 367                 PORT_ID(rxq_ctrl->priv), rxq_ctrl->idx);
 368         if (rxq_ctrl->ibv)
 369                 mlx5_rxq_ibv_release(rxq_ctrl->ibv);
 370         memset(rxq_ctrl, 0, sizeof(*rxq_ctrl));
 371 }
 372
 373 /**
 374  * Returns the per-queue supported offloads.
 375  *
 376  * @param dev
 377  *   Pointer to Ethernet device.
 378  *
 379  * @return
 380  *   Supported Rx offloads.
 381  */
 382 uint64_t
 383 mlx5_get_rx_queue_offloads(struct rte_eth_dev *dev)
 384 {
 385         struct priv *priv = dev->data->dev_private;
 386         struct mlx5_dev_config *config = &priv->config;
 387         uint64_t offloads = (DEV_RX_OFFLOAD_SCATTER |
 388                              DEV_RX_OFFLOAD_TIMESTAMP |
 389                              DEV_RX_OFFLOAD_JUMBO_FRAME);
 390
 391         offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
 392         if (config->hw_fcs_strip)
 393                 offloads |= DEV_RX_OFFLOAD_KEEP_CRC;
 394
 395         if (config->hw_csum)
 396                 offloads |= (DEV_RX_OFFLOAD_IPV4_CKSUM |
 397                              DEV_RX_OFFLOAD_UDP_CKSUM |
 398                              DEV_RX_OFFLOAD_TCP_CKSUM);
 399         if (config->hw_vlan_strip)
 400                 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
 401         return offloads;
 402 }
 403
 404
 405 /**
 406  * Returns the per-port supported offloads.
 407  *
 408  * @return
 409  *   Supported Rx offloads.
 410  */
 411 uint64_t
 412 mlx5_get_rx_port_offloads(void)
 413 {
 414         uint64_t offloads = DEV_RX_OFFLOAD_VLAN_FILTER;
 415
 416         return offloads;
 417 }
 418
 419 /**
 420  *
 421  * @param dev
 422  *   Pointer to Ethernet device structure.
 423  * @param idx
 424  *   RX queue index.
 425  * @param desc
 426  *   Number of descriptors to configure in queue.
 427  * @param socket
 428  *   NUMA socket on which memory must be allocated.
 429  * @param[in] conf
 430  *   Thresholds parameters.
 431  * @param mp
 432  *   Memory pool for buffer allocations.
 433  *
 434  * @return
 435  *   0 on success, a negative errno value otherwise and rte_errno is set.
 436  */
 437 int
 438 mlx5_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
 439                     unsigned int socket, const struct rte_eth_rxconf *conf,
 440                     struct rte_mempool *mp)
 441 {
 442         struct priv *priv = dev->data->dev_private;
 443         struct mlx5_rxq_data *rxq = (*priv->rxqs)[idx];
 444         struct mlx5_rxq_ctrl *rxq_ctrl =
 445                 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
 446
 447         if (!rte_is_power_of_2(desc)) {
 448                 desc = 1 << log2above(desc);
 449                 DRV_LOG(WARNING,
 450                         "port %u increased number of descriptors in Rx queue %u"
 451                         " to the next power of two (%d)",
 452                         dev->data->port_id, idx, desc);
 453         }
 454         DRV_LOG(DEBUG, "port %u configuring Rx queue %u for %u descriptors",
 455                 dev->data->port_id, idx, desc);
 456         if (idx >= priv->rxqs_n) {
 457                 DRV_LOG(ERR, "port %u Rx queue index out of range (%u >= %u)",
 458                         dev->data->port_id, idx, priv->rxqs_n);
 459                 rte_errno = EOVERFLOW;
 460                 return -rte_errno;
 461         }
 462         if (!mlx5_rxq_releasable(dev, idx)) {
 463                 DRV_LOG(ERR, "port %u unable to release queue index %u",
 464                         dev->data->port_id, idx);
 465                 rte_errno = EBUSY;
 466                 return -rte_errno;
 467         }
 468         mlx5_rxq_release(dev, idx);
 469         rxq_ctrl = mlx5_rxq_new(dev, idx, desc, socket, conf, mp);
 470         if (!rxq_ctrl) {
 471                 DRV_LOG(ERR, "port %u unable to allocate queue index %u",
 472                         dev->data->port_id, idx);
 473                 rte_errno = ENOMEM;
 474                 return -rte_errno;
 475         }
 476         DRV_LOG(DEBUG, "port %u adding Rx queue %u to list",
 477                 dev->data->port_id, idx);
 478         (*priv->rxqs)[idx] = &rxq_ctrl->rxq;
 479         return 0;
 480 }
 481
 482 /**
 483  * DPDK callback to release a RX queue.
 484  *
 485  * @param dpdk_rxq
 486  *   Generic RX queue pointer.
 487  */
 488 void
 489 mlx5_rx_queue_release(void *dpdk_rxq)
 490 {
 491         struct mlx5_rxq_data *rxq = (struct mlx5_rxq_data *)dpdk_rxq;
 492         struct mlx5_rxq_ctrl *rxq_ctrl;
 493         struct priv *priv;
 494
 495         if (rxq == NULL)
 496                 return;
 497         rxq_ctrl = container_of(rxq, struct mlx5_rxq_ctrl, rxq);
 498         priv = rxq_ctrl->priv;
 499         if (!mlx5_rxq_releasable(ETH_DEV(priv), rxq_ctrl->rxq.stats.idx))
 500                 rte_panic("port %u Rx queue %u is still used by a flow and"
 501                           " cannot be removed\n",
 502                           PORT_ID(priv), rxq_ctrl->idx);
 503         mlx5_rxq_release(ETH_DEV(priv), rxq_ctrl->rxq.stats.idx);
 504 }
 505
 506 /**
 507  * Allocate queue vector and fill epoll fd list for Rx interrupts.
 508  *
 509  * @param dev
 510  *   Pointer to Ethernet device.
 511  *
 512  * @return
 513  *   0 on success, a negative errno value otherwise and rte_errno is set.
 514  */
 515 int
 516 mlx5_rx_intr_vec_enable(struct rte_eth_dev *dev)
 517 {
 518         struct priv *priv = dev->data->dev_private;
 519         unsigned int i;
 520         unsigned int rxqs_n = priv->rxqs_n;
 521         unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
 522         unsigned int count = 0;
 523         struct rte_intr_handle *intr_handle = dev->intr_handle;
 524
 525         if (!dev->data->dev_conf.intr_conf.rxq)
 526                 return 0;
 527         mlx5_rx_intr_vec_disable(dev);
 528         intr_handle->intr_vec = malloc(n * sizeof(intr_handle->intr_vec[0]));
 529         if (intr_handle->intr_vec == NULL) {
 530                 DRV_LOG(ERR,
 531                         "port %u failed to allocate memory for interrupt"
 532                         " vector, Rx interrupts will not be supported",
 533                         dev->data->port_id);
 534                 rte_errno = ENOMEM;
 535                 return -rte_errno;
 536         }
 537         intr_handle->type = RTE_INTR_HANDLE_EXT;
 538         for (i = 0; i != n; ++i) {
 539                 /* This rxq ibv must not be released in this function. */
 540                 struct mlx5_rxq_ibv *rxq_ibv = mlx5_rxq_ibv_get(dev, i);
 541                 int fd;
 542                 int flags;
 543                 int rc;
 544
 545                 /* Skip queues that cannot request interrupts. */
 546                 if (!rxq_ibv || !rxq_ibv->channel) {
 547                         /* Use invalid intr_vec[] index to disable entry. */
 548                         intr_handle->intr_vec[i] =
 549                                 RTE_INTR_VEC_RXTX_OFFSET +
 550                                 RTE_MAX_RXTX_INTR_VEC_ID;
 551                         continue;
 552                 }
 553                 if (count >= RTE_MAX_RXTX_INTR_VEC_ID) {
 554                         DRV_LOG(ERR,
 555                                 "port %u too many Rx queues for interrupt"
 556                                 " vector size (%d), Rx interrupts cannot be"
 557                                 " enabled",
 558                                 dev->data->port_id, RTE_MAX_RXTX_INTR_VEC_ID);
 559                         mlx5_rx_intr_vec_disable(dev);
 560                         rte_errno = ENOMEM;
 561                         return -rte_errno;
 562                 }
 563                 fd = rxq_ibv->channel->fd;
 564                 flags = fcntl(fd, F_GETFL);
 565                 rc = fcntl(fd, F_SETFL, flags | O_NONBLOCK);
 566                 if (rc < 0) {
 567                         rte_errno = errno;
 568                         DRV_LOG(ERR,
 569                                 "port %u failed to make Rx interrupt file"
 570                                 " descriptor %d non-blocking for queue index"
 571                                 " %d",
 572                                 dev->data->port_id, fd, i);
 573                         mlx5_rx_intr_vec_disable(dev);
 574                         return -rte_errno;
 575                 }
 576                 intr_handle->intr_vec[i] = RTE_INTR_VEC_RXTX_OFFSET + count;
 577                 intr_handle->efds[count] = fd;
 578                 count++;
 579         }
 580         if (!count)
 581                 mlx5_rx_intr_vec_disable(dev);
 582         else
 583                 intr_handle->nb_efd = count;
 584         return 0;
 585 }
 586
 587 /**
 588  * Clean up Rx interrupts handler.
 589  *
 590  * @param dev
 591  *   Pointer to Ethernet device.
 592  */
 593 void
 594 mlx5_rx_intr_vec_disable(struct rte_eth_dev *dev)
 595 {
 596         struct priv *priv = dev->data->dev_private;
 597         struct rte_intr_handle *intr_handle = dev->intr_handle;
 598         unsigned int i;
 599         unsigned int rxqs_n = priv->rxqs_n;
 600         unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
 601
 602         if (!dev->data->dev_conf.intr_conf.rxq)
 603                 return;
 604         if (!intr_handle->intr_vec)
 605                 goto free;
 606         for (i = 0; i != n; ++i) {
 607                 struct mlx5_rxq_ctrl *rxq_ctrl;
 608                 struct mlx5_rxq_data *rxq_data;
 609
 610                 if (intr_handle->intr_vec[i] == RTE_INTR_VEC_RXTX_OFFSET +
 611                     RTE_MAX_RXTX_INTR_VEC_ID)
 612                         continue;
 613                 /**
 614                  * Need to access directly the queue to release the reference
 615                  * kept in priv_rx_intr_vec_enable().
 616                  */
 617                 rxq_data = (*priv->rxqs)[i];
 618                 rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
 619                 mlx5_rxq_ibv_release(rxq_ctrl->ibv);
 620         }
 621 free:
 622         rte_intr_free_epoll_fd(intr_handle);
 623         if (intr_handle->intr_vec)
 624                 free(intr_handle->intr_vec);
 625         intr_handle->nb_efd = 0;
 626         intr_handle->intr_vec = NULL;
 627 }
 628
 629 /**
 630  *  MLX5 CQ notification .
 631  *
 632  *  @param rxq
 633  *     Pointer to receive queue structure.
 634  *  @param sq_n_rxq
 635  *     Sequence number per receive queue .
 636  */
 637 static inline void
 638 mlx5_arm_cq(struct mlx5_rxq_data *rxq, int sq_n_rxq)
 639 {
 640         int sq_n = 0;
 641         uint32_t doorbell_hi;
 642         uint64_t doorbell;
 643         void *cq_db_reg = (char *)rxq->cq_uar + MLX5_CQ_DOORBELL;
 644
 645         sq_n = sq_n_rxq & MLX5_CQ_SQN_MASK;
 646         doorbell_hi = sq_n << MLX5_CQ_SQN_OFFSET | (rxq->cq_ci & MLX5_CI_MASK);
 647         doorbell = (uint64_t)doorbell_hi << 32;
 648         doorbell |=  rxq->cqn;
 649         rxq->cq_db[MLX5_CQ_ARM_DB] = rte_cpu_to_be_32(doorbell_hi);
 650         rte_write64(rte_cpu_to_be_64(doorbell), cq_db_reg);
 651 }
 652
 653 /**
 654  * DPDK callback for Rx queue interrupt enable.
 655  *
 656  * @param dev
 657  *   Pointer to Ethernet device structure.
 658  * @param rx_queue_id
 659  *   Rx queue number.
 660  *
 661  * @return
 662  *   0 on success, a negative errno value otherwise and rte_errno is set.
 663  */
 664 int
 665 mlx5_rx_intr_enable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 666 {
 667         struct priv *priv = dev->data->dev_private;
 668         struct mlx5_rxq_data *rxq_data;
 669         struct mlx5_rxq_ctrl *rxq_ctrl;
 670
 671         rxq_data = (*priv->rxqs)[rx_queue_id];
 672         if (!rxq_data) {
 673                 rte_errno = EINVAL;
 674                 return -rte_errno;
 675         }
 676         rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
 677         if (rxq_ctrl->irq) {
 678                 struct mlx5_rxq_ibv *rxq_ibv;
 679
 680                 rxq_ibv = mlx5_rxq_ibv_get(dev, rx_queue_id);
 681                 if (!rxq_ibv) {
 682                         rte_errno = EINVAL;
 683                         return -rte_errno;
 684                 }
 685                 mlx5_arm_cq(rxq_data, rxq_data->cq_arm_sn);
 686                 mlx5_rxq_ibv_release(rxq_ibv);
 687         }
 688         return 0;
 689 }
 690
 691 /**
 692  * DPDK callback for Rx queue interrupt disable.
 693  *
 694  * @param dev
 695  *   Pointer to Ethernet device structure.
 696  * @param rx_queue_id
 697  *   Rx queue number.
 698  *
 699  * @return
 700  *   0 on success, a negative errno value otherwise and rte_errno is set.
 701  */
 702 int
 703 mlx5_rx_intr_disable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 704 {
 705         struct priv *priv = dev->data->dev_private;
 706         struct mlx5_rxq_data *rxq_data;
 707         struct mlx5_rxq_ctrl *rxq_ctrl;
 708         struct mlx5_rxq_ibv *rxq_ibv = NULL;
 709         struct ibv_cq *ev_cq;
 710         void *ev_ctx;
 711         int ret;
 712
 713         rxq_data = (*priv->rxqs)[rx_queue_id];
 714         if (!rxq_data) {
 715                 rte_errno = EINVAL;
 716                 return -rte_errno;
 717         }
 718         rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
 719         if (!rxq_ctrl->irq)
 720                 return 0;
 721         rxq_ibv = mlx5_rxq_ibv_get(dev, rx_queue_id);
 722         if (!rxq_ibv) {
 723                 rte_errno = EINVAL;
 724                 return -rte_errno;
 725         }
 726         ret = mlx5_glue->get_cq_event(rxq_ibv->channel, &ev_cq, &ev_ctx);
 727         if (ret || ev_cq != rxq_ibv->cq) {
 728                 rte_errno = EINVAL;
 729                 goto exit;
 730         }
 731         rxq_data->cq_arm_sn++;
 732         mlx5_glue->ack_cq_events(rxq_ibv->cq, 1);
 733         return 0;
 734 exit:
 735         ret = rte_errno; /* Save rte_errno before cleanup. */
 736         if (rxq_ibv)
 737                 mlx5_rxq_ibv_release(rxq_ibv);
 738         DRV_LOG(WARNING, "port %u unable to disable interrupt on Rx queue %d",
 739                 dev->data->port_id, rx_queue_id);
 740         rte_errno = ret; /* Restore rte_errno. */
 741         return -rte_errno;
 742 }
 743
 744 /**
 745  * Create the Rx queue Verbs object.
 746  *
 747  * @param dev
 748  *   Pointer to Ethernet device.
 749  * @param idx
 750  *   Queue index in DPDK Rx queue array
 751  *
 752  * @return
 753  *   The Verbs object initialised, NULL otherwise and rte_errno is set.
 754  */
 755 struct mlx5_rxq_ibv *
 756 mlx5_rxq_ibv_new(struct rte_eth_dev *dev, uint16_t idx)
 757 {
 758         struct priv *priv = dev->data->dev_private;
 759         struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx];
 760         struct mlx5_rxq_ctrl *rxq_ctrl =
 761                 container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
 762         struct ibv_wq_attr mod;
 763         union {
 764                 struct {
 765                         struct ibv_cq_init_attr_ex ibv;
 766                         struct mlx5dv_cq_init_attr mlx5;
 767                 } cq;
 768                 struct {
 769                         struct ibv_wq_init_attr ibv;
 770 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 771                         struct mlx5dv_wq_init_attr mlx5;
 772 #endif
 773                 } wq;
 774                 struct ibv_cq_ex cq_attr;
 775         } attr;
 776         unsigned int cqe_n;
 777         unsigned int wqe_n = 1 << rxq_data->elts_n;
 778         struct mlx5_rxq_ibv *tmpl;
 779         struct mlx5dv_cq cq_info;
 780         struct mlx5dv_rwq rwq;
 781         unsigned int i;
 782         int ret = 0;
 783         struct mlx5dv_obj obj;
 784         struct mlx5_dev_config *config = &priv->config;
 785         const int mprq_en = mlx5_rxq_mprq_enabled(rxq_data);
 786
 787         assert(rxq_data);
 788         assert(!rxq_ctrl->ibv);
 789         priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_RX_QUEUE;
 790         priv->verbs_alloc_ctx.obj = rxq_ctrl;
 791         tmpl = rte_calloc_socket(__func__, 1, sizeof(*tmpl), 0,
 792                                  rxq_ctrl->socket);
 793         if (!tmpl) {
 794                 DRV_LOG(ERR,
 795                         "port %u Rx queue %u cannot allocate verbs resources",
 796                         dev->data->port_id, rxq_ctrl->idx);
 797                 rte_errno = ENOMEM;
 798                 goto error;
 799         }
 800         tmpl->rxq_ctrl = rxq_ctrl;
 801         if (rxq_ctrl->irq) {
 802                 tmpl->channel = mlx5_glue->create_comp_channel(priv->ctx);
 803                 if (!tmpl->channel) {
 804                         DRV_LOG(ERR, "port %u: comp channel creation failure",
 805                                 dev->data->port_id);
 806                         rte_errno = ENOMEM;
 807                         goto error;
 808                 }
 809         }
 810         if (mprq_en)
 811                 cqe_n = wqe_n * (1 << rxq_data->strd_num_n) - 1;
 812         else
 813                 cqe_n = wqe_n  - 1;
 814         attr.cq.ibv = (struct ibv_cq_init_attr_ex){
 815                 .cqe = cqe_n,
 816                 .channel = tmpl->channel,
 817                 .comp_mask = 0,
 818         };
 819         attr.cq.mlx5 = (struct mlx5dv_cq_init_attr){
 820                 .comp_mask = 0,
 821         };
 822         if (config->cqe_comp && !rxq_data->hw_timestamp) {
 823                 attr.cq.mlx5.comp_mask |=
 824                         MLX5DV_CQ_INIT_ATTR_MASK_COMPRESSED_CQE;
 825 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 826                 attr.cq.mlx5.cqe_comp_res_format =
 827                         mprq_en ? MLX5DV_CQE_RES_FORMAT_CSUM_STRIDX :
 828                                   MLX5DV_CQE_RES_FORMAT_HASH;
 829 #else
 830                 attr.cq.mlx5.cqe_comp_res_format = MLX5DV_CQE_RES_FORMAT_HASH;
 831 #endif
 832                 /*
 833                  * For vectorized Rx, it must not be doubled in order to
 834                  * make cq_ci and rq_ci aligned.
 835                  */
 836                 if (mlx5_rxq_check_vec_support(rxq_data) < 0)
 837                         attr.cq.ibv.cqe *= 2;
 838         } else if (config->cqe_comp && rxq_data->hw_timestamp) {
 839                 DRV_LOG(DEBUG,
 840                         "port %u Rx CQE compression is disabled for HW"
 841                         " timestamp",
 842                         dev->data->port_id);
 843         }
 844         tmpl->cq = mlx5_glue->cq_ex_to_cq
 845                 (mlx5_glue->dv_create_cq(priv->ctx, &attr.cq.ibv,
 846                                          &attr.cq.mlx5));
 847         if (tmpl->cq == NULL) {
 848                 DRV_LOG(ERR, "port %u Rx queue %u CQ creation failure",
 849                         dev->data->port_id, idx);
 850                 rte_errno = ENOMEM;
 851                 goto error;
 852         }
 853         DRV_LOG(DEBUG, "port %u priv->device_attr.max_qp_wr is %d",
 854                 dev->data->port_id, priv->device_attr.orig_attr.max_qp_wr);
 855         DRV_LOG(DEBUG, "port %u priv->device_attr.max_sge is %d",
 856                 dev->data->port_id, priv->device_attr.orig_attr.max_sge);
 857         attr.wq.ibv = (struct ibv_wq_init_attr){
 858                 .wq_context = NULL, /* Could be useful in the future. */
 859                 .wq_type = IBV_WQT_RQ,
 860                 /* Max number of outstanding WRs. */
 861                 .max_wr = wqe_n >> rxq_data->sges_n,
 862                 /* Max number of scatter/gather elements in a WR. */
 863                 .max_sge = 1 << rxq_data->sges_n,
 864                 .pd = priv->pd,
 865                 .cq = tmpl->cq,
 866                 .comp_mask =
 867                         IBV_WQ_FLAGS_CVLAN_STRIPPING |
 868                         0,
 869                 .create_flags = (rxq_data->vlan_strip ?
 870                                  IBV_WQ_FLAGS_CVLAN_STRIPPING :
 871                                  0),
 872         };
 873         /* By default, FCS (CRC) is stripped by hardware. */
 874         if (rxq_data->crc_present) {
 875                 attr.wq.ibv.create_flags |= IBV_WQ_FLAGS_SCATTER_FCS;
 876                 attr.wq.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS;
 877         }
 878 #ifdef HAVE_IBV_WQ_FLAG_RX_END_PADDING
 879         if (config->hw_padding) {
 880                 attr.wq.ibv.create_flags |= IBV_WQ_FLAG_RX_END_PADDING;
 881                 attr.wq.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS;
 882         }
 883 #endif
 884 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 885         attr.wq.mlx5 = (struct mlx5dv_wq_init_attr){
 886                 .comp_mask = 0,
 887         };
 888         if (mprq_en) {
 889                 struct mlx5dv_striding_rq_init_attr *mprq_attr =
 890                         &attr.wq.mlx5.striding_rq_attrs;
 891
 892                 attr.wq.mlx5.comp_mask |= MLX5DV_WQ_INIT_ATTR_MASK_STRIDING_RQ;
 893                 *mprq_attr = (struct mlx5dv_striding_rq_init_attr){
 894                         .single_stride_log_num_of_bytes = rxq_data->strd_sz_n,
 895                         .single_wqe_log_num_of_strides = rxq_data->strd_num_n,
 896                         .two_byte_shift_en = MLX5_MPRQ_TWO_BYTE_SHIFT,
 897                 };
 898         }
 899         tmpl->wq = mlx5_glue->dv_create_wq(priv->ctx, &attr.wq.ibv,
 900                                            &attr.wq.mlx5);
 901 #else
 902         tmpl->wq = mlx5_glue->create_wq(priv->ctx, &attr.wq.ibv);
 903 #endif
 904         if (tmpl->wq == NULL) {
 905                 DRV_LOG(ERR, "port %u Rx queue %u WQ creation failure",
 906                         dev->data->port_id, idx);
 907                 rte_errno = ENOMEM;
 908                 goto error;
 909         }
 910         /*
 911          * Make sure number of WRs*SGEs match expectations since a queue
 912          * cannot allocate more than "desc" buffers.
 913          */
 914         if (attr.wq.ibv.max_wr != (wqe_n >> rxq_data->sges_n) ||
 915             attr.wq.ibv.max_sge != (1u << rxq_data->sges_n)) {
 916                 DRV_LOG(ERR,
 917                         "port %u Rx queue %u requested %u*%u but got %u*%u"
 918                         " WRs*SGEs",
 919                         dev->data->port_id, idx,
 920                         wqe_n >> rxq_data->sges_n, (1 << rxq_data->sges_n),
 921                         attr.wq.ibv.max_wr, attr.wq.ibv.max_sge);
 922                 rte_errno = EINVAL;
 923                 goto error;
 924         }
 925         /* Change queue state to ready. */
 926         mod = (struct ibv_wq_attr){
 927                 .attr_mask = IBV_WQ_ATTR_STATE,
 928                 .wq_state = IBV_WQS_RDY,
 929         };
 930         ret = mlx5_glue->modify_wq(tmpl->wq, &mod);
 931         if (ret) {
 932                 DRV_LOG(ERR,
 933                         "port %u Rx queue %u WQ state to IBV_WQS_RDY failed",
 934                         dev->data->port_id, idx);
 935                 rte_errno = ret;
 936                 goto error;
 937         }
 938         obj.cq.in = tmpl->cq;
 939         obj.cq.out = &cq_info;
 940         obj.rwq.in = tmpl->wq;
 941         obj.rwq.out = &rwq;
 942         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_CQ | MLX5DV_OBJ_RWQ);
 943         if (ret) {
 944                 rte_errno = ret;
 945                 goto error;
 946         }
 947         if (cq_info.cqe_size != RTE_CACHE_LINE_SIZE) {
 948                 DRV_LOG(ERR,
 949                         "port %u wrong MLX5_CQE_SIZE environment variable"
 950                         " value: it should be set to %u",
 951                         dev->data->port_id, RTE_CACHE_LINE_SIZE);
 952                 rte_errno = EINVAL;
 953                 goto error;
 954         }
 955         /* Fill the rings. */
 956         rxq_data->wqes = rwq.buf;
 957         for (i = 0; (i != wqe_n); ++i) {
 958                 volatile struct mlx5_wqe_data_seg *scat;
 959                 uintptr_t addr;
 960                 uint32_t byte_count;
 961
 962                 if (mprq_en) {
 963                         struct mlx5_mprq_buf *buf = (*rxq_data->mprq_bufs)[i];
 964
 965                         scat = &((volatile struct mlx5_wqe_mprq *)
 966                                  rxq_data->wqes)[i].dseg;
 967                         addr = (uintptr_t)mlx5_mprq_buf_addr(buf);
 968                         byte_count = (1 << rxq_data->strd_sz_n) *
 969                                      (1 << rxq_data->strd_num_n);
 970                 } else {
 971                         struct rte_mbuf *buf = (*rxq_data->elts)[i];
 972
 973                         scat = &((volatile struct mlx5_wqe_data_seg *)
 974                                  rxq_data->wqes)[i];
 975                         addr = rte_pktmbuf_mtod(buf, uintptr_t);
 976                         byte_count = DATA_LEN(buf);
 977                 }
 978                 /* scat->addr must be able to store a pointer. */
 979                 assert(sizeof(scat->addr) >= sizeof(uintptr_t));
 980                 *scat = (struct mlx5_wqe_data_seg){
 981                         .addr = rte_cpu_to_be_64(addr),
 982                         .byte_count = rte_cpu_to_be_32(byte_count),
 983                         .lkey = mlx5_rx_addr2mr(rxq_data, addr),
 984                 };
 985         }
 986         rxq_data->rq_db = rwq.dbrec;
 987         rxq_data->cqe_n = log2above(cq_info.cqe_cnt);
 988         rxq_data->cq_ci = 0;
 989         rxq_data->consumed_strd = 0;
 990         rxq_data->rq_pi = 0;
 991         rxq_data->zip = (struct rxq_zip){
 992                 .ai = 0,
 993         };
 994         rxq_data->cq_db = cq_info.dbrec;
 995         rxq_data->cqes = (volatile struct mlx5_cqe (*)[])(uintptr_t)cq_info.buf;
 996         rxq_data->cq_uar = cq_info.cq_uar;
 997         rxq_data->cqn = cq_info.cqn;
 998         rxq_data->cq_arm_sn = 0;
 999         /* Update doorbell counter. */
1000         rxq_data->rq_ci = wqe_n >> rxq_data->sges_n;
1001         rte_wmb();
1002         *rxq_data->rq_db = rte_cpu_to_be_32(rxq_data->rq_ci);
1003         DRV_LOG(DEBUG, "port %u rxq %u updated with %p", dev->data->port_id,
1004                 idx, (void *)&tmpl);
1005         rte_atomic32_inc(&tmpl->refcnt);
1006         LIST_INSERT_HEAD(&priv->rxqsibv, tmpl, next);
1007         priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_NONE;
1008         return tmpl;
1009 error:
1010         ret = rte_errno; /* Save rte_errno before cleanup. */
1011         if (tmpl->wq)
1012                 claim_zero(mlx5_glue->destroy_wq(tmpl->wq));
1013         if (tmpl->cq)
1014                 claim_zero(mlx5_glue->destroy_cq(tmpl->cq));
1015         if (tmpl->channel)
1016                 claim_zero(mlx5_glue->destroy_comp_channel(tmpl->channel));
1017         priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_NONE;
1018         rte_errno = ret; /* Restore rte_errno. */
1019         return NULL;
1020 }
1021
1022 /**
1023  * Get an Rx queue Verbs object.
1024  *
1025  * @param dev
1026  *   Pointer to Ethernet device.
1027  * @param idx
1028  *   Queue index in DPDK Rx queue array
1029  *
1030  * @return
1031  *   The Verbs object if it exists.
1032  */
1033 struct mlx5_rxq_ibv *
1034 mlx5_rxq_ibv_get(struct rte_eth_dev *dev, uint16_t idx)
1035 {
1036         struct priv *priv = dev->data->dev_private;
1037         struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx];
1038         struct mlx5_rxq_ctrl *rxq_ctrl;
1039
1040         if (idx >= priv->rxqs_n)
1041                 return NULL;
1042         if (!rxq_data)
1043                 return NULL;
1044         rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
1045         if (rxq_ctrl->ibv) {
1046                 rte_atomic32_inc(&rxq_ctrl->ibv->refcnt);
1047         }
1048         return rxq_ctrl->ibv;
1049 }
1050
1051 /**
1052  * Release an Rx verbs queue object.
1053  *
1054  * @param rxq_ibv
1055  *   Verbs Rx queue object.
1056  *
1057  * @return
1058  *   1 while a reference on it exists, 0 when freed.
1059  */
1060 int
1061 mlx5_rxq_ibv_release(struct mlx5_rxq_ibv *rxq_ibv)
1062 {
1063         assert(rxq_ibv);
1064         assert(rxq_ibv->wq);
1065         assert(rxq_ibv->cq);
1066         if (rte_atomic32_dec_and_test(&rxq_ibv->refcnt)) {
1067                 rxq_free_elts(rxq_ibv->rxq_ctrl);
1068                 claim_zero(mlx5_glue->destroy_wq(rxq_ibv->wq));
1069                 claim_zero(mlx5_glue->destroy_cq(rxq_ibv->cq));
1070                 if (rxq_ibv->channel)
1071                         claim_zero(mlx5_glue->destroy_comp_channel
1072                                    (rxq_ibv->channel));
1073                 LIST_REMOVE(rxq_ibv, next);
1074                 rte_free(rxq_ibv);
1075                 return 0;
1076         }
1077         return 1;
1078 }
1079
1080 /**
1081  * Verify the Verbs Rx queue list is empty
1082  *
1083  * @param dev
1084  *   Pointer to Ethernet device.
1085  *
1086  * @return
1087  *   The number of object not released.
1088  */
1089 int
1090 mlx5_rxq_ibv_verify(struct rte_eth_dev *dev)
1091 {
1092         struct priv *priv = dev->data->dev_private;
1093         int ret = 0;
1094         struct mlx5_rxq_ibv *rxq_ibv;
1095
1096         LIST_FOREACH(rxq_ibv, &priv->rxqsibv, next) {
1097                 DRV_LOG(DEBUG, "port %u Verbs Rx queue %u still referenced",
1098                         dev->data->port_id, rxq_ibv->rxq_ctrl->idx);
1099                 ++ret;
1100         }
1101         return ret;
1102 }
1103
1104 /**
1105  * Return true if a single reference exists on the object.
1106  *
1107  * @param rxq_ibv
1108  *   Verbs Rx queue object.
1109  */
1110 int
1111 mlx5_rxq_ibv_releasable(struct mlx5_rxq_ibv *rxq_ibv)
1112 {
1113         assert(rxq_ibv);
1114         return (rte_atomic32_read(&rxq_ibv->refcnt) == 1);
1115 }
1116
1117 /**
1118  * Callback function to initialize mbufs for Multi-Packet RQ.
1119  */
1120 static inline void
1121 mlx5_mprq_buf_init(struct rte_mempool *mp, void *opaque_arg __rte_unused,
1122                     void *_m, unsigned int i __rte_unused)
1123 {
1124         struct mlx5_mprq_buf *buf = _m;
1125
1126         memset(_m, 0, sizeof(*buf));
1127         buf->mp = mp;
1128         rte_atomic16_set(&buf->refcnt, 1);
1129 }
1130
1131 /**
1132  * Free mempool of Multi-Packet RQ.
1133  *
1134  * @param dev
1135  *   Pointer to Ethernet device.
1136  *
1137  * @return
1138  *   0 on success, negative errno value on failure.
1139  */
1140 int
1141 mlx5_mprq_free_mp(struct rte_eth_dev *dev)
1142 {
1143         struct priv *priv = dev->data->dev_private;
1144         struct rte_mempool *mp = priv->mprq_mp;
1145         unsigned int i;
1146
1147         if (mp == NULL)
1148                 return 0;
1149         DRV_LOG(DEBUG, "port %u freeing mempool (%s) for Multi-Packet RQ",
1150                 dev->data->port_id, mp->name);
1151         /*
1152          * If a buffer in the pool has been externally attached to a mbuf and it
1153          * is still in use by application, destroying the Rx qeueue can spoil
1154          * the packet. It is unlikely to happen but if application dynamically
1155          * creates and destroys with holding Rx packets, this can happen.
1156          *
1157          * TODO: It is unavoidable for now because the mempool for Multi-Packet
1158          * RQ isn't provided by application but managed by PMD.
1159          */
1160         if (!rte_mempool_full(mp)) {
1161                 DRV_LOG(ERR,
1162                         "port %u mempool for Multi-Packet RQ is still in use",
1163                         dev->data->port_id);
1164                 rte_errno = EBUSY;
1165                 return -rte_errno;
1166         }
1167         rte_mempool_free(mp);
1168         /* Unset mempool for each Rx queue. */
1169         for (i = 0; i != priv->rxqs_n; ++i) {
1170                 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1171
1172                 if (rxq == NULL)
1173                         continue;
1174                 rxq->mprq_mp = NULL;
1175         }
1176         return 0;
1177 }
1178
1179 /**
1180  * Allocate a mempool for Multi-Packet RQ. All configured Rx queues share the
1181  * mempool. If already allocated, reuse it if there're enough elements.
1182  * Otherwise, resize it.
1183  *
1184  * @param dev
1185  *   Pointer to Ethernet device.
1186  *
1187  * @return
1188  *   0 on success, negative errno value on failure.
1189  */
1190 int
1191 mlx5_mprq_alloc_mp(struct rte_eth_dev *dev)
1192 {
1193         struct priv *priv = dev->data->dev_private;
1194         struct rte_mempool *mp = priv->mprq_mp;
1195         char name[RTE_MEMPOOL_NAMESIZE];
1196         unsigned int desc = 0;
1197         unsigned int buf_len;
1198         unsigned int obj_num;
1199         unsigned int obj_size;
1200         unsigned int strd_num_n = 0;
1201         unsigned int strd_sz_n = 0;
1202         unsigned int i;
1203
1204         if (!mlx5_mprq_enabled(dev))
1205                 return 0;
1206         /* Count the total number of descriptors configured. */
1207         for (i = 0; i != priv->rxqs_n; ++i) {
1208                 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1209
1210                 if (rxq == NULL)
1211                         continue;
1212                 desc += 1 << rxq->elts_n;
1213                 /* Get the max number of strides. */
1214                 if (strd_num_n < rxq->strd_num_n)
1215                         strd_num_n = rxq->strd_num_n;
1216                 /* Get the max size of a stride. */
1217                 if (strd_sz_n < rxq->strd_sz_n)
1218                         strd_sz_n = rxq->strd_sz_n;
1219         }
1220         assert(strd_num_n && strd_sz_n);
1221         buf_len = (1 << strd_num_n) * (1 << strd_sz_n);
1222         obj_size = buf_len + sizeof(struct mlx5_mprq_buf);
1223         /*
1224          * Received packets can be either memcpy'd or externally referenced. In
1225          * case that the packet is attached to an mbuf as an external buffer, as
1226          * it isn't possible to predict how the buffers will be queued by
1227          * application, there's no option to exactly pre-allocate needed buffers
1228          * in advance but to speculatively prepares enough buffers.
1229          *
1230          * In the data path, if this Mempool is depleted, PMD will try to memcpy
1231          * received packets to buffers provided by application (rxq->mp) until
1232          * this Mempool gets available again.
1233          */
1234         desc *= 4;
1235         obj_num = desc + MLX5_MPRQ_MP_CACHE_SZ * priv->rxqs_n;
1236         /* Check a mempool is already allocated and if it can be resued. */
1237         if (mp != NULL && mp->elt_size >= obj_size && mp->size >= obj_num) {
1238                 DRV_LOG(DEBUG, "port %u mempool %s is being reused",
1239                         dev->data->port_id, mp->name);
1240                 /* Reuse. */
1241                 goto exit;
1242         } else if (mp != NULL) {
1243                 DRV_LOG(DEBUG, "port %u mempool %s should be resized, freeing it",
1244                         dev->data->port_id, mp->name);
1245                 /*
1246                  * If failed to free, which means it may be still in use, no way
1247                  * but to keep using the existing one. On buffer underrun,
1248                  * packets will be memcpy'd instead of external buffer
1249                  * attachment.
1250                  */
1251                 if (mlx5_mprq_free_mp(dev)) {
1252                         if (mp->elt_size >= obj_size)
1253                                 goto exit;
1254                         else
1255                                 return -rte_errno;
1256                 }
1257         }
1258         snprintf(name, sizeof(name), "%s-mprq", dev->device->name);
1259         mp = rte_mempool_create(name, obj_num, obj_size, MLX5_MPRQ_MP_CACHE_SZ,
1260                                 0, NULL, NULL, mlx5_mprq_buf_init, NULL,
1261                                 dev->device->numa_node, 0);
1262         if (mp == NULL) {
1263                 DRV_LOG(ERR,
1264                         "port %u failed to allocate a mempool for"
1265                         " Multi-Packet RQ, count=%u, size=%u",
1266                         dev->data->port_id, obj_num, obj_size);
1267                 rte_errno = ENOMEM;
1268                 return -rte_errno;
1269         }
1270         priv->mprq_mp = mp;
1271 exit:
1272         /* Set mempool for each Rx queue. */
1273         for (i = 0; i != priv->rxqs_n; ++i) {
1274                 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1275
1276                 if (rxq == NULL)
1277                         continue;
1278                 rxq->mprq_mp = mp;
1279         }
1280         DRV_LOG(INFO, "port %u Multi-Packet RQ is configured",
1281                 dev->data->port_id);
1282         return 0;
1283 }
1284
1285 /**
1286  * Create a DPDK Rx queue.
1287  *
1288  * @param dev
1289  *   Pointer to Ethernet device.
1290  * @param idx
1291  *   RX queue index.
1292  * @param desc
1293  *   Number of descriptors to configure in queue.
1294  * @param socket
1295  *   NUMA socket on which memory must be allocated.
1296  *
1297  * @return
1298  *   A DPDK queue object on success, NULL otherwise and rte_errno is set.
1299  */
1300 struct mlx5_rxq_ctrl *
1301 mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1302              unsigned int socket, const struct rte_eth_rxconf *conf,
1303              struct rte_mempool *mp)
1304 {
1305         struct priv *priv = dev->data->dev_private;
1306         struct mlx5_rxq_ctrl *tmpl;
1307         unsigned int mb_len = rte_pktmbuf_data_room_size(mp);
1308         unsigned int mprq_stride_size;
1309         struct mlx5_dev_config *config = &priv->config;
1310         /*
1311          * Always allocate extra slots, even if eventually
1312          * the vector Rx will not be used.
1313          */
1314         uint16_t desc_n =
1315                 desc + config->rx_vec_en * MLX5_VPMD_DESCS_PER_LOOP;
1316         uint64_t offloads = conf->offloads |
1317                            dev->data->dev_conf.rxmode.offloads;
1318         const int mprq_en = mlx5_check_mprq_support(dev) > 0;
1319
1320         tmpl = rte_calloc_socket("RXQ", 1,
1321                                  sizeof(*tmpl) +
1322                                  desc_n * sizeof(struct rte_mbuf *),
1323                                  0, socket);
1324         if (!tmpl) {
1325                 rte_errno = ENOMEM;
1326                 return NULL;
1327         }
1328         if (mlx5_mr_btree_init(&tmpl->rxq.mr_ctrl.cache_bh,
1329                                MLX5_MR_BTREE_CACHE_N, socket)) {
1330                 /* rte_errno is already set. */
1331                 goto error;
1332         }
1333         tmpl->socket = socket;
1334         if (dev->data->dev_conf.intr_conf.rxq)
1335                 tmpl->irq = 1;
1336         /*
1337          * This Rx queue can be configured as a Multi-Packet RQ if all of the
1338          * following conditions are met:
1339          *  - MPRQ is enabled.
1340          *  - The number of descs is more than the number of strides.
1341          *  - max_rx_pkt_len plus overhead is less than the max size of a
1342          *    stride.
1343          *  Otherwise, enable Rx scatter if necessary.
1344          */
1345         assert(mb_len >= RTE_PKTMBUF_HEADROOM);
1346         mprq_stride_size =
1347                 dev->data->dev_conf.rxmode.max_rx_pkt_len +
1348                 sizeof(struct rte_mbuf_ext_shared_info) +
1349                 RTE_PKTMBUF_HEADROOM;
1350         if (mprq_en &&
1351             desc >= (1U << config->mprq.stride_num_n) &&
1352             mprq_stride_size <= (1U << config->mprq.max_stride_size_n)) {
1353                 /* TODO: Rx scatter isn't supported yet. */
1354                 tmpl->rxq.sges_n = 0;
1355                 /* Trim the number of descs needed. */
1356                 desc >>= config->mprq.stride_num_n;
1357                 tmpl->rxq.strd_num_n = config->mprq.stride_num_n;
1358                 tmpl->rxq.strd_sz_n = RTE_MAX(log2above(mprq_stride_size),
1359                                               config->mprq.min_stride_size_n);
1360                 tmpl->rxq.strd_shift_en = MLX5_MPRQ_TWO_BYTE_SHIFT;
1361                 tmpl->rxq.mprq_max_memcpy_len =
1362                         RTE_MIN(mb_len - RTE_PKTMBUF_HEADROOM,
1363                                 config->mprq.max_memcpy_len);
1364                 DRV_LOG(DEBUG,
1365                         "port %u Rx queue %u: Multi-Packet RQ is enabled"
1366                         " strd_num_n = %u, strd_sz_n = %u",
1367                         dev->data->port_id, idx,
1368                         tmpl->rxq.strd_num_n, tmpl->rxq.strd_sz_n);
1369         } else if (dev->data->dev_conf.rxmode.max_rx_pkt_len <=
1370                    (mb_len - RTE_PKTMBUF_HEADROOM)) {
1371                 tmpl->rxq.sges_n = 0;
1372         } else if (offloads & DEV_RX_OFFLOAD_SCATTER) {
1373                 unsigned int size =
1374                         RTE_PKTMBUF_HEADROOM +
1375                         dev->data->dev_conf.rxmode.max_rx_pkt_len;
1376                 unsigned int sges_n;
1377
1378                 /*
1379                  * Determine the number of SGEs needed for a full packet
1380                  * and round it to the next power of two.
1381                  */
1382                 sges_n = log2above((size / mb_len) + !!(size % mb_len));
1383                 tmpl->rxq.sges_n = sges_n;
1384                 /* Make sure rxq.sges_n did not overflow. */
1385                 size = mb_len * (1 << tmpl->rxq.sges_n);
1386                 size -= RTE_PKTMBUF_HEADROOM;
1387                 if (size < dev->data->dev_conf.rxmode.max_rx_pkt_len) {
1388                         DRV_LOG(ERR,
1389                                 "port %u too many SGEs (%u) needed to handle"
1390                                 " requested maximum packet size %u",
1391                                 dev->data->port_id,
1392                                 1 << sges_n,
1393                                 dev->data->dev_conf.rxmode.max_rx_pkt_len);
1394                         rte_errno = EOVERFLOW;
1395                         goto error;
1396                 }
1397         } else {
1398                 DRV_LOG(WARNING,
1399                         "port %u the requested maximum Rx packet size (%u) is"
1400                         " larger than a single mbuf (%u) and scattered mode has"
1401                         " not been requested",
1402                         dev->data->port_id,
1403                         dev->data->dev_conf.rxmode.max_rx_pkt_len,
1404                         mb_len - RTE_PKTMBUF_HEADROOM);
1405         }
1406         DRV_LOG(DEBUG, "port %u maximum number of segments per packet: %u",
1407                 dev->data->port_id, 1 << tmpl->rxq.sges_n);
1408         if (desc % (1 << tmpl->rxq.sges_n)) {
1409                 DRV_LOG(ERR,
1410                         "port %u number of Rx queue descriptors (%u) is not a"
1411                         " multiple of SGEs per packet (%u)",
1412                         dev->data->port_id,
1413                         desc,
1414                         1 << tmpl->rxq.sges_n);
1415                 rte_errno = EINVAL;
1416                 goto error;
1417         }
1418         /* Toggle RX checksum offload if hardware supports it. */
1419         tmpl->rxq.csum = !!(offloads & DEV_RX_OFFLOAD_CHECKSUM);
1420         tmpl->rxq.hw_timestamp = !!(offloads & DEV_RX_OFFLOAD_TIMESTAMP);
1421         /* Configure VLAN stripping. */
1422         tmpl->rxq.vlan_strip = !!(offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
1423         /* By default, FCS (CRC) is stripped by hardware. */
1424         tmpl->rxq.crc_present = 0;
1425         if (rte_eth_dev_must_keep_crc(offloads)) {
1426                 if (config->hw_fcs_strip) {
1427                         tmpl->rxq.crc_present = 1;
1428                 } else {
1429                         DRV_LOG(WARNING,
1430                                 "port %u CRC stripping has been disabled but will"
1431                                 " still be performed by hardware, make sure MLNX_OFED"
1432                                 " and firmware are up to date",
1433                                 dev->data->port_id);
1434                 }
1435         }
1436         DRV_LOG(DEBUG,
1437                 "port %u CRC stripping is %s, %u bytes will be subtracted from"
1438                 " incoming frames to hide it",
1439                 dev->data->port_id,
1440                 tmpl->rxq.crc_present ? "disabled" : "enabled",
1441                 tmpl->rxq.crc_present << 2);
1442         /* Save port ID. */
1443         tmpl->rxq.rss_hash = !!priv->rss_conf.rss_hf &&
1444                 (!!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS));
1445         tmpl->rxq.port_id = dev->data->port_id;
1446         tmpl->priv = priv;
1447         tmpl->rxq.mp = mp;
1448         tmpl->rxq.stats.idx = idx;
1449         tmpl->rxq.elts_n = log2above(desc);
1450         tmpl->rxq.elts =
1451                 (struct rte_mbuf *(*)[1 << tmpl->rxq.elts_n])(tmpl + 1);
1452         tmpl->idx = idx;
1453         rte_atomic32_inc(&tmpl->refcnt);
1454         LIST_INSERT_HEAD(&priv->rxqsctrl, tmpl, next);
1455         return tmpl;
1456 error:
1457         rte_free(tmpl);
1458         return NULL;
1459 }
1460
1461 /**
1462  * Get a Rx queue.
1463  *
1464  * @param dev
1465  *   Pointer to Ethernet device.
1466  * @param idx
1467  *   TX queue index.
1468  *
1469  * @return
1470  *   A pointer to the queue if it exists, NULL otherwise.
1471  */
1472 struct mlx5_rxq_ctrl *
1473 mlx5_rxq_get(struct rte_eth_dev *dev, uint16_t idx)
1474 {
1475         struct priv *priv = dev->data->dev_private;
1476         struct mlx5_rxq_ctrl *rxq_ctrl = NULL;
1477
1478         if ((*priv->rxqs)[idx]) {
1479                 rxq_ctrl = container_of((*priv->rxqs)[idx],
1480                                         struct mlx5_rxq_ctrl,
1481                                         rxq);
1482                 mlx5_rxq_ibv_get(dev, idx);
1483                 rte_atomic32_inc(&rxq_ctrl->refcnt);
1484         }
1485         return rxq_ctrl;
1486 }
1487
1488 /**
1489  * Release a Rx queue.
1490  *
1491  * @param dev
1492  *   Pointer to Ethernet device.
1493  * @param idx
1494  *   TX queue index.
1495  *
1496  * @return
1497  *   1 while a reference on it exists, 0 when freed.
1498  */
1499 int
1500 mlx5_rxq_release(struct rte_eth_dev *dev, uint16_t idx)
1501 {
1502         struct priv *priv = dev->data->dev_private;
1503         struct mlx5_rxq_ctrl *rxq_ctrl;
1504
1505         if (!(*priv->rxqs)[idx])
1506                 return 0;
1507         rxq_ctrl = container_of((*priv->rxqs)[idx], struct mlx5_rxq_ctrl, rxq);
1508         assert(rxq_ctrl->priv);
1509         if (rxq_ctrl->ibv && !mlx5_rxq_ibv_release(rxq_ctrl->ibv))
1510                 rxq_ctrl->ibv = NULL;
1511         if (rte_atomic32_dec_and_test(&rxq_ctrl->refcnt)) {
1512                 mlx5_mr_btree_free(&rxq_ctrl->rxq.mr_ctrl.cache_bh);
1513                 LIST_REMOVE(rxq_ctrl, next);
1514                 rte_free(rxq_ctrl);
1515                 (*priv->rxqs)[idx] = NULL;
1516                 return 0;
1517         }
1518         return 1;
1519 }
1520
1521 /**
1522  * Verify if the queue can be released.
1523  *
1524  * @param dev
1525  *   Pointer to Ethernet device.
1526  * @param idx
1527  *   TX queue index.
1528  *
1529  * @return
1530  *   1 if the queue can be released, negative errno otherwise and rte_errno is
1531  *   set.
1532  */
1533 int
1534 mlx5_rxq_releasable(struct rte_eth_dev *dev, uint16_t idx)
1535 {
1536         struct priv *priv = dev->data->dev_private;
1537         struct mlx5_rxq_ctrl *rxq_ctrl;
1538
1539         if (!(*priv->rxqs)[idx]) {
1540                 rte_errno = EINVAL;
1541                 return -rte_errno;
1542         }
1543         rxq_ctrl = container_of((*priv->rxqs)[idx], struct mlx5_rxq_ctrl, rxq);
1544         return (rte_atomic32_read(&rxq_ctrl->refcnt) == 1);
1545 }
1546
1547 /**
1548  * Verify the Rx Queue list is empty
1549  *
1550  * @param dev
1551  *   Pointer to Ethernet device.
1552  *
1553  * @return
1554  *   The number of object not released.
1555  */
1556 int
1557 mlx5_rxq_verify(struct rte_eth_dev *dev)
1558 {
1559         struct priv *priv = dev->data->dev_private;
1560         struct mlx5_rxq_ctrl *rxq_ctrl;
1561         int ret = 0;
1562
1563         LIST_FOREACH(rxq_ctrl, &priv->rxqsctrl, next) {
1564                 DRV_LOG(DEBUG, "port %u Rx Queue %u still referenced",
1565                         dev->data->port_id, rxq_ctrl->idx);
1566                 ++ret;
1567         }
1568         return ret;
1569 }
1570
1571 /**
1572  * Create an indirection table.
1573  *
1574  * @param dev
1575  *   Pointer to Ethernet device.
1576  * @param queues
1577  *   Queues entering in the indirection table.
1578  * @param queues_n
1579  *   Number of queues in the array.
1580  *
1581  * @return
1582  *   The Verbs object initialised, NULL otherwise and rte_errno is set.
1583  */
1584 struct mlx5_ind_table_ibv *
1585 mlx5_ind_table_ibv_new(struct rte_eth_dev *dev, const uint16_t *queues,
1586                        uint32_t queues_n)
1587 {
1588         struct priv *priv = dev->data->dev_private;
1589         struct mlx5_ind_table_ibv *ind_tbl;
1590         const unsigned int wq_n = rte_is_power_of_2(queues_n) ?
1591                 log2above(queues_n) :
1592                 log2above(priv->config.ind_table_max_size);
1593         struct ibv_wq *wq[1 << wq_n];
1594         unsigned int i;
1595         unsigned int j;
1596
1597         ind_tbl = rte_calloc(__func__, 1, sizeof(*ind_tbl) +
1598                              queues_n * sizeof(uint16_t), 0);
1599         if (!ind_tbl) {
1600                 rte_errno = ENOMEM;
1601                 return NULL;
1602         }
1603         for (i = 0; i != queues_n; ++i) {
1604                 struct mlx5_rxq_ctrl *rxq = mlx5_rxq_get(dev, queues[i]);
1605
1606                 if (!rxq)
1607                         goto error;
1608                 wq[i] = rxq->ibv->wq;
1609                 ind_tbl->queues[i] = queues[i];
1610         }
1611         ind_tbl->queues_n = queues_n;
1612         /* Finalise indirection table. */
1613         for (j = 0; i != (unsigned int)(1 << wq_n); ++i, ++j)
1614                 wq[i] = wq[j];
1615         ind_tbl->ind_table = mlx5_glue->create_rwq_ind_table
1616                 (priv->ctx,
1617                  &(struct ibv_rwq_ind_table_init_attr){
1618                         .log_ind_tbl_size = wq_n,
1619                         .ind_tbl = wq,
1620                         .comp_mask = 0,
1621                  });
1622         if (!ind_tbl->ind_table) {
1623                 rte_errno = errno;
1624                 goto error;
1625         }
1626         rte_atomic32_inc(&ind_tbl->refcnt);
1627         LIST_INSERT_HEAD(&priv->ind_tbls, ind_tbl, next);
1628         return ind_tbl;
1629 error:
1630         rte_free(ind_tbl);
1631         DEBUG("port %u cannot create indirection table", dev->data->port_id);
1632         return NULL;
1633 }
1634
1635 /**
1636  * Get an indirection table.
1637  *
1638  * @param dev
1639  *   Pointer to Ethernet device.
1640  * @param queues
1641  *   Queues entering in the indirection table.
1642  * @param queues_n
1643  *   Number of queues in the array.
1644  *
1645  * @return
1646  *   An indirection table if found.
1647  */
1648 struct mlx5_ind_table_ibv *
1649 mlx5_ind_table_ibv_get(struct rte_eth_dev *dev, const uint16_t *queues,
1650                        uint32_t queues_n)
1651 {
1652         struct priv *priv = dev->data->dev_private;
1653         struct mlx5_ind_table_ibv *ind_tbl;
1654
1655         LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
1656                 if ((ind_tbl->queues_n == queues_n) &&
1657                     (memcmp(ind_tbl->queues, queues,
1658                             ind_tbl->queues_n * sizeof(ind_tbl->queues[0]))
1659                      == 0))
1660                         break;
1661         }
1662         if (ind_tbl) {
1663                 unsigned int i;
1664
1665                 rte_atomic32_inc(&ind_tbl->refcnt);
1666                 for (i = 0; i != ind_tbl->queues_n; ++i)
1667                         mlx5_rxq_get(dev, ind_tbl->queues[i]);
1668         }
1669         return ind_tbl;
1670 }
1671
1672 /**
1673  * Release an indirection table.
1674  *
1675  * @param dev
1676  *   Pointer to Ethernet device.
1677  * @param ind_table
1678  *   Indirection table to release.
1679  *
1680  * @return
1681  *   1 while a reference on it exists, 0 when freed.
1682  */
1683 int
1684 mlx5_ind_table_ibv_release(struct rte_eth_dev *dev,
1685                            struct mlx5_ind_table_ibv *ind_tbl)
1686 {
1687         unsigned int i;
1688
1689         if (rte_atomic32_dec_and_test(&ind_tbl->refcnt))
1690                 claim_zero(mlx5_glue->destroy_rwq_ind_table
1691                            (ind_tbl->ind_table));
1692         for (i = 0; i != ind_tbl->queues_n; ++i)
1693                 claim_nonzero(mlx5_rxq_release(dev, ind_tbl->queues[i]));
1694         if (!rte_atomic32_read(&ind_tbl->refcnt)) {
1695                 LIST_REMOVE(ind_tbl, next);
1696                 rte_free(ind_tbl);
1697                 return 0;
1698         }
1699         return 1;
1700 }
1701
1702 /**
1703  * Verify the Rx Queue list is empty
1704  *
1705  * @param dev
1706  *   Pointer to Ethernet device.
1707  *
1708  * @return
1709  *   The number of object not released.
1710  */
1711 int
1712 mlx5_ind_table_ibv_verify(struct rte_eth_dev *dev)
1713 {
1714         struct priv *priv = dev->data->dev_private;
1715         struct mlx5_ind_table_ibv *ind_tbl;
1716         int ret = 0;
1717
1718         LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
1719                 DRV_LOG(DEBUG,
1720                         "port %u Verbs indirection table %p still referenced",
1721                         dev->data->port_id, (void *)ind_tbl);
1722                 ++ret;
1723         }
1724         return ret;
1725 }
1726
1727 /**
1728  * Create an Rx Hash queue.
1729  *
1730  * @param dev
1731  *   Pointer to Ethernet device.
1732  * @param rss_key
1733  *   RSS key for the Rx hash queue.
1734  * @param rss_key_len
1735  *   RSS key length.
1736  * @param hash_fields
1737  *   Verbs protocol hash field to make the RSS on.
1738  * @param queues
1739  *   Queues entering in hash queue. In case of empty hash_fields only the
1740  *   first queue index will be taken for the indirection table.
1741  * @param queues_n
1742  *   Number of queues.
1743  *
1744  * @return
1745  *   The Verbs object initialised, NULL otherwise and rte_errno is set.
1746  */
1747 struct mlx5_hrxq *
1748 mlx5_hrxq_new(struct rte_eth_dev *dev,
1749               const uint8_t *rss_key, uint32_t rss_key_len,
1750               uint64_t hash_fields,
1751               const uint16_t *queues, uint32_t queues_n)
1752 {
1753         struct priv *priv = dev->data->dev_private;
1754         struct mlx5_hrxq *hrxq;
1755         struct mlx5_ind_table_ibv *ind_tbl;
1756         struct ibv_qp *qp;
1757         int err;
1758
1759         queues_n = hash_fields ? queues_n : 1;
1760         ind_tbl = mlx5_ind_table_ibv_get(dev, queues, queues_n);
1761         if (!ind_tbl)
1762                 ind_tbl = mlx5_ind_table_ibv_new(dev, queues, queues_n);
1763         if (!ind_tbl) {
1764                 rte_errno = ENOMEM;
1765                 return NULL;
1766         }
1767         if (!rss_key_len) {
1768                 rss_key_len = MLX5_RSS_HASH_KEY_LEN;
1769                 rss_key = rss_hash_default_key;
1770         }
1771 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1772         qp = mlx5_glue->dv_create_qp
1773                 (priv->ctx,
1774                  &(struct ibv_qp_init_attr_ex){
1775                         .qp_type = IBV_QPT_RAW_PACKET,
1776                         .comp_mask =
1777                                 IBV_QP_INIT_ATTR_PD |
1778                                 IBV_QP_INIT_ATTR_IND_TABLE |
1779                                 IBV_QP_INIT_ATTR_RX_HASH,
1780                         .rx_hash_conf = (struct ibv_rx_hash_conf){
1781                                 .rx_hash_function = IBV_RX_HASH_FUNC_TOEPLITZ,
1782                                 .rx_hash_key_len = rss_key_len ? rss_key_len :
1783                                                    MLX5_RSS_HASH_KEY_LEN,
1784                                 .rx_hash_key = rss_key ?
1785                                                (void *)(uintptr_t)rss_key :
1786                                                rss_hash_default_key,
1787                                 .rx_hash_fields_mask = hash_fields,
1788                         },
1789                         .rwq_ind_tbl = ind_tbl->ind_table,
1790                         .pd = priv->pd,
1791                  },
1792                  &(struct mlx5dv_qp_init_attr){
1793                         .comp_mask = (hash_fields & IBV_RX_HASH_INNER) ?
1794                                  MLX5DV_QP_INIT_ATTR_MASK_QP_CREATE_FLAGS :
1795                                  0,
1796                         .create_flags = MLX5DV_QP_CREATE_TUNNEL_OFFLOADS,
1797                  });
1798 #else
1799         qp = mlx5_glue->create_qp_ex
1800                 (priv->ctx,
1801                  &(struct ibv_qp_init_attr_ex){
1802                         .qp_type = IBV_QPT_RAW_PACKET,
1803                         .comp_mask =
1804                                 IBV_QP_INIT_ATTR_PD |
1805                                 IBV_QP_INIT_ATTR_IND_TABLE |
1806                                 IBV_QP_INIT_ATTR_RX_HASH,
1807                         .rx_hash_conf = (struct ibv_rx_hash_conf){
1808                                 .rx_hash_function = IBV_RX_HASH_FUNC_TOEPLITZ,
1809                                 .rx_hash_key_len = rss_key_len ? rss_key_len :
1810                                                    MLX5_RSS_HASH_KEY_LEN,
1811                                 .rx_hash_key = rss_key ?
1812                                                (void *)(uintptr_t)rss_key :
1813                                                rss_hash_default_key,
1814                                 .rx_hash_fields_mask = hash_fields,
1815                         },
1816                         .rwq_ind_tbl = ind_tbl->ind_table,
1817                         .pd = priv->pd,
1818                  });
1819 #endif
1820         if (!qp) {
1821                 rte_errno = errno;
1822                 goto error;
1823         }
1824         hrxq = rte_calloc(__func__, 1, sizeof(*hrxq) + rss_key_len, 0);
1825         if (!hrxq)
1826                 goto error;
1827         hrxq->ind_table = ind_tbl;
1828         hrxq->qp = qp;
1829         hrxq->rss_key_len = rss_key_len;
1830         hrxq->hash_fields = hash_fields;
1831         memcpy(hrxq->rss_key, rss_key, rss_key_len);
1832         rte_atomic32_inc(&hrxq->refcnt);
1833         LIST_INSERT_HEAD(&priv->hrxqs, hrxq, next);
1834         return hrxq;
1835 error:
1836         err = rte_errno; /* Save rte_errno before cleanup. */
1837         mlx5_ind_table_ibv_release(dev, ind_tbl);
1838         if (qp)
1839                 claim_zero(mlx5_glue->destroy_qp(qp));
1840         rte_errno = err; /* Restore rte_errno. */
1841         return NULL;
1842 }
1843
1844 /**
1845  * Get an Rx Hash queue.
1846  *
1847  * @param dev
1848  *   Pointer to Ethernet device.
1849  * @param rss_conf
1850  *   RSS configuration for the Rx hash queue.
1851  * @param queues
1852  *   Queues entering in hash queue. In case of empty hash_fields only the
1853  *   first queue index will be taken for the indirection table.
1854  * @param queues_n
1855  *   Number of queues.
1856  *
1857  * @return
1858  *   An hash Rx queue on success.
1859  */
1860 struct mlx5_hrxq *
1861 mlx5_hrxq_get(struct rte_eth_dev *dev,
1862               const uint8_t *rss_key, uint32_t rss_key_len,
1863               uint64_t hash_fields,
1864               const uint16_t *queues, uint32_t queues_n)
1865 {
1866         struct priv *priv = dev->data->dev_private;
1867         struct mlx5_hrxq *hrxq;
1868
1869         queues_n = hash_fields ? queues_n : 1;
1870         LIST_FOREACH(hrxq, &priv->hrxqs, next) {
1871                 struct mlx5_ind_table_ibv *ind_tbl;
1872
1873                 if (hrxq->rss_key_len != rss_key_len)
1874                         continue;
1875                 if (memcmp(hrxq->rss_key, rss_key, rss_key_len))
1876                         continue;
1877                 if (hrxq->hash_fields != hash_fields)
1878                         continue;
1879                 ind_tbl = mlx5_ind_table_ibv_get(dev, queues, queues_n);
1880                 if (!ind_tbl)
1881                         continue;
1882                 if (ind_tbl != hrxq->ind_table) {
1883                         mlx5_ind_table_ibv_release(dev, ind_tbl);
1884                         continue;
1885                 }
1886                 rte_atomic32_inc(&hrxq->refcnt);
1887                 return hrxq;
1888         }
1889         return NULL;
1890 }
1891
1892 /**
1893  * Release the hash Rx queue.
1894  *
1895  * @param dev
1896  *   Pointer to Ethernet device.
1897  * @param hrxq
1898  *   Pointer to Hash Rx queue to release.
1899  *
1900  * @return
1901  *   1 while a reference on it exists, 0 when freed.
1902  */
1903 int
1904 mlx5_hrxq_release(struct rte_eth_dev *dev, struct mlx5_hrxq *hrxq)
1905 {
1906         if (rte_atomic32_dec_and_test(&hrxq->refcnt)) {
1907                 claim_zero(mlx5_glue->destroy_qp(hrxq->qp));
1908                 mlx5_ind_table_ibv_release(dev, hrxq->ind_table);
1909                 LIST_REMOVE(hrxq, next);
1910                 rte_free(hrxq);
1911                 return 0;
1912         }
1913         claim_nonzero(mlx5_ind_table_ibv_release(dev, hrxq->ind_table));
1914         return 1;
1915 }
1916
1917 /**
1918  * Verify the Rx Queue list is empty
1919  *
1920  * @param dev
1921  *   Pointer to Ethernet device.
1922  *
1923  * @return
1924  *   The number of object not released.
1925  */
1926 int
1927 mlx5_hrxq_ibv_verify(struct rte_eth_dev *dev)
1928 {
1929         struct priv *priv = dev->data->dev_private;
1930         struct mlx5_hrxq *hrxq;
1931         int ret = 0;
1932
1933         LIST_FOREACH(hrxq, &priv->hrxqs, next) {
1934                 DRV_LOG(DEBUG,
1935                         "port %u Verbs hash Rx queue %p still referenced",
1936                         dev->data->port_id, (void *)hrxq);
1937                 ++ret;
1938         }
1939         return ret;
1940 }
1941
1942 /**
1943  * Create a drop Rx queue Verbs object.
1944  *
1945  * @param dev
1946  *   Pointer to Ethernet device.
1947  *
1948  * @return
1949  *   The Verbs object initialised, NULL otherwise and rte_errno is set.
1950  */
1951 struct mlx5_rxq_ibv *
1952 mlx5_rxq_ibv_drop_new(struct rte_eth_dev *dev)
1953 {
1954         struct priv *priv = dev->data->dev_private;
1955         struct ibv_cq *cq;
1956         struct ibv_wq *wq = NULL;
1957         struct mlx5_rxq_ibv *rxq;
1958
1959         if (priv->drop_queue.rxq)
1960                 return priv->drop_queue.rxq;
1961         cq = mlx5_glue->create_cq(priv->ctx, 1, NULL, NULL, 0);
1962         if (!cq) {
1963                 DEBUG("port %u cannot allocate CQ for drop queue",
1964                       dev->data->port_id);
1965                 rte_errno = errno;
1966                 goto error;
1967         }
1968         wq = mlx5_glue->create_wq(priv->ctx,
1969                  &(struct ibv_wq_init_attr){
1970                         .wq_type = IBV_WQT_RQ,
1971                         .max_wr = 1,
1972                         .max_sge = 1,
1973                         .pd = priv->pd,
1974                         .cq = cq,
1975                  });
1976         if (!wq) {
1977                 DEBUG("port %u cannot allocate WQ for drop queue",
1978                       dev->data->port_id);
1979                 rte_errno = errno;
1980                 goto error;
1981         }
1982         rxq = rte_calloc(__func__, 1, sizeof(*rxq), 0);
1983         if (!rxq) {
1984                 DEBUG("port %u cannot allocate drop Rx queue memory",
1985                       dev->data->port_id);
1986                 rte_errno = ENOMEM;
1987                 goto error;
1988         }
1989         rxq->cq = cq;
1990         rxq->wq = wq;
1991         priv->drop_queue.rxq = rxq;
1992         return rxq;
1993 error:
1994         if (wq)
1995                 claim_zero(mlx5_glue->destroy_wq(wq));
1996         if (cq)
1997                 claim_zero(mlx5_glue->destroy_cq(cq));
1998         return NULL;
1999 }
2000
2001 /**
2002  * Release a drop Rx queue Verbs object.
2003  *
2004  * @param dev
2005  *   Pointer to Ethernet device.
2006  *
2007  * @return
2008  *   The Verbs object initialised, NULL otherwise and rte_errno is set.
2009  */
2010 void
2011 mlx5_rxq_ibv_drop_release(struct rte_eth_dev *dev)
2012 {
2013         struct priv *priv = dev->data->dev_private;
2014         struct mlx5_rxq_ibv *rxq = priv->drop_queue.rxq;
2015
2016         if (rxq->wq)
2017                 claim_zero(mlx5_glue->destroy_wq(rxq->wq));
2018         if (rxq->cq)
2019                 claim_zero(mlx5_glue->destroy_cq(rxq->cq));
2020         rte_free(rxq);
2021         priv->drop_queue.rxq = NULL;
2022 }
2023
2024 /**
2025  * Create a drop indirection table.
2026  *
2027  * @param dev
2028  *   Pointer to Ethernet device.
2029  *
2030  * @return
2031  *   The Verbs object initialised, NULL otherwise and rte_errno is set.
2032  */
2033 struct mlx5_ind_table_ibv *
2034 mlx5_ind_table_ibv_drop_new(struct rte_eth_dev *dev)
2035 {
2036         struct priv *priv = dev->data->dev_private;
2037         struct mlx5_ind_table_ibv *ind_tbl;
2038         struct mlx5_rxq_ibv *rxq;
2039         struct mlx5_ind_table_ibv tmpl;
2040
2041         rxq = mlx5_rxq_ibv_drop_new(dev);
2042         if (!rxq)
2043                 return NULL;
2044         tmpl.ind_table = mlx5_glue->create_rwq_ind_table
2045                 (priv->ctx,
2046                  &(struct ibv_rwq_ind_table_init_attr){
2047                         .log_ind_tbl_size = 0,
2048                         .ind_tbl = &rxq->wq,
2049                         .comp_mask = 0,
2050                  });
2051         if (!tmpl.ind_table) {
2052                 DEBUG("port %u cannot allocate indirection table for drop"
2053                       " queue",
2054                       dev->data->port_id);
2055                 rte_errno = errno;
2056                 goto error;
2057         }
2058         ind_tbl = rte_calloc(__func__, 1, sizeof(*ind_tbl), 0);
2059         if (!ind_tbl) {
2060                 rte_errno = ENOMEM;
2061                 goto error;
2062         }
2063         ind_tbl->ind_table = tmpl.ind_table;
2064         return ind_tbl;
2065 error:
2066         mlx5_rxq_ibv_drop_release(dev);
2067         return NULL;
2068 }
2069
2070 /**
2071  * Release a drop indirection table.
2072  *
2073  * @param dev
2074  *   Pointer to Ethernet device.
2075  */
2076 void
2077 mlx5_ind_table_ibv_drop_release(struct rte_eth_dev *dev)
2078 {
2079         struct priv *priv = dev->data->dev_private;
2080         struct mlx5_ind_table_ibv *ind_tbl = priv->drop_queue.hrxq->ind_table;
2081
2082         claim_zero(mlx5_glue->destroy_rwq_ind_table(ind_tbl->ind_table));
2083         mlx5_rxq_ibv_drop_release(dev);
2084         rte_free(ind_tbl);
2085         priv->drop_queue.hrxq->ind_table = NULL;
2086 }
2087
2088 /**
2089  * Create a drop Rx Hash queue.
2090  *
2091  * @param dev
2092  *   Pointer to Ethernet device.
2093  *
2094  * @return
2095  *   The Verbs object initialised, NULL otherwise and rte_errno is set.
2096  */
2097 struct mlx5_hrxq *
2098 mlx5_hrxq_drop_new(struct rte_eth_dev *dev)
2099 {
2100         struct priv *priv = dev->data->dev_private;
2101         struct mlx5_ind_table_ibv *ind_tbl;
2102         struct ibv_qp *qp;
2103         struct mlx5_hrxq *hrxq;
2104
2105         if (priv->drop_queue.hrxq) {
2106                 rte_atomic32_inc(&priv->drop_queue.hrxq->refcnt);
2107                 return priv->drop_queue.hrxq;
2108         }
2109         ind_tbl = mlx5_ind_table_ibv_drop_new(dev);
2110         if (!ind_tbl)
2111                 return NULL;
2112         qp = mlx5_glue->create_qp_ex(priv->ctx,
2113                  &(struct ibv_qp_init_attr_ex){
2114                         .qp_type = IBV_QPT_RAW_PACKET,
2115                         .comp_mask =
2116                                 IBV_QP_INIT_ATTR_PD |
2117                                 IBV_QP_INIT_ATTR_IND_TABLE |
2118                                 IBV_QP_INIT_ATTR_RX_HASH,
2119                         .rx_hash_conf = (struct ibv_rx_hash_conf){
2120                                 .rx_hash_function =
2121                                         IBV_RX_HASH_FUNC_TOEPLITZ,
2122                                 .rx_hash_key_len = MLX5_RSS_HASH_KEY_LEN,
2123                                 .rx_hash_key = rss_hash_default_key,
2124                                 .rx_hash_fields_mask = 0,
2125                                 },
2126                         .rwq_ind_tbl = ind_tbl->ind_table,
2127                         .pd = priv->pd
2128                  });
2129         if (!qp) {
2130                 DEBUG("port %u cannot allocate QP for drop queue",
2131                       dev->data->port_id);
2132                 rte_errno = errno;
2133                 goto error;
2134         }
2135         hrxq = rte_calloc(__func__, 1, sizeof(*hrxq), 0);
2136         if (!hrxq) {
2137                 DRV_LOG(WARNING,
2138                         "port %u cannot allocate memory for drop queue",
2139                         dev->data->port_id);
2140                 rte_errno = ENOMEM;
2141                 goto error;
2142         }
2143         hrxq->ind_table = ind_tbl;
2144         hrxq->qp = qp;
2145         priv->drop_queue.hrxq = hrxq;
2146         rte_atomic32_set(&hrxq->refcnt, 1);
2147         return hrxq;
2148 error:
2149         if (ind_tbl)
2150                 mlx5_ind_table_ibv_drop_release(dev);
2151         return NULL;
2152 }
2153
2154 /**
2155  * Release a drop hash Rx queue.
2156  *
2157  * @param dev
2158  *   Pointer to Ethernet device.
2159  */
2160 void
2161 mlx5_hrxq_drop_release(struct rte_eth_dev *dev)
2162 {
2163         struct priv *priv = dev->data->dev_private;
2164         struct mlx5_hrxq *hrxq = priv->drop_queue.hrxq;
2165
2166         if (rte_atomic32_dec_and_test(&hrxq->refcnt)) {
2167                 claim_zero(mlx5_glue->destroy_qp(hrxq->qp));
2168                 mlx5_ind_table_ibv_drop_release(dev);
2169                 rte_free(hrxq);
2170                 priv->drop_queue.hrxq = NULL;
2171         }
2172 }