net/mlx5: fix running without Rx queue
[dpdk.git] / drivers / net / mlx5 / mlx5_trigger.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright 2015 6WIND S.A.
3  * Copyright 2015 Mellanox Technologies, Ltd
4  */
5
6 #include <unistd.h>
7
8 #include <rte_ether.h>
9 #include <rte_ethdev_driver.h>
10 #include <rte_interrupts.h>
11 #include <rte_alarm.h>
12
13 #include "mlx5.h"
14 #include "mlx5_rxtx.h"
15 #include "mlx5_utils.h"
16 #include "rte_pmd_mlx5.h"
17
18 /**
19  * Stop traffic on Tx queues.
20  *
21  * @param dev
22  *   Pointer to Ethernet device structure.
23  */
24 static void
25 mlx5_txq_stop(struct rte_eth_dev *dev)
26 {
27         struct mlx5_priv *priv = dev->data->dev_private;
28         unsigned int i;
29
30         for (i = 0; i != priv->txqs_n; ++i)
31                 mlx5_txq_release(dev, i);
32 }
33
34 /**
35  * Start traffic on Tx queues.
36  *
37  * @param dev
38  *   Pointer to Ethernet device structure.
39  *
40  * @return
41  *   0 on success, a negative errno value otherwise and rte_errno is set.
42  */
43 static int
44 mlx5_txq_start(struct rte_eth_dev *dev)
45 {
46         struct mlx5_priv *priv = dev->data->dev_private;
47         unsigned int i;
48         int ret;
49
50         for (i = 0; i != priv->txqs_n; ++i) {
51                 struct mlx5_txq_ctrl *txq_ctrl = mlx5_txq_get(dev, i);
52
53                 if (!txq_ctrl)
54                         continue;
55                 if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
56                         txq_ctrl->obj = mlx5_txq_obj_new
57                                 (dev, i, MLX5_TXQ_OBJ_TYPE_DEVX_HAIRPIN);
58                 } else {
59                         txq_alloc_elts(txq_ctrl);
60                         txq_ctrl->obj = mlx5_txq_obj_new
61                                 (dev, i, MLX5_TXQ_OBJ_TYPE_IBV);
62                 }
63                 if (!txq_ctrl->obj) {
64                         rte_errno = ENOMEM;
65                         goto error;
66                 }
67         }
68         return 0;
69 error:
70         ret = rte_errno; /* Save rte_errno before cleanup. */
71         do {
72                 mlx5_txq_release(dev, i);
73         } while (i-- != 0);
74         rte_errno = ret; /* Restore rte_errno. */
75         return -rte_errno;
76 }
77
78 /**
79  * Stop traffic on Rx queues.
80  *
81  * @param dev
82  *   Pointer to Ethernet device structure.
83  */
84 static void
85 mlx5_rxq_stop(struct rte_eth_dev *dev)
86 {
87         struct mlx5_priv *priv = dev->data->dev_private;
88         unsigned int i;
89
90         for (i = 0; i != priv->rxqs_n; ++i)
91                 mlx5_rxq_release(dev, i);
92 }
93
94 /**
95  * Start traffic on Rx queues.
96  *
97  * @param dev
98  *   Pointer to Ethernet device structure.
99  *
100  * @return
101  *   0 on success, a negative errno value otherwise and rte_errno is set.
102  */
103 static int
104 mlx5_rxq_start(struct rte_eth_dev *dev)
105 {
106         struct mlx5_priv *priv = dev->data->dev_private;
107         unsigned int i;
108         int ret = 0;
109         enum mlx5_rxq_obj_type obj_type = MLX5_RXQ_OBJ_TYPE_IBV;
110         struct mlx5_rxq_data *rxq = NULL;
111
112         for (i = 0; i < priv->rxqs_n; ++i) {
113                 rxq = (*priv->rxqs)[i];
114
115                 if (rxq && rxq->lro) {
116                         obj_type =  MLX5_RXQ_OBJ_TYPE_DEVX_RQ;
117                         break;
118                 }
119         }
120         /* Allocate/reuse/resize mempool for Multi-Packet RQ. */
121         if (mlx5_mprq_alloc_mp(dev)) {
122                 /* Should not release Rx queues but return immediately. */
123                 return -rte_errno;
124         }
125         for (i = 0; i != priv->rxqs_n; ++i) {
126                 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_get(dev, i);
127                 struct rte_mempool *mp;
128
129                 if (!rxq_ctrl)
130                         continue;
131                 if (rxq_ctrl->type == MLX5_RXQ_TYPE_HAIRPIN) {
132                         rxq_ctrl->obj = mlx5_rxq_obj_new
133                                 (dev, i, MLX5_RXQ_OBJ_TYPE_DEVX_HAIRPIN);
134                         if (!rxq_ctrl->obj)
135                                 goto error;
136                         continue;
137                 }
138                 /* Pre-register Rx mempool. */
139                 mp = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
140                      rxq_ctrl->rxq.mprq_mp : rxq_ctrl->rxq.mp;
141                 DRV_LOG(DEBUG,
142                         "port %u Rx queue %u registering"
143                         " mp %s having %u chunks",
144                         dev->data->port_id, rxq_ctrl->rxq.idx,
145                         mp->name, mp->nb_mem_chunks);
146                 mlx5_mr_update_mp(dev, &rxq_ctrl->rxq.mr_ctrl, mp);
147                 ret = rxq_alloc_elts(rxq_ctrl);
148                 if (ret)
149                         goto error;
150                 rxq_ctrl->obj = mlx5_rxq_obj_new(dev, i, obj_type);
151                 if (!rxq_ctrl->obj)
152                         goto error;
153                 if (obj_type == MLX5_RXQ_OBJ_TYPE_IBV)
154                         rxq_ctrl->wqn = rxq_ctrl->obj->wq->wq_num;
155                 else if (obj_type == MLX5_RXQ_OBJ_TYPE_DEVX_RQ)
156                         rxq_ctrl->wqn = rxq_ctrl->obj->rq->id;
157         }
158         return 0;
159 error:
160         ret = rte_errno; /* Save rte_errno before cleanup. */
161         do {
162                 mlx5_rxq_release(dev, i);
163         } while (i-- != 0);
164         rte_errno = ret; /* Restore rte_errno. */
165         return -rte_errno;
166 }
167
168 /**
169  * Binds Tx queues to Rx queues for hairpin.
170  *
171  * Binds Tx queues to the target Rx queues.
172  *
173  * @param dev
174  *   Pointer to Ethernet device structure.
175  *
176  * @return
177  *   0 on success, a negative errno value otherwise and rte_errno is set.
178  */
179 static int
180 mlx5_hairpin_bind(struct rte_eth_dev *dev)
181 {
182         struct mlx5_priv *priv = dev->data->dev_private;
183         struct mlx5_devx_modify_sq_attr sq_attr = { 0 };
184         struct mlx5_devx_modify_rq_attr rq_attr = { 0 };
185         struct mlx5_txq_ctrl *txq_ctrl;
186         struct mlx5_rxq_ctrl *rxq_ctrl;
187         struct mlx5_devx_obj *sq;
188         struct mlx5_devx_obj *rq;
189         unsigned int i;
190         int ret = 0;
191
192         for (i = 0; i != priv->txqs_n; ++i) {
193                 txq_ctrl = mlx5_txq_get(dev, i);
194                 if (!txq_ctrl)
195                         continue;
196                 if (txq_ctrl->type != MLX5_TXQ_TYPE_HAIRPIN) {
197                         mlx5_txq_release(dev, i);
198                         continue;
199                 }
200                 if (!txq_ctrl->obj) {
201                         rte_errno = ENOMEM;
202                         DRV_LOG(ERR, "port %u no txq object found: %d",
203                                 dev->data->port_id, i);
204                         mlx5_txq_release(dev, i);
205                         return -rte_errno;
206                 }
207                 sq = txq_ctrl->obj->sq;
208                 rxq_ctrl = mlx5_rxq_get(dev,
209                                         txq_ctrl->hairpin_conf.peers[0].queue);
210                 if (!rxq_ctrl) {
211                         mlx5_txq_release(dev, i);
212                         rte_errno = EINVAL;
213                         DRV_LOG(ERR, "port %u no rxq object found: %d",
214                                 dev->data->port_id,
215                                 txq_ctrl->hairpin_conf.peers[0].queue);
216                         return -rte_errno;
217                 }
218                 if (rxq_ctrl->type != MLX5_RXQ_TYPE_HAIRPIN ||
219                     rxq_ctrl->hairpin_conf.peers[0].queue != i) {
220                         rte_errno = ENOMEM;
221                         DRV_LOG(ERR, "port %u Tx queue %d can't be binded to "
222                                 "Rx queue %d", dev->data->port_id,
223                                 i, txq_ctrl->hairpin_conf.peers[0].queue);
224                         goto error;
225                 }
226                 rq = rxq_ctrl->obj->rq;
227                 if (!rq) {
228                         rte_errno = ENOMEM;
229                         DRV_LOG(ERR, "port %u hairpin no matching rxq: %d",
230                                 dev->data->port_id,
231                                 txq_ctrl->hairpin_conf.peers[0].queue);
232                         goto error;
233                 }
234                 sq_attr.state = MLX5_SQC_STATE_RDY;
235                 sq_attr.sq_state = MLX5_SQC_STATE_RST;
236                 sq_attr.hairpin_peer_rq = rq->id;
237                 sq_attr.hairpin_peer_vhca = priv->config.hca_attr.vhca_id;
238                 ret = mlx5_devx_cmd_modify_sq(sq, &sq_attr);
239                 if (ret)
240                         goto error;
241                 rq_attr.state = MLX5_SQC_STATE_RDY;
242                 rq_attr.rq_state = MLX5_SQC_STATE_RST;
243                 rq_attr.hairpin_peer_sq = sq->id;
244                 rq_attr.hairpin_peer_vhca = priv->config.hca_attr.vhca_id;
245                 ret = mlx5_devx_cmd_modify_rq(rq, &rq_attr);
246                 if (ret)
247                         goto error;
248                 mlx5_txq_release(dev, i);
249                 mlx5_rxq_release(dev, txq_ctrl->hairpin_conf.peers[0].queue);
250         }
251         return 0;
252 error:
253         mlx5_txq_release(dev, i);
254         mlx5_rxq_release(dev, txq_ctrl->hairpin_conf.peers[0].queue);
255         return -rte_errno;
256 }
257
258 /**
259  * DPDK callback to start the device.
260  *
261  * Simulate device start by attaching all configured flows.
262  *
263  * @param dev
264  *   Pointer to Ethernet device structure.
265  *
266  * @return
267  *   0 on success, a negative errno value otherwise and rte_errno is set.
268  */
269 int
270 mlx5_dev_start(struct rte_eth_dev *dev)
271 {
272         struct mlx5_priv *priv = dev->data->dev_private;
273         int ret;
274         int fine_inline;
275
276         DRV_LOG(DEBUG, "port %u starting device", dev->data->port_id);
277         fine_inline = rte_mbuf_dynflag_lookup
278                 (RTE_PMD_MLX5_FINE_GRANULARITY_INLINE, NULL);
279         if (fine_inline > 0)
280                 rte_net_mlx5_dynf_inline_mask = 1UL << fine_inline;
281         else
282                 rte_net_mlx5_dynf_inline_mask = 0;
283         if (dev->data->nb_rx_queues > 0) {
284                 ret = mlx5_dev_configure_rss_reta(dev);
285                 if (ret) {
286                         DRV_LOG(ERR, "port %u reta config failed: %s",
287                                 dev->data->port_id, strerror(rte_errno));
288                         return -rte_errno;
289                 }
290         }
291         ret = mlx5_txq_start(dev);
292         if (ret) {
293                 DRV_LOG(ERR, "port %u Tx queue allocation failed: %s",
294                         dev->data->port_id, strerror(rte_errno));
295                 return -rte_errno;
296         }
297         ret = mlx5_rxq_start(dev);
298         if (ret) {
299                 DRV_LOG(ERR, "port %u Rx queue allocation failed: %s",
300                         dev->data->port_id, strerror(rte_errno));
301                 mlx5_txq_stop(dev);
302                 return -rte_errno;
303         }
304         ret = mlx5_hairpin_bind(dev);
305         if (ret) {
306                 DRV_LOG(ERR, "port %u hairpin binding failed: %s",
307                         dev->data->port_id, strerror(rte_errno));
308                 mlx5_txq_stop(dev);
309                 return -rte_errno;
310         }
311         dev->data->dev_started = 1;
312         ret = mlx5_rx_intr_vec_enable(dev);
313         if (ret) {
314                 DRV_LOG(ERR, "port %u Rx interrupt vector creation failed",
315                         dev->data->port_id);
316                 goto error;
317         }
318         mlx5_stats_init(dev);
319         ret = mlx5_traffic_enable(dev);
320         if (ret) {
321                 DRV_LOG(DEBUG, "port %u failed to set defaults flows",
322                         dev->data->port_id);
323                 goto error;
324         }
325         ret = mlx5_flow_start(dev, &priv->flows);
326         if (ret) {
327                 DRV_LOG(DEBUG, "port %u failed to set flows",
328                         dev->data->port_id);
329                 goto error;
330         }
331         rte_wmb();
332         dev->tx_pkt_burst = mlx5_select_tx_function(dev);
333         dev->rx_pkt_burst = mlx5_select_rx_function(dev);
334         /* Enable datapath on secondary process. */
335         mlx5_mp_req_start_rxtx(dev);
336         mlx5_dev_interrupt_handler_install(dev);
337         return 0;
338 error:
339         ret = rte_errno; /* Save rte_errno before cleanup. */
340         /* Rollback. */
341         dev->data->dev_started = 0;
342         mlx5_flow_stop(dev, &priv->flows);
343         mlx5_traffic_disable(dev);
344         mlx5_txq_stop(dev);
345         mlx5_rxq_stop(dev);
346         rte_errno = ret; /* Restore rte_errno. */
347         return -rte_errno;
348 }
349
350 /**
351  * DPDK callback to stop the device.
352  *
353  * Simulate device stop by detaching all configured flows.
354  *
355  * @param dev
356  *   Pointer to Ethernet device structure.
357  */
358 void
359 mlx5_dev_stop(struct rte_eth_dev *dev)
360 {
361         struct mlx5_priv *priv = dev->data->dev_private;
362
363         dev->data->dev_started = 0;
364         /* Prevent crashes when queues are still in use. */
365         dev->rx_pkt_burst = removed_rx_burst;
366         dev->tx_pkt_burst = removed_tx_burst;
367         rte_wmb();
368         /* Disable datapath on secondary process. */
369         mlx5_mp_req_stop_rxtx(dev);
370         usleep(1000 * priv->rxqs_n);
371         DRV_LOG(DEBUG, "port %u stopping device", dev->data->port_id);
372         mlx5_flow_stop(dev, &priv->flows);
373         mlx5_traffic_disable(dev);
374         mlx5_rx_intr_vec_disable(dev);
375         mlx5_dev_interrupt_handler_uninstall(dev);
376         mlx5_txq_stop(dev);
377         mlx5_rxq_stop(dev);
378 }
379
380 /**
381  * Enable traffic flows configured by control plane
382  *
383  * @param dev
384  *   Pointer to Ethernet device private data.
385  * @param dev
386  *   Pointer to Ethernet device structure.
387  *
388  * @return
389  *   0 on success, a negative errno value otherwise and rte_errno is set.
390  */
391 int
392 mlx5_traffic_enable(struct rte_eth_dev *dev)
393 {
394         struct mlx5_priv *priv = dev->data->dev_private;
395         struct rte_flow_item_eth bcast = {
396                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
397         };
398         struct rte_flow_item_eth ipv6_multi_spec = {
399                 .dst.addr_bytes = "\x33\x33\x00\x00\x00\x00",
400         };
401         struct rte_flow_item_eth ipv6_multi_mask = {
402                 .dst.addr_bytes = "\xff\xff\x00\x00\x00\x00",
403         };
404         struct rte_flow_item_eth unicast = {
405                 .src.addr_bytes = "\x00\x00\x00\x00\x00\x00",
406         };
407         struct rte_flow_item_eth unicast_mask = {
408                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
409         };
410         const unsigned int vlan_filter_n = priv->vlan_filter_n;
411         const struct rte_ether_addr cmp = {
412                 .addr_bytes = "\x00\x00\x00\x00\x00\x00",
413         };
414         unsigned int i;
415         unsigned int j;
416         int ret;
417
418         /*
419          * Hairpin txq default flow should be created no matter if it is
420          * isolation mode. Or else all the packets to be sent will be sent
421          * out directly without the TX flow actions, e.g. encapsulation.
422          */
423         for (i = 0; i != priv->txqs_n; ++i) {
424                 struct mlx5_txq_ctrl *txq_ctrl = mlx5_txq_get(dev, i);
425                 if (!txq_ctrl)
426                         continue;
427                 if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
428                         ret = mlx5_ctrl_flow_source_queue(dev, i);
429                         if (ret) {
430                                 mlx5_txq_release(dev, i);
431                                 goto error;
432                         }
433                 }
434                 mlx5_txq_release(dev, i);
435         }
436         if (priv->config.dv_esw_en && !priv->config.vf) {
437                 if (mlx5_flow_create_esw_table_zero_flow(dev))
438                         priv->fdb_def_rule = 1;
439                 else
440                         DRV_LOG(INFO, "port %u FDB default rule cannot be"
441                                 " configured - only Eswitch group 0 flows are"
442                                 " supported.", dev->data->port_id);
443         }
444         if (priv->isolated)
445                 return 0;
446         if (dev->data->promiscuous) {
447                 struct rte_flow_item_eth promisc = {
448                         .dst.addr_bytes = "\x00\x00\x00\x00\x00\x00",
449                         .src.addr_bytes = "\x00\x00\x00\x00\x00\x00",
450                         .type = 0,
451                 };
452
453                 ret = mlx5_ctrl_flow(dev, &promisc, &promisc);
454                 if (ret)
455                         goto error;
456         }
457         if (dev->data->all_multicast) {
458                 struct rte_flow_item_eth multicast = {
459                         .dst.addr_bytes = "\x01\x00\x00\x00\x00\x00",
460                         .src.addr_bytes = "\x00\x00\x00\x00\x00\x00",
461                         .type = 0,
462                 };
463
464                 ret = mlx5_ctrl_flow(dev, &multicast, &multicast);
465                 if (ret)
466                         goto error;
467         } else {
468                 /* Add broadcast/multicast flows. */
469                 for (i = 0; i != vlan_filter_n; ++i) {
470                         uint16_t vlan = priv->vlan_filter[i];
471
472                         struct rte_flow_item_vlan vlan_spec = {
473                                 .tci = rte_cpu_to_be_16(vlan),
474                         };
475                         struct rte_flow_item_vlan vlan_mask =
476                                 rte_flow_item_vlan_mask;
477
478                         ret = mlx5_ctrl_flow_vlan(dev, &bcast, &bcast,
479                                                   &vlan_spec, &vlan_mask);
480                         if (ret)
481                                 goto error;
482                         ret = mlx5_ctrl_flow_vlan(dev, &ipv6_multi_spec,
483                                                   &ipv6_multi_mask,
484                                                   &vlan_spec, &vlan_mask);
485                         if (ret)
486                                 goto error;
487                 }
488                 if (!vlan_filter_n) {
489                         ret = mlx5_ctrl_flow(dev, &bcast, &bcast);
490                         if (ret)
491                                 goto error;
492                         ret = mlx5_ctrl_flow(dev, &ipv6_multi_spec,
493                                              &ipv6_multi_mask);
494                         if (ret)
495                                 goto error;
496                 }
497         }
498         /* Add MAC address flows. */
499         for (i = 0; i != MLX5_MAX_MAC_ADDRESSES; ++i) {
500                 struct rte_ether_addr *mac = &dev->data->mac_addrs[i];
501
502                 if (!memcmp(mac, &cmp, sizeof(*mac)))
503                         continue;
504                 memcpy(&unicast.dst.addr_bytes,
505                        mac->addr_bytes,
506                        RTE_ETHER_ADDR_LEN);
507                 for (j = 0; j != vlan_filter_n; ++j) {
508                         uint16_t vlan = priv->vlan_filter[j];
509
510                         struct rte_flow_item_vlan vlan_spec = {
511                                 .tci = rte_cpu_to_be_16(vlan),
512                         };
513                         struct rte_flow_item_vlan vlan_mask =
514                                 rte_flow_item_vlan_mask;
515
516                         ret = mlx5_ctrl_flow_vlan(dev, &unicast,
517                                                   &unicast_mask,
518                                                   &vlan_spec,
519                                                   &vlan_mask);
520                         if (ret)
521                                 goto error;
522                 }
523                 if (!vlan_filter_n) {
524                         ret = mlx5_ctrl_flow(dev, &unicast, &unicast_mask);
525                         if (ret)
526                                 goto error;
527                 }
528         }
529         return 0;
530 error:
531         ret = rte_errno; /* Save rte_errno before cleanup. */
532         mlx5_flow_list_flush(dev, &priv->ctrl_flows);
533         rte_errno = ret; /* Restore rte_errno. */
534         return -rte_errno;
535 }
536
537
538 /**
539  * Disable traffic flows configured by control plane
540  *
541  * @param dev
542  *   Pointer to Ethernet device private data.
543  */
544 void
545 mlx5_traffic_disable(struct rte_eth_dev *dev)
546 {
547         struct mlx5_priv *priv = dev->data->dev_private;
548
549         mlx5_flow_list_flush(dev, &priv->ctrl_flows);
550 }
551
552 /**
553  * Restart traffic flows configured by control plane
554  *
555  * @param dev
556  *   Pointer to Ethernet device private data.
557  *
558  * @return
559  *   0 on success, a negative errno value otherwise and rte_errno is set.
560  */
561 int
562 mlx5_traffic_restart(struct rte_eth_dev *dev)
563 {
564         if (dev->data->dev_started) {
565                 mlx5_traffic_disable(dev);
566                 return mlx5_traffic_enable(dev);
567         }
568         return 0;
569 }