drivers/net/mrvl/mrvl_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2017 Marvell International Ltd.
   3  * Copyright(c) 2017 Semihalf.
   4  * All rights reserved.
   5  */
   6
   7 #include <rte_ethdev_driver.h>
   8 #include <rte_kvargs.h>
   9 #include <rte_log.h>
  10 #include <rte_malloc.h>
  11 #include <rte_bus_vdev.h>
  12
  13 /* Unluckily, container_of is defined by both DPDK and MUSDK,
  14  * we'll declare only one version.
  15  *
  16  * Note that it is not used in this PMD anyway.
  17  */
  18 #ifdef container_of
  19 #undef container_of
  20 #endif
  21
  22 #include <fcntl.h>
  23 #include <linux/ethtool.h>
  24 #include <linux/sockios.h>
  25 #include <net/if.h>
  26 #include <net/if_arp.h>
  27 #include <sys/ioctl.h>
  28 #include <sys/socket.h>
  29 #include <sys/stat.h>
  30 #include <sys/types.h>
  31
  32 #include "mrvl_ethdev.h"
  33 #include "mrvl_qos.h"
  34
  35 /* bitmask with reserved hifs */
  36 #define MRVL_MUSDK_HIFS_RESERVED 0x0F
  37 /* bitmask with reserved bpools */
  38 #define MRVL_MUSDK_BPOOLS_RESERVED 0x07
  39 /* bitmask with reserved kernel RSS tables */
  40 #define MRVL_MUSDK_RSS_RESERVED 0x01
  41 /* maximum number of available hifs */
  42 #define MRVL_MUSDK_HIFS_MAX 9
  43
  44 /* prefetch shift */
  45 #define MRVL_MUSDK_PREFETCH_SHIFT 2
  46
  47 /* TCAM has 25 entries reserved for uc/mc filter entries */
  48 #define MRVL_MAC_ADDRS_MAX 25
  49 #define MRVL_MATCH_LEN 16
  50 #define MRVL_PKT_EFFEC_OFFS (MRVL_PKT_OFFS + MV_MH_SIZE)
  51 /* Maximum allowable packet size */
  52 #define MRVL_PKT_SIZE_MAX (10240 - MV_MH_SIZE)
  53
  54 #define MRVL_IFACE_NAME_ARG "iface"
  55 #define MRVL_CFG_ARG "cfg"
  56
  57 #define MRVL_BURST_SIZE 64
  58
  59 #define MRVL_ARP_LENGTH 28
  60
  61 #define MRVL_COOKIE_ADDR_INVALID ~0ULL
  62
  63 #define MRVL_COOKIE_HIGH_ADDR_SHIFT     (sizeof(pp2_cookie_t) * 8)
  64 #define MRVL_COOKIE_HIGH_ADDR_MASK      (~0ULL << MRVL_COOKIE_HIGH_ADDR_SHIFT)
  65
  66 /* Memory size (in bytes) for MUSDK dma buffers */
  67 #define MRVL_MUSDK_DMA_MEMSIZE 41943040
  68
  69 /** Port Rx offload capabilities */
  70 #define MRVL_RX_OFFLOADS (DEV_RX_OFFLOAD_VLAN_FILTER | \
  71                           DEV_RX_OFFLOAD_JUMBO_FRAME | \
  72                           DEV_RX_OFFLOAD_CRC_STRIP | \
  73                           DEV_RX_OFFLOAD_CHECKSUM)
  74
  75 /** Port Tx offloads capabilities */
  76 #define MRVL_TX_OFFLOADS (DEV_TX_OFFLOAD_IPV4_CKSUM | \
  77                           DEV_TX_OFFLOAD_UDP_CKSUM | \
  78                           DEV_TX_OFFLOAD_TCP_CKSUM)
  79
  80 static const char * const valid_args[] = {
  81         MRVL_IFACE_NAME_ARG,
  82         MRVL_CFG_ARG,
  83         NULL
  84 };
  85
  86 static int used_hifs = MRVL_MUSDK_HIFS_RESERVED;
  87 static struct pp2_hif *hifs[RTE_MAX_LCORE];
  88 static int used_bpools[PP2_NUM_PKT_PROC] = {
  89         MRVL_MUSDK_BPOOLS_RESERVED,
  90         MRVL_MUSDK_BPOOLS_RESERVED
  91 };
  92
  93 struct pp2_bpool *mrvl_port_to_bpool_lookup[RTE_MAX_ETHPORTS];
  94 int mrvl_port_bpool_size[PP2_NUM_PKT_PROC][PP2_BPOOL_NUM_POOLS][RTE_MAX_LCORE];
  95 uint64_t cookie_addr_high = MRVL_COOKIE_ADDR_INVALID;
  96
  97 struct mrvl_ifnames {
  98         const char *names[PP2_NUM_ETH_PPIO * PP2_NUM_PKT_PROC];
  99         int idx;
 100 };
 101
 102 /*
 103  * To use buffer harvesting based on loopback port shadow queue structure
 104  * was introduced for buffers information bookkeeping.
 105  *
 106  * Before sending the packet, related buffer information (pp2_buff_inf) is
 107  * stored in shadow queue. After packet is transmitted no longer used
 108  * packet buffer is released back to it's original hardware pool,
 109  * on condition it originated from interface.
 110  * In case it  was generated by application itself i.e: mbuf->port field is
 111  * 0xff then its released to software mempool.
 112  */
 113 struct mrvl_shadow_txq {
 114         int head;           /* write index - used when sending buffers */
 115         int tail;           /* read index - used when releasing buffers */
 116         u16 size;           /* queue occupied size */
 117         u16 num_to_release; /* number of buffers sent, that can be released */
 118         struct buff_release_entry ent[MRVL_PP2_TX_SHADOWQ_SIZE]; /* q entries */
 119 };
 120
 121 struct mrvl_rxq {
 122         struct mrvl_priv *priv;
 123         struct rte_mempool *mp;
 124         int queue_id;
 125         int port_id;
 126         int cksum_enabled;
 127         uint64_t bytes_recv;
 128         uint64_t drop_mac;
 129 };
 130
 131 struct mrvl_txq {
 132         struct mrvl_priv *priv;
 133         int queue_id;
 134         int port_id;
 135         uint64_t bytes_sent;
 136         struct mrvl_shadow_txq shadow_txqs[RTE_MAX_LCORE];
 137 };
 138
 139 static int mrvl_lcore_first;
 140 static int mrvl_lcore_last;
 141 static int mrvl_dev_num;
 142
 143 static int mrvl_fill_bpool(struct mrvl_rxq *rxq, int num);
 144 static inline void mrvl_free_sent_buffers(struct pp2_ppio *ppio,
 145                         struct pp2_hif *hif, unsigned int core_id,
 146                         struct mrvl_shadow_txq *sq, int qid, int force);
 147
 148 static inline int
 149 mrvl_get_bpool_size(int pp2_id, int pool_id)
 150 {
 151         int i;
 152         int size = 0;
 153
 154         for (i = mrvl_lcore_first; i <= mrvl_lcore_last; i++)
 155                 size += mrvl_port_bpool_size[pp2_id][pool_id][i];
 156
 157         return size;
 158 }
 159
 160 static inline int
 161 mrvl_reserve_bit(int *bitmap, int max)
 162 {
 163         int n = sizeof(*bitmap) * 8 - __builtin_clz(*bitmap);
 164
 165         if (n >= max)
 166                 return -1;
 167
 168         *bitmap |= 1 << n;
 169
 170         return n;
 171 }
 172
 173 static int
 174 mrvl_init_hif(int core_id)
 175 {
 176         struct pp2_hif_params params;
 177         char match[MRVL_MATCH_LEN];
 178         int ret;
 179
 180         ret = mrvl_reserve_bit(&used_hifs, MRVL_MUSDK_HIFS_MAX);
 181         if (ret < 0) {
 182                 RTE_LOG(ERR, PMD, "Failed to allocate hif %d\n", core_id);
 183                 return ret;
 184         }
 185
 186         snprintf(match, sizeof(match), "hif-%d", ret);
 187         memset(&params, 0, sizeof(params));
 188         params.match = match;
 189         params.out_size = MRVL_PP2_AGGR_TXQD_MAX;
 190         ret = pp2_hif_init(&params, &hifs[core_id]);
 191         if (ret) {
 192                 RTE_LOG(ERR, PMD, "Failed to initialize hif %d\n", core_id);
 193                 return ret;
 194         }
 195
 196         return 0;
 197 }
 198
 199 static inline struct pp2_hif*
 200 mrvl_get_hif(struct mrvl_priv *priv, int core_id)
 201 {
 202         int ret;
 203
 204         if (likely(hifs[core_id] != NULL))
 205                 return hifs[core_id];
 206
 207         rte_spinlock_lock(&priv->lock);
 208
 209         ret = mrvl_init_hif(core_id);
 210         if (ret < 0) {
 211                 RTE_LOG(ERR, PMD, "Failed to allocate hif %d\n", core_id);
 212                 goto out;
 213         }
 214
 215         if (core_id < mrvl_lcore_first)
 216                 mrvl_lcore_first = core_id;
 217
 218         if (core_id > mrvl_lcore_last)
 219                 mrvl_lcore_last = core_id;
 220 out:
 221         rte_spinlock_unlock(&priv->lock);
 222
 223         return hifs[core_id];
 224 }
 225
 226 /**
 227  * Configure rss based on dpdk rss configuration.
 228  *
 229  * @param priv
 230  *   Pointer to private structure.
 231  * @param rss_conf
 232  *   Pointer to RSS configuration.
 233  *
 234  * @return
 235  *   0 on success, negative error value otherwise.
 236  */
 237 static int
 238 mrvl_configure_rss(struct mrvl_priv *priv, struct rte_eth_rss_conf *rss_conf)
 239 {
 240         if (rss_conf->rss_key)
 241                 RTE_LOG(WARNING, PMD, "Changing hash key is not supported\n");
 242
 243         if (rss_conf->rss_hf == 0) {
 244                 priv->ppio_params.inqs_params.hash_type = PP2_PPIO_HASH_T_NONE;
 245         } else if (rss_conf->rss_hf & ETH_RSS_IPV4) {
 246                 priv->ppio_params.inqs_params.hash_type =
 247                         PP2_PPIO_HASH_T_2_TUPLE;
 248         } else if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) {
 249                 priv->ppio_params.inqs_params.hash_type =
 250                         PP2_PPIO_HASH_T_5_TUPLE;
 251                 priv->rss_hf_tcp = 1;
 252         } else if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) {
 253                 priv->ppio_params.inqs_params.hash_type =
 254                         PP2_PPIO_HASH_T_5_TUPLE;
 255                 priv->rss_hf_tcp = 0;
 256         } else {
 257                 return -EINVAL;
 258         }
 259
 260         return 0;
 261 }
 262
 263 /**
 264  * Ethernet device configuration.
 265  *
 266  * Prepare the driver for a given number of TX and RX queues and
 267  * configure RSS.
 268  *
 269  * @param dev
 270  *   Pointer to Ethernet device structure.
 271  *
 272  * @return
 273  *   0 on success, negative error value otherwise.
 274  */
 275 static int
 276 mrvl_dev_configure(struct rte_eth_dev *dev)
 277 {
 278         struct mrvl_priv *priv = dev->data->dev_private;
 279         int ret;
 280
 281         if (dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_NONE &&
 282             dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
 283                 RTE_LOG(INFO, PMD, "Unsupported rx multi queue mode %d\n",
 284                         dev->data->dev_conf.rxmode.mq_mode);
 285                 return -EINVAL;
 286         }
 287
 288         if (!(dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_CRC_STRIP)) {
 289                 RTE_LOG(INFO, PMD,
 290                         "L2 CRC stripping is always enabled in hw\n");
 291                 dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
 292         }
 293
 294         if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP) {
 295                 RTE_LOG(INFO, PMD, "VLAN stripping not supported\n");
 296                 return -EINVAL;
 297         }
 298
 299         if (dev->data->dev_conf.rxmode.split_hdr_size) {
 300                 RTE_LOG(INFO, PMD, "Split headers not supported\n");
 301                 return -EINVAL;
 302         }
 303
 304         if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_SCATTER) {
 305                 RTE_LOG(INFO, PMD, "RX Scatter/Gather not supported\n");
 306                 return -EINVAL;
 307         }
 308
 309         if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
 310                 RTE_LOG(INFO, PMD, "LRO not supported\n");
 311                 return -EINVAL;
 312         }
 313
 314         if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
 315                 dev->data->mtu = dev->data->dev_conf.rxmode.max_rx_pkt_len -
 316                                  ETHER_HDR_LEN - ETHER_CRC_LEN;
 317
 318         ret = mrvl_configure_rxqs(priv, dev->data->port_id,
 319                                   dev->data->nb_rx_queues);
 320         if (ret < 0)
 321                 return ret;
 322
 323         priv->ppio_params.outqs_params.num_outqs = dev->data->nb_tx_queues;
 324         priv->ppio_params.maintain_stats = 1;
 325         priv->nb_rx_queues = dev->data->nb_rx_queues;
 326
 327         if (dev->data->nb_rx_queues == 1 &&
 328             dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 329                 RTE_LOG(WARNING, PMD, "Disabling hash for 1 rx queue\n");
 330                 priv->ppio_params.inqs_params.hash_type = PP2_PPIO_HASH_T_NONE;
 331
 332                 return 0;
 333         }
 334
 335         return mrvl_configure_rss(priv,
 336                                   &dev->data->dev_conf.rx_adv_conf.rss_conf);
 337 }
 338
 339 /**
 340  * DPDK callback to change the MTU.
 341  *
 342  * Setting the MTU affects hardware MRU (packets larger than the MRU
 343  * will be dropped).
 344  *
 345  * @param dev
 346  *   Pointer to Ethernet device structure.
 347  * @param mtu
 348  *   New MTU.
 349  *
 350  * @return
 351  *   0 on success, negative error value otherwise.
 352  */
 353 static int
 354 mrvl_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
 355 {
 356         struct mrvl_priv *priv = dev->data->dev_private;
 357         /* extra MV_MH_SIZE bytes are required for Marvell tag */
 358         uint16_t mru = mtu + MV_MH_SIZE + ETHER_HDR_LEN + ETHER_CRC_LEN;
 359         int ret;
 360
 361         if (mtu < ETHER_MIN_MTU || mru > MRVL_PKT_SIZE_MAX)
 362                 return -EINVAL;
 363
 364         if (!priv->ppio)
 365                 return 0;
 366
 367         ret = pp2_ppio_set_mru(priv->ppio, mru);
 368         if (ret)
 369                 return ret;
 370
 371         return pp2_ppio_set_mtu(priv->ppio, mtu);
 372 }
 373
 374 /**
 375  * DPDK callback to bring the link up.
 376  *
 377  * @param dev
 378  *   Pointer to Ethernet device structure.
 379  *
 380  * @return
 381  *   0 on success, negative error value otherwise.
 382  */
 383 static int
 384 mrvl_dev_set_link_up(struct rte_eth_dev *dev)
 385 {
 386         struct mrvl_priv *priv = dev->data->dev_private;
 387         int ret;
 388
 389         if (!priv->ppio)
 390                 return -EPERM;
 391
 392         ret = pp2_ppio_enable(priv->ppio);
 393         if (ret)
 394                 return ret;
 395
 396         /*
 397          * mtu/mru can be updated if pp2_ppio_enable() was called at least once
 398          * as pp2_ppio_enable() changes port->t_mode from default 0 to
 399          * PP2_TRAFFIC_INGRESS_EGRESS.
 400          *
 401          * Set mtu to default DPDK value here.
 402          */
 403         ret = mrvl_mtu_set(dev, dev->data->mtu);
 404         if (ret)
 405                 pp2_ppio_disable(priv->ppio);
 406
 407         return ret;
 408 }
 409
 410 /**
 411  * DPDK callback to bring the link down.
 412  *
 413  * @param dev
 414  *   Pointer to Ethernet device structure.
 415  *
 416  * @return
 417  *   0 on success, negative error value otherwise.
 418  */
 419 static int
 420 mrvl_dev_set_link_down(struct rte_eth_dev *dev)
 421 {
 422         struct mrvl_priv *priv = dev->data->dev_private;
 423
 424         if (!priv->ppio)
 425                 return -EPERM;
 426
 427         return pp2_ppio_disable(priv->ppio);
 428 }
 429
 430 /**
 431  * DPDK callback to start the device.
 432  *
 433  * @param dev
 434  *   Pointer to Ethernet device structure.
 435  *
 436  * @return
 437  *   0 on success, negative errno value on failure.
 438  */
 439 static int
 440 mrvl_dev_start(struct rte_eth_dev *dev)
 441 {
 442         struct mrvl_priv *priv = dev->data->dev_private;
 443         char match[MRVL_MATCH_LEN];
 444         int ret = 0, def_init_size;
 445
 446         snprintf(match, sizeof(match), "ppio-%d:%d",
 447                  priv->pp_id, priv->ppio_id);
 448         priv->ppio_params.match = match;
 449
 450         /*
 451          * Calculate the minimum bpool size for refill feature as follows:
 452          * 2 default burst sizes multiply by number of rx queues.
 453          * If the bpool size will be below this value, new buffers will
 454          * be added to the pool.
 455          */
 456         priv->bpool_min_size = priv->nb_rx_queues * MRVL_BURST_SIZE * 2;
 457
 458         /* In case initial bpool size configured in queues setup is
 459          * smaller than minimum size add more buffers
 460          */
 461         def_init_size = priv->bpool_min_size + MRVL_BURST_SIZE * 2;
 462         if (priv->bpool_init_size < def_init_size) {
 463                 int buffs_to_add = def_init_size - priv->bpool_init_size;
 464
 465                 priv->bpool_init_size += buffs_to_add;
 466                 ret = mrvl_fill_bpool(dev->data->rx_queues[0], buffs_to_add);
 467                 if (ret)
 468                         RTE_LOG(ERR, PMD, "Failed to add buffers to bpool\n");
 469         }
 470
 471         /*
 472          * Calculate the maximum bpool size for refill feature as follows:
 473          * maximum number of descriptors in rx queue multiply by number
 474          * of rx queues plus minimum bpool size.
 475          * In case the bpool size will exceed this value, superfluous buffers
 476          * will be removed
 477          */
 478         priv->bpool_max_size = (priv->nb_rx_queues * MRVL_PP2_RXD_MAX) +
 479                                 priv->bpool_min_size;
 480
 481         ret = pp2_ppio_init(&priv->ppio_params, &priv->ppio);
 482         if (ret) {
 483                 RTE_LOG(ERR, PMD, "Failed to init ppio\n");
 484                 return ret;
 485         }
 486
 487         /*
 488          * In case there are some some stale uc/mc mac addresses flush them
 489          * here. It cannot be done during mrvl_dev_close() as port information
 490          * is already gone at that point (due to pp2_ppio_deinit() in
 491          * mrvl_dev_stop()).
 492          */
 493         if (!priv->uc_mc_flushed) {
 494                 ret = pp2_ppio_flush_mac_addrs(priv->ppio, 1, 1);
 495                 if (ret) {
 496                         RTE_LOG(ERR, PMD,
 497                                 "Failed to flush uc/mc filter list\n");
 498                         goto out;
 499                 }
 500                 priv->uc_mc_flushed = 1;
 501         }
 502
 503         if (!priv->vlan_flushed) {
 504                 ret = pp2_ppio_flush_vlan(priv->ppio);
 505                 if (ret) {
 506                         RTE_LOG(ERR, PMD, "Failed to flush vlan list\n");
 507                         /*
 508                          * TODO
 509                          * once pp2_ppio_flush_vlan() is supported jump to out
 510                          * goto out;
 511                          */
 512                 }
 513                 priv->vlan_flushed = 1;
 514         }
 515
 516         /* For default QoS config, don't start classifier. */
 517         if (mrvl_qos_cfg) {
 518                 ret = mrvl_start_qos_mapping(priv);
 519                 if (ret) {
 520                         RTE_LOG(ERR, PMD, "Failed to setup QoS mapping\n");
 521                         goto out;
 522                 }
 523         }
 524
 525         ret = mrvl_dev_set_link_up(dev);
 526         if (ret) {
 527                 RTE_LOG(ERR, PMD, "Failed to set link up\n");
 528                 goto out;
 529         }
 530
 531         return 0;
 532 out:
 533         RTE_LOG(ERR, PMD, "Failed to start device\n");
 534         pp2_ppio_deinit(priv->ppio);
 535         return ret;
 536 }
 537
 538 /**
 539  * Flush receive queues.
 540  *
 541  * @param dev
 542  *   Pointer to Ethernet device structure.
 543  */
 544 static void
 545 mrvl_flush_rx_queues(struct rte_eth_dev *dev)
 546 {
 547         int i;
 548
 549         RTE_LOG(INFO, PMD, "Flushing rx queues\n");
 550         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 551                 int ret, num;
 552
 553                 do {
 554                         struct mrvl_rxq *q = dev->data->rx_queues[i];
 555                         struct pp2_ppio_desc descs[MRVL_PP2_RXD_MAX];
 556
 557                         num = MRVL_PP2_RXD_MAX;
 558                         ret = pp2_ppio_recv(q->priv->ppio,
 559                                             q->priv->rxq_map[q->queue_id].tc,
 560                                             q->priv->rxq_map[q->queue_id].inq,
 561                                             descs, (uint16_t *)&num);
 562                 } while (ret == 0 && num);
 563         }
 564 }
 565
 566 /**
 567  * Flush transmit shadow queues.
 568  *
 569  * @param dev
 570  *   Pointer to Ethernet device structure.
 571  */
 572 static void
 573 mrvl_flush_tx_shadow_queues(struct rte_eth_dev *dev)
 574 {
 575         int i, j;
 576         struct mrvl_txq *txq;
 577
 578         RTE_LOG(INFO, PMD, "Flushing tx shadow queues\n");
 579         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 580                 txq = (struct mrvl_txq *)dev->data->tx_queues[i];
 581
 582                 for (j = 0; j < RTE_MAX_LCORE; j++) {
 583                         struct mrvl_shadow_txq *sq;
 584
 585                         if (!hifs[j])
 586                                 continue;
 587
 588                         sq = &txq->shadow_txqs[j];
 589                         mrvl_free_sent_buffers(txq->priv->ppio,
 590                                 hifs[j], j, sq, txq->queue_id, 1);
 591                         while (sq->tail != sq->head) {
 592                                 uint64_t addr = cookie_addr_high |
 593                                         sq->ent[sq->tail].buff.cookie;
 594                                 rte_pktmbuf_free(
 595                                         (struct rte_mbuf *)addr);
 596                                 sq->tail = (sq->tail + 1) &
 597                                             MRVL_PP2_TX_SHADOWQ_MASK;
 598                         }
 599                         memset(sq, 0, sizeof(*sq));
 600                 }
 601         }
 602 }
 603
 604 /**
 605  * Flush hardware bpool (buffer-pool).
 606  *
 607  * @param dev
 608  *   Pointer to Ethernet device structure.
 609  */
 610 static void
 611 mrvl_flush_bpool(struct rte_eth_dev *dev)
 612 {
 613         struct mrvl_priv *priv = dev->data->dev_private;
 614         struct pp2_hif *hif;
 615         uint32_t num;
 616         int ret;
 617         unsigned int core_id = rte_lcore_id();
 618
 619         if (core_id == LCORE_ID_ANY)
 620                 core_id = 0;
 621
 622         hif = mrvl_get_hif(priv, core_id);
 623
 624         ret = pp2_bpool_get_num_buffs(priv->bpool, &num);
 625         if (ret) {
 626                 RTE_LOG(ERR, PMD, "Failed to get bpool buffers number\n");
 627                 return;
 628         }
 629
 630         while (num--) {
 631                 struct pp2_buff_inf inf;
 632                 uint64_t addr;
 633
 634                 ret = pp2_bpool_get_buff(hif, priv->bpool, &inf);
 635                 if (ret)
 636                         break;
 637
 638                 addr = cookie_addr_high | inf.cookie;
 639                 rte_pktmbuf_free((struct rte_mbuf *)addr);
 640         }
 641 }
 642
 643 /**
 644  * DPDK callback to stop the device.
 645  *
 646  * @param dev
 647  *   Pointer to Ethernet device structure.
 648  */
 649 static void
 650 mrvl_dev_stop(struct rte_eth_dev *dev)
 651 {
 652         struct mrvl_priv *priv = dev->data->dev_private;
 653
 654         mrvl_dev_set_link_down(dev);
 655         mrvl_flush_rx_queues(dev);
 656         mrvl_flush_tx_shadow_queues(dev);
 657         if (priv->qos_tbl) {
 658                 pp2_cls_qos_tbl_deinit(priv->qos_tbl);
 659                 priv->qos_tbl = NULL;
 660         }
 661         if (priv->ppio)
 662                 pp2_ppio_deinit(priv->ppio);
 663         priv->ppio = NULL;
 664 }
 665
 666 /**
 667  * DPDK callback to close the device.
 668  *
 669  * @param dev
 670  *   Pointer to Ethernet device structure.
 671  */
 672 static void
 673 mrvl_dev_close(struct rte_eth_dev *dev)
 674 {
 675         struct mrvl_priv *priv = dev->data->dev_private;
 676         size_t i;
 677
 678         for (i = 0; i < priv->ppio_params.inqs_params.num_tcs; ++i) {
 679                 struct pp2_ppio_tc_params *tc_params =
 680                         &priv->ppio_params.inqs_params.tcs_params[i];
 681
 682                 if (tc_params->inqs_params) {
 683                         rte_free(tc_params->inqs_params);
 684                         tc_params->inqs_params = NULL;
 685                 }
 686         }
 687
 688         mrvl_flush_bpool(dev);
 689 }
 690
 691 /**
 692  * DPDK callback to retrieve physical link information.
 693  *
 694  * @param dev
 695  *   Pointer to Ethernet device structure.
 696  * @param wait_to_complete
 697  *   Wait for request completion (ignored).
 698  *
 699  * @return
 700  *   0 on success, negative error value otherwise.
 701  */
 702 static int
 703 mrvl_link_update(struct rte_eth_dev *dev, int wait_to_complete __rte_unused)
 704 {
 705         /*
 706          * TODO
 707          * once MUSDK provides necessary API use it here
 708          */
 709         struct mrvl_priv *priv = dev->data->dev_private;
 710         struct ethtool_cmd edata;
 711         struct ifreq req;
 712         int ret, fd, link_up;
 713
 714         if (!priv->ppio)
 715                 return -EPERM;
 716
 717         edata.cmd = ETHTOOL_GSET;
 718
 719         strcpy(req.ifr_name, dev->data->name);
 720         req.ifr_data = (void *)&edata;
 721
 722         fd = socket(AF_INET, SOCK_DGRAM, 0);
 723         if (fd == -1)
 724                 return -EFAULT;
 725
 726         ret = ioctl(fd, SIOCETHTOOL, &req);
 727         if (ret == -1) {
 728                 close(fd);
 729                 return -EFAULT;
 730         }
 731
 732         close(fd);
 733
 734         switch (ethtool_cmd_speed(&edata)) {
 735         case SPEED_10:
 736                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_10M;
 737                 break;
 738         case SPEED_100:
 739                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_100M;
 740                 break;
 741         case SPEED_1000:
 742                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_1G;
 743                 break;
 744         case SPEED_10000:
 745                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_10G;
 746                 break;
 747         default:
 748                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_NONE;
 749         }
 750
 751         dev->data->dev_link.link_duplex = edata.duplex ? ETH_LINK_FULL_DUPLEX :
 752                                                          ETH_LINK_HALF_DUPLEX;
 753         dev->data->dev_link.link_autoneg = edata.autoneg ? ETH_LINK_AUTONEG :
 754                                                            ETH_LINK_FIXED;
 755         pp2_ppio_get_link_state(priv->ppio, &link_up);
 756         dev->data->dev_link.link_status = link_up ? ETH_LINK_UP : ETH_LINK_DOWN;
 757
 758         return 0;
 759 }
 760
 761 /**
 762  * DPDK callback to enable promiscuous mode.
 763  *
 764  * @param dev
 765  *   Pointer to Ethernet device structure.
 766  */
 767 static void
 768 mrvl_promiscuous_enable(struct rte_eth_dev *dev)
 769 {
 770         struct mrvl_priv *priv = dev->data->dev_private;
 771         int ret;
 772
 773         if (!priv->ppio)
 774                 return;
 775
 776         ret = pp2_ppio_set_promisc(priv->ppio, 1);
 777         if (ret)
 778                 RTE_LOG(ERR, PMD, "Failed to enable promiscuous mode\n");
 779 }
 780
 781 /**
 782  * DPDK callback to enable allmulti mode.
 783  *
 784  * @param dev
 785  *   Pointer to Ethernet device structure.
 786  */
 787 static void
 788 mrvl_allmulticast_enable(struct rte_eth_dev *dev)
 789 {
 790         struct mrvl_priv *priv = dev->data->dev_private;
 791         int ret;
 792
 793         if (!priv->ppio)
 794                 return;
 795
 796         ret = pp2_ppio_set_mc_promisc(priv->ppio, 1);
 797         if (ret)
 798                 RTE_LOG(ERR, PMD, "Failed enable all-multicast mode\n");
 799 }
 800
 801 /**
 802  * DPDK callback to disable promiscuous mode.
 803  *
 804  * @param dev
 805  *   Pointer to Ethernet device structure.
 806  */
 807 static void
 808 mrvl_promiscuous_disable(struct rte_eth_dev *dev)
 809 {
 810         struct mrvl_priv *priv = dev->data->dev_private;
 811         int ret;
 812
 813         if (!priv->ppio)
 814                 return;
 815
 816         ret = pp2_ppio_set_promisc(priv->ppio, 0);
 817         if (ret)
 818                 RTE_LOG(ERR, PMD, "Failed to disable promiscuous mode\n");
 819 }
 820
 821 /**
 822  * DPDK callback to disable allmulticast mode.
 823  *
 824  * @param dev
 825  *   Pointer to Ethernet device structure.
 826  */
 827 static void
 828 mrvl_allmulticast_disable(struct rte_eth_dev *dev)
 829 {
 830         struct mrvl_priv *priv = dev->data->dev_private;
 831         int ret;
 832
 833         if (!priv->ppio)
 834                 return;
 835
 836         ret = pp2_ppio_set_mc_promisc(priv->ppio, 0);
 837         if (ret)
 838                 RTE_LOG(ERR, PMD, "Failed to disable all-multicast mode\n");
 839 }
 840
 841 /**
 842  * DPDK callback to remove a MAC address.
 843  *
 844  * @param dev
 845  *   Pointer to Ethernet device structure.
 846  * @param index
 847  *   MAC address index.
 848  */
 849 static void
 850 mrvl_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
 851 {
 852         struct mrvl_priv *priv = dev->data->dev_private;
 853         char buf[ETHER_ADDR_FMT_SIZE];
 854         int ret;
 855
 856         if (!priv->ppio)
 857                 return;
 858
 859         ret = pp2_ppio_remove_mac_addr(priv->ppio,
 860                                        dev->data->mac_addrs[index].addr_bytes);
 861         if (ret) {
 862                 ether_format_addr(buf, sizeof(buf),
 863                                   &dev->data->mac_addrs[index]);
 864                 RTE_LOG(ERR, PMD, "Failed to remove mac %s\n", buf);
 865         }
 866 }
 867
 868 /**
 869  * DPDK callback to add a MAC address.
 870  *
 871  * @param dev
 872  *   Pointer to Ethernet device structure.
 873  * @param mac_addr
 874  *   MAC address to register.
 875  * @param index
 876  *   MAC address index.
 877  * @param vmdq
 878  *   VMDq pool index to associate address with (unused).
 879  *
 880  * @return
 881  *   0 on success, negative error value otherwise.
 882  */
 883 static int
 884 mrvl_mac_addr_add(struct rte_eth_dev *dev, struct ether_addr *mac_addr,
 885                   uint32_t index, uint32_t vmdq __rte_unused)
 886 {
 887         struct mrvl_priv *priv = dev->data->dev_private;
 888         char buf[ETHER_ADDR_FMT_SIZE];
 889         int ret;
 890
 891         if (index == 0)
 892                 /* For setting index 0, mrvl_mac_addr_set() should be used.*/
 893                 return -1;
 894
 895         if (!priv->ppio)
 896                 return 0;
 897
 898         /*
 899          * Maximum number of uc addresses can be tuned via kernel module mvpp2x
 900          * parameter uc_filter_max. Maximum number of mc addresses is then
 901          * MRVL_MAC_ADDRS_MAX - uc_filter_max. Currently it defaults to 4 and
 902          * 21 respectively.
 903          *
 904          * If more than uc_filter_max uc addresses were added to filter list
 905          * then NIC will switch to promiscuous mode automatically.
 906          *
 907          * If more than MRVL_MAC_ADDRS_MAX - uc_filter_max number mc addresses
 908          * were added to filter list then NIC will switch to all-multicast mode
 909          * automatically.
 910          */
 911         ret = pp2_ppio_add_mac_addr(priv->ppio, mac_addr->addr_bytes);
 912         if (ret) {
 913                 ether_format_addr(buf, sizeof(buf), mac_addr);
 914                 RTE_LOG(ERR, PMD, "Failed to add mac %s\n", buf);
 915                 return -1;
 916         }
 917
 918         return 0;
 919 }
 920
 921 /**
 922  * DPDK callback to set the primary MAC address.
 923  *
 924  * @param dev
 925  *   Pointer to Ethernet device structure.
 926  * @param mac_addr
 927  *   MAC address to register.
 928  */
 929 static void
 930 mrvl_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
 931 {
 932         struct mrvl_priv *priv = dev->data->dev_private;
 933         int ret;
 934
 935         if (!priv->ppio)
 936                 return;
 937
 938         ret = pp2_ppio_set_mac_addr(priv->ppio, mac_addr->addr_bytes);
 939         if (ret) {
 940                 char buf[ETHER_ADDR_FMT_SIZE];
 941                 ether_format_addr(buf, sizeof(buf), mac_addr);
 942                 RTE_LOG(ERR, PMD, "Failed to set mac to %s\n", buf);
 943         }
 944 }
 945
 946 /**
 947  * DPDK callback to get device statistics.
 948  *
 949  * @param dev
 950  *   Pointer to Ethernet device structure.
 951  * @param stats
 952  *   Stats structure output buffer.
 953  *
 954  * @return
 955  *   0 on success, negative error value otherwise.
 956  */
 957 static int
 958 mrvl_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
 959 {
 960         struct mrvl_priv *priv = dev->data->dev_private;
 961         struct pp2_ppio_statistics ppio_stats;
 962         uint64_t drop_mac = 0;
 963         unsigned int i, idx, ret;
 964
 965         if (!priv->ppio)
 966                 return -EPERM;
 967
 968         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 969                 struct mrvl_rxq *rxq = dev->data->rx_queues[i];
 970                 struct pp2_ppio_inq_statistics rx_stats;
 971
 972                 if (!rxq)
 973                         continue;
 974
 975                 idx = rxq->queue_id;
 976                 if (unlikely(idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)) {
 977                         RTE_LOG(ERR, PMD,
 978                                 "rx queue %d stats out of range (0 - %d)\n",
 979                                 idx, RTE_ETHDEV_QUEUE_STAT_CNTRS - 1);
 980                         continue;
 981                 }
 982
 983                 ret = pp2_ppio_inq_get_statistics(priv->ppio,
 984                                                   priv->rxq_map[idx].tc,
 985                                                   priv->rxq_map[idx].inq,
 986                                                   &rx_stats, 0);
 987                 if (unlikely(ret)) {
 988                         RTE_LOG(ERR, PMD,
 989                                 "Failed to update rx queue %d stats\n", idx);
 990                         break;
 991                 }
 992
 993                 stats->q_ibytes[idx] = rxq->bytes_recv;
 994                 stats->q_ipackets[idx] = rx_stats.enq_desc - rxq->drop_mac;
 995                 stats->q_errors[idx] = rx_stats.drop_early +
 996                                        rx_stats.drop_fullq +
 997                                        rx_stats.drop_bm +
 998                                        rxq->drop_mac;
 999                 stats->ibytes += rxq->bytes_recv;
1000                 drop_mac += rxq->drop_mac;
1001         }
1002
1003         for (i = 0; i < dev->data->nb_tx_queues; i++) {
1004                 struct mrvl_txq *txq = dev->data->tx_queues[i];
1005                 struct pp2_ppio_outq_statistics tx_stats;
1006
1007                 if (!txq)
1008                         continue;
1009
1010                 idx = txq->queue_id;
1011                 if (unlikely(idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)) {
1012                         RTE_LOG(ERR, PMD,
1013                                 "tx queue %d stats out of range (0 - %d)\n",
1014                                 idx, RTE_ETHDEV_QUEUE_STAT_CNTRS - 1);
1015                 }
1016
1017                 ret = pp2_ppio_outq_get_statistics(priv->ppio, idx,
1018                                                    &tx_stats, 0);
1019                 if (unlikely(ret)) {
1020                         RTE_LOG(ERR, PMD,
1021                                 "Failed to update tx queue %d stats\n", idx);
1022                         break;
1023                 }
1024
1025                 stats->q_opackets[idx] = tx_stats.deq_desc;
1026                 stats->q_obytes[idx] = txq->bytes_sent;
1027                 stats->obytes += txq->bytes_sent;
1028         }
1029
1030         ret = pp2_ppio_get_statistics(priv->ppio, &ppio_stats, 0);
1031         if (unlikely(ret)) {
1032                 RTE_LOG(ERR, PMD, "Failed to update port statistics\n");
1033                 return ret;
1034         }
1035
1036         stats->ipackets += ppio_stats.rx_packets - drop_mac;
1037         stats->opackets += ppio_stats.tx_packets;
1038         stats->imissed += ppio_stats.rx_fullq_dropped +
1039                           ppio_stats.rx_bm_dropped +
1040                           ppio_stats.rx_early_dropped +
1041                           ppio_stats.rx_fifo_dropped +
1042                           ppio_stats.rx_cls_dropped;
1043         stats->ierrors = drop_mac;
1044
1045         return 0;
1046 }
1047
1048 /**
1049  * DPDK callback to clear device statistics.
1050  *
1051  * @param dev
1052  *   Pointer to Ethernet device structure.
1053  */
1054 static void
1055 mrvl_stats_reset(struct rte_eth_dev *dev)
1056 {
1057         struct mrvl_priv *priv = dev->data->dev_private;
1058         int i;
1059
1060         if (!priv->ppio)
1061                 return;
1062
1063         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1064                 struct mrvl_rxq *rxq = dev->data->rx_queues[i];
1065
1066                 pp2_ppio_inq_get_statistics(priv->ppio, priv->rxq_map[i].tc,
1067                                             priv->rxq_map[i].inq, NULL, 1);
1068                 rxq->bytes_recv = 0;
1069                 rxq->drop_mac = 0;
1070         }
1071
1072         for (i = 0; i < dev->data->nb_tx_queues; i++) {
1073                 struct mrvl_txq *txq = dev->data->tx_queues[i];
1074
1075                 pp2_ppio_outq_get_statistics(priv->ppio, i, NULL, 1);
1076                 txq->bytes_sent = 0;
1077         }
1078
1079         pp2_ppio_get_statistics(priv->ppio, NULL, 1);
1080 }
1081
1082 /**
1083  * DPDK callback to get information about the device.
1084  *
1085  * @param dev
1086  *   Pointer to Ethernet device structure (unused).
1087  * @param info
1088  *   Info structure output buffer.
1089  */
1090 static void
1091 mrvl_dev_infos_get(struct rte_eth_dev *dev __rte_unused,
1092                    struct rte_eth_dev_info *info)
1093 {
1094         info->speed_capa = ETH_LINK_SPEED_10M |
1095                            ETH_LINK_SPEED_100M |
1096                            ETH_LINK_SPEED_1G |
1097                            ETH_LINK_SPEED_10G;
1098
1099         info->max_rx_queues = MRVL_PP2_RXQ_MAX;
1100         info->max_tx_queues = MRVL_PP2_TXQ_MAX;
1101         info->max_mac_addrs = MRVL_MAC_ADDRS_MAX;
1102
1103         info->rx_desc_lim.nb_max = MRVL_PP2_RXD_MAX;
1104         info->rx_desc_lim.nb_min = MRVL_PP2_RXD_MIN;
1105         info->rx_desc_lim.nb_align = MRVL_PP2_RXD_ALIGN;
1106
1107         info->tx_desc_lim.nb_max = MRVL_PP2_TXD_MAX;
1108         info->tx_desc_lim.nb_min = MRVL_PP2_TXD_MIN;
1109         info->tx_desc_lim.nb_align = MRVL_PP2_TXD_ALIGN;
1110
1111         info->rx_offload_capa = MRVL_RX_OFFLOADS;
1112         info->rx_queue_offload_capa = MRVL_RX_OFFLOADS;
1113
1114         info->tx_offload_capa = MRVL_TX_OFFLOADS;
1115         info->tx_queue_offload_capa = MRVL_TX_OFFLOADS;
1116
1117         info->flow_type_rss_offloads = ETH_RSS_IPV4 |
1118                                        ETH_RSS_NONFRAG_IPV4_TCP |
1119                                        ETH_RSS_NONFRAG_IPV4_UDP;
1120
1121         /* By default packets are dropped if no descriptors are available */
1122         info->default_rxconf.rx_drop_en = 1;
1123         info->default_rxconf.offloads = DEV_RX_OFFLOAD_CRC_STRIP;
1124
1125         info->max_rx_pktlen = MRVL_PKT_SIZE_MAX;
1126 }
1127
1128 /**
1129  * Return supported packet types.
1130  *
1131  * @param dev
1132  *   Pointer to Ethernet device structure (unused).
1133  *
1134  * @return
1135  *   Const pointer to the table with supported packet types.
1136  */
1137 static const uint32_t *
1138 mrvl_dev_supported_ptypes_get(struct rte_eth_dev *dev __rte_unused)
1139 {
1140         static const uint32_t ptypes[] = {
1141                 RTE_PTYPE_L2_ETHER,
1142                 RTE_PTYPE_L3_IPV4,
1143                 RTE_PTYPE_L3_IPV4_EXT,
1144                 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
1145                 RTE_PTYPE_L3_IPV6,
1146                 RTE_PTYPE_L3_IPV6_EXT,
1147                 RTE_PTYPE_L2_ETHER_ARP,
1148                 RTE_PTYPE_L4_TCP,
1149                 RTE_PTYPE_L4_UDP
1150         };
1151
1152         return ptypes;
1153 }
1154
1155 /**
1156  * DPDK callback to get information about specific receive queue.
1157  *
1158  * @param dev
1159  *   Pointer to Ethernet device structure.
1160  * @param rx_queue_id
1161  *   Receive queue index.
1162  * @param qinfo
1163  *   Receive queue information structure.
1164  */
1165 static void mrvl_rxq_info_get(struct rte_eth_dev *dev, uint16_t rx_queue_id,
1166                               struct rte_eth_rxq_info *qinfo)
1167 {
1168         struct mrvl_rxq *q = dev->data->rx_queues[rx_queue_id];
1169         struct mrvl_priv *priv = dev->data->dev_private;
1170         int inq = priv->rxq_map[rx_queue_id].inq;
1171         int tc = priv->rxq_map[rx_queue_id].tc;
1172         struct pp2_ppio_tc_params *tc_params =
1173                 &priv->ppio_params.inqs_params.tcs_params[tc];
1174
1175         qinfo->mp = q->mp;
1176         qinfo->nb_desc = tc_params->inqs_params[inq].size;
1177 }
1178
1179 /**
1180  * DPDK callback to get information about specific transmit queue.
1181  *
1182  * @param dev
1183  *   Pointer to Ethernet device structure.
1184  * @param tx_queue_id
1185  *   Transmit queue index.
1186  * @param qinfo
1187  *   Transmit queue information structure.
1188  */
1189 static void mrvl_txq_info_get(struct rte_eth_dev *dev, uint16_t tx_queue_id,
1190                               struct rte_eth_txq_info *qinfo)
1191 {
1192         struct mrvl_priv *priv = dev->data->dev_private;
1193
1194         qinfo->nb_desc =
1195                 priv->ppio_params.outqs_params.outqs_params[tx_queue_id].size;
1196 }
1197
1198 /**
1199  * DPDK callback to Configure a VLAN filter.
1200  *
1201  * @param dev
1202  *   Pointer to Ethernet device structure.
1203  * @param vlan_id
1204  *   VLAN ID to filter.
1205  * @param on
1206  *   Toggle filter.
1207  *
1208  * @return
1209  *   0 on success, negative error value otherwise.
1210  */
1211 static int
1212 mrvl_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1213 {
1214         struct mrvl_priv *priv = dev->data->dev_private;
1215
1216         if (!priv->ppio)
1217                 return -EPERM;
1218
1219         return on ? pp2_ppio_add_vlan(priv->ppio, vlan_id) :
1220                     pp2_ppio_remove_vlan(priv->ppio, vlan_id);
1221 }
1222
1223 /**
1224  * Release buffers to hardware bpool (buffer-pool)
1225  *
1226  * @param rxq
1227  *   Receive queue pointer.
1228  * @param num
1229  *   Number of buffers to release to bpool.
1230  *
1231  * @return
1232  *   0 on success, negative error value otherwise.
1233  */
1234 static int
1235 mrvl_fill_bpool(struct mrvl_rxq *rxq, int num)
1236 {
1237         struct buff_release_entry entries[MRVL_PP2_TXD_MAX];
1238         struct rte_mbuf *mbufs[MRVL_PP2_TXD_MAX];
1239         int i, ret;
1240         unsigned int core_id;
1241         struct pp2_hif *hif;
1242         struct pp2_bpool *bpool;
1243
1244         core_id = rte_lcore_id();
1245         if (core_id == LCORE_ID_ANY)
1246                 core_id = 0;
1247
1248         hif = mrvl_get_hif(rxq->priv, core_id);
1249         if (!hif)
1250                 return -1;
1251
1252         bpool = rxq->priv->bpool;
1253
1254         ret = rte_pktmbuf_alloc_bulk(rxq->mp, mbufs, num);
1255         if (ret)
1256                 return ret;
1257
1258         if (cookie_addr_high == MRVL_COOKIE_ADDR_INVALID)
1259                 cookie_addr_high =
1260                         (uint64_t)mbufs[0] & MRVL_COOKIE_HIGH_ADDR_MASK;
1261
1262         for (i = 0; i < num; i++) {
1263                 if (((uint64_t)mbufs[i] & MRVL_COOKIE_HIGH_ADDR_MASK)
1264                         != cookie_addr_high) {
1265                         RTE_LOG(ERR, PMD,
1266                                 "mbuf virtual addr high 0x%lx out of range\n",
1267                                 (uint64_t)mbufs[i] >> 32);
1268                         goto out;
1269                 }
1270
1271                 entries[i].buff.addr =
1272                         rte_mbuf_data_iova_default(mbufs[i]);
1273                 entries[i].buff.cookie = (pp2_cookie_t)(uint64_t)mbufs[i];
1274                 entries[i].bpool = bpool;
1275         }
1276
1277         pp2_bpool_put_buffs(hif, entries, (uint16_t *)&i);
1278         mrvl_port_bpool_size[bpool->pp2_id][bpool->id][core_id] += i;
1279
1280         if (i != num)
1281                 goto out;
1282
1283         return 0;
1284 out:
1285         for (; i < num; i++)
1286                 rte_pktmbuf_free(mbufs[i]);
1287
1288         return -1;
1289 }
1290
1291 /**
1292  * Check whether requested rx queue offloads match port offloads.
1293  *
1294  * @param
1295  *   dev Pointer to the device.
1296  * @param
1297  *   requested Bitmap of the requested offloads.
1298  *
1299  * @return
1300  *   1 if requested offloads are okay, 0 otherwise.
1301  */
1302 static int
1303 mrvl_rx_queue_offloads_okay(struct rte_eth_dev *dev, uint64_t requested)
1304 {
1305         uint64_t mandatory = dev->data->dev_conf.rxmode.offloads;
1306         uint64_t supported = MRVL_RX_OFFLOADS;
1307         uint64_t unsupported = requested & ~supported;
1308         uint64_t missing = mandatory & ~requested;
1309
1310         if (unsupported) {
1311                 RTE_LOG(ERR, PMD, "Some Rx offloads are not supported. "
1312                         "Requested 0x%" PRIx64 " supported 0x%" PRIx64 ".\n",
1313                         requested, supported);
1314                 return 0;
1315         }
1316
1317         if (missing) {
1318                 RTE_LOG(ERR, PMD, "Some Rx offloads are missing. "
1319                         "Requested 0x%" PRIx64 " missing 0x%" PRIx64 ".\n",
1320                         requested, missing);
1321                 return 0;
1322         }
1323
1324         return 1;
1325 }
1326
1327 /**
1328  * DPDK callback to configure the receive queue.
1329  *
1330  * @param dev
1331  *   Pointer to Ethernet device structure.
1332  * @param idx
1333  *   RX queue index.
1334  * @param desc
1335  *   Number of descriptors to configure in queue.
1336  * @param socket
1337  *   NUMA socket on which memory must be allocated.
1338  * @param conf
1339  *   Thresholds parameters.
1340  * @param mp
1341  *   Memory pool for buffer allocations.
1342  *
1343  * @return
1344  *   0 on success, negative error value otherwise.
1345  */
1346 static int
1347 mrvl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1348                     unsigned int socket,
1349                     const struct rte_eth_rxconf *conf,
1350                     struct rte_mempool *mp)
1351 {
1352         struct mrvl_priv *priv = dev->data->dev_private;
1353         struct mrvl_rxq *rxq;
1354         uint32_t min_size,
1355                  max_rx_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
1356         int ret, tc, inq;
1357
1358         if (!mrvl_rx_queue_offloads_okay(dev, conf->offloads))
1359                 return -ENOTSUP;
1360
1361         if (priv->rxq_map[idx].tc == MRVL_UNKNOWN_TC) {
1362                 /*
1363                  * Unknown TC mapping, mapping will not have a correct queue.
1364                  */
1365                 RTE_LOG(ERR, PMD, "Unknown TC mapping for queue %hu eth%hhu\n",
1366                         idx, priv->ppio_id);
1367                 return -EFAULT;
1368         }
1369
1370         min_size = rte_pktmbuf_data_room_size(mp) - RTE_PKTMBUF_HEADROOM -
1371                    MRVL_PKT_EFFEC_OFFS;
1372         if (min_size < max_rx_pkt_len) {
1373                 RTE_LOG(ERR, PMD,
1374                         "Mbuf size must be increased to %u bytes to hold up to %u bytes of data.\n",
1375                         max_rx_pkt_len + RTE_PKTMBUF_HEADROOM +
1376                         MRVL_PKT_EFFEC_OFFS,
1377                         max_rx_pkt_len);
1378                 return -EINVAL;
1379         }
1380
1381         if (dev->data->rx_queues[idx]) {
1382                 rte_free(dev->data->rx_queues[idx]);
1383                 dev->data->rx_queues[idx] = NULL;
1384         }
1385
1386         rxq = rte_zmalloc_socket("rxq", sizeof(*rxq), 0, socket);
1387         if (!rxq)
1388                 return -ENOMEM;
1389
1390         rxq->priv = priv;
1391         rxq->mp = mp;
1392         rxq->cksum_enabled =
1393                 dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_IPV4_CKSUM;
1394         rxq->queue_id = idx;
1395         rxq->port_id = dev->data->port_id;
1396         mrvl_port_to_bpool_lookup[rxq->port_id] = priv->bpool;
1397
1398         tc = priv->rxq_map[rxq->queue_id].tc,
1399         inq = priv->rxq_map[rxq->queue_id].inq;
1400         priv->ppio_params.inqs_params.tcs_params[tc].inqs_params[inq].size =
1401                 desc;
1402
1403         ret = mrvl_fill_bpool(rxq, desc);
1404         if (ret) {
1405                 rte_free(rxq);
1406                 return ret;
1407         }
1408
1409         priv->bpool_init_size += desc;
1410
1411         dev->data->rx_queues[idx] = rxq;
1412
1413         return 0;
1414 }
1415
1416 /**
1417  * DPDK callback to release the receive queue.
1418  *
1419  * @param rxq
1420  *   Generic receive queue pointer.
1421  */
1422 static void
1423 mrvl_rx_queue_release(void *rxq)
1424 {
1425         struct mrvl_rxq *q = rxq;
1426         struct pp2_ppio_tc_params *tc_params;
1427         int i, num, tc, inq;
1428         struct pp2_hif *hif;
1429         unsigned int core_id = rte_lcore_id();
1430
1431         if (core_id == LCORE_ID_ANY)
1432                 core_id = 0;
1433
1434         hif = mrvl_get_hif(q->priv, core_id);
1435
1436         if (!q || !hif)
1437                 return;
1438
1439         tc = q->priv->rxq_map[q->queue_id].tc;
1440         inq = q->priv->rxq_map[q->queue_id].inq;
1441         tc_params = &q->priv->ppio_params.inqs_params.tcs_params[tc];
1442         num = tc_params->inqs_params[inq].size;
1443         for (i = 0; i < num; i++) {
1444                 struct pp2_buff_inf inf;
1445                 uint64_t addr;
1446
1447                 pp2_bpool_get_buff(hif, q->priv->bpool, &inf);
1448                 addr = cookie_addr_high | inf.cookie;
1449                 rte_pktmbuf_free((struct rte_mbuf *)addr);
1450         }
1451
1452         rte_free(q);
1453 }
1454
1455 /**
1456  * Check whether requested tx queue offloads match port offloads.
1457  *
1458  * @param
1459  *   dev Pointer to the device.
1460  * @param
1461  *   requested Bitmap of the requested offloads.
1462  *
1463  * @return
1464  *   1 if requested offloads are okay, 0 otherwise.
1465  */
1466 static int
1467 mrvl_tx_queue_offloads_okay(struct rte_eth_dev *dev, uint64_t requested)
1468 {
1469         uint64_t mandatory = dev->data->dev_conf.txmode.offloads;
1470         uint64_t supported = MRVL_TX_OFFLOADS;
1471         uint64_t unsupported = requested & ~supported;
1472         uint64_t missing = mandatory & ~requested;
1473
1474         if (unsupported) {
1475                 RTE_LOG(ERR, PMD, "Some Rx offloads are not supported. "
1476                         "Requested 0x%" PRIx64 " supported 0x%" PRIx64 ".\n",
1477                         requested, supported);
1478                 return 0;
1479         }
1480
1481         if (missing) {
1482                 RTE_LOG(ERR, PMD, "Some Rx offloads are missing. "
1483                         "Requested 0x%" PRIx64 " missing 0x%" PRIx64 ".\n",
1484                         requested, missing);
1485                 return 0;
1486         }
1487
1488         return 1;
1489 }
1490
1491 /**
1492  * DPDK callback to configure the transmit queue.
1493  *
1494  * @param dev
1495  *   Pointer to Ethernet device structure.
1496  * @param idx
1497  *   Transmit queue index.
1498  * @param desc
1499  *   Number of descriptors to configure in the queue.
1500  * @param socket
1501  *   NUMA socket on which memory must be allocated.
1502  * @param conf
1503  *   Thresholds parameters.
1504  *
1505  * @return
1506  *   0 on success, negative error value otherwise.
1507  */
1508 static int
1509 mrvl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1510                     unsigned int socket,
1511                     const struct rte_eth_txconf *conf)
1512 {
1513         struct mrvl_priv *priv = dev->data->dev_private;
1514         struct mrvl_txq *txq;
1515
1516         if (!mrvl_tx_queue_offloads_okay(dev, conf->offloads))
1517                 return -ENOTSUP;
1518
1519         if (dev->data->tx_queues[idx]) {
1520                 rte_free(dev->data->tx_queues[idx]);
1521                 dev->data->tx_queues[idx] = NULL;
1522         }
1523
1524         txq = rte_zmalloc_socket("txq", sizeof(*txq), 0, socket);
1525         if (!txq)
1526                 return -ENOMEM;
1527
1528         txq->priv = priv;
1529         txq->queue_id = idx;
1530         txq->port_id = dev->data->port_id;
1531         dev->data->tx_queues[idx] = txq;
1532
1533         priv->ppio_params.outqs_params.outqs_params[idx].size = desc;
1534         priv->ppio_params.outqs_params.outqs_params[idx].weight = 1;
1535
1536         return 0;
1537 }
1538
1539 /**
1540  * DPDK callback to release the transmit queue.
1541  *
1542  * @param txq
1543  *   Generic transmit queue pointer.
1544  */
1545 static void
1546 mrvl_tx_queue_release(void *txq)
1547 {
1548         struct mrvl_txq *q = txq;
1549
1550         if (!q)
1551                 return;
1552
1553         rte_free(q);
1554 }
1555
1556 /**
1557  * Update RSS hash configuration
1558  *
1559  * @param dev
1560  *   Pointer to Ethernet device structure.
1561  * @param rss_conf
1562  *   Pointer to RSS configuration.
1563  *
1564  * @return
1565  *   0 on success, negative error value otherwise.
1566  */
1567 static int
1568 mrvl_rss_hash_update(struct rte_eth_dev *dev,
1569                      struct rte_eth_rss_conf *rss_conf)
1570 {
1571         struct mrvl_priv *priv = dev->data->dev_private;
1572
1573         return mrvl_configure_rss(priv, rss_conf);
1574 }
1575
1576 /**
1577  * DPDK callback to get RSS hash configuration.
1578  *
1579  * @param dev
1580  *   Pointer to Ethernet device structure.
1581  * @rss_conf
1582  *   Pointer to RSS configuration.
1583  *
1584  * @return
1585  *   Always 0.
1586  */
1587 static int
1588 mrvl_rss_hash_conf_get(struct rte_eth_dev *dev,
1589                        struct rte_eth_rss_conf *rss_conf)
1590 {
1591         struct mrvl_priv *priv = dev->data->dev_private;
1592         enum pp2_ppio_hash_type hash_type =
1593                 priv->ppio_params.inqs_params.hash_type;
1594
1595         rss_conf->rss_key = NULL;
1596
1597         if (hash_type == PP2_PPIO_HASH_T_NONE)
1598                 rss_conf->rss_hf = 0;
1599         else if (hash_type == PP2_PPIO_HASH_T_2_TUPLE)
1600                 rss_conf->rss_hf = ETH_RSS_IPV4;
1601         else if (hash_type == PP2_PPIO_HASH_T_5_TUPLE && priv->rss_hf_tcp)
1602                 rss_conf->rss_hf = ETH_RSS_NONFRAG_IPV4_TCP;
1603         else if (hash_type == PP2_PPIO_HASH_T_5_TUPLE && !priv->rss_hf_tcp)
1604                 rss_conf->rss_hf = ETH_RSS_NONFRAG_IPV4_UDP;
1605
1606         return 0;
1607 }
1608
1609 static const struct eth_dev_ops mrvl_ops = {
1610         .dev_configure = mrvl_dev_configure,
1611         .dev_start = mrvl_dev_start,
1612         .dev_stop = mrvl_dev_stop,
1613         .dev_set_link_up = mrvl_dev_set_link_up,
1614         .dev_set_link_down = mrvl_dev_set_link_down,
1615         .dev_close = mrvl_dev_close,
1616         .link_update = mrvl_link_update,
1617         .promiscuous_enable = mrvl_promiscuous_enable,
1618         .allmulticast_enable = mrvl_allmulticast_enable,
1619         .promiscuous_disable = mrvl_promiscuous_disable,
1620         .allmulticast_disable = mrvl_allmulticast_disable,
1621         .mac_addr_remove = mrvl_mac_addr_remove,
1622         .mac_addr_add = mrvl_mac_addr_add,
1623         .mac_addr_set = mrvl_mac_addr_set,
1624         .mtu_set = mrvl_mtu_set,
1625         .stats_get = mrvl_stats_get,
1626         .stats_reset = mrvl_stats_reset,
1627         .dev_infos_get = mrvl_dev_infos_get,
1628         .dev_supported_ptypes_get = mrvl_dev_supported_ptypes_get,
1629         .rxq_info_get = mrvl_rxq_info_get,
1630         .txq_info_get = mrvl_txq_info_get,
1631         .vlan_filter_set = mrvl_vlan_filter_set,
1632         .rx_queue_setup = mrvl_rx_queue_setup,
1633         .rx_queue_release = mrvl_rx_queue_release,
1634         .tx_queue_setup = mrvl_tx_queue_setup,
1635         .tx_queue_release = mrvl_tx_queue_release,
1636         .rss_hash_update = mrvl_rss_hash_update,
1637         .rss_hash_conf_get = mrvl_rss_hash_conf_get,
1638 };
1639
1640 /**
1641  * Return packet type information and l3/l4 offsets.
1642  *
1643  * @param desc
1644  *   Pointer to the received packet descriptor.
1645  * @param l3_offset
1646  *   l3 packet offset.
1647  * @param l4_offset
1648  *   l4 packet offset.
1649  *
1650  * @return
1651  *   Packet type information.
1652  */
1653 static inline uint64_t
1654 mrvl_desc_to_packet_type_and_offset(struct pp2_ppio_desc *desc,
1655                                     uint8_t *l3_offset, uint8_t *l4_offset)
1656 {
1657         enum pp2_inq_l3_type l3_type;
1658         enum pp2_inq_l4_type l4_type;
1659         uint64_t packet_type;
1660
1661         pp2_ppio_inq_desc_get_l3_info(desc, &l3_type, l3_offset);
1662         pp2_ppio_inq_desc_get_l4_info(desc, &l4_type, l4_offset);
1663
1664         packet_type = RTE_PTYPE_L2_ETHER;
1665
1666         switch (l3_type) {
1667         case PP2_INQ_L3_TYPE_IPV4_NO_OPTS:
1668                 packet_type |= RTE_PTYPE_L3_IPV4;
1669                 break;
1670         case PP2_INQ_L3_TYPE_IPV4_OK:
1671                 packet_type |= RTE_PTYPE_L3_IPV4_EXT;
1672                 break;
1673         case PP2_INQ_L3_TYPE_IPV4_TTL_ZERO:
1674                 packet_type |= RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
1675                 break;
1676         case PP2_INQ_L3_TYPE_IPV6_NO_EXT:
1677                 packet_type |= RTE_PTYPE_L3_IPV6;
1678                 break;
1679         case PP2_INQ_L3_TYPE_IPV6_EXT:
1680                 packet_type |= RTE_PTYPE_L3_IPV6_EXT;
1681                 break;
1682         case PP2_INQ_L3_TYPE_ARP:
1683                 packet_type |= RTE_PTYPE_L2_ETHER_ARP;
1684                 /*
1685                  * In case of ARP l4_offset is set to wrong value.
1686                  * Set it to proper one so that later on mbuf->l3_len can be
1687                  * calculated subtracting l4_offset and l3_offset.
1688                  */
1689                 *l4_offset = *l3_offset + MRVL_ARP_LENGTH;
1690                 break;
1691         default:
1692                 RTE_LOG(DEBUG, PMD, "Failed to recognise l3 packet type\n");
1693                 break;
1694         }
1695
1696         switch (l4_type) {
1697         case PP2_INQ_L4_TYPE_TCP:
1698                 packet_type |= RTE_PTYPE_L4_TCP;
1699                 break;
1700         case PP2_INQ_L4_TYPE_UDP:
1701                 packet_type |= RTE_PTYPE_L4_UDP;
1702                 break;
1703         default:
1704                 RTE_LOG(DEBUG, PMD, "Failed to recognise l4 packet type\n");
1705                 break;
1706         }
1707
1708         return packet_type;
1709 }
1710
1711 /**
1712  * Get offload information from the received packet descriptor.
1713  *
1714  * @param desc
1715  *   Pointer to the received packet descriptor.
1716  *
1717  * @return
1718  *   Mbuf offload flags.
1719  */
1720 static inline uint64_t
1721 mrvl_desc_to_ol_flags(struct pp2_ppio_desc *desc)
1722 {
1723         uint64_t flags;
1724         enum pp2_inq_desc_status status;
1725
1726         status = pp2_ppio_inq_desc_get_l3_pkt_error(desc);
1727         if (unlikely(status != PP2_DESC_ERR_OK))
1728                 flags = PKT_RX_IP_CKSUM_BAD;
1729         else
1730                 flags = PKT_RX_IP_CKSUM_GOOD;
1731
1732         status = pp2_ppio_inq_desc_get_l4_pkt_error(desc);
1733         if (unlikely(status != PP2_DESC_ERR_OK))
1734                 flags |= PKT_RX_L4_CKSUM_BAD;
1735         else
1736                 flags |= PKT_RX_L4_CKSUM_GOOD;
1737
1738         return flags;
1739 }
1740
1741 /**
1742  * DPDK callback for receive.
1743  *
1744  * @param rxq
1745  *   Generic pointer to the receive queue.
1746  * @param rx_pkts
1747  *   Array to store received packets.
1748  * @param nb_pkts
1749  *   Maximum number of packets in array.
1750  *
1751  * @return
1752  *   Number of packets successfully received.
1753  */
1754 static uint16_t
1755 mrvl_rx_pkt_burst(void *rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
1756 {
1757         struct mrvl_rxq *q = rxq;
1758         struct pp2_ppio_desc descs[nb_pkts];
1759         struct pp2_bpool *bpool;
1760         int i, ret, rx_done = 0;
1761         int num;
1762         struct pp2_hif *hif;
1763         unsigned int core_id = rte_lcore_id();
1764
1765         hif = mrvl_get_hif(q->priv, core_id);
1766
1767         if (unlikely(!q->priv->ppio || !hif))
1768                 return 0;
1769
1770         bpool = q->priv->bpool;
1771
1772         ret = pp2_ppio_recv(q->priv->ppio, q->priv->rxq_map[q->queue_id].tc,
1773                             q->priv->rxq_map[q->queue_id].inq, descs, &nb_pkts);
1774         if (unlikely(ret < 0)) {
1775                 RTE_LOG(ERR, PMD, "Failed to receive packets\n");
1776                 return 0;
1777         }
1778         mrvl_port_bpool_size[bpool->pp2_id][bpool->id][core_id] -= nb_pkts;
1779
1780         for (i = 0; i < nb_pkts; i++) {
1781                 struct rte_mbuf *mbuf;
1782                 uint8_t l3_offset, l4_offset;
1783                 enum pp2_inq_desc_status status;
1784                 uint64_t addr;
1785
1786                 if (likely(nb_pkts - i > MRVL_MUSDK_PREFETCH_SHIFT)) {
1787                         struct pp2_ppio_desc *pref_desc;
1788                         u64 pref_addr;
1789
1790                         pref_desc = &descs[i + MRVL_MUSDK_PREFETCH_SHIFT];
1791                         pref_addr = cookie_addr_high |
1792                                     pp2_ppio_inq_desc_get_cookie(pref_desc);
1793                         rte_mbuf_prefetch_part1((struct rte_mbuf *)(pref_addr));
1794                         rte_mbuf_prefetch_part2((struct rte_mbuf *)(pref_addr));
1795                 }
1796
1797                 addr = cookie_addr_high |
1798                        pp2_ppio_inq_desc_get_cookie(&descs[i]);
1799                 mbuf = (struct rte_mbuf *)addr;
1800                 rte_pktmbuf_reset(mbuf);
1801
1802                 /* drop packet in case of mac, overrun or resource error */
1803                 status = pp2_ppio_inq_desc_get_l2_pkt_error(&descs[i]);
1804                 if (unlikely(status != PP2_DESC_ERR_OK)) {
1805                         struct pp2_buff_inf binf = {
1806                                 .addr = rte_mbuf_data_iova_default(mbuf),
1807                                 .cookie = (pp2_cookie_t)(uint64_t)mbuf,
1808                         };
1809
1810                         pp2_bpool_put_buff(hif, bpool, &binf);
1811                         mrvl_port_bpool_size
1812                                 [bpool->pp2_id][bpool->id][core_id]++;
1813                         q->drop_mac++;
1814                         continue;
1815                 }
1816
1817                 mbuf->data_off += MRVL_PKT_EFFEC_OFFS;
1818                 mbuf->pkt_len = pp2_ppio_inq_desc_get_pkt_len(&descs[i]);
1819                 mbuf->data_len = mbuf->pkt_len;
1820                 mbuf->port = q->port_id;
1821                 mbuf->packet_type =
1822                         mrvl_desc_to_packet_type_and_offset(&descs[i],
1823                                                             &l3_offset,
1824                                                             &l4_offset);
1825                 mbuf->l2_len = l3_offset;
1826                 mbuf->l3_len = l4_offset - l3_offset;
1827
1828                 if (likely(q->cksum_enabled))
1829                         mbuf->ol_flags = mrvl_desc_to_ol_flags(&descs[i]);
1830
1831                 rx_pkts[rx_done++] = mbuf;
1832                 q->bytes_recv += mbuf->pkt_len;
1833         }
1834
1835         if (rte_spinlock_trylock(&q->priv->lock) == 1) {
1836                 num = mrvl_get_bpool_size(bpool->pp2_id, bpool->id);
1837
1838                 if (unlikely(num <= q->priv->bpool_min_size ||
1839                              (!rx_done && num < q->priv->bpool_init_size))) {
1840                         ret = mrvl_fill_bpool(q, MRVL_BURST_SIZE);
1841                         if (ret)
1842                                 RTE_LOG(ERR, PMD, "Failed to fill bpool\n");
1843                 } else if (unlikely(num > q->priv->bpool_max_size)) {
1844                         int i;
1845                         int pkt_to_remove = num - q->priv->bpool_init_size;
1846                         struct rte_mbuf *mbuf;
1847                         struct pp2_buff_inf buff;
1848
1849                         RTE_LOG(DEBUG, PMD,
1850                                 "\nport-%d:%d: bpool %d oversize - remove %d buffers (pool size: %d -> %d)\n",
1851                                 bpool->pp2_id, q->priv->ppio->port_id,
1852                                 bpool->id, pkt_to_remove, num,
1853                                 q->priv->bpool_init_size);
1854
1855                         for (i = 0; i < pkt_to_remove; i++) {
1856                                 ret = pp2_bpool_get_buff(hif, bpool, &buff);
1857                                 if (ret)
1858                                         break;
1859                                 mbuf = (struct rte_mbuf *)
1860                                         (cookie_addr_high | buff.cookie);
1861                                 rte_pktmbuf_free(mbuf);
1862                         }
1863                         mrvl_port_bpool_size
1864                                 [bpool->pp2_id][bpool->id][core_id] -= i;
1865                 }
1866                 rte_spinlock_unlock(&q->priv->lock);
1867         }
1868
1869         return rx_done;
1870 }
1871
1872 /**
1873  * Prepare offload information.
1874  *
1875  * @param ol_flags
1876  *   Offload flags.
1877  * @param packet_type
1878  *   Packet type bitfield.
1879  * @param l3_type
1880  *   Pointer to the pp2_ouq_l3_type structure.
1881  * @param l4_type
1882  *   Pointer to the pp2_outq_l4_type structure.
1883  * @param gen_l3_cksum
1884  *   Will be set to 1 in case l3 checksum is computed.
1885  * @param l4_cksum
1886  *   Will be set to 1 in case l4 checksum is computed.
1887  *
1888  * @return
1889  *   0 on success, negative error value otherwise.
1890  */
1891 static inline int
1892 mrvl_prepare_proto_info(uint64_t ol_flags, uint32_t packet_type,
1893                         enum pp2_outq_l3_type *l3_type,
1894                         enum pp2_outq_l4_type *l4_type,
1895                         int *gen_l3_cksum,
1896                         int *gen_l4_cksum)
1897 {
1898         /*
1899          * Based on ol_flags prepare information
1900          * for pp2_ppio_outq_desc_set_proto_info() which setups descriptor
1901          * for offloading.
1902          */
1903         if (ol_flags & PKT_TX_IPV4) {
1904                 *l3_type = PP2_OUTQ_L3_TYPE_IPV4;
1905                 *gen_l3_cksum = ol_flags & PKT_TX_IP_CKSUM ? 1 : 0;
1906         } else if (ol_flags & PKT_TX_IPV6) {
1907                 *l3_type = PP2_OUTQ_L3_TYPE_IPV6;
1908                 /* no checksum for ipv6 header */
1909                 *gen_l3_cksum = 0;
1910         } else {
1911                 /* if something different then stop processing */
1912                 return -1;
1913         }
1914
1915         ol_flags &= PKT_TX_L4_MASK;
1916         if ((packet_type & RTE_PTYPE_L4_TCP) &&
1917             ol_flags == PKT_TX_TCP_CKSUM) {
1918                 *l4_type = PP2_OUTQ_L4_TYPE_TCP;
1919                 *gen_l4_cksum = 1;
1920         } else if ((packet_type & RTE_PTYPE_L4_UDP) &&
1921                    ol_flags == PKT_TX_UDP_CKSUM) {
1922                 *l4_type = PP2_OUTQ_L4_TYPE_UDP;
1923                 *gen_l4_cksum = 1;
1924         } else {
1925                 *l4_type = PP2_OUTQ_L4_TYPE_OTHER;
1926                 /* no checksum for other type */
1927                 *gen_l4_cksum = 0;
1928         }
1929
1930         return 0;
1931 }
1932
1933 /**
1934  * Release already sent buffers to bpool (buffer-pool).
1935  *
1936  * @param ppio
1937  *   Pointer to the port structure.
1938  * @param hif
1939  *   Pointer to the MUSDK hardware interface.
1940  * @param sq
1941  *   Pointer to the shadow queue.
1942  * @param qid
1943  *   Queue id number.
1944  * @param force
1945  *   Force releasing packets.
1946  */
1947 static inline void
1948 mrvl_free_sent_buffers(struct pp2_ppio *ppio, struct pp2_hif *hif,
1949                        unsigned int core_id, struct mrvl_shadow_txq *sq,
1950                        int qid, int force)
1951 {
1952         struct buff_release_entry *entry;
1953         uint16_t nb_done = 0, num = 0, skip_bufs = 0;
1954         int i;
1955
1956         pp2_ppio_get_num_outq_done(ppio, hif, qid, &nb_done);
1957
1958         sq->num_to_release += nb_done;
1959
1960         if (likely(!force &&
1961                    sq->num_to_release < MRVL_PP2_BUF_RELEASE_BURST_SIZE))
1962                 return;
1963
1964         nb_done = sq->num_to_release;
1965         sq->num_to_release = 0;
1966
1967         for (i = 0; i < nb_done; i++) {
1968                 entry = &sq->ent[sq->tail + num];
1969                 if (unlikely(!entry->buff.addr)) {
1970                         RTE_LOG(ERR, PMD,
1971                                 "Shadow memory @%d: cookie(%lx), pa(%lx)!\n",
1972                                 sq->tail, (u64)entry->buff.cookie,
1973                                 (u64)entry->buff.addr);
1974                         skip_bufs = 1;
1975                         goto skip;
1976                 }
1977
1978                 if (unlikely(!entry->bpool)) {
1979                         struct rte_mbuf *mbuf;
1980
1981                         mbuf = (struct rte_mbuf *)
1982                                (cookie_addr_high | entry->buff.cookie);
1983                         rte_pktmbuf_free(mbuf);
1984                         skip_bufs = 1;
1985                         goto skip;
1986                 }
1987
1988                 mrvl_port_bpool_size
1989                         [entry->bpool->pp2_id][entry->bpool->id][core_id]++;
1990                 num++;
1991                 if (unlikely(sq->tail + num == MRVL_PP2_TX_SHADOWQ_SIZE))
1992                         goto skip;
1993                 continue;
1994 skip:
1995                 if (likely(num))
1996                         pp2_bpool_put_buffs(hif, &sq->ent[sq->tail], &num);
1997                 num += skip_bufs;
1998                 sq->tail = (sq->tail + num) & MRVL_PP2_TX_SHADOWQ_MASK;
1999                 sq->size -= num;
2000                 num = 0;
2001                 skip_bufs = 0;
2002         }
2003
2004         if (likely(num)) {
2005                 pp2_bpool_put_buffs(hif, &sq->ent[sq->tail], &num);
2006                 sq->tail = (sq->tail + num) & MRVL_PP2_TX_SHADOWQ_MASK;
2007                 sq->size -= num;
2008         }
2009 }
2010
2011 /**
2012  * DPDK callback for transmit.
2013  *
2014  * @param txq
2015  *   Generic pointer transmit queue.
2016  * @param tx_pkts
2017  *   Packets to transmit.
2018  * @param nb_pkts
2019  *   Number of packets in array.
2020  *
2021  * @return
2022  *   Number of packets successfully transmitted.
2023  */
2024 static uint16_t
2025 mrvl_tx_pkt_burst(void *txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
2026 {
2027         struct mrvl_txq *q = txq;
2028         struct mrvl_shadow_txq *sq;
2029         struct pp2_hif *hif;
2030         struct pp2_ppio_desc descs[nb_pkts];
2031         unsigned int core_id = rte_lcore_id();
2032         int i, ret, bytes_sent = 0;
2033         uint16_t num, sq_free_size;
2034         uint64_t addr;
2035
2036         hif = mrvl_get_hif(q->priv, core_id);
2037         sq = &q->shadow_txqs[core_id];
2038
2039         if (unlikely(!q->priv->ppio || !hif))
2040                 return 0;
2041
2042         if (sq->size)
2043                 mrvl_free_sent_buffers(q->priv->ppio, hif, core_id,
2044                                        sq, q->queue_id, 0);
2045
2046         sq_free_size = MRVL_PP2_TX_SHADOWQ_SIZE - sq->size - 1;
2047         if (unlikely(nb_pkts > sq_free_size)) {
2048                 RTE_LOG(DEBUG, PMD,
2049                         "No room in shadow queue for %d packets! %d packets will be sent.\n",
2050                         nb_pkts, sq_free_size);
2051                 nb_pkts = sq_free_size;
2052         }
2053
2054         for (i = 0; i < nb_pkts; i++) {
2055                 struct rte_mbuf *mbuf = tx_pkts[i];
2056                 int gen_l3_cksum, gen_l4_cksum;
2057                 enum pp2_outq_l3_type l3_type;
2058                 enum pp2_outq_l4_type l4_type;
2059
2060                 if (likely(nb_pkts - i > MRVL_MUSDK_PREFETCH_SHIFT)) {
2061                         struct rte_mbuf *pref_pkt_hdr;
2062
2063                         pref_pkt_hdr = tx_pkts[i + MRVL_MUSDK_PREFETCH_SHIFT];
2064                         rte_mbuf_prefetch_part1(pref_pkt_hdr);
2065                         rte_mbuf_prefetch_part2(pref_pkt_hdr);
2066                 }
2067
2068                 sq->ent[sq->head].buff.cookie = (pp2_cookie_t)(uint64_t)mbuf;
2069                 sq->ent[sq->head].buff.addr =
2070                         rte_mbuf_data_iova_default(mbuf);
2071                 sq->ent[sq->head].bpool =
2072                         (unlikely(mbuf->port >= RTE_MAX_ETHPORTS ||
2073                          mbuf->refcnt > 1)) ? NULL :
2074                          mrvl_port_to_bpool_lookup[mbuf->port];
2075                 sq->head = (sq->head + 1) & MRVL_PP2_TX_SHADOWQ_MASK;
2076                 sq->size++;
2077
2078                 pp2_ppio_outq_desc_reset(&descs[i]);
2079                 pp2_ppio_outq_desc_set_phys_addr(&descs[i],
2080                                                  rte_pktmbuf_iova(mbuf));
2081                 pp2_ppio_outq_desc_set_pkt_offset(&descs[i], 0);
2082                 pp2_ppio_outq_desc_set_pkt_len(&descs[i],
2083                                                rte_pktmbuf_pkt_len(mbuf));
2084
2085                 bytes_sent += rte_pktmbuf_pkt_len(mbuf);
2086                 /*
2087                  * in case unsupported ol_flags were passed
2088                  * do not update descriptor offload information
2089                  */
2090                 ret = mrvl_prepare_proto_info(mbuf->ol_flags, mbuf->packet_type,
2091                                               &l3_type, &l4_type, &gen_l3_cksum,
2092                                               &gen_l4_cksum);
2093                 if (unlikely(ret))
2094                         continue;
2095
2096                 pp2_ppio_outq_desc_set_proto_info(&descs[i], l3_type, l4_type,
2097                                                   mbuf->l2_len,
2098                                                   mbuf->l2_len + mbuf->l3_len,
2099                                                   gen_l3_cksum, gen_l4_cksum);
2100         }
2101
2102         num = nb_pkts;
2103         pp2_ppio_send(q->priv->ppio, hif, q->queue_id, descs, &nb_pkts);
2104         /* number of packets that were not sent */
2105         if (unlikely(num > nb_pkts)) {
2106                 for (i = nb_pkts; i < num; i++) {
2107                         sq->head = (MRVL_PP2_TX_SHADOWQ_SIZE + sq->head - 1) &
2108                                 MRVL_PP2_TX_SHADOWQ_MASK;
2109                         addr = cookie_addr_high | sq->ent[sq->head].buff.cookie;
2110                         bytes_sent -=
2111                                 rte_pktmbuf_pkt_len((struct rte_mbuf *)addr);
2112                 }
2113                 sq->size -= num - nb_pkts;
2114         }
2115
2116         q->bytes_sent += bytes_sent;
2117
2118         return nb_pkts;
2119 }
2120
2121 /**
2122  * Initialize packet processor.
2123  *
2124  * @return
2125  *   0 on success, negative error value otherwise.
2126  */
2127 static int
2128 mrvl_init_pp2(void)
2129 {
2130         struct pp2_init_params init_params;
2131
2132         memset(&init_params, 0, sizeof(init_params));
2133         init_params.hif_reserved_map = MRVL_MUSDK_HIFS_RESERVED;
2134         init_params.bm_pool_reserved_map = MRVL_MUSDK_BPOOLS_RESERVED;
2135         init_params.rss_tbl_reserved_map = MRVL_MUSDK_RSS_RESERVED;
2136
2137         return pp2_init(&init_params);
2138 }
2139
2140 /**
2141  * Deinitialize packet processor.
2142  *
2143  * @return
2144  *   0 on success, negative error value otherwise.
2145  */
2146 static void
2147 mrvl_deinit_pp2(void)
2148 {
2149         pp2_deinit();
2150 }
2151
2152 /**
2153  * Create private device structure.
2154  *
2155  * @param dev_name
2156  *   Pointer to the port name passed in the initialization parameters.
2157  *
2158  * @return
2159  *   Pointer to the newly allocated private device structure.
2160  */
2161 static struct mrvl_priv *
2162 mrvl_priv_create(const char *dev_name)
2163 {
2164         struct pp2_bpool_params bpool_params;
2165         char match[MRVL_MATCH_LEN];
2166         struct mrvl_priv *priv;
2167         int ret, bpool_bit;
2168
2169         priv = rte_zmalloc_socket(dev_name, sizeof(*priv), 0, rte_socket_id());
2170         if (!priv)
2171                 return NULL;
2172
2173         ret = pp2_netdev_get_ppio_info((char *)(uintptr_t)dev_name,
2174                                        &priv->pp_id, &priv->ppio_id);
2175         if (ret)
2176                 goto out_free_priv;
2177
2178         bpool_bit = mrvl_reserve_bit(&used_bpools[priv->pp_id],
2179                                      PP2_BPOOL_NUM_POOLS);
2180         if (bpool_bit < 0)
2181                 goto out_free_priv;
2182         priv->bpool_bit = bpool_bit;
2183
2184         snprintf(match, sizeof(match), "pool-%d:%d", priv->pp_id,
2185                  priv->bpool_bit);
2186         memset(&bpool_params, 0, sizeof(bpool_params));
2187         bpool_params.match = match;
2188         bpool_params.buff_len = MRVL_PKT_SIZE_MAX + MRVL_PKT_EFFEC_OFFS;
2189         ret = pp2_bpool_init(&bpool_params, &priv->bpool);
2190         if (ret)
2191                 goto out_clear_bpool_bit;
2192
2193         priv->ppio_params.type = PP2_PPIO_T_NIC;
2194         rte_spinlock_init(&priv->lock);
2195
2196         return priv;
2197 out_clear_bpool_bit:
2198         used_bpools[priv->pp_id] &= ~(1 << priv->bpool_bit);
2199 out_free_priv:
2200         rte_free(priv);
2201         return NULL;
2202 }
2203
2204 /**
2205  * Create device representing Ethernet port.
2206  *
2207  * @param name
2208  *   Pointer to the port's name.
2209  *
2210  * @return
2211  *   0 on success, negative error value otherwise.
2212  */
2213 static int
2214 mrvl_eth_dev_create(struct rte_vdev_device *vdev, const char *name)
2215 {
2216         int ret, fd = socket(AF_INET, SOCK_DGRAM, 0);
2217         struct rte_eth_dev *eth_dev;
2218         struct mrvl_priv *priv;
2219         struct ifreq req;
2220
2221         eth_dev = rte_eth_dev_allocate(name);
2222         if (!eth_dev)
2223                 return -ENOMEM;
2224
2225         priv = mrvl_priv_create(name);
2226         if (!priv) {
2227                 ret = -ENOMEM;
2228                 goto out_free_dev;
2229         }
2230
2231         eth_dev->data->mac_addrs =
2232                 rte_zmalloc("mac_addrs",
2233                             ETHER_ADDR_LEN * MRVL_MAC_ADDRS_MAX, 0);
2234         if (!eth_dev->data->mac_addrs) {
2235                 RTE_LOG(ERR, PMD, "Failed to allocate space for eth addrs\n");
2236                 ret = -ENOMEM;
2237                 goto out_free_priv;
2238         }
2239
2240         memset(&req, 0, sizeof(req));
2241         strcpy(req.ifr_name, name);
2242         ret = ioctl(fd, SIOCGIFHWADDR, &req);
2243         if (ret)
2244                 goto out_free_mac;
2245
2246         memcpy(eth_dev->data->mac_addrs[0].addr_bytes,
2247                req.ifr_addr.sa_data, ETHER_ADDR_LEN);
2248
2249         eth_dev->rx_pkt_burst = mrvl_rx_pkt_burst;
2250         eth_dev->tx_pkt_burst = mrvl_tx_pkt_burst;
2251         eth_dev->data->kdrv = RTE_KDRV_NONE;
2252         eth_dev->data->dev_private = priv;
2253         eth_dev->device = &vdev->device;
2254         eth_dev->dev_ops = &mrvl_ops;
2255
2256         return 0;
2257 out_free_mac:
2258         rte_free(eth_dev->data->mac_addrs);
2259 out_free_dev:
2260         rte_eth_dev_release_port(eth_dev);
2261 out_free_priv:
2262         rte_free(priv);
2263
2264         return ret;
2265 }
2266
2267 /**
2268  * Cleanup previously created device representing Ethernet port.
2269  *
2270  * @param name
2271  *   Pointer to the port name.
2272  */
2273 static void
2274 mrvl_eth_dev_destroy(const char *name)
2275 {
2276         struct rte_eth_dev *eth_dev;
2277         struct mrvl_priv *priv;
2278
2279         eth_dev = rte_eth_dev_allocated(name);
2280         if (!eth_dev)
2281                 return;
2282
2283         priv = eth_dev->data->dev_private;
2284         pp2_bpool_deinit(priv->bpool);
2285         used_bpools[priv->pp_id] &= ~(1 << priv->bpool_bit);
2286         rte_free(priv);
2287         rte_free(eth_dev->data->mac_addrs);
2288         rte_eth_dev_release_port(eth_dev);
2289 }
2290
2291 /**
2292  * Callback used by rte_kvargs_process() during argument parsing.
2293  *
2294  * @param key
2295  *   Pointer to the parsed key (unused).
2296  * @param value
2297  *   Pointer to the parsed value.
2298  * @param extra_args
2299  *   Pointer to the extra arguments which contains address of the
2300  *   table of pointers to parsed interface names.
2301  *
2302  * @return
2303  *   Always 0.
2304  */
2305 static int
2306 mrvl_get_ifnames(const char *key __rte_unused, const char *value,
2307                  void *extra_args)
2308 {
2309         struct mrvl_ifnames *ifnames = extra_args;
2310
2311         ifnames->names[ifnames->idx++] = value;
2312
2313         return 0;
2314 }
2315
2316 /**
2317  * Deinitialize per-lcore MUSDK hardware interfaces (hifs).
2318  */
2319 static void
2320 mrvl_deinit_hifs(void)
2321 {
2322         int i;
2323
2324         for (i = mrvl_lcore_first; i <= mrvl_lcore_last; i++) {
2325                 if (hifs[i])
2326                         pp2_hif_deinit(hifs[i]);
2327         }
2328         used_hifs = MRVL_MUSDK_HIFS_RESERVED;
2329         memset(hifs, 0, sizeof(hifs));
2330 }
2331
2332 /**
2333  * DPDK callback to register the virtual device.
2334  *
2335  * @param vdev
2336  *   Pointer to the virtual device.
2337  *
2338  * @return
2339  *   0 on success, negative error value otherwise.
2340  */
2341 static int
2342 rte_pmd_mrvl_probe(struct rte_vdev_device *vdev)
2343 {
2344         struct rte_kvargs *kvlist;
2345         struct mrvl_ifnames ifnames;
2346         int ret = -EINVAL;
2347         uint32_t i, ifnum, cfgnum;
2348         const char *params;
2349
2350         params = rte_vdev_device_args(vdev);
2351         if (!params)
2352                 return -EINVAL;
2353
2354         kvlist = rte_kvargs_parse(params, valid_args);
2355         if (!kvlist)
2356                 return -EINVAL;
2357
2358         ifnum = rte_kvargs_count(kvlist, MRVL_IFACE_NAME_ARG);
2359         if (ifnum > RTE_DIM(ifnames.names))
2360                 goto out_free_kvlist;
2361
2362         ifnames.idx = 0;
2363         rte_kvargs_process(kvlist, MRVL_IFACE_NAME_ARG,
2364                            mrvl_get_ifnames, &ifnames);
2365
2366
2367         /*
2368          * The below system initialization should be done only once,
2369          * on the first provided configuration file
2370          */
2371         if (!mrvl_qos_cfg) {
2372                 cfgnum = rte_kvargs_count(kvlist, MRVL_CFG_ARG);
2373                 RTE_LOG(INFO, PMD, "Parsing config file!\n");
2374                 if (cfgnum > 1) {
2375                         RTE_LOG(ERR, PMD, "Cannot handle more than one config file!\n");
2376                         goto out_free_kvlist;
2377                 } else if (cfgnum == 1) {
2378                         rte_kvargs_process(kvlist, MRVL_CFG_ARG,
2379                                            mrvl_get_qoscfg, &mrvl_qos_cfg);
2380                 }
2381         }
2382
2383         if (mrvl_dev_num)
2384                 goto init_devices;
2385
2386         RTE_LOG(INFO, PMD, "Perform MUSDK initializations\n");
2387         /*
2388          * ret == -EEXIST is correct, it means DMA
2389          * has been already initialized (by another PMD).
2390          */
2391         ret = mv_sys_dma_mem_init(MRVL_MUSDK_DMA_MEMSIZE);
2392         if (ret < 0) {
2393                 if (ret != -EEXIST)
2394                         goto out_free_kvlist;
2395                 else
2396                         RTE_LOG(INFO, PMD,
2397                                 "DMA memory has been already initialized by a different driver.\n");
2398         }
2399
2400         ret = mrvl_init_pp2();
2401         if (ret) {
2402                 RTE_LOG(ERR, PMD, "Failed to init PP!\n");
2403                 goto out_deinit_dma;
2404         }
2405
2406         memset(mrvl_port_bpool_size, 0, sizeof(mrvl_port_bpool_size));
2407         memset(mrvl_port_to_bpool_lookup, 0, sizeof(mrvl_port_to_bpool_lookup));
2408
2409         mrvl_lcore_first = RTE_MAX_LCORE;
2410         mrvl_lcore_last = 0;
2411
2412 init_devices:
2413         for (i = 0; i < ifnum; i++) {
2414                 RTE_LOG(INFO, PMD, "Creating %s\n", ifnames.names[i]);
2415                 ret = mrvl_eth_dev_create(vdev, ifnames.names[i]);
2416                 if (ret)
2417                         goto out_cleanup;
2418         }
2419         mrvl_dev_num += ifnum;
2420
2421         rte_kvargs_free(kvlist);
2422
2423         return 0;
2424 out_cleanup:
2425         for (; i > 0; i--)
2426                 mrvl_eth_dev_destroy(ifnames.names[i]);
2427
2428         if (mrvl_dev_num == 0)
2429                 mrvl_deinit_pp2();
2430 out_deinit_dma:
2431         if (mrvl_dev_num == 0)
2432                 mv_sys_dma_mem_destroy();
2433 out_free_kvlist:
2434         rte_kvargs_free(kvlist);
2435
2436         return ret;
2437 }
2438
2439 /**
2440  * DPDK callback to remove virtual device.
2441  *
2442  * @param vdev
2443  *   Pointer to the removed virtual device.
2444  *
2445  * @return
2446  *   0 on success, negative error value otherwise.
2447  */
2448 static int
2449 rte_pmd_mrvl_remove(struct rte_vdev_device *vdev)
2450 {
2451         int i;
2452         const char *name;
2453
2454         name = rte_vdev_device_name(vdev);
2455         if (!name)
2456                 return -EINVAL;
2457
2458         RTE_LOG(INFO, PMD, "Removing %s\n", name);
2459
2460         for (i = 0; i < rte_eth_dev_count(); i++) {
2461                 char ifname[RTE_ETH_NAME_MAX_LEN];
2462
2463                 rte_eth_dev_get_name_by_port(i, ifname);
2464                 mrvl_eth_dev_destroy(ifname);
2465                 mrvl_dev_num--;
2466         }
2467
2468         if (mrvl_dev_num == 0) {
2469                 RTE_LOG(INFO, PMD, "Perform MUSDK deinit\n");
2470                 mrvl_deinit_hifs();
2471                 mrvl_deinit_pp2();
2472                 mv_sys_dma_mem_destroy();
2473         }
2474
2475         return 0;
2476 }
2477
2478 static struct rte_vdev_driver pmd_mrvl_drv = {
2479         .probe = rte_pmd_mrvl_probe,
2480         .remove = rte_pmd_mrvl_remove,
2481 };
2482
2483 RTE_PMD_REGISTER_VDEV(net_mrvl, pmd_mrvl_drv);
2484 RTE_PMD_REGISTER_ALIAS(net_mrvl, eth_mrvl);