drivers/net/mvpp2/mrvl_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2017 Marvell International Ltd.
   3  * Copyright(c) 2017 Semihalf.
   4  * All rights reserved.
   5  */
   6
   7 #include <rte_string_fns.h>
   8 #include <rte_ethdev_driver.h>
   9 #include <rte_kvargs.h>
  10 #include <rte_log.h>
  11 #include <rte_malloc.h>
  12 #include <rte_bus_vdev.h>
  13
  14 #include <fcntl.h>
  15 #include <linux/ethtool.h>
  16 #include <linux/sockios.h>
  17 #include <net/if.h>
  18 #include <net/if_arp.h>
  19 #include <sys/ioctl.h>
  20 #include <sys/socket.h>
  21 #include <sys/stat.h>
  22 #include <sys/types.h>
  23
  24 #include <rte_mvep_common.h>
  25 #include "mrvl_ethdev.h"
  26 #include "mrvl_qos.h"
  27 #include "mrvl_flow.h"
  28 #include "mrvl_mtr.h"
  29 #include "mrvl_tm.h"
  30
  31 /* bitmask with reserved hifs */
  32 #define MRVL_MUSDK_HIFS_RESERVED 0x0F
  33 /* bitmask with reserved bpools */
  34 #define MRVL_MUSDK_BPOOLS_RESERVED 0x07
  35 /* bitmask with reserved kernel RSS tables */
  36 #define MRVL_MUSDK_RSS_RESERVED 0x01
  37 /* maximum number of available hifs */
  38 #define MRVL_MUSDK_HIFS_MAX 9
  39
  40 /* prefetch shift */
  41 #define MRVL_MUSDK_PREFETCH_SHIFT 2
  42
  43 /* TCAM has 25 entries reserved for uc/mc filter entries */
  44 #define MRVL_MAC_ADDRS_MAX 25
  45 #define MRVL_MATCH_LEN 16
  46 #define MRVL_PKT_EFFEC_OFFS (MRVL_PKT_OFFS + MV_MH_SIZE)
  47 /* Maximum allowable packet size */
  48 #define MRVL_PKT_SIZE_MAX (10240 - MV_MH_SIZE)
  49
  50 #define MRVL_IFACE_NAME_ARG "iface"
  51 #define MRVL_CFG_ARG "cfg"
  52
  53 #define MRVL_BURST_SIZE 64
  54
  55 #define MRVL_ARP_LENGTH 28
  56
  57 #define MRVL_COOKIE_ADDR_INVALID ~0ULL
  58 #define MRVL_COOKIE_HIGH_ADDR_MASK 0xffffff0000000000
  59
  60 /** Port Rx offload capabilities */
  61 #define MRVL_RX_OFFLOADS (DEV_RX_OFFLOAD_VLAN_FILTER | \
  62                           DEV_RX_OFFLOAD_JUMBO_FRAME | \
  63                           DEV_RX_OFFLOAD_CHECKSUM)
  64
  65 /** Port Tx offloads capabilities */
  66 #define MRVL_TX_OFFLOADS (DEV_TX_OFFLOAD_IPV4_CKSUM | \
  67                           DEV_TX_OFFLOAD_UDP_CKSUM | \
  68                           DEV_TX_OFFLOAD_TCP_CKSUM | \
  69                           DEV_TX_OFFLOAD_MULTI_SEGS)
  70
  71 static const char * const valid_args[] = {
  72         MRVL_IFACE_NAME_ARG,
  73         MRVL_CFG_ARG,
  74         NULL
  75 };
  76
  77 static int used_hifs = MRVL_MUSDK_HIFS_RESERVED;
  78 static struct pp2_hif *hifs[RTE_MAX_LCORE];
  79 static int used_bpools[PP2_NUM_PKT_PROC] = {
  80         [0 ... PP2_NUM_PKT_PROC - 1] = MRVL_MUSDK_BPOOLS_RESERVED
  81 };
  82
  83 static struct pp2_bpool *mrvl_port_to_bpool_lookup[RTE_MAX_ETHPORTS];
  84 static int mrvl_port_bpool_size[PP2_NUM_PKT_PROC][PP2_BPOOL_NUM_POOLS][RTE_MAX_LCORE];
  85 static uint64_t cookie_addr_high = MRVL_COOKIE_ADDR_INVALID;
  86
  87 struct mrvl_ifnames {
  88         const char *names[PP2_NUM_ETH_PPIO * PP2_NUM_PKT_PROC];
  89         int idx;
  90 };
  91
  92 /*
  93  * To use buffer harvesting based on loopback port shadow queue structure
  94  * was introduced for buffers information bookkeeping.
  95  *
  96  * Before sending the packet, related buffer information (pp2_buff_inf) is
  97  * stored in shadow queue. After packet is transmitted no longer used
  98  * packet buffer is released back to it's original hardware pool,
  99  * on condition it originated from interface.
 100  * In case it  was generated by application itself i.e: mbuf->port field is
 101  * 0xff then its released to software mempool.
 102  */
 103 struct mrvl_shadow_txq {
 104         int head;           /* write index - used when sending buffers */
 105         int tail;           /* read index - used when releasing buffers */
 106         u16 size;           /* queue occupied size */
 107         u16 num_to_release; /* number of descriptors sent, that can be
 108                              * released
 109                              */
 110         struct buff_release_entry ent[MRVL_PP2_TX_SHADOWQ_SIZE]; /* q entries */
 111 };
 112
 113 struct mrvl_rxq {
 114         struct mrvl_priv *priv;
 115         struct rte_mempool *mp;
 116         int queue_id;
 117         int port_id;
 118         int cksum_enabled;
 119         uint64_t bytes_recv;
 120         uint64_t drop_mac;
 121 };
 122
 123 struct mrvl_txq {
 124         struct mrvl_priv *priv;
 125         int queue_id;
 126         int port_id;
 127         uint64_t bytes_sent;
 128         struct mrvl_shadow_txq shadow_txqs[RTE_MAX_LCORE];
 129         int tx_deferred_start;
 130 };
 131
 132 static int mrvl_lcore_first;
 133 static int mrvl_lcore_last;
 134 static int mrvl_dev_num;
 135
 136 static int mrvl_fill_bpool(struct mrvl_rxq *rxq, int num);
 137 static inline void mrvl_free_sent_buffers(struct pp2_ppio *ppio,
 138                         struct pp2_hif *hif, unsigned int core_id,
 139                         struct mrvl_shadow_txq *sq, int qid, int force);
 140
 141 static uint16_t mrvl_tx_pkt_burst(void *txq, struct rte_mbuf **tx_pkts,
 142                                   uint16_t nb_pkts);
 143 static uint16_t mrvl_tx_sg_pkt_burst(void *txq, struct rte_mbuf **tx_pkts,
 144                                      uint16_t nb_pkts);
 145 static int rte_pmd_mrvl_remove(struct rte_vdev_device *vdev);
 146 static void mrvl_deinit_pp2(void);
 147 static void mrvl_deinit_hifs(void);
 148
 149
 150 #define MRVL_XSTATS_TBL_ENTRY(name) { \
 151         #name, offsetof(struct pp2_ppio_statistics, name),      \
 152         sizeof(((struct pp2_ppio_statistics *)0)->name)         \
 153 }
 154
 155 /* Table with xstats data */
 156 static struct {
 157         const char *name;
 158         unsigned int offset;
 159         unsigned int size;
 160 } mrvl_xstats_tbl[] = {
 161         MRVL_XSTATS_TBL_ENTRY(rx_bytes),
 162         MRVL_XSTATS_TBL_ENTRY(rx_packets),
 163         MRVL_XSTATS_TBL_ENTRY(rx_unicast_packets),
 164         MRVL_XSTATS_TBL_ENTRY(rx_errors),
 165         MRVL_XSTATS_TBL_ENTRY(rx_fullq_dropped),
 166         MRVL_XSTATS_TBL_ENTRY(rx_bm_dropped),
 167         MRVL_XSTATS_TBL_ENTRY(rx_early_dropped),
 168         MRVL_XSTATS_TBL_ENTRY(rx_fifo_dropped),
 169         MRVL_XSTATS_TBL_ENTRY(rx_cls_dropped),
 170         MRVL_XSTATS_TBL_ENTRY(tx_bytes),
 171         MRVL_XSTATS_TBL_ENTRY(tx_packets),
 172         MRVL_XSTATS_TBL_ENTRY(tx_unicast_packets),
 173         MRVL_XSTATS_TBL_ENTRY(tx_errors)
 174 };
 175
 176 static inline void
 177 mrvl_fill_shadowq(struct mrvl_shadow_txq *sq, struct rte_mbuf *buf)
 178 {
 179         sq->ent[sq->head].buff.cookie = (uint64_t)buf;
 180         sq->ent[sq->head].buff.addr = buf ?
 181                 rte_mbuf_data_iova_default(buf) : 0;
 182
 183         sq->ent[sq->head].bpool =
 184                 (unlikely(!buf || buf->port >= RTE_MAX_ETHPORTS ||
 185                  buf->refcnt > 1)) ? NULL :
 186                  mrvl_port_to_bpool_lookup[buf->port];
 187
 188         sq->head = (sq->head + 1) & MRVL_PP2_TX_SHADOWQ_MASK;
 189         sq->size++;
 190 }
 191
 192 static inline void
 193 mrvl_fill_desc(struct pp2_ppio_desc *desc, struct rte_mbuf *buf)
 194 {
 195         pp2_ppio_outq_desc_reset(desc);
 196         pp2_ppio_outq_desc_set_phys_addr(desc, rte_pktmbuf_iova(buf));
 197         pp2_ppio_outq_desc_set_pkt_offset(desc, 0);
 198         pp2_ppio_outq_desc_set_pkt_len(desc, rte_pktmbuf_data_len(buf));
 199 }
 200
 201 static inline int
 202 mrvl_get_bpool_size(int pp2_id, int pool_id)
 203 {
 204         int i;
 205         int size = 0;
 206
 207         for (i = mrvl_lcore_first; i <= mrvl_lcore_last; i++)
 208                 size += mrvl_port_bpool_size[pp2_id][pool_id][i];
 209
 210         return size;
 211 }
 212
 213 static inline int
 214 mrvl_reserve_bit(int *bitmap, int max)
 215 {
 216         int n = sizeof(*bitmap) * 8 - __builtin_clz(*bitmap);
 217
 218         if (n >= max)
 219                 return -1;
 220
 221         *bitmap |= 1 << n;
 222
 223         return n;
 224 }
 225
 226 static int
 227 mrvl_init_hif(int core_id)
 228 {
 229         struct pp2_hif_params params;
 230         char match[MRVL_MATCH_LEN];
 231         int ret;
 232
 233         ret = mrvl_reserve_bit(&used_hifs, MRVL_MUSDK_HIFS_MAX);
 234         if (ret < 0) {
 235                 MRVL_LOG(ERR, "Failed to allocate hif %d", core_id);
 236                 return ret;
 237         }
 238
 239         snprintf(match, sizeof(match), "hif-%d", ret);
 240         memset(&params, 0, sizeof(params));
 241         params.match = match;
 242         params.out_size = MRVL_PP2_AGGR_TXQD_MAX;
 243         ret = pp2_hif_init(&params, &hifs[core_id]);
 244         if (ret) {
 245                 MRVL_LOG(ERR, "Failed to initialize hif %d", core_id);
 246                 return ret;
 247         }
 248
 249         return 0;
 250 }
 251
 252 static inline struct pp2_hif*
 253 mrvl_get_hif(struct mrvl_priv *priv, int core_id)
 254 {
 255         int ret;
 256
 257         if (likely(hifs[core_id] != NULL))
 258                 return hifs[core_id];
 259
 260         rte_spinlock_lock(&priv->lock);
 261
 262         ret = mrvl_init_hif(core_id);
 263         if (ret < 0) {
 264                 MRVL_LOG(ERR, "Failed to allocate hif %d", core_id);
 265                 goto out;
 266         }
 267
 268         if (core_id < mrvl_lcore_first)
 269                 mrvl_lcore_first = core_id;
 270
 271         if (core_id > mrvl_lcore_last)
 272                 mrvl_lcore_last = core_id;
 273 out:
 274         rte_spinlock_unlock(&priv->lock);
 275
 276         return hifs[core_id];
 277 }
 278
 279 /**
 280  * Set tx burst function according to offload flag
 281  *
 282  * @param dev
 283  *   Pointer to Ethernet device structure.
 284  */
 285 static void
 286 mrvl_set_tx_function(struct rte_eth_dev *dev)
 287 {
 288         struct mrvl_priv *priv = dev->data->dev_private;
 289
 290         /* Use a simple Tx queue (no offloads, no multi segs) if possible */
 291         if (priv->multiseg) {
 292                 RTE_LOG(INFO, PMD, "Using multi-segment tx callback\n");
 293                 dev->tx_pkt_burst = mrvl_tx_sg_pkt_burst;
 294         } else {
 295                 RTE_LOG(INFO, PMD, "Using single-segment tx callback\n");
 296                 dev->tx_pkt_burst = mrvl_tx_pkt_burst;
 297         }
 298 }
 299
 300 /**
 301  * Configure rss based on dpdk rss configuration.
 302  *
 303  * @param priv
 304  *   Pointer to private structure.
 305  * @param rss_conf
 306  *   Pointer to RSS configuration.
 307  *
 308  * @return
 309  *   0 on success, negative error value otherwise.
 310  */
 311 static int
 312 mrvl_configure_rss(struct mrvl_priv *priv, struct rte_eth_rss_conf *rss_conf)
 313 {
 314         if (rss_conf->rss_key)
 315                 MRVL_LOG(WARNING, "Changing hash key is not supported");
 316
 317         if (rss_conf->rss_hf == 0) {
 318                 priv->ppio_params.inqs_params.hash_type = PP2_PPIO_HASH_T_NONE;
 319         } else if (rss_conf->rss_hf & ETH_RSS_IPV4) {
 320                 priv->ppio_params.inqs_params.hash_type =
 321                         PP2_PPIO_HASH_T_2_TUPLE;
 322         } else if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) {
 323                 priv->ppio_params.inqs_params.hash_type =
 324                         PP2_PPIO_HASH_T_5_TUPLE;
 325                 priv->rss_hf_tcp = 1;
 326         } else if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) {
 327                 priv->ppio_params.inqs_params.hash_type =
 328                         PP2_PPIO_HASH_T_5_TUPLE;
 329                 priv->rss_hf_tcp = 0;
 330         } else {
 331                 return -EINVAL;
 332         }
 333
 334         return 0;
 335 }
 336
 337 /**
 338  * Ethernet device configuration.
 339  *
 340  * Prepare the driver for a given number of TX and RX queues and
 341  * configure RSS.
 342  *
 343  * @param dev
 344  *   Pointer to Ethernet device structure.
 345  *
 346  * @return
 347  *   0 on success, negative error value otherwise.
 348  */
 349 static int
 350 mrvl_dev_configure(struct rte_eth_dev *dev)
 351 {
 352         struct mrvl_priv *priv = dev->data->dev_private;
 353         int ret;
 354
 355         if (priv->ppio) {
 356                 MRVL_LOG(INFO, "Device reconfiguration is not supported");
 357                 return -EINVAL;
 358         }
 359
 360         if (dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_NONE &&
 361             dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
 362                 MRVL_LOG(INFO, "Unsupported rx multi queue mode %d",
 363                         dev->data->dev_conf.rxmode.mq_mode);
 364                 return -EINVAL;
 365         }
 366
 367         if (dev->data->dev_conf.rxmode.split_hdr_size) {
 368                 MRVL_LOG(INFO, "Split headers not supported");
 369                 return -EINVAL;
 370         }
 371
 372         if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
 373                 dev->data->mtu = dev->data->dev_conf.rxmode.max_rx_pkt_len -
 374                                  MRVL_PP2_ETH_HDRS_LEN;
 375
 376         if (dev->data->dev_conf.txmode.offloads & DEV_TX_OFFLOAD_MULTI_SEGS)
 377                 priv->multiseg = 1;
 378
 379         ret = mrvl_configure_rxqs(priv, dev->data->port_id,
 380                                   dev->data->nb_rx_queues);
 381         if (ret < 0)
 382                 return ret;
 383
 384         ret = mrvl_configure_txqs(priv, dev->data->port_id,
 385                                   dev->data->nb_tx_queues);
 386         if (ret < 0)
 387                 return ret;
 388
 389         priv->ppio_params.outqs_params.num_outqs = dev->data->nb_tx_queues;
 390         priv->ppio_params.maintain_stats = 1;
 391         priv->nb_rx_queues = dev->data->nb_rx_queues;
 392
 393         ret = mrvl_tm_init(dev);
 394         if (ret < 0)
 395                 return ret;
 396
 397         if (dev->data->nb_rx_queues == 1 &&
 398             dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 399                 MRVL_LOG(WARNING, "Disabling hash for 1 rx queue");
 400                 priv->ppio_params.inqs_params.hash_type = PP2_PPIO_HASH_T_NONE;
 401
 402                 return 0;
 403         }
 404
 405         return mrvl_configure_rss(priv,
 406                                   &dev->data->dev_conf.rx_adv_conf.rss_conf);
 407 }
 408
 409 /**
 410  * DPDK callback to change the MTU.
 411  *
 412  * Setting the MTU affects hardware MRU (packets larger than the MRU
 413  * will be dropped).
 414  *
 415  * @param dev
 416  *   Pointer to Ethernet device structure.
 417  * @param mtu
 418  *   New MTU.
 419  *
 420  * @return
 421  *   0 on success, negative error value otherwise.
 422  */
 423 static int
 424 mrvl_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
 425 {
 426         struct mrvl_priv *priv = dev->data->dev_private;
 427         uint16_t mru;
 428         uint16_t mbuf_data_size = 0; /* SW buffer size */
 429         int ret;
 430
 431         mru = MRVL_PP2_MTU_TO_MRU(mtu);
 432         /*
 433          * min_rx_buf_size is equal to mbuf data size
 434          * if pmd didn't set it differently
 435          */
 436         mbuf_data_size = dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM;
 437         /* Prevent PMD from:
 438          * - setting mru greater than the mbuf size resulting in
 439          * hw and sw buffer size mismatch
 440          * - setting mtu that requires the support of scattered packets
 441          * when this feature has not been enabled/supported so far
 442          * (TODO check scattered_rx flag here once scattered RX is supported).
 443          */
 444         if (mru + MRVL_PKT_OFFS > mbuf_data_size) {
 445                 mru = mbuf_data_size - MRVL_PKT_OFFS;
 446                 mtu = MRVL_PP2_MRU_TO_MTU(mru);
 447                 MRVL_LOG(WARNING, "MTU too big, max MTU possible limitted "
 448                         "by current mbuf size: %u. Set MTU to %u, MRU to %u",
 449                         mbuf_data_size, mtu, mru);
 450         }
 451
 452         if (mtu < RTE_ETHER_MIN_MTU || mru > MRVL_PKT_SIZE_MAX) {
 453                 MRVL_LOG(ERR, "Invalid MTU [%u] or MRU [%u]", mtu, mru);
 454                 return -EINVAL;
 455         }
 456
 457         dev->data->mtu = mtu;
 458         dev->data->dev_conf.rxmode.max_rx_pkt_len = mru - MV_MH_SIZE;
 459
 460         if (!priv->ppio)
 461                 return 0;
 462
 463         ret = pp2_ppio_set_mru(priv->ppio, mru);
 464         if (ret) {
 465                 MRVL_LOG(ERR, "Failed to change MRU");
 466                 return ret;
 467         }
 468
 469         ret = pp2_ppio_set_mtu(priv->ppio, mtu);
 470         if (ret) {
 471                 MRVL_LOG(ERR, "Failed to change MTU");
 472                 return ret;
 473         }
 474
 475         return 0;
 476 }
 477
 478 /**
 479  * DPDK callback to bring the link up.
 480  *
 481  * @param dev
 482  *   Pointer to Ethernet device structure.
 483  *
 484  * @return
 485  *   0 on success, negative error value otherwise.
 486  */
 487 static int
 488 mrvl_dev_set_link_up(struct rte_eth_dev *dev)
 489 {
 490         struct mrvl_priv *priv = dev->data->dev_private;
 491         int ret;
 492
 493         if (!priv->ppio)
 494                 return -EPERM;
 495
 496         ret = pp2_ppio_enable(priv->ppio);
 497         if (ret)
 498                 return ret;
 499
 500         /*
 501          * mtu/mru can be updated if pp2_ppio_enable() was called at least once
 502          * as pp2_ppio_enable() changes port->t_mode from default 0 to
 503          * PP2_TRAFFIC_INGRESS_EGRESS.
 504          *
 505          * Set mtu to default DPDK value here.
 506          */
 507         ret = mrvl_mtu_set(dev, dev->data->mtu);
 508         if (ret)
 509                 pp2_ppio_disable(priv->ppio);
 510
 511         return ret;
 512 }
 513
 514 /**
 515  * DPDK callback to bring the link down.
 516  *
 517  * @param dev
 518  *   Pointer to Ethernet device structure.
 519  *
 520  * @return
 521  *   0 on success, negative error value otherwise.
 522  */
 523 static int
 524 mrvl_dev_set_link_down(struct rte_eth_dev *dev)
 525 {
 526         struct mrvl_priv *priv = dev->data->dev_private;
 527
 528         if (!priv->ppio)
 529                 return -EPERM;
 530
 531         return pp2_ppio_disable(priv->ppio);
 532 }
 533
 534 /**
 535  * DPDK callback to start tx queue.
 536  *
 537  * @param dev
 538  *   Pointer to Ethernet device structure.
 539  * @param queue_id
 540  *   Transmit queue index.
 541  *
 542  * @return
 543  *   0 on success, negative error value otherwise.
 544  */
 545 static int
 546 mrvl_tx_queue_start(struct rte_eth_dev *dev, uint16_t queue_id)
 547 {
 548         struct mrvl_priv *priv = dev->data->dev_private;
 549         int ret;
 550
 551         if (!priv)
 552                 return -EPERM;
 553
 554         /* passing 1 enables given tx queue */
 555         ret = pp2_ppio_set_outq_state(priv->ppio, queue_id, 1);
 556         if (ret) {
 557                 MRVL_LOG(ERR, "Failed to start txq %d", queue_id);
 558                 return ret;
 559         }
 560
 561         dev->data->tx_queue_state[queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
 562
 563         return 0;
 564 }
 565
 566 /**
 567  * DPDK callback to stop tx queue.
 568  *
 569  * @param dev
 570  *   Pointer to Ethernet device structure.
 571  * @param queue_id
 572  *   Transmit queue index.
 573  *
 574  * @return
 575  *   0 on success, negative error value otherwise.
 576  */
 577 static int
 578 mrvl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t queue_id)
 579 {
 580         struct mrvl_priv *priv = dev->data->dev_private;
 581         int ret;
 582
 583         if (!priv->ppio)
 584                 return -EPERM;
 585
 586         /* passing 0 disables given tx queue */
 587         ret = pp2_ppio_set_outq_state(priv->ppio, queue_id, 0);
 588         if (ret) {
 589                 MRVL_LOG(ERR, "Failed to stop txq %d", queue_id);
 590                 return ret;
 591         }
 592
 593         dev->data->tx_queue_state[queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
 594
 595         return 0;
 596 }
 597
 598 /**
 599  * DPDK callback to start the device.
 600  *
 601  * @param dev
 602  *   Pointer to Ethernet device structure.
 603  *
 604  * @return
 605  *   0 on success, negative errno value on failure.
 606  */
 607 static int
 608 mrvl_dev_start(struct rte_eth_dev *dev)
 609 {
 610         struct mrvl_priv *priv = dev->data->dev_private;
 611         char match[MRVL_MATCH_LEN];
 612         int ret = 0, i, def_init_size;
 613
 614         if (priv->ppio)
 615                 return mrvl_dev_set_link_up(dev);
 616
 617         snprintf(match, sizeof(match), "ppio-%d:%d",
 618                  priv->pp_id, priv->ppio_id);
 619         priv->ppio_params.match = match;
 620
 621         /*
 622          * Calculate the minimum bpool size for refill feature as follows:
 623          * 2 default burst sizes multiply by number of rx queues.
 624          * If the bpool size will be below this value, new buffers will
 625          * be added to the pool.
 626          */
 627         priv->bpool_min_size = priv->nb_rx_queues * MRVL_BURST_SIZE * 2;
 628
 629         /* In case initial bpool size configured in queues setup is
 630          * smaller than minimum size add more buffers
 631          */
 632         def_init_size = priv->bpool_min_size + MRVL_BURST_SIZE * 2;
 633         if (priv->bpool_init_size < def_init_size) {
 634                 int buffs_to_add = def_init_size - priv->bpool_init_size;
 635
 636                 priv->bpool_init_size += buffs_to_add;
 637                 ret = mrvl_fill_bpool(dev->data->rx_queues[0], buffs_to_add);
 638                 if (ret)
 639                         MRVL_LOG(ERR, "Failed to add buffers to bpool");
 640         }
 641
 642         /*
 643          * Calculate the maximum bpool size for refill feature as follows:
 644          * maximum number of descriptors in rx queue multiply by number
 645          * of rx queues plus minimum bpool size.
 646          * In case the bpool size will exceed this value, superfluous buffers
 647          * will be removed
 648          */
 649         priv->bpool_max_size = (priv->nb_rx_queues * MRVL_PP2_RXD_MAX) +
 650                                 priv->bpool_min_size;
 651
 652         ret = pp2_ppio_init(&priv->ppio_params, &priv->ppio);
 653         if (ret) {
 654                 MRVL_LOG(ERR, "Failed to init ppio");
 655                 return ret;
 656         }
 657
 658         /*
 659          * In case there are some some stale uc/mc mac addresses flush them
 660          * here. It cannot be done during mrvl_dev_close() as port information
 661          * is already gone at that point (due to pp2_ppio_deinit() in
 662          * mrvl_dev_stop()).
 663          */
 664         if (!priv->uc_mc_flushed) {
 665                 ret = pp2_ppio_flush_mac_addrs(priv->ppio, 1, 1);
 666                 if (ret) {
 667                         MRVL_LOG(ERR,
 668                                 "Failed to flush uc/mc filter list");
 669                         goto out;
 670                 }
 671                 priv->uc_mc_flushed = 1;
 672         }
 673
 674         if (!priv->vlan_flushed) {
 675                 ret = pp2_ppio_flush_vlan(priv->ppio);
 676                 if (ret) {
 677                         MRVL_LOG(ERR, "Failed to flush vlan list");
 678                         /*
 679                          * TODO
 680                          * once pp2_ppio_flush_vlan() is supported jump to out
 681                          * goto out;
 682                          */
 683                 }
 684                 priv->vlan_flushed = 1;
 685         }
 686         ret = mrvl_mtu_set(dev, dev->data->mtu);
 687         if (ret)
 688                 MRVL_LOG(ERR, "Failed to set MTU to %d", dev->data->mtu);
 689
 690         /* For default QoS config, don't start classifier. */
 691         if (mrvl_qos_cfg  &&
 692             mrvl_qos_cfg->port[dev->data->port_id].use_global_defaults == 0) {
 693                 ret = mrvl_start_qos_mapping(priv);
 694                 if (ret) {
 695                         MRVL_LOG(ERR, "Failed to setup QoS mapping");
 696                         goto out;
 697                 }
 698         }
 699
 700         ret = mrvl_dev_set_link_up(dev);
 701         if (ret) {
 702                 MRVL_LOG(ERR, "Failed to set link up");
 703                 goto out;
 704         }
 705
 706         /* start tx queues */
 707         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 708                 struct mrvl_txq *txq = dev->data->tx_queues[i];
 709
 710                 dev->data->tx_queue_state[i] = RTE_ETH_QUEUE_STATE_STARTED;
 711
 712                 if (!txq->tx_deferred_start)
 713                         continue;
 714
 715                 /*
 716                  * All txqs are started by default. Stop them
 717                  * so that tx_deferred_start works as expected.
 718                  */
 719                 ret = mrvl_tx_queue_stop(dev, i);
 720                 if (ret)
 721                         goto out;
 722         }
 723
 724         mrvl_flow_init(dev);
 725         mrvl_mtr_init(dev);
 726         mrvl_set_tx_function(dev);
 727
 728         return 0;
 729 out:
 730         MRVL_LOG(ERR, "Failed to start device");
 731         pp2_ppio_deinit(priv->ppio);
 732         return ret;
 733 }
 734
 735 /**
 736  * Flush receive queues.
 737  *
 738  * @param dev
 739  *   Pointer to Ethernet device structure.
 740  */
 741 static void
 742 mrvl_flush_rx_queues(struct rte_eth_dev *dev)
 743 {
 744         int i;
 745
 746         MRVL_LOG(INFO, "Flushing rx queues");
 747         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 748                 int ret, num;
 749
 750                 do {
 751                         struct mrvl_rxq *q = dev->data->rx_queues[i];
 752                         struct pp2_ppio_desc descs[MRVL_PP2_RXD_MAX];
 753
 754                         num = MRVL_PP2_RXD_MAX;
 755                         ret = pp2_ppio_recv(q->priv->ppio,
 756                                             q->priv->rxq_map[q->queue_id].tc,
 757                                             q->priv->rxq_map[q->queue_id].inq,
 758                                             descs, (uint16_t *)&num);
 759                 } while (ret == 0 && num);
 760         }
 761 }
 762
 763 /**
 764  * Flush transmit shadow queues.
 765  *
 766  * @param dev
 767  *   Pointer to Ethernet device structure.
 768  */
 769 static void
 770 mrvl_flush_tx_shadow_queues(struct rte_eth_dev *dev)
 771 {
 772         int i, j;
 773         struct mrvl_txq *txq;
 774
 775         MRVL_LOG(INFO, "Flushing tx shadow queues");
 776         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 777                 txq = (struct mrvl_txq *)dev->data->tx_queues[i];
 778
 779                 for (j = 0; j < RTE_MAX_LCORE; j++) {
 780                         struct mrvl_shadow_txq *sq;
 781
 782                         if (!hifs[j])
 783                                 continue;
 784
 785                         sq = &txq->shadow_txqs[j];
 786                         mrvl_free_sent_buffers(txq->priv->ppio,
 787                                 hifs[j], j, sq, txq->queue_id, 1);
 788                         while (sq->tail != sq->head) {
 789                                 uint64_t addr = cookie_addr_high |
 790                                         sq->ent[sq->tail].buff.cookie;
 791                                 rte_pktmbuf_free(
 792                                         (struct rte_mbuf *)addr);
 793                                 sq->tail = (sq->tail + 1) &
 794                                             MRVL_PP2_TX_SHADOWQ_MASK;
 795                         }
 796                         memset(sq, 0, sizeof(*sq));
 797                 }
 798         }
 799 }
 800
 801 /**
 802  * Flush hardware bpool (buffer-pool).
 803  *
 804  * @param dev
 805  *   Pointer to Ethernet device structure.
 806  */
 807 static void
 808 mrvl_flush_bpool(struct rte_eth_dev *dev)
 809 {
 810         struct mrvl_priv *priv = dev->data->dev_private;
 811         struct pp2_hif *hif;
 812         uint32_t num;
 813         int ret;
 814         unsigned int core_id = rte_lcore_id();
 815
 816         if (core_id == LCORE_ID_ANY)
 817                 core_id = rte_get_master_lcore();
 818
 819         hif = mrvl_get_hif(priv, core_id);
 820
 821         ret = pp2_bpool_get_num_buffs(priv->bpool, &num);
 822         if (ret) {
 823                 MRVL_LOG(ERR, "Failed to get bpool buffers number");
 824                 return;
 825         }
 826
 827         while (num--) {
 828                 struct pp2_buff_inf inf;
 829                 uint64_t addr;
 830
 831                 ret = pp2_bpool_get_buff(hif, priv->bpool, &inf);
 832                 if (ret)
 833                         break;
 834
 835                 addr = cookie_addr_high | inf.cookie;
 836                 rte_pktmbuf_free((struct rte_mbuf *)addr);
 837         }
 838 }
 839
 840 /**
 841  * DPDK callback to stop the device.
 842  *
 843  * @param dev
 844  *   Pointer to Ethernet device structure.
 845  */
 846 static void
 847 mrvl_dev_stop(struct rte_eth_dev *dev)
 848 {
 849         mrvl_dev_set_link_down(dev);
 850 }
 851
 852 /**
 853  * DPDK callback to close the device.
 854  *
 855  * @param dev
 856  *   Pointer to Ethernet device structure.
 857  */
 858 static int
 859 mrvl_dev_close(struct rte_eth_dev *dev)
 860 {
 861         struct mrvl_priv *priv = dev->data->dev_private;
 862         size_t i;
 863
 864         mrvl_flush_rx_queues(dev);
 865         mrvl_flush_tx_shadow_queues(dev);
 866         mrvl_flow_deinit(dev);
 867         mrvl_mtr_deinit(dev);
 868
 869         for (i = 0; i < priv->ppio_params.inqs_params.num_tcs; ++i) {
 870                 struct pp2_ppio_tc_params *tc_params =
 871                         &priv->ppio_params.inqs_params.tcs_params[i];
 872
 873                 if (tc_params->inqs_params) {
 874                         rte_free(tc_params->inqs_params);
 875                         tc_params->inqs_params = NULL;
 876                 }
 877         }
 878
 879         if (priv->cls_tbl) {
 880                 pp2_cls_tbl_deinit(priv->cls_tbl);
 881                 priv->cls_tbl = NULL;
 882         }
 883
 884         if (priv->qos_tbl) {
 885                 pp2_cls_qos_tbl_deinit(priv->qos_tbl);
 886                 priv->qos_tbl = NULL;
 887         }
 888
 889         mrvl_flush_bpool(dev);
 890         mrvl_tm_deinit(dev);
 891
 892         if (priv->ppio) {
 893                 pp2_ppio_deinit(priv->ppio);
 894                 priv->ppio = NULL;
 895         }
 896
 897         /* policer must be released after ppio deinitialization */
 898         if (priv->default_policer) {
 899                 pp2_cls_plcr_deinit(priv->default_policer);
 900                 priv->default_policer = NULL;
 901         }
 902
 903
 904         if (priv->bpool) {
 905                 pp2_bpool_deinit(priv->bpool);
 906                 used_bpools[priv->pp_id] &= ~(1 << priv->bpool_bit);
 907                 priv->bpool = NULL;
 908         }
 909
 910         mrvl_dev_num--;
 911
 912         if (mrvl_dev_num == 0) {
 913                 MRVL_LOG(INFO, "Perform MUSDK deinit");
 914                 mrvl_deinit_hifs();
 915                 mrvl_deinit_pp2();
 916                 rte_mvep_deinit(MVEP_MOD_T_PP2);
 917         }
 918
 919         return 0;
 920 }
 921
 922 /**
 923  * DPDK callback to retrieve physical link information.
 924  *
 925  * @param dev
 926  *   Pointer to Ethernet device structure.
 927  * @param wait_to_complete
 928  *   Wait for request completion (ignored).
 929  *
 930  * @return
 931  *   0 on success, negative error value otherwise.
 932  */
 933 static int
 934 mrvl_link_update(struct rte_eth_dev *dev, int wait_to_complete __rte_unused)
 935 {
 936         /*
 937          * TODO
 938          * once MUSDK provides necessary API use it here
 939          */
 940         struct mrvl_priv *priv = dev->data->dev_private;
 941         struct ethtool_cmd edata;
 942         struct ifreq req;
 943         int ret, fd, link_up;
 944
 945         if (!priv->ppio)
 946                 return -EPERM;
 947
 948         edata.cmd = ETHTOOL_GSET;
 949
 950         strcpy(req.ifr_name, dev->data->name);
 951         req.ifr_data = (void *)&edata;
 952
 953         fd = socket(AF_INET, SOCK_DGRAM, 0);
 954         if (fd == -1)
 955                 return -EFAULT;
 956
 957         ret = ioctl(fd, SIOCETHTOOL, &req);
 958         if (ret == -1) {
 959                 close(fd);
 960                 return -EFAULT;
 961         }
 962
 963         close(fd);
 964
 965         switch (ethtool_cmd_speed(&edata)) {
 966         case SPEED_10:
 967                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_10M;
 968                 break;
 969         case SPEED_100:
 970                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_100M;
 971                 break;
 972         case SPEED_1000:
 973                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_1G;
 974                 break;
 975         case SPEED_10000:
 976                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_10G;
 977                 break;
 978         default:
 979                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_NONE;
 980         }
 981
 982         dev->data->dev_link.link_duplex = edata.duplex ? ETH_LINK_FULL_DUPLEX :
 983                                                          ETH_LINK_HALF_DUPLEX;
 984         dev->data->dev_link.link_autoneg = edata.autoneg ? ETH_LINK_AUTONEG :
 985                                                            ETH_LINK_FIXED;
 986         pp2_ppio_get_link_state(priv->ppio, &link_up);
 987         dev->data->dev_link.link_status = link_up ? ETH_LINK_UP : ETH_LINK_DOWN;
 988
 989         return 0;
 990 }
 991
 992 /**
 993  * DPDK callback to enable promiscuous mode.
 994  *
 995  * @param dev
 996  *   Pointer to Ethernet device structure.
 997  *
 998  * @return
 999  *   0 on success, negative error value otherwise.
1000  */
1001 static int
1002 mrvl_promiscuous_enable(struct rte_eth_dev *dev)
1003 {
1004         struct mrvl_priv *priv = dev->data->dev_private;
1005         int ret;
1006
1007         if (!priv->ppio)
1008                 return 0;
1009
1010         if (priv->isolated)
1011                 return 0;
1012
1013         ret = pp2_ppio_set_promisc(priv->ppio, 1);
1014         if (ret) {
1015                 MRVL_LOG(ERR, "Failed to enable promiscuous mode");
1016                 return -EAGAIN;
1017         }
1018
1019         return 0;
1020 }
1021
1022 /**
1023  * DPDK callback to enable allmulti mode.
1024  *
1025  * @param dev
1026  *   Pointer to Ethernet device structure.
1027  *
1028  * @return
1029  *   0 on success, negative error value otherwise.
1030  */
1031 static int
1032 mrvl_allmulticast_enable(struct rte_eth_dev *dev)
1033 {
1034         struct mrvl_priv *priv = dev->data->dev_private;
1035         int ret;
1036
1037         if (!priv->ppio)
1038                 return 0;
1039
1040         if (priv->isolated)
1041                 return 0;
1042
1043         ret = pp2_ppio_set_mc_promisc(priv->ppio, 1);
1044         if (ret) {
1045                 MRVL_LOG(ERR, "Failed enable all-multicast mode");
1046                 return -EAGAIN;
1047         }
1048
1049         return 0;
1050 }
1051
1052 /**
1053  * DPDK callback to disable promiscuous mode.
1054  *
1055  * @param dev
1056  *   Pointer to Ethernet device structure.
1057  *
1058  * @return
1059  *   0 on success, negative error value otherwise.
1060  */
1061 static int
1062 mrvl_promiscuous_disable(struct rte_eth_dev *dev)
1063 {
1064         struct mrvl_priv *priv = dev->data->dev_private;
1065         int ret;
1066
1067         if (!priv->ppio)
1068                 return 0;
1069
1070         ret = pp2_ppio_set_promisc(priv->ppio, 0);
1071         if (ret) {
1072                 MRVL_LOG(ERR, "Failed to disable promiscuous mode");
1073                 return -EAGAIN;
1074         }
1075
1076         return 0;
1077 }
1078
1079 /**
1080  * DPDK callback to disable allmulticast mode.
1081  *
1082  * @param dev
1083  *   Pointer to Ethernet device structure.
1084  *
1085  * @return
1086  *   0 on success, negative error value otherwise.
1087  */
1088 static int
1089 mrvl_allmulticast_disable(struct rte_eth_dev *dev)
1090 {
1091         struct mrvl_priv *priv = dev->data->dev_private;
1092         int ret;
1093
1094         if (!priv->ppio)
1095                 return 0;
1096
1097         ret = pp2_ppio_set_mc_promisc(priv->ppio, 0);
1098         if (ret) {
1099                 MRVL_LOG(ERR, "Failed to disable all-multicast mode");
1100                 return -EAGAIN;
1101         }
1102
1103         return 0;
1104 }
1105
1106 /**
1107  * DPDK callback to remove a MAC address.
1108  *
1109  * @param dev
1110  *   Pointer to Ethernet device structure.
1111  * @param index
1112  *   MAC address index.
1113  */
1114 static void
1115 mrvl_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
1116 {
1117         struct mrvl_priv *priv = dev->data->dev_private;
1118         char buf[RTE_ETHER_ADDR_FMT_SIZE];
1119         int ret;
1120
1121         if (!priv->ppio)
1122                 return;
1123
1124         if (priv->isolated)
1125                 return;
1126
1127         ret = pp2_ppio_remove_mac_addr(priv->ppio,
1128                                        dev->data->mac_addrs[index].addr_bytes);
1129         if (ret) {
1130                 rte_ether_format_addr(buf, sizeof(buf),
1131                                   &dev->data->mac_addrs[index]);
1132                 MRVL_LOG(ERR, "Failed to remove mac %s", buf);
1133         }
1134 }
1135
1136 /**
1137  * DPDK callback to add a MAC address.
1138  *
1139  * @param dev
1140  *   Pointer to Ethernet device structure.
1141  * @param mac_addr
1142  *   MAC address to register.
1143  * @param index
1144  *   MAC address index.
1145  * @param vmdq
1146  *   VMDq pool index to associate address with (unused).
1147  *
1148  * @return
1149  *   0 on success, negative error value otherwise.
1150  */
1151 static int
1152 mrvl_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr,
1153                   uint32_t index, uint32_t vmdq __rte_unused)
1154 {
1155         struct mrvl_priv *priv = dev->data->dev_private;
1156         char buf[RTE_ETHER_ADDR_FMT_SIZE];
1157         int ret;
1158
1159         if (priv->isolated)
1160                 return -ENOTSUP;
1161
1162         if (index == 0)
1163                 /* For setting index 0, mrvl_mac_addr_set() should be used.*/
1164                 return -1;
1165
1166         if (!priv->ppio)
1167                 return 0;
1168
1169         /*
1170          * Maximum number of uc addresses can be tuned via kernel module mvpp2x
1171          * parameter uc_filter_max. Maximum number of mc addresses is then
1172          * MRVL_MAC_ADDRS_MAX - uc_filter_max. Currently it defaults to 4 and
1173          * 21 respectively.
1174          *
1175          * If more than uc_filter_max uc addresses were added to filter list
1176          * then NIC will switch to promiscuous mode automatically.
1177          *
1178          * If more than MRVL_MAC_ADDRS_MAX - uc_filter_max number mc addresses
1179          * were added to filter list then NIC will switch to all-multicast mode
1180          * automatically.
1181          */
1182         ret = pp2_ppio_add_mac_addr(priv->ppio, mac_addr->addr_bytes);
1183         if (ret) {
1184                 rte_ether_format_addr(buf, sizeof(buf), mac_addr);
1185                 MRVL_LOG(ERR, "Failed to add mac %s", buf);
1186                 return -1;
1187         }
1188
1189         return 0;
1190 }
1191
1192 /**
1193  * DPDK callback to set the primary MAC address.
1194  *
1195  * @param dev
1196  *   Pointer to Ethernet device structure.
1197  * @param mac_addr
1198  *   MAC address to register.
1199  *
1200  * @return
1201  *   0 on success, negative error value otherwise.
1202  */
1203 static int
1204 mrvl_mac_addr_set(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr)
1205 {
1206         struct mrvl_priv *priv = dev->data->dev_private;
1207         int ret;
1208
1209         if (!priv->ppio)
1210                 return 0;
1211
1212         if (priv->isolated)
1213                 return -ENOTSUP;
1214
1215         ret = pp2_ppio_set_mac_addr(priv->ppio, mac_addr->addr_bytes);
1216         if (ret) {
1217                 char buf[RTE_ETHER_ADDR_FMT_SIZE];
1218                 rte_ether_format_addr(buf, sizeof(buf), mac_addr);
1219                 MRVL_LOG(ERR, "Failed to set mac to %s", buf);
1220         }
1221
1222         return ret;
1223 }
1224
1225 /**
1226  * DPDK callback to get device statistics.
1227  *
1228  * @param dev
1229  *   Pointer to Ethernet device structure.
1230  * @param stats
1231  *   Stats structure output buffer.
1232  *
1233  * @return
1234  *   0 on success, negative error value otherwise.
1235  */
1236 static int
1237 mrvl_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1238 {
1239         struct mrvl_priv *priv = dev->data->dev_private;
1240         struct pp2_ppio_statistics ppio_stats;
1241         uint64_t drop_mac = 0;
1242         unsigned int i, idx, ret;
1243
1244         if (!priv->ppio)
1245                 return -EPERM;
1246
1247         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1248                 struct mrvl_rxq *rxq = dev->data->rx_queues[i];
1249                 struct pp2_ppio_inq_statistics rx_stats;
1250
1251                 if (!rxq)
1252                         continue;
1253
1254                 idx = rxq->queue_id;
1255                 if (unlikely(idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)) {
1256                         MRVL_LOG(ERR,
1257                                 "rx queue %d stats out of range (0 - %d)",
1258                                 idx, RTE_ETHDEV_QUEUE_STAT_CNTRS - 1);
1259                         continue;
1260                 }
1261
1262                 ret = pp2_ppio_inq_get_statistics(priv->ppio,
1263                                                   priv->rxq_map[idx].tc,
1264                                                   priv->rxq_map[idx].inq,
1265                                                   &rx_stats, 0);
1266                 if (unlikely(ret)) {
1267                         MRVL_LOG(ERR,
1268                                 "Failed to update rx queue %d stats", idx);
1269                         break;
1270                 }
1271
1272                 stats->q_ibytes[idx] = rxq->bytes_recv;
1273                 stats->q_ipackets[idx] = rx_stats.enq_desc - rxq->drop_mac;
1274                 stats->q_errors[idx] = rx_stats.drop_early +
1275                                        rx_stats.drop_fullq +
1276                                        rx_stats.drop_bm +
1277                                        rxq->drop_mac;
1278                 stats->ibytes += rxq->bytes_recv;
1279                 drop_mac += rxq->drop_mac;
1280         }
1281
1282         for (i = 0; i < dev->data->nb_tx_queues; i++) {
1283                 struct mrvl_txq *txq = dev->data->tx_queues[i];
1284                 struct pp2_ppio_outq_statistics tx_stats;
1285
1286                 if (!txq)
1287                         continue;
1288
1289                 idx = txq->queue_id;
1290                 if (unlikely(idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)) {
1291                         MRVL_LOG(ERR,
1292                                 "tx queue %d stats out of range (0 - %d)",
1293                                 idx, RTE_ETHDEV_QUEUE_STAT_CNTRS - 1);
1294                 }
1295
1296                 ret = pp2_ppio_outq_get_statistics(priv->ppio, idx,
1297                                                    &tx_stats, 0);
1298                 if (unlikely(ret)) {
1299                         MRVL_LOG(ERR,
1300                                 "Failed to update tx queue %d stats", idx);
1301                         break;
1302                 }
1303
1304                 stats->q_opackets[idx] = tx_stats.deq_desc;
1305                 stats->q_obytes[idx] = txq->bytes_sent;
1306                 stats->obytes += txq->bytes_sent;
1307         }
1308
1309         ret = pp2_ppio_get_statistics(priv->ppio, &ppio_stats, 0);
1310         if (unlikely(ret)) {
1311                 MRVL_LOG(ERR, "Failed to update port statistics");
1312                 return ret;
1313         }
1314
1315         stats->ipackets += ppio_stats.rx_packets - drop_mac;
1316         stats->opackets += ppio_stats.tx_packets;
1317         stats->imissed += ppio_stats.rx_fullq_dropped +
1318                           ppio_stats.rx_bm_dropped +
1319                           ppio_stats.rx_early_dropped +
1320                           ppio_stats.rx_fifo_dropped +
1321                           ppio_stats.rx_cls_dropped;
1322         stats->ierrors = drop_mac;
1323
1324         return 0;
1325 }
1326
1327 /**
1328  * DPDK callback to clear device statistics.
1329  *
1330  * @param dev
1331  *   Pointer to Ethernet device structure.
1332  *
1333  * @return
1334  *   0 on success, negative error value otherwise.
1335  */
1336 static int
1337 mrvl_stats_reset(struct rte_eth_dev *dev)
1338 {
1339         struct mrvl_priv *priv = dev->data->dev_private;
1340         int i;
1341
1342         if (!priv->ppio)
1343                 return 0;
1344
1345         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1346                 struct mrvl_rxq *rxq = dev->data->rx_queues[i];
1347
1348                 pp2_ppio_inq_get_statistics(priv->ppio, priv->rxq_map[i].tc,
1349                                             priv->rxq_map[i].inq, NULL, 1);
1350                 rxq->bytes_recv = 0;
1351                 rxq->drop_mac = 0;
1352         }
1353
1354         for (i = 0; i < dev->data->nb_tx_queues; i++) {
1355                 struct mrvl_txq *txq = dev->data->tx_queues[i];
1356
1357                 pp2_ppio_outq_get_statistics(priv->ppio, i, NULL, 1);
1358                 txq->bytes_sent = 0;
1359         }
1360
1361         return pp2_ppio_get_statistics(priv->ppio, NULL, 1);
1362 }
1363
1364 /**
1365  * DPDK callback to get extended statistics.
1366  *
1367  * @param dev
1368  *   Pointer to Ethernet device structure.
1369  * @param stats
1370  *   Pointer to xstats table.
1371  * @param n
1372  *   Number of entries in xstats table.
1373  * @return
1374  *   Negative value on error, number of read xstats otherwise.
1375  */
1376 static int
1377 mrvl_xstats_get(struct rte_eth_dev *dev,
1378                 struct rte_eth_xstat *stats, unsigned int n)
1379 {
1380         struct mrvl_priv *priv = dev->data->dev_private;
1381         struct pp2_ppio_statistics ppio_stats;
1382         unsigned int i;
1383
1384         if (!stats)
1385                 return 0;
1386
1387         pp2_ppio_get_statistics(priv->ppio, &ppio_stats, 0);
1388         for (i = 0; i < n && i < RTE_DIM(mrvl_xstats_tbl); i++) {
1389                 uint64_t val;
1390
1391                 if (mrvl_xstats_tbl[i].size == sizeof(uint32_t))
1392                         val = *(uint32_t *)((uint8_t *)&ppio_stats +
1393                                             mrvl_xstats_tbl[i].offset);
1394                 else if (mrvl_xstats_tbl[i].size == sizeof(uint64_t))
1395                         val = *(uint64_t *)((uint8_t *)&ppio_stats +
1396                                             mrvl_xstats_tbl[i].offset);
1397                 else
1398                         return -EINVAL;
1399
1400                 stats[i].id = i;
1401                 stats[i].value = val;
1402         }
1403
1404         return n;
1405 }
1406
1407 /**
1408  * DPDK callback to reset extended statistics.
1409  *
1410  * @param dev
1411  *   Pointer to Ethernet device structure.
1412  *
1413  * @return
1414  *   0 on success, negative error value otherwise.
1415  */
1416 static int
1417 mrvl_xstats_reset(struct rte_eth_dev *dev)
1418 {
1419         return mrvl_stats_reset(dev);
1420 }
1421
1422 /**
1423  * DPDK callback to get extended statistics names.
1424  *
1425  * @param dev (unused)
1426  *   Pointer to Ethernet device structure.
1427  * @param xstats_names
1428  *   Pointer to xstats names table.
1429  * @param size
1430  *   Size of the xstats names table.
1431  * @return
1432  *   Number of read names.
1433  */
1434 static int
1435 mrvl_xstats_get_names(struct rte_eth_dev *dev __rte_unused,
1436                       struct rte_eth_xstat_name *xstats_names,
1437                       unsigned int size)
1438 {
1439         unsigned int i;
1440
1441         if (!xstats_names)
1442                 return RTE_DIM(mrvl_xstats_tbl);
1443
1444         for (i = 0; i < size && i < RTE_DIM(mrvl_xstats_tbl); i++)
1445                 strlcpy(xstats_names[i].name, mrvl_xstats_tbl[i].name,
1446                         RTE_ETH_XSTATS_NAME_SIZE);
1447
1448         return size;
1449 }
1450
1451 /**
1452  * DPDK callback to get information about the device.
1453  *
1454  * @param dev
1455  *   Pointer to Ethernet device structure (unused).
1456  * @param info
1457  *   Info structure output buffer.
1458  */
1459 static int
1460 mrvl_dev_infos_get(struct rte_eth_dev *dev __rte_unused,
1461                    struct rte_eth_dev_info *info)
1462 {
1463         info->speed_capa = ETH_LINK_SPEED_10M |
1464                            ETH_LINK_SPEED_100M |
1465                            ETH_LINK_SPEED_1G |
1466                            ETH_LINK_SPEED_10G;
1467
1468         info->max_rx_queues = MRVL_PP2_RXQ_MAX;
1469         info->max_tx_queues = MRVL_PP2_TXQ_MAX;
1470         info->max_mac_addrs = MRVL_MAC_ADDRS_MAX;
1471
1472         info->rx_desc_lim.nb_max = MRVL_PP2_RXD_MAX;
1473         info->rx_desc_lim.nb_min = MRVL_PP2_RXD_MIN;
1474         info->rx_desc_lim.nb_align = MRVL_PP2_RXD_ALIGN;
1475
1476         info->tx_desc_lim.nb_max = MRVL_PP2_TXD_MAX;
1477         info->tx_desc_lim.nb_min = MRVL_PP2_TXD_MIN;
1478         info->tx_desc_lim.nb_align = MRVL_PP2_TXD_ALIGN;
1479
1480         info->rx_offload_capa = MRVL_RX_OFFLOADS;
1481         info->rx_queue_offload_capa = MRVL_RX_OFFLOADS;
1482
1483         info->tx_offload_capa = MRVL_TX_OFFLOADS;
1484         info->tx_queue_offload_capa = MRVL_TX_OFFLOADS;
1485
1486         info->flow_type_rss_offloads = ETH_RSS_IPV4 |
1487                                        ETH_RSS_NONFRAG_IPV4_TCP |
1488                                        ETH_RSS_NONFRAG_IPV4_UDP;
1489
1490         /* By default packets are dropped if no descriptors are available */
1491         info->default_rxconf.rx_drop_en = 1;
1492
1493         info->max_rx_pktlen = MRVL_PKT_SIZE_MAX;
1494
1495         return 0;
1496 }
1497
1498 /**
1499  * Return supported packet types.
1500  *
1501  * @param dev
1502  *   Pointer to Ethernet device structure (unused).
1503  *
1504  * @return
1505  *   Const pointer to the table with supported packet types.
1506  */
1507 static const uint32_t *
1508 mrvl_dev_supported_ptypes_get(struct rte_eth_dev *dev __rte_unused)
1509 {
1510         static const uint32_t ptypes[] = {
1511                 RTE_PTYPE_L2_ETHER,
1512                 RTE_PTYPE_L2_ETHER_VLAN,
1513                 RTE_PTYPE_L2_ETHER_QINQ,
1514                 RTE_PTYPE_L3_IPV4,
1515                 RTE_PTYPE_L3_IPV4_EXT,
1516                 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
1517                 RTE_PTYPE_L3_IPV6,
1518                 RTE_PTYPE_L3_IPV6_EXT,
1519                 RTE_PTYPE_L2_ETHER_ARP,
1520                 RTE_PTYPE_L4_TCP,
1521                 RTE_PTYPE_L4_UDP
1522         };
1523
1524         return ptypes;
1525 }
1526
1527 /**
1528  * DPDK callback to get information about specific receive queue.
1529  *
1530  * @param dev
1531  *   Pointer to Ethernet device structure.
1532  * @param rx_queue_id
1533  *   Receive queue index.
1534  * @param qinfo
1535  *   Receive queue information structure.
1536  */
1537 static void mrvl_rxq_info_get(struct rte_eth_dev *dev, uint16_t rx_queue_id,
1538                               struct rte_eth_rxq_info *qinfo)
1539 {
1540         struct mrvl_rxq *q = dev->data->rx_queues[rx_queue_id];
1541         struct mrvl_priv *priv = dev->data->dev_private;
1542         int inq = priv->rxq_map[rx_queue_id].inq;
1543         int tc = priv->rxq_map[rx_queue_id].tc;
1544         struct pp2_ppio_tc_params *tc_params =
1545                 &priv->ppio_params.inqs_params.tcs_params[tc];
1546
1547         qinfo->mp = q->mp;
1548         qinfo->nb_desc = tc_params->inqs_params[inq].size;
1549 }
1550
1551 /**
1552  * DPDK callback to get information about specific transmit queue.
1553  *
1554  * @param dev
1555  *   Pointer to Ethernet device structure.
1556  * @param tx_queue_id
1557  *   Transmit queue index.
1558  * @param qinfo
1559  *   Transmit queue information structure.
1560  */
1561 static void mrvl_txq_info_get(struct rte_eth_dev *dev, uint16_t tx_queue_id,
1562                               struct rte_eth_txq_info *qinfo)
1563 {
1564         struct mrvl_priv *priv = dev->data->dev_private;
1565         struct mrvl_txq *txq = dev->data->tx_queues[tx_queue_id];
1566
1567         qinfo->nb_desc =
1568                 priv->ppio_params.outqs_params.outqs_params[tx_queue_id].size;
1569         qinfo->conf.tx_deferred_start = txq->tx_deferred_start;
1570 }
1571
1572 /**
1573  * DPDK callback to Configure a VLAN filter.
1574  *
1575  * @param dev
1576  *   Pointer to Ethernet device structure.
1577  * @param vlan_id
1578  *   VLAN ID to filter.
1579  * @param on
1580  *   Toggle filter.
1581  *
1582  * @return
1583  *   0 on success, negative error value otherwise.
1584  */
1585 static int
1586 mrvl_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1587 {
1588         struct mrvl_priv *priv = dev->data->dev_private;
1589
1590         if (!priv->ppio)
1591                 return -EPERM;
1592
1593         if (priv->isolated)
1594                 return -ENOTSUP;
1595
1596         return on ? pp2_ppio_add_vlan(priv->ppio, vlan_id) :
1597                     pp2_ppio_remove_vlan(priv->ppio, vlan_id);
1598 }
1599
1600 /**
1601  * Release buffers to hardware bpool (buffer-pool)
1602  *
1603  * @param rxq
1604  *   Receive queue pointer.
1605  * @param num
1606  *   Number of buffers to release to bpool.
1607  *
1608  * @return
1609  *   0 on success, negative error value otherwise.
1610  */
1611 static int
1612 mrvl_fill_bpool(struct mrvl_rxq *rxq, int num)
1613 {
1614         struct buff_release_entry entries[MRVL_PP2_RXD_MAX];
1615         struct rte_mbuf *mbufs[MRVL_PP2_RXD_MAX];
1616         int i, ret;
1617         unsigned int core_id;
1618         struct pp2_hif *hif;
1619         struct pp2_bpool *bpool;
1620
1621         core_id = rte_lcore_id();
1622         if (core_id == LCORE_ID_ANY)
1623                 core_id = rte_get_master_lcore();
1624
1625         hif = mrvl_get_hif(rxq->priv, core_id);
1626         if (!hif)
1627                 return -1;
1628
1629         bpool = rxq->priv->bpool;
1630
1631         ret = rte_pktmbuf_alloc_bulk(rxq->mp, mbufs, num);
1632         if (ret)
1633                 return ret;
1634
1635         if (cookie_addr_high == MRVL_COOKIE_ADDR_INVALID)
1636                 cookie_addr_high =
1637                         (uint64_t)mbufs[0] & MRVL_COOKIE_HIGH_ADDR_MASK;
1638
1639         for (i = 0; i < num; i++) {
1640                 if (((uint64_t)mbufs[i] & MRVL_COOKIE_HIGH_ADDR_MASK)
1641                         != cookie_addr_high) {
1642                         MRVL_LOG(ERR,
1643                                 "mbuf virtual addr high 0x%lx out of range",
1644                                 (uint64_t)mbufs[i] >> 32);
1645                         goto out;
1646                 }
1647
1648                 entries[i].buff.addr =
1649                         rte_mbuf_data_iova_default(mbufs[i]);
1650                 entries[i].buff.cookie = (uint64_t)mbufs[i];
1651                 entries[i].bpool = bpool;
1652         }
1653
1654         pp2_bpool_put_buffs(hif, entries, (uint16_t *)&i);
1655         mrvl_port_bpool_size[bpool->pp2_id][bpool->id][core_id] += i;
1656
1657         if (i != num)
1658                 goto out;
1659
1660         return 0;
1661 out:
1662         for (; i < num; i++)
1663                 rte_pktmbuf_free(mbufs[i]);
1664
1665         return -1;
1666 }
1667
1668 /**
1669  * DPDK callback to configure the receive queue.
1670  *
1671  * @param dev
1672  *   Pointer to Ethernet device structure.
1673  * @param idx
1674  *   RX queue index.
1675  * @param desc
1676  *   Number of descriptors to configure in queue.
1677  * @param socket
1678  *   NUMA socket on which memory must be allocated.
1679  * @param conf
1680  *   Thresholds parameters.
1681  * @param mp
1682  *   Memory pool for buffer allocations.
1683  *
1684  * @return
1685  *   0 on success, negative error value otherwise.
1686  */
1687 static int
1688 mrvl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1689                     unsigned int socket,
1690                     const struct rte_eth_rxconf *conf,
1691                     struct rte_mempool *mp)
1692 {
1693         struct mrvl_priv *priv = dev->data->dev_private;
1694         struct mrvl_rxq *rxq;
1695         uint32_t frame_size, buf_size = rte_pktmbuf_data_room_size(mp);
1696         uint32_t max_rx_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
1697         int ret, tc, inq;
1698         uint64_t offloads;
1699
1700         offloads = conf->offloads | dev->data->dev_conf.rxmode.offloads;
1701
1702         if (priv->rxq_map[idx].tc == MRVL_UNKNOWN_TC) {
1703                 /*
1704                  * Unknown TC mapping, mapping will not have a correct queue.
1705                  */
1706                 MRVL_LOG(ERR, "Unknown TC mapping for queue %hu eth%hhu",
1707                         idx, priv->ppio_id);
1708                 return -EFAULT;
1709         }
1710
1711         frame_size = buf_size - RTE_PKTMBUF_HEADROOM - MRVL_PKT_EFFEC_OFFS;
1712         if (frame_size < max_rx_pkt_len) {
1713                 MRVL_LOG(WARNING,
1714                         "Mbuf size must be increased to %u bytes to hold up "
1715                         "to %u bytes of data.",
1716                         buf_size + max_rx_pkt_len - frame_size,
1717                         max_rx_pkt_len);
1718                 dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
1719                 MRVL_LOG(INFO, "Setting max rx pkt len to %u",
1720                         dev->data->dev_conf.rxmode.max_rx_pkt_len);
1721         }
1722
1723         if (dev->data->rx_queues[idx]) {
1724                 rte_free(dev->data->rx_queues[idx]);
1725                 dev->data->rx_queues[idx] = NULL;
1726         }
1727
1728         rxq = rte_zmalloc_socket("rxq", sizeof(*rxq), 0, socket);
1729         if (!rxq)
1730                 return -ENOMEM;
1731
1732         rxq->priv = priv;
1733         rxq->mp = mp;
1734         rxq->cksum_enabled = offloads & DEV_RX_OFFLOAD_IPV4_CKSUM;
1735         rxq->queue_id = idx;
1736         rxq->port_id = dev->data->port_id;
1737         mrvl_port_to_bpool_lookup[rxq->port_id] = priv->bpool;
1738
1739         tc = priv->rxq_map[rxq->queue_id].tc,
1740         inq = priv->rxq_map[rxq->queue_id].inq;
1741         priv->ppio_params.inqs_params.tcs_params[tc].inqs_params[inq].size =
1742                 desc;
1743
1744         ret = mrvl_fill_bpool(rxq, desc);
1745         if (ret) {
1746                 rte_free(rxq);
1747                 return ret;
1748         }
1749
1750         priv->bpool_init_size += desc;
1751
1752         dev->data->rx_queues[idx] = rxq;
1753
1754         return 0;
1755 }
1756
1757 /**
1758  * DPDK callback to release the receive queue.
1759  *
1760  * @param rxq
1761  *   Generic receive queue pointer.
1762  */
1763 static void
1764 mrvl_rx_queue_release(void *rxq)
1765 {
1766         struct mrvl_rxq *q = rxq;
1767         struct pp2_ppio_tc_params *tc_params;
1768         int i, num, tc, inq;
1769         struct pp2_hif *hif;
1770         unsigned int core_id = rte_lcore_id();
1771
1772         if (core_id == LCORE_ID_ANY)
1773                 core_id = rte_get_master_lcore();
1774
1775         if (!q)
1776                 return;
1777
1778         hif = mrvl_get_hif(q->priv, core_id);
1779
1780         if (!hif)
1781                 return;
1782
1783         tc = q->priv->rxq_map[q->queue_id].tc;
1784         inq = q->priv->rxq_map[q->queue_id].inq;
1785         tc_params = &q->priv->ppio_params.inqs_params.tcs_params[tc];
1786         num = tc_params->inqs_params[inq].size;
1787         for (i = 0; i < num; i++) {
1788                 struct pp2_buff_inf inf;
1789                 uint64_t addr;
1790
1791                 pp2_bpool_get_buff(hif, q->priv->bpool, &inf);
1792                 addr = cookie_addr_high | inf.cookie;
1793                 rte_pktmbuf_free((struct rte_mbuf *)addr);
1794         }
1795
1796         rte_free(q);
1797 }
1798
1799 /**
1800  * DPDK callback to configure the transmit queue.
1801  *
1802  * @param dev
1803  *   Pointer to Ethernet device structure.
1804  * @param idx
1805  *   Transmit queue index.
1806  * @param desc
1807  *   Number of descriptors to configure in the queue.
1808  * @param socket
1809  *   NUMA socket on which memory must be allocated.
1810  * @param conf
1811  *   Tx queue configuration parameters.
1812  *
1813  * @return
1814  *   0 on success, negative error value otherwise.
1815  */
1816 static int
1817 mrvl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1818                     unsigned int socket,
1819                     const struct rte_eth_txconf *conf)
1820 {
1821         struct mrvl_priv *priv = dev->data->dev_private;
1822         struct mrvl_txq *txq;
1823
1824         if (dev->data->tx_queues[idx]) {
1825                 rte_free(dev->data->tx_queues[idx]);
1826                 dev->data->tx_queues[idx] = NULL;
1827         }
1828
1829         txq = rte_zmalloc_socket("txq", sizeof(*txq), 0, socket);
1830         if (!txq)
1831                 return -ENOMEM;
1832
1833         txq->priv = priv;
1834         txq->queue_id = idx;
1835         txq->port_id = dev->data->port_id;
1836         txq->tx_deferred_start = conf->tx_deferred_start;
1837         dev->data->tx_queues[idx] = txq;
1838
1839         priv->ppio_params.outqs_params.outqs_params[idx].size = desc;
1840
1841         return 0;
1842 }
1843
1844 /**
1845  * DPDK callback to release the transmit queue.
1846  *
1847  * @param txq
1848  *   Generic transmit queue pointer.
1849  */
1850 static void
1851 mrvl_tx_queue_release(void *txq)
1852 {
1853         struct mrvl_txq *q = txq;
1854
1855         if (!q)
1856                 return;
1857
1858         rte_free(q);
1859 }
1860
1861 /**
1862  * DPDK callback to get flow control configuration.
1863  *
1864  * @param dev
1865  *  Pointer to Ethernet device structure.
1866  * @param fc_conf
1867  *  Pointer to the flow control configuration.
1868  *
1869  * @return
1870  *  0 on success, negative error value otherwise.
1871  */
1872 static int
1873 mrvl_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1874 {
1875         struct mrvl_priv *priv = dev->data->dev_private;
1876         int ret, en;
1877
1878         if (!priv)
1879                 return -EPERM;
1880
1881         ret = pp2_ppio_get_rx_pause(priv->ppio, &en);
1882         if (ret) {
1883                 MRVL_LOG(ERR, "Failed to read rx pause state");
1884                 return ret;
1885         }
1886
1887         fc_conf->mode = en ? RTE_FC_RX_PAUSE : RTE_FC_NONE;
1888
1889         return 0;
1890 }
1891
1892 /**
1893  * DPDK callback to set flow control configuration.
1894  *
1895  * @param dev
1896  *  Pointer to Ethernet device structure.
1897  * @param fc_conf
1898  *  Pointer to the flow control configuration.
1899  *
1900  * @return
1901  *  0 on success, negative error value otherwise.
1902  */
1903 static int
1904 mrvl_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1905 {
1906         struct mrvl_priv *priv = dev->data->dev_private;
1907
1908         if (!priv)
1909                 return -EPERM;
1910
1911         if (fc_conf->high_water ||
1912             fc_conf->low_water ||
1913             fc_conf->pause_time ||
1914             fc_conf->mac_ctrl_frame_fwd ||
1915             fc_conf->autoneg) {
1916                 MRVL_LOG(ERR, "Flowctrl parameter is not supported");
1917
1918                 return -EINVAL;
1919         }
1920
1921         if (fc_conf->mode == RTE_FC_NONE ||
1922             fc_conf->mode == RTE_FC_RX_PAUSE) {
1923                 int ret, en;
1924
1925                 en = fc_conf->mode == RTE_FC_NONE ? 0 : 1;
1926                 ret = pp2_ppio_set_rx_pause(priv->ppio, en);
1927                 if (ret)
1928                         MRVL_LOG(ERR,
1929                                 "Failed to change flowctrl on RX side");
1930
1931                 return ret;
1932         }
1933
1934         return 0;
1935 }
1936
1937 /**
1938  * Update RSS hash configuration
1939  *
1940  * @param dev
1941  *   Pointer to Ethernet device structure.
1942  * @param rss_conf
1943  *   Pointer to RSS configuration.
1944  *
1945  * @return
1946  *   0 on success, negative error value otherwise.
1947  */
1948 static int
1949 mrvl_rss_hash_update(struct rte_eth_dev *dev,
1950                      struct rte_eth_rss_conf *rss_conf)
1951 {
1952         struct mrvl_priv *priv = dev->data->dev_private;
1953
1954         if (priv->isolated)
1955                 return -ENOTSUP;
1956
1957         return mrvl_configure_rss(priv, rss_conf);
1958 }
1959
1960 /**
1961  * DPDK callback to get RSS hash configuration.
1962  *
1963  * @param dev
1964  *   Pointer to Ethernet device structure.
1965  * @rss_conf
1966  *   Pointer to RSS configuration.
1967  *
1968  * @return
1969  *   Always 0.
1970  */
1971 static int
1972 mrvl_rss_hash_conf_get(struct rte_eth_dev *dev,
1973                        struct rte_eth_rss_conf *rss_conf)
1974 {
1975         struct mrvl_priv *priv = dev->data->dev_private;
1976         enum pp2_ppio_hash_type hash_type =
1977                 priv->ppio_params.inqs_params.hash_type;
1978
1979         rss_conf->rss_key = NULL;
1980
1981         if (hash_type == PP2_PPIO_HASH_T_NONE)
1982                 rss_conf->rss_hf = 0;
1983         else if (hash_type == PP2_PPIO_HASH_T_2_TUPLE)
1984                 rss_conf->rss_hf = ETH_RSS_IPV4;
1985         else if (hash_type == PP2_PPIO_HASH_T_5_TUPLE && priv->rss_hf_tcp)
1986                 rss_conf->rss_hf = ETH_RSS_NONFRAG_IPV4_TCP;
1987         else if (hash_type == PP2_PPIO_HASH_T_5_TUPLE && !priv->rss_hf_tcp)
1988                 rss_conf->rss_hf = ETH_RSS_NONFRAG_IPV4_UDP;
1989
1990         return 0;
1991 }
1992
1993 /**
1994  * DPDK callback to get rte_flow callbacks.
1995  *
1996  * @param dev
1997  *   Pointer to the device structure.
1998  * @param filer_type
1999  *   Flow filter type.
2000  * @param filter_op
2001  *   Flow filter operation.
2002  * @param arg
2003  *   Pointer to pass the flow ops.
2004  *
2005  * @return
2006  *   0 on success, negative error value otherwise.
2007  */
2008 static int
2009 mrvl_eth_filter_ctrl(struct rte_eth_dev *dev __rte_unused,
2010                      enum rte_filter_type filter_type,
2011                      enum rte_filter_op filter_op, void *arg)
2012 {
2013         switch (filter_type) {
2014         case RTE_ETH_FILTER_GENERIC:
2015                 if (filter_op != RTE_ETH_FILTER_GET)
2016                         return -EINVAL;
2017                 *(const void **)arg = &mrvl_flow_ops;
2018                 return 0;
2019         default:
2020                 MRVL_LOG(WARNING, "Filter type (%d) not supported",
2021                                 filter_type);
2022                 return -EINVAL;
2023         }
2024 }
2025
2026 /**
2027  * DPDK callback to get rte_mtr callbacks.
2028  *
2029  * @param dev
2030  *   Pointer to the device structure.
2031  * @param ops
2032  *   Pointer to pass the mtr ops.
2033  *
2034  * @return
2035  *   Always 0.
2036  */
2037 static int
2038 mrvl_mtr_ops_get(struct rte_eth_dev *dev __rte_unused, void *ops)
2039 {
2040         *(const void **)ops = &mrvl_mtr_ops;
2041
2042         return 0;
2043 }
2044
2045 /**
2046  * DPDK callback to get rte_tm callbacks.
2047  *
2048  * @param dev
2049  *   Pointer to the device structure.
2050  * @param ops
2051  *   Pointer to pass the tm ops.
2052  *
2053  * @return
2054  *   Always 0.
2055  */
2056 static int
2057 mrvl_tm_ops_get(struct rte_eth_dev *dev __rte_unused, void *ops)
2058 {
2059         *(const void **)ops = &mrvl_tm_ops;
2060
2061         return 0;
2062 }
2063
2064 static const struct eth_dev_ops mrvl_ops = {
2065         .dev_configure = mrvl_dev_configure,
2066         .dev_start = mrvl_dev_start,
2067         .dev_stop = mrvl_dev_stop,
2068         .dev_set_link_up = mrvl_dev_set_link_up,
2069         .dev_set_link_down = mrvl_dev_set_link_down,
2070         .dev_close = mrvl_dev_close,
2071         .link_update = mrvl_link_update,
2072         .promiscuous_enable = mrvl_promiscuous_enable,
2073         .allmulticast_enable = mrvl_allmulticast_enable,
2074         .promiscuous_disable = mrvl_promiscuous_disable,
2075         .allmulticast_disable = mrvl_allmulticast_disable,
2076         .mac_addr_remove = mrvl_mac_addr_remove,
2077         .mac_addr_add = mrvl_mac_addr_add,
2078         .mac_addr_set = mrvl_mac_addr_set,
2079         .mtu_set = mrvl_mtu_set,
2080         .stats_get = mrvl_stats_get,
2081         .stats_reset = mrvl_stats_reset,
2082         .xstats_get = mrvl_xstats_get,
2083         .xstats_reset = mrvl_xstats_reset,
2084         .xstats_get_names = mrvl_xstats_get_names,
2085         .dev_infos_get = mrvl_dev_infos_get,
2086         .dev_supported_ptypes_get = mrvl_dev_supported_ptypes_get,
2087         .rxq_info_get = mrvl_rxq_info_get,
2088         .txq_info_get = mrvl_txq_info_get,
2089         .vlan_filter_set = mrvl_vlan_filter_set,
2090         .tx_queue_start = mrvl_tx_queue_start,
2091         .tx_queue_stop = mrvl_tx_queue_stop,
2092         .rx_queue_setup = mrvl_rx_queue_setup,
2093         .rx_queue_release = mrvl_rx_queue_release,
2094         .tx_queue_setup = mrvl_tx_queue_setup,
2095         .tx_queue_release = mrvl_tx_queue_release,
2096         .flow_ctrl_get = mrvl_flow_ctrl_get,
2097         .flow_ctrl_set = mrvl_flow_ctrl_set,
2098         .rss_hash_update = mrvl_rss_hash_update,
2099         .rss_hash_conf_get = mrvl_rss_hash_conf_get,
2100         .filter_ctrl = mrvl_eth_filter_ctrl,
2101         .mtr_ops_get = mrvl_mtr_ops_get,
2102         .tm_ops_get = mrvl_tm_ops_get,
2103 };
2104
2105 /**
2106  * Return packet type information and l3/l4 offsets.
2107  *
2108  * @param desc
2109  *   Pointer to the received packet descriptor.
2110  * @param l3_offset
2111  *   l3 packet offset.
2112  * @param l4_offset
2113  *   l4 packet offset.
2114  *
2115  * @return
2116  *   Packet type information.
2117  */
2118 static inline uint64_t
2119 mrvl_desc_to_packet_type_and_offset(struct pp2_ppio_desc *desc,
2120                                     uint8_t *l3_offset, uint8_t *l4_offset)
2121 {
2122         enum pp2_inq_l3_type l3_type;
2123         enum pp2_inq_l4_type l4_type;
2124         enum pp2_inq_vlan_tag vlan_tag;
2125         uint64_t packet_type;
2126
2127         pp2_ppio_inq_desc_get_l3_info(desc, &l3_type, l3_offset);
2128         pp2_ppio_inq_desc_get_l4_info(desc, &l4_type, l4_offset);
2129         pp2_ppio_inq_desc_get_vlan_tag(desc, &vlan_tag);
2130
2131         packet_type = RTE_PTYPE_L2_ETHER;
2132
2133         switch (vlan_tag) {
2134         case PP2_INQ_VLAN_TAG_SINGLE:
2135                 packet_type |= RTE_PTYPE_L2_ETHER_VLAN;
2136                 break;
2137         case PP2_INQ_VLAN_TAG_DOUBLE:
2138         case PP2_INQ_VLAN_TAG_TRIPLE:
2139                 packet_type |= RTE_PTYPE_L2_ETHER_QINQ;
2140                 break;
2141         default:
2142                 break;
2143         }
2144
2145         switch (l3_type) {
2146         case PP2_INQ_L3_TYPE_IPV4_NO_OPTS:
2147                 packet_type |= RTE_PTYPE_L3_IPV4;
2148                 break;
2149         case PP2_INQ_L3_TYPE_IPV4_OK:
2150                 packet_type |= RTE_PTYPE_L3_IPV4_EXT;
2151                 break;
2152         case PP2_INQ_L3_TYPE_IPV4_TTL_ZERO:
2153                 packet_type |= RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
2154                 break;
2155         case PP2_INQ_L3_TYPE_IPV6_NO_EXT:
2156                 packet_type |= RTE_PTYPE_L3_IPV6;
2157                 break;
2158         case PP2_INQ_L3_TYPE_IPV6_EXT:
2159                 packet_type |= RTE_PTYPE_L3_IPV6_EXT;
2160                 break;
2161         case PP2_INQ_L3_TYPE_ARP:
2162                 packet_type |= RTE_PTYPE_L2_ETHER_ARP;
2163                 /*
2164                  * In case of ARP l4_offset is set to wrong value.
2165                  * Set it to proper one so that later on mbuf->l3_len can be
2166                  * calculated subtracting l4_offset and l3_offset.
2167                  */
2168                 *l4_offset = *l3_offset + MRVL_ARP_LENGTH;
2169                 break;
2170         default:
2171                 MRVL_LOG(DEBUG, "Failed to recognise l3 packet type");
2172                 break;
2173         }
2174
2175         switch (l4_type) {
2176         case PP2_INQ_L4_TYPE_TCP:
2177                 packet_type |= RTE_PTYPE_L4_TCP;
2178                 break;
2179         case PP2_INQ_L4_TYPE_UDP:
2180                 packet_type |= RTE_PTYPE_L4_UDP;
2181                 break;
2182         default:
2183                 MRVL_LOG(DEBUG, "Failed to recognise l4 packet type");
2184                 break;
2185         }
2186
2187         return packet_type;
2188 }
2189
2190 /**
2191  * Get offload information from the received packet descriptor.
2192  *
2193  * @param desc
2194  *   Pointer to the received packet descriptor.
2195  *
2196  * @return
2197  *   Mbuf offload flags.
2198  */
2199 static inline uint64_t
2200 mrvl_desc_to_ol_flags(struct pp2_ppio_desc *desc)
2201 {
2202         uint64_t flags;
2203         enum pp2_inq_desc_status status;
2204
2205         status = pp2_ppio_inq_desc_get_l3_pkt_error(desc);
2206         if (unlikely(status != PP2_DESC_ERR_OK))
2207                 flags = PKT_RX_IP_CKSUM_BAD;
2208         else
2209                 flags = PKT_RX_IP_CKSUM_GOOD;
2210
2211         status = pp2_ppio_inq_desc_get_l4_pkt_error(desc);
2212         if (unlikely(status != PP2_DESC_ERR_OK))
2213                 flags |= PKT_RX_L4_CKSUM_BAD;
2214         else
2215                 flags |= PKT_RX_L4_CKSUM_GOOD;
2216
2217         return flags;
2218 }
2219
2220 /**
2221  * DPDK callback for receive.
2222  *
2223  * @param rxq
2224  *   Generic pointer to the receive queue.
2225  * @param rx_pkts
2226  *   Array to store received packets.
2227  * @param nb_pkts
2228  *   Maximum number of packets in array.
2229  *
2230  * @return
2231  *   Number of packets successfully received.
2232  */
2233 static uint16_t
2234 mrvl_rx_pkt_burst(void *rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
2235 {
2236         struct mrvl_rxq *q = rxq;
2237         struct pp2_ppio_desc descs[nb_pkts];
2238         struct pp2_bpool *bpool;
2239         int i, ret, rx_done = 0;
2240         int num;
2241         struct pp2_hif *hif;
2242         unsigned int core_id = rte_lcore_id();
2243
2244         hif = mrvl_get_hif(q->priv, core_id);
2245
2246         if (unlikely(!q->priv->ppio || !hif))
2247                 return 0;
2248
2249         bpool = q->priv->bpool;
2250
2251         ret = pp2_ppio_recv(q->priv->ppio, q->priv->rxq_map[q->queue_id].tc,
2252                             q->priv->rxq_map[q->queue_id].inq, descs, &nb_pkts);
2253         if (unlikely(ret < 0)) {
2254                 MRVL_LOG(ERR, "Failed to receive packets");
2255                 return 0;
2256         }
2257         mrvl_port_bpool_size[bpool->pp2_id][bpool->id][core_id] -= nb_pkts;
2258
2259         for (i = 0; i < nb_pkts; i++) {
2260                 struct rte_mbuf *mbuf;
2261                 uint8_t l3_offset, l4_offset;
2262                 enum pp2_inq_desc_status status;
2263                 uint64_t addr;
2264
2265                 if (likely(nb_pkts - i > MRVL_MUSDK_PREFETCH_SHIFT)) {
2266                         struct pp2_ppio_desc *pref_desc;
2267                         u64 pref_addr;
2268
2269                         pref_desc = &descs[i + MRVL_MUSDK_PREFETCH_SHIFT];
2270                         pref_addr = cookie_addr_high |
2271                                     pp2_ppio_inq_desc_get_cookie(pref_desc);
2272                         rte_mbuf_prefetch_part1((struct rte_mbuf *)(pref_addr));
2273                         rte_mbuf_prefetch_part2((struct rte_mbuf *)(pref_addr));
2274                 }
2275
2276                 addr = cookie_addr_high |
2277                        pp2_ppio_inq_desc_get_cookie(&descs[i]);
2278                 mbuf = (struct rte_mbuf *)addr;
2279                 rte_pktmbuf_reset(mbuf);
2280
2281                 /* drop packet in case of mac, overrun or resource error */
2282                 status = pp2_ppio_inq_desc_get_l2_pkt_error(&descs[i]);
2283                 if (unlikely(status != PP2_DESC_ERR_OK)) {
2284                         struct pp2_buff_inf binf = {
2285                                 .addr = rte_mbuf_data_iova_default(mbuf),
2286                                 .cookie = (uint64_t)mbuf,
2287                         };
2288
2289                         pp2_bpool_put_buff(hif, bpool, &binf);
2290                         mrvl_port_bpool_size
2291                                 [bpool->pp2_id][bpool->id][core_id]++;
2292                         q->drop_mac++;
2293                         continue;
2294                 }
2295
2296                 mbuf->data_off += MRVL_PKT_EFFEC_OFFS;
2297                 mbuf->pkt_len = pp2_ppio_inq_desc_get_pkt_len(&descs[i]);
2298                 mbuf->data_len = mbuf->pkt_len;
2299                 mbuf->port = q->port_id;
2300                 mbuf->packet_type =
2301                         mrvl_desc_to_packet_type_and_offset(&descs[i],
2302                                                             &l3_offset,
2303                                                             &l4_offset);
2304                 mbuf->l2_len = l3_offset;
2305                 mbuf->l3_len = l4_offset - l3_offset;
2306
2307                 if (likely(q->cksum_enabled))
2308                         mbuf->ol_flags = mrvl_desc_to_ol_flags(&descs[i]);
2309
2310                 rx_pkts[rx_done++] = mbuf;
2311                 q->bytes_recv += mbuf->pkt_len;
2312         }
2313
2314         if (rte_spinlock_trylock(&q->priv->lock) == 1) {
2315                 num = mrvl_get_bpool_size(bpool->pp2_id, bpool->id);
2316
2317                 if (unlikely(num <= q->priv->bpool_min_size ||
2318                              (!rx_done && num < q->priv->bpool_init_size))) {
2319                         ret = mrvl_fill_bpool(q, MRVL_BURST_SIZE);
2320                         if (ret)
2321                                 MRVL_LOG(ERR, "Failed to fill bpool");
2322                 } else if (unlikely(num > q->priv->bpool_max_size)) {
2323                         int i;
2324                         int pkt_to_remove = num - q->priv->bpool_init_size;
2325                         struct rte_mbuf *mbuf;
2326                         struct pp2_buff_inf buff;
2327
2328                         MRVL_LOG(DEBUG,
2329                                 "port-%d:%d: bpool %d oversize - remove %d buffers (pool size: %d -> %d)",
2330                                 bpool->pp2_id, q->priv->ppio->port_id,
2331                                 bpool->id, pkt_to_remove, num,
2332                                 q->priv->bpool_init_size);
2333
2334                         for (i = 0; i < pkt_to_remove; i++) {
2335                                 ret = pp2_bpool_get_buff(hif, bpool, &buff);
2336                                 if (ret)
2337                                         break;
2338                                 mbuf = (struct rte_mbuf *)
2339                                         (cookie_addr_high | buff.cookie);
2340                                 rte_pktmbuf_free(mbuf);
2341                         }
2342                         mrvl_port_bpool_size
2343                                 [bpool->pp2_id][bpool->id][core_id] -= i;
2344                 }
2345                 rte_spinlock_unlock(&q->priv->lock);
2346         }
2347
2348         return rx_done;
2349 }
2350
2351 /**
2352  * Prepare offload information.
2353  *
2354  * @param ol_flags
2355  *   Offload flags.
2356  * @param packet_type
2357  *   Packet type bitfield.
2358  * @param l3_type
2359  *   Pointer to the pp2_ouq_l3_type structure.
2360  * @param l4_type
2361  *   Pointer to the pp2_outq_l4_type structure.
2362  * @param gen_l3_cksum
2363  *   Will be set to 1 in case l3 checksum is computed.
2364  * @param l4_cksum
2365  *   Will be set to 1 in case l4 checksum is computed.
2366  *
2367  * @return
2368  *   0 on success, negative error value otherwise.
2369  */
2370 static inline int
2371 mrvl_prepare_proto_info(uint64_t ol_flags, uint32_t packet_type,
2372                         enum pp2_outq_l3_type *l3_type,
2373                         enum pp2_outq_l4_type *l4_type,
2374                         int *gen_l3_cksum,
2375                         int *gen_l4_cksum)
2376 {
2377         /*
2378          * Based on ol_flags prepare information
2379          * for pp2_ppio_outq_desc_set_proto_info() which setups descriptor
2380          * for offloading.
2381          */
2382         if (ol_flags & PKT_TX_IPV4) {
2383                 *l3_type = PP2_OUTQ_L3_TYPE_IPV4;
2384                 *gen_l3_cksum = ol_flags & PKT_TX_IP_CKSUM ? 1 : 0;
2385         } else if (ol_flags & PKT_TX_IPV6) {
2386                 *l3_type = PP2_OUTQ_L3_TYPE_IPV6;
2387                 /* no checksum for ipv6 header */
2388                 *gen_l3_cksum = 0;
2389         } else {
2390                 /* if something different then stop processing */
2391                 return -1;
2392         }
2393
2394         ol_flags &= PKT_TX_L4_MASK;
2395         if ((packet_type & RTE_PTYPE_L4_TCP) &&
2396             ol_flags == PKT_TX_TCP_CKSUM) {
2397                 *l4_type = PP2_OUTQ_L4_TYPE_TCP;
2398                 *gen_l4_cksum = 1;
2399         } else if ((packet_type & RTE_PTYPE_L4_UDP) &&
2400                    ol_flags == PKT_TX_UDP_CKSUM) {
2401                 *l4_type = PP2_OUTQ_L4_TYPE_UDP;
2402                 *gen_l4_cksum = 1;
2403         } else {
2404                 *l4_type = PP2_OUTQ_L4_TYPE_OTHER;
2405                 /* no checksum for other type */
2406                 *gen_l4_cksum = 0;
2407         }
2408
2409         return 0;
2410 }
2411
2412 /**
2413  * Release already sent buffers to bpool (buffer-pool).
2414  *
2415  * @param ppio
2416  *   Pointer to the port structure.
2417  * @param hif
2418  *   Pointer to the MUSDK hardware interface.
2419  * @param sq
2420  *   Pointer to the shadow queue.
2421  * @param qid
2422  *   Queue id number.
2423  * @param force
2424  *   Force releasing packets.
2425  */
2426 static inline void
2427 mrvl_free_sent_buffers(struct pp2_ppio *ppio, struct pp2_hif *hif,
2428                        unsigned int core_id, struct mrvl_shadow_txq *sq,
2429                        int qid, int force)
2430 {
2431         struct buff_release_entry *entry;
2432         uint16_t nb_done = 0, num = 0, skip_bufs = 0;
2433         int i;
2434
2435         pp2_ppio_get_num_outq_done(ppio, hif, qid, &nb_done);
2436
2437         sq->num_to_release += nb_done;
2438
2439         if (likely(!force &&
2440                    sq->num_to_release < MRVL_PP2_BUF_RELEASE_BURST_SIZE))
2441                 return;
2442
2443         nb_done = sq->num_to_release;
2444         sq->num_to_release = 0;
2445
2446         for (i = 0; i < nb_done; i++) {
2447                 entry = &sq->ent[sq->tail + num];
2448                 if (unlikely(!entry->buff.addr)) {
2449                         MRVL_LOG(ERR,
2450                                 "Shadow memory @%d: cookie(%lx), pa(%lx)!",
2451                                 sq->tail, (u64)entry->buff.cookie,
2452                                 (u64)entry->buff.addr);
2453                         skip_bufs = 1;
2454                         goto skip;
2455                 }
2456
2457                 if (unlikely(!entry->bpool)) {
2458                         struct rte_mbuf *mbuf;
2459
2460                         mbuf = (struct rte_mbuf *)
2461                                (cookie_addr_high | entry->buff.cookie);
2462                         rte_pktmbuf_free(mbuf);
2463                         skip_bufs = 1;
2464                         goto skip;
2465                 }
2466
2467                 mrvl_port_bpool_size
2468                         [entry->bpool->pp2_id][entry->bpool->id][core_id]++;
2469                 num++;
2470                 if (unlikely(sq->tail + num == MRVL_PP2_TX_SHADOWQ_SIZE))
2471                         goto skip;
2472                 continue;
2473 skip:
2474                 if (likely(num))
2475                         pp2_bpool_put_buffs(hif, &sq->ent[sq->tail], &num);
2476                 num += skip_bufs;
2477                 sq->tail = (sq->tail + num) & MRVL_PP2_TX_SHADOWQ_MASK;
2478                 sq->size -= num;
2479                 num = 0;
2480                 skip_bufs = 0;
2481         }
2482
2483         if (likely(num)) {
2484                 pp2_bpool_put_buffs(hif, &sq->ent[sq->tail], &num);
2485                 sq->tail = (sq->tail + num) & MRVL_PP2_TX_SHADOWQ_MASK;
2486                 sq->size -= num;
2487         }
2488 }
2489
2490 /**
2491  * DPDK callback for transmit.
2492  *
2493  * @param txq
2494  *   Generic pointer transmit queue.
2495  * @param tx_pkts
2496  *   Packets to transmit.
2497  * @param nb_pkts
2498  *   Number of packets in array.
2499  *
2500  * @return
2501  *   Number of packets successfully transmitted.
2502  */
2503 static uint16_t
2504 mrvl_tx_pkt_burst(void *txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
2505 {
2506         struct mrvl_txq *q = txq;
2507         struct mrvl_shadow_txq *sq;
2508         struct pp2_hif *hif;
2509         struct pp2_ppio_desc descs[nb_pkts];
2510         unsigned int core_id = rte_lcore_id();
2511         int i, ret, bytes_sent = 0;
2512         uint16_t num, sq_free_size;
2513         uint64_t addr;
2514
2515         hif = mrvl_get_hif(q->priv, core_id);
2516         sq = &q->shadow_txqs[core_id];
2517
2518         if (unlikely(!q->priv->ppio || !hif))
2519                 return 0;
2520
2521         if (sq->size)
2522                 mrvl_free_sent_buffers(q->priv->ppio, hif, core_id,
2523                                        sq, q->queue_id, 0);
2524
2525         sq_free_size = MRVL_PP2_TX_SHADOWQ_SIZE - sq->size - 1;
2526         if (unlikely(nb_pkts > sq_free_size)) {
2527                 MRVL_LOG(DEBUG,
2528                         "No room in shadow queue for %d packets! %d packets will be sent.",
2529                         nb_pkts, sq_free_size);
2530                 nb_pkts = sq_free_size;
2531         }
2532
2533         for (i = 0; i < nb_pkts; i++) {
2534                 struct rte_mbuf *mbuf = tx_pkts[i];
2535                 int gen_l3_cksum, gen_l4_cksum;
2536                 enum pp2_outq_l3_type l3_type;
2537                 enum pp2_outq_l4_type l4_type;
2538
2539                 if (likely(nb_pkts - i > MRVL_MUSDK_PREFETCH_SHIFT)) {
2540                         struct rte_mbuf *pref_pkt_hdr;
2541
2542                         pref_pkt_hdr = tx_pkts[i + MRVL_MUSDK_PREFETCH_SHIFT];
2543                         rte_mbuf_prefetch_part1(pref_pkt_hdr);
2544                         rte_mbuf_prefetch_part2(pref_pkt_hdr);
2545                 }
2546
2547                 mrvl_fill_shadowq(sq, mbuf);
2548                 mrvl_fill_desc(&descs[i], mbuf);
2549
2550                 bytes_sent += rte_pktmbuf_pkt_len(mbuf);
2551                 /*
2552                  * in case unsupported ol_flags were passed
2553                  * do not update descriptor offload information
2554                  */
2555                 ret = mrvl_prepare_proto_info(mbuf->ol_flags, mbuf->packet_type,
2556                                               &l3_type, &l4_type, &gen_l3_cksum,
2557                                               &gen_l4_cksum);
2558                 if (unlikely(ret))
2559                         continue;
2560
2561                 pp2_ppio_outq_desc_set_proto_info(&descs[i], l3_type, l4_type,
2562                                                   mbuf->l2_len,
2563                                                   mbuf->l2_len + mbuf->l3_len,
2564                                                   gen_l3_cksum, gen_l4_cksum);
2565         }
2566
2567         num = nb_pkts;
2568         pp2_ppio_send(q->priv->ppio, hif, q->queue_id, descs, &nb_pkts);
2569         /* number of packets that were not sent */
2570         if (unlikely(num > nb_pkts)) {
2571                 for (i = nb_pkts; i < num; i++) {
2572                         sq->head = (MRVL_PP2_TX_SHADOWQ_SIZE + sq->head - 1) &
2573                                 MRVL_PP2_TX_SHADOWQ_MASK;
2574                         addr = cookie_addr_high | sq->ent[sq->head].buff.cookie;
2575                         bytes_sent -=
2576                                 rte_pktmbuf_pkt_len((struct rte_mbuf *)addr);
2577                 }
2578                 sq->size -= num - nb_pkts;
2579         }
2580
2581         q->bytes_sent += bytes_sent;
2582
2583         return nb_pkts;
2584 }
2585
2586 /** DPDK callback for S/G transmit.
2587  *
2588  * @param txq
2589  *   Generic pointer transmit queue.
2590  * @param tx_pkts
2591  *   Packets to transmit.
2592  * @param nb_pkts
2593  *   Number of packets in array.
2594  *
2595  * @return
2596  *   Number of packets successfully transmitted.
2597  */
2598 static uint16_t
2599 mrvl_tx_sg_pkt_burst(void *txq, struct rte_mbuf **tx_pkts,
2600                      uint16_t nb_pkts)
2601 {
2602         struct mrvl_txq *q = txq;
2603         struct mrvl_shadow_txq *sq;
2604         struct pp2_hif *hif;
2605         struct pp2_ppio_desc descs[nb_pkts * PP2_PPIO_DESC_NUM_FRAGS];
2606         struct pp2_ppio_sg_pkts pkts;
2607         uint8_t frags[nb_pkts];
2608         unsigned int core_id = rte_lcore_id();
2609         int i, j, ret, bytes_sent = 0;
2610         int tail, tail_first;
2611         uint16_t num, sq_free_size;
2612         uint16_t nb_segs, total_descs = 0;
2613         uint64_t addr;
2614
2615         hif = mrvl_get_hif(q->priv, core_id);
2616         sq = &q->shadow_txqs[core_id];
2617         pkts.frags = frags;
2618         pkts.num = 0;
2619
2620         if (unlikely(!q->priv->ppio || !hif))
2621                 return 0;
2622
2623         if (sq->size)
2624                 mrvl_free_sent_buffers(q->priv->ppio, hif, core_id,
2625                                        sq, q->queue_id, 0);
2626
2627         /* Save shadow queue free size */
2628         sq_free_size = MRVL_PP2_TX_SHADOWQ_SIZE - sq->size - 1;
2629
2630         tail = 0;
2631         for (i = 0; i < nb_pkts; i++) {
2632                 struct rte_mbuf *mbuf = tx_pkts[i];
2633                 struct rte_mbuf *seg = NULL;
2634                 int gen_l3_cksum, gen_l4_cksum;
2635                 enum pp2_outq_l3_type l3_type;
2636                 enum pp2_outq_l4_type l4_type;
2637
2638                 nb_segs = mbuf->nb_segs;
2639                 tail_first = tail;
2640                 total_descs += nb_segs;
2641
2642                 /*
2643                  * Check if total_descs does not exceed
2644                  * shadow queue free size
2645                  */
2646                 if (unlikely(total_descs > sq_free_size)) {
2647                         total_descs -= nb_segs;
2648                         RTE_LOG(DEBUG, PMD,
2649                                 "No room in shadow queue for %d packets! "
2650                                 "%d packets will be sent.\n",
2651                                 nb_pkts, i);
2652                         break;
2653                 }
2654
2655                 /* Check if nb_segs does not exceed the max nb of desc per
2656                  * fragmented packet
2657                  */
2658                 if (nb_segs > PP2_PPIO_DESC_NUM_FRAGS) {
2659                         total_descs -= nb_segs;
2660                         RTE_LOG(ERR, PMD,
2661                                 "Too many segments. Packet won't be sent.\n");
2662                         break;
2663                 }
2664
2665                 if (likely(nb_pkts - i > MRVL_MUSDK_PREFETCH_SHIFT)) {
2666                         struct rte_mbuf *pref_pkt_hdr;
2667
2668                         pref_pkt_hdr = tx_pkts[i + MRVL_MUSDK_PREFETCH_SHIFT];
2669                         rte_mbuf_prefetch_part1(pref_pkt_hdr);
2670                         rte_mbuf_prefetch_part2(pref_pkt_hdr);
2671                 }
2672
2673                 pkts.frags[pkts.num] = nb_segs;
2674                 pkts.num++;
2675
2676                 seg = mbuf;
2677                 for (j = 0; j < nb_segs - 1; j++) {
2678                         /* For the subsequent segments, set shadow queue
2679                          * buffer to NULL
2680                          */
2681                         mrvl_fill_shadowq(sq, NULL);
2682                         mrvl_fill_desc(&descs[tail], seg);
2683
2684                         tail++;
2685                         seg = seg->next;
2686                 }
2687                 /* Put first mbuf info in last shadow queue entry */
2688                 mrvl_fill_shadowq(sq, mbuf);
2689                 /* Update descriptor with last segment */
2690                 mrvl_fill_desc(&descs[tail++], seg);
2691
2692                 bytes_sent += rte_pktmbuf_pkt_len(mbuf);
2693                 /* In case unsupported ol_flags were passed
2694                  * do not update descriptor offload information
2695                  */
2696                 ret = mrvl_prepare_proto_info(mbuf->ol_flags, mbuf->packet_type,
2697                                               &l3_type, &l4_type, &gen_l3_cksum,
2698                                               &gen_l4_cksum);
2699                 if (unlikely(ret))
2700                         continue;
2701
2702                 pp2_ppio_outq_desc_set_proto_info(&descs[tail_first], l3_type,
2703                                                   l4_type, mbuf->l2_len,
2704                                                   mbuf->l2_len + mbuf->l3_len,
2705                                                   gen_l3_cksum, gen_l4_cksum);
2706         }
2707
2708         num = total_descs;
2709         pp2_ppio_send_sg(q->priv->ppio, hif, q->queue_id, descs,
2710                          &total_descs, &pkts);
2711         /* number of packets that were not sent */
2712         if (unlikely(num > total_descs)) {
2713                 for (i = total_descs; i < num; i++) {
2714                         sq->head = (MRVL_PP2_TX_SHADOWQ_SIZE + sq->head - 1) &
2715                                 MRVL_PP2_TX_SHADOWQ_MASK;
2716
2717                         addr = sq->ent[sq->head].buff.cookie;
2718                         if (addr)
2719                                 bytes_sent -=
2720                                         rte_pktmbuf_pkt_len((struct rte_mbuf *)
2721                                                 (cookie_addr_high | addr));
2722                 }
2723                 sq->size -= num - total_descs;
2724                 nb_pkts = pkts.num;
2725         }
2726
2727         q->bytes_sent += bytes_sent;
2728
2729         return nb_pkts;
2730 }
2731
2732 /**
2733  * Initialize packet processor.
2734  *
2735  * @return
2736  *   0 on success, negative error value otherwise.
2737  */
2738 static int
2739 mrvl_init_pp2(void)
2740 {
2741         struct pp2_init_params init_params;
2742
2743         memset(&init_params, 0, sizeof(init_params));
2744         init_params.hif_reserved_map = MRVL_MUSDK_HIFS_RESERVED;
2745         init_params.bm_pool_reserved_map = MRVL_MUSDK_BPOOLS_RESERVED;
2746         init_params.rss_tbl_reserved_map = MRVL_MUSDK_RSS_RESERVED;
2747
2748         return pp2_init(&init_params);
2749 }
2750
2751 /**
2752  * Deinitialize packet processor.
2753  *
2754  * @return
2755  *   0 on success, negative error value otherwise.
2756  */
2757 static void
2758 mrvl_deinit_pp2(void)
2759 {
2760         pp2_deinit();
2761 }
2762
2763 /**
2764  * Create private device structure.
2765  *
2766  * @param dev_name
2767  *   Pointer to the port name passed in the initialization parameters.
2768  *
2769  * @return
2770  *   Pointer to the newly allocated private device structure.
2771  */
2772 static struct mrvl_priv *
2773 mrvl_priv_create(const char *dev_name)
2774 {
2775         struct pp2_bpool_params bpool_params;
2776         char match[MRVL_MATCH_LEN];
2777         struct mrvl_priv *priv;
2778         int ret, bpool_bit;
2779
2780         priv = rte_zmalloc_socket(dev_name, sizeof(*priv), 0, rte_socket_id());
2781         if (!priv)
2782                 return NULL;
2783
2784         ret = pp2_netdev_get_ppio_info((char *)(uintptr_t)dev_name,
2785                                        &priv->pp_id, &priv->ppio_id);
2786         if (ret)
2787                 goto out_free_priv;
2788
2789         bpool_bit = mrvl_reserve_bit(&used_bpools[priv->pp_id],
2790                                      PP2_BPOOL_NUM_POOLS);
2791         if (bpool_bit < 0)
2792                 goto out_free_priv;
2793         priv->bpool_bit = bpool_bit;
2794
2795         snprintf(match, sizeof(match), "pool-%d:%d", priv->pp_id,
2796                  priv->bpool_bit);
2797         memset(&bpool_params, 0, sizeof(bpool_params));
2798         bpool_params.match = match;
2799         bpool_params.buff_len = MRVL_PKT_SIZE_MAX + MRVL_PKT_EFFEC_OFFS;
2800         ret = pp2_bpool_init(&bpool_params, &priv->bpool);
2801         if (ret)
2802                 goto out_clear_bpool_bit;
2803
2804         priv->ppio_params.type = PP2_PPIO_T_NIC;
2805         rte_spinlock_init(&priv->lock);
2806
2807         return priv;
2808 out_clear_bpool_bit:
2809         used_bpools[priv->pp_id] &= ~(1 << priv->bpool_bit);
2810 out_free_priv:
2811         rte_free(priv);
2812         return NULL;
2813 }
2814
2815 /**
2816  * Create device representing Ethernet port.
2817  *
2818  * @param name
2819  *   Pointer to the port's name.
2820  *
2821  * @return
2822  *   0 on success, negative error value otherwise.
2823  */
2824 static int
2825 mrvl_eth_dev_create(struct rte_vdev_device *vdev, const char *name)
2826 {
2827         int ret, fd = socket(AF_INET, SOCK_DGRAM, 0);
2828         struct rte_eth_dev *eth_dev;
2829         struct mrvl_priv *priv;
2830         struct ifreq req;
2831
2832         eth_dev = rte_eth_dev_allocate(name);
2833         if (!eth_dev)
2834                 return -ENOMEM;
2835
2836         priv = mrvl_priv_create(name);
2837         if (!priv) {
2838                 ret = -ENOMEM;
2839                 goto out_free;
2840         }
2841         eth_dev->data->dev_private = priv;
2842
2843         eth_dev->data->mac_addrs =
2844                 rte_zmalloc("mac_addrs",
2845                             RTE_ETHER_ADDR_LEN * MRVL_MAC_ADDRS_MAX, 0);
2846         if (!eth_dev->data->mac_addrs) {
2847                 MRVL_LOG(ERR, "Failed to allocate space for eth addrs");
2848                 ret = -ENOMEM;
2849                 goto out_free;
2850         }
2851
2852         memset(&req, 0, sizeof(req));
2853         strcpy(req.ifr_name, name);
2854         ret = ioctl(fd, SIOCGIFHWADDR, &req);
2855         if (ret)
2856                 goto out_free;
2857
2858         memcpy(eth_dev->data->mac_addrs[0].addr_bytes,
2859                req.ifr_addr.sa_data, RTE_ETHER_ADDR_LEN);
2860
2861         eth_dev->device = &vdev->device;
2862         eth_dev->rx_pkt_burst = mrvl_rx_pkt_burst;
2863         mrvl_set_tx_function(eth_dev);
2864         eth_dev->dev_ops = &mrvl_ops;
2865
2866         /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
2867         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
2868
2869         rte_eth_dev_probing_finish(eth_dev);
2870         return 0;
2871 out_free:
2872         rte_eth_dev_release_port(eth_dev);
2873
2874         return ret;
2875 }
2876
2877 /**
2878  * Callback used by rte_kvargs_process() during argument parsing.
2879  *
2880  * @param key
2881  *   Pointer to the parsed key (unused).
2882  * @param value
2883  *   Pointer to the parsed value.
2884  * @param extra_args
2885  *   Pointer to the extra arguments which contains address of the
2886  *   table of pointers to parsed interface names.
2887  *
2888  * @return
2889  *   Always 0.
2890  */
2891 static int
2892 mrvl_get_ifnames(const char *key __rte_unused, const char *value,
2893                  void *extra_args)
2894 {
2895         struct mrvl_ifnames *ifnames = extra_args;
2896
2897         ifnames->names[ifnames->idx++] = value;
2898
2899         return 0;
2900 }
2901
2902 /**
2903  * Deinitialize per-lcore MUSDK hardware interfaces (hifs).
2904  */
2905 static void
2906 mrvl_deinit_hifs(void)
2907 {
2908         int i;
2909
2910         for (i = mrvl_lcore_first; i <= mrvl_lcore_last; i++) {
2911                 if (hifs[i])
2912                         pp2_hif_deinit(hifs[i]);
2913         }
2914         used_hifs = MRVL_MUSDK_HIFS_RESERVED;
2915         memset(hifs, 0, sizeof(hifs));
2916 }
2917
2918 /**
2919  * DPDK callback to register the virtual device.
2920  *
2921  * @param vdev
2922  *   Pointer to the virtual device.
2923  *
2924  * @return
2925  *   0 on success, negative error value otherwise.
2926  */
2927 static int
2928 rte_pmd_mrvl_probe(struct rte_vdev_device *vdev)
2929 {
2930         struct rte_kvargs *kvlist;
2931         struct mrvl_ifnames ifnames;
2932         int ret = -EINVAL;
2933         uint32_t i, ifnum, cfgnum;
2934         const char *params;
2935
2936         params = rte_vdev_device_args(vdev);
2937         if (!params)
2938                 return -EINVAL;
2939
2940         kvlist = rte_kvargs_parse(params, valid_args);
2941         if (!kvlist)
2942                 return -EINVAL;
2943
2944         ifnum = rte_kvargs_count(kvlist, MRVL_IFACE_NAME_ARG);
2945         if (ifnum > RTE_DIM(ifnames.names))
2946                 goto out_free_kvlist;
2947
2948         ifnames.idx = 0;
2949         rte_kvargs_process(kvlist, MRVL_IFACE_NAME_ARG,
2950                            mrvl_get_ifnames, &ifnames);
2951
2952
2953         /*
2954          * The below system initialization should be done only once,
2955          * on the first provided configuration file
2956          */
2957         if (!mrvl_qos_cfg) {
2958                 cfgnum = rte_kvargs_count(kvlist, MRVL_CFG_ARG);
2959                 MRVL_LOG(INFO, "Parsing config file!");
2960                 if (cfgnum > 1) {
2961                         MRVL_LOG(ERR, "Cannot handle more than one config file!");
2962                         goto out_free_kvlist;
2963                 } else if (cfgnum == 1) {
2964                         rte_kvargs_process(kvlist, MRVL_CFG_ARG,
2965                                            mrvl_get_qoscfg, &mrvl_qos_cfg);
2966                 }
2967         }
2968
2969         if (mrvl_dev_num)
2970                 goto init_devices;
2971
2972         MRVL_LOG(INFO, "Perform MUSDK initializations");
2973
2974         ret = rte_mvep_init(MVEP_MOD_T_PP2, kvlist);
2975         if (ret)
2976                 goto out_free_kvlist;
2977
2978         ret = mrvl_init_pp2();
2979         if (ret) {
2980                 MRVL_LOG(ERR, "Failed to init PP!");
2981                 rte_mvep_deinit(MVEP_MOD_T_PP2);
2982                 goto out_free_kvlist;
2983         }
2984
2985         memset(mrvl_port_bpool_size, 0, sizeof(mrvl_port_bpool_size));
2986         memset(mrvl_port_to_bpool_lookup, 0, sizeof(mrvl_port_to_bpool_lookup));
2987
2988         mrvl_lcore_first = RTE_MAX_LCORE;
2989         mrvl_lcore_last = 0;
2990
2991 init_devices:
2992         for (i = 0; i < ifnum; i++) {
2993                 MRVL_LOG(INFO, "Creating %s", ifnames.names[i]);
2994                 ret = mrvl_eth_dev_create(vdev, ifnames.names[i]);
2995                 if (ret)
2996                         goto out_cleanup;
2997                 mrvl_dev_num++;
2998         }
2999
3000         rte_kvargs_free(kvlist);
3001
3002         return 0;
3003 out_cleanup:
3004         rte_pmd_mrvl_remove(vdev);
3005
3006 out_free_kvlist:
3007         rte_kvargs_free(kvlist);
3008
3009         return ret;
3010 }
3011
3012 /**
3013  * DPDK callback to remove virtual device.
3014  *
3015  * @param vdev
3016  *   Pointer to the removed virtual device.
3017  *
3018  * @return
3019  *   0 on success, negative error value otherwise.
3020  */
3021 static int
3022 rte_pmd_mrvl_remove(struct rte_vdev_device *vdev)
3023 {
3024         uint16_t port_id;
3025
3026         RTE_ETH_FOREACH_DEV(port_id) {
3027                 if (rte_eth_devices[port_id].device != &vdev->device)
3028                         continue;
3029                 rte_eth_dev_close(port_id);
3030         }
3031
3032         return 0;
3033 }
3034
3035 static struct rte_vdev_driver pmd_mrvl_drv = {
3036         .probe = rte_pmd_mrvl_probe,
3037         .remove = rte_pmd_mrvl_remove,
3038 };
3039
3040 RTE_PMD_REGISTER_VDEV(net_mvpp2, pmd_mrvl_drv);
3041 RTE_PMD_REGISTER_ALIAS(net_mvpp2, eth_mvpp2);
3042 RTE_LOG_REGISTER(mrvl_logtype, pmd.net.mvpp2, NOTICE);