drivers/net/mvpp2/mrvl_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2017 Marvell International Ltd.
   3  * Copyright(c) 2017 Semihalf.
   4  * All rights reserved.
   5  */
   6
   7 #include <rte_string_fns.h>
   8 #include <rte_ethdev_driver.h>
   9 #include <rte_kvargs.h>
  10 #include <rte_log.h>
  11 #include <rte_malloc.h>
  12 #include <rte_bus_vdev.h>
  13
  14 #include <fcntl.h>
  15 #include <linux/ethtool.h>
  16 #include <linux/sockios.h>
  17 #include <net/if.h>
  18 #include <net/if_arp.h>
  19 #include <sys/ioctl.h>
  20 #include <sys/socket.h>
  21 #include <sys/stat.h>
  22 #include <sys/types.h>
  23
  24 #include <rte_mvep_common.h>
  25 #include "mrvl_ethdev.h"
  26 #include "mrvl_qos.h"
  27 #include "mrvl_flow.h"
  28 #include "mrvl_mtr.h"
  29 #include "mrvl_tm.h"
  30
  31 /* bitmask with reserved hifs */
  32 #define MRVL_MUSDK_HIFS_RESERVED 0x0F
  33 /* bitmask with reserved bpools */
  34 #define MRVL_MUSDK_BPOOLS_RESERVED 0x07
  35 /* bitmask with reserved kernel RSS tables */
  36 #define MRVL_MUSDK_RSS_RESERVED 0x01
  37 /* maximum number of available hifs */
  38 #define MRVL_MUSDK_HIFS_MAX 9
  39
  40 /* prefetch shift */
  41 #define MRVL_MUSDK_PREFETCH_SHIFT 2
  42
  43 /* TCAM has 25 entries reserved for uc/mc filter entries */
  44 #define MRVL_MAC_ADDRS_MAX 25
  45 #define MRVL_MATCH_LEN 16
  46 #define MRVL_PKT_EFFEC_OFFS (MRVL_PKT_OFFS + MV_MH_SIZE)
  47 /* Maximum allowable packet size */
  48 #define MRVL_PKT_SIZE_MAX (10240 - MV_MH_SIZE)
  49
  50 #define MRVL_IFACE_NAME_ARG "iface"
  51 #define MRVL_CFG_ARG "cfg"
  52
  53 #define MRVL_BURST_SIZE 64
  54
  55 #define MRVL_ARP_LENGTH 28
  56
  57 #define MRVL_COOKIE_ADDR_INVALID ~0ULL
  58 #define MRVL_COOKIE_HIGH_ADDR_MASK 0xffffff0000000000
  59
  60 /** Port Rx offload capabilities */
  61 #define MRVL_RX_OFFLOADS (DEV_RX_OFFLOAD_VLAN_FILTER | \
  62                           DEV_RX_OFFLOAD_JUMBO_FRAME | \
  63                           DEV_RX_OFFLOAD_CHECKSUM)
  64
  65 /** Port Tx offloads capabilities */
  66 #define MRVL_TX_OFFLOADS (DEV_TX_OFFLOAD_IPV4_CKSUM | \
  67                           DEV_TX_OFFLOAD_UDP_CKSUM | \
  68                           DEV_TX_OFFLOAD_TCP_CKSUM | \
  69                           DEV_TX_OFFLOAD_MULTI_SEGS)
  70
  71 static const char * const valid_args[] = {
  72         MRVL_IFACE_NAME_ARG,
  73         MRVL_CFG_ARG,
  74         NULL
  75 };
  76
  77 static int used_hifs = MRVL_MUSDK_HIFS_RESERVED;
  78 static struct pp2_hif *hifs[RTE_MAX_LCORE];
  79 static int used_bpools[PP2_NUM_PKT_PROC] = {
  80         [0 ... PP2_NUM_PKT_PROC - 1] = MRVL_MUSDK_BPOOLS_RESERVED
  81 };
  82
  83 static struct pp2_bpool *mrvl_port_to_bpool_lookup[RTE_MAX_ETHPORTS];
  84 static int mrvl_port_bpool_size[PP2_NUM_PKT_PROC][PP2_BPOOL_NUM_POOLS][RTE_MAX_LCORE];
  85 static uint64_t cookie_addr_high = MRVL_COOKIE_ADDR_INVALID;
  86
  87 int mrvl_logtype;
  88
  89 struct mrvl_ifnames {
  90         const char *names[PP2_NUM_ETH_PPIO * PP2_NUM_PKT_PROC];
  91         int idx;
  92 };
  93
  94 /*
  95  * To use buffer harvesting based on loopback port shadow queue structure
  96  * was introduced for buffers information bookkeeping.
  97  *
  98  * Before sending the packet, related buffer information (pp2_buff_inf) is
  99  * stored in shadow queue. After packet is transmitted no longer used
 100  * packet buffer is released back to it's original hardware pool,
 101  * on condition it originated from interface.
 102  * In case it  was generated by application itself i.e: mbuf->port field is
 103  * 0xff then its released to software mempool.
 104  */
 105 struct mrvl_shadow_txq {
 106         int head;           /* write index - used when sending buffers */
 107         int tail;           /* read index - used when releasing buffers */
 108         u16 size;           /* queue occupied size */
 109         u16 num_to_release; /* number of descriptors sent, that can be
 110                              * released
 111                              */
 112         struct buff_release_entry ent[MRVL_PP2_TX_SHADOWQ_SIZE]; /* q entries */
 113 };
 114
 115 struct mrvl_rxq {
 116         struct mrvl_priv *priv;
 117         struct rte_mempool *mp;
 118         int queue_id;
 119         int port_id;
 120         int cksum_enabled;
 121         uint64_t bytes_recv;
 122         uint64_t drop_mac;
 123 };
 124
 125 struct mrvl_txq {
 126         struct mrvl_priv *priv;
 127         int queue_id;
 128         int port_id;
 129         uint64_t bytes_sent;
 130         struct mrvl_shadow_txq shadow_txqs[RTE_MAX_LCORE];
 131         int tx_deferred_start;
 132 };
 133
 134 static int mrvl_lcore_first;
 135 static int mrvl_lcore_last;
 136 static int mrvl_dev_num;
 137
 138 static int mrvl_fill_bpool(struct mrvl_rxq *rxq, int num);
 139 static inline void mrvl_free_sent_buffers(struct pp2_ppio *ppio,
 140                         struct pp2_hif *hif, unsigned int core_id,
 141                         struct mrvl_shadow_txq *sq, int qid, int force);
 142
 143 static uint16_t mrvl_tx_pkt_burst(void *txq, struct rte_mbuf **tx_pkts,
 144                                   uint16_t nb_pkts);
 145 static uint16_t mrvl_tx_sg_pkt_burst(void *txq, struct rte_mbuf **tx_pkts,
 146                                      uint16_t nb_pkts);
 147 static int rte_pmd_mrvl_remove(struct rte_vdev_device *vdev);
 148 static void mrvl_deinit_pp2(void);
 149 static void mrvl_deinit_hifs(void);
 150
 151
 152 #define MRVL_XSTATS_TBL_ENTRY(name) { \
 153         #name, offsetof(struct pp2_ppio_statistics, name),      \
 154         sizeof(((struct pp2_ppio_statistics *)0)->name)         \
 155 }
 156
 157 /* Table with xstats data */
 158 static struct {
 159         const char *name;
 160         unsigned int offset;
 161         unsigned int size;
 162 } mrvl_xstats_tbl[] = {
 163         MRVL_XSTATS_TBL_ENTRY(rx_bytes),
 164         MRVL_XSTATS_TBL_ENTRY(rx_packets),
 165         MRVL_XSTATS_TBL_ENTRY(rx_unicast_packets),
 166         MRVL_XSTATS_TBL_ENTRY(rx_errors),
 167         MRVL_XSTATS_TBL_ENTRY(rx_fullq_dropped),
 168         MRVL_XSTATS_TBL_ENTRY(rx_bm_dropped),
 169         MRVL_XSTATS_TBL_ENTRY(rx_early_dropped),
 170         MRVL_XSTATS_TBL_ENTRY(rx_fifo_dropped),
 171         MRVL_XSTATS_TBL_ENTRY(rx_cls_dropped),
 172         MRVL_XSTATS_TBL_ENTRY(tx_bytes),
 173         MRVL_XSTATS_TBL_ENTRY(tx_packets),
 174         MRVL_XSTATS_TBL_ENTRY(tx_unicast_packets),
 175         MRVL_XSTATS_TBL_ENTRY(tx_errors)
 176 };
 177
 178 static inline void
 179 mrvl_fill_shadowq(struct mrvl_shadow_txq *sq, struct rte_mbuf *buf)
 180 {
 181         sq->ent[sq->head].buff.cookie = (uint64_t)buf;
 182         sq->ent[sq->head].buff.addr = buf ?
 183                 rte_mbuf_data_iova_default(buf) : 0;
 184
 185         sq->ent[sq->head].bpool =
 186                 (unlikely(!buf || buf->port >= RTE_MAX_ETHPORTS ||
 187                  buf->refcnt > 1)) ? NULL :
 188                  mrvl_port_to_bpool_lookup[buf->port];
 189
 190         sq->head = (sq->head + 1) & MRVL_PP2_TX_SHADOWQ_MASK;
 191         sq->size++;
 192 }
 193
 194 static inline void
 195 mrvl_fill_desc(struct pp2_ppio_desc *desc, struct rte_mbuf *buf)
 196 {
 197         pp2_ppio_outq_desc_reset(desc);
 198         pp2_ppio_outq_desc_set_phys_addr(desc, rte_pktmbuf_iova(buf));
 199         pp2_ppio_outq_desc_set_pkt_offset(desc, 0);
 200         pp2_ppio_outq_desc_set_pkt_len(desc, rte_pktmbuf_data_len(buf));
 201 }
 202
 203 static inline int
 204 mrvl_get_bpool_size(int pp2_id, int pool_id)
 205 {
 206         int i;
 207         int size = 0;
 208
 209         for (i = mrvl_lcore_first; i <= mrvl_lcore_last; i++)
 210                 size += mrvl_port_bpool_size[pp2_id][pool_id][i];
 211
 212         return size;
 213 }
 214
 215 static inline int
 216 mrvl_reserve_bit(int *bitmap, int max)
 217 {
 218         int n = sizeof(*bitmap) * 8 - __builtin_clz(*bitmap);
 219
 220         if (n >= max)
 221                 return -1;
 222
 223         *bitmap |= 1 << n;
 224
 225         return n;
 226 }
 227
 228 static int
 229 mrvl_init_hif(int core_id)
 230 {
 231         struct pp2_hif_params params;
 232         char match[MRVL_MATCH_LEN];
 233         int ret;
 234
 235         ret = mrvl_reserve_bit(&used_hifs, MRVL_MUSDK_HIFS_MAX);
 236         if (ret < 0) {
 237                 MRVL_LOG(ERR, "Failed to allocate hif %d", core_id);
 238                 return ret;
 239         }
 240
 241         snprintf(match, sizeof(match), "hif-%d", ret);
 242         memset(&params, 0, sizeof(params));
 243         params.match = match;
 244         params.out_size = MRVL_PP2_AGGR_TXQD_MAX;
 245         ret = pp2_hif_init(&params, &hifs[core_id]);
 246         if (ret) {
 247                 MRVL_LOG(ERR, "Failed to initialize hif %d", core_id);
 248                 return ret;
 249         }
 250
 251         return 0;
 252 }
 253
 254 static inline struct pp2_hif*
 255 mrvl_get_hif(struct mrvl_priv *priv, int core_id)
 256 {
 257         int ret;
 258
 259         if (likely(hifs[core_id] != NULL))
 260                 return hifs[core_id];
 261
 262         rte_spinlock_lock(&priv->lock);
 263
 264         ret = mrvl_init_hif(core_id);
 265         if (ret < 0) {
 266                 MRVL_LOG(ERR, "Failed to allocate hif %d", core_id);
 267                 goto out;
 268         }
 269
 270         if (core_id < mrvl_lcore_first)
 271                 mrvl_lcore_first = core_id;
 272
 273         if (core_id > mrvl_lcore_last)
 274                 mrvl_lcore_last = core_id;
 275 out:
 276         rte_spinlock_unlock(&priv->lock);
 277
 278         return hifs[core_id];
 279 }
 280
 281 /**
 282  * Set tx burst function according to offload flag
 283  *
 284  * @param dev
 285  *   Pointer to Ethernet device structure.
 286  */
 287 static void
 288 mrvl_set_tx_function(struct rte_eth_dev *dev)
 289 {
 290         struct mrvl_priv *priv = dev->data->dev_private;
 291
 292         /* Use a simple Tx queue (no offloads, no multi segs) if possible */
 293         if (priv->multiseg) {
 294                 RTE_LOG(INFO, PMD, "Using multi-segment tx callback\n");
 295                 dev->tx_pkt_burst = mrvl_tx_sg_pkt_burst;
 296         } else {
 297                 RTE_LOG(INFO, PMD, "Using single-segment tx callback\n");
 298                 dev->tx_pkt_burst = mrvl_tx_pkt_burst;
 299         }
 300 }
 301
 302 /**
 303  * Configure rss based on dpdk rss configuration.
 304  *
 305  * @param priv
 306  *   Pointer to private structure.
 307  * @param rss_conf
 308  *   Pointer to RSS configuration.
 309  *
 310  * @return
 311  *   0 on success, negative error value otherwise.
 312  */
 313 static int
 314 mrvl_configure_rss(struct mrvl_priv *priv, struct rte_eth_rss_conf *rss_conf)
 315 {
 316         if (rss_conf->rss_key)
 317                 MRVL_LOG(WARNING, "Changing hash key is not supported");
 318
 319         if (rss_conf->rss_hf == 0) {
 320                 priv->ppio_params.inqs_params.hash_type = PP2_PPIO_HASH_T_NONE;
 321         } else if (rss_conf->rss_hf & ETH_RSS_IPV4) {
 322                 priv->ppio_params.inqs_params.hash_type =
 323                         PP2_PPIO_HASH_T_2_TUPLE;
 324         } else if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) {
 325                 priv->ppio_params.inqs_params.hash_type =
 326                         PP2_PPIO_HASH_T_5_TUPLE;
 327                 priv->rss_hf_tcp = 1;
 328         } else if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) {
 329                 priv->ppio_params.inqs_params.hash_type =
 330                         PP2_PPIO_HASH_T_5_TUPLE;
 331                 priv->rss_hf_tcp = 0;
 332         } else {
 333                 return -EINVAL;
 334         }
 335
 336         return 0;
 337 }
 338
 339 /**
 340  * Ethernet device configuration.
 341  *
 342  * Prepare the driver for a given number of TX and RX queues and
 343  * configure RSS.
 344  *
 345  * @param dev
 346  *   Pointer to Ethernet device structure.
 347  *
 348  * @return
 349  *   0 on success, negative error value otherwise.
 350  */
 351 static int
 352 mrvl_dev_configure(struct rte_eth_dev *dev)
 353 {
 354         struct mrvl_priv *priv = dev->data->dev_private;
 355         int ret;
 356
 357         if (priv->ppio) {
 358                 MRVL_LOG(INFO, "Device reconfiguration is not supported");
 359                 return -EINVAL;
 360         }
 361
 362         if (dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_NONE &&
 363             dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
 364                 MRVL_LOG(INFO, "Unsupported rx multi queue mode %d",
 365                         dev->data->dev_conf.rxmode.mq_mode);
 366                 return -EINVAL;
 367         }
 368
 369         if (dev->data->dev_conf.rxmode.split_hdr_size) {
 370                 MRVL_LOG(INFO, "Split headers not supported");
 371                 return -EINVAL;
 372         }
 373
 374         if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
 375                 dev->data->mtu = dev->data->dev_conf.rxmode.max_rx_pkt_len -
 376                                  MRVL_PP2_ETH_HDRS_LEN;
 377
 378         if (dev->data->dev_conf.txmode.offloads & DEV_TX_OFFLOAD_MULTI_SEGS)
 379                 priv->multiseg = 1;
 380
 381         ret = mrvl_configure_rxqs(priv, dev->data->port_id,
 382                                   dev->data->nb_rx_queues);
 383         if (ret < 0)
 384                 return ret;
 385
 386         ret = mrvl_configure_txqs(priv, dev->data->port_id,
 387                                   dev->data->nb_tx_queues);
 388         if (ret < 0)
 389                 return ret;
 390
 391         priv->ppio_params.outqs_params.num_outqs = dev->data->nb_tx_queues;
 392         priv->ppio_params.maintain_stats = 1;
 393         priv->nb_rx_queues = dev->data->nb_rx_queues;
 394
 395         ret = mrvl_tm_init(dev);
 396         if (ret < 0)
 397                 return ret;
 398
 399         if (dev->data->nb_rx_queues == 1 &&
 400             dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 401                 MRVL_LOG(WARNING, "Disabling hash for 1 rx queue");
 402                 priv->ppio_params.inqs_params.hash_type = PP2_PPIO_HASH_T_NONE;
 403
 404                 return 0;
 405         }
 406
 407         return mrvl_configure_rss(priv,
 408                                   &dev->data->dev_conf.rx_adv_conf.rss_conf);
 409 }
 410
 411 /**
 412  * DPDK callback to change the MTU.
 413  *
 414  * Setting the MTU affects hardware MRU (packets larger than the MRU
 415  * will be dropped).
 416  *
 417  * @param dev
 418  *   Pointer to Ethernet device structure.
 419  * @param mtu
 420  *   New MTU.
 421  *
 422  * @return
 423  *   0 on success, negative error value otherwise.
 424  */
 425 static int
 426 mrvl_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
 427 {
 428         struct mrvl_priv *priv = dev->data->dev_private;
 429         uint16_t mru;
 430         uint16_t mbuf_data_size = 0; /* SW buffer size */
 431         int ret;
 432
 433         mru = MRVL_PP2_MTU_TO_MRU(mtu);
 434         /*
 435          * min_rx_buf_size is equal to mbuf data size
 436          * if pmd didn't set it differently
 437          */
 438         mbuf_data_size = dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM;
 439         /* Prevent PMD from:
 440          * - setting mru greater than the mbuf size resulting in
 441          * hw and sw buffer size mismatch
 442          * - setting mtu that requires the support of scattered packets
 443          * when this feature has not been enabled/supported so far
 444          * (TODO check scattered_rx flag here once scattered RX is supported).
 445          */
 446         if (mru + MRVL_PKT_OFFS > mbuf_data_size) {
 447                 mru = mbuf_data_size - MRVL_PKT_OFFS;
 448                 mtu = MRVL_PP2_MRU_TO_MTU(mru);
 449                 MRVL_LOG(WARNING, "MTU too big, max MTU possible limitted "
 450                         "by current mbuf size: %u. Set MTU to %u, MRU to %u",
 451                         mbuf_data_size, mtu, mru);
 452         }
 453
 454         if (mtu < RTE_ETHER_MIN_MTU || mru > MRVL_PKT_SIZE_MAX) {
 455                 MRVL_LOG(ERR, "Invalid MTU [%u] or MRU [%u]", mtu, mru);
 456                 return -EINVAL;
 457         }
 458
 459         dev->data->mtu = mtu;
 460         dev->data->dev_conf.rxmode.max_rx_pkt_len = mru - MV_MH_SIZE;
 461
 462         if (!priv->ppio)
 463                 return 0;
 464
 465         ret = pp2_ppio_set_mru(priv->ppio, mru);
 466         if (ret) {
 467                 MRVL_LOG(ERR, "Failed to change MRU");
 468                 return ret;
 469         }
 470
 471         ret = pp2_ppio_set_mtu(priv->ppio, mtu);
 472         if (ret) {
 473                 MRVL_LOG(ERR, "Failed to change MTU");
 474                 return ret;
 475         }
 476
 477         return 0;
 478 }
 479
 480 /**
 481  * DPDK callback to bring the link up.
 482  *
 483  * @param dev
 484  *   Pointer to Ethernet device structure.
 485  *
 486  * @return
 487  *   0 on success, negative error value otherwise.
 488  */
 489 static int
 490 mrvl_dev_set_link_up(struct rte_eth_dev *dev)
 491 {
 492         struct mrvl_priv *priv = dev->data->dev_private;
 493         int ret;
 494
 495         if (!priv->ppio)
 496                 return -EPERM;
 497
 498         ret = pp2_ppio_enable(priv->ppio);
 499         if (ret)
 500                 return ret;
 501
 502         /*
 503          * mtu/mru can be updated if pp2_ppio_enable() was called at least once
 504          * as pp2_ppio_enable() changes port->t_mode from default 0 to
 505          * PP2_TRAFFIC_INGRESS_EGRESS.
 506          *
 507          * Set mtu to default DPDK value here.
 508          */
 509         ret = mrvl_mtu_set(dev, dev->data->mtu);
 510         if (ret)
 511                 pp2_ppio_disable(priv->ppio);
 512
 513         return ret;
 514 }
 515
 516 /**
 517  * DPDK callback to bring the link down.
 518  *
 519  * @param dev
 520  *   Pointer to Ethernet device structure.
 521  *
 522  * @return
 523  *   0 on success, negative error value otherwise.
 524  */
 525 static int
 526 mrvl_dev_set_link_down(struct rte_eth_dev *dev)
 527 {
 528         struct mrvl_priv *priv = dev->data->dev_private;
 529
 530         if (!priv->ppio)
 531                 return -EPERM;
 532
 533         return pp2_ppio_disable(priv->ppio);
 534 }
 535
 536 /**
 537  * DPDK callback to start tx queue.
 538  *
 539  * @param dev
 540  *   Pointer to Ethernet device structure.
 541  * @param queue_id
 542  *   Transmit queue index.
 543  *
 544  * @return
 545  *   0 on success, negative error value otherwise.
 546  */
 547 static int
 548 mrvl_tx_queue_start(struct rte_eth_dev *dev, uint16_t queue_id)
 549 {
 550         struct mrvl_priv *priv = dev->data->dev_private;
 551         int ret;
 552
 553         if (!priv)
 554                 return -EPERM;
 555
 556         /* passing 1 enables given tx queue */
 557         ret = pp2_ppio_set_outq_state(priv->ppio, queue_id, 1);
 558         if (ret) {
 559                 MRVL_LOG(ERR, "Failed to start txq %d", queue_id);
 560                 return ret;
 561         }
 562
 563         dev->data->tx_queue_state[queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
 564
 565         return 0;
 566 }
 567
 568 /**
 569  * DPDK callback to stop tx queue.
 570  *
 571  * @param dev
 572  *   Pointer to Ethernet device structure.
 573  * @param queue_id
 574  *   Transmit queue index.
 575  *
 576  * @return
 577  *   0 on success, negative error value otherwise.
 578  */
 579 static int
 580 mrvl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t queue_id)
 581 {
 582         struct mrvl_priv *priv = dev->data->dev_private;
 583         int ret;
 584
 585         if (!priv->ppio)
 586                 return -EPERM;
 587
 588         /* passing 0 disables given tx queue */
 589         ret = pp2_ppio_set_outq_state(priv->ppio, queue_id, 0);
 590         if (ret) {
 591                 MRVL_LOG(ERR, "Failed to stop txq %d", queue_id);
 592                 return ret;
 593         }
 594
 595         dev->data->tx_queue_state[queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
 596
 597         return 0;
 598 }
 599
 600 /**
 601  * DPDK callback to start the device.
 602  *
 603  * @param dev
 604  *   Pointer to Ethernet device structure.
 605  *
 606  * @return
 607  *   0 on success, negative errno value on failure.
 608  */
 609 static int
 610 mrvl_dev_start(struct rte_eth_dev *dev)
 611 {
 612         struct mrvl_priv *priv = dev->data->dev_private;
 613         char match[MRVL_MATCH_LEN];
 614         int ret = 0, i, def_init_size;
 615
 616         if (priv->ppio)
 617                 return mrvl_dev_set_link_up(dev);
 618
 619         snprintf(match, sizeof(match), "ppio-%d:%d",
 620                  priv->pp_id, priv->ppio_id);
 621         priv->ppio_params.match = match;
 622
 623         /*
 624          * Calculate the minimum bpool size for refill feature as follows:
 625          * 2 default burst sizes multiply by number of rx queues.
 626          * If the bpool size will be below this value, new buffers will
 627          * be added to the pool.
 628          */
 629         priv->bpool_min_size = priv->nb_rx_queues * MRVL_BURST_SIZE * 2;
 630
 631         /* In case initial bpool size configured in queues setup is
 632          * smaller than minimum size add more buffers
 633          */
 634         def_init_size = priv->bpool_min_size + MRVL_BURST_SIZE * 2;
 635         if (priv->bpool_init_size < def_init_size) {
 636                 int buffs_to_add = def_init_size - priv->bpool_init_size;
 637
 638                 priv->bpool_init_size += buffs_to_add;
 639                 ret = mrvl_fill_bpool(dev->data->rx_queues[0], buffs_to_add);
 640                 if (ret)
 641                         MRVL_LOG(ERR, "Failed to add buffers to bpool");
 642         }
 643
 644         /*
 645          * Calculate the maximum bpool size for refill feature as follows:
 646          * maximum number of descriptors in rx queue multiply by number
 647          * of rx queues plus minimum bpool size.
 648          * In case the bpool size will exceed this value, superfluous buffers
 649          * will be removed
 650          */
 651         priv->bpool_max_size = (priv->nb_rx_queues * MRVL_PP2_RXD_MAX) +
 652                                 priv->bpool_min_size;
 653
 654         ret = pp2_ppio_init(&priv->ppio_params, &priv->ppio);
 655         if (ret) {
 656                 MRVL_LOG(ERR, "Failed to init ppio");
 657                 return ret;
 658         }
 659
 660         /*
 661          * In case there are some some stale uc/mc mac addresses flush them
 662          * here. It cannot be done during mrvl_dev_close() as port information
 663          * is already gone at that point (due to pp2_ppio_deinit() in
 664          * mrvl_dev_stop()).
 665          */
 666         if (!priv->uc_mc_flushed) {
 667                 ret = pp2_ppio_flush_mac_addrs(priv->ppio, 1, 1);
 668                 if (ret) {
 669                         MRVL_LOG(ERR,
 670                                 "Failed to flush uc/mc filter list");
 671                         goto out;
 672                 }
 673                 priv->uc_mc_flushed = 1;
 674         }
 675
 676         if (!priv->vlan_flushed) {
 677                 ret = pp2_ppio_flush_vlan(priv->ppio);
 678                 if (ret) {
 679                         MRVL_LOG(ERR, "Failed to flush vlan list");
 680                         /*
 681                          * TODO
 682                          * once pp2_ppio_flush_vlan() is supported jump to out
 683                          * goto out;
 684                          */
 685                 }
 686                 priv->vlan_flushed = 1;
 687         }
 688         ret = mrvl_mtu_set(dev, dev->data->mtu);
 689         if (ret)
 690                 MRVL_LOG(ERR, "Failed to set MTU to %d", dev->data->mtu);
 691
 692         /* For default QoS config, don't start classifier. */
 693         if (mrvl_qos_cfg  &&
 694             mrvl_qos_cfg->port[dev->data->port_id].use_global_defaults == 0) {
 695                 ret = mrvl_start_qos_mapping(priv);
 696                 if (ret) {
 697                         MRVL_LOG(ERR, "Failed to setup QoS mapping");
 698                         goto out;
 699                 }
 700         }
 701
 702         ret = mrvl_dev_set_link_up(dev);
 703         if (ret) {
 704                 MRVL_LOG(ERR, "Failed to set link up");
 705                 goto out;
 706         }
 707
 708         /* start tx queues */
 709         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 710                 struct mrvl_txq *txq = dev->data->tx_queues[i];
 711
 712                 dev->data->tx_queue_state[i] = RTE_ETH_QUEUE_STATE_STARTED;
 713
 714                 if (!txq->tx_deferred_start)
 715                         continue;
 716
 717                 /*
 718                  * All txqs are started by default. Stop them
 719                  * so that tx_deferred_start works as expected.
 720                  */
 721                 ret = mrvl_tx_queue_stop(dev, i);
 722                 if (ret)
 723                         goto out;
 724         }
 725
 726         mrvl_flow_init(dev);
 727         mrvl_mtr_init(dev);
 728         mrvl_set_tx_function(dev);
 729
 730         return 0;
 731 out:
 732         MRVL_LOG(ERR, "Failed to start device");
 733         pp2_ppio_deinit(priv->ppio);
 734         return ret;
 735 }
 736
 737 /**
 738  * Flush receive queues.
 739  *
 740  * @param dev
 741  *   Pointer to Ethernet device structure.
 742  */
 743 static void
 744 mrvl_flush_rx_queues(struct rte_eth_dev *dev)
 745 {
 746         int i;
 747
 748         MRVL_LOG(INFO, "Flushing rx queues");
 749         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 750                 int ret, num;
 751
 752                 do {
 753                         struct mrvl_rxq *q = dev->data->rx_queues[i];
 754                         struct pp2_ppio_desc descs[MRVL_PP2_RXD_MAX];
 755
 756                         num = MRVL_PP2_RXD_MAX;
 757                         ret = pp2_ppio_recv(q->priv->ppio,
 758                                             q->priv->rxq_map[q->queue_id].tc,
 759                                             q->priv->rxq_map[q->queue_id].inq,
 760                                             descs, (uint16_t *)&num);
 761                 } while (ret == 0 && num);
 762         }
 763 }
 764
 765 /**
 766  * Flush transmit shadow queues.
 767  *
 768  * @param dev
 769  *   Pointer to Ethernet device structure.
 770  */
 771 static void
 772 mrvl_flush_tx_shadow_queues(struct rte_eth_dev *dev)
 773 {
 774         int i, j;
 775         struct mrvl_txq *txq;
 776
 777         MRVL_LOG(INFO, "Flushing tx shadow queues");
 778         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 779                 txq = (struct mrvl_txq *)dev->data->tx_queues[i];
 780
 781                 for (j = 0; j < RTE_MAX_LCORE; j++) {
 782                         struct mrvl_shadow_txq *sq;
 783
 784                         if (!hifs[j])
 785                                 continue;
 786
 787                         sq = &txq->shadow_txqs[j];
 788                         mrvl_free_sent_buffers(txq->priv->ppio,
 789                                 hifs[j], j, sq, txq->queue_id, 1);
 790                         while (sq->tail != sq->head) {
 791                                 uint64_t addr = cookie_addr_high |
 792                                         sq->ent[sq->tail].buff.cookie;
 793                                 rte_pktmbuf_free(
 794                                         (struct rte_mbuf *)addr);
 795                                 sq->tail = (sq->tail + 1) &
 796                                             MRVL_PP2_TX_SHADOWQ_MASK;
 797                         }
 798                         memset(sq, 0, sizeof(*sq));
 799                 }
 800         }
 801 }
 802
 803 /**
 804  * Flush hardware bpool (buffer-pool).
 805  *
 806  * @param dev
 807  *   Pointer to Ethernet device structure.
 808  */
 809 static void
 810 mrvl_flush_bpool(struct rte_eth_dev *dev)
 811 {
 812         struct mrvl_priv *priv = dev->data->dev_private;
 813         struct pp2_hif *hif;
 814         uint32_t num;
 815         int ret;
 816         unsigned int core_id = rte_lcore_id();
 817
 818         if (core_id == LCORE_ID_ANY)
 819                 core_id = 0;
 820
 821         hif = mrvl_get_hif(priv, core_id);
 822
 823         ret = pp2_bpool_get_num_buffs(priv->bpool, &num);
 824         if (ret) {
 825                 MRVL_LOG(ERR, "Failed to get bpool buffers number");
 826                 return;
 827         }
 828
 829         while (num--) {
 830                 struct pp2_buff_inf inf;
 831                 uint64_t addr;
 832
 833                 ret = pp2_bpool_get_buff(hif, priv->bpool, &inf);
 834                 if (ret)
 835                         break;
 836
 837                 addr = cookie_addr_high | inf.cookie;
 838                 rte_pktmbuf_free((struct rte_mbuf *)addr);
 839         }
 840 }
 841
 842 /**
 843  * DPDK callback to stop the device.
 844  *
 845  * @param dev
 846  *   Pointer to Ethernet device structure.
 847  */
 848 static void
 849 mrvl_dev_stop(struct rte_eth_dev *dev)
 850 {
 851         mrvl_dev_set_link_down(dev);
 852 }
 853
 854 /**
 855  * DPDK callback to close the device.
 856  *
 857  * @param dev
 858  *   Pointer to Ethernet device structure.
 859  */
 860 static void
 861 mrvl_dev_close(struct rte_eth_dev *dev)
 862 {
 863         struct mrvl_priv *priv = dev->data->dev_private;
 864         size_t i;
 865
 866         mrvl_flush_rx_queues(dev);
 867         mrvl_flush_tx_shadow_queues(dev);
 868         mrvl_flow_deinit(dev);
 869         mrvl_mtr_deinit(dev);
 870
 871         for (i = 0; i < priv->ppio_params.inqs_params.num_tcs; ++i) {
 872                 struct pp2_ppio_tc_params *tc_params =
 873                         &priv->ppio_params.inqs_params.tcs_params[i];
 874
 875                 if (tc_params->inqs_params) {
 876                         rte_free(tc_params->inqs_params);
 877                         tc_params->inqs_params = NULL;
 878                 }
 879         }
 880
 881         if (priv->cls_tbl) {
 882                 pp2_cls_tbl_deinit(priv->cls_tbl);
 883                 priv->cls_tbl = NULL;
 884         }
 885
 886         if (priv->qos_tbl) {
 887                 pp2_cls_qos_tbl_deinit(priv->qos_tbl);
 888                 priv->qos_tbl = NULL;
 889         }
 890
 891         mrvl_flush_bpool(dev);
 892         mrvl_tm_deinit(dev);
 893
 894         if (priv->ppio) {
 895                 pp2_ppio_deinit(priv->ppio);
 896                 priv->ppio = NULL;
 897         }
 898
 899         /* policer must be released after ppio deinitialization */
 900         if (priv->default_policer) {
 901                 pp2_cls_plcr_deinit(priv->default_policer);
 902                 priv->default_policer = NULL;
 903         }
 904
 905
 906         if (priv->bpool) {
 907                 pp2_bpool_deinit(priv->bpool);
 908                 used_bpools[priv->pp_id] &= ~(1 << priv->bpool_bit);
 909                 priv->bpool = NULL;
 910         }
 911
 912         mrvl_dev_num--;
 913
 914         if (mrvl_dev_num == 0) {
 915                 MRVL_LOG(INFO, "Perform MUSDK deinit");
 916                 mrvl_deinit_hifs();
 917                 mrvl_deinit_pp2();
 918                 rte_mvep_deinit(MVEP_MOD_T_PP2);
 919         }
 920 }
 921
 922 /**
 923  * DPDK callback to retrieve physical link information.
 924  *
 925  * @param dev
 926  *   Pointer to Ethernet device structure.
 927  * @param wait_to_complete
 928  *   Wait for request completion (ignored).
 929  *
 930  * @return
 931  *   0 on success, negative error value otherwise.
 932  */
 933 static int
 934 mrvl_link_update(struct rte_eth_dev *dev, int wait_to_complete __rte_unused)
 935 {
 936         /*
 937          * TODO
 938          * once MUSDK provides necessary API use it here
 939          */
 940         struct mrvl_priv *priv = dev->data->dev_private;
 941         struct ethtool_cmd edata;
 942         struct ifreq req;
 943         int ret, fd, link_up;
 944
 945         if (!priv->ppio)
 946                 return -EPERM;
 947
 948         edata.cmd = ETHTOOL_GSET;
 949
 950         strcpy(req.ifr_name, dev->data->name);
 951         req.ifr_data = (void *)&edata;
 952
 953         fd = socket(AF_INET, SOCK_DGRAM, 0);
 954         if (fd == -1)
 955                 return -EFAULT;
 956
 957         ret = ioctl(fd, SIOCETHTOOL, &req);
 958         if (ret == -1) {
 959                 close(fd);
 960                 return -EFAULT;
 961         }
 962
 963         close(fd);
 964
 965         switch (ethtool_cmd_speed(&edata)) {
 966         case SPEED_10:
 967                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_10M;
 968                 break;
 969         case SPEED_100:
 970                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_100M;
 971                 break;
 972         case SPEED_1000:
 973                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_1G;
 974                 break;
 975         case SPEED_10000:
 976                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_10G;
 977                 break;
 978         default:
 979                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_NONE;
 980         }
 981
 982         dev->data->dev_link.link_duplex = edata.duplex ? ETH_LINK_FULL_DUPLEX :
 983                                                          ETH_LINK_HALF_DUPLEX;
 984         dev->data->dev_link.link_autoneg = edata.autoneg ? ETH_LINK_AUTONEG :
 985                                                            ETH_LINK_FIXED;
 986         pp2_ppio_get_link_state(priv->ppio, &link_up);
 987         dev->data->dev_link.link_status = link_up ? ETH_LINK_UP : ETH_LINK_DOWN;
 988
 989         return 0;
 990 }
 991
 992 /**
 993  * DPDK callback to enable promiscuous mode.
 994  *
 995  * @param dev
 996  *   Pointer to Ethernet device structure.
 997  */
 998 static void
 999 mrvl_promiscuous_enable(struct rte_eth_dev *dev)
1000 {
1001         struct mrvl_priv *priv = dev->data->dev_private;
1002         int ret;
1003
1004         if (!priv->ppio)
1005                 return;
1006
1007         if (priv->isolated)
1008                 return;
1009
1010         ret = pp2_ppio_set_promisc(priv->ppio, 1);
1011         if (ret)
1012                 MRVL_LOG(ERR, "Failed to enable promiscuous mode");
1013 }
1014
1015 /**
1016  * DPDK callback to enable allmulti mode.
1017  *
1018  * @param dev
1019  *   Pointer to Ethernet device structure.
1020  */
1021 static void
1022 mrvl_allmulticast_enable(struct rte_eth_dev *dev)
1023 {
1024         struct mrvl_priv *priv = dev->data->dev_private;
1025         int ret;
1026
1027         if (!priv->ppio)
1028                 return;
1029
1030         if (priv->isolated)
1031                 return;
1032
1033         ret = pp2_ppio_set_mc_promisc(priv->ppio, 1);
1034         if (ret)
1035                 MRVL_LOG(ERR, "Failed enable all-multicast mode");
1036 }
1037
1038 /**
1039  * DPDK callback to disable promiscuous mode.
1040  *
1041  * @param dev
1042  *   Pointer to Ethernet device structure.
1043  */
1044 static void
1045 mrvl_promiscuous_disable(struct rte_eth_dev *dev)
1046 {
1047         struct mrvl_priv *priv = dev->data->dev_private;
1048         int ret;
1049
1050         if (!priv->ppio)
1051                 return;
1052
1053         ret = pp2_ppio_set_promisc(priv->ppio, 0);
1054         if (ret)
1055                 MRVL_LOG(ERR, "Failed to disable promiscuous mode");
1056 }
1057
1058 /**
1059  * DPDK callback to disable allmulticast mode.
1060  *
1061  * @param dev
1062  *   Pointer to Ethernet device structure.
1063  */
1064 static void
1065 mrvl_allmulticast_disable(struct rte_eth_dev *dev)
1066 {
1067         struct mrvl_priv *priv = dev->data->dev_private;
1068         int ret;
1069
1070         if (!priv->ppio)
1071                 return;
1072
1073         ret = pp2_ppio_set_mc_promisc(priv->ppio, 0);
1074         if (ret)
1075                 MRVL_LOG(ERR, "Failed to disable all-multicast mode");
1076 }
1077
1078 /**
1079  * DPDK callback to remove a MAC address.
1080  *
1081  * @param dev
1082  *   Pointer to Ethernet device structure.
1083  * @param index
1084  *   MAC address index.
1085  */
1086 static void
1087 mrvl_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
1088 {
1089         struct mrvl_priv *priv = dev->data->dev_private;
1090         char buf[RTE_ETHER_ADDR_FMT_SIZE];
1091         int ret;
1092
1093         if (!priv->ppio)
1094                 return;
1095
1096         if (priv->isolated)
1097                 return;
1098
1099         ret = pp2_ppio_remove_mac_addr(priv->ppio,
1100                                        dev->data->mac_addrs[index].addr_bytes);
1101         if (ret) {
1102                 rte_ether_format_addr(buf, sizeof(buf),
1103                                   &dev->data->mac_addrs[index]);
1104                 MRVL_LOG(ERR, "Failed to remove mac %s", buf);
1105         }
1106 }
1107
1108 /**
1109  * DPDK callback to add a MAC address.
1110  *
1111  * @param dev
1112  *   Pointer to Ethernet device structure.
1113  * @param mac_addr
1114  *   MAC address to register.
1115  * @param index
1116  *   MAC address index.
1117  * @param vmdq
1118  *   VMDq pool index to associate address with (unused).
1119  *
1120  * @return
1121  *   0 on success, negative error value otherwise.
1122  */
1123 static int
1124 mrvl_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr,
1125                   uint32_t index, uint32_t vmdq __rte_unused)
1126 {
1127         struct mrvl_priv *priv = dev->data->dev_private;
1128         char buf[RTE_ETHER_ADDR_FMT_SIZE];
1129         int ret;
1130
1131         if (priv->isolated)
1132                 return -ENOTSUP;
1133
1134         if (index == 0)
1135                 /* For setting index 0, mrvl_mac_addr_set() should be used.*/
1136                 return -1;
1137
1138         if (!priv->ppio)
1139                 return 0;
1140
1141         /*
1142          * Maximum number of uc addresses can be tuned via kernel module mvpp2x
1143          * parameter uc_filter_max. Maximum number of mc addresses is then
1144          * MRVL_MAC_ADDRS_MAX - uc_filter_max. Currently it defaults to 4 and
1145          * 21 respectively.
1146          *
1147          * If more than uc_filter_max uc addresses were added to filter list
1148          * then NIC will switch to promiscuous mode automatically.
1149          *
1150          * If more than MRVL_MAC_ADDRS_MAX - uc_filter_max number mc addresses
1151          * were added to filter list then NIC will switch to all-multicast mode
1152          * automatically.
1153          */
1154         ret = pp2_ppio_add_mac_addr(priv->ppio, mac_addr->addr_bytes);
1155         if (ret) {
1156                 rte_ether_format_addr(buf, sizeof(buf), mac_addr);
1157                 MRVL_LOG(ERR, "Failed to add mac %s", buf);
1158                 return -1;
1159         }
1160
1161         return 0;
1162 }
1163
1164 /**
1165  * DPDK callback to set the primary MAC address.
1166  *
1167  * @param dev
1168  *   Pointer to Ethernet device structure.
1169  * @param mac_addr
1170  *   MAC address to register.
1171  *
1172  * @return
1173  *   0 on success, negative error value otherwise.
1174  */
1175 static int
1176 mrvl_mac_addr_set(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr)
1177 {
1178         struct mrvl_priv *priv = dev->data->dev_private;
1179         int ret;
1180
1181         if (!priv->ppio)
1182                 return 0;
1183
1184         if (priv->isolated)
1185                 return -ENOTSUP;
1186
1187         ret = pp2_ppio_set_mac_addr(priv->ppio, mac_addr->addr_bytes);
1188         if (ret) {
1189                 char buf[RTE_ETHER_ADDR_FMT_SIZE];
1190                 rte_ether_format_addr(buf, sizeof(buf), mac_addr);
1191                 MRVL_LOG(ERR, "Failed to set mac to %s", buf);
1192         }
1193
1194         return ret;
1195 }
1196
1197 /**
1198  * DPDK callback to get device statistics.
1199  *
1200  * @param dev
1201  *   Pointer to Ethernet device structure.
1202  * @param stats
1203  *   Stats structure output buffer.
1204  *
1205  * @return
1206  *   0 on success, negative error value otherwise.
1207  */
1208 static int
1209 mrvl_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1210 {
1211         struct mrvl_priv *priv = dev->data->dev_private;
1212         struct pp2_ppio_statistics ppio_stats;
1213         uint64_t drop_mac = 0;
1214         unsigned int i, idx, ret;
1215
1216         if (!priv->ppio)
1217                 return -EPERM;
1218
1219         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1220                 struct mrvl_rxq *rxq = dev->data->rx_queues[i];
1221                 struct pp2_ppio_inq_statistics rx_stats;
1222
1223                 if (!rxq)
1224                         continue;
1225
1226                 idx = rxq->queue_id;
1227                 if (unlikely(idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)) {
1228                         MRVL_LOG(ERR,
1229                                 "rx queue %d stats out of range (0 - %d)",
1230                                 idx, RTE_ETHDEV_QUEUE_STAT_CNTRS - 1);
1231                         continue;
1232                 }
1233
1234                 ret = pp2_ppio_inq_get_statistics(priv->ppio,
1235                                                   priv->rxq_map[idx].tc,
1236                                                   priv->rxq_map[idx].inq,
1237                                                   &rx_stats, 0);
1238                 if (unlikely(ret)) {
1239                         MRVL_LOG(ERR,
1240                                 "Failed to update rx queue %d stats", idx);
1241                         break;
1242                 }
1243
1244                 stats->q_ibytes[idx] = rxq->bytes_recv;
1245                 stats->q_ipackets[idx] = rx_stats.enq_desc - rxq->drop_mac;
1246                 stats->q_errors[idx] = rx_stats.drop_early +
1247                                        rx_stats.drop_fullq +
1248                                        rx_stats.drop_bm +
1249                                        rxq->drop_mac;
1250                 stats->ibytes += rxq->bytes_recv;
1251                 drop_mac += rxq->drop_mac;
1252         }
1253
1254         for (i = 0; i < dev->data->nb_tx_queues; i++) {
1255                 struct mrvl_txq *txq = dev->data->tx_queues[i];
1256                 struct pp2_ppio_outq_statistics tx_stats;
1257
1258                 if (!txq)
1259                         continue;
1260
1261                 idx = txq->queue_id;
1262                 if (unlikely(idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)) {
1263                         MRVL_LOG(ERR,
1264                                 "tx queue %d stats out of range (0 - %d)",
1265                                 idx, RTE_ETHDEV_QUEUE_STAT_CNTRS - 1);
1266                 }
1267
1268                 ret = pp2_ppio_outq_get_statistics(priv->ppio, idx,
1269                                                    &tx_stats, 0);
1270                 if (unlikely(ret)) {
1271                         MRVL_LOG(ERR,
1272                                 "Failed to update tx queue %d stats", idx);
1273                         break;
1274                 }
1275
1276                 stats->q_opackets[idx] = tx_stats.deq_desc;
1277                 stats->q_obytes[idx] = txq->bytes_sent;
1278                 stats->obytes += txq->bytes_sent;
1279         }
1280
1281         ret = pp2_ppio_get_statistics(priv->ppio, &ppio_stats, 0);
1282         if (unlikely(ret)) {
1283                 MRVL_LOG(ERR, "Failed to update port statistics");
1284                 return ret;
1285         }
1286
1287         stats->ipackets += ppio_stats.rx_packets - drop_mac;
1288         stats->opackets += ppio_stats.tx_packets;
1289         stats->imissed += ppio_stats.rx_fullq_dropped +
1290                           ppio_stats.rx_bm_dropped +
1291                           ppio_stats.rx_early_dropped +
1292                           ppio_stats.rx_fifo_dropped +
1293                           ppio_stats.rx_cls_dropped;
1294         stats->ierrors = drop_mac;
1295
1296         return 0;
1297 }
1298
1299 /**
1300  * DPDK callback to clear device statistics.
1301  *
1302  * @param dev
1303  *   Pointer to Ethernet device structure.
1304  */
1305 static void
1306 mrvl_stats_reset(struct rte_eth_dev *dev)
1307 {
1308         struct mrvl_priv *priv = dev->data->dev_private;
1309         int i;
1310
1311         if (!priv->ppio)
1312                 return;
1313
1314         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1315                 struct mrvl_rxq *rxq = dev->data->rx_queues[i];
1316
1317                 pp2_ppio_inq_get_statistics(priv->ppio, priv->rxq_map[i].tc,
1318                                             priv->rxq_map[i].inq, NULL, 1);
1319                 rxq->bytes_recv = 0;
1320                 rxq->drop_mac = 0;
1321         }
1322
1323         for (i = 0; i < dev->data->nb_tx_queues; i++) {
1324                 struct mrvl_txq *txq = dev->data->tx_queues[i];
1325
1326                 pp2_ppio_outq_get_statistics(priv->ppio, i, NULL, 1);
1327                 txq->bytes_sent = 0;
1328         }
1329
1330         pp2_ppio_get_statistics(priv->ppio, NULL, 1);
1331 }
1332
1333 /**
1334  * DPDK callback to get extended statistics.
1335  *
1336  * @param dev
1337  *   Pointer to Ethernet device structure.
1338  * @param stats
1339  *   Pointer to xstats table.
1340  * @param n
1341  *   Number of entries in xstats table.
1342  * @return
1343  *   Negative value on error, number of read xstats otherwise.
1344  */
1345 static int
1346 mrvl_xstats_get(struct rte_eth_dev *dev,
1347                 struct rte_eth_xstat *stats, unsigned int n)
1348 {
1349         struct mrvl_priv *priv = dev->data->dev_private;
1350         struct pp2_ppio_statistics ppio_stats;
1351         unsigned int i;
1352
1353         if (!stats)
1354                 return 0;
1355
1356         pp2_ppio_get_statistics(priv->ppio, &ppio_stats, 0);
1357         for (i = 0; i < n && i < RTE_DIM(mrvl_xstats_tbl); i++) {
1358                 uint64_t val;
1359
1360                 if (mrvl_xstats_tbl[i].size == sizeof(uint32_t))
1361                         val = *(uint32_t *)((uint8_t *)&ppio_stats +
1362                                             mrvl_xstats_tbl[i].offset);
1363                 else if (mrvl_xstats_tbl[i].size == sizeof(uint64_t))
1364                         val = *(uint64_t *)((uint8_t *)&ppio_stats +
1365                                             mrvl_xstats_tbl[i].offset);
1366                 else
1367                         return -EINVAL;
1368
1369                 stats[i].id = i;
1370                 stats[i].value = val;
1371         }
1372
1373         return n;
1374 }
1375
1376 /**
1377  * DPDK callback to reset extended statistics.
1378  *
1379  * @param dev
1380  *   Pointer to Ethernet device structure.
1381  */
1382 static void
1383 mrvl_xstats_reset(struct rte_eth_dev *dev)
1384 {
1385         mrvl_stats_reset(dev);
1386 }
1387
1388 /**
1389  * DPDK callback to get extended statistics names.
1390  *
1391  * @param dev (unused)
1392  *   Pointer to Ethernet device structure.
1393  * @param xstats_names
1394  *   Pointer to xstats names table.
1395  * @param size
1396  *   Size of the xstats names table.
1397  * @return
1398  *   Number of read names.
1399  */
1400 static int
1401 mrvl_xstats_get_names(struct rte_eth_dev *dev __rte_unused,
1402                       struct rte_eth_xstat_name *xstats_names,
1403                       unsigned int size)
1404 {
1405         unsigned int i;
1406
1407         if (!xstats_names)
1408                 return RTE_DIM(mrvl_xstats_tbl);
1409
1410         for (i = 0; i < size && i < RTE_DIM(mrvl_xstats_tbl); i++)
1411                 strlcpy(xstats_names[i].name, mrvl_xstats_tbl[i].name,
1412                         RTE_ETH_XSTATS_NAME_SIZE);
1413
1414         return size;
1415 }
1416
1417 /**
1418  * DPDK callback to get information about the device.
1419  *
1420  * @param dev
1421  *   Pointer to Ethernet device structure (unused).
1422  * @param info
1423  *   Info structure output buffer.
1424  */
1425 static void
1426 mrvl_dev_infos_get(struct rte_eth_dev *dev __rte_unused,
1427                    struct rte_eth_dev_info *info)
1428 {
1429         info->speed_capa = ETH_LINK_SPEED_10M |
1430                            ETH_LINK_SPEED_100M |
1431                            ETH_LINK_SPEED_1G |
1432                            ETH_LINK_SPEED_10G;
1433
1434         info->max_rx_queues = MRVL_PP2_RXQ_MAX;
1435         info->max_tx_queues = MRVL_PP2_TXQ_MAX;
1436         info->max_mac_addrs = MRVL_MAC_ADDRS_MAX;
1437
1438         info->rx_desc_lim.nb_max = MRVL_PP2_RXD_MAX;
1439         info->rx_desc_lim.nb_min = MRVL_PP2_RXD_MIN;
1440         info->rx_desc_lim.nb_align = MRVL_PP2_RXD_ALIGN;
1441
1442         info->tx_desc_lim.nb_max = MRVL_PP2_TXD_MAX;
1443         info->tx_desc_lim.nb_min = MRVL_PP2_TXD_MIN;
1444         info->tx_desc_lim.nb_align = MRVL_PP2_TXD_ALIGN;
1445
1446         info->rx_offload_capa = MRVL_RX_OFFLOADS;
1447         info->rx_queue_offload_capa = MRVL_RX_OFFLOADS;
1448
1449         info->tx_offload_capa = MRVL_TX_OFFLOADS;
1450         info->tx_queue_offload_capa = MRVL_TX_OFFLOADS;
1451
1452         info->flow_type_rss_offloads = ETH_RSS_IPV4 |
1453                                        ETH_RSS_NONFRAG_IPV4_TCP |
1454                                        ETH_RSS_NONFRAG_IPV4_UDP;
1455
1456         /* By default packets are dropped if no descriptors are available */
1457         info->default_rxconf.rx_drop_en = 1;
1458
1459         info->max_rx_pktlen = MRVL_PKT_SIZE_MAX;
1460 }
1461
1462 /**
1463  * Return supported packet types.
1464  *
1465  * @param dev
1466  *   Pointer to Ethernet device structure (unused).
1467  *
1468  * @return
1469  *   Const pointer to the table with supported packet types.
1470  */
1471 static const uint32_t *
1472 mrvl_dev_supported_ptypes_get(struct rte_eth_dev *dev __rte_unused)
1473 {
1474         static const uint32_t ptypes[] = {
1475                 RTE_PTYPE_L2_ETHER,
1476                 RTE_PTYPE_L2_ETHER_VLAN,
1477                 RTE_PTYPE_L2_ETHER_QINQ,
1478                 RTE_PTYPE_L3_IPV4,
1479                 RTE_PTYPE_L3_IPV4_EXT,
1480                 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
1481                 RTE_PTYPE_L3_IPV6,
1482                 RTE_PTYPE_L3_IPV6_EXT,
1483                 RTE_PTYPE_L2_ETHER_ARP,
1484                 RTE_PTYPE_L4_TCP,
1485                 RTE_PTYPE_L4_UDP
1486         };
1487
1488         return ptypes;
1489 }
1490
1491 /**
1492  * DPDK callback to get information about specific receive queue.
1493  *
1494  * @param dev
1495  *   Pointer to Ethernet device structure.
1496  * @param rx_queue_id
1497  *   Receive queue index.
1498  * @param qinfo
1499  *   Receive queue information structure.
1500  */
1501 static void mrvl_rxq_info_get(struct rte_eth_dev *dev, uint16_t rx_queue_id,
1502                               struct rte_eth_rxq_info *qinfo)
1503 {
1504         struct mrvl_rxq *q = dev->data->rx_queues[rx_queue_id];
1505         struct mrvl_priv *priv = dev->data->dev_private;
1506         int inq = priv->rxq_map[rx_queue_id].inq;
1507         int tc = priv->rxq_map[rx_queue_id].tc;
1508         struct pp2_ppio_tc_params *tc_params =
1509                 &priv->ppio_params.inqs_params.tcs_params[tc];
1510
1511         qinfo->mp = q->mp;
1512         qinfo->nb_desc = tc_params->inqs_params[inq].size;
1513 }
1514
1515 /**
1516  * DPDK callback to get information about specific transmit queue.
1517  *
1518  * @param dev
1519  *   Pointer to Ethernet device structure.
1520  * @param tx_queue_id
1521  *   Transmit queue index.
1522  * @param qinfo
1523  *   Transmit queue information structure.
1524  */
1525 static void mrvl_txq_info_get(struct rte_eth_dev *dev, uint16_t tx_queue_id,
1526                               struct rte_eth_txq_info *qinfo)
1527 {
1528         struct mrvl_priv *priv = dev->data->dev_private;
1529         struct mrvl_txq *txq = dev->data->tx_queues[tx_queue_id];
1530
1531         qinfo->nb_desc =
1532                 priv->ppio_params.outqs_params.outqs_params[tx_queue_id].size;
1533         qinfo->conf.tx_deferred_start = txq->tx_deferred_start;
1534 }
1535
1536 /**
1537  * DPDK callback to Configure a VLAN filter.
1538  *
1539  * @param dev
1540  *   Pointer to Ethernet device structure.
1541  * @param vlan_id
1542  *   VLAN ID to filter.
1543  * @param on
1544  *   Toggle filter.
1545  *
1546  * @return
1547  *   0 on success, negative error value otherwise.
1548  */
1549 static int
1550 mrvl_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1551 {
1552         struct mrvl_priv *priv = dev->data->dev_private;
1553
1554         if (!priv->ppio)
1555                 return -EPERM;
1556
1557         if (priv->isolated)
1558                 return -ENOTSUP;
1559
1560         return on ? pp2_ppio_add_vlan(priv->ppio, vlan_id) :
1561                     pp2_ppio_remove_vlan(priv->ppio, vlan_id);
1562 }
1563
1564 /**
1565  * Release buffers to hardware bpool (buffer-pool)
1566  *
1567  * @param rxq
1568  *   Receive queue pointer.
1569  * @param num
1570  *   Number of buffers to release to bpool.
1571  *
1572  * @return
1573  *   0 on success, negative error value otherwise.
1574  */
1575 static int
1576 mrvl_fill_bpool(struct mrvl_rxq *rxq, int num)
1577 {
1578         struct buff_release_entry entries[MRVL_PP2_RXD_MAX];
1579         struct rte_mbuf *mbufs[MRVL_PP2_RXD_MAX];
1580         int i, ret;
1581         unsigned int core_id;
1582         struct pp2_hif *hif;
1583         struct pp2_bpool *bpool;
1584
1585         core_id = rte_lcore_id();
1586         if (core_id == LCORE_ID_ANY)
1587                 core_id = 0;
1588
1589         hif = mrvl_get_hif(rxq->priv, core_id);
1590         if (!hif)
1591                 return -1;
1592
1593         bpool = rxq->priv->bpool;
1594
1595         ret = rte_pktmbuf_alloc_bulk(rxq->mp, mbufs, num);
1596         if (ret)
1597                 return ret;
1598
1599         if (cookie_addr_high == MRVL_COOKIE_ADDR_INVALID)
1600                 cookie_addr_high =
1601                         (uint64_t)mbufs[0] & MRVL_COOKIE_HIGH_ADDR_MASK;
1602
1603         for (i = 0; i < num; i++) {
1604                 if (((uint64_t)mbufs[i] & MRVL_COOKIE_HIGH_ADDR_MASK)
1605                         != cookie_addr_high) {
1606                         MRVL_LOG(ERR,
1607                                 "mbuf virtual addr high 0x%lx out of range",
1608                                 (uint64_t)mbufs[i] >> 32);
1609                         goto out;
1610                 }
1611
1612                 entries[i].buff.addr =
1613                         rte_mbuf_data_iova_default(mbufs[i]);
1614                 entries[i].buff.cookie = (uint64_t)mbufs[i];
1615                 entries[i].bpool = bpool;
1616         }
1617
1618         pp2_bpool_put_buffs(hif, entries, (uint16_t *)&i);
1619         mrvl_port_bpool_size[bpool->pp2_id][bpool->id][core_id] += i;
1620
1621         if (i != num)
1622                 goto out;
1623
1624         return 0;
1625 out:
1626         for (; i < num; i++)
1627                 rte_pktmbuf_free(mbufs[i]);
1628
1629         return -1;
1630 }
1631
1632 /**
1633  * DPDK callback to configure the receive queue.
1634  *
1635  * @param dev
1636  *   Pointer to Ethernet device structure.
1637  * @param idx
1638  *   RX queue index.
1639  * @param desc
1640  *   Number of descriptors to configure in queue.
1641  * @param socket
1642  *   NUMA socket on which memory must be allocated.
1643  * @param conf
1644  *   Thresholds parameters.
1645  * @param mp
1646  *   Memory pool for buffer allocations.
1647  *
1648  * @return
1649  *   0 on success, negative error value otherwise.
1650  */
1651 static int
1652 mrvl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1653                     unsigned int socket,
1654                     const struct rte_eth_rxconf *conf,
1655                     struct rte_mempool *mp)
1656 {
1657         struct mrvl_priv *priv = dev->data->dev_private;
1658         struct mrvl_rxq *rxq;
1659         uint32_t frame_size, buf_size = rte_pktmbuf_data_room_size(mp);
1660         uint32_t max_rx_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
1661         int ret, tc, inq;
1662         uint64_t offloads;
1663
1664         offloads = conf->offloads | dev->data->dev_conf.rxmode.offloads;
1665
1666         if (priv->rxq_map[idx].tc == MRVL_UNKNOWN_TC) {
1667                 /*
1668                  * Unknown TC mapping, mapping will not have a correct queue.
1669                  */
1670                 MRVL_LOG(ERR, "Unknown TC mapping for queue %hu eth%hhu",
1671                         idx, priv->ppio_id);
1672                 return -EFAULT;
1673         }
1674
1675         frame_size = buf_size - RTE_PKTMBUF_HEADROOM - MRVL_PKT_EFFEC_OFFS;
1676         if (frame_size < max_rx_pkt_len) {
1677                 MRVL_LOG(WARNING,
1678                         "Mbuf size must be increased to %u bytes to hold up "
1679                         "to %u bytes of data.",
1680                         buf_size + max_rx_pkt_len - frame_size,
1681                         max_rx_pkt_len);
1682                 dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
1683                 MRVL_LOG(INFO, "Setting max rx pkt len to %u",
1684                         dev->data->dev_conf.rxmode.max_rx_pkt_len);
1685         }
1686
1687         if (dev->data->rx_queues[idx]) {
1688                 rte_free(dev->data->rx_queues[idx]);
1689                 dev->data->rx_queues[idx] = NULL;
1690         }
1691
1692         rxq = rte_zmalloc_socket("rxq", sizeof(*rxq), 0, socket);
1693         if (!rxq)
1694                 return -ENOMEM;
1695
1696         rxq->priv = priv;
1697         rxq->mp = mp;
1698         rxq->cksum_enabled = offloads & DEV_RX_OFFLOAD_IPV4_CKSUM;
1699         rxq->queue_id = idx;
1700         rxq->port_id = dev->data->port_id;
1701         mrvl_port_to_bpool_lookup[rxq->port_id] = priv->bpool;
1702
1703         tc = priv->rxq_map[rxq->queue_id].tc,
1704         inq = priv->rxq_map[rxq->queue_id].inq;
1705         priv->ppio_params.inqs_params.tcs_params[tc].inqs_params[inq].size =
1706                 desc;
1707
1708         ret = mrvl_fill_bpool(rxq, desc);
1709         if (ret) {
1710                 rte_free(rxq);
1711                 return ret;
1712         }
1713
1714         priv->bpool_init_size += desc;
1715
1716         dev->data->rx_queues[idx] = rxq;
1717
1718         return 0;
1719 }
1720
1721 /**
1722  * DPDK callback to release the receive queue.
1723  *
1724  * @param rxq
1725  *   Generic receive queue pointer.
1726  */
1727 static void
1728 mrvl_rx_queue_release(void *rxq)
1729 {
1730         struct mrvl_rxq *q = rxq;
1731         struct pp2_ppio_tc_params *tc_params;
1732         int i, num, tc, inq;
1733         struct pp2_hif *hif;
1734         unsigned int core_id = rte_lcore_id();
1735
1736         if (core_id == LCORE_ID_ANY)
1737                 core_id = 0;
1738
1739         if (!q)
1740                 return;
1741
1742         hif = mrvl_get_hif(q->priv, core_id);
1743
1744         if (!hif)
1745                 return;
1746
1747         tc = q->priv->rxq_map[q->queue_id].tc;
1748         inq = q->priv->rxq_map[q->queue_id].inq;
1749         tc_params = &q->priv->ppio_params.inqs_params.tcs_params[tc];
1750         num = tc_params->inqs_params[inq].size;
1751         for (i = 0; i < num; i++) {
1752                 struct pp2_buff_inf inf;
1753                 uint64_t addr;
1754
1755                 pp2_bpool_get_buff(hif, q->priv->bpool, &inf);
1756                 addr = cookie_addr_high | inf.cookie;
1757                 rte_pktmbuf_free((struct rte_mbuf *)addr);
1758         }
1759
1760         rte_free(q);
1761 }
1762
1763 /**
1764  * DPDK callback to configure the transmit queue.
1765  *
1766  * @param dev
1767  *   Pointer to Ethernet device structure.
1768  * @param idx
1769  *   Transmit queue index.
1770  * @param desc
1771  *   Number of descriptors to configure in the queue.
1772  * @param socket
1773  *   NUMA socket on which memory must be allocated.
1774  * @param conf
1775  *   Tx queue configuration parameters.
1776  *
1777  * @return
1778  *   0 on success, negative error value otherwise.
1779  */
1780 static int
1781 mrvl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1782                     unsigned int socket,
1783                     const struct rte_eth_txconf *conf)
1784 {
1785         struct mrvl_priv *priv = dev->data->dev_private;
1786         struct mrvl_txq *txq;
1787
1788         if (dev->data->tx_queues[idx]) {
1789                 rte_free(dev->data->tx_queues[idx]);
1790                 dev->data->tx_queues[idx] = NULL;
1791         }
1792
1793         txq = rte_zmalloc_socket("txq", sizeof(*txq), 0, socket);
1794         if (!txq)
1795                 return -ENOMEM;
1796
1797         txq->priv = priv;
1798         txq->queue_id = idx;
1799         txq->port_id = dev->data->port_id;
1800         txq->tx_deferred_start = conf->tx_deferred_start;
1801         dev->data->tx_queues[idx] = txq;
1802
1803         priv->ppio_params.outqs_params.outqs_params[idx].size = desc;
1804
1805         return 0;
1806 }
1807
1808 /**
1809  * DPDK callback to release the transmit queue.
1810  *
1811  * @param txq
1812  *   Generic transmit queue pointer.
1813  */
1814 static void
1815 mrvl_tx_queue_release(void *txq)
1816 {
1817         struct mrvl_txq *q = txq;
1818
1819         if (!q)
1820                 return;
1821
1822         rte_free(q);
1823 }
1824
1825 /**
1826  * DPDK callback to get flow control configuration.
1827  *
1828  * @param dev
1829  *  Pointer to Ethernet device structure.
1830  * @param fc_conf
1831  *  Pointer to the flow control configuration.
1832  *
1833  * @return
1834  *  0 on success, negative error value otherwise.
1835  */
1836 static int
1837 mrvl_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1838 {
1839         struct mrvl_priv *priv = dev->data->dev_private;
1840         int ret, en;
1841
1842         if (!priv)
1843                 return -EPERM;
1844
1845         ret = pp2_ppio_get_rx_pause(priv->ppio, &en);
1846         if (ret) {
1847                 MRVL_LOG(ERR, "Failed to read rx pause state");
1848                 return ret;
1849         }
1850
1851         fc_conf->mode = en ? RTE_FC_RX_PAUSE : RTE_FC_NONE;
1852
1853         return 0;
1854 }
1855
1856 /**
1857  * DPDK callback to set flow control configuration.
1858  *
1859  * @param dev
1860  *  Pointer to Ethernet device structure.
1861  * @param fc_conf
1862  *  Pointer to the flow control configuration.
1863  *
1864  * @return
1865  *  0 on success, negative error value otherwise.
1866  */
1867 static int
1868 mrvl_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1869 {
1870         struct mrvl_priv *priv = dev->data->dev_private;
1871
1872         if (!priv)
1873                 return -EPERM;
1874
1875         if (fc_conf->high_water ||
1876             fc_conf->low_water ||
1877             fc_conf->pause_time ||
1878             fc_conf->mac_ctrl_frame_fwd ||
1879             fc_conf->autoneg) {
1880                 MRVL_LOG(ERR, "Flowctrl parameter is not supported");
1881
1882                 return -EINVAL;
1883         }
1884
1885         if (fc_conf->mode == RTE_FC_NONE ||
1886             fc_conf->mode == RTE_FC_RX_PAUSE) {
1887                 int ret, en;
1888
1889                 en = fc_conf->mode == RTE_FC_NONE ? 0 : 1;
1890                 ret = pp2_ppio_set_rx_pause(priv->ppio, en);
1891                 if (ret)
1892                         MRVL_LOG(ERR,
1893                                 "Failed to change flowctrl on RX side");
1894
1895                 return ret;
1896         }
1897
1898         return 0;
1899 }
1900
1901 /**
1902  * Update RSS hash configuration
1903  *
1904  * @param dev
1905  *   Pointer to Ethernet device structure.
1906  * @param rss_conf
1907  *   Pointer to RSS configuration.
1908  *
1909  * @return
1910  *   0 on success, negative error value otherwise.
1911  */
1912 static int
1913 mrvl_rss_hash_update(struct rte_eth_dev *dev,
1914                      struct rte_eth_rss_conf *rss_conf)
1915 {
1916         struct mrvl_priv *priv = dev->data->dev_private;
1917
1918         if (priv->isolated)
1919                 return -ENOTSUP;
1920
1921         return mrvl_configure_rss(priv, rss_conf);
1922 }
1923
1924 /**
1925  * DPDK callback to get RSS hash configuration.
1926  *
1927  * @param dev
1928  *   Pointer to Ethernet device structure.
1929  * @rss_conf
1930  *   Pointer to RSS configuration.
1931  *
1932  * @return
1933  *   Always 0.
1934  */
1935 static int
1936 mrvl_rss_hash_conf_get(struct rte_eth_dev *dev,
1937                        struct rte_eth_rss_conf *rss_conf)
1938 {
1939         struct mrvl_priv *priv = dev->data->dev_private;
1940         enum pp2_ppio_hash_type hash_type =
1941                 priv->ppio_params.inqs_params.hash_type;
1942
1943         rss_conf->rss_key = NULL;
1944
1945         if (hash_type == PP2_PPIO_HASH_T_NONE)
1946                 rss_conf->rss_hf = 0;
1947         else if (hash_type == PP2_PPIO_HASH_T_2_TUPLE)
1948                 rss_conf->rss_hf = ETH_RSS_IPV4;
1949         else if (hash_type == PP2_PPIO_HASH_T_5_TUPLE && priv->rss_hf_tcp)
1950                 rss_conf->rss_hf = ETH_RSS_NONFRAG_IPV4_TCP;
1951         else if (hash_type == PP2_PPIO_HASH_T_5_TUPLE && !priv->rss_hf_tcp)
1952                 rss_conf->rss_hf = ETH_RSS_NONFRAG_IPV4_UDP;
1953
1954         return 0;
1955 }
1956
1957 /**
1958  * DPDK callback to get rte_flow callbacks.
1959  *
1960  * @param dev
1961  *   Pointer to the device structure.
1962  * @param filer_type
1963  *   Flow filter type.
1964  * @param filter_op
1965  *   Flow filter operation.
1966  * @param arg
1967  *   Pointer to pass the flow ops.
1968  *
1969  * @return
1970  *   0 on success, negative error value otherwise.
1971  */
1972 static int
1973 mrvl_eth_filter_ctrl(struct rte_eth_dev *dev __rte_unused,
1974                      enum rte_filter_type filter_type,
1975                      enum rte_filter_op filter_op, void *arg)
1976 {
1977         switch (filter_type) {
1978         case RTE_ETH_FILTER_GENERIC:
1979                 if (filter_op != RTE_ETH_FILTER_GET)
1980                         return -EINVAL;
1981                 *(const void **)arg = &mrvl_flow_ops;
1982                 return 0;
1983         default:
1984                 MRVL_LOG(WARNING, "Filter type (%d) not supported",
1985                                 filter_type);
1986                 return -EINVAL;
1987         }
1988 }
1989
1990 /**
1991  * DPDK callback to get rte_mtr callbacks.
1992  *
1993  * @param dev
1994  *   Pointer to the device structure.
1995  * @param ops
1996  *   Pointer to pass the mtr ops.
1997  *
1998  * @return
1999  *   Always 0.
2000  */
2001 static int
2002 mrvl_mtr_ops_get(struct rte_eth_dev *dev __rte_unused, void *ops)
2003 {
2004         *(const void **)ops = &mrvl_mtr_ops;
2005
2006         return 0;
2007 }
2008
2009 /**
2010  * DPDK callback to get rte_tm callbacks.
2011  *
2012  * @param dev
2013  *   Pointer to the device structure.
2014  * @param ops
2015  *   Pointer to pass the tm ops.
2016  *
2017  * @return
2018  *   Always 0.
2019  */
2020 static int
2021 mrvl_tm_ops_get(struct rte_eth_dev *dev __rte_unused, void *ops)
2022 {
2023         *(const void **)ops = &mrvl_tm_ops;
2024
2025         return 0;
2026 }
2027
2028 static const struct eth_dev_ops mrvl_ops = {
2029         .dev_configure = mrvl_dev_configure,
2030         .dev_start = mrvl_dev_start,
2031         .dev_stop = mrvl_dev_stop,
2032         .dev_set_link_up = mrvl_dev_set_link_up,
2033         .dev_set_link_down = mrvl_dev_set_link_down,
2034         .dev_close = mrvl_dev_close,
2035         .link_update = mrvl_link_update,
2036         .promiscuous_enable = mrvl_promiscuous_enable,
2037         .allmulticast_enable = mrvl_allmulticast_enable,
2038         .promiscuous_disable = mrvl_promiscuous_disable,
2039         .allmulticast_disable = mrvl_allmulticast_disable,
2040         .mac_addr_remove = mrvl_mac_addr_remove,
2041         .mac_addr_add = mrvl_mac_addr_add,
2042         .mac_addr_set = mrvl_mac_addr_set,
2043         .mtu_set = mrvl_mtu_set,
2044         .stats_get = mrvl_stats_get,
2045         .stats_reset = mrvl_stats_reset,
2046         .xstats_get = mrvl_xstats_get,
2047         .xstats_reset = mrvl_xstats_reset,
2048         .xstats_get_names = mrvl_xstats_get_names,
2049         .dev_infos_get = mrvl_dev_infos_get,
2050         .dev_supported_ptypes_get = mrvl_dev_supported_ptypes_get,
2051         .rxq_info_get = mrvl_rxq_info_get,
2052         .txq_info_get = mrvl_txq_info_get,
2053         .vlan_filter_set = mrvl_vlan_filter_set,
2054         .tx_queue_start = mrvl_tx_queue_start,
2055         .tx_queue_stop = mrvl_tx_queue_stop,
2056         .rx_queue_setup = mrvl_rx_queue_setup,
2057         .rx_queue_release = mrvl_rx_queue_release,
2058         .tx_queue_setup = mrvl_tx_queue_setup,
2059         .tx_queue_release = mrvl_tx_queue_release,
2060         .flow_ctrl_get = mrvl_flow_ctrl_get,
2061         .flow_ctrl_set = mrvl_flow_ctrl_set,
2062         .rss_hash_update = mrvl_rss_hash_update,
2063         .rss_hash_conf_get = mrvl_rss_hash_conf_get,
2064         .filter_ctrl = mrvl_eth_filter_ctrl,
2065         .mtr_ops_get = mrvl_mtr_ops_get,
2066         .tm_ops_get = mrvl_tm_ops_get,
2067 };
2068
2069 /**
2070  * Return packet type information and l3/l4 offsets.
2071  *
2072  * @param desc
2073  *   Pointer to the received packet descriptor.
2074  * @param l3_offset
2075  *   l3 packet offset.
2076  * @param l4_offset
2077  *   l4 packet offset.
2078  *
2079  * @return
2080  *   Packet type information.
2081  */
2082 static inline uint64_t
2083 mrvl_desc_to_packet_type_and_offset(struct pp2_ppio_desc *desc,
2084                                     uint8_t *l3_offset, uint8_t *l4_offset)
2085 {
2086         enum pp2_inq_l3_type l3_type;
2087         enum pp2_inq_l4_type l4_type;
2088         enum pp2_inq_vlan_tag vlan_tag;
2089         uint64_t packet_type;
2090
2091         pp2_ppio_inq_desc_get_l3_info(desc, &l3_type, l3_offset);
2092         pp2_ppio_inq_desc_get_l4_info(desc, &l4_type, l4_offset);
2093         pp2_ppio_inq_desc_get_vlan_tag(desc, &vlan_tag);
2094
2095         packet_type = RTE_PTYPE_L2_ETHER;
2096
2097         switch (vlan_tag) {
2098         case PP2_INQ_VLAN_TAG_SINGLE:
2099                 packet_type |= RTE_PTYPE_L2_ETHER_VLAN;
2100                 break;
2101         case PP2_INQ_VLAN_TAG_DOUBLE:
2102         case PP2_INQ_VLAN_TAG_TRIPLE:
2103                 packet_type |= RTE_PTYPE_L2_ETHER_QINQ;
2104                 break;
2105         default:
2106                 break;
2107         }
2108
2109         switch (l3_type) {
2110         case PP2_INQ_L3_TYPE_IPV4_NO_OPTS:
2111                 packet_type |= RTE_PTYPE_L3_IPV4;
2112                 break;
2113         case PP2_INQ_L3_TYPE_IPV4_OK:
2114                 packet_type |= RTE_PTYPE_L3_IPV4_EXT;
2115                 break;
2116         case PP2_INQ_L3_TYPE_IPV4_TTL_ZERO:
2117                 packet_type |= RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
2118                 break;
2119         case PP2_INQ_L3_TYPE_IPV6_NO_EXT:
2120                 packet_type |= RTE_PTYPE_L3_IPV6;
2121                 break;
2122         case PP2_INQ_L3_TYPE_IPV6_EXT:
2123                 packet_type |= RTE_PTYPE_L3_IPV6_EXT;
2124                 break;
2125         case PP2_INQ_L3_TYPE_ARP:
2126                 packet_type |= RTE_PTYPE_L2_ETHER_ARP;
2127                 /*
2128                  * In case of ARP l4_offset is set to wrong value.
2129                  * Set it to proper one so that later on mbuf->l3_len can be
2130                  * calculated subtracting l4_offset and l3_offset.
2131                  */
2132                 *l4_offset = *l3_offset + MRVL_ARP_LENGTH;
2133                 break;
2134         default:
2135                 MRVL_LOG(DEBUG, "Failed to recognise l3 packet type");
2136                 break;
2137         }
2138
2139         switch (l4_type) {
2140         case PP2_INQ_L4_TYPE_TCP:
2141                 packet_type |= RTE_PTYPE_L4_TCP;
2142                 break;
2143         case PP2_INQ_L4_TYPE_UDP:
2144                 packet_type |= RTE_PTYPE_L4_UDP;
2145                 break;
2146         default:
2147                 MRVL_LOG(DEBUG, "Failed to recognise l4 packet type");
2148                 break;
2149         }
2150
2151         return packet_type;
2152 }
2153
2154 /**
2155  * Get offload information from the received packet descriptor.
2156  *
2157  * @param desc
2158  *   Pointer to the received packet descriptor.
2159  *
2160  * @return
2161  *   Mbuf offload flags.
2162  */
2163 static inline uint64_t
2164 mrvl_desc_to_ol_flags(struct pp2_ppio_desc *desc)
2165 {
2166         uint64_t flags;
2167         enum pp2_inq_desc_status status;
2168
2169         status = pp2_ppio_inq_desc_get_l3_pkt_error(desc);
2170         if (unlikely(status != PP2_DESC_ERR_OK))
2171                 flags = PKT_RX_IP_CKSUM_BAD;
2172         else
2173                 flags = PKT_RX_IP_CKSUM_GOOD;
2174
2175         status = pp2_ppio_inq_desc_get_l4_pkt_error(desc);
2176         if (unlikely(status != PP2_DESC_ERR_OK))
2177                 flags |= PKT_RX_L4_CKSUM_BAD;
2178         else
2179                 flags |= PKT_RX_L4_CKSUM_GOOD;
2180
2181         return flags;
2182 }
2183
2184 /**
2185  * DPDK callback for receive.
2186  *
2187  * @param rxq
2188  *   Generic pointer to the receive queue.
2189  * @param rx_pkts
2190  *   Array to store received packets.
2191  * @param nb_pkts
2192  *   Maximum number of packets in array.
2193  *
2194  * @return
2195  *   Number of packets successfully received.
2196  */
2197 static uint16_t
2198 mrvl_rx_pkt_burst(void *rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
2199 {
2200         struct mrvl_rxq *q = rxq;
2201         struct pp2_ppio_desc descs[nb_pkts];
2202         struct pp2_bpool *bpool;
2203         int i, ret, rx_done = 0;
2204         int num;
2205         struct pp2_hif *hif;
2206         unsigned int core_id = rte_lcore_id();
2207
2208         hif = mrvl_get_hif(q->priv, core_id);
2209
2210         if (unlikely(!q->priv->ppio || !hif))
2211                 return 0;
2212
2213         bpool = q->priv->bpool;
2214
2215         ret = pp2_ppio_recv(q->priv->ppio, q->priv->rxq_map[q->queue_id].tc,
2216                             q->priv->rxq_map[q->queue_id].inq, descs, &nb_pkts);
2217         if (unlikely(ret < 0)) {
2218                 MRVL_LOG(ERR, "Failed to receive packets");
2219                 return 0;
2220         }
2221         mrvl_port_bpool_size[bpool->pp2_id][bpool->id][core_id] -= nb_pkts;
2222
2223         for (i = 0; i < nb_pkts; i++) {
2224                 struct rte_mbuf *mbuf;
2225                 uint8_t l3_offset, l4_offset;
2226                 enum pp2_inq_desc_status status;
2227                 uint64_t addr;
2228
2229                 if (likely(nb_pkts - i > MRVL_MUSDK_PREFETCH_SHIFT)) {
2230                         struct pp2_ppio_desc *pref_desc;
2231                         u64 pref_addr;
2232
2233                         pref_desc = &descs[i + MRVL_MUSDK_PREFETCH_SHIFT];
2234                         pref_addr = cookie_addr_high |
2235                                     pp2_ppio_inq_desc_get_cookie(pref_desc);
2236                         rte_mbuf_prefetch_part1((struct rte_mbuf *)(pref_addr));
2237                         rte_mbuf_prefetch_part2((struct rte_mbuf *)(pref_addr));
2238                 }
2239
2240                 addr = cookie_addr_high |
2241                        pp2_ppio_inq_desc_get_cookie(&descs[i]);
2242                 mbuf = (struct rte_mbuf *)addr;
2243                 rte_pktmbuf_reset(mbuf);
2244
2245                 /* drop packet in case of mac, overrun or resource error */
2246                 status = pp2_ppio_inq_desc_get_l2_pkt_error(&descs[i]);
2247                 if (unlikely(status != PP2_DESC_ERR_OK)) {
2248                         struct pp2_buff_inf binf = {
2249                                 .addr = rte_mbuf_data_iova_default(mbuf),
2250                                 .cookie = (uint64_t)mbuf,
2251                         };
2252
2253                         pp2_bpool_put_buff(hif, bpool, &binf);
2254                         mrvl_port_bpool_size
2255                                 [bpool->pp2_id][bpool->id][core_id]++;
2256                         q->drop_mac++;
2257                         continue;
2258                 }
2259
2260                 mbuf->data_off += MRVL_PKT_EFFEC_OFFS;
2261                 mbuf->pkt_len = pp2_ppio_inq_desc_get_pkt_len(&descs[i]);
2262                 mbuf->data_len = mbuf->pkt_len;
2263                 mbuf->port = q->port_id;
2264                 mbuf->packet_type =
2265                         mrvl_desc_to_packet_type_and_offset(&descs[i],
2266                                                             &l3_offset,
2267                                                             &l4_offset);
2268                 mbuf->l2_len = l3_offset;
2269                 mbuf->l3_len = l4_offset - l3_offset;
2270
2271                 if (likely(q->cksum_enabled))
2272                         mbuf->ol_flags = mrvl_desc_to_ol_flags(&descs[i]);
2273
2274                 rx_pkts[rx_done++] = mbuf;
2275                 q->bytes_recv += mbuf->pkt_len;
2276         }
2277
2278         if (rte_spinlock_trylock(&q->priv->lock) == 1) {
2279                 num = mrvl_get_bpool_size(bpool->pp2_id, bpool->id);
2280
2281                 if (unlikely(num <= q->priv->bpool_min_size ||
2282                              (!rx_done && num < q->priv->bpool_init_size))) {
2283                         ret = mrvl_fill_bpool(q, MRVL_BURST_SIZE);
2284                         if (ret)
2285                                 MRVL_LOG(ERR, "Failed to fill bpool");
2286                 } else if (unlikely(num > q->priv->bpool_max_size)) {
2287                         int i;
2288                         int pkt_to_remove = num - q->priv->bpool_init_size;
2289                         struct rte_mbuf *mbuf;
2290                         struct pp2_buff_inf buff;
2291
2292                         MRVL_LOG(DEBUG,
2293                                 "port-%d:%d: bpool %d oversize - remove %d buffers (pool size: %d -> %d)",
2294                                 bpool->pp2_id, q->priv->ppio->port_id,
2295                                 bpool->id, pkt_to_remove, num,
2296                                 q->priv->bpool_init_size);
2297
2298                         for (i = 0; i < pkt_to_remove; i++) {
2299                                 ret = pp2_bpool_get_buff(hif, bpool, &buff);
2300                                 if (ret)
2301                                         break;
2302                                 mbuf = (struct rte_mbuf *)
2303                                         (cookie_addr_high | buff.cookie);
2304                                 rte_pktmbuf_free(mbuf);
2305                         }
2306                         mrvl_port_bpool_size
2307                                 [bpool->pp2_id][bpool->id][core_id] -= i;
2308                 }
2309                 rte_spinlock_unlock(&q->priv->lock);
2310         }
2311
2312         return rx_done;
2313 }
2314
2315 /**
2316  * Prepare offload information.
2317  *
2318  * @param ol_flags
2319  *   Offload flags.
2320  * @param packet_type
2321  *   Packet type bitfield.
2322  * @param l3_type
2323  *   Pointer to the pp2_ouq_l3_type structure.
2324  * @param l4_type
2325  *   Pointer to the pp2_outq_l4_type structure.
2326  * @param gen_l3_cksum
2327  *   Will be set to 1 in case l3 checksum is computed.
2328  * @param l4_cksum
2329  *   Will be set to 1 in case l4 checksum is computed.
2330  *
2331  * @return
2332  *   0 on success, negative error value otherwise.
2333  */
2334 static inline int
2335 mrvl_prepare_proto_info(uint64_t ol_flags, uint32_t packet_type,
2336                         enum pp2_outq_l3_type *l3_type,
2337                         enum pp2_outq_l4_type *l4_type,
2338                         int *gen_l3_cksum,
2339                         int *gen_l4_cksum)
2340 {
2341         /*
2342          * Based on ol_flags prepare information
2343          * for pp2_ppio_outq_desc_set_proto_info() which setups descriptor
2344          * for offloading.
2345          */
2346         if (ol_flags & PKT_TX_IPV4) {
2347                 *l3_type = PP2_OUTQ_L3_TYPE_IPV4;
2348                 *gen_l3_cksum = ol_flags & PKT_TX_IP_CKSUM ? 1 : 0;
2349         } else if (ol_flags & PKT_TX_IPV6) {
2350                 *l3_type = PP2_OUTQ_L3_TYPE_IPV6;
2351                 /* no checksum for ipv6 header */
2352                 *gen_l3_cksum = 0;
2353         } else {
2354                 /* if something different then stop processing */
2355                 return -1;
2356         }
2357
2358         ol_flags &= PKT_TX_L4_MASK;
2359         if ((packet_type & RTE_PTYPE_L4_TCP) &&
2360             ol_flags == PKT_TX_TCP_CKSUM) {
2361                 *l4_type = PP2_OUTQ_L4_TYPE_TCP;
2362                 *gen_l4_cksum = 1;
2363         } else if ((packet_type & RTE_PTYPE_L4_UDP) &&
2364                    ol_flags == PKT_TX_UDP_CKSUM) {
2365                 *l4_type = PP2_OUTQ_L4_TYPE_UDP;
2366                 *gen_l4_cksum = 1;
2367         } else {
2368                 *l4_type = PP2_OUTQ_L4_TYPE_OTHER;
2369                 /* no checksum for other type */
2370                 *gen_l4_cksum = 0;
2371         }
2372
2373         return 0;
2374 }
2375
2376 /**
2377  * Release already sent buffers to bpool (buffer-pool).
2378  *
2379  * @param ppio
2380  *   Pointer to the port structure.
2381  * @param hif
2382  *   Pointer to the MUSDK hardware interface.
2383  * @param sq
2384  *   Pointer to the shadow queue.
2385  * @param qid
2386  *   Queue id number.
2387  * @param force
2388  *   Force releasing packets.
2389  */
2390 static inline void
2391 mrvl_free_sent_buffers(struct pp2_ppio *ppio, struct pp2_hif *hif,
2392                        unsigned int core_id, struct mrvl_shadow_txq *sq,
2393                        int qid, int force)
2394 {
2395         struct buff_release_entry *entry;
2396         uint16_t nb_done = 0, num = 0, skip_bufs = 0;
2397         int i;
2398
2399         pp2_ppio_get_num_outq_done(ppio, hif, qid, &nb_done);
2400
2401         sq->num_to_release += nb_done;
2402
2403         if (likely(!force &&
2404                    sq->num_to_release < MRVL_PP2_BUF_RELEASE_BURST_SIZE))
2405                 return;
2406
2407         nb_done = sq->num_to_release;
2408         sq->num_to_release = 0;
2409
2410         for (i = 0; i < nb_done; i++) {
2411                 entry = &sq->ent[sq->tail + num];
2412                 if (unlikely(!entry->buff.addr)) {
2413                         MRVL_LOG(ERR,
2414                                 "Shadow memory @%d: cookie(%lx), pa(%lx)!",
2415                                 sq->tail, (u64)entry->buff.cookie,
2416                                 (u64)entry->buff.addr);
2417                         skip_bufs = 1;
2418                         goto skip;
2419                 }
2420
2421                 if (unlikely(!entry->bpool)) {
2422                         struct rte_mbuf *mbuf;
2423
2424                         mbuf = (struct rte_mbuf *)
2425                                (cookie_addr_high | entry->buff.cookie);
2426                         rte_pktmbuf_free(mbuf);
2427                         skip_bufs = 1;
2428                         goto skip;
2429                 }
2430
2431                 mrvl_port_bpool_size
2432                         [entry->bpool->pp2_id][entry->bpool->id][core_id]++;
2433                 num++;
2434                 if (unlikely(sq->tail + num == MRVL_PP2_TX_SHADOWQ_SIZE))
2435                         goto skip;
2436                 continue;
2437 skip:
2438                 if (likely(num))
2439                         pp2_bpool_put_buffs(hif, &sq->ent[sq->tail], &num);
2440                 num += skip_bufs;
2441                 sq->tail = (sq->tail + num) & MRVL_PP2_TX_SHADOWQ_MASK;
2442                 sq->size -= num;
2443                 num = 0;
2444                 skip_bufs = 0;
2445         }
2446
2447         if (likely(num)) {
2448                 pp2_bpool_put_buffs(hif, &sq->ent[sq->tail], &num);
2449                 sq->tail = (sq->tail + num) & MRVL_PP2_TX_SHADOWQ_MASK;
2450                 sq->size -= num;
2451         }
2452 }
2453
2454 /**
2455  * DPDK callback for transmit.
2456  *
2457  * @param txq
2458  *   Generic pointer transmit queue.
2459  * @param tx_pkts
2460  *   Packets to transmit.
2461  * @param nb_pkts
2462  *   Number of packets in array.
2463  *
2464  * @return
2465  *   Number of packets successfully transmitted.
2466  */
2467 static uint16_t
2468 mrvl_tx_pkt_burst(void *txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
2469 {
2470         struct mrvl_txq *q = txq;
2471         struct mrvl_shadow_txq *sq;
2472         struct pp2_hif *hif;
2473         struct pp2_ppio_desc descs[nb_pkts];
2474         unsigned int core_id = rte_lcore_id();
2475         int i, ret, bytes_sent = 0;
2476         uint16_t num, sq_free_size;
2477         uint64_t addr;
2478
2479         hif = mrvl_get_hif(q->priv, core_id);
2480         sq = &q->shadow_txqs[core_id];
2481
2482         if (unlikely(!q->priv->ppio || !hif))
2483                 return 0;
2484
2485         if (sq->size)
2486                 mrvl_free_sent_buffers(q->priv->ppio, hif, core_id,
2487                                        sq, q->queue_id, 0);
2488
2489         sq_free_size = MRVL_PP2_TX_SHADOWQ_SIZE - sq->size - 1;
2490         if (unlikely(nb_pkts > sq_free_size)) {
2491                 MRVL_LOG(DEBUG,
2492                         "No room in shadow queue for %d packets! %d packets will be sent.",
2493                         nb_pkts, sq_free_size);
2494                 nb_pkts = sq_free_size;
2495         }
2496
2497         for (i = 0; i < nb_pkts; i++) {
2498                 struct rte_mbuf *mbuf = tx_pkts[i];
2499                 int gen_l3_cksum, gen_l4_cksum;
2500                 enum pp2_outq_l3_type l3_type;
2501                 enum pp2_outq_l4_type l4_type;
2502
2503                 if (likely(nb_pkts - i > MRVL_MUSDK_PREFETCH_SHIFT)) {
2504                         struct rte_mbuf *pref_pkt_hdr;
2505
2506                         pref_pkt_hdr = tx_pkts[i + MRVL_MUSDK_PREFETCH_SHIFT];
2507                         rte_mbuf_prefetch_part1(pref_pkt_hdr);
2508                         rte_mbuf_prefetch_part2(pref_pkt_hdr);
2509                 }
2510
2511                 mrvl_fill_shadowq(sq, mbuf);
2512                 mrvl_fill_desc(&descs[i], mbuf);
2513
2514                 bytes_sent += rte_pktmbuf_pkt_len(mbuf);
2515                 /*
2516                  * in case unsupported ol_flags were passed
2517                  * do not update descriptor offload information
2518                  */
2519                 ret = mrvl_prepare_proto_info(mbuf->ol_flags, mbuf->packet_type,
2520                                               &l3_type, &l4_type, &gen_l3_cksum,
2521                                               &gen_l4_cksum);
2522                 if (unlikely(ret))
2523                         continue;
2524
2525                 pp2_ppio_outq_desc_set_proto_info(&descs[i], l3_type, l4_type,
2526                                                   mbuf->l2_len,
2527                                                   mbuf->l2_len + mbuf->l3_len,
2528                                                   gen_l3_cksum, gen_l4_cksum);
2529         }
2530
2531         num = nb_pkts;
2532         pp2_ppio_send(q->priv->ppio, hif, q->queue_id, descs, &nb_pkts);
2533         /* number of packets that were not sent */
2534         if (unlikely(num > nb_pkts)) {
2535                 for (i = nb_pkts; i < num; i++) {
2536                         sq->head = (MRVL_PP2_TX_SHADOWQ_SIZE + sq->head - 1) &
2537                                 MRVL_PP2_TX_SHADOWQ_MASK;
2538                         addr = cookie_addr_high | sq->ent[sq->head].buff.cookie;
2539                         bytes_sent -=
2540                                 rte_pktmbuf_pkt_len((struct rte_mbuf *)addr);
2541                 }
2542                 sq->size -= num - nb_pkts;
2543         }
2544
2545         q->bytes_sent += bytes_sent;
2546
2547         return nb_pkts;
2548 }
2549
2550 /** DPDK callback for S/G transmit.
2551  *
2552  * @param txq
2553  *   Generic pointer transmit queue.
2554  * @param tx_pkts
2555  *   Packets to transmit.
2556  * @param nb_pkts
2557  *   Number of packets in array.
2558  *
2559  * @return
2560  *   Number of packets successfully transmitted.
2561  */
2562 static uint16_t
2563 mrvl_tx_sg_pkt_burst(void *txq, struct rte_mbuf **tx_pkts,
2564                      uint16_t nb_pkts)
2565 {
2566         struct mrvl_txq *q = txq;
2567         struct mrvl_shadow_txq *sq;
2568         struct pp2_hif *hif;
2569         struct pp2_ppio_desc descs[nb_pkts * PP2_PPIO_DESC_NUM_FRAGS];
2570         struct pp2_ppio_sg_pkts pkts;
2571         uint8_t frags[nb_pkts];
2572         unsigned int core_id = rte_lcore_id();
2573         int i, j, ret, bytes_sent = 0;
2574         int tail, tail_first;
2575         uint16_t num, sq_free_size;
2576         uint16_t nb_segs, total_descs = 0;
2577         uint64_t addr;
2578
2579         hif = mrvl_get_hif(q->priv, core_id);
2580         sq = &q->shadow_txqs[core_id];
2581         pkts.frags = frags;
2582         pkts.num = 0;
2583
2584         if (unlikely(!q->priv->ppio || !hif))
2585                 return 0;
2586
2587         if (sq->size)
2588                 mrvl_free_sent_buffers(q->priv->ppio, hif, core_id,
2589                                        sq, q->queue_id, 0);
2590
2591         /* Save shadow queue free size */
2592         sq_free_size = MRVL_PP2_TX_SHADOWQ_SIZE - sq->size - 1;
2593
2594         tail = 0;
2595         for (i = 0; i < nb_pkts; i++) {
2596                 struct rte_mbuf *mbuf = tx_pkts[i];
2597                 struct rte_mbuf *seg = NULL;
2598                 int gen_l3_cksum, gen_l4_cksum;
2599                 enum pp2_outq_l3_type l3_type;
2600                 enum pp2_outq_l4_type l4_type;
2601
2602                 nb_segs = mbuf->nb_segs;
2603                 tail_first = tail;
2604                 total_descs += nb_segs;
2605
2606                 /*
2607                  * Check if total_descs does not exceed
2608                  * shadow queue free size
2609                  */
2610                 if (unlikely(total_descs > sq_free_size)) {
2611                         total_descs -= nb_segs;
2612                         RTE_LOG(DEBUG, PMD,
2613                                 "No room in shadow queue for %d packets! "
2614                                 "%d packets will be sent.\n",
2615                                 nb_pkts, i);
2616                         break;
2617                 }
2618
2619                 /* Check if nb_segs does not exceed the max nb of desc per
2620                  * fragmented packet
2621                  */
2622                 if (nb_segs > PP2_PPIO_DESC_NUM_FRAGS) {
2623                         total_descs -= nb_segs;
2624                         RTE_LOG(ERR, PMD,
2625                                 "Too many segments. Packet won't be sent.\n");
2626                         break;
2627                 }
2628
2629                 if (likely(nb_pkts - i > MRVL_MUSDK_PREFETCH_SHIFT)) {
2630                         struct rte_mbuf *pref_pkt_hdr;
2631
2632                         pref_pkt_hdr = tx_pkts[i + MRVL_MUSDK_PREFETCH_SHIFT];
2633                         rte_mbuf_prefetch_part1(pref_pkt_hdr);
2634                         rte_mbuf_prefetch_part2(pref_pkt_hdr);
2635                 }
2636
2637                 pkts.frags[pkts.num] = nb_segs;
2638                 pkts.num++;
2639
2640                 seg = mbuf;
2641                 for (j = 0; j < nb_segs - 1; j++) {
2642                         /* For the subsequent segments, set shadow queue
2643                          * buffer to NULL
2644                          */
2645                         mrvl_fill_shadowq(sq, NULL);
2646                         mrvl_fill_desc(&descs[tail], seg);
2647
2648                         tail++;
2649                         seg = seg->next;
2650                 }
2651                 /* Put first mbuf info in last shadow queue entry */
2652                 mrvl_fill_shadowq(sq, mbuf);
2653                 /* Update descriptor with last segment */
2654                 mrvl_fill_desc(&descs[tail++], seg);
2655
2656                 bytes_sent += rte_pktmbuf_pkt_len(mbuf);
2657                 /* In case unsupported ol_flags were passed
2658                  * do not update descriptor offload information
2659                  */
2660                 ret = mrvl_prepare_proto_info(mbuf->ol_flags, mbuf->packet_type,
2661                                               &l3_type, &l4_type, &gen_l3_cksum,
2662                                               &gen_l4_cksum);
2663                 if (unlikely(ret))
2664                         continue;
2665
2666                 pp2_ppio_outq_desc_set_proto_info(&descs[tail_first], l3_type,
2667                                                   l4_type, mbuf->l2_len,
2668                                                   mbuf->l2_len + mbuf->l3_len,
2669                                                   gen_l3_cksum, gen_l4_cksum);
2670         }
2671
2672         num = total_descs;
2673         pp2_ppio_send_sg(q->priv->ppio, hif, q->queue_id, descs,
2674                          &total_descs, &pkts);
2675         /* number of packets that were not sent */
2676         if (unlikely(num > total_descs)) {
2677                 for (i = total_descs; i < num; i++) {
2678                         sq->head = (MRVL_PP2_TX_SHADOWQ_SIZE + sq->head - 1) &
2679                                 MRVL_PP2_TX_SHADOWQ_MASK;
2680
2681                         addr = sq->ent[sq->head].buff.cookie;
2682                         if (addr)
2683                                 bytes_sent -=
2684                                         rte_pktmbuf_pkt_len((struct rte_mbuf *)
2685                                                 (cookie_addr_high | addr));
2686                 }
2687                 sq->size -= num - total_descs;
2688                 nb_pkts = pkts.num;
2689         }
2690
2691         q->bytes_sent += bytes_sent;
2692
2693         return nb_pkts;
2694 }
2695
2696 /**
2697  * Initialize packet processor.
2698  *
2699  * @return
2700  *   0 on success, negative error value otherwise.
2701  */
2702 static int
2703 mrvl_init_pp2(void)
2704 {
2705         struct pp2_init_params init_params;
2706
2707         memset(&init_params, 0, sizeof(init_params));
2708         init_params.hif_reserved_map = MRVL_MUSDK_HIFS_RESERVED;
2709         init_params.bm_pool_reserved_map = MRVL_MUSDK_BPOOLS_RESERVED;
2710         init_params.rss_tbl_reserved_map = MRVL_MUSDK_RSS_RESERVED;
2711
2712         return pp2_init(&init_params);
2713 }
2714
2715 /**
2716  * Deinitialize packet processor.
2717  *
2718  * @return
2719  *   0 on success, negative error value otherwise.
2720  */
2721 static void
2722 mrvl_deinit_pp2(void)
2723 {
2724         pp2_deinit();
2725 }
2726
2727 /**
2728  * Create private device structure.
2729  *
2730  * @param dev_name
2731  *   Pointer to the port name passed in the initialization parameters.
2732  *
2733  * @return
2734  *   Pointer to the newly allocated private device structure.
2735  */
2736 static struct mrvl_priv *
2737 mrvl_priv_create(const char *dev_name)
2738 {
2739         struct pp2_bpool_params bpool_params;
2740         char match[MRVL_MATCH_LEN];
2741         struct mrvl_priv *priv;
2742         int ret, bpool_bit;
2743
2744         priv = rte_zmalloc_socket(dev_name, sizeof(*priv), 0, rte_socket_id());
2745         if (!priv)
2746                 return NULL;
2747
2748         ret = pp2_netdev_get_ppio_info((char *)(uintptr_t)dev_name,
2749                                        &priv->pp_id, &priv->ppio_id);
2750         if (ret)
2751                 goto out_free_priv;
2752
2753         bpool_bit = mrvl_reserve_bit(&used_bpools[priv->pp_id],
2754                                      PP2_BPOOL_NUM_POOLS);
2755         if (bpool_bit < 0)
2756                 goto out_free_priv;
2757         priv->bpool_bit = bpool_bit;
2758
2759         snprintf(match, sizeof(match), "pool-%d:%d", priv->pp_id,
2760                  priv->bpool_bit);
2761         memset(&bpool_params, 0, sizeof(bpool_params));
2762         bpool_params.match = match;
2763         bpool_params.buff_len = MRVL_PKT_SIZE_MAX + MRVL_PKT_EFFEC_OFFS;
2764         ret = pp2_bpool_init(&bpool_params, &priv->bpool);
2765         if (ret)
2766                 goto out_clear_bpool_bit;
2767
2768         priv->ppio_params.type = PP2_PPIO_T_NIC;
2769         rte_spinlock_init(&priv->lock);
2770
2771         return priv;
2772 out_clear_bpool_bit:
2773         used_bpools[priv->pp_id] &= ~(1 << priv->bpool_bit);
2774 out_free_priv:
2775         rte_free(priv);
2776         return NULL;
2777 }
2778
2779 /**
2780  * Create device representing Ethernet port.
2781  *
2782  * @param name
2783  *   Pointer to the port's name.
2784  *
2785  * @return
2786  *   0 on success, negative error value otherwise.
2787  */
2788 static int
2789 mrvl_eth_dev_create(struct rte_vdev_device *vdev, const char *name)
2790 {
2791         int ret, fd = socket(AF_INET, SOCK_DGRAM, 0);
2792         struct rte_eth_dev *eth_dev;
2793         struct mrvl_priv *priv;
2794         struct ifreq req;
2795
2796         eth_dev = rte_eth_dev_allocate(name);
2797         if (!eth_dev)
2798                 return -ENOMEM;
2799
2800         priv = mrvl_priv_create(name);
2801         if (!priv) {
2802                 ret = -ENOMEM;
2803                 goto out_free;
2804         }
2805         eth_dev->data->dev_private = priv;
2806
2807         eth_dev->data->mac_addrs =
2808                 rte_zmalloc("mac_addrs",
2809                             RTE_ETHER_ADDR_LEN * MRVL_MAC_ADDRS_MAX, 0);
2810         if (!eth_dev->data->mac_addrs) {
2811                 MRVL_LOG(ERR, "Failed to allocate space for eth addrs");
2812                 ret = -ENOMEM;
2813                 goto out_free;
2814         }
2815
2816         memset(&req, 0, sizeof(req));
2817         strcpy(req.ifr_name, name);
2818         ret = ioctl(fd, SIOCGIFHWADDR, &req);
2819         if (ret)
2820                 goto out_free;
2821
2822         memcpy(eth_dev->data->mac_addrs[0].addr_bytes,
2823                req.ifr_addr.sa_data, RTE_ETHER_ADDR_LEN);
2824
2825         eth_dev->data->kdrv = RTE_KDRV_NONE;
2826         eth_dev->device = &vdev->device;
2827         eth_dev->rx_pkt_burst = mrvl_rx_pkt_burst;
2828         mrvl_set_tx_function(eth_dev);
2829         eth_dev->dev_ops = &mrvl_ops;
2830
2831         /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
2832         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
2833
2834         rte_eth_dev_probing_finish(eth_dev);
2835         return 0;
2836 out_free:
2837         rte_eth_dev_release_port(eth_dev);
2838
2839         return ret;
2840 }
2841
2842 /**
2843  * Callback used by rte_kvargs_process() during argument parsing.
2844  *
2845  * @param key
2846  *   Pointer to the parsed key (unused).
2847  * @param value
2848  *   Pointer to the parsed value.
2849  * @param extra_args
2850  *   Pointer to the extra arguments which contains address of the
2851  *   table of pointers to parsed interface names.
2852  *
2853  * @return
2854  *   Always 0.
2855  */
2856 static int
2857 mrvl_get_ifnames(const char *key __rte_unused, const char *value,
2858                  void *extra_args)
2859 {
2860         struct mrvl_ifnames *ifnames = extra_args;
2861
2862         ifnames->names[ifnames->idx++] = value;
2863
2864         return 0;
2865 }
2866
2867 /**
2868  * Deinitialize per-lcore MUSDK hardware interfaces (hifs).
2869  */
2870 static void
2871 mrvl_deinit_hifs(void)
2872 {
2873         int i;
2874
2875         for (i = mrvl_lcore_first; i <= mrvl_lcore_last; i++) {
2876                 if (hifs[i])
2877                         pp2_hif_deinit(hifs[i]);
2878         }
2879         used_hifs = MRVL_MUSDK_HIFS_RESERVED;
2880         memset(hifs, 0, sizeof(hifs));
2881 }
2882
2883 /**
2884  * DPDK callback to register the virtual device.
2885  *
2886  * @param vdev
2887  *   Pointer to the virtual device.
2888  *
2889  * @return
2890  *   0 on success, negative error value otherwise.
2891  */
2892 static int
2893 rte_pmd_mrvl_probe(struct rte_vdev_device *vdev)
2894 {
2895         struct rte_kvargs *kvlist;
2896         struct mrvl_ifnames ifnames;
2897         int ret = -EINVAL;
2898         uint32_t i, ifnum, cfgnum;
2899         const char *params;
2900
2901         params = rte_vdev_device_args(vdev);
2902         if (!params)
2903                 return -EINVAL;
2904
2905         kvlist = rte_kvargs_parse(params, valid_args);
2906         if (!kvlist)
2907                 return -EINVAL;
2908
2909         ifnum = rte_kvargs_count(kvlist, MRVL_IFACE_NAME_ARG);
2910         if (ifnum > RTE_DIM(ifnames.names))
2911                 goto out_free_kvlist;
2912
2913         ifnames.idx = 0;
2914         rte_kvargs_process(kvlist, MRVL_IFACE_NAME_ARG,
2915                            mrvl_get_ifnames, &ifnames);
2916
2917
2918         /*
2919          * The below system initialization should be done only once,
2920          * on the first provided configuration file
2921          */
2922         if (!mrvl_qos_cfg) {
2923                 cfgnum = rte_kvargs_count(kvlist, MRVL_CFG_ARG);
2924                 MRVL_LOG(INFO, "Parsing config file!");
2925                 if (cfgnum > 1) {
2926                         MRVL_LOG(ERR, "Cannot handle more than one config file!");
2927                         goto out_free_kvlist;
2928                 } else if (cfgnum == 1) {
2929                         rte_kvargs_process(kvlist, MRVL_CFG_ARG,
2930                                            mrvl_get_qoscfg, &mrvl_qos_cfg);
2931                 }
2932         }
2933
2934         if (mrvl_dev_num)
2935                 goto init_devices;
2936
2937         MRVL_LOG(INFO, "Perform MUSDK initializations");
2938
2939         ret = rte_mvep_init(MVEP_MOD_T_PP2, kvlist);
2940         if (ret)
2941                 goto out_free_kvlist;
2942
2943         ret = mrvl_init_pp2();
2944         if (ret) {
2945                 MRVL_LOG(ERR, "Failed to init PP!");
2946                 rte_mvep_deinit(MVEP_MOD_T_PP2);
2947                 goto out_free_kvlist;
2948         }
2949
2950         memset(mrvl_port_bpool_size, 0, sizeof(mrvl_port_bpool_size));
2951         memset(mrvl_port_to_bpool_lookup, 0, sizeof(mrvl_port_to_bpool_lookup));
2952
2953         mrvl_lcore_first = RTE_MAX_LCORE;
2954         mrvl_lcore_last = 0;
2955
2956 init_devices:
2957         for (i = 0; i < ifnum; i++) {
2958                 MRVL_LOG(INFO, "Creating %s", ifnames.names[i]);
2959                 ret = mrvl_eth_dev_create(vdev, ifnames.names[i]);
2960                 if (ret)
2961                         goto out_cleanup;
2962                 mrvl_dev_num++;
2963         }
2964
2965         rte_kvargs_free(kvlist);
2966
2967         return 0;
2968 out_cleanup:
2969         rte_pmd_mrvl_remove(vdev);
2970
2971 out_free_kvlist:
2972         rte_kvargs_free(kvlist);
2973
2974         return ret;
2975 }
2976
2977 /**
2978  * DPDK callback to remove virtual device.
2979  *
2980  * @param vdev
2981  *   Pointer to the removed virtual device.
2982  *
2983  * @return
2984  *   0 on success, negative error value otherwise.
2985  */
2986 static int
2987 rte_pmd_mrvl_remove(struct rte_vdev_device *vdev)
2988 {
2989         uint16_t port_id;
2990
2991         RTE_ETH_FOREACH_DEV(port_id) {
2992                 if (rte_eth_devices[port_id].device != &vdev->device)
2993                         continue;
2994                 rte_eth_dev_close(port_id);
2995         }
2996
2997         return 0;
2998 }
2999
3000 static struct rte_vdev_driver pmd_mrvl_drv = {
3001         .probe = rte_pmd_mrvl_probe,
3002         .remove = rte_pmd_mrvl_remove,
3003 };
3004
3005 RTE_PMD_REGISTER_VDEV(net_mvpp2, pmd_mrvl_drv);
3006 RTE_PMD_REGISTER_ALIAS(net_mvpp2, eth_mvpp2);
3007
3008 RTE_INIT(mrvl_init_log)
3009 {
3010         mrvl_logtype = rte_log_register("pmd.net.mvpp2");
3011         if (mrvl_logtype >= 0)
3012                 rte_log_set_level(mrvl_logtype, RTE_LOG_NOTICE);
3013 }