1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2017 Cavium, Inc
12 #include <rte_alarm.h>
13 #include <rte_branch_prediction.h>
14 #include <rte_debug.h>
15 #include <rte_devargs.h>
17 #include <rte_kvargs.h>
18 #include <rte_malloc.h>
19 #include <rte_prefetch.h>
20 #include <rte_bus_vdev.h>
22 #include "octeontx_ethdev.h"
23 #include "octeontx_rxtx.h"
24 #include "octeontx_logs.h"
26 struct octeontx_vdev_init_params {
31 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX];
33 enum octeontx_link_speed {
34 OCTEONTX_LINK_SPEED_SGMII,
35 OCTEONTX_LINK_SPEED_XAUI,
36 OCTEONTX_LINK_SPEED_RXAUI,
37 OCTEONTX_LINK_SPEED_10G_R,
38 OCTEONTX_LINK_SPEED_40G_R,
39 OCTEONTX_LINK_SPEED_RESERVE1,
40 OCTEONTX_LINK_SPEED_QSGMII,
41 OCTEONTX_LINK_SPEED_RESERVE2
44 int otx_net_logtype_mbox;
45 int otx_net_logtype_init;
46 int otx_net_logtype_driver;
48 RTE_INIT(otx_net_init_log);
50 otx_net_init_log(void)
52 otx_net_logtype_mbox = rte_log_register("pmd.otx.ethdev.mbox");
53 if (otx_net_logtype_mbox >= 0)
54 rte_log_set_level(otx_net_logtype_mbox, RTE_LOG_NOTICE);
56 otx_net_logtype_init = rte_log_register("pmd.otx.ethdev.init");
57 if (otx_net_logtype_init >= 0)
58 rte_log_set_level(otx_net_logtype_init, RTE_LOG_NOTICE);
60 otx_net_logtype_driver = rte_log_register("pmd.otx.ethdev.driver");
61 if (otx_net_logtype_driver >= 0)
62 rte_log_set_level(otx_net_logtype_driver, RTE_LOG_NOTICE);
65 /* Parse integer from integer argument */
67 parse_integer_arg(const char *key __rte_unused,
68 const char *value, void *extra_args)
70 int *i = (int *)extra_args;
74 octeontx_log_err("argument has to be positive.");
82 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params,
83 struct rte_vdev_device *dev)
85 struct rte_kvargs *kvlist = NULL;
88 static const char * const octeontx_vdev_valid_params[] = {
89 OCTEONTX_VDEV_NR_PORT_ARG,
93 const char *input_args = rte_vdev_device_args(dev);
99 kvlist = rte_kvargs_parse(input_args,
100 octeontx_vdev_valid_params);
104 ret = rte_kvargs_process(kvlist,
105 OCTEONTX_VDEV_NR_PORT_ARG,
113 rte_kvargs_free(kvlist);
118 octeontx_port_open(struct octeontx_nic *nic)
120 octeontx_mbox_bgx_port_conf_t bgx_port_conf;
125 PMD_INIT_FUNC_TRACE();
127 res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf);
129 octeontx_log_err("failed to open port %d", res);
133 nic->node = bgx_port_conf.node;
134 nic->port_ena = bgx_port_conf.enable;
135 nic->base_ichan = bgx_port_conf.base_chan;
136 nic->base_ochan = bgx_port_conf.base_chan;
137 nic->num_ichans = bgx_port_conf.num_chans;
138 nic->num_ochans = bgx_port_conf.num_chans;
139 nic->mtu = bgx_port_conf.mtu;
140 nic->bpen = bgx_port_conf.bpen;
141 nic->fcs_strip = bgx_port_conf.fcs_strip;
142 nic->bcast_mode = bgx_port_conf.bcast_mode;
143 nic->mcast_mode = bgx_port_conf.mcast_mode;
144 nic->speed = bgx_port_conf.mode;
146 memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0], ETHER_ADDR_LEN);
148 octeontx_log_dbg("port opened %d", nic->port_id);
153 octeontx_port_close(struct octeontx_nic *nic)
155 PMD_INIT_FUNC_TRACE();
157 octeontx_bgx_port_close(nic->port_id);
158 octeontx_log_dbg("port closed %d", nic->port_id);
162 octeontx_port_start(struct octeontx_nic *nic)
164 PMD_INIT_FUNC_TRACE();
166 return octeontx_bgx_port_start(nic->port_id);
170 octeontx_port_stop(struct octeontx_nic *nic)
172 PMD_INIT_FUNC_TRACE();
174 return octeontx_bgx_port_stop(nic->port_id);
178 octeontx_port_promisc_set(struct octeontx_nic *nic, int en)
180 struct rte_eth_dev *dev;
184 PMD_INIT_FUNC_TRACE();
187 res = octeontx_bgx_port_promisc_set(nic->port_id, en);
189 octeontx_log_err("failed to set promiscuous mode %d",
192 /* Set proper flag for the mode */
193 dev->data->promiscuous = (en != 0) ? 1 : 0;
195 octeontx_log_dbg("port %d : promiscuous mode %s",
196 nic->port_id, en ? "set" : "unset");
200 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats)
202 octeontx_mbox_bgx_port_stats_t bgx_stats;
205 PMD_INIT_FUNC_TRACE();
207 res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats);
209 octeontx_log_err("failed to get port stats %d", nic->port_id);
213 stats->ipackets = bgx_stats.rx_packets;
214 stats->ibytes = bgx_stats.rx_bytes;
215 stats->imissed = bgx_stats.rx_dropped;
216 stats->ierrors = bgx_stats.rx_errors;
217 stats->opackets = bgx_stats.tx_packets;
218 stats->obytes = bgx_stats.tx_bytes;
219 stats->oerrors = bgx_stats.tx_errors;
221 octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "",
222 nic->port_id, stats->ipackets, stats->opackets);
228 octeontx_port_stats_clr(struct octeontx_nic *nic)
230 PMD_INIT_FUNC_TRACE();
232 octeontx_bgx_port_stats_clr(nic->port_id);
236 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf,
237 struct rte_event_dev_info *info)
239 memset(dev_conf, 0, sizeof(struct rte_event_dev_config));
240 dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns;
242 dev_conf->nb_event_ports = info->max_event_ports;
243 dev_conf->nb_event_queues = info->max_event_queues;
245 dev_conf->nb_event_queue_flows = info->max_event_queue_flows;
246 dev_conf->nb_event_port_dequeue_depth =
247 info->max_event_port_dequeue_depth;
248 dev_conf->nb_event_port_enqueue_depth =
249 info->max_event_port_enqueue_depth;
250 dev_conf->nb_event_port_enqueue_depth =
251 info->max_event_port_enqueue_depth;
252 dev_conf->nb_events_limit =
253 info->max_num_events;
257 octeontx_dev_configure(struct rte_eth_dev *dev)
259 struct rte_eth_dev_data *data = dev->data;
260 struct rte_eth_conf *conf = &data->dev_conf;
261 struct rte_eth_rxmode *rxmode = &conf->rxmode;
262 struct rte_eth_txmode *txmode = &conf->txmode;
263 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
266 PMD_INIT_FUNC_TRACE();
269 if (!rte_eal_has_hugepages()) {
270 octeontx_log_err("huge page is not configured");
274 if (txmode->mq_mode) {
275 octeontx_log_err("tx mq_mode DCB or VMDq not supported");
279 if (rxmode->mq_mode != ETH_MQ_RX_NONE &&
280 rxmode->mq_mode != ETH_MQ_RX_RSS) {
281 octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode);
285 if (!rxmode->hw_strip_crc) {
286 PMD_INIT_LOG(NOTICE, "can't disable hw crc strip");
287 rxmode->hw_strip_crc = 1;
290 if (rxmode->hw_ip_checksum) {
291 PMD_INIT_LOG(NOTICE, "rxcksum not supported");
292 rxmode->hw_ip_checksum = 0;
295 if (rxmode->split_hdr_size) {
296 octeontx_log_err("rxmode does not support split header");
300 if (rxmode->hw_vlan_filter) {
301 octeontx_log_err("VLAN filter not supported");
305 if (rxmode->hw_vlan_extend) {
306 octeontx_log_err("VLAN extended not supported");
310 if (rxmode->enable_lro) {
311 octeontx_log_err("LRO not supported");
315 if (conf->link_speeds & ETH_LINK_SPEED_FIXED) {
316 octeontx_log_err("setting link speed/duplex not supported");
320 if (conf->dcb_capability_en) {
321 octeontx_log_err("DCB enable not supported");
325 if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) {
326 octeontx_log_err("flow director not supported");
330 nic->num_tx_queues = dev->data->nb_tx_queues;
332 ret = octeontx_pko_channel_open(nic->port_id * PKO_VF_NUM_DQ,
336 octeontx_log_err("failed to open channel %d no-of-txq %d",
337 nic->base_ochan, nic->num_tx_queues);
341 nic->pki.classifier_enable = false;
342 nic->pki.hash_enable = true;
343 nic->pki.initialized = false;
349 octeontx_dev_close(struct rte_eth_dev *dev)
351 struct octeontx_txq *txq = NULL;
352 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
356 PMD_INIT_FUNC_TRACE();
358 rte_event_dev_close(nic->evdev);
360 ret = octeontx_pko_channel_close(nic->base_ochan);
362 octeontx_log_err("failed to close channel %d VF%d %d %d",
363 nic->base_ochan, nic->port_id, nic->num_tx_queues,
366 /* Free txq resources for this port */
367 for (i = 0; i < nic->num_tx_queues; i++) {
368 txq = dev->data->tx_queues[i];
377 octeontx_dev_start(struct rte_eth_dev *dev)
379 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
384 PMD_INIT_FUNC_TRACE();
388 dev->tx_pkt_burst = octeontx_xmit_pkts;
389 ret = octeontx_pko_channel_start(nic->base_ochan);
391 octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d",
392 nic->port_id, nic->num_tx_queues, nic->base_ochan,
400 dev->rx_pkt_burst = octeontx_recv_pkts;
401 ret = octeontx_pki_port_start(nic->port_id);
403 octeontx_log_err("fail to start Rx on port %d", nic->port_id);
404 goto channel_stop_error;
410 ret = octeontx_port_start(nic);
412 octeontx_log_err("failed start port %d", ret);
413 goto pki_port_stop_error;
416 PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d",
417 nic->base_ochan, nic->num_tx_queues, nic->port_id);
419 ret = rte_event_dev_start(nic->evdev);
421 octeontx_log_err("failed to start evdev: ret (%d)", ret);
422 goto pki_port_stop_error;
429 octeontx_pki_port_stop(nic->port_id);
431 octeontx_pko_channel_stop(nic->base_ochan);
437 octeontx_dev_stop(struct rte_eth_dev *dev)
439 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
442 PMD_INIT_FUNC_TRACE();
444 rte_event_dev_stop(nic->evdev);
446 ret = octeontx_port_stop(nic);
448 octeontx_log_err("failed to req stop port %d res=%d",
453 ret = octeontx_pki_port_stop(nic->port_id);
455 octeontx_log_err("failed to stop pki port %d res=%d",
460 ret = octeontx_pko_channel_stop(nic->base_ochan);
462 octeontx_log_err("failed to stop channel %d VF%d %d %d",
463 nic->base_ochan, nic->port_id, nic->num_tx_queues,
468 dev->tx_pkt_burst = NULL;
469 dev->rx_pkt_burst = NULL;
473 octeontx_dev_promisc_enable(struct rte_eth_dev *dev)
475 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
477 PMD_INIT_FUNC_TRACE();
478 octeontx_port_promisc_set(nic, 1);
482 octeontx_dev_promisc_disable(struct rte_eth_dev *dev)
484 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
486 PMD_INIT_FUNC_TRACE();
487 octeontx_port_promisc_set(nic, 0);
491 octeontx_atomic_write_link_status(struct rte_eth_dev *dev,
492 struct rte_eth_link *link)
494 struct rte_eth_link *dst = &dev->data->dev_link;
495 struct rte_eth_link *src = link;
497 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
498 *(uint64_t *)src) == 0)
505 octeontx_port_link_status(struct octeontx_nic *nic)
509 PMD_INIT_FUNC_TRACE();
510 res = octeontx_bgx_port_link_status(nic->port_id);
512 octeontx_log_err("failed to get port %d link status",
517 nic->link_up = (uint8_t)res;
518 octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up);
524 * Return 0 means link status changed, -1 means not changed
527 octeontx_dev_link_update(struct rte_eth_dev *dev,
528 int wait_to_complete __rte_unused)
530 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
531 struct rte_eth_link link;
535 PMD_INIT_FUNC_TRACE();
537 res = octeontx_port_link_status(nic);
539 octeontx_log_err("failed to request link status %d", res);
543 link.link_status = nic->link_up;
545 switch (nic->speed) {
546 case OCTEONTX_LINK_SPEED_SGMII:
547 link.link_speed = ETH_SPEED_NUM_1G;
550 case OCTEONTX_LINK_SPEED_XAUI:
551 link.link_speed = ETH_SPEED_NUM_10G;
554 case OCTEONTX_LINK_SPEED_RXAUI:
555 case OCTEONTX_LINK_SPEED_10G_R:
556 link.link_speed = ETH_SPEED_NUM_10G;
558 case OCTEONTX_LINK_SPEED_QSGMII:
559 link.link_speed = ETH_SPEED_NUM_5G;
561 case OCTEONTX_LINK_SPEED_40G_R:
562 link.link_speed = ETH_SPEED_NUM_40G;
565 case OCTEONTX_LINK_SPEED_RESERVE1:
566 case OCTEONTX_LINK_SPEED_RESERVE2:
568 octeontx_log_err("incorrect link speed %d", nic->speed);
572 link.link_duplex = ETH_LINK_AUTONEG;
573 link.link_autoneg = ETH_LINK_SPEED_AUTONEG;
575 return octeontx_atomic_write_link_status(dev, &link);
579 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
581 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
583 PMD_INIT_FUNC_TRACE();
584 return octeontx_port_stats(nic, stats);
588 octeontx_dev_stats_reset(struct rte_eth_dev *dev)
590 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
592 PMD_INIT_FUNC_TRACE();
593 octeontx_port_stats_clr(nic);
597 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev,
598 struct ether_addr *addr)
600 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
603 ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes);
605 octeontx_log_err("failed to set MAC address on port %d",
610 octeontx_dev_info(struct rte_eth_dev *dev,
611 struct rte_eth_dev_info *dev_info)
615 /* Autonegotiation may be disabled */
616 dev_info->speed_capa = ETH_LINK_SPEED_FIXED;
617 dev_info->speed_capa |= ETH_LINK_SPEED_10M | ETH_LINK_SPEED_100M |
618 ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G |
621 dev_info->driver_name = RTE_STR(rte_octeontx_pmd);
622 dev_info->max_mac_addrs = 1;
623 dev_info->max_rx_pktlen = PKI_MAX_PKTLEN;
624 dev_info->max_rx_queues = 1;
625 dev_info->max_tx_queues = PKO_MAX_NUM_DQ;
626 dev_info->min_rx_bufsize = 0;
627 dev_info->pci_dev = NULL;
629 dev_info->default_rxconf = (struct rte_eth_rxconf) {
634 dev_info->default_txconf = (struct rte_eth_txconf) {
637 ETH_TXQ_FLAGS_NOMULTSEGS |
638 ETH_TXQ_FLAGS_NOOFFLOADS |
639 ETH_TXQ_FLAGS_NOXSUMS,
642 dev_info->tx_offload_capa = DEV_TX_OFFLOAD_MT_LOCKFREE;
646 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out)
648 ((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va;
649 ((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va;
650 ((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va;
654 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
657 struct octeontx_txq *txq;
660 PMD_INIT_FUNC_TRACE();
662 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED)
665 txq = dev->data->tx_queues[qidx];
667 res = octeontx_pko_channel_query_dqs(nic->base_ochan,
669 sizeof(octeontx_dq_t),
671 octeontx_dq_info_getter);
677 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED;
681 (void)octeontx_port_stop(nic);
682 octeontx_pko_channel_stop(nic->base_ochan);
683 octeontx_pko_channel_close(nic->base_ochan);
684 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
689 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx)
691 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
693 PMD_INIT_FUNC_TRACE();
694 qidx = qidx % PKO_VF_NUM_DQ;
695 return octeontx_vf_start_tx_queue(dev, nic, qidx);
699 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
705 PMD_INIT_FUNC_TRACE();
707 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED)
710 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
715 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx)
717 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
719 PMD_INIT_FUNC_TRACE();
720 qidx = qidx % PKO_VF_NUM_DQ;
722 return octeontx_vf_stop_tx_queue(dev, nic, qidx);
726 octeontx_dev_tx_queue_release(void *tx_queue)
728 struct octeontx_txq *txq = tx_queue;
731 PMD_INIT_FUNC_TRACE();
734 res = octeontx_dev_tx_queue_stop(txq->eth_dev, txq->queue_id);
736 octeontx_log_err("failed stop tx_queue(%d)\n",
744 octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
745 uint16_t nb_desc, unsigned int socket_id,
746 const struct rte_eth_txconf *tx_conf)
748 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
749 struct octeontx_txq *txq = NULL;
753 RTE_SET_USED(nb_desc);
754 RTE_SET_USED(socket_id);
755 RTE_SET_USED(tx_conf);
757 dq_num = (nic->port_id * PKO_VF_NUM_DQ) + qidx;
759 /* Socket id check */
760 if (socket_id != (unsigned int)SOCKET_ID_ANY &&
761 socket_id != (unsigned int)nic->node)
762 PMD_TX_LOG(INFO, "socket_id expected %d, configured %d",
763 socket_id, nic->node);
765 /* Free memory prior to re-allocation if needed. */
766 if (dev->data->tx_queues[qidx] != NULL) {
767 PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d",
769 octeontx_dev_tx_queue_release(dev->data->tx_queues[qidx]);
770 dev->data->tx_queues[qidx] = NULL;
773 /* Allocating tx queue data structure */
774 txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq),
775 RTE_CACHE_LINE_SIZE, nic->node);
777 octeontx_log_err("failed to allocate txq=%d", qidx);
783 txq->queue_id = dq_num;
784 dev->data->tx_queues[qidx] = txq;
785 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
787 res = octeontx_pko_channel_query_dqs(nic->base_ochan,
789 sizeof(octeontx_dq_t),
791 octeontx_dq_info_getter);
797 PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p",
798 qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va,
800 txq->dq.fc_status_va);
812 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
813 uint16_t nb_desc, unsigned int socket_id,
814 const struct rte_eth_rxconf *rx_conf,
815 struct rte_mempool *mb_pool)
817 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
818 struct rte_mempool_ops *mp_ops = NULL;
819 struct octeontx_rxq *rxq = NULL;
820 pki_pktbuf_cfg_t pktbuf_conf;
821 pki_hash_cfg_t pki_hash;
822 pki_qos_cfg_t pki_qos;
826 unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx;
827 unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx;
829 RTE_SET_USED(nb_desc);
831 memset(&pktbuf_conf, 0, sizeof(pktbuf_conf));
832 memset(&pki_hash, 0, sizeof(pki_hash));
833 memset(&pki_qos, 0, sizeof(pki_qos));
835 mp_ops = rte_mempool_get_ops(mb_pool->ops_index);
836 if (strcmp(mp_ops->name, "octeontx_fpavf")) {
837 octeontx_log_err("failed to find octeontx_fpavf mempool");
841 /* Handle forbidden configurations */
842 if (nic->pki.classifier_enable) {
843 octeontx_log_err("cannot setup queue %d. "
844 "Classifier option unsupported", qidx);
850 /* Rx deferred start is not supported */
851 if (rx_conf->rx_deferred_start) {
852 octeontx_log_err("rx deferred start not supported");
856 /* Verify queue index */
857 if (qidx >= dev->data->nb_rx_queues) {
858 octeontx_log_err("QID %d not supporteded (0 - %d available)\n",
859 qidx, (dev->data->nb_rx_queues - 1));
863 /* Socket id check */
864 if (socket_id != (unsigned int)SOCKET_ID_ANY &&
865 socket_id != (unsigned int)nic->node)
866 PMD_RX_LOG(INFO, "socket_id expected %d, configured %d",
867 socket_id, nic->node);
869 /* Allocating rx queue data structure */
870 rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq),
871 RTE_CACHE_LINE_SIZE, nic->node);
873 octeontx_log_err("failed to allocate rxq=%d", qidx);
877 if (!nic->pki.initialized) {
878 pktbuf_conf.port_type = 0;
879 pki_hash.port_type = 0;
880 pki_qos.port_type = 0;
882 pktbuf_conf.mmask.f_wqe_skip = 1;
883 pktbuf_conf.mmask.f_first_skip = 1;
884 pktbuf_conf.mmask.f_later_skip = 1;
885 pktbuf_conf.mmask.f_mbuff_size = 1;
886 pktbuf_conf.mmask.f_cache_mode = 1;
888 pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP;
889 pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP;
890 pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP;
891 pktbuf_conf.mbuff_size = (mb_pool->elt_size -
892 RTE_PKTMBUF_HEADROOM -
893 sizeof(struct rte_mbuf));
895 pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT;
897 ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf);
899 octeontx_log_err("fail to configure pktbuf for port %d",
904 PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n"
905 "\tmbuf_size:\t0x%0x\n"
906 "\twqe_skip:\t0x%0x\n"
907 "\tfirst_skip:\t0x%0x\n"
908 "\tlater_skip:\t0x%0x\n"
909 "\tcache_mode:\t%s\n",
911 pktbuf_conf.mbuff_size,
912 pktbuf_conf.wqe_skip,
913 pktbuf_conf.first_skip,
914 pktbuf_conf.later_skip,
915 (pktbuf_conf.cache_mode ==
918 (pktbuf_conf.cache_mode ==
921 (pktbuf_conf.cache_mode ==
922 PKI_OPC_MODE_STF1_STT) ?
923 "STF1_STT" : "STF2_STT");
925 if (nic->pki.hash_enable) {
926 pki_hash.tag_dlc = 1;
927 pki_hash.tag_slc = 1;
928 pki_hash.tag_dlf = 1;
929 pki_hash.tag_slf = 1;
930 pki_hash.tag_prt = 1;
931 octeontx_pki_port_hash_config(port, &pki_hash);
934 pool = (uintptr_t)mb_pool->pool_id;
936 /* Get the gpool Id */
937 gaura = octeontx_fpa_bufpool_gpool(pool);
939 pki_qos.qpg_qos = PKI_QPG_QOS_NONE;
940 pki_qos.num_entry = 1;
941 pki_qos.drop_policy = 0;
942 pki_qos.tag_type = 0L;
943 pki_qos.qos_entry[0].port_add = 0;
944 pki_qos.qos_entry[0].gaura = gaura;
945 pki_qos.qos_entry[0].ggrp_ok = ev_queues;
946 pki_qos.qos_entry[0].ggrp_bad = ev_queues;
947 pki_qos.qos_entry[0].grptag_bad = 0;
948 pki_qos.qos_entry[0].grptag_ok = 0;
950 ret = octeontx_pki_port_create_qos(port, &pki_qos);
952 octeontx_log_err("failed to create QOS port=%d, q=%d",
957 nic->pki.initialized = true;
960 rxq->port_id = nic->port_id;
962 rxq->queue_id = qidx;
963 rxq->evdev = nic->evdev;
964 rxq->ev_queues = ev_queues;
965 rxq->ev_ports = ev_ports;
967 dev->data->rx_queues[qidx] = rxq;
968 dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
973 octeontx_dev_rx_queue_release(void *rxq)
978 static const uint32_t *
979 octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev)
981 static const uint32_t ptypes[] = {
983 RTE_PTYPE_L3_IPV4_EXT,
985 RTE_PTYPE_L3_IPV6_EXT,
992 if (dev->rx_pkt_burst == octeontx_recv_pkts)
999 octeontx_pool_ops(struct rte_eth_dev *dev, const char *pool)
1003 if (!strcmp(pool, "octeontx_fpavf"))
1009 /* Initialize and register driver with DPDK Application */
1010 static const struct eth_dev_ops octeontx_dev_ops = {
1011 .dev_configure = octeontx_dev_configure,
1012 .dev_infos_get = octeontx_dev_info,
1013 .dev_close = octeontx_dev_close,
1014 .dev_start = octeontx_dev_start,
1015 .dev_stop = octeontx_dev_stop,
1016 .promiscuous_enable = octeontx_dev_promisc_enable,
1017 .promiscuous_disable = octeontx_dev_promisc_disable,
1018 .link_update = octeontx_dev_link_update,
1019 .stats_get = octeontx_dev_stats_get,
1020 .stats_reset = octeontx_dev_stats_reset,
1021 .mac_addr_set = octeontx_dev_default_mac_addr_set,
1022 .tx_queue_start = octeontx_dev_tx_queue_start,
1023 .tx_queue_stop = octeontx_dev_tx_queue_stop,
1024 .tx_queue_setup = octeontx_dev_tx_queue_setup,
1025 .tx_queue_release = octeontx_dev_tx_queue_release,
1026 .rx_queue_setup = octeontx_dev_rx_queue_setup,
1027 .rx_queue_release = octeontx_dev_rx_queue_release,
1028 .dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get,
1029 .pool_ops_supported = octeontx_pool_ops,
1032 /* Create Ethdev interface per BGX LMAC ports */
1034 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev,
1038 char octtx_name[OCTEONTX_MAX_NAME_LEN];
1039 struct octeontx_nic *nic = NULL;
1040 struct rte_eth_dev *eth_dev = NULL;
1041 struct rte_eth_dev_data *data = NULL;
1042 const char *name = rte_vdev_device_name(dev);
1044 PMD_INIT_FUNC_TRACE();
1046 sprintf(octtx_name, "%s_%d", name, port);
1047 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1048 eth_dev = rte_eth_dev_attach_secondary(octtx_name);
1049 if (eth_dev == NULL)
1052 eth_dev->tx_pkt_burst = octeontx_xmit_pkts;
1053 eth_dev->rx_pkt_burst = octeontx_recv_pkts;
1057 data = rte_zmalloc_socket(octtx_name, sizeof(*data), 0, socket_id);
1059 octeontx_log_err("failed to allocate devdata");
1064 nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id);
1066 octeontx_log_err("failed to allocate nic structure");
1071 nic->port_id = port;
1074 res = octeontx_port_open(nic);
1078 /* Rx side port configuration */
1079 res = octeontx_pki_port_open(port);
1081 octeontx_log_err("failed to open PKI port %d", port);
1086 /* Reserve an ethdev entry */
1087 eth_dev = rte_eth_dev_allocate(octtx_name);
1088 if (eth_dev == NULL) {
1089 octeontx_log_err("failed to allocate rte_eth_dev");
1094 eth_dev->device = &dev->device;
1095 eth_dev->intr_handle = NULL;
1096 eth_dev->data->kdrv = RTE_KDRV_NONE;
1097 eth_dev->data->numa_node = dev->device.numa_node;
1099 rte_memcpy(data, (eth_dev)->data, sizeof(*data));
1100 data->dev_private = nic;
1102 data->port_id = eth_dev->data->port_id;
1103 snprintf(data->name, sizeof(data->name), "%s", eth_dev->data->name);
1108 data->dev_link.link_status = ETH_LINK_DOWN;
1109 data->dev_started = 0;
1110 data->promiscuous = 0;
1111 data->all_multicast = 0;
1112 data->scattered_rx = 0;
1114 data->mac_addrs = rte_zmalloc_socket(octtx_name, ETHER_ADDR_LEN, 0,
1116 if (data->mac_addrs == NULL) {
1117 octeontx_log_err("failed to allocate memory for mac_addrs");
1122 eth_dev->data = data;
1123 eth_dev->dev_ops = &octeontx_dev_ops;
1125 /* Finally save ethdev pointer to the NIC structure */
1128 if (nic->port_id != data->port_id) {
1129 octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)",
1130 data->port_id, nic->port_id);
1135 /* Update port_id mac to eth_dev */
1136 memcpy(data->mac_addrs, nic->mac_addr, ETHER_ADDR_LEN);
1138 PMD_INIT_LOG(DEBUG, "ethdev info: ");
1139 PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d",
1140 nic->port_id, nic->port_ena,
1141 nic->base_ochan, nic->num_ochans,
1142 nic->num_tx_queues);
1143 PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->mtu);
1145 rte_octeontx_pchan_map[(nic->base_ochan >> 8) & 0x7]
1146 [(nic->base_ochan >> 4) & 0xF] = data->port_id;
1148 return data->port_id;
1152 octeontx_port_close(nic);
1154 if (eth_dev != NULL) {
1155 rte_free(eth_dev->data->mac_addrs);
1158 rte_eth_dev_release_port(eth_dev);
1164 /* Un initialize octeontx device */
1166 octeontx_remove(struct rte_vdev_device *dev)
1168 char octtx_name[OCTEONTX_MAX_NAME_LEN];
1169 struct rte_eth_dev *eth_dev = NULL;
1170 struct octeontx_nic *nic = NULL;
1176 for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) {
1177 sprintf(octtx_name, "eth_octeontx_%d", i);
1179 /* reserve an ethdev entry */
1180 eth_dev = rte_eth_dev_allocated(octtx_name);
1181 if (eth_dev == NULL)
1184 nic = octeontx_pmd_priv(eth_dev);
1185 rte_event_dev_stop(nic->evdev);
1186 PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name);
1188 rte_free(eth_dev->data->mac_addrs);
1189 rte_free(eth_dev->data->dev_private);
1190 rte_free(eth_dev->data);
1191 rte_eth_dev_release_port(eth_dev);
1192 rte_event_dev_close(nic->evdev);
1195 /* Free FC resource */
1196 octeontx_pko_fc_free();
1201 /* Initialize octeontx device */
1203 octeontx_probe(struct rte_vdev_device *dev)
1205 const char *dev_name;
1206 static int probe_once;
1207 uint8_t socket_id, qlist;
1208 int tx_vfcnt, port_id, evdev, qnum, pnum, res, i;
1209 struct rte_event_dev_config dev_conf;
1210 const char *eventdev_name = "event_octeontx";
1211 struct rte_event_dev_info info;
1213 struct octeontx_vdev_init_params init_params = {
1214 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT
1217 dev_name = rte_vdev_device_name(dev);
1218 res = octeontx_parse_vdev_init_params(&init_params, dev);
1222 if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) {
1223 octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port,
1224 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT);
1228 PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name);
1230 socket_id = rte_socket_id();
1232 tx_vfcnt = octeontx_pko_vf_count();
1234 if (tx_vfcnt < init_params.nr_port) {
1235 octeontx_log_err("not enough PKO (%d) for port number (%d)",
1236 tx_vfcnt, init_params.nr_port);
1239 evdev = rte_event_dev_get_dev_id(eventdev_name);
1241 octeontx_log_err("eventdev %s not found", eventdev_name);
1245 res = rte_event_dev_info_get(evdev, &info);
1247 octeontx_log_err("failed to eventdev info %d", res);
1251 PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d",
1252 info.max_event_queues, info.max_event_ports);
1254 if (octeontx_pko_init_fc(tx_vfcnt))
1257 devconf_set_default_sane_values(&dev_conf, &info);
1258 res = rte_event_dev_configure(evdev, &dev_conf);
1262 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT,
1264 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT,
1267 octeontx_log_err("too few event ports (%d) for event_q(%d)",
1274 * We don't poll on event ports
1275 * that do not have any queues assigned.
1279 "reducing number of active event ports to %d", pnum);
1281 for (i = 0; i < qnum; i++) {
1282 res = rte_event_queue_setup(evdev, i, NULL);
1284 octeontx_log_err("failed to setup event_q(%d): res %d",
1290 for (i = 0; i < pnum; i++) {
1291 res = rte_event_port_setup(evdev, i, NULL);
1294 octeontx_log_err("failed to setup ev port(%d) res=%d",
1298 /* Link one queue to one event port */
1300 res = rte_event_port_link(evdev, i, &qlist, NULL, 1);
1303 octeontx_log_err("failed to link port (%d): res=%d",
1309 /* Create ethdev interface */
1310 for (i = 0; i < init_params.nr_port; i++) {
1311 port_id = octeontx_create(dev, i, evdev, socket_id);
1313 octeontx_log_err("failed to create device %s",
1319 PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name,
1324 octeontx_log_err("interface %s not supported", dev_name);
1325 octeontx_remove(dev);
1334 octeontx_pko_fc_free();
1338 static struct rte_vdev_driver octeontx_pmd_drv = {
1339 .probe = octeontx_probe,
1340 .remove = octeontx_remove,
1343 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv);
1344 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx);
1345 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> ");