1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2017 Cavium, Inc
12 #include <rte_alarm.h>
13 #include <rte_branch_prediction.h>
14 #include <rte_debug.h>
15 #include <rte_devargs.h>
17 #include <rte_kvargs.h>
18 #include <rte_malloc.h>
19 #include <rte_mbuf_pool_ops.h>
20 #include <rte_prefetch.h>
21 #include <rte_bus_vdev.h>
23 #include "octeontx_ethdev.h"
24 #include "octeontx_rxtx.h"
25 #include "octeontx_logs.h"
27 struct octeontx_vdev_init_params {
32 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX];
34 enum octeontx_link_speed {
35 OCTEONTX_LINK_SPEED_SGMII,
36 OCTEONTX_LINK_SPEED_XAUI,
37 OCTEONTX_LINK_SPEED_RXAUI,
38 OCTEONTX_LINK_SPEED_10G_R,
39 OCTEONTX_LINK_SPEED_40G_R,
40 OCTEONTX_LINK_SPEED_RESERVE1,
41 OCTEONTX_LINK_SPEED_QSGMII,
42 OCTEONTX_LINK_SPEED_RESERVE2
45 int otx_net_logtype_mbox;
46 int otx_net_logtype_init;
47 int otx_net_logtype_driver;
49 RTE_INIT(otx_net_init_log);
51 otx_net_init_log(void)
53 otx_net_logtype_mbox = rte_log_register("pmd.net.octeontx.mbox");
54 if (otx_net_logtype_mbox >= 0)
55 rte_log_set_level(otx_net_logtype_mbox, RTE_LOG_NOTICE);
57 otx_net_logtype_init = rte_log_register("pmd.net.octeontx.init");
58 if (otx_net_logtype_init >= 0)
59 rte_log_set_level(otx_net_logtype_init, RTE_LOG_NOTICE);
61 otx_net_logtype_driver = rte_log_register("pmd.net.octeontx.driver");
62 if (otx_net_logtype_driver >= 0)
63 rte_log_set_level(otx_net_logtype_driver, RTE_LOG_NOTICE);
66 /* Parse integer from integer argument */
68 parse_integer_arg(const char *key __rte_unused,
69 const char *value, void *extra_args)
71 int *i = (int *)extra_args;
75 octeontx_log_err("argument has to be positive.");
83 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params,
84 struct rte_vdev_device *dev)
86 struct rte_kvargs *kvlist = NULL;
89 static const char * const octeontx_vdev_valid_params[] = {
90 OCTEONTX_VDEV_NR_PORT_ARG,
94 const char *input_args = rte_vdev_device_args(dev);
100 kvlist = rte_kvargs_parse(input_args,
101 octeontx_vdev_valid_params);
105 ret = rte_kvargs_process(kvlist,
106 OCTEONTX_VDEV_NR_PORT_ARG,
114 rte_kvargs_free(kvlist);
119 octeontx_port_open(struct octeontx_nic *nic)
121 octeontx_mbox_bgx_port_conf_t bgx_port_conf;
125 memset(&bgx_port_conf, 0x0, sizeof(bgx_port_conf));
126 PMD_INIT_FUNC_TRACE();
128 res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf);
130 octeontx_log_err("failed to open port %d", res);
134 nic->node = bgx_port_conf.node;
135 nic->port_ena = bgx_port_conf.enable;
136 nic->base_ichan = bgx_port_conf.base_chan;
137 nic->base_ochan = bgx_port_conf.base_chan;
138 nic->num_ichans = bgx_port_conf.num_chans;
139 nic->num_ochans = bgx_port_conf.num_chans;
140 nic->mtu = bgx_port_conf.mtu;
141 nic->bpen = bgx_port_conf.bpen;
142 nic->fcs_strip = bgx_port_conf.fcs_strip;
143 nic->bcast_mode = bgx_port_conf.bcast_mode;
144 nic->mcast_mode = bgx_port_conf.mcast_mode;
145 nic->speed = bgx_port_conf.mode;
147 memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0], ETHER_ADDR_LEN);
149 octeontx_log_dbg("port opened %d", nic->port_id);
154 octeontx_port_close(struct octeontx_nic *nic)
156 PMD_INIT_FUNC_TRACE();
158 octeontx_bgx_port_close(nic->port_id);
159 octeontx_log_dbg("port closed %d", nic->port_id);
163 octeontx_port_start(struct octeontx_nic *nic)
165 PMD_INIT_FUNC_TRACE();
167 return octeontx_bgx_port_start(nic->port_id);
171 octeontx_port_stop(struct octeontx_nic *nic)
173 PMD_INIT_FUNC_TRACE();
175 return octeontx_bgx_port_stop(nic->port_id);
179 octeontx_port_promisc_set(struct octeontx_nic *nic, int en)
181 struct rte_eth_dev *dev;
185 PMD_INIT_FUNC_TRACE();
188 res = octeontx_bgx_port_promisc_set(nic->port_id, en);
190 octeontx_log_err("failed to set promiscuous mode %d",
193 /* Set proper flag for the mode */
194 dev->data->promiscuous = (en != 0) ? 1 : 0;
196 octeontx_log_dbg("port %d : promiscuous mode %s",
197 nic->port_id, en ? "set" : "unset");
201 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats)
203 octeontx_mbox_bgx_port_stats_t bgx_stats;
206 PMD_INIT_FUNC_TRACE();
208 res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats);
210 octeontx_log_err("failed to get port stats %d", nic->port_id);
214 stats->ipackets = bgx_stats.rx_packets;
215 stats->ibytes = bgx_stats.rx_bytes;
216 stats->imissed = bgx_stats.rx_dropped;
217 stats->ierrors = bgx_stats.rx_errors;
218 stats->opackets = bgx_stats.tx_packets;
219 stats->obytes = bgx_stats.tx_bytes;
220 stats->oerrors = bgx_stats.tx_errors;
222 octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "",
223 nic->port_id, stats->ipackets, stats->opackets);
229 octeontx_port_stats_clr(struct octeontx_nic *nic)
231 PMD_INIT_FUNC_TRACE();
233 octeontx_bgx_port_stats_clr(nic->port_id);
237 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf,
238 struct rte_event_dev_info *info)
240 memset(dev_conf, 0, sizeof(struct rte_event_dev_config));
241 dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns;
243 dev_conf->nb_event_ports = info->max_event_ports;
244 dev_conf->nb_event_queues = info->max_event_queues;
246 dev_conf->nb_event_queue_flows = info->max_event_queue_flows;
247 dev_conf->nb_event_port_dequeue_depth =
248 info->max_event_port_dequeue_depth;
249 dev_conf->nb_event_port_enqueue_depth =
250 info->max_event_port_enqueue_depth;
251 dev_conf->nb_event_port_enqueue_depth =
252 info->max_event_port_enqueue_depth;
253 dev_conf->nb_events_limit =
254 info->max_num_events;
258 octeontx_dev_configure(struct rte_eth_dev *dev)
260 struct rte_eth_dev_data *data = dev->data;
261 struct rte_eth_conf *conf = &data->dev_conf;
262 struct rte_eth_rxmode *rxmode = &conf->rxmode;
263 struct rte_eth_txmode *txmode = &conf->txmode;
264 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
265 uint64_t configured_offloads;
266 uint64_t unsupported_offloads;
269 PMD_INIT_FUNC_TRACE();
272 if (!rte_eal_has_hugepages()) {
273 octeontx_log_err("huge page is not configured");
277 if (txmode->mq_mode) {
278 octeontx_log_err("tx mq_mode DCB or VMDq not supported");
282 if (rxmode->mq_mode != ETH_MQ_RX_NONE &&
283 rxmode->mq_mode != ETH_MQ_RX_RSS) {
284 octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode);
288 configured_offloads = rxmode->offloads;
290 if (!(configured_offloads & DEV_RX_OFFLOAD_CRC_STRIP)) {
291 PMD_INIT_LOG(NOTICE, "can't disable hw crc strip");
292 configured_offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
295 unsupported_offloads = configured_offloads & ~OCTEONTX_RX_OFFLOADS;
297 if (unsupported_offloads) {
298 PMD_INIT_LOG(ERR, "Rx offloads 0x%" PRIx64 " are not supported. "
299 "Requested 0x%" PRIx64 " supported 0x%" PRIx64 "\n",
300 unsupported_offloads, configured_offloads,
301 (uint64_t)OCTEONTX_RX_OFFLOADS);
305 configured_offloads = txmode->offloads;
307 if (!(configured_offloads & DEV_TX_OFFLOAD_MT_LOCKFREE)) {
308 PMD_INIT_LOG(NOTICE, "cant disable lockfree tx");
309 configured_offloads |= DEV_TX_OFFLOAD_MT_LOCKFREE;
312 unsupported_offloads = configured_offloads & ~OCTEONTX_TX_OFFLOADS;
314 if (unsupported_offloads) {
315 PMD_INIT_LOG(ERR, "Tx offloads 0x%" PRIx64 " are not supported."
316 "Requested 0x%" PRIx64 " supported 0x%" PRIx64 ".\n",
317 unsupported_offloads, configured_offloads,
318 (uint64_t)OCTEONTX_TX_OFFLOADS);
322 if (conf->link_speeds & ETH_LINK_SPEED_FIXED) {
323 octeontx_log_err("setting link speed/duplex not supported");
327 if (conf->dcb_capability_en) {
328 octeontx_log_err("DCB enable not supported");
332 if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) {
333 octeontx_log_err("flow director not supported");
337 nic->num_tx_queues = dev->data->nb_tx_queues;
339 ret = octeontx_pko_channel_open(nic->port_id * PKO_VF_NUM_DQ,
343 octeontx_log_err("failed to open channel %d no-of-txq %d",
344 nic->base_ochan, nic->num_tx_queues);
348 nic->pki.classifier_enable = false;
349 nic->pki.hash_enable = true;
350 nic->pki.initialized = false;
356 octeontx_dev_close(struct rte_eth_dev *dev)
358 struct octeontx_txq *txq = NULL;
359 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
363 PMD_INIT_FUNC_TRACE();
365 rte_event_dev_close(nic->evdev);
367 ret = octeontx_pko_channel_close(nic->base_ochan);
369 octeontx_log_err("failed to close channel %d VF%d %d %d",
370 nic->base_ochan, nic->port_id, nic->num_tx_queues,
373 /* Free txq resources for this port */
374 for (i = 0; i < nic->num_tx_queues; i++) {
375 txq = dev->data->tx_queues[i];
384 octeontx_dev_start(struct rte_eth_dev *dev)
386 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
391 PMD_INIT_FUNC_TRACE();
395 dev->tx_pkt_burst = octeontx_xmit_pkts;
396 ret = octeontx_pko_channel_start(nic->base_ochan);
398 octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d",
399 nic->port_id, nic->num_tx_queues, nic->base_ochan,
407 dev->rx_pkt_burst = octeontx_recv_pkts;
408 ret = octeontx_pki_port_start(nic->port_id);
410 octeontx_log_err("fail to start Rx on port %d", nic->port_id);
411 goto channel_stop_error;
417 ret = octeontx_port_start(nic);
419 octeontx_log_err("failed start port %d", ret);
420 goto pki_port_stop_error;
423 PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d",
424 nic->base_ochan, nic->num_tx_queues, nic->port_id);
426 ret = rte_event_dev_start(nic->evdev);
428 octeontx_log_err("failed to start evdev: ret (%d)", ret);
429 goto pki_port_stop_error;
436 octeontx_pki_port_stop(nic->port_id);
438 octeontx_pko_channel_stop(nic->base_ochan);
444 octeontx_dev_stop(struct rte_eth_dev *dev)
446 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
449 PMD_INIT_FUNC_TRACE();
451 rte_event_dev_stop(nic->evdev);
453 ret = octeontx_port_stop(nic);
455 octeontx_log_err("failed to req stop port %d res=%d",
460 ret = octeontx_pki_port_stop(nic->port_id);
462 octeontx_log_err("failed to stop pki port %d res=%d",
467 ret = octeontx_pko_channel_stop(nic->base_ochan);
469 octeontx_log_err("failed to stop channel %d VF%d %d %d",
470 nic->base_ochan, nic->port_id, nic->num_tx_queues,
475 dev->tx_pkt_burst = NULL;
476 dev->rx_pkt_burst = NULL;
480 octeontx_dev_promisc_enable(struct rte_eth_dev *dev)
482 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
484 PMD_INIT_FUNC_TRACE();
485 octeontx_port_promisc_set(nic, 1);
489 octeontx_dev_promisc_disable(struct rte_eth_dev *dev)
491 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
493 PMD_INIT_FUNC_TRACE();
494 octeontx_port_promisc_set(nic, 0);
498 octeontx_port_link_status(struct octeontx_nic *nic)
502 PMD_INIT_FUNC_TRACE();
503 res = octeontx_bgx_port_link_status(nic->port_id);
505 octeontx_log_err("failed to get port %d link status",
510 nic->link_up = (uint8_t)res;
511 octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up);
517 * Return 0 means link status changed, -1 means not changed
520 octeontx_dev_link_update(struct rte_eth_dev *dev,
521 int wait_to_complete __rte_unused)
523 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
524 struct rte_eth_link link;
527 PMD_INIT_FUNC_TRACE();
529 res = octeontx_port_link_status(nic);
531 octeontx_log_err("failed to request link status %d", res);
535 link.link_status = nic->link_up;
537 switch (nic->speed) {
538 case OCTEONTX_LINK_SPEED_SGMII:
539 link.link_speed = ETH_SPEED_NUM_1G;
542 case OCTEONTX_LINK_SPEED_XAUI:
543 link.link_speed = ETH_SPEED_NUM_10G;
546 case OCTEONTX_LINK_SPEED_RXAUI:
547 case OCTEONTX_LINK_SPEED_10G_R:
548 link.link_speed = ETH_SPEED_NUM_10G;
550 case OCTEONTX_LINK_SPEED_QSGMII:
551 link.link_speed = ETH_SPEED_NUM_5G;
553 case OCTEONTX_LINK_SPEED_40G_R:
554 link.link_speed = ETH_SPEED_NUM_40G;
557 case OCTEONTX_LINK_SPEED_RESERVE1:
558 case OCTEONTX_LINK_SPEED_RESERVE2:
560 link.link_speed = ETH_SPEED_NUM_NONE;
561 octeontx_log_err("incorrect link speed %d", nic->speed);
565 link.link_duplex = ETH_LINK_FULL_DUPLEX;
566 link.link_autoneg = ETH_LINK_AUTONEG;
568 return rte_eth_linkstatus_set(dev, &link);
572 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
574 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
576 PMD_INIT_FUNC_TRACE();
577 return octeontx_port_stats(nic, stats);
581 octeontx_dev_stats_reset(struct rte_eth_dev *dev)
583 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
585 PMD_INIT_FUNC_TRACE();
586 octeontx_port_stats_clr(nic);
590 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev,
591 struct ether_addr *addr)
593 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
596 ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes);
598 octeontx_log_err("failed to set MAC address on port %d",
603 octeontx_dev_info(struct rte_eth_dev *dev,
604 struct rte_eth_dev_info *dev_info)
608 /* Autonegotiation may be disabled */
609 dev_info->speed_capa = ETH_LINK_SPEED_FIXED;
610 dev_info->speed_capa |= ETH_LINK_SPEED_10M | ETH_LINK_SPEED_100M |
611 ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G |
614 dev_info->max_mac_addrs = 1;
615 dev_info->max_rx_pktlen = PKI_MAX_PKTLEN;
616 dev_info->max_rx_queues = 1;
617 dev_info->max_tx_queues = PKO_MAX_NUM_DQ;
618 dev_info->min_rx_bufsize = 0;
619 dev_info->pci_dev = NULL;
621 dev_info->default_rxconf = (struct rte_eth_rxconf) {
624 .offloads = OCTEONTX_RX_OFFLOADS,
627 dev_info->default_txconf = (struct rte_eth_txconf) {
630 ETH_TXQ_FLAGS_NOMULTSEGS |
631 ETH_TXQ_FLAGS_NOOFFLOADS |
632 ETH_TXQ_FLAGS_NOXSUMS,
635 dev_info->rx_offload_capa = OCTEONTX_RX_OFFLOADS;
636 dev_info->tx_offload_capa = OCTEONTX_TX_OFFLOADS;
640 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out)
642 ((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va;
643 ((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va;
644 ((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va;
648 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
651 struct octeontx_txq *txq;
654 PMD_INIT_FUNC_TRACE();
656 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED)
659 txq = dev->data->tx_queues[qidx];
661 res = octeontx_pko_channel_query_dqs(nic->base_ochan,
663 sizeof(octeontx_dq_t),
665 octeontx_dq_info_getter);
671 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED;
675 (void)octeontx_port_stop(nic);
676 octeontx_pko_channel_stop(nic->base_ochan);
677 octeontx_pko_channel_close(nic->base_ochan);
678 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
683 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx)
685 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
687 PMD_INIT_FUNC_TRACE();
688 qidx = qidx % PKO_VF_NUM_DQ;
689 return octeontx_vf_start_tx_queue(dev, nic, qidx);
693 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
699 PMD_INIT_FUNC_TRACE();
701 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED)
704 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
709 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx)
711 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
713 PMD_INIT_FUNC_TRACE();
714 qidx = qidx % PKO_VF_NUM_DQ;
716 return octeontx_vf_stop_tx_queue(dev, nic, qidx);
720 octeontx_dev_tx_queue_release(void *tx_queue)
722 struct octeontx_txq *txq = tx_queue;
725 PMD_INIT_FUNC_TRACE();
728 res = octeontx_dev_tx_queue_stop(txq->eth_dev, txq->queue_id);
730 octeontx_log_err("failed stop tx_queue(%d)\n",
738 octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
739 uint16_t nb_desc, unsigned int socket_id,
740 const struct rte_eth_txconf *tx_conf)
742 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
743 struct octeontx_txq *txq = NULL;
746 uint64_t configured_offloads;
747 uint64_t unsupported_offloads;
749 RTE_SET_USED(nb_desc);
750 RTE_SET_USED(socket_id);
752 dq_num = (nic->port_id * PKO_VF_NUM_DQ) + qidx;
754 /* Socket id check */
755 if (socket_id != (unsigned int)SOCKET_ID_ANY &&
756 socket_id != (unsigned int)nic->node)
757 PMD_TX_LOG(INFO, "socket_id expected %d, configured %d",
758 socket_id, nic->node);
760 /* Free memory prior to re-allocation if needed. */
761 if (dev->data->tx_queues[qidx] != NULL) {
762 PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d",
764 octeontx_dev_tx_queue_release(dev->data->tx_queues[qidx]);
765 dev->data->tx_queues[qidx] = NULL;
768 configured_offloads = tx_conf->offloads;
770 if (!(configured_offloads & DEV_TX_OFFLOAD_MT_LOCKFREE)) {
771 PMD_INIT_LOG(NOTICE, "cant disable lockfree tx");
772 configured_offloads |= DEV_TX_OFFLOAD_MT_LOCKFREE;
775 unsupported_offloads = configured_offloads & ~OCTEONTX_TX_OFFLOADS;
776 if (unsupported_offloads) {
777 PMD_INIT_LOG(ERR, "Tx offloads 0x%" PRIx64 " are not supported."
778 "Requested 0x%" PRIx64 " supported 0x%" PRIx64 ".\n",
779 unsupported_offloads, configured_offloads,
780 (uint64_t)OCTEONTX_TX_OFFLOADS);
784 /* Allocating tx queue data structure */
785 txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq),
786 RTE_CACHE_LINE_SIZE, nic->node);
788 octeontx_log_err("failed to allocate txq=%d", qidx);
794 txq->queue_id = dq_num;
795 dev->data->tx_queues[qidx] = txq;
796 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
798 res = octeontx_pko_channel_query_dqs(nic->base_ochan,
800 sizeof(octeontx_dq_t),
802 octeontx_dq_info_getter);
808 PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p",
809 qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va,
811 txq->dq.fc_status_va);
823 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
824 uint16_t nb_desc, unsigned int socket_id,
825 const struct rte_eth_rxconf *rx_conf,
826 struct rte_mempool *mb_pool)
828 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
829 struct rte_mempool_ops *mp_ops = NULL;
830 struct octeontx_rxq *rxq = NULL;
831 pki_pktbuf_cfg_t pktbuf_conf;
832 pki_hash_cfg_t pki_hash;
833 pki_qos_cfg_t pki_qos;
837 unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx;
838 unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx;
839 uint64_t configured_offloads;
840 uint64_t unsupported_offloads;
842 RTE_SET_USED(nb_desc);
844 memset(&pktbuf_conf, 0, sizeof(pktbuf_conf));
845 memset(&pki_hash, 0, sizeof(pki_hash));
846 memset(&pki_qos, 0, sizeof(pki_qos));
848 mp_ops = rte_mempool_get_ops(mb_pool->ops_index);
849 if (strcmp(mp_ops->name, "octeontx_fpavf")) {
850 octeontx_log_err("failed to find octeontx_fpavf mempool");
854 /* Handle forbidden configurations */
855 if (nic->pki.classifier_enable) {
856 octeontx_log_err("cannot setup queue %d. "
857 "Classifier option unsupported", qidx);
863 configured_offloads = rx_conf->offloads;
865 if (!(configured_offloads & DEV_RX_OFFLOAD_CRC_STRIP)) {
866 PMD_INIT_LOG(NOTICE, "can't disable hw crc strip");
867 configured_offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
870 unsupported_offloads = configured_offloads & ~OCTEONTX_RX_OFFLOADS;
872 if (unsupported_offloads) {
873 PMD_INIT_LOG(ERR, "Rx offloads 0x%" PRIx64 " are not supported. "
874 "Requested 0x%" PRIx64 " supported 0x%" PRIx64 "\n",
875 unsupported_offloads, configured_offloads,
876 (uint64_t)OCTEONTX_RX_OFFLOADS);
879 /* Rx deferred start is not supported */
880 if (rx_conf->rx_deferred_start) {
881 octeontx_log_err("rx deferred start not supported");
885 /* Verify queue index */
886 if (qidx >= dev->data->nb_rx_queues) {
887 octeontx_log_err("QID %d not supporteded (0 - %d available)\n",
888 qidx, (dev->data->nb_rx_queues - 1));
892 /* Socket id check */
893 if (socket_id != (unsigned int)SOCKET_ID_ANY &&
894 socket_id != (unsigned int)nic->node)
895 PMD_RX_LOG(INFO, "socket_id expected %d, configured %d",
896 socket_id, nic->node);
898 /* Allocating rx queue data structure */
899 rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq),
900 RTE_CACHE_LINE_SIZE, nic->node);
902 octeontx_log_err("failed to allocate rxq=%d", qidx);
906 if (!nic->pki.initialized) {
907 pktbuf_conf.port_type = 0;
908 pki_hash.port_type = 0;
909 pki_qos.port_type = 0;
911 pktbuf_conf.mmask.f_wqe_skip = 1;
912 pktbuf_conf.mmask.f_first_skip = 1;
913 pktbuf_conf.mmask.f_later_skip = 1;
914 pktbuf_conf.mmask.f_mbuff_size = 1;
915 pktbuf_conf.mmask.f_cache_mode = 1;
917 pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP;
918 pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP;
919 pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP;
920 pktbuf_conf.mbuff_size = (mb_pool->elt_size -
921 RTE_PKTMBUF_HEADROOM -
922 sizeof(struct rte_mbuf));
924 pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT;
926 ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf);
928 octeontx_log_err("fail to configure pktbuf for port %d",
933 PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n"
934 "\tmbuf_size:\t0x%0x\n"
935 "\twqe_skip:\t0x%0x\n"
936 "\tfirst_skip:\t0x%0x\n"
937 "\tlater_skip:\t0x%0x\n"
938 "\tcache_mode:\t%s\n",
940 pktbuf_conf.mbuff_size,
941 pktbuf_conf.wqe_skip,
942 pktbuf_conf.first_skip,
943 pktbuf_conf.later_skip,
944 (pktbuf_conf.cache_mode ==
947 (pktbuf_conf.cache_mode ==
950 (pktbuf_conf.cache_mode ==
951 PKI_OPC_MODE_STF1_STT) ?
952 "STF1_STT" : "STF2_STT");
954 if (nic->pki.hash_enable) {
955 pki_hash.tag_dlc = 1;
956 pki_hash.tag_slc = 1;
957 pki_hash.tag_dlf = 1;
958 pki_hash.tag_slf = 1;
959 pki_hash.tag_prt = 1;
960 octeontx_pki_port_hash_config(port, &pki_hash);
963 pool = (uintptr_t)mb_pool->pool_id;
965 /* Get the gpool Id */
966 gaura = octeontx_fpa_bufpool_gpool(pool);
968 pki_qos.qpg_qos = PKI_QPG_QOS_NONE;
969 pki_qos.num_entry = 1;
970 pki_qos.drop_policy = 0;
971 pki_qos.tag_type = 0L;
972 pki_qos.qos_entry[0].port_add = 0;
973 pki_qos.qos_entry[0].gaura = gaura;
974 pki_qos.qos_entry[0].ggrp_ok = ev_queues;
975 pki_qos.qos_entry[0].ggrp_bad = ev_queues;
976 pki_qos.qos_entry[0].grptag_bad = 0;
977 pki_qos.qos_entry[0].grptag_ok = 0;
979 ret = octeontx_pki_port_create_qos(port, &pki_qos);
981 octeontx_log_err("failed to create QOS port=%d, q=%d",
986 nic->pki.initialized = true;
989 rxq->port_id = nic->port_id;
991 rxq->queue_id = qidx;
992 rxq->evdev = nic->evdev;
993 rxq->ev_queues = ev_queues;
994 rxq->ev_ports = ev_ports;
996 dev->data->rx_queues[qidx] = rxq;
997 dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
1002 octeontx_dev_rx_queue_release(void *rxq)
1007 static const uint32_t *
1008 octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev)
1010 static const uint32_t ptypes[] = {
1012 RTE_PTYPE_L3_IPV4_EXT,
1014 RTE_PTYPE_L3_IPV6_EXT,
1021 if (dev->rx_pkt_burst == octeontx_recv_pkts)
1028 octeontx_pool_ops(struct rte_eth_dev *dev, const char *pool)
1032 if (!strcmp(pool, "octeontx_fpavf"))
1038 /* Initialize and register driver with DPDK Application */
1039 static const struct eth_dev_ops octeontx_dev_ops = {
1040 .dev_configure = octeontx_dev_configure,
1041 .dev_infos_get = octeontx_dev_info,
1042 .dev_close = octeontx_dev_close,
1043 .dev_start = octeontx_dev_start,
1044 .dev_stop = octeontx_dev_stop,
1045 .promiscuous_enable = octeontx_dev_promisc_enable,
1046 .promiscuous_disable = octeontx_dev_promisc_disable,
1047 .link_update = octeontx_dev_link_update,
1048 .stats_get = octeontx_dev_stats_get,
1049 .stats_reset = octeontx_dev_stats_reset,
1050 .mac_addr_set = octeontx_dev_default_mac_addr_set,
1051 .tx_queue_start = octeontx_dev_tx_queue_start,
1052 .tx_queue_stop = octeontx_dev_tx_queue_stop,
1053 .tx_queue_setup = octeontx_dev_tx_queue_setup,
1054 .tx_queue_release = octeontx_dev_tx_queue_release,
1055 .rx_queue_setup = octeontx_dev_rx_queue_setup,
1056 .rx_queue_release = octeontx_dev_rx_queue_release,
1057 .dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get,
1058 .pool_ops_supported = octeontx_pool_ops,
1061 /* Create Ethdev interface per BGX LMAC ports */
1063 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev,
1067 char octtx_name[OCTEONTX_MAX_NAME_LEN];
1068 struct octeontx_nic *nic = NULL;
1069 struct rte_eth_dev *eth_dev = NULL;
1070 struct rte_eth_dev_data *data = NULL;
1071 const char *name = rte_vdev_device_name(dev);
1073 PMD_INIT_FUNC_TRACE();
1075 sprintf(octtx_name, "%s_%d", name, port);
1076 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1077 eth_dev = rte_eth_dev_attach_secondary(octtx_name);
1078 if (eth_dev == NULL)
1081 eth_dev->tx_pkt_burst = octeontx_xmit_pkts;
1082 eth_dev->rx_pkt_burst = octeontx_recv_pkts;
1086 data = rte_zmalloc_socket(octtx_name, sizeof(*data), 0, socket_id);
1088 octeontx_log_err("failed to allocate devdata");
1093 nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id);
1095 octeontx_log_err("failed to allocate nic structure");
1100 nic->port_id = port;
1103 res = octeontx_port_open(nic);
1107 /* Rx side port configuration */
1108 res = octeontx_pki_port_open(port);
1110 octeontx_log_err("failed to open PKI port %d", port);
1115 /* Reserve an ethdev entry */
1116 eth_dev = rte_eth_dev_allocate(octtx_name);
1117 if (eth_dev == NULL) {
1118 octeontx_log_err("failed to allocate rte_eth_dev");
1123 eth_dev->device = &dev->device;
1124 eth_dev->intr_handle = NULL;
1125 eth_dev->data->kdrv = RTE_KDRV_NONE;
1126 eth_dev->data->numa_node = dev->device.numa_node;
1128 rte_memcpy(data, (eth_dev)->data, sizeof(*data));
1129 data->dev_private = nic;
1131 data->port_id = eth_dev->data->port_id;
1132 snprintf(data->name, sizeof(data->name), "%s", eth_dev->data->name);
1137 data->dev_link.link_status = ETH_LINK_DOWN;
1138 data->dev_started = 0;
1139 data->promiscuous = 0;
1140 data->all_multicast = 0;
1141 data->scattered_rx = 0;
1143 data->mac_addrs = rte_zmalloc_socket(octtx_name, ETHER_ADDR_LEN, 0,
1145 if (data->mac_addrs == NULL) {
1146 octeontx_log_err("failed to allocate memory for mac_addrs");
1151 eth_dev->data = data;
1152 eth_dev->dev_ops = &octeontx_dev_ops;
1154 /* Finally save ethdev pointer to the NIC structure */
1157 if (nic->port_id != data->port_id) {
1158 octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)",
1159 data->port_id, nic->port_id);
1164 /* Update port_id mac to eth_dev */
1165 memcpy(data->mac_addrs, nic->mac_addr, ETHER_ADDR_LEN);
1167 PMD_INIT_LOG(DEBUG, "ethdev info: ");
1168 PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d",
1169 nic->port_id, nic->port_ena,
1170 nic->base_ochan, nic->num_ochans,
1171 nic->num_tx_queues);
1172 PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->mtu);
1174 rte_octeontx_pchan_map[(nic->base_ochan >> 8) & 0x7]
1175 [(nic->base_ochan >> 4) & 0xF] = data->port_id;
1177 return data->port_id;
1181 octeontx_port_close(nic);
1183 if (eth_dev != NULL) {
1184 rte_free(eth_dev->data->mac_addrs);
1187 rte_eth_dev_release_port(eth_dev);
1193 /* Un initialize octeontx device */
1195 octeontx_remove(struct rte_vdev_device *dev)
1197 char octtx_name[OCTEONTX_MAX_NAME_LEN];
1198 struct rte_eth_dev *eth_dev = NULL;
1199 struct octeontx_nic *nic = NULL;
1205 for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) {
1206 sprintf(octtx_name, "eth_octeontx_%d", i);
1208 /* reserve an ethdev entry */
1209 eth_dev = rte_eth_dev_allocated(octtx_name);
1210 if (eth_dev == NULL)
1213 nic = octeontx_pmd_priv(eth_dev);
1214 rte_event_dev_stop(nic->evdev);
1215 PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name);
1217 rte_free(eth_dev->data->mac_addrs);
1218 rte_free(eth_dev->data->dev_private);
1219 rte_free(eth_dev->data);
1220 rte_eth_dev_release_port(eth_dev);
1221 rte_event_dev_close(nic->evdev);
1224 /* Free FC resource */
1225 octeontx_pko_fc_free();
1230 /* Initialize octeontx device */
1232 octeontx_probe(struct rte_vdev_device *dev)
1234 const char *dev_name;
1235 static int probe_once;
1236 uint8_t socket_id, qlist;
1237 int tx_vfcnt, port_id, evdev, qnum, pnum, res, i;
1238 struct rte_event_dev_config dev_conf;
1239 const char *eventdev_name = "event_octeontx";
1240 struct rte_event_dev_info info;
1242 struct octeontx_vdev_init_params init_params = {
1243 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT
1246 dev_name = rte_vdev_device_name(dev);
1247 res = octeontx_parse_vdev_init_params(&init_params, dev);
1251 if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) {
1252 octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port,
1253 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT);
1257 PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name);
1259 socket_id = rte_socket_id();
1261 tx_vfcnt = octeontx_pko_vf_count();
1263 if (tx_vfcnt < init_params.nr_port) {
1264 octeontx_log_err("not enough PKO (%d) for port number (%d)",
1265 tx_vfcnt, init_params.nr_port);
1268 evdev = rte_event_dev_get_dev_id(eventdev_name);
1270 octeontx_log_err("eventdev %s not found", eventdev_name);
1274 res = rte_event_dev_info_get(evdev, &info);
1276 octeontx_log_err("failed to eventdev info %d", res);
1280 PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d",
1281 info.max_event_queues, info.max_event_ports);
1283 if (octeontx_pko_init_fc(tx_vfcnt))
1286 devconf_set_default_sane_values(&dev_conf, &info);
1287 res = rte_event_dev_configure(evdev, &dev_conf);
1291 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT,
1293 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT,
1296 octeontx_log_err("too few event ports (%d) for event_q(%d)",
1303 * We don't poll on event ports
1304 * that do not have any queues assigned.
1308 "reducing number of active event ports to %d", pnum);
1310 for (i = 0; i < qnum; i++) {
1311 res = rte_event_queue_setup(evdev, i, NULL);
1313 octeontx_log_err("failed to setup event_q(%d): res %d",
1319 for (i = 0; i < pnum; i++) {
1320 res = rte_event_port_setup(evdev, i, NULL);
1323 octeontx_log_err("failed to setup ev port(%d) res=%d",
1327 /* Link one queue to one event port */
1329 res = rte_event_port_link(evdev, i, &qlist, NULL, 1);
1332 octeontx_log_err("failed to link port (%d): res=%d",
1338 /* Create ethdev interface */
1339 for (i = 0; i < init_params.nr_port; i++) {
1340 port_id = octeontx_create(dev, i, evdev, socket_id);
1342 octeontx_log_err("failed to create device %s",
1348 PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name,
1353 octeontx_log_err("interface %s not supported", dev_name);
1354 octeontx_remove(dev);
1358 rte_mbuf_set_platform_mempool_ops("octeontx_fpavf");
1364 octeontx_pko_fc_free();
1368 static struct rte_vdev_driver octeontx_pmd_drv = {
1369 .probe = octeontx_probe,
1370 .remove = octeontx_remove,
1373 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv);
1374 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx);
1375 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> ");