drivers/net/octeontx/octeontx_ethdev.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2017 Cavium, Inc
   3  */
   4
   5 #ifndef __OCTEONTX_ETHDEV_H__
   6 #define __OCTEONTX_ETHDEV_H__
   7
   8 #include <stdbool.h>
   9
  10 #include <rte_common.h>
  11 #include <rte_ethdev_driver.h>
  12 #include <rte_eventdev.h>
  13 #include <rte_mempool.h>
  14 #include <rte_memory.h>
  15
  16 #include <octeontx_fpavf.h>
  17
  18 #include "base/octeontx_bgx.h"
  19 #include "base/octeontx_pki_var.h"
  20 #include "base/octeontx_pkivf.h"
  21 #include "base/octeontx_pkovf.h"
  22 #include "base/octeontx_io.h"
  23
  24 #define OCTEONTX_PMD                            net_octeontx
  25 #define OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT       12
  26 #define OCTEONTX_VDEV_NR_PORT_ARG               ("nr_port")
  27 #define OCTEONTX_MAX_NAME_LEN                   32
  28
  29 #define OCTEONTX_MAX_BGX_PORTS                  4
  30 #define OCTEONTX_MAX_LMAC_PER_BGX               4
  31
  32 #define OCTEONTX_RX_OFFLOADS                    DEV_RX_OFFLOAD_CHECKSUM
  33 #define OCTEONTX_TX_OFFLOADS                    DEV_TX_OFFLOAD_MT_LOCKFREE
  34
  35 static inline struct octeontx_nic *
  36 octeontx_pmd_priv(struct rte_eth_dev *dev)
  37 {
  38         return dev->data->dev_private;
  39 }
  40
  41 extern uint16_t
  42 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX];
  43
  44 /* Octeontx ethdev nic */
  45 struct octeontx_nic {
  46         struct rte_eth_dev *dev;
  47         int node;
  48         int port_id;
  49         int port_ena;
  50         int base_ichan;
  51         int num_ichans;
  52         int base_ochan;
  53         int num_ochans;
  54         uint8_t evdev;
  55         uint8_t bpen;
  56         uint8_t fcs_strip;
  57         uint8_t bcast_mode;
  58         uint8_t mcast_mode;
  59         uint16_t num_tx_queues;
  60         uint64_t hwcap;
  61         uint8_t pko_vfid;
  62         uint8_t link_up;
  63         uint8_t duplex;
  64         uint8_t speed;
  65         uint16_t mtu;
  66         uint8_t mac_addr[RTE_ETHER_ADDR_LEN];
  67         /* Rx port parameters */
  68         struct {
  69                 bool classifier_enable;
  70                 bool hash_enable;
  71                 bool initialized;
  72         } pki;
  73
  74         uint16_t ev_queues;
  75         uint16_t ev_ports;
  76 } __rte_cache_aligned;
  77
  78 struct octeontx_txq {
  79         uint16_t queue_id;
  80         octeontx_dq_t dq;
  81         struct rte_eth_dev *eth_dev;
  82 } __rte_cache_aligned;
  83
  84 struct octeontx_rxq {
  85         uint16_t queue_id;
  86         uint16_t port_id;
  87         uint8_t evdev;
  88         struct rte_eth_dev *eth_dev;
  89         uint16_t ev_queues;
  90         uint16_t ev_ports;
  91 } __rte_cache_aligned;
  92
  93 #endif /* __OCTEONTX_ETHDEV_H__ */