1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2020 Marvell International Ltd.
5 #ifndef __OTX2_ETHDEV_SEC_TX_H__
6 #define __OTX2_ETHDEV_SEC_TX_H__
8 #include <rte_security.h>
11 #include "otx2_ethdev_sec.h"
12 #include "otx2_security.h"
14 struct otx2_ipsec_fp_out_hdr {
20 static __rte_always_inline int32_t
21 otx2_ipsec_fp_out_rlen_get(struct otx2_sec_session_ipsec_ip *sess,
24 uint32_t enc_payload_len;
26 enc_payload_len = RTE_ALIGN_CEIL(plen + sess->roundup_len,
29 return sess->partial_len + enc_payload_len;
32 static __rte_always_inline void
33 otx2_ssogws_head_wait(struct otx2_ssogws *ws);
35 static __rte_always_inline int
36 otx2_sec_event_tx(struct otx2_ssogws *ws, struct rte_event *ev,
37 struct rte_mbuf *m, const struct otx2_eth_txq *txq,
38 const uint32_t offload_flags)
40 uint32_t dlen, rlen, desc_headroom, extend_head, extend_tail;
41 struct otx2_sec_session_ipsec_ip *sess;
42 struct otx2_ipsec_fp_out_hdr *hdr;
43 struct otx2_ipsec_fp_out_sa *sa;
44 uint64_t data_addr, desc_addr;
45 struct otx2_sec_session *priv;
46 struct otx2_cpt_inst_s inst;
51 struct otx2_cpt_res cpt_res __rte_aligned(OTX2_CPT_RES_ALIGN);
52 struct nix_send_hdr_s nix_hdr
53 __rte_aligned(OTX2_NIX_SEND_DESC_ALIGN);
54 union nix_send_sg_s nix_sg;
55 struct nix_iova_s nix_iova;
58 priv = get_sec_session_private_data((void *)(*rte_security_dynfield(m)));
59 sess = &priv->ipsec.ip;
62 RTE_ASSERT(sess->cpt_lmtline != NULL);
63 RTE_ASSERT(!(offload_flags & (NIX_TX_OFFLOAD_MBUF_NOFF_F |
64 NIX_TX_OFFLOAD_VLAN_QINQ_F)));
66 dlen = rte_pktmbuf_pkt_len(m) + sizeof(*hdr) - RTE_ETHER_HDR_LEN;
67 rlen = otx2_ipsec_fp_out_rlen_get(sess, dlen - sizeof(*hdr));
69 RTE_BUILD_BUG_ON(OTX2_CPT_RES_ALIGN % OTX2_NIX_SEND_DESC_ALIGN);
70 RTE_BUILD_BUG_ON(sizeof(sd->cpt_res) % OTX2_NIX_SEND_DESC_ALIGN);
72 extend_head = sizeof(*hdr);
73 extend_tail = rlen - dlen;
75 desc_headroom = (OTX2_CPT_RES_ALIGN - 1) + sizeof(*sd);
77 if (unlikely(!rte_pktmbuf_is_contiguous(m)) ||
78 unlikely(rte_pktmbuf_headroom(m) < extend_head + desc_headroom) ||
79 unlikely(rte_pktmbuf_tailroom(m) < extend_tail)) {
84 * Extend mbuf data to point to the expected packet buffer for NIX.
85 * This includes the Ethernet header followed by the encrypted IPsec
88 rte_pktmbuf_append(m, extend_tail);
89 data = rte_pktmbuf_prepend(m, extend_head);
90 data_addr = rte_pktmbuf_iova(m);
93 * Move the Ethernet header, to insert otx2_ipsec_fp_out_hdr prior
96 memcpy(data, data + sizeof(*hdr), RTE_ETHER_HDR_LEN);
98 hdr = (struct otx2_ipsec_fp_out_hdr *)(data + RTE_ETHER_HDR_LEN);
100 if (sa->ctl.enc_type == OTX2_IPSEC_FP_SA_ENC_AES_GCM) {
102 memcpy(hdr->iv, &sa->nonce, 4);
103 memset(hdr->iv + 4, 0, 12); //TODO: make it random
105 /* AES-128-[CBC] + [SHA1] */
106 memset(hdr->iv, 0, 16); //TODO: make it random
109 /* Keep CPT result and NIX send descriptors in headroom */
110 sd = (void *)RTE_PTR_ALIGN(data - desc_headroom, OTX2_CPT_RES_ALIGN);
111 desc_addr = data_addr - RTE_PTR_DIFF(data, sd);
113 /* Prepare CPT instruction */
115 inst.nixtx_addr = (desc_addr + offsetof(struct desc, nix_hdr)) >> 4;
118 inst.res_addr = desc_addr + offsetof(struct desc, cpt_res);
121 inst.wqe_ptr = desc_addr >> 3; /* FIXME: Handle errors */
123 inst.opcode = OTX2_CPT_OP_INLINE_IPSEC_OUTB;
125 inst.dptr = data_addr + RTE_ETHER_HDR_LEN;
126 inst.u64[7] = sess->inst_w7;
128 /* First word contains 8 bit completion code & 8 bit uc comp code */
129 sd->cpt_res.u16[0] = 0;
131 /* Prepare NIX send descriptors for output expected from CPT */
133 sd->nix_hdr.w0.u = 0;
134 sd->nix_hdr.w1.u = 0;
135 sd->nix_hdr.w0.sq = txq->sq;
136 sd->nix_hdr.w0.sizem1 = 1;
137 sd->nix_hdr.w0.total = rte_pktmbuf_data_len(m);
138 sd->nix_hdr.w0.aura = npa_lf_aura_handle_to_aura(m->pool->pool_id);
141 sd->nix_sg.subdc = NIX_SUBDC_SG;
142 sd->nix_sg.ld_type = NIX_SENDLDTYPE_LDD;
144 sd->nix_sg.seg1_size = rte_pktmbuf_data_len(m);
146 sd->nix_iova.addr = rte_mbuf_data_iova(m);
148 /* Mark mempool object as "put" since it is freed by NIX */
149 __mempool_check_cookies(m->pool, (void **)&m, 1, 0);
152 otx2_ssogws_head_wait(ws);
154 inst.param1 = sess->esn_hi >> 16;
155 inst.param2 = sess->esn_hi & 0xffff;
157 hdr->seq = rte_cpu_to_be_32(sess->seq);
158 hdr->ip_id = rte_cpu_to_be_32(sess->ip_id);
166 otx2_lmt_mov(sess->cpt_lmtline, &inst, 2);
167 lmt_status = otx2_lmt_submit(sess->cpt_nq_reg);
168 } while (lmt_status == 0);
173 if (offload_flags & NIX_TX_OFFLOAD_MBUF_NOFF_F) {
174 /* Don't free if reference count > 1 */
175 if (rte_pktmbuf_prefree_seg(m) == NULL)
182 #endif /* __OTX2_ETHDEV_SEC_TX_H__ */