drivers/net/octeontx2/otx2_lookup.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(C) 2019 Marvell International Ltd.
   3  */
   4
   5 #include <rte_common.h>
   6 #include <rte_memzone.h>
   7
   8 #include "otx2_ethdev.h"
   9
  10 /* NIX_RX_PARSE_S's ERRCODE + ERRLEV (12 bits) */
  11 #define ERRCODE_ERRLEN_WIDTH            12
  12 #define ERR_ARRAY_SZ                    ((BIT(ERRCODE_ERRLEN_WIDTH)) *\
  13                                         sizeof(uint32_t))
  14
  15 #define LOOKUP_ARRAY_SZ                 (PTYPE_ARRAY_SZ + ERR_ARRAY_SZ)
  16
  17 const uint32_t *
  18 otx2_nix_supported_ptypes_get(struct rte_eth_dev *eth_dev)
  19 {
  20         struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
  21
  22         static const uint32_t ptypes[] = {
  23                 RTE_PTYPE_L2_ETHER_QINQ, /* LB */
  24                 RTE_PTYPE_L2_ETHER_VLAN, /* LB */
  25                 RTE_PTYPE_L2_ETHER_TIMESYNC, /* LB */
  26                 RTE_PTYPE_L2_ETHER_ARP,  /* LC */
  27                 RTE_PTYPE_L2_ETHER_NSH,  /* LC */
  28                 RTE_PTYPE_L2_ETHER_FCOE, /* LC */
  29                 RTE_PTYPE_L2_ETHER_MPLS, /* LC */
  30                 RTE_PTYPE_L3_IPV4,       /* LC */
  31                 RTE_PTYPE_L3_IPV4_EXT,   /* LC */
  32                 RTE_PTYPE_L3_IPV6,       /* LC */
  33                 RTE_PTYPE_L3_IPV6_EXT,   /* LC */
  34                 RTE_PTYPE_L4_TCP,        /* LD */
  35                 RTE_PTYPE_L4_UDP,        /* LD */
  36                 RTE_PTYPE_L4_SCTP,       /* LD */
  37                 RTE_PTYPE_L4_ICMP,       /* LD */
  38                 RTE_PTYPE_L4_IGMP,       /* LD */
  39                 RTE_PTYPE_TUNNEL_GRE,    /* LD */
  40                 RTE_PTYPE_TUNNEL_ESP,    /* LD */
  41                 RTE_PTYPE_TUNNEL_NVGRE,  /* LD */
  42                 RTE_PTYPE_TUNNEL_VXLAN,  /* LE */
  43                 RTE_PTYPE_TUNNEL_GENEVE, /* LE */
  44                 RTE_PTYPE_TUNNEL_GTPC,   /* LE */
  45                 RTE_PTYPE_TUNNEL_GTPU,   /* LE */
  46                 RTE_PTYPE_TUNNEL_VXLAN_GPE,   /* LE */
  47                 RTE_PTYPE_TUNNEL_MPLS_IN_GRE, /* LE */
  48                 RTE_PTYPE_TUNNEL_MPLS_IN_UDP, /* LE */
  49                 RTE_PTYPE_INNER_L2_ETHER,/* LF */
  50                 RTE_PTYPE_INNER_L3_IPV4, /* LG */
  51                 RTE_PTYPE_INNER_L3_IPV6, /* LG */
  52                 RTE_PTYPE_INNER_L4_TCP,  /* LH */
  53                 RTE_PTYPE_INNER_L4_UDP,  /* LH */
  54                 RTE_PTYPE_INNER_L4_SCTP, /* LH */
  55                 RTE_PTYPE_INNER_L4_ICMP, /* LH */
  56                 RTE_PTYPE_UNKNOWN,
  57         };
  58
  59         if (dev->rx_offload_flags & NIX_RX_OFFLOAD_PTYPE_F)
  60                 return ptypes;
  61         else
  62                 return NULL;
  63 }
  64
  65 /*
  66  * +------------------ +------------------ +
  67  * |  | IL4 | IL3| IL2 | TU | L4 | L3 | L2 |
  68  * +-------------------+-------------------+
  69  *
  70  * +-------------------+------------------ +
  71  * |  | LH | LG  | LF  | LE | LD | LC | LB |
  72  * +-------------------+-------------------+
  73  *
  74  * ptype       [LE - LD - LC - LB]  = TU  - L4 -  L3  - T2
  75  * ptype_tunnel[LH - LG - LF]  = IL4 - IL3 - IL2 - TU
  76  *
  77  */
  78 static void
  79 nix_create_non_tunnel_ptype_array(uint16_t *ptype)
  80 {
  81         uint8_t lb, lc, ld, le;
  82         uint16_t val;
  83         uint32_t idx;
  84
  85         for (idx = 0; idx < PTYPE_NON_TUNNEL_ARRAY_SZ; idx++) {
  86                 lb = idx & 0xF;
  87                 lc = (idx & 0xF0) >> 4;
  88                 ld = (idx & 0xF00) >> 8;
  89                 le = (idx & 0xF000) >> 12;
  90                 val = RTE_PTYPE_UNKNOWN;
  91
  92                 switch (lb) {
  93                 case NPC_LT_LB_STAG_QINQ:
  94                         val |= RTE_PTYPE_L2_ETHER_QINQ;
  95                         break;
  96                 case NPC_LT_LB_CTAG:
  97                         val |= RTE_PTYPE_L2_ETHER_VLAN;
  98                         break;
  99                 }
 100
 101                 switch (lc) {
 102                 case NPC_LT_LC_ARP:
 103                         val |= RTE_PTYPE_L2_ETHER_ARP;
 104                         break;
 105                 case NPC_LT_LC_NSH:
 106                         val |= RTE_PTYPE_L2_ETHER_NSH;
 107                         break;
 108                 case NPC_LT_LC_FCOE:
 109                         val |= RTE_PTYPE_L2_ETHER_FCOE;
 110                         break;
 111                 case NPC_LT_LC_MPLS:
 112                         val |= RTE_PTYPE_L2_ETHER_MPLS;
 113                         break;
 114                 case NPC_LT_LC_IP:
 115                         val |= RTE_PTYPE_L3_IPV4;
 116                         break;
 117                 case NPC_LT_LC_IP_OPT:
 118                         val |= RTE_PTYPE_L3_IPV4_EXT;
 119                         break;
 120                 case NPC_LT_LC_IP6:
 121                         val |= RTE_PTYPE_L3_IPV6;
 122                         break;
 123                 case NPC_LT_LC_IP6_EXT:
 124                         val |= RTE_PTYPE_L3_IPV6_EXT;
 125                         break;
 126                 case NPC_LT_LC_PTP:
 127                         val |= RTE_PTYPE_L2_ETHER_TIMESYNC;
 128                         break;
 129                 }
 130
 131                 switch (ld) {
 132                 case NPC_LT_LD_TCP:
 133                         val |= RTE_PTYPE_L4_TCP;
 134                         break;
 135                 case NPC_LT_LD_UDP:
 136                         val |= RTE_PTYPE_L4_UDP;
 137                         break;
 138                 case NPC_LT_LD_SCTP:
 139                         val |= RTE_PTYPE_L4_SCTP;
 140                         break;
 141                 case NPC_LT_LD_ICMP:
 142                 case NPC_LT_LD_ICMP6:
 143                         val |= RTE_PTYPE_L4_ICMP;
 144                         break;
 145                 case NPC_LT_LD_IGMP:
 146                         val |= RTE_PTYPE_L4_IGMP;
 147                         break;
 148                 case NPC_LT_LD_GRE:
 149                         val |= RTE_PTYPE_TUNNEL_GRE;
 150                         break;
 151                 case NPC_LT_LD_NVGRE:
 152                         val |= RTE_PTYPE_TUNNEL_NVGRE;
 153                         break;
 154                 case NPC_LT_LD_ESP:
 155                         val |= RTE_PTYPE_TUNNEL_ESP;
 156                         break;
 157                 }
 158
 159                 switch (le) {
 160                 case NPC_LT_LE_VXLAN:
 161                         val |= RTE_PTYPE_TUNNEL_VXLAN;
 162                         break;
 163                 case NPC_LT_LE_VXLANGPE:
 164                         val |= RTE_PTYPE_TUNNEL_VXLAN_GPE;
 165                         break;
 166                 case NPC_LT_LE_GENEVE:
 167                         val |= RTE_PTYPE_TUNNEL_GENEVE;
 168                         break;
 169                 case NPC_LT_LE_GTPC:
 170                         val |= RTE_PTYPE_TUNNEL_GTPC;
 171                         break;
 172                 case NPC_LT_LE_GTPU:
 173                         val |= RTE_PTYPE_TUNNEL_GTPU;
 174                         break;
 175                 case NPC_LT_LE_TU_MPLS_IN_GRE:
 176                         val |= RTE_PTYPE_TUNNEL_MPLS_IN_GRE;
 177                         break;
 178                 case NPC_LT_LE_TU_MPLS_IN_UDP:
 179                         val |= RTE_PTYPE_TUNNEL_MPLS_IN_UDP;
 180                         break;
 181                 }
 182                 ptype[idx] = val;
 183         }
 184 }
 185
 186 #define TU_SHIFT(x) ((x) >> PTYPE_NON_TUNNEL_WIDTH)
 187 static void
 188 nix_create_tunnel_ptype_array(uint16_t *ptype)
 189 {
 190         uint8_t lf, lg, lh;
 191         uint16_t val;
 192         uint32_t idx;
 193
 194         /* Skip non tunnel ptype array memory */
 195         ptype = ptype + PTYPE_NON_TUNNEL_ARRAY_SZ;
 196
 197         for (idx = 0; idx < PTYPE_TUNNEL_ARRAY_SZ; idx++) {
 198                 lf = idx & 0xF;
 199                 lg = (idx & 0xF0) >> 4;
 200                 lh = (idx & 0xF00) >> 8;
 201                 val = RTE_PTYPE_UNKNOWN;
 202
 203                 switch (lf) {
 204                 case NPC_LT_LF_TU_ETHER:
 205                         val |= TU_SHIFT(RTE_PTYPE_INNER_L2_ETHER);
 206                         break;
 207                 }
 208                 switch (lg) {
 209                 case NPC_LT_LG_TU_IP:
 210                         val |= TU_SHIFT(RTE_PTYPE_INNER_L3_IPV4);
 211                         break;
 212                 case NPC_LT_LG_TU_IP6:
 213                         val |= TU_SHIFT(RTE_PTYPE_INNER_L3_IPV6);
 214                         break;
 215                 }
 216                 switch (lh) {
 217                 case NPC_LT_LH_TU_TCP:
 218                         val |= TU_SHIFT(RTE_PTYPE_INNER_L4_TCP);
 219                         break;
 220                 case NPC_LT_LH_TU_UDP:
 221                         val |= TU_SHIFT(RTE_PTYPE_INNER_L4_UDP);
 222                         break;
 223                 case NPC_LT_LH_TU_SCTP:
 224                         val |= TU_SHIFT(RTE_PTYPE_INNER_L4_SCTP);
 225                         break;
 226                 case NPC_LT_LH_TU_ICMP:
 227                 case NPC_LT_LH_TU_ICMP6:
 228                         val |= TU_SHIFT(RTE_PTYPE_INNER_L4_ICMP);
 229                         break;
 230                 }
 231
 232                 ptype[idx] = val;
 233         }
 234 }
 235
 236 static void
 237 nix_create_rx_ol_flags_array(void *mem)
 238 {
 239         uint16_t idx, errcode, errlev;
 240         uint32_t val, *ol_flags;
 241
 242         /* Skip ptype array memory */
 243         ol_flags = (uint32_t *)((uint8_t *)mem + PTYPE_ARRAY_SZ);
 244
 245         for (idx = 0; idx < BIT(ERRCODE_ERRLEN_WIDTH); idx++) {
 246                 errlev = idx & 0xf;
 247                 errcode = (idx & 0xff0) >> 4;
 248
 249                 val = PKT_RX_IP_CKSUM_UNKNOWN;
 250                 val |= PKT_RX_L4_CKSUM_UNKNOWN;
 251                 val |= PKT_RX_OUTER_L4_CKSUM_UNKNOWN;
 252
 253                 switch (errlev) {
 254                 case NPC_ERRLEV_RE:
 255                         /* Mark all errors as BAD checksum errors */
 256                         if (errcode) {
 257                                 val |= PKT_RX_IP_CKSUM_BAD;
 258                                 val |= PKT_RX_L4_CKSUM_BAD;
 259                         } else {
 260                                 val |= PKT_RX_IP_CKSUM_GOOD;
 261                                 val |= PKT_RX_L4_CKSUM_GOOD;
 262                         }
 263                         break;
 264                 case NPC_ERRLEV_LC:
 265                         if (errcode == NPC_EC_OIP4_CSUM ||
 266                             errcode == NPC_EC_IP_FRAG_OFFSET_1) {
 267                                 val |= PKT_RX_IP_CKSUM_BAD;
 268                                 val |= PKT_RX_EIP_CKSUM_BAD;
 269                         } else {
 270                                 val |= PKT_RX_IP_CKSUM_GOOD;
 271                         }
 272                         break;
 273                 case NPC_ERRLEV_LG:
 274                         if (errcode == NPC_EC_IIP4_CSUM)
 275                                 val |= PKT_RX_IP_CKSUM_BAD;
 276                         else
 277                                 val |= PKT_RX_IP_CKSUM_GOOD;
 278                         break;
 279                 case NPC_ERRLEV_NIX:
 280                         val |= PKT_RX_IP_CKSUM_GOOD;
 281                         if (errcode == NIX_RX_PERRCODE_OL4_CHK) {
 282                                 val |= PKT_RX_OUTER_L4_CKSUM_BAD;
 283                                 val |= PKT_RX_L4_CKSUM_BAD;
 284                         } else if (errcode == NIX_RX_PERRCODE_IL4_CHK) {
 285                                 val |= PKT_RX_L4_CKSUM_BAD;
 286                         } else {
 287                                 val |= PKT_RX_L4_CKSUM_GOOD;
 288                         }
 289                         break;
 290                 }
 291
 292                 ol_flags[idx] = val;
 293         }
 294 }
 295
 296 void *
 297 otx2_nix_fastpath_lookup_mem_get(void)
 298 {
 299         const char name[] = "otx2_nix_fastpath_lookup_mem";
 300         const struct rte_memzone *mz;
 301         void *mem;
 302
 303         mz = rte_memzone_lookup(name);
 304         if (mz != NULL)
 305                 return mz->addr;
 306
 307         /* Request for the first time */
 308         mz = rte_memzone_reserve_aligned(name, LOOKUP_ARRAY_SZ,
 309                                          SOCKET_ID_ANY, 0, OTX2_ALIGN);
 310         if (mz != NULL) {
 311                 mem = mz->addr;
 312                 /* Form the ptype array lookup memory */
 313                 nix_create_non_tunnel_ptype_array(mem);
 314                 nix_create_tunnel_ptype_array(mem);
 315                 /* Form the rx ol_flags based on errcode */
 316                 nix_create_rx_ol_flags_array(mem);
 317                 return mem;
 318         }
 319         return NULL;
 320 }