2 * Copyright (c) 2016 QLogic Corporation.
6 * See LICENSE.qede_pmd for copyright and licensing details.
11 #include "ecore_sp_commands.h"
12 #include "ecore_dcbx.h"
13 #include "ecore_cxt.h"
14 #include "ecore_gtt_reg_addr.h"
15 #include "ecore_iro.h"
16 #include "ecore_iov_api.h"
18 #define ECORE_DCBX_MAX_MIB_READ_TRY (100)
19 #define ECORE_ETH_TYPE_DEFAULT (0)
21 #define ECORE_DCBX_INVALID_PRIORITY 0xFF
23 /* Get Traffic Class from priority traffic class table, 4 bits represent
24 * the traffic class corresponding to the priority.
26 #define ECORE_DCBX_PRIO2TC(prio_tc_tbl, prio) \
27 ((u32)(prio_tc_tbl >> ((7 - prio) * 4)) & 0x7)
29 static bool ecore_dcbx_app_ethtype(u32 app_info_bitmap)
31 return !!(ECORE_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) ==
35 static bool ecore_dcbx_ieee_app_ethtype(u32 app_info_bitmap)
37 u8 mfw_val = ECORE_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE);
40 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED)
41 return ecore_dcbx_app_ethtype(app_info_bitmap);
43 return !!(mfw_val == DCBX_APP_SF_IEEE_ETHTYPE);
46 static bool ecore_dcbx_app_port(u32 app_info_bitmap)
48 return !!(ECORE_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) ==
52 static bool ecore_dcbx_ieee_app_port(u32 app_info_bitmap, u8 type)
54 u8 mfw_val = ECORE_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE);
57 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED)
58 return ecore_dcbx_app_port(app_info_bitmap);
60 return !!(mfw_val == type || mfw_val == DCBX_APP_SF_IEEE_TCP_UDP_PORT);
63 static bool ecore_dcbx_default_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
68 ethtype = ecore_dcbx_ieee_app_ethtype(app_info_bitmap);
70 ethtype = ecore_dcbx_app_ethtype(app_info_bitmap);
72 return !!(ethtype && (proto_id == ECORE_ETH_TYPE_DEFAULT));
76 ecore_dcbx_dp_protocol(struct ecore_hwfn *p_hwfn,
77 struct ecore_dcbx_results *p_data)
79 enum dcbx_protocol_type id;
82 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "DCBX negotiated: %d\n",
83 p_data->dcbx_enabled);
85 for (i = 0; i < OSAL_ARRAY_SIZE(ecore_dcbx_app_update); i++) {
86 id = ecore_dcbx_app_update[i].id;
88 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
89 "%s info: update %d, enable %d, prio %d, tc %d,"
90 " num_active_tc %d dscp_enable = %d dscp_val = %d\n",
91 ecore_dcbx_app_update[i].name,
92 p_data->arr[id].update,
93 p_data->arr[id].enable, p_data->arr[id].priority,
94 p_data->arr[id].tc, p_hwfn->hw_info.num_active_tc,
95 p_data->arr[id].dscp_enable,
96 p_data->arr[id].dscp_val);
101 ecore_dcbx_set_params(struct ecore_dcbx_results *p_data,
102 struct ecore_hwfn *p_hwfn,
103 bool enable, u8 prio, u8 tc,
104 enum dcbx_protocol_type type,
105 enum ecore_pci_personality personality)
107 struct ecore_dcbx_dscp_params *dscp = &p_hwfn->p_dcbx_info->get.dscp;
109 /* PF update ramrod data */
110 p_data->arr[type].enable = enable;
111 p_data->arr[type].priority = prio;
112 p_data->arr[type].tc = tc;
113 p_data->arr[type].dscp_enable = dscp->enabled;
114 if (p_data->arr[type].dscp_enable) {
117 for (i = 0; i < ECORE_DCBX_DSCP_SIZE; i++)
118 if (prio == dscp->dscp_pri_map[i]) {
119 p_data->arr[type].dscp_val = i;
124 if (enable && p_data->arr[type].dscp_enable)
125 p_data->arr[type].update = UPDATE_DCB_DSCP;
127 p_data->arr[type].update = UPDATE_DCB;
129 p_data->arr[type].update = DONT_UPDATE_DCB_DSCP;
132 if (p_hwfn->hw_info.personality == personality)
133 p_hwfn->hw_info.offload_tc = tc;
136 /* Update app protocol data and hw_info fields with the TLV info */
138 ecore_dcbx_update_app_info(struct ecore_dcbx_results *p_data,
139 struct ecore_hwfn *p_hwfn,
140 bool enable, u8 prio, u8 tc,
141 enum dcbx_protocol_type type)
143 enum ecore_pci_personality personality;
144 enum dcbx_protocol_type id;
145 const char *name; /* @DPDK */
148 for (i = 0; i < OSAL_ARRAY_SIZE(ecore_dcbx_app_update); i++) {
149 id = ecore_dcbx_app_update[i].id;
154 personality = ecore_dcbx_app_update[i].personality;
155 name = ecore_dcbx_app_update[i].name;
157 ecore_dcbx_set_params(p_data, p_hwfn, enable,
158 prio, tc, type, personality);
162 static enum _ecore_status_t
163 ecore_dcbx_get_app_priority(u8 pri_bitmap, u8 *priority)
165 u32 pri_mask, pri = ECORE_MAX_PFC_PRIORITIES;
166 u32 index = ECORE_MAX_PFC_PRIORITIES - 1;
167 enum _ecore_status_t rc = ECORE_SUCCESS;
169 /* Bitmap 1 corresponds to priority 0, return priority 0 */
170 if (pri_bitmap == 1) {
175 /* Choose the highest priority */
176 while ((pri == ECORE_MAX_PFC_PRIORITIES) && index) {
177 pri_mask = 1 << index;
178 if (pri_bitmap & pri_mask)
183 if (pri < ECORE_MAX_PFC_PRIORITIES)
192 ecore_dcbx_get_app_protocol_type(struct ecore_hwfn *p_hwfn,
193 u32 app_prio_bitmap, u16 id,
194 enum dcbx_protocol_type *type, bool ieee)
196 if (ecore_dcbx_default_tlv(app_prio_bitmap, id, ieee)) {
197 *type = DCBX_PROTOCOL_ETH;
199 *type = DCBX_MAX_PROTOCOL_TYPE;
201 "No action required, App TLV id = 0x%x"
202 " app_prio_bitmap = 0x%x\n",
203 id, app_prio_bitmap);
210 /* Parse app TLV's to update TC information in hw_info structure for
211 * reconfiguring QM. Get protocol specific data for PF update ramrod command.
213 static enum _ecore_status_t
214 ecore_dcbx_process_tlv(struct ecore_hwfn *p_hwfn,
215 struct ecore_dcbx_results *p_data,
216 struct dcbx_app_priority_entry *p_tbl, u32 pri_tc_tbl,
217 int count, u8 dcbx_version)
219 enum dcbx_protocol_type type;
224 enum _ecore_status_t rc = ECORE_SUCCESS;
227 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
228 "Num APP entries = %d pri_tc_tbl = 0x%x dcbx_version = %u\n",
229 count, pri_tc_tbl, dcbx_version);
231 ieee = (dcbx_version == DCBX_CONFIG_VERSION_IEEE);
233 for (i = 0; i < count; i++) {
234 protocol_id = ECORE_MFW_GET_FIELD(p_tbl[i].entry,
235 DCBX_APP_PROTOCOL_ID);
236 priority_map = ECORE_MFW_GET_FIELD(p_tbl[i].entry,
238 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "Id = 0x%x pri_map = %u\n",
239 protocol_id, priority_map);
240 rc = ecore_dcbx_get_app_priority(priority_map, &priority);
241 if (rc == ECORE_INVAL) {
242 DP_ERR(p_hwfn, "Invalid priority\n");
246 tc = ECORE_DCBX_PRIO2TC(pri_tc_tbl, priority);
247 if (ecore_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry,
250 /* ETH always have the enable bit reset, as it gets
251 * vlan information per packet. For other protocols,
252 * should be set according to the dcbx_enabled
253 * indication, but we only got here if there was an
254 * app tlv for the protocol, so dcbx must be enabled.
256 enable = !(type == DCBX_PROTOCOL_ETH);
258 ecore_dcbx_update_app_info(p_data, p_hwfn, enable,
262 /* Update ramrod protocol data and hw_info fields
263 * with default info when corresponding APP TLV's are not detected.
264 * The enabled field has a different logic for ethernet as only for
265 * ethernet dcb should disabled by default, as the information arrives
266 * from the OS (unless an explicit app tlv was present).
268 tc = p_data->arr[DCBX_PROTOCOL_ETH].tc;
269 priority = p_data->arr[DCBX_PROTOCOL_ETH].priority;
270 for (type = 0; type < DCBX_MAX_PROTOCOL_TYPE; type++) {
271 if (p_data->arr[type].update)
274 enable = (type == DCBX_PROTOCOL_ETH) ? false : !!dcbx_version;
275 ecore_dcbx_update_app_info(p_data, p_hwfn, enable,
279 return ECORE_SUCCESS;
282 /* Parse app TLV's to update TC information in hw_info structure for
283 * reconfiguring QM. Get protocol specific data for PF update ramrod command.
285 static enum _ecore_status_t
286 ecore_dcbx_process_mib_info(struct ecore_hwfn *p_hwfn)
288 struct dcbx_app_priority_feature *p_app;
289 enum _ecore_status_t rc = ECORE_SUCCESS;
290 struct ecore_dcbx_results data = { 0 };
291 struct dcbx_app_priority_entry *p_tbl;
292 struct dcbx_ets_feature *p_ets;
293 struct ecore_hw_info *p_info;
294 u32 pri_tc_tbl, flags;
298 flags = p_hwfn->p_dcbx_info->operational.flags;
299 dcbx_version = ECORE_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION);
301 p_app = &p_hwfn->p_dcbx_info->operational.features.app;
302 p_tbl = p_app->app_pri_tbl;
304 p_ets = &p_hwfn->p_dcbx_info->operational.features.ets;
305 pri_tc_tbl = p_ets->pri_tc_tbl[0];
307 p_info = &p_hwfn->hw_info;
308 num_entries = ECORE_MFW_GET_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES);
310 rc = ecore_dcbx_process_tlv(p_hwfn, &data, p_tbl, pri_tc_tbl,
311 num_entries, dcbx_version);
312 if (rc != ECORE_SUCCESS)
315 p_info->num_active_tc = ECORE_MFW_GET_FIELD(p_ets->flags,
317 p_hwfn->qm_info.ooo_tc = ECORE_MFW_GET_FIELD(p_ets->flags, DCBX_OOO_TC);
318 data.pf_id = p_hwfn->rel_pf_id;
319 data.dcbx_enabled = !!dcbx_version;
321 ecore_dcbx_dp_protocol(p_hwfn, &data);
323 OSAL_MEMCPY(&p_hwfn->p_dcbx_info->results, &data,
324 sizeof(struct ecore_dcbx_results));
326 return ECORE_SUCCESS;
329 static enum _ecore_status_t
330 ecore_dcbx_copy_mib(struct ecore_hwfn *p_hwfn,
331 struct ecore_ptt *p_ptt,
332 struct ecore_dcbx_mib_meta_data *p_data,
333 enum ecore_mib_read_type type)
335 enum _ecore_status_t rc = ECORE_SUCCESS;
336 u32 prefix_seq_num, suffix_seq_num;
339 /* The data is considered to be valid only if both sequence numbers are
343 if (type == ECORE_DCBX_REMOTE_LLDP_MIB) {
344 ecore_memcpy_from(p_hwfn, p_ptt, p_data->lldp_remote,
345 p_data->addr, p_data->size);
346 prefix_seq_num = p_data->lldp_remote->prefix_seq_num;
347 suffix_seq_num = p_data->lldp_remote->suffix_seq_num;
349 ecore_memcpy_from(p_hwfn, p_ptt, p_data->mib,
350 p_data->addr, p_data->size);
351 prefix_seq_num = p_data->mib->prefix_seq_num;
352 suffix_seq_num = p_data->mib->suffix_seq_num;
356 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
357 "mib type = %d, try count = %d prefix seq num ="
358 " %d suffix seq num = %d\n",
359 type, read_count, prefix_seq_num, suffix_seq_num);
360 } while ((prefix_seq_num != suffix_seq_num) &&
361 (read_count < ECORE_DCBX_MAX_MIB_READ_TRY));
363 if (read_count >= ECORE_DCBX_MAX_MIB_READ_TRY) {
365 "MIB read err, mib type = %d, try count ="
366 " %d prefix seq num = %d suffix seq num = %d\n",
367 type, read_count, prefix_seq_num, suffix_seq_num);
375 ecore_dcbx_get_priority_info(struct ecore_hwfn *p_hwfn,
376 struct ecore_dcbx_app_prio *p_prio,
377 struct ecore_dcbx_results *p_results)
381 if (p_results->arr[DCBX_PROTOCOL_ETH].update &&
382 p_results->arr[DCBX_PROTOCOL_ETH].enable)
383 p_prio->eth = p_results->arr[DCBX_PROTOCOL_ETH].priority;
385 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
386 "Priorities: eth %d\n",
391 ecore_dcbx_get_app_data(struct ecore_hwfn *p_hwfn,
392 struct dcbx_app_priority_feature *p_app,
393 struct dcbx_app_priority_entry *p_tbl,
394 struct ecore_dcbx_params *p_params, bool ieee)
396 struct ecore_app_entry *entry;
400 p_params->app_willing = ECORE_MFW_GET_FIELD(p_app->flags,
402 p_params->app_valid = ECORE_MFW_GET_FIELD(p_app->flags,
404 p_params->app_error = ECORE_MFW_GET_FIELD(p_app->flags, DCBX_APP_ERROR);
405 p_params->num_app_entries = ECORE_MFW_GET_FIELD(p_app->flags,
406 DCBX_APP_NUM_ENTRIES);
407 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
408 entry = &p_params->app_entry[i];
413 sf_ieee = ECORE_MFW_GET_FIELD(p_tbl[i].entry,
416 case DCBX_APP_SF_IEEE_RESERVED:
418 val = ECORE_MFW_GET_FIELD(p_tbl[i].entry,
420 entry->sf_ieee = val ?
421 ECORE_DCBX_SF_IEEE_TCP_UDP_PORT :
422 ECORE_DCBX_SF_IEEE_ETHTYPE;
424 case DCBX_APP_SF_IEEE_ETHTYPE:
425 entry->sf_ieee = ECORE_DCBX_SF_IEEE_ETHTYPE;
427 case DCBX_APP_SF_IEEE_TCP_PORT:
428 entry->sf_ieee = ECORE_DCBX_SF_IEEE_TCP_PORT;
430 case DCBX_APP_SF_IEEE_UDP_PORT:
431 entry->sf_ieee = ECORE_DCBX_SF_IEEE_UDP_PORT;
433 case DCBX_APP_SF_IEEE_TCP_UDP_PORT:
435 ECORE_DCBX_SF_IEEE_TCP_UDP_PORT;
439 entry->ethtype = !(ECORE_MFW_GET_FIELD(p_tbl[i].entry,
443 pri_map = ECORE_MFW_GET_FIELD(p_tbl[i].entry, DCBX_APP_PRI_MAP);
444 ecore_dcbx_get_app_priority(pri_map, &entry->prio);
445 entry->proto_id = ECORE_MFW_GET_FIELD(p_tbl[i].entry,
446 DCBX_APP_PROTOCOL_ID);
447 ecore_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry,
449 &entry->proto_type, ieee);
452 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
453 "APP params: willing %d, valid %d error = %d\n",
454 p_params->app_willing, p_params->app_valid,
455 p_params->app_error);
459 ecore_dcbx_get_pfc_data(struct ecore_hwfn *p_hwfn,
460 u32 pfc, struct ecore_dcbx_params *p_params)
464 p_params->pfc.willing = ECORE_MFW_GET_FIELD(pfc, DCBX_PFC_WILLING);
465 p_params->pfc.max_tc = ECORE_MFW_GET_FIELD(pfc, DCBX_PFC_CAPS);
466 p_params->pfc.enabled = ECORE_MFW_GET_FIELD(pfc, DCBX_PFC_ENABLED);
467 pfc_map = ECORE_MFW_GET_FIELD(pfc, DCBX_PFC_PRI_EN_BITMAP);
468 p_params->pfc.prio[0] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_0);
469 p_params->pfc.prio[1] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_1);
470 p_params->pfc.prio[2] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_2);
471 p_params->pfc.prio[3] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_3);
472 p_params->pfc.prio[4] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_4);
473 p_params->pfc.prio[5] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_5);
474 p_params->pfc.prio[6] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_6);
475 p_params->pfc.prio[7] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_7);
477 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
478 "PFC params: willing %d, pfc_bitmap %u max_tc = %u enabled = %d\n",
479 p_params->pfc.willing, pfc_map, p_params->pfc.max_tc,
480 p_params->pfc.enabled);
484 ecore_dcbx_get_ets_data(struct ecore_hwfn *p_hwfn,
485 struct dcbx_ets_feature *p_ets,
486 struct ecore_dcbx_params *p_params)
488 u32 bw_map[2], tsa_map[2], pri_map;
491 p_params->ets_willing = ECORE_MFW_GET_FIELD(p_ets->flags,
493 p_params->ets_enabled = ECORE_MFW_GET_FIELD(p_ets->flags,
495 p_params->ets_cbs = ECORE_MFW_GET_FIELD(p_ets->flags, DCBX_ETS_CBS);
496 p_params->max_ets_tc = ECORE_MFW_GET_FIELD(p_ets->flags,
498 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
499 "ETS params: willing %d, enabled = %d ets_cbs %d pri_tc_tbl_0 %x max_ets_tc %d\n",
500 p_params->ets_willing, p_params->ets_enabled,
501 p_params->ets_cbs, p_ets->pri_tc_tbl[0],
502 p_params->max_ets_tc);
504 /* 8 bit tsa and bw data corresponding to each of the 8 TC's are
505 * encoded in a type u32 array of size 2.
507 bw_map[0] = OSAL_BE32_TO_CPU(p_ets->tc_bw_tbl[0]);
508 bw_map[1] = OSAL_BE32_TO_CPU(p_ets->tc_bw_tbl[1]);
509 tsa_map[0] = OSAL_BE32_TO_CPU(p_ets->tc_tsa_tbl[0]);
510 tsa_map[1] = OSAL_BE32_TO_CPU(p_ets->tc_tsa_tbl[1]);
511 pri_map = p_ets->pri_tc_tbl[0];
512 for (i = 0; i < ECORE_MAX_PFC_PRIORITIES; i++) {
513 p_params->ets_tc_bw_tbl[i] = ((u8 *)bw_map)[i];
514 p_params->ets_tc_tsa_tbl[i] = ((u8 *)tsa_map)[i];
515 p_params->ets_pri_tc_tbl[i] = ECORE_DCBX_PRIO2TC(pri_map, i);
516 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
517 "elem %d bw_tbl %x tsa_tbl %x\n",
518 i, p_params->ets_tc_bw_tbl[i],
519 p_params->ets_tc_tsa_tbl[i]);
524 ecore_dcbx_get_common_params(struct ecore_hwfn *p_hwfn,
525 struct dcbx_app_priority_feature *p_app,
526 struct dcbx_app_priority_entry *p_tbl,
527 struct dcbx_ets_feature *p_ets,
528 u32 pfc, struct ecore_dcbx_params *p_params,
531 ecore_dcbx_get_app_data(p_hwfn, p_app, p_tbl, p_params, ieee);
532 ecore_dcbx_get_ets_data(p_hwfn, p_ets, p_params);
533 ecore_dcbx_get_pfc_data(p_hwfn, pfc, p_params);
537 ecore_dcbx_get_local_params(struct ecore_hwfn *p_hwfn,
538 struct ecore_ptt *p_ptt,
539 struct ecore_dcbx_get *params)
541 struct dcbx_features *p_feat;
543 p_feat = &p_hwfn->p_dcbx_info->local_admin.features;
544 ecore_dcbx_get_common_params(p_hwfn, &p_feat->app,
545 p_feat->app.app_pri_tbl, &p_feat->ets,
546 p_feat->pfc, ¶ms->local.params, false);
547 params->local.valid = true;
551 ecore_dcbx_get_remote_params(struct ecore_hwfn *p_hwfn,
552 struct ecore_ptt *p_ptt,
553 struct ecore_dcbx_get *params)
555 struct dcbx_features *p_feat;
557 p_feat = &p_hwfn->p_dcbx_info->remote.features;
558 ecore_dcbx_get_common_params(p_hwfn, &p_feat->app,
559 p_feat->app.app_pri_tbl, &p_feat->ets,
560 p_feat->pfc, ¶ms->remote.params,
562 params->remote.valid = true;
565 static enum _ecore_status_t
566 ecore_dcbx_get_operational_params(struct ecore_hwfn *p_hwfn,
567 struct ecore_ptt *p_ptt,
568 struct ecore_dcbx_get *params)
570 struct ecore_dcbx_operational_params *p_operational;
571 struct ecore_dcbx_results *p_results;
572 struct dcbx_features *p_feat;
577 flags = p_hwfn->p_dcbx_info->operational.flags;
579 /* If DCBx version is non zero, then negotiation
580 * was successfuly performed
582 p_operational = ¶ms->operational;
583 enabled = !!(ECORE_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) !=
584 DCBX_CONFIG_VERSION_DISABLED);
586 p_operational->enabled = enabled;
587 p_operational->valid = false;
588 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "Dcbx is disabled\n");
592 p_feat = &p_hwfn->p_dcbx_info->operational.features;
593 p_results = &p_hwfn->p_dcbx_info->results;
595 val = !!(ECORE_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) ==
596 DCBX_CONFIG_VERSION_IEEE);
597 p_operational->ieee = val;
599 val = !!(ECORE_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) ==
600 DCBX_CONFIG_VERSION_CEE);
601 p_operational->cee = val;
603 val = !!(ECORE_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) ==
604 DCBX_CONFIG_VERSION_STATIC);
605 p_operational->local = val;
607 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
608 "Version support: ieee %d, cee %d, static %d\n",
609 p_operational->ieee, p_operational->cee,
610 p_operational->local);
612 ecore_dcbx_get_common_params(p_hwfn, &p_feat->app,
613 p_feat->app.app_pri_tbl, &p_feat->ets,
614 p_feat->pfc, ¶ms->operational.params,
615 p_operational->ieee);
616 ecore_dcbx_get_priority_info(p_hwfn, &p_operational->app_prio,
618 err = ECORE_MFW_GET_FIELD(p_feat->app.flags, DCBX_APP_ERROR);
619 p_operational->err = err;
620 p_operational->enabled = enabled;
621 p_operational->valid = true;
623 return ECORE_SUCCESS;
627 ecore_dcbx_get_dscp_params(struct ecore_hwfn *p_hwfn,
628 struct ecore_ptt *p_ptt,
629 struct ecore_dcbx_get *params)
631 struct ecore_dcbx_dscp_params *p_dscp;
632 struct dcb_dscp_map *p_dscp_map;
636 p_dscp = ¶ms->dscp;
637 p_dscp_map = &p_hwfn->p_dcbx_info->dscp_map;
638 p_dscp->enabled = ECORE_MFW_GET_FIELD(p_dscp_map->flags,
640 /* MFW encodes 64 dscp entries into 8 element array of u32 entries,
641 * where each entry holds the 4bit priority map for 8 dscp entries.
643 for (i = 0, entry = 0; i < ECORE_DCBX_DSCP_SIZE / 8; i++) {
644 pri_map = OSAL_BE32_TO_CPU(p_dscp_map->dscp_pri_map[i]);
645 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "elem %d pri_map 0x%x\n",
647 for (j = 0; j < ECORE_DCBX_DSCP_SIZE / 8; j++, entry++)
648 p_dscp->dscp_pri_map[entry] = (u32)(pri_map >>
654 ecore_dcbx_get_local_lldp_params(struct ecore_hwfn *p_hwfn,
655 struct ecore_ptt *p_ptt,
656 struct ecore_dcbx_get *params)
658 struct lldp_config_params_s *p_local;
660 p_local = &p_hwfn->p_dcbx_info->lldp_local[LLDP_NEAREST_BRIDGE];
662 OSAL_MEMCPY(params->lldp_local.local_chassis_id,
663 p_local->local_chassis_id,
664 OSAL_ARRAY_SIZE(p_local->local_chassis_id));
665 OSAL_MEMCPY(params->lldp_local.local_port_id, p_local->local_port_id,
666 OSAL_ARRAY_SIZE(p_local->local_port_id));
670 ecore_dcbx_get_remote_lldp_params(struct ecore_hwfn *p_hwfn,
671 struct ecore_ptt *p_ptt,
672 struct ecore_dcbx_get *params)
674 struct lldp_status_params_s *p_remote;
676 p_remote = &p_hwfn->p_dcbx_info->lldp_remote[LLDP_NEAREST_BRIDGE];
678 OSAL_MEMCPY(params->lldp_remote.peer_chassis_id,
679 p_remote->peer_chassis_id,
680 OSAL_ARRAY_SIZE(p_remote->peer_chassis_id));
681 OSAL_MEMCPY(params->lldp_remote.peer_port_id, p_remote->peer_port_id,
682 OSAL_ARRAY_SIZE(p_remote->peer_port_id));
685 static enum _ecore_status_t
686 ecore_dcbx_get_params(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
687 struct ecore_dcbx_get *p_params,
688 enum ecore_mib_read_type type)
690 enum _ecore_status_t rc = ECORE_SUCCESS;
693 case ECORE_DCBX_REMOTE_MIB:
694 ecore_dcbx_get_remote_params(p_hwfn, p_ptt, p_params);
696 case ECORE_DCBX_LOCAL_MIB:
697 ecore_dcbx_get_local_params(p_hwfn, p_ptt, p_params);
699 case ECORE_DCBX_OPERATIONAL_MIB:
700 ecore_dcbx_get_operational_params(p_hwfn, p_ptt, p_params);
702 case ECORE_DCBX_REMOTE_LLDP_MIB:
703 ecore_dcbx_get_remote_lldp_params(p_hwfn, p_ptt, p_params);
705 case ECORE_DCBX_LOCAL_LLDP_MIB:
706 ecore_dcbx_get_local_lldp_params(p_hwfn, p_ptt, p_params);
709 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type);
716 static enum _ecore_status_t
717 ecore_dcbx_read_local_lldp_mib(struct ecore_hwfn *p_hwfn,
718 struct ecore_ptt *p_ptt)
720 struct ecore_dcbx_mib_meta_data data;
721 enum _ecore_status_t rc = ECORE_SUCCESS;
723 OSAL_MEM_ZERO(&data, sizeof(data));
724 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port,
726 data.lldp_local = p_hwfn->p_dcbx_info->lldp_local;
727 data.size = sizeof(struct lldp_config_params_s);
728 ecore_memcpy_from(p_hwfn, p_ptt, data.lldp_local, data.addr, data.size);
733 static enum _ecore_status_t
734 ecore_dcbx_read_remote_lldp_mib(struct ecore_hwfn *p_hwfn,
735 struct ecore_ptt *p_ptt,
736 enum ecore_mib_read_type type)
738 struct ecore_dcbx_mib_meta_data data;
739 enum _ecore_status_t rc = ECORE_SUCCESS;
741 OSAL_MEM_ZERO(&data, sizeof(data));
742 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port,
744 data.lldp_remote = p_hwfn->p_dcbx_info->lldp_remote;
745 data.size = sizeof(struct lldp_status_params_s);
746 rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
751 static enum _ecore_status_t
752 ecore_dcbx_read_operational_mib(struct ecore_hwfn *p_hwfn,
753 struct ecore_ptt *p_ptt,
754 enum ecore_mib_read_type type)
756 struct ecore_dcbx_mib_meta_data data;
757 enum _ecore_status_t rc = ECORE_SUCCESS;
759 OSAL_MEM_ZERO(&data, sizeof(data));
760 data.addr = p_hwfn->mcp_info->port_addr +
761 offsetof(struct public_port, operational_dcbx_mib);
762 data.mib = &p_hwfn->p_dcbx_info->operational;
763 data.size = sizeof(struct dcbx_mib);
764 rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
769 static enum _ecore_status_t
770 ecore_dcbx_read_remote_mib(struct ecore_hwfn *p_hwfn,
771 struct ecore_ptt *p_ptt,
772 enum ecore_mib_read_type type)
774 struct ecore_dcbx_mib_meta_data data;
775 enum _ecore_status_t rc = ECORE_SUCCESS;
777 OSAL_MEM_ZERO(&data, sizeof(data));
778 data.addr = p_hwfn->mcp_info->port_addr +
779 offsetof(struct public_port, remote_dcbx_mib);
780 data.mib = &p_hwfn->p_dcbx_info->remote;
781 data.size = sizeof(struct dcbx_mib);
782 rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
787 static enum _ecore_status_t
788 ecore_dcbx_read_local_mib(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt)
790 struct ecore_dcbx_mib_meta_data data;
791 enum _ecore_status_t rc = ECORE_SUCCESS;
793 OSAL_MEM_ZERO(&data, sizeof(data));
794 data.addr = p_hwfn->mcp_info->port_addr +
795 offsetof(struct public_port, local_admin_dcbx_mib);
796 data.local_admin = &p_hwfn->p_dcbx_info->local_admin;
797 data.size = sizeof(struct dcbx_local_params);
798 ecore_memcpy_from(p_hwfn, p_ptt, data.local_admin,
799 data.addr, data.size);
805 ecore_dcbx_read_dscp_mib(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt)
807 struct ecore_dcbx_mib_meta_data data;
809 data.addr = p_hwfn->mcp_info->port_addr +
810 offsetof(struct public_port, dcb_dscp_map);
811 data.dscp_map = &p_hwfn->p_dcbx_info->dscp_map;
812 data.size = sizeof(struct dcb_dscp_map);
813 ecore_memcpy_from(p_hwfn, p_ptt, data.dscp_map, data.addr, data.size);
816 static enum _ecore_status_t ecore_dcbx_read_mib(struct ecore_hwfn *p_hwfn,
817 struct ecore_ptt *p_ptt,
818 enum ecore_mib_read_type type)
820 enum _ecore_status_t rc = ECORE_INVAL;
823 case ECORE_DCBX_OPERATIONAL_MIB:
824 ecore_dcbx_read_dscp_mib(p_hwfn, p_ptt);
825 rc = ecore_dcbx_read_operational_mib(p_hwfn, p_ptt, type);
827 case ECORE_DCBX_REMOTE_MIB:
828 rc = ecore_dcbx_read_remote_mib(p_hwfn, p_ptt, type);
830 case ECORE_DCBX_LOCAL_MIB:
831 rc = ecore_dcbx_read_local_mib(p_hwfn, p_ptt);
833 case ECORE_DCBX_REMOTE_LLDP_MIB:
834 rc = ecore_dcbx_read_remote_lldp_mib(p_hwfn, p_ptt, type);
836 case ECORE_DCBX_LOCAL_LLDP_MIB:
837 rc = ecore_dcbx_read_local_lldp_mib(p_hwfn, p_ptt);
840 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type);
848 * Reconfigure QM and invoke PF update ramrod command if operational MIB
849 * change is detected.
852 ecore_dcbx_mib_update_event(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
853 enum ecore_mib_read_type type)
855 enum _ecore_status_t rc = ECORE_SUCCESS;
857 rc = ecore_dcbx_read_mib(p_hwfn, p_ptt, type);
861 if (type == ECORE_DCBX_OPERATIONAL_MIB) {
862 ecore_dcbx_get_dscp_params(p_hwfn, p_ptt,
863 &p_hwfn->p_dcbx_info->get);
865 rc = ecore_dcbx_process_mib_info(p_hwfn);
869 /* reconfigure tcs of QM queues according
870 * to negotiation results
872 ecore_qm_reconf(p_hwfn, p_ptt);
874 /* update storm FW with negotiation results */
875 ecore_sp_pf_update(p_hwfn);
877 /* set eagle enigne 1 flow control workaround
878 * according to negotiation results
880 enabled = p_hwfn->p_dcbx_info->results.dcbx_enabled;
883 ecore_dcbx_get_params(p_hwfn, p_ptt, &p_hwfn->p_dcbx_info->get, type);
885 /* Update the DSCP to TC mapping bit if required */
886 if ((type == ECORE_DCBX_OPERATIONAL_MIB) &&
887 p_hwfn->p_dcbx_info->dscp_nig_update) {
888 ecore_wr(p_hwfn, p_ptt, NIG_REG_DSCP_TO_TC_MAP_ENABLE, 0x1);
889 p_hwfn->p_dcbx_info->dscp_nig_update = false;
892 OSAL_DCBX_AEN(p_hwfn, type);
897 enum _ecore_status_t ecore_dcbx_info_alloc(struct ecore_hwfn *p_hwfn)
899 enum _ecore_status_t rc = ECORE_SUCCESS;
901 p_hwfn->p_dcbx_info = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL,
902 sizeof(*p_hwfn->p_dcbx_info));
903 if (!p_hwfn->p_dcbx_info) {
904 DP_NOTICE(p_hwfn, true,
905 "Failed to allocate `struct ecore_dcbx_info'");
912 void ecore_dcbx_info_free(struct ecore_hwfn *p_hwfn,
913 struct ecore_dcbx_info *p_dcbx_info)
915 OSAL_FREE(p_hwfn->p_dev, p_hwfn->p_dcbx_info);
918 static void ecore_dcbx_update_protocol_data(struct protocol_dcb_data *p_data,
919 struct ecore_dcbx_results *p_src,
920 enum dcbx_protocol_type type)
922 p_data->dcb_enable_flag = p_src->arr[type].enable;
923 p_data->dcb_priority = p_src->arr[type].priority;
924 p_data->dcb_tc = p_src->arr[type].tc;
925 p_data->dscp_enable_flag = p_src->arr[type].dscp_enable;
926 p_data->dscp_val = p_src->arr[type].dscp_val;
929 /* Set pf update ramrod command params */
930 void ecore_dcbx_set_pf_update_params(struct ecore_dcbx_results *p_src,
931 struct pf_update_ramrod_data *p_dest)
933 struct protocol_dcb_data *p_dcb_data;
936 p_dest->pf_id = p_src->pf_id;
938 update_flag = p_src->arr[DCBX_PROTOCOL_ETH].update;
939 p_dest->update_eth_dcb_data_mode = update_flag;
941 p_dcb_data = &p_dest->eth_dcb_data;
942 ecore_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ETH);
945 enum _ecore_status_t ecore_dcbx_query_params(struct ecore_hwfn *p_hwfn,
946 struct ecore_dcbx_get *p_get,
947 enum ecore_mib_read_type type)
949 struct ecore_ptt *p_ptt;
950 enum _ecore_status_t rc;
952 if (IS_VF(p_hwfn->p_dev))
955 p_ptt = ecore_ptt_acquire(p_hwfn);
958 DP_ERR(p_hwfn, "rc = %d\n", rc);
962 rc = ecore_dcbx_read_mib(p_hwfn, p_ptt, type);
963 if (rc != ECORE_SUCCESS)
966 rc = ecore_dcbx_get_params(p_hwfn, p_ptt, p_get, type);
969 ecore_ptt_release(p_hwfn, p_ptt);
974 ecore_dcbx_set_pfc_data(struct ecore_hwfn *p_hwfn,
975 u32 *pfc, struct ecore_dcbx_params *p_params)
980 if (p_params->pfc.willing)
981 *pfc |= DCBX_PFC_WILLING_MASK;
983 *pfc &= ~DCBX_PFC_WILLING_MASK;
985 if (p_params->pfc.enabled)
986 *pfc |= DCBX_PFC_ENABLED_MASK;
988 *pfc &= ~DCBX_PFC_ENABLED_MASK;
990 *pfc &= ~DCBX_PFC_CAPS_MASK;
991 *pfc |= (u32)p_params->pfc.max_tc << DCBX_PFC_CAPS_SHIFT;
993 for (i = 0; i < ECORE_MAX_PFC_PRIORITIES; i++)
994 if (p_params->pfc.prio[i])
996 *pfc &= ~DCBX_PFC_PRI_EN_BITMAP_MASK;
997 *pfc |= (pfc_map << DCBX_PFC_PRI_EN_BITMAP_SHIFT);
999 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "pfc = 0x%x\n", *pfc);
1003 ecore_dcbx_set_ets_data(struct ecore_hwfn *p_hwfn,
1004 struct dcbx_ets_feature *p_ets,
1005 struct ecore_dcbx_params *p_params)
1007 u8 *bw_map, *tsa_map;
1011 if (p_params->ets_willing)
1012 p_ets->flags |= DCBX_ETS_WILLING_MASK;
1014 p_ets->flags &= ~DCBX_ETS_WILLING_MASK;
1016 if (p_params->ets_cbs)
1017 p_ets->flags |= DCBX_ETS_CBS_MASK;
1019 p_ets->flags &= ~DCBX_ETS_CBS_MASK;
1021 if (p_params->ets_enabled)
1022 p_ets->flags |= DCBX_ETS_ENABLED_MASK;
1024 p_ets->flags &= ~DCBX_ETS_ENABLED_MASK;
1026 p_ets->flags &= ~DCBX_ETS_MAX_TCS_MASK;
1027 p_ets->flags |= (u32)p_params->max_ets_tc << DCBX_ETS_MAX_TCS_SHIFT;
1029 bw_map = (u8 *)&p_ets->tc_bw_tbl[0];
1030 tsa_map = (u8 *)&p_ets->tc_tsa_tbl[0];
1031 p_ets->pri_tc_tbl[0] = 0;
1032 for (i = 0; i < ECORE_MAX_PFC_PRIORITIES; i++) {
1033 bw_map[i] = p_params->ets_tc_bw_tbl[i];
1034 tsa_map[i] = p_params->ets_tc_tsa_tbl[i];
1035 /* Copy the priority value to the corresponding 4 bits in the
1036 * traffic class table.
1038 val = (((u32)p_params->ets_pri_tc_tbl[i]) << ((7 - i) * 4));
1039 p_ets->pri_tc_tbl[0] |= val;
1041 for (i = 0; i < 2; i++) {
1042 p_ets->tc_bw_tbl[i] = OSAL_CPU_TO_BE32(p_ets->tc_bw_tbl[i]);
1043 p_ets->tc_tsa_tbl[i] = OSAL_CPU_TO_BE32(p_ets->tc_tsa_tbl[i]);
1046 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
1047 "flags = 0x%x pri_tc = 0x%x tc_bwl[] = {0x%x, 0x%x} tc_tsa = {0x%x, 0x%x}\n",
1048 p_ets->flags, p_ets->pri_tc_tbl[0], p_ets->tc_bw_tbl[0],
1049 p_ets->tc_bw_tbl[1], p_ets->tc_tsa_tbl[0],
1050 p_ets->tc_tsa_tbl[1]);
1054 ecore_dcbx_set_app_data(struct ecore_hwfn *p_hwfn,
1055 struct dcbx_app_priority_feature *p_app,
1056 struct ecore_dcbx_params *p_params, bool ieee)
1061 if (p_params->app_willing)
1062 p_app->flags |= DCBX_APP_WILLING_MASK;
1064 p_app->flags &= ~DCBX_APP_WILLING_MASK;
1066 if (p_params->app_valid)
1067 p_app->flags |= DCBX_APP_ENABLED_MASK;
1069 p_app->flags &= ~DCBX_APP_ENABLED_MASK;
1071 p_app->flags &= ~DCBX_APP_NUM_ENTRIES_MASK;
1072 p_app->flags |= (u32)p_params->num_app_entries <<
1073 DCBX_APP_NUM_ENTRIES_SHIFT;
1075 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
1076 entry = &p_app->app_pri_tbl[i].entry;
1079 *entry &= ~(DCBX_APP_SF_IEEE_MASK | DCBX_APP_SF_MASK);
1080 switch (p_params->app_entry[i].sf_ieee) {
1081 case ECORE_DCBX_SF_IEEE_ETHTYPE:
1082 *entry |= ((u32)DCBX_APP_SF_IEEE_ETHTYPE <<
1083 DCBX_APP_SF_IEEE_SHIFT);
1084 *entry |= ((u32)DCBX_APP_SF_ETHTYPE <<
1087 case ECORE_DCBX_SF_IEEE_TCP_PORT:
1088 *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_PORT <<
1089 DCBX_APP_SF_IEEE_SHIFT);
1090 *entry |= ((u32)DCBX_APP_SF_PORT <<
1093 case ECORE_DCBX_SF_IEEE_UDP_PORT:
1094 *entry |= ((u32)DCBX_APP_SF_IEEE_UDP_PORT <<
1095 DCBX_APP_SF_IEEE_SHIFT);
1096 *entry |= ((u32)DCBX_APP_SF_PORT <<
1099 case ECORE_DCBX_SF_IEEE_TCP_UDP_PORT:
1100 *entry |= (u32)DCBX_APP_SF_IEEE_TCP_UDP_PORT <<
1101 DCBX_APP_SF_IEEE_SHIFT;
1102 *entry |= ((u32)DCBX_APP_SF_PORT <<
1107 *entry &= ~DCBX_APP_SF_MASK;
1108 if (p_params->app_entry[i].ethtype)
1109 *entry |= ((u32)DCBX_APP_SF_ETHTYPE <<
1112 *entry |= ((u32)DCBX_APP_SF_PORT <<
1115 *entry &= ~DCBX_APP_PROTOCOL_ID_MASK;
1116 *entry |= ((u32)p_params->app_entry[i].proto_id <<
1117 DCBX_APP_PROTOCOL_ID_SHIFT);
1118 *entry &= ~DCBX_APP_PRI_MAP_MASK;
1119 *entry |= ((u32)(p_params->app_entry[i].prio) <<
1120 DCBX_APP_PRI_MAP_SHIFT);
1123 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "flags = 0x%x\n", p_app->flags);
1126 static enum _ecore_status_t
1127 ecore_dcbx_set_local_params(struct ecore_hwfn *p_hwfn,
1128 struct dcbx_local_params *local_admin,
1129 struct ecore_dcbx_set *params)
1133 local_admin->flags = 0;
1134 OSAL_MEMCPY(&local_admin->features,
1135 &p_hwfn->p_dcbx_info->operational.features,
1136 sizeof(local_admin->features));
1138 if (params->enabled) {
1139 local_admin->config = params->ver_num;
1140 ieee = !!(params->ver_num & DCBX_CONFIG_VERSION_IEEE);
1142 local_admin->config = DCBX_CONFIG_VERSION_DISABLED;
1145 if (params->override_flags & ECORE_DCBX_OVERRIDE_PFC_CFG)
1146 ecore_dcbx_set_pfc_data(p_hwfn, &local_admin->features.pfc,
1147 ¶ms->config.params);
1149 if (params->override_flags & ECORE_DCBX_OVERRIDE_ETS_CFG)
1150 ecore_dcbx_set_ets_data(p_hwfn, &local_admin->features.ets,
1151 ¶ms->config.params);
1153 if (params->override_flags & ECORE_DCBX_OVERRIDE_APP_CFG)
1154 ecore_dcbx_set_app_data(p_hwfn, &local_admin->features.app,
1155 ¶ms->config.params, ieee);
1157 return ECORE_SUCCESS;
1160 static enum _ecore_status_t
1161 ecore_dcbx_set_dscp_params(struct ecore_hwfn *p_hwfn,
1162 struct dcb_dscp_map *p_dscp_map,
1163 struct ecore_dcbx_set *p_params)
1168 OSAL_MEMCPY(p_dscp_map, &p_hwfn->p_dcbx_info->dscp_map,
1169 sizeof(*p_dscp_map));
1171 p_dscp_map->flags &= ~DCB_DSCP_ENABLE_MASK;
1172 if (p_params->dscp.enabled)
1173 p_dscp_map->flags |= DCB_DSCP_ENABLE_MASK;
1175 for (i = 0, entry = 0; i < 8; i++) {
1177 for (j = 0; j < 8; j++, entry++)
1178 val |= (((u32)p_params->dscp.dscp_pri_map[entry]) <<
1181 p_dscp_map->dscp_pri_map[i] = OSAL_CPU_TO_BE32(val);
1184 p_hwfn->p_dcbx_info->dscp_nig_update = true;
1186 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "flags = 0x%x\n", p_dscp_map->flags);
1188 return ECORE_SUCCESS;
1191 enum _ecore_status_t ecore_dcbx_config_params(struct ecore_hwfn *p_hwfn,
1192 struct ecore_ptt *p_ptt,
1193 struct ecore_dcbx_set *params,
1196 struct dcbx_local_params local_admin;
1197 struct ecore_dcbx_mib_meta_data data;
1198 struct dcb_dscp_map dscp_map;
1199 u32 resp = 0, param = 0;
1200 enum _ecore_status_t rc = ECORE_SUCCESS;
1203 OSAL_MEMCPY(&p_hwfn->p_dcbx_info->set, params,
1204 sizeof(p_hwfn->p_dcbx_info->set));
1205 return ECORE_SUCCESS;
1208 /* clear set-parmas cache */
1209 OSAL_MEMSET(&p_hwfn->p_dcbx_info->set, 0,
1210 sizeof(struct ecore_dcbx_set));
1212 OSAL_MEMSET(&local_admin, 0, sizeof(local_admin));
1213 ecore_dcbx_set_local_params(p_hwfn, &local_admin, params);
1215 data.addr = p_hwfn->mcp_info->port_addr +
1216 offsetof(struct public_port, local_admin_dcbx_mib);
1217 data.local_admin = &local_admin;
1218 data.size = sizeof(struct dcbx_local_params);
1219 ecore_memcpy_to(p_hwfn, p_ptt, data.addr, data.local_admin, data.size);
1221 if (params->override_flags & ECORE_DCBX_OVERRIDE_DSCP_CFG) {
1222 OSAL_MEMSET(&dscp_map, 0, sizeof(dscp_map));
1223 ecore_dcbx_set_dscp_params(p_hwfn, &dscp_map, params);
1225 data.addr = p_hwfn->mcp_info->port_addr +
1226 offsetof(struct public_port, dcb_dscp_map);
1227 data.dscp_map = &dscp_map;
1228 data.size = sizeof(struct dcb_dscp_map);
1229 ecore_memcpy_to(p_hwfn, p_ptt, data.addr, data.dscp_map,
1233 rc = ecore_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_DCBX,
1234 1 << DRV_MB_PARAM_LLDP_SEND_SHIFT, &resp, ¶m);
1235 if (rc != ECORE_SUCCESS) {
1236 DP_NOTICE(p_hwfn, false,
1237 "Failed to send DCBX update request\n");
1244 enum _ecore_status_t ecore_dcbx_get_config_params(struct ecore_hwfn *p_hwfn,
1245 struct ecore_dcbx_set *params)
1247 struct ecore_dcbx_get *dcbx_info;
1250 if (p_hwfn->p_dcbx_info->set.config.valid) {
1251 OSAL_MEMCPY(params, &p_hwfn->p_dcbx_info->set,
1252 sizeof(struct ecore_dcbx_set));
1253 return ECORE_SUCCESS;
1256 dcbx_info = OSAL_ALLOC(p_hwfn->p_dev, GFP_KERNEL,
1257 sizeof(*dcbx_info));
1259 DP_ERR(p_hwfn, "Failed to allocate struct ecore_dcbx_info\n");
1263 OSAL_MEMSET(dcbx_info, 0, sizeof(*dcbx_info));
1264 rc = ecore_dcbx_query_params(p_hwfn, dcbx_info,
1265 ECORE_DCBX_OPERATIONAL_MIB);
1267 OSAL_FREE(p_hwfn->p_dev, dcbx_info);
1270 p_hwfn->p_dcbx_info->set.override_flags = 0;
1272 p_hwfn->p_dcbx_info->set.ver_num = DCBX_CONFIG_VERSION_DISABLED;
1273 if (dcbx_info->operational.cee)
1274 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_CEE;
1275 if (dcbx_info->operational.ieee)
1276 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_IEEE;
1277 if (dcbx_info->operational.local)
1278 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_STATIC;
1280 p_hwfn->p_dcbx_info->set.enabled = dcbx_info->operational.enabled;
1281 OSAL_MEMCPY(&p_hwfn->p_dcbx_info->set.config.params,
1282 &dcbx_info->operational.params,
1283 sizeof(struct ecore_dcbx_admin_params));
1284 p_hwfn->p_dcbx_info->set.config.valid = true;
1286 OSAL_MEMCPY(params, &p_hwfn->p_dcbx_info->set,
1287 sizeof(struct ecore_dcbx_set));
1289 OSAL_FREE(p_hwfn->p_dev, dcbx_info);
1291 return ECORE_SUCCESS;