net/qede/base: prevent transmitter stuck condition
[dpdk.git] / drivers / net / qede / base / ecore_dcbx.c
1 /*
2  * Copyright (c) 2016 QLogic Corporation.
3  * All rights reserved.
4  * www.qlogic.com
5  *
6  * See LICENSE.qede_pmd for copyright and licensing details.
7  */
8
9 #include "bcm_osal.h"
10 #include "ecore.h"
11 #include "ecore_sp_commands.h"
12 #include "ecore_dcbx.h"
13 #include "ecore_cxt.h"
14 #include "ecore_gtt_reg_addr.h"
15 #include "ecore_iro.h"
16 #include "ecore_iov_api.h"
17
18 #define ECORE_DCBX_MAX_MIB_READ_TRY     (100)
19 #define ECORE_ETH_TYPE_DEFAULT          (0)
20
21 #define ECORE_DCBX_INVALID_PRIORITY     0xFF
22
23 /* Get Traffic Class from priority traffic class table, 4 bits represent
24  * the traffic class corresponding to the priority.
25  */
26 #define ECORE_DCBX_PRIO2TC(prio_tc_tbl, prio) \
27                 ((u32)(prio_tc_tbl >> ((7 - prio) * 4)) & 0x7)
28
29 static bool ecore_dcbx_app_ethtype(u32 app_info_bitmap)
30 {
31         return !!(ECORE_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) ==
32                   DCBX_APP_SF_ETHTYPE);
33 }
34
35 static bool ecore_dcbx_ieee_app_ethtype(u32 app_info_bitmap)
36 {
37         u8 mfw_val = ECORE_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE);
38
39         /* Old MFW */
40         if (mfw_val == DCBX_APP_SF_IEEE_RESERVED)
41                 return ecore_dcbx_app_ethtype(app_info_bitmap);
42
43         return !!(mfw_val == DCBX_APP_SF_IEEE_ETHTYPE);
44 }
45
46 static bool ecore_dcbx_app_port(u32 app_info_bitmap)
47 {
48         return !!(ECORE_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) ==
49                   DCBX_APP_SF_PORT);
50 }
51
52 static bool ecore_dcbx_ieee_app_port(u32 app_info_bitmap, u8 type)
53 {
54         u8 mfw_val = ECORE_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE);
55
56         /* Old MFW */
57         if (mfw_val == DCBX_APP_SF_IEEE_RESERVED)
58                 return ecore_dcbx_app_port(app_info_bitmap);
59
60         return !!(mfw_val == type || mfw_val == DCBX_APP_SF_IEEE_TCP_UDP_PORT);
61 }
62
63 static bool ecore_dcbx_default_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
64 {
65         bool ethtype;
66
67         if (ieee)
68                 ethtype = ecore_dcbx_ieee_app_ethtype(app_info_bitmap);
69         else
70                 ethtype = ecore_dcbx_app_ethtype(app_info_bitmap);
71
72         return !!(ethtype && (proto_id == ECORE_ETH_TYPE_DEFAULT));
73 }
74
75 static void
76 ecore_dcbx_dp_protocol(struct ecore_hwfn *p_hwfn,
77                        struct ecore_dcbx_results *p_data)
78 {
79         enum dcbx_protocol_type id;
80         int i;
81
82         DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "DCBX negotiated: %d\n",
83                    p_data->dcbx_enabled);
84
85         for (i = 0; i < OSAL_ARRAY_SIZE(ecore_dcbx_app_update); i++) {
86                 id = ecore_dcbx_app_update[i].id;
87
88                 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
89                            "%s info: update %d, enable %d, prio %d, tc %d,"
90                            " num_active_tc %d dscp_enable = %d dscp_val = %d\n",
91                            ecore_dcbx_app_update[i].name,
92                            p_data->arr[id].update,
93                            p_data->arr[id].enable, p_data->arr[id].priority,
94                            p_data->arr[id].tc, p_hwfn->hw_info.num_active_tc,
95                            p_data->arr[id].dscp_enable,
96                            p_data->arr[id].dscp_val);
97         }
98 }
99
100 void
101 ecore_dcbx_set_params(struct ecore_dcbx_results *p_data,
102                       struct ecore_hwfn *p_hwfn,
103                       bool enable, u8 prio, u8 tc,
104                       enum dcbx_protocol_type type,
105                       enum ecore_pci_personality personality)
106 {
107         struct ecore_dcbx_dscp_params *dscp = &p_hwfn->p_dcbx_info->get.dscp;
108
109         /* PF update ramrod data */
110         p_data->arr[type].enable = enable;
111         p_data->arr[type].priority = prio;
112         p_data->arr[type].tc = tc;
113         p_data->arr[type].dscp_enable = dscp->enabled;
114         if (p_data->arr[type].dscp_enable) {
115                 u8 i;
116
117                 for (i = 0; i < ECORE_DCBX_DSCP_SIZE; i++)
118                         if (prio == dscp->dscp_pri_map[i]) {
119                                 p_data->arr[type].dscp_val = i;
120                                 break;
121                         }
122         }
123
124         if (enable && p_data->arr[type].dscp_enable)
125                 p_data->arr[type].update = UPDATE_DCB_DSCP;
126         else if (enable)
127                 p_data->arr[type].update = UPDATE_DCB;
128         else
129                 p_data->arr[type].update = DONT_UPDATE_DCB_DSCP;
130
131         /* QM reconf data */
132         if (p_hwfn->hw_info.personality == personality)
133                 p_hwfn->hw_info.offload_tc = tc;
134 }
135
136 /* Update app protocol data and hw_info fields with the TLV info */
137 static void
138 ecore_dcbx_update_app_info(struct ecore_dcbx_results *p_data,
139                            struct ecore_hwfn *p_hwfn,
140                            bool enable, u8 prio, u8 tc,
141                            enum dcbx_protocol_type type)
142 {
143         enum ecore_pci_personality personality;
144         enum dcbx_protocol_type id;
145         const char *name;       /* @DPDK */
146         int i;
147
148         for (i = 0; i < OSAL_ARRAY_SIZE(ecore_dcbx_app_update); i++) {
149                 id = ecore_dcbx_app_update[i].id;
150
151                 if (type != id)
152                         continue;
153
154                 personality = ecore_dcbx_app_update[i].personality;
155                 name = ecore_dcbx_app_update[i].name;
156
157                 ecore_dcbx_set_params(p_data, p_hwfn, enable,
158                                       prio, tc, type, personality);
159         }
160 }
161
162 static enum _ecore_status_t
163 ecore_dcbx_get_app_priority(u8 pri_bitmap, u8 *priority)
164 {
165         u32 pri_mask, pri = ECORE_MAX_PFC_PRIORITIES;
166         u32 index = ECORE_MAX_PFC_PRIORITIES - 1;
167         enum _ecore_status_t rc = ECORE_SUCCESS;
168
169         /* Bitmap 1 corresponds to priority 0, return priority 0 */
170         if (pri_bitmap == 1) {
171                 *priority = 0;
172                 return rc;
173         }
174
175         /* Choose the highest priority */
176         while ((pri == ECORE_MAX_PFC_PRIORITIES) && index) {
177                 pri_mask = 1 << index;
178                 if (pri_bitmap & pri_mask)
179                         pri = index;
180                 index--;
181         }
182
183         if (pri < ECORE_MAX_PFC_PRIORITIES)
184                 *priority = (u8)pri;
185         else
186                 rc = ECORE_INVAL;
187
188         return rc;
189 }
190
191 static bool
192 ecore_dcbx_get_app_protocol_type(struct ecore_hwfn *p_hwfn,
193                                  u32 app_prio_bitmap, u16 id,
194                                  enum dcbx_protocol_type *type, bool ieee)
195 {
196         if (ecore_dcbx_default_tlv(app_prio_bitmap, id, ieee)) {
197                 *type = DCBX_PROTOCOL_ETH;
198         } else {
199                 *type = DCBX_MAX_PROTOCOL_TYPE;
200                 DP_ERR(p_hwfn,
201                        "No action required, App TLV id = 0x%x"
202                        " app_prio_bitmap = 0x%x\n",
203                        id, app_prio_bitmap);
204                 return false;
205         }
206
207         return true;
208 }
209
210 /*  Parse app TLV's to update TC information in hw_info structure for
211  * reconfiguring QM. Get protocol specific data for PF update ramrod command.
212  */
213 static enum _ecore_status_t
214 ecore_dcbx_process_tlv(struct ecore_hwfn *p_hwfn,
215                        struct ecore_dcbx_results *p_data,
216                        struct dcbx_app_priority_entry *p_tbl, u32 pri_tc_tbl,
217                        int count, u8 dcbx_version)
218 {
219         enum dcbx_protocol_type type;
220         u8 tc, priority_map;
221         bool enable, ieee;
222         u16 protocol_id;
223         u8 priority;
224         enum _ecore_status_t rc = ECORE_SUCCESS;
225         int i;
226
227         DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
228                    "Num APP entries = %d pri_tc_tbl = 0x%x dcbx_version = %u\n",
229                    count, pri_tc_tbl, dcbx_version);
230
231         ieee = (dcbx_version == DCBX_CONFIG_VERSION_IEEE);
232         /* Parse APP TLV */
233         for (i = 0; i < count; i++) {
234                 protocol_id = ECORE_MFW_GET_FIELD(p_tbl[i].entry,
235                                                   DCBX_APP_PROTOCOL_ID);
236                 priority_map = ECORE_MFW_GET_FIELD(p_tbl[i].entry,
237                                                    DCBX_APP_PRI_MAP);
238                 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "Id = 0x%x pri_map = %u\n",
239                            protocol_id, priority_map);
240                 rc = ecore_dcbx_get_app_priority(priority_map, &priority);
241                 if (rc == ECORE_INVAL) {
242                         DP_ERR(p_hwfn, "Invalid priority\n");
243                         return ECORE_INVAL;
244                 }
245
246                 tc = ECORE_DCBX_PRIO2TC(pri_tc_tbl, priority);
247                 if (ecore_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry,
248                                                      protocol_id, &type,
249                                                      ieee)) {
250                         /* ETH always have the enable bit reset, as it gets
251                          * vlan information per packet. For other protocols,
252                          * should be set according to the dcbx_enabled
253                          * indication, but we only got here if there was an
254                          * app tlv for the protocol, so dcbx must be enabled.
255                          */
256                         enable = !(type == DCBX_PROTOCOL_ETH);
257
258                         ecore_dcbx_update_app_info(p_data, p_hwfn, enable,
259                                                    priority, tc, type);
260                 }
261         }
262         /* Update ramrod protocol data and hw_info fields
263          * with default info when corresponding APP TLV's are not detected.
264          * The enabled field has a different logic for ethernet as only for
265          * ethernet dcb should disabled by default, as the information arrives
266          * from the OS (unless an explicit app tlv was present).
267          */
268         tc = p_data->arr[DCBX_PROTOCOL_ETH].tc;
269         priority = p_data->arr[DCBX_PROTOCOL_ETH].priority;
270         for (type = 0; type < DCBX_MAX_PROTOCOL_TYPE; type++) {
271                 if (p_data->arr[type].update)
272                         continue;
273
274                 enable = (type == DCBX_PROTOCOL_ETH) ? false : !!dcbx_version;
275                 ecore_dcbx_update_app_info(p_data, p_hwfn, enable,
276                                            priority, tc, type);
277         }
278
279         return ECORE_SUCCESS;
280 }
281
282 /* Parse app TLV's to update TC information in hw_info structure for
283  * reconfiguring QM. Get protocol specific data for PF update ramrod command.
284  */
285 static enum _ecore_status_t
286 ecore_dcbx_process_mib_info(struct ecore_hwfn *p_hwfn)
287 {
288         struct dcbx_app_priority_feature *p_app;
289         enum _ecore_status_t rc = ECORE_SUCCESS;
290         struct ecore_dcbx_results data = { 0 };
291         struct dcbx_app_priority_entry *p_tbl;
292         struct dcbx_ets_feature *p_ets;
293         struct ecore_hw_info *p_info;
294         u32 pri_tc_tbl, flags;
295         u8 dcbx_version;
296         int num_entries;
297
298         flags = p_hwfn->p_dcbx_info->operational.flags;
299         dcbx_version = ECORE_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION);
300
301         p_app = &p_hwfn->p_dcbx_info->operational.features.app;
302         p_tbl = p_app->app_pri_tbl;
303
304         p_ets = &p_hwfn->p_dcbx_info->operational.features.ets;
305         pri_tc_tbl = p_ets->pri_tc_tbl[0];
306
307         p_info = &p_hwfn->hw_info;
308         num_entries = ECORE_MFW_GET_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES);
309
310         rc = ecore_dcbx_process_tlv(p_hwfn, &data, p_tbl, pri_tc_tbl,
311                                     num_entries, dcbx_version);
312         if (rc != ECORE_SUCCESS)
313                 return rc;
314
315         p_info->num_active_tc = ECORE_MFW_GET_FIELD(p_ets->flags,
316                                                     DCBX_ETS_MAX_TCS);
317         p_hwfn->qm_info.ooo_tc = ECORE_MFW_GET_FIELD(p_ets->flags, DCBX_OOO_TC);
318         data.pf_id = p_hwfn->rel_pf_id;
319         data.dcbx_enabled = !!dcbx_version;
320
321         ecore_dcbx_dp_protocol(p_hwfn, &data);
322
323         OSAL_MEMCPY(&p_hwfn->p_dcbx_info->results, &data,
324                     sizeof(struct ecore_dcbx_results));
325
326         return ECORE_SUCCESS;
327 }
328
329 static enum _ecore_status_t
330 ecore_dcbx_copy_mib(struct ecore_hwfn *p_hwfn,
331                     struct ecore_ptt *p_ptt,
332                     struct ecore_dcbx_mib_meta_data *p_data,
333                     enum ecore_mib_read_type type)
334 {
335         enum _ecore_status_t rc = ECORE_SUCCESS;
336         u32 prefix_seq_num, suffix_seq_num;
337         int read_count = 0;
338
339         /* The data is considered to be valid only if both sequence numbers are
340          * the same.
341          */
342         do {
343                 if (type == ECORE_DCBX_REMOTE_LLDP_MIB) {
344                         ecore_memcpy_from(p_hwfn, p_ptt, p_data->lldp_remote,
345                                           p_data->addr, p_data->size);
346                         prefix_seq_num = p_data->lldp_remote->prefix_seq_num;
347                         suffix_seq_num = p_data->lldp_remote->suffix_seq_num;
348                 } else {
349                         ecore_memcpy_from(p_hwfn, p_ptt, p_data->mib,
350                                           p_data->addr, p_data->size);
351                         prefix_seq_num = p_data->mib->prefix_seq_num;
352                         suffix_seq_num = p_data->mib->suffix_seq_num;
353                 }
354                 read_count++;
355
356                 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
357                            "mib type = %d, try count = %d prefix seq num  ="
358                            " %d suffix seq num = %d\n",
359                            type, read_count, prefix_seq_num, suffix_seq_num);
360         } while ((prefix_seq_num != suffix_seq_num) &&
361                  (read_count < ECORE_DCBX_MAX_MIB_READ_TRY));
362
363         if (read_count >= ECORE_DCBX_MAX_MIB_READ_TRY) {
364                 DP_ERR(p_hwfn,
365                        "MIB read err, mib type = %d, try count ="
366                        " %d prefix seq num = %d suffix seq num = %d\n",
367                        type, read_count, prefix_seq_num, suffix_seq_num);
368                 rc = ECORE_IO;
369         }
370
371         return rc;
372 }
373
374 static void
375 ecore_dcbx_get_priority_info(struct ecore_hwfn *p_hwfn,
376                              struct ecore_dcbx_app_prio *p_prio,
377                              struct ecore_dcbx_results *p_results)
378 {
379         u8 val;
380
381         if (p_results->arr[DCBX_PROTOCOL_ETH].update &&
382             p_results->arr[DCBX_PROTOCOL_ETH].enable)
383                 p_prio->eth = p_results->arr[DCBX_PROTOCOL_ETH].priority;
384
385         DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
386                    "Priorities: eth %d\n",
387                    p_prio->eth);
388 }
389
390 static void
391 ecore_dcbx_get_app_data(struct ecore_hwfn *p_hwfn,
392                         struct dcbx_app_priority_feature *p_app,
393                         struct dcbx_app_priority_entry *p_tbl,
394                         struct ecore_dcbx_params *p_params, bool ieee)
395 {
396         struct ecore_app_entry *entry;
397         u8 pri_map;
398         int i;
399
400         p_params->app_willing = ECORE_MFW_GET_FIELD(p_app->flags,
401                                                     DCBX_APP_WILLING);
402         p_params->app_valid = ECORE_MFW_GET_FIELD(p_app->flags,
403                                                   DCBX_APP_ENABLED);
404         p_params->app_error = ECORE_MFW_GET_FIELD(p_app->flags, DCBX_APP_ERROR);
405         p_params->num_app_entries = ECORE_MFW_GET_FIELD(p_app->flags,
406                                                         DCBX_APP_NUM_ENTRIES);
407         for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
408                 entry = &p_params->app_entry[i];
409                 if (ieee) {
410                         u8 sf_ieee;
411                         u32 val;
412
413                         sf_ieee = ECORE_MFW_GET_FIELD(p_tbl[i].entry,
414                                                       DCBX_APP_SF_IEEE);
415                         switch (sf_ieee) {
416                         case DCBX_APP_SF_IEEE_RESERVED:
417                                 /* Old MFW */
418                                 val = ECORE_MFW_GET_FIELD(p_tbl[i].entry,
419                                                             DCBX_APP_SF);
420                                 entry->sf_ieee = val ?
421                                         ECORE_DCBX_SF_IEEE_TCP_UDP_PORT :
422                                         ECORE_DCBX_SF_IEEE_ETHTYPE;
423                                 break;
424                         case DCBX_APP_SF_IEEE_ETHTYPE:
425                                 entry->sf_ieee = ECORE_DCBX_SF_IEEE_ETHTYPE;
426                                 break;
427                         case DCBX_APP_SF_IEEE_TCP_PORT:
428                                 entry->sf_ieee = ECORE_DCBX_SF_IEEE_TCP_PORT;
429                                 break;
430                         case DCBX_APP_SF_IEEE_UDP_PORT:
431                                 entry->sf_ieee = ECORE_DCBX_SF_IEEE_UDP_PORT;
432                                 break;
433                         case DCBX_APP_SF_IEEE_TCP_UDP_PORT:
434                                 entry->sf_ieee =
435                                                 ECORE_DCBX_SF_IEEE_TCP_UDP_PORT;
436                                 break;
437                         }
438                 } else {
439                         entry->ethtype = !(ECORE_MFW_GET_FIELD(p_tbl[i].entry,
440                                                                DCBX_APP_SF));
441                 }
442
443                 pri_map = ECORE_MFW_GET_FIELD(p_tbl[i].entry, DCBX_APP_PRI_MAP);
444                 ecore_dcbx_get_app_priority(pri_map, &entry->prio);
445                 entry->proto_id = ECORE_MFW_GET_FIELD(p_tbl[i].entry,
446                                                       DCBX_APP_PROTOCOL_ID);
447                 ecore_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry,
448                                                  entry->proto_id,
449                                                  &entry->proto_type, ieee);
450         }
451
452         DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
453                    "APP params: willing %d, valid %d error = %d\n",
454                    p_params->app_willing, p_params->app_valid,
455                    p_params->app_error);
456 }
457
458 static void
459 ecore_dcbx_get_pfc_data(struct ecore_hwfn *p_hwfn,
460                         u32 pfc, struct ecore_dcbx_params *p_params)
461 {
462         u8 pfc_map;
463
464         p_params->pfc.willing = ECORE_MFW_GET_FIELD(pfc, DCBX_PFC_WILLING);
465         p_params->pfc.max_tc = ECORE_MFW_GET_FIELD(pfc, DCBX_PFC_CAPS);
466         p_params->pfc.enabled = ECORE_MFW_GET_FIELD(pfc, DCBX_PFC_ENABLED);
467         pfc_map = ECORE_MFW_GET_FIELD(pfc, DCBX_PFC_PRI_EN_BITMAP);
468         p_params->pfc.prio[0] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_0);
469         p_params->pfc.prio[1] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_1);
470         p_params->pfc.prio[2] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_2);
471         p_params->pfc.prio[3] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_3);
472         p_params->pfc.prio[4] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_4);
473         p_params->pfc.prio[5] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_5);
474         p_params->pfc.prio[6] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_6);
475         p_params->pfc.prio[7] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_7);
476
477         DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
478                    "PFC params: willing %d, pfc_bitmap %u max_tc = %u enabled = %d\n",
479                    p_params->pfc.willing, pfc_map, p_params->pfc.max_tc,
480                    p_params->pfc.enabled);
481 }
482
483 static void
484 ecore_dcbx_get_ets_data(struct ecore_hwfn *p_hwfn,
485                         struct dcbx_ets_feature *p_ets,
486                         struct ecore_dcbx_params *p_params)
487 {
488         u32 bw_map[2], tsa_map[2], pri_map;
489         int i;
490
491         p_params->ets_willing = ECORE_MFW_GET_FIELD(p_ets->flags,
492                                                     DCBX_ETS_WILLING);
493         p_params->ets_enabled = ECORE_MFW_GET_FIELD(p_ets->flags,
494                                                     DCBX_ETS_ENABLED);
495         p_params->ets_cbs = ECORE_MFW_GET_FIELD(p_ets->flags, DCBX_ETS_CBS);
496         p_params->max_ets_tc = ECORE_MFW_GET_FIELD(p_ets->flags,
497                                                    DCBX_ETS_MAX_TCS);
498         DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
499                    "ETS params: willing %d, enabled = %d ets_cbs %d pri_tc_tbl_0 %x max_ets_tc %d\n",
500                    p_params->ets_willing, p_params->ets_enabled,
501                    p_params->ets_cbs, p_ets->pri_tc_tbl[0],
502                    p_params->max_ets_tc);
503
504         /* 8 bit tsa and bw data corresponding to each of the 8 TC's are
505          * encoded in a type u32 array of size 2.
506          */
507         bw_map[0] = OSAL_BE32_TO_CPU(p_ets->tc_bw_tbl[0]);
508         bw_map[1] = OSAL_BE32_TO_CPU(p_ets->tc_bw_tbl[1]);
509         tsa_map[0] = OSAL_BE32_TO_CPU(p_ets->tc_tsa_tbl[0]);
510         tsa_map[1] = OSAL_BE32_TO_CPU(p_ets->tc_tsa_tbl[1]);
511         pri_map = p_ets->pri_tc_tbl[0];
512         for (i = 0; i < ECORE_MAX_PFC_PRIORITIES; i++) {
513                 p_params->ets_tc_bw_tbl[i] = ((u8 *)bw_map)[i];
514                 p_params->ets_tc_tsa_tbl[i] = ((u8 *)tsa_map)[i];
515                 p_params->ets_pri_tc_tbl[i] = ECORE_DCBX_PRIO2TC(pri_map, i);
516                 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
517                            "elem %d  bw_tbl %x tsa_tbl %x\n",
518                            i, p_params->ets_tc_bw_tbl[i],
519                            p_params->ets_tc_tsa_tbl[i]);
520         }
521 }
522
523 static void
524 ecore_dcbx_get_common_params(struct ecore_hwfn *p_hwfn,
525                              struct dcbx_app_priority_feature *p_app,
526                              struct dcbx_app_priority_entry *p_tbl,
527                              struct dcbx_ets_feature *p_ets,
528                              u32 pfc, struct ecore_dcbx_params *p_params,
529                              bool ieee)
530 {
531         ecore_dcbx_get_app_data(p_hwfn, p_app, p_tbl, p_params, ieee);
532         ecore_dcbx_get_ets_data(p_hwfn, p_ets, p_params);
533         ecore_dcbx_get_pfc_data(p_hwfn, pfc, p_params);
534 }
535
536 static void
537 ecore_dcbx_get_local_params(struct ecore_hwfn *p_hwfn,
538                             struct ecore_ptt *p_ptt,
539                             struct ecore_dcbx_get *params)
540 {
541         struct dcbx_features *p_feat;
542
543         p_feat = &p_hwfn->p_dcbx_info->local_admin.features;
544         ecore_dcbx_get_common_params(p_hwfn, &p_feat->app,
545                                      p_feat->app.app_pri_tbl, &p_feat->ets,
546                                      p_feat->pfc, &params->local.params, false);
547         params->local.valid = true;
548 }
549
550 static void
551 ecore_dcbx_get_remote_params(struct ecore_hwfn *p_hwfn,
552                              struct ecore_ptt *p_ptt,
553                              struct ecore_dcbx_get *params)
554 {
555         struct dcbx_features *p_feat;
556
557         p_feat = &p_hwfn->p_dcbx_info->remote.features;
558         ecore_dcbx_get_common_params(p_hwfn, &p_feat->app,
559                                      p_feat->app.app_pri_tbl, &p_feat->ets,
560                                      p_feat->pfc, &params->remote.params,
561                                      false);
562         params->remote.valid = true;
563 }
564
565 static enum _ecore_status_t
566 ecore_dcbx_get_operational_params(struct ecore_hwfn *p_hwfn,
567                                   struct ecore_ptt *p_ptt,
568                                   struct ecore_dcbx_get *params)
569 {
570         struct ecore_dcbx_operational_params *p_operational;
571         struct ecore_dcbx_results *p_results;
572         struct dcbx_features *p_feat;
573         bool enabled, err;
574         u32 flags;
575         bool val;
576
577         flags = p_hwfn->p_dcbx_info->operational.flags;
578
579         /* If DCBx version is non zero, then negotiation
580          * was successfuly performed
581          */
582         p_operational = &params->operational;
583         enabled = !!(ECORE_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) !=
584                      DCBX_CONFIG_VERSION_DISABLED);
585         if (!enabled) {
586                 p_operational->enabled = enabled;
587                 p_operational->valid = false;
588                 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "Dcbx is disabled\n");
589                 return ECORE_INVAL;
590         }
591
592         p_feat = &p_hwfn->p_dcbx_info->operational.features;
593         p_results = &p_hwfn->p_dcbx_info->results;
594
595         val = !!(ECORE_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) ==
596                  DCBX_CONFIG_VERSION_IEEE);
597         p_operational->ieee = val;
598
599         val = !!(ECORE_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) ==
600                  DCBX_CONFIG_VERSION_CEE);
601         p_operational->cee = val;
602
603         val = !!(ECORE_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) ==
604                  DCBX_CONFIG_VERSION_STATIC);
605         p_operational->local = val;
606
607         DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
608                    "Version support: ieee %d, cee %d, static %d\n",
609                    p_operational->ieee, p_operational->cee,
610                    p_operational->local);
611
612         ecore_dcbx_get_common_params(p_hwfn, &p_feat->app,
613                                      p_feat->app.app_pri_tbl, &p_feat->ets,
614                                      p_feat->pfc, &params->operational.params,
615                                      p_operational->ieee);
616         ecore_dcbx_get_priority_info(p_hwfn, &p_operational->app_prio,
617                                      p_results);
618         err = ECORE_MFW_GET_FIELD(p_feat->app.flags, DCBX_APP_ERROR);
619         p_operational->err = err;
620         p_operational->enabled = enabled;
621         p_operational->valid = true;
622
623         return ECORE_SUCCESS;
624 }
625
626 static void
627 ecore_dcbx_get_dscp_params(struct ecore_hwfn *p_hwfn,
628                            struct ecore_ptt *p_ptt,
629                            struct ecore_dcbx_get *params)
630 {
631         struct ecore_dcbx_dscp_params *p_dscp;
632         struct dcb_dscp_map *p_dscp_map;
633         int i, j, entry;
634         u32 pri_map;
635
636         p_dscp = &params->dscp;
637         p_dscp_map = &p_hwfn->p_dcbx_info->dscp_map;
638         p_dscp->enabled = ECORE_MFW_GET_FIELD(p_dscp_map->flags,
639                                               DCB_DSCP_ENABLE);
640         /* MFW encodes 64 dscp entries into 8 element array of u32 entries,
641          * where each entry holds the 4bit priority map for 8 dscp entries.
642          */
643         for (i = 0, entry = 0; i < ECORE_DCBX_DSCP_SIZE / 8; i++) {
644                 pri_map = OSAL_BE32_TO_CPU(p_dscp_map->dscp_pri_map[i]);
645                 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "elem %d pri_map 0x%x\n",
646                            entry, pri_map);
647                 for (j = 0; j < ECORE_DCBX_DSCP_SIZE / 8; j++, entry++)
648                         p_dscp->dscp_pri_map[entry] = (u32)(pri_map >>
649                                                            (j * 4)) & 0xf;
650         }
651 }
652
653 static void
654 ecore_dcbx_get_local_lldp_params(struct ecore_hwfn *p_hwfn,
655                                  struct ecore_ptt *p_ptt,
656                                  struct ecore_dcbx_get *params)
657 {
658         struct lldp_config_params_s *p_local;
659
660         p_local = &p_hwfn->p_dcbx_info->lldp_local[LLDP_NEAREST_BRIDGE];
661
662         OSAL_MEMCPY(params->lldp_local.local_chassis_id,
663                     p_local->local_chassis_id,
664                     OSAL_ARRAY_SIZE(p_local->local_chassis_id));
665         OSAL_MEMCPY(params->lldp_local.local_port_id, p_local->local_port_id,
666                     OSAL_ARRAY_SIZE(p_local->local_port_id));
667 }
668
669 static void
670 ecore_dcbx_get_remote_lldp_params(struct ecore_hwfn *p_hwfn,
671                                   struct ecore_ptt *p_ptt,
672                                   struct ecore_dcbx_get *params)
673 {
674         struct lldp_status_params_s *p_remote;
675
676         p_remote = &p_hwfn->p_dcbx_info->lldp_remote[LLDP_NEAREST_BRIDGE];
677
678         OSAL_MEMCPY(params->lldp_remote.peer_chassis_id,
679                     p_remote->peer_chassis_id,
680                     OSAL_ARRAY_SIZE(p_remote->peer_chassis_id));
681         OSAL_MEMCPY(params->lldp_remote.peer_port_id, p_remote->peer_port_id,
682                     OSAL_ARRAY_SIZE(p_remote->peer_port_id));
683 }
684
685 static enum _ecore_status_t
686 ecore_dcbx_get_params(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
687                       struct ecore_dcbx_get *p_params,
688                       enum ecore_mib_read_type type)
689 {
690         enum _ecore_status_t rc = ECORE_SUCCESS;
691
692         switch (type) {
693         case ECORE_DCBX_REMOTE_MIB:
694                 ecore_dcbx_get_remote_params(p_hwfn, p_ptt, p_params);
695                 break;
696         case ECORE_DCBX_LOCAL_MIB:
697                 ecore_dcbx_get_local_params(p_hwfn, p_ptt, p_params);
698                 break;
699         case ECORE_DCBX_OPERATIONAL_MIB:
700                 ecore_dcbx_get_operational_params(p_hwfn, p_ptt, p_params);
701                 break;
702         case ECORE_DCBX_REMOTE_LLDP_MIB:
703                 ecore_dcbx_get_remote_lldp_params(p_hwfn, p_ptt, p_params);
704                 break;
705         case ECORE_DCBX_LOCAL_LLDP_MIB:
706                 ecore_dcbx_get_local_lldp_params(p_hwfn, p_ptt, p_params);
707                 break;
708         default:
709                 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type);
710                 return ECORE_INVAL;
711         }
712
713         return rc;
714 }
715
716 static enum _ecore_status_t
717 ecore_dcbx_read_local_lldp_mib(struct ecore_hwfn *p_hwfn,
718                                struct ecore_ptt *p_ptt)
719 {
720         struct ecore_dcbx_mib_meta_data data;
721         enum _ecore_status_t rc = ECORE_SUCCESS;
722
723         OSAL_MEM_ZERO(&data, sizeof(data));
724         data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port,
725                                                            lldp_config_params);
726         data.lldp_local = p_hwfn->p_dcbx_info->lldp_local;
727         data.size = sizeof(struct lldp_config_params_s);
728         ecore_memcpy_from(p_hwfn, p_ptt, data.lldp_local, data.addr, data.size);
729
730         return rc;
731 }
732
733 static enum _ecore_status_t
734 ecore_dcbx_read_remote_lldp_mib(struct ecore_hwfn *p_hwfn,
735                                 struct ecore_ptt *p_ptt,
736                                 enum ecore_mib_read_type type)
737 {
738         struct ecore_dcbx_mib_meta_data data;
739         enum _ecore_status_t rc = ECORE_SUCCESS;
740
741         OSAL_MEM_ZERO(&data, sizeof(data));
742         data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port,
743                                                            lldp_status_params);
744         data.lldp_remote = p_hwfn->p_dcbx_info->lldp_remote;
745         data.size = sizeof(struct lldp_status_params_s);
746         rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
747
748         return rc;
749 }
750
751 static enum _ecore_status_t
752 ecore_dcbx_read_operational_mib(struct ecore_hwfn *p_hwfn,
753                                 struct ecore_ptt *p_ptt,
754                                 enum ecore_mib_read_type type)
755 {
756         struct ecore_dcbx_mib_meta_data data;
757         enum _ecore_status_t rc = ECORE_SUCCESS;
758
759         OSAL_MEM_ZERO(&data, sizeof(data));
760         data.addr = p_hwfn->mcp_info->port_addr +
761             offsetof(struct public_port, operational_dcbx_mib);
762         data.mib = &p_hwfn->p_dcbx_info->operational;
763         data.size = sizeof(struct dcbx_mib);
764         rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
765
766         return rc;
767 }
768
769 static enum _ecore_status_t
770 ecore_dcbx_read_remote_mib(struct ecore_hwfn *p_hwfn,
771                            struct ecore_ptt *p_ptt,
772                            enum ecore_mib_read_type type)
773 {
774         struct ecore_dcbx_mib_meta_data data;
775         enum _ecore_status_t rc = ECORE_SUCCESS;
776
777         OSAL_MEM_ZERO(&data, sizeof(data));
778         data.addr = p_hwfn->mcp_info->port_addr +
779             offsetof(struct public_port, remote_dcbx_mib);
780         data.mib = &p_hwfn->p_dcbx_info->remote;
781         data.size = sizeof(struct dcbx_mib);
782         rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
783
784         return rc;
785 }
786
787 static enum _ecore_status_t
788 ecore_dcbx_read_local_mib(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt)
789 {
790         struct ecore_dcbx_mib_meta_data data;
791         enum _ecore_status_t rc = ECORE_SUCCESS;
792
793         OSAL_MEM_ZERO(&data, sizeof(data));
794         data.addr = p_hwfn->mcp_info->port_addr +
795             offsetof(struct public_port, local_admin_dcbx_mib);
796         data.local_admin = &p_hwfn->p_dcbx_info->local_admin;
797         data.size = sizeof(struct dcbx_local_params);
798         ecore_memcpy_from(p_hwfn, p_ptt, data.local_admin,
799                           data.addr, data.size);
800
801         return rc;
802 }
803
804 static void
805 ecore_dcbx_read_dscp_mib(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt)
806 {
807         struct ecore_dcbx_mib_meta_data data;
808
809         data.addr = p_hwfn->mcp_info->port_addr +
810                         offsetof(struct public_port, dcb_dscp_map);
811         data.dscp_map = &p_hwfn->p_dcbx_info->dscp_map;
812         data.size = sizeof(struct dcb_dscp_map);
813         ecore_memcpy_from(p_hwfn, p_ptt, data.dscp_map, data.addr, data.size);
814 }
815
816 static enum _ecore_status_t ecore_dcbx_read_mib(struct ecore_hwfn *p_hwfn,
817                                                 struct ecore_ptt *p_ptt,
818                                                 enum ecore_mib_read_type type)
819 {
820         enum _ecore_status_t rc = ECORE_INVAL;
821
822         switch (type) {
823         case ECORE_DCBX_OPERATIONAL_MIB:
824                 ecore_dcbx_read_dscp_mib(p_hwfn, p_ptt);
825                 rc = ecore_dcbx_read_operational_mib(p_hwfn, p_ptt, type);
826                 break;
827         case ECORE_DCBX_REMOTE_MIB:
828                 rc = ecore_dcbx_read_remote_mib(p_hwfn, p_ptt, type);
829                 break;
830         case ECORE_DCBX_LOCAL_MIB:
831                 rc = ecore_dcbx_read_local_mib(p_hwfn, p_ptt);
832                 break;
833         case ECORE_DCBX_REMOTE_LLDP_MIB:
834                 rc = ecore_dcbx_read_remote_lldp_mib(p_hwfn, p_ptt, type);
835                 break;
836         case ECORE_DCBX_LOCAL_LLDP_MIB:
837                 rc = ecore_dcbx_read_local_lldp_mib(p_hwfn, p_ptt);
838                 break;
839         default:
840                 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type);
841         }
842
843         return rc;
844 }
845
846 /*
847  * Read updated MIB.
848  * Reconfigure QM and invoke PF update ramrod command if operational MIB
849  * change is detected.
850  */
851 enum _ecore_status_t
852 ecore_dcbx_mib_update_event(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
853                             enum ecore_mib_read_type type)
854 {
855         enum _ecore_status_t rc = ECORE_SUCCESS;
856
857         rc = ecore_dcbx_read_mib(p_hwfn, p_ptt, type);
858         if (rc)
859                 return rc;
860
861         if (type == ECORE_DCBX_OPERATIONAL_MIB) {
862                 ecore_dcbx_get_dscp_params(p_hwfn, p_ptt,
863                                            &p_hwfn->p_dcbx_info->get);
864
865                 rc = ecore_dcbx_process_mib_info(p_hwfn);
866                 if (!rc) {
867                         bool enabled;
868
869                         /* reconfigure tcs of QM queues according
870                          * to negotiation results
871                          */
872                         ecore_qm_reconf(p_hwfn, p_ptt);
873
874                         /* update storm FW with negotiation results */
875                         ecore_sp_pf_update(p_hwfn);
876
877                         /* set eagle enigne 1 flow control workaround
878                          * according to negotiation results
879                          */
880                         enabled = p_hwfn->p_dcbx_info->results.dcbx_enabled;
881                 }
882         }
883         ecore_dcbx_get_params(p_hwfn, p_ptt, &p_hwfn->p_dcbx_info->get, type);
884
885         /* Update the DSCP to TC mapping bit if required */
886         if ((type == ECORE_DCBX_OPERATIONAL_MIB) &&
887             p_hwfn->p_dcbx_info->dscp_nig_update) {
888                 ecore_wr(p_hwfn, p_ptt, NIG_REG_DSCP_TO_TC_MAP_ENABLE, 0x1);
889                 p_hwfn->p_dcbx_info->dscp_nig_update = false;
890         }
891
892         OSAL_DCBX_AEN(p_hwfn, type);
893
894         return rc;
895 }
896
897 enum _ecore_status_t ecore_dcbx_info_alloc(struct ecore_hwfn *p_hwfn)
898 {
899         enum _ecore_status_t rc = ECORE_SUCCESS;
900
901         p_hwfn->p_dcbx_info = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL,
902                                           sizeof(*p_hwfn->p_dcbx_info));
903         if (!p_hwfn->p_dcbx_info) {
904                 DP_NOTICE(p_hwfn, true,
905                           "Failed to allocate `struct ecore_dcbx_info'");
906                 rc = ECORE_NOMEM;
907         }
908
909         return rc;
910 }
911
912 void ecore_dcbx_info_free(struct ecore_hwfn *p_hwfn,
913                           struct ecore_dcbx_info *p_dcbx_info)
914 {
915         OSAL_FREE(p_hwfn->p_dev, p_hwfn->p_dcbx_info);
916 }
917
918 static void ecore_dcbx_update_protocol_data(struct protocol_dcb_data *p_data,
919                                             struct ecore_dcbx_results *p_src,
920                                             enum dcbx_protocol_type type)
921 {
922         p_data->dcb_enable_flag = p_src->arr[type].enable;
923         p_data->dcb_priority = p_src->arr[type].priority;
924         p_data->dcb_tc = p_src->arr[type].tc;
925         p_data->dscp_enable_flag = p_src->arr[type].dscp_enable;
926         p_data->dscp_val = p_src->arr[type].dscp_val;
927 }
928
929 /* Set pf update ramrod command params */
930 void ecore_dcbx_set_pf_update_params(struct ecore_dcbx_results *p_src,
931                                      struct pf_update_ramrod_data *p_dest)
932 {
933         struct protocol_dcb_data *p_dcb_data;
934         u8 update_flag;
935
936         p_dest->pf_id = p_src->pf_id;
937
938         update_flag = p_src->arr[DCBX_PROTOCOL_ETH].update;
939         p_dest->update_eth_dcb_data_mode = update_flag;
940
941         p_dcb_data = &p_dest->eth_dcb_data;
942         ecore_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ETH);
943 }
944
945 enum _ecore_status_t ecore_dcbx_query_params(struct ecore_hwfn *p_hwfn,
946                                              struct ecore_dcbx_get *p_get,
947                                              enum ecore_mib_read_type type)
948 {
949         struct ecore_ptt *p_ptt;
950         enum _ecore_status_t rc;
951
952         if (IS_VF(p_hwfn->p_dev))
953                 return ECORE_INVAL;
954
955         p_ptt = ecore_ptt_acquire(p_hwfn);
956         if (!p_ptt) {
957                 rc = ECORE_TIMEOUT;
958                 DP_ERR(p_hwfn, "rc = %d\n", rc);
959                 return rc;
960         }
961
962         rc = ecore_dcbx_read_mib(p_hwfn, p_ptt, type);
963         if (rc != ECORE_SUCCESS)
964                 goto out;
965
966         rc = ecore_dcbx_get_params(p_hwfn, p_ptt, p_get, type);
967
968 out:
969         ecore_ptt_release(p_hwfn, p_ptt);
970         return rc;
971 }
972
973 static void
974 ecore_dcbx_set_pfc_data(struct ecore_hwfn *p_hwfn,
975                         u32 *pfc, struct ecore_dcbx_params *p_params)
976 {
977         u8 pfc_map = 0;
978         int i;
979
980         if (p_params->pfc.willing)
981                 *pfc |= DCBX_PFC_WILLING_MASK;
982         else
983                 *pfc &= ~DCBX_PFC_WILLING_MASK;
984
985         if (p_params->pfc.enabled)
986                 *pfc |= DCBX_PFC_ENABLED_MASK;
987         else
988                 *pfc &= ~DCBX_PFC_ENABLED_MASK;
989
990         *pfc &= ~DCBX_PFC_CAPS_MASK;
991         *pfc |= (u32)p_params->pfc.max_tc << DCBX_PFC_CAPS_SHIFT;
992
993         for (i = 0; i < ECORE_MAX_PFC_PRIORITIES; i++)
994                 if (p_params->pfc.prio[i])
995                         pfc_map |= (1 << i);
996         *pfc &= ~DCBX_PFC_PRI_EN_BITMAP_MASK;
997         *pfc |= (pfc_map << DCBX_PFC_PRI_EN_BITMAP_SHIFT);
998
999         DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "pfc = 0x%x\n", *pfc);
1000 }
1001
1002 static void
1003 ecore_dcbx_set_ets_data(struct ecore_hwfn *p_hwfn,
1004                         struct dcbx_ets_feature *p_ets,
1005                         struct ecore_dcbx_params *p_params)
1006 {
1007         u8 *bw_map, *tsa_map;
1008         u32 val;
1009         int i;
1010
1011         if (p_params->ets_willing)
1012                 p_ets->flags |= DCBX_ETS_WILLING_MASK;
1013         else
1014                 p_ets->flags &= ~DCBX_ETS_WILLING_MASK;
1015
1016         if (p_params->ets_cbs)
1017                 p_ets->flags |= DCBX_ETS_CBS_MASK;
1018         else
1019                 p_ets->flags &= ~DCBX_ETS_CBS_MASK;
1020
1021         if (p_params->ets_enabled)
1022                 p_ets->flags |= DCBX_ETS_ENABLED_MASK;
1023         else
1024                 p_ets->flags &= ~DCBX_ETS_ENABLED_MASK;
1025
1026         p_ets->flags &= ~DCBX_ETS_MAX_TCS_MASK;
1027         p_ets->flags |= (u32)p_params->max_ets_tc << DCBX_ETS_MAX_TCS_SHIFT;
1028
1029         bw_map = (u8 *)&p_ets->tc_bw_tbl[0];
1030         tsa_map = (u8 *)&p_ets->tc_tsa_tbl[0];
1031         p_ets->pri_tc_tbl[0] = 0;
1032         for (i = 0; i < ECORE_MAX_PFC_PRIORITIES; i++) {
1033                 bw_map[i] = p_params->ets_tc_bw_tbl[i];
1034                 tsa_map[i] = p_params->ets_tc_tsa_tbl[i];
1035                 /* Copy the priority value to the corresponding 4 bits in the
1036                  * traffic class table.
1037                  */
1038                 val = (((u32)p_params->ets_pri_tc_tbl[i]) << ((7 - i) * 4));
1039                 p_ets->pri_tc_tbl[0] |= val;
1040         }
1041         for (i = 0; i < 2; i++) {
1042                 p_ets->tc_bw_tbl[i] = OSAL_CPU_TO_BE32(p_ets->tc_bw_tbl[i]);
1043                 p_ets->tc_tsa_tbl[i] = OSAL_CPU_TO_BE32(p_ets->tc_tsa_tbl[i]);
1044         }
1045
1046         DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
1047                    "flags = 0x%x pri_tc = 0x%x tc_bwl[] = {0x%x, 0x%x} tc_tsa = {0x%x, 0x%x}\n",
1048                    p_ets->flags, p_ets->pri_tc_tbl[0], p_ets->tc_bw_tbl[0],
1049                    p_ets->tc_bw_tbl[1], p_ets->tc_tsa_tbl[0],
1050                    p_ets->tc_tsa_tbl[1]);
1051 }
1052
1053 static void
1054 ecore_dcbx_set_app_data(struct ecore_hwfn *p_hwfn,
1055                         struct dcbx_app_priority_feature *p_app,
1056                         struct ecore_dcbx_params *p_params, bool ieee)
1057 {
1058         u32 *entry;
1059         int i;
1060
1061         if (p_params->app_willing)
1062                 p_app->flags |= DCBX_APP_WILLING_MASK;
1063         else
1064                 p_app->flags &= ~DCBX_APP_WILLING_MASK;
1065
1066         if (p_params->app_valid)
1067                 p_app->flags |= DCBX_APP_ENABLED_MASK;
1068         else
1069                 p_app->flags &= ~DCBX_APP_ENABLED_MASK;
1070
1071         p_app->flags &= ~DCBX_APP_NUM_ENTRIES_MASK;
1072         p_app->flags |= (u32)p_params->num_app_entries <<
1073                                         DCBX_APP_NUM_ENTRIES_SHIFT;
1074
1075         for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
1076                 entry = &p_app->app_pri_tbl[i].entry;
1077                 *entry = 0;
1078                 if (ieee) {
1079                         *entry &= ~(DCBX_APP_SF_IEEE_MASK | DCBX_APP_SF_MASK);
1080                         switch (p_params->app_entry[i].sf_ieee) {
1081                         case ECORE_DCBX_SF_IEEE_ETHTYPE:
1082                                 *entry  |= ((u32)DCBX_APP_SF_IEEE_ETHTYPE <<
1083                                             DCBX_APP_SF_IEEE_SHIFT);
1084                                 *entry  |= ((u32)DCBX_APP_SF_ETHTYPE <<
1085                                             DCBX_APP_SF_SHIFT);
1086                                 break;
1087                         case ECORE_DCBX_SF_IEEE_TCP_PORT:
1088                                 *entry  |= ((u32)DCBX_APP_SF_IEEE_TCP_PORT <<
1089                                             DCBX_APP_SF_IEEE_SHIFT);
1090                                 *entry  |= ((u32)DCBX_APP_SF_PORT <<
1091                                             DCBX_APP_SF_SHIFT);
1092                                 break;
1093                         case ECORE_DCBX_SF_IEEE_UDP_PORT:
1094                                 *entry  |= ((u32)DCBX_APP_SF_IEEE_UDP_PORT <<
1095                                             DCBX_APP_SF_IEEE_SHIFT);
1096                                 *entry  |= ((u32)DCBX_APP_SF_PORT <<
1097                                             DCBX_APP_SF_SHIFT);
1098                                 break;
1099                         case ECORE_DCBX_SF_IEEE_TCP_UDP_PORT:
1100                                 *entry  |= (u32)DCBX_APP_SF_IEEE_TCP_UDP_PORT <<
1101                                             DCBX_APP_SF_IEEE_SHIFT;
1102                                 *entry  |= ((u32)DCBX_APP_SF_PORT <<
1103                                             DCBX_APP_SF_SHIFT);
1104                                 break;
1105                         }
1106                 } else {
1107                         *entry &= ~DCBX_APP_SF_MASK;
1108                         if (p_params->app_entry[i].ethtype)
1109                                 *entry  |= ((u32)DCBX_APP_SF_ETHTYPE <<
1110                                             DCBX_APP_SF_SHIFT);
1111                         else
1112                                 *entry  |= ((u32)DCBX_APP_SF_PORT <<
1113                                             DCBX_APP_SF_SHIFT);
1114                 }
1115                 *entry &= ~DCBX_APP_PROTOCOL_ID_MASK;
1116                 *entry |= ((u32)p_params->app_entry[i].proto_id <<
1117                                 DCBX_APP_PROTOCOL_ID_SHIFT);
1118                 *entry &= ~DCBX_APP_PRI_MAP_MASK;
1119                 *entry |= ((u32)(p_params->app_entry[i].prio) <<
1120                                 DCBX_APP_PRI_MAP_SHIFT);
1121         }
1122
1123         DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "flags = 0x%x\n", p_app->flags);
1124 }
1125
1126 static enum _ecore_status_t
1127 ecore_dcbx_set_local_params(struct ecore_hwfn *p_hwfn,
1128                             struct dcbx_local_params *local_admin,
1129                             struct ecore_dcbx_set *params)
1130 {
1131         bool ieee = false;
1132
1133         local_admin->flags = 0;
1134         OSAL_MEMCPY(&local_admin->features,
1135                     &p_hwfn->p_dcbx_info->operational.features,
1136                     sizeof(local_admin->features));
1137
1138         if (params->enabled) {
1139                 local_admin->config = params->ver_num;
1140                 ieee = !!(params->ver_num & DCBX_CONFIG_VERSION_IEEE);
1141         } else {
1142                 local_admin->config = DCBX_CONFIG_VERSION_DISABLED;
1143         }
1144
1145         if (params->override_flags & ECORE_DCBX_OVERRIDE_PFC_CFG)
1146                 ecore_dcbx_set_pfc_data(p_hwfn, &local_admin->features.pfc,
1147                                         &params->config.params);
1148
1149         if (params->override_flags & ECORE_DCBX_OVERRIDE_ETS_CFG)
1150                 ecore_dcbx_set_ets_data(p_hwfn, &local_admin->features.ets,
1151                                         &params->config.params);
1152
1153         if (params->override_flags & ECORE_DCBX_OVERRIDE_APP_CFG)
1154                 ecore_dcbx_set_app_data(p_hwfn, &local_admin->features.app,
1155                                         &params->config.params, ieee);
1156
1157         return ECORE_SUCCESS;
1158 }
1159
1160 static enum _ecore_status_t
1161 ecore_dcbx_set_dscp_params(struct ecore_hwfn *p_hwfn,
1162                            struct dcb_dscp_map *p_dscp_map,
1163                            struct ecore_dcbx_set *p_params)
1164 {
1165         int entry, i, j;
1166         u32 val;
1167
1168         OSAL_MEMCPY(p_dscp_map, &p_hwfn->p_dcbx_info->dscp_map,
1169                     sizeof(*p_dscp_map));
1170
1171         p_dscp_map->flags &= ~DCB_DSCP_ENABLE_MASK;
1172         if (p_params->dscp.enabled)
1173                 p_dscp_map->flags |= DCB_DSCP_ENABLE_MASK;
1174
1175         for (i = 0, entry = 0; i < 8; i++) {
1176                 val = 0;
1177                 for (j = 0; j < 8; j++, entry++)
1178                         val |= (((u32)p_params->dscp.dscp_pri_map[entry]) <<
1179                                 (j * 4));
1180
1181                 p_dscp_map->dscp_pri_map[i] = OSAL_CPU_TO_BE32(val);
1182         }
1183
1184         p_hwfn->p_dcbx_info->dscp_nig_update = true;
1185
1186         DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "flags = 0x%x\n", p_dscp_map->flags);
1187
1188         return ECORE_SUCCESS;
1189 }
1190
1191 enum _ecore_status_t ecore_dcbx_config_params(struct ecore_hwfn *p_hwfn,
1192                                               struct ecore_ptt *p_ptt,
1193                                               struct ecore_dcbx_set *params,
1194                                               bool hw_commit)
1195 {
1196         struct dcbx_local_params local_admin;
1197         struct ecore_dcbx_mib_meta_data data;
1198         struct dcb_dscp_map dscp_map;
1199         u32 resp = 0, param = 0;
1200         enum _ecore_status_t rc = ECORE_SUCCESS;
1201
1202         if (!hw_commit) {
1203                 OSAL_MEMCPY(&p_hwfn->p_dcbx_info->set, params,
1204                             sizeof(p_hwfn->p_dcbx_info->set));
1205                 return ECORE_SUCCESS;
1206         }
1207
1208         /* clear set-parmas cache */
1209         OSAL_MEMSET(&p_hwfn->p_dcbx_info->set, 0,
1210                     sizeof(struct ecore_dcbx_set));
1211
1212         OSAL_MEMSET(&local_admin, 0, sizeof(local_admin));
1213         ecore_dcbx_set_local_params(p_hwfn, &local_admin, params);
1214
1215         data.addr = p_hwfn->mcp_info->port_addr +
1216                         offsetof(struct public_port, local_admin_dcbx_mib);
1217         data.local_admin = &local_admin;
1218         data.size = sizeof(struct dcbx_local_params);
1219         ecore_memcpy_to(p_hwfn, p_ptt, data.addr, data.local_admin, data.size);
1220
1221         if (params->override_flags & ECORE_DCBX_OVERRIDE_DSCP_CFG) {
1222                 OSAL_MEMSET(&dscp_map, 0, sizeof(dscp_map));
1223                 ecore_dcbx_set_dscp_params(p_hwfn, &dscp_map, params);
1224
1225                 data.addr = p_hwfn->mcp_info->port_addr +
1226                                 offsetof(struct public_port, dcb_dscp_map);
1227                 data.dscp_map = &dscp_map;
1228                 data.size = sizeof(struct dcb_dscp_map);
1229                 ecore_memcpy_to(p_hwfn, p_ptt, data.addr, data.dscp_map,
1230                                 data.size);
1231         }
1232
1233         rc = ecore_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_DCBX,
1234                            1 << DRV_MB_PARAM_LLDP_SEND_SHIFT, &resp, &param);
1235         if (rc != ECORE_SUCCESS) {
1236                 DP_NOTICE(p_hwfn, false,
1237                           "Failed to send DCBX update request\n");
1238                 return rc;
1239         }
1240
1241         return rc;
1242 }
1243
1244 enum _ecore_status_t ecore_dcbx_get_config_params(struct ecore_hwfn *p_hwfn,
1245                                                   struct ecore_dcbx_set *params)
1246 {
1247         struct ecore_dcbx_get *dcbx_info;
1248         int rc;
1249
1250         if (p_hwfn->p_dcbx_info->set.config.valid) {
1251                 OSAL_MEMCPY(params, &p_hwfn->p_dcbx_info->set,
1252                             sizeof(struct ecore_dcbx_set));
1253                 return ECORE_SUCCESS;
1254         }
1255
1256         dcbx_info = OSAL_ALLOC(p_hwfn->p_dev, GFP_KERNEL,
1257                                sizeof(*dcbx_info));
1258         if (!dcbx_info) {
1259                 DP_ERR(p_hwfn, "Failed to allocate struct ecore_dcbx_info\n");
1260                 return ECORE_NOMEM;
1261         }
1262
1263         OSAL_MEMSET(dcbx_info, 0, sizeof(*dcbx_info));
1264         rc = ecore_dcbx_query_params(p_hwfn, dcbx_info,
1265                                      ECORE_DCBX_OPERATIONAL_MIB);
1266         if (rc) {
1267                 OSAL_FREE(p_hwfn->p_dev, dcbx_info);
1268                 return rc;
1269         }
1270         p_hwfn->p_dcbx_info->set.override_flags = 0;
1271
1272         p_hwfn->p_dcbx_info->set.ver_num = DCBX_CONFIG_VERSION_DISABLED;
1273         if (dcbx_info->operational.cee)
1274                 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_CEE;
1275         if (dcbx_info->operational.ieee)
1276                 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_IEEE;
1277         if (dcbx_info->operational.local)
1278                 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_STATIC;
1279
1280         p_hwfn->p_dcbx_info->set.enabled = dcbx_info->operational.enabled;
1281         OSAL_MEMCPY(&p_hwfn->p_dcbx_info->set.config.params,
1282                     &dcbx_info->operational.params,
1283                     sizeof(struct ecore_dcbx_admin_params));
1284         p_hwfn->p_dcbx_info->set.config.valid = true;
1285
1286         OSAL_MEMCPY(params, &p_hwfn->p_dcbx_info->set,
1287                     sizeof(struct ecore_dcbx_set));
1288
1289         OSAL_FREE(p_hwfn->p_dev, dcbx_info);
1290
1291         return ECORE_SUCCESS;
1292 }