2 * Copyright (c) 2016 QLogic Corporation.
6 * See LICENSE.qede_pmd for copyright and licensing details.
9 #ifndef __ECORE_MCP_H__
10 #define __ECORE_MCP_H__
13 #include "mcp_public.h"
14 #include "ecore_mcp_api.h"
16 /* Using hwfn number (and not pf_num) is required since in CMT mode,
17 * same pf_num may be used by two different hwfn
18 * TODO - this shouldn't really be in .h file, but until all fields
19 * required during hw-init will be placed in their correct place in shmem
20 * we need it in ecore_dev.c [for readin the nvram reflection in shmem].
22 #define MCP_PF_ID_BY_REL(p_hwfn, rel_pfid) (ECORE_IS_BB((p_hwfn)->p_dev) ? \
24 ((p_hwfn)->abs_pf_id & 1) << 3) : \
26 #define MCP_PF_ID(p_hwfn) MCP_PF_ID_BY_REL(p_hwfn, (p_hwfn)->rel_pf_id)
28 /* TODO - this is only correct as long as only BB is supported, and
29 * no port-swapping is implemented; Afterwards we'll need to fix it.
31 #define MFW_PORT(_p_hwfn) ((_p_hwfn)->abs_pf_id % \
32 ((_p_hwfn)->p_dev->num_ports_in_engines * 2))
33 struct ecore_mcp_info {
34 osal_spinlock_t lock; /* Spinlock used for accessing MCP mailbox */
36 /* Flag to indicate whether sending a MFW mailbox is forbidden */
37 bool block_mb_sending;
39 u32 public_base; /* Address of the MCP public area */
40 u32 drv_mb_addr; /* Address of the driver mailbox */
41 u32 mfw_mb_addr; /* Address of the MFW mailbox */
42 u32 port_addr; /* Address of the port configuration (link) */
43 u16 drv_mb_seq; /* Current driver mailbox sequence */
44 u16 drv_pulse_seq; /* Current driver pulse sequence */
45 struct ecore_mcp_link_params link_input;
46 struct ecore_mcp_link_state link_output;
47 struct ecore_mcp_link_capabilities link_capabilities;
48 struct ecore_mcp_function_info func_info;
56 struct ecore_mcp_mb_params {
59 union drv_union_data *p_data_src;
60 union drv_union_data *p_data_dst;
66 * @brief Initialize the interface with the MCP
68 * @param p_hwfn - HW func
69 * @param p_ptt - PTT required for register access
71 * @return enum _ecore_status_t
73 enum _ecore_status_t ecore_mcp_cmd_init(struct ecore_hwfn *p_hwfn,
74 struct ecore_ptt *p_ptt);
77 * @brief Initialize the port interface with the MCP
81 * Can only be called after `num_ports_in_engines' is set
83 void ecore_mcp_cmd_port_init(struct ecore_hwfn *p_hwfn,
84 struct ecore_ptt *p_ptt);
86 * @brief Releases resources allocated during the init process.
88 * @param p_hwfn - HW func
89 * @param p_ptt - PTT required for register access
91 * @return enum _ecore_status_t
94 enum _ecore_status_t ecore_mcp_free(struct ecore_hwfn *p_hwfn);
97 * @brief This function is called from the DPC context. After
98 * pointing PTT to the mfw mb, check for events sent by the MCP
99 * to the driver and ack them. In case a critical event
100 * detected, it will be handled here, otherwise the work will be
101 * queued to a sleepable work-queue.
103 * @param p_hwfn - HW function
104 * @param p_ptt - PTT required for register access
105 * @return enum _ecore_status_t - ECORE_SUCCESS - operation
108 enum _ecore_status_t ecore_mcp_handle_events(struct ecore_hwfn *p_hwfn,
109 struct ecore_ptt *p_ptt);
112 * @brief When MFW doesn't get driver pulse for couple of seconds, at some
113 * threshold before timeout expires, it will generate interrupt
114 * through a dedicated status block (DPSB - Driver Pulse Status
115 * Block), which the driver should respond immediately, by
116 * providing keepalive indication after setting the PTT to the
117 * driver-MFW mailbox. This function is called directly from the
118 * DPC upon receiving the DPSB attention.
120 * @param p_hwfn - hw function
121 * @param p_ptt - PTT required for register access
122 * @return enum _ecore_status_t - ECORE_SUCCESS - operation
125 enum _ecore_status_t ecore_issue_pulse(struct ecore_hwfn *p_hwfn,
126 struct ecore_ptt *p_ptt);
129 * @brief Sends a LOAD_REQ to the MFW, and in case operation
130 * succeed, returns whether this PF is the first on the
131 * chip/engine/port or function. This function should be
132 * called when driver is ready to accept MFW events after
133 * Storms initializations are done.
135 * @param p_hwfn - hw function
136 * @param p_ptt - PTT required for register access
137 * @param p_load_code - The MCP response param containing one
139 * FW_MSG_CODE_DRV_LOAD_ENGINE
140 * FW_MSG_CODE_DRV_LOAD_PORT
141 * FW_MSG_CODE_DRV_LOAD_FUNCTION
142 * @return enum _ecore_status_t -
143 * ECORE_SUCCESS - Operation was successul.
144 * ECORE_BUSY - Operation failed
146 enum _ecore_status_t ecore_mcp_load_req(struct ecore_hwfn *p_hwfn,
147 struct ecore_ptt *p_ptt,
151 * @brief Read the MFW mailbox into Current buffer.
156 void ecore_mcp_read_mb(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt);
159 * @brief Ack to mfw that driver finished FLR process for VFs
163 * @param vfs_to_ack - bit mask of all engine VFs for which the PF acks.
165 * @param return enum _ecore_status_t - ECORE_SUCCESS upon success.
167 enum _ecore_status_t ecore_mcp_ack_vf_flr(struct ecore_hwfn *p_hwfn,
168 struct ecore_ptt *p_ptt,
172 * @brief - calls during init to read shmem of all function-related info.
176 * @param return ECORE_SUCCESS upon success.
178 enum _ecore_status_t ecore_mcp_fill_shmem_func_info(struct ecore_hwfn *p_hwfn,
179 struct ecore_ptt *p_ptt);
182 * @brief - Reset the MCP using mailbox command.
187 * @param return ECORE_SUCCESS upon success.
189 enum _ecore_status_t ecore_mcp_reset(struct ecore_hwfn *p_hwfn,
190 struct ecore_ptt *p_ptt);
193 * @brief - Sends an NVM write command request to the MFW with
198 * @param cmd - Command: Either DRV_MSG_CODE_NVM_WRITE_NVRAM or
199 * DRV_MSG_CODE_NVM_PUT_FILE_DATA
200 * @param param - [0:23] - Offset [24:31] - Size
201 * @param o_mcp_resp - MCP response
202 * @param o_mcp_param - MCP response param
203 * @param i_txn_size - Buffer size
204 * @param i_buf - Pointer to the buffer
206 * @param return ECORE_SUCCESS upon success.
208 enum _ecore_status_t ecore_mcp_nvm_wr_cmd(struct ecore_hwfn *p_hwfn,
209 struct ecore_ptt *p_ptt,
214 u32 i_txn_size, u32 *i_buf);
217 * @brief - Sends an NVM read command request to the MFW to get
222 * @param cmd - Command: DRV_MSG_CODE_NVM_GET_FILE_DATA or
223 * DRV_MSG_CODE_NVM_READ_NVRAM commands
224 * @param param - [0:23] - Offset [24:31] - Size
225 * @param o_mcp_resp - MCP response
226 * @param o_mcp_param - MCP response param
227 * @param o_txn_size - Buffer size output
228 * @param o_buf - Pointer to the buffer returned by the MFW.
230 * @param return ECORE_SUCCESS upon success.
232 enum _ecore_status_t ecore_mcp_nvm_rd_cmd(struct ecore_hwfn *p_hwfn,
233 struct ecore_ptt *p_ptt,
238 u32 *o_txn_size, u32 *o_buf);
241 * @brief indicates whether the MFW objects [under mcp_info] are accessible
245 * @return true iff MFW is running and mcp_info is initialized
247 bool ecore_mcp_is_init(struct ecore_hwfn *p_hwfn);
250 * @brief request MFW to configure MSI-X for a VF
254 * @param vf_id - absolute inside engine
255 * @param num_sbs - number of entries to request
257 * @return enum _ecore_status_t
259 enum _ecore_status_t ecore_mcp_config_vf_msix(struct ecore_hwfn *p_hwfn,
260 struct ecore_ptt *p_ptt,
264 * @brief - Halt the MCP.
269 * @param return ECORE_SUCCESS upon success.
271 enum _ecore_status_t ecore_mcp_halt(struct ecore_hwfn *p_hwfn,
272 struct ecore_ptt *p_ptt);
275 * @brief - Wake up the MCP.
280 * @param return ECORE_SUCCESS upon success.
282 enum _ecore_status_t ecore_mcp_resume(struct ecore_hwfn *p_hwfn,
283 struct ecore_ptt *p_ptt);
284 int __ecore_configure_pf_max_bandwidth(struct ecore_hwfn *p_hwfn,
285 struct ecore_ptt *p_ptt,
286 struct ecore_mcp_link_state *p_link,
288 int __ecore_configure_pf_min_bandwidth(struct ecore_hwfn *p_hwfn,
289 struct ecore_ptt *p_ptt,
290 struct ecore_mcp_link_state *p_link,
292 enum _ecore_status_t ecore_mcp_mask_parities(struct ecore_hwfn *p_hwfn,
293 struct ecore_ptt *p_ptt,
295 #endif /* __ECORE_MCP_H__ */