drivers/net/qede/base/ecore_vf.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright (c) 2016 - 2018 Cavium Inc.
   3  * All rights reserved.
   4  * www.cavium.com
   5  */
   6
   7 #include "bcm_osal.h"
   8 #include "ecore.h"
   9 #include "ecore_hsi_eth.h"
  10 #include "ecore_sriov.h"
  11 #include "ecore_l2_api.h"
  12 #include "ecore_vf.h"
  13 #include "ecore_vfpf_if.h"
  14 #include "ecore_status.h"
  15 #include "reg_addr.h"
  16 #include "ecore_int.h"
  17 #include "ecore_l2.h"
  18 #include "ecore_mcp_api.h"
  19 #include "ecore_vf_api.h"
  20
  21 static void *ecore_vf_pf_prep(struct ecore_hwfn *p_hwfn, u16 type, u16 length)
  22 {
  23         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
  24         void *p_tlv;
  25
  26         /* This lock is released when we receive PF's response
  27          * in ecore_send_msg2pf().
  28          * So, ecore_vf_pf_prep() and ecore_send_msg2pf()
  29          * must come in sequence.
  30          */
  31         OSAL_MUTEX_ACQUIRE(&p_iov->mutex);
  32
  33         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
  34                    "preparing to send %s tlv over vf pf channel\n",
  35                    qede_ecore_channel_tlvs_string[type]);
  36
  37         /* Reset Request offset */
  38         p_iov->offset = (u8 *)(p_iov->vf2pf_request);
  39
  40         /* Clear mailbox - both request and reply */
  41         OSAL_MEMSET(p_iov->vf2pf_request, 0, sizeof(union vfpf_tlvs));
  42         OSAL_MEMSET(p_iov->pf2vf_reply, 0, sizeof(union pfvf_tlvs));
  43
  44         /* Init type and length */
  45         p_tlv = ecore_add_tlv(&p_iov->offset, type, length);
  46
  47         /* Init first tlv header */
  48         ((struct vfpf_first_tlv *)p_tlv)->reply_address =
  49             (u64)p_iov->pf2vf_reply_phys;
  50
  51         return p_tlv;
  52 }
  53
  54 static void ecore_vf_pf_req_end(struct ecore_hwfn *p_hwfn,
  55                                  enum _ecore_status_t req_status)
  56 {
  57         union pfvf_tlvs *resp = p_hwfn->vf_iov_info->pf2vf_reply;
  58
  59         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
  60                    "VF request status = 0x%x, PF reply status = 0x%x\n",
  61                    req_status, resp->default_resp.hdr.status);
  62
  63         OSAL_MUTEX_RELEASE(&p_hwfn->vf_iov_info->mutex);
  64 }
  65
  66 #ifdef CONFIG_ECORE_SW_CHANNEL
  67 /* The SW channel implementation of Windows needs to know the 'exact'
  68  * response size of any given message. That means that for future
  69  * messages we'd be unable to send TLVs to PF if he'll be unable to
  70  * answer them if the |response| != |default response|.
  71  * We'd need to handshake in acquire capabilities for any such.
  72  */
  73 #endif
  74 static enum _ecore_status_t
  75 ecore_send_msg2pf(struct ecore_hwfn *p_hwfn,
  76                   u8 *done, u32 resp_size)
  77 {
  78         union vfpf_tlvs *p_req = p_hwfn->vf_iov_info->vf2pf_request;
  79         struct ustorm_trigger_vf_zone trigger;
  80         struct ustorm_vf_zone *zone_data;
  81         enum _ecore_status_t rc = ECORE_SUCCESS;
  82         int time = 100;
  83
  84         zone_data = (struct ustorm_vf_zone *)PXP_VF_BAR0_START_USDM_ZONE_B;
  85
  86         /* output tlvs list */
  87         ecore_dp_tlv_list(p_hwfn, p_req);
  88
  89         /* need to add the END TLV to the message size */
  90         resp_size += sizeof(struct channel_list_end_tlv);
  91
  92         /* Send TLVs over HW channel */
  93         OSAL_MEMSET(&trigger, 0, sizeof(struct ustorm_trigger_vf_zone));
  94         trigger.vf_pf_msg_valid = 1;
  95
  96         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
  97                    "VF -> PF [%02x] message: [%08x, %08x] --> %p,"
  98                    " %08x --> %p\n",
  99                    GET_FIELD(p_hwfn->hw_info.concrete_fid,
 100                              PXP_CONCRETE_FID_PFID),
 101                    U64_HI(p_hwfn->vf_iov_info->vf2pf_request_phys),
 102                    U64_LO(p_hwfn->vf_iov_info->vf2pf_request_phys),
 103                    &zone_data->non_trigger.vf_pf_msg_addr,
 104                    *((u32 *)&trigger), &zone_data->trigger);
 105
 106         REG_WR(p_hwfn,
 107                (osal_uintptr_t)&zone_data->non_trigger.vf_pf_msg_addr.lo,
 108                U64_LO(p_hwfn->vf_iov_info->vf2pf_request_phys));
 109
 110         REG_WR(p_hwfn,
 111                (osal_uintptr_t)&zone_data->non_trigger.vf_pf_msg_addr.hi,
 112                U64_HI(p_hwfn->vf_iov_info->vf2pf_request_phys));
 113
 114         /* The message data must be written first, to prevent trigger before
 115          * data is written.
 116          */
 117         OSAL_WMB(p_hwfn->p_dev);
 118
 119         REG_WR(p_hwfn, (osal_uintptr_t)&zone_data->trigger,
 120                *((u32 *)&trigger));
 121
 122         /* When PF would be done with the response, it would write back to the
 123          * `done' address. Poll until then.
 124          */
 125         while ((!*done) && time) {
 126                 OSAL_MSLEEP(25);
 127                 time--;
 128         }
 129
 130         if (!*done) {
 131                 DP_NOTICE(p_hwfn, true,
 132                           "VF <-- PF Timeout [Type %d]\n",
 133                           p_req->first_tlv.tl.type);
 134                 rc = ECORE_TIMEOUT;
 135         } else {
 136                 if ((*done != PFVF_STATUS_SUCCESS) &&
 137                     (*done != PFVF_STATUS_NO_RESOURCE))
 138                         DP_NOTICE(p_hwfn, false,
 139                                   "PF response: %d [Type %d]\n",
 140                                   *done, p_req->first_tlv.tl.type);
 141                 else
 142                         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 143                                    "PF response: %d [Type %d]\n",
 144                                    *done, p_req->first_tlv.tl.type);
 145         }
 146
 147         return rc;
 148 }
 149
 150 static void ecore_vf_pf_add_qid(struct ecore_hwfn *p_hwfn,
 151                                 struct ecore_queue_cid *p_cid)
 152 {
 153         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 154         struct vfpf_qid_tlv *p_qid_tlv;
 155
 156         /* Only add QIDs for the queue if it was negotiated with PF */
 157         if (!(p_iov->acquire_resp.pfdev_info.capabilities &
 158               PFVF_ACQUIRE_CAP_QUEUE_QIDS))
 159                 return;
 160
 161         p_qid_tlv = ecore_add_tlv(&p_iov->offset,
 162                                   CHANNEL_TLV_QID, sizeof(*p_qid_tlv));
 163         p_qid_tlv->qid = p_cid->qid_usage_idx;
 164 }
 165
 166 enum _ecore_status_t _ecore_vf_pf_release(struct ecore_hwfn *p_hwfn,
 167                                           bool b_final)
 168 {
 169         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 170         struct pfvf_def_resp_tlv *resp;
 171         struct vfpf_first_tlv *req;
 172         u32 size;
 173         enum _ecore_status_t rc;
 174
 175         /* clear mailbox and prep first tlv */
 176         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_RELEASE, sizeof(*req));
 177
 178         /* add list termination tlv */
 179         ecore_add_tlv(&p_iov->offset,
 180                       CHANNEL_TLV_LIST_END,
 181                       sizeof(struct channel_list_end_tlv));
 182
 183         resp = &p_iov->pf2vf_reply->default_resp;
 184         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
 185
 186         if (rc == ECORE_SUCCESS && resp->hdr.status != PFVF_STATUS_SUCCESS)
 187                 rc = ECORE_AGAIN;
 188
 189         ecore_vf_pf_req_end(p_hwfn, rc);
 190         if (!b_final)
 191                 return rc;
 192
 193         p_hwfn->b_int_enabled = 0;
 194
 195         if (p_iov->vf2pf_request)
 196                 OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
 197                                        p_iov->vf2pf_request,
 198                                        p_iov->vf2pf_request_phys,
 199                                        sizeof(union vfpf_tlvs));
 200         if (p_iov->pf2vf_reply)
 201                 OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
 202                                        p_iov->pf2vf_reply,
 203                                        p_iov->pf2vf_reply_phys,
 204                                        sizeof(union pfvf_tlvs));
 205
 206         if (p_iov->bulletin.p_virt) {
 207                 size = sizeof(struct ecore_bulletin_content);
 208                 OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
 209                                        p_iov->bulletin.p_virt,
 210                                        p_iov->bulletin.phys,
 211                                        size);
 212         }
 213
 214 #ifdef CONFIG_ECORE_LOCK_ALLOC
 215         OSAL_MUTEX_DEALLOC(&p_iov->mutex);
 216 #endif
 217
 218         OSAL_FREE(p_hwfn->p_dev, p_hwfn->vf_iov_info);
 219         p_hwfn->vf_iov_info = OSAL_NULL;
 220
 221         return rc;
 222 }
 223
 224 enum _ecore_status_t ecore_vf_pf_release(struct ecore_hwfn *p_hwfn)
 225 {
 226         return _ecore_vf_pf_release(p_hwfn, true);
 227 }
 228
 229 #define VF_ACQUIRE_THRESH 3
 230 static void ecore_vf_pf_acquire_reduce_resc(struct ecore_hwfn *p_hwfn,
 231                                             struct vf_pf_resc_request *p_req,
 232                                             struct pf_vf_resc *p_resp)
 233 {
 234         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 235                    "PF unwilling to fullill resource request: rxq [%02x/%02x] txq [%02x/%02x] sbs [%02x/%02x] mac [%02x/%02x] vlan [%02x/%02x] mc [%02x/%02x] cids [%02x/%02x]. Try PF recommended amount\n",
 236                    p_req->num_rxqs, p_resp->num_rxqs,
 237                    p_req->num_rxqs, p_resp->num_txqs,
 238                    p_req->num_sbs, p_resp->num_sbs,
 239                    p_req->num_mac_filters, p_resp->num_mac_filters,
 240                    p_req->num_vlan_filters, p_resp->num_vlan_filters,
 241                    p_req->num_mc_filters, p_resp->num_mc_filters,
 242                    p_req->num_cids, p_resp->num_cids);
 243
 244         /* humble our request */
 245         p_req->num_txqs = p_resp->num_txqs;
 246         p_req->num_rxqs = p_resp->num_rxqs;
 247         p_req->num_sbs = p_resp->num_sbs;
 248         p_req->num_mac_filters = p_resp->num_mac_filters;
 249         p_req->num_vlan_filters = p_resp->num_vlan_filters;
 250         p_req->num_mc_filters = p_resp->num_mc_filters;
 251         p_req->num_cids = p_resp->num_cids;
 252 }
 253
 254 static enum _ecore_status_t ecore_vf_pf_acquire(struct ecore_hwfn *p_hwfn)
 255 {
 256         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 257         struct pfvf_acquire_resp_tlv *resp = &p_iov->pf2vf_reply->acquire_resp;
 258         struct pf_vf_pfdev_info *pfdev_info = &resp->pfdev_info;
 259         struct ecore_vf_acquire_sw_info vf_sw_info;
 260         struct ecore_dev *p_dev = p_hwfn->p_dev;
 261         struct vf_pf_resc_request *p_resc;
 262         bool resources_acquired = false;
 263         struct vfpf_acquire_tlv *req;
 264         int attempts = 0;
 265         enum _ecore_status_t rc = ECORE_SUCCESS;
 266
 267         /* clear mailbox and prep first tlv */
 268         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_ACQUIRE, sizeof(*req));
 269         p_resc = &req->resc_request;
 270
 271         /* @@@ TBD: PF may not be ready bnx2x_get_vf_id... */
 272         req->vfdev_info.opaque_fid = p_hwfn->hw_info.opaque_fid;
 273
 274         p_resc->num_rxqs = ECORE_MAX_VF_CHAINS_PER_PF;
 275         p_resc->num_txqs = ECORE_MAX_VF_CHAINS_PER_PF;
 276         p_resc->num_sbs = ECORE_MAX_VF_CHAINS_PER_PF;
 277         p_resc->num_mac_filters = ECORE_ETH_VF_NUM_MAC_FILTERS;
 278         p_resc->num_vlan_filters = ECORE_ETH_VF_NUM_VLAN_FILTERS;
 279         p_resc->num_cids = ECORE_ETH_VF_DEFAULT_NUM_CIDS;
 280
 281         OSAL_MEMSET(&vf_sw_info, 0, sizeof(vf_sw_info));
 282         OSAL_VF_FILL_ACQUIRE_RESC_REQ(p_hwfn, &req->resc_request, &vf_sw_info);
 283
 284         req->vfdev_info.os_type = vf_sw_info.os_type;
 285         req->vfdev_info.driver_version = vf_sw_info.driver_version;
 286         req->vfdev_info.fw_major = FW_MAJOR_VERSION;
 287         req->vfdev_info.fw_minor = FW_MINOR_VERSION;
 288         req->vfdev_info.fw_revision = FW_REVISION_VERSION;
 289         req->vfdev_info.fw_engineering = FW_ENGINEERING_VERSION;
 290         req->vfdev_info.eth_fp_hsi_major = ETH_HSI_VER_MAJOR;
 291         req->vfdev_info.eth_fp_hsi_minor = ETH_HSI_VER_MINOR;
 292
 293         /* Fill capability field with any non-deprecated config we support */
 294         req->vfdev_info.capabilities |= VFPF_ACQUIRE_CAP_100G;
 295
 296         /* If we've mapped the doorbell bar, try using queue qids */
 297         if (p_iov->b_doorbell_bar)
 298                 req->vfdev_info.capabilities |= VFPF_ACQUIRE_CAP_PHYSICAL_BAR |
 299                                                 VFPF_ACQUIRE_CAP_QUEUE_QIDS;
 300
 301         /* pf 2 vf bulletin board address */
 302         req->bulletin_addr = p_iov->bulletin.phys;
 303         req->bulletin_size = p_iov->bulletin.size;
 304
 305         /* add list termination tlv */
 306         ecore_add_tlv(&p_iov->offset,
 307                       CHANNEL_TLV_LIST_END,
 308                       sizeof(struct channel_list_end_tlv));
 309
 310         while (!resources_acquired) {
 311                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 312                            "attempting to acquire resources\n");
 313
 314                 /* Clear response buffer, as this might be a re-send */
 315                 OSAL_MEMSET(p_iov->pf2vf_reply, 0,
 316                             sizeof(union pfvf_tlvs));
 317
 318                 /* send acquire request */
 319                 rc = ecore_send_msg2pf(p_hwfn,
 320                                        &resp->hdr.status, sizeof(*resp));
 321                 if (rc != ECORE_SUCCESS)
 322                         goto exit;
 323
 324                 /* copy acquire response from buffer to p_hwfn */
 325                 OSAL_MEMCPY(&p_iov->acquire_resp,
 326                             resp, sizeof(p_iov->acquire_resp));
 327
 328                 attempts++;
 329
 330                 if (resp->hdr.status == PFVF_STATUS_SUCCESS) {
 331                         /* PF agrees to allocate our resources */
 332                         if (!(resp->pfdev_info.capabilities &
 333                               PFVF_ACQUIRE_CAP_POST_FW_OVERRIDE)) {
 334                                 /* It's possible legacy PF mistakenly accepted;
 335                                  * but we don't care - simply mark it as
 336                                  * legacy and continue.
 337                                  */
 338                                 req->vfdev_info.capabilities |=
 339                                         VFPF_ACQUIRE_CAP_PRE_FP_HSI;
 340                         }
 341                         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 342                                    "resources acquired\n");
 343                         resources_acquired = true;
 344                 } /* PF refuses to allocate our resources */
 345                 else if (resp->hdr.status == PFVF_STATUS_NO_RESOURCE &&
 346                          attempts < VF_ACQUIRE_THRESH) {
 347                         ecore_vf_pf_acquire_reduce_resc(p_hwfn, p_resc,
 348                                                         &resp->resc);
 349
 350                 } else if (resp->hdr.status == PFVF_STATUS_NOT_SUPPORTED) {
 351                         if (pfdev_info->major_fp_hsi &&
 352                             (pfdev_info->major_fp_hsi != ETH_HSI_VER_MAJOR)) {
 353                                 DP_NOTICE(p_hwfn, false,
 354                                           "PF uses an incompatible fastpath HSI"
 355                                           " %02x.%02x [VF requires %02x.%02x]."
 356                                           " Please change to a VF driver using"
 357                                           " %02x.xx.\n",
 358                                           pfdev_info->major_fp_hsi,
 359                                           pfdev_info->minor_fp_hsi,
 360                                           ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR,
 361                                           pfdev_info->major_fp_hsi);
 362                                 rc = ECORE_INVAL;
 363                                 goto exit;
 364                         }
 365
 366                         if (!pfdev_info->major_fp_hsi) {
 367                                 if (req->vfdev_info.capabilities &
 368                                     VFPF_ACQUIRE_CAP_PRE_FP_HSI) {
 369                                         DP_NOTICE(p_hwfn, false,
 370                                                   "PF uses very old drivers."
 371                                                   " Please change to a VF"
 372                                                   " driver using no later than"
 373                                                   " 8.8.x.x.\n");
 374                                         rc = ECORE_INVAL;
 375                                         goto exit;
 376                                 } else {
 377                                         DP_INFO(p_hwfn,
 378                                                 "PF is old - try re-acquire to"
 379                                                 " see if it supports FW-version"
 380                                                 " override\n");
 381                                         req->vfdev_info.capabilities |=
 382                                                 VFPF_ACQUIRE_CAP_PRE_FP_HSI;
 383                                         continue;
 384                                 }
 385                         }
 386
 387                         /* If PF/VF are using same Major, PF must have had
 388                          * it's reasons. Simply fail.
 389                          */
 390                         DP_NOTICE(p_hwfn, false,
 391                                   "PF rejected acquisition by VF\n");
 392                         rc = ECORE_INVAL;
 393                         goto exit;
 394                 } else {
 395                         DP_ERR(p_hwfn,
 396                                "PF returned err %d to VF acquisition request\n",
 397                                resp->hdr.status);
 398                         rc = ECORE_AGAIN;
 399                         goto exit;
 400                 }
 401         }
 402
 403         /* Mark the PF as legacy, if needed */
 404         if (req->vfdev_info.capabilities &
 405             VFPF_ACQUIRE_CAP_PRE_FP_HSI)
 406                 p_iov->b_pre_fp_hsi = true;
 407
 408         /* In case PF doesn't support multi-queue Tx, update the number of
 409          * CIDs to reflect the number of queues [older PFs didn't fill that
 410          * field].
 411          */
 412         if (!(resp->pfdev_info.capabilities &
 413               PFVF_ACQUIRE_CAP_QUEUE_QIDS))
 414                 resp->resc.num_cids = resp->resc.num_rxqs +
 415                                       resp->resc.num_txqs;
 416
 417         rc = OSAL_VF_UPDATE_ACQUIRE_RESC_RESP(p_hwfn, &resp->resc);
 418         if (rc) {
 419                 DP_NOTICE(p_hwfn, true,
 420                           "VF_UPDATE_ACQUIRE_RESC_RESP Failed:"
 421                           " status = 0x%x.\n",
 422                           rc);
 423                 rc = ECORE_AGAIN;
 424                 goto exit;
 425         }
 426
 427         /* Update bulletin board size with response from PF */
 428         p_iov->bulletin.size = resp->bulletin_size;
 429
 430         /* get HW info */
 431         p_dev->type = resp->pfdev_info.dev_type;
 432         p_dev->chip_rev = (u8)resp->pfdev_info.chip_rev;
 433
 434         DP_INFO(p_hwfn, "Chip details - %s%d\n",
 435                 ECORE_IS_BB(p_dev) ? "BB" : "AH",
 436                 CHIP_REV_IS_A0(p_hwfn->p_dev) ? 0 : 1);
 437
 438         p_dev->chip_num = pfdev_info->chip_num & 0xffff;
 439
 440         /* Learn of the possibility of CMT */
 441         if (IS_LEAD_HWFN(p_hwfn)) {
 442                 if (resp->pfdev_info.capabilities & PFVF_ACQUIRE_CAP_100G) {
 443                         DP_INFO(p_hwfn, "100g VF\n");
 444                         p_dev->num_hwfns = 2;
 445                 }
 446         }
 447
 448         /* @DPDK */
 449         if (((p_iov->b_pre_fp_hsi == true) &
 450             ETH_HSI_VER_MINOR) &&
 451             (resp->pfdev_info.minor_fp_hsi < ETH_HSI_VER_MINOR))
 452                 DP_INFO(p_hwfn,
 453                         "PF is using older fastpath HSI;"
 454                         " %02x.%02x is configured\n",
 455                         ETH_HSI_VER_MAJOR,
 456                         resp->pfdev_info.minor_fp_hsi);
 457
 458 exit:
 459         ecore_vf_pf_req_end(p_hwfn, rc);
 460
 461         return rc;
 462 }
 463
 464 u32 ecore_vf_hw_bar_size(struct ecore_hwfn *p_hwfn,
 465                          enum BAR_ID bar_id)
 466 {
 467         u32 bar_size;
 468
 469         /* Regview size is fixed */
 470         if (bar_id == BAR_ID_0)
 471                 return 1 << 17;
 472
 473         /* Doorbell is received from PF */
 474         bar_size = p_hwfn->vf_iov_info->acquire_resp.pfdev_info.bar_size;
 475         if (bar_size)
 476                 return 1 << bar_size;
 477         return 0;
 478 }
 479
 480 enum _ecore_status_t ecore_vf_hw_prepare(struct ecore_hwfn *p_hwfn)
 481 {
 482         struct ecore_hwfn *p_lead = ECORE_LEADING_HWFN(p_hwfn->p_dev);
 483         struct ecore_vf_iov *p_iov;
 484         u32 reg;
 485         enum _ecore_status_t rc;
 486
 487         /* Set number of hwfns - might be overridden once leading hwfn learns
 488          * actual configuration from PF.
 489          */
 490         if (IS_LEAD_HWFN(p_hwfn))
 491                 p_hwfn->p_dev->num_hwfns = 1;
 492
 493         reg = PXP_VF_BAR0_ME_OPAQUE_ADDRESS;
 494         p_hwfn->hw_info.opaque_fid = (u16)REG_RD(p_hwfn, reg);
 495
 496         reg = PXP_VF_BAR0_ME_CONCRETE_ADDRESS;
 497         p_hwfn->hw_info.concrete_fid = REG_RD(p_hwfn, reg);
 498
 499         /* Allocate vf sriov info */
 500         p_iov = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL, sizeof(*p_iov));
 501         if (!p_iov) {
 502                 DP_NOTICE(p_hwfn, true,
 503                           "Failed to allocate `struct ecore_sriov'\n");
 504                 return ECORE_NOMEM;
 505         }
 506
 507         /* Doorbells are tricky; Upper-layer has alreday set the hwfn doorbell
 508          * value, but there are several incompatibily scenarios where that
 509          * would be incorrect and we'd need to override it.
 510          */
 511         if (p_hwfn->doorbells == OSAL_NULL) {
 512                 p_hwfn->doorbells = (u8 OSAL_IOMEM *)p_hwfn->regview +
 513                                                      PXP_VF_BAR0_START_DQ;
 514         } else if (p_hwfn == p_lead) {
 515                 /* For leading hw-function, value is always correct, but need
 516                  * to handle scenario where legacy PF would not support 100g
 517                  * mapped bars later.
 518                  */
 519                 p_iov->b_doorbell_bar = true;
 520         } else {
 521                 /* here, value would be correct ONLY if the leading hwfn
 522                  * received indication that mapped-bars are supported.
 523                  */
 524                 if (p_lead->vf_iov_info->b_doorbell_bar)
 525                         p_iov->b_doorbell_bar = true;
 526                 else
 527                         p_hwfn->doorbells = (u8 OSAL_IOMEM *)
 528                                             p_hwfn->regview +
 529                                             PXP_VF_BAR0_START_DQ;
 530         }
 531
 532         /* Allocate vf2pf msg */
 533         p_iov->vf2pf_request = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
 534                                                          &p_iov->
 535                                                          vf2pf_request_phys,
 536                                                          sizeof(union
 537                                                                 vfpf_tlvs));
 538         if (!p_iov->vf2pf_request) {
 539                 DP_NOTICE(p_hwfn, true,
 540                          "Failed to allocate `vf2pf_request' DMA memory\n");
 541                 goto free_p_iov;
 542         }
 543
 544         p_iov->pf2vf_reply = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
 545                                                        &p_iov->
 546                                                        pf2vf_reply_phys,
 547                                                        sizeof(union pfvf_tlvs));
 548         if (!p_iov->pf2vf_reply) {
 549                 DP_NOTICE(p_hwfn, true,
 550                           "Failed to allocate `pf2vf_reply' DMA memory\n");
 551                 goto free_vf2pf_request;
 552         }
 553
 554         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 555                    "VF's Request mailbox [%p virt 0x%lx phys], "
 556                    "Response mailbox [%p virt 0x%lx phys]\n",
 557                    p_iov->vf2pf_request,
 558                    (unsigned long)p_iov->vf2pf_request_phys,
 559                    p_iov->pf2vf_reply,
 560                    (unsigned long)p_iov->pf2vf_reply_phys);
 561
 562         /* Allocate Bulletin board */
 563         p_iov->bulletin.size = sizeof(struct ecore_bulletin_content);
 564         p_iov->bulletin.p_virt = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
 565                                                            &p_iov->bulletin.
 566                                                            phys,
 567                                                            p_iov->bulletin.
 568                                                            size);
 569         if (!p_iov->bulletin.p_virt) {
 570                 DP_NOTICE(p_hwfn, false, "Failed to alloc bulletin memory\n");
 571                 goto free_pf2vf_reply;
 572         }
 573         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 574                    "VF's bulletin Board [%p virt 0x%lx phys 0x%08x bytes]\n",
 575                    p_iov->bulletin.p_virt, (unsigned long)p_iov->bulletin.phys,
 576                    p_iov->bulletin.size);
 577
 578 #ifdef CONFIG_ECORE_LOCK_ALLOC
 579         if (OSAL_MUTEX_ALLOC(p_hwfn, &p_iov->mutex)) {
 580                 DP_NOTICE(p_hwfn, false, "Failed to allocate p_iov->mutex\n");
 581                 goto free_bulletin_mem;
 582         }
 583 #endif
 584         OSAL_MUTEX_INIT(&p_iov->mutex);
 585
 586         p_hwfn->vf_iov_info = p_iov;
 587
 588         p_hwfn->hw_info.personality = ECORE_PCI_ETH;
 589
 590         rc = ecore_vf_pf_acquire(p_hwfn);
 591
 592         /* If VF is 100g using a mapped bar and PF is too old to support that,
 593          * acquisition would succeed - but the VF would have no way knowing
 594          * the size of the doorbell bar configured in HW and thus will not
 595          * know how to split it for 2nd hw-function.
 596          * In this case we re-try without the indication of the mapped
 597          * doorbell.
 598          */
 599         if (rc == ECORE_SUCCESS &&
 600             p_iov->b_doorbell_bar &&
 601             !ecore_vf_hw_bar_size(p_hwfn, BAR_ID_1) &&
 602             ECORE_IS_CMT(p_hwfn->p_dev)) {
 603                 rc = _ecore_vf_pf_release(p_hwfn, false);
 604                 if (rc != ECORE_SUCCESS)
 605                         return rc;
 606
 607                 p_iov->b_doorbell_bar = false;
 608                 p_hwfn->doorbells = (u8 OSAL_IOMEM *)p_hwfn->regview +
 609                                                      PXP_VF_BAR0_START_DQ;
 610                 rc = ecore_vf_pf_acquire(p_hwfn);
 611         }
 612
 613         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 614                    "Regview [%p], Doorbell [%p], Device-doorbell [%p]\n",
 615                    p_hwfn->regview, p_hwfn->doorbells,
 616                    p_hwfn->p_dev->doorbells);
 617
 618         return rc;
 619
 620 #ifdef CONFIG_ECORE_LOCK_ALLOC
 621 free_bulletin_mem:
 622         OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev, p_iov->bulletin.p_virt,
 623                                p_iov->bulletin.phys,
 624                                p_iov->bulletin.size);
 625 #endif
 626 free_pf2vf_reply:
 627         OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev, p_iov->pf2vf_reply,
 628                                p_iov->pf2vf_reply_phys,
 629                                sizeof(union pfvf_tlvs));
 630 free_vf2pf_request:
 631         OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev, p_iov->vf2pf_request,
 632                                p_iov->vf2pf_request_phys,
 633                                sizeof(union vfpf_tlvs));
 634 free_p_iov:
 635         OSAL_FREE(p_hwfn->p_dev, p_iov);
 636
 637         return ECORE_NOMEM;
 638 }
 639
 640 /* @DPDK - changed enum ecore_tunn_clss to enum ecore_tunn_mode */
 641 static void
 642 __ecore_vf_prep_tunn_req_tlv(struct vfpf_update_tunn_param_tlv *p_req,
 643                              struct ecore_tunn_update_type *p_src,
 644                              enum ecore_tunn_mode mask, u8 *p_cls)
 645 {
 646         if (p_src->b_update_mode) {
 647                 p_req->tun_mode_update_mask |= (1 << mask);
 648
 649                 if (p_src->b_mode_enabled)
 650                         p_req->tunn_mode |= (1 << mask);
 651         }
 652
 653         *p_cls = p_src->tun_cls;
 654 }
 655
 656 /* @DPDK - changed enum ecore_tunn_clss to enum ecore_tunn_mode */
 657 static void
 658 ecore_vf_prep_tunn_req_tlv(struct vfpf_update_tunn_param_tlv *p_req,
 659                            struct ecore_tunn_update_type *p_src,
 660                            enum ecore_tunn_mode mask, u8 *p_cls,
 661                            struct ecore_tunn_update_udp_port *p_port,
 662                            u8 *p_update_port, u16 *p_udp_port)
 663 {
 664         if (p_port->b_update_port) {
 665                 *p_update_port = 1;
 666                 *p_udp_port = p_port->port;
 667         }
 668
 669         __ecore_vf_prep_tunn_req_tlv(p_req, p_src, mask, p_cls);
 670 }
 671
 672 void ecore_vf_set_vf_start_tunn_update_param(struct ecore_tunnel_info *p_tun)
 673 {
 674         if (p_tun->vxlan.b_mode_enabled)
 675                 p_tun->vxlan.b_update_mode = true;
 676         if (p_tun->l2_geneve.b_mode_enabled)
 677                 p_tun->l2_geneve.b_update_mode = true;
 678         if (p_tun->ip_geneve.b_mode_enabled)
 679                 p_tun->ip_geneve.b_update_mode = true;
 680         if (p_tun->l2_gre.b_mode_enabled)
 681                 p_tun->l2_gre.b_update_mode = true;
 682         if (p_tun->ip_gre.b_mode_enabled)
 683                 p_tun->ip_gre.b_update_mode = true;
 684
 685         p_tun->b_update_rx_cls = true;
 686         p_tun->b_update_tx_cls = true;
 687 }
 688
 689 static void
 690 __ecore_vf_update_tunn_param(struct ecore_tunn_update_type *p_tun,
 691                              u16 feature_mask, u8 tunn_mode, u8 tunn_cls,
 692                              enum ecore_tunn_mode val)
 693 {
 694         if (feature_mask & (1 << val)) {
 695                 p_tun->b_mode_enabled = tunn_mode;
 696                 p_tun->tun_cls = tunn_cls;
 697         } else {
 698                 p_tun->b_mode_enabled = false;
 699         }
 700 }
 701
 702 static void
 703 ecore_vf_update_tunn_param(struct ecore_hwfn *p_hwfn,
 704                            struct ecore_tunnel_info *p_tun,
 705                            struct pfvf_update_tunn_param_tlv *p_resp)
 706 {
 707         /* Update mode and classes provided by PF */
 708         u16 feat_mask = p_resp->tunn_feature_mask;
 709
 710         __ecore_vf_update_tunn_param(&p_tun->vxlan, feat_mask,
 711                                      p_resp->vxlan_mode, p_resp->vxlan_clss,
 712                                      ECORE_MODE_VXLAN_TUNN);
 713         __ecore_vf_update_tunn_param(&p_tun->l2_geneve, feat_mask,
 714                                      p_resp->l2geneve_mode,
 715                                      p_resp->l2geneve_clss,
 716                                      ECORE_MODE_L2GENEVE_TUNN);
 717         __ecore_vf_update_tunn_param(&p_tun->ip_geneve, feat_mask,
 718                                      p_resp->ipgeneve_mode,
 719                                      p_resp->ipgeneve_clss,
 720                                      ECORE_MODE_IPGENEVE_TUNN);
 721         __ecore_vf_update_tunn_param(&p_tun->l2_gre, feat_mask,
 722                                      p_resp->l2gre_mode, p_resp->l2gre_clss,
 723                                      ECORE_MODE_L2GRE_TUNN);
 724         __ecore_vf_update_tunn_param(&p_tun->ip_gre, feat_mask,
 725                                      p_resp->ipgre_mode, p_resp->ipgre_clss,
 726                                      ECORE_MODE_IPGRE_TUNN);
 727         p_tun->geneve_port.port = p_resp->geneve_udp_port;
 728         p_tun->vxlan_port.port = p_resp->vxlan_udp_port;
 729
 730         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 731                    "tunn mode: vxlan=0x%x, l2geneve=0x%x, ipgeneve=0x%x, l2gre=0x%x, ipgre=0x%x",
 732                    p_tun->vxlan.b_mode_enabled, p_tun->l2_geneve.b_mode_enabled,
 733                    p_tun->ip_geneve.b_mode_enabled,
 734                    p_tun->l2_gre.b_mode_enabled,
 735                    p_tun->ip_gre.b_mode_enabled);
 736 }
 737
 738 enum _ecore_status_t
 739 ecore_vf_pf_tunnel_param_update(struct ecore_hwfn *p_hwfn,
 740                                 struct ecore_tunnel_info *p_src)
 741 {
 742         struct ecore_tunnel_info *p_tun = &p_hwfn->p_dev->tunnel;
 743         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 744         struct pfvf_update_tunn_param_tlv *p_resp;
 745         struct vfpf_update_tunn_param_tlv *p_req;
 746         enum _ecore_status_t rc;
 747
 748         p_req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_UPDATE_TUNN_PARAM,
 749                                  sizeof(*p_req));
 750
 751         if (p_src->b_update_rx_cls && p_src->b_update_tx_cls)
 752                 p_req->update_tun_cls = 1;
 753
 754         ecore_vf_prep_tunn_req_tlv(p_req, &p_src->vxlan, ECORE_MODE_VXLAN_TUNN,
 755                                    &p_req->vxlan_clss, &p_src->vxlan_port,
 756                                    &p_req->update_vxlan_port,
 757                                    &p_req->vxlan_port);
 758         ecore_vf_prep_tunn_req_tlv(p_req, &p_src->l2_geneve,
 759                                    ECORE_MODE_L2GENEVE_TUNN,
 760                                    &p_req->l2geneve_clss, &p_src->geneve_port,
 761                                    &p_req->update_geneve_port,
 762                                    &p_req->geneve_port);
 763         __ecore_vf_prep_tunn_req_tlv(p_req, &p_src->ip_geneve,
 764                                      ECORE_MODE_IPGENEVE_TUNN,
 765                                      &p_req->ipgeneve_clss);
 766         __ecore_vf_prep_tunn_req_tlv(p_req, &p_src->l2_gre,
 767                                      ECORE_MODE_L2GRE_TUNN, &p_req->l2gre_clss);
 768         __ecore_vf_prep_tunn_req_tlv(p_req, &p_src->ip_gre,
 769                                      ECORE_MODE_IPGRE_TUNN, &p_req->ipgre_clss);
 770
 771         /* add list termination tlv */
 772         ecore_add_tlv(&p_iov->offset,
 773                       CHANNEL_TLV_LIST_END,
 774                       sizeof(struct channel_list_end_tlv));
 775
 776         p_resp = &p_iov->pf2vf_reply->tunn_param_resp;
 777         rc = ecore_send_msg2pf(p_hwfn, &p_resp->hdr.status, sizeof(*p_resp));
 778
 779         if (rc)
 780                 goto exit;
 781
 782         if (p_resp->hdr.status != PFVF_STATUS_SUCCESS) {
 783                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 784                            "Failed to update tunnel parameters\n");
 785                 rc = ECORE_INVAL;
 786         }
 787
 788         ecore_vf_update_tunn_param(p_hwfn, p_tun, p_resp);
 789 exit:
 790         ecore_vf_pf_req_end(p_hwfn, rc);
 791         return rc;
 792 }
 793
 794 enum _ecore_status_t
 795 ecore_vf_pf_rxq_start(struct ecore_hwfn *p_hwfn,
 796                       struct ecore_queue_cid *p_cid,
 797                       u16 bd_max_bytes,
 798                       dma_addr_t bd_chain_phys_addr,
 799                       dma_addr_t cqe_pbl_addr,
 800                       u16 cqe_pbl_size,
 801                       void OSAL_IOMEM **pp_prod)
 802 {
 803         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 804         struct pfvf_start_queue_resp_tlv *resp;
 805         struct vfpf_start_rxq_tlv *req;
 806         u16 rx_qid = p_cid->rel.queue_id;
 807         enum _ecore_status_t rc;
 808
 809         /* clear mailbox and prep first tlv */
 810         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_START_RXQ, sizeof(*req));
 811
 812         req->rx_qid = rx_qid;
 813         req->cqe_pbl_addr = cqe_pbl_addr;
 814         req->cqe_pbl_size = cqe_pbl_size;
 815         req->rxq_addr = bd_chain_phys_addr;
 816         req->hw_sb = p_cid->sb_igu_id;
 817         req->sb_index = p_cid->sb_idx;
 818         req->bd_max_bytes = bd_max_bytes;
 819         req->stat_id = -1; /* Keep initialized, for future compatibility */
 820
 821         /* If PF is legacy, we'll need to calculate producers ourselves
 822          * as well as clean them.
 823          */
 824         if (p_iov->b_pre_fp_hsi) {
 825                 u8 hw_qid = p_iov->acquire_resp.resc.hw_qid[rx_qid];
 826                 u32 init_prod_val = 0;
 827
 828                 *pp_prod = (u8 OSAL_IOMEM *)p_hwfn->regview +
 829                            MSTORM_QZONE_START(p_hwfn->p_dev) +
 830                            (hw_qid) * MSTORM_QZONE_SIZE;
 831
 832                 /* Init the rcq, rx bd and rx sge (if valid) producers to 0 */
 833                 __internal_ram_wr(p_hwfn, *pp_prod, sizeof(u32),
 834                                   (u32 *)(&init_prod_val));
 835         }
 836
 837         ecore_vf_pf_add_qid(p_hwfn, p_cid);
 838
 839         /* add list termination tlv */
 840         ecore_add_tlv(&p_iov->offset,
 841                       CHANNEL_TLV_LIST_END,
 842                       sizeof(struct channel_list_end_tlv));
 843
 844         resp = &p_iov->pf2vf_reply->queue_start;
 845         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
 846         if (rc)
 847                 goto exit;
 848
 849         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
 850                 rc = ECORE_INVAL;
 851                 goto exit;
 852         }
 853
 854         /* Learn the address of the producer from the response */
 855         if (!p_iov->b_pre_fp_hsi) {
 856                 u32 init_prod_val = 0;
 857
 858                 *pp_prod = (u8 OSAL_IOMEM *)p_hwfn->regview + resp->offset;
 859                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 860                            "Rxq[0x%02x]: producer at %p [offset 0x%08x]\n",
 861                            rx_qid, *pp_prod, resp->offset);
 862
 863                 /* Init the rcq, rx bd and rx sge (if valid) producers to 0.
 864                  * It was actually the PF's responsibility, but since some
 865                  * old PFs might fail to do so, we do this as well.
 866                  */
 867                 OSAL_BUILD_BUG_ON(ETH_HSI_VER_MAJOR != 3);
 868                 __internal_ram_wr(p_hwfn, *pp_prod, sizeof(u32),
 869                                   (u32 *)&init_prod_val);
 870         }
 871
 872 exit:
 873         ecore_vf_pf_req_end(p_hwfn, rc);
 874
 875         return rc;
 876 }
 877
 878 enum _ecore_status_t ecore_vf_pf_rxq_stop(struct ecore_hwfn *p_hwfn,
 879                                           struct ecore_queue_cid *p_cid,
 880                                           bool cqe_completion)
 881 {
 882         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 883         struct vfpf_stop_rxqs_tlv *req;
 884         struct pfvf_def_resp_tlv *resp;
 885         enum _ecore_status_t rc;
 886
 887         /* clear mailbox and prep first tlv */
 888         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_STOP_RXQS, sizeof(*req));
 889
 890         req->rx_qid = p_cid->rel.queue_id;
 891         req->num_rxqs = 1;
 892         req->cqe_completion = cqe_completion;
 893
 894         ecore_vf_pf_add_qid(p_hwfn, p_cid);
 895
 896         /* add list termination tlv */
 897         ecore_add_tlv(&p_iov->offset,
 898                       CHANNEL_TLV_LIST_END,
 899                       sizeof(struct channel_list_end_tlv));
 900
 901         resp = &p_iov->pf2vf_reply->default_resp;
 902         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
 903         if (rc)
 904                 goto exit;
 905
 906         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
 907                 rc = ECORE_INVAL;
 908                 goto exit;
 909         }
 910
 911 exit:
 912         ecore_vf_pf_req_end(p_hwfn, rc);
 913
 914         return rc;
 915 }
 916
 917 enum _ecore_status_t
 918 ecore_vf_pf_txq_start(struct ecore_hwfn *p_hwfn,
 919                       struct ecore_queue_cid *p_cid,
 920                       dma_addr_t pbl_addr, u16 pbl_size,
 921                       void OSAL_IOMEM **pp_doorbell)
 922 {
 923         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 924         struct pfvf_start_queue_resp_tlv *resp;
 925         struct vfpf_start_txq_tlv *req;
 926         u16 qid = p_cid->rel.queue_id;
 927         enum _ecore_status_t rc;
 928
 929         /* clear mailbox and prep first tlv */
 930         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_START_TXQ, sizeof(*req));
 931
 932         req->tx_qid = qid;
 933
 934         /* Tx */
 935         req->pbl_addr = pbl_addr;
 936         req->pbl_size = pbl_size;
 937         req->hw_sb = p_cid->sb_igu_id;
 938         req->sb_index = p_cid->sb_idx;
 939
 940         ecore_vf_pf_add_qid(p_hwfn, p_cid);
 941
 942         /* add list termination tlv */
 943         ecore_add_tlv(&p_iov->offset,
 944                       CHANNEL_TLV_LIST_END,
 945                       sizeof(struct channel_list_end_tlv));
 946
 947         resp  = &p_iov->pf2vf_reply->queue_start;
 948         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
 949         if (rc)
 950                 goto exit;
 951
 952         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
 953                 rc = ECORE_INVAL;
 954                 goto exit;
 955         }
 956
 957         /* Modern PFs provide the actual offsets, while legacy
 958          * provided only the queue id.
 959          */
 960         if (!p_iov->b_pre_fp_hsi) {
 961                 *pp_doorbell = (u8 OSAL_IOMEM *)p_hwfn->doorbells +
 962                                                 resp->offset;
 963         } else {
 964                 u8 cid = p_iov->acquire_resp.resc.cid[qid];
 965
 966                 *pp_doorbell = (u8 OSAL_IOMEM *)p_hwfn->doorbells +
 967                                                 DB_ADDR_VF(cid, DQ_DEMS_LEGACY);
 968         }
 969
 970         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 971                    "Txq[0x%02x]: doorbell at %p [offset 0x%08x]\n",
 972                    qid, *pp_doorbell, resp->offset);
 973 exit:
 974         ecore_vf_pf_req_end(p_hwfn, rc);
 975
 976         return rc;
 977 }
 978
 979 enum _ecore_status_t ecore_vf_pf_txq_stop(struct ecore_hwfn *p_hwfn,
 980                                           struct ecore_queue_cid *p_cid)
 981 {
 982         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 983         struct vfpf_stop_txqs_tlv *req;
 984         struct pfvf_def_resp_tlv *resp;
 985         enum _ecore_status_t rc;
 986
 987         /* clear mailbox and prep first tlv */
 988         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_STOP_TXQS, sizeof(*req));
 989
 990         req->tx_qid = p_cid->rel.queue_id;
 991         req->num_txqs = 1;
 992
 993         ecore_vf_pf_add_qid(p_hwfn, p_cid);
 994
 995         /* add list termination tlv */
 996         ecore_add_tlv(&p_iov->offset,
 997                       CHANNEL_TLV_LIST_END,
 998                       sizeof(struct channel_list_end_tlv));
 999
1000         resp = &p_iov->pf2vf_reply->default_resp;
1001         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1002         if (rc)
1003                 goto exit;
1004
1005         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1006                 rc = ECORE_INVAL;
1007                 goto exit;
1008         }
1009
1010 exit:
1011         ecore_vf_pf_req_end(p_hwfn, rc);
1012
1013         return rc;
1014 }
1015
1016 enum _ecore_status_t ecore_vf_pf_rxqs_update(struct ecore_hwfn *p_hwfn,
1017                                              struct ecore_queue_cid **pp_cid,
1018                                              u8 num_rxqs,
1019                                              u8 comp_cqe_flg,
1020                                              u8 comp_event_flg)
1021 {
1022         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1023         struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
1024         struct vfpf_update_rxq_tlv *req;
1025         enum _ecore_status_t rc;
1026
1027         /* Starting with CHANNEL_TLV_QID and the need for additional queue
1028          * information, this API stopped supporting multiple rxqs.
1029          * TODO - remove this and change the API to accept a single queue-cid
1030          * in a follow-up patch.
1031          */
1032         if (num_rxqs != 1) {
1033                 DP_NOTICE(p_hwfn, true,
1034                           "VFs can no longer update more than a single queue\n");
1035                 return ECORE_INVAL;
1036         }
1037
1038         /* clear mailbox and prep first tlv */
1039         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_UPDATE_RXQ, sizeof(*req));
1040
1041         req->rx_qid = (*pp_cid)->rel.queue_id;
1042         req->num_rxqs = 1;
1043
1044         if (comp_cqe_flg)
1045                 req->flags |= VFPF_RXQ_UPD_COMPLETE_CQE_FLAG;
1046         if (comp_event_flg)
1047                 req->flags |= VFPF_RXQ_UPD_COMPLETE_EVENT_FLAG;
1048
1049         ecore_vf_pf_add_qid(p_hwfn, *pp_cid);
1050
1051         /* add list termination tlv */
1052         ecore_add_tlv(&p_iov->offset,
1053                       CHANNEL_TLV_LIST_END,
1054                       sizeof(struct channel_list_end_tlv));
1055
1056         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1057         if (rc)
1058                 goto exit;
1059
1060         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1061                 rc = ECORE_INVAL;
1062                 goto exit;
1063         }
1064
1065 exit:
1066         ecore_vf_pf_req_end(p_hwfn, rc);
1067         return rc;
1068 }
1069
1070 enum _ecore_status_t
1071 ecore_vf_pf_vport_start(struct ecore_hwfn *p_hwfn, u8 vport_id,
1072                         u16 mtu, u8 inner_vlan_removal,
1073                         enum ecore_tpa_mode tpa_mode, u8 max_buffers_per_cqe,
1074                         u8 only_untagged)
1075 {
1076         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1077         struct vfpf_vport_start_tlv *req;
1078         struct pfvf_def_resp_tlv *resp;
1079         enum _ecore_status_t rc;
1080         int i;
1081
1082         /* clear mailbox and prep first tlv */
1083         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_VPORT_START, sizeof(*req));
1084
1085         req->mtu = mtu;
1086         req->vport_id = vport_id;
1087         req->inner_vlan_removal = inner_vlan_removal;
1088         req->tpa_mode = tpa_mode;
1089         req->max_buffers_per_cqe = max_buffers_per_cqe;
1090         req->only_untagged = only_untagged;
1091
1092         /* status blocks */
1093         for (i = 0; i < p_hwfn->vf_iov_info->acquire_resp.resc.num_sbs; i++) {
1094                 struct ecore_sb_info *p_sb = p_hwfn->vf_iov_info->sbs_info[i];
1095
1096                 if (p_sb)
1097                         req->sb_addr[i] = p_sb->sb_phys;
1098         }
1099
1100         /* add list termination tlv */
1101         ecore_add_tlv(&p_iov->offset,
1102                       CHANNEL_TLV_LIST_END,
1103                       sizeof(struct channel_list_end_tlv));
1104
1105         resp  = &p_iov->pf2vf_reply->default_resp;
1106         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1107         if (rc)
1108                 goto exit;
1109
1110         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1111                 rc = ECORE_INVAL;
1112                 goto exit;
1113         }
1114
1115 exit:
1116         ecore_vf_pf_req_end(p_hwfn, rc);
1117
1118         return rc;
1119 }
1120
1121 enum _ecore_status_t ecore_vf_pf_vport_stop(struct ecore_hwfn *p_hwfn)
1122 {
1123         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1124         struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
1125         enum _ecore_status_t rc;
1126
1127         /* clear mailbox and prep first tlv */
1128         ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_VPORT_TEARDOWN,
1129                          sizeof(struct vfpf_first_tlv));
1130
1131         /* add list termination tlv */
1132         ecore_add_tlv(&p_iov->offset,
1133                       CHANNEL_TLV_LIST_END,
1134                       sizeof(struct channel_list_end_tlv));
1135
1136         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1137         if (rc)
1138                 goto exit;
1139
1140         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1141                 rc = ECORE_INVAL;
1142                 goto exit;
1143         }
1144
1145 exit:
1146         ecore_vf_pf_req_end(p_hwfn, rc);
1147
1148         return rc;
1149 }
1150
1151 static bool
1152 ecore_vf_handle_vp_update_is_needed(struct ecore_hwfn *p_hwfn,
1153                                     struct ecore_sp_vport_update_params *p_data,
1154                                     u16 tlv)
1155 {
1156         switch (tlv) {
1157         case CHANNEL_TLV_VPORT_UPDATE_ACTIVATE:
1158                 return !!(p_data->update_vport_active_rx_flg ||
1159                           p_data->update_vport_active_tx_flg);
1160         case CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH:
1161 #ifndef ASIC_ONLY
1162                 /* FPGA doesn't have PVFC and so can't support tx-switching */
1163                 return !!(p_data->update_tx_switching_flg &&
1164                           !CHIP_REV_IS_FPGA(p_hwfn->p_dev));
1165 #else
1166                 return !!p_data->update_tx_switching_flg;
1167 #endif
1168         case CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP:
1169                 return !!p_data->update_inner_vlan_removal_flg;
1170         case CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN:
1171                 return !!p_data->update_accept_any_vlan_flg;
1172         case CHANNEL_TLV_VPORT_UPDATE_MCAST:
1173                 return !!p_data->update_approx_mcast_flg;
1174         case CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM:
1175                 return !!(p_data->accept_flags.update_rx_mode_config ||
1176                           p_data->accept_flags.update_tx_mode_config);
1177         case CHANNEL_TLV_VPORT_UPDATE_RSS:
1178                 return !!p_data->rss_params;
1179         case CHANNEL_TLV_VPORT_UPDATE_SGE_TPA:
1180                 return !!p_data->sge_tpa_params;
1181         default:
1182                 DP_INFO(p_hwfn, "Unexpected vport-update TLV[%d] %s\n",
1183                         tlv, qede_ecore_channel_tlvs_string[tlv]);
1184                 return false;
1185         }
1186 }
1187
1188 static void
1189 ecore_vf_handle_vp_update_tlvs_resp(struct ecore_hwfn *p_hwfn,
1190                                     struct ecore_sp_vport_update_params *p_data)
1191 {
1192         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1193         struct pfvf_def_resp_tlv *p_resp;
1194         u16 tlv;
1195
1196         for (tlv = CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
1197              tlv < CHANNEL_TLV_VPORT_UPDATE_MAX;
1198              tlv++) {
1199                 if (!ecore_vf_handle_vp_update_is_needed(p_hwfn, p_data, tlv))
1200                         continue;
1201
1202                 p_resp = (struct pfvf_def_resp_tlv *)
1203                     ecore_iov_search_list_tlvs(p_hwfn, p_iov->pf2vf_reply, tlv);
1204                 if (p_resp && p_resp->hdr.status)
1205                         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1206                                    "TLV[%d] type %s Configuration %s\n",
1207                                    tlv, qede_ecore_channel_tlvs_string[tlv],
1208                                    (p_resp && p_resp->hdr.status) ? "succeeded"
1209                                                                   : "failed");
1210         }
1211 }
1212
1213 enum _ecore_status_t
1214 ecore_vf_pf_vport_update(struct ecore_hwfn *p_hwfn,
1215                          struct ecore_sp_vport_update_params *p_params)
1216 {
1217         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1218         struct vfpf_vport_update_tlv *req;
1219         struct pfvf_def_resp_tlv *resp;
1220         u8 update_rx, update_tx;
1221         u32 resp_size = 0;
1222         u16 size, tlv;
1223         enum _ecore_status_t rc;
1224
1225         resp = &p_iov->pf2vf_reply->default_resp;
1226         resp_size = sizeof(*resp);
1227
1228         update_rx = p_params->update_vport_active_rx_flg;
1229         update_tx = p_params->update_vport_active_tx_flg;
1230
1231         /* clear mailbox and prep header tlv */
1232         ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_VPORT_UPDATE, sizeof(*req));
1233
1234         /* Prepare extended tlvs */
1235         if (update_rx || update_tx) {
1236                 struct vfpf_vport_update_activate_tlv *p_act_tlv;
1237
1238                 size = sizeof(struct vfpf_vport_update_activate_tlv);
1239                 p_act_tlv = ecore_add_tlv(&p_iov->offset,
1240                                           CHANNEL_TLV_VPORT_UPDATE_ACTIVATE,
1241                                           size);
1242                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1243
1244                 if (update_rx) {
1245                         p_act_tlv->update_rx = update_rx;
1246                         p_act_tlv->active_rx = p_params->vport_active_rx_flg;
1247                 }
1248
1249                 if (update_tx) {
1250                         p_act_tlv->update_tx = update_tx;
1251                         p_act_tlv->active_tx = p_params->vport_active_tx_flg;
1252                 }
1253         }
1254
1255         if (p_params->update_inner_vlan_removal_flg) {
1256                 struct vfpf_vport_update_vlan_strip_tlv *p_vlan_tlv;
1257
1258                 size = sizeof(struct vfpf_vport_update_vlan_strip_tlv);
1259                 p_vlan_tlv = ecore_add_tlv(&p_iov->offset,
1260                                            CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP,
1261                                            size);
1262                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1263
1264                 p_vlan_tlv->remove_vlan = p_params->inner_vlan_removal_flg;
1265         }
1266
1267         if (p_params->update_tx_switching_flg) {
1268                 struct vfpf_vport_update_tx_switch_tlv *p_tx_switch_tlv;
1269
1270                 size = sizeof(struct vfpf_vport_update_tx_switch_tlv);
1271                 tlv = CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
1272                 p_tx_switch_tlv = ecore_add_tlv(&p_iov->offset,
1273                                                 tlv, size);
1274                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1275
1276                 p_tx_switch_tlv->tx_switching = p_params->tx_switching_flg;
1277         }
1278
1279         if (p_params->update_approx_mcast_flg) {
1280                 struct vfpf_vport_update_mcast_bin_tlv *p_mcast_tlv;
1281
1282                 size = sizeof(struct vfpf_vport_update_mcast_bin_tlv);
1283                 p_mcast_tlv = ecore_add_tlv(&p_iov->offset,
1284                                             CHANNEL_TLV_VPORT_UPDATE_MCAST,
1285                                             size);
1286                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1287
1288                 OSAL_MEMCPY(p_mcast_tlv->bins, p_params->bins,
1289                             sizeof(u32) * ETH_MULTICAST_MAC_BINS_IN_REGS);
1290         }
1291
1292         update_rx = p_params->accept_flags.update_rx_mode_config;
1293         update_tx = p_params->accept_flags.update_tx_mode_config;
1294
1295         if (update_rx || update_tx) {
1296                 struct vfpf_vport_update_accept_param_tlv *p_accept_tlv;
1297
1298                 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
1299                 size = sizeof(struct vfpf_vport_update_accept_param_tlv);
1300                 p_accept_tlv = ecore_add_tlv(&p_iov->offset, tlv, size);
1301                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1302
1303                 if (update_rx) {
1304                         p_accept_tlv->update_rx_mode = update_rx;
1305                         p_accept_tlv->rx_accept_filter =
1306                             p_params->accept_flags.rx_accept_filter;
1307                 }
1308
1309                 if (update_tx) {
1310                         p_accept_tlv->update_tx_mode = update_tx;
1311                         p_accept_tlv->tx_accept_filter =
1312                             p_params->accept_flags.tx_accept_filter;
1313                 }
1314         }
1315
1316         if (p_params->rss_params) {
1317                 struct ecore_rss_params *rss_params = p_params->rss_params;
1318                 struct vfpf_vport_update_rss_tlv *p_rss_tlv;
1319                 int i, table_size;
1320
1321                 size = sizeof(struct vfpf_vport_update_rss_tlv);
1322                 p_rss_tlv = ecore_add_tlv(&p_iov->offset,
1323                                           CHANNEL_TLV_VPORT_UPDATE_RSS, size);
1324                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1325
1326                 if (rss_params->update_rss_config)
1327                         p_rss_tlv->update_rss_flags |=
1328                             VFPF_UPDATE_RSS_CONFIG_FLAG;
1329                 if (rss_params->update_rss_capabilities)
1330                         p_rss_tlv->update_rss_flags |=
1331                             VFPF_UPDATE_RSS_CAPS_FLAG;
1332                 if (rss_params->update_rss_ind_table)
1333                         p_rss_tlv->update_rss_flags |=
1334                             VFPF_UPDATE_RSS_IND_TABLE_FLAG;
1335                 if (rss_params->update_rss_key)
1336                         p_rss_tlv->update_rss_flags |= VFPF_UPDATE_RSS_KEY_FLAG;
1337
1338                 p_rss_tlv->rss_enable = rss_params->rss_enable;
1339                 p_rss_tlv->rss_caps = rss_params->rss_caps;
1340                 p_rss_tlv->rss_table_size_log = rss_params->rss_table_size_log;
1341
1342                 table_size = OSAL_MIN_T(int, T_ETH_INDIRECTION_TABLE_SIZE,
1343                                         1 << p_rss_tlv->rss_table_size_log);
1344                 for (i = 0; i < table_size; i++) {
1345                         struct ecore_queue_cid *p_queue;
1346
1347                         p_queue = rss_params->rss_ind_table[i];
1348                         p_rss_tlv->rss_ind_table[i] = p_queue->rel.queue_id;
1349                 }
1350
1351                 OSAL_MEMCPY(p_rss_tlv->rss_key, rss_params->rss_key,
1352                             sizeof(rss_params->rss_key));
1353         }
1354
1355         if (p_params->update_accept_any_vlan_flg) {
1356                 struct vfpf_vport_update_accept_any_vlan_tlv *p_any_vlan_tlv;
1357
1358                 size = sizeof(struct vfpf_vport_update_accept_any_vlan_tlv);
1359                 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
1360                 p_any_vlan_tlv = ecore_add_tlv(&p_iov->offset, tlv, size);
1361
1362                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1363                 p_any_vlan_tlv->accept_any_vlan = p_params->accept_any_vlan;
1364                 p_any_vlan_tlv->update_accept_any_vlan_flg =
1365                     p_params->update_accept_any_vlan_flg;
1366         }
1367
1368         if (p_params->sge_tpa_params) {
1369                 struct ecore_sge_tpa_params *sge_tpa_params;
1370                 struct vfpf_vport_update_sge_tpa_tlv *p_sge_tpa_tlv;
1371
1372                 sge_tpa_params = p_params->sge_tpa_params;
1373                 size = sizeof(struct vfpf_vport_update_sge_tpa_tlv);
1374                 p_sge_tpa_tlv = ecore_add_tlv(&p_iov->offset,
1375                                               CHANNEL_TLV_VPORT_UPDATE_SGE_TPA,
1376                                               size);
1377                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1378
1379                 if (sge_tpa_params->update_tpa_en_flg)
1380                         p_sge_tpa_tlv->update_sge_tpa_flags |=
1381                             VFPF_UPDATE_TPA_EN_FLAG;
1382                 if (sge_tpa_params->update_tpa_param_flg)
1383                         p_sge_tpa_tlv->update_sge_tpa_flags |=
1384                             VFPF_UPDATE_TPA_PARAM_FLAG;
1385
1386                 if (sge_tpa_params->tpa_ipv4_en_flg)
1387                         p_sge_tpa_tlv->sge_tpa_flags |= VFPF_TPA_IPV4_EN_FLAG;
1388                 if (sge_tpa_params->tpa_ipv6_en_flg)
1389                         p_sge_tpa_tlv->sge_tpa_flags |= VFPF_TPA_IPV6_EN_FLAG;
1390                 if (sge_tpa_params->tpa_pkt_split_flg)
1391                         p_sge_tpa_tlv->sge_tpa_flags |= VFPF_TPA_PKT_SPLIT_FLAG;
1392                 if (sge_tpa_params->tpa_hdr_data_split_flg)
1393                         p_sge_tpa_tlv->sge_tpa_flags |=
1394                             VFPF_TPA_HDR_DATA_SPLIT_FLAG;
1395                 if (sge_tpa_params->tpa_gro_consistent_flg)
1396                         p_sge_tpa_tlv->sge_tpa_flags |=
1397                             VFPF_TPA_GRO_CONSIST_FLAG;
1398                 if (sge_tpa_params->tpa_ipv4_tunn_en_flg)
1399                         p_sge_tpa_tlv->sge_tpa_flags |=
1400                             VFPF_TPA_TUNN_IPV4_EN_FLAG;
1401                 if (sge_tpa_params->tpa_ipv6_tunn_en_flg)
1402                         p_sge_tpa_tlv->sge_tpa_flags |=
1403                             VFPF_TPA_TUNN_IPV6_EN_FLAG;
1404
1405                 p_sge_tpa_tlv->tpa_max_aggs_num =
1406                     sge_tpa_params->tpa_max_aggs_num;
1407                 p_sge_tpa_tlv->tpa_max_size = sge_tpa_params->tpa_max_size;
1408                 p_sge_tpa_tlv->tpa_min_size_to_start =
1409                     sge_tpa_params->tpa_min_size_to_start;
1410                 p_sge_tpa_tlv->tpa_min_size_to_cont =
1411                     sge_tpa_params->tpa_min_size_to_cont;
1412
1413                 p_sge_tpa_tlv->max_buffers_per_cqe =
1414                     sge_tpa_params->max_buffers_per_cqe;
1415         }
1416
1417         /* add list termination tlv */
1418         ecore_add_tlv(&p_iov->offset,
1419                       CHANNEL_TLV_LIST_END,
1420                       sizeof(struct channel_list_end_tlv));
1421
1422         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, resp_size);
1423         if (rc)
1424                 goto exit;
1425
1426         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1427                 rc = ECORE_INVAL;
1428                 goto exit;
1429         }
1430
1431         ecore_vf_handle_vp_update_tlvs_resp(p_hwfn, p_params);
1432
1433 exit:
1434         ecore_vf_pf_req_end(p_hwfn, rc);
1435
1436         return rc;
1437 }
1438
1439 enum _ecore_status_t ecore_vf_pf_reset(struct ecore_hwfn *p_hwfn)
1440 {
1441         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1442         struct pfvf_def_resp_tlv *resp;
1443         struct vfpf_first_tlv *req;
1444         enum _ecore_status_t rc;
1445
1446         /* clear mailbox and prep first tlv */
1447         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_CLOSE, sizeof(*req));
1448
1449         /* add list termination tlv */
1450         ecore_add_tlv(&p_iov->offset,
1451                       CHANNEL_TLV_LIST_END,
1452                       sizeof(struct channel_list_end_tlv));
1453
1454         resp = &p_iov->pf2vf_reply->default_resp;
1455         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1456         if (rc)
1457                 goto exit;
1458
1459         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1460                 rc = ECORE_AGAIN;
1461                 goto exit;
1462         }
1463
1464         p_hwfn->b_int_enabled = 0;
1465
1466 exit:
1467         ecore_vf_pf_req_end(p_hwfn, rc);
1468
1469         return rc;
1470 }
1471
1472 void ecore_vf_pf_filter_mcast(struct ecore_hwfn *p_hwfn,
1473                               struct ecore_filter_mcast *p_filter_cmd)
1474 {
1475         struct ecore_sp_vport_update_params sp_params;
1476         int i;
1477
1478         OSAL_MEMSET(&sp_params, 0, sizeof(sp_params));
1479         sp_params.update_approx_mcast_flg = 1;
1480
1481         if (p_filter_cmd->opcode == ECORE_FILTER_ADD) {
1482                 for (i = 0; i < p_filter_cmd->num_mc_addrs; i++) {
1483                         u32 bit;
1484
1485                         bit = ecore_mcast_bin_from_mac(p_filter_cmd->mac[i]);
1486                         sp_params.bins[bit / 32] |= 1 << (bit % 32);
1487                 }
1488         }
1489
1490         ecore_vf_pf_vport_update(p_hwfn, &sp_params);
1491 }
1492
1493 enum _ecore_status_t ecore_vf_pf_filter_ucast(struct ecore_hwfn *p_hwfn,
1494                                               struct ecore_filter_ucast
1495                                               *p_ucast)
1496 {
1497         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1498         struct vfpf_ucast_filter_tlv *req;
1499         struct pfvf_def_resp_tlv *resp;
1500         enum _ecore_status_t rc;
1501
1502         /* Sanitize */
1503         if (p_ucast->opcode == ECORE_FILTER_MOVE) {
1504                 DP_NOTICE(p_hwfn, true,
1505                           "VFs don't support Moving of filters\n");
1506                 return ECORE_INVAL;
1507         }
1508
1509         /* clear mailbox and prep first tlv */
1510         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_UCAST_FILTER, sizeof(*req));
1511         req->opcode = (u8)p_ucast->opcode;
1512         req->type = (u8)p_ucast->type;
1513         OSAL_MEMCPY(req->mac, p_ucast->mac, ETH_ALEN);
1514         req->vlan = p_ucast->vlan;
1515
1516         /* add list termination tlv */
1517         ecore_add_tlv(&p_iov->offset,
1518                       CHANNEL_TLV_LIST_END,
1519                       sizeof(struct channel_list_end_tlv));
1520
1521         resp = &p_iov->pf2vf_reply->default_resp;
1522         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1523         if (rc)
1524                 goto exit;
1525
1526         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1527                 rc = ECORE_AGAIN;
1528                 goto exit;
1529         }
1530
1531 exit:
1532         ecore_vf_pf_req_end(p_hwfn, rc);
1533
1534         return rc;
1535 }
1536
1537 enum _ecore_status_t ecore_vf_pf_int_cleanup(struct ecore_hwfn *p_hwfn)
1538 {
1539         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1540         struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
1541         enum _ecore_status_t rc;
1542
1543         /* clear mailbox and prep first tlv */
1544         ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_INT_CLEANUP,
1545                          sizeof(struct vfpf_first_tlv));
1546
1547         /* add list termination tlv */
1548         ecore_add_tlv(&p_iov->offset,
1549                       CHANNEL_TLV_LIST_END,
1550                       sizeof(struct channel_list_end_tlv));
1551
1552         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1553         if (rc)
1554                 goto exit;
1555
1556         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1557                 rc = ECORE_INVAL;
1558                 goto exit;
1559         }
1560
1561 exit:
1562         ecore_vf_pf_req_end(p_hwfn, rc);
1563
1564         return rc;
1565 }
1566
1567 enum _ecore_status_t ecore_vf_pf_get_coalesce(struct ecore_hwfn *p_hwfn,
1568                                               u16 *p_coal,
1569                                               struct ecore_queue_cid *p_cid)
1570 {
1571         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1572         struct pfvf_read_coal_resp_tlv *resp;
1573         struct vfpf_read_coal_req_tlv *req;
1574         enum _ecore_status_t rc;
1575
1576         /* clear mailbox and prep header tlv */
1577         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_COALESCE_READ,
1578                                sizeof(*req));
1579         req->qid = p_cid->rel.queue_id;
1580         req->is_rx = p_cid->b_is_rx ? 1 : 0;
1581
1582         ecore_add_tlv(&p_iov->offset, CHANNEL_TLV_LIST_END,
1583                       sizeof(struct channel_list_end_tlv));
1584         resp = &p_iov->pf2vf_reply->read_coal_resp;
1585
1586         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1587         if (rc != ECORE_SUCCESS)
1588                 goto exit;
1589
1590         if (resp->hdr.status != PFVF_STATUS_SUCCESS)
1591                 goto exit;
1592
1593         *p_coal = resp->coal;
1594 exit:
1595         ecore_vf_pf_req_end(p_hwfn, rc);
1596
1597         return rc;
1598 }
1599
1600 enum _ecore_status_t
1601 ecore_vf_pf_set_coalesce(struct ecore_hwfn *p_hwfn, u16 rx_coal, u16 tx_coal,
1602                          struct ecore_queue_cid     *p_cid)
1603 {
1604         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1605         struct vfpf_update_coalesce *req;
1606         struct pfvf_def_resp_tlv *resp;
1607         enum _ecore_status_t rc;
1608
1609         /* clear mailbox and prep header tlv */
1610         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_COALESCE_UPDATE,
1611                                sizeof(*req));
1612
1613         req->rx_coal = rx_coal;
1614         req->tx_coal = tx_coal;
1615         req->qid = p_cid->rel.queue_id;
1616
1617         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1618                    "Setting coalesce rx_coal = %d, tx_coal = %d at queue = %d\n",
1619                    rx_coal, tx_coal, req->qid);
1620
1621         /* add list termination tlv */
1622         ecore_add_tlv(&p_iov->offset, CHANNEL_TLV_LIST_END,
1623                       sizeof(struct channel_list_end_tlv));
1624
1625         resp = &p_iov->pf2vf_reply->default_resp;
1626         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1627
1628         if (rc != ECORE_SUCCESS)
1629                 goto exit;
1630
1631         if (resp->hdr.status != PFVF_STATUS_SUCCESS)
1632                 goto exit;
1633
1634         p_hwfn->p_dev->rx_coalesce_usecs = rx_coal;
1635         p_hwfn->p_dev->tx_coalesce_usecs = tx_coal;
1636
1637 exit:
1638         ecore_vf_pf_req_end(p_hwfn, rc);
1639         return rc;
1640 }
1641
1642 enum _ecore_status_t
1643 ecore_vf_pf_update_mtu(struct ecore_hwfn *p_hwfn, u16 mtu)
1644 {
1645         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1646         struct vfpf_update_mtu_tlv *p_req;
1647         struct pfvf_def_resp_tlv *p_resp;
1648         enum _ecore_status_t rc;
1649
1650         if (!mtu)
1651                 return ECORE_INVAL;
1652
1653         /* clear mailbox and prep header tlv */
1654         p_req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_UPDATE_MTU,
1655                                  sizeof(*p_req));
1656         p_req->mtu = mtu;
1657         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1658                    "Requesting MTU update to %d\n", mtu);
1659
1660         /* add list termination tlv */
1661         ecore_add_tlv(&p_iov->offset,
1662                       CHANNEL_TLV_LIST_END,
1663                       sizeof(struct channel_list_end_tlv));
1664
1665         p_resp = &p_iov->pf2vf_reply->default_resp;
1666         rc = ecore_send_msg2pf(p_hwfn, &p_resp->hdr.status, sizeof(*p_resp));
1667         if (p_resp->hdr.status == PFVF_STATUS_NOT_SUPPORTED)
1668                 rc = ECORE_INVAL;
1669
1670         ecore_vf_pf_req_end(p_hwfn, rc);
1671
1672         return rc;
1673 }
1674
1675 u16 ecore_vf_get_igu_sb_id(struct ecore_hwfn *p_hwfn,
1676                            u16               sb_id)
1677 {
1678         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1679
1680         if (!p_iov) {
1681                 DP_NOTICE(p_hwfn, true, "vf_sriov_info isn't initialized\n");
1682                 return 0;
1683         }
1684
1685         return p_iov->acquire_resp.resc.hw_sbs[sb_id].hw_sb_id;
1686 }
1687
1688 void ecore_vf_set_sb_info(struct ecore_hwfn *p_hwfn,
1689                           u16 sb_id, struct ecore_sb_info *p_sb)
1690 {
1691         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1692
1693         if (!p_iov) {
1694                 DP_NOTICE(p_hwfn, true, "vf_sriov_info isn't initialized\n");
1695                 return;
1696         }
1697
1698         if (sb_id >= PFVF_MAX_SBS_PER_VF) {
1699                 DP_NOTICE(p_hwfn, true, "Can't configure SB %04x\n", sb_id);
1700                 return;
1701         }
1702
1703         p_iov->sbs_info[sb_id] = p_sb;
1704 }
1705
1706 enum _ecore_status_t ecore_vf_read_bulletin(struct ecore_hwfn *p_hwfn,
1707                                             u8 *p_change)
1708 {
1709         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1710         struct ecore_bulletin_content shadow;
1711         u32 crc, crc_size;
1712
1713         crc_size = sizeof(p_iov->bulletin.p_virt->crc);
1714         *p_change = 0;
1715
1716         /* Need to guarantee PF is not in the middle of writing it */
1717         OSAL_MEMCPY(&shadow, p_iov->bulletin.p_virt, p_iov->bulletin.size);
1718
1719         /* If version did not update, no need to do anything */
1720         if (shadow.version == p_iov->bulletin_shadow.version)
1721                 return ECORE_SUCCESS;
1722
1723         /* Verify the bulletin we see is valid */
1724         crc = OSAL_CRC32(0, (u8 *)&shadow + crc_size,
1725                          p_iov->bulletin.size - crc_size);
1726         if (crc != shadow.crc)
1727                 return ECORE_AGAIN;
1728
1729         /* Set the shadow bulletin and process it */
1730         OSAL_MEMCPY(&p_iov->bulletin_shadow, &shadow, p_iov->bulletin.size);
1731
1732         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1733                    "Read a bulletin update %08x\n", shadow.version);
1734
1735         *p_change = 1;
1736
1737         return ECORE_SUCCESS;
1738 }
1739
1740 void __ecore_vf_get_link_params(struct ecore_mcp_link_params *p_params,
1741                                 struct ecore_bulletin_content *p_bulletin)
1742 {
1743         OSAL_MEMSET(p_params, 0, sizeof(*p_params));
1744
1745         p_params->speed.autoneg = p_bulletin->req_autoneg;
1746         p_params->speed.advertised_speeds = p_bulletin->req_adv_speed;
1747         p_params->speed.forced_speed = p_bulletin->req_forced_speed;
1748         p_params->pause.autoneg = p_bulletin->req_autoneg_pause;
1749         p_params->pause.forced_rx = p_bulletin->req_forced_rx;
1750         p_params->pause.forced_tx = p_bulletin->req_forced_tx;
1751         p_params->loopback_mode = p_bulletin->req_loopback;
1752 }
1753
1754 void ecore_vf_get_link_params(struct ecore_hwfn *p_hwfn,
1755                               struct ecore_mcp_link_params *params)
1756 {
1757         __ecore_vf_get_link_params(params,
1758                                    &p_hwfn->vf_iov_info->bulletin_shadow);
1759 }
1760
1761 void __ecore_vf_get_link_state(struct ecore_mcp_link_state *p_link,
1762                                struct ecore_bulletin_content *p_bulletin)
1763 {
1764         OSAL_MEMSET(p_link, 0, sizeof(*p_link));
1765
1766         p_link->link_up = p_bulletin->link_up;
1767         p_link->speed = p_bulletin->speed;
1768         p_link->full_duplex = p_bulletin->full_duplex;
1769         p_link->an = p_bulletin->autoneg;
1770         p_link->an_complete = p_bulletin->autoneg_complete;
1771         p_link->parallel_detection = p_bulletin->parallel_detection;
1772         p_link->pfc_enabled = p_bulletin->pfc_enabled;
1773         p_link->partner_adv_speed = p_bulletin->partner_adv_speed;
1774         p_link->partner_tx_flow_ctrl_en = p_bulletin->partner_tx_flow_ctrl_en;
1775         p_link->partner_rx_flow_ctrl_en = p_bulletin->partner_rx_flow_ctrl_en;
1776         p_link->partner_adv_pause = p_bulletin->partner_adv_pause;
1777         p_link->sfp_tx_fault = p_bulletin->sfp_tx_fault;
1778 }
1779
1780 void ecore_vf_get_link_state(struct ecore_hwfn *p_hwfn,
1781                              struct ecore_mcp_link_state *link)
1782 {
1783         __ecore_vf_get_link_state(link,
1784                                   &p_hwfn->vf_iov_info->bulletin_shadow);
1785 }
1786
1787 void __ecore_vf_get_link_caps(struct ecore_mcp_link_capabilities *p_link_caps,
1788                               struct ecore_bulletin_content *p_bulletin)
1789 {
1790         OSAL_MEMSET(p_link_caps, 0, sizeof(*p_link_caps));
1791         p_link_caps->speed_capabilities = p_bulletin->capability_speed;
1792 }
1793
1794 void ecore_vf_get_link_caps(struct ecore_hwfn *p_hwfn,
1795                             struct ecore_mcp_link_capabilities *p_link_caps)
1796 {
1797         __ecore_vf_get_link_caps(p_link_caps,
1798                                  &p_hwfn->vf_iov_info->bulletin_shadow);
1799 }
1800
1801 void ecore_vf_get_num_rxqs(struct ecore_hwfn *p_hwfn, u8 *num_rxqs)
1802 {
1803         *num_rxqs = p_hwfn->vf_iov_info->acquire_resp.resc.num_rxqs;
1804 }
1805
1806 void ecore_vf_get_num_txqs(struct ecore_hwfn *p_hwfn,
1807                            u8 *num_txqs)
1808 {
1809         *num_txqs = p_hwfn->vf_iov_info->acquire_resp.resc.num_txqs;
1810 }
1811
1812 void ecore_vf_get_port_mac(struct ecore_hwfn *p_hwfn, u8 *port_mac)
1813 {
1814         OSAL_MEMCPY(port_mac,
1815                     p_hwfn->vf_iov_info->acquire_resp.pfdev_info.port_mac,
1816                     ETH_ALEN);
1817 }
1818
1819 void ecore_vf_get_num_vlan_filters(struct ecore_hwfn *p_hwfn,
1820                                    u8 *num_vlan_filters)
1821 {
1822         struct ecore_vf_iov *p_vf;
1823
1824         p_vf = p_hwfn->vf_iov_info;
1825         *num_vlan_filters = p_vf->acquire_resp.resc.num_vlan_filters;
1826 }
1827
1828 void ecore_vf_get_num_sbs(struct ecore_hwfn *p_hwfn,
1829                           u32 *num_sbs)
1830 {
1831         struct ecore_vf_iov *p_vf;
1832
1833         p_vf = p_hwfn->vf_iov_info;
1834         *num_sbs = (u32)p_vf->acquire_resp.resc.num_sbs;
1835 }
1836
1837 void ecore_vf_get_num_mac_filters(struct ecore_hwfn *p_hwfn,
1838                                   u32 *num_mac_filters)
1839 {
1840         struct ecore_vf_iov *p_vf = p_hwfn->vf_iov_info;
1841
1842         *num_mac_filters = p_vf->acquire_resp.resc.num_mac_filters;
1843 }
1844
1845 bool ecore_vf_check_mac(struct ecore_hwfn *p_hwfn, u8 *mac)
1846 {
1847         struct ecore_bulletin_content *bulletin;
1848
1849         bulletin = &p_hwfn->vf_iov_info->bulletin_shadow;
1850         if (!(bulletin->valid_bitmap & (1 << MAC_ADDR_FORCED)))
1851                 return true;
1852
1853         /* Forbid VF from changing a MAC enforced by PF */
1854         if (OSAL_MEMCMP(bulletin->mac, mac, ETH_ALEN))
1855                 return false;
1856
1857         return false;
1858 }
1859
1860 bool ecore_vf_bulletin_get_forced_mac(struct ecore_hwfn *hwfn, u8 *dst_mac,
1861                                       u8 *p_is_forced)
1862 {
1863         struct ecore_bulletin_content *bulletin;
1864
1865         bulletin = &hwfn->vf_iov_info->bulletin_shadow;
1866
1867         if (bulletin->valid_bitmap & (1 << MAC_ADDR_FORCED)) {
1868                 if (p_is_forced)
1869                         *p_is_forced = 1;
1870         } else if (bulletin->valid_bitmap & (1 << VFPF_BULLETIN_MAC_ADDR)) {
1871                 if (p_is_forced)
1872                         *p_is_forced = 0;
1873         } else {
1874                 return false;
1875         }
1876
1877         OSAL_MEMCPY(dst_mac, bulletin->mac, ETH_ALEN);
1878
1879         return true;
1880 }
1881
1882 void ecore_vf_bulletin_get_udp_ports(struct ecore_hwfn *p_hwfn,
1883                                      u16 *p_vxlan_port,
1884                                      u16 *p_geneve_port)
1885 {
1886         struct ecore_bulletin_content *p_bulletin;
1887
1888         p_bulletin = &p_hwfn->vf_iov_info->bulletin_shadow;
1889
1890         *p_vxlan_port = p_bulletin->vxlan_udp_port;
1891         *p_geneve_port = p_bulletin->geneve_udp_port;
1892 }
1893
1894 bool ecore_vf_bulletin_get_forced_vlan(struct ecore_hwfn *hwfn, u16 *dst_pvid)
1895 {
1896         struct ecore_bulletin_content *bulletin;
1897
1898         bulletin = &hwfn->vf_iov_info->bulletin_shadow;
1899
1900         if (!(bulletin->valid_bitmap & (1 << VLAN_ADDR_FORCED)))
1901                 return false;
1902
1903         if (dst_pvid)
1904                 *dst_pvid = bulletin->pvid;
1905
1906         return true;
1907 }
1908
1909 bool ecore_vf_get_pre_fp_hsi(struct ecore_hwfn *p_hwfn)
1910 {
1911         return p_hwfn->vf_iov_info->b_pre_fp_hsi;
1912 }
1913
1914 void ecore_vf_get_fw_version(struct ecore_hwfn *p_hwfn,
1915                              u16 *fw_major, u16 *fw_minor, u16 *fw_rev,
1916                              u16 *fw_eng)
1917 {
1918         struct pf_vf_pfdev_info *info;
1919
1920         info = &p_hwfn->vf_iov_info->acquire_resp.pfdev_info;
1921
1922         *fw_major = info->fw_major;
1923         *fw_minor = info->fw_minor;
1924         *fw_rev = info->fw_rev;
1925         *fw_eng = info->fw_eng;
1926 }
1927
1928 #ifdef CONFIG_ECORE_SW_CHANNEL
1929 void ecore_vf_set_hw_channel(struct ecore_hwfn *p_hwfn, bool b_is_hw)
1930 {
1931         p_hwfn->vf_iov_info->b_hw_channel = b_is_hw;
1932 }
1933 #endif