2 * Copyright (c) 2015-2016 Solarflare Communications Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
16 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
18 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
21 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
22 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
23 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
24 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 * The views and conclusions contained in the software and documentation are
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28 * policies, either expressed or implied, of the FreeBSD Project.
31 #ifndef _SYS_EF10_IMPL_H
32 #define _SYS_EF10_IMPL_H
38 #if (EFSYS_OPT_HUNTINGTON && EFSYS_OPT_MEDFORD)
39 #define EF10_MAX_PIOBUF_NBUFS MAX(HUNT_PIOBUF_NBUFS, MEDFORD_PIOBUF_NBUFS)
40 #elif EFSYS_OPT_HUNTINGTON
41 #define EF10_MAX_PIOBUF_NBUFS HUNT_PIOBUF_NBUFS
42 #elif EFSYS_OPT_MEDFORD
43 #define EF10_MAX_PIOBUF_NBUFS MEDFORD_PIOBUF_NBUFS
47 * FIXME: This is just a power of 2 which fits in an MCDI v1 message, and could
48 * possibly be increased, or the write size reported by newer firmware used
51 #define EF10_NVRAM_CHUNK 0x80
53 /* Alignment requirement for value written to RX WPTR:
54 * the WPTR must be aligned to an 8 descriptor boundary
56 #define EF10_RX_WPTR_ALIGN 8
59 * Max byte offset into the packet the TCP header must start for the hardware
60 * to be able to parse the packet correctly.
62 #define EF10_TCP_HEADER_OFFSET_LIMIT 208
64 /* Invalid RSS context handle */
65 #define EF10_RSS_CONTEXT_INVALID (0xffffffff)
70 __checkReturn efx_rc_t
78 __checkReturn efx_rc_t
81 __in unsigned int index,
82 __in efsys_mem_t *esmp,
93 __checkReturn efx_rc_t
96 __in unsigned int count);
103 __checkReturn efx_rc_t
106 __in unsigned int us);
109 ef10_ev_rxlabel_init(
112 __in unsigned int label,
113 __in boolean_t packed_stream);
116 ef10_ev_rxlabel_fini(
118 __in unsigned int label);
122 __checkReturn efx_rc_t
125 __in efx_intr_type_t type,
126 __in efsys_mem_t *esmp);
130 __in efx_nic_t *enp);
134 __in efx_nic_t *enp);
137 ef10_intr_disable_unlocked(
138 __in efx_nic_t *enp);
140 __checkReturn efx_rc_t
143 __in unsigned int level);
146 ef10_intr_status_line(
148 __out boolean_t *fatalp,
149 __out uint32_t *qmaskp);
152 ef10_intr_status_message(
154 __in unsigned int message,
155 __out boolean_t *fatalp);
159 __in efx_nic_t *enp);
162 __in efx_nic_t *enp);
166 extern __checkReturn efx_rc_t
168 __in efx_nic_t *enp);
170 extern __checkReturn efx_rc_t
171 ef10_nic_set_drv_limits(
172 __inout efx_nic_t *enp,
173 __in efx_drv_limits_t *edlp);
175 extern __checkReturn efx_rc_t
176 ef10_nic_get_vi_pool(
178 __out uint32_t *vi_countp);
180 extern __checkReturn efx_rc_t
181 ef10_nic_get_bar_region(
183 __in efx_nic_region_t region,
184 __out uint32_t *offsetp,
185 __out size_t *sizep);
187 extern __checkReturn efx_rc_t
189 __in efx_nic_t *enp);
191 extern __checkReturn efx_rc_t
193 __in efx_nic_t *enp);
197 extern __checkReturn efx_rc_t
198 ef10_nic_register_test(
199 __in efx_nic_t *enp);
201 #endif /* EFSYS_OPT_DIAG */
205 __in efx_nic_t *enp);
209 __in efx_nic_t *enp);
214 extern __checkReturn efx_rc_t
217 __out efx_link_mode_t *link_modep);
219 extern __checkReturn efx_rc_t
222 __out boolean_t *mac_upp);
224 extern __checkReturn efx_rc_t
226 __in efx_nic_t *enp);
228 extern __checkReturn efx_rc_t
230 __in efx_nic_t *enp);
232 extern __checkReturn efx_rc_t
237 extern __checkReturn efx_rc_t
238 ef10_mac_reconfigure(
239 __in efx_nic_t *enp);
241 extern __checkReturn efx_rc_t
242 ef10_mac_multicast_list_set(
243 __in efx_nic_t *enp);
245 extern __checkReturn efx_rc_t
246 ef10_mac_filter_default_rxq_set(
249 __in boolean_t using_rss);
252 ef10_mac_filter_default_rxq_clear(
253 __in efx_nic_t *enp);
260 extern __checkReturn efx_rc_t
263 __in const efx_mcdi_transport_t *mtp);
267 __in efx_nic_t *enp);
270 ef10_mcdi_send_request(
272 __in_bcount(hdr_len) void *hdrp,
274 __in_bcount(sdu_len) void *sdup,
275 __in size_t sdu_len);
277 extern __checkReturn boolean_t
278 ef10_mcdi_poll_response(
279 __in efx_nic_t *enp);
282 ef10_mcdi_read_response(
284 __out_bcount(length) void *bufferp,
289 ef10_mcdi_poll_reboot(
290 __in efx_nic_t *enp);
292 extern __checkReturn efx_rc_t
293 ef10_mcdi_feature_supported(
295 __in efx_mcdi_feature_id_t id,
296 __out boolean_t *supportedp);
299 ef10_mcdi_get_timeout(
301 __in efx_mcdi_req_t *emrp,
302 __out uint32_t *timeoutp);
304 #endif /* EFSYS_OPT_MCDI */
311 typedef struct ef10_link_state_s {
312 uint32_t els_adv_cap_mask;
313 uint32_t els_lp_cap_mask;
314 unsigned int els_fcntl;
315 efx_link_mode_t els_link_mode;
316 boolean_t els_mac_up;
322 __in efx_qword_t *eqp,
323 __out efx_link_mode_t *link_modep);
325 extern __checkReturn efx_rc_t
328 __out ef10_link_state_t *elsp);
330 extern __checkReturn efx_rc_t
335 extern __checkReturn efx_rc_t
336 ef10_phy_reconfigure(
337 __in efx_nic_t *enp);
339 extern __checkReturn efx_rc_t
341 __in efx_nic_t *enp);
343 extern __checkReturn efx_rc_t
346 __out uint32_t *ouip);
350 extern __checkReturn efx_rc_t
351 ef10_bist_enable_offline(
352 __in efx_nic_t *enp);
354 extern __checkReturn efx_rc_t
357 __in efx_bist_type_t type);
359 extern __checkReturn efx_rc_t
362 __in efx_bist_type_t type,
363 __out efx_bist_result_t *resultp,
364 __out_opt __drv_when(count > 0, __notnull)
365 uint32_t *value_maskp,
366 __out_ecount_opt(count) __drv_when(count > 0, __notnull)
367 unsigned long *valuesp,
373 __in efx_bist_type_t type);
375 #endif /* EFSYS_OPT_BIST */
379 extern __checkReturn efx_rc_t
381 __in efx_nic_t *enp);
385 __in efx_nic_t *enp);
387 extern __checkReturn efx_rc_t
390 __in unsigned int index,
391 __in unsigned int label,
392 __in efsys_mem_t *esmp,
398 __out unsigned int *addedp);
402 __in efx_txq_t *etp);
404 extern __checkReturn efx_rc_t
407 __in_ecount(n) efx_buffer_t *eb,
409 __in unsigned int completed,
410 __inout unsigned int *addedp);
415 __in unsigned int added,
416 __in unsigned int pushed);
418 extern __checkReturn efx_rc_t
421 __in unsigned int ns);
423 extern __checkReturn efx_rc_t
425 __in efx_txq_t *etp);
429 __in efx_txq_t *etp);
431 extern __checkReturn efx_rc_t
433 __in efx_txq_t *etp);
436 ef10_tx_qpio_disable(
437 __in efx_txq_t *etp);
439 extern __checkReturn efx_rc_t
442 __in_ecount(buf_length) uint8_t *buffer,
443 __in size_t buf_length,
444 __in size_t pio_buf_offset);
446 extern __checkReturn efx_rc_t
449 __in size_t pkt_length,
450 __in unsigned int completed,
451 __inout unsigned int *addedp);
453 extern __checkReturn efx_rc_t
456 __in_ecount(n) efx_desc_t *ed,
458 __in unsigned int completed,
459 __inout unsigned int *addedp);
462 ef10_tx_qdesc_dma_create(
464 __in efsys_dma_addr_t addr,
467 __out efx_desc_t *edp);
470 ef10_tx_qdesc_tso_create(
472 __in uint16_t ipv4_id,
473 __in uint32_t tcp_seq,
474 __in uint8_t tcp_flags,
475 __out efx_desc_t *edp);
478 ef10_tx_qdesc_tso2_create(
480 __in uint16_t ipv4_id,
481 __in uint32_t tcp_seq,
482 __in uint16_t tcp_mss,
483 __out_ecount(count) efx_desc_t *edp,
487 ef10_tx_qdesc_vlantci_create(
489 __in uint16_t vlan_tci,
490 __out efx_desc_t *edp);
493 typedef uint32_t efx_piobuf_handle_t;
495 #define EFX_PIOBUF_HANDLE_INVALID ((efx_piobuf_handle_t) -1)
497 extern __checkReturn efx_rc_t
499 __inout efx_nic_t *enp,
500 __out uint32_t *bufnump,
501 __out efx_piobuf_handle_t *handlep,
502 __out uint32_t *blknump,
503 __out uint32_t *offsetp,
504 __out size_t *sizep);
506 extern __checkReturn efx_rc_t
508 __inout efx_nic_t *enp,
509 __in uint32_t bufnum,
510 __in uint32_t blknum);
512 extern __checkReturn efx_rc_t
514 __inout efx_nic_t *enp,
515 __in uint32_t vi_index,
516 __in efx_piobuf_handle_t handle);
518 extern __checkReturn efx_rc_t
520 __inout efx_nic_t *enp,
521 __in uint32_t vi_index);
529 extern __checkReturn efx_rc_t
531 __in efx_nic_t *enp);
534 extern __checkReturn efx_rc_t
535 ef10_rx_prefix_pktlen(
537 __in uint8_t *buffer,
538 __out uint16_t *lengthp);
543 __in_ecount(n) efsys_dma_addr_t *addrp,
546 __in unsigned int completed,
547 __in unsigned int added);
552 __in unsigned int added,
553 __inout unsigned int *pushedp);
555 extern __checkReturn efx_rc_t
557 __in efx_rxq_t *erp);
561 __in efx_rxq_t *erp);
563 extern __checkReturn efx_rc_t
566 __in unsigned int index,
567 __in unsigned int label,
568 __in efx_rxq_type_t type,
569 __in efsys_mem_t *esmp,
573 __in efx_rxq_t *erp);
577 __in efx_rxq_t *erp);
581 __in efx_nic_t *enp);
585 typedef struct ef10_filter_handle_s {
588 } ef10_filter_handle_t;
590 typedef struct ef10_filter_entry_s {
591 uintptr_t efe_spec; /* pointer to filter spec plus busy bit */
592 ef10_filter_handle_t efe_handle;
593 } ef10_filter_entry_t;
596 * BUSY flag indicates that an update is in progress.
597 * AUTO_OLD flag is used to mark and sweep MAC packet filters.
599 #define EFX_EF10_FILTER_FLAG_BUSY 1U
600 #define EFX_EF10_FILTER_FLAG_AUTO_OLD 2U
601 #define EFX_EF10_FILTER_FLAGS 3U
604 * Size of the hash table used by the driver. Doesn't need to be the
605 * same size as the hardware's table.
607 #define EFX_EF10_FILTER_TBL_ROWS 8192
609 /* Only need to allow for one directed and one unknown unicast filter */
610 #define EFX_EF10_FILTER_UNICAST_FILTERS_MAX 2
612 /* Allow for the broadcast address to be added to the multicast list */
613 #define EFX_EF10_FILTER_MULTICAST_FILTERS_MAX (EFX_MAC_MULTICAST_LIST_MAX + 1)
615 typedef struct ef10_filter_table_s {
616 ef10_filter_entry_t eft_entry[EFX_EF10_FILTER_TBL_ROWS];
617 efx_rxq_t *eft_default_rxq;
618 boolean_t eft_using_rss;
619 uint32_t eft_unicst_filter_indexes[
620 EFX_EF10_FILTER_UNICAST_FILTERS_MAX];
621 uint32_t eft_unicst_filter_count;
622 uint32_t eft_mulcst_filter_indexes[
623 EFX_EF10_FILTER_MULTICAST_FILTERS_MAX];
624 uint32_t eft_mulcst_filter_count;
625 boolean_t eft_using_all_mulcst;
626 } ef10_filter_table_t;
628 __checkReturn efx_rc_t
630 __in efx_nic_t *enp);
634 __in efx_nic_t *enp);
636 __checkReturn efx_rc_t
638 __in efx_nic_t *enp);
640 __checkReturn efx_rc_t
643 __inout efx_filter_spec_t *spec,
644 __in boolean_t may_replace);
646 __checkReturn efx_rc_t
649 __inout efx_filter_spec_t *spec);
651 extern __checkReturn efx_rc_t
652 ef10_filter_supported_filters(
654 __out uint32_t *list,
655 __out size_t *length);
657 extern __checkReturn efx_rc_t
658 ef10_filter_reconfigure(
660 __in_ecount(6) uint8_t const *mac_addr,
661 __in boolean_t all_unicst,
662 __in boolean_t mulcst,
663 __in boolean_t all_mulcst,
664 __in boolean_t brdcst,
665 __in_ecount(6*count) uint8_t const *addrs,
666 __in uint32_t count);
669 ef10_filter_get_default_rxq(
671 __out efx_rxq_t **erpp,
672 __out boolean_t *using_rss);
675 ef10_filter_default_rxq_set(
678 __in boolean_t using_rss);
681 ef10_filter_default_rxq_clear(
682 __in efx_nic_t *enp);
685 #endif /* EFSYS_OPT_FILTER */
687 extern __checkReturn efx_rc_t
688 efx_mcdi_get_function_info(
691 __out_opt uint32_t *vfp);
693 extern __checkReturn efx_rc_t
694 efx_mcdi_privilege_mask(
698 __out uint32_t *maskp);
700 extern __checkReturn efx_rc_t
701 efx_mcdi_get_port_assignment(
703 __out uint32_t *portp);
705 extern __checkReturn efx_rc_t
706 efx_mcdi_get_port_modes(
708 __out uint32_t *modesp,
709 __out_opt uint32_t *current_modep);
711 extern __checkReturn efx_rc_t
712 ef10_nic_get_port_mode_bandwidth(
713 __in uint32_t port_mode,
714 __out uint32_t *bandwidth_mbpsp);
716 extern __checkReturn efx_rc_t
717 efx_mcdi_get_mac_address_pf(
719 __out_ecount_opt(6) uint8_t mac_addrp[6]);
721 extern __checkReturn efx_rc_t
722 efx_mcdi_get_mac_address_vf(
724 __out_ecount_opt(6) uint8_t mac_addrp[6]);
726 extern __checkReturn efx_rc_t
729 __out uint32_t *sys_freqp,
730 __out uint32_t *dpcpu_freqp);
733 extern __checkReturn efx_rc_t
734 efx_mcdi_get_vector_cfg(
736 __out_opt uint32_t *vec_basep,
737 __out_opt uint32_t *pf_nvecp,
738 __out_opt uint32_t *vf_nvecp);
740 extern __checkReturn efx_rc_t
741 ef10_get_datapath_caps(
742 __in efx_nic_t *enp);
744 extern __checkReturn efx_rc_t
745 ef10_get_privilege_mask(
747 __out uint32_t *maskp);
749 extern __checkReturn efx_rc_t
750 ef10_external_port_mapping(
753 __out uint8_t *external_portp);
759 #endif /* _SYS_EF10_IMPL_H */