drivers/net/sfc/base/efx_ev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  * Copyright (c) 2007-2018 Solarflare Communications Inc.
   4  * All rights reserved.
   5  */
   6
   7 #include "efx.h"
   8 #include "efx_impl.h"
   9 #if EFSYS_OPT_MON_MCDI
  10 #include "mcdi_mon.h"
  11 #endif
  12
  13 #if EFSYS_OPT_QSTATS
  14 #define EFX_EV_QSTAT_INCR(_eep, _stat)                                  \
  15         do {                                                            \
  16                 (_eep)->ee_stat[_stat]++;                               \
  17         _NOTE(CONSTANTCONDITION)                                        \
  18         } while (B_FALSE)
  19 #else
  20 #define EFX_EV_QSTAT_INCR(_eep, _stat)
  21 #endif
  22
  23 #define EFX_EV_PRESENT(_qword)                                          \
  24         (EFX_QWORD_FIELD((_qword), EFX_DWORD_0) != 0xffffffff &&        \
  25         EFX_QWORD_FIELD((_qword), EFX_DWORD_1) != 0xffffffff)
  26
  27
  28
  29 #if EFSYS_OPT_SIENA
  30
  31 static  __checkReturn   efx_rc_t
  32 siena_ev_init(
  33         __in            efx_nic_t *enp);
  34
  35 static                  void
  36 siena_ev_fini(
  37         __in            efx_nic_t *enp);
  38
  39 static  __checkReturn   efx_rc_t
  40 siena_ev_qcreate(
  41         __in            efx_nic_t *enp,
  42         __in            unsigned int index,
  43         __in            efsys_mem_t *esmp,
  44         __in            size_t ndescs,
  45         __in            uint32_t id,
  46         __in            uint32_t us,
  47         __in            uint32_t flags,
  48         __in            efx_evq_t *eep);
  49
  50 static                  void
  51 siena_ev_qdestroy(
  52         __in            efx_evq_t *eep);
  53
  54 static  __checkReturn   efx_rc_t
  55 siena_ev_qprime(
  56         __in            efx_evq_t *eep,
  57         __in            unsigned int count);
  58
  59 static                  void
  60 siena_ev_qpost(
  61         __in    efx_evq_t *eep,
  62         __in    uint16_t data);
  63
  64 static  __checkReturn   efx_rc_t
  65 siena_ev_qmoderate(
  66         __in            efx_evq_t *eep,
  67         __in            unsigned int us);
  68
  69 #if EFSYS_OPT_QSTATS
  70 static                  void
  71 siena_ev_qstats_update(
  72         __in                            efx_evq_t *eep,
  73         __inout_ecount(EV_NQSTATS)      efsys_stat_t *stat);
  74
  75 #endif
  76
  77 #endif /* EFSYS_OPT_SIENA */
  78
  79 #if EFSYS_OPT_SIENA
  80 static const efx_ev_ops_t       __efx_ev_siena_ops = {
  81         siena_ev_init,                          /* eevo_init */
  82         siena_ev_fini,                          /* eevo_fini */
  83         siena_ev_qcreate,                       /* eevo_qcreate */
  84         siena_ev_qdestroy,                      /* eevo_qdestroy */
  85         siena_ev_qprime,                        /* eevo_qprime */
  86         siena_ev_qpost,                         /* eevo_qpost */
  87         siena_ev_qmoderate,                     /* eevo_qmoderate */
  88 #if EFSYS_OPT_QSTATS
  89         siena_ev_qstats_update,                 /* eevo_qstats_update */
  90 #endif
  91 };
  92 #endif /* EFSYS_OPT_SIENA */
  93
  94 #if EFX_OPTS_EF10()
  95 static const efx_ev_ops_t       __efx_ev_ef10_ops = {
  96         ef10_ev_init,                           /* eevo_init */
  97         ef10_ev_fini,                           /* eevo_fini */
  98         ef10_ev_qcreate,                        /* eevo_qcreate */
  99         ef10_ev_qdestroy,                       /* eevo_qdestroy */
 100         ef10_ev_qprime,                         /* eevo_qprime */
 101         ef10_ev_qpost,                          /* eevo_qpost */
 102         ef10_ev_qmoderate,                      /* eevo_qmoderate */
 103 #if EFSYS_OPT_QSTATS
 104         ef10_ev_qstats_update,                  /* eevo_qstats_update */
 105 #endif
 106 };
 107 #endif /* EFX_OPTS_EF10() */
 108
 109
 110         __checkReturn   efx_rc_t
 111 efx_ev_init(
 112         __in            efx_nic_t *enp)
 113 {
 114         const efx_ev_ops_t *eevop;
 115         efx_rc_t rc;
 116
 117         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
 118         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_INTR);
 119
 120         if (enp->en_mod_flags & EFX_MOD_EV) {
 121                 rc = EINVAL;
 122                 goto fail1;
 123         }
 124
 125         switch (enp->en_family) {
 126 #if EFSYS_OPT_SIENA
 127         case EFX_FAMILY_SIENA:
 128                 eevop = &__efx_ev_siena_ops;
 129                 break;
 130 #endif /* EFSYS_OPT_SIENA */
 131
 132 #if EFSYS_OPT_HUNTINGTON
 133         case EFX_FAMILY_HUNTINGTON:
 134                 eevop = &__efx_ev_ef10_ops;
 135                 break;
 136 #endif /* EFSYS_OPT_HUNTINGTON */
 137
 138 #if EFSYS_OPT_MEDFORD
 139         case EFX_FAMILY_MEDFORD:
 140                 eevop = &__efx_ev_ef10_ops;
 141                 break;
 142 #endif /* EFSYS_OPT_MEDFORD */
 143
 144 #if EFSYS_OPT_MEDFORD2
 145         case EFX_FAMILY_MEDFORD2:
 146                 eevop = &__efx_ev_ef10_ops;
 147                 break;
 148 #endif /* EFSYS_OPT_MEDFORD2 */
 149
 150         default:
 151                 EFSYS_ASSERT(0);
 152                 rc = ENOTSUP;
 153                 goto fail1;
 154         }
 155
 156         EFSYS_ASSERT3U(enp->en_ev_qcount, ==, 0);
 157
 158         if ((rc = eevop->eevo_init(enp)) != 0)
 159                 goto fail2;
 160
 161         enp->en_eevop = eevop;
 162         enp->en_mod_flags |= EFX_MOD_EV;
 163         return (0);
 164
 165 fail2:
 166         EFSYS_PROBE(fail2);
 167
 168 fail1:
 169         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 170
 171         enp->en_eevop = NULL;
 172         enp->en_mod_flags &= ~EFX_MOD_EV;
 173         return (rc);
 174 }
 175
 176         __checkReturn   size_t
 177 efx_evq_size(
 178         __in    const efx_nic_t *enp,
 179         __in    unsigned int ndescs)
 180 {
 181         const efx_nic_cfg_t *encp = efx_nic_cfg_get(enp);
 182
 183         return (ndescs * encp->enc_ev_desc_size);
 184 }
 185
 186         __checkReturn   unsigned int
 187 efx_evq_nbufs(
 188         __in    const efx_nic_t *enp,
 189         __in    unsigned int ndescs)
 190 {
 191         return (EFX_DIV_ROUND_UP(efx_evq_size(enp, ndescs), EFX_BUF_SIZE));
 192 }
 193
 194                 void
 195 efx_ev_fini(
 196         __in    efx_nic_t *enp)
 197 {
 198         const efx_ev_ops_t *eevop = enp->en_eevop;
 199
 200         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
 201         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_INTR);
 202         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_EV);
 203         EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_RX));
 204         EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_TX));
 205         EFSYS_ASSERT3U(enp->en_ev_qcount, ==, 0);
 206
 207         eevop->eevo_fini(enp);
 208
 209         enp->en_eevop = NULL;
 210         enp->en_mod_flags &= ~EFX_MOD_EV;
 211 }
 212
 213
 214         __checkReturn   efx_rc_t
 215 efx_ev_qcreate(
 216         __in            efx_nic_t *enp,
 217         __in            unsigned int index,
 218         __in            efsys_mem_t *esmp,
 219         __in            size_t ndescs,
 220         __in            uint32_t id,
 221         __in            uint32_t us,
 222         __in            uint32_t flags,
 223         __deref_out     efx_evq_t **eepp)
 224 {
 225         const efx_ev_ops_t *eevop = enp->en_eevop;
 226         efx_evq_t *eep;
 227         const efx_nic_cfg_t *encp = efx_nic_cfg_get(enp);
 228         efx_rc_t rc;
 229
 230         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
 231         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_EV);
 232
 233         EFSYS_ASSERT3U(enp->en_ev_qcount + 1, <,
 234             enp->en_nic_cfg.enc_evq_limit);
 235
 236         switch (flags & EFX_EVQ_FLAGS_NOTIFY_MASK) {
 237         case EFX_EVQ_FLAGS_NOTIFY_INTERRUPT:
 238                 break;
 239         case EFX_EVQ_FLAGS_NOTIFY_DISABLED:
 240                 if (us != 0) {
 241                         rc = EINVAL;
 242                         goto fail1;
 243                 }
 244                 break;
 245         default:
 246                 rc = EINVAL;
 247                 goto fail2;
 248         }
 249
 250         EFSYS_ASSERT(ISP2(encp->enc_evq_max_nevs));
 251         EFSYS_ASSERT(ISP2(encp->enc_evq_min_nevs));
 252
 253         if (!ISP2(ndescs) ||
 254             ndescs < encp->enc_evq_min_nevs ||
 255             ndescs > encp->enc_evq_max_nevs) {
 256                 rc = EINVAL;
 257                 goto fail3;
 258         }
 259
 260         /* Allocate an EVQ object */
 261         EFSYS_KMEM_ALLOC(enp->en_esip, sizeof (efx_evq_t), eep);
 262         if (eep == NULL) {
 263                 rc = ENOMEM;
 264                 goto fail4;
 265         }
 266
 267         eep->ee_magic = EFX_EVQ_MAGIC;
 268         eep->ee_enp = enp;
 269         eep->ee_index = index;
 270         eep->ee_mask = ndescs - 1;
 271         eep->ee_flags = flags;
 272         eep->ee_esmp = esmp;
 273
 274         /*
 275          * Set outputs before the queue is created because interrupts may be
 276          * raised for events immediately after the queue is created, before the
 277          * function call below returns. See bug58606.
 278          *
 279          * The eepp pointer passed in by the client must therefore point to data
 280          * shared with the client's event processing context.
 281          */
 282         enp->en_ev_qcount++;
 283         *eepp = eep;
 284
 285         if ((rc = eevop->eevo_qcreate(enp, index, esmp, ndescs, id, us, flags,
 286             eep)) != 0)
 287                 goto fail5;
 288
 289         return (0);
 290
 291 fail5:
 292         EFSYS_PROBE(fail5);
 293
 294         *eepp = NULL;
 295         enp->en_ev_qcount--;
 296         EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_evq_t), eep);
 297 fail4:
 298         EFSYS_PROBE(fail4);
 299 fail3:
 300         EFSYS_PROBE(fail3);
 301 fail2:
 302         EFSYS_PROBE(fail2);
 303 fail1:
 304         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 305         return (rc);
 306 }
 307
 308                 void
 309 efx_ev_qdestroy(
 310         __in    efx_evq_t *eep)
 311 {
 312         efx_nic_t *enp = eep->ee_enp;
 313         const efx_ev_ops_t *eevop = enp->en_eevop;
 314
 315         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 316
 317         EFSYS_ASSERT(enp->en_ev_qcount != 0);
 318         --enp->en_ev_qcount;
 319
 320         eevop->eevo_qdestroy(eep);
 321
 322         /* Free the EVQ object */
 323         EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_evq_t), eep);
 324 }
 325
 326         __checkReturn   efx_rc_t
 327 efx_ev_qprime(
 328         __in            efx_evq_t *eep,
 329         __in            unsigned int count)
 330 {
 331         efx_nic_t *enp = eep->ee_enp;
 332         const efx_ev_ops_t *eevop = enp->en_eevop;
 333         efx_rc_t rc;
 334
 335         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 336
 337         if (!(enp->en_mod_flags & EFX_MOD_INTR)) {
 338                 rc = EINVAL;
 339                 goto fail1;
 340         }
 341
 342         if ((rc = eevop->eevo_qprime(eep, count)) != 0)
 343                 goto fail2;
 344
 345         return (0);
 346
 347 fail2:
 348         EFSYS_PROBE(fail2);
 349 fail1:
 350         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 351         return (rc);
 352 }
 353
 354         __checkReturn   boolean_t
 355 efx_ev_qpending(
 356         __in            efx_evq_t *eep,
 357         __in            unsigned int count)
 358 {
 359         size_t offset;
 360         efx_qword_t qword;
 361
 362         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 363
 364         offset = (count & eep->ee_mask) * sizeof (efx_qword_t);
 365         EFSYS_MEM_READQ(eep->ee_esmp, offset, &qword);
 366
 367         return (EFX_EV_PRESENT(qword));
 368 }
 369
 370 #if EFSYS_OPT_EV_PREFETCH
 371
 372                         void
 373 efx_ev_qprefetch(
 374         __in            efx_evq_t *eep,
 375         __in            unsigned int count)
 376 {
 377         unsigned int offset;
 378
 379         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 380
 381         offset = (count & eep->ee_mask) * sizeof (efx_qword_t);
 382         EFSYS_MEM_PREFETCH(eep->ee_esmp, offset);
 383 }
 384
 385 #endif  /* EFSYS_OPT_EV_PREFETCH */
 386
 387 #define EFX_EV_BATCH    8
 388
 389                         void
 390 efx_ev_qpoll(
 391         __in            efx_evq_t *eep,
 392         __inout         unsigned int *countp,
 393         __in            const efx_ev_callbacks_t *eecp,
 394         __in_opt        void *arg)
 395 {
 396         efx_qword_t ev[EFX_EV_BATCH];
 397         unsigned int batch;
 398         unsigned int total;
 399         unsigned int count;
 400         unsigned int index;
 401         size_t offset;
 402
 403         /* Ensure events codes match for EF10 (Huntington/Medford) and Siena */
 404         EFX_STATIC_ASSERT(ESF_DZ_EV_CODE_LBN == FSF_AZ_EV_CODE_LBN);
 405         EFX_STATIC_ASSERT(ESF_DZ_EV_CODE_WIDTH == FSF_AZ_EV_CODE_WIDTH);
 406
 407         EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_RX_EV == FSE_AZ_EV_CODE_RX_EV);
 408         EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_TX_EV == FSE_AZ_EV_CODE_TX_EV);
 409         EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_DRIVER_EV == FSE_AZ_EV_CODE_DRIVER_EV);
 410         EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_DRV_GEN_EV ==
 411             FSE_AZ_EV_CODE_DRV_GEN_EV);
 412 #if EFSYS_OPT_MCDI
 413         EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_MCDI_EV ==
 414             FSE_AZ_EV_CODE_MCDI_EVRESPONSE);
 415 #endif
 416
 417         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 418         EFSYS_ASSERT(countp != NULL);
 419         EFSYS_ASSERT(eecp != NULL);
 420
 421         count = *countp;
 422         do {
 423                 /* Read up until the end of the batch period */
 424                 batch = EFX_EV_BATCH - (count & (EFX_EV_BATCH - 1));
 425                 offset = (count & eep->ee_mask) * sizeof (efx_qword_t);
 426                 for (total = 0; total < batch; ++total) {
 427                         EFSYS_MEM_READQ(eep->ee_esmp, offset, &(ev[total]));
 428
 429                         if (!EFX_EV_PRESENT(ev[total]))
 430                                 break;
 431
 432                         EFSYS_PROBE3(event, unsigned int, eep->ee_index,
 433                             uint32_t, EFX_QWORD_FIELD(ev[total], EFX_DWORD_1),
 434                             uint32_t, EFX_QWORD_FIELD(ev[total], EFX_DWORD_0));
 435
 436                         offset += sizeof (efx_qword_t);
 437                 }
 438
 439 #if EFSYS_OPT_EV_PREFETCH && (EFSYS_OPT_EV_PREFETCH_PERIOD > 1)
 440                 /*
 441                  * Prefetch the next batch when we get within PREFETCH_PERIOD
 442                  * of a completed batch. If the batch is smaller, then prefetch
 443                  * immediately.
 444                  */
 445                 if (total == batch && total < EFSYS_OPT_EV_PREFETCH_PERIOD)
 446                         EFSYS_MEM_PREFETCH(eep->ee_esmp, offset);
 447 #endif  /* EFSYS_OPT_EV_PREFETCH */
 448
 449                 /* Process the batch of events */
 450                 for (index = 0; index < total; ++index) {
 451                         boolean_t should_abort;
 452                         uint32_t code;
 453
 454 #if EFSYS_OPT_EV_PREFETCH
 455                         /* Prefetch if we've now reached the batch period */
 456                         if (total == batch &&
 457                             index + EFSYS_OPT_EV_PREFETCH_PERIOD == total) {
 458                                 offset = (count + batch) & eep->ee_mask;
 459                                 offset *= sizeof (efx_qword_t);
 460
 461                                 EFSYS_MEM_PREFETCH(eep->ee_esmp, offset);
 462                         }
 463 #endif  /* EFSYS_OPT_EV_PREFETCH */
 464
 465                         EFX_EV_QSTAT_INCR(eep, EV_ALL);
 466
 467                         code = EFX_QWORD_FIELD(ev[index], FSF_AZ_EV_CODE);
 468                         switch (code) {
 469                         case FSE_AZ_EV_CODE_RX_EV:
 470                                 should_abort = eep->ee_rx(eep,
 471                                     &(ev[index]), eecp, arg);
 472                                 break;
 473                         case FSE_AZ_EV_CODE_TX_EV:
 474                                 should_abort = eep->ee_tx(eep,
 475                                     &(ev[index]), eecp, arg);
 476                                 break;
 477                         case FSE_AZ_EV_CODE_DRIVER_EV:
 478                                 should_abort = eep->ee_driver(eep,
 479                                     &(ev[index]), eecp, arg);
 480                                 break;
 481                         case FSE_AZ_EV_CODE_DRV_GEN_EV:
 482                                 should_abort = eep->ee_drv_gen(eep,
 483                                     &(ev[index]), eecp, arg);
 484                                 break;
 485 #if EFSYS_OPT_MCDI
 486                         case FSE_AZ_EV_CODE_MCDI_EVRESPONSE:
 487                                 should_abort = eep->ee_mcdi(eep,
 488                                     &(ev[index]), eecp, arg);
 489                                 break;
 490 #endif
 491                         case FSE_AZ_EV_CODE_GLOBAL_EV:
 492                                 if (eep->ee_global) {
 493                                         should_abort = eep->ee_global(eep,
 494                                             &(ev[index]), eecp, arg);
 495                                         break;
 496                                 }
 497                                 /* else fallthrough */
 498                         default:
 499                                 EFSYS_PROBE3(bad_event,
 500                                     unsigned int, eep->ee_index,
 501                                     uint32_t,
 502                                     EFX_QWORD_FIELD(ev[index], EFX_DWORD_1),
 503                                     uint32_t,
 504                                     EFX_QWORD_FIELD(ev[index], EFX_DWORD_0));
 505
 506                                 EFSYS_ASSERT(eecp->eec_exception != NULL);
 507                                 (void) eecp->eec_exception(arg,
 508                                         EFX_EXCEPTION_EV_ERROR, code);
 509                                 should_abort = B_TRUE;
 510                         }
 511                         if (should_abort) {
 512                                 /* Ignore subsequent events */
 513                                 total = index + 1;
 514
 515                                 /*
 516                                  * Poison batch to ensure the outer
 517                                  * loop is broken out of.
 518                                  */
 519                                 EFSYS_ASSERT(batch <= EFX_EV_BATCH);
 520                                 batch += (EFX_EV_BATCH << 1);
 521                                 EFSYS_ASSERT(total != batch);
 522                                 break;
 523                         }
 524                 }
 525
 526                 /*
 527                  * Now that the hardware has most likely moved onto dma'ing
 528                  * into the next cache line, clear the processed events. Take
 529                  * care to only clear out events that we've processed
 530                  */
 531                 EFX_SET_QWORD(ev[0]);
 532                 offset = (count & eep->ee_mask) * sizeof (efx_qword_t);
 533                 for (index = 0; index < total; ++index) {
 534                         EFSYS_MEM_WRITEQ(eep->ee_esmp, offset, &(ev[0]));
 535                         offset += sizeof (efx_qword_t);
 536                 }
 537
 538                 count += total;
 539
 540         } while (total == batch);
 541
 542         *countp = count;
 543 }
 544
 545                         void
 546 efx_ev_qpost(
 547         __in    efx_evq_t *eep,
 548         __in    uint16_t data)
 549 {
 550         efx_nic_t *enp = eep->ee_enp;
 551         const efx_ev_ops_t *eevop = enp->en_eevop;
 552
 553         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 554
 555         EFSYS_ASSERT(eevop != NULL &&
 556             eevop->eevo_qpost != NULL);
 557
 558         eevop->eevo_qpost(eep, data);
 559 }
 560
 561         __checkReturn   efx_rc_t
 562 efx_ev_usecs_to_ticks(
 563         __in            efx_nic_t *enp,
 564         __in            unsigned int us,
 565         __out           unsigned int *ticksp)
 566 {
 567         efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
 568         unsigned int ticks;
 569         efx_rc_t rc;
 570
 571         if (encp->enc_evq_timer_quantum_ns == 0) {
 572                 rc = ENOTSUP;
 573                 goto fail1;
 574         }
 575
 576         /* Convert microseconds to a timer tick count */
 577         if (us == 0)
 578                 ticks = 0;
 579         else if (us * 1000 < encp->enc_evq_timer_quantum_ns)
 580                 ticks = 1;      /* Never round down to zero */
 581         else
 582                 ticks = us * 1000 / encp->enc_evq_timer_quantum_ns;
 583
 584         *ticksp = ticks;
 585         return (0);
 586
 587 fail1:
 588         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 589         return (rc);
 590 }
 591
 592         __checkReturn   efx_rc_t
 593 efx_ev_qmoderate(
 594         __in            efx_evq_t *eep,
 595         __in            unsigned int us)
 596 {
 597         efx_nic_t *enp = eep->ee_enp;
 598         const efx_ev_ops_t *eevop = enp->en_eevop;
 599         efx_rc_t rc;
 600
 601         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 602
 603         if ((eep->ee_flags & EFX_EVQ_FLAGS_NOTIFY_MASK) ==
 604             EFX_EVQ_FLAGS_NOTIFY_DISABLED) {
 605                 rc = EINVAL;
 606                 goto fail1;
 607         }
 608
 609         if ((rc = eevop->eevo_qmoderate(eep, us)) != 0)
 610                 goto fail2;
 611
 612         return (0);
 613
 614 fail2:
 615         EFSYS_PROBE(fail2);
 616 fail1:
 617         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 618         return (rc);
 619 }
 620
 621 #if EFSYS_OPT_QSTATS
 622                                         void
 623 efx_ev_qstats_update(
 624         __in                            efx_evq_t *eep,
 625         __inout_ecount(EV_NQSTATS)      efsys_stat_t *stat)
 626
 627 {       efx_nic_t *enp = eep->ee_enp;
 628         const efx_ev_ops_t *eevop = enp->en_eevop;
 629
 630         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 631
 632         eevop->eevo_qstats_update(eep, stat);
 633 }
 634
 635 #endif  /* EFSYS_OPT_QSTATS */
 636
 637 #if EFSYS_OPT_SIENA
 638
 639 static  __checkReturn   efx_rc_t
 640 siena_ev_init(
 641         __in            efx_nic_t *enp)
 642 {
 643         efx_oword_t oword;
 644
 645         /*
 646          * Program the event queue for receive and transmit queue
 647          * flush events.
 648          */
 649         EFX_BAR_READO(enp, FR_AZ_DP_CTRL_REG, &oword);
 650         EFX_SET_OWORD_FIELD(oword, FRF_AZ_FLS_EVQ_ID, 0);
 651         EFX_BAR_WRITEO(enp, FR_AZ_DP_CTRL_REG, &oword);
 652
 653         return (0);
 654
 655 }
 656
 657 static  __checkReturn   boolean_t
 658 siena_ev_rx_not_ok(
 659         __in            efx_evq_t *eep,
 660         __in            efx_qword_t *eqp,
 661         __in            uint32_t label,
 662         __in            uint32_t id,
 663         __inout         uint16_t *flagsp)
 664 {
 665         boolean_t ignore = B_FALSE;
 666
 667         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_TOBE_DISC) != 0) {
 668                 EFX_EV_QSTAT_INCR(eep, EV_RX_TOBE_DISC);
 669                 EFSYS_PROBE(tobe_disc);
 670                 /*
 671                  * Assume this is a unicast address mismatch, unless below
 672                  * we find either FSF_AZ_RX_EV_ETH_CRC_ERR or
 673                  * EV_RX_PAUSE_FRM_ERR is set.
 674                  */
 675                 (*flagsp) |= EFX_ADDR_MISMATCH;
 676         }
 677
 678         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_FRM_TRUNC) != 0) {
 679                 EFSYS_PROBE2(frm_trunc, uint32_t, label, uint32_t, id);
 680                 EFX_EV_QSTAT_INCR(eep, EV_RX_FRM_TRUNC);
 681                 (*flagsp) |= EFX_DISCARD;
 682
 683 #if EFSYS_OPT_RX_SCATTER
 684                 /*
 685                  * Lookout for payload queue ran dry errors and ignore them.
 686                  *
 687                  * Sadly for the header/data split cases, the descriptor
 688                  * pointer in this event refers to the header queue and
 689                  * therefore cannot be easily detected as duplicate.
 690                  * So we drop these and rely on the receive processing seeing
 691                  * a subsequent packet with FSF_AZ_RX_EV_SOP set to discard
 692                  * the partially received packet.
 693                  */
 694                 if ((EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_SOP) == 0) &&
 695                     (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_JUMBO_CONT) == 0) &&
 696                     (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_BYTE_CNT) == 0))
 697                         ignore = B_TRUE;
 698 #endif  /* EFSYS_OPT_RX_SCATTER */
 699         }
 700
 701         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_ETH_CRC_ERR) != 0) {
 702                 EFX_EV_QSTAT_INCR(eep, EV_RX_ETH_CRC_ERR);
 703                 EFSYS_PROBE(crc_err);
 704                 (*flagsp) &= ~EFX_ADDR_MISMATCH;
 705                 (*flagsp) |= EFX_DISCARD;
 706         }
 707
 708         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_PAUSE_FRM_ERR) != 0) {
 709                 EFX_EV_QSTAT_INCR(eep, EV_RX_PAUSE_FRM_ERR);
 710                 EFSYS_PROBE(pause_frm_err);
 711                 (*flagsp) &= ~EFX_ADDR_MISMATCH;
 712                 (*flagsp) |= EFX_DISCARD;
 713         }
 714
 715         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_BUF_OWNER_ID_ERR) != 0) {
 716                 EFX_EV_QSTAT_INCR(eep, EV_RX_BUF_OWNER_ID_ERR);
 717                 EFSYS_PROBE(owner_id_err);
 718                 (*flagsp) |= EFX_DISCARD;
 719         }
 720
 721         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_IP_HDR_CHKSUM_ERR) != 0) {
 722                 EFX_EV_QSTAT_INCR(eep, EV_RX_IPV4_HDR_CHKSUM_ERR);
 723                 EFSYS_PROBE(ipv4_err);
 724                 (*flagsp) &= ~EFX_CKSUM_IPV4;
 725         }
 726
 727         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_TCP_UDP_CHKSUM_ERR) != 0) {
 728                 EFX_EV_QSTAT_INCR(eep, EV_RX_TCP_UDP_CHKSUM_ERR);
 729                 EFSYS_PROBE(udp_chk_err);
 730                 (*flagsp) &= ~EFX_CKSUM_TCPUDP;
 731         }
 732
 733         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_IP_FRAG_ERR) != 0) {
 734                 EFX_EV_QSTAT_INCR(eep, EV_RX_IP_FRAG_ERR);
 735
 736                 /*
 737                  * If IP is fragmented FSF_AZ_RX_EV_IP_FRAG_ERR is set. This
 738                  * causes FSF_AZ_RX_EV_PKT_OK to be clear. This is not an error
 739                  * condition.
 740                  */
 741                 (*flagsp) &= ~(EFX_PKT_TCP | EFX_PKT_UDP | EFX_CKSUM_TCPUDP);
 742         }
 743
 744         return (ignore);
 745 }
 746
 747 static  __checkReturn   boolean_t
 748 siena_ev_rx(
 749         __in            efx_evq_t *eep,
 750         __in            efx_qword_t *eqp,
 751         __in            const efx_ev_callbacks_t *eecp,
 752         __in_opt        void *arg)
 753 {
 754         uint32_t id;
 755         uint32_t size;
 756         uint32_t label;
 757         boolean_t ok;
 758 #if EFSYS_OPT_RX_SCATTER
 759         boolean_t sop;
 760         boolean_t jumbo_cont;
 761 #endif  /* EFSYS_OPT_RX_SCATTER */
 762         uint32_t hdr_type;
 763         boolean_t is_v6;
 764         uint16_t flags;
 765         boolean_t ignore;
 766         boolean_t should_abort;
 767
 768         EFX_EV_QSTAT_INCR(eep, EV_RX);
 769
 770         /* Basic packet information */
 771         id = EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_DESC_PTR);
 772         size = EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_BYTE_CNT);
 773         label = EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_Q_LABEL);
 774         ok = (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_PKT_OK) != 0);
 775
 776 #if EFSYS_OPT_RX_SCATTER
 777         sop = (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_SOP) != 0);
 778         jumbo_cont = (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_JUMBO_CONT) != 0);
 779 #endif  /* EFSYS_OPT_RX_SCATTER */
 780
 781         hdr_type = EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_HDR_TYPE);
 782
 783         is_v6 = (EFX_QWORD_FIELD(*eqp, FSF_CZ_RX_EV_IPV6_PKT) != 0);
 784
 785         /*
 786          * If packet is marked as OK and packet type is TCP/IP or
 787          * UDP/IP or other IP, then we can rely on the hardware checksums.
 788          */
 789         switch (hdr_type) {
 790         case FSE_AZ_RX_EV_HDR_TYPE_IPV4V6_TCP:
 791                 flags = EFX_PKT_TCP | EFX_CKSUM_TCPUDP;
 792                 if (is_v6) {
 793                         EFX_EV_QSTAT_INCR(eep, EV_RX_TCP_IPV6);
 794                         flags |= EFX_PKT_IPV6;
 795                 } else {
 796                         EFX_EV_QSTAT_INCR(eep, EV_RX_TCP_IPV4);
 797                         flags |= EFX_PKT_IPV4 | EFX_CKSUM_IPV4;
 798                 }
 799                 break;
 800
 801         case FSE_AZ_RX_EV_HDR_TYPE_IPV4V6_UDP:
 802                 flags = EFX_PKT_UDP | EFX_CKSUM_TCPUDP;
 803                 if (is_v6) {
 804                         EFX_EV_QSTAT_INCR(eep, EV_RX_UDP_IPV6);
 805                         flags |= EFX_PKT_IPV6;
 806                 } else {
 807                         EFX_EV_QSTAT_INCR(eep, EV_RX_UDP_IPV4);
 808                         flags |= EFX_PKT_IPV4 | EFX_CKSUM_IPV4;
 809                 }
 810                 break;
 811
 812         case FSE_AZ_RX_EV_HDR_TYPE_IPV4V6_OTHER:
 813                 if (is_v6) {
 814                         EFX_EV_QSTAT_INCR(eep, EV_RX_OTHER_IPV6);
 815                         flags = EFX_PKT_IPV6;
 816                 } else {
 817                         EFX_EV_QSTAT_INCR(eep, EV_RX_OTHER_IPV4);
 818                         flags = EFX_PKT_IPV4 | EFX_CKSUM_IPV4;
 819                 }
 820                 break;
 821
 822         case FSE_AZ_RX_EV_HDR_TYPE_OTHER:
 823                 EFX_EV_QSTAT_INCR(eep, EV_RX_NON_IP);
 824                 flags = 0;
 825                 break;
 826
 827         default:
 828                 EFSYS_ASSERT(B_FALSE);
 829                 flags = 0;
 830                 break;
 831         }
 832
 833 #if EFSYS_OPT_RX_SCATTER
 834         /* Report scatter and header/lookahead split buffer flags */
 835         if (sop)
 836                 flags |= EFX_PKT_START;
 837         if (jumbo_cont)
 838                 flags |= EFX_PKT_CONT;
 839 #endif  /* EFSYS_OPT_RX_SCATTER */
 840
 841         /* Detect errors included in the FSF_AZ_RX_EV_PKT_OK indication */
 842         if (!ok) {
 843                 ignore = siena_ev_rx_not_ok(eep, eqp, label, id, &flags);
 844                 if (ignore) {
 845                         EFSYS_PROBE4(rx_complete, uint32_t, label, uint32_t, id,
 846                             uint32_t, size, uint16_t, flags);
 847
 848                         return (B_FALSE);
 849                 }
 850         }
 851
 852         /* If we're not discarding the packet then it is ok */
 853         if (~flags & EFX_DISCARD)
 854                 EFX_EV_QSTAT_INCR(eep, EV_RX_OK);
 855
 856         /* Detect multicast packets that didn't match the filter */
 857         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_MCAST_PKT) != 0) {
 858                 EFX_EV_QSTAT_INCR(eep, EV_RX_MCAST_PKT);
 859
 860                 if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_MCAST_HASH_MATCH) != 0) {
 861                         EFX_EV_QSTAT_INCR(eep, EV_RX_MCAST_HASH_MATCH);
 862                 } else {
 863                         EFSYS_PROBE(mcast_mismatch);
 864                         flags |= EFX_ADDR_MISMATCH;
 865                 }
 866         } else {
 867                 flags |= EFX_PKT_UNICAST;
 868         }
 869
 870         /*
 871          * The packet parser in Siena can abort parsing packets under
 872          * certain error conditions, setting the PKT_NOT_PARSED bit
 873          * (which clears PKT_OK). If this is set, then don't trust
 874          * the PKT_TYPE field.
 875          */
 876         if (!ok) {
 877                 uint32_t parse_err;
 878
 879                 parse_err = EFX_QWORD_FIELD(*eqp, FSF_CZ_RX_EV_PKT_NOT_PARSED);
 880                 if (parse_err != 0)
 881                         flags |= EFX_CHECK_VLAN;
 882         }
 883
 884         if (~flags & EFX_CHECK_VLAN) {
 885                 uint32_t pkt_type;
 886
 887                 pkt_type = EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_PKT_TYPE);
 888                 if (pkt_type >= FSE_AZ_RX_EV_PKT_TYPE_VLAN)
 889                         flags |= EFX_PKT_VLAN_TAGGED;
 890         }
 891
 892         EFSYS_PROBE4(rx_complete, uint32_t, label, uint32_t, id,
 893             uint32_t, size, uint16_t, flags);
 894
 895         EFSYS_ASSERT(eecp->eec_rx != NULL);
 896         should_abort = eecp->eec_rx(arg, label, id, size, flags);
 897
 898         return (should_abort);
 899 }
 900
 901 static  __checkReturn   boolean_t
 902 siena_ev_tx(
 903         __in            efx_evq_t *eep,
 904         __in            efx_qword_t *eqp,
 905         __in            const efx_ev_callbacks_t *eecp,
 906         __in_opt        void *arg)
 907 {
 908         uint32_t id;
 909         uint32_t label;
 910         boolean_t should_abort;
 911
 912         EFX_EV_QSTAT_INCR(eep, EV_TX);
 913
 914         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_COMP) != 0 &&
 915             EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_PKT_ERR) == 0 &&
 916             EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_PKT_TOO_BIG) == 0 &&
 917             EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_WQ_FF_FULL) == 0) {
 918
 919                 id = EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_DESC_PTR);
 920                 label = EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_Q_LABEL);
 921
 922                 EFSYS_PROBE2(tx_complete, uint32_t, label, uint32_t, id);
 923
 924                 EFSYS_ASSERT(eecp->eec_tx != NULL);
 925                 should_abort = eecp->eec_tx(arg, label, id);
 926
 927                 return (should_abort);
 928         }
 929
 930         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_COMP) != 0)
 931                 EFSYS_PROBE3(bad_event, unsigned int, eep->ee_index,
 932                             uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_1),
 933                             uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_0));
 934
 935         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_PKT_ERR) != 0)
 936                 EFX_EV_QSTAT_INCR(eep, EV_TX_PKT_ERR);
 937
 938         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_PKT_TOO_BIG) != 0)
 939                 EFX_EV_QSTAT_INCR(eep, EV_TX_PKT_TOO_BIG);
 940
 941         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_WQ_FF_FULL) != 0)
 942                 EFX_EV_QSTAT_INCR(eep, EV_TX_WQ_FF_FULL);
 943
 944         EFX_EV_QSTAT_INCR(eep, EV_TX_UNEXPECTED);
 945         return (B_FALSE);
 946 }
 947
 948 static  __checkReturn   boolean_t
 949 siena_ev_global(
 950         __in            efx_evq_t *eep,
 951         __in            efx_qword_t *eqp,
 952         __in            const efx_ev_callbacks_t *eecp,
 953         __in_opt        void *arg)
 954 {
 955         _NOTE(ARGUNUSED(eqp, eecp, arg))
 956
 957         EFX_EV_QSTAT_INCR(eep, EV_GLOBAL);
 958
 959         return (B_FALSE);
 960 }
 961
 962 static  __checkReturn   boolean_t
 963 siena_ev_driver(
 964         __in            efx_evq_t *eep,
 965         __in            efx_qword_t *eqp,
 966         __in            const efx_ev_callbacks_t *eecp,
 967         __in_opt        void *arg)
 968 {
 969         boolean_t should_abort;
 970
 971         EFX_EV_QSTAT_INCR(eep, EV_DRIVER);
 972         should_abort = B_FALSE;
 973
 974         switch (EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_SUBCODE)) {
 975         case FSE_AZ_TX_DESCQ_FLS_DONE_EV: {
 976                 uint32_t txq_index;
 977
 978                 EFX_EV_QSTAT_INCR(eep, EV_DRIVER_TX_DESCQ_FLS_DONE);
 979
 980                 txq_index = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_SUBDATA);
 981
 982                 EFSYS_PROBE1(tx_descq_fls_done, uint32_t, txq_index);
 983
 984                 EFSYS_ASSERT(eecp->eec_txq_flush_done != NULL);
 985                 should_abort = eecp->eec_txq_flush_done(arg, txq_index);
 986
 987                 break;
 988         }
 989         case FSE_AZ_RX_DESCQ_FLS_DONE_EV: {
 990                 uint32_t rxq_index;
 991                 uint32_t failed;
 992
 993                 rxq_index = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_RX_DESCQ_ID);
 994                 failed = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_RX_FLUSH_FAIL);
 995
 996                 EFSYS_ASSERT(eecp->eec_rxq_flush_done != NULL);
 997                 EFSYS_ASSERT(eecp->eec_rxq_flush_failed != NULL);
 998
 999                 if (failed) {
1000                         EFX_EV_QSTAT_INCR(eep, EV_DRIVER_RX_DESCQ_FLS_FAILED);
1001
1002                         EFSYS_PROBE1(rx_descq_fls_failed, uint32_t, rxq_index);
1003
1004                         should_abort = eecp->eec_rxq_flush_failed(arg,
1005                                                                     rxq_index);
1006                 } else {
1007                         EFX_EV_QSTAT_INCR(eep, EV_DRIVER_RX_DESCQ_FLS_DONE);
1008
1009                         EFSYS_PROBE1(rx_descq_fls_done, uint32_t, rxq_index);
1010
1011                         should_abort = eecp->eec_rxq_flush_done(arg, rxq_index);
1012                 }
1013
1014                 break;
1015         }
1016         case FSE_AZ_EVQ_INIT_DONE_EV:
1017                 EFSYS_ASSERT(eecp->eec_initialized != NULL);
1018                 should_abort = eecp->eec_initialized(arg);
1019
1020                 break;
1021
1022         case FSE_AZ_EVQ_NOT_EN_EV:
1023                 EFSYS_PROBE(evq_not_en);
1024                 break;
1025
1026         case FSE_AZ_SRM_UPD_DONE_EV: {
1027                 uint32_t code;
1028
1029                 EFX_EV_QSTAT_INCR(eep, EV_DRIVER_SRM_UPD_DONE);
1030
1031                 code = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_SUBDATA);
1032
1033                 EFSYS_ASSERT(eecp->eec_sram != NULL);
1034                 should_abort = eecp->eec_sram(arg, code);
1035
1036                 break;
1037         }
1038         case FSE_AZ_WAKE_UP_EV: {
1039                 uint32_t id;
1040
1041                 id = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_SUBDATA);
1042
1043                 EFSYS_ASSERT(eecp->eec_wake_up != NULL);
1044                 should_abort = eecp->eec_wake_up(arg, id);
1045
1046                 break;
1047         }
1048         case FSE_AZ_TX_PKT_NON_TCP_UDP:
1049                 EFSYS_PROBE(tx_pkt_non_tcp_udp);
1050                 break;
1051
1052         case FSE_AZ_TIMER_EV: {
1053                 uint32_t id;
1054
1055                 id = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_SUBDATA);
1056
1057                 EFSYS_ASSERT(eecp->eec_timer != NULL);
1058                 should_abort = eecp->eec_timer(arg, id);
1059
1060                 break;
1061         }
1062         case FSE_AZ_RX_DSC_ERROR_EV:
1063                 EFX_EV_QSTAT_INCR(eep, EV_DRIVER_RX_DSC_ERROR);
1064
1065                 EFSYS_PROBE(rx_dsc_error);
1066
1067                 EFSYS_ASSERT(eecp->eec_exception != NULL);
1068                 should_abort = eecp->eec_exception(arg,
1069                         EFX_EXCEPTION_RX_DSC_ERROR, 0);
1070
1071                 break;
1072
1073         case FSE_AZ_TX_DSC_ERROR_EV:
1074                 EFX_EV_QSTAT_INCR(eep, EV_DRIVER_TX_DSC_ERROR);
1075
1076                 EFSYS_PROBE(tx_dsc_error);
1077
1078                 EFSYS_ASSERT(eecp->eec_exception != NULL);
1079                 should_abort = eecp->eec_exception(arg,
1080                         EFX_EXCEPTION_TX_DSC_ERROR, 0);
1081
1082                 break;
1083
1084         default:
1085                 break;
1086         }
1087
1088         return (should_abort);
1089 }
1090
1091 static  __checkReturn   boolean_t
1092 siena_ev_drv_gen(
1093         __in            efx_evq_t *eep,
1094         __in            efx_qword_t *eqp,
1095         __in            const efx_ev_callbacks_t *eecp,
1096         __in_opt        void *arg)
1097 {
1098         uint32_t data;
1099         boolean_t should_abort;
1100
1101         EFX_EV_QSTAT_INCR(eep, EV_DRV_GEN);
1102
1103         data = EFX_QWORD_FIELD(*eqp, FSF_AZ_EV_DATA_DW0);
1104         if (data >= ((uint32_t)1 << 16)) {
1105                 EFSYS_PROBE3(bad_event, unsigned int, eep->ee_index,
1106                             uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_1),
1107                             uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_0));
1108                 return (B_TRUE);
1109         }
1110
1111         EFSYS_ASSERT(eecp->eec_software != NULL);
1112         should_abort = eecp->eec_software(arg, (uint16_t)data);
1113
1114         return (should_abort);
1115 }
1116
1117 #if EFSYS_OPT_MCDI
1118
1119 static  __checkReturn   boolean_t
1120 siena_ev_mcdi(
1121         __in            efx_evq_t *eep,
1122         __in            efx_qword_t *eqp,
1123         __in            const efx_ev_callbacks_t *eecp,
1124         __in_opt        void *arg)
1125 {
1126         efx_nic_t *enp = eep->ee_enp;
1127         unsigned int code;
1128         boolean_t should_abort = B_FALSE;
1129
1130         EFSYS_ASSERT3U(enp->en_family, ==, EFX_FAMILY_SIENA);
1131
1132         if (enp->en_family != EFX_FAMILY_SIENA)
1133                 goto out;
1134
1135         EFSYS_ASSERT(eecp->eec_link_change != NULL);
1136         EFSYS_ASSERT(eecp->eec_exception != NULL);
1137 #if EFSYS_OPT_MON_STATS
1138         EFSYS_ASSERT(eecp->eec_monitor != NULL);
1139 #endif
1140
1141         EFX_EV_QSTAT_INCR(eep, EV_MCDI_RESPONSE);
1142
1143         code = EFX_QWORD_FIELD(*eqp, MCDI_EVENT_CODE);
1144         switch (code) {
1145         case MCDI_EVENT_CODE_BADSSERT:
1146                 efx_mcdi_ev_death(enp, EINTR);
1147                 break;
1148
1149         case MCDI_EVENT_CODE_CMDDONE:
1150                 efx_mcdi_ev_cpl(enp,
1151                     MCDI_EV_FIELD(eqp, CMDDONE_SEQ),
1152                     MCDI_EV_FIELD(eqp, CMDDONE_DATALEN),
1153                     MCDI_EV_FIELD(eqp, CMDDONE_ERRNO));
1154                 break;
1155
1156         case MCDI_EVENT_CODE_LINKCHANGE: {
1157                 efx_link_mode_t link_mode;
1158
1159                 siena_phy_link_ev(enp, eqp, &link_mode);
1160                 should_abort = eecp->eec_link_change(arg, link_mode);
1161                 break;
1162         }
1163         case MCDI_EVENT_CODE_SENSOREVT: {
1164 #if EFSYS_OPT_MON_STATS
1165                 efx_mon_stat_t id;
1166                 efx_mon_stat_value_t value;
1167                 efx_rc_t rc;
1168
1169                 if ((rc = mcdi_mon_ev(enp, eqp, &id, &value)) == 0)
1170                         should_abort = eecp->eec_monitor(arg, id, value);
1171                 else if (rc == ENOTSUP) {
1172                         should_abort = eecp->eec_exception(arg,
1173                                 EFX_EXCEPTION_UNKNOWN_SENSOREVT,
1174                                 MCDI_EV_FIELD(eqp, DATA));
1175                 } else
1176                         EFSYS_ASSERT(rc == ENODEV);     /* Wrong port */
1177 #else
1178                 should_abort = B_FALSE;
1179 #endif
1180                 break;
1181         }
1182         case MCDI_EVENT_CODE_SCHEDERR:
1183                 /* Informational only */
1184                 break;
1185
1186         case MCDI_EVENT_CODE_REBOOT:
1187                 efx_mcdi_ev_death(enp, EIO);
1188                 break;
1189
1190         case MCDI_EVENT_CODE_MAC_STATS_DMA:
1191 #if EFSYS_OPT_MAC_STATS
1192                 if (eecp->eec_mac_stats != NULL) {
1193                         eecp->eec_mac_stats(arg,
1194                             MCDI_EV_FIELD(eqp, MAC_STATS_DMA_GENERATION));
1195                 }
1196 #endif
1197                 break;
1198
1199         case MCDI_EVENT_CODE_FWALERT: {
1200                 uint32_t reason = MCDI_EV_FIELD(eqp, FWALERT_REASON);
1201
1202                 if (reason == MCDI_EVENT_FWALERT_REASON_SRAM_ACCESS)
1203                         should_abort = eecp->eec_exception(arg,
1204                                 EFX_EXCEPTION_FWALERT_SRAM,
1205                                 MCDI_EV_FIELD(eqp, FWALERT_DATA));
1206                 else
1207                         should_abort = eecp->eec_exception(arg,
1208                                 EFX_EXCEPTION_UNKNOWN_FWALERT,
1209                                 MCDI_EV_FIELD(eqp, DATA));
1210                 break;
1211         }
1212
1213         default:
1214                 EFSYS_PROBE1(mc_pcol_error, int, code);
1215                 break;
1216         }
1217
1218 out:
1219         return (should_abort);
1220 }
1221
1222 #endif  /* EFSYS_OPT_MCDI */
1223
1224 static  __checkReturn   efx_rc_t
1225 siena_ev_qprime(
1226         __in            efx_evq_t *eep,
1227         __in            unsigned int count)
1228 {
1229         efx_nic_t *enp = eep->ee_enp;
1230         uint32_t rptr;
1231         efx_dword_t dword;
1232
1233         rptr = count & eep->ee_mask;
1234
1235         EFX_POPULATE_DWORD_1(dword, FRF_AZ_EVQ_RPTR, rptr);
1236
1237         EFX_BAR_TBL_WRITED(enp, FR_AZ_EVQ_RPTR_REG, eep->ee_index,
1238                             &dword, B_FALSE);
1239
1240         return (0);
1241 }
1242
1243 static          void
1244 siena_ev_qpost(
1245         __in    efx_evq_t *eep,
1246         __in    uint16_t data)
1247 {
1248         efx_nic_t *enp = eep->ee_enp;
1249         efx_qword_t ev;
1250         efx_oword_t oword;
1251
1252         EFX_POPULATE_QWORD_2(ev, FSF_AZ_EV_CODE, FSE_AZ_EV_CODE_DRV_GEN_EV,
1253             FSF_AZ_EV_DATA_DW0, (uint32_t)data);
1254
1255         EFX_POPULATE_OWORD_3(oword, FRF_AZ_DRV_EV_QID, eep->ee_index,
1256             EFX_DWORD_0, EFX_QWORD_FIELD(ev, EFX_DWORD_0),
1257             EFX_DWORD_1, EFX_QWORD_FIELD(ev, EFX_DWORD_1));
1258
1259         EFX_BAR_WRITEO(enp, FR_AZ_DRV_EV_REG, &oword);
1260 }
1261
1262 static  __checkReturn   efx_rc_t
1263 siena_ev_qmoderate(
1264         __in            efx_evq_t *eep,
1265         __in            unsigned int us)
1266 {
1267         efx_nic_t *enp = eep->ee_enp;
1268         efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
1269         unsigned int locked;
1270         efx_dword_t dword;
1271         efx_rc_t rc;
1272
1273         if (us > encp->enc_evq_timer_max_us) {
1274                 rc = EINVAL;
1275                 goto fail1;
1276         }
1277
1278         /* If the value is zero then disable the timer */
1279         if (us == 0) {
1280                 EFX_POPULATE_DWORD_2(dword,
1281                     FRF_CZ_TC_TIMER_MODE, FFE_CZ_TIMER_MODE_DIS,
1282                     FRF_CZ_TC_TIMER_VAL, 0);
1283         } else {
1284                 unsigned int ticks;
1285
1286                 if ((rc = efx_ev_usecs_to_ticks(enp, us, &ticks)) != 0)
1287                         goto fail2;
1288
1289                 EFSYS_ASSERT(ticks > 0);
1290                 EFX_POPULATE_DWORD_2(dword,
1291                     FRF_CZ_TC_TIMER_MODE, FFE_CZ_TIMER_MODE_INT_HLDOFF,
1292                     FRF_CZ_TC_TIMER_VAL, ticks - 1);
1293         }
1294
1295         locked = (eep->ee_index == 0) ? 1 : 0;
1296
1297         EFX_BAR_TBL_WRITED(enp, FR_BZ_TIMER_COMMAND_REGP0,
1298             eep->ee_index, &dword, locked);
1299
1300         return (0);
1301
1302 fail2:
1303         EFSYS_PROBE(fail2);
1304 fail1:
1305         EFSYS_PROBE1(fail1, efx_rc_t, rc);
1306
1307         return (rc);
1308 }
1309
1310 static  __checkReturn   efx_rc_t
1311 siena_ev_qcreate(
1312         __in            efx_nic_t *enp,
1313         __in            unsigned int index,
1314         __in            efsys_mem_t *esmp,
1315         __in            size_t ndescs,
1316         __in            uint32_t id,
1317         __in            uint32_t us,
1318         __in            uint32_t flags,
1319         __in            efx_evq_t *eep)
1320 {
1321         efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
1322         uint32_t size;
1323         efx_oword_t oword;
1324         efx_rc_t rc;
1325         boolean_t notify_mode;
1326
1327         _NOTE(ARGUNUSED(esmp))
1328
1329         if (index >= encp->enc_evq_limit) {
1330                 rc = EINVAL;
1331                 goto fail1;
1332         }
1333 #if EFSYS_OPT_RX_SCALE
1334         if (enp->en_intr.ei_type == EFX_INTR_LINE &&
1335             index >= EFX_MAXRSS_LEGACY) {
1336                 rc = EINVAL;
1337                 goto fail2;
1338         }
1339 #endif
1340         for (size = 0;
1341             (1U << size) <= encp->enc_evq_max_nevs / encp->enc_evq_min_nevs;
1342             size++)
1343                 if ((1U << size) == (uint32_t)ndescs / encp->enc_evq_min_nevs)
1344                         break;
1345         if (id + (1 << size) >= encp->enc_buftbl_limit) {
1346                 rc = EINVAL;
1347                 goto fail3;
1348         }
1349
1350         /* Set up the handler table */
1351         eep->ee_rx      = siena_ev_rx;
1352         eep->ee_tx      = siena_ev_tx;
1353         eep->ee_driver  = siena_ev_driver;
1354         eep->ee_global  = siena_ev_global;
1355         eep->ee_drv_gen = siena_ev_drv_gen;
1356 #if EFSYS_OPT_MCDI
1357         eep->ee_mcdi    = siena_ev_mcdi;
1358 #endif  /* EFSYS_OPT_MCDI */
1359
1360         notify_mode = ((flags & EFX_EVQ_FLAGS_NOTIFY_MASK) !=
1361             EFX_EVQ_FLAGS_NOTIFY_INTERRUPT);
1362
1363         /* Set up the new event queue */
1364         EFX_POPULATE_OWORD_3(oword, FRF_CZ_TIMER_Q_EN, 1,
1365             FRF_CZ_HOST_NOTIFY_MODE, notify_mode,
1366             FRF_CZ_TIMER_MODE, FFE_CZ_TIMER_MODE_DIS);
1367         EFX_BAR_TBL_WRITEO(enp, FR_AZ_TIMER_TBL, index, &oword, B_TRUE);
1368
1369         EFX_POPULATE_OWORD_3(oword, FRF_AZ_EVQ_EN, 1, FRF_AZ_EVQ_SIZE, size,
1370             FRF_AZ_EVQ_BUF_BASE_ID, id);
1371
1372         EFX_BAR_TBL_WRITEO(enp, FR_AZ_EVQ_PTR_TBL, index, &oword, B_TRUE);
1373
1374         /* Set initial interrupt moderation */
1375         siena_ev_qmoderate(eep, us);
1376
1377         return (0);
1378
1379 fail3:
1380         EFSYS_PROBE(fail3);
1381 #if EFSYS_OPT_RX_SCALE
1382 fail2:
1383         EFSYS_PROBE(fail2);
1384 #endif
1385 fail1:
1386         EFSYS_PROBE1(fail1, efx_rc_t, rc);
1387
1388         return (rc);
1389 }
1390
1391 #endif /* EFSYS_OPT_SIENA */
1392
1393 #if EFSYS_OPT_QSTATS
1394 #if EFSYS_OPT_NAMES
1395 /* START MKCONFIG GENERATED EfxEventQueueStatNamesBlock ac223f7134058b4f */
1396 static const char * const __efx_ev_qstat_name[] = {
1397         "all",
1398         "rx",
1399         "rx_ok",
1400         "rx_frm_trunc",
1401         "rx_tobe_disc",
1402         "rx_pause_frm_err",
1403         "rx_buf_owner_id_err",
1404         "rx_ipv4_hdr_chksum_err",
1405         "rx_tcp_udp_chksum_err",
1406         "rx_eth_crc_err",
1407         "rx_ip_frag_err",
1408         "rx_mcast_pkt",
1409         "rx_mcast_hash_match",
1410         "rx_tcp_ipv4",
1411         "rx_tcp_ipv6",
1412         "rx_udp_ipv4",
1413         "rx_udp_ipv6",
1414         "rx_other_ipv4",
1415         "rx_other_ipv6",
1416         "rx_non_ip",
1417         "rx_batch",
1418         "tx",
1419         "tx_wq_ff_full",
1420         "tx_pkt_err",
1421         "tx_pkt_too_big",
1422         "tx_unexpected",
1423         "global",
1424         "global_mnt",
1425         "driver",
1426         "driver_srm_upd_done",
1427         "driver_tx_descq_fls_done",
1428         "driver_rx_descq_fls_done",
1429         "driver_rx_descq_fls_failed",
1430         "driver_rx_dsc_error",
1431         "driver_tx_dsc_error",
1432         "drv_gen",
1433         "mcdi_response",
1434         "rx_parse_incomplete",
1435 };
1436 /* END MKCONFIG GENERATED EfxEventQueueStatNamesBlock */
1437
1438                 const char *
1439 efx_ev_qstat_name(
1440         __in    efx_nic_t *enp,
1441         __in    unsigned int id)
1442 {
1443         _NOTE(ARGUNUSED(enp))
1444
1445         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
1446         EFSYS_ASSERT3U(id, <, EV_NQSTATS);
1447
1448         return (__efx_ev_qstat_name[id]);
1449 }
1450 #endif  /* EFSYS_OPT_NAMES */
1451 #endif  /* EFSYS_OPT_QSTATS */
1452
1453 #if EFSYS_OPT_SIENA
1454
1455 #if EFSYS_OPT_QSTATS
1456 static                                  void
1457 siena_ev_qstats_update(
1458         __in                            efx_evq_t *eep,
1459         __inout_ecount(EV_NQSTATS)      efsys_stat_t *stat)
1460 {
1461         unsigned int id;
1462
1463         for (id = 0; id < EV_NQSTATS; id++) {
1464                 efsys_stat_t *essp = &stat[id];
1465
1466                 EFSYS_STAT_INCR(essp, eep->ee_stat[id]);
1467                 eep->ee_stat[id] = 0;
1468         }
1469 }
1470 #endif  /* EFSYS_OPT_QSTATS */
1471
1472 static          void
1473 siena_ev_qdestroy(
1474         __in    efx_evq_t *eep)
1475 {
1476         efx_nic_t *enp = eep->ee_enp;
1477         efx_oword_t oword;
1478
1479         /* Purge event queue */
1480         EFX_ZERO_OWORD(oword);
1481
1482         EFX_BAR_TBL_WRITEO(enp, FR_AZ_EVQ_PTR_TBL,
1483             eep->ee_index, &oword, B_TRUE);
1484
1485         EFX_ZERO_OWORD(oword);
1486         EFX_BAR_TBL_WRITEO(enp, FR_AZ_TIMER_TBL, eep->ee_index, &oword, B_TRUE);
1487 }
1488
1489 static          void
1490 siena_ev_fini(
1491         __in    efx_nic_t *enp)
1492 {
1493         _NOTE(ARGUNUSED(enp))
1494 }
1495
1496 #endif /* EFSYS_OPT_SIENA */