drivers/net/sfc/base/efx_rx.c

   1 /*
   2  * Copyright (c) 2007-2016 Solarflare Communications Inc.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are met:
   7  *
   8  * 1. Redistributions of source code must retain the above copyright notice,
   9  *    this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright notice,
  11  *    this list of conditions and the following disclaimer in the documentation
  12  *    and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  15  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  16  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  17  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
  18  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  19  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  20  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
  21  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  22  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
  23  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
  24  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25  *
  26  * The views and conclusions contained in the software and documentation are
  27  * those of the authors and should not be interpreted as representing official
  28  * policies, either expressed or implied, of the FreeBSD Project.
  29  */
  30
  31 #include "efx.h"
  32 #include "efx_impl.h"
  33
  34
  35 #if EFSYS_OPT_SIENA
  36
  37 static  __checkReturn   efx_rc_t
  38 siena_rx_init(
  39         __in            efx_nic_t *enp);
  40
  41 static                  void
  42 siena_rx_fini(
  43         __in            efx_nic_t *enp);
  44
  45 static  __checkReturn   efx_rc_t
  46 siena_rx_prefix_pktlen(
  47         __in            efx_nic_t *enp,
  48         __in            uint8_t *buffer,
  49         __out           uint16_t *lengthp);
  50
  51 static                  void
  52 siena_rx_qpost(
  53         __in            efx_rxq_t *erp,
  54         __in_ecount(n)  efsys_dma_addr_t *addrp,
  55         __in            size_t size,
  56         __in            unsigned int n,
  57         __in            unsigned int completed,
  58         __in            unsigned int added);
  59
  60 static                  void
  61 siena_rx_qpush(
  62         __in            efx_rxq_t *erp,
  63         __in            unsigned int added,
  64         __inout         unsigned int *pushedp);
  65
  66 static  __checkReturn   efx_rc_t
  67 siena_rx_qflush(
  68         __in            efx_rxq_t *erp);
  69
  70 static                  void
  71 siena_rx_qenable(
  72         __in            efx_rxq_t *erp);
  73
  74 static  __checkReturn   efx_rc_t
  75 siena_rx_qcreate(
  76         __in            efx_nic_t *enp,
  77         __in            unsigned int index,
  78         __in            unsigned int label,
  79         __in            efx_rxq_type_t type,
  80         __in            efsys_mem_t *esmp,
  81         __in            size_t n,
  82         __in            uint32_t id,
  83         __in            efx_evq_t *eep,
  84         __in            efx_rxq_t *erp);
  85
  86 static                  void
  87 siena_rx_qdestroy(
  88         __in            efx_rxq_t *erp);
  89
  90 #endif /* EFSYS_OPT_SIENA */
  91
  92
  93 #if EFSYS_OPT_SIENA
  94 static const efx_rx_ops_t __efx_rx_siena_ops = {
  95         siena_rx_init,                          /* erxo_init */
  96         siena_rx_fini,                          /* erxo_fini */
  97         siena_rx_prefix_pktlen,                 /* erxo_prefix_pktlen */
  98         siena_rx_qpost,                         /* erxo_qpost */
  99         siena_rx_qpush,                         /* erxo_qpush */
 100         siena_rx_qflush,                        /* erxo_qflush */
 101         siena_rx_qenable,                       /* erxo_qenable */
 102         siena_rx_qcreate,                       /* erxo_qcreate */
 103         siena_rx_qdestroy,                      /* erxo_qdestroy */
 104 };
 105 #endif  /* EFSYS_OPT_SIENA */
 106
 107
 108         __checkReturn   efx_rc_t
 109 efx_rx_init(
 110         __inout         efx_nic_t *enp)
 111 {
 112         const efx_rx_ops_t *erxop;
 113         efx_rc_t rc;
 114
 115         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
 116         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC);
 117
 118         if (!(enp->en_mod_flags & EFX_MOD_EV)) {
 119                 rc = EINVAL;
 120                 goto fail1;
 121         }
 122
 123         if (enp->en_mod_flags & EFX_MOD_RX) {
 124                 rc = EINVAL;
 125                 goto fail2;
 126         }
 127
 128         switch (enp->en_family) {
 129 #if EFSYS_OPT_SIENA
 130         case EFX_FAMILY_SIENA:
 131                 erxop = &__efx_rx_siena_ops;
 132                 break;
 133 #endif /* EFSYS_OPT_SIENA */
 134
 135         default:
 136                 EFSYS_ASSERT(0);
 137                 rc = ENOTSUP;
 138                 goto fail3;
 139         }
 140
 141         if ((rc = erxop->erxo_init(enp)) != 0)
 142                 goto fail4;
 143
 144         enp->en_erxop = erxop;
 145         enp->en_mod_flags |= EFX_MOD_RX;
 146         return (0);
 147
 148 fail4:
 149         EFSYS_PROBE(fail4);
 150 fail3:
 151         EFSYS_PROBE(fail3);
 152 fail2:
 153         EFSYS_PROBE(fail2);
 154 fail1:
 155         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 156
 157         enp->en_erxop = NULL;
 158         enp->en_mod_flags &= ~EFX_MOD_RX;
 159         return (rc);
 160 }
 161
 162                         void
 163 efx_rx_fini(
 164         __in            efx_nic_t *enp)
 165 {
 166         const efx_rx_ops_t *erxop = enp->en_erxop;
 167
 168         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
 169         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC);
 170         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_RX);
 171         EFSYS_ASSERT3U(enp->en_rx_qcount, ==, 0);
 172
 173         erxop->erxo_fini(enp);
 174
 175         enp->en_erxop = NULL;
 176         enp->en_mod_flags &= ~EFX_MOD_RX;
 177 }
 178
 179                         void
 180 efx_rx_qpost(
 181         __in            efx_rxq_t *erp,
 182         __in_ecount(n)  efsys_dma_addr_t *addrp,
 183         __in            size_t size,
 184         __in            unsigned int n,
 185         __in            unsigned int completed,
 186         __in            unsigned int added)
 187 {
 188         efx_nic_t *enp = erp->er_enp;
 189         const efx_rx_ops_t *erxop = enp->en_erxop;
 190
 191         EFSYS_ASSERT3U(erp->er_magic, ==, EFX_RXQ_MAGIC);
 192
 193         erxop->erxo_qpost(erp, addrp, size, n, completed, added);
 194 }
 195
 196                         void
 197 efx_rx_qpush(
 198         __in            efx_rxq_t *erp,
 199         __in            unsigned int added,
 200         __inout         unsigned int *pushedp)
 201 {
 202         efx_nic_t *enp = erp->er_enp;
 203         const efx_rx_ops_t *erxop = enp->en_erxop;
 204
 205         EFSYS_ASSERT3U(erp->er_magic, ==, EFX_RXQ_MAGIC);
 206
 207         erxop->erxo_qpush(erp, added, pushedp);
 208 }
 209
 210         __checkReturn   efx_rc_t
 211 efx_rx_qflush(
 212         __in            efx_rxq_t *erp)
 213 {
 214         efx_nic_t *enp = erp->er_enp;
 215         const efx_rx_ops_t *erxop = enp->en_erxop;
 216         efx_rc_t rc;
 217
 218         EFSYS_ASSERT3U(erp->er_magic, ==, EFX_RXQ_MAGIC);
 219
 220         if ((rc = erxop->erxo_qflush(erp)) != 0)
 221                 goto fail1;
 222
 223         return (0);
 224
 225 fail1:
 226         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 227
 228         return (rc);
 229 }
 230
 231                         void
 232 efx_rx_qenable(
 233         __in            efx_rxq_t *erp)
 234 {
 235         efx_nic_t *enp = erp->er_enp;
 236         const efx_rx_ops_t *erxop = enp->en_erxop;
 237
 238         EFSYS_ASSERT3U(erp->er_magic, ==, EFX_RXQ_MAGIC);
 239
 240         erxop->erxo_qenable(erp);
 241 }
 242
 243         __checkReturn   efx_rc_t
 244 efx_rx_qcreate(
 245         __in            efx_nic_t *enp,
 246         __in            unsigned int index,
 247         __in            unsigned int label,
 248         __in            efx_rxq_type_t type,
 249         __in            efsys_mem_t *esmp,
 250         __in            size_t n,
 251         __in            uint32_t id,
 252         __in            efx_evq_t *eep,
 253         __deref_out     efx_rxq_t **erpp)
 254 {
 255         const efx_rx_ops_t *erxop = enp->en_erxop;
 256         efx_rxq_t *erp;
 257         efx_rc_t rc;
 258
 259         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
 260         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_RX);
 261
 262         /* Allocate an RXQ object */
 263         EFSYS_KMEM_ALLOC(enp->en_esip, sizeof (efx_rxq_t), erp);
 264
 265         if (erp == NULL) {
 266                 rc = ENOMEM;
 267                 goto fail1;
 268         }
 269
 270         erp->er_magic = EFX_RXQ_MAGIC;
 271         erp->er_enp = enp;
 272         erp->er_index = index;
 273         erp->er_mask = n - 1;
 274         erp->er_esmp = esmp;
 275
 276         if ((rc = erxop->erxo_qcreate(enp, index, label, type, esmp, n, id,
 277             eep, erp)) != 0)
 278                 goto fail2;
 279
 280         enp->en_rx_qcount++;
 281         *erpp = erp;
 282
 283         return (0);
 284
 285 fail2:
 286         EFSYS_PROBE(fail2);
 287
 288         EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_rxq_t), erp);
 289 fail1:
 290         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 291
 292         return (rc);
 293 }
 294
 295                         void
 296 efx_rx_qdestroy(
 297         __in            efx_rxq_t *erp)
 298 {
 299         efx_nic_t *enp = erp->er_enp;
 300         const efx_rx_ops_t *erxop = enp->en_erxop;
 301
 302         EFSYS_ASSERT3U(erp->er_magic, ==, EFX_RXQ_MAGIC);
 303
 304         erxop->erxo_qdestroy(erp);
 305 }
 306
 307         __checkReturn   efx_rc_t
 308 efx_pseudo_hdr_pkt_length_get(
 309         __in            efx_rxq_t *erp,
 310         __in            uint8_t *buffer,
 311         __out           uint16_t *lengthp)
 312 {
 313         efx_nic_t *enp = erp->er_enp;
 314         const efx_rx_ops_t *erxop = enp->en_erxop;
 315
 316         EFSYS_ASSERT3U(erp->er_magic, ==, EFX_RXQ_MAGIC);
 317
 318         return (erxop->erxo_prefix_pktlen(enp, buffer, lengthp));
 319 }
 320
 321 #if EFSYS_OPT_SIENA
 322
 323 static  __checkReturn   efx_rc_t
 324 siena_rx_init(
 325         __in            efx_nic_t *enp)
 326 {
 327         efx_oword_t oword;
 328         unsigned int index;
 329
 330         EFX_BAR_READO(enp, FR_AZ_RX_CFG_REG, &oword);
 331
 332         EFX_SET_OWORD_FIELD(oword, FRF_BZ_RX_DESC_PUSH_EN, 0);
 333         EFX_SET_OWORD_FIELD(oword, FRF_BZ_RX_HASH_ALG, 0);
 334         EFX_SET_OWORD_FIELD(oword, FRF_BZ_RX_IP_HASH, 0);
 335         EFX_SET_OWORD_FIELD(oword, FRF_BZ_RX_TCP_SUP, 0);
 336         EFX_SET_OWORD_FIELD(oword, FRF_BZ_RX_HASH_INSRT_HDR, 0);
 337         EFX_SET_OWORD_FIELD(oword, FRF_BZ_RX_USR_BUF_SIZE, 0x3000 / 32);
 338         EFX_BAR_WRITEO(enp, FR_AZ_RX_CFG_REG, &oword);
 339
 340         /* Zero the RSS table */
 341         for (index = 0; index < FR_BZ_RX_INDIRECTION_TBL_ROWS;
 342             index++) {
 343                 EFX_ZERO_OWORD(oword);
 344                 EFX_BAR_TBL_WRITEO(enp, FR_BZ_RX_INDIRECTION_TBL,
 345                                     index, &oword, B_TRUE);
 346         }
 347
 348         return (0);
 349 }
 350
 351
 352 #define EFX_RX_LFSR_HASH(_enp, _insert)                                 \
 353         do {                                                            \
 354                 efx_oword_t oword;                                      \
 355                                                                         \
 356                 EFX_BAR_READO((_enp), FR_AZ_RX_CFG_REG, &oword);        \
 357                 EFX_SET_OWORD_FIELD(oword, FRF_BZ_RX_HASH_ALG, 0);      \
 358                 EFX_SET_OWORD_FIELD(oword, FRF_BZ_RX_IP_HASH, 0);       \
 359                 EFX_SET_OWORD_FIELD(oword, FRF_BZ_RX_TCP_SUP, 0);       \
 360                 EFX_SET_OWORD_FIELD(oword, FRF_BZ_RX_HASH_INSRT_HDR,    \
 361                     (_insert) ? 1 : 0);                                 \
 362                 EFX_BAR_WRITEO((_enp), FR_AZ_RX_CFG_REG, &oword);       \
 363                                                                         \
 364                 if ((_enp)->en_family == EFX_FAMILY_SIENA) {            \
 365                         EFX_BAR_READO((_enp), FR_CZ_RX_RSS_IPV6_REG3,   \
 366                             &oword);                                    \
 367                         EFX_SET_OWORD_FIELD(oword,                      \
 368                             FRF_CZ_RX_RSS_IPV6_THASH_ENABLE, 0);        \
 369                         EFX_BAR_WRITEO((_enp), FR_CZ_RX_RSS_IPV6_REG3,  \
 370                             &oword);                                    \
 371                 }                                                       \
 372                                                                         \
 373                 _NOTE(CONSTANTCONDITION)                                \
 374         } while (B_FALSE)
 375
 376 #define EFX_RX_TOEPLITZ_IPV4_HASH(_enp, _insert, _ip, _tcp)             \
 377         do {                                                            \
 378                 efx_oword_t oword;                                      \
 379                                                                         \
 380                 EFX_BAR_READO((_enp), FR_AZ_RX_CFG_REG, &oword);        \
 381                 EFX_SET_OWORD_FIELD(oword, FRF_BZ_RX_HASH_ALG, 1);      \
 382                 EFX_SET_OWORD_FIELD(oword, FRF_BZ_RX_IP_HASH,           \
 383                     (_ip) ? 1 : 0);                                     \
 384                 EFX_SET_OWORD_FIELD(oword, FRF_BZ_RX_TCP_SUP,           \
 385                     (_tcp) ? 0 : 1);                                    \
 386                 EFX_SET_OWORD_FIELD(oword, FRF_BZ_RX_HASH_INSRT_HDR,    \
 387                     (_insert) ? 1 : 0);                                 \
 388                 EFX_BAR_WRITEO((_enp), FR_AZ_RX_CFG_REG, &oword);       \
 389                                                                         \
 390                 _NOTE(CONSTANTCONDITION)                                \
 391         } while (B_FALSE)
 392
 393 #define EFX_RX_TOEPLITZ_IPV6_HASH(_enp, _ip, _tcp, _rc)                 \
 394         do {                                                            \
 395                 efx_oword_t oword;                                      \
 396                                                                         \
 397                 EFX_BAR_READO((_enp), FR_CZ_RX_RSS_IPV6_REG3, &oword);  \
 398                 EFX_SET_OWORD_FIELD(oword,                              \
 399                     FRF_CZ_RX_RSS_IPV6_THASH_ENABLE, 1);                \
 400                 EFX_SET_OWORD_FIELD(oword,                              \
 401                     FRF_CZ_RX_RSS_IPV6_IP_THASH_ENABLE, (_ip) ? 1 : 0); \
 402                 EFX_SET_OWORD_FIELD(oword,                              \
 403                     FRF_CZ_RX_RSS_IPV6_TCP_SUPPRESS, (_tcp) ? 0 : 1);   \
 404                 EFX_BAR_WRITEO((_enp), FR_CZ_RX_RSS_IPV6_REG3, &oword); \
 405                                                                         \
 406                 (_rc) = 0;                                              \
 407                                                                         \
 408                 _NOTE(CONSTANTCONDITION)                                \
 409         } while (B_FALSE)
 410
 411
 412 /*
 413  * Falcon/Siena pseudo-header
 414  * --------------------------
 415  *
 416  * Receive packets are prefixed by an optional 16 byte pseudo-header.
 417  * The pseudo-header is a byte array of one of the forms:
 418  *
 419  *  0  1  2  3  4  5  6  7  8  9 10 11 12 13 14 15
 420  * xx.xx.xx.xx.xx.xx.xx.xx.xx.xx.xx.xx.TT.TT.TT.TT
 421  * xx.xx.xx.xx.xx.xx.xx.xx.xx.xx.xx.xx.xx.xx.LL.LL
 422  *
 423  * where:
 424  *   TT.TT.TT.TT   Toeplitz hash (32-bit big-endian)
 425  *   LL.LL         LFSR hash     (16-bit big-endian)
 426  */
 427
 428 static  __checkReturn   efx_rc_t
 429 siena_rx_prefix_pktlen(
 430         __in            efx_nic_t *enp,
 431         __in            uint8_t *buffer,
 432         __out           uint16_t *lengthp)
 433 {
 434         _NOTE(ARGUNUSED(enp, buffer, lengthp))
 435
 436         /* Not supported by Falcon/Siena hardware */
 437         EFSYS_ASSERT(0);
 438         return (ENOTSUP);
 439 }
 440
 441
 442 static                  void
 443 siena_rx_qpost(
 444         __in            efx_rxq_t *erp,
 445         __in_ecount(n)  efsys_dma_addr_t *addrp,
 446         __in            size_t size,
 447         __in            unsigned int n,
 448         __in            unsigned int completed,
 449         __in            unsigned int added)
 450 {
 451         efx_qword_t qword;
 452         unsigned int i;
 453         unsigned int offset;
 454         unsigned int id;
 455
 456         /* The client driver must not overfill the queue */
 457         EFSYS_ASSERT3U(added - completed + n, <=,
 458             EFX_RXQ_LIMIT(erp->er_mask + 1));
 459
 460         id = added & (erp->er_mask);
 461         for (i = 0; i < n; i++) {
 462                 EFSYS_PROBE4(rx_post, unsigned int, erp->er_index,
 463                     unsigned int, id, efsys_dma_addr_t, addrp[i],
 464                     size_t, size);
 465
 466                 EFX_POPULATE_QWORD_3(qword,
 467                     FSF_AZ_RX_KER_BUF_SIZE, (uint32_t)(size),
 468                     FSF_AZ_RX_KER_BUF_ADDR_DW0,
 469                     (uint32_t)(addrp[i] & 0xffffffff),
 470                     FSF_AZ_RX_KER_BUF_ADDR_DW1,
 471                     (uint32_t)(addrp[i] >> 32));
 472
 473                 offset = id * sizeof (efx_qword_t);
 474                 EFSYS_MEM_WRITEQ(erp->er_esmp, offset, &qword);
 475
 476                 id = (id + 1) & (erp->er_mask);
 477         }
 478 }
 479
 480 static                  void
 481 siena_rx_qpush(
 482         __in    efx_rxq_t *erp,
 483         __in    unsigned int added,
 484         __inout unsigned int *pushedp)
 485 {
 486         efx_nic_t *enp = erp->er_enp;
 487         unsigned int pushed = *pushedp;
 488         uint32_t wptr;
 489         efx_oword_t oword;
 490         efx_dword_t dword;
 491
 492         /* All descriptors are pushed */
 493         *pushedp = added;
 494
 495         /* Push the populated descriptors out */
 496         wptr = added & erp->er_mask;
 497
 498         EFX_POPULATE_OWORD_1(oword, FRF_AZ_RX_DESC_WPTR, wptr);
 499
 500         /* Only write the third DWORD */
 501         EFX_POPULATE_DWORD_1(dword,
 502             EFX_DWORD_0, EFX_OWORD_FIELD(oword, EFX_DWORD_3));
 503
 504         /* Guarantee ordering of memory (descriptors) and PIO (doorbell) */
 505         EFX_DMA_SYNC_QUEUE_FOR_DEVICE(erp->er_esmp, erp->er_mask + 1,
 506             wptr, pushed & erp->er_mask);
 507         EFSYS_PIO_WRITE_BARRIER();
 508         EFX_BAR_TBL_WRITED3(enp, FR_BZ_RX_DESC_UPD_REGP0,
 509                             erp->er_index, &dword, B_FALSE);
 510 }
 511
 512 static  __checkReturn   efx_rc_t
 513 siena_rx_qflush(
 514         __in    efx_rxq_t *erp)
 515 {
 516         efx_nic_t *enp = erp->er_enp;
 517         efx_oword_t oword;
 518         uint32_t label;
 519
 520         label = erp->er_index;
 521
 522         /* Flush the queue */
 523         EFX_POPULATE_OWORD_2(oword, FRF_AZ_RX_FLUSH_DESCQ_CMD, 1,
 524             FRF_AZ_RX_FLUSH_DESCQ, label);
 525         EFX_BAR_WRITEO(enp, FR_AZ_RX_FLUSH_DESCQ_REG, &oword);
 526
 527         return (0);
 528 }
 529
 530 static          void
 531 siena_rx_qenable(
 532         __in    efx_rxq_t *erp)
 533 {
 534         efx_nic_t *enp = erp->er_enp;
 535         efx_oword_t oword;
 536
 537         EFSYS_ASSERT3U(erp->er_magic, ==, EFX_RXQ_MAGIC);
 538
 539         EFX_BAR_TBL_READO(enp, FR_AZ_RX_DESC_PTR_TBL,
 540                             erp->er_index, &oword, B_TRUE);
 541
 542         EFX_SET_OWORD_FIELD(oword, FRF_AZ_RX_DC_HW_RPTR, 0);
 543         EFX_SET_OWORD_FIELD(oword, FRF_AZ_RX_DESCQ_HW_RPTR, 0);
 544         EFX_SET_OWORD_FIELD(oword, FRF_AZ_RX_DESCQ_EN, 1);
 545
 546         EFX_BAR_TBL_WRITEO(enp, FR_AZ_RX_DESC_PTR_TBL,
 547                             erp->er_index, &oword, B_TRUE);
 548 }
 549
 550 static  __checkReturn   efx_rc_t
 551 siena_rx_qcreate(
 552         __in            efx_nic_t *enp,
 553         __in            unsigned int index,
 554         __in            unsigned int label,
 555         __in            efx_rxq_type_t type,
 556         __in            efsys_mem_t *esmp,
 557         __in            size_t n,
 558         __in            uint32_t id,
 559         __in            efx_evq_t *eep,
 560         __in            efx_rxq_t *erp)
 561 {
 562         efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
 563         efx_oword_t oword;
 564         uint32_t size;
 565         boolean_t jumbo;
 566         efx_rc_t rc;
 567
 568         _NOTE(ARGUNUSED(esmp))
 569
 570         EFX_STATIC_ASSERT(EFX_EV_RX_NLABELS ==
 571             (1 << FRF_AZ_RX_DESCQ_LABEL_WIDTH));
 572         EFSYS_ASSERT3U(label, <, EFX_EV_RX_NLABELS);
 573         EFSYS_ASSERT3U(enp->en_rx_qcount + 1, <, encp->enc_rxq_limit);
 574
 575         EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MAXNDESCS));
 576         EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MINNDESCS));
 577
 578         if (!ISP2(n) || (n < EFX_RXQ_MINNDESCS) || (n > EFX_RXQ_MAXNDESCS)) {
 579                 rc = EINVAL;
 580                 goto fail1;
 581         }
 582         if (index >= encp->enc_rxq_limit) {
 583                 rc = EINVAL;
 584                 goto fail2;
 585         }
 586         for (size = 0; (1 << size) <= (EFX_RXQ_MAXNDESCS / EFX_RXQ_MINNDESCS);
 587             size++)
 588                 if ((1 << size) == (int)(n / EFX_RXQ_MINNDESCS))
 589                         break;
 590         if (id + (1 << size) >= encp->enc_buftbl_limit) {
 591                 rc = EINVAL;
 592                 goto fail3;
 593         }
 594
 595         switch (type) {
 596         case EFX_RXQ_TYPE_DEFAULT:
 597                 jumbo = B_FALSE;
 598                 break;
 599
 600         default:
 601                 rc = EINVAL;
 602                 goto fail4;
 603         }
 604
 605         /* Set up the new descriptor queue */
 606         EFX_POPULATE_OWORD_7(oword,
 607             FRF_AZ_RX_DESCQ_BUF_BASE_ID, id,
 608             FRF_AZ_RX_DESCQ_EVQ_ID, eep->ee_index,
 609             FRF_AZ_RX_DESCQ_OWNER_ID, 0,
 610             FRF_AZ_RX_DESCQ_LABEL, label,
 611             FRF_AZ_RX_DESCQ_SIZE, size,
 612             FRF_AZ_RX_DESCQ_TYPE, 0,
 613             FRF_AZ_RX_DESCQ_JUMBO, jumbo);
 614
 615         EFX_BAR_TBL_WRITEO(enp, FR_AZ_RX_DESC_PTR_TBL,
 616                             erp->er_index, &oword, B_TRUE);
 617
 618         return (0);
 619
 620 fail4:
 621         EFSYS_PROBE(fail4);
 622 fail3:
 623         EFSYS_PROBE(fail3);
 624 fail2:
 625         EFSYS_PROBE(fail2);
 626 fail1:
 627         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 628
 629         return (rc);
 630 }
 631
 632 static          void
 633 siena_rx_qdestroy(
 634         __in    efx_rxq_t *erp)
 635 {
 636         efx_nic_t *enp = erp->er_enp;
 637         efx_oword_t oword;
 638
 639         EFSYS_ASSERT(enp->en_rx_qcount != 0);
 640         --enp->en_rx_qcount;
 641
 642         /* Purge descriptor queue */
 643         EFX_ZERO_OWORD(oword);
 644
 645         EFX_BAR_TBL_WRITEO(enp, FR_AZ_RX_DESC_PTR_TBL,
 646                             erp->er_index, &oword, B_TRUE);
 647
 648         /* Free the RXQ object */
 649         EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_rxq_t), erp);
 650 }
 651
 652 static          void
 653 siena_rx_fini(
 654         __in    efx_nic_t *enp)
 655 {
 656         _NOTE(ARGUNUSED(enp))
 657 }
 658
 659 #endif /* EFSYS_OPT_SIENA */