1 /* SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2009-2018 Solarflare Communications Inc.
7 #ifndef _SYS_SIENA_IMPL_H
8 #define _SYS_SIENA_IMPL_H
13 #include "siena_flash.h"
19 #ifndef EFX_TXQ_DC_SIZE
20 #define EFX_TXQ_DC_SIZE 1 /* 16 descriptors */
22 #ifndef EFX_RXQ_DC_SIZE
23 #define EFX_RXQ_DC_SIZE 3 /* 64 descriptors */
25 #define EFX_TXQ_DC_NDESCS(_dcsize) (8 << (_dcsize))
26 #define EFX_RXQ_DC_NDESCS(_dcsize) (8 << (_dcsize))
28 #define SIENA_EVQ_MAXNEVS 32768
29 #define SIENA_EVQ_MINNEVS 512
31 #define SIENA_TXQ_MAXNDESCS 4096
32 #define SIENA_TXQ_MINNDESCS 512
34 #define SIENA_RXQ_MAXNDESCS 4096
35 #define SIENA_RXQ_MINNDESCS 512
37 #define SIENA_EVQ_DESC_SIZE (sizeof (efx_qword_t))
38 #define SIENA_RXQ_DESC_SIZE (sizeof (efx_qword_t))
39 #define SIENA_TXQ_DESC_SIZE (sizeof (efx_qword_t))
41 #define SIENA_NVRAM_CHUNK 0x80
44 extern __checkReturn efx_rc_t
48 extern __checkReturn efx_rc_t
52 extern __checkReturn efx_rc_t
58 extern efx_sram_pattern_fn_t __efx_sram_pattern_fns[];
60 typedef struct siena_register_set_s {
65 } siena_register_set_t;
67 extern __checkReturn efx_rc_t
68 siena_nic_register_test(
71 #endif /* EFSYS_OPT_DIAG */
81 #define SIENA_SRAM_ROWS 0x12000
89 extern __checkReturn efx_rc_t
92 __in efx_sram_pattern_fn_t func);
94 #endif /* EFSYS_OPT_DIAG */
98 extern __checkReturn efx_rc_t
101 __in const efx_mcdi_transport_t *mtp);
104 siena_mcdi_send_request(
106 __in_bcount(hdr_len) void *hdrp,
108 __in_bcount(sdu_len) void *sdup,
109 __in size_t sdu_len);
111 extern __checkReturn boolean_t
112 siena_mcdi_poll_response(
113 __in efx_nic_t *enp);
116 siena_mcdi_read_response(
118 __out_bcount(length) void *bufferp,
123 siena_mcdi_poll_reboot(
124 __in efx_nic_t *enp);
128 __in efx_nic_t *enp);
130 extern __checkReturn efx_rc_t
131 siena_mcdi_feature_supported(
133 __in efx_mcdi_feature_id_t id,
134 __out boolean_t *supportedp);
137 siena_mcdi_get_timeout(
139 __in efx_mcdi_req_t *emrp,
140 __out uint32_t *timeoutp);
142 #endif /* EFSYS_OPT_MCDI */
144 #if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD
146 extern __checkReturn efx_rc_t
147 siena_nvram_partn_lock(
149 __in uint32_t partn);
151 extern __checkReturn efx_rc_t
152 siena_nvram_partn_unlock(
155 __out_opt uint32_t *verify_resultp);
157 extern __checkReturn efx_rc_t
158 siena_nvram_get_dynamic_cfg(
162 __out siena_mc_dynamic_config_hdr_t **dcfgp,
163 __out size_t *sizep);
165 #endif /* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */
171 extern __checkReturn efx_rc_t
173 __in efx_nic_t *enp);
175 #endif /* EFSYS_OPT_DIAG */
177 extern __checkReturn efx_rc_t
178 siena_nvram_get_subtype(
181 __out uint32_t *subtypep);
183 extern __checkReturn efx_rc_t
184 siena_nvram_type_to_partn(
186 __in efx_nvram_type_t type,
187 __out uint32_t *partnp);
189 extern __checkReturn efx_rc_t
190 siena_nvram_partn_size(
193 __out size_t *sizep);
195 extern __checkReturn efx_rc_t
196 siena_nvram_partn_rw_start(
199 __out size_t *chunk_sizep);
201 extern __checkReturn efx_rc_t
202 siena_nvram_partn_read(
205 __in unsigned int offset,
206 __out_bcount(size) caddr_t data,
209 extern __checkReturn efx_rc_t
210 siena_nvram_partn_erase(
213 __in unsigned int offset,
216 extern __checkReturn efx_rc_t
217 siena_nvram_partn_write(
220 __in unsigned int offset,
221 __out_bcount(size) caddr_t data,
224 extern __checkReturn efx_rc_t
225 siena_nvram_partn_rw_finish(
228 __out_opt uint32_t *verify_resultp);
230 extern __checkReturn efx_rc_t
231 siena_nvram_partn_get_version(
234 __out uint32_t *subtypep,
235 __out_ecount(4) uint16_t version[4]);
237 extern __checkReturn efx_rc_t
238 siena_nvram_partn_set_version(
241 __in_ecount(4) uint16_t version[4]);
243 #endif /* EFSYS_OPT_NVRAM */
247 extern __checkReturn efx_rc_t
249 __in efx_nic_t *enp);
251 extern __checkReturn efx_rc_t
254 __out size_t *sizep);
256 extern __checkReturn efx_rc_t
259 __out_bcount(size) caddr_t data,
262 extern __checkReturn efx_rc_t
265 __in_bcount(size) caddr_t data,
268 extern __checkReturn efx_rc_t
271 __in_bcount(size) caddr_t data,
274 extern __checkReturn efx_rc_t
277 __in_bcount(size) caddr_t data,
279 __inout efx_vpd_value_t *evvp);
281 extern __checkReturn efx_rc_t
284 __in_bcount(size) caddr_t data,
286 __in efx_vpd_value_t *evvp);
288 extern __checkReturn efx_rc_t
291 __in_bcount(size) caddr_t data,
293 __out efx_vpd_value_t *evvp,
294 __inout unsigned int *contp);
296 extern __checkReturn efx_rc_t
299 __in_bcount(size) caddr_t data,
304 __in efx_nic_t *enp);
306 #endif /* EFSYS_OPT_VPD */
308 typedef struct siena_link_state_s {
309 uint32_t sls_adv_cap_mask;
310 uint32_t sls_lp_cap_mask;
311 unsigned int sls_fcntl;
312 efx_link_mode_t sls_link_mode;
313 #if EFSYS_OPT_LOOPBACK
314 efx_loopback_type_t sls_loopback;
316 boolean_t sls_mac_up;
317 } siena_link_state_t;
322 __in efx_qword_t *eqp,
323 __out efx_link_mode_t *link_modep);
325 extern __checkReturn efx_rc_t
328 __out siena_link_state_t *slsp);
330 extern __checkReturn efx_rc_t
335 extern __checkReturn efx_rc_t
336 siena_phy_reconfigure(
337 __in efx_nic_t *enp);
339 extern __checkReturn efx_rc_t
341 __in efx_nic_t *enp);
343 extern __checkReturn efx_rc_t
346 __out uint32_t *ouip);
348 #if EFSYS_OPT_PHY_STATS
351 siena_phy_decode_stats(
354 __in_opt efsys_mem_t *esmp,
355 __out_opt uint64_t *smaskp,
356 __inout_ecount_opt(EFX_PHY_NSTATS) uint32_t *stat);
358 extern __checkReturn efx_rc_t
359 siena_phy_stats_update(
361 __in efsys_mem_t *esmp,
362 __inout_ecount(EFX_PHY_NSTATS) uint32_t *stat);
364 #endif /* EFSYS_OPT_PHY_STATS */
368 extern __checkReturn efx_rc_t
369 siena_phy_bist_start(
371 __in efx_bist_type_t type);
373 extern __checkReturn efx_rc_t
376 __in efx_bist_type_t type,
377 __out efx_bist_result_t *resultp,
378 __out_opt __drv_when(count > 0, __notnull)
379 uint32_t *value_maskp,
380 __out_ecount_opt(count) __drv_when(count > 0, __notnull)
381 unsigned long *valuesp,
387 __in efx_bist_type_t type);
389 #endif /* EFSYS_OPT_BIST */
391 extern __checkReturn efx_rc_t
394 __out efx_link_mode_t *link_modep);
396 extern __checkReturn efx_rc_t
399 __out boolean_t *mac_upp);
401 extern __checkReturn efx_rc_t
402 siena_mac_reconfigure(
403 __in efx_nic_t *enp);
405 extern __checkReturn efx_rc_t
410 #if EFSYS_OPT_LOOPBACK
412 extern __checkReturn efx_rc_t
413 siena_mac_loopback_set(
415 __in efx_link_mode_t link_mode,
416 __in efx_loopback_type_t loopback_type);
418 #endif /* EFSYS_OPT_LOOPBACK */
420 #if EFSYS_OPT_MAC_STATS
422 extern __checkReturn efx_rc_t
423 siena_mac_stats_get_mask(
425 __inout_bcount(mask_size) uint32_t *maskp,
426 __in size_t mask_size);
428 extern __checkReturn efx_rc_t
429 siena_mac_stats_update(
431 __in efsys_mem_t *esmp,
432 __inout_ecount(EFX_MAC_NSTATS) efsys_stat_t *stat,
433 __inout_opt uint32_t *generationp);
435 #endif /* EFSYS_OPT_MAC_STATS */
441 #endif /* _SYS_SIENA_IMPL_H */