drivers/net/sfc/base/siena_nvram.c

   1 /*
   2  * Copyright (c) 2009-2016 Solarflare Communications Inc.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are met:
   7  *
   8  * 1. Redistributions of source code must retain the above copyright notice,
   9  *    this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright notice,
  11  *    this list of conditions and the following disclaimer in the documentation
  12  *    and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  15  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  16  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  17  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
  18  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  19  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  20  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
  21  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  22  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
  23  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
  24  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25  *
  26  * The views and conclusions contained in the software and documentation are
  27  * those of the authors and should not be interpreted as representing official
  28  * policies, either expressed or implied, of the FreeBSD Project.
  29  */
  30
  31 #include "efx.h"
  32 #include "efx_impl.h"
  33
  34 #if EFSYS_OPT_SIENA
  35
  36 #if EFSYS_OPT_VPD || EFSYS_OPT_NVRAM
  37
  38         __checkReturn           efx_rc_t
  39 siena_nvram_partn_size(
  40         __in                    efx_nic_t *enp,
  41         __in                    uint32_t partn,
  42         __out                   size_t *sizep)
  43 {
  44         efx_rc_t rc;
  45
  46         if ((1 << partn) & ~enp->en_u.siena.enu_partn_mask) {
  47                 rc = ENOTSUP;
  48                 goto fail1;
  49         }
  50
  51         if ((rc = efx_mcdi_nvram_info(enp, partn, sizep,
  52             NULL, NULL, NULL)) != 0) {
  53                 goto fail2;
  54         }
  55
  56         return (0);
  57
  58 fail2:
  59         EFSYS_PROBE(fail2);
  60 fail1:
  61         EFSYS_PROBE1(fail1, efx_rc_t, rc);
  62
  63         return (rc);
  64 }
  65
  66         __checkReturn           efx_rc_t
  67 siena_nvram_partn_lock(
  68         __in                    efx_nic_t *enp,
  69         __in                    uint32_t partn)
  70 {
  71         efx_rc_t rc;
  72
  73         if ((rc = efx_mcdi_nvram_update_start(enp, partn)) != 0) {
  74                 goto fail1;
  75         }
  76
  77         return (0);
  78
  79 fail1:
  80         EFSYS_PROBE1(fail1, efx_rc_t, rc);
  81
  82         return (rc);
  83 }
  84
  85         __checkReturn           efx_rc_t
  86 siena_nvram_partn_read(
  87         __in                    efx_nic_t *enp,
  88         __in                    uint32_t partn,
  89         __in                    unsigned int offset,
  90         __out_bcount(size)      caddr_t data,
  91         __in                    size_t size)
  92 {
  93         size_t chunk;
  94         efx_rc_t rc;
  95
  96         while (size > 0) {
  97                 chunk = MIN(size, SIENA_NVRAM_CHUNK);
  98
  99                 if ((rc = efx_mcdi_nvram_read(enp, partn, offset, data, chunk,
 100                             MC_CMD_NVRAM_READ_IN_V2_DEFAULT)) != 0) {
 101                         goto fail1;
 102                 }
 103
 104                 size -= chunk;
 105                 data += chunk;
 106                 offset += chunk;
 107         }
 108
 109         return (0);
 110
 111 fail1:
 112         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 113
 114         return (rc);
 115 }
 116
 117         __checkReturn           efx_rc_t
 118 siena_nvram_partn_erase(
 119         __in                    efx_nic_t *enp,
 120         __in                    uint32_t partn,
 121         __in                    unsigned int offset,
 122         __in                    size_t size)
 123 {
 124         efx_rc_t rc;
 125
 126         if ((rc = efx_mcdi_nvram_erase(enp, partn, offset, size)) != 0) {
 127                 goto fail1;
 128         }
 129
 130         return (0);
 131
 132 fail1:
 133         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 134
 135         return (rc);
 136 }
 137
 138         __checkReturn           efx_rc_t
 139 siena_nvram_partn_write(
 140         __in                    efx_nic_t *enp,
 141         __in                    uint32_t partn,
 142         __in                    unsigned int offset,
 143         __out_bcount(size)      caddr_t data,
 144         __in                    size_t size)
 145 {
 146         size_t chunk;
 147         efx_rc_t rc;
 148
 149         while (size > 0) {
 150                 chunk = MIN(size, SIENA_NVRAM_CHUNK);
 151
 152                 if ((rc = efx_mcdi_nvram_write(enp, partn, offset,
 153                             data, chunk)) != 0) {
 154                         goto fail1;
 155                 }
 156
 157                 size -= chunk;
 158                 data += chunk;
 159                 offset += chunk;
 160         }
 161
 162         return (0);
 163
 164 fail1:
 165         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 166
 167         return (rc);
 168 }
 169
 170         __checkReturn           efx_rc_t
 171 siena_nvram_partn_unlock(
 172         __in                    efx_nic_t *enp,
 173         __in                    uint32_t partn,
 174         __out_opt               uint32_t *verify_resultp)
 175 {
 176         boolean_t reboot;
 177         efx_rc_t rc;
 178
 179         /*
 180          * Reboot into the new image only for PHYs. The driver has to
 181          * explicitly cope with an MC reboot after a firmware update.
 182          */
 183         reboot = (partn == MC_CMD_NVRAM_TYPE_PHY_PORT0 ||
 184                     partn == MC_CMD_NVRAM_TYPE_PHY_PORT1 ||
 185                     partn == MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO);
 186
 187         rc = efx_mcdi_nvram_update_finish(enp, partn, reboot, verify_resultp);
 188         if (rc != 0)
 189                 goto fail1;
 190
 191         return (0);
 192
 193 fail1:
 194         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 195
 196         return (rc);
 197 }
 198
 199 #endif  /* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */
 200
 201 #if EFSYS_OPT_NVRAM
 202
 203 typedef struct siena_parttbl_entry_s {
 204         unsigned int            partn;
 205         unsigned int            port;
 206         efx_nvram_type_t        nvtype;
 207 } siena_parttbl_entry_t;
 208
 209 static siena_parttbl_entry_t siena_parttbl[] = {
 210         {MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO,   1, EFX_NVRAM_NULLPHY},
 211         {MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO,   2, EFX_NVRAM_NULLPHY},
 212         {MC_CMD_NVRAM_TYPE_MC_FW,               1, EFX_NVRAM_MC_FIRMWARE},
 213         {MC_CMD_NVRAM_TYPE_MC_FW,               2, EFX_NVRAM_MC_FIRMWARE},
 214         {MC_CMD_NVRAM_TYPE_MC_FW_BACKUP,        1, EFX_NVRAM_MC_GOLDEN},
 215         {MC_CMD_NVRAM_TYPE_MC_FW_BACKUP,        2, EFX_NVRAM_MC_GOLDEN},
 216         {MC_CMD_NVRAM_TYPE_EXP_ROM,             1, EFX_NVRAM_BOOTROM},
 217         {MC_CMD_NVRAM_TYPE_EXP_ROM,             2, EFX_NVRAM_BOOTROM},
 218         {MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT0,   1, EFX_NVRAM_BOOTROM_CFG},
 219         {MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT1,   2, EFX_NVRAM_BOOTROM_CFG},
 220         {MC_CMD_NVRAM_TYPE_PHY_PORT0,           1, EFX_NVRAM_PHY},
 221         {MC_CMD_NVRAM_TYPE_PHY_PORT1,           2, EFX_NVRAM_PHY},
 222         {MC_CMD_NVRAM_TYPE_FPGA,                1, EFX_NVRAM_FPGA},
 223         {MC_CMD_NVRAM_TYPE_FPGA,                2, EFX_NVRAM_FPGA},
 224         {MC_CMD_NVRAM_TYPE_FPGA_BACKUP,         1, EFX_NVRAM_FPGA_BACKUP},
 225         {MC_CMD_NVRAM_TYPE_FPGA_BACKUP,         2, EFX_NVRAM_FPGA_BACKUP},
 226         {MC_CMD_NVRAM_TYPE_FC_FW,               1, EFX_NVRAM_FCFW},
 227         {MC_CMD_NVRAM_TYPE_FC_FW,               2, EFX_NVRAM_FCFW},
 228         {MC_CMD_NVRAM_TYPE_CPLD,                1, EFX_NVRAM_CPLD},
 229         {MC_CMD_NVRAM_TYPE_CPLD,                2, EFX_NVRAM_CPLD},
 230         {MC_CMD_NVRAM_TYPE_LICENSE,             1, EFX_NVRAM_LICENSE},
 231         {MC_CMD_NVRAM_TYPE_LICENSE,             2, EFX_NVRAM_LICENSE}
 232 };
 233
 234         __checkReturn           efx_rc_t
 235 siena_nvram_type_to_partn(
 236         __in                    efx_nic_t *enp,
 237         __in                    efx_nvram_type_t type,
 238         __out                   uint32_t *partnp)
 239 {
 240         efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
 241         unsigned int i;
 242
 243         EFSYS_ASSERT3U(type, !=, EFX_NVRAM_INVALID);
 244         EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES);
 245         EFSYS_ASSERT(partnp != NULL);
 246
 247         for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) {
 248                 siena_parttbl_entry_t *entry = &siena_parttbl[i];
 249
 250                 if (entry->port == emip->emi_port && entry->nvtype == type) {
 251                         *partnp = entry->partn;
 252                         return (0);
 253                 }
 254         }
 255
 256         return (ENOTSUP);
 257 }
 258
 259
 260 #if EFSYS_OPT_DIAG
 261
 262         __checkReturn           efx_rc_t
 263 siena_nvram_test(
 264         __in                    efx_nic_t *enp)
 265 {
 266         efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
 267         siena_parttbl_entry_t *entry;
 268         unsigned int i;
 269         efx_rc_t rc;
 270
 271         /*
 272          * Iterate over the list of supported partition types
 273          * applicable to *this* port
 274          */
 275         for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) {
 276                 entry = &siena_parttbl[i];
 277
 278                 if (entry->port != emip->emi_port ||
 279                     !(enp->en_u.siena.enu_partn_mask & (1 << entry->partn)))
 280                         continue;
 281
 282                 if ((rc = efx_mcdi_nvram_test(enp, entry->partn)) != 0) {
 283                         goto fail1;
 284                 }
 285         }
 286
 287         return (0);
 288
 289 fail1:
 290         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 291
 292         return (rc);
 293 }
 294
 295 #endif  /* EFSYS_OPT_DIAG */
 296
 297
 298 #define SIENA_DYNAMIC_CFG_SIZE(_nitems)                                 \
 299         (sizeof (siena_mc_dynamic_config_hdr_t) + ((_nitems) *          \
 300         sizeof (((siena_mc_dynamic_config_hdr_t *)NULL)->fw_version[0])))
 301
 302         __checkReturn           efx_rc_t
 303 siena_nvram_get_dynamic_cfg(
 304         __in                    efx_nic_t *enp,
 305         __in                    uint32_t partn,
 306         __in                    boolean_t vpd,
 307         __out                   siena_mc_dynamic_config_hdr_t **dcfgp,
 308         __out                   size_t *sizep)
 309 {
 310         siena_mc_dynamic_config_hdr_t *dcfg = NULL;
 311         size_t size;
 312         uint8_t cksum;
 313         unsigned int vpd_offset;
 314         unsigned int vpd_length;
 315         unsigned int hdr_length;
 316         unsigned int nversions;
 317         unsigned int pos;
 318         unsigned int region;
 319         efx_rc_t rc;
 320
 321         EFSYS_ASSERT(partn == MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0 ||
 322                     partn == MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1);
 323
 324         /*
 325          * Allocate sufficient memory for the entire dynamiccfg area, even
 326          * if we're not actually going to read in the VPD.
 327          */
 328         if ((rc = siena_nvram_partn_size(enp, partn, &size)) != 0)
 329                 goto fail1;
 330
 331         EFSYS_KMEM_ALLOC(enp->en_esip, size, dcfg);
 332         if (dcfg == NULL) {
 333                 rc = ENOMEM;
 334                 goto fail2;
 335         }
 336
 337         if ((rc = siena_nvram_partn_read(enp, partn, 0,
 338             (caddr_t)dcfg, SIENA_NVRAM_CHUNK)) != 0)
 339                 goto fail3;
 340
 341         /* Verify the magic */
 342         if (EFX_DWORD_FIELD(dcfg->magic, EFX_DWORD_0)
 343             != SIENA_MC_DYNAMIC_CONFIG_MAGIC)
 344                 goto invalid1;
 345
 346         /* All future versions of the structure must be backwards compatible */
 347         EFX_STATIC_ASSERT(SIENA_MC_DYNAMIC_CONFIG_VERSION == 0);
 348
 349         hdr_length = EFX_WORD_FIELD(dcfg->length, EFX_WORD_0);
 350         nversions = EFX_DWORD_FIELD(dcfg->num_fw_version_items, EFX_DWORD_0);
 351         vpd_offset = EFX_DWORD_FIELD(dcfg->dynamic_vpd_offset, EFX_DWORD_0);
 352         vpd_length = EFX_DWORD_FIELD(dcfg->dynamic_vpd_length, EFX_DWORD_0);
 353
 354         /* Verify the hdr doesn't overflow the partn size */
 355         if (hdr_length > size || vpd_offset > size || vpd_length > size ||
 356             vpd_length + vpd_offset > size)
 357                 goto invalid2;
 358
 359         /* Verify the header has room for all it's versions */
 360         if (hdr_length < SIENA_DYNAMIC_CFG_SIZE(0) ||
 361             hdr_length < SIENA_DYNAMIC_CFG_SIZE(nversions))
 362                 goto invalid3;
 363
 364         /*
 365          * Read the remaining portion of the dcfg, either including
 366          * the whole of VPD (there is no vpd length in this structure,
 367          * so we have to parse each tag), or just the dcfg header itself
 368          */
 369         region = vpd ? vpd_offset + vpd_length : hdr_length;
 370         if (region > SIENA_NVRAM_CHUNK) {
 371                 if ((rc = siena_nvram_partn_read(enp, partn, SIENA_NVRAM_CHUNK,
 372                     (caddr_t)dcfg + SIENA_NVRAM_CHUNK,
 373                     region - SIENA_NVRAM_CHUNK)) != 0)
 374                         goto fail4;
 375         }
 376
 377         /* Verify checksum */
 378         cksum = 0;
 379         for (pos = 0; pos < hdr_length; pos++)
 380                 cksum += ((uint8_t *)dcfg)[pos];
 381         if (cksum != 0)
 382                 goto invalid4;
 383
 384         goto done;
 385
 386 invalid4:
 387         EFSYS_PROBE(invalid4);
 388 invalid3:
 389         EFSYS_PROBE(invalid3);
 390 invalid2:
 391         EFSYS_PROBE(invalid2);
 392 invalid1:
 393         EFSYS_PROBE(invalid1);
 394
 395         /*
 396          * Construct a new "null" dcfg, with an empty version vector,
 397          * and an empty VPD chunk trailing. This has the neat side effect
 398          * of testing the exception paths in the write path.
 399          */
 400         EFX_POPULATE_DWORD_1(dcfg->magic,
 401                             EFX_DWORD_0, SIENA_MC_DYNAMIC_CONFIG_MAGIC);
 402         EFX_POPULATE_WORD_1(dcfg->length, EFX_WORD_0, sizeof (*dcfg));
 403         EFX_POPULATE_BYTE_1(dcfg->version, EFX_BYTE_0,
 404                             SIENA_MC_DYNAMIC_CONFIG_VERSION);
 405         EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_offset,
 406                             EFX_DWORD_0, sizeof (*dcfg));
 407         EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_length, EFX_DWORD_0, 0);
 408         EFX_POPULATE_DWORD_1(dcfg->num_fw_version_items, EFX_DWORD_0, 0);
 409
 410 done:
 411         *dcfgp = dcfg;
 412         *sizep = size;
 413
 414         return (0);
 415
 416 fail4:
 417         EFSYS_PROBE(fail4);
 418 fail3:
 419         EFSYS_PROBE(fail3);
 420
 421         EFSYS_KMEM_FREE(enp->en_esip, size, dcfg);
 422
 423 fail2:
 424         EFSYS_PROBE(fail2);
 425 fail1:
 426         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 427
 428         return (rc);
 429 }
 430
 431         __checkReturn           efx_rc_t
 432 siena_nvram_get_subtype(
 433         __in                    efx_nic_t *enp,
 434         __in                    uint32_t partn,
 435         __out                   uint32_t *subtypep)
 436 {
 437         efx_mcdi_req_t req;
 438         uint8_t payload[MAX(MC_CMD_GET_BOARD_CFG_IN_LEN,
 439                             MC_CMD_GET_BOARD_CFG_OUT_LENMAX)];
 440         efx_word_t *fw_list;
 441         efx_rc_t rc;
 442
 443         (void) memset(payload, 0, sizeof (payload));
 444         req.emr_cmd = MC_CMD_GET_BOARD_CFG;
 445         req.emr_in_buf = payload;
 446         req.emr_in_length = MC_CMD_GET_BOARD_CFG_IN_LEN;
 447         req.emr_out_buf = payload;
 448         req.emr_out_length = MC_CMD_GET_BOARD_CFG_OUT_LENMAX;
 449
 450         efx_mcdi_execute(enp, &req);
 451
 452         if (req.emr_rc != 0) {
 453                 rc = req.emr_rc;
 454                 goto fail1;
 455         }
 456
 457         if (req.emr_out_length_used < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
 458                 rc = EMSGSIZE;
 459                 goto fail2;
 460         }
 461
 462         if (req.emr_out_length_used <
 463             MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_OFST +
 464             (partn + 1) * sizeof (efx_word_t)) {
 465                 rc = ENOENT;
 466                 goto fail3;
 467         }
 468
 469         fw_list = MCDI_OUT2(req, efx_word_t,
 470                             GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST);
 471         *subtypep = EFX_WORD_FIELD(fw_list[partn], EFX_WORD_0);
 472
 473         return (0);
 474
 475 fail3:
 476         EFSYS_PROBE(fail3);
 477 fail2:
 478         EFSYS_PROBE(fail2);
 479 fail1:
 480         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 481
 482         return (rc);
 483 }
 484
 485         __checkReturn           efx_rc_t
 486 siena_nvram_partn_get_version(
 487         __in                    efx_nic_t *enp,
 488         __in                    uint32_t partn,
 489         __out                   uint32_t *subtypep,
 490         __out_ecount(4)         uint16_t version[4])
 491 {
 492         siena_mc_dynamic_config_hdr_t *dcfg;
 493         siena_parttbl_entry_t *entry;
 494         uint32_t dcfg_partn;
 495         unsigned int i;
 496         efx_rc_t rc;
 497
 498         if ((1 << partn) & ~enp->en_u.siena.enu_partn_mask) {
 499                 rc = ENOTSUP;
 500                 goto fail1;
 501         }
 502
 503         if ((rc = siena_nvram_get_subtype(enp, partn, subtypep)) != 0)
 504                 goto fail2;
 505
 506         /*
 507          * Some partitions are accessible from both ports (for instance BOOTROM)
 508          * Find the highest version reported by all dcfg structures on ports
 509          * that have access to this partition.
 510          */
 511         version[0] = version[1] = version[2] = version[3] = 0;
 512         for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) {
 513                 siena_mc_fw_version_t *verp;
 514                 unsigned int nitems;
 515                 uint16_t temp[4];
 516                 size_t length;
 517
 518                 entry = &siena_parttbl[i];
 519                 if (entry->partn != partn)
 520                         continue;
 521
 522                 dcfg_partn = (entry->port == 1)
 523                         ? MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0
 524                         : MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1;
 525                 /*
 526                  * Ingore missing partitions on port 2, assuming they're due
 527                  * to to running on a single port part.
 528                  */
 529                 if ((1 << dcfg_partn) &  ~enp->en_u.siena.enu_partn_mask) {
 530                         if (entry->port == 2)
 531                                 continue;
 532                 }
 533
 534                 if ((rc = siena_nvram_get_dynamic_cfg(enp, dcfg_partn,
 535                     B_FALSE, &dcfg, &length)) != 0)
 536                         goto fail3;
 537
 538                 nitems = EFX_DWORD_FIELD(dcfg->num_fw_version_items,
 539                             EFX_DWORD_0);
 540                 if (nitems < entry->partn)
 541                         goto done;
 542
 543                 verp = &dcfg->fw_version[partn];
 544                 temp[0] = EFX_WORD_FIELD(verp->version_w, EFX_WORD_0);
 545                 temp[1] = EFX_WORD_FIELD(verp->version_x, EFX_WORD_0);
 546                 temp[2] = EFX_WORD_FIELD(verp->version_y, EFX_WORD_0);
 547                 temp[3] = EFX_WORD_FIELD(verp->version_z, EFX_WORD_0);
 548                 if (memcmp(version, temp, sizeof (temp)) < 0)
 549                         memcpy(version, temp, sizeof (temp));
 550
 551 done:
 552                 EFSYS_KMEM_FREE(enp->en_esip, length, dcfg);
 553         }
 554
 555         return (0);
 556
 557 fail3:
 558         EFSYS_PROBE(fail3);
 559 fail2:
 560         EFSYS_PROBE(fail2);
 561 fail1:
 562         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 563
 564         return (rc);
 565 }
 566
 567         __checkReturn           efx_rc_t
 568 siena_nvram_partn_rw_start(
 569         __in                    efx_nic_t *enp,
 570         __in                    uint32_t partn,
 571         __out                   size_t *chunk_sizep)
 572 {
 573         efx_rc_t rc;
 574
 575         if ((rc = siena_nvram_partn_lock(enp, partn)) != 0)
 576                 goto fail1;
 577
 578         if (chunk_sizep != NULL)
 579                 *chunk_sizep = SIENA_NVRAM_CHUNK;
 580
 581         return (0);
 582
 583 fail1:
 584         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 585
 586         return (rc);
 587 }
 588
 589         __checkReturn           efx_rc_t
 590 siena_nvram_partn_rw_finish(
 591         __in                    efx_nic_t *enp,
 592         __in                    uint32_t partn,
 593         __out_opt               uint32_t *verify_resultp)
 594 {
 595         efx_rc_t rc;
 596
 597         if ((rc = siena_nvram_partn_unlock(enp, partn, verify_resultp)) != 0)
 598                 goto fail1;
 599
 600         return (0);
 601
 602 fail1:
 603         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 604
 605         return (rc);
 606 }
 607
 608         __checkReturn           efx_rc_t
 609 siena_nvram_partn_set_version(
 610         __in                    efx_nic_t *enp,
 611         __in                    uint32_t partn,
 612         __in_ecount(4)          uint16_t version[4])
 613 {
 614         efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
 615         siena_mc_dynamic_config_hdr_t *dcfg = NULL;
 616         siena_mc_fw_version_t *fwverp;
 617         uint32_t dcfg_partn;
 618         size_t dcfg_size;
 619         unsigned int hdr_length;
 620         unsigned int vpd_length;
 621         unsigned int vpd_offset;
 622         unsigned int nitems;
 623         unsigned int required_hdr_length;
 624         unsigned int pos;
 625         uint8_t cksum;
 626         uint32_t subtype;
 627         size_t length;
 628         efx_rc_t rc;
 629
 630         dcfg_partn = (emip->emi_port == 1)
 631                 ? MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0
 632                 : MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1;
 633
 634         if ((rc = siena_nvram_partn_size(enp, dcfg_partn, &dcfg_size)) != 0)
 635                 goto fail1;
 636
 637         if ((rc = siena_nvram_partn_lock(enp, dcfg_partn)) != 0)
 638                 goto fail2;
 639
 640         if ((rc = siena_nvram_get_dynamic_cfg(enp, dcfg_partn,
 641             B_TRUE, &dcfg, &length)) != 0)
 642                 goto fail3;
 643
 644         hdr_length = EFX_WORD_FIELD(dcfg->length, EFX_WORD_0);
 645         nitems = EFX_DWORD_FIELD(dcfg->num_fw_version_items, EFX_DWORD_0);
 646         vpd_length = EFX_DWORD_FIELD(dcfg->dynamic_vpd_length, EFX_DWORD_0);
 647         vpd_offset = EFX_DWORD_FIELD(dcfg->dynamic_vpd_offset, EFX_DWORD_0);
 648
 649         /*
 650          * NOTE: This function will blatt any fields trailing the version
 651          * vector, or the VPD chunk.
 652          */
 653         required_hdr_length = SIENA_DYNAMIC_CFG_SIZE(partn + 1);
 654         if (required_hdr_length + vpd_length > length) {
 655                 rc = ENOSPC;
 656                 goto fail4;
 657         }
 658
 659         if (vpd_offset < required_hdr_length) {
 660                 (void) memmove((caddr_t)dcfg + required_hdr_length,
 661                         (caddr_t)dcfg + vpd_offset, vpd_length);
 662                 vpd_offset = required_hdr_length;
 663                 EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_offset,
 664                                     EFX_DWORD_0, vpd_offset);
 665         }
 666
 667         if (hdr_length < required_hdr_length) {
 668                 (void) memset((caddr_t)dcfg + hdr_length, 0,
 669                         required_hdr_length - hdr_length);
 670                 hdr_length = required_hdr_length;
 671                 EFX_POPULATE_WORD_1(dcfg->length,
 672                                     EFX_WORD_0, hdr_length);
 673         }
 674
 675         /* Get the subtype to insert into the fw_subtype array */
 676         if ((rc = siena_nvram_get_subtype(enp, partn, &subtype)) != 0)
 677                 goto fail5;
 678
 679         /* Fill out the new version */
 680         fwverp = &dcfg->fw_version[partn];
 681         EFX_POPULATE_DWORD_1(fwverp->fw_subtype, EFX_DWORD_0, subtype);
 682         EFX_POPULATE_WORD_1(fwverp->version_w, EFX_WORD_0, version[0]);
 683         EFX_POPULATE_WORD_1(fwverp->version_x, EFX_WORD_0, version[1]);
 684         EFX_POPULATE_WORD_1(fwverp->version_y, EFX_WORD_0, version[2]);
 685         EFX_POPULATE_WORD_1(fwverp->version_z, EFX_WORD_0, version[3]);
 686
 687         /* Update the version count */
 688         if (nitems < partn + 1) {
 689                 nitems = partn + 1;
 690                 EFX_POPULATE_DWORD_1(dcfg->num_fw_version_items,
 691                                     EFX_DWORD_0, nitems);
 692         }
 693
 694         /* Update the checksum */
 695         cksum = 0;
 696         for (pos = 0; pos < hdr_length; pos++)
 697                 cksum += ((uint8_t *)dcfg)[pos];
 698         dcfg->csum.eb_u8[0] -= cksum;
 699
 700         /* Erase and write the new partition */
 701         if ((rc = siena_nvram_partn_erase(enp, dcfg_partn, 0, dcfg_size)) != 0)
 702                 goto fail6;
 703
 704         /* Write out the new structure to nvram */
 705         if ((rc = siena_nvram_partn_write(enp, dcfg_partn, 0,
 706             (caddr_t)dcfg, vpd_offset + vpd_length)) != 0)
 707                 goto fail7;
 708
 709         EFSYS_KMEM_FREE(enp->en_esip, length, dcfg);
 710
 711         siena_nvram_partn_unlock(enp, dcfg_partn, NULL);
 712
 713         return (0);
 714
 715 fail7:
 716         EFSYS_PROBE(fail7);
 717 fail6:
 718         EFSYS_PROBE(fail6);
 719 fail5:
 720         EFSYS_PROBE(fail5);
 721 fail4:
 722         EFSYS_PROBE(fail4);
 723
 724         EFSYS_KMEM_FREE(enp->en_esip, length, dcfg);
 725 fail3:
 726         EFSYS_PROBE(fail3);
 727 fail2:
 728         EFSYS_PROBE(fail2);
 729 fail1:
 730         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 731
 732         return (rc);
 733 }
 734
 735 #endif  /* EFSYS_OPT_NVRAM */
 736
 737 #endif  /* EFSYS_OPT_SIENA */