drivers/net/sfc/base/siena_nvram.c

   1 /*
   2  * Copyright (c) 2009-2016 Solarflare Communications Inc.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are met:
   7  *
   8  * 1. Redistributions of source code must retain the above copyright notice,
   9  *    this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright notice,
  11  *    this list of conditions and the following disclaimer in the documentation
  12  *    and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  15  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  16  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  17  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
  18  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  19  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  20  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
  21  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  22  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
  23  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
  24  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25  *
  26  * The views and conclusions contained in the software and documentation are
  27  * those of the authors and should not be interpreted as representing official
  28  * policies, either expressed or implied, of the FreeBSD Project.
  29  */
  30
  31 #include "efx.h"
  32 #include "efx_impl.h"
  33
  34 #if EFSYS_OPT_SIENA
  35
  36 #if EFSYS_OPT_VPD || EFSYS_OPT_NVRAM
  37
  38         __checkReturn           efx_rc_t
  39 siena_nvram_partn_size(
  40         __in                    efx_nic_t *enp,
  41         __in                    uint32_t partn,
  42         __out                   size_t *sizep)
  43 {
  44         efx_rc_t rc;
  45
  46         if ((1 << partn) & ~enp->en_u.siena.enu_partn_mask) {
  47                 rc = ENOTSUP;
  48                 goto fail1;
  49         }
  50
  51         if ((rc = efx_mcdi_nvram_info(enp, partn, sizep,
  52             NULL, NULL, NULL)) != 0) {
  53                 goto fail2;
  54         }
  55
  56         return (0);
  57
  58 fail2:
  59         EFSYS_PROBE(fail2);
  60 fail1:
  61         EFSYS_PROBE1(fail1, efx_rc_t, rc);
  62
  63         return (rc);
  64 }
  65
  66         __checkReturn           efx_rc_t
  67 siena_nvram_partn_lock(
  68         __in                    efx_nic_t *enp,
  69         __in                    uint32_t partn)
  70 {
  71         efx_rc_t rc;
  72
  73         if ((rc = efx_mcdi_nvram_update_start(enp, partn)) != 0) {
  74                 goto fail1;
  75         }
  76
  77         return (0);
  78
  79 fail1:
  80         EFSYS_PROBE1(fail1, efx_rc_t, rc);
  81
  82         return (rc);
  83 }
  84
  85         __checkReturn           efx_rc_t
  86 siena_nvram_partn_read(
  87         __in                    efx_nic_t *enp,
  88         __in                    uint32_t partn,
  89         __in                    unsigned int offset,
  90         __out_bcount(size)      caddr_t data,
  91         __in                    size_t size)
  92 {
  93         size_t chunk;
  94         efx_rc_t rc;
  95
  96         while (size > 0) {
  97                 chunk = MIN(size, SIENA_NVRAM_CHUNK);
  98
  99                 if ((rc = efx_mcdi_nvram_read(enp, partn, offset, data, chunk,
 100                             MC_CMD_NVRAM_READ_IN_V2_DEFAULT)) != 0) {
 101                         goto fail1;
 102                 }
 103
 104                 size -= chunk;
 105                 data += chunk;
 106                 offset += chunk;
 107         }
 108
 109         return (0);
 110
 111 fail1:
 112         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 113
 114         return (rc);
 115 }
 116
 117         __checkReturn           efx_rc_t
 118 siena_nvram_partn_erase(
 119         __in                    efx_nic_t *enp,
 120         __in                    uint32_t partn,
 121         __in                    unsigned int offset,
 122         __in                    size_t size)
 123 {
 124         efx_rc_t rc;
 125
 126         if ((rc = efx_mcdi_nvram_erase(enp, partn, offset, size)) != 0) {
 127                 goto fail1;
 128         }
 129
 130         return (0);
 131
 132 fail1:
 133         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 134
 135         return (rc);
 136 }
 137
 138         __checkReturn           efx_rc_t
 139 siena_nvram_partn_write(
 140         __in                    efx_nic_t *enp,
 141         __in                    uint32_t partn,
 142         __in                    unsigned int offset,
 143         __out_bcount(size)      caddr_t data,
 144         __in                    size_t size)
 145 {
 146         size_t chunk;
 147         efx_rc_t rc;
 148
 149         while (size > 0) {
 150                 chunk = MIN(size, SIENA_NVRAM_CHUNK);
 151
 152                 if ((rc = efx_mcdi_nvram_write(enp, partn, offset,
 153                             data, chunk)) != 0) {
 154                         goto fail1;
 155                 }
 156
 157                 size -= chunk;
 158                 data += chunk;
 159                 offset += chunk;
 160         }
 161
 162         return (0);
 163
 164 fail1:
 165         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 166
 167         return (rc);
 168 }
 169
 170         __checkReturn           efx_rc_t
 171 siena_nvram_partn_unlock(
 172         __in                    efx_nic_t *enp,
 173         __in                    uint32_t partn,
 174         __out_opt               uint32_t *verify_resultp)
 175 {
 176         boolean_t reboot;
 177         efx_rc_t rc;
 178
 179         /*
 180          * Reboot into the new image only for PHYs. The driver has to
 181          * explicitly cope with an MC reboot after a firmware update.
 182          */
 183         reboot = (partn == MC_CMD_NVRAM_TYPE_PHY_PORT0 ||
 184                     partn == MC_CMD_NVRAM_TYPE_PHY_PORT1 ||
 185                     partn == MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO);
 186
 187         rc = efx_mcdi_nvram_update_finish(enp, partn, reboot, verify_resultp);
 188         if (rc != 0)
 189                 goto fail1;
 190
 191         return (0);
 192
 193 fail1:
 194         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 195
 196         return (rc);
 197 }
 198
 199 #endif  /* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */
 200
 201 #if EFSYS_OPT_NVRAM
 202
 203 typedef struct siena_parttbl_entry_s {
 204         unsigned int            partn;
 205         unsigned int            port;
 206         efx_nvram_type_t        nvtype;
 207 } siena_parttbl_entry_t;
 208
 209 static siena_parttbl_entry_t siena_parttbl[] = {
 210         {MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO,   1, EFX_NVRAM_NULLPHY},
 211         {MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO,   2, EFX_NVRAM_NULLPHY},
 212         {MC_CMD_NVRAM_TYPE_MC_FW,               1, EFX_NVRAM_MC_FIRMWARE},
 213         {MC_CMD_NVRAM_TYPE_MC_FW,               2, EFX_NVRAM_MC_FIRMWARE},
 214         {MC_CMD_NVRAM_TYPE_MC_FW_BACKUP,        1, EFX_NVRAM_MC_GOLDEN},
 215         {MC_CMD_NVRAM_TYPE_MC_FW_BACKUP,        2, EFX_NVRAM_MC_GOLDEN},
 216         {MC_CMD_NVRAM_TYPE_EXP_ROM,             1, EFX_NVRAM_BOOTROM},
 217         {MC_CMD_NVRAM_TYPE_EXP_ROM,             2, EFX_NVRAM_BOOTROM},
 218         {MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT0,   1, EFX_NVRAM_BOOTROM_CFG},
 219         {MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT1,   2, EFX_NVRAM_BOOTROM_CFG},
 220         {MC_CMD_NVRAM_TYPE_PHY_PORT0,           1, EFX_NVRAM_PHY},
 221         {MC_CMD_NVRAM_TYPE_PHY_PORT1,           2, EFX_NVRAM_PHY},
 222         {MC_CMD_NVRAM_TYPE_FPGA,                1, EFX_NVRAM_FPGA},
 223         {MC_CMD_NVRAM_TYPE_FPGA,                2, EFX_NVRAM_FPGA},
 224         {MC_CMD_NVRAM_TYPE_FPGA_BACKUP,         1, EFX_NVRAM_FPGA_BACKUP},
 225         {MC_CMD_NVRAM_TYPE_FPGA_BACKUP,         2, EFX_NVRAM_FPGA_BACKUP},
 226         {MC_CMD_NVRAM_TYPE_FC_FW,               1, EFX_NVRAM_FCFW},
 227         {MC_CMD_NVRAM_TYPE_FC_FW,               2, EFX_NVRAM_FCFW},
 228         {MC_CMD_NVRAM_TYPE_CPLD,                1, EFX_NVRAM_CPLD},
 229         {MC_CMD_NVRAM_TYPE_CPLD,                2, EFX_NVRAM_CPLD},
 230         {MC_CMD_NVRAM_TYPE_LICENSE,             1, EFX_NVRAM_LICENSE},
 231         {MC_CMD_NVRAM_TYPE_LICENSE,             2, EFX_NVRAM_LICENSE}
 232 };
 233
 234         __checkReturn           efx_rc_t
 235 siena_nvram_type_to_partn(
 236         __in                    efx_nic_t *enp,
 237         __in                    efx_nvram_type_t type,
 238         __out                   uint32_t *partnp)
 239 {
 240         efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
 241         unsigned int i;
 242
 243         EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES);
 244         EFSYS_ASSERT(partnp != NULL);
 245
 246         for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) {
 247                 siena_parttbl_entry_t *entry = &siena_parttbl[i];
 248
 249                 if (entry->port == emip->emi_port && entry->nvtype == type) {
 250                         *partnp = entry->partn;
 251                         return (0);
 252                 }
 253         }
 254
 255         return (ENOTSUP);
 256 }
 257
 258
 259 #if EFSYS_OPT_DIAG
 260
 261         __checkReturn           efx_rc_t
 262 siena_nvram_test(
 263         __in                    efx_nic_t *enp)
 264 {
 265         efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
 266         siena_parttbl_entry_t *entry;
 267         unsigned int i;
 268         efx_rc_t rc;
 269
 270         /*
 271          * Iterate over the list of supported partition types
 272          * applicable to *this* port
 273          */
 274         for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) {
 275                 entry = &siena_parttbl[i];
 276
 277                 if (entry->port != emip->emi_port ||
 278                     !(enp->en_u.siena.enu_partn_mask & (1 << entry->partn)))
 279                         continue;
 280
 281                 if ((rc = efx_mcdi_nvram_test(enp, entry->partn)) != 0) {
 282                         goto fail1;
 283                 }
 284         }
 285
 286         return (0);
 287
 288 fail1:
 289         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 290
 291         return (rc);
 292 }
 293
 294 #endif  /* EFSYS_OPT_DIAG */
 295
 296
 297 #define SIENA_DYNAMIC_CFG_SIZE(_nitems)                                 \
 298         (sizeof (siena_mc_dynamic_config_hdr_t) + ((_nitems) *          \
 299         sizeof (((siena_mc_dynamic_config_hdr_t *)NULL)->fw_version[0])))
 300
 301         __checkReturn           efx_rc_t
 302 siena_nvram_get_dynamic_cfg(
 303         __in                    efx_nic_t *enp,
 304         __in                    uint32_t partn,
 305         __in                    boolean_t vpd,
 306         __out                   siena_mc_dynamic_config_hdr_t **dcfgp,
 307         __out                   size_t *sizep)
 308 {
 309         siena_mc_dynamic_config_hdr_t *dcfg = NULL;
 310         size_t size;
 311         uint8_t cksum;
 312         unsigned int vpd_offset;
 313         unsigned int vpd_length;
 314         unsigned int hdr_length;
 315         unsigned int nversions;
 316         unsigned int pos;
 317         unsigned int region;
 318         efx_rc_t rc;
 319
 320         EFSYS_ASSERT(partn == MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0 ||
 321                     partn == MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1);
 322
 323         /*
 324          * Allocate sufficient memory for the entire dynamiccfg area, even
 325          * if we're not actually going to read in the VPD.
 326          */
 327         if ((rc = siena_nvram_partn_size(enp, partn, &size)) != 0)
 328                 goto fail1;
 329
 330         EFSYS_KMEM_ALLOC(enp->en_esip, size, dcfg);
 331         if (dcfg == NULL) {
 332                 rc = ENOMEM;
 333                 goto fail2;
 334         }
 335
 336         if ((rc = siena_nvram_partn_read(enp, partn, 0,
 337             (caddr_t)dcfg, SIENA_NVRAM_CHUNK)) != 0)
 338                 goto fail3;
 339
 340         /* Verify the magic */
 341         if (EFX_DWORD_FIELD(dcfg->magic, EFX_DWORD_0)
 342             != SIENA_MC_DYNAMIC_CONFIG_MAGIC)
 343                 goto invalid1;
 344
 345         /* All future versions of the structure must be backwards compatible */
 346         EFX_STATIC_ASSERT(SIENA_MC_DYNAMIC_CONFIG_VERSION == 0);
 347
 348         hdr_length = EFX_WORD_FIELD(dcfg->length, EFX_WORD_0);
 349         nversions = EFX_DWORD_FIELD(dcfg->num_fw_version_items, EFX_DWORD_0);
 350         vpd_offset = EFX_DWORD_FIELD(dcfg->dynamic_vpd_offset, EFX_DWORD_0);
 351         vpd_length = EFX_DWORD_FIELD(dcfg->dynamic_vpd_length, EFX_DWORD_0);
 352
 353         /* Verify the hdr doesn't overflow the partn size */
 354         if (hdr_length > size || vpd_offset > size || vpd_length > size ||
 355             vpd_length + vpd_offset > size)
 356                 goto invalid2;
 357
 358         /* Verify the header has room for all it's versions */
 359         if (hdr_length < SIENA_DYNAMIC_CFG_SIZE(0) ||
 360             hdr_length < SIENA_DYNAMIC_CFG_SIZE(nversions))
 361                 goto invalid3;
 362
 363         /*
 364          * Read the remaining portion of the dcfg, either including
 365          * the whole of VPD (there is no vpd length in this structure,
 366          * so we have to parse each tag), or just the dcfg header itself
 367          */
 368         region = vpd ? vpd_offset + vpd_length : hdr_length;
 369         if (region > SIENA_NVRAM_CHUNK) {
 370                 if ((rc = siena_nvram_partn_read(enp, partn, SIENA_NVRAM_CHUNK,
 371                     (caddr_t)dcfg + SIENA_NVRAM_CHUNK,
 372                     region - SIENA_NVRAM_CHUNK)) != 0)
 373                         goto fail4;
 374         }
 375
 376         /* Verify checksum */
 377         cksum = 0;
 378         for (pos = 0; pos < hdr_length; pos++)
 379                 cksum += ((uint8_t *)dcfg)[pos];
 380         if (cksum != 0)
 381                 goto invalid4;
 382
 383         goto done;
 384
 385 invalid4:
 386         EFSYS_PROBE(invalid4);
 387 invalid3:
 388         EFSYS_PROBE(invalid3);
 389 invalid2:
 390         EFSYS_PROBE(invalid2);
 391 invalid1:
 392         EFSYS_PROBE(invalid1);
 393
 394         /*
 395          * Construct a new "null" dcfg, with an empty version vector,
 396          * and an empty VPD chunk trailing. This has the neat side effect
 397          * of testing the exception paths in the write path.
 398          */
 399         EFX_POPULATE_DWORD_1(dcfg->magic,
 400                             EFX_DWORD_0, SIENA_MC_DYNAMIC_CONFIG_MAGIC);
 401         EFX_POPULATE_WORD_1(dcfg->length, EFX_WORD_0, sizeof (*dcfg));
 402         EFX_POPULATE_BYTE_1(dcfg->version, EFX_BYTE_0,
 403                             SIENA_MC_DYNAMIC_CONFIG_VERSION);
 404         EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_offset,
 405                             EFX_DWORD_0, sizeof (*dcfg));
 406         EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_length, EFX_DWORD_0, 0);
 407         EFX_POPULATE_DWORD_1(dcfg->num_fw_version_items, EFX_DWORD_0, 0);
 408
 409 done:
 410         *dcfgp = dcfg;
 411         *sizep = size;
 412
 413         return (0);
 414
 415 fail4:
 416         EFSYS_PROBE(fail4);
 417 fail3:
 418         EFSYS_PROBE(fail3);
 419
 420         EFSYS_KMEM_FREE(enp->en_esip, size, dcfg);
 421
 422 fail2:
 423         EFSYS_PROBE(fail2);
 424 fail1:
 425         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 426
 427         return (rc);
 428 }
 429
 430         __checkReturn           efx_rc_t
 431 siena_nvram_get_subtype(
 432         __in                    efx_nic_t *enp,
 433         __in                    uint32_t partn,
 434         __out                   uint32_t *subtypep)
 435 {
 436         efx_mcdi_req_t req;
 437         uint8_t payload[MAX(MC_CMD_GET_BOARD_CFG_IN_LEN,
 438                             MC_CMD_GET_BOARD_CFG_OUT_LENMAX)];
 439         efx_word_t *fw_list;
 440         efx_rc_t rc;
 441
 442         (void) memset(payload, 0, sizeof (payload));
 443         req.emr_cmd = MC_CMD_GET_BOARD_CFG;
 444         req.emr_in_buf = payload;
 445         req.emr_in_length = MC_CMD_GET_BOARD_CFG_IN_LEN;
 446         req.emr_out_buf = payload;
 447         req.emr_out_length = MC_CMD_GET_BOARD_CFG_OUT_LENMAX;
 448
 449         efx_mcdi_execute(enp, &req);
 450
 451         if (req.emr_rc != 0) {
 452                 rc = req.emr_rc;
 453                 goto fail1;
 454         }
 455
 456         if (req.emr_out_length_used < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
 457                 rc = EMSGSIZE;
 458                 goto fail2;
 459         }
 460
 461         if (req.emr_out_length_used <
 462             MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_OFST +
 463             (partn + 1) * sizeof (efx_word_t)) {
 464                 rc = ENOENT;
 465                 goto fail3;
 466         }
 467
 468         fw_list = MCDI_OUT2(req, efx_word_t,
 469                             GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST);
 470         *subtypep = EFX_WORD_FIELD(fw_list[partn], EFX_WORD_0);
 471
 472         return (0);
 473
 474 fail3:
 475         EFSYS_PROBE(fail3);
 476 fail2:
 477         EFSYS_PROBE(fail2);
 478 fail1:
 479         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 480
 481         return (rc);
 482 }
 483
 484         __checkReturn           efx_rc_t
 485 siena_nvram_partn_get_version(
 486         __in                    efx_nic_t *enp,
 487         __in                    uint32_t partn,
 488         __out                   uint32_t *subtypep,
 489         __out_ecount(4)         uint16_t version[4])
 490 {
 491         siena_mc_dynamic_config_hdr_t *dcfg;
 492         siena_parttbl_entry_t *entry;
 493         uint32_t dcfg_partn;
 494         unsigned int i;
 495         efx_rc_t rc;
 496
 497         if ((1 << partn) & ~enp->en_u.siena.enu_partn_mask) {
 498                 rc = ENOTSUP;
 499                 goto fail1;
 500         }
 501
 502         if ((rc = siena_nvram_get_subtype(enp, partn, subtypep)) != 0)
 503                 goto fail2;
 504
 505         /*
 506          * Some partitions are accessible from both ports (for instance BOOTROM)
 507          * Find the highest version reported by all dcfg structures on ports
 508          * that have access to this partition.
 509          */
 510         version[0] = version[1] = version[2] = version[3] = 0;
 511         for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) {
 512                 siena_mc_fw_version_t *verp;
 513                 unsigned int nitems;
 514                 uint16_t temp[4];
 515                 size_t length;
 516
 517                 entry = &siena_parttbl[i];
 518                 if (entry->partn != partn)
 519                         continue;
 520
 521                 dcfg_partn = (entry->port == 1)
 522                         ? MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0
 523                         : MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1;
 524                 /*
 525                  * Ingore missing partitions on port 2, assuming they're due
 526                  * to to running on a single port part.
 527                  */
 528                 if ((1 << dcfg_partn) &  ~enp->en_u.siena.enu_partn_mask) {
 529                         if (entry->port == 2)
 530                                 continue;
 531                 }
 532
 533                 if ((rc = siena_nvram_get_dynamic_cfg(enp, dcfg_partn,
 534                     B_FALSE, &dcfg, &length)) != 0)
 535                         goto fail3;
 536
 537                 nitems = EFX_DWORD_FIELD(dcfg->num_fw_version_items,
 538                             EFX_DWORD_0);
 539                 if (nitems < entry->partn)
 540                         goto done;
 541
 542                 verp = &dcfg->fw_version[partn];
 543                 temp[0] = EFX_WORD_FIELD(verp->version_w, EFX_WORD_0);
 544                 temp[1] = EFX_WORD_FIELD(verp->version_x, EFX_WORD_0);
 545                 temp[2] = EFX_WORD_FIELD(verp->version_y, EFX_WORD_0);
 546                 temp[3] = EFX_WORD_FIELD(verp->version_z, EFX_WORD_0);
 547                 if (memcmp(version, temp, sizeof (temp)) < 0)
 548                         memcpy(version, temp, sizeof (temp));
 549
 550 done:
 551                 EFSYS_KMEM_FREE(enp->en_esip, length, dcfg);
 552         }
 553
 554         return (0);
 555
 556 fail3:
 557         EFSYS_PROBE(fail3);
 558 fail2:
 559         EFSYS_PROBE(fail2);
 560 fail1:
 561         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 562
 563         return (rc);
 564 }
 565
 566         __checkReturn           efx_rc_t
 567 siena_nvram_partn_rw_start(
 568         __in                    efx_nic_t *enp,
 569         __in                    uint32_t partn,
 570         __out                   size_t *chunk_sizep)
 571 {
 572         efx_rc_t rc;
 573
 574         if ((rc = siena_nvram_partn_lock(enp, partn)) != 0)
 575                 goto fail1;
 576
 577         if (chunk_sizep != NULL)
 578                 *chunk_sizep = SIENA_NVRAM_CHUNK;
 579
 580         return (0);
 581
 582 fail1:
 583         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 584
 585         return (rc);
 586 }
 587
 588         __checkReturn           efx_rc_t
 589 siena_nvram_partn_rw_finish(
 590         __in                    efx_nic_t *enp,
 591         __in                    uint32_t partn,
 592         __out_opt               uint32_t *verify_resultp)
 593 {
 594         efx_rc_t rc;
 595
 596         if ((rc = siena_nvram_partn_unlock(enp, partn, verify_resultp)) != 0)
 597                 goto fail1;
 598
 599         return (0);
 600
 601 fail1:
 602         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 603
 604         return (rc);
 605 }
 606
 607         __checkReturn           efx_rc_t
 608 siena_nvram_partn_set_version(
 609         __in                    efx_nic_t *enp,
 610         __in                    uint32_t partn,
 611         __in_ecount(4)          uint16_t version[4])
 612 {
 613         efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
 614         siena_mc_dynamic_config_hdr_t *dcfg = NULL;
 615         siena_mc_fw_version_t *fwverp;
 616         uint32_t dcfg_partn;
 617         size_t dcfg_size;
 618         unsigned int hdr_length;
 619         unsigned int vpd_length;
 620         unsigned int vpd_offset;
 621         unsigned int nitems;
 622         unsigned int required_hdr_length;
 623         unsigned int pos;
 624         uint8_t cksum;
 625         uint32_t subtype;
 626         size_t length;
 627         efx_rc_t rc;
 628
 629         dcfg_partn = (emip->emi_port == 1)
 630                 ? MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0
 631                 : MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1;
 632
 633         if ((rc = siena_nvram_partn_size(enp, dcfg_partn, &dcfg_size)) != 0)
 634                 goto fail1;
 635
 636         if ((rc = siena_nvram_partn_lock(enp, dcfg_partn)) != 0)
 637                 goto fail2;
 638
 639         if ((rc = siena_nvram_get_dynamic_cfg(enp, dcfg_partn,
 640             B_TRUE, &dcfg, &length)) != 0)
 641                 goto fail3;
 642
 643         hdr_length = EFX_WORD_FIELD(dcfg->length, EFX_WORD_0);
 644         nitems = EFX_DWORD_FIELD(dcfg->num_fw_version_items, EFX_DWORD_0);
 645         vpd_length = EFX_DWORD_FIELD(dcfg->dynamic_vpd_length, EFX_DWORD_0);
 646         vpd_offset = EFX_DWORD_FIELD(dcfg->dynamic_vpd_offset, EFX_DWORD_0);
 647
 648         /*
 649          * NOTE: This function will blatt any fields trailing the version
 650          * vector, or the VPD chunk.
 651          */
 652         required_hdr_length = SIENA_DYNAMIC_CFG_SIZE(partn + 1);
 653         if (required_hdr_length + vpd_length > length) {
 654                 rc = ENOSPC;
 655                 goto fail4;
 656         }
 657
 658         if (vpd_offset < required_hdr_length) {
 659                 (void) memmove((caddr_t)dcfg + required_hdr_length,
 660                         (caddr_t)dcfg + vpd_offset, vpd_length);
 661                 vpd_offset = required_hdr_length;
 662                 EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_offset,
 663                                     EFX_DWORD_0, vpd_offset);
 664         }
 665
 666         if (hdr_length < required_hdr_length) {
 667                 (void) memset((caddr_t)dcfg + hdr_length, 0,
 668                         required_hdr_length - hdr_length);
 669                 hdr_length = required_hdr_length;
 670                 EFX_POPULATE_WORD_1(dcfg->length,
 671                                     EFX_WORD_0, hdr_length);
 672         }
 673
 674         /* Get the subtype to insert into the fw_subtype array */
 675         if ((rc = siena_nvram_get_subtype(enp, partn, &subtype)) != 0)
 676                 goto fail5;
 677
 678         /* Fill out the new version */
 679         fwverp = &dcfg->fw_version[partn];
 680         EFX_POPULATE_DWORD_1(fwverp->fw_subtype, EFX_DWORD_0, subtype);
 681         EFX_POPULATE_WORD_1(fwverp->version_w, EFX_WORD_0, version[0]);
 682         EFX_POPULATE_WORD_1(fwverp->version_x, EFX_WORD_0, version[1]);
 683         EFX_POPULATE_WORD_1(fwverp->version_y, EFX_WORD_0, version[2]);
 684         EFX_POPULATE_WORD_1(fwverp->version_z, EFX_WORD_0, version[3]);
 685
 686         /* Update the version count */
 687         if (nitems < partn + 1) {
 688                 nitems = partn + 1;
 689                 EFX_POPULATE_DWORD_1(dcfg->num_fw_version_items,
 690                                     EFX_DWORD_0, nitems);
 691         }
 692
 693         /* Update the checksum */
 694         cksum = 0;
 695         for (pos = 0; pos < hdr_length; pos++)
 696                 cksum += ((uint8_t *)dcfg)[pos];
 697         dcfg->csum.eb_u8[0] -= cksum;
 698
 699         /* Erase and write the new partition */
 700         if ((rc = siena_nvram_partn_erase(enp, dcfg_partn, 0, dcfg_size)) != 0)
 701                 goto fail6;
 702
 703         /* Write out the new structure to nvram */
 704         if ((rc = siena_nvram_partn_write(enp, dcfg_partn, 0,
 705             (caddr_t)dcfg, vpd_offset + vpd_length)) != 0)
 706                 goto fail7;
 707
 708         EFSYS_KMEM_FREE(enp->en_esip, length, dcfg);
 709
 710         siena_nvram_partn_unlock(enp, dcfg_partn, NULL);
 711
 712         return (0);
 713
 714 fail7:
 715         EFSYS_PROBE(fail7);
 716 fail6:
 717         EFSYS_PROBE(fail6);
 718 fail5:
 719         EFSYS_PROBE(fail5);
 720 fail4:
 721         EFSYS_PROBE(fail4);
 722
 723         EFSYS_KMEM_FREE(enp->en_esip, length, dcfg);
 724 fail3:
 725         EFSYS_PROBE(fail3);
 726 fail2:
 727         EFSYS_PROBE(fail2);
 728 fail1:
 729         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 730
 731         return (rc);
 732 }
 733
 734 #endif  /* EFSYS_OPT_NVRAM */
 735
 736 #endif  /* EFSYS_OPT_SIENA */