drivers/net/sfc/efsys.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  * Copyright (c) 2016-2018 Solarflare Communications Inc.
   4  * All rights reserved.
   5  *
   6  * This software was jointly developed between OKTET Labs (under contract
   7  * for Solarflare) and Solarflare Communications, Inc.
   8  */
   9
  10 #ifndef _SFC_COMMON_EFSYS_H
  11 #define _SFC_COMMON_EFSYS_H
  12
  13 #include <stdbool.h>
  14
  15 #include <rte_spinlock.h>
  16 #include <rte_byteorder.h>
  17 #include <rte_debug.h>
  18 #include <rte_memzone.h>
  19 #include <rte_memory.h>
  20 #include <rte_memcpy.h>
  21 #include <rte_cycles.h>
  22 #include <rte_prefetch.h>
  23 #include <rte_common.h>
  24 #include <rte_malloc.h>
  25 #include <rte_log.h>
  26 #include <rte_io.h>
  27
  28 #include "sfc_debug.h"
  29 #include "sfc_log.h"
  30
  31 #ifdef __cplusplus
  32 extern "C" {
  33 #endif
  34
  35 #define EFSYS_HAS_UINT64 1
  36 #define EFSYS_USE_UINT64 1
  37 #define EFSYS_HAS_SSE2_M128 1
  38
  39 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
  40 #define EFSYS_IS_BIG_ENDIAN 1
  41 #define EFSYS_IS_LITTLE_ENDIAN 0
  42 #elif RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
  43 #define EFSYS_IS_BIG_ENDIAN 0
  44 #define EFSYS_IS_LITTLE_ENDIAN 1
  45 #else
  46 #error "Cannot determine system endianness"
  47 #endif
  48 #include "efx_types.h"
  49
  50
  51 typedef bool boolean_t;
  52
  53 #ifndef B_FALSE
  54 #define B_FALSE false
  55 #endif
  56 #ifndef B_TRUE
  57 #define B_TRUE  true
  58 #endif
  59
  60 /*
  61  * RTE_MAX() and RTE_MIN() cannot be used since braced-group within
  62  * expression allowed only inside a function, but MAX() is used as
  63  * a number of elements in array.
  64  */
  65 #ifndef MAX
  66 #define MAX(v1, v2)     ((v1) > (v2) ? (v1) : (v2))
  67 #endif
  68 #ifndef MIN
  69 #define MIN(v1, v2)     ((v1) < (v2) ? (v1) : (v2))
  70 #endif
  71
  72 /* There are macros for alignment in DPDK, but we need to make a proper
  73  * correspondence here, if we want to re-use them at all
  74  */
  75 #ifndef IS_P2ALIGNED
  76 #define IS_P2ALIGNED(v, a)      ((((uintptr_t)(v)) & ((uintptr_t)(a) - 1)) == 0)
  77 #endif
  78
  79 #ifndef ISP2
  80 #define ISP2(x)                 rte_is_power_of_2(x)
  81 #endif
  82
  83 #define ENOTACTIVE      ENOTCONN
  84
  85 static inline void
  86 prefetch_read_many(const volatile void *addr)
  87 {
  88         rte_prefetch0(addr);
  89 }
  90
  91 static inline void
  92 prefetch_read_once(const volatile void *addr)
  93 {
  94         rte_prefetch_non_temporal(addr);
  95 }
  96
  97 /* Code inclusion options */
  98
  99
 100 #define EFSYS_OPT_NAMES 1
 101
 102 /* Disable SFN5xxx/SFN6xxx since it requires specific support in the PMD */
 103 #define EFSYS_OPT_SIENA 0
 104 /* Enable SFN7xxx support */
 105 #define EFSYS_OPT_HUNTINGTON 1
 106 /* Enable SFN8xxx support */
 107 #define EFSYS_OPT_MEDFORD 1
 108 /* Enable SFN2xxx support */
 109 #define EFSYS_OPT_MEDFORD2 1
 110 #ifdef RTE_LIBRTE_SFC_EFX_DEBUG
 111 #define EFSYS_OPT_CHECK_REG 1
 112 #else
 113 #define EFSYS_OPT_CHECK_REG 0
 114 #endif
 115
 116 /* MCDI is required for SFN7xxx and SFN8xx */
 117 #define EFSYS_OPT_MCDI 1
 118 #define EFSYS_OPT_MCDI_LOGGING 1
 119 #define EFSYS_OPT_MCDI_PROXY_AUTH 1
 120
 121 #define EFSYS_OPT_MAC_STATS 1
 122
 123 #define EFSYS_OPT_LOOPBACK 1
 124
 125 #define EFSYS_OPT_MON_MCDI 0
 126 #define EFSYS_OPT_MON_STATS 0
 127
 128 #define EFSYS_OPT_PHY_STATS 0
 129 #define EFSYS_OPT_BIST 0
 130 #define EFSYS_OPT_PHY_LED_CONTROL 0
 131 #define EFSYS_OPT_PHY_FLAGS 0
 132
 133 #define EFSYS_OPT_VPD 0
 134 #define EFSYS_OPT_NVRAM 0
 135 #define EFSYS_OPT_BOOTCFG 0
 136 #define EFSYS_OPT_IMAGE_LAYOUT 0
 137
 138 #define EFSYS_OPT_DIAG 0
 139 #define EFSYS_OPT_RX_SCALE 1
 140 #define EFSYS_OPT_QSTATS 0
 141 /* Filters support is required for SFN7xxx and SFN8xx */
 142 #define EFSYS_OPT_FILTER 1
 143 #define EFSYS_OPT_RX_SCATTER 0
 144
 145 #define EFSYS_OPT_EV_PREFETCH 0
 146
 147 #define EFSYS_OPT_DECODE_INTR_FATAL 0
 148
 149 #define EFSYS_OPT_LICENSING 0
 150
 151 #define EFSYS_OPT_ALLOW_UNCONFIGURED_NIC 0
 152
 153 #define EFSYS_OPT_RX_PACKED_STREAM 0
 154
 155 #define EFSYS_OPT_RX_ES_SUPER_BUFFER 1
 156
 157 #define EFSYS_OPT_TUNNEL 1
 158
 159 #define EFSYS_OPT_FW_SUBVARIANT_AWARE 1
 160
 161 #define EFSYS_OPT_EVB 0
 162
 163 #define EFSYS_OPT_MCDI_PROXY_AUTH_SERVER 0
 164
 165 /* ID */
 166
 167 typedef struct __efsys_identifier_s efsys_identifier_t;
 168
 169
 170 #define EFSYS_PROBE(_name)                                              \
 171         do { } while (0)
 172
 173 #define EFSYS_PROBE1(_name, _type1, _arg1)                              \
 174         do { } while (0)
 175
 176 #define EFSYS_PROBE2(_name, _type1, _arg1, _type2, _arg2)               \
 177         do { } while (0)
 178
 179 #define EFSYS_PROBE3(_name, _type1, _arg1, _type2, _arg2,               \
 180                      _type3, _arg3)                                     \
 181         do { } while (0)
 182
 183 #define EFSYS_PROBE4(_name, _type1, _arg1, _type2, _arg2,               \
 184                      _type3, _arg3, _type4, _arg4)                      \
 185         do { } while (0)
 186
 187 #define EFSYS_PROBE5(_name, _type1, _arg1, _type2, _arg2,               \
 188                      _type3, _arg3, _type4, _arg4, _type5, _arg5)       \
 189         do { } while (0)
 190
 191 #define EFSYS_PROBE6(_name, _type1, _arg1, _type2, _arg2,               \
 192                      _type3, _arg3, _type4, _arg4, _type5, _arg5,       \
 193                      _type6, _arg6)                                     \
 194         do { } while (0)
 195
 196 #define EFSYS_PROBE7(_name, _type1, _arg1, _type2, _arg2,               \
 197                      _type3, _arg3, _type4, _arg4, _type5, _arg5,       \
 198                      _type6, _arg6, _type7, _arg7)                      \
 199         do { } while (0)
 200
 201
 202 /* DMA */
 203
 204 typedef rte_iova_t efsys_dma_addr_t;
 205
 206 typedef struct efsys_mem_s {
 207         const struct rte_memzone        *esm_mz;
 208         /*
 209          * Ideally it should have volatile qualifier to denote that
 210          * the memory may be updated by someone else. However, it adds
 211          * qualifier discard warnings when the pointer or its derivative
 212          * is passed to memset() or rte_mov16().
 213          * So, skip the qualifier here, but make sure that it is added
 214          * below in access macros.
 215          */
 216         void                            *esm_base;
 217         efsys_dma_addr_t                esm_addr;
 218 } efsys_mem_t;
 219
 220
 221 #define EFSYS_MEM_ZERO(_esmp, _size)                                    \
 222         do {                                                            \
 223                 (void)memset((void *)(_esmp)->esm_base, 0, (_size));    \
 224                                                                         \
 225                 _NOTE(CONSTANTCONDITION);                               \
 226         } while (B_FALSE)
 227
 228 #define EFSYS_MEM_READD(_esmp, _offset, _edp)                           \
 229         do {                                                            \
 230                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 231                 volatile uint32_t *_addr;                               \
 232                                                                         \
 233                 _NOTE(CONSTANTCONDITION);                               \
 234                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
 235                                                                         \
 236                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 237                 (_edp)->ed_u32[0] = _addr[0];                           \
 238                                                                         \
 239                 EFSYS_PROBE2(mem_readl, unsigned int, (_offset),        \
 240                                          uint32_t, (_edp)->ed_u32[0]);  \
 241                                                                         \
 242                 _NOTE(CONSTANTCONDITION);                               \
 243         } while (B_FALSE)
 244
 245 #define EFSYS_MEM_READQ(_esmp, _offset, _eqp)                           \
 246         do {                                                            \
 247                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 248                 volatile uint64_t *_addr;                               \
 249                                                                         \
 250                 _NOTE(CONSTANTCONDITION);                               \
 251                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
 252                                                                         \
 253                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 254                 (_eqp)->eq_u64[0] = _addr[0];                           \
 255                                                                         \
 256                 EFSYS_PROBE3(mem_readq, unsigned int, (_offset),        \
 257                                          uint32_t, (_eqp)->eq_u32[1],   \
 258                                          uint32_t, (_eqp)->eq_u32[0]);  \
 259                                                                         \
 260                 _NOTE(CONSTANTCONDITION);                               \
 261         } while (B_FALSE)
 262
 263 #define EFSYS_MEM_READO(_esmp, _offset, _eop)                           \
 264         do {                                                            \
 265                 volatile uint8_t *_base = (_esmp)->esm_base;            \
 266                 volatile __m128i *_addr;                                \
 267                                                                         \
 268                 _NOTE(CONSTANTCONDITION);                               \
 269                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
 270                                                                         \
 271                 _addr = (volatile __m128i *)(_base + (_offset));        \
 272                 (_eop)->eo_u128[0] = _addr[0];                          \
 273                                                                         \
 274                 EFSYS_PROBE5(mem_reado, unsigned int, (_offset),        \
 275                                          uint32_t, (_eop)->eo_u32[3],   \
 276                                          uint32_t, (_eop)->eo_u32[2],   \
 277                                          uint32_t, (_eop)->eo_u32[1],   \
 278                                          uint32_t, (_eop)->eo_u32[0]);  \
 279                                                                         \
 280                 _NOTE(CONSTANTCONDITION);                               \
 281         } while (B_FALSE)
 282
 283
 284 #define EFSYS_MEM_WRITED(_esmp, _offset, _edp)                          \
 285         do {                                                            \
 286                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 287                 volatile uint32_t *_addr;                               \
 288                                                                         \
 289                 _NOTE(CONSTANTCONDITION);                               \
 290                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
 291                                                                         \
 292                 EFSYS_PROBE2(mem_writed, unsigned int, (_offset),       \
 293                                          uint32_t, (_edp)->ed_u32[0]);  \
 294                                                                         \
 295                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 296                 _addr[0] = (_edp)->ed_u32[0];                           \
 297                                                                         \
 298                 _NOTE(CONSTANTCONDITION);                               \
 299         } while (B_FALSE)
 300
 301 #define EFSYS_MEM_WRITEQ(_esmp, _offset, _eqp)                          \
 302         do {                                                            \
 303                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 304                 volatile uint64_t *_addr;                               \
 305                                                                         \
 306                 _NOTE(CONSTANTCONDITION);                               \
 307                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
 308                                                                         \
 309                 EFSYS_PROBE3(mem_writeq, unsigned int, (_offset),       \
 310                                          uint32_t, (_eqp)->eq_u32[1],   \
 311                                          uint32_t, (_eqp)->eq_u32[0]);  \
 312                                                                         \
 313                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 314                 _addr[0] = (_eqp)->eq_u64[0];                           \
 315                                                                         \
 316                 _NOTE(CONSTANTCONDITION);                               \
 317         } while (B_FALSE)
 318
 319 #define EFSYS_MEM_WRITEO(_esmp, _offset, _eop)                          \
 320         do {                                                            \
 321                 volatile uint8_t *_base = (_esmp)->esm_base;            \
 322                 volatile __m128i *_addr;                                \
 323                                                                         \
 324                 _NOTE(CONSTANTCONDITION);                               \
 325                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
 326                                                                         \
 327                                                                         \
 328                 EFSYS_PROBE5(mem_writeo, unsigned int, (_offset),       \
 329                                          uint32_t, (_eop)->eo_u32[3],   \
 330                                          uint32_t, (_eop)->eo_u32[2],   \
 331                                          uint32_t, (_eop)->eo_u32[1],   \
 332                                          uint32_t, (_eop)->eo_u32[0]);  \
 333                                                                         \
 334                 _addr = (volatile __m128i *)(_base + (_offset));        \
 335                 _addr[0] = (_eop)->eo_u128[0];                          \
 336                                                                         \
 337                 _NOTE(CONSTANTCONDITION);                               \
 338         } while (B_FALSE)
 339
 340
 341 #define EFSYS_MEM_SIZE(_esmp)                                           \
 342         ((_esmp)->esm_mz->len)
 343
 344 #define EFSYS_MEM_ADDR(_esmp)                                           \
 345         ((_esmp)->esm_addr)
 346
 347 #define EFSYS_MEM_IS_NULL(_esmp)                                        \
 348         ((_esmp)->esm_base == NULL)
 349
 350 #define EFSYS_MEM_PREFETCH(_esmp, _offset)                              \
 351         do {                                                            \
 352                 volatile uint8_t *_base = (_esmp)->esm_base;            \
 353                                                                         \
 354                 rte_prefetch0(_base + (_offset));                       \
 355         } while (0)
 356
 357
 358 /* BAR */
 359
 360 typedef struct efsys_bar_s {
 361         rte_spinlock_t          esb_lock;
 362         int                     esb_rid;
 363         struct rte_pci_device   *esb_dev;
 364         /*
 365          * Ideally it should have volatile qualifier to denote that
 366          * the memory may be updated by someone else. However, it adds
 367          * qualifier discard warnings when the pointer or its derivative
 368          * is passed to memset() or rte_mov16().
 369          * So, skip the qualifier here, but make sure that it is added
 370          * below in access macros.
 371          */
 372         void                    *esb_base;
 373 } efsys_bar_t;
 374
 375 #define SFC_BAR_LOCK_INIT(_esbp, _ifname)                               \
 376         do {                                                            \
 377                 rte_spinlock_init(&(_esbp)->esb_lock);                  \
 378                 _NOTE(CONSTANTCONDITION);                               \
 379         } while (B_FALSE)
 380 #define SFC_BAR_LOCK_DESTROY(_esbp)     ((void)0)
 381 #define SFC_BAR_LOCK(_esbp)             rte_spinlock_lock(&(_esbp)->esb_lock)
 382 #define SFC_BAR_UNLOCK(_esbp)           rte_spinlock_unlock(&(_esbp)->esb_lock)
 383
 384 #define EFSYS_BAR_READD(_esbp, _offset, _edp, _lock)                    \
 385         do {                                                            \
 386                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 387                 volatile uint32_t *_addr;                               \
 388                                                                         \
 389                 _NOTE(CONSTANTCONDITION);                               \
 390                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
 391                 _NOTE(CONSTANTCONDITION);                               \
 392                 if (_lock)                                              \
 393                         SFC_BAR_LOCK(_esbp);                            \
 394                                                                         \
 395                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 396                 rte_rmb();                                              \
 397                 (_edp)->ed_u32[0] = rte_read32_relaxed(_addr);          \
 398                                                                         \
 399                 EFSYS_PROBE2(bar_readd, unsigned int, (_offset),        \
 400                                          uint32_t, (_edp)->ed_u32[0]);  \
 401                                                                         \
 402                 _NOTE(CONSTANTCONDITION);                               \
 403                 if (_lock)                                              \
 404                         SFC_BAR_UNLOCK(_esbp);                          \
 405                 _NOTE(CONSTANTCONDITION);                               \
 406         } while (B_FALSE)
 407
 408 #define EFSYS_BAR_READQ(_esbp, _offset, _eqp)                           \
 409         do {                                                            \
 410                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 411                 volatile uint64_t *_addr;                               \
 412                                                                         \
 413                 _NOTE(CONSTANTCONDITION);                               \
 414                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
 415                                                                         \
 416                 SFC_BAR_LOCK(_esbp);                                    \
 417                                                                         \
 418                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 419                 rte_rmb();                                              \
 420                 (_eqp)->eq_u64[0] = rte_read64_relaxed(_addr);          \
 421                                                                         \
 422                 EFSYS_PROBE3(bar_readq, unsigned int, (_offset),        \
 423                                          uint32_t, (_eqp)->eq_u32[1],   \
 424                                          uint32_t, (_eqp)->eq_u32[0]);  \
 425                                                                         \
 426                 SFC_BAR_UNLOCK(_esbp);                                  \
 427                 _NOTE(CONSTANTCONDITION);                               \
 428         } while (B_FALSE)
 429
 430 #define EFSYS_BAR_READO(_esbp, _offset, _eop, _lock)                    \
 431         do {                                                            \
 432                 volatile uint8_t *_base = (_esbp)->esb_base;            \
 433                 volatile __m128i *_addr;                                \
 434                                                                         \
 435                 _NOTE(CONSTANTCONDITION);                               \
 436                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
 437                                                                         \
 438                 _NOTE(CONSTANTCONDITION);                               \
 439                 if (_lock)                                              \
 440                         SFC_BAR_LOCK(_esbp);                            \
 441                                                                         \
 442                 _addr = (volatile __m128i *)(_base + (_offset));        \
 443                 rte_rmb();                                              \
 444                 /* There is no rte_read128_relaxed() yet */             \
 445                 (_eop)->eo_u128[0] = _addr[0];                          \
 446                                                                         \
 447                 EFSYS_PROBE5(bar_reado, unsigned int, (_offset),        \
 448                                          uint32_t, (_eop)->eo_u32[3],   \
 449                                          uint32_t, (_eop)->eo_u32[2],   \
 450                                          uint32_t, (_eop)->eo_u32[1],   \
 451                                          uint32_t, (_eop)->eo_u32[0]);  \
 452                                                                         \
 453                 _NOTE(CONSTANTCONDITION);                               \
 454                 if (_lock)                                              \
 455                         SFC_BAR_UNLOCK(_esbp);                          \
 456                 _NOTE(CONSTANTCONDITION);                               \
 457         } while (B_FALSE)
 458
 459
 460 #define EFSYS_BAR_WRITED(_esbp, _offset, _edp, _lock)                   \
 461         do {                                                            \
 462                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 463                 volatile uint32_t *_addr;                               \
 464                                                                         \
 465                 _NOTE(CONSTANTCONDITION);                               \
 466                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
 467                                                                         \
 468                 _NOTE(CONSTANTCONDITION);                               \
 469                 if (_lock)                                              \
 470                         SFC_BAR_LOCK(_esbp);                            \
 471                                                                         \
 472                 EFSYS_PROBE2(bar_writed, unsigned int, (_offset),       \
 473                                          uint32_t, (_edp)->ed_u32[0]);  \
 474                                                                         \
 475                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 476                 rte_write32_relaxed((_edp)->ed_u32[0], _addr);          \
 477                 rte_wmb();                                              \
 478                                                                         \
 479                 _NOTE(CONSTANTCONDITION);                               \
 480                 if (_lock)                                              \
 481                         SFC_BAR_UNLOCK(_esbp);                          \
 482                 _NOTE(CONSTANTCONDITION);                               \
 483         } while (B_FALSE)
 484
 485 #define EFSYS_BAR_WRITEQ(_esbp, _offset, _eqp)                          \
 486         do {                                                            \
 487                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 488                 volatile uint64_t *_addr;                               \
 489                                                                         \
 490                 _NOTE(CONSTANTCONDITION);                               \
 491                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
 492                                                                         \
 493                 SFC_BAR_LOCK(_esbp);                                    \
 494                                                                         \
 495                 EFSYS_PROBE3(bar_writeq, unsigned int, (_offset),       \
 496                                          uint32_t, (_eqp)->eq_u32[1],   \
 497                                          uint32_t, (_eqp)->eq_u32[0]);  \
 498                                                                         \
 499                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 500                 rte_write64_relaxed((_eqp)->eq_u64[0], _addr);          \
 501                 rte_wmb();                                              \
 502                                                                         \
 503                 SFC_BAR_UNLOCK(_esbp);                                  \
 504                 _NOTE(CONSTANTCONDITION);                               \
 505         } while (B_FALSE)
 506
 507 /*
 508  * Guarantees 64bit aligned 64bit writes to write combined BAR mapping
 509  * (required by PIO hardware).
 510  *
 511  * Neither VFIO, nor UIO, nor NIC UIO (on FreeBSD) support
 512  * write-combined memory mapped to user-land, so just abort if used.
 513  */
 514 #define EFSYS_BAR_WC_WRITEQ(_esbp, _offset, _eqp)                       \
 515         do {                                                            \
 516                 rte_panic("Write-combined BAR access not supported");   \
 517         } while (B_FALSE)
 518
 519 #define EFSYS_BAR_WRITEO(_esbp, _offset, _eop, _lock)                   \
 520         do {                                                            \
 521                 volatile uint8_t *_base = (_esbp)->esb_base;            \
 522                 volatile __m128i *_addr;                                \
 523                                                                         \
 524                 _NOTE(CONSTANTCONDITION);                               \
 525                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
 526                                                                         \
 527                 _NOTE(CONSTANTCONDITION);                               \
 528                 if (_lock)                                              \
 529                         SFC_BAR_LOCK(_esbp);                            \
 530                                                                         \
 531                 EFSYS_PROBE5(bar_writeo, unsigned int, (_offset),       \
 532                                          uint32_t, (_eop)->eo_u32[3],   \
 533                                          uint32_t, (_eop)->eo_u32[2],   \
 534                                          uint32_t, (_eop)->eo_u32[1],   \
 535                                          uint32_t, (_eop)->eo_u32[0]);  \
 536                                                                         \
 537                 _addr = (volatile __m128i *)(_base + (_offset));        \
 538                 /* There is no rte_write128_relaxed() yet */            \
 539                 _addr[0] = (_eop)->eo_u128[0];                          \
 540                 rte_wmb();                                              \
 541                                                                         \
 542                 _NOTE(CONSTANTCONDITION);                               \
 543                 if (_lock)                                              \
 544                         SFC_BAR_UNLOCK(_esbp);                          \
 545                 _NOTE(CONSTANTCONDITION);                               \
 546         } while (B_FALSE)
 547
 548 /* Use the standard octo-word write for doorbell writes */
 549 #define EFSYS_BAR_DOORBELL_WRITEO(_esbp, _offset, _eop)                 \
 550         do {                                                            \
 551                 EFSYS_BAR_WRITEO((_esbp), (_offset), (_eop), B_FALSE);  \
 552                 _NOTE(CONSTANTCONDITION);                               \
 553         } while (B_FALSE)
 554
 555 /* SPIN */
 556
 557 #define EFSYS_SPIN(_us)                                                 \
 558         do {                                                            \
 559                 rte_delay_us(_us);                                      \
 560                 _NOTE(CONSTANTCONDITION);                               \
 561         } while (B_FALSE)
 562
 563 #define EFSYS_SLEEP EFSYS_SPIN
 564
 565 /* BARRIERS */
 566
 567 #define EFSYS_MEM_READ_BARRIER()        rte_rmb()
 568 #define EFSYS_PIO_WRITE_BARRIER()       rte_io_wmb()
 569
 570 /* DMA SYNC */
 571
 572 /*
 573  * DPDK does not provide any DMA syncing API, and no PMD drivers
 574  * have any traces of explicit DMA syncing.
 575  * DMA mapping is assumed to be coherent.
 576  */
 577
 578 #define EFSYS_DMA_SYNC_FOR_KERNEL(_esmp, _offset, _size)        ((void)0)
 579
 580 /* Just avoid store and compiler (impliciltly) reordering */
 581 #define EFSYS_DMA_SYNC_FOR_DEVICE(_esmp, _offset, _size)        rte_wmb()
 582
 583 /* TIMESTAMP */
 584
 585 typedef uint64_t efsys_timestamp_t;
 586
 587 #define EFSYS_TIMESTAMP(_usp)                                           \
 588         do {                                                            \
 589                 *(_usp) = rte_get_timer_cycles() * 1000000 /            \
 590                         rte_get_timer_hz();                             \
 591                 _NOTE(CONSTANTCONDITION);                               \
 592         } while (B_FALSE)
 593
 594 /* KMEM */
 595
 596 #define EFSYS_KMEM_ALLOC(_esip, _size, _p)                              \
 597         do {                                                            \
 598                 (_esip) = (_esip);                                      \
 599                 (_p) = rte_zmalloc("sfc", (_size), 0);                  \
 600                 _NOTE(CONSTANTCONDITION);                               \
 601         } while (B_FALSE)
 602
 603 #define EFSYS_KMEM_FREE(_esip, _size, _p)                               \
 604         do {                                                            \
 605                 (void)(_esip);                                          \
 606                 (void)(_size);                                          \
 607                 rte_free((_p));                                         \
 608                 _NOTE(CONSTANTCONDITION);                               \
 609         } while (B_FALSE)
 610
 611 /* LOCK */
 612
 613 typedef rte_spinlock_t efsys_lock_t;
 614
 615 #define SFC_EFSYS_LOCK_INIT(_eslp, _ifname, _label)     \
 616         rte_spinlock_init((_eslp))
 617 #define SFC_EFSYS_LOCK_DESTROY(_eslp) ((void)0)
 618 #define SFC_EFSYS_LOCK(_eslp)                           \
 619         rte_spinlock_lock((_eslp))
 620 #define SFC_EFSYS_UNLOCK(_eslp)                         \
 621         rte_spinlock_unlock((_eslp))
 622 #define SFC_EFSYS_LOCK_ASSERT_OWNED(_eslp)              \
 623         SFC_ASSERT(rte_spinlock_is_locked((_eslp)))
 624
 625 typedef int efsys_lock_state_t;
 626
 627 #define EFSYS_LOCK_MAGIC        0x000010c4
 628
 629 #define EFSYS_LOCK(_lockp, _state)                              \
 630         do {                                                    \
 631                 SFC_EFSYS_LOCK(_lockp);                         \
 632                 (_state) = EFSYS_LOCK_MAGIC;                    \
 633                 _NOTE(CONSTANTCONDITION);                       \
 634         } while (B_FALSE)
 635
 636 #define EFSYS_UNLOCK(_lockp, _state)                            \
 637         do {                                                    \
 638                 SFC_ASSERT((_state) == EFSYS_LOCK_MAGIC);       \
 639                 SFC_EFSYS_UNLOCK(_lockp);                       \
 640                 _NOTE(CONSTANTCONDITION);                       \
 641         } while (B_FALSE)
 642
 643 /* STAT */
 644
 645 typedef uint64_t        efsys_stat_t;
 646
 647 #define EFSYS_STAT_INCR(_knp, _delta)                           \
 648         do {                                                    \
 649                 *(_knp) += (_delta);                            \
 650                 _NOTE(CONSTANTCONDITION);                       \
 651         } while (B_FALSE)
 652
 653 #define EFSYS_STAT_DECR(_knp, _delta)                           \
 654         do {                                                    \
 655                 *(_knp) -= (_delta);                            \
 656                 _NOTE(CONSTANTCONDITION);                       \
 657         } while (B_FALSE)
 658
 659 #define EFSYS_STAT_SET(_knp, _val)                              \
 660         do {                                                    \
 661                 *(_knp) = (_val);                               \
 662                 _NOTE(CONSTANTCONDITION);                       \
 663         } while (B_FALSE)
 664
 665 #define EFSYS_STAT_SET_QWORD(_knp, _valp)                       \
 666         do {                                                    \
 667                 *(_knp) = rte_le_to_cpu_64((_valp)->eq_u64[0]); \
 668                 _NOTE(CONSTANTCONDITION);                       \
 669         } while (B_FALSE)
 670
 671 #define EFSYS_STAT_SET_DWORD(_knp, _valp)                       \
 672         do {                                                    \
 673                 *(_knp) = rte_le_to_cpu_32((_valp)->ed_u32[0]); \
 674                 _NOTE(CONSTANTCONDITION);                       \
 675         } while (B_FALSE)
 676
 677 #define EFSYS_STAT_INCR_QWORD(_knp, _valp)                              \
 678         do {                                                            \
 679                 *(_knp) += rte_le_to_cpu_64((_valp)->eq_u64[0]);        \
 680                 _NOTE(CONSTANTCONDITION);                               \
 681         } while (B_FALSE)
 682
 683 #define EFSYS_STAT_SUBR_QWORD(_knp, _valp)                              \
 684         do {                                                            \
 685                 *(_knp) -= rte_le_to_cpu_64((_valp)->eq_u64[0]);        \
 686                 _NOTE(CONSTANTCONDITION);                               \
 687         } while (B_FALSE)
 688
 689 /* ERR */
 690
 691 #if EFSYS_OPT_DECODE_INTR_FATAL
 692 #define EFSYS_ERR(_esip, _code, _dword0, _dword1)                       \
 693         do {                                                            \
 694                 (void)(_esip);                                          \
 695                 SFC_GENERIC_LOG(ERR, "FATAL ERROR #%u (0x%08x%08x)",    \
 696                         (_code), (_dword0), (_dword1));                 \
 697                 _NOTE(CONSTANTCONDITION);                               \
 698         } while (B_FALSE)
 699 #endif
 700
 701 /* ASSERT */
 702
 703 /* RTE_VERIFY from DPDK treats expressions with % operator incorrectly,
 704  * so we re-implement it here
 705  */
 706 #ifdef RTE_LIBRTE_SFC_EFX_DEBUG
 707 #define EFSYS_ASSERT(_exp)                                              \
 708         do {                                                            \
 709                 if (unlikely(!(_exp)))                                  \
 710                         rte_panic("line %d\tassert \"%s\" failed\n",    \
 711                                   __LINE__, (#_exp));                   \
 712         } while (0)
 713 #else
 714 #define EFSYS_ASSERT(_exp)              (void)(_exp)
 715 #endif
 716
 717 #define EFSYS_ASSERT3(_x, _op, _y, _t)  EFSYS_ASSERT((_t)(_x) _op (_t)(_y))
 718
 719 #define EFSYS_ASSERT3U(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, uint64_t)
 720 #define EFSYS_ASSERT3S(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, int64_t)
 721 #define EFSYS_ASSERT3P(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, uintptr_t)
 722
 723 /* ROTATE */
 724
 725 #define EFSYS_HAS_ROTL_DWORD    0
 726
 727 #ifdef __cplusplus
 728 }
 729 #endif
 730
 731 #endif  /* _SFC_COMMON_EFSYS_H */