drivers/net/sfc/efsys.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  * Copyright(c) 2019-2020 Xilinx, Inc.
   4  * Copyright(c) 2016-2019 Solarflare Communications Inc.
   5  *
   6  * This software was jointly developed between OKTET Labs (under contract
   7  * for Solarflare) and Solarflare Communications, Inc.
   8  */
   9
  10 #ifndef _SFC_COMMON_EFSYS_H
  11 #define _SFC_COMMON_EFSYS_H
  12
  13 #include <stdbool.h>
  14
  15 #include <rte_spinlock.h>
  16 #include <rte_byteorder.h>
  17 #include <rte_debug.h>
  18 #include <rte_memzone.h>
  19 #include <rte_memory.h>
  20 #include <rte_memcpy.h>
  21 #include <rte_cycles.h>
  22 #include <rte_prefetch.h>
  23 #include <rte_common.h>
  24 #include <rte_malloc.h>
  25 #include <rte_log.h>
  26 #include <rte_io.h>
  27
  28 #include "sfc_debug.h"
  29 #include "sfc_log.h"
  30
  31 #ifdef __cplusplus
  32 extern "C" {
  33 #endif
  34
  35 /* No specific decorations required since all functions are local now */
  36 #define LIBEFX_API
  37 #define LIBEFX_INTERNAL
  38
  39 #define EFSYS_HAS_UINT64 1
  40 #define EFSYS_USE_UINT64 1
  41 #define EFSYS_HAS_SSE2_M128 1
  42
  43 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
  44 #define EFSYS_IS_BIG_ENDIAN 1
  45 #define EFSYS_IS_LITTLE_ENDIAN 0
  46 #elif RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
  47 #define EFSYS_IS_BIG_ENDIAN 0
  48 #define EFSYS_IS_LITTLE_ENDIAN 1
  49 #else
  50 #error "Cannot determine system endianness"
  51 #endif
  52 #include "efx_types.h"
  53
  54
  55 typedef bool boolean_t;
  56
  57 #ifndef B_FALSE
  58 #define B_FALSE false
  59 #endif
  60 #ifndef B_TRUE
  61 #define B_TRUE  true
  62 #endif
  63
  64 /*
  65  * RTE_MAX() and RTE_MIN() cannot be used since braced-group within
  66  * expression allowed only inside a function, but MAX() is used as
  67  * a number of elements in array.
  68  */
  69 #ifndef MAX
  70 #define MAX(v1, v2)     ((v1) > (v2) ? (v1) : (v2))
  71 #endif
  72 #ifndef MIN
  73 #define MIN(v1, v2)     ((v1) < (v2) ? (v1) : (v2))
  74 #endif
  75
  76 #ifndef ISP2
  77 #define ISP2(x)                 rte_is_power_of_2(x)
  78 #endif
  79
  80 #define ENOTACTIVE      ENOTCONN
  81
  82 static inline void
  83 prefetch_read_many(const volatile void *addr)
  84 {
  85         rte_prefetch0(addr);
  86 }
  87
  88 static inline void
  89 prefetch_read_once(const volatile void *addr)
  90 {
  91         rte_prefetch_non_temporal(addr);
  92 }
  93
  94 /* Code inclusion options */
  95
  96
  97 #define EFSYS_OPT_NAMES 1
  98
  99 /* Disable SFN5xxx/SFN6xxx since it requires specific support in the PMD */
 100 #define EFSYS_OPT_SIENA 0
 101 /* Enable SFN7xxx support */
 102 #define EFSYS_OPT_HUNTINGTON 1
 103 /* Enable SFN8xxx support */
 104 #define EFSYS_OPT_MEDFORD 1
 105 /* Enable SFN2xxx support */
 106 #define EFSYS_OPT_MEDFORD2 1
 107 #ifdef RTE_LIBRTE_SFC_EFX_DEBUG
 108 #define EFSYS_OPT_CHECK_REG 1
 109 #else
 110 #define EFSYS_OPT_CHECK_REG 0
 111 #endif
 112
 113 /* MCDI is required for SFN7xxx and SFN8xx */
 114 #define EFSYS_OPT_MCDI 1
 115 #define EFSYS_OPT_MCDI_LOGGING 1
 116 #define EFSYS_OPT_MCDI_PROXY_AUTH 1
 117
 118 #define EFSYS_OPT_MAC_STATS 1
 119
 120 #define EFSYS_OPT_LOOPBACK 1
 121
 122 #define EFSYS_OPT_MON_MCDI 0
 123 #define EFSYS_OPT_MON_STATS 0
 124
 125 #define EFSYS_OPT_PHY_STATS 0
 126 #define EFSYS_OPT_BIST 0
 127 #define EFSYS_OPT_PHY_LED_CONTROL 0
 128 #define EFSYS_OPT_PHY_FLAGS 0
 129
 130 #define EFSYS_OPT_VPD 0
 131 #define EFSYS_OPT_NVRAM 0
 132 #define EFSYS_OPT_BOOTCFG 0
 133 #define EFSYS_OPT_IMAGE_LAYOUT 0
 134
 135 #define EFSYS_OPT_DIAG 0
 136 #define EFSYS_OPT_RX_SCALE 1
 137 #define EFSYS_OPT_QSTATS 0
 138 /* Filters support is required for SFN7xxx and SFN8xx */
 139 #define EFSYS_OPT_FILTER 1
 140 #define EFSYS_OPT_RX_SCATTER 0
 141
 142 #define EFSYS_OPT_EV_PREFETCH 0
 143
 144 #define EFSYS_OPT_DECODE_INTR_FATAL 0
 145
 146 #define EFSYS_OPT_LICENSING 0
 147
 148 #define EFSYS_OPT_ALLOW_UNCONFIGURED_NIC 0
 149
 150 #define EFSYS_OPT_RX_PACKED_STREAM 0
 151
 152 #define EFSYS_OPT_RX_ES_SUPER_BUFFER 1
 153
 154 #define EFSYS_OPT_TUNNEL 1
 155
 156 #define EFSYS_OPT_FW_SUBVARIANT_AWARE 1
 157
 158 #define EFSYS_OPT_EVB 0
 159
 160 #define EFSYS_OPT_MCDI_PROXY_AUTH_SERVER 0
 161
 162 /* ID */
 163
 164 typedef struct __efsys_identifier_s efsys_identifier_t;
 165
 166
 167 #define EFSYS_PROBE(_name)                                              \
 168         do { } while (0)
 169
 170 #define EFSYS_PROBE1(_name, _type1, _arg1)                              \
 171         do { } while (0)
 172
 173 #define EFSYS_PROBE2(_name, _type1, _arg1, _type2, _arg2)               \
 174         do { } while (0)
 175
 176 #define EFSYS_PROBE3(_name, _type1, _arg1, _type2, _arg2,               \
 177                      _type3, _arg3)                                     \
 178         do { } while (0)
 179
 180 #define EFSYS_PROBE4(_name, _type1, _arg1, _type2, _arg2,               \
 181                      _type3, _arg3, _type4, _arg4)                      \
 182         do { } while (0)
 183
 184 #define EFSYS_PROBE5(_name, _type1, _arg1, _type2, _arg2,               \
 185                      _type3, _arg3, _type4, _arg4, _type5, _arg5)       \
 186         do { } while (0)
 187
 188 #define EFSYS_PROBE6(_name, _type1, _arg1, _type2, _arg2,               \
 189                      _type3, _arg3, _type4, _arg4, _type5, _arg5,       \
 190                      _type6, _arg6)                                     \
 191         do { } while (0)
 192
 193 #define EFSYS_PROBE7(_name, _type1, _arg1, _type2, _arg2,               \
 194                      _type3, _arg3, _type4, _arg4, _type5, _arg5,       \
 195                      _type6, _arg6, _type7, _arg7)                      \
 196         do { } while (0)
 197
 198
 199 /* DMA */
 200
 201 typedef rte_iova_t efsys_dma_addr_t;
 202
 203 typedef struct efsys_mem_s {
 204         const struct rte_memzone        *esm_mz;
 205         /*
 206          * Ideally it should have volatile qualifier to denote that
 207          * the memory may be updated by someone else. However, it adds
 208          * qualifier discard warnings when the pointer or its derivative
 209          * is passed to memset() or rte_mov16().
 210          * So, skip the qualifier here, but make sure that it is added
 211          * below in access macros.
 212          */
 213         void                            *esm_base;
 214         efsys_dma_addr_t                esm_addr;
 215 } efsys_mem_t;
 216
 217
 218 #define EFSYS_MEM_ZERO(_esmp, _size)                                    \
 219         do {                                                            \
 220                 (void)memset((void *)(_esmp)->esm_base, 0, (_size));    \
 221                                                                         \
 222                 _NOTE(CONSTANTCONDITION);                               \
 223         } while (B_FALSE)
 224
 225 #define EFSYS_MEM_READD(_esmp, _offset, _edp)                           \
 226         do {                                                            \
 227                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 228                 volatile uint32_t *_addr;                               \
 229                                                                         \
 230                 _NOTE(CONSTANTCONDITION);                               \
 231                 SFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,            \
 232                                             sizeof(efx_dword_t)));      \
 233                                                                         \
 234                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 235                 (_edp)->ed_u32[0] = _addr[0];                           \
 236                                                                         \
 237                 EFSYS_PROBE2(mem_readl, unsigned int, (_offset),        \
 238                                          uint32_t, (_edp)->ed_u32[0]);  \
 239                                                                         \
 240                 _NOTE(CONSTANTCONDITION);                               \
 241         } while (B_FALSE)
 242
 243 #define EFSYS_MEM_READQ(_esmp, _offset, _eqp)                           \
 244         do {                                                            \
 245                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 246                 volatile uint64_t *_addr;                               \
 247                                                                         \
 248                 _NOTE(CONSTANTCONDITION);                               \
 249                 SFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,            \
 250                                             sizeof(efx_qword_t)));      \
 251                                                                         \
 252                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 253                 (_eqp)->eq_u64[0] = _addr[0];                           \
 254                                                                         \
 255                 EFSYS_PROBE3(mem_readq, unsigned int, (_offset),        \
 256                                          uint32_t, (_eqp)->eq_u32[1],   \
 257                                          uint32_t, (_eqp)->eq_u32[0]);  \
 258                                                                         \
 259                 _NOTE(CONSTANTCONDITION);                               \
 260         } while (B_FALSE)
 261
 262 #define EFSYS_MEM_READO(_esmp, _offset, _eop)                           \
 263         do {                                                            \
 264                 volatile uint8_t *_base = (_esmp)->esm_base;            \
 265                 volatile __m128i *_addr;                                \
 266                                                                         \
 267                 _NOTE(CONSTANTCONDITION);                               \
 268                 SFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,            \
 269                                             sizeof(efx_oword_t)));      \
 270                                                                         \
 271                 _addr = (volatile __m128i *)(_base + (_offset));        \
 272                 (_eop)->eo_u128[0] = _addr[0];                          \
 273                                                                         \
 274                 EFSYS_PROBE5(mem_reado, unsigned int, (_offset),        \
 275                                          uint32_t, (_eop)->eo_u32[3],   \
 276                                          uint32_t, (_eop)->eo_u32[2],   \
 277                                          uint32_t, (_eop)->eo_u32[1],   \
 278                                          uint32_t, (_eop)->eo_u32[0]);  \
 279                                                                         \
 280                 _NOTE(CONSTANTCONDITION);                               \
 281         } while (B_FALSE)
 282
 283
 284 #define EFSYS_MEM_WRITED(_esmp, _offset, _edp)                          \
 285         do {                                                            \
 286                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 287                 volatile uint32_t *_addr;                               \
 288                                                                         \
 289                 _NOTE(CONSTANTCONDITION);                               \
 290                 SFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,            \
 291                                             sizeof(efx_dword_t)));      \
 292                                                                         \
 293                 EFSYS_PROBE2(mem_writed, unsigned int, (_offset),       \
 294                                          uint32_t, (_edp)->ed_u32[0]);  \
 295                                                                         \
 296                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 297                 _addr[0] = (_edp)->ed_u32[0];                           \
 298                                                                         \
 299                 _NOTE(CONSTANTCONDITION);                               \
 300         } while (B_FALSE)
 301
 302 #define EFSYS_MEM_WRITEQ(_esmp, _offset, _eqp)                          \
 303         do {                                                            \
 304                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 305                 volatile uint64_t *_addr;                               \
 306                                                                         \
 307                 _NOTE(CONSTANTCONDITION);                               \
 308                 SFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,            \
 309                                             sizeof(efx_qword_t)));      \
 310                                                                         \
 311                 EFSYS_PROBE3(mem_writeq, unsigned int, (_offset),       \
 312                                          uint32_t, (_eqp)->eq_u32[1],   \
 313                                          uint32_t, (_eqp)->eq_u32[0]);  \
 314                                                                         \
 315                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 316                 _addr[0] = (_eqp)->eq_u64[0];                           \
 317                                                                         \
 318                 _NOTE(CONSTANTCONDITION);                               \
 319         } while (B_FALSE)
 320
 321 #define EFSYS_MEM_WRITEO(_esmp, _offset, _eop)                          \
 322         do {                                                            \
 323                 volatile uint8_t *_base = (_esmp)->esm_base;            \
 324                 volatile __m128i *_addr;                                \
 325                                                                         \
 326                 _NOTE(CONSTANTCONDITION);                               \
 327                 SFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,            \
 328                                             sizeof(efx_oword_t)));      \
 329                                                                         \
 330                                                                         \
 331                 EFSYS_PROBE5(mem_writeo, unsigned int, (_offset),       \
 332                                          uint32_t, (_eop)->eo_u32[3],   \
 333                                          uint32_t, (_eop)->eo_u32[2],   \
 334                                          uint32_t, (_eop)->eo_u32[1],   \
 335                                          uint32_t, (_eop)->eo_u32[0]);  \
 336                                                                         \
 337                 _addr = (volatile __m128i *)(_base + (_offset));        \
 338                 _addr[0] = (_eop)->eo_u128[0];                          \
 339                                                                         \
 340                 _NOTE(CONSTANTCONDITION);                               \
 341         } while (B_FALSE)
 342
 343
 344 #define EFSYS_MEM_SIZE(_esmp)                                           \
 345         ((_esmp)->esm_mz->len)
 346
 347 #define EFSYS_MEM_ADDR(_esmp)                                           \
 348         ((_esmp)->esm_addr)
 349
 350 #define EFSYS_MEM_IS_NULL(_esmp)                                        \
 351         ((_esmp)->esm_base == NULL)
 352
 353 #define EFSYS_MEM_PREFETCH(_esmp, _offset)                              \
 354         do {                                                            \
 355                 volatile uint8_t *_base = (_esmp)->esm_base;            \
 356                                                                         \
 357                 rte_prefetch0(_base + (_offset));                       \
 358         } while (0)
 359
 360
 361 /* BAR */
 362
 363 typedef struct efsys_bar_s {
 364         rte_spinlock_t          esb_lock;
 365         int                     esb_rid;
 366         struct rte_pci_device   *esb_dev;
 367         /*
 368          * Ideally it should have volatile qualifier to denote that
 369          * the memory may be updated by someone else. However, it adds
 370          * qualifier discard warnings when the pointer or its derivative
 371          * is passed to memset() or rte_mov16().
 372          * So, skip the qualifier here, but make sure that it is added
 373          * below in access macros.
 374          */
 375         void                    *esb_base;
 376 } efsys_bar_t;
 377
 378 #define SFC_BAR_LOCK_INIT(_esbp, _ifname)                               \
 379         do {                                                            \
 380                 rte_spinlock_init(&(_esbp)->esb_lock);                  \
 381                 _NOTE(CONSTANTCONDITION);                               \
 382         } while (B_FALSE)
 383 #define SFC_BAR_LOCK_DESTROY(_esbp)     ((void)0)
 384 #define SFC_BAR_LOCK(_esbp)             rte_spinlock_lock(&(_esbp)->esb_lock)
 385 #define SFC_BAR_UNLOCK(_esbp)           rte_spinlock_unlock(&(_esbp)->esb_lock)
 386
 387 #define EFSYS_BAR_READD(_esbp, _offset, _edp, _lock)                    \
 388         do {                                                            \
 389                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 390                 volatile uint32_t *_addr;                               \
 391                                                                         \
 392                 _NOTE(CONSTANTCONDITION);                               \
 393                 SFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,            \
 394                                             sizeof(efx_dword_t)));      \
 395                 _NOTE(CONSTANTCONDITION);                               \
 396                 if (_lock)                                              \
 397                         SFC_BAR_LOCK(_esbp);                            \
 398                                                                         \
 399                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 400                 rte_rmb();                                              \
 401                 (_edp)->ed_u32[0] = rte_read32_relaxed(_addr);          \
 402                                                                         \
 403                 EFSYS_PROBE2(bar_readd, unsigned int, (_offset),        \
 404                                          uint32_t, (_edp)->ed_u32[0]);  \
 405                                                                         \
 406                 _NOTE(CONSTANTCONDITION);                               \
 407                 if (_lock)                                              \
 408                         SFC_BAR_UNLOCK(_esbp);                          \
 409                 _NOTE(CONSTANTCONDITION);                               \
 410         } while (B_FALSE)
 411
 412 #define EFSYS_BAR_READQ(_esbp, _offset, _eqp)                           \
 413         do {                                                            \
 414                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 415                 volatile uint64_t *_addr;                               \
 416                                                                         \
 417                 _NOTE(CONSTANTCONDITION);                               \
 418                 SFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,            \
 419                                             sizeof(efx_qword_t)));      \
 420                                                                         \
 421                 SFC_BAR_LOCK(_esbp);                                    \
 422                                                                         \
 423                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 424                 rte_rmb();                                              \
 425                 (_eqp)->eq_u64[0] = rte_read64_relaxed(_addr);          \
 426                                                                         \
 427                 EFSYS_PROBE3(bar_readq, unsigned int, (_offset),        \
 428                                          uint32_t, (_eqp)->eq_u32[1],   \
 429                                          uint32_t, (_eqp)->eq_u32[0]);  \
 430                                                                         \
 431                 SFC_BAR_UNLOCK(_esbp);                                  \
 432                 _NOTE(CONSTANTCONDITION);                               \
 433         } while (B_FALSE)
 434
 435 #define EFSYS_BAR_READO(_esbp, _offset, _eop, _lock)                    \
 436         do {                                                            \
 437                 volatile uint8_t *_base = (_esbp)->esb_base;            \
 438                 volatile __m128i *_addr;                                \
 439                                                                         \
 440                 _NOTE(CONSTANTCONDITION);                               \
 441                 SFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,            \
 442                                             sizeof(efx_oword_t)));      \
 443                                                                         \
 444                 _NOTE(CONSTANTCONDITION);                               \
 445                 if (_lock)                                              \
 446                         SFC_BAR_LOCK(_esbp);                            \
 447                                                                         \
 448                 _addr = (volatile __m128i *)(_base + (_offset));        \
 449                 rte_rmb();                                              \
 450                 /* There is no rte_read128_relaxed() yet */             \
 451                 (_eop)->eo_u128[0] = _addr[0];                          \
 452                                                                         \
 453                 EFSYS_PROBE5(bar_reado, unsigned int, (_offset),        \
 454                                          uint32_t, (_eop)->eo_u32[3],   \
 455                                          uint32_t, (_eop)->eo_u32[2],   \
 456                                          uint32_t, (_eop)->eo_u32[1],   \
 457                                          uint32_t, (_eop)->eo_u32[0]);  \
 458                                                                         \
 459                 _NOTE(CONSTANTCONDITION);                               \
 460                 if (_lock)                                              \
 461                         SFC_BAR_UNLOCK(_esbp);                          \
 462                 _NOTE(CONSTANTCONDITION);                               \
 463         } while (B_FALSE)
 464
 465
 466 #define EFSYS_BAR_WRITED(_esbp, _offset, _edp, _lock)                   \
 467         do {                                                            \
 468                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 469                 volatile uint32_t *_addr;                               \
 470                                                                         \
 471                 _NOTE(CONSTANTCONDITION);                               \
 472                 SFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,            \
 473                                             sizeof(efx_dword_t)));      \
 474                                                                         \
 475                 _NOTE(CONSTANTCONDITION);                               \
 476                 if (_lock)                                              \
 477                         SFC_BAR_LOCK(_esbp);                            \
 478                                                                         \
 479                 EFSYS_PROBE2(bar_writed, unsigned int, (_offset),       \
 480                                          uint32_t, (_edp)->ed_u32[0]);  \
 481                                                                         \
 482                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 483                 rte_write32_relaxed((_edp)->ed_u32[0], _addr);          \
 484                 rte_wmb();                                              \
 485                                                                         \
 486                 _NOTE(CONSTANTCONDITION);                               \
 487                 if (_lock)                                              \
 488                         SFC_BAR_UNLOCK(_esbp);                          \
 489                 _NOTE(CONSTANTCONDITION);                               \
 490         } while (B_FALSE)
 491
 492 #define EFSYS_BAR_WRITEQ(_esbp, _offset, _eqp)                          \
 493         do {                                                            \
 494                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 495                 volatile uint64_t *_addr;                               \
 496                                                                         \
 497                 _NOTE(CONSTANTCONDITION);                               \
 498                 SFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,            \
 499                                             sizeof(efx_qword_t)));      \
 500                                                                         \
 501                 SFC_BAR_LOCK(_esbp);                                    \
 502                                                                         \
 503                 EFSYS_PROBE3(bar_writeq, unsigned int, (_offset),       \
 504                                          uint32_t, (_eqp)->eq_u32[1],   \
 505                                          uint32_t, (_eqp)->eq_u32[0]);  \
 506                                                                         \
 507                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 508                 rte_write64_relaxed((_eqp)->eq_u64[0], _addr);          \
 509                 rte_wmb();                                              \
 510                                                                         \
 511                 SFC_BAR_UNLOCK(_esbp);                                  \
 512                 _NOTE(CONSTANTCONDITION);                               \
 513         } while (B_FALSE)
 514
 515 /*
 516  * Guarantees 64bit aligned 64bit writes to write combined BAR mapping
 517  * (required by PIO hardware).
 518  *
 519  * Neither VFIO, nor UIO, nor NIC UIO (on FreeBSD) support
 520  * write-combined memory mapped to user-land, so just abort if used.
 521  */
 522 #define EFSYS_BAR_WC_WRITEQ(_esbp, _offset, _eqp)                       \
 523         do {                                                            \
 524                 rte_panic("Write-combined BAR access not supported");   \
 525         } while (B_FALSE)
 526
 527 #define EFSYS_BAR_WRITEO(_esbp, _offset, _eop, _lock)                   \
 528         do {                                                            \
 529                 volatile uint8_t *_base = (_esbp)->esb_base;            \
 530                 volatile __m128i *_addr;                                \
 531                                                                         \
 532                 _NOTE(CONSTANTCONDITION);                               \
 533                 SFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,            \
 534                                             sizeof(efx_oword_t)));      \
 535                                                                         \
 536                 _NOTE(CONSTANTCONDITION);                               \
 537                 if (_lock)                                              \
 538                         SFC_BAR_LOCK(_esbp);                            \
 539                                                                         \
 540                 EFSYS_PROBE5(bar_writeo, unsigned int, (_offset),       \
 541                                          uint32_t, (_eop)->eo_u32[3],   \
 542                                          uint32_t, (_eop)->eo_u32[2],   \
 543                                          uint32_t, (_eop)->eo_u32[1],   \
 544                                          uint32_t, (_eop)->eo_u32[0]);  \
 545                                                                         \
 546                 _addr = (volatile __m128i *)(_base + (_offset));        \
 547                 /* There is no rte_write128_relaxed() yet */            \
 548                 _addr[0] = (_eop)->eo_u128[0];                          \
 549                 rte_wmb();                                              \
 550                                                                         \
 551                 _NOTE(CONSTANTCONDITION);                               \
 552                 if (_lock)                                              \
 553                         SFC_BAR_UNLOCK(_esbp);                          \
 554                 _NOTE(CONSTANTCONDITION);                               \
 555         } while (B_FALSE)
 556
 557 /* Use the standard octo-word write for doorbell writes */
 558 #define EFSYS_BAR_DOORBELL_WRITEO(_esbp, _offset, _eop)                 \
 559         do {                                                            \
 560                 EFSYS_BAR_WRITEO((_esbp), (_offset), (_eop), B_FALSE);  \
 561                 _NOTE(CONSTANTCONDITION);                               \
 562         } while (B_FALSE)
 563
 564 /* SPIN */
 565
 566 #define EFSYS_SPIN(_us)                                                 \
 567         do {                                                            \
 568                 rte_delay_us(_us);                                      \
 569                 _NOTE(CONSTANTCONDITION);                               \
 570         } while (B_FALSE)
 571
 572 #define EFSYS_SLEEP EFSYS_SPIN
 573
 574 /* BARRIERS */
 575
 576 #define EFSYS_MEM_READ_BARRIER()        rte_rmb()
 577 #define EFSYS_PIO_WRITE_BARRIER()       rte_io_wmb()
 578
 579 /* DMA SYNC */
 580
 581 /*
 582  * DPDK does not provide any DMA syncing API, and no PMD drivers
 583  * have any traces of explicit DMA syncing.
 584  * DMA mapping is assumed to be coherent.
 585  */
 586
 587 #define EFSYS_DMA_SYNC_FOR_KERNEL(_esmp, _offset, _size)        ((void)0)
 588
 589 /* Just avoid store and compiler (impliciltly) reordering */
 590 #define EFSYS_DMA_SYNC_FOR_DEVICE(_esmp, _offset, _size)        rte_wmb()
 591
 592 /* TIMESTAMP */
 593
 594 typedef uint64_t efsys_timestamp_t;
 595
 596 #define EFSYS_TIMESTAMP(_usp)                                           \
 597         do {                                                            \
 598                 *(_usp) = rte_get_timer_cycles() * 1000000 /            \
 599                         rte_get_timer_hz();                             \
 600                 _NOTE(CONSTANTCONDITION);                               \
 601         } while (B_FALSE)
 602
 603 /* KMEM */
 604
 605 #define EFSYS_KMEM_ALLOC(_esip, _size, _p)                              \
 606         do {                                                            \
 607                 (_esip) = (_esip);                                      \
 608                 (_p) = rte_zmalloc("sfc", (_size), 0);                  \
 609                 _NOTE(CONSTANTCONDITION);                               \
 610         } while (B_FALSE)
 611
 612 #define EFSYS_KMEM_FREE(_esip, _size, _p)                               \
 613         do {                                                            \
 614                 (void)(_esip);                                          \
 615                 (void)(_size);                                          \
 616                 rte_free((_p));                                         \
 617                 _NOTE(CONSTANTCONDITION);                               \
 618         } while (B_FALSE)
 619
 620 /* LOCK */
 621
 622 typedef rte_spinlock_t efsys_lock_t;
 623
 624 #define SFC_EFSYS_LOCK_INIT(_eslp, _ifname, _label)     \
 625         rte_spinlock_init((_eslp))
 626 #define SFC_EFSYS_LOCK_DESTROY(_eslp) ((void)0)
 627 #define SFC_EFSYS_LOCK(_eslp)                           \
 628         rte_spinlock_lock((_eslp))
 629 #define SFC_EFSYS_UNLOCK(_eslp)                         \
 630         rte_spinlock_unlock((_eslp))
 631 #define SFC_EFSYS_LOCK_ASSERT_OWNED(_eslp)              \
 632         SFC_ASSERT(rte_spinlock_is_locked((_eslp)))
 633
 634 typedef int efsys_lock_state_t;
 635
 636 #define EFSYS_LOCK_MAGIC        0x000010c4
 637
 638 #define EFSYS_LOCK(_lockp, _state)                              \
 639         do {                                                    \
 640                 SFC_EFSYS_LOCK(_lockp);                         \
 641                 (_state) = EFSYS_LOCK_MAGIC;                    \
 642                 _NOTE(CONSTANTCONDITION);                       \
 643         } while (B_FALSE)
 644
 645 #define EFSYS_UNLOCK(_lockp, _state)                            \
 646         do {                                                    \
 647                 SFC_ASSERT((_state) == EFSYS_LOCK_MAGIC);       \
 648                 SFC_EFSYS_UNLOCK(_lockp);                       \
 649                 _NOTE(CONSTANTCONDITION);                       \
 650         } while (B_FALSE)
 651
 652 /* STAT */
 653
 654 typedef uint64_t        efsys_stat_t;
 655
 656 #define EFSYS_STAT_INCR(_knp, _delta)                           \
 657         do {                                                    \
 658                 *(_knp) += (_delta);                            \
 659                 _NOTE(CONSTANTCONDITION);                       \
 660         } while (B_FALSE)
 661
 662 #define EFSYS_STAT_DECR(_knp, _delta)                           \
 663         do {                                                    \
 664                 *(_knp) -= (_delta);                            \
 665                 _NOTE(CONSTANTCONDITION);                       \
 666         } while (B_FALSE)
 667
 668 #define EFSYS_STAT_SET(_knp, _val)                              \
 669         do {                                                    \
 670                 *(_knp) = (_val);                               \
 671                 _NOTE(CONSTANTCONDITION);                       \
 672         } while (B_FALSE)
 673
 674 #define EFSYS_STAT_SET_QWORD(_knp, _valp)                       \
 675         do {                                                    \
 676                 *(_knp) = rte_le_to_cpu_64((_valp)->eq_u64[0]); \
 677                 _NOTE(CONSTANTCONDITION);                       \
 678         } while (B_FALSE)
 679
 680 #define EFSYS_STAT_SET_DWORD(_knp, _valp)                       \
 681         do {                                                    \
 682                 *(_knp) = rte_le_to_cpu_32((_valp)->ed_u32[0]); \
 683                 _NOTE(CONSTANTCONDITION);                       \
 684         } while (B_FALSE)
 685
 686 #define EFSYS_STAT_INCR_QWORD(_knp, _valp)                              \
 687         do {                                                            \
 688                 *(_knp) += rte_le_to_cpu_64((_valp)->eq_u64[0]);        \
 689                 _NOTE(CONSTANTCONDITION);                               \
 690         } while (B_FALSE)
 691
 692 #define EFSYS_STAT_SUBR_QWORD(_knp, _valp)                              \
 693         do {                                                            \
 694                 *(_knp) -= rte_le_to_cpu_64((_valp)->eq_u64[0]);        \
 695                 _NOTE(CONSTANTCONDITION);                               \
 696         } while (B_FALSE)
 697
 698 /* ERR */
 699
 700 #if EFSYS_OPT_DECODE_INTR_FATAL
 701 #define EFSYS_ERR(_esip, _code, _dword0, _dword1)                       \
 702         do {                                                            \
 703                 (void)(_esip);                                          \
 704                 SFC_GENERIC_LOG(ERR, "FATAL ERROR #%u (0x%08x%08x)",    \
 705                         (_code), (_dword0), (_dword1));                 \
 706                 _NOTE(CONSTANTCONDITION);                               \
 707         } while (B_FALSE)
 708 #endif
 709
 710 /* ASSERT */
 711
 712 /* RTE_VERIFY from DPDK treats expressions with % operator incorrectly,
 713  * so we re-implement it here
 714  */
 715 #ifdef RTE_LIBRTE_SFC_EFX_DEBUG
 716 #define EFSYS_ASSERT(_exp)                                              \
 717         do {                                                            \
 718                 if (unlikely(!(_exp)))                                  \
 719                         rte_panic("line %d\tassert \"%s\" failed\n",    \
 720                                   __LINE__, (#_exp));                   \
 721         } while (0)
 722 #else
 723 #define EFSYS_ASSERT(_exp)              (void)(_exp)
 724 #endif
 725
 726 #define EFSYS_ASSERT3(_x, _op, _y, _t)  EFSYS_ASSERT((_t)(_x) _op (_t)(_y))
 727
 728 #define EFSYS_ASSERT3U(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, uint64_t)
 729 #define EFSYS_ASSERT3S(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, int64_t)
 730 #define EFSYS_ASSERT3P(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, uintptr_t)
 731
 732 /* ROTATE */
 733
 734 #define EFSYS_HAS_ROTL_DWORD    0
 735
 736 #ifdef __cplusplus
 737 }
 738 #endif
 739
 740 #endif  /* _SFC_COMMON_EFSYS_H */