1 /* SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2017-2018 Solarflare Communications Inc.
6 * This software was jointly developed between OKTET Labs (under contract
7 * for Solarflare) and Solarflare Communications, Inc.
10 #include <rte_byteorder.h>
11 #include <rte_tailq.h>
12 #include <rte_common.h>
13 #include <rte_ethdev_driver.h>
14 #include <rte_eth_ctrl.h>
15 #include <rte_ether.h>
17 #include <rte_flow_driver.h>
23 #include "sfc_filter.h"
28 * At now flow API is implemented in such a manner that each
29 * flow rule is converted to one or more hardware filters.
30 * All elements of flow rule (attributes, pattern items, actions)
31 * correspond to one or more fields in the efx_filter_spec_s structure
32 * that is responsible for the hardware filter.
33 * If some required field is unset in the flow rule, then a handful
34 * of filter copies will be created to cover all possible values
38 enum sfc_flow_item_layers {
39 SFC_FLOW_ITEM_ANY_LAYER,
40 SFC_FLOW_ITEM_START_LAYER,
46 typedef int (sfc_flow_item_parse)(const struct rte_flow_item *item,
47 efx_filter_spec_t *spec,
48 struct rte_flow_error *error);
50 struct sfc_flow_item {
51 enum rte_flow_item_type type; /* Type of item */
52 enum sfc_flow_item_layers layer; /* Layer of item */
53 enum sfc_flow_item_layers prev_layer; /* Previous layer of item */
54 sfc_flow_item_parse *parse; /* Parsing function */
57 static sfc_flow_item_parse sfc_flow_parse_void;
58 static sfc_flow_item_parse sfc_flow_parse_eth;
59 static sfc_flow_item_parse sfc_flow_parse_vlan;
60 static sfc_flow_item_parse sfc_flow_parse_ipv4;
61 static sfc_flow_item_parse sfc_flow_parse_ipv6;
62 static sfc_flow_item_parse sfc_flow_parse_tcp;
63 static sfc_flow_item_parse sfc_flow_parse_udp;
64 static sfc_flow_item_parse sfc_flow_parse_vxlan;
65 static sfc_flow_item_parse sfc_flow_parse_geneve;
66 static sfc_flow_item_parse sfc_flow_parse_nvgre;
68 typedef int (sfc_flow_spec_set_vals)(struct sfc_flow_spec *spec,
69 unsigned int filters_count_for_one_val,
70 struct rte_flow_error *error);
72 typedef boolean_t (sfc_flow_spec_check)(efx_filter_match_flags_t match,
73 efx_filter_spec_t *spec,
74 struct sfc_filter *filter);
76 struct sfc_flow_copy_flag {
77 /* EFX filter specification match flag */
78 efx_filter_match_flags_t flag;
79 /* Number of values of corresponding field */
80 unsigned int vals_count;
81 /* Function to set values in specifications */
82 sfc_flow_spec_set_vals *set_vals;
84 * Function to check that the specification is suitable
85 * for adding this match flag
87 sfc_flow_spec_check *spec_check;
90 static sfc_flow_spec_set_vals sfc_flow_set_unknown_dst_flags;
91 static sfc_flow_spec_check sfc_flow_check_unknown_dst_flags;
92 static sfc_flow_spec_set_vals sfc_flow_set_ethertypes;
93 static sfc_flow_spec_set_vals sfc_flow_set_ifrm_unknown_dst_flags;
94 static sfc_flow_spec_check sfc_flow_check_ifrm_unknown_dst_flags;
97 sfc_flow_is_zero(const uint8_t *buf, unsigned int size)
102 for (i = 0; i < size; i++)
105 return (sum == 0) ? B_TRUE : B_FALSE;
109 * Validate item and prepare structures spec and mask for parsing
112 sfc_flow_parse_init(const struct rte_flow_item *item,
113 const void **spec_ptr,
114 const void **mask_ptr,
115 const void *supp_mask,
116 const void *def_mask,
118 struct rte_flow_error *error)
127 rte_flow_error_set(error, EINVAL,
128 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
133 if ((item->last != NULL || item->mask != NULL) && item->spec == NULL) {
134 rte_flow_error_set(error, EINVAL,
135 RTE_FLOW_ERROR_TYPE_ITEM, item,
136 "Mask or last is set without spec");
141 * If "mask" is not set, default mask is used,
142 * but if default mask is NULL, "mask" should be set
144 if (item->mask == NULL) {
145 if (def_mask == NULL) {
146 rte_flow_error_set(error, EINVAL,
147 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
148 "Mask should be specified");
164 * If field values in "last" are either 0 or equal to the corresponding
165 * values in "spec" then they are ignored
168 !sfc_flow_is_zero(last, size) &&
169 memcmp(last, spec, size) != 0) {
170 rte_flow_error_set(error, ENOTSUP,
171 RTE_FLOW_ERROR_TYPE_ITEM, item,
172 "Ranging is not supported");
176 if (supp_mask == NULL) {
177 rte_flow_error_set(error, EINVAL,
178 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
179 "Supported mask for item should be specified");
183 /* Check that mask does not ask for more match than supp_mask */
184 for (i = 0; i < size; i++) {
185 supp = ((const uint8_t *)supp_mask)[i];
187 if (~supp & mask[i]) {
188 rte_flow_error_set(error, ENOTSUP,
189 RTE_FLOW_ERROR_TYPE_ITEM, item,
190 "Item's field is not supported");
203 * Masking is not supported, so masks in items should be either
204 * full or empty (zeroed) and set only for supported fields which
205 * are specified in the supp_mask.
209 sfc_flow_parse_void(__rte_unused const struct rte_flow_item *item,
210 __rte_unused efx_filter_spec_t *efx_spec,
211 __rte_unused struct rte_flow_error *error)
217 * Convert Ethernet item to EFX filter specification.
220 * Item specification. Outer frame specification may only comprise
221 * source/destination addresses and Ethertype field.
222 * Inner frame specification may contain destination address only.
223 * There is support for individual/group mask as well as for empty and full.
224 * If the mask is NULL, default mask will be used. Ranging is not supported.
225 * @param efx_spec[in, out]
226 * EFX filter specification to update.
228 * Perform verbose error reporting if not NULL.
231 sfc_flow_parse_eth(const struct rte_flow_item *item,
232 efx_filter_spec_t *efx_spec,
233 struct rte_flow_error *error)
236 const struct rte_flow_item_eth *spec = NULL;
237 const struct rte_flow_item_eth *mask = NULL;
238 const struct rte_flow_item_eth supp_mask = {
239 .dst.addr_bytes = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
240 .src.addr_bytes = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
243 const struct rte_flow_item_eth ifrm_supp_mask = {
244 .dst.addr_bytes = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
246 const uint8_t ig_mask[EFX_MAC_ADDR_LEN] = {
247 0x01, 0x00, 0x00, 0x00, 0x00, 0x00
249 const struct rte_flow_item_eth *supp_mask_p;
250 const struct rte_flow_item_eth *def_mask_p;
251 uint8_t *loc_mac = NULL;
252 boolean_t is_ifrm = (efx_spec->efs_encap_type !=
253 EFX_TUNNEL_PROTOCOL_NONE);
256 supp_mask_p = &ifrm_supp_mask;
257 def_mask_p = &ifrm_supp_mask;
258 loc_mac = efx_spec->efs_ifrm_loc_mac;
260 supp_mask_p = &supp_mask;
261 def_mask_p = &rte_flow_item_eth_mask;
262 loc_mac = efx_spec->efs_loc_mac;
265 rc = sfc_flow_parse_init(item,
266 (const void **)&spec,
267 (const void **)&mask,
268 supp_mask_p, def_mask_p,
269 sizeof(struct rte_flow_item_eth),
274 /* If "spec" is not set, could be any Ethernet */
278 if (is_same_ether_addr(&mask->dst, &supp_mask.dst)) {
279 efx_spec->efs_match_flags |= is_ifrm ?
280 EFX_FILTER_MATCH_IFRM_LOC_MAC :
281 EFX_FILTER_MATCH_LOC_MAC;
282 rte_memcpy(loc_mac, spec->dst.addr_bytes,
284 } else if (memcmp(mask->dst.addr_bytes, ig_mask,
285 EFX_MAC_ADDR_LEN) == 0) {
286 if (is_unicast_ether_addr(&spec->dst))
287 efx_spec->efs_match_flags |= is_ifrm ?
288 EFX_FILTER_MATCH_IFRM_UNKNOWN_UCAST_DST :
289 EFX_FILTER_MATCH_UNKNOWN_UCAST_DST;
291 efx_spec->efs_match_flags |= is_ifrm ?
292 EFX_FILTER_MATCH_IFRM_UNKNOWN_MCAST_DST :
293 EFX_FILTER_MATCH_UNKNOWN_MCAST_DST;
294 } else if (!is_zero_ether_addr(&mask->dst)) {
299 * ifrm_supp_mask ensures that the source address and
300 * ethertype masks are equal to zero in inner frame,
301 * so these fields are filled in only for the outer frame
303 if (is_same_ether_addr(&mask->src, &supp_mask.src)) {
304 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_REM_MAC;
305 rte_memcpy(efx_spec->efs_rem_mac, spec->src.addr_bytes,
307 } else if (!is_zero_ether_addr(&mask->src)) {
312 * Ether type is in big-endian byte order in item and
313 * in little-endian in efx_spec, so byte swap is used
315 if (mask->type == supp_mask.type) {
316 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_ETHER_TYPE;
317 efx_spec->efs_ether_type = rte_bswap16(spec->type);
318 } else if (mask->type != 0) {
325 rte_flow_error_set(error, EINVAL,
326 RTE_FLOW_ERROR_TYPE_ITEM, item,
327 "Bad mask in the ETH pattern item");
332 * Convert VLAN item to EFX filter specification.
335 * Item specification. Only VID field is supported.
336 * The mask can not be NULL. Ranging is not supported.
337 * @param efx_spec[in, out]
338 * EFX filter specification to update.
340 * Perform verbose error reporting if not NULL.
343 sfc_flow_parse_vlan(const struct rte_flow_item *item,
344 efx_filter_spec_t *efx_spec,
345 struct rte_flow_error *error)
349 const struct rte_flow_item_vlan *spec = NULL;
350 const struct rte_flow_item_vlan *mask = NULL;
351 const struct rte_flow_item_vlan supp_mask = {
352 .tci = rte_cpu_to_be_16(ETH_VLAN_ID_MAX),
353 .inner_type = RTE_BE16(0xffff),
356 rc = sfc_flow_parse_init(item,
357 (const void **)&spec,
358 (const void **)&mask,
361 sizeof(struct rte_flow_item_vlan),
367 * VID is in big-endian byte order in item and
368 * in little-endian in efx_spec, so byte swap is used.
369 * If two VLAN items are included, the first matches
370 * the outer tag and the next matches the inner tag.
372 if (mask->tci == supp_mask.tci) {
373 vid = rte_bswap16(spec->tci);
375 if (!(efx_spec->efs_match_flags &
376 EFX_FILTER_MATCH_OUTER_VID)) {
377 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_OUTER_VID;
378 efx_spec->efs_outer_vid = vid;
379 } else if (!(efx_spec->efs_match_flags &
380 EFX_FILTER_MATCH_INNER_VID)) {
381 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_INNER_VID;
382 efx_spec->efs_inner_vid = vid;
384 rte_flow_error_set(error, EINVAL,
385 RTE_FLOW_ERROR_TYPE_ITEM, item,
386 "More than two VLAN items");
390 rte_flow_error_set(error, EINVAL,
391 RTE_FLOW_ERROR_TYPE_ITEM, item,
392 "VLAN ID in TCI match is required");
396 if (efx_spec->efs_match_flags & EFX_FILTER_MATCH_ETHER_TYPE) {
397 rte_flow_error_set(error, EINVAL,
398 RTE_FLOW_ERROR_TYPE_ITEM, item,
399 "VLAN TPID matching is not supported");
402 if (mask->inner_type == supp_mask.inner_type) {
403 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_ETHER_TYPE;
404 efx_spec->efs_ether_type = rte_bswap16(spec->inner_type);
405 } else if (mask->inner_type) {
406 rte_flow_error_set(error, EINVAL,
407 RTE_FLOW_ERROR_TYPE_ITEM, item,
408 "Bad mask for VLAN inner_type");
416 * Convert IPv4 item to EFX filter specification.
419 * Item specification. Only source and destination addresses and
420 * protocol fields are supported. If the mask is NULL, default
421 * mask will be used. Ranging is not supported.
422 * @param efx_spec[in, out]
423 * EFX filter specification to update.
425 * Perform verbose error reporting if not NULL.
428 sfc_flow_parse_ipv4(const struct rte_flow_item *item,
429 efx_filter_spec_t *efx_spec,
430 struct rte_flow_error *error)
433 const struct rte_flow_item_ipv4 *spec = NULL;
434 const struct rte_flow_item_ipv4 *mask = NULL;
435 const uint16_t ether_type_ipv4 = rte_cpu_to_le_16(EFX_ETHER_TYPE_IPV4);
436 const struct rte_flow_item_ipv4 supp_mask = {
438 .src_addr = 0xffffffff,
439 .dst_addr = 0xffffffff,
440 .next_proto_id = 0xff,
444 rc = sfc_flow_parse_init(item,
445 (const void **)&spec,
446 (const void **)&mask,
448 &rte_flow_item_ipv4_mask,
449 sizeof(struct rte_flow_item_ipv4),
455 * Filtering by IPv4 source and destination addresses requires
456 * the appropriate ETHER_TYPE in hardware filters
458 if (!(efx_spec->efs_match_flags & EFX_FILTER_MATCH_ETHER_TYPE)) {
459 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_ETHER_TYPE;
460 efx_spec->efs_ether_type = ether_type_ipv4;
461 } else if (efx_spec->efs_ether_type != ether_type_ipv4) {
462 rte_flow_error_set(error, EINVAL,
463 RTE_FLOW_ERROR_TYPE_ITEM, item,
464 "Ethertype in pattern with IPV4 item should be appropriate");
472 * IPv4 addresses are in big-endian byte order in item and in
475 if (mask->hdr.src_addr == supp_mask.hdr.src_addr) {
476 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_REM_HOST;
477 efx_spec->efs_rem_host.eo_u32[0] = spec->hdr.src_addr;
478 } else if (mask->hdr.src_addr != 0) {
482 if (mask->hdr.dst_addr == supp_mask.hdr.dst_addr) {
483 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_LOC_HOST;
484 efx_spec->efs_loc_host.eo_u32[0] = spec->hdr.dst_addr;
485 } else if (mask->hdr.dst_addr != 0) {
489 if (mask->hdr.next_proto_id == supp_mask.hdr.next_proto_id) {
490 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_IP_PROTO;
491 efx_spec->efs_ip_proto = spec->hdr.next_proto_id;
492 } else if (mask->hdr.next_proto_id != 0) {
499 rte_flow_error_set(error, EINVAL,
500 RTE_FLOW_ERROR_TYPE_ITEM, item,
501 "Bad mask in the IPV4 pattern item");
506 * Convert IPv6 item to EFX filter specification.
509 * Item specification. Only source and destination addresses and
510 * next header fields are supported. If the mask is NULL, default
511 * mask will be used. Ranging is not supported.
512 * @param efx_spec[in, out]
513 * EFX filter specification to update.
515 * Perform verbose error reporting if not NULL.
518 sfc_flow_parse_ipv6(const struct rte_flow_item *item,
519 efx_filter_spec_t *efx_spec,
520 struct rte_flow_error *error)
523 const struct rte_flow_item_ipv6 *spec = NULL;
524 const struct rte_flow_item_ipv6 *mask = NULL;
525 const uint16_t ether_type_ipv6 = rte_cpu_to_le_16(EFX_ETHER_TYPE_IPV6);
526 const struct rte_flow_item_ipv6 supp_mask = {
528 .src_addr = { 0xff, 0xff, 0xff, 0xff,
529 0xff, 0xff, 0xff, 0xff,
530 0xff, 0xff, 0xff, 0xff,
531 0xff, 0xff, 0xff, 0xff },
532 .dst_addr = { 0xff, 0xff, 0xff, 0xff,
533 0xff, 0xff, 0xff, 0xff,
534 0xff, 0xff, 0xff, 0xff,
535 0xff, 0xff, 0xff, 0xff },
540 rc = sfc_flow_parse_init(item,
541 (const void **)&spec,
542 (const void **)&mask,
544 &rte_flow_item_ipv6_mask,
545 sizeof(struct rte_flow_item_ipv6),
551 * Filtering by IPv6 source and destination addresses requires
552 * the appropriate ETHER_TYPE in hardware filters
554 if (!(efx_spec->efs_match_flags & EFX_FILTER_MATCH_ETHER_TYPE)) {
555 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_ETHER_TYPE;
556 efx_spec->efs_ether_type = ether_type_ipv6;
557 } else if (efx_spec->efs_ether_type != ether_type_ipv6) {
558 rte_flow_error_set(error, EINVAL,
559 RTE_FLOW_ERROR_TYPE_ITEM, item,
560 "Ethertype in pattern with IPV6 item should be appropriate");
568 * IPv6 addresses are in big-endian byte order in item and in
571 if (memcmp(mask->hdr.src_addr, supp_mask.hdr.src_addr,
572 sizeof(mask->hdr.src_addr)) == 0) {
573 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_REM_HOST;
575 RTE_BUILD_BUG_ON(sizeof(efx_spec->efs_rem_host) !=
576 sizeof(spec->hdr.src_addr));
577 rte_memcpy(&efx_spec->efs_rem_host, spec->hdr.src_addr,
578 sizeof(efx_spec->efs_rem_host));
579 } else if (!sfc_flow_is_zero(mask->hdr.src_addr,
580 sizeof(mask->hdr.src_addr))) {
584 if (memcmp(mask->hdr.dst_addr, supp_mask.hdr.dst_addr,
585 sizeof(mask->hdr.dst_addr)) == 0) {
586 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_LOC_HOST;
588 RTE_BUILD_BUG_ON(sizeof(efx_spec->efs_loc_host) !=
589 sizeof(spec->hdr.dst_addr));
590 rte_memcpy(&efx_spec->efs_loc_host, spec->hdr.dst_addr,
591 sizeof(efx_spec->efs_loc_host));
592 } else if (!sfc_flow_is_zero(mask->hdr.dst_addr,
593 sizeof(mask->hdr.dst_addr))) {
597 if (mask->hdr.proto == supp_mask.hdr.proto) {
598 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_IP_PROTO;
599 efx_spec->efs_ip_proto = spec->hdr.proto;
600 } else if (mask->hdr.proto != 0) {
607 rte_flow_error_set(error, EINVAL,
608 RTE_FLOW_ERROR_TYPE_ITEM, item,
609 "Bad mask in the IPV6 pattern item");
614 * Convert TCP item to EFX filter specification.
617 * Item specification. Only source and destination ports fields
618 * are supported. If the mask is NULL, default mask will be used.
619 * Ranging is not supported.
620 * @param efx_spec[in, out]
621 * EFX filter specification to update.
623 * Perform verbose error reporting if not NULL.
626 sfc_flow_parse_tcp(const struct rte_flow_item *item,
627 efx_filter_spec_t *efx_spec,
628 struct rte_flow_error *error)
631 const struct rte_flow_item_tcp *spec = NULL;
632 const struct rte_flow_item_tcp *mask = NULL;
633 const struct rte_flow_item_tcp supp_mask = {
640 rc = sfc_flow_parse_init(item,
641 (const void **)&spec,
642 (const void **)&mask,
644 &rte_flow_item_tcp_mask,
645 sizeof(struct rte_flow_item_tcp),
651 * Filtering by TCP source and destination ports requires
652 * the appropriate IP_PROTO in hardware filters
654 if (!(efx_spec->efs_match_flags & EFX_FILTER_MATCH_IP_PROTO)) {
655 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_IP_PROTO;
656 efx_spec->efs_ip_proto = EFX_IPPROTO_TCP;
657 } else if (efx_spec->efs_ip_proto != EFX_IPPROTO_TCP) {
658 rte_flow_error_set(error, EINVAL,
659 RTE_FLOW_ERROR_TYPE_ITEM, item,
660 "IP proto in pattern with TCP item should be appropriate");
668 * Source and destination ports are in big-endian byte order in item and
669 * in little-endian in efx_spec, so byte swap is used
671 if (mask->hdr.src_port == supp_mask.hdr.src_port) {
672 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_REM_PORT;
673 efx_spec->efs_rem_port = rte_bswap16(spec->hdr.src_port);
674 } else if (mask->hdr.src_port != 0) {
678 if (mask->hdr.dst_port == supp_mask.hdr.dst_port) {
679 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_LOC_PORT;
680 efx_spec->efs_loc_port = rte_bswap16(spec->hdr.dst_port);
681 } else if (mask->hdr.dst_port != 0) {
688 rte_flow_error_set(error, EINVAL,
689 RTE_FLOW_ERROR_TYPE_ITEM, item,
690 "Bad mask in the TCP pattern item");
695 * Convert UDP item to EFX filter specification.
698 * Item specification. Only source and destination ports fields
699 * are supported. If the mask is NULL, default mask will be used.
700 * Ranging is not supported.
701 * @param efx_spec[in, out]
702 * EFX filter specification to update.
704 * Perform verbose error reporting if not NULL.
707 sfc_flow_parse_udp(const struct rte_flow_item *item,
708 efx_filter_spec_t *efx_spec,
709 struct rte_flow_error *error)
712 const struct rte_flow_item_udp *spec = NULL;
713 const struct rte_flow_item_udp *mask = NULL;
714 const struct rte_flow_item_udp supp_mask = {
721 rc = sfc_flow_parse_init(item,
722 (const void **)&spec,
723 (const void **)&mask,
725 &rte_flow_item_udp_mask,
726 sizeof(struct rte_flow_item_udp),
732 * Filtering by UDP source and destination ports requires
733 * the appropriate IP_PROTO in hardware filters
735 if (!(efx_spec->efs_match_flags & EFX_FILTER_MATCH_IP_PROTO)) {
736 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_IP_PROTO;
737 efx_spec->efs_ip_proto = EFX_IPPROTO_UDP;
738 } else if (efx_spec->efs_ip_proto != EFX_IPPROTO_UDP) {
739 rte_flow_error_set(error, EINVAL,
740 RTE_FLOW_ERROR_TYPE_ITEM, item,
741 "IP proto in pattern with UDP item should be appropriate");
749 * Source and destination ports are in big-endian byte order in item and
750 * in little-endian in efx_spec, so byte swap is used
752 if (mask->hdr.src_port == supp_mask.hdr.src_port) {
753 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_REM_PORT;
754 efx_spec->efs_rem_port = rte_bswap16(spec->hdr.src_port);
755 } else if (mask->hdr.src_port != 0) {
759 if (mask->hdr.dst_port == supp_mask.hdr.dst_port) {
760 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_LOC_PORT;
761 efx_spec->efs_loc_port = rte_bswap16(spec->hdr.dst_port);
762 } else if (mask->hdr.dst_port != 0) {
769 rte_flow_error_set(error, EINVAL,
770 RTE_FLOW_ERROR_TYPE_ITEM, item,
771 "Bad mask in the UDP pattern item");
776 * Filters for encapsulated packets match based on the EtherType and IP
777 * protocol in the outer frame.
780 sfc_flow_set_match_flags_for_encap_pkts(const struct rte_flow_item *item,
781 efx_filter_spec_t *efx_spec,
783 struct rte_flow_error *error)
785 if (!(efx_spec->efs_match_flags & EFX_FILTER_MATCH_IP_PROTO)) {
786 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_IP_PROTO;
787 efx_spec->efs_ip_proto = ip_proto;
788 } else if (efx_spec->efs_ip_proto != ip_proto) {
790 case EFX_IPPROTO_UDP:
791 rte_flow_error_set(error, EINVAL,
792 RTE_FLOW_ERROR_TYPE_ITEM, item,
793 "Outer IP header protocol must be UDP "
794 "in VxLAN/GENEVE pattern");
797 case EFX_IPPROTO_GRE:
798 rte_flow_error_set(error, EINVAL,
799 RTE_FLOW_ERROR_TYPE_ITEM, item,
800 "Outer IP header protocol must be GRE "
805 rte_flow_error_set(error, EINVAL,
806 RTE_FLOW_ERROR_TYPE_ITEM, item,
807 "Only VxLAN/GENEVE/NVGRE tunneling patterns "
813 if (efx_spec->efs_match_flags & EFX_FILTER_MATCH_ETHER_TYPE &&
814 efx_spec->efs_ether_type != EFX_ETHER_TYPE_IPV4 &&
815 efx_spec->efs_ether_type != EFX_ETHER_TYPE_IPV6) {
816 rte_flow_error_set(error, EINVAL,
817 RTE_FLOW_ERROR_TYPE_ITEM, item,
818 "Outer frame EtherType in pattern with tunneling "
819 "must be IPv4 or IPv6");
827 sfc_flow_set_efx_spec_vni_or_vsid(efx_filter_spec_t *efx_spec,
828 const uint8_t *vni_or_vsid_val,
829 const uint8_t *vni_or_vsid_mask,
830 const struct rte_flow_item *item,
831 struct rte_flow_error *error)
833 const uint8_t vni_or_vsid_full_mask[EFX_VNI_OR_VSID_LEN] = {
837 if (memcmp(vni_or_vsid_mask, vni_or_vsid_full_mask,
838 EFX_VNI_OR_VSID_LEN) == 0) {
839 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_VNI_OR_VSID;
840 rte_memcpy(efx_spec->efs_vni_or_vsid, vni_or_vsid_val,
841 EFX_VNI_OR_VSID_LEN);
842 } else if (!sfc_flow_is_zero(vni_or_vsid_mask, EFX_VNI_OR_VSID_LEN)) {
843 rte_flow_error_set(error, EINVAL,
844 RTE_FLOW_ERROR_TYPE_ITEM, item,
845 "Unsupported VNI/VSID mask");
853 * Convert VXLAN item to EFX filter specification.
856 * Item specification. Only VXLAN network identifier field is supported.
857 * If the mask is NULL, default mask will be used.
858 * Ranging is not supported.
859 * @param efx_spec[in, out]
860 * EFX filter specification to update.
862 * Perform verbose error reporting if not NULL.
865 sfc_flow_parse_vxlan(const struct rte_flow_item *item,
866 efx_filter_spec_t *efx_spec,
867 struct rte_flow_error *error)
870 const struct rte_flow_item_vxlan *spec = NULL;
871 const struct rte_flow_item_vxlan *mask = NULL;
872 const struct rte_flow_item_vxlan supp_mask = {
873 .vni = { 0xff, 0xff, 0xff }
876 rc = sfc_flow_parse_init(item,
877 (const void **)&spec,
878 (const void **)&mask,
880 &rte_flow_item_vxlan_mask,
881 sizeof(struct rte_flow_item_vxlan),
886 rc = sfc_flow_set_match_flags_for_encap_pkts(item, efx_spec,
887 EFX_IPPROTO_UDP, error);
891 efx_spec->efs_encap_type = EFX_TUNNEL_PROTOCOL_VXLAN;
892 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_ENCAP_TYPE;
897 rc = sfc_flow_set_efx_spec_vni_or_vsid(efx_spec, spec->vni,
898 mask->vni, item, error);
904 * Convert GENEVE item to EFX filter specification.
907 * Item specification. Only Virtual Network Identifier and protocol type
908 * fields are supported. But protocol type can be only Ethernet (0x6558).
909 * If the mask is NULL, default mask will be used.
910 * Ranging is not supported.
911 * @param efx_spec[in, out]
912 * EFX filter specification to update.
914 * Perform verbose error reporting if not NULL.
917 sfc_flow_parse_geneve(const struct rte_flow_item *item,
918 efx_filter_spec_t *efx_spec,
919 struct rte_flow_error *error)
922 const struct rte_flow_item_geneve *spec = NULL;
923 const struct rte_flow_item_geneve *mask = NULL;
924 const struct rte_flow_item_geneve supp_mask = {
925 .protocol = RTE_BE16(0xffff),
926 .vni = { 0xff, 0xff, 0xff }
929 rc = sfc_flow_parse_init(item,
930 (const void **)&spec,
931 (const void **)&mask,
933 &rte_flow_item_geneve_mask,
934 sizeof(struct rte_flow_item_geneve),
939 rc = sfc_flow_set_match_flags_for_encap_pkts(item, efx_spec,
940 EFX_IPPROTO_UDP, error);
944 efx_spec->efs_encap_type = EFX_TUNNEL_PROTOCOL_GENEVE;
945 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_ENCAP_TYPE;
950 if (mask->protocol == supp_mask.protocol) {
951 if (spec->protocol != rte_cpu_to_be_16(ETHER_TYPE_TEB)) {
952 rte_flow_error_set(error, EINVAL,
953 RTE_FLOW_ERROR_TYPE_ITEM, item,
954 "GENEVE encap. protocol must be Ethernet "
955 "(0x6558) in the GENEVE pattern item");
958 } else if (mask->protocol != 0) {
959 rte_flow_error_set(error, EINVAL,
960 RTE_FLOW_ERROR_TYPE_ITEM, item,
961 "Unsupported mask for GENEVE encap. protocol");
965 rc = sfc_flow_set_efx_spec_vni_or_vsid(efx_spec, spec->vni,
966 mask->vni, item, error);
972 * Convert NVGRE item to EFX filter specification.
975 * Item specification. Only virtual subnet ID field is supported.
976 * If the mask is NULL, default mask will be used.
977 * Ranging is not supported.
978 * @param efx_spec[in, out]
979 * EFX filter specification to update.
981 * Perform verbose error reporting if not NULL.
984 sfc_flow_parse_nvgre(const struct rte_flow_item *item,
985 efx_filter_spec_t *efx_spec,
986 struct rte_flow_error *error)
989 const struct rte_flow_item_nvgre *spec = NULL;
990 const struct rte_flow_item_nvgre *mask = NULL;
991 const struct rte_flow_item_nvgre supp_mask = {
992 .tni = { 0xff, 0xff, 0xff }
995 rc = sfc_flow_parse_init(item,
996 (const void **)&spec,
997 (const void **)&mask,
999 &rte_flow_item_nvgre_mask,
1000 sizeof(struct rte_flow_item_nvgre),
1005 rc = sfc_flow_set_match_flags_for_encap_pkts(item, efx_spec,
1006 EFX_IPPROTO_GRE, error);
1010 efx_spec->efs_encap_type = EFX_TUNNEL_PROTOCOL_NVGRE;
1011 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_ENCAP_TYPE;
1016 rc = sfc_flow_set_efx_spec_vni_or_vsid(efx_spec, spec->tni,
1017 mask->tni, item, error);
1022 static const struct sfc_flow_item sfc_flow_items[] = {
1024 .type = RTE_FLOW_ITEM_TYPE_VOID,
1025 .prev_layer = SFC_FLOW_ITEM_ANY_LAYER,
1026 .layer = SFC_FLOW_ITEM_ANY_LAYER,
1027 .parse = sfc_flow_parse_void,
1030 .type = RTE_FLOW_ITEM_TYPE_ETH,
1031 .prev_layer = SFC_FLOW_ITEM_START_LAYER,
1032 .layer = SFC_FLOW_ITEM_L2,
1033 .parse = sfc_flow_parse_eth,
1036 .type = RTE_FLOW_ITEM_TYPE_VLAN,
1037 .prev_layer = SFC_FLOW_ITEM_L2,
1038 .layer = SFC_FLOW_ITEM_L2,
1039 .parse = sfc_flow_parse_vlan,
1042 .type = RTE_FLOW_ITEM_TYPE_IPV4,
1043 .prev_layer = SFC_FLOW_ITEM_L2,
1044 .layer = SFC_FLOW_ITEM_L3,
1045 .parse = sfc_flow_parse_ipv4,
1048 .type = RTE_FLOW_ITEM_TYPE_IPV6,
1049 .prev_layer = SFC_FLOW_ITEM_L2,
1050 .layer = SFC_FLOW_ITEM_L3,
1051 .parse = sfc_flow_parse_ipv6,
1054 .type = RTE_FLOW_ITEM_TYPE_TCP,
1055 .prev_layer = SFC_FLOW_ITEM_L3,
1056 .layer = SFC_FLOW_ITEM_L4,
1057 .parse = sfc_flow_parse_tcp,
1060 .type = RTE_FLOW_ITEM_TYPE_UDP,
1061 .prev_layer = SFC_FLOW_ITEM_L3,
1062 .layer = SFC_FLOW_ITEM_L4,
1063 .parse = sfc_flow_parse_udp,
1066 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
1067 .prev_layer = SFC_FLOW_ITEM_L4,
1068 .layer = SFC_FLOW_ITEM_START_LAYER,
1069 .parse = sfc_flow_parse_vxlan,
1072 .type = RTE_FLOW_ITEM_TYPE_GENEVE,
1073 .prev_layer = SFC_FLOW_ITEM_L4,
1074 .layer = SFC_FLOW_ITEM_START_LAYER,
1075 .parse = sfc_flow_parse_geneve,
1078 .type = RTE_FLOW_ITEM_TYPE_NVGRE,
1079 .prev_layer = SFC_FLOW_ITEM_L3,
1080 .layer = SFC_FLOW_ITEM_START_LAYER,
1081 .parse = sfc_flow_parse_nvgre,
1086 * Protocol-independent flow API support
1089 sfc_flow_parse_attr(const struct rte_flow_attr *attr,
1090 struct rte_flow *flow,
1091 struct rte_flow_error *error)
1094 rte_flow_error_set(error, EINVAL,
1095 RTE_FLOW_ERROR_TYPE_ATTR, NULL,
1099 if (attr->group != 0) {
1100 rte_flow_error_set(error, ENOTSUP,
1101 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, attr,
1102 "Groups are not supported");
1105 if (attr->priority != 0) {
1106 rte_flow_error_set(error, ENOTSUP,
1107 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY, attr,
1108 "Priorities are not supported");
1111 if (attr->egress != 0) {
1112 rte_flow_error_set(error, ENOTSUP,
1113 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attr,
1114 "Egress is not supported");
1117 if (attr->transfer != 0) {
1118 rte_flow_error_set(error, ENOTSUP,
1119 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER, attr,
1120 "Transfer is not supported");
1123 if (attr->ingress == 0) {
1124 rte_flow_error_set(error, ENOTSUP,
1125 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS, attr,
1126 "Only ingress is supported");
1130 flow->spec.template.efs_flags |= EFX_FILTER_FLAG_RX;
1131 flow->spec.template.efs_rss_context = EFX_RSS_CONTEXT_DEFAULT;
1136 /* Get item from array sfc_flow_items */
1137 static const struct sfc_flow_item *
1138 sfc_flow_get_item(enum rte_flow_item_type type)
1142 for (i = 0; i < RTE_DIM(sfc_flow_items); i++)
1143 if (sfc_flow_items[i].type == type)
1144 return &sfc_flow_items[i];
1150 sfc_flow_parse_pattern(const struct rte_flow_item pattern[],
1151 struct rte_flow *flow,
1152 struct rte_flow_error *error)
1155 unsigned int prev_layer = SFC_FLOW_ITEM_ANY_LAYER;
1156 boolean_t is_ifrm = B_FALSE;
1157 const struct sfc_flow_item *item;
1159 if (pattern == NULL) {
1160 rte_flow_error_set(error, EINVAL,
1161 RTE_FLOW_ERROR_TYPE_ITEM_NUM, NULL,
1166 for (; pattern->type != RTE_FLOW_ITEM_TYPE_END; pattern++) {
1167 item = sfc_flow_get_item(pattern->type);
1169 rte_flow_error_set(error, ENOTSUP,
1170 RTE_FLOW_ERROR_TYPE_ITEM, pattern,
1171 "Unsupported pattern item");
1176 * Omitting one or several protocol layers at the beginning
1177 * of pattern is supported
1179 if (item->prev_layer != SFC_FLOW_ITEM_ANY_LAYER &&
1180 prev_layer != SFC_FLOW_ITEM_ANY_LAYER &&
1181 item->prev_layer != prev_layer) {
1182 rte_flow_error_set(error, ENOTSUP,
1183 RTE_FLOW_ERROR_TYPE_ITEM, pattern,
1184 "Unexpected sequence of pattern items");
1189 * Allow only VOID and ETH pattern items in the inner frame.
1190 * Also check that there is only one tunneling protocol.
1192 switch (item->type) {
1193 case RTE_FLOW_ITEM_TYPE_VOID:
1194 case RTE_FLOW_ITEM_TYPE_ETH:
1197 case RTE_FLOW_ITEM_TYPE_VXLAN:
1198 case RTE_FLOW_ITEM_TYPE_GENEVE:
1199 case RTE_FLOW_ITEM_TYPE_NVGRE:
1201 rte_flow_error_set(error, EINVAL,
1202 RTE_FLOW_ERROR_TYPE_ITEM,
1204 "More than one tunneling protocol");
1212 rte_flow_error_set(error, EINVAL,
1213 RTE_FLOW_ERROR_TYPE_ITEM,
1215 "There is an unsupported pattern item "
1216 "in the inner frame");
1222 rc = item->parse(pattern, &flow->spec.template, error);
1226 if (item->layer != SFC_FLOW_ITEM_ANY_LAYER)
1227 prev_layer = item->layer;
1234 sfc_flow_parse_queue(struct sfc_adapter *sa,
1235 const struct rte_flow_action_queue *queue,
1236 struct rte_flow *flow)
1238 struct sfc_rxq *rxq;
1240 if (queue->index >= sa->rxq_count)
1243 rxq = sa->rxq_info[queue->index].rxq;
1244 flow->spec.template.efs_dmaq_id = (uint16_t)rxq->hw_index;
1250 sfc_flow_parse_rss(struct sfc_adapter *sa,
1251 const struct rte_flow_action_rss *action_rss,
1252 struct rte_flow *flow)
1254 struct sfc_rss *rss = &sa->rss;
1255 unsigned int rxq_sw_index;
1256 struct sfc_rxq *rxq;
1257 unsigned int rxq_hw_index_min;
1258 unsigned int rxq_hw_index_max;
1259 efx_rx_hash_type_t efx_hash_types;
1260 const uint8_t *rss_key;
1261 struct sfc_flow_rss *sfc_rss_conf = &flow->rss_conf;
1264 if (action_rss->queue_num == 0)
1267 rxq_sw_index = sa->rxq_count - 1;
1268 rxq = sa->rxq_info[rxq_sw_index].rxq;
1269 rxq_hw_index_min = rxq->hw_index;
1270 rxq_hw_index_max = 0;
1272 for (i = 0; i < action_rss->queue_num; ++i) {
1273 rxq_sw_index = action_rss->queue[i];
1275 if (rxq_sw_index >= sa->rxq_count)
1278 rxq = sa->rxq_info[rxq_sw_index].rxq;
1280 if (rxq->hw_index < rxq_hw_index_min)
1281 rxq_hw_index_min = rxq->hw_index;
1283 if (rxq->hw_index > rxq_hw_index_max)
1284 rxq_hw_index_max = rxq->hw_index;
1287 switch (action_rss->func) {
1288 case RTE_ETH_HASH_FUNCTION_DEFAULT:
1289 case RTE_ETH_HASH_FUNCTION_TOEPLITZ:
1295 if (action_rss->level)
1299 * Dummy RSS action with only one queue and no specific settings
1300 * for hash types and key does not require dedicated RSS context
1301 * and may be simplified to single queue action.
1303 if (action_rss->queue_num == 1 && action_rss->types == 0 &&
1304 action_rss->key_len == 0) {
1305 flow->spec.template.efs_dmaq_id = rxq_hw_index_min;
1309 if (action_rss->types) {
1312 rc = sfc_rx_hf_rte_to_efx(sa, action_rss->types,
1320 for (i = 0; i < rss->hf_map_nb_entries; ++i)
1321 efx_hash_types |= rss->hf_map[i].efx;
1324 if (action_rss->key_len) {
1325 if (action_rss->key_len != sizeof(rss->key))
1328 rss_key = action_rss->key;
1335 sfc_rss_conf->rxq_hw_index_min = rxq_hw_index_min;
1336 sfc_rss_conf->rxq_hw_index_max = rxq_hw_index_max;
1337 sfc_rss_conf->rss_hash_types = efx_hash_types;
1338 rte_memcpy(sfc_rss_conf->rss_key, rss_key, sizeof(rss->key));
1340 for (i = 0; i < RTE_DIM(sfc_rss_conf->rss_tbl); ++i) {
1341 unsigned int nb_queues = action_rss->queue_num;
1342 unsigned int rxq_sw_index = action_rss->queue[i % nb_queues];
1343 struct sfc_rxq *rxq = sa->rxq_info[rxq_sw_index].rxq;
1345 sfc_rss_conf->rss_tbl[i] = rxq->hw_index - rxq_hw_index_min;
1352 sfc_flow_spec_flush(struct sfc_adapter *sa, struct sfc_flow_spec *spec,
1353 unsigned int filters_count)
1358 for (i = 0; i < filters_count; i++) {
1361 rc = efx_filter_remove(sa->nic, &spec->filters[i]);
1362 if (ret == 0 && rc != 0) {
1363 sfc_err(sa, "failed to remove filter specification "
1373 sfc_flow_spec_insert(struct sfc_adapter *sa, struct sfc_flow_spec *spec)
1378 for (i = 0; i < spec->count; i++) {
1379 rc = efx_filter_insert(sa->nic, &spec->filters[i]);
1381 sfc_flow_spec_flush(sa, spec, i);
1390 sfc_flow_spec_remove(struct sfc_adapter *sa, struct sfc_flow_spec *spec)
1392 return sfc_flow_spec_flush(sa, spec, spec->count);
1396 sfc_flow_filter_insert(struct sfc_adapter *sa,
1397 struct rte_flow *flow)
1399 struct sfc_rss *rss = &sa->rss;
1400 struct sfc_flow_rss *flow_rss = &flow->rss_conf;
1401 uint32_t efs_rss_context = EFX_RSS_CONTEXT_DEFAULT;
1406 unsigned int rss_spread = MIN(flow_rss->rxq_hw_index_max -
1407 flow_rss->rxq_hw_index_min + 1,
1410 rc = efx_rx_scale_context_alloc(sa->nic,
1411 EFX_RX_SCALE_EXCLUSIVE,
1415 goto fail_scale_context_alloc;
1417 rc = efx_rx_scale_mode_set(sa->nic, efs_rss_context,
1419 flow_rss->rss_hash_types, B_TRUE);
1421 goto fail_scale_mode_set;
1423 rc = efx_rx_scale_key_set(sa->nic, efs_rss_context,
1427 goto fail_scale_key_set;
1430 * At this point, fully elaborated filter specifications
1431 * have been produced from the template. To make sure that
1432 * RSS behaviour is consistent between them, set the same
1433 * RSS context value everywhere.
1435 for (i = 0; i < flow->spec.count; i++) {
1436 efx_filter_spec_t *spec = &flow->spec.filters[i];
1438 spec->efs_rss_context = efs_rss_context;
1439 spec->efs_dmaq_id = flow_rss->rxq_hw_index_min;
1440 spec->efs_flags |= EFX_FILTER_FLAG_RX_RSS;
1444 rc = sfc_flow_spec_insert(sa, &flow->spec);
1446 goto fail_filter_insert;
1450 * Scale table is set after filter insertion because
1451 * the table entries are relative to the base RxQ ID
1452 * and the latter is submitted to the HW by means of
1453 * inserting a filter, so by the time of the request
1454 * the HW knows all the information needed to verify
1455 * the table entries, and the operation will succeed
1457 rc = efx_rx_scale_tbl_set(sa->nic, efs_rss_context,
1459 RTE_DIM(flow_rss->rss_tbl));
1461 goto fail_scale_tbl_set;
1467 sfc_flow_spec_remove(sa, &flow->spec);
1471 fail_scale_mode_set:
1472 if (efs_rss_context != EFX_RSS_CONTEXT_DEFAULT)
1473 efx_rx_scale_context_free(sa->nic, efs_rss_context);
1475 fail_scale_context_alloc:
1480 sfc_flow_filter_remove(struct sfc_adapter *sa,
1481 struct rte_flow *flow)
1485 rc = sfc_flow_spec_remove(sa, &flow->spec);
1491 * All specifications for a given flow rule have the same RSS
1492 * context, so that RSS context value is taken from the first
1493 * filter specification
1495 efx_filter_spec_t *spec = &flow->spec.filters[0];
1497 rc = efx_rx_scale_context_free(sa->nic, spec->efs_rss_context);
1504 sfc_flow_parse_actions(struct sfc_adapter *sa,
1505 const struct rte_flow_action actions[],
1506 struct rte_flow *flow,
1507 struct rte_flow_error *error)
1510 boolean_t is_specified = B_FALSE;
1512 if (actions == NULL) {
1513 rte_flow_error_set(error, EINVAL,
1514 RTE_FLOW_ERROR_TYPE_ACTION_NUM, NULL,
1519 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
1520 /* This one may appear anywhere multiple times. */
1521 if (actions->type == RTE_FLOW_ACTION_TYPE_VOID)
1523 /* Fate-deciding actions may appear exactly once. */
1526 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
1528 "Cannot combine several fate-deciding actions,"
1529 "choose between QUEUE, RSS or DROP");
1532 switch (actions->type) {
1533 case RTE_FLOW_ACTION_TYPE_QUEUE:
1534 rc = sfc_flow_parse_queue(sa, actions->conf, flow);
1536 rte_flow_error_set(error, EINVAL,
1537 RTE_FLOW_ERROR_TYPE_ACTION, actions,
1538 "Bad QUEUE action");
1542 is_specified = B_TRUE;
1545 case RTE_FLOW_ACTION_TYPE_RSS:
1546 rc = sfc_flow_parse_rss(sa, actions->conf, flow);
1548 rte_flow_error_set(error, rc,
1549 RTE_FLOW_ERROR_TYPE_ACTION, actions,
1554 is_specified = B_TRUE;
1557 case RTE_FLOW_ACTION_TYPE_DROP:
1558 flow->spec.template.efs_dmaq_id =
1559 EFX_FILTER_SPEC_RX_DMAQ_ID_DROP;
1561 is_specified = B_TRUE;
1565 rte_flow_error_set(error, ENOTSUP,
1566 RTE_FLOW_ERROR_TYPE_ACTION, actions,
1567 "Action is not supported");
1572 /* When fate is unknown, drop traffic. */
1573 if (!is_specified) {
1574 flow->spec.template.efs_dmaq_id =
1575 EFX_FILTER_SPEC_RX_DMAQ_ID_DROP;
1582 * Set the EFX_FILTER_MATCH_UNKNOWN_UCAST_DST
1583 * and EFX_FILTER_MATCH_UNKNOWN_MCAST_DST match flags in the same
1584 * specifications after copying.
1586 * @param spec[in, out]
1587 * SFC flow specification to update.
1588 * @param filters_count_for_one_val[in]
1589 * How many specifications should have the same match flag, what is the
1590 * number of specifications before copying.
1592 * Perform verbose error reporting if not NULL.
1595 sfc_flow_set_unknown_dst_flags(struct sfc_flow_spec *spec,
1596 unsigned int filters_count_for_one_val,
1597 struct rte_flow_error *error)
1600 static const efx_filter_match_flags_t vals[] = {
1601 EFX_FILTER_MATCH_UNKNOWN_UCAST_DST,
1602 EFX_FILTER_MATCH_UNKNOWN_MCAST_DST
1605 if (filters_count_for_one_val * RTE_DIM(vals) != spec->count) {
1606 rte_flow_error_set(error, EINVAL,
1607 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1608 "Number of specifications is incorrect while copying "
1609 "by unknown destination flags");
1613 for (i = 0; i < spec->count; i++) {
1614 /* The check above ensures that divisor can't be zero here */
1615 spec->filters[i].efs_match_flags |=
1616 vals[i / filters_count_for_one_val];
1623 * Check that the following conditions are met:
1624 * - the list of supported filters has a filter
1625 * with EFX_FILTER_MATCH_UNKNOWN_MCAST_DST flag instead of
1626 * EFX_FILTER_MATCH_UNKNOWN_UCAST_DST, since this filter will also
1630 * The match flags of filter.
1632 * Specification to be supplemented.
1634 * SFC filter with list of supported filters.
1637 sfc_flow_check_unknown_dst_flags(efx_filter_match_flags_t match,
1638 __rte_unused efx_filter_spec_t *spec,
1639 struct sfc_filter *filter)
1642 efx_filter_match_flags_t match_mcast_dst;
1645 (match & ~EFX_FILTER_MATCH_UNKNOWN_UCAST_DST) |
1646 EFX_FILTER_MATCH_UNKNOWN_MCAST_DST;
1647 for (i = 0; i < filter->supported_match_num; i++) {
1648 if (match_mcast_dst == filter->supported_match[i])
1656 * Set the EFX_FILTER_MATCH_ETHER_TYPE match flag and EFX_ETHER_TYPE_IPV4 and
1657 * EFX_ETHER_TYPE_IPV6 values of the corresponding field in the same
1658 * specifications after copying.
1660 * @param spec[in, out]
1661 * SFC flow specification to update.
1662 * @param filters_count_for_one_val[in]
1663 * How many specifications should have the same EtherType value, what is the
1664 * number of specifications before copying.
1666 * Perform verbose error reporting if not NULL.
1669 sfc_flow_set_ethertypes(struct sfc_flow_spec *spec,
1670 unsigned int filters_count_for_one_val,
1671 struct rte_flow_error *error)
1674 static const uint16_t vals[] = {
1675 EFX_ETHER_TYPE_IPV4, EFX_ETHER_TYPE_IPV6
1678 if (filters_count_for_one_val * RTE_DIM(vals) != spec->count) {
1679 rte_flow_error_set(error, EINVAL,
1680 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1681 "Number of specifications is incorrect "
1682 "while copying by Ethertype");
1686 for (i = 0; i < spec->count; i++) {
1687 spec->filters[i].efs_match_flags |=
1688 EFX_FILTER_MATCH_ETHER_TYPE;
1691 * The check above ensures that
1692 * filters_count_for_one_val is not 0
1694 spec->filters[i].efs_ether_type =
1695 vals[i / filters_count_for_one_val];
1702 * Set the EFX_FILTER_MATCH_IFRM_UNKNOWN_UCAST_DST and
1703 * EFX_FILTER_MATCH_IFRM_UNKNOWN_MCAST_DST match flags in the same
1704 * specifications after copying.
1706 * @param spec[in, out]
1707 * SFC flow specification to update.
1708 * @param filters_count_for_one_val[in]
1709 * How many specifications should have the same match flag, what is the
1710 * number of specifications before copying.
1712 * Perform verbose error reporting if not NULL.
1715 sfc_flow_set_ifrm_unknown_dst_flags(struct sfc_flow_spec *spec,
1716 unsigned int filters_count_for_one_val,
1717 struct rte_flow_error *error)
1720 static const efx_filter_match_flags_t vals[] = {
1721 EFX_FILTER_MATCH_IFRM_UNKNOWN_UCAST_DST,
1722 EFX_FILTER_MATCH_IFRM_UNKNOWN_MCAST_DST
1725 if (filters_count_for_one_val * RTE_DIM(vals) != spec->count) {
1726 rte_flow_error_set(error, EINVAL,
1727 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1728 "Number of specifications is incorrect while copying "
1729 "by inner frame unknown destination flags");
1733 for (i = 0; i < spec->count; i++) {
1734 /* The check above ensures that divisor can't be zero here */
1735 spec->filters[i].efs_match_flags |=
1736 vals[i / filters_count_for_one_val];
1743 * Check that the following conditions are met:
1744 * - the specification corresponds to a filter for encapsulated traffic
1745 * - the list of supported filters has a filter
1746 * with EFX_FILTER_MATCH_IFRM_UNKNOWN_MCAST_DST flag instead of
1747 * EFX_FILTER_MATCH_IFRM_UNKNOWN_UCAST_DST, since this filter will also
1751 * The match flags of filter.
1753 * Specification to be supplemented.
1755 * SFC filter with list of supported filters.
1758 sfc_flow_check_ifrm_unknown_dst_flags(efx_filter_match_flags_t match,
1759 efx_filter_spec_t *spec,
1760 struct sfc_filter *filter)
1763 efx_tunnel_protocol_t encap_type = spec->efs_encap_type;
1764 efx_filter_match_flags_t match_mcast_dst;
1766 if (encap_type == EFX_TUNNEL_PROTOCOL_NONE)
1770 (match & ~EFX_FILTER_MATCH_IFRM_UNKNOWN_UCAST_DST) |
1771 EFX_FILTER_MATCH_IFRM_UNKNOWN_MCAST_DST;
1772 for (i = 0; i < filter->supported_match_num; i++) {
1773 if (match_mcast_dst == filter->supported_match[i])
1781 * Match flags that can be automatically added to filters.
1782 * Selecting the last minimum when searching for the copy flag ensures that the
1783 * EFX_FILTER_MATCH_UNKNOWN_UCAST_DST flag has a higher priority than
1784 * EFX_FILTER_MATCH_ETHER_TYPE. This is because the filter
1785 * EFX_FILTER_MATCH_UNKNOWN_UCAST_DST is at the end of the list of supported
1788 static const struct sfc_flow_copy_flag sfc_flow_copy_flags[] = {
1790 .flag = EFX_FILTER_MATCH_UNKNOWN_UCAST_DST,
1792 .set_vals = sfc_flow_set_unknown_dst_flags,
1793 .spec_check = sfc_flow_check_unknown_dst_flags,
1796 .flag = EFX_FILTER_MATCH_ETHER_TYPE,
1798 .set_vals = sfc_flow_set_ethertypes,
1802 .flag = EFX_FILTER_MATCH_IFRM_UNKNOWN_UCAST_DST,
1804 .set_vals = sfc_flow_set_ifrm_unknown_dst_flags,
1805 .spec_check = sfc_flow_check_ifrm_unknown_dst_flags,
1809 /* Get item from array sfc_flow_copy_flags */
1810 static const struct sfc_flow_copy_flag *
1811 sfc_flow_get_copy_flag(efx_filter_match_flags_t flag)
1815 for (i = 0; i < RTE_DIM(sfc_flow_copy_flags); i++) {
1816 if (sfc_flow_copy_flags[i].flag == flag)
1817 return &sfc_flow_copy_flags[i];
1824 * Make copies of the specifications, set match flag and values
1825 * of the field that corresponds to it.
1827 * @param spec[in, out]
1828 * SFC flow specification to update.
1830 * The match flag to add.
1832 * Perform verbose error reporting if not NULL.
1835 sfc_flow_spec_add_match_flag(struct sfc_flow_spec *spec,
1836 efx_filter_match_flags_t flag,
1837 struct rte_flow_error *error)
1840 unsigned int new_filters_count;
1841 unsigned int filters_count_for_one_val;
1842 const struct sfc_flow_copy_flag *copy_flag;
1845 copy_flag = sfc_flow_get_copy_flag(flag);
1846 if (copy_flag == NULL) {
1847 rte_flow_error_set(error, ENOTSUP,
1848 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1849 "Unsupported spec field for copying");
1853 new_filters_count = spec->count * copy_flag->vals_count;
1854 if (new_filters_count > SF_FLOW_SPEC_NB_FILTERS_MAX) {
1855 rte_flow_error_set(error, EINVAL,
1856 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1857 "Too much EFX specifications in the flow rule");
1861 /* Copy filters specifications */
1862 for (i = spec->count; i < new_filters_count; i++)
1863 spec->filters[i] = spec->filters[i - spec->count];
1865 filters_count_for_one_val = spec->count;
1866 spec->count = new_filters_count;
1868 rc = copy_flag->set_vals(spec, filters_count_for_one_val, error);
1876 * Check that the given set of match flags missing in the original filter spec
1877 * could be covered by adding spec copies which specify the corresponding
1878 * flags and packet field values to match.
1880 * @param miss_flags[in]
1881 * Flags that are missing until the supported filter.
1883 * Specification to be supplemented.
1888 * Number of specifications after copy or 0, if the flags can not be added.
1891 sfc_flow_check_missing_flags(efx_filter_match_flags_t miss_flags,
1892 efx_filter_spec_t *spec,
1893 struct sfc_filter *filter)
1896 efx_filter_match_flags_t copy_flags = 0;
1897 efx_filter_match_flags_t flag;
1898 efx_filter_match_flags_t match = spec->efs_match_flags | miss_flags;
1899 sfc_flow_spec_check *check;
1900 unsigned int multiplier = 1;
1902 for (i = 0; i < RTE_DIM(sfc_flow_copy_flags); i++) {
1903 flag = sfc_flow_copy_flags[i].flag;
1904 check = sfc_flow_copy_flags[i].spec_check;
1905 if ((flag & miss_flags) == flag) {
1906 if (check != NULL && (!check(match, spec, filter)))
1910 multiplier *= sfc_flow_copy_flags[i].vals_count;
1914 if (copy_flags == miss_flags)
1921 * Attempt to supplement the specification template to the minimally
1922 * supported set of match flags. To do this, it is necessary to copy
1923 * the specifications, filling them with the values of fields that
1924 * correspond to the missing flags.
1925 * The necessary and sufficient filter is built from the fewest number
1926 * of copies which could be made to cover the minimally required set
1931 * @param spec[in, out]
1932 * SFC flow specification to update.
1934 * Perform verbose error reporting if not NULL.
1937 sfc_flow_spec_filters_complete(struct sfc_adapter *sa,
1938 struct sfc_flow_spec *spec,
1939 struct rte_flow_error *error)
1941 struct sfc_filter *filter = &sa->filter;
1942 efx_filter_match_flags_t miss_flags;
1943 efx_filter_match_flags_t min_miss_flags = 0;
1944 efx_filter_match_flags_t match;
1945 unsigned int min_multiplier = UINT_MAX;
1946 unsigned int multiplier;
1950 match = spec->template.efs_match_flags;
1951 for (i = 0; i < filter->supported_match_num; i++) {
1952 if ((match & filter->supported_match[i]) == match) {
1953 miss_flags = filter->supported_match[i] & (~match);
1954 multiplier = sfc_flow_check_missing_flags(miss_flags,
1955 &spec->template, filter);
1956 if (multiplier > 0) {
1957 if (multiplier <= min_multiplier) {
1958 min_multiplier = multiplier;
1959 min_miss_flags = miss_flags;
1965 if (min_multiplier == UINT_MAX) {
1966 rte_flow_error_set(error, ENOTSUP,
1967 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1968 "Flow rule pattern is not supported");
1972 for (i = 0; i < RTE_DIM(sfc_flow_copy_flags); i++) {
1973 efx_filter_match_flags_t flag = sfc_flow_copy_flags[i].flag;
1975 if ((flag & min_miss_flags) == flag) {
1976 rc = sfc_flow_spec_add_match_flag(spec, flag, error);
1986 * Check that set of match flags is referred to by a filter. Filter is
1987 * described by match flags with the ability to add OUTER_VID and INNER_VID
1990 * @param match_flags[in]
1991 * Set of match flags.
1992 * @param flags_pattern[in]
1993 * Pattern of filter match flags.
1996 sfc_flow_is_match_with_vids(efx_filter_match_flags_t match_flags,
1997 efx_filter_match_flags_t flags_pattern)
1999 if ((match_flags & flags_pattern) != flags_pattern)
2002 switch (match_flags & ~flags_pattern) {
2004 case EFX_FILTER_MATCH_OUTER_VID:
2005 case EFX_FILTER_MATCH_OUTER_VID | EFX_FILTER_MATCH_INNER_VID:
2013 * Check whether the spec maps to a hardware filter which is known to be
2014 * ineffective despite being valid.
2017 * SFC flow specification.
2020 sfc_flow_is_match_flags_exception(struct sfc_flow_spec *spec)
2023 uint16_t ether_type;
2025 efx_filter_match_flags_t match_flags;
2027 for (i = 0; i < spec->count; i++) {
2028 match_flags = spec->filters[i].efs_match_flags;
2030 if (sfc_flow_is_match_with_vids(match_flags,
2031 EFX_FILTER_MATCH_ETHER_TYPE) ||
2032 sfc_flow_is_match_with_vids(match_flags,
2033 EFX_FILTER_MATCH_ETHER_TYPE |
2034 EFX_FILTER_MATCH_LOC_MAC)) {
2035 ether_type = spec->filters[i].efs_ether_type;
2036 if (ether_type == EFX_ETHER_TYPE_IPV4 ||
2037 ether_type == EFX_ETHER_TYPE_IPV6)
2039 } else if (sfc_flow_is_match_with_vids(match_flags,
2040 EFX_FILTER_MATCH_ETHER_TYPE |
2041 EFX_FILTER_MATCH_IP_PROTO) ||
2042 sfc_flow_is_match_with_vids(match_flags,
2043 EFX_FILTER_MATCH_ETHER_TYPE |
2044 EFX_FILTER_MATCH_IP_PROTO |
2045 EFX_FILTER_MATCH_LOC_MAC)) {
2046 ip_proto = spec->filters[i].efs_ip_proto;
2047 if (ip_proto == EFX_IPPROTO_TCP ||
2048 ip_proto == EFX_IPPROTO_UDP)
2057 sfc_flow_validate_match_flags(struct sfc_adapter *sa,
2058 struct rte_flow *flow,
2059 struct rte_flow_error *error)
2061 efx_filter_spec_t *spec_tmpl = &flow->spec.template;
2062 efx_filter_match_flags_t match_flags = spec_tmpl->efs_match_flags;
2065 /* Initialize the first filter spec with template */
2066 flow->spec.filters[0] = *spec_tmpl;
2067 flow->spec.count = 1;
2069 if (!sfc_filter_is_match_supported(sa, match_flags)) {
2070 rc = sfc_flow_spec_filters_complete(sa, &flow->spec, error);
2075 if (sfc_flow_is_match_flags_exception(&flow->spec)) {
2076 rte_flow_error_set(error, ENOTSUP,
2077 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2078 "The flow rule pattern is unsupported");
2086 sfc_flow_parse(struct rte_eth_dev *dev,
2087 const struct rte_flow_attr *attr,
2088 const struct rte_flow_item pattern[],
2089 const struct rte_flow_action actions[],
2090 struct rte_flow *flow,
2091 struct rte_flow_error *error)
2093 struct sfc_adapter *sa = dev->data->dev_private;
2096 rc = sfc_flow_parse_attr(attr, flow, error);
2098 goto fail_bad_value;
2100 rc = sfc_flow_parse_pattern(pattern, flow, error);
2102 goto fail_bad_value;
2104 rc = sfc_flow_parse_actions(sa, actions, flow, error);
2106 goto fail_bad_value;
2108 rc = sfc_flow_validate_match_flags(sa, flow, error);
2110 goto fail_bad_value;
2119 sfc_flow_validate(struct rte_eth_dev *dev,
2120 const struct rte_flow_attr *attr,
2121 const struct rte_flow_item pattern[],
2122 const struct rte_flow_action actions[],
2123 struct rte_flow_error *error)
2125 struct rte_flow flow;
2127 memset(&flow, 0, sizeof(flow));
2129 return sfc_flow_parse(dev, attr, pattern, actions, &flow, error);
2132 static struct rte_flow *
2133 sfc_flow_create(struct rte_eth_dev *dev,
2134 const struct rte_flow_attr *attr,
2135 const struct rte_flow_item pattern[],
2136 const struct rte_flow_action actions[],
2137 struct rte_flow_error *error)
2139 struct sfc_adapter *sa = dev->data->dev_private;
2140 struct rte_flow *flow = NULL;
2143 flow = rte_zmalloc("sfc_rte_flow", sizeof(*flow), 0);
2145 rte_flow_error_set(error, ENOMEM,
2146 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2147 "Failed to allocate memory");
2151 rc = sfc_flow_parse(dev, attr, pattern, actions, flow, error);
2153 goto fail_bad_value;
2155 TAILQ_INSERT_TAIL(&sa->filter.flow_list, flow, entries);
2157 sfc_adapter_lock(sa);
2159 if (sa->state == SFC_ADAPTER_STARTED) {
2160 rc = sfc_flow_filter_insert(sa, flow);
2162 rte_flow_error_set(error, rc,
2163 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2164 "Failed to insert filter");
2165 goto fail_filter_insert;
2169 sfc_adapter_unlock(sa);
2174 TAILQ_REMOVE(&sa->filter.flow_list, flow, entries);
2178 sfc_adapter_unlock(sa);
2185 sfc_flow_remove(struct sfc_adapter *sa,
2186 struct rte_flow *flow,
2187 struct rte_flow_error *error)
2191 SFC_ASSERT(sfc_adapter_is_locked(sa));
2193 if (sa->state == SFC_ADAPTER_STARTED) {
2194 rc = sfc_flow_filter_remove(sa, flow);
2196 rte_flow_error_set(error, rc,
2197 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2198 "Failed to destroy flow rule");
2201 TAILQ_REMOVE(&sa->filter.flow_list, flow, entries);
2208 sfc_flow_destroy(struct rte_eth_dev *dev,
2209 struct rte_flow *flow,
2210 struct rte_flow_error *error)
2212 struct sfc_adapter *sa = dev->data->dev_private;
2213 struct rte_flow *flow_ptr;
2216 sfc_adapter_lock(sa);
2218 TAILQ_FOREACH(flow_ptr, &sa->filter.flow_list, entries) {
2219 if (flow_ptr == flow)
2223 rte_flow_error_set(error, rc,
2224 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
2225 "Failed to find flow rule to destroy");
2226 goto fail_bad_value;
2229 rc = sfc_flow_remove(sa, flow, error);
2232 sfc_adapter_unlock(sa);
2238 sfc_flow_flush(struct rte_eth_dev *dev,
2239 struct rte_flow_error *error)
2241 struct sfc_adapter *sa = dev->data->dev_private;
2242 struct rte_flow *flow;
2246 sfc_adapter_lock(sa);
2248 while ((flow = TAILQ_FIRST(&sa->filter.flow_list)) != NULL) {
2249 rc = sfc_flow_remove(sa, flow, error);
2254 sfc_adapter_unlock(sa);
2260 sfc_flow_isolate(struct rte_eth_dev *dev, int enable,
2261 struct rte_flow_error *error)
2263 struct sfc_adapter *sa = dev->data->dev_private;
2264 struct sfc_port *port = &sa->port;
2267 sfc_adapter_lock(sa);
2268 if (sa->state != SFC_ADAPTER_INITIALIZED) {
2269 rte_flow_error_set(error, EBUSY,
2270 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2271 NULL, "please close the port first");
2274 port->isolated = (enable) ? B_TRUE : B_FALSE;
2276 sfc_adapter_unlock(sa);
2281 const struct rte_flow_ops sfc_flow_ops = {
2282 .validate = sfc_flow_validate,
2283 .create = sfc_flow_create,
2284 .destroy = sfc_flow_destroy,
2285 .flush = sfc_flow_flush,
2287 .isolate = sfc_flow_isolate,
2291 sfc_flow_init(struct sfc_adapter *sa)
2293 SFC_ASSERT(sfc_adapter_is_locked(sa));
2295 TAILQ_INIT(&sa->filter.flow_list);
2299 sfc_flow_fini(struct sfc_adapter *sa)
2301 struct rte_flow *flow;
2303 SFC_ASSERT(sfc_adapter_is_locked(sa));
2305 while ((flow = TAILQ_FIRST(&sa->filter.flow_list)) != NULL) {
2306 TAILQ_REMOVE(&sa->filter.flow_list, flow, entries);
2312 sfc_flow_stop(struct sfc_adapter *sa)
2314 struct rte_flow *flow;
2316 SFC_ASSERT(sfc_adapter_is_locked(sa));
2318 TAILQ_FOREACH(flow, &sa->filter.flow_list, entries)
2319 sfc_flow_filter_remove(sa, flow);
2323 sfc_flow_start(struct sfc_adapter *sa)
2325 struct rte_flow *flow;
2328 sfc_log_init(sa, "entry");
2330 SFC_ASSERT(sfc_adapter_is_locked(sa));
2332 TAILQ_FOREACH(flow, &sa->filter.flow_list, entries) {
2333 rc = sfc_flow_filter_insert(sa, flow);
2338 sfc_log_init(sa, "done");