1 /* SPDX-License-Identifier: BSD-3-Clause
3 * Copyright(c) 2019-2021 Xilinx, Inc.
4 * Copyright(c) 2019 Solarflare Communications Inc.
6 * This software was jointly developed between OKTET Labs (under contract
7 * for Solarflare) and Solarflare Communications, Inc.
12 #include <rte_bitops.h>
13 #include <rte_common.h>
14 #include <rte_vxlan.h>
19 #include "sfc_flow_tunnel.h"
20 #include "sfc_mae_counter.h"
22 #include "sfc_switch.h"
23 #include "sfc_service.h"
26 sfc_mae_assign_entity_mport(struct sfc_adapter *sa,
27 efx_mport_sel_t *mportp)
29 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
31 return efx_mae_mport_by_pcie_function(encp->enc_pf, encp->enc_vf,
36 sfc_mae_counter_registry_init(struct sfc_mae_counter_registry *registry,
37 uint32_t nb_counters_max)
39 return sfc_mae_counters_init(®istry->counters, nb_counters_max);
43 sfc_mae_counter_registry_fini(struct sfc_mae_counter_registry *registry)
45 sfc_mae_counters_fini(®istry->counters);
49 sfc_mae_internal_rule_find_empty_slot(struct sfc_adapter *sa,
50 struct sfc_mae_rule **rule)
52 struct sfc_mae *mae = &sa->mae;
53 struct sfc_mae_internal_rules *internal_rules = &mae->internal_rules;
57 for (entry = 0; entry < SFC_MAE_NB_RULES_MAX; entry++) {
58 if (internal_rules->rules[entry].spec == NULL)
62 if (entry == SFC_MAE_NB_RULES_MAX) {
64 sfc_err(sa, "failed too many rules (%u rules used)", entry);
65 goto fail_too_many_rules;
68 *rule = &internal_rules->rules[entry];
77 sfc_mae_rule_add_mport_match_deliver(struct sfc_adapter *sa,
78 const efx_mport_sel_t *mport_match,
79 const efx_mport_sel_t *mport_deliver,
80 int prio, struct sfc_mae_rule **rulep)
82 struct sfc_mae *mae = &sa->mae;
83 struct sfc_mae_rule *rule;
86 sfc_log_init(sa, "entry");
88 if (prio > 0 && (unsigned int)prio >= mae->nb_action_rule_prios_max) {
90 sfc_err(sa, "failed: invalid priority %d (max %u)", prio,
91 mae->nb_action_rule_prios_max);
92 goto fail_invalid_prio;
95 prio = mae->nb_action_rule_prios_max - 1;
97 rc = sfc_mae_internal_rule_find_empty_slot(sa, &rule);
99 goto fail_find_empty_slot;
101 sfc_log_init(sa, "init MAE match spec");
102 rc = efx_mae_match_spec_init(sa->nic, EFX_MAE_RULE_ACTION,
103 (uint32_t)prio, &rule->spec);
105 sfc_err(sa, "failed to init MAE match spec");
106 goto fail_match_init;
109 rc = efx_mae_match_spec_mport_set(rule->spec, mport_match, NULL);
111 sfc_err(sa, "failed to get MAE match mport selector");
115 rc = efx_mae_action_set_spec_init(sa->nic, &rule->actions);
117 sfc_err(sa, "failed to init MAE action set");
118 goto fail_action_init;
121 rc = efx_mae_action_set_populate_deliver(rule->actions,
124 sfc_err(sa, "failed to populate deliver action");
125 goto fail_populate_deliver;
128 rc = efx_mae_action_set_alloc(sa->nic, rule->actions,
131 sfc_err(sa, "failed to allocate action set");
132 goto fail_action_set_alloc;
135 rc = efx_mae_action_rule_insert(sa->nic, rule->spec, NULL,
139 sfc_err(sa, "failed to insert action rule");
140 goto fail_rule_insert;
145 sfc_log_init(sa, "done");
150 efx_mae_action_set_free(sa->nic, &rule->action_set);
152 fail_action_set_alloc:
153 fail_populate_deliver:
154 efx_mae_action_set_spec_fini(sa->nic, rule->actions);
158 efx_mae_match_spec_fini(sa->nic, rule->spec);
161 fail_find_empty_slot:
163 sfc_log_init(sa, "failed: %s", rte_strerror(rc));
168 sfc_mae_rule_del(struct sfc_adapter *sa, struct sfc_mae_rule *rule)
170 if (rule == NULL || rule->spec == NULL)
173 efx_mae_action_rule_remove(sa->nic, &rule->rule_id);
174 efx_mae_action_set_free(sa->nic, &rule->action_set);
175 efx_mae_action_set_spec_fini(sa->nic, rule->actions);
176 efx_mae_match_spec_fini(sa->nic, rule->spec);
182 sfc_mae_attach(struct sfc_adapter *sa)
184 struct sfc_adapter_shared * const sas = sfc_sa2shared(sa);
185 struct sfc_mae_switch_port_request switch_port_request = {0};
186 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
187 efx_mport_sel_t entity_mport;
188 struct sfc_mae *mae = &sa->mae;
189 struct sfc_mae_bounce_eh *bounce_eh = &mae->bounce_eh;
190 efx_mae_limits_t limits;
193 sfc_log_init(sa, "entry");
195 if (!encp->enc_mae_supported) {
196 mae->status = SFC_MAE_STATUS_UNSUPPORTED;
200 sfc_log_init(sa, "init MAE");
201 rc = efx_mae_init(sa->nic);
205 sfc_log_init(sa, "get MAE limits");
206 rc = efx_mae_get_limits(sa->nic, &limits);
208 goto fail_mae_get_limits;
210 sfc_log_init(sa, "init MAE counter registry");
211 rc = sfc_mae_counter_registry_init(&mae->counter_registry,
212 limits.eml_max_n_counters);
214 sfc_err(sa, "failed to init MAE counters registry for %u entries: %s",
215 limits.eml_max_n_counters, rte_strerror(rc));
216 goto fail_counter_registry_init;
219 sfc_log_init(sa, "assign entity MPORT");
220 rc = sfc_mae_assign_entity_mport(sa, &entity_mport);
222 goto fail_mae_assign_entity_mport;
224 sfc_log_init(sa, "assign RTE switch domain");
225 rc = sfc_mae_assign_switch_domain(sa, &mae->switch_domain_id);
227 goto fail_mae_assign_switch_domain;
229 sfc_log_init(sa, "assign RTE switch port");
230 switch_port_request.type = SFC_MAE_SWITCH_PORT_INDEPENDENT;
231 switch_port_request.entity_mportp = &entity_mport;
232 /* RTE ethdev MPORT matches that of the entity for independent ports. */
233 switch_port_request.ethdev_mportp = &entity_mport;
234 switch_port_request.ethdev_port_id = sas->port_id;
235 rc = sfc_mae_assign_switch_port(mae->switch_domain_id,
236 &switch_port_request,
237 &mae->switch_port_id);
239 goto fail_mae_assign_switch_port;
241 sfc_log_init(sa, "allocate encap. header bounce buffer");
242 bounce_eh->buf_size = limits.eml_encap_header_size_limit;
243 bounce_eh->buf = rte_malloc("sfc_mae_bounce_eh",
244 bounce_eh->buf_size, 0);
245 if (bounce_eh->buf == NULL)
246 goto fail_mae_alloc_bounce_eh;
248 mae->status = SFC_MAE_STATUS_SUPPORTED;
249 mae->nb_outer_rule_prios_max = limits.eml_max_n_outer_prios;
250 mae->nb_action_rule_prios_max = limits.eml_max_n_action_prios;
251 mae->encap_types_supported = limits.eml_encap_types_supported;
252 TAILQ_INIT(&mae->outer_rules);
253 TAILQ_INIT(&mae->encap_headers);
254 TAILQ_INIT(&mae->action_sets);
256 sfc_log_init(sa, "done");
260 fail_mae_alloc_bounce_eh:
261 fail_mae_assign_switch_port:
262 fail_mae_assign_switch_domain:
263 fail_mae_assign_entity_mport:
264 sfc_mae_counter_registry_fini(&mae->counter_registry);
266 fail_counter_registry_init:
268 efx_mae_fini(sa->nic);
271 sfc_log_init(sa, "failed %d", rc);
277 sfc_mae_detach(struct sfc_adapter *sa)
279 struct sfc_mae *mae = &sa->mae;
280 enum sfc_mae_status status_prev = mae->status;
282 sfc_log_init(sa, "entry");
284 mae->nb_action_rule_prios_max = 0;
285 mae->status = SFC_MAE_STATUS_UNKNOWN;
287 if (status_prev != SFC_MAE_STATUS_SUPPORTED)
290 rte_free(mae->bounce_eh.buf);
291 sfc_mae_counter_registry_fini(&mae->counter_registry);
293 efx_mae_fini(sa->nic);
295 sfc_log_init(sa, "done");
298 static struct sfc_mae_outer_rule *
299 sfc_mae_outer_rule_attach(struct sfc_adapter *sa,
300 const efx_mae_match_spec_t *match_spec,
301 efx_tunnel_protocol_t encap_type)
303 struct sfc_mae_outer_rule *rule;
304 struct sfc_mae *mae = &sa->mae;
306 SFC_ASSERT(sfc_adapter_is_locked(sa));
308 TAILQ_FOREACH(rule, &mae->outer_rules, entries) {
309 if (efx_mae_match_specs_equal(rule->match_spec, match_spec) &&
310 rule->encap_type == encap_type) {
311 sfc_dbg(sa, "attaching to outer_rule=%p", rule);
321 sfc_mae_outer_rule_add(struct sfc_adapter *sa,
322 efx_mae_match_spec_t *match_spec,
323 efx_tunnel_protocol_t encap_type,
324 struct sfc_mae_outer_rule **rulep)
326 struct sfc_mae_outer_rule *rule;
327 struct sfc_mae *mae = &sa->mae;
329 SFC_ASSERT(sfc_adapter_is_locked(sa));
331 rule = rte_zmalloc("sfc_mae_outer_rule", sizeof(*rule), 0);
336 rule->match_spec = match_spec;
337 rule->encap_type = encap_type;
339 rule->fw_rsrc.rule_id.id = EFX_MAE_RSRC_ID_INVALID;
341 TAILQ_INSERT_TAIL(&mae->outer_rules, rule, entries);
345 sfc_dbg(sa, "added outer_rule=%p", rule);
351 sfc_mae_outer_rule_del(struct sfc_adapter *sa,
352 struct sfc_mae_outer_rule *rule)
354 struct sfc_mae *mae = &sa->mae;
356 SFC_ASSERT(sfc_adapter_is_locked(sa));
357 SFC_ASSERT(rule->refcnt != 0);
361 if (rule->refcnt != 0)
364 if (rule->fw_rsrc.rule_id.id != EFX_MAE_RSRC_ID_INVALID ||
365 rule->fw_rsrc.refcnt != 0) {
366 sfc_err(sa, "deleting outer_rule=%p abandons its FW resource: OR_ID=0x%08x, refcnt=%u",
367 rule, rule->fw_rsrc.rule_id.id, rule->fw_rsrc.refcnt);
370 efx_mae_match_spec_fini(sa->nic, rule->match_spec);
372 TAILQ_REMOVE(&mae->outer_rules, rule, entries);
375 sfc_dbg(sa, "deleted outer_rule=%p", rule);
379 sfc_mae_outer_rule_enable(struct sfc_adapter *sa,
380 struct sfc_mae_outer_rule *rule,
381 efx_mae_match_spec_t *match_spec_action)
383 struct sfc_mae_fw_rsrc *fw_rsrc = &rule->fw_rsrc;
386 SFC_ASSERT(sfc_adapter_is_locked(sa));
388 if (fw_rsrc->refcnt == 0) {
389 SFC_ASSERT(fw_rsrc->rule_id.id == EFX_MAE_RSRC_ID_INVALID);
390 SFC_ASSERT(rule->match_spec != NULL);
392 rc = efx_mae_outer_rule_insert(sa->nic, rule->match_spec,
396 sfc_err(sa, "failed to enable outer_rule=%p: %s",
402 if (match_spec_action == NULL)
403 goto skip_action_rule;
405 rc = efx_mae_match_spec_outer_rule_id_set(match_spec_action,
408 if (fw_rsrc->refcnt == 0) {
409 (void)efx_mae_outer_rule_remove(sa->nic,
411 fw_rsrc->rule_id.id = EFX_MAE_RSRC_ID_INVALID;
414 sfc_err(sa, "can't match on outer rule ID: %s", strerror(rc));
420 if (fw_rsrc->refcnt == 0) {
421 sfc_dbg(sa, "enabled outer_rule=%p: OR_ID=0x%08x",
422 rule, fw_rsrc->rule_id.id);
431 sfc_mae_outer_rule_disable(struct sfc_adapter *sa,
432 struct sfc_mae_outer_rule *rule)
434 struct sfc_mae_fw_rsrc *fw_rsrc = &rule->fw_rsrc;
437 SFC_ASSERT(sfc_adapter_is_locked(sa));
439 if (fw_rsrc->rule_id.id == EFX_MAE_RSRC_ID_INVALID ||
440 fw_rsrc->refcnt == 0) {
441 sfc_err(sa, "failed to disable outer_rule=%p: already disabled; OR_ID=0x%08x, refcnt=%u",
442 rule, fw_rsrc->rule_id.id, fw_rsrc->refcnt);
446 if (fw_rsrc->refcnt == 1) {
447 rc = efx_mae_outer_rule_remove(sa->nic, &fw_rsrc->rule_id);
449 sfc_dbg(sa, "disabled outer_rule=%p with OR_ID=0x%08x",
450 rule, fw_rsrc->rule_id.id);
452 sfc_err(sa, "failed to disable outer_rule=%p with OR_ID=0x%08x: %s",
453 rule, fw_rsrc->rule_id.id, strerror(rc));
455 fw_rsrc->rule_id.id = EFX_MAE_RSRC_ID_INVALID;
461 static struct sfc_mae_encap_header *
462 sfc_mae_encap_header_attach(struct sfc_adapter *sa,
463 const struct sfc_mae_bounce_eh *bounce_eh)
465 struct sfc_mae_encap_header *encap_header;
466 struct sfc_mae *mae = &sa->mae;
468 SFC_ASSERT(sfc_adapter_is_locked(sa));
470 TAILQ_FOREACH(encap_header, &mae->encap_headers, entries) {
471 if (encap_header->size == bounce_eh->size &&
472 memcmp(encap_header->buf, bounce_eh->buf,
473 bounce_eh->size) == 0) {
474 sfc_dbg(sa, "attaching to encap_header=%p",
476 ++(encap_header->refcnt);
485 sfc_mae_encap_header_add(struct sfc_adapter *sa,
486 const struct sfc_mae_bounce_eh *bounce_eh,
487 struct sfc_mae_encap_header **encap_headerp)
489 struct sfc_mae_encap_header *encap_header;
490 struct sfc_mae *mae = &sa->mae;
492 SFC_ASSERT(sfc_adapter_is_locked(sa));
494 encap_header = rte_zmalloc("sfc_mae_encap_header",
495 sizeof(*encap_header), 0);
496 if (encap_header == NULL)
499 encap_header->size = bounce_eh->size;
501 encap_header->buf = rte_malloc("sfc_mae_encap_header_buf",
502 encap_header->size, 0);
503 if (encap_header->buf == NULL) {
504 rte_free(encap_header);
508 rte_memcpy(encap_header->buf, bounce_eh->buf, bounce_eh->size);
510 encap_header->refcnt = 1;
511 encap_header->type = bounce_eh->type;
512 encap_header->fw_rsrc.eh_id.id = EFX_MAE_RSRC_ID_INVALID;
514 TAILQ_INSERT_TAIL(&mae->encap_headers, encap_header, entries);
516 *encap_headerp = encap_header;
518 sfc_dbg(sa, "added encap_header=%p", encap_header);
524 sfc_mae_encap_header_del(struct sfc_adapter *sa,
525 struct sfc_mae_encap_header *encap_header)
527 struct sfc_mae *mae = &sa->mae;
529 if (encap_header == NULL)
532 SFC_ASSERT(sfc_adapter_is_locked(sa));
533 SFC_ASSERT(encap_header->refcnt != 0);
535 --(encap_header->refcnt);
537 if (encap_header->refcnt != 0)
540 if (encap_header->fw_rsrc.eh_id.id != EFX_MAE_RSRC_ID_INVALID ||
541 encap_header->fw_rsrc.refcnt != 0) {
542 sfc_err(sa, "deleting encap_header=%p abandons its FW resource: EH_ID=0x%08x, refcnt=%u",
543 encap_header, encap_header->fw_rsrc.eh_id.id,
544 encap_header->fw_rsrc.refcnt);
547 TAILQ_REMOVE(&mae->encap_headers, encap_header, entries);
548 rte_free(encap_header->buf);
549 rte_free(encap_header);
551 sfc_dbg(sa, "deleted encap_header=%p", encap_header);
555 sfc_mae_encap_header_enable(struct sfc_adapter *sa,
556 struct sfc_mae_encap_header *encap_header,
557 efx_mae_actions_t *action_set_spec)
559 struct sfc_mae_fw_rsrc *fw_rsrc;
562 if (encap_header == NULL)
565 SFC_ASSERT(sfc_adapter_is_locked(sa));
567 fw_rsrc = &encap_header->fw_rsrc;
569 if (fw_rsrc->refcnt == 0) {
570 SFC_ASSERT(fw_rsrc->eh_id.id == EFX_MAE_RSRC_ID_INVALID);
571 SFC_ASSERT(encap_header->buf != NULL);
572 SFC_ASSERT(encap_header->size != 0);
574 rc = efx_mae_encap_header_alloc(sa->nic, encap_header->type,
579 sfc_err(sa, "failed to enable encap_header=%p: %s",
580 encap_header, strerror(rc));
585 rc = efx_mae_action_set_fill_in_eh_id(action_set_spec,
588 if (fw_rsrc->refcnt == 0) {
589 (void)efx_mae_encap_header_free(sa->nic,
591 fw_rsrc->eh_id.id = EFX_MAE_RSRC_ID_INVALID;
594 sfc_err(sa, "can't fill in encap. header ID: %s", strerror(rc));
599 if (fw_rsrc->refcnt == 0) {
600 sfc_dbg(sa, "enabled encap_header=%p: EH_ID=0x%08x",
601 encap_header, fw_rsrc->eh_id.id);
610 sfc_mae_encap_header_disable(struct sfc_adapter *sa,
611 struct sfc_mae_encap_header *encap_header)
613 struct sfc_mae_fw_rsrc *fw_rsrc;
616 if (encap_header == NULL)
619 SFC_ASSERT(sfc_adapter_is_locked(sa));
621 fw_rsrc = &encap_header->fw_rsrc;
623 if (fw_rsrc->eh_id.id == EFX_MAE_RSRC_ID_INVALID ||
624 fw_rsrc->refcnt == 0) {
625 sfc_err(sa, "failed to disable encap_header=%p: already disabled; EH_ID=0x%08x, refcnt=%u",
626 encap_header, fw_rsrc->eh_id.id, fw_rsrc->refcnt);
630 if (fw_rsrc->refcnt == 1) {
631 rc = efx_mae_encap_header_free(sa->nic, &fw_rsrc->eh_id);
633 sfc_dbg(sa, "disabled encap_header=%p with EH_ID=0x%08x",
634 encap_header, fw_rsrc->eh_id.id);
636 sfc_err(sa, "failed to disable encap_header=%p with EH_ID=0x%08x: %s",
637 encap_header, fw_rsrc->eh_id.id, strerror(rc));
639 fw_rsrc->eh_id.id = EFX_MAE_RSRC_ID_INVALID;
646 sfc_mae_counters_enable(struct sfc_adapter *sa,
647 struct sfc_mae_counter_id *counters,
648 unsigned int n_counters,
649 efx_mae_actions_t *action_set_spec)
653 sfc_log_init(sa, "entry");
655 if (n_counters == 0) {
656 sfc_log_init(sa, "no counters - skip");
660 SFC_ASSERT(sfc_adapter_is_locked(sa));
661 SFC_ASSERT(n_counters == 1);
663 rc = sfc_mae_counter_enable(sa, &counters[0]);
665 sfc_err(sa, "failed to enable MAE counter %u: %s",
666 counters[0].mae_id.id, rte_strerror(rc));
667 goto fail_counter_add;
670 rc = efx_mae_action_set_fill_in_counter_id(action_set_spec,
671 &counters[0].mae_id);
673 sfc_err(sa, "failed to fill in MAE counter %u in action set: %s",
674 counters[0].mae_id.id, rte_strerror(rc));
675 goto fail_fill_in_id;
681 (void)sfc_mae_counter_disable(sa, &counters[0]);
684 sfc_log_init(sa, "failed: %s", rte_strerror(rc));
689 sfc_mae_counters_disable(struct sfc_adapter *sa,
690 struct sfc_mae_counter_id *counters,
691 unsigned int n_counters)
696 SFC_ASSERT(sfc_adapter_is_locked(sa));
697 SFC_ASSERT(n_counters == 1);
699 if (counters[0].mae_id.id == EFX_MAE_RSRC_ID_INVALID) {
700 sfc_err(sa, "failed to disable: already disabled");
704 return sfc_mae_counter_disable(sa, &counters[0]);
707 static struct sfc_mae_action_set *
708 sfc_mae_action_set_attach(struct sfc_adapter *sa,
709 const struct sfc_mae_encap_header *encap_header,
710 unsigned int n_count,
711 const efx_mae_actions_t *spec)
713 struct sfc_mae_action_set *action_set;
714 struct sfc_mae *mae = &sa->mae;
716 SFC_ASSERT(sfc_adapter_is_locked(sa));
718 TAILQ_FOREACH(action_set, &mae->action_sets, entries) {
720 * Shared counters are not supported, hence action sets with
721 * COUNT are not attachable.
723 if (action_set->encap_header == encap_header &&
725 efx_mae_action_set_specs_equal(action_set->spec, spec)) {
726 sfc_dbg(sa, "attaching to action_set=%p", action_set);
727 ++(action_set->refcnt);
736 sfc_mae_action_set_add(struct sfc_adapter *sa,
737 const struct rte_flow_action actions[],
738 efx_mae_actions_t *spec,
739 struct sfc_mae_encap_header *encap_header,
740 unsigned int n_counters,
741 struct sfc_mae_action_set **action_setp)
743 struct sfc_mae_action_set *action_set;
744 struct sfc_mae *mae = &sa->mae;
747 SFC_ASSERT(sfc_adapter_is_locked(sa));
749 action_set = rte_zmalloc("sfc_mae_action_set", sizeof(*action_set), 0);
750 if (action_set == NULL) {
751 sfc_err(sa, "failed to alloc action set");
755 if (n_counters > 0) {
756 const struct rte_flow_action *action;
758 action_set->counters = rte_malloc("sfc_mae_counter_ids",
759 sizeof(action_set->counters[0]) * n_counters, 0);
760 if (action_set->counters == NULL) {
761 rte_free(action_set);
762 sfc_err(sa, "failed to alloc counters");
766 for (action = actions, i = 0;
767 action->type != RTE_FLOW_ACTION_TYPE_END && i < n_counters;
769 const struct rte_flow_action_count *conf;
771 if (action->type != RTE_FLOW_ACTION_TYPE_COUNT)
776 action_set->counters[i].mae_id.id =
777 EFX_MAE_RSRC_ID_INVALID;
778 action_set->counters[i].rte_id = conf->id;
781 action_set->n_counters = n_counters;
784 action_set->refcnt = 1;
785 action_set->spec = spec;
786 action_set->encap_header = encap_header;
788 action_set->fw_rsrc.aset_id.id = EFX_MAE_RSRC_ID_INVALID;
790 TAILQ_INSERT_TAIL(&mae->action_sets, action_set, entries);
792 *action_setp = action_set;
794 sfc_dbg(sa, "added action_set=%p", action_set);
800 sfc_mae_action_set_del(struct sfc_adapter *sa,
801 struct sfc_mae_action_set *action_set)
803 struct sfc_mae *mae = &sa->mae;
805 SFC_ASSERT(sfc_adapter_is_locked(sa));
806 SFC_ASSERT(action_set->refcnt != 0);
808 --(action_set->refcnt);
810 if (action_set->refcnt != 0)
813 if (action_set->fw_rsrc.aset_id.id != EFX_MAE_RSRC_ID_INVALID ||
814 action_set->fw_rsrc.refcnt != 0) {
815 sfc_err(sa, "deleting action_set=%p abandons its FW resource: AS_ID=0x%08x, refcnt=%u",
816 action_set, action_set->fw_rsrc.aset_id.id,
817 action_set->fw_rsrc.refcnt);
820 efx_mae_action_set_spec_fini(sa->nic, action_set->spec);
821 sfc_mae_encap_header_del(sa, action_set->encap_header);
822 if (action_set->n_counters > 0) {
823 SFC_ASSERT(action_set->n_counters == 1);
824 SFC_ASSERT(action_set->counters[0].mae_id.id ==
825 EFX_MAE_RSRC_ID_INVALID);
826 rte_free(action_set->counters);
828 TAILQ_REMOVE(&mae->action_sets, action_set, entries);
829 rte_free(action_set);
831 sfc_dbg(sa, "deleted action_set=%p", action_set);
835 sfc_mae_action_set_enable(struct sfc_adapter *sa,
836 struct sfc_mae_action_set *action_set)
838 struct sfc_mae_encap_header *encap_header = action_set->encap_header;
839 struct sfc_mae_counter_id *counters = action_set->counters;
840 struct sfc_mae_fw_rsrc *fw_rsrc = &action_set->fw_rsrc;
843 SFC_ASSERT(sfc_adapter_is_locked(sa));
845 if (fw_rsrc->refcnt == 0) {
846 SFC_ASSERT(fw_rsrc->aset_id.id == EFX_MAE_RSRC_ID_INVALID);
847 SFC_ASSERT(action_set->spec != NULL);
849 rc = sfc_mae_encap_header_enable(sa, encap_header,
854 rc = sfc_mae_counters_enable(sa, counters,
855 action_set->n_counters,
858 sfc_err(sa, "failed to enable %u MAE counters: %s",
859 action_set->n_counters, rte_strerror(rc));
861 sfc_mae_encap_header_disable(sa, encap_header);
865 rc = efx_mae_action_set_alloc(sa->nic, action_set->spec,
868 sfc_err(sa, "failed to enable action_set=%p: %s",
869 action_set, strerror(rc));
871 (void)sfc_mae_counters_disable(sa, counters,
872 action_set->n_counters);
873 sfc_mae_encap_header_disable(sa, encap_header);
877 sfc_dbg(sa, "enabled action_set=%p: AS_ID=0x%08x",
878 action_set, fw_rsrc->aset_id.id);
887 sfc_mae_action_set_disable(struct sfc_adapter *sa,
888 struct sfc_mae_action_set *action_set)
890 struct sfc_mae_fw_rsrc *fw_rsrc = &action_set->fw_rsrc;
893 SFC_ASSERT(sfc_adapter_is_locked(sa));
895 if (fw_rsrc->aset_id.id == EFX_MAE_RSRC_ID_INVALID ||
896 fw_rsrc->refcnt == 0) {
897 sfc_err(sa, "failed to disable action_set=%p: already disabled; AS_ID=0x%08x, refcnt=%u",
898 action_set, fw_rsrc->aset_id.id, fw_rsrc->refcnt);
902 if (fw_rsrc->refcnt == 1) {
903 rc = efx_mae_action_set_free(sa->nic, &fw_rsrc->aset_id);
905 sfc_dbg(sa, "disabled action_set=%p with AS_ID=0x%08x",
906 action_set, fw_rsrc->aset_id.id);
908 sfc_err(sa, "failed to disable action_set=%p with AS_ID=0x%08x: %s",
909 action_set, fw_rsrc->aset_id.id, strerror(rc));
911 fw_rsrc->aset_id.id = EFX_MAE_RSRC_ID_INVALID;
913 rc = sfc_mae_counters_disable(sa, action_set->counters,
914 action_set->n_counters);
916 sfc_err(sa, "failed to disable %u MAE counters: %s",
917 action_set->n_counters, rte_strerror(rc));
920 sfc_mae_encap_header_disable(sa, action_set->encap_header);
927 sfc_mae_flow_cleanup(struct sfc_adapter *sa,
928 struct rte_flow *flow)
930 struct sfc_flow_spec *spec;
931 struct sfc_flow_spec_mae *spec_mae;
941 spec_mae = &spec->mae;
943 if (spec_mae->ft != NULL) {
944 if (spec_mae->ft_rule_type == SFC_FT_RULE_JUMP)
945 spec_mae->ft->jump_rule_is_set = B_FALSE;
947 SFC_ASSERT(spec_mae->ft->refcnt != 0);
948 --(spec_mae->ft->refcnt);
951 SFC_ASSERT(spec_mae->rule_id.id == EFX_MAE_RSRC_ID_INVALID);
953 if (spec_mae->outer_rule != NULL)
954 sfc_mae_outer_rule_del(sa, spec_mae->outer_rule);
956 if (spec_mae->action_set != NULL)
957 sfc_mae_action_set_del(sa, spec_mae->action_set);
959 if (spec_mae->match_spec != NULL)
960 efx_mae_match_spec_fini(sa->nic, spec_mae->match_spec);
964 sfc_mae_set_ethertypes(struct sfc_mae_parse_ctx *ctx)
966 struct sfc_mae_pattern_data *pdata = &ctx->pattern_data;
967 const efx_mae_field_id_t *fremap = ctx->field_ids_remap;
968 const efx_mae_field_id_t field_ids[] = {
969 EFX_MAE_FIELD_VLAN0_PROTO_BE,
970 EFX_MAE_FIELD_VLAN1_PROTO_BE,
972 const struct sfc_mae_ethertype *et;
977 * In accordance with RTE flow API convention, the innermost L2
978 * item's "type" ("inner_type") is a L3 EtherType. If there is
979 * no L3 item, it's 0x0000/0x0000.
981 et = &pdata->ethertypes[pdata->nb_vlan_tags];
982 rc = efx_mae_match_spec_field_set(ctx->match_spec,
983 fremap[EFX_MAE_FIELD_ETHER_TYPE_BE],
985 (const uint8_t *)&et->value,
987 (const uint8_t *)&et->mask);
992 * sfc_mae_rule_parse_item_vlan() has already made sure
993 * that pdata->nb_vlan_tags does not exceed this figure.
995 RTE_BUILD_BUG_ON(SFC_MAE_MATCH_VLAN_MAX_NTAGS != 2);
997 for (i = 0; i < pdata->nb_vlan_tags; ++i) {
998 et = &pdata->ethertypes[i];
1000 rc = efx_mae_match_spec_field_set(ctx->match_spec,
1001 fremap[field_ids[i]],
1003 (const uint8_t *)&et->value,
1005 (const uint8_t *)&et->mask);
1014 sfc_mae_rule_process_pattern_data(struct sfc_mae_parse_ctx *ctx,
1015 struct rte_flow_error *error)
1017 const efx_mae_field_id_t *fremap = ctx->field_ids_remap;
1018 struct sfc_mae_pattern_data *pdata = &ctx->pattern_data;
1019 struct sfc_mae_ethertype *ethertypes = pdata->ethertypes;
1020 const rte_be16_t supported_tpids[] = {
1021 /* VLAN standard TPID (always the first element) */
1022 RTE_BE16(RTE_ETHER_TYPE_VLAN),
1024 /* Double-tagging TPIDs */
1025 RTE_BE16(RTE_ETHER_TYPE_QINQ),
1026 RTE_BE16(RTE_ETHER_TYPE_QINQ1),
1027 RTE_BE16(RTE_ETHER_TYPE_QINQ2),
1028 RTE_BE16(RTE_ETHER_TYPE_QINQ3),
1030 bool enforce_tag_presence[SFC_MAE_MATCH_VLAN_MAX_NTAGS] = {0};
1031 unsigned int nb_supported_tpids = RTE_DIM(supported_tpids);
1032 unsigned int ethertype_idx;
1033 const uint8_t *valuep;
1034 const uint8_t *maskp;
1037 if (pdata->innermost_ethertype_restriction.mask != 0 &&
1038 pdata->nb_vlan_tags < SFC_MAE_MATCH_VLAN_MAX_NTAGS) {
1040 * If a single item VLAN is followed by a L3 item, value
1041 * of "type" in item ETH can't be a double-tagging TPID.
1043 nb_supported_tpids = 1;
1047 * sfc_mae_rule_parse_item_vlan() has already made sure
1048 * that pdata->nb_vlan_tags does not exceed this figure.
1050 RTE_BUILD_BUG_ON(SFC_MAE_MATCH_VLAN_MAX_NTAGS != 2);
1052 for (ethertype_idx = 0;
1053 ethertype_idx < pdata->nb_vlan_tags; ++ethertype_idx) {
1054 rte_be16_t tpid_v = ethertypes[ethertype_idx].value;
1055 rte_be16_t tpid_m = ethertypes[ethertype_idx].mask;
1056 unsigned int tpid_idx;
1059 * This loop can have only two iterations. On the second one,
1060 * drop outer tag presence enforcement bit because the inner
1061 * tag presence automatically assumes that for the outer tag.
1063 enforce_tag_presence[0] = B_FALSE;
1065 if (tpid_m == RTE_BE16(0)) {
1066 if (pdata->tci_masks[ethertype_idx] == RTE_BE16(0))
1067 enforce_tag_presence[ethertype_idx] = B_TRUE;
1069 /* No match on this field, and no value check. */
1070 nb_supported_tpids = 1;
1074 /* Exact match is supported only. */
1075 if (tpid_m != RTE_BE16(0xffff)) {
1076 sfc_err(ctx->sa, "TPID mask must be 0x0 or 0xffff; got 0x%04x",
1077 rte_be_to_cpu_16(tpid_m));
1082 for (tpid_idx = pdata->nb_vlan_tags - ethertype_idx - 1;
1083 tpid_idx < nb_supported_tpids; ++tpid_idx) {
1084 if (tpid_v == supported_tpids[tpid_idx])
1088 if (tpid_idx == nb_supported_tpids) {
1089 sfc_err(ctx->sa, "TPID 0x%04x is unsupported",
1090 rte_be_to_cpu_16(tpid_v));
1095 nb_supported_tpids = 1;
1098 if (pdata->innermost_ethertype_restriction.mask == RTE_BE16(0xffff)) {
1099 struct sfc_mae_ethertype *et = ðertypes[ethertype_idx];
1100 rte_be16_t enforced_et;
1102 enforced_et = pdata->innermost_ethertype_restriction.value;
1104 if (et->mask == 0) {
1105 et->mask = RTE_BE16(0xffff);
1106 et->value = enforced_et;
1107 } else if (et->mask != RTE_BE16(0xffff) ||
1108 et->value != enforced_et) {
1109 sfc_err(ctx->sa, "L3 EtherType must be 0x0/0x0 or 0x%04x/0xffff; got 0x%04x/0x%04x",
1110 rte_be_to_cpu_16(enforced_et),
1111 rte_be_to_cpu_16(et->value),
1112 rte_be_to_cpu_16(et->mask));
1119 * Now, when the number of VLAN tags is known, set fields
1120 * ETHER_TYPE, VLAN0_PROTO and VLAN1_PROTO so that the first
1121 * one is either a valid L3 EtherType (or 0x0000/0x0000),
1122 * and the last two are valid TPIDs (or 0x0000/0x0000).
1124 rc = sfc_mae_set_ethertypes(ctx);
1128 if (pdata->l3_next_proto_restriction_mask == 0xff) {
1129 if (pdata->l3_next_proto_mask == 0) {
1130 pdata->l3_next_proto_mask = 0xff;
1131 pdata->l3_next_proto_value =
1132 pdata->l3_next_proto_restriction_value;
1133 } else if (pdata->l3_next_proto_mask != 0xff ||
1134 pdata->l3_next_proto_value !=
1135 pdata->l3_next_proto_restriction_value) {
1136 sfc_err(ctx->sa, "L3 next protocol must be 0x0/0x0 or 0x%02x/0xff; got 0x%02x/0x%02x",
1137 pdata->l3_next_proto_restriction_value,
1138 pdata->l3_next_proto_value,
1139 pdata->l3_next_proto_mask);
1145 if (enforce_tag_presence[0] || pdata->has_ovlan_mask) {
1146 rc = efx_mae_match_spec_bit_set(ctx->match_spec,
1147 fremap[EFX_MAE_FIELD_HAS_OVLAN],
1148 enforce_tag_presence[0] ||
1149 pdata->has_ovlan_value);
1154 if (enforce_tag_presence[1] || pdata->has_ivlan_mask) {
1155 rc = efx_mae_match_spec_bit_set(ctx->match_spec,
1156 fremap[EFX_MAE_FIELD_HAS_IVLAN],
1157 enforce_tag_presence[1] ||
1158 pdata->has_ivlan_value);
1163 valuep = (const uint8_t *)&pdata->l3_next_proto_value;
1164 maskp = (const uint8_t *)&pdata->l3_next_proto_mask;
1165 rc = efx_mae_match_spec_field_set(ctx->match_spec,
1166 fremap[EFX_MAE_FIELD_IP_PROTO],
1167 sizeof(pdata->l3_next_proto_value),
1169 sizeof(pdata->l3_next_proto_mask),
1177 return rte_flow_error_set(error, rc, RTE_FLOW_ERROR_TYPE_ITEM, NULL,
1178 "Failed to process pattern data");
1182 sfc_mae_rule_parse_item_port_id(const struct rte_flow_item *item,
1183 struct sfc_flow_parse_ctx *ctx,
1184 struct rte_flow_error *error)
1186 struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1187 const struct rte_flow_item_port_id supp_mask = {
1190 const void *def_mask = &rte_flow_item_port_id_mask;
1191 const struct rte_flow_item_port_id *spec = NULL;
1192 const struct rte_flow_item_port_id *mask = NULL;
1193 efx_mport_sel_t mport_sel;
1196 if (ctx_mae->match_mport_set) {
1197 return rte_flow_error_set(error, ENOTSUP,
1198 RTE_FLOW_ERROR_TYPE_ITEM, item,
1199 "Can't handle multiple traffic source items");
1202 rc = sfc_flow_parse_init(item,
1203 (const void **)&spec, (const void **)&mask,
1204 (const void *)&supp_mask, def_mask,
1205 sizeof(struct rte_flow_item_port_id), error);
1209 if (mask->id != supp_mask.id) {
1210 return rte_flow_error_set(error, EINVAL,
1211 RTE_FLOW_ERROR_TYPE_ITEM, item,
1212 "Bad mask in the PORT_ID pattern item");
1215 /* If "spec" is not set, could be any port ID */
1219 if (spec->id > UINT16_MAX) {
1220 return rte_flow_error_set(error, EOVERFLOW,
1221 RTE_FLOW_ERROR_TYPE_ITEM, item,
1222 "The port ID is too large");
1225 rc = sfc_mae_switch_port_by_ethdev(ctx_mae->sa->mae.switch_domain_id,
1226 spec->id, &mport_sel);
1228 return rte_flow_error_set(error, rc,
1229 RTE_FLOW_ERROR_TYPE_ITEM, item,
1230 "Can't find RTE ethdev by the port ID");
1233 rc = efx_mae_match_spec_mport_set(ctx_mae->match_spec,
1236 return rte_flow_error_set(error, rc,
1237 RTE_FLOW_ERROR_TYPE_ITEM, item,
1238 "Failed to set MPORT for the port ID");
1241 ctx_mae->match_mport_set = B_TRUE;
1247 sfc_mae_rule_parse_item_phy_port(const struct rte_flow_item *item,
1248 struct sfc_flow_parse_ctx *ctx,
1249 struct rte_flow_error *error)
1251 struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1252 const struct rte_flow_item_phy_port supp_mask = {
1253 .index = 0xffffffff,
1255 const void *def_mask = &rte_flow_item_phy_port_mask;
1256 const struct rte_flow_item_phy_port *spec = NULL;
1257 const struct rte_flow_item_phy_port *mask = NULL;
1258 efx_mport_sel_t mport_v;
1261 if (ctx_mae->match_mport_set) {
1262 return rte_flow_error_set(error, ENOTSUP,
1263 RTE_FLOW_ERROR_TYPE_ITEM, item,
1264 "Can't handle multiple traffic source items");
1267 rc = sfc_flow_parse_init(item,
1268 (const void **)&spec, (const void **)&mask,
1269 (const void *)&supp_mask, def_mask,
1270 sizeof(struct rte_flow_item_phy_port), error);
1274 if (mask->index != supp_mask.index) {
1275 return rte_flow_error_set(error, EINVAL,
1276 RTE_FLOW_ERROR_TYPE_ITEM, item,
1277 "Bad mask in the PHY_PORT pattern item");
1280 /* If "spec" is not set, could be any physical port */
1284 rc = efx_mae_mport_by_phy_port(spec->index, &mport_v);
1286 return rte_flow_error_set(error, rc,
1287 RTE_FLOW_ERROR_TYPE_ITEM, item,
1288 "Failed to convert the PHY_PORT index");
1291 rc = efx_mae_match_spec_mport_set(ctx_mae->match_spec, &mport_v, NULL);
1293 return rte_flow_error_set(error, rc,
1294 RTE_FLOW_ERROR_TYPE_ITEM, item,
1295 "Failed to set MPORT for the PHY_PORT");
1298 ctx_mae->match_mport_set = B_TRUE;
1304 sfc_mae_rule_parse_item_pf(const struct rte_flow_item *item,
1305 struct sfc_flow_parse_ctx *ctx,
1306 struct rte_flow_error *error)
1308 struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1309 const efx_nic_cfg_t *encp = efx_nic_cfg_get(ctx_mae->sa->nic);
1310 efx_mport_sel_t mport_v;
1313 if (ctx_mae->match_mport_set) {
1314 return rte_flow_error_set(error, ENOTSUP,
1315 RTE_FLOW_ERROR_TYPE_ITEM, item,
1316 "Can't handle multiple traffic source items");
1319 rc = efx_mae_mport_by_pcie_function(encp->enc_pf, EFX_PCI_VF_INVALID,
1322 return rte_flow_error_set(error, rc,
1323 RTE_FLOW_ERROR_TYPE_ITEM, item,
1324 "Failed to convert the PF ID");
1327 rc = efx_mae_match_spec_mport_set(ctx_mae->match_spec, &mport_v, NULL);
1329 return rte_flow_error_set(error, rc,
1330 RTE_FLOW_ERROR_TYPE_ITEM, item,
1331 "Failed to set MPORT for the PF");
1334 ctx_mae->match_mport_set = B_TRUE;
1340 sfc_mae_rule_parse_item_vf(const struct rte_flow_item *item,
1341 struct sfc_flow_parse_ctx *ctx,
1342 struct rte_flow_error *error)
1344 struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1345 const efx_nic_cfg_t *encp = efx_nic_cfg_get(ctx_mae->sa->nic);
1346 const struct rte_flow_item_vf supp_mask = {
1349 const void *def_mask = &rte_flow_item_vf_mask;
1350 const struct rte_flow_item_vf *spec = NULL;
1351 const struct rte_flow_item_vf *mask = NULL;
1352 efx_mport_sel_t mport_v;
1355 if (ctx_mae->match_mport_set) {
1356 return rte_flow_error_set(error, ENOTSUP,
1357 RTE_FLOW_ERROR_TYPE_ITEM, item,
1358 "Can't handle multiple traffic source items");
1361 rc = sfc_flow_parse_init(item,
1362 (const void **)&spec, (const void **)&mask,
1363 (const void *)&supp_mask, def_mask,
1364 sizeof(struct rte_flow_item_vf), error);
1368 if (mask->id != supp_mask.id) {
1369 return rte_flow_error_set(error, EINVAL,
1370 RTE_FLOW_ERROR_TYPE_ITEM, item,
1371 "Bad mask in the VF pattern item");
1375 * If "spec" is not set, the item requests any VF related to the
1376 * PF of the current DPDK port (but not the PF itself).
1377 * Reject this match criterion as unsupported.
1380 return rte_flow_error_set(error, EINVAL,
1381 RTE_FLOW_ERROR_TYPE_ITEM, item,
1382 "Bad spec in the VF pattern item");
1385 rc = efx_mae_mport_by_pcie_function(encp->enc_pf, spec->id, &mport_v);
1387 return rte_flow_error_set(error, rc,
1388 RTE_FLOW_ERROR_TYPE_ITEM, item,
1389 "Failed to convert the PF + VF IDs");
1392 rc = efx_mae_match_spec_mport_set(ctx_mae->match_spec, &mport_v, NULL);
1394 return rte_flow_error_set(error, rc,
1395 RTE_FLOW_ERROR_TYPE_ITEM, item,
1396 "Failed to set MPORT for the PF + VF");
1399 ctx_mae->match_mport_set = B_TRUE;
1405 * Having this field ID in a field locator means that this
1406 * locator cannot be used to actually set the field at the
1407 * time when the corresponding item gets encountered. Such
1408 * fields get stashed in the parsing context instead. This
1409 * is required to resolve dependencies between the stashed
1410 * fields. See sfc_mae_rule_process_pattern_data().
1412 #define SFC_MAE_FIELD_HANDLING_DEFERRED EFX_MAE_FIELD_NIDS
1414 struct sfc_mae_field_locator {
1415 efx_mae_field_id_t field_id;
1417 /* Field offset in the corresponding rte_flow_item_ struct */
1422 sfc_mae_item_build_supp_mask(const struct sfc_mae_field_locator *field_locators,
1423 unsigned int nb_field_locators, void *mask_ptr,
1428 memset(mask_ptr, 0, mask_size);
1430 for (i = 0; i < nb_field_locators; ++i) {
1431 const struct sfc_mae_field_locator *fl = &field_locators[i];
1433 SFC_ASSERT(fl->ofst + fl->size <= mask_size);
1434 memset(RTE_PTR_ADD(mask_ptr, fl->ofst), 0xff, fl->size);
1439 sfc_mae_parse_item(const struct sfc_mae_field_locator *field_locators,
1440 unsigned int nb_field_locators, const uint8_t *spec,
1441 const uint8_t *mask, struct sfc_mae_parse_ctx *ctx,
1442 struct rte_flow_error *error)
1444 const efx_mae_field_id_t *fremap = ctx->field_ids_remap;
1448 for (i = 0; i < nb_field_locators; ++i) {
1449 const struct sfc_mae_field_locator *fl = &field_locators[i];
1451 if (fl->field_id == SFC_MAE_FIELD_HANDLING_DEFERRED)
1454 rc = efx_mae_match_spec_field_set(ctx->match_spec,
1455 fremap[fl->field_id],
1456 fl->size, spec + fl->ofst,
1457 fl->size, mask + fl->ofst);
1463 rc = rte_flow_error_set(error, rc, RTE_FLOW_ERROR_TYPE_ITEM,
1464 NULL, "Failed to process item fields");
1470 static const struct sfc_mae_field_locator flocs_eth[] = {
1473 * This locator is used only for building supported fields mask.
1474 * The field is handled by sfc_mae_rule_process_pattern_data().
1476 SFC_MAE_FIELD_HANDLING_DEFERRED,
1477 RTE_SIZEOF_FIELD(struct rte_flow_item_eth, type),
1478 offsetof(struct rte_flow_item_eth, type),
1481 EFX_MAE_FIELD_ETH_DADDR_BE,
1482 RTE_SIZEOF_FIELD(struct rte_flow_item_eth, dst),
1483 offsetof(struct rte_flow_item_eth, dst),
1486 EFX_MAE_FIELD_ETH_SADDR_BE,
1487 RTE_SIZEOF_FIELD(struct rte_flow_item_eth, src),
1488 offsetof(struct rte_flow_item_eth, src),
1493 sfc_mae_rule_parse_item_eth(const struct rte_flow_item *item,
1494 struct sfc_flow_parse_ctx *ctx,
1495 struct rte_flow_error *error)
1497 struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1498 struct rte_flow_item_eth supp_mask;
1499 const uint8_t *spec = NULL;
1500 const uint8_t *mask = NULL;
1503 sfc_mae_item_build_supp_mask(flocs_eth, RTE_DIM(flocs_eth),
1504 &supp_mask, sizeof(supp_mask));
1505 supp_mask.has_vlan = 1;
1507 rc = sfc_flow_parse_init(item,
1508 (const void **)&spec, (const void **)&mask,
1509 (const void *)&supp_mask,
1510 &rte_flow_item_eth_mask,
1511 sizeof(struct rte_flow_item_eth), error);
1516 struct sfc_mae_pattern_data *pdata = &ctx_mae->pattern_data;
1517 struct sfc_mae_ethertype *ethertypes = pdata->ethertypes;
1518 const struct rte_flow_item_eth *item_spec;
1519 const struct rte_flow_item_eth *item_mask;
1521 item_spec = (const struct rte_flow_item_eth *)spec;
1522 item_mask = (const struct rte_flow_item_eth *)mask;
1525 * Remember various match criteria in the parsing context.
1526 * sfc_mae_rule_process_pattern_data() will consider them
1527 * altogether when the rest of the items have been parsed.
1529 ethertypes[0].value = item_spec->type;
1530 ethertypes[0].mask = item_mask->type;
1531 if (item_mask->has_vlan) {
1532 pdata->has_ovlan_mask = B_TRUE;
1533 if (item_spec->has_vlan)
1534 pdata->has_ovlan_value = B_TRUE;
1538 * The specification is empty. The overall pattern
1539 * validity will be enforced at the end of parsing.
1540 * See sfc_mae_rule_process_pattern_data().
1545 return sfc_mae_parse_item(flocs_eth, RTE_DIM(flocs_eth), spec, mask,
1549 static const struct sfc_mae_field_locator flocs_vlan[] = {
1552 EFX_MAE_FIELD_VLAN0_TCI_BE,
1553 RTE_SIZEOF_FIELD(struct rte_flow_item_vlan, tci),
1554 offsetof(struct rte_flow_item_vlan, tci),
1558 * This locator is used only for building supported fields mask.
1559 * The field is handled by sfc_mae_rule_process_pattern_data().
1561 SFC_MAE_FIELD_HANDLING_DEFERRED,
1562 RTE_SIZEOF_FIELD(struct rte_flow_item_vlan, inner_type),
1563 offsetof(struct rte_flow_item_vlan, inner_type),
1568 EFX_MAE_FIELD_VLAN1_TCI_BE,
1569 RTE_SIZEOF_FIELD(struct rte_flow_item_vlan, tci),
1570 offsetof(struct rte_flow_item_vlan, tci),
1574 * This locator is used only for building supported fields mask.
1575 * The field is handled by sfc_mae_rule_process_pattern_data().
1577 SFC_MAE_FIELD_HANDLING_DEFERRED,
1578 RTE_SIZEOF_FIELD(struct rte_flow_item_vlan, inner_type),
1579 offsetof(struct rte_flow_item_vlan, inner_type),
1584 sfc_mae_rule_parse_item_vlan(const struct rte_flow_item *item,
1585 struct sfc_flow_parse_ctx *ctx,
1586 struct rte_flow_error *error)
1588 struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1589 struct sfc_mae_pattern_data *pdata = &ctx_mae->pattern_data;
1590 boolean_t *has_vlan_mp_by_nb_tags[SFC_MAE_MATCH_VLAN_MAX_NTAGS] = {
1591 &pdata->has_ovlan_mask,
1592 &pdata->has_ivlan_mask,
1594 boolean_t *has_vlan_vp_by_nb_tags[SFC_MAE_MATCH_VLAN_MAX_NTAGS] = {
1595 &pdata->has_ovlan_value,
1596 &pdata->has_ivlan_value,
1598 boolean_t *cur_tag_presence_bit_mp;
1599 boolean_t *cur_tag_presence_bit_vp;
1600 const struct sfc_mae_field_locator *flocs;
1601 struct rte_flow_item_vlan supp_mask;
1602 const uint8_t *spec = NULL;
1603 const uint8_t *mask = NULL;
1604 unsigned int nb_flocs;
1607 RTE_BUILD_BUG_ON(SFC_MAE_MATCH_VLAN_MAX_NTAGS != 2);
1609 if (pdata->nb_vlan_tags == SFC_MAE_MATCH_VLAN_MAX_NTAGS) {
1610 return rte_flow_error_set(error, ENOTSUP,
1611 RTE_FLOW_ERROR_TYPE_ITEM, item,
1612 "Can't match that many VLAN tags");
1615 cur_tag_presence_bit_mp = has_vlan_mp_by_nb_tags[pdata->nb_vlan_tags];
1616 cur_tag_presence_bit_vp = has_vlan_vp_by_nb_tags[pdata->nb_vlan_tags];
1618 if (*cur_tag_presence_bit_mp == B_TRUE &&
1619 *cur_tag_presence_bit_vp == B_FALSE) {
1620 return rte_flow_error_set(error, EINVAL,
1621 RTE_FLOW_ERROR_TYPE_ITEM, item,
1622 "The previous item enforces no (more) VLAN, "
1623 "so the current item (VLAN) must not exist");
1626 nb_flocs = RTE_DIM(flocs_vlan) / SFC_MAE_MATCH_VLAN_MAX_NTAGS;
1627 flocs = flocs_vlan + pdata->nb_vlan_tags * nb_flocs;
1629 sfc_mae_item_build_supp_mask(flocs, nb_flocs,
1630 &supp_mask, sizeof(supp_mask));
1632 * This only means that the field is supported by the driver and libefx.
1633 * Support on NIC level will be checked when all items have been parsed.
1635 supp_mask.has_more_vlan = 1;
1637 rc = sfc_flow_parse_init(item,
1638 (const void **)&spec, (const void **)&mask,
1639 (const void *)&supp_mask,
1640 &rte_flow_item_vlan_mask,
1641 sizeof(struct rte_flow_item_vlan), error);
1646 struct sfc_mae_ethertype *et = pdata->ethertypes;
1647 const struct rte_flow_item_vlan *item_spec;
1648 const struct rte_flow_item_vlan *item_mask;
1650 item_spec = (const struct rte_flow_item_vlan *)spec;
1651 item_mask = (const struct rte_flow_item_vlan *)mask;
1654 * Remember various match criteria in the parsing context.
1655 * sfc_mae_rule_process_pattern_data() will consider them
1656 * altogether when the rest of the items have been parsed.
1658 et[pdata->nb_vlan_tags + 1].value = item_spec->inner_type;
1659 et[pdata->nb_vlan_tags + 1].mask = item_mask->inner_type;
1660 pdata->tci_masks[pdata->nb_vlan_tags] = item_mask->tci;
1661 if (item_mask->has_more_vlan) {
1662 if (pdata->nb_vlan_tags ==
1663 SFC_MAE_MATCH_VLAN_MAX_NTAGS) {
1664 return rte_flow_error_set(error, ENOTSUP,
1665 RTE_FLOW_ERROR_TYPE_ITEM, item,
1666 "Can't use 'has_more_vlan' in "
1667 "the second item VLAN");
1669 pdata->has_ivlan_mask = B_TRUE;
1670 if (item_spec->has_more_vlan)
1671 pdata->has_ivlan_value = B_TRUE;
1674 /* Convert TCI to MAE representation right now. */
1675 rc = sfc_mae_parse_item(flocs, nb_flocs, spec, mask,
1681 ++(pdata->nb_vlan_tags);
1686 static const struct sfc_mae_field_locator flocs_ipv4[] = {
1688 EFX_MAE_FIELD_SRC_IP4_BE,
1689 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv4, hdr.src_addr),
1690 offsetof(struct rte_flow_item_ipv4, hdr.src_addr),
1693 EFX_MAE_FIELD_DST_IP4_BE,
1694 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv4, hdr.dst_addr),
1695 offsetof(struct rte_flow_item_ipv4, hdr.dst_addr),
1699 * This locator is used only for building supported fields mask.
1700 * The field is handled by sfc_mae_rule_process_pattern_data().
1702 SFC_MAE_FIELD_HANDLING_DEFERRED,
1703 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv4, hdr.next_proto_id),
1704 offsetof(struct rte_flow_item_ipv4, hdr.next_proto_id),
1707 EFX_MAE_FIELD_IP_TOS,
1708 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv4,
1709 hdr.type_of_service),
1710 offsetof(struct rte_flow_item_ipv4, hdr.type_of_service),
1713 EFX_MAE_FIELD_IP_TTL,
1714 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv4, hdr.time_to_live),
1715 offsetof(struct rte_flow_item_ipv4, hdr.time_to_live),
1720 sfc_mae_rule_parse_item_ipv4(const struct rte_flow_item *item,
1721 struct sfc_flow_parse_ctx *ctx,
1722 struct rte_flow_error *error)
1724 rte_be16_t ethertype_ipv4_be = RTE_BE16(RTE_ETHER_TYPE_IPV4);
1725 struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1726 struct sfc_mae_pattern_data *pdata = &ctx_mae->pattern_data;
1727 struct rte_flow_item_ipv4 supp_mask;
1728 const uint8_t *spec = NULL;
1729 const uint8_t *mask = NULL;
1732 sfc_mae_item_build_supp_mask(flocs_ipv4, RTE_DIM(flocs_ipv4),
1733 &supp_mask, sizeof(supp_mask));
1735 rc = sfc_flow_parse_init(item,
1736 (const void **)&spec, (const void **)&mask,
1737 (const void *)&supp_mask,
1738 &rte_flow_item_ipv4_mask,
1739 sizeof(struct rte_flow_item_ipv4), error);
1743 pdata->innermost_ethertype_restriction.value = ethertype_ipv4_be;
1744 pdata->innermost_ethertype_restriction.mask = RTE_BE16(0xffff);
1747 const struct rte_flow_item_ipv4 *item_spec;
1748 const struct rte_flow_item_ipv4 *item_mask;
1750 item_spec = (const struct rte_flow_item_ipv4 *)spec;
1751 item_mask = (const struct rte_flow_item_ipv4 *)mask;
1753 pdata->l3_next_proto_value = item_spec->hdr.next_proto_id;
1754 pdata->l3_next_proto_mask = item_mask->hdr.next_proto_id;
1759 return sfc_mae_parse_item(flocs_ipv4, RTE_DIM(flocs_ipv4), spec, mask,
1763 static const struct sfc_mae_field_locator flocs_ipv6[] = {
1765 EFX_MAE_FIELD_SRC_IP6_BE,
1766 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv6, hdr.src_addr),
1767 offsetof(struct rte_flow_item_ipv6, hdr.src_addr),
1770 EFX_MAE_FIELD_DST_IP6_BE,
1771 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv6, hdr.dst_addr),
1772 offsetof(struct rte_flow_item_ipv6, hdr.dst_addr),
1776 * This locator is used only for building supported fields mask.
1777 * The field is handled by sfc_mae_rule_process_pattern_data().
1779 SFC_MAE_FIELD_HANDLING_DEFERRED,
1780 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv6, hdr.proto),
1781 offsetof(struct rte_flow_item_ipv6, hdr.proto),
1784 EFX_MAE_FIELD_IP_TTL,
1785 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv6, hdr.hop_limits),
1786 offsetof(struct rte_flow_item_ipv6, hdr.hop_limits),
1791 sfc_mae_rule_parse_item_ipv6(const struct rte_flow_item *item,
1792 struct sfc_flow_parse_ctx *ctx,
1793 struct rte_flow_error *error)
1795 rte_be16_t ethertype_ipv6_be = RTE_BE16(RTE_ETHER_TYPE_IPV6);
1796 struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1797 const efx_mae_field_id_t *fremap = ctx_mae->field_ids_remap;
1798 struct sfc_mae_pattern_data *pdata = &ctx_mae->pattern_data;
1799 struct rte_flow_item_ipv6 supp_mask;
1800 const uint8_t *spec = NULL;
1801 const uint8_t *mask = NULL;
1802 rte_be32_t vtc_flow_be;
1808 sfc_mae_item_build_supp_mask(flocs_ipv6, RTE_DIM(flocs_ipv6),
1809 &supp_mask, sizeof(supp_mask));
1811 vtc_flow_be = RTE_BE32(RTE_IPV6_HDR_TC_MASK);
1812 memcpy(&supp_mask, &vtc_flow_be, sizeof(vtc_flow_be));
1814 rc = sfc_flow_parse_init(item,
1815 (const void **)&spec, (const void **)&mask,
1816 (const void *)&supp_mask,
1817 &rte_flow_item_ipv6_mask,
1818 sizeof(struct rte_flow_item_ipv6), error);
1822 pdata->innermost_ethertype_restriction.value = ethertype_ipv6_be;
1823 pdata->innermost_ethertype_restriction.mask = RTE_BE16(0xffff);
1826 const struct rte_flow_item_ipv6 *item_spec;
1827 const struct rte_flow_item_ipv6 *item_mask;
1829 item_spec = (const struct rte_flow_item_ipv6 *)spec;
1830 item_mask = (const struct rte_flow_item_ipv6 *)mask;
1832 pdata->l3_next_proto_value = item_spec->hdr.proto;
1833 pdata->l3_next_proto_mask = item_mask->hdr.proto;
1838 rc = sfc_mae_parse_item(flocs_ipv6, RTE_DIM(flocs_ipv6), spec, mask,
1843 memcpy(&vtc_flow_be, spec, sizeof(vtc_flow_be));
1844 vtc_flow = rte_be_to_cpu_32(vtc_flow_be);
1845 tc_value = (vtc_flow & RTE_IPV6_HDR_TC_MASK) >> RTE_IPV6_HDR_TC_SHIFT;
1847 memcpy(&vtc_flow_be, mask, sizeof(vtc_flow_be));
1848 vtc_flow = rte_be_to_cpu_32(vtc_flow_be);
1849 tc_mask = (vtc_flow & RTE_IPV6_HDR_TC_MASK) >> RTE_IPV6_HDR_TC_SHIFT;
1851 rc = efx_mae_match_spec_field_set(ctx_mae->match_spec,
1852 fremap[EFX_MAE_FIELD_IP_TOS],
1853 sizeof(tc_value), &tc_value,
1854 sizeof(tc_mask), &tc_mask);
1856 return rte_flow_error_set(error, rc, RTE_FLOW_ERROR_TYPE_ITEM,
1857 NULL, "Failed to process item fields");
1863 static const struct sfc_mae_field_locator flocs_tcp[] = {
1865 EFX_MAE_FIELD_L4_SPORT_BE,
1866 RTE_SIZEOF_FIELD(struct rte_flow_item_tcp, hdr.src_port),
1867 offsetof(struct rte_flow_item_tcp, hdr.src_port),
1870 EFX_MAE_FIELD_L4_DPORT_BE,
1871 RTE_SIZEOF_FIELD(struct rte_flow_item_tcp, hdr.dst_port),
1872 offsetof(struct rte_flow_item_tcp, hdr.dst_port),
1875 EFX_MAE_FIELD_TCP_FLAGS_BE,
1877 * The values have been picked intentionally since the
1878 * target MAE field is oversize (16 bit). This mapping
1879 * relies on the fact that the MAE field is big-endian.
1881 RTE_SIZEOF_FIELD(struct rte_flow_item_tcp, hdr.data_off) +
1882 RTE_SIZEOF_FIELD(struct rte_flow_item_tcp, hdr.tcp_flags),
1883 offsetof(struct rte_flow_item_tcp, hdr.data_off),
1888 sfc_mae_rule_parse_item_tcp(const struct rte_flow_item *item,
1889 struct sfc_flow_parse_ctx *ctx,
1890 struct rte_flow_error *error)
1892 struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1893 struct sfc_mae_pattern_data *pdata = &ctx_mae->pattern_data;
1894 struct rte_flow_item_tcp supp_mask;
1895 const uint8_t *spec = NULL;
1896 const uint8_t *mask = NULL;
1900 * When encountered among outermost items, item TCP is invalid.
1901 * Check which match specification is being constructed now.
1903 if (ctx_mae->match_spec != ctx_mae->match_spec_action) {
1904 return rte_flow_error_set(error, EINVAL,
1905 RTE_FLOW_ERROR_TYPE_ITEM, item,
1906 "TCP in outer frame is invalid");
1909 sfc_mae_item_build_supp_mask(flocs_tcp, RTE_DIM(flocs_tcp),
1910 &supp_mask, sizeof(supp_mask));
1912 rc = sfc_flow_parse_init(item,
1913 (const void **)&spec, (const void **)&mask,
1914 (const void *)&supp_mask,
1915 &rte_flow_item_tcp_mask,
1916 sizeof(struct rte_flow_item_tcp), error);
1920 pdata->l3_next_proto_restriction_value = IPPROTO_TCP;
1921 pdata->l3_next_proto_restriction_mask = 0xff;
1926 return sfc_mae_parse_item(flocs_tcp, RTE_DIM(flocs_tcp), spec, mask,
1930 static const struct sfc_mae_field_locator flocs_udp[] = {
1932 EFX_MAE_FIELD_L4_SPORT_BE,
1933 RTE_SIZEOF_FIELD(struct rte_flow_item_udp, hdr.src_port),
1934 offsetof(struct rte_flow_item_udp, hdr.src_port),
1937 EFX_MAE_FIELD_L4_DPORT_BE,
1938 RTE_SIZEOF_FIELD(struct rte_flow_item_udp, hdr.dst_port),
1939 offsetof(struct rte_flow_item_udp, hdr.dst_port),
1944 sfc_mae_rule_parse_item_udp(const struct rte_flow_item *item,
1945 struct sfc_flow_parse_ctx *ctx,
1946 struct rte_flow_error *error)
1948 struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1949 struct sfc_mae_pattern_data *pdata = &ctx_mae->pattern_data;
1950 struct rte_flow_item_udp supp_mask;
1951 const uint8_t *spec = NULL;
1952 const uint8_t *mask = NULL;
1955 sfc_mae_item_build_supp_mask(flocs_udp, RTE_DIM(flocs_udp),
1956 &supp_mask, sizeof(supp_mask));
1958 rc = sfc_flow_parse_init(item,
1959 (const void **)&spec, (const void **)&mask,
1960 (const void *)&supp_mask,
1961 &rte_flow_item_udp_mask,
1962 sizeof(struct rte_flow_item_udp), error);
1966 pdata->l3_next_proto_restriction_value = IPPROTO_UDP;
1967 pdata->l3_next_proto_restriction_mask = 0xff;
1972 return sfc_mae_parse_item(flocs_udp, RTE_DIM(flocs_udp), spec, mask,
1976 static const struct sfc_mae_field_locator flocs_tunnel[] = {
1979 * The size and offset values are relevant
1980 * for Geneve and NVGRE, too.
1982 .size = RTE_SIZEOF_FIELD(struct rte_flow_item_vxlan, vni),
1983 .ofst = offsetof(struct rte_flow_item_vxlan, vni),
1988 * An auxiliary registry which allows using non-encap. field IDs
1989 * directly when building a match specification of type ACTION.
1991 * See sfc_mae_rule_parse_pattern() and sfc_mae_rule_parse_item_tunnel().
1993 static const efx_mae_field_id_t field_ids_no_remap[] = {
1994 #define FIELD_ID_NO_REMAP(_field) \
1995 [EFX_MAE_FIELD_##_field] = EFX_MAE_FIELD_##_field
1997 FIELD_ID_NO_REMAP(ETHER_TYPE_BE),
1998 FIELD_ID_NO_REMAP(ETH_SADDR_BE),
1999 FIELD_ID_NO_REMAP(ETH_DADDR_BE),
2000 FIELD_ID_NO_REMAP(VLAN0_TCI_BE),
2001 FIELD_ID_NO_REMAP(VLAN0_PROTO_BE),
2002 FIELD_ID_NO_REMAP(VLAN1_TCI_BE),
2003 FIELD_ID_NO_REMAP(VLAN1_PROTO_BE),
2004 FIELD_ID_NO_REMAP(SRC_IP4_BE),
2005 FIELD_ID_NO_REMAP(DST_IP4_BE),
2006 FIELD_ID_NO_REMAP(IP_PROTO),
2007 FIELD_ID_NO_REMAP(IP_TOS),
2008 FIELD_ID_NO_REMAP(IP_TTL),
2009 FIELD_ID_NO_REMAP(SRC_IP6_BE),
2010 FIELD_ID_NO_REMAP(DST_IP6_BE),
2011 FIELD_ID_NO_REMAP(L4_SPORT_BE),
2012 FIELD_ID_NO_REMAP(L4_DPORT_BE),
2013 FIELD_ID_NO_REMAP(TCP_FLAGS_BE),
2014 FIELD_ID_NO_REMAP(HAS_OVLAN),
2015 FIELD_ID_NO_REMAP(HAS_IVLAN),
2017 #undef FIELD_ID_NO_REMAP
2021 * An auxiliary registry which allows using "ENC" field IDs
2022 * when building a match specification of type OUTER.
2024 * See sfc_mae_rule_encap_parse_init().
2026 static const efx_mae_field_id_t field_ids_remap_to_encap[] = {
2027 #define FIELD_ID_REMAP_TO_ENCAP(_field) \
2028 [EFX_MAE_FIELD_##_field] = EFX_MAE_FIELD_ENC_##_field
2030 FIELD_ID_REMAP_TO_ENCAP(ETHER_TYPE_BE),
2031 FIELD_ID_REMAP_TO_ENCAP(ETH_SADDR_BE),
2032 FIELD_ID_REMAP_TO_ENCAP(ETH_DADDR_BE),
2033 FIELD_ID_REMAP_TO_ENCAP(VLAN0_TCI_BE),
2034 FIELD_ID_REMAP_TO_ENCAP(VLAN0_PROTO_BE),
2035 FIELD_ID_REMAP_TO_ENCAP(VLAN1_TCI_BE),
2036 FIELD_ID_REMAP_TO_ENCAP(VLAN1_PROTO_BE),
2037 FIELD_ID_REMAP_TO_ENCAP(SRC_IP4_BE),
2038 FIELD_ID_REMAP_TO_ENCAP(DST_IP4_BE),
2039 FIELD_ID_REMAP_TO_ENCAP(IP_PROTO),
2040 FIELD_ID_REMAP_TO_ENCAP(IP_TOS),
2041 FIELD_ID_REMAP_TO_ENCAP(IP_TTL),
2042 FIELD_ID_REMAP_TO_ENCAP(SRC_IP6_BE),
2043 FIELD_ID_REMAP_TO_ENCAP(DST_IP6_BE),
2044 FIELD_ID_REMAP_TO_ENCAP(L4_SPORT_BE),
2045 FIELD_ID_REMAP_TO_ENCAP(L4_DPORT_BE),
2046 FIELD_ID_REMAP_TO_ENCAP(HAS_OVLAN),
2047 FIELD_ID_REMAP_TO_ENCAP(HAS_IVLAN),
2049 #undef FIELD_ID_REMAP_TO_ENCAP
2053 sfc_mae_rule_parse_item_tunnel(const struct rte_flow_item *item,
2054 struct sfc_flow_parse_ctx *ctx,
2055 struct rte_flow_error *error)
2057 struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
2058 uint8_t vnet_id_v[sizeof(uint32_t)] = {0};
2059 uint8_t vnet_id_m[sizeof(uint32_t)] = {0};
2060 const struct rte_flow_item_vxlan *vxp;
2061 uint8_t supp_mask[sizeof(uint64_t)];
2062 const uint8_t *spec = NULL;
2063 const uint8_t *mask = NULL;
2067 * We're about to start processing inner frame items.
2068 * Process pattern data that has been deferred so far
2069 * and reset pattern data storage.
2071 rc = sfc_mae_rule_process_pattern_data(ctx_mae, error);
2075 memset(&ctx_mae->pattern_data, 0, sizeof(ctx_mae->pattern_data));
2077 sfc_mae_item_build_supp_mask(flocs_tunnel, RTE_DIM(flocs_tunnel),
2078 &supp_mask, sizeof(supp_mask));
2081 * This tunnel item was preliminarily detected by
2082 * sfc_mae_rule_encap_parse_init(). Default mask
2083 * was also picked by that helper. Use it here.
2085 rc = sfc_flow_parse_init(item,
2086 (const void **)&spec, (const void **)&mask,
2087 (const void *)&supp_mask,
2088 ctx_mae->tunnel_def_mask,
2089 ctx_mae->tunnel_def_mask_size, error);
2094 * This item and later ones comprise a
2095 * match specification of type ACTION.
2097 ctx_mae->match_spec = ctx_mae->match_spec_action;
2099 /* This item and later ones use non-encap. EFX MAE field IDs. */
2100 ctx_mae->field_ids_remap = field_ids_no_remap;
2106 * Field EFX_MAE_FIELD_ENC_VNET_ID_BE is a 32-bit one.
2107 * Copy 24-bit VNI, which is BE, at offset 1 in it.
2108 * The extra byte is 0 both in the mask and in the value.
2110 vxp = (const struct rte_flow_item_vxlan *)spec;
2111 memcpy(vnet_id_v + 1, &vxp->vni, sizeof(vxp->vni));
2113 vxp = (const struct rte_flow_item_vxlan *)mask;
2114 memcpy(vnet_id_m + 1, &vxp->vni, sizeof(vxp->vni));
2116 rc = efx_mae_match_spec_field_set(ctx_mae->match_spec,
2117 EFX_MAE_FIELD_ENC_VNET_ID_BE,
2118 sizeof(vnet_id_v), vnet_id_v,
2119 sizeof(vnet_id_m), vnet_id_m);
2121 rc = rte_flow_error_set(error, rc, RTE_FLOW_ERROR_TYPE_ITEM,
2122 item, "Failed to set VXLAN VNI");
2128 static const struct sfc_flow_item sfc_flow_items[] = {
2130 .type = RTE_FLOW_ITEM_TYPE_PORT_ID,
2133 * In terms of RTE flow, this item is a META one,
2134 * and its position in the pattern is don't care.
2136 .prev_layer = SFC_FLOW_ITEM_ANY_LAYER,
2137 .layer = SFC_FLOW_ITEM_ANY_LAYER,
2138 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2139 .parse = sfc_mae_rule_parse_item_port_id,
2142 .type = RTE_FLOW_ITEM_TYPE_PHY_PORT,
2145 * In terms of RTE flow, this item is a META one,
2146 * and its position in the pattern is don't care.
2148 .prev_layer = SFC_FLOW_ITEM_ANY_LAYER,
2149 .layer = SFC_FLOW_ITEM_ANY_LAYER,
2150 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2151 .parse = sfc_mae_rule_parse_item_phy_port,
2154 .type = RTE_FLOW_ITEM_TYPE_PF,
2157 * In terms of RTE flow, this item is a META one,
2158 * and its position in the pattern is don't care.
2160 .prev_layer = SFC_FLOW_ITEM_ANY_LAYER,
2161 .layer = SFC_FLOW_ITEM_ANY_LAYER,
2162 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2163 .parse = sfc_mae_rule_parse_item_pf,
2166 .type = RTE_FLOW_ITEM_TYPE_VF,
2169 * In terms of RTE flow, this item is a META one,
2170 * and its position in the pattern is don't care.
2172 .prev_layer = SFC_FLOW_ITEM_ANY_LAYER,
2173 .layer = SFC_FLOW_ITEM_ANY_LAYER,
2174 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2175 .parse = sfc_mae_rule_parse_item_vf,
2178 .type = RTE_FLOW_ITEM_TYPE_ETH,
2180 .prev_layer = SFC_FLOW_ITEM_START_LAYER,
2181 .layer = SFC_FLOW_ITEM_L2,
2182 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2183 .parse = sfc_mae_rule_parse_item_eth,
2186 .type = RTE_FLOW_ITEM_TYPE_VLAN,
2188 .prev_layer = SFC_FLOW_ITEM_L2,
2189 .layer = SFC_FLOW_ITEM_L2,
2190 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2191 .parse = sfc_mae_rule_parse_item_vlan,
2194 .type = RTE_FLOW_ITEM_TYPE_IPV4,
2196 .prev_layer = SFC_FLOW_ITEM_L2,
2197 .layer = SFC_FLOW_ITEM_L3,
2198 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2199 .parse = sfc_mae_rule_parse_item_ipv4,
2202 .type = RTE_FLOW_ITEM_TYPE_IPV6,
2204 .prev_layer = SFC_FLOW_ITEM_L2,
2205 .layer = SFC_FLOW_ITEM_L3,
2206 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2207 .parse = sfc_mae_rule_parse_item_ipv6,
2210 .type = RTE_FLOW_ITEM_TYPE_TCP,
2212 .prev_layer = SFC_FLOW_ITEM_L3,
2213 .layer = SFC_FLOW_ITEM_L4,
2214 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2215 .parse = sfc_mae_rule_parse_item_tcp,
2218 .type = RTE_FLOW_ITEM_TYPE_UDP,
2220 .prev_layer = SFC_FLOW_ITEM_L3,
2221 .layer = SFC_FLOW_ITEM_L4,
2222 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2223 .parse = sfc_mae_rule_parse_item_udp,
2226 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
2228 .prev_layer = SFC_FLOW_ITEM_L4,
2229 .layer = SFC_FLOW_ITEM_START_LAYER,
2230 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2231 .parse = sfc_mae_rule_parse_item_tunnel,
2234 .type = RTE_FLOW_ITEM_TYPE_GENEVE,
2236 .prev_layer = SFC_FLOW_ITEM_L4,
2237 .layer = SFC_FLOW_ITEM_START_LAYER,
2238 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2239 .parse = sfc_mae_rule_parse_item_tunnel,
2242 .type = RTE_FLOW_ITEM_TYPE_NVGRE,
2244 .prev_layer = SFC_FLOW_ITEM_L3,
2245 .layer = SFC_FLOW_ITEM_START_LAYER,
2246 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2247 .parse = sfc_mae_rule_parse_item_tunnel,
2252 sfc_mae_rule_process_outer(struct sfc_adapter *sa,
2253 struct sfc_mae_parse_ctx *ctx,
2254 struct sfc_mae_outer_rule **rulep,
2255 struct rte_flow_error *error)
2257 efx_mae_rule_id_t invalid_rule_id = { .id = EFX_MAE_RSRC_ID_INVALID };
2260 if (ctx->encap_type == EFX_TUNNEL_PROTOCOL_NONE) {
2265 SFC_ASSERT(ctx->match_spec_outer != NULL);
2267 if (!efx_mae_match_spec_is_valid(sa->nic, ctx->match_spec_outer)) {
2268 return rte_flow_error_set(error, ENOTSUP,
2269 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2270 "Inconsistent pattern (outer)");
2273 *rulep = sfc_mae_outer_rule_attach(sa, ctx->match_spec_outer,
2275 if (*rulep != NULL) {
2276 efx_mae_match_spec_fini(sa->nic, ctx->match_spec_outer);
2278 rc = sfc_mae_outer_rule_add(sa, ctx->match_spec_outer,
2279 ctx->encap_type, rulep);
2281 return rte_flow_error_set(error, rc,
2282 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2283 "Failed to process the pattern");
2287 /* The spec has now been tracked by the outer rule entry. */
2288 ctx->match_spec_outer = NULL;
2291 switch (ctx->ft_rule_type) {
2292 case SFC_FT_RULE_NONE:
2294 case SFC_FT_RULE_JUMP:
2295 /* No action rule */
2298 SFC_ASSERT(B_FALSE);
2302 * In MAE, lookup sequence comprises outer parse, outer rule lookup,
2303 * inner parse (when some outer rule is hit) and action rule lookup.
2304 * If the currently processed flow does not come with an outer rule,
2305 * its action rule must be available only for packets which miss in
2306 * outer rule table. Set OR_ID match field to 0xffffffff/0xffffffff
2307 * in the action rule specification; this ensures correct behaviour.
2309 * If, on the other hand, this flow does have an outer rule, its ID
2310 * may be unknown at the moment (not yet allocated), but OR_ID mask
2311 * has to be set to 0xffffffff anyway for correct class comparisons.
2312 * When the outer rule has been allocated, this match field will be
2313 * overridden by sfc_mae_outer_rule_enable() to use the right value.
2315 rc = efx_mae_match_spec_outer_rule_id_set(ctx->match_spec_action,
2319 sfc_mae_outer_rule_del(sa, *rulep);
2323 return rte_flow_error_set(error, rc,
2324 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2325 "Failed to process the pattern");
2332 sfc_mae_rule_encap_parse_init(struct sfc_adapter *sa,
2333 const struct rte_flow_item pattern[],
2334 struct sfc_mae_parse_ctx *ctx,
2335 struct rte_flow_error *error)
2337 struct sfc_mae *mae = &sa->mae;
2338 uint8_t recirc_id = 0;
2341 if (pattern == NULL) {
2342 rte_flow_error_set(error, EINVAL,
2343 RTE_FLOW_ERROR_TYPE_ITEM_NUM, NULL,
2349 switch (pattern->type) {
2350 case RTE_FLOW_ITEM_TYPE_VXLAN:
2351 ctx->encap_type = EFX_TUNNEL_PROTOCOL_VXLAN;
2352 ctx->tunnel_def_mask = &rte_flow_item_vxlan_mask;
2353 ctx->tunnel_def_mask_size =
2354 sizeof(rte_flow_item_vxlan_mask);
2356 case RTE_FLOW_ITEM_TYPE_GENEVE:
2357 ctx->encap_type = EFX_TUNNEL_PROTOCOL_GENEVE;
2358 ctx->tunnel_def_mask = &rte_flow_item_geneve_mask;
2359 ctx->tunnel_def_mask_size =
2360 sizeof(rte_flow_item_geneve_mask);
2362 case RTE_FLOW_ITEM_TYPE_NVGRE:
2363 ctx->encap_type = EFX_TUNNEL_PROTOCOL_NVGRE;
2364 ctx->tunnel_def_mask = &rte_flow_item_nvgre_mask;
2365 ctx->tunnel_def_mask_size =
2366 sizeof(rte_flow_item_nvgre_mask);
2368 case RTE_FLOW_ITEM_TYPE_END:
2378 switch (ctx->ft_rule_type) {
2379 case SFC_FT_RULE_NONE:
2380 if (pattern->type == RTE_FLOW_ITEM_TYPE_END)
2383 case SFC_FT_RULE_JUMP:
2384 if (pattern->type != RTE_FLOW_ITEM_TYPE_END) {
2385 return rte_flow_error_set(error, ENOTSUP,
2386 RTE_FLOW_ERROR_TYPE_ITEM,
2387 pattern, "tunnel offload: JUMP: invalid item");
2389 ctx->encap_type = ctx->ft->encap_type;
2392 SFC_ASSERT(B_FALSE);
2396 if ((mae->encap_types_supported & (1U << ctx->encap_type)) == 0) {
2397 return rte_flow_error_set(error, ENOTSUP,
2398 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2399 "OR: unsupported tunnel type");
2402 switch (ctx->ft_rule_type) {
2403 case SFC_FT_RULE_JUMP:
2404 recirc_id = SFC_FT_ID_TO_TUNNEL_MARK(ctx->ft->id);
2406 case SFC_FT_RULE_NONE:
2407 if (ctx->priority >= mae->nb_outer_rule_prios_max) {
2408 return rte_flow_error_set(error, ENOTSUP,
2409 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
2410 NULL, "OR: unsupported priority level");
2413 rc = efx_mae_match_spec_init(sa->nic,
2414 EFX_MAE_RULE_OUTER, ctx->priority,
2415 &ctx->match_spec_outer);
2417 return rte_flow_error_set(error, rc,
2418 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2419 "OR: failed to initialise the match specification");
2423 * Outermost items comprise a match
2424 * specification of type OUTER.
2426 ctx->match_spec = ctx->match_spec_outer;
2428 /* Outermost items use "ENC" EFX MAE field IDs. */
2429 ctx->field_ids_remap = field_ids_remap_to_encap;
2431 rc = efx_mae_outer_rule_recirc_id_set(ctx->match_spec,
2434 return rte_flow_error_set(error, rc,
2435 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2436 "OR: failed to initialise RECIRC_ID");
2440 SFC_ASSERT(B_FALSE);
2448 sfc_mae_rule_encap_parse_fini(struct sfc_adapter *sa,
2449 struct sfc_mae_parse_ctx *ctx)
2451 if (ctx->encap_type == EFX_TUNNEL_PROTOCOL_NONE)
2454 if (ctx->match_spec_outer != NULL)
2455 efx_mae_match_spec_fini(sa->nic, ctx->match_spec_outer);
2459 sfc_mae_rule_parse_pattern(struct sfc_adapter *sa,
2460 const struct rte_flow_item pattern[],
2461 struct sfc_flow_spec_mae *spec,
2462 struct rte_flow_error *error)
2464 struct sfc_mae_parse_ctx ctx_mae;
2465 struct sfc_flow_parse_ctx ctx;
2468 memset(&ctx_mae, 0, sizeof(ctx_mae));
2469 ctx_mae.ft_rule_type = spec->ft_rule_type;
2470 ctx_mae.priority = spec->priority;
2471 ctx_mae.ft = spec->ft;
2474 switch (ctx_mae.ft_rule_type) {
2475 case SFC_FT_RULE_JUMP:
2476 /* No action rule */
2478 case SFC_FT_RULE_NONE:
2479 rc = efx_mae_match_spec_init(sa->nic, EFX_MAE_RULE_ACTION,
2481 &ctx_mae.match_spec_action);
2483 rc = rte_flow_error_set(error, rc,
2484 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2485 "AR: failed to initialise the match specification");
2486 goto fail_init_match_spec_action;
2490 SFC_ASSERT(B_FALSE);
2495 * As a preliminary setting, assume that there is no encapsulation
2496 * in the pattern. That is, pattern items are about to comprise a
2497 * match specification of type ACTION and use non-encap. field IDs.
2499 * sfc_mae_rule_encap_parse_init() below may override this.
2501 ctx_mae.encap_type = EFX_TUNNEL_PROTOCOL_NONE;
2502 ctx_mae.match_spec = ctx_mae.match_spec_action;
2503 ctx_mae.field_ids_remap = field_ids_no_remap;
2505 ctx.type = SFC_FLOW_PARSE_CTX_MAE;
2508 rc = sfc_mae_rule_encap_parse_init(sa, pattern, &ctx_mae, error);
2510 goto fail_encap_parse_init;
2512 rc = sfc_flow_parse_pattern(sa, sfc_flow_items, RTE_DIM(sfc_flow_items),
2513 pattern, &ctx, error);
2515 goto fail_parse_pattern;
2517 rc = sfc_mae_rule_process_pattern_data(&ctx_mae, error);
2519 goto fail_process_pattern_data;
2521 rc = sfc_mae_rule_process_outer(sa, &ctx_mae, &spec->outer_rule, error);
2523 goto fail_process_outer;
2525 if (ctx_mae.match_spec_action != NULL &&
2526 !efx_mae_match_spec_is_valid(sa->nic, ctx_mae.match_spec_action)) {
2527 rc = rte_flow_error_set(error, ENOTSUP,
2528 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2529 "Inconsistent pattern");
2530 goto fail_validate_match_spec_action;
2533 spec->match_spec = ctx_mae.match_spec_action;
2537 fail_validate_match_spec_action:
2539 fail_process_pattern_data:
2541 sfc_mae_rule_encap_parse_fini(sa, &ctx_mae);
2543 fail_encap_parse_init:
2544 if (ctx_mae.match_spec_action != NULL)
2545 efx_mae_match_spec_fini(sa->nic, ctx_mae.match_spec_action);
2547 fail_init_match_spec_action:
2552 * An action supported by MAE may correspond to a bundle of RTE flow actions,
2553 * in example, VLAN_PUSH = OF_PUSH_VLAN + OF_VLAN_SET_VID + OF_VLAN_SET_PCP.
2554 * That is, related RTE flow actions need to be tracked as parts of a whole
2555 * so that they can be combined into a single action and submitted to MAE
2556 * representation of a given rule's action set.
2558 * Each RTE flow action provided by an application gets classified as
2559 * one belonging to some bundle type. If an action is not supposed to
2560 * belong to any bundle, or if this action is END, it is described as
2561 * one belonging to a dummy bundle of type EMPTY.
2563 * A currently tracked bundle will be submitted if a repeating
2564 * action or an action of different bundle type follows.
2567 enum sfc_mae_actions_bundle_type {
2568 SFC_MAE_ACTIONS_BUNDLE_EMPTY = 0,
2569 SFC_MAE_ACTIONS_BUNDLE_VLAN_PUSH,
2572 struct sfc_mae_actions_bundle {
2573 enum sfc_mae_actions_bundle_type type;
2575 /* Indicates actions already tracked by the current bundle */
2576 uint64_t actions_mask;
2578 /* Parameters used by SFC_MAE_ACTIONS_BUNDLE_VLAN_PUSH */
2579 rte_be16_t vlan_push_tpid;
2580 rte_be16_t vlan_push_tci;
2584 * Combine configuration of RTE flow actions tracked by the bundle into a
2585 * single action and submit the result to MAE action set specification.
2586 * Do nothing in the case of dummy action bundle.
2589 sfc_mae_actions_bundle_submit(const struct sfc_mae_actions_bundle *bundle,
2590 efx_mae_actions_t *spec)
2594 switch (bundle->type) {
2595 case SFC_MAE_ACTIONS_BUNDLE_EMPTY:
2597 case SFC_MAE_ACTIONS_BUNDLE_VLAN_PUSH:
2598 rc = efx_mae_action_set_populate_vlan_push(
2599 spec, bundle->vlan_push_tpid, bundle->vlan_push_tci);
2602 SFC_ASSERT(B_FALSE);
2610 * Given the type of the next RTE flow action in the line, decide
2611 * whether a new bundle is about to start, and, if this is the case,
2612 * submit and reset the current bundle.
2615 sfc_mae_actions_bundle_sync(const struct rte_flow_action *action,
2616 struct sfc_mae_actions_bundle *bundle,
2617 efx_mae_actions_t *spec,
2618 struct rte_flow_error *error)
2620 enum sfc_mae_actions_bundle_type bundle_type_new;
2623 switch (action->type) {
2624 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
2625 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
2626 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
2627 bundle_type_new = SFC_MAE_ACTIONS_BUNDLE_VLAN_PUSH;
2631 * Self-sufficient actions, including END, are handled in this
2632 * case. No checks for unsupported actions are needed here
2633 * because parsing doesn't occur at this point.
2635 bundle_type_new = SFC_MAE_ACTIONS_BUNDLE_EMPTY;
2639 if (bundle_type_new != bundle->type ||
2640 (bundle->actions_mask & (1ULL << action->type)) != 0) {
2641 rc = sfc_mae_actions_bundle_submit(bundle, spec);
2645 memset(bundle, 0, sizeof(*bundle));
2648 bundle->type = bundle_type_new;
2653 return rte_flow_error_set(error, rc,
2654 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2655 "Failed to request the (group of) action(s)");
2659 sfc_mae_rule_parse_action_of_push_vlan(
2660 const struct rte_flow_action_of_push_vlan *conf,
2661 struct sfc_mae_actions_bundle *bundle)
2663 bundle->vlan_push_tpid = conf->ethertype;
2667 sfc_mae_rule_parse_action_of_set_vlan_vid(
2668 const struct rte_flow_action_of_set_vlan_vid *conf,
2669 struct sfc_mae_actions_bundle *bundle)
2671 bundle->vlan_push_tci |= (conf->vlan_vid &
2672 rte_cpu_to_be_16(RTE_LEN2MASK(12, uint16_t)));
2676 sfc_mae_rule_parse_action_of_set_vlan_pcp(
2677 const struct rte_flow_action_of_set_vlan_pcp *conf,
2678 struct sfc_mae_actions_bundle *bundle)
2680 uint16_t vlan_tci_pcp = (uint16_t)(conf->vlan_pcp &
2681 RTE_LEN2MASK(3, uint8_t)) << 13;
2683 bundle->vlan_push_tci |= rte_cpu_to_be_16(vlan_tci_pcp);
2686 struct sfc_mae_parsed_item {
2687 const struct rte_flow_item *item;
2688 size_t proto_header_ofst;
2689 size_t proto_header_size;
2693 * For each 16-bit word of the given header, override
2694 * bits enforced by the corresponding 16-bit mask.
2697 sfc_mae_header_force_item_masks(uint8_t *header_buf,
2698 const struct sfc_mae_parsed_item *parsed_items,
2699 unsigned int nb_parsed_items)
2701 unsigned int item_idx;
2703 for (item_idx = 0; item_idx < nb_parsed_items; ++item_idx) {
2704 const struct sfc_mae_parsed_item *parsed_item;
2705 const struct rte_flow_item *item;
2706 size_t proto_header_size;
2709 parsed_item = &parsed_items[item_idx];
2710 proto_header_size = parsed_item->proto_header_size;
2711 item = parsed_item->item;
2713 for (ofst = 0; ofst < proto_header_size;
2714 ofst += sizeof(rte_be16_t)) {
2715 rte_be16_t *wp = RTE_PTR_ADD(header_buf, ofst);
2716 const rte_be16_t *w_maskp;
2717 const rte_be16_t *w_specp;
2719 w_maskp = RTE_PTR_ADD(item->mask, ofst);
2720 w_specp = RTE_PTR_ADD(item->spec, ofst);
2723 *wp |= (*w_specp & *w_maskp);
2726 header_buf += proto_header_size;
2730 #define SFC_IPV4_TTL_DEF 0x40
2731 #define SFC_IPV6_VTC_FLOW_DEF 0x60000000
2732 #define SFC_IPV6_HOP_LIMITS_DEF 0xff
2733 #define SFC_VXLAN_FLAGS_DEF 0x08000000
2736 sfc_mae_rule_parse_action_vxlan_encap(
2737 struct sfc_mae *mae,
2738 const struct rte_flow_action_vxlan_encap *conf,
2739 efx_mae_actions_t *spec,
2740 struct rte_flow_error *error)
2742 struct sfc_mae_bounce_eh *bounce_eh = &mae->bounce_eh;
2743 struct rte_flow_item *pattern = conf->definition;
2744 uint8_t *buf = bounce_eh->buf;
2746 /* This array will keep track of non-VOID pattern items. */
2747 struct sfc_mae_parsed_item parsed_items[1 /* Ethernet */ +
2749 1 /* IPv4 or IPv6 */ +
2752 unsigned int nb_parsed_items = 0;
2754 size_t eth_ethertype_ofst = offsetof(struct rte_ether_hdr, ether_type);
2755 uint8_t dummy_buf[RTE_MAX(sizeof(struct rte_ipv4_hdr),
2756 sizeof(struct rte_ipv6_hdr))];
2757 struct rte_ipv4_hdr *ipv4 = (void *)dummy_buf;
2758 struct rte_ipv6_hdr *ipv6 = (void *)dummy_buf;
2759 struct rte_vxlan_hdr *vxlan = NULL;
2760 struct rte_udp_hdr *udp = NULL;
2761 unsigned int nb_vlan_tags = 0;
2762 size_t next_proto_ofst = 0;
2763 size_t ethertype_ofst = 0;
2767 if (pattern == NULL) {
2768 return rte_flow_error_set(error, EINVAL,
2769 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2770 "The encap. header definition is NULL");
2773 bounce_eh->type = EFX_TUNNEL_PROTOCOL_VXLAN;
2774 bounce_eh->size = 0;
2777 * Process pattern items and remember non-VOID ones.
2778 * Defer applying masks until after the complete header
2779 * has been built from the pattern items.
2781 exp_items = RTE_BIT64(RTE_FLOW_ITEM_TYPE_ETH);
2783 for (; pattern->type != RTE_FLOW_ITEM_TYPE_END; ++pattern) {
2784 struct sfc_mae_parsed_item *parsed_item;
2785 const uint64_t exp_items_extra_vlan[] = {
2786 RTE_BIT64(RTE_FLOW_ITEM_TYPE_VLAN), 0
2788 size_t proto_header_size;
2789 rte_be16_t *ethertypep;
2790 uint8_t *next_protop;
2793 if (pattern->spec == NULL) {
2794 return rte_flow_error_set(error, EINVAL,
2795 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2796 "NULL item spec in the encap. header");
2799 if (pattern->mask == NULL) {
2800 return rte_flow_error_set(error, EINVAL,
2801 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2802 "NULL item mask in the encap. header");
2805 if (pattern->last != NULL) {
2806 /* This is not a match pattern, so disallow range. */
2807 return rte_flow_error_set(error, EINVAL,
2808 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2809 "Range item in the encap. header");
2812 if (pattern->type == RTE_FLOW_ITEM_TYPE_VOID) {
2813 /* Handle VOID separately, for clarity. */
2817 if ((exp_items & RTE_BIT64(pattern->type)) == 0) {
2818 return rte_flow_error_set(error, ENOTSUP,
2819 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2820 "Unexpected item in the encap. header");
2823 parsed_item = &parsed_items[nb_parsed_items];
2824 buf_cur = buf + bounce_eh->size;
2826 switch (pattern->type) {
2827 case RTE_FLOW_ITEM_TYPE_ETH:
2828 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ITEM_TYPE_ETH,
2830 RTE_BUILD_BUG_ON(offsetof(struct rte_flow_item_eth,
2833 proto_header_size = sizeof(struct rte_ether_hdr);
2835 ethertype_ofst = eth_ethertype_ofst;
2837 exp_items = RTE_BIT64(RTE_FLOW_ITEM_TYPE_VLAN) |
2838 RTE_BIT64(RTE_FLOW_ITEM_TYPE_IPV4) |
2839 RTE_BIT64(RTE_FLOW_ITEM_TYPE_IPV6);
2841 case RTE_FLOW_ITEM_TYPE_VLAN:
2842 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ITEM_TYPE_VLAN,
2844 RTE_BUILD_BUG_ON(offsetof(struct rte_flow_item_vlan,
2847 proto_header_size = sizeof(struct rte_vlan_hdr);
2849 ethertypep = RTE_PTR_ADD(buf, eth_ethertype_ofst);
2850 *ethertypep = RTE_BE16(RTE_ETHER_TYPE_QINQ);
2852 ethertypep = RTE_PTR_ADD(buf, ethertype_ofst);
2853 *ethertypep = RTE_BE16(RTE_ETHER_TYPE_VLAN);
2857 offsetof(struct rte_vlan_hdr, eth_proto);
2859 exp_items = RTE_BIT64(RTE_FLOW_ITEM_TYPE_IPV4) |
2860 RTE_BIT64(RTE_FLOW_ITEM_TYPE_IPV6);
2861 exp_items |= exp_items_extra_vlan[nb_vlan_tags];
2865 case RTE_FLOW_ITEM_TYPE_IPV4:
2866 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ITEM_TYPE_IPV4,
2868 RTE_BUILD_BUG_ON(offsetof(struct rte_flow_item_ipv4,
2871 proto_header_size = sizeof(struct rte_ipv4_hdr);
2873 ethertypep = RTE_PTR_ADD(buf, ethertype_ofst);
2874 *ethertypep = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2878 offsetof(struct rte_ipv4_hdr, next_proto_id);
2880 ipv4 = (struct rte_ipv4_hdr *)buf_cur;
2882 exp_items = RTE_BIT64(RTE_FLOW_ITEM_TYPE_UDP);
2884 case RTE_FLOW_ITEM_TYPE_IPV6:
2885 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ITEM_TYPE_IPV6,
2887 RTE_BUILD_BUG_ON(offsetof(struct rte_flow_item_ipv6,
2890 proto_header_size = sizeof(struct rte_ipv6_hdr);
2892 ethertypep = RTE_PTR_ADD(buf, ethertype_ofst);
2893 *ethertypep = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2895 next_proto_ofst = bounce_eh->size +
2896 offsetof(struct rte_ipv6_hdr, proto);
2898 ipv6 = (struct rte_ipv6_hdr *)buf_cur;
2900 exp_items = RTE_BIT64(RTE_FLOW_ITEM_TYPE_UDP);
2902 case RTE_FLOW_ITEM_TYPE_UDP:
2903 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ITEM_TYPE_UDP,
2905 RTE_BUILD_BUG_ON(offsetof(struct rte_flow_item_udp,
2908 proto_header_size = sizeof(struct rte_udp_hdr);
2910 next_protop = RTE_PTR_ADD(buf, next_proto_ofst);
2911 *next_protop = IPPROTO_UDP;
2913 udp = (struct rte_udp_hdr *)buf_cur;
2915 exp_items = RTE_BIT64(RTE_FLOW_ITEM_TYPE_VXLAN);
2917 case RTE_FLOW_ITEM_TYPE_VXLAN:
2918 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ITEM_TYPE_VXLAN,
2920 RTE_BUILD_BUG_ON(offsetof(struct rte_flow_item_vxlan,
2923 proto_header_size = sizeof(struct rte_vxlan_hdr);
2925 vxlan = (struct rte_vxlan_hdr *)buf_cur;
2927 udp->dst_port = RTE_BE16(RTE_VXLAN_DEFAULT_PORT);
2928 udp->dgram_len = RTE_BE16(sizeof(*udp) +
2930 udp->dgram_cksum = 0;
2935 return rte_flow_error_set(error, ENOTSUP,
2936 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2937 "Unknown item in the encap. header");
2940 if (bounce_eh->size + proto_header_size > bounce_eh->buf_size) {
2941 return rte_flow_error_set(error, E2BIG,
2942 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2943 "The encap. header is too big");
2946 if ((proto_header_size & 1) != 0) {
2947 return rte_flow_error_set(error, EINVAL,
2948 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2949 "Odd layer size in the encap. header");
2952 rte_memcpy(buf_cur, pattern->spec, proto_header_size);
2953 bounce_eh->size += proto_header_size;
2955 parsed_item->item = pattern;
2956 parsed_item->proto_header_size = proto_header_size;
2960 if (exp_items != 0) {
2961 /* Parsing item VXLAN would have reset exp_items to 0. */
2962 return rte_flow_error_set(error, ENOTSUP,
2963 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2964 "No item VXLAN in the encap. header");
2967 /* One of the pointers (ipv4, ipv6) refers to a dummy area. */
2968 ipv4->version_ihl = RTE_IPV4_VHL_DEF;
2969 ipv4->time_to_live = SFC_IPV4_TTL_DEF;
2970 ipv4->total_length = RTE_BE16(sizeof(*ipv4) + sizeof(*udp) +
2972 /* The HW cannot compute this checksum. */
2973 ipv4->hdr_checksum = 0;
2974 ipv4->hdr_checksum = rte_ipv4_cksum(ipv4);
2976 ipv6->vtc_flow = RTE_BE32(SFC_IPV6_VTC_FLOW_DEF);
2977 ipv6->hop_limits = SFC_IPV6_HOP_LIMITS_DEF;
2978 ipv6->payload_len = udp->dgram_len;
2980 vxlan->vx_flags = RTE_BE32(SFC_VXLAN_FLAGS_DEF);
2982 /* Take care of the masks. */
2983 sfc_mae_header_force_item_masks(buf, parsed_items, nb_parsed_items);
2985 rc = efx_mae_action_set_populate_encap(spec);
2987 rc = rte_flow_error_set(error, rc, RTE_FLOW_ERROR_TYPE_ACTION,
2988 NULL, "failed to request action ENCAP");
2995 sfc_mae_rule_parse_action_mark(struct sfc_adapter *sa,
2996 const struct rte_flow_action_mark *conf,
2997 efx_mae_actions_t *spec)
3001 if (conf->id > SFC_FT_USER_MARK_MASK) {
3002 sfc_err(sa, "the mark value is too large");
3006 rc = efx_mae_action_set_populate_mark(spec, conf->id);
3008 sfc_err(sa, "failed to request action MARK: %s", strerror(rc));
3014 sfc_mae_rule_parse_action_count(struct sfc_adapter *sa,
3015 const struct rte_flow_action_count *conf
3017 efx_mae_actions_t *spec)
3021 if ((sa->counter_rxq.state & SFC_COUNTER_RXQ_INITIALIZED) == 0) {
3023 "counter queue is not configured for COUNT action");
3025 goto fail_counter_queue_uninit;
3028 if (sfc_get_service_lcore(SOCKET_ID_ANY) == RTE_MAX_LCORE) {
3030 goto fail_no_service_core;
3033 rc = efx_mae_action_set_populate_count(spec);
3036 "failed to populate counters in MAE action set: %s",
3038 goto fail_populate_count;
3043 fail_populate_count:
3044 fail_no_service_core:
3045 fail_counter_queue_uninit:
3051 sfc_mae_rule_parse_action_phy_port(struct sfc_adapter *sa,
3052 const struct rte_flow_action_phy_port *conf,
3053 efx_mae_actions_t *spec)
3055 efx_mport_sel_t mport;
3059 if (conf->original != 0)
3060 phy_port = efx_nic_cfg_get(sa->nic)->enc_assigned_port;
3062 phy_port = conf->index;
3064 rc = efx_mae_mport_by_phy_port(phy_port, &mport);
3066 sfc_err(sa, "failed to convert phys. port ID %u to m-port selector: %s",
3067 phy_port, strerror(rc));
3071 rc = efx_mae_action_set_populate_deliver(spec, &mport);
3073 sfc_err(sa, "failed to request action DELIVER with m-port selector 0x%08x: %s",
3074 mport.sel, strerror(rc));
3081 sfc_mae_rule_parse_action_pf_vf(struct sfc_adapter *sa,
3082 const struct rte_flow_action_vf *vf_conf,
3083 efx_mae_actions_t *spec)
3085 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
3086 efx_mport_sel_t mport;
3090 if (vf_conf == NULL)
3091 vf = EFX_PCI_VF_INVALID;
3092 else if (vf_conf->original != 0)
3097 rc = efx_mae_mport_by_pcie_function(encp->enc_pf, vf, &mport);
3099 sfc_err(sa, "failed to convert PF %u VF %d to m-port: %s",
3100 encp->enc_pf, (vf != EFX_PCI_VF_INVALID) ? (int)vf : -1,
3105 rc = efx_mae_action_set_populate_deliver(spec, &mport);
3107 sfc_err(sa, "failed to request action DELIVER with m-port selector 0x%08x: %s",
3108 mport.sel, strerror(rc));
3115 sfc_mae_rule_parse_action_port_id(struct sfc_adapter *sa,
3116 const struct rte_flow_action_port_id *conf,
3117 efx_mae_actions_t *spec)
3119 struct sfc_adapter_shared * const sas = sfc_sa2shared(sa);
3120 struct sfc_mae *mae = &sa->mae;
3121 efx_mport_sel_t mport;
3125 if (conf->id > UINT16_MAX)
3128 port_id = (conf->original != 0) ? sas->port_id : conf->id;
3130 rc = sfc_mae_switch_port_by_ethdev(mae->switch_domain_id,
3133 sfc_err(sa, "failed to find MAE switch port SW entry for RTE ethdev port %u: %s",
3134 port_id, strerror(rc));
3138 rc = efx_mae_action_set_populate_deliver(spec, &mport);
3140 sfc_err(sa, "failed to request action DELIVER with m-port selector 0x%08x: %s",
3141 mport.sel, strerror(rc));
3147 static const char * const action_names[] = {
3148 [RTE_FLOW_ACTION_TYPE_VXLAN_DECAP] = "VXLAN_DECAP",
3149 [RTE_FLOW_ACTION_TYPE_OF_POP_VLAN] = "OF_POP_VLAN",
3150 [RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN] = "OF_PUSH_VLAN",
3151 [RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID] = "OF_SET_VLAN_VID",
3152 [RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP] = "OF_SET_VLAN_PCP",
3153 [RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP] = "VXLAN_ENCAP",
3154 [RTE_FLOW_ACTION_TYPE_FLAG] = "FLAG",
3155 [RTE_FLOW_ACTION_TYPE_MARK] = "MARK",
3156 [RTE_FLOW_ACTION_TYPE_PHY_PORT] = "PHY_PORT",
3157 [RTE_FLOW_ACTION_TYPE_PF] = "PF",
3158 [RTE_FLOW_ACTION_TYPE_VF] = "VF",
3159 [RTE_FLOW_ACTION_TYPE_PORT_ID] = "PORT_ID",
3160 [RTE_FLOW_ACTION_TYPE_DROP] = "DROP",
3164 sfc_mae_rule_parse_action(struct sfc_adapter *sa,
3165 const struct rte_flow_action *action,
3166 const struct sfc_mae_outer_rule *outer_rule,
3167 struct sfc_mae_actions_bundle *bundle,
3168 efx_mae_actions_t *spec,
3169 struct rte_flow_error *error)
3171 const uint64_t rx_metadata = sa->negotiated_rx_metadata;
3172 bool custom_error = B_FALSE;
3175 switch (action->type) {
3176 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
3177 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_VXLAN_DECAP,
3178 bundle->actions_mask);
3179 if (outer_rule == NULL ||
3180 outer_rule->encap_type != EFX_TUNNEL_PROTOCOL_VXLAN)
3183 rc = efx_mae_action_set_populate_decap(spec);
3185 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
3186 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_OF_POP_VLAN,
3187 bundle->actions_mask);
3188 rc = efx_mae_action_set_populate_vlan_pop(spec);
3190 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3191 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN,
3192 bundle->actions_mask);
3193 sfc_mae_rule_parse_action_of_push_vlan(action->conf, bundle);
3195 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3196 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID,
3197 bundle->actions_mask);
3198 sfc_mae_rule_parse_action_of_set_vlan_vid(action->conf, bundle);
3200 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
3201 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP,
3202 bundle->actions_mask);
3203 sfc_mae_rule_parse_action_of_set_vlan_pcp(action->conf, bundle);
3205 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3206 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP,
3207 bundle->actions_mask);
3208 rc = sfc_mae_rule_parse_action_vxlan_encap(&sa->mae,
3211 custom_error = B_TRUE;
3213 case RTE_FLOW_ACTION_TYPE_COUNT:
3214 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_COUNT,
3215 bundle->actions_mask);
3216 rc = sfc_mae_rule_parse_action_count(sa, action->conf, spec);
3218 case RTE_FLOW_ACTION_TYPE_FLAG:
3219 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_FLAG,
3220 bundle->actions_mask);
3221 if ((rx_metadata & RTE_ETH_RX_METADATA_USER_FLAG) != 0) {
3222 rc = efx_mae_action_set_populate_flag(spec);
3224 rc = rte_flow_error_set(error, ENOTSUP,
3225 RTE_FLOW_ERROR_TYPE_ACTION,
3227 "flag delivery has not been negotiated");
3228 custom_error = B_TRUE;
3231 case RTE_FLOW_ACTION_TYPE_MARK:
3232 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_MARK,
3233 bundle->actions_mask);
3234 if ((rx_metadata & RTE_ETH_RX_METADATA_USER_MARK) != 0) {
3235 rc = sfc_mae_rule_parse_action_mark(sa, action->conf,
3238 rc = rte_flow_error_set(error, ENOTSUP,
3239 RTE_FLOW_ERROR_TYPE_ACTION,
3241 "mark delivery has not been negotiated");
3242 custom_error = B_TRUE;
3245 case RTE_FLOW_ACTION_TYPE_PHY_PORT:
3246 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_PHY_PORT,
3247 bundle->actions_mask);
3248 rc = sfc_mae_rule_parse_action_phy_port(sa, action->conf, spec);
3250 case RTE_FLOW_ACTION_TYPE_PF:
3251 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_PF,
3252 bundle->actions_mask);
3253 rc = sfc_mae_rule_parse_action_pf_vf(sa, NULL, spec);
3255 case RTE_FLOW_ACTION_TYPE_VF:
3256 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_VF,
3257 bundle->actions_mask);
3258 rc = sfc_mae_rule_parse_action_pf_vf(sa, action->conf, spec);
3260 case RTE_FLOW_ACTION_TYPE_PORT_ID:
3261 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_PORT_ID,
3262 bundle->actions_mask);
3263 rc = sfc_mae_rule_parse_action_port_id(sa, action->conf, spec);
3265 case RTE_FLOW_ACTION_TYPE_DROP:
3266 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_DROP,
3267 bundle->actions_mask);
3268 rc = efx_mae_action_set_populate_drop(spec);
3271 return rte_flow_error_set(error, ENOTSUP,
3272 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3273 "Unsupported action");
3277 bundle->actions_mask |= (1ULL << action->type);
3278 } else if (!custom_error) {
3279 if (action->type < RTE_DIM(action_names)) {
3280 const char *action_name = action_names[action->type];
3282 if (action_name != NULL) {
3283 sfc_err(sa, "action %s was rejected: %s",
3284 action_name, strerror(rc));
3287 rc = rte_flow_error_set(error, rc, RTE_FLOW_ERROR_TYPE_ACTION,
3288 NULL, "Failed to request the action");
3295 sfc_mae_bounce_eh_invalidate(struct sfc_mae_bounce_eh *bounce_eh)
3297 bounce_eh->type = EFX_TUNNEL_PROTOCOL_NONE;
3301 sfc_mae_process_encap_header(struct sfc_adapter *sa,
3302 const struct sfc_mae_bounce_eh *bounce_eh,
3303 struct sfc_mae_encap_header **encap_headerp)
3305 if (bounce_eh->type == EFX_TUNNEL_PROTOCOL_NONE) {
3306 encap_headerp = NULL;
3310 *encap_headerp = sfc_mae_encap_header_attach(sa, bounce_eh);
3311 if (*encap_headerp != NULL)
3314 return sfc_mae_encap_header_add(sa, bounce_eh, encap_headerp);
3318 sfc_mae_rule_parse_actions(struct sfc_adapter *sa,
3319 const struct rte_flow_action actions[],
3320 struct sfc_flow_spec_mae *spec_mae,
3321 struct rte_flow_error *error)
3323 struct sfc_mae_encap_header *encap_header = NULL;
3324 struct sfc_mae_actions_bundle bundle = {0};
3325 const struct rte_flow_action *action;
3326 struct sfc_mae *mae = &sa->mae;
3327 efx_mae_actions_t *spec;
3328 unsigned int n_count;
3333 if (actions == NULL) {
3334 return rte_flow_error_set(error, EINVAL,
3335 RTE_FLOW_ERROR_TYPE_ACTION_NUM, NULL,
3339 rc = efx_mae_action_set_spec_init(sa->nic, &spec);
3341 goto fail_action_set_spec_init;
3343 /* Cleanup after previous encap. header bounce buffer usage. */
3344 sfc_mae_bounce_eh_invalidate(&mae->bounce_eh);
3346 for (action = actions;
3347 action->type != RTE_FLOW_ACTION_TYPE_END; ++action) {
3348 rc = sfc_mae_actions_bundle_sync(action, &bundle, spec, error);
3350 goto fail_rule_parse_action;
3352 rc = sfc_mae_rule_parse_action(sa, action, spec_mae->outer_rule,
3353 &bundle, spec, error);
3355 goto fail_rule_parse_action;
3358 rc = sfc_mae_actions_bundle_sync(action, &bundle, spec, error);
3360 goto fail_rule_parse_action;
3362 rc = sfc_mae_process_encap_header(sa, &mae->bounce_eh, &encap_header);
3364 goto fail_process_encap_header;
3366 n_count = efx_mae_action_set_get_nb_count(spec);
3369 sfc_err(sa, "too many count actions requested: %u", n_count);
3373 spec_mae->action_set = sfc_mae_action_set_attach(sa, encap_header,
3375 if (spec_mae->action_set != NULL) {
3376 sfc_mae_encap_header_del(sa, encap_header);
3377 efx_mae_action_set_spec_fini(sa->nic, spec);
3381 rc = sfc_mae_action_set_add(sa, actions, spec, encap_header, n_count,
3382 &spec_mae->action_set);
3384 goto fail_action_set_add;
3388 fail_action_set_add:
3390 sfc_mae_encap_header_del(sa, encap_header);
3392 fail_process_encap_header:
3393 fail_rule_parse_action:
3394 efx_mae_action_set_spec_fini(sa->nic, spec);
3396 fail_action_set_spec_init:
3397 if (rc > 0 && rte_errno == 0) {
3398 rc = rte_flow_error_set(error, rc,
3399 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3400 NULL, "Failed to process the action");
3406 sfc_mae_rules_class_cmp(struct sfc_adapter *sa,
3407 const efx_mae_match_spec_t *left,
3408 const efx_mae_match_spec_t *right)
3410 bool have_same_class;
3413 rc = efx_mae_match_specs_class_cmp(sa->nic, left, right,
3416 return (rc == 0) ? have_same_class : false;
3420 sfc_mae_outer_rule_class_verify(struct sfc_adapter *sa,
3421 struct sfc_mae_outer_rule *rule)
3423 struct sfc_mae_fw_rsrc *fw_rsrc = &rule->fw_rsrc;
3424 struct sfc_mae_outer_rule *entry;
3425 struct sfc_mae *mae = &sa->mae;
3427 if (fw_rsrc->rule_id.id != EFX_MAE_RSRC_ID_INVALID) {
3428 /* An active rule is reused. It's class is wittingly valid. */
3432 TAILQ_FOREACH_REVERSE(entry, &mae->outer_rules,
3433 sfc_mae_outer_rules, entries) {
3434 const efx_mae_match_spec_t *left = entry->match_spec;
3435 const efx_mae_match_spec_t *right = rule->match_spec;
3440 if (sfc_mae_rules_class_cmp(sa, left, right))
3444 sfc_info(sa, "for now, the HW doesn't support rule validation, and HW "
3445 "support for outer frame pattern items is not guaranteed; "
3446 "other than that, the items are valid from SW standpoint");
3451 sfc_mae_action_rule_class_verify(struct sfc_adapter *sa,
3452 struct sfc_flow_spec_mae *spec)
3454 const struct rte_flow *entry;
3456 if (spec->match_spec == NULL)
3459 TAILQ_FOREACH_REVERSE(entry, &sa->flow_list, sfc_flow_list, entries) {
3460 const struct sfc_flow_spec *entry_spec = &entry->spec;
3461 const struct sfc_flow_spec_mae *es_mae = &entry_spec->mae;
3462 const efx_mae_match_spec_t *left = es_mae->match_spec;
3463 const efx_mae_match_spec_t *right = spec->match_spec;
3465 switch (entry_spec->type) {
3466 case SFC_FLOW_SPEC_FILTER:
3467 /* Ignore VNIC-level flows */
3469 case SFC_FLOW_SPEC_MAE:
3470 if (sfc_mae_rules_class_cmp(sa, left, right))
3478 sfc_info(sa, "for now, the HW doesn't support rule validation, and HW "
3479 "support for inner frame pattern items is not guaranteed; "
3480 "other than that, the items are valid from SW standpoint");
3485 * Confirm that a given flow can be accepted by the FW.
3488 * Software adapter context
3490 * Flow to be verified
3492 * Zero on success and non-zero in the case of error.
3493 * A special value of EAGAIN indicates that the adapter is
3494 * not in started state. This state is compulsory because
3495 * it only makes sense to compare the rule class of the flow
3496 * being validated with classes of the active rules.
3497 * Such classes are wittingly supported by the FW.
3500 sfc_mae_flow_verify(struct sfc_adapter *sa,
3501 struct rte_flow *flow)
3503 struct sfc_flow_spec *spec = &flow->spec;
3504 struct sfc_flow_spec_mae *spec_mae = &spec->mae;
3505 struct sfc_mae_outer_rule *outer_rule = spec_mae->outer_rule;
3508 SFC_ASSERT(sfc_adapter_is_locked(sa));
3510 if (sa->state != SFC_ETHDEV_STARTED)
3513 if (outer_rule != NULL) {
3514 rc = sfc_mae_outer_rule_class_verify(sa, outer_rule);
3519 return sfc_mae_action_rule_class_verify(sa, spec_mae);
3523 sfc_mae_flow_insert(struct sfc_adapter *sa,
3524 struct rte_flow *flow)
3526 struct sfc_flow_spec *spec = &flow->spec;
3527 struct sfc_flow_spec_mae *spec_mae = &spec->mae;
3528 struct sfc_mae_outer_rule *outer_rule = spec_mae->outer_rule;
3529 struct sfc_mae_action_set *action_set = spec_mae->action_set;
3530 struct sfc_mae_fw_rsrc *fw_rsrc;
3533 SFC_ASSERT(spec_mae->rule_id.id == EFX_MAE_RSRC_ID_INVALID);
3535 if (outer_rule != NULL) {
3536 rc = sfc_mae_outer_rule_enable(sa, outer_rule,
3537 spec_mae->match_spec);
3539 goto fail_outer_rule_enable;
3542 if (action_set == NULL) {
3543 sfc_dbg(sa, "enabled flow=%p (no AR)", flow);
3547 rc = sfc_mae_action_set_enable(sa, action_set);
3549 goto fail_action_set_enable;
3551 if (action_set->n_counters > 0) {
3552 rc = sfc_mae_counter_start(sa);
3554 sfc_err(sa, "failed to start MAE counters support: %s",
3556 goto fail_mae_counter_start;
3560 fw_rsrc = &action_set->fw_rsrc;
3562 rc = efx_mae_action_rule_insert(sa->nic, spec_mae->match_spec,
3563 NULL, &fw_rsrc->aset_id,
3564 &spec_mae->rule_id);
3566 goto fail_action_rule_insert;
3568 sfc_dbg(sa, "enabled flow=%p: AR_ID=0x%08x",
3569 flow, spec_mae->rule_id.id);
3573 fail_action_rule_insert:
3574 fail_mae_counter_start:
3575 sfc_mae_action_set_disable(sa, action_set);
3577 fail_action_set_enable:
3578 if (outer_rule != NULL)
3579 sfc_mae_outer_rule_disable(sa, outer_rule);
3581 fail_outer_rule_enable:
3586 sfc_mae_flow_remove(struct sfc_adapter *sa,
3587 struct rte_flow *flow)
3589 struct sfc_flow_spec *spec = &flow->spec;
3590 struct sfc_flow_spec_mae *spec_mae = &spec->mae;
3591 struct sfc_mae_action_set *action_set = spec_mae->action_set;
3592 struct sfc_mae_outer_rule *outer_rule = spec_mae->outer_rule;
3595 if (action_set == NULL) {
3596 sfc_dbg(sa, "disabled flow=%p (no AR)", flow);
3597 goto skip_action_rule;
3600 SFC_ASSERT(spec_mae->rule_id.id != EFX_MAE_RSRC_ID_INVALID);
3602 rc = efx_mae_action_rule_remove(sa->nic, &spec_mae->rule_id);
3604 sfc_err(sa, "failed to disable flow=%p with AR_ID=0x%08x: %s",
3605 flow, spec_mae->rule_id.id, strerror(rc));
3607 sfc_dbg(sa, "disabled flow=%p with AR_ID=0x%08x",
3608 flow, spec_mae->rule_id.id);
3609 spec_mae->rule_id.id = EFX_MAE_RSRC_ID_INVALID;
3611 sfc_mae_action_set_disable(sa, action_set);
3614 if (outer_rule != NULL)
3615 sfc_mae_outer_rule_disable(sa, outer_rule);
3621 sfc_mae_query_counter(struct sfc_adapter *sa,
3622 struct sfc_flow_spec_mae *spec,
3623 const struct rte_flow_action *action,
3624 struct rte_flow_query_count *data,
3625 struct rte_flow_error *error)
3627 struct sfc_mae_action_set *action_set = spec->action_set;
3628 const struct rte_flow_action_count *conf = action->conf;
3632 if (action_set == NULL || action_set->n_counters == 0) {
3633 return rte_flow_error_set(error, EINVAL,
3634 RTE_FLOW_ERROR_TYPE_ACTION, action,
3635 "Queried flow rule does not have count actions");
3638 for (i = 0; i < action_set->n_counters; i++) {
3640 * Get the first available counter of the flow rule if
3641 * counter ID is not specified.
3643 if (conf != NULL && action_set->counters[i].rte_id != conf->id)
3646 rc = sfc_mae_counter_get(&sa->mae.counter_registry.counters,
3647 &action_set->counters[i], data);
3649 return rte_flow_error_set(error, EINVAL,
3650 RTE_FLOW_ERROR_TYPE_ACTION, action,
3651 "Queried flow rule counter action is invalid");
3657 return rte_flow_error_set(error, ENOENT,
3658 RTE_FLOW_ERROR_TYPE_ACTION, action,
3659 "No such flow rule action count ID");
3663 sfc_mae_flow_query(struct rte_eth_dev *dev,
3664 struct rte_flow *flow,
3665 const struct rte_flow_action *action,
3667 struct rte_flow_error *error)
3669 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev);
3670 struct sfc_flow_spec *spec = &flow->spec;
3671 struct sfc_flow_spec_mae *spec_mae = &spec->mae;
3673 switch (action->type) {
3674 case RTE_FLOW_ACTION_TYPE_COUNT:
3675 return sfc_mae_query_counter(sa, spec_mae, action,
3678 return rte_flow_error_set(error, ENOTSUP,
3679 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3680 "Query for action of this type is not supported");
3685 sfc_mae_switchdev_init(struct sfc_adapter *sa)
3687 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
3688 struct sfc_mae *mae = &sa->mae;
3690 efx_mport_sel_t phy;
3693 sfc_log_init(sa, "entry");
3695 if (!sa->switchdev) {
3696 sfc_log_init(sa, "switchdev is not enabled - skip");
3700 if (mae->status != SFC_MAE_STATUS_SUPPORTED) {
3702 sfc_err(sa, "failed to init switchdev - no MAE support");
3706 rc = efx_mae_mport_by_pcie_function(encp->enc_pf, EFX_PCI_VF_INVALID,
3709 sfc_err(sa, "failed get PF mport");
3713 rc = efx_mae_mport_by_phy_port(encp->enc_assigned_port, &phy);
3715 sfc_err(sa, "failed get PHY mport");
3719 rc = sfc_mae_rule_add_mport_match_deliver(sa, &pf, &phy,
3720 SFC_MAE_RULE_PRIO_LOWEST,
3721 &mae->switchdev_rule_pf_to_ext);
3723 sfc_err(sa, "failed add MAE rule to forward from PF to PHY");
3727 rc = sfc_mae_rule_add_mport_match_deliver(sa, &phy, &pf,
3728 SFC_MAE_RULE_PRIO_LOWEST,
3729 &mae->switchdev_rule_ext_to_pf);
3731 sfc_err(sa, "failed add MAE rule to forward from PHY to PF");
3735 sfc_log_init(sa, "done");
3740 sfc_mae_rule_del(sa, mae->switchdev_rule_pf_to_ext);
3746 sfc_log_init(sa, "failed: %s", rte_strerror(rc));
3751 sfc_mae_switchdev_fini(struct sfc_adapter *sa)
3753 struct sfc_mae *mae = &sa->mae;
3758 sfc_mae_rule_del(sa, mae->switchdev_rule_pf_to_ext);
3759 sfc_mae_rule_del(sa, mae->switchdev_rule_ext_to_pf);