1 /* SPDX-License-Identifier: BSD-3-Clause
3 * Copyright(c) 2019-2021 Xilinx, Inc.
4 * Copyright(c) 2019 Solarflare Communications Inc.
6 * This software was jointly developed between OKTET Labs (under contract
7 * for Solarflare) and Solarflare Communications, Inc.
12 #include <rte_bitops.h>
13 #include <rte_common.h>
14 #include <rte_vxlan.h>
19 #include "sfc_mae_counter.h"
21 #include "sfc_switch.h"
22 #include "sfc_service.h"
25 sfc_mae_assign_entity_mport(struct sfc_adapter *sa,
26 efx_mport_sel_t *mportp)
28 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
30 return efx_mae_mport_by_pcie_function(encp->enc_pf, encp->enc_vf,
35 sfc_mae_counter_registry_init(struct sfc_mae_counter_registry *registry,
36 uint32_t nb_counters_max)
38 return sfc_mae_counters_init(®istry->counters, nb_counters_max);
42 sfc_mae_counter_registry_fini(struct sfc_mae_counter_registry *registry)
44 sfc_mae_counters_fini(®istry->counters);
48 sfc_mae_internal_rule_find_empty_slot(struct sfc_adapter *sa,
49 struct sfc_mae_rule **rule)
51 struct sfc_mae *mae = &sa->mae;
52 struct sfc_mae_internal_rules *internal_rules = &mae->internal_rules;
56 for (entry = 0; entry < SFC_MAE_NB_RULES_MAX; entry++) {
57 if (internal_rules->rules[entry].spec == NULL)
61 if (entry == SFC_MAE_NB_RULES_MAX) {
63 sfc_err(sa, "failed too many rules (%u rules used)", entry);
64 goto fail_too_many_rules;
67 *rule = &internal_rules->rules[entry];
76 sfc_mae_rule_add_mport_match_deliver(struct sfc_adapter *sa,
77 const efx_mport_sel_t *mport_match,
78 const efx_mport_sel_t *mport_deliver,
79 int prio, struct sfc_mae_rule **rulep)
81 struct sfc_mae *mae = &sa->mae;
82 struct sfc_mae_rule *rule;
85 sfc_log_init(sa, "entry");
87 if (prio > 0 && (unsigned int)prio >= mae->nb_action_rule_prios_max) {
89 sfc_err(sa, "failed: invalid priority %d (max %u)", prio,
90 mae->nb_action_rule_prios_max);
91 goto fail_invalid_prio;
94 prio = mae->nb_action_rule_prios_max - 1;
96 rc = sfc_mae_internal_rule_find_empty_slot(sa, &rule);
98 goto fail_find_empty_slot;
100 sfc_log_init(sa, "init MAE match spec");
101 rc = efx_mae_match_spec_init(sa->nic, EFX_MAE_RULE_ACTION,
102 (uint32_t)prio, &rule->spec);
104 sfc_err(sa, "failed to init MAE match spec");
105 goto fail_match_init;
108 rc = efx_mae_match_spec_mport_set(rule->spec, mport_match, NULL);
110 sfc_err(sa, "failed to get MAE match mport selector");
114 rc = efx_mae_action_set_spec_init(sa->nic, &rule->actions);
116 sfc_err(sa, "failed to init MAE action set");
117 goto fail_action_init;
120 rc = efx_mae_action_set_populate_deliver(rule->actions,
123 sfc_err(sa, "failed to populate deliver action");
124 goto fail_populate_deliver;
127 rc = efx_mae_action_set_alloc(sa->nic, rule->actions,
130 sfc_err(sa, "failed to allocate action set");
131 goto fail_action_set_alloc;
134 rc = efx_mae_action_rule_insert(sa->nic, rule->spec, NULL,
138 sfc_err(sa, "failed to insert action rule");
139 goto fail_rule_insert;
144 sfc_log_init(sa, "done");
149 efx_mae_action_set_free(sa->nic, &rule->action_set);
151 fail_action_set_alloc:
152 fail_populate_deliver:
153 efx_mae_action_set_spec_fini(sa->nic, rule->actions);
157 efx_mae_match_spec_fini(sa->nic, rule->spec);
160 fail_find_empty_slot:
162 sfc_log_init(sa, "failed: %s", rte_strerror(rc));
167 sfc_mae_rule_del(struct sfc_adapter *sa, struct sfc_mae_rule *rule)
169 if (rule == NULL || rule->spec == NULL)
172 efx_mae_action_rule_remove(sa->nic, &rule->rule_id);
173 efx_mae_action_set_free(sa->nic, &rule->action_set);
174 efx_mae_action_set_spec_fini(sa->nic, rule->actions);
175 efx_mae_match_spec_fini(sa->nic, rule->spec);
181 sfc_mae_attach(struct sfc_adapter *sa)
183 struct sfc_adapter_shared * const sas = sfc_sa2shared(sa);
184 struct sfc_mae_switch_port_request switch_port_request = {0};
185 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
186 efx_mport_sel_t entity_mport;
187 struct sfc_mae *mae = &sa->mae;
188 struct sfc_mae_bounce_eh *bounce_eh = &mae->bounce_eh;
189 efx_mae_limits_t limits;
192 sfc_log_init(sa, "entry");
194 if (!encp->enc_mae_supported) {
195 mae->status = SFC_MAE_STATUS_UNSUPPORTED;
199 sfc_log_init(sa, "init MAE");
200 rc = efx_mae_init(sa->nic);
204 sfc_log_init(sa, "get MAE limits");
205 rc = efx_mae_get_limits(sa->nic, &limits);
207 goto fail_mae_get_limits;
209 sfc_log_init(sa, "init MAE counter registry");
210 rc = sfc_mae_counter_registry_init(&mae->counter_registry,
211 limits.eml_max_n_counters);
213 sfc_err(sa, "failed to init MAE counters registry for %u entries: %s",
214 limits.eml_max_n_counters, rte_strerror(rc));
215 goto fail_counter_registry_init;
218 sfc_log_init(sa, "assign entity MPORT");
219 rc = sfc_mae_assign_entity_mport(sa, &entity_mport);
221 goto fail_mae_assign_entity_mport;
223 sfc_log_init(sa, "assign RTE switch domain");
224 rc = sfc_mae_assign_switch_domain(sa, &mae->switch_domain_id);
226 goto fail_mae_assign_switch_domain;
228 sfc_log_init(sa, "assign RTE switch port");
229 switch_port_request.type = SFC_MAE_SWITCH_PORT_INDEPENDENT;
230 switch_port_request.entity_mportp = &entity_mport;
232 * As of now, the driver does not support representors, so
233 * RTE ethdev MPORT simply matches that of the entity.
235 switch_port_request.ethdev_mportp = &entity_mport;
236 switch_port_request.ethdev_port_id = sas->port_id;
237 rc = sfc_mae_assign_switch_port(mae->switch_domain_id,
238 &switch_port_request,
239 &mae->switch_port_id);
241 goto fail_mae_assign_switch_port;
243 sfc_log_init(sa, "allocate encap. header bounce buffer");
244 bounce_eh->buf_size = limits.eml_encap_header_size_limit;
245 bounce_eh->buf = rte_malloc("sfc_mae_bounce_eh",
246 bounce_eh->buf_size, 0);
247 if (bounce_eh->buf == NULL)
248 goto fail_mae_alloc_bounce_eh;
250 mae->status = SFC_MAE_STATUS_SUPPORTED;
251 mae->nb_outer_rule_prios_max = limits.eml_max_n_outer_prios;
252 mae->nb_action_rule_prios_max = limits.eml_max_n_action_prios;
253 mae->encap_types_supported = limits.eml_encap_types_supported;
254 TAILQ_INIT(&mae->outer_rules);
255 TAILQ_INIT(&mae->encap_headers);
256 TAILQ_INIT(&mae->action_sets);
258 sfc_log_init(sa, "done");
262 fail_mae_alloc_bounce_eh:
263 fail_mae_assign_switch_port:
264 fail_mae_assign_switch_domain:
265 fail_mae_assign_entity_mport:
266 sfc_mae_counter_registry_fini(&mae->counter_registry);
268 fail_counter_registry_init:
270 efx_mae_fini(sa->nic);
273 sfc_log_init(sa, "failed %d", rc);
279 sfc_mae_detach(struct sfc_adapter *sa)
281 struct sfc_mae *mae = &sa->mae;
282 enum sfc_mae_status status_prev = mae->status;
284 sfc_log_init(sa, "entry");
286 mae->nb_action_rule_prios_max = 0;
287 mae->status = SFC_MAE_STATUS_UNKNOWN;
289 if (status_prev != SFC_MAE_STATUS_SUPPORTED)
292 rte_free(mae->bounce_eh.buf);
293 sfc_mae_counter_registry_fini(&mae->counter_registry);
295 efx_mae_fini(sa->nic);
297 sfc_log_init(sa, "done");
300 static struct sfc_mae_outer_rule *
301 sfc_mae_outer_rule_attach(struct sfc_adapter *sa,
302 const efx_mae_match_spec_t *match_spec,
303 efx_tunnel_protocol_t encap_type)
305 struct sfc_mae_outer_rule *rule;
306 struct sfc_mae *mae = &sa->mae;
308 SFC_ASSERT(sfc_adapter_is_locked(sa));
310 TAILQ_FOREACH(rule, &mae->outer_rules, entries) {
311 if (efx_mae_match_specs_equal(rule->match_spec, match_spec) &&
312 rule->encap_type == encap_type) {
313 sfc_dbg(sa, "attaching to outer_rule=%p", rule);
323 sfc_mae_outer_rule_add(struct sfc_adapter *sa,
324 efx_mae_match_spec_t *match_spec,
325 efx_tunnel_protocol_t encap_type,
326 struct sfc_mae_outer_rule **rulep)
328 struct sfc_mae_outer_rule *rule;
329 struct sfc_mae *mae = &sa->mae;
331 SFC_ASSERT(sfc_adapter_is_locked(sa));
333 rule = rte_zmalloc("sfc_mae_outer_rule", sizeof(*rule), 0);
338 rule->match_spec = match_spec;
339 rule->encap_type = encap_type;
341 rule->fw_rsrc.rule_id.id = EFX_MAE_RSRC_ID_INVALID;
343 TAILQ_INSERT_TAIL(&mae->outer_rules, rule, entries);
347 sfc_dbg(sa, "added outer_rule=%p", rule);
353 sfc_mae_outer_rule_del(struct sfc_adapter *sa,
354 struct sfc_mae_outer_rule *rule)
356 struct sfc_mae *mae = &sa->mae;
358 SFC_ASSERT(sfc_adapter_is_locked(sa));
359 SFC_ASSERT(rule->refcnt != 0);
363 if (rule->refcnt != 0)
366 if (rule->fw_rsrc.rule_id.id != EFX_MAE_RSRC_ID_INVALID ||
367 rule->fw_rsrc.refcnt != 0) {
368 sfc_err(sa, "deleting outer_rule=%p abandons its FW resource: OR_ID=0x%08x, refcnt=%u",
369 rule, rule->fw_rsrc.rule_id.id, rule->fw_rsrc.refcnt);
372 efx_mae_match_spec_fini(sa->nic, rule->match_spec);
374 TAILQ_REMOVE(&mae->outer_rules, rule, entries);
377 sfc_dbg(sa, "deleted outer_rule=%p", rule);
381 sfc_mae_outer_rule_enable(struct sfc_adapter *sa,
382 struct sfc_mae_outer_rule *rule,
383 efx_mae_match_spec_t *match_spec_action)
385 struct sfc_mae_fw_rsrc *fw_rsrc = &rule->fw_rsrc;
388 SFC_ASSERT(sfc_adapter_is_locked(sa));
390 if (fw_rsrc->refcnt == 0) {
391 SFC_ASSERT(fw_rsrc->rule_id.id == EFX_MAE_RSRC_ID_INVALID);
392 SFC_ASSERT(rule->match_spec != NULL);
394 rc = efx_mae_outer_rule_insert(sa->nic, rule->match_spec,
398 sfc_err(sa, "failed to enable outer_rule=%p: %s",
404 rc = efx_mae_match_spec_outer_rule_id_set(match_spec_action,
407 if (fw_rsrc->refcnt == 0) {
408 (void)efx_mae_outer_rule_remove(sa->nic,
410 fw_rsrc->rule_id.id = EFX_MAE_RSRC_ID_INVALID;
413 sfc_err(sa, "can't match on outer rule ID: %s", strerror(rc));
418 if (fw_rsrc->refcnt == 0) {
419 sfc_dbg(sa, "enabled outer_rule=%p: OR_ID=0x%08x",
420 rule, fw_rsrc->rule_id.id);
429 sfc_mae_outer_rule_disable(struct sfc_adapter *sa,
430 struct sfc_mae_outer_rule *rule)
432 struct sfc_mae_fw_rsrc *fw_rsrc = &rule->fw_rsrc;
435 SFC_ASSERT(sfc_adapter_is_locked(sa));
437 if (fw_rsrc->rule_id.id == EFX_MAE_RSRC_ID_INVALID ||
438 fw_rsrc->refcnt == 0) {
439 sfc_err(sa, "failed to disable outer_rule=%p: already disabled; OR_ID=0x%08x, refcnt=%u",
440 rule, fw_rsrc->rule_id.id, fw_rsrc->refcnt);
444 if (fw_rsrc->refcnt == 1) {
445 rc = efx_mae_outer_rule_remove(sa->nic, &fw_rsrc->rule_id);
447 sfc_dbg(sa, "disabled outer_rule=%p with OR_ID=0x%08x",
448 rule, fw_rsrc->rule_id.id);
450 sfc_err(sa, "failed to disable outer_rule=%p with OR_ID=0x%08x: %s",
451 rule, fw_rsrc->rule_id.id, strerror(rc));
453 fw_rsrc->rule_id.id = EFX_MAE_RSRC_ID_INVALID;
459 static struct sfc_mae_encap_header *
460 sfc_mae_encap_header_attach(struct sfc_adapter *sa,
461 const struct sfc_mae_bounce_eh *bounce_eh)
463 struct sfc_mae_encap_header *encap_header;
464 struct sfc_mae *mae = &sa->mae;
466 SFC_ASSERT(sfc_adapter_is_locked(sa));
468 TAILQ_FOREACH(encap_header, &mae->encap_headers, entries) {
469 if (encap_header->size == bounce_eh->size &&
470 memcmp(encap_header->buf, bounce_eh->buf,
471 bounce_eh->size) == 0) {
472 sfc_dbg(sa, "attaching to encap_header=%p",
474 ++(encap_header->refcnt);
483 sfc_mae_encap_header_add(struct sfc_adapter *sa,
484 const struct sfc_mae_bounce_eh *bounce_eh,
485 struct sfc_mae_encap_header **encap_headerp)
487 struct sfc_mae_encap_header *encap_header;
488 struct sfc_mae *mae = &sa->mae;
490 SFC_ASSERT(sfc_adapter_is_locked(sa));
492 encap_header = rte_zmalloc("sfc_mae_encap_header",
493 sizeof(*encap_header), 0);
494 if (encap_header == NULL)
497 encap_header->size = bounce_eh->size;
499 encap_header->buf = rte_malloc("sfc_mae_encap_header_buf",
500 encap_header->size, 0);
501 if (encap_header->buf == NULL) {
502 rte_free(encap_header);
506 rte_memcpy(encap_header->buf, bounce_eh->buf, bounce_eh->size);
508 encap_header->refcnt = 1;
509 encap_header->type = bounce_eh->type;
510 encap_header->fw_rsrc.eh_id.id = EFX_MAE_RSRC_ID_INVALID;
512 TAILQ_INSERT_TAIL(&mae->encap_headers, encap_header, entries);
514 *encap_headerp = encap_header;
516 sfc_dbg(sa, "added encap_header=%p", encap_header);
522 sfc_mae_encap_header_del(struct sfc_adapter *sa,
523 struct sfc_mae_encap_header *encap_header)
525 struct sfc_mae *mae = &sa->mae;
527 if (encap_header == NULL)
530 SFC_ASSERT(sfc_adapter_is_locked(sa));
531 SFC_ASSERT(encap_header->refcnt != 0);
533 --(encap_header->refcnt);
535 if (encap_header->refcnt != 0)
538 if (encap_header->fw_rsrc.eh_id.id != EFX_MAE_RSRC_ID_INVALID ||
539 encap_header->fw_rsrc.refcnt != 0) {
540 sfc_err(sa, "deleting encap_header=%p abandons its FW resource: EH_ID=0x%08x, refcnt=%u",
541 encap_header, encap_header->fw_rsrc.eh_id.id,
542 encap_header->fw_rsrc.refcnt);
545 TAILQ_REMOVE(&mae->encap_headers, encap_header, entries);
546 rte_free(encap_header->buf);
547 rte_free(encap_header);
549 sfc_dbg(sa, "deleted encap_header=%p", encap_header);
553 sfc_mae_encap_header_enable(struct sfc_adapter *sa,
554 struct sfc_mae_encap_header *encap_header,
555 efx_mae_actions_t *action_set_spec)
557 struct sfc_mae_fw_rsrc *fw_rsrc;
560 if (encap_header == NULL)
563 SFC_ASSERT(sfc_adapter_is_locked(sa));
565 fw_rsrc = &encap_header->fw_rsrc;
567 if (fw_rsrc->refcnt == 0) {
568 SFC_ASSERT(fw_rsrc->eh_id.id == EFX_MAE_RSRC_ID_INVALID);
569 SFC_ASSERT(encap_header->buf != NULL);
570 SFC_ASSERT(encap_header->size != 0);
572 rc = efx_mae_encap_header_alloc(sa->nic, encap_header->type,
577 sfc_err(sa, "failed to enable encap_header=%p: %s",
578 encap_header, strerror(rc));
583 rc = efx_mae_action_set_fill_in_eh_id(action_set_spec,
586 if (fw_rsrc->refcnt == 0) {
587 (void)efx_mae_encap_header_free(sa->nic,
589 fw_rsrc->eh_id.id = EFX_MAE_RSRC_ID_INVALID;
592 sfc_err(sa, "can't fill in encap. header ID: %s", strerror(rc));
597 if (fw_rsrc->refcnt == 0) {
598 sfc_dbg(sa, "enabled encap_header=%p: EH_ID=0x%08x",
599 encap_header, fw_rsrc->eh_id.id);
608 sfc_mae_encap_header_disable(struct sfc_adapter *sa,
609 struct sfc_mae_encap_header *encap_header)
611 struct sfc_mae_fw_rsrc *fw_rsrc;
614 if (encap_header == NULL)
617 SFC_ASSERT(sfc_adapter_is_locked(sa));
619 fw_rsrc = &encap_header->fw_rsrc;
621 if (fw_rsrc->eh_id.id == EFX_MAE_RSRC_ID_INVALID ||
622 fw_rsrc->refcnt == 0) {
623 sfc_err(sa, "failed to disable encap_header=%p: already disabled; EH_ID=0x%08x, refcnt=%u",
624 encap_header, fw_rsrc->eh_id.id, fw_rsrc->refcnt);
628 if (fw_rsrc->refcnt == 1) {
629 rc = efx_mae_encap_header_free(sa->nic, &fw_rsrc->eh_id);
631 sfc_dbg(sa, "disabled encap_header=%p with EH_ID=0x%08x",
632 encap_header, fw_rsrc->eh_id.id);
634 sfc_err(sa, "failed to disable encap_header=%p with EH_ID=0x%08x: %s",
635 encap_header, fw_rsrc->eh_id.id, strerror(rc));
637 fw_rsrc->eh_id.id = EFX_MAE_RSRC_ID_INVALID;
644 sfc_mae_counters_enable(struct sfc_adapter *sa,
645 struct sfc_mae_counter_id *counters,
646 unsigned int n_counters,
647 efx_mae_actions_t *action_set_spec)
651 sfc_log_init(sa, "entry");
653 if (n_counters == 0) {
654 sfc_log_init(sa, "no counters - skip");
658 SFC_ASSERT(sfc_adapter_is_locked(sa));
659 SFC_ASSERT(n_counters == 1);
661 rc = sfc_mae_counter_enable(sa, &counters[0]);
663 sfc_err(sa, "failed to enable MAE counter %u: %s",
664 counters[0].mae_id.id, rte_strerror(rc));
665 goto fail_counter_add;
668 rc = efx_mae_action_set_fill_in_counter_id(action_set_spec,
669 &counters[0].mae_id);
671 sfc_err(sa, "failed to fill in MAE counter %u in action set: %s",
672 counters[0].mae_id.id, rte_strerror(rc));
673 goto fail_fill_in_id;
679 (void)sfc_mae_counter_disable(sa, &counters[0]);
682 sfc_log_init(sa, "failed: %s", rte_strerror(rc));
687 sfc_mae_counters_disable(struct sfc_adapter *sa,
688 struct sfc_mae_counter_id *counters,
689 unsigned int n_counters)
694 SFC_ASSERT(sfc_adapter_is_locked(sa));
695 SFC_ASSERT(n_counters == 1);
697 if (counters[0].mae_id.id == EFX_MAE_RSRC_ID_INVALID) {
698 sfc_err(sa, "failed to disable: already disabled");
702 return sfc_mae_counter_disable(sa, &counters[0]);
705 static struct sfc_mae_action_set *
706 sfc_mae_action_set_attach(struct sfc_adapter *sa,
707 const struct sfc_mae_encap_header *encap_header,
708 unsigned int n_count,
709 const efx_mae_actions_t *spec)
711 struct sfc_mae_action_set *action_set;
712 struct sfc_mae *mae = &sa->mae;
714 SFC_ASSERT(sfc_adapter_is_locked(sa));
716 TAILQ_FOREACH(action_set, &mae->action_sets, entries) {
718 * Shared counters are not supported, hence action sets with
719 * COUNT are not attachable.
721 if (action_set->encap_header == encap_header &&
723 efx_mae_action_set_specs_equal(action_set->spec, spec)) {
724 sfc_dbg(sa, "attaching to action_set=%p", action_set);
725 ++(action_set->refcnt);
734 sfc_mae_action_set_add(struct sfc_adapter *sa,
735 const struct rte_flow_action actions[],
736 efx_mae_actions_t *spec,
737 struct sfc_mae_encap_header *encap_header,
738 unsigned int n_counters,
739 struct sfc_mae_action_set **action_setp)
741 struct sfc_mae_action_set *action_set;
742 struct sfc_mae *mae = &sa->mae;
745 SFC_ASSERT(sfc_adapter_is_locked(sa));
747 action_set = rte_zmalloc("sfc_mae_action_set", sizeof(*action_set), 0);
748 if (action_set == NULL) {
749 sfc_err(sa, "failed to alloc action set");
753 if (n_counters > 0) {
754 const struct rte_flow_action *action;
756 action_set->counters = rte_malloc("sfc_mae_counter_ids",
757 sizeof(action_set->counters[0]) * n_counters, 0);
758 if (action_set->counters == NULL) {
759 rte_free(action_set);
760 sfc_err(sa, "failed to alloc counters");
764 for (action = actions, i = 0;
765 action->type != RTE_FLOW_ACTION_TYPE_END && i < n_counters;
767 const struct rte_flow_action_count *conf;
769 if (action->type != RTE_FLOW_ACTION_TYPE_COUNT)
774 action_set->counters[i].mae_id.id =
775 EFX_MAE_RSRC_ID_INVALID;
776 action_set->counters[i].rte_id = conf->id;
779 action_set->n_counters = n_counters;
782 action_set->refcnt = 1;
783 action_set->spec = spec;
784 action_set->encap_header = encap_header;
786 action_set->fw_rsrc.aset_id.id = EFX_MAE_RSRC_ID_INVALID;
788 TAILQ_INSERT_TAIL(&mae->action_sets, action_set, entries);
790 *action_setp = action_set;
792 sfc_dbg(sa, "added action_set=%p", action_set);
798 sfc_mae_action_set_del(struct sfc_adapter *sa,
799 struct sfc_mae_action_set *action_set)
801 struct sfc_mae *mae = &sa->mae;
803 SFC_ASSERT(sfc_adapter_is_locked(sa));
804 SFC_ASSERT(action_set->refcnt != 0);
806 --(action_set->refcnt);
808 if (action_set->refcnt != 0)
811 if (action_set->fw_rsrc.aset_id.id != EFX_MAE_RSRC_ID_INVALID ||
812 action_set->fw_rsrc.refcnt != 0) {
813 sfc_err(sa, "deleting action_set=%p abandons its FW resource: AS_ID=0x%08x, refcnt=%u",
814 action_set, action_set->fw_rsrc.aset_id.id,
815 action_set->fw_rsrc.refcnt);
818 efx_mae_action_set_spec_fini(sa->nic, action_set->spec);
819 sfc_mae_encap_header_del(sa, action_set->encap_header);
820 if (action_set->n_counters > 0) {
821 SFC_ASSERT(action_set->n_counters == 1);
822 SFC_ASSERT(action_set->counters[0].mae_id.id ==
823 EFX_MAE_RSRC_ID_INVALID);
824 rte_free(action_set->counters);
826 TAILQ_REMOVE(&mae->action_sets, action_set, entries);
827 rte_free(action_set);
829 sfc_dbg(sa, "deleted action_set=%p", action_set);
833 sfc_mae_action_set_enable(struct sfc_adapter *sa,
834 struct sfc_mae_action_set *action_set)
836 struct sfc_mae_encap_header *encap_header = action_set->encap_header;
837 struct sfc_mae_counter_id *counters = action_set->counters;
838 struct sfc_mae_fw_rsrc *fw_rsrc = &action_set->fw_rsrc;
841 SFC_ASSERT(sfc_adapter_is_locked(sa));
843 if (fw_rsrc->refcnt == 0) {
844 SFC_ASSERT(fw_rsrc->aset_id.id == EFX_MAE_RSRC_ID_INVALID);
845 SFC_ASSERT(action_set->spec != NULL);
847 rc = sfc_mae_encap_header_enable(sa, encap_header,
852 rc = sfc_mae_counters_enable(sa, counters,
853 action_set->n_counters,
856 sfc_err(sa, "failed to enable %u MAE counters: %s",
857 action_set->n_counters, rte_strerror(rc));
859 sfc_mae_encap_header_disable(sa, encap_header);
863 rc = efx_mae_action_set_alloc(sa->nic, action_set->spec,
866 sfc_err(sa, "failed to enable action_set=%p: %s",
867 action_set, strerror(rc));
869 (void)sfc_mae_counters_disable(sa, counters,
870 action_set->n_counters);
871 sfc_mae_encap_header_disable(sa, encap_header);
875 sfc_dbg(sa, "enabled action_set=%p: AS_ID=0x%08x",
876 action_set, fw_rsrc->aset_id.id);
885 sfc_mae_action_set_disable(struct sfc_adapter *sa,
886 struct sfc_mae_action_set *action_set)
888 struct sfc_mae_fw_rsrc *fw_rsrc = &action_set->fw_rsrc;
891 SFC_ASSERT(sfc_adapter_is_locked(sa));
893 if (fw_rsrc->aset_id.id == EFX_MAE_RSRC_ID_INVALID ||
894 fw_rsrc->refcnt == 0) {
895 sfc_err(sa, "failed to disable action_set=%p: already disabled; AS_ID=0x%08x, refcnt=%u",
896 action_set, fw_rsrc->aset_id.id, fw_rsrc->refcnt);
900 if (fw_rsrc->refcnt == 1) {
901 rc = efx_mae_action_set_free(sa->nic, &fw_rsrc->aset_id);
903 sfc_dbg(sa, "disabled action_set=%p with AS_ID=0x%08x",
904 action_set, fw_rsrc->aset_id.id);
906 sfc_err(sa, "failed to disable action_set=%p with AS_ID=0x%08x: %s",
907 action_set, fw_rsrc->aset_id.id, strerror(rc));
909 fw_rsrc->aset_id.id = EFX_MAE_RSRC_ID_INVALID;
911 rc = sfc_mae_counters_disable(sa, action_set->counters,
912 action_set->n_counters);
914 sfc_err(sa, "failed to disable %u MAE counters: %s",
915 action_set->n_counters, rte_strerror(rc));
918 sfc_mae_encap_header_disable(sa, action_set->encap_header);
925 sfc_mae_flow_cleanup(struct sfc_adapter *sa,
926 struct rte_flow *flow)
928 struct sfc_flow_spec *spec;
929 struct sfc_flow_spec_mae *spec_mae;
939 spec_mae = &spec->mae;
941 SFC_ASSERT(spec_mae->rule_id.id == EFX_MAE_RSRC_ID_INVALID);
943 if (spec_mae->outer_rule != NULL)
944 sfc_mae_outer_rule_del(sa, spec_mae->outer_rule);
946 if (spec_mae->action_set != NULL)
947 sfc_mae_action_set_del(sa, spec_mae->action_set);
949 if (spec_mae->match_spec != NULL)
950 efx_mae_match_spec_fini(sa->nic, spec_mae->match_spec);
954 sfc_mae_set_ethertypes(struct sfc_mae_parse_ctx *ctx)
956 struct sfc_mae_pattern_data *pdata = &ctx->pattern_data;
957 const efx_mae_field_id_t *fremap = ctx->field_ids_remap;
958 const efx_mae_field_id_t field_ids[] = {
959 EFX_MAE_FIELD_VLAN0_PROTO_BE,
960 EFX_MAE_FIELD_VLAN1_PROTO_BE,
962 const struct sfc_mae_ethertype *et;
967 * In accordance with RTE flow API convention, the innermost L2
968 * item's "type" ("inner_type") is a L3 EtherType. If there is
969 * no L3 item, it's 0x0000/0x0000.
971 et = &pdata->ethertypes[pdata->nb_vlan_tags];
972 rc = efx_mae_match_spec_field_set(ctx->match_spec,
973 fremap[EFX_MAE_FIELD_ETHER_TYPE_BE],
975 (const uint8_t *)&et->value,
977 (const uint8_t *)&et->mask);
982 * sfc_mae_rule_parse_item_vlan() has already made sure
983 * that pdata->nb_vlan_tags does not exceed this figure.
985 RTE_BUILD_BUG_ON(SFC_MAE_MATCH_VLAN_MAX_NTAGS != 2);
987 for (i = 0; i < pdata->nb_vlan_tags; ++i) {
988 et = &pdata->ethertypes[i];
990 rc = efx_mae_match_spec_field_set(ctx->match_spec,
991 fremap[field_ids[i]],
993 (const uint8_t *)&et->value,
995 (const uint8_t *)&et->mask);
1004 sfc_mae_rule_process_pattern_data(struct sfc_mae_parse_ctx *ctx,
1005 struct rte_flow_error *error)
1007 const efx_mae_field_id_t *fremap = ctx->field_ids_remap;
1008 struct sfc_mae_pattern_data *pdata = &ctx->pattern_data;
1009 struct sfc_mae_ethertype *ethertypes = pdata->ethertypes;
1010 const rte_be16_t supported_tpids[] = {
1011 /* VLAN standard TPID (always the first element) */
1012 RTE_BE16(RTE_ETHER_TYPE_VLAN),
1014 /* Double-tagging TPIDs */
1015 RTE_BE16(RTE_ETHER_TYPE_QINQ),
1016 RTE_BE16(RTE_ETHER_TYPE_QINQ1),
1017 RTE_BE16(RTE_ETHER_TYPE_QINQ2),
1018 RTE_BE16(RTE_ETHER_TYPE_QINQ3),
1020 bool enforce_tag_presence[SFC_MAE_MATCH_VLAN_MAX_NTAGS] = {0};
1021 unsigned int nb_supported_tpids = RTE_DIM(supported_tpids);
1022 unsigned int ethertype_idx;
1023 const uint8_t *valuep;
1024 const uint8_t *maskp;
1027 if (pdata->innermost_ethertype_restriction.mask != 0 &&
1028 pdata->nb_vlan_tags < SFC_MAE_MATCH_VLAN_MAX_NTAGS) {
1030 * If a single item VLAN is followed by a L3 item, value
1031 * of "type" in item ETH can't be a double-tagging TPID.
1033 nb_supported_tpids = 1;
1037 * sfc_mae_rule_parse_item_vlan() has already made sure
1038 * that pdata->nb_vlan_tags does not exceed this figure.
1040 RTE_BUILD_BUG_ON(SFC_MAE_MATCH_VLAN_MAX_NTAGS != 2);
1042 for (ethertype_idx = 0;
1043 ethertype_idx < pdata->nb_vlan_tags; ++ethertype_idx) {
1044 rte_be16_t tpid_v = ethertypes[ethertype_idx].value;
1045 rte_be16_t tpid_m = ethertypes[ethertype_idx].mask;
1046 unsigned int tpid_idx;
1049 * This loop can have only two iterations. On the second one,
1050 * drop outer tag presence enforcement bit because the inner
1051 * tag presence automatically assumes that for the outer tag.
1053 enforce_tag_presence[0] = B_FALSE;
1055 if (tpid_m == RTE_BE16(0)) {
1056 if (pdata->tci_masks[ethertype_idx] == RTE_BE16(0))
1057 enforce_tag_presence[ethertype_idx] = B_TRUE;
1059 /* No match on this field, and no value check. */
1060 nb_supported_tpids = 1;
1064 /* Exact match is supported only. */
1065 if (tpid_m != RTE_BE16(0xffff)) {
1066 sfc_err(ctx->sa, "TPID mask must be 0x0 or 0xffff; got 0x%04x",
1067 rte_be_to_cpu_16(tpid_m));
1072 for (tpid_idx = pdata->nb_vlan_tags - ethertype_idx - 1;
1073 tpid_idx < nb_supported_tpids; ++tpid_idx) {
1074 if (tpid_v == supported_tpids[tpid_idx])
1078 if (tpid_idx == nb_supported_tpids) {
1079 sfc_err(ctx->sa, "TPID 0x%04x is unsupported",
1080 rte_be_to_cpu_16(tpid_v));
1085 nb_supported_tpids = 1;
1088 if (pdata->innermost_ethertype_restriction.mask == RTE_BE16(0xffff)) {
1089 struct sfc_mae_ethertype *et = ðertypes[ethertype_idx];
1090 rte_be16_t enforced_et;
1092 enforced_et = pdata->innermost_ethertype_restriction.value;
1094 if (et->mask == 0) {
1095 et->mask = RTE_BE16(0xffff);
1096 et->value = enforced_et;
1097 } else if (et->mask != RTE_BE16(0xffff) ||
1098 et->value != enforced_et) {
1099 sfc_err(ctx->sa, "L3 EtherType must be 0x0/0x0 or 0x%04x/0xffff; got 0x%04x/0x%04x",
1100 rte_be_to_cpu_16(enforced_et),
1101 rte_be_to_cpu_16(et->value),
1102 rte_be_to_cpu_16(et->mask));
1109 * Now, when the number of VLAN tags is known, set fields
1110 * ETHER_TYPE, VLAN0_PROTO and VLAN1_PROTO so that the first
1111 * one is either a valid L3 EtherType (or 0x0000/0x0000),
1112 * and the last two are valid TPIDs (or 0x0000/0x0000).
1114 rc = sfc_mae_set_ethertypes(ctx);
1118 if (pdata->l3_next_proto_restriction_mask == 0xff) {
1119 if (pdata->l3_next_proto_mask == 0) {
1120 pdata->l3_next_proto_mask = 0xff;
1121 pdata->l3_next_proto_value =
1122 pdata->l3_next_proto_restriction_value;
1123 } else if (pdata->l3_next_proto_mask != 0xff ||
1124 pdata->l3_next_proto_value !=
1125 pdata->l3_next_proto_restriction_value) {
1126 sfc_err(ctx->sa, "L3 next protocol must be 0x0/0x0 or 0x%02x/0xff; got 0x%02x/0x%02x",
1127 pdata->l3_next_proto_restriction_value,
1128 pdata->l3_next_proto_value,
1129 pdata->l3_next_proto_mask);
1135 if (enforce_tag_presence[0] || pdata->has_ovlan_mask) {
1136 rc = efx_mae_match_spec_bit_set(ctx->match_spec,
1137 fremap[EFX_MAE_FIELD_HAS_OVLAN],
1138 enforce_tag_presence[0] ||
1139 pdata->has_ovlan_value);
1144 if (enforce_tag_presence[1] || pdata->has_ivlan_mask) {
1145 rc = efx_mae_match_spec_bit_set(ctx->match_spec,
1146 fremap[EFX_MAE_FIELD_HAS_IVLAN],
1147 enforce_tag_presence[1] ||
1148 pdata->has_ivlan_value);
1153 valuep = (const uint8_t *)&pdata->l3_next_proto_value;
1154 maskp = (const uint8_t *)&pdata->l3_next_proto_mask;
1155 rc = efx_mae_match_spec_field_set(ctx->match_spec,
1156 fremap[EFX_MAE_FIELD_IP_PROTO],
1157 sizeof(pdata->l3_next_proto_value),
1159 sizeof(pdata->l3_next_proto_mask),
1167 return rte_flow_error_set(error, rc, RTE_FLOW_ERROR_TYPE_ITEM, NULL,
1168 "Failed to process pattern data");
1172 sfc_mae_rule_parse_item_port_id(const struct rte_flow_item *item,
1173 struct sfc_flow_parse_ctx *ctx,
1174 struct rte_flow_error *error)
1176 struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1177 const struct rte_flow_item_port_id supp_mask = {
1180 const void *def_mask = &rte_flow_item_port_id_mask;
1181 const struct rte_flow_item_port_id *spec = NULL;
1182 const struct rte_flow_item_port_id *mask = NULL;
1183 efx_mport_sel_t mport_sel;
1186 if (ctx_mae->match_mport_set) {
1187 return rte_flow_error_set(error, ENOTSUP,
1188 RTE_FLOW_ERROR_TYPE_ITEM, item,
1189 "Can't handle multiple traffic source items");
1192 rc = sfc_flow_parse_init(item,
1193 (const void **)&spec, (const void **)&mask,
1194 (const void *)&supp_mask, def_mask,
1195 sizeof(struct rte_flow_item_port_id), error);
1199 if (mask->id != supp_mask.id) {
1200 return rte_flow_error_set(error, EINVAL,
1201 RTE_FLOW_ERROR_TYPE_ITEM, item,
1202 "Bad mask in the PORT_ID pattern item");
1205 /* If "spec" is not set, could be any port ID */
1209 if (spec->id > UINT16_MAX) {
1210 return rte_flow_error_set(error, EOVERFLOW,
1211 RTE_FLOW_ERROR_TYPE_ITEM, item,
1212 "The port ID is too large");
1215 rc = sfc_mae_switch_port_by_ethdev(ctx_mae->sa->mae.switch_domain_id,
1216 spec->id, &mport_sel);
1218 return rte_flow_error_set(error, rc,
1219 RTE_FLOW_ERROR_TYPE_ITEM, item,
1220 "Can't find RTE ethdev by the port ID");
1223 rc = efx_mae_match_spec_mport_set(ctx_mae->match_spec,
1226 return rte_flow_error_set(error, rc,
1227 RTE_FLOW_ERROR_TYPE_ITEM, item,
1228 "Failed to set MPORT for the port ID");
1231 ctx_mae->match_mport_set = B_TRUE;
1237 sfc_mae_rule_parse_item_phy_port(const struct rte_flow_item *item,
1238 struct sfc_flow_parse_ctx *ctx,
1239 struct rte_flow_error *error)
1241 struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1242 const struct rte_flow_item_phy_port supp_mask = {
1243 .index = 0xffffffff,
1245 const void *def_mask = &rte_flow_item_phy_port_mask;
1246 const struct rte_flow_item_phy_port *spec = NULL;
1247 const struct rte_flow_item_phy_port *mask = NULL;
1248 efx_mport_sel_t mport_v;
1251 if (ctx_mae->match_mport_set) {
1252 return rte_flow_error_set(error, ENOTSUP,
1253 RTE_FLOW_ERROR_TYPE_ITEM, item,
1254 "Can't handle multiple traffic source items");
1257 rc = sfc_flow_parse_init(item,
1258 (const void **)&spec, (const void **)&mask,
1259 (const void *)&supp_mask, def_mask,
1260 sizeof(struct rte_flow_item_phy_port), error);
1264 if (mask->index != supp_mask.index) {
1265 return rte_flow_error_set(error, EINVAL,
1266 RTE_FLOW_ERROR_TYPE_ITEM, item,
1267 "Bad mask in the PHY_PORT pattern item");
1270 /* If "spec" is not set, could be any physical port */
1274 rc = efx_mae_mport_by_phy_port(spec->index, &mport_v);
1276 return rte_flow_error_set(error, rc,
1277 RTE_FLOW_ERROR_TYPE_ITEM, item,
1278 "Failed to convert the PHY_PORT index");
1281 rc = efx_mae_match_spec_mport_set(ctx_mae->match_spec, &mport_v, NULL);
1283 return rte_flow_error_set(error, rc,
1284 RTE_FLOW_ERROR_TYPE_ITEM, item,
1285 "Failed to set MPORT for the PHY_PORT");
1288 ctx_mae->match_mport_set = B_TRUE;
1294 sfc_mae_rule_parse_item_pf(const struct rte_flow_item *item,
1295 struct sfc_flow_parse_ctx *ctx,
1296 struct rte_flow_error *error)
1298 struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1299 const efx_nic_cfg_t *encp = efx_nic_cfg_get(ctx_mae->sa->nic);
1300 efx_mport_sel_t mport_v;
1303 if (ctx_mae->match_mport_set) {
1304 return rte_flow_error_set(error, ENOTSUP,
1305 RTE_FLOW_ERROR_TYPE_ITEM, item,
1306 "Can't handle multiple traffic source items");
1309 rc = efx_mae_mport_by_pcie_function(encp->enc_pf, EFX_PCI_VF_INVALID,
1312 return rte_flow_error_set(error, rc,
1313 RTE_FLOW_ERROR_TYPE_ITEM, item,
1314 "Failed to convert the PF ID");
1317 rc = efx_mae_match_spec_mport_set(ctx_mae->match_spec, &mport_v, NULL);
1319 return rte_flow_error_set(error, rc,
1320 RTE_FLOW_ERROR_TYPE_ITEM, item,
1321 "Failed to set MPORT for the PF");
1324 ctx_mae->match_mport_set = B_TRUE;
1330 sfc_mae_rule_parse_item_vf(const struct rte_flow_item *item,
1331 struct sfc_flow_parse_ctx *ctx,
1332 struct rte_flow_error *error)
1334 struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1335 const efx_nic_cfg_t *encp = efx_nic_cfg_get(ctx_mae->sa->nic);
1336 const struct rte_flow_item_vf supp_mask = {
1339 const void *def_mask = &rte_flow_item_vf_mask;
1340 const struct rte_flow_item_vf *spec = NULL;
1341 const struct rte_flow_item_vf *mask = NULL;
1342 efx_mport_sel_t mport_v;
1345 if (ctx_mae->match_mport_set) {
1346 return rte_flow_error_set(error, ENOTSUP,
1347 RTE_FLOW_ERROR_TYPE_ITEM, item,
1348 "Can't handle multiple traffic source items");
1351 rc = sfc_flow_parse_init(item,
1352 (const void **)&spec, (const void **)&mask,
1353 (const void *)&supp_mask, def_mask,
1354 sizeof(struct rte_flow_item_vf), error);
1358 if (mask->id != supp_mask.id) {
1359 return rte_flow_error_set(error, EINVAL,
1360 RTE_FLOW_ERROR_TYPE_ITEM, item,
1361 "Bad mask in the VF pattern item");
1365 * If "spec" is not set, the item requests any VF related to the
1366 * PF of the current DPDK port (but not the PF itself).
1367 * Reject this match criterion as unsupported.
1370 return rte_flow_error_set(error, EINVAL,
1371 RTE_FLOW_ERROR_TYPE_ITEM, item,
1372 "Bad spec in the VF pattern item");
1375 rc = efx_mae_mport_by_pcie_function(encp->enc_pf, spec->id, &mport_v);
1377 return rte_flow_error_set(error, rc,
1378 RTE_FLOW_ERROR_TYPE_ITEM, item,
1379 "Failed to convert the PF + VF IDs");
1382 rc = efx_mae_match_spec_mport_set(ctx_mae->match_spec, &mport_v, NULL);
1384 return rte_flow_error_set(error, rc,
1385 RTE_FLOW_ERROR_TYPE_ITEM, item,
1386 "Failed to set MPORT for the PF + VF");
1389 ctx_mae->match_mport_set = B_TRUE;
1395 * Having this field ID in a field locator means that this
1396 * locator cannot be used to actually set the field at the
1397 * time when the corresponding item gets encountered. Such
1398 * fields get stashed in the parsing context instead. This
1399 * is required to resolve dependencies between the stashed
1400 * fields. See sfc_mae_rule_process_pattern_data().
1402 #define SFC_MAE_FIELD_HANDLING_DEFERRED EFX_MAE_FIELD_NIDS
1404 struct sfc_mae_field_locator {
1405 efx_mae_field_id_t field_id;
1407 /* Field offset in the corresponding rte_flow_item_ struct */
1412 sfc_mae_item_build_supp_mask(const struct sfc_mae_field_locator *field_locators,
1413 unsigned int nb_field_locators, void *mask_ptr,
1418 memset(mask_ptr, 0, mask_size);
1420 for (i = 0; i < nb_field_locators; ++i) {
1421 const struct sfc_mae_field_locator *fl = &field_locators[i];
1423 SFC_ASSERT(fl->ofst + fl->size <= mask_size);
1424 memset(RTE_PTR_ADD(mask_ptr, fl->ofst), 0xff, fl->size);
1429 sfc_mae_parse_item(const struct sfc_mae_field_locator *field_locators,
1430 unsigned int nb_field_locators, const uint8_t *spec,
1431 const uint8_t *mask, struct sfc_mae_parse_ctx *ctx,
1432 struct rte_flow_error *error)
1434 const efx_mae_field_id_t *fremap = ctx->field_ids_remap;
1438 for (i = 0; i < nb_field_locators; ++i) {
1439 const struct sfc_mae_field_locator *fl = &field_locators[i];
1441 if (fl->field_id == SFC_MAE_FIELD_HANDLING_DEFERRED)
1444 rc = efx_mae_match_spec_field_set(ctx->match_spec,
1445 fremap[fl->field_id],
1446 fl->size, spec + fl->ofst,
1447 fl->size, mask + fl->ofst);
1453 rc = rte_flow_error_set(error, rc, RTE_FLOW_ERROR_TYPE_ITEM,
1454 NULL, "Failed to process item fields");
1460 static const struct sfc_mae_field_locator flocs_eth[] = {
1463 * This locator is used only for building supported fields mask.
1464 * The field is handled by sfc_mae_rule_process_pattern_data().
1466 SFC_MAE_FIELD_HANDLING_DEFERRED,
1467 RTE_SIZEOF_FIELD(struct rte_flow_item_eth, type),
1468 offsetof(struct rte_flow_item_eth, type),
1471 EFX_MAE_FIELD_ETH_DADDR_BE,
1472 RTE_SIZEOF_FIELD(struct rte_flow_item_eth, dst),
1473 offsetof(struct rte_flow_item_eth, dst),
1476 EFX_MAE_FIELD_ETH_SADDR_BE,
1477 RTE_SIZEOF_FIELD(struct rte_flow_item_eth, src),
1478 offsetof(struct rte_flow_item_eth, src),
1483 sfc_mae_rule_parse_item_eth(const struct rte_flow_item *item,
1484 struct sfc_flow_parse_ctx *ctx,
1485 struct rte_flow_error *error)
1487 struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1488 struct rte_flow_item_eth supp_mask;
1489 const uint8_t *spec = NULL;
1490 const uint8_t *mask = NULL;
1493 sfc_mae_item_build_supp_mask(flocs_eth, RTE_DIM(flocs_eth),
1494 &supp_mask, sizeof(supp_mask));
1495 supp_mask.has_vlan = 1;
1497 rc = sfc_flow_parse_init(item,
1498 (const void **)&spec, (const void **)&mask,
1499 (const void *)&supp_mask,
1500 &rte_flow_item_eth_mask,
1501 sizeof(struct rte_flow_item_eth), error);
1506 struct sfc_mae_pattern_data *pdata = &ctx_mae->pattern_data;
1507 struct sfc_mae_ethertype *ethertypes = pdata->ethertypes;
1508 const struct rte_flow_item_eth *item_spec;
1509 const struct rte_flow_item_eth *item_mask;
1511 item_spec = (const struct rte_flow_item_eth *)spec;
1512 item_mask = (const struct rte_flow_item_eth *)mask;
1515 * Remember various match criteria in the parsing context.
1516 * sfc_mae_rule_process_pattern_data() will consider them
1517 * altogether when the rest of the items have been parsed.
1519 ethertypes[0].value = item_spec->type;
1520 ethertypes[0].mask = item_mask->type;
1521 if (item_mask->has_vlan) {
1522 pdata->has_ovlan_mask = B_TRUE;
1523 if (item_spec->has_vlan)
1524 pdata->has_ovlan_value = B_TRUE;
1528 * The specification is empty. The overall pattern
1529 * validity will be enforced at the end of parsing.
1530 * See sfc_mae_rule_process_pattern_data().
1535 return sfc_mae_parse_item(flocs_eth, RTE_DIM(flocs_eth), spec, mask,
1539 static const struct sfc_mae_field_locator flocs_vlan[] = {
1542 EFX_MAE_FIELD_VLAN0_TCI_BE,
1543 RTE_SIZEOF_FIELD(struct rte_flow_item_vlan, tci),
1544 offsetof(struct rte_flow_item_vlan, tci),
1548 * This locator is used only for building supported fields mask.
1549 * The field is handled by sfc_mae_rule_process_pattern_data().
1551 SFC_MAE_FIELD_HANDLING_DEFERRED,
1552 RTE_SIZEOF_FIELD(struct rte_flow_item_vlan, inner_type),
1553 offsetof(struct rte_flow_item_vlan, inner_type),
1558 EFX_MAE_FIELD_VLAN1_TCI_BE,
1559 RTE_SIZEOF_FIELD(struct rte_flow_item_vlan, tci),
1560 offsetof(struct rte_flow_item_vlan, tci),
1564 * This locator is used only for building supported fields mask.
1565 * The field is handled by sfc_mae_rule_process_pattern_data().
1567 SFC_MAE_FIELD_HANDLING_DEFERRED,
1568 RTE_SIZEOF_FIELD(struct rte_flow_item_vlan, inner_type),
1569 offsetof(struct rte_flow_item_vlan, inner_type),
1574 sfc_mae_rule_parse_item_vlan(const struct rte_flow_item *item,
1575 struct sfc_flow_parse_ctx *ctx,
1576 struct rte_flow_error *error)
1578 struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1579 struct sfc_mae_pattern_data *pdata = &ctx_mae->pattern_data;
1580 boolean_t *has_vlan_mp_by_nb_tags[SFC_MAE_MATCH_VLAN_MAX_NTAGS] = {
1581 &pdata->has_ovlan_mask,
1582 &pdata->has_ivlan_mask,
1584 boolean_t *has_vlan_vp_by_nb_tags[SFC_MAE_MATCH_VLAN_MAX_NTAGS] = {
1585 &pdata->has_ovlan_value,
1586 &pdata->has_ivlan_value,
1588 boolean_t *cur_tag_presence_bit_mp;
1589 boolean_t *cur_tag_presence_bit_vp;
1590 const struct sfc_mae_field_locator *flocs;
1591 struct rte_flow_item_vlan supp_mask;
1592 const uint8_t *spec = NULL;
1593 const uint8_t *mask = NULL;
1594 unsigned int nb_flocs;
1597 RTE_BUILD_BUG_ON(SFC_MAE_MATCH_VLAN_MAX_NTAGS != 2);
1599 if (pdata->nb_vlan_tags == SFC_MAE_MATCH_VLAN_MAX_NTAGS) {
1600 return rte_flow_error_set(error, ENOTSUP,
1601 RTE_FLOW_ERROR_TYPE_ITEM, item,
1602 "Can't match that many VLAN tags");
1605 cur_tag_presence_bit_mp = has_vlan_mp_by_nb_tags[pdata->nb_vlan_tags];
1606 cur_tag_presence_bit_vp = has_vlan_vp_by_nb_tags[pdata->nb_vlan_tags];
1608 if (*cur_tag_presence_bit_mp == B_TRUE &&
1609 *cur_tag_presence_bit_vp == B_FALSE) {
1610 return rte_flow_error_set(error, EINVAL,
1611 RTE_FLOW_ERROR_TYPE_ITEM, item,
1612 "The previous item enforces no (more) VLAN, "
1613 "so the current item (VLAN) must not exist");
1616 nb_flocs = RTE_DIM(flocs_vlan) / SFC_MAE_MATCH_VLAN_MAX_NTAGS;
1617 flocs = flocs_vlan + pdata->nb_vlan_tags * nb_flocs;
1619 sfc_mae_item_build_supp_mask(flocs, nb_flocs,
1620 &supp_mask, sizeof(supp_mask));
1622 * This only means that the field is supported by the driver and libefx.
1623 * Support on NIC level will be checked when all items have been parsed.
1625 supp_mask.has_more_vlan = 1;
1627 rc = sfc_flow_parse_init(item,
1628 (const void **)&spec, (const void **)&mask,
1629 (const void *)&supp_mask,
1630 &rte_flow_item_vlan_mask,
1631 sizeof(struct rte_flow_item_vlan), error);
1636 struct sfc_mae_ethertype *et = pdata->ethertypes;
1637 const struct rte_flow_item_vlan *item_spec;
1638 const struct rte_flow_item_vlan *item_mask;
1640 item_spec = (const struct rte_flow_item_vlan *)spec;
1641 item_mask = (const struct rte_flow_item_vlan *)mask;
1644 * Remember various match criteria in the parsing context.
1645 * sfc_mae_rule_process_pattern_data() will consider them
1646 * altogether when the rest of the items have been parsed.
1648 et[pdata->nb_vlan_tags + 1].value = item_spec->inner_type;
1649 et[pdata->nb_vlan_tags + 1].mask = item_mask->inner_type;
1650 pdata->tci_masks[pdata->nb_vlan_tags] = item_mask->tci;
1651 if (item_mask->has_more_vlan) {
1652 if (pdata->nb_vlan_tags ==
1653 SFC_MAE_MATCH_VLAN_MAX_NTAGS) {
1654 return rte_flow_error_set(error, ENOTSUP,
1655 RTE_FLOW_ERROR_TYPE_ITEM, item,
1656 "Can't use 'has_more_vlan' in "
1657 "the second item VLAN");
1659 pdata->has_ivlan_mask = B_TRUE;
1660 if (item_spec->has_more_vlan)
1661 pdata->has_ivlan_value = B_TRUE;
1664 /* Convert TCI to MAE representation right now. */
1665 rc = sfc_mae_parse_item(flocs, nb_flocs, spec, mask,
1671 ++(pdata->nb_vlan_tags);
1676 static const struct sfc_mae_field_locator flocs_ipv4[] = {
1678 EFX_MAE_FIELD_SRC_IP4_BE,
1679 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv4, hdr.src_addr),
1680 offsetof(struct rte_flow_item_ipv4, hdr.src_addr),
1683 EFX_MAE_FIELD_DST_IP4_BE,
1684 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv4, hdr.dst_addr),
1685 offsetof(struct rte_flow_item_ipv4, hdr.dst_addr),
1689 * This locator is used only for building supported fields mask.
1690 * The field is handled by sfc_mae_rule_process_pattern_data().
1692 SFC_MAE_FIELD_HANDLING_DEFERRED,
1693 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv4, hdr.next_proto_id),
1694 offsetof(struct rte_flow_item_ipv4, hdr.next_proto_id),
1697 EFX_MAE_FIELD_IP_TOS,
1698 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv4,
1699 hdr.type_of_service),
1700 offsetof(struct rte_flow_item_ipv4, hdr.type_of_service),
1703 EFX_MAE_FIELD_IP_TTL,
1704 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv4, hdr.time_to_live),
1705 offsetof(struct rte_flow_item_ipv4, hdr.time_to_live),
1710 sfc_mae_rule_parse_item_ipv4(const struct rte_flow_item *item,
1711 struct sfc_flow_parse_ctx *ctx,
1712 struct rte_flow_error *error)
1714 rte_be16_t ethertype_ipv4_be = RTE_BE16(RTE_ETHER_TYPE_IPV4);
1715 struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1716 struct sfc_mae_pattern_data *pdata = &ctx_mae->pattern_data;
1717 struct rte_flow_item_ipv4 supp_mask;
1718 const uint8_t *spec = NULL;
1719 const uint8_t *mask = NULL;
1722 sfc_mae_item_build_supp_mask(flocs_ipv4, RTE_DIM(flocs_ipv4),
1723 &supp_mask, sizeof(supp_mask));
1725 rc = sfc_flow_parse_init(item,
1726 (const void **)&spec, (const void **)&mask,
1727 (const void *)&supp_mask,
1728 &rte_flow_item_ipv4_mask,
1729 sizeof(struct rte_flow_item_ipv4), error);
1733 pdata->innermost_ethertype_restriction.value = ethertype_ipv4_be;
1734 pdata->innermost_ethertype_restriction.mask = RTE_BE16(0xffff);
1737 const struct rte_flow_item_ipv4 *item_spec;
1738 const struct rte_flow_item_ipv4 *item_mask;
1740 item_spec = (const struct rte_flow_item_ipv4 *)spec;
1741 item_mask = (const struct rte_flow_item_ipv4 *)mask;
1743 pdata->l3_next_proto_value = item_spec->hdr.next_proto_id;
1744 pdata->l3_next_proto_mask = item_mask->hdr.next_proto_id;
1749 return sfc_mae_parse_item(flocs_ipv4, RTE_DIM(flocs_ipv4), spec, mask,
1753 static const struct sfc_mae_field_locator flocs_ipv6[] = {
1755 EFX_MAE_FIELD_SRC_IP6_BE,
1756 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv6, hdr.src_addr),
1757 offsetof(struct rte_flow_item_ipv6, hdr.src_addr),
1760 EFX_MAE_FIELD_DST_IP6_BE,
1761 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv6, hdr.dst_addr),
1762 offsetof(struct rte_flow_item_ipv6, hdr.dst_addr),
1766 * This locator is used only for building supported fields mask.
1767 * The field is handled by sfc_mae_rule_process_pattern_data().
1769 SFC_MAE_FIELD_HANDLING_DEFERRED,
1770 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv6, hdr.proto),
1771 offsetof(struct rte_flow_item_ipv6, hdr.proto),
1774 EFX_MAE_FIELD_IP_TTL,
1775 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv6, hdr.hop_limits),
1776 offsetof(struct rte_flow_item_ipv6, hdr.hop_limits),
1781 sfc_mae_rule_parse_item_ipv6(const struct rte_flow_item *item,
1782 struct sfc_flow_parse_ctx *ctx,
1783 struct rte_flow_error *error)
1785 rte_be16_t ethertype_ipv6_be = RTE_BE16(RTE_ETHER_TYPE_IPV6);
1786 struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1787 const efx_mae_field_id_t *fremap = ctx_mae->field_ids_remap;
1788 struct sfc_mae_pattern_data *pdata = &ctx_mae->pattern_data;
1789 struct rte_flow_item_ipv6 supp_mask;
1790 const uint8_t *spec = NULL;
1791 const uint8_t *mask = NULL;
1792 rte_be32_t vtc_flow_be;
1798 sfc_mae_item_build_supp_mask(flocs_ipv6, RTE_DIM(flocs_ipv6),
1799 &supp_mask, sizeof(supp_mask));
1801 vtc_flow_be = RTE_BE32(RTE_IPV6_HDR_TC_MASK);
1802 memcpy(&supp_mask, &vtc_flow_be, sizeof(vtc_flow_be));
1804 rc = sfc_flow_parse_init(item,
1805 (const void **)&spec, (const void **)&mask,
1806 (const void *)&supp_mask,
1807 &rte_flow_item_ipv6_mask,
1808 sizeof(struct rte_flow_item_ipv6), error);
1812 pdata->innermost_ethertype_restriction.value = ethertype_ipv6_be;
1813 pdata->innermost_ethertype_restriction.mask = RTE_BE16(0xffff);
1816 const struct rte_flow_item_ipv6 *item_spec;
1817 const struct rte_flow_item_ipv6 *item_mask;
1819 item_spec = (const struct rte_flow_item_ipv6 *)spec;
1820 item_mask = (const struct rte_flow_item_ipv6 *)mask;
1822 pdata->l3_next_proto_value = item_spec->hdr.proto;
1823 pdata->l3_next_proto_mask = item_mask->hdr.proto;
1828 rc = sfc_mae_parse_item(flocs_ipv6, RTE_DIM(flocs_ipv6), spec, mask,
1833 memcpy(&vtc_flow_be, spec, sizeof(vtc_flow_be));
1834 vtc_flow = rte_be_to_cpu_32(vtc_flow_be);
1835 tc_value = (vtc_flow & RTE_IPV6_HDR_TC_MASK) >> RTE_IPV6_HDR_TC_SHIFT;
1837 memcpy(&vtc_flow_be, mask, sizeof(vtc_flow_be));
1838 vtc_flow = rte_be_to_cpu_32(vtc_flow_be);
1839 tc_mask = (vtc_flow & RTE_IPV6_HDR_TC_MASK) >> RTE_IPV6_HDR_TC_SHIFT;
1841 rc = efx_mae_match_spec_field_set(ctx_mae->match_spec,
1842 fremap[EFX_MAE_FIELD_IP_TOS],
1843 sizeof(tc_value), &tc_value,
1844 sizeof(tc_mask), &tc_mask);
1846 return rte_flow_error_set(error, rc, RTE_FLOW_ERROR_TYPE_ITEM,
1847 NULL, "Failed to process item fields");
1853 static const struct sfc_mae_field_locator flocs_tcp[] = {
1855 EFX_MAE_FIELD_L4_SPORT_BE,
1856 RTE_SIZEOF_FIELD(struct rte_flow_item_tcp, hdr.src_port),
1857 offsetof(struct rte_flow_item_tcp, hdr.src_port),
1860 EFX_MAE_FIELD_L4_DPORT_BE,
1861 RTE_SIZEOF_FIELD(struct rte_flow_item_tcp, hdr.dst_port),
1862 offsetof(struct rte_flow_item_tcp, hdr.dst_port),
1865 EFX_MAE_FIELD_TCP_FLAGS_BE,
1867 * The values have been picked intentionally since the
1868 * target MAE field is oversize (16 bit). This mapping
1869 * relies on the fact that the MAE field is big-endian.
1871 RTE_SIZEOF_FIELD(struct rte_flow_item_tcp, hdr.data_off) +
1872 RTE_SIZEOF_FIELD(struct rte_flow_item_tcp, hdr.tcp_flags),
1873 offsetof(struct rte_flow_item_tcp, hdr.data_off),
1878 sfc_mae_rule_parse_item_tcp(const struct rte_flow_item *item,
1879 struct sfc_flow_parse_ctx *ctx,
1880 struct rte_flow_error *error)
1882 struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1883 struct sfc_mae_pattern_data *pdata = &ctx_mae->pattern_data;
1884 struct rte_flow_item_tcp supp_mask;
1885 const uint8_t *spec = NULL;
1886 const uint8_t *mask = NULL;
1890 * When encountered among outermost items, item TCP is invalid.
1891 * Check which match specification is being constructed now.
1893 if (ctx_mae->match_spec != ctx_mae->match_spec_action) {
1894 return rte_flow_error_set(error, EINVAL,
1895 RTE_FLOW_ERROR_TYPE_ITEM, item,
1896 "TCP in outer frame is invalid");
1899 sfc_mae_item_build_supp_mask(flocs_tcp, RTE_DIM(flocs_tcp),
1900 &supp_mask, sizeof(supp_mask));
1902 rc = sfc_flow_parse_init(item,
1903 (const void **)&spec, (const void **)&mask,
1904 (const void *)&supp_mask,
1905 &rte_flow_item_tcp_mask,
1906 sizeof(struct rte_flow_item_tcp), error);
1910 pdata->l3_next_proto_restriction_value = IPPROTO_TCP;
1911 pdata->l3_next_proto_restriction_mask = 0xff;
1916 return sfc_mae_parse_item(flocs_tcp, RTE_DIM(flocs_tcp), spec, mask,
1920 static const struct sfc_mae_field_locator flocs_udp[] = {
1922 EFX_MAE_FIELD_L4_SPORT_BE,
1923 RTE_SIZEOF_FIELD(struct rte_flow_item_udp, hdr.src_port),
1924 offsetof(struct rte_flow_item_udp, hdr.src_port),
1927 EFX_MAE_FIELD_L4_DPORT_BE,
1928 RTE_SIZEOF_FIELD(struct rte_flow_item_udp, hdr.dst_port),
1929 offsetof(struct rte_flow_item_udp, hdr.dst_port),
1934 sfc_mae_rule_parse_item_udp(const struct rte_flow_item *item,
1935 struct sfc_flow_parse_ctx *ctx,
1936 struct rte_flow_error *error)
1938 struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1939 struct sfc_mae_pattern_data *pdata = &ctx_mae->pattern_data;
1940 struct rte_flow_item_udp supp_mask;
1941 const uint8_t *spec = NULL;
1942 const uint8_t *mask = NULL;
1945 sfc_mae_item_build_supp_mask(flocs_udp, RTE_DIM(flocs_udp),
1946 &supp_mask, sizeof(supp_mask));
1948 rc = sfc_flow_parse_init(item,
1949 (const void **)&spec, (const void **)&mask,
1950 (const void *)&supp_mask,
1951 &rte_flow_item_udp_mask,
1952 sizeof(struct rte_flow_item_udp), error);
1956 pdata->l3_next_proto_restriction_value = IPPROTO_UDP;
1957 pdata->l3_next_proto_restriction_mask = 0xff;
1962 return sfc_mae_parse_item(flocs_udp, RTE_DIM(flocs_udp), spec, mask,
1966 static const struct sfc_mae_field_locator flocs_tunnel[] = {
1969 * The size and offset values are relevant
1970 * for Geneve and NVGRE, too.
1972 .size = RTE_SIZEOF_FIELD(struct rte_flow_item_vxlan, vni),
1973 .ofst = offsetof(struct rte_flow_item_vxlan, vni),
1978 * An auxiliary registry which allows using non-encap. field IDs
1979 * directly when building a match specification of type ACTION.
1981 * See sfc_mae_rule_parse_pattern() and sfc_mae_rule_parse_item_tunnel().
1983 static const efx_mae_field_id_t field_ids_no_remap[] = {
1984 #define FIELD_ID_NO_REMAP(_field) \
1985 [EFX_MAE_FIELD_##_field] = EFX_MAE_FIELD_##_field
1987 FIELD_ID_NO_REMAP(ETHER_TYPE_BE),
1988 FIELD_ID_NO_REMAP(ETH_SADDR_BE),
1989 FIELD_ID_NO_REMAP(ETH_DADDR_BE),
1990 FIELD_ID_NO_REMAP(VLAN0_TCI_BE),
1991 FIELD_ID_NO_REMAP(VLAN0_PROTO_BE),
1992 FIELD_ID_NO_REMAP(VLAN1_TCI_BE),
1993 FIELD_ID_NO_REMAP(VLAN1_PROTO_BE),
1994 FIELD_ID_NO_REMAP(SRC_IP4_BE),
1995 FIELD_ID_NO_REMAP(DST_IP4_BE),
1996 FIELD_ID_NO_REMAP(IP_PROTO),
1997 FIELD_ID_NO_REMAP(IP_TOS),
1998 FIELD_ID_NO_REMAP(IP_TTL),
1999 FIELD_ID_NO_REMAP(SRC_IP6_BE),
2000 FIELD_ID_NO_REMAP(DST_IP6_BE),
2001 FIELD_ID_NO_REMAP(L4_SPORT_BE),
2002 FIELD_ID_NO_REMAP(L4_DPORT_BE),
2003 FIELD_ID_NO_REMAP(TCP_FLAGS_BE),
2004 FIELD_ID_NO_REMAP(HAS_OVLAN),
2005 FIELD_ID_NO_REMAP(HAS_IVLAN),
2007 #undef FIELD_ID_NO_REMAP
2011 * An auxiliary registry which allows using "ENC" field IDs
2012 * when building a match specification of type OUTER.
2014 * See sfc_mae_rule_encap_parse_init().
2016 static const efx_mae_field_id_t field_ids_remap_to_encap[] = {
2017 #define FIELD_ID_REMAP_TO_ENCAP(_field) \
2018 [EFX_MAE_FIELD_##_field] = EFX_MAE_FIELD_ENC_##_field
2020 FIELD_ID_REMAP_TO_ENCAP(ETHER_TYPE_BE),
2021 FIELD_ID_REMAP_TO_ENCAP(ETH_SADDR_BE),
2022 FIELD_ID_REMAP_TO_ENCAP(ETH_DADDR_BE),
2023 FIELD_ID_REMAP_TO_ENCAP(VLAN0_TCI_BE),
2024 FIELD_ID_REMAP_TO_ENCAP(VLAN0_PROTO_BE),
2025 FIELD_ID_REMAP_TO_ENCAP(VLAN1_TCI_BE),
2026 FIELD_ID_REMAP_TO_ENCAP(VLAN1_PROTO_BE),
2027 FIELD_ID_REMAP_TO_ENCAP(SRC_IP4_BE),
2028 FIELD_ID_REMAP_TO_ENCAP(DST_IP4_BE),
2029 FIELD_ID_REMAP_TO_ENCAP(IP_PROTO),
2030 FIELD_ID_REMAP_TO_ENCAP(IP_TOS),
2031 FIELD_ID_REMAP_TO_ENCAP(IP_TTL),
2032 FIELD_ID_REMAP_TO_ENCAP(SRC_IP6_BE),
2033 FIELD_ID_REMAP_TO_ENCAP(DST_IP6_BE),
2034 FIELD_ID_REMAP_TO_ENCAP(L4_SPORT_BE),
2035 FIELD_ID_REMAP_TO_ENCAP(L4_DPORT_BE),
2036 FIELD_ID_REMAP_TO_ENCAP(HAS_OVLAN),
2037 FIELD_ID_REMAP_TO_ENCAP(HAS_IVLAN),
2039 #undef FIELD_ID_REMAP_TO_ENCAP
2043 sfc_mae_rule_parse_item_tunnel(const struct rte_flow_item *item,
2044 struct sfc_flow_parse_ctx *ctx,
2045 struct rte_flow_error *error)
2047 struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
2048 uint8_t vnet_id_v[sizeof(uint32_t)] = {0};
2049 uint8_t vnet_id_m[sizeof(uint32_t)] = {0};
2050 const struct rte_flow_item_vxlan *vxp;
2051 uint8_t supp_mask[sizeof(uint64_t)];
2052 const uint8_t *spec = NULL;
2053 const uint8_t *mask = NULL;
2057 * We're about to start processing inner frame items.
2058 * Process pattern data that has been deferred so far
2059 * and reset pattern data storage.
2061 rc = sfc_mae_rule_process_pattern_data(ctx_mae, error);
2065 memset(&ctx_mae->pattern_data, 0, sizeof(ctx_mae->pattern_data));
2067 sfc_mae_item_build_supp_mask(flocs_tunnel, RTE_DIM(flocs_tunnel),
2068 &supp_mask, sizeof(supp_mask));
2071 * This tunnel item was preliminarily detected by
2072 * sfc_mae_rule_encap_parse_init(). Default mask
2073 * was also picked by that helper. Use it here.
2075 rc = sfc_flow_parse_init(item,
2076 (const void **)&spec, (const void **)&mask,
2077 (const void *)&supp_mask,
2078 ctx_mae->tunnel_def_mask,
2079 ctx_mae->tunnel_def_mask_size, error);
2084 * This item and later ones comprise a
2085 * match specification of type ACTION.
2087 ctx_mae->match_spec = ctx_mae->match_spec_action;
2089 /* This item and later ones use non-encap. EFX MAE field IDs. */
2090 ctx_mae->field_ids_remap = field_ids_no_remap;
2096 * Field EFX_MAE_FIELD_ENC_VNET_ID_BE is a 32-bit one.
2097 * Copy 24-bit VNI, which is BE, at offset 1 in it.
2098 * The extra byte is 0 both in the mask and in the value.
2100 vxp = (const struct rte_flow_item_vxlan *)spec;
2101 memcpy(vnet_id_v + 1, &vxp->vni, sizeof(vxp->vni));
2103 vxp = (const struct rte_flow_item_vxlan *)mask;
2104 memcpy(vnet_id_m + 1, &vxp->vni, sizeof(vxp->vni));
2106 rc = efx_mae_match_spec_field_set(ctx_mae->match_spec,
2107 EFX_MAE_FIELD_ENC_VNET_ID_BE,
2108 sizeof(vnet_id_v), vnet_id_v,
2109 sizeof(vnet_id_m), vnet_id_m);
2111 rc = rte_flow_error_set(error, rc, RTE_FLOW_ERROR_TYPE_ITEM,
2112 item, "Failed to set VXLAN VNI");
2118 static const struct sfc_flow_item sfc_flow_items[] = {
2120 .type = RTE_FLOW_ITEM_TYPE_PORT_ID,
2123 * In terms of RTE flow, this item is a META one,
2124 * and its position in the pattern is don't care.
2126 .prev_layer = SFC_FLOW_ITEM_ANY_LAYER,
2127 .layer = SFC_FLOW_ITEM_ANY_LAYER,
2128 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2129 .parse = sfc_mae_rule_parse_item_port_id,
2132 .type = RTE_FLOW_ITEM_TYPE_PHY_PORT,
2135 * In terms of RTE flow, this item is a META one,
2136 * and its position in the pattern is don't care.
2138 .prev_layer = SFC_FLOW_ITEM_ANY_LAYER,
2139 .layer = SFC_FLOW_ITEM_ANY_LAYER,
2140 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2141 .parse = sfc_mae_rule_parse_item_phy_port,
2144 .type = RTE_FLOW_ITEM_TYPE_PF,
2147 * In terms of RTE flow, this item is a META one,
2148 * and its position in the pattern is don't care.
2150 .prev_layer = SFC_FLOW_ITEM_ANY_LAYER,
2151 .layer = SFC_FLOW_ITEM_ANY_LAYER,
2152 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2153 .parse = sfc_mae_rule_parse_item_pf,
2156 .type = RTE_FLOW_ITEM_TYPE_VF,
2159 * In terms of RTE flow, this item is a META one,
2160 * and its position in the pattern is don't care.
2162 .prev_layer = SFC_FLOW_ITEM_ANY_LAYER,
2163 .layer = SFC_FLOW_ITEM_ANY_LAYER,
2164 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2165 .parse = sfc_mae_rule_parse_item_vf,
2168 .type = RTE_FLOW_ITEM_TYPE_ETH,
2170 .prev_layer = SFC_FLOW_ITEM_START_LAYER,
2171 .layer = SFC_FLOW_ITEM_L2,
2172 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2173 .parse = sfc_mae_rule_parse_item_eth,
2176 .type = RTE_FLOW_ITEM_TYPE_VLAN,
2178 .prev_layer = SFC_FLOW_ITEM_L2,
2179 .layer = SFC_FLOW_ITEM_L2,
2180 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2181 .parse = sfc_mae_rule_parse_item_vlan,
2184 .type = RTE_FLOW_ITEM_TYPE_IPV4,
2186 .prev_layer = SFC_FLOW_ITEM_L2,
2187 .layer = SFC_FLOW_ITEM_L3,
2188 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2189 .parse = sfc_mae_rule_parse_item_ipv4,
2192 .type = RTE_FLOW_ITEM_TYPE_IPV6,
2194 .prev_layer = SFC_FLOW_ITEM_L2,
2195 .layer = SFC_FLOW_ITEM_L3,
2196 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2197 .parse = sfc_mae_rule_parse_item_ipv6,
2200 .type = RTE_FLOW_ITEM_TYPE_TCP,
2202 .prev_layer = SFC_FLOW_ITEM_L3,
2203 .layer = SFC_FLOW_ITEM_L4,
2204 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2205 .parse = sfc_mae_rule_parse_item_tcp,
2208 .type = RTE_FLOW_ITEM_TYPE_UDP,
2210 .prev_layer = SFC_FLOW_ITEM_L3,
2211 .layer = SFC_FLOW_ITEM_L4,
2212 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2213 .parse = sfc_mae_rule_parse_item_udp,
2216 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
2218 .prev_layer = SFC_FLOW_ITEM_L4,
2219 .layer = SFC_FLOW_ITEM_START_LAYER,
2220 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2221 .parse = sfc_mae_rule_parse_item_tunnel,
2224 .type = RTE_FLOW_ITEM_TYPE_GENEVE,
2226 .prev_layer = SFC_FLOW_ITEM_L4,
2227 .layer = SFC_FLOW_ITEM_START_LAYER,
2228 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2229 .parse = sfc_mae_rule_parse_item_tunnel,
2232 .type = RTE_FLOW_ITEM_TYPE_NVGRE,
2234 .prev_layer = SFC_FLOW_ITEM_L3,
2235 .layer = SFC_FLOW_ITEM_START_LAYER,
2236 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2237 .parse = sfc_mae_rule_parse_item_tunnel,
2242 sfc_mae_rule_process_outer(struct sfc_adapter *sa,
2243 struct sfc_mae_parse_ctx *ctx,
2244 struct sfc_mae_outer_rule **rulep,
2245 struct rte_flow_error *error)
2247 efx_mae_rule_id_t invalid_rule_id = { .id = EFX_MAE_RSRC_ID_INVALID };
2250 if (ctx->encap_type == EFX_TUNNEL_PROTOCOL_NONE) {
2255 SFC_ASSERT(ctx->match_spec_outer != NULL);
2257 if (!efx_mae_match_spec_is_valid(sa->nic, ctx->match_spec_outer)) {
2258 return rte_flow_error_set(error, ENOTSUP,
2259 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2260 "Inconsistent pattern (outer)");
2263 *rulep = sfc_mae_outer_rule_attach(sa, ctx->match_spec_outer,
2265 if (*rulep != NULL) {
2266 efx_mae_match_spec_fini(sa->nic, ctx->match_spec_outer);
2268 rc = sfc_mae_outer_rule_add(sa, ctx->match_spec_outer,
2269 ctx->encap_type, rulep);
2271 return rte_flow_error_set(error, rc,
2272 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2273 "Failed to process the pattern");
2277 /* The spec has now been tracked by the outer rule entry. */
2278 ctx->match_spec_outer = NULL;
2282 * In MAE, lookup sequence comprises outer parse, outer rule lookup,
2283 * inner parse (when some outer rule is hit) and action rule lookup.
2284 * If the currently processed flow does not come with an outer rule,
2285 * its action rule must be available only for packets which miss in
2286 * outer rule table. Set OR_ID match field to 0xffffffff/0xffffffff
2287 * in the action rule specification; this ensures correct behaviour.
2289 * If, on the other hand, this flow does have an outer rule, its ID
2290 * may be unknown at the moment (not yet allocated), but OR_ID mask
2291 * has to be set to 0xffffffff anyway for correct class comparisons.
2292 * When the outer rule has been allocated, this match field will be
2293 * overridden by sfc_mae_outer_rule_enable() to use the right value.
2295 rc = efx_mae_match_spec_outer_rule_id_set(ctx->match_spec_action,
2299 sfc_mae_outer_rule_del(sa, *rulep);
2303 return rte_flow_error_set(error, rc,
2304 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2305 "Failed to process the pattern");
2312 sfc_mae_rule_encap_parse_init(struct sfc_adapter *sa,
2313 const struct rte_flow_item pattern[],
2314 struct sfc_mae_parse_ctx *ctx,
2315 struct rte_flow_error *error)
2317 struct sfc_mae *mae = &sa->mae;
2320 if (pattern == NULL) {
2321 rte_flow_error_set(error, EINVAL,
2322 RTE_FLOW_ERROR_TYPE_ITEM_NUM, NULL,
2328 switch (pattern->type) {
2329 case RTE_FLOW_ITEM_TYPE_VXLAN:
2330 ctx->encap_type = EFX_TUNNEL_PROTOCOL_VXLAN;
2331 ctx->tunnel_def_mask = &rte_flow_item_vxlan_mask;
2332 ctx->tunnel_def_mask_size =
2333 sizeof(rte_flow_item_vxlan_mask);
2335 case RTE_FLOW_ITEM_TYPE_GENEVE:
2336 ctx->encap_type = EFX_TUNNEL_PROTOCOL_GENEVE;
2337 ctx->tunnel_def_mask = &rte_flow_item_geneve_mask;
2338 ctx->tunnel_def_mask_size =
2339 sizeof(rte_flow_item_geneve_mask);
2341 case RTE_FLOW_ITEM_TYPE_NVGRE:
2342 ctx->encap_type = EFX_TUNNEL_PROTOCOL_NVGRE;
2343 ctx->tunnel_def_mask = &rte_flow_item_nvgre_mask;
2344 ctx->tunnel_def_mask_size =
2345 sizeof(rte_flow_item_nvgre_mask);
2347 case RTE_FLOW_ITEM_TYPE_END:
2357 if (pattern->type == RTE_FLOW_ITEM_TYPE_END)
2360 if ((mae->encap_types_supported & (1U << ctx->encap_type)) == 0) {
2361 return rte_flow_error_set(error, ENOTSUP,
2362 RTE_FLOW_ERROR_TYPE_ITEM,
2363 pattern, "Unsupported tunnel item");
2366 if (ctx->priority >= mae->nb_outer_rule_prios_max) {
2367 return rte_flow_error_set(error, ENOTSUP,
2368 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
2369 NULL, "Unsupported priority level");
2372 rc = efx_mae_match_spec_init(sa->nic, EFX_MAE_RULE_OUTER, ctx->priority,
2373 &ctx->match_spec_outer);
2375 return rte_flow_error_set(error, rc,
2376 RTE_FLOW_ERROR_TYPE_ITEM, pattern,
2377 "Failed to initialise outer rule match specification");
2380 /* Outermost items comprise a match specification of type OUTER. */
2381 ctx->match_spec = ctx->match_spec_outer;
2383 /* Outermost items use "ENC" EFX MAE field IDs. */
2384 ctx->field_ids_remap = field_ids_remap_to_encap;
2390 sfc_mae_rule_encap_parse_fini(struct sfc_adapter *sa,
2391 struct sfc_mae_parse_ctx *ctx)
2393 if (ctx->encap_type == EFX_TUNNEL_PROTOCOL_NONE)
2396 if (ctx->match_spec_outer != NULL)
2397 efx_mae_match_spec_fini(sa->nic, ctx->match_spec_outer);
2401 sfc_mae_rule_parse_pattern(struct sfc_adapter *sa,
2402 const struct rte_flow_item pattern[],
2403 struct sfc_flow_spec_mae *spec,
2404 struct rte_flow_error *error)
2406 struct sfc_mae_parse_ctx ctx_mae;
2407 struct sfc_flow_parse_ctx ctx;
2410 memset(&ctx_mae, 0, sizeof(ctx_mae));
2411 ctx_mae.priority = spec->priority;
2414 rc = efx_mae_match_spec_init(sa->nic, EFX_MAE_RULE_ACTION,
2416 &ctx_mae.match_spec_action);
2418 rc = rte_flow_error_set(error, rc,
2419 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2420 "Failed to initialise action rule match specification");
2421 goto fail_init_match_spec_action;
2425 * As a preliminary setting, assume that there is no encapsulation
2426 * in the pattern. That is, pattern items are about to comprise a
2427 * match specification of type ACTION and use non-encap. field IDs.
2429 * sfc_mae_rule_encap_parse_init() below may override this.
2431 ctx_mae.encap_type = EFX_TUNNEL_PROTOCOL_NONE;
2432 ctx_mae.match_spec = ctx_mae.match_spec_action;
2433 ctx_mae.field_ids_remap = field_ids_no_remap;
2435 ctx.type = SFC_FLOW_PARSE_CTX_MAE;
2438 rc = sfc_mae_rule_encap_parse_init(sa, pattern, &ctx_mae, error);
2440 goto fail_encap_parse_init;
2442 rc = sfc_flow_parse_pattern(sa, sfc_flow_items, RTE_DIM(sfc_flow_items),
2443 pattern, &ctx, error);
2445 goto fail_parse_pattern;
2447 rc = sfc_mae_rule_process_pattern_data(&ctx_mae, error);
2449 goto fail_process_pattern_data;
2451 rc = sfc_mae_rule_process_outer(sa, &ctx_mae, &spec->outer_rule, error);
2453 goto fail_process_outer;
2455 if (!efx_mae_match_spec_is_valid(sa->nic, ctx_mae.match_spec_action)) {
2456 rc = rte_flow_error_set(error, ENOTSUP,
2457 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2458 "Inconsistent pattern");
2459 goto fail_validate_match_spec_action;
2462 spec->match_spec = ctx_mae.match_spec_action;
2466 fail_validate_match_spec_action:
2468 fail_process_pattern_data:
2470 sfc_mae_rule_encap_parse_fini(sa, &ctx_mae);
2472 fail_encap_parse_init:
2473 efx_mae_match_spec_fini(sa->nic, ctx_mae.match_spec_action);
2475 fail_init_match_spec_action:
2480 * An action supported by MAE may correspond to a bundle of RTE flow actions,
2481 * in example, VLAN_PUSH = OF_PUSH_VLAN + OF_VLAN_SET_VID + OF_VLAN_SET_PCP.
2482 * That is, related RTE flow actions need to be tracked as parts of a whole
2483 * so that they can be combined into a single action and submitted to MAE
2484 * representation of a given rule's action set.
2486 * Each RTE flow action provided by an application gets classified as
2487 * one belonging to some bundle type. If an action is not supposed to
2488 * belong to any bundle, or if this action is END, it is described as
2489 * one belonging to a dummy bundle of type EMPTY.
2491 * A currently tracked bundle will be submitted if a repeating
2492 * action or an action of different bundle type follows.
2495 enum sfc_mae_actions_bundle_type {
2496 SFC_MAE_ACTIONS_BUNDLE_EMPTY = 0,
2497 SFC_MAE_ACTIONS_BUNDLE_VLAN_PUSH,
2500 struct sfc_mae_actions_bundle {
2501 enum sfc_mae_actions_bundle_type type;
2503 /* Indicates actions already tracked by the current bundle */
2504 uint64_t actions_mask;
2506 /* Parameters used by SFC_MAE_ACTIONS_BUNDLE_VLAN_PUSH */
2507 rte_be16_t vlan_push_tpid;
2508 rte_be16_t vlan_push_tci;
2512 * Combine configuration of RTE flow actions tracked by the bundle into a
2513 * single action and submit the result to MAE action set specification.
2514 * Do nothing in the case of dummy action bundle.
2517 sfc_mae_actions_bundle_submit(const struct sfc_mae_actions_bundle *bundle,
2518 efx_mae_actions_t *spec)
2522 switch (bundle->type) {
2523 case SFC_MAE_ACTIONS_BUNDLE_EMPTY:
2525 case SFC_MAE_ACTIONS_BUNDLE_VLAN_PUSH:
2526 rc = efx_mae_action_set_populate_vlan_push(
2527 spec, bundle->vlan_push_tpid, bundle->vlan_push_tci);
2530 SFC_ASSERT(B_FALSE);
2538 * Given the type of the next RTE flow action in the line, decide
2539 * whether a new bundle is about to start, and, if this is the case,
2540 * submit and reset the current bundle.
2543 sfc_mae_actions_bundle_sync(const struct rte_flow_action *action,
2544 struct sfc_mae_actions_bundle *bundle,
2545 efx_mae_actions_t *spec,
2546 struct rte_flow_error *error)
2548 enum sfc_mae_actions_bundle_type bundle_type_new;
2551 switch (action->type) {
2552 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
2553 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
2554 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
2555 bundle_type_new = SFC_MAE_ACTIONS_BUNDLE_VLAN_PUSH;
2559 * Self-sufficient actions, including END, are handled in this
2560 * case. No checks for unsupported actions are needed here
2561 * because parsing doesn't occur at this point.
2563 bundle_type_new = SFC_MAE_ACTIONS_BUNDLE_EMPTY;
2567 if (bundle_type_new != bundle->type ||
2568 (bundle->actions_mask & (1ULL << action->type)) != 0) {
2569 rc = sfc_mae_actions_bundle_submit(bundle, spec);
2573 memset(bundle, 0, sizeof(*bundle));
2576 bundle->type = bundle_type_new;
2581 return rte_flow_error_set(error, rc,
2582 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2583 "Failed to request the (group of) action(s)");
2587 sfc_mae_rule_parse_action_of_push_vlan(
2588 const struct rte_flow_action_of_push_vlan *conf,
2589 struct sfc_mae_actions_bundle *bundle)
2591 bundle->vlan_push_tpid = conf->ethertype;
2595 sfc_mae_rule_parse_action_of_set_vlan_vid(
2596 const struct rte_flow_action_of_set_vlan_vid *conf,
2597 struct sfc_mae_actions_bundle *bundle)
2599 bundle->vlan_push_tci |= (conf->vlan_vid &
2600 rte_cpu_to_be_16(RTE_LEN2MASK(12, uint16_t)));
2604 sfc_mae_rule_parse_action_of_set_vlan_pcp(
2605 const struct rte_flow_action_of_set_vlan_pcp *conf,
2606 struct sfc_mae_actions_bundle *bundle)
2608 uint16_t vlan_tci_pcp = (uint16_t)(conf->vlan_pcp &
2609 RTE_LEN2MASK(3, uint8_t)) << 13;
2611 bundle->vlan_push_tci |= rte_cpu_to_be_16(vlan_tci_pcp);
2614 struct sfc_mae_parsed_item {
2615 const struct rte_flow_item *item;
2616 size_t proto_header_ofst;
2617 size_t proto_header_size;
2621 * For each 16-bit word of the given header, override
2622 * bits enforced by the corresponding 16-bit mask.
2625 sfc_mae_header_force_item_masks(uint8_t *header_buf,
2626 const struct sfc_mae_parsed_item *parsed_items,
2627 unsigned int nb_parsed_items)
2629 unsigned int item_idx;
2631 for (item_idx = 0; item_idx < nb_parsed_items; ++item_idx) {
2632 const struct sfc_mae_parsed_item *parsed_item;
2633 const struct rte_flow_item *item;
2634 size_t proto_header_size;
2637 parsed_item = &parsed_items[item_idx];
2638 proto_header_size = parsed_item->proto_header_size;
2639 item = parsed_item->item;
2641 for (ofst = 0; ofst < proto_header_size;
2642 ofst += sizeof(rte_be16_t)) {
2643 rte_be16_t *wp = RTE_PTR_ADD(header_buf, ofst);
2644 const rte_be16_t *w_maskp;
2645 const rte_be16_t *w_specp;
2647 w_maskp = RTE_PTR_ADD(item->mask, ofst);
2648 w_specp = RTE_PTR_ADD(item->spec, ofst);
2651 *wp |= (*w_specp & *w_maskp);
2654 header_buf += proto_header_size;
2658 #define SFC_IPV4_TTL_DEF 0x40
2659 #define SFC_IPV6_VTC_FLOW_DEF 0x60000000
2660 #define SFC_IPV6_HOP_LIMITS_DEF 0xff
2661 #define SFC_VXLAN_FLAGS_DEF 0x08000000
2664 sfc_mae_rule_parse_action_vxlan_encap(
2665 struct sfc_mae *mae,
2666 const struct rte_flow_action_vxlan_encap *conf,
2667 efx_mae_actions_t *spec,
2668 struct rte_flow_error *error)
2670 struct sfc_mae_bounce_eh *bounce_eh = &mae->bounce_eh;
2671 struct rte_flow_item *pattern = conf->definition;
2672 uint8_t *buf = bounce_eh->buf;
2674 /* This array will keep track of non-VOID pattern items. */
2675 struct sfc_mae_parsed_item parsed_items[1 /* Ethernet */ +
2677 1 /* IPv4 or IPv6 */ +
2680 unsigned int nb_parsed_items = 0;
2682 size_t eth_ethertype_ofst = offsetof(struct rte_ether_hdr, ether_type);
2683 uint8_t dummy_buf[RTE_MAX(sizeof(struct rte_ipv4_hdr),
2684 sizeof(struct rte_ipv6_hdr))];
2685 struct rte_ipv4_hdr *ipv4 = (void *)dummy_buf;
2686 struct rte_ipv6_hdr *ipv6 = (void *)dummy_buf;
2687 struct rte_vxlan_hdr *vxlan = NULL;
2688 struct rte_udp_hdr *udp = NULL;
2689 unsigned int nb_vlan_tags = 0;
2690 size_t next_proto_ofst = 0;
2691 size_t ethertype_ofst = 0;
2695 if (pattern == NULL) {
2696 return rte_flow_error_set(error, EINVAL,
2697 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2698 "The encap. header definition is NULL");
2701 bounce_eh->type = EFX_TUNNEL_PROTOCOL_VXLAN;
2702 bounce_eh->size = 0;
2705 * Process pattern items and remember non-VOID ones.
2706 * Defer applying masks until after the complete header
2707 * has been built from the pattern items.
2709 exp_items = RTE_BIT64(RTE_FLOW_ITEM_TYPE_ETH);
2711 for (; pattern->type != RTE_FLOW_ITEM_TYPE_END; ++pattern) {
2712 struct sfc_mae_parsed_item *parsed_item;
2713 const uint64_t exp_items_extra_vlan[] = {
2714 RTE_BIT64(RTE_FLOW_ITEM_TYPE_VLAN), 0
2716 size_t proto_header_size;
2717 rte_be16_t *ethertypep;
2718 uint8_t *next_protop;
2721 if (pattern->spec == NULL) {
2722 return rte_flow_error_set(error, EINVAL,
2723 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2724 "NULL item spec in the encap. header");
2727 if (pattern->mask == NULL) {
2728 return rte_flow_error_set(error, EINVAL,
2729 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2730 "NULL item mask in the encap. header");
2733 if (pattern->last != NULL) {
2734 /* This is not a match pattern, so disallow range. */
2735 return rte_flow_error_set(error, EINVAL,
2736 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2737 "Range item in the encap. header");
2740 if (pattern->type == RTE_FLOW_ITEM_TYPE_VOID) {
2741 /* Handle VOID separately, for clarity. */
2745 if ((exp_items & RTE_BIT64(pattern->type)) == 0) {
2746 return rte_flow_error_set(error, ENOTSUP,
2747 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2748 "Unexpected item in the encap. header");
2751 parsed_item = &parsed_items[nb_parsed_items];
2752 buf_cur = buf + bounce_eh->size;
2754 switch (pattern->type) {
2755 case RTE_FLOW_ITEM_TYPE_ETH:
2756 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ITEM_TYPE_ETH,
2758 RTE_BUILD_BUG_ON(offsetof(struct rte_flow_item_eth,
2761 proto_header_size = sizeof(struct rte_ether_hdr);
2763 ethertype_ofst = eth_ethertype_ofst;
2765 exp_items = RTE_BIT64(RTE_FLOW_ITEM_TYPE_VLAN) |
2766 RTE_BIT64(RTE_FLOW_ITEM_TYPE_IPV4) |
2767 RTE_BIT64(RTE_FLOW_ITEM_TYPE_IPV6);
2769 case RTE_FLOW_ITEM_TYPE_VLAN:
2770 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ITEM_TYPE_VLAN,
2772 RTE_BUILD_BUG_ON(offsetof(struct rte_flow_item_vlan,
2775 proto_header_size = sizeof(struct rte_vlan_hdr);
2777 ethertypep = RTE_PTR_ADD(buf, eth_ethertype_ofst);
2778 *ethertypep = RTE_BE16(RTE_ETHER_TYPE_QINQ);
2780 ethertypep = RTE_PTR_ADD(buf, ethertype_ofst);
2781 *ethertypep = RTE_BE16(RTE_ETHER_TYPE_VLAN);
2785 offsetof(struct rte_vlan_hdr, eth_proto);
2787 exp_items = RTE_BIT64(RTE_FLOW_ITEM_TYPE_IPV4) |
2788 RTE_BIT64(RTE_FLOW_ITEM_TYPE_IPV6);
2789 exp_items |= exp_items_extra_vlan[nb_vlan_tags];
2793 case RTE_FLOW_ITEM_TYPE_IPV4:
2794 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ITEM_TYPE_IPV4,
2796 RTE_BUILD_BUG_ON(offsetof(struct rte_flow_item_ipv4,
2799 proto_header_size = sizeof(struct rte_ipv4_hdr);
2801 ethertypep = RTE_PTR_ADD(buf, ethertype_ofst);
2802 *ethertypep = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2806 offsetof(struct rte_ipv4_hdr, next_proto_id);
2808 ipv4 = (struct rte_ipv4_hdr *)buf_cur;
2810 exp_items = RTE_BIT64(RTE_FLOW_ITEM_TYPE_UDP);
2812 case RTE_FLOW_ITEM_TYPE_IPV6:
2813 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ITEM_TYPE_IPV6,
2815 RTE_BUILD_BUG_ON(offsetof(struct rte_flow_item_ipv6,
2818 proto_header_size = sizeof(struct rte_ipv6_hdr);
2820 ethertypep = RTE_PTR_ADD(buf, ethertype_ofst);
2821 *ethertypep = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2823 next_proto_ofst = bounce_eh->size +
2824 offsetof(struct rte_ipv6_hdr, proto);
2826 ipv6 = (struct rte_ipv6_hdr *)buf_cur;
2828 exp_items = RTE_BIT64(RTE_FLOW_ITEM_TYPE_UDP);
2830 case RTE_FLOW_ITEM_TYPE_UDP:
2831 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ITEM_TYPE_UDP,
2833 RTE_BUILD_BUG_ON(offsetof(struct rte_flow_item_udp,
2836 proto_header_size = sizeof(struct rte_udp_hdr);
2838 next_protop = RTE_PTR_ADD(buf, next_proto_ofst);
2839 *next_protop = IPPROTO_UDP;
2841 udp = (struct rte_udp_hdr *)buf_cur;
2843 exp_items = RTE_BIT64(RTE_FLOW_ITEM_TYPE_VXLAN);
2845 case RTE_FLOW_ITEM_TYPE_VXLAN:
2846 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ITEM_TYPE_VXLAN,
2848 RTE_BUILD_BUG_ON(offsetof(struct rte_flow_item_vxlan,
2851 proto_header_size = sizeof(struct rte_vxlan_hdr);
2853 vxlan = (struct rte_vxlan_hdr *)buf_cur;
2855 udp->dst_port = RTE_BE16(RTE_VXLAN_DEFAULT_PORT);
2856 udp->dgram_len = RTE_BE16(sizeof(*udp) +
2858 udp->dgram_cksum = 0;
2863 return rte_flow_error_set(error, ENOTSUP,
2864 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2865 "Unknown item in the encap. header");
2868 if (bounce_eh->size + proto_header_size > bounce_eh->buf_size) {
2869 return rte_flow_error_set(error, E2BIG,
2870 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2871 "The encap. header is too big");
2874 if ((proto_header_size & 1) != 0) {
2875 return rte_flow_error_set(error, EINVAL,
2876 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2877 "Odd layer size in the encap. header");
2880 rte_memcpy(buf_cur, pattern->spec, proto_header_size);
2881 bounce_eh->size += proto_header_size;
2883 parsed_item->item = pattern;
2884 parsed_item->proto_header_size = proto_header_size;
2888 if (exp_items != 0) {
2889 /* Parsing item VXLAN would have reset exp_items to 0. */
2890 return rte_flow_error_set(error, ENOTSUP,
2891 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2892 "No item VXLAN in the encap. header");
2895 /* One of the pointers (ipv4, ipv6) refers to a dummy area. */
2896 ipv4->version_ihl = RTE_IPV4_VHL_DEF;
2897 ipv4->time_to_live = SFC_IPV4_TTL_DEF;
2898 ipv4->total_length = RTE_BE16(sizeof(*ipv4) + sizeof(*udp) +
2900 /* The HW cannot compute this checksum. */
2901 ipv4->hdr_checksum = 0;
2902 ipv4->hdr_checksum = rte_ipv4_cksum(ipv4);
2904 ipv6->vtc_flow = RTE_BE32(SFC_IPV6_VTC_FLOW_DEF);
2905 ipv6->hop_limits = SFC_IPV6_HOP_LIMITS_DEF;
2906 ipv6->payload_len = udp->dgram_len;
2908 vxlan->vx_flags = RTE_BE32(SFC_VXLAN_FLAGS_DEF);
2910 /* Take care of the masks. */
2911 sfc_mae_header_force_item_masks(buf, parsed_items, nb_parsed_items);
2913 rc = efx_mae_action_set_populate_encap(spec);
2915 rc = rte_flow_error_set(error, rc, RTE_FLOW_ERROR_TYPE_ACTION,
2916 NULL, "failed to request action ENCAP");
2923 sfc_mae_rule_parse_action_mark(struct sfc_adapter *sa,
2924 const struct rte_flow_action_mark *conf,
2925 efx_mae_actions_t *spec)
2929 rc = efx_mae_action_set_populate_mark(spec, conf->id);
2931 sfc_err(sa, "failed to request action MARK: %s", strerror(rc));
2937 sfc_mae_rule_parse_action_count(struct sfc_adapter *sa,
2938 const struct rte_flow_action_count *conf,
2939 efx_mae_actions_t *spec)
2945 goto fail_counter_shared;
2948 if ((sa->counter_rxq.state & SFC_COUNTER_RXQ_INITIALIZED) == 0) {
2950 "counter queue is not configured for COUNT action");
2952 goto fail_counter_queue_uninit;
2955 if (sfc_get_service_lcore(SOCKET_ID_ANY) == RTE_MAX_LCORE) {
2957 goto fail_no_service_core;
2960 rc = efx_mae_action_set_populate_count(spec);
2963 "failed to populate counters in MAE action set: %s",
2965 goto fail_populate_count;
2970 fail_populate_count:
2971 fail_no_service_core:
2972 fail_counter_queue_uninit:
2973 fail_counter_shared:
2979 sfc_mae_rule_parse_action_phy_port(struct sfc_adapter *sa,
2980 const struct rte_flow_action_phy_port *conf,
2981 efx_mae_actions_t *spec)
2983 efx_mport_sel_t mport;
2987 if (conf->original != 0)
2988 phy_port = efx_nic_cfg_get(sa->nic)->enc_assigned_port;
2990 phy_port = conf->index;
2992 rc = efx_mae_mport_by_phy_port(phy_port, &mport);
2994 sfc_err(sa, "failed to convert phys. port ID %u to m-port selector: %s",
2995 phy_port, strerror(rc));
2999 rc = efx_mae_action_set_populate_deliver(spec, &mport);
3001 sfc_err(sa, "failed to request action DELIVER with m-port selector 0x%08x: %s",
3002 mport.sel, strerror(rc));
3009 sfc_mae_rule_parse_action_pf_vf(struct sfc_adapter *sa,
3010 const struct rte_flow_action_vf *vf_conf,
3011 efx_mae_actions_t *spec)
3013 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
3014 efx_mport_sel_t mport;
3018 if (vf_conf == NULL)
3019 vf = EFX_PCI_VF_INVALID;
3020 else if (vf_conf->original != 0)
3025 rc = efx_mae_mport_by_pcie_function(encp->enc_pf, vf, &mport);
3027 sfc_err(sa, "failed to convert PF %u VF %d to m-port: %s",
3028 encp->enc_pf, (vf != EFX_PCI_VF_INVALID) ? (int)vf : -1,
3033 rc = efx_mae_action_set_populate_deliver(spec, &mport);
3035 sfc_err(sa, "failed to request action DELIVER with m-port selector 0x%08x: %s",
3036 mport.sel, strerror(rc));
3043 sfc_mae_rule_parse_action_port_id(struct sfc_adapter *sa,
3044 const struct rte_flow_action_port_id *conf,
3045 efx_mae_actions_t *spec)
3047 struct sfc_adapter_shared * const sas = sfc_sa2shared(sa);
3048 struct sfc_mae *mae = &sa->mae;
3049 efx_mport_sel_t mport;
3053 if (conf->id > UINT16_MAX)
3056 port_id = (conf->original != 0) ? sas->port_id : conf->id;
3058 rc = sfc_mae_switch_port_by_ethdev(mae->switch_domain_id,
3061 sfc_err(sa, "failed to find MAE switch port SW entry for RTE ethdev port %u: %s",
3062 port_id, strerror(rc));
3066 rc = efx_mae_action_set_populate_deliver(spec, &mport);
3068 sfc_err(sa, "failed to request action DELIVER with m-port selector 0x%08x: %s",
3069 mport.sel, strerror(rc));
3075 static const char * const action_names[] = {
3076 [RTE_FLOW_ACTION_TYPE_VXLAN_DECAP] = "VXLAN_DECAP",
3077 [RTE_FLOW_ACTION_TYPE_OF_POP_VLAN] = "OF_POP_VLAN",
3078 [RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN] = "OF_PUSH_VLAN",
3079 [RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID] = "OF_SET_VLAN_VID",
3080 [RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP] = "OF_SET_VLAN_PCP",
3081 [RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP] = "VXLAN_ENCAP",
3082 [RTE_FLOW_ACTION_TYPE_FLAG] = "FLAG",
3083 [RTE_FLOW_ACTION_TYPE_MARK] = "MARK",
3084 [RTE_FLOW_ACTION_TYPE_PHY_PORT] = "PHY_PORT",
3085 [RTE_FLOW_ACTION_TYPE_PF] = "PF",
3086 [RTE_FLOW_ACTION_TYPE_VF] = "VF",
3087 [RTE_FLOW_ACTION_TYPE_PORT_ID] = "PORT_ID",
3088 [RTE_FLOW_ACTION_TYPE_DROP] = "DROP",
3092 sfc_mae_rule_parse_action(struct sfc_adapter *sa,
3093 const struct rte_flow_action *action,
3094 const struct sfc_mae_outer_rule *outer_rule,
3095 struct sfc_mae_actions_bundle *bundle,
3096 efx_mae_actions_t *spec,
3097 struct rte_flow_error *error)
3099 bool custom_error = B_FALSE;
3102 switch (action->type) {
3103 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
3104 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_VXLAN_DECAP,
3105 bundle->actions_mask);
3106 if (outer_rule == NULL ||
3107 outer_rule->encap_type != EFX_TUNNEL_PROTOCOL_VXLAN)
3110 rc = efx_mae_action_set_populate_decap(spec);
3112 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
3113 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_OF_POP_VLAN,
3114 bundle->actions_mask);
3115 rc = efx_mae_action_set_populate_vlan_pop(spec);
3117 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3118 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN,
3119 bundle->actions_mask);
3120 sfc_mae_rule_parse_action_of_push_vlan(action->conf, bundle);
3122 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3123 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID,
3124 bundle->actions_mask);
3125 sfc_mae_rule_parse_action_of_set_vlan_vid(action->conf, bundle);
3127 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
3128 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP,
3129 bundle->actions_mask);
3130 sfc_mae_rule_parse_action_of_set_vlan_pcp(action->conf, bundle);
3132 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3133 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP,
3134 bundle->actions_mask);
3135 rc = sfc_mae_rule_parse_action_vxlan_encap(&sa->mae,
3138 custom_error = B_TRUE;
3140 case RTE_FLOW_ACTION_TYPE_COUNT:
3141 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_COUNT,
3142 bundle->actions_mask);
3143 rc = sfc_mae_rule_parse_action_count(sa, action->conf, spec);
3145 case RTE_FLOW_ACTION_TYPE_FLAG:
3146 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_FLAG,
3147 bundle->actions_mask);
3148 rc = efx_mae_action_set_populate_flag(spec);
3150 case RTE_FLOW_ACTION_TYPE_MARK:
3151 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_MARK,
3152 bundle->actions_mask);
3153 rc = sfc_mae_rule_parse_action_mark(sa, action->conf, spec);
3155 case RTE_FLOW_ACTION_TYPE_PHY_PORT:
3156 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_PHY_PORT,
3157 bundle->actions_mask);
3158 rc = sfc_mae_rule_parse_action_phy_port(sa, action->conf, spec);
3160 case RTE_FLOW_ACTION_TYPE_PF:
3161 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_PF,
3162 bundle->actions_mask);
3163 rc = sfc_mae_rule_parse_action_pf_vf(sa, NULL, spec);
3165 case RTE_FLOW_ACTION_TYPE_VF:
3166 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_VF,
3167 bundle->actions_mask);
3168 rc = sfc_mae_rule_parse_action_pf_vf(sa, action->conf, spec);
3170 case RTE_FLOW_ACTION_TYPE_PORT_ID:
3171 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_PORT_ID,
3172 bundle->actions_mask);
3173 rc = sfc_mae_rule_parse_action_port_id(sa, action->conf, spec);
3175 case RTE_FLOW_ACTION_TYPE_DROP:
3176 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_DROP,
3177 bundle->actions_mask);
3178 rc = efx_mae_action_set_populate_drop(spec);
3181 return rte_flow_error_set(error, ENOTSUP,
3182 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3183 "Unsupported action");
3187 bundle->actions_mask |= (1ULL << action->type);
3188 } else if (!custom_error) {
3189 if (action->type < RTE_DIM(action_names)) {
3190 const char *action_name = action_names[action->type];
3192 if (action_name != NULL) {
3193 sfc_err(sa, "action %s was rejected: %s",
3194 action_name, strerror(rc));
3197 rc = rte_flow_error_set(error, rc, RTE_FLOW_ERROR_TYPE_ACTION,
3198 NULL, "Failed to request the action");
3205 sfc_mae_bounce_eh_invalidate(struct sfc_mae_bounce_eh *bounce_eh)
3207 bounce_eh->type = EFX_TUNNEL_PROTOCOL_NONE;
3211 sfc_mae_process_encap_header(struct sfc_adapter *sa,
3212 const struct sfc_mae_bounce_eh *bounce_eh,
3213 struct sfc_mae_encap_header **encap_headerp)
3215 if (bounce_eh->type == EFX_TUNNEL_PROTOCOL_NONE) {
3216 encap_headerp = NULL;
3220 *encap_headerp = sfc_mae_encap_header_attach(sa, bounce_eh);
3221 if (*encap_headerp != NULL)
3224 return sfc_mae_encap_header_add(sa, bounce_eh, encap_headerp);
3228 sfc_mae_rule_parse_actions(struct sfc_adapter *sa,
3229 const struct rte_flow_action actions[],
3230 struct sfc_flow_spec_mae *spec_mae,
3231 struct rte_flow_error *error)
3233 struct sfc_mae_encap_header *encap_header = NULL;
3234 struct sfc_mae_actions_bundle bundle = {0};
3235 const struct rte_flow_action *action;
3236 struct sfc_mae *mae = &sa->mae;
3237 efx_mae_actions_t *spec;
3238 unsigned int n_count;
3243 if (actions == NULL) {
3244 return rte_flow_error_set(error, EINVAL,
3245 RTE_FLOW_ERROR_TYPE_ACTION_NUM, NULL,
3249 rc = efx_mae_action_set_spec_init(sa->nic, &spec);
3251 goto fail_action_set_spec_init;
3253 /* Cleanup after previous encap. header bounce buffer usage. */
3254 sfc_mae_bounce_eh_invalidate(&mae->bounce_eh);
3256 for (action = actions;
3257 action->type != RTE_FLOW_ACTION_TYPE_END; ++action) {
3258 rc = sfc_mae_actions_bundle_sync(action, &bundle, spec, error);
3260 goto fail_rule_parse_action;
3262 rc = sfc_mae_rule_parse_action(sa, action, spec_mae->outer_rule,
3263 &bundle, spec, error);
3265 goto fail_rule_parse_action;
3268 rc = sfc_mae_actions_bundle_sync(action, &bundle, spec, error);
3270 goto fail_rule_parse_action;
3272 rc = sfc_mae_process_encap_header(sa, &mae->bounce_eh, &encap_header);
3274 goto fail_process_encap_header;
3276 n_count = efx_mae_action_set_get_nb_count(spec);
3279 sfc_err(sa, "too many count actions requested: %u", n_count);
3283 spec_mae->action_set = sfc_mae_action_set_attach(sa, encap_header,
3285 if (spec_mae->action_set != NULL) {
3286 sfc_mae_encap_header_del(sa, encap_header);
3287 efx_mae_action_set_spec_fini(sa->nic, spec);
3291 rc = sfc_mae_action_set_add(sa, actions, spec, encap_header, n_count,
3292 &spec_mae->action_set);
3294 goto fail_action_set_add;
3298 fail_action_set_add:
3300 sfc_mae_encap_header_del(sa, encap_header);
3302 fail_process_encap_header:
3303 fail_rule_parse_action:
3304 efx_mae_action_set_spec_fini(sa->nic, spec);
3306 fail_action_set_spec_init:
3307 if (rc > 0 && rte_errno == 0) {
3308 rc = rte_flow_error_set(error, rc,
3309 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3310 NULL, "Failed to process the action");
3316 sfc_mae_rules_class_cmp(struct sfc_adapter *sa,
3317 const efx_mae_match_spec_t *left,
3318 const efx_mae_match_spec_t *right)
3320 bool have_same_class;
3323 rc = efx_mae_match_specs_class_cmp(sa->nic, left, right,
3326 return (rc == 0) ? have_same_class : false;
3330 sfc_mae_outer_rule_class_verify(struct sfc_adapter *sa,
3331 struct sfc_mae_outer_rule *rule)
3333 struct sfc_mae_fw_rsrc *fw_rsrc = &rule->fw_rsrc;
3334 struct sfc_mae_outer_rule *entry;
3335 struct sfc_mae *mae = &sa->mae;
3337 if (fw_rsrc->rule_id.id != EFX_MAE_RSRC_ID_INVALID) {
3338 /* An active rule is reused. It's class is wittingly valid. */
3342 TAILQ_FOREACH_REVERSE(entry, &mae->outer_rules,
3343 sfc_mae_outer_rules, entries) {
3344 const efx_mae_match_spec_t *left = entry->match_spec;
3345 const efx_mae_match_spec_t *right = rule->match_spec;
3350 if (sfc_mae_rules_class_cmp(sa, left, right))
3354 sfc_info(sa, "for now, the HW doesn't support rule validation, and HW "
3355 "support for outer frame pattern items is not guaranteed; "
3356 "other than that, the items are valid from SW standpoint");
3361 sfc_mae_action_rule_class_verify(struct sfc_adapter *sa,
3362 struct sfc_flow_spec_mae *spec)
3364 const struct rte_flow *entry;
3366 TAILQ_FOREACH_REVERSE(entry, &sa->flow_list, sfc_flow_list, entries) {
3367 const struct sfc_flow_spec *entry_spec = &entry->spec;
3368 const struct sfc_flow_spec_mae *es_mae = &entry_spec->mae;
3369 const efx_mae_match_spec_t *left = es_mae->match_spec;
3370 const efx_mae_match_spec_t *right = spec->match_spec;
3372 switch (entry_spec->type) {
3373 case SFC_FLOW_SPEC_FILTER:
3374 /* Ignore VNIC-level flows */
3376 case SFC_FLOW_SPEC_MAE:
3377 if (sfc_mae_rules_class_cmp(sa, left, right))
3385 sfc_info(sa, "for now, the HW doesn't support rule validation, and HW "
3386 "support for inner frame pattern items is not guaranteed; "
3387 "other than that, the items are valid from SW standpoint");
3392 * Confirm that a given flow can be accepted by the FW.
3395 * Software adapter context
3397 * Flow to be verified
3399 * Zero on success and non-zero in the case of error.
3400 * A special value of EAGAIN indicates that the adapter is
3401 * not in started state. This state is compulsory because
3402 * it only makes sense to compare the rule class of the flow
3403 * being validated with classes of the active rules.
3404 * Such classes are wittingly supported by the FW.
3407 sfc_mae_flow_verify(struct sfc_adapter *sa,
3408 struct rte_flow *flow)
3410 struct sfc_flow_spec *spec = &flow->spec;
3411 struct sfc_flow_spec_mae *spec_mae = &spec->mae;
3412 struct sfc_mae_outer_rule *outer_rule = spec_mae->outer_rule;
3415 SFC_ASSERT(sfc_adapter_is_locked(sa));
3417 if (sa->state != SFC_ETHDEV_STARTED)
3420 if (outer_rule != NULL) {
3421 rc = sfc_mae_outer_rule_class_verify(sa, outer_rule);
3426 return sfc_mae_action_rule_class_verify(sa, spec_mae);
3430 sfc_mae_flow_insert(struct sfc_adapter *sa,
3431 struct rte_flow *flow)
3433 struct sfc_flow_spec *spec = &flow->spec;
3434 struct sfc_flow_spec_mae *spec_mae = &spec->mae;
3435 struct sfc_mae_outer_rule *outer_rule = spec_mae->outer_rule;
3436 struct sfc_mae_action_set *action_set = spec_mae->action_set;
3437 struct sfc_mae_fw_rsrc *fw_rsrc = &action_set->fw_rsrc;
3440 SFC_ASSERT(spec_mae->rule_id.id == EFX_MAE_RSRC_ID_INVALID);
3441 SFC_ASSERT(action_set != NULL);
3443 if (outer_rule != NULL) {
3444 rc = sfc_mae_outer_rule_enable(sa, outer_rule,
3445 spec_mae->match_spec);
3447 goto fail_outer_rule_enable;
3450 rc = sfc_mae_action_set_enable(sa, action_set);
3452 goto fail_action_set_enable;
3454 if (action_set->n_counters > 0) {
3455 rc = sfc_mae_counter_start(sa);
3457 sfc_err(sa, "failed to start MAE counters support: %s",
3459 goto fail_mae_counter_start;
3463 rc = efx_mae_action_rule_insert(sa->nic, spec_mae->match_spec,
3464 NULL, &fw_rsrc->aset_id,
3465 &spec_mae->rule_id);
3467 goto fail_action_rule_insert;
3469 sfc_dbg(sa, "enabled flow=%p: AR_ID=0x%08x",
3470 flow, spec_mae->rule_id.id);
3474 fail_action_rule_insert:
3475 fail_mae_counter_start:
3476 sfc_mae_action_set_disable(sa, action_set);
3478 fail_action_set_enable:
3479 if (outer_rule != NULL)
3480 sfc_mae_outer_rule_disable(sa, outer_rule);
3482 fail_outer_rule_enable:
3487 sfc_mae_flow_remove(struct sfc_adapter *sa,
3488 struct rte_flow *flow)
3490 struct sfc_flow_spec *spec = &flow->spec;
3491 struct sfc_flow_spec_mae *spec_mae = &spec->mae;
3492 struct sfc_mae_action_set *action_set = spec_mae->action_set;
3493 struct sfc_mae_outer_rule *outer_rule = spec_mae->outer_rule;
3496 SFC_ASSERT(spec_mae->rule_id.id != EFX_MAE_RSRC_ID_INVALID);
3497 SFC_ASSERT(action_set != NULL);
3499 rc = efx_mae_action_rule_remove(sa->nic, &spec_mae->rule_id);
3501 sfc_err(sa, "failed to disable flow=%p with AR_ID=0x%08x: %s",
3502 flow, spec_mae->rule_id.id, strerror(rc));
3504 sfc_dbg(sa, "disabled flow=%p with AR_ID=0x%08x",
3505 flow, spec_mae->rule_id.id);
3506 spec_mae->rule_id.id = EFX_MAE_RSRC_ID_INVALID;
3508 sfc_mae_action_set_disable(sa, action_set);
3510 if (outer_rule != NULL)
3511 sfc_mae_outer_rule_disable(sa, outer_rule);
3517 sfc_mae_query_counter(struct sfc_adapter *sa,
3518 struct sfc_flow_spec_mae *spec,
3519 const struct rte_flow_action *action,
3520 struct rte_flow_query_count *data,
3521 struct rte_flow_error *error)
3523 struct sfc_mae_action_set *action_set = spec->action_set;
3524 const struct rte_flow_action_count *conf = action->conf;
3528 if (action_set->n_counters == 0) {
3529 return rte_flow_error_set(error, EINVAL,
3530 RTE_FLOW_ERROR_TYPE_ACTION, action,
3531 "Queried flow rule does not have count actions");
3534 for (i = 0; i < action_set->n_counters; i++) {
3536 * Get the first available counter of the flow rule if
3537 * counter ID is not specified.
3539 if (conf != NULL && action_set->counters[i].rte_id != conf->id)
3542 rc = sfc_mae_counter_get(&sa->mae.counter_registry.counters,
3543 &action_set->counters[i], data);
3545 return rte_flow_error_set(error, EINVAL,
3546 RTE_FLOW_ERROR_TYPE_ACTION, action,
3547 "Queried flow rule counter action is invalid");
3553 return rte_flow_error_set(error, ENOENT,
3554 RTE_FLOW_ERROR_TYPE_ACTION, action,
3555 "No such flow rule action count ID");
3559 sfc_mae_flow_query(struct rte_eth_dev *dev,
3560 struct rte_flow *flow,
3561 const struct rte_flow_action *action,
3563 struct rte_flow_error *error)
3565 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev);
3566 struct sfc_flow_spec *spec = &flow->spec;
3567 struct sfc_flow_spec_mae *spec_mae = &spec->mae;
3569 switch (action->type) {
3570 case RTE_FLOW_ACTION_TYPE_COUNT:
3571 return sfc_mae_query_counter(sa, spec_mae, action,
3574 return rte_flow_error_set(error, ENOTSUP,
3575 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3576 "Query for action of this type is not supported");
3581 sfc_mae_switchdev_init(struct sfc_adapter *sa)
3583 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
3584 struct sfc_mae *mae = &sa->mae;
3586 efx_mport_sel_t phy;
3589 sfc_log_init(sa, "entry");
3591 if (!sa->switchdev) {
3592 sfc_log_init(sa, "switchdev is not enabled - skip");
3596 if (mae->status != SFC_MAE_STATUS_SUPPORTED) {
3598 sfc_err(sa, "failed to init switchdev - no MAE support");
3602 rc = efx_mae_mport_by_pcie_function(encp->enc_pf, EFX_PCI_VF_INVALID,
3605 sfc_err(sa, "failed get PF mport");
3609 rc = efx_mae_mport_by_phy_port(encp->enc_assigned_port, &phy);
3611 sfc_err(sa, "failed get PHY mport");
3615 rc = sfc_mae_rule_add_mport_match_deliver(sa, &pf, &phy,
3616 SFC_MAE_RULE_PRIO_LOWEST,
3617 &mae->switchdev_rule_pf_to_ext);
3619 sfc_err(sa, "failed add MAE rule to forward from PF to PHY");
3623 rc = sfc_mae_rule_add_mport_match_deliver(sa, &phy, &pf,
3624 SFC_MAE_RULE_PRIO_LOWEST,
3625 &mae->switchdev_rule_ext_to_pf);
3627 sfc_err(sa, "failed add MAE rule to forward from PHY to PF");
3631 sfc_log_init(sa, "done");
3636 sfc_mae_rule_del(sa, mae->switchdev_rule_pf_to_ext);
3642 sfc_log_init(sa, "failed: %s", rte_strerror(rc));
3647 sfc_mae_switchdev_fini(struct sfc_adapter *sa)
3649 struct sfc_mae *mae = &sa->mae;
3654 sfc_mae_rule_del(sa, mae->switchdev_rule_pf_to_ext);
3655 sfc_mae_rule_del(sa, mae->switchdev_rule_ext_to_pf);