drivers/net/sfc/sfc_rx.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  * Copyright (c) 2016-2018 Solarflare Communications Inc.
   4  * All rights reserved.
   5  *
   6  * This software was jointly developed between OKTET Labs (under contract
   7  * for Solarflare) and Solarflare Communications, Inc.
   8  */
   9
  10 #include <rte_mempool.h>
  11
  12 #include "efx.h"
  13
  14 #include "sfc.h"
  15 #include "sfc_debug.h"
  16 #include "sfc_log.h"
  17 #include "sfc_ev.h"
  18 #include "sfc_rx.h"
  19 #include "sfc_kvargs.h"
  20 #include "sfc_tweak.h"
  21
  22 /*
  23  * Maximum number of Rx queue flush attempt in the case of failure or
  24  * flush timeout
  25  */
  26 #define SFC_RX_QFLUSH_ATTEMPTS          (3)
  27
  28 /*
  29  * Time to wait between event queue polling attempts when waiting for Rx
  30  * queue flush done or failed events.
  31  */
  32 #define SFC_RX_QFLUSH_POLL_WAIT_MS      (1)
  33
  34 /*
  35  * Maximum number of event queue polling attempts when waiting for Rx queue
  36  * flush done or failed events. It defines Rx queue flush attempt timeout
  37  * together with SFC_RX_QFLUSH_POLL_WAIT_MS.
  38  */
  39 #define SFC_RX_QFLUSH_POLL_ATTEMPTS     (2000)
  40
  41 void
  42 sfc_rx_qflush_done(struct sfc_rxq_info *rxq_info)
  43 {
  44         rxq_info->state |= SFC_RXQ_FLUSHED;
  45         rxq_info->state &= ~SFC_RXQ_FLUSHING;
  46 }
  47
  48 void
  49 sfc_rx_qflush_failed(struct sfc_rxq_info *rxq_info)
  50 {
  51         rxq_info->state |= SFC_RXQ_FLUSH_FAILED;
  52         rxq_info->state &= ~SFC_RXQ_FLUSHING;
  53 }
  54
  55 static void
  56 sfc_efx_rx_qrefill(struct sfc_efx_rxq *rxq)
  57 {
  58         unsigned int free_space;
  59         unsigned int bulks;
  60         void *objs[SFC_RX_REFILL_BULK];
  61         efsys_dma_addr_t addr[RTE_DIM(objs)];
  62         unsigned int added = rxq->added;
  63         unsigned int id;
  64         unsigned int i;
  65         struct sfc_efx_rx_sw_desc *rxd;
  66         struct rte_mbuf *m;
  67         uint16_t port_id = rxq->dp.dpq.port_id;
  68
  69         free_space = rxq->max_fill_level - (added - rxq->completed);
  70
  71         if (free_space < rxq->refill_threshold)
  72                 return;
  73
  74         bulks = free_space / RTE_DIM(objs);
  75         /* refill_threshold guarantees that bulks is positive */
  76         SFC_ASSERT(bulks > 0);
  77
  78         id = added & rxq->ptr_mask;
  79         do {
  80                 if (unlikely(rte_mempool_get_bulk(rxq->refill_mb_pool, objs,
  81                                                   RTE_DIM(objs)) < 0)) {
  82                         /*
  83                          * It is hardly a safe way to increment counter
  84                          * from different contexts, but all PMDs do it.
  85                          */
  86                         rxq->evq->sa->eth_dev->data->rx_mbuf_alloc_failed +=
  87                                 RTE_DIM(objs);
  88                         /* Return if we have posted nothing yet */
  89                         if (added == rxq->added)
  90                                 return;
  91                         /* Push posted */
  92                         break;
  93                 }
  94
  95                 for (i = 0; i < RTE_DIM(objs);
  96                      ++i, id = (id + 1) & rxq->ptr_mask) {
  97                         m = objs[i];
  98
  99                         MBUF_RAW_ALLOC_CHECK(m);
 100
 101                         rxd = &rxq->sw_desc[id];
 102                         rxd->mbuf = m;
 103
 104                         m->data_off = RTE_PKTMBUF_HEADROOM;
 105                         m->port = port_id;
 106
 107                         addr[i] = rte_pktmbuf_iova(m);
 108                 }
 109
 110                 efx_rx_qpost(rxq->common, addr, rxq->buf_size,
 111                              RTE_DIM(objs), rxq->completed, added);
 112                 added += RTE_DIM(objs);
 113         } while (--bulks > 0);
 114
 115         SFC_ASSERT(added != rxq->added);
 116         rxq->added = added;
 117         efx_rx_qpush(rxq->common, added, &rxq->pushed);
 118 }
 119
 120 static uint64_t
 121 sfc_efx_rx_desc_flags_to_offload_flags(const unsigned int desc_flags)
 122 {
 123         uint64_t mbuf_flags = 0;
 124
 125         switch (desc_flags & (EFX_PKT_IPV4 | EFX_CKSUM_IPV4)) {
 126         case (EFX_PKT_IPV4 | EFX_CKSUM_IPV4):
 127                 mbuf_flags |= PKT_RX_IP_CKSUM_GOOD;
 128                 break;
 129         case EFX_PKT_IPV4:
 130                 mbuf_flags |= PKT_RX_IP_CKSUM_BAD;
 131                 break;
 132         default:
 133                 RTE_BUILD_BUG_ON(PKT_RX_IP_CKSUM_UNKNOWN != 0);
 134                 SFC_ASSERT((mbuf_flags & PKT_RX_IP_CKSUM_MASK) ==
 135                            PKT_RX_IP_CKSUM_UNKNOWN);
 136                 break;
 137         }
 138
 139         switch ((desc_flags &
 140                  (EFX_PKT_TCP | EFX_PKT_UDP | EFX_CKSUM_TCPUDP))) {
 141         case (EFX_PKT_TCP | EFX_CKSUM_TCPUDP):
 142         case (EFX_PKT_UDP | EFX_CKSUM_TCPUDP):
 143                 mbuf_flags |= PKT_RX_L4_CKSUM_GOOD;
 144                 break;
 145         case EFX_PKT_TCP:
 146         case EFX_PKT_UDP:
 147                 mbuf_flags |= PKT_RX_L4_CKSUM_BAD;
 148                 break;
 149         default:
 150                 RTE_BUILD_BUG_ON(PKT_RX_L4_CKSUM_UNKNOWN != 0);
 151                 SFC_ASSERT((mbuf_flags & PKT_RX_L4_CKSUM_MASK) ==
 152                            PKT_RX_L4_CKSUM_UNKNOWN);
 153                 break;
 154         }
 155
 156         return mbuf_flags;
 157 }
 158
 159 static uint32_t
 160 sfc_efx_rx_desc_flags_to_packet_type(const unsigned int desc_flags)
 161 {
 162         return RTE_PTYPE_L2_ETHER |
 163                 ((desc_flags & EFX_PKT_IPV4) ?
 164                         RTE_PTYPE_L3_IPV4_EXT_UNKNOWN : 0) |
 165                 ((desc_flags & EFX_PKT_IPV6) ?
 166                         RTE_PTYPE_L3_IPV6_EXT_UNKNOWN : 0) |
 167                 ((desc_flags & EFX_PKT_TCP) ? RTE_PTYPE_L4_TCP : 0) |
 168                 ((desc_flags & EFX_PKT_UDP) ? RTE_PTYPE_L4_UDP : 0);
 169 }
 170
 171 static const uint32_t *
 172 sfc_efx_supported_ptypes_get(__rte_unused uint32_t tunnel_encaps)
 173 {
 174         static const uint32_t ptypes[] = {
 175                 RTE_PTYPE_L2_ETHER,
 176                 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
 177                 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
 178                 RTE_PTYPE_L4_TCP,
 179                 RTE_PTYPE_L4_UDP,
 180                 RTE_PTYPE_UNKNOWN
 181         };
 182
 183         return ptypes;
 184 }
 185
 186 static void
 187 sfc_efx_rx_set_rss_hash(struct sfc_efx_rxq *rxq, unsigned int flags,
 188                         struct rte_mbuf *m)
 189 {
 190         uint8_t *mbuf_data;
 191
 192
 193         if ((rxq->flags & SFC_EFX_RXQ_FLAG_RSS_HASH) == 0)
 194                 return;
 195
 196         mbuf_data = rte_pktmbuf_mtod(m, uint8_t *);
 197
 198         if (flags & (EFX_PKT_IPV4 | EFX_PKT_IPV6)) {
 199                 m->hash.rss = efx_pseudo_hdr_hash_get(rxq->common,
 200                                                       EFX_RX_HASHALG_TOEPLITZ,
 201                                                       mbuf_data);
 202
 203                 m->ol_flags |= PKT_RX_RSS_HASH;
 204         }
 205 }
 206
 207 static uint16_t
 208 sfc_efx_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
 209 {
 210         struct sfc_dp_rxq *dp_rxq = rx_queue;
 211         struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
 212         unsigned int completed;
 213         unsigned int prefix_size = rxq->prefix_size;
 214         unsigned int done_pkts = 0;
 215         boolean_t discard_next = B_FALSE;
 216         struct rte_mbuf *scatter_pkt = NULL;
 217
 218         if (unlikely((rxq->flags & SFC_EFX_RXQ_FLAG_RUNNING) == 0))
 219                 return 0;
 220
 221         sfc_ev_qpoll(rxq->evq);
 222
 223         completed = rxq->completed;
 224         while (completed != rxq->pending && done_pkts < nb_pkts) {
 225                 unsigned int id;
 226                 struct sfc_efx_rx_sw_desc *rxd;
 227                 struct rte_mbuf *m;
 228                 unsigned int seg_len;
 229                 unsigned int desc_flags;
 230
 231                 id = completed++ & rxq->ptr_mask;
 232                 rxd = &rxq->sw_desc[id];
 233                 m = rxd->mbuf;
 234                 desc_flags = rxd->flags;
 235
 236                 if (discard_next)
 237                         goto discard;
 238
 239                 if (desc_flags & (EFX_ADDR_MISMATCH | EFX_DISCARD))
 240                         goto discard;
 241
 242                 if (desc_flags & EFX_PKT_PREFIX_LEN) {
 243                         uint16_t tmp_size;
 244                         int rc __rte_unused;
 245
 246                         rc = efx_pseudo_hdr_pkt_length_get(rxq->common,
 247                                 rte_pktmbuf_mtod(m, uint8_t *), &tmp_size);
 248                         SFC_ASSERT(rc == 0);
 249                         seg_len = tmp_size;
 250                 } else {
 251                         seg_len = rxd->size - prefix_size;
 252                 }
 253
 254                 rte_pktmbuf_data_len(m) = seg_len;
 255                 rte_pktmbuf_pkt_len(m) = seg_len;
 256
 257                 if (scatter_pkt != NULL) {
 258                         if (rte_pktmbuf_chain(scatter_pkt, m) != 0) {
 259                                 rte_pktmbuf_free(scatter_pkt);
 260                                 goto discard;
 261                         }
 262                         /* The packet to deliver */
 263                         m = scatter_pkt;
 264                 }
 265
 266                 if (desc_flags & EFX_PKT_CONT) {
 267                         /* The packet is scattered, more fragments to come */
 268                         scatter_pkt = m;
 269                         /* Further fragments have no prefix */
 270                         prefix_size = 0;
 271                         continue;
 272                 }
 273
 274                 /* Scattered packet is done */
 275                 scatter_pkt = NULL;
 276                 /* The first fragment of the packet has prefix */
 277                 prefix_size = rxq->prefix_size;
 278
 279                 m->ol_flags =
 280                         sfc_efx_rx_desc_flags_to_offload_flags(desc_flags);
 281                 m->packet_type =
 282                         sfc_efx_rx_desc_flags_to_packet_type(desc_flags);
 283
 284                 /*
 285                  * Extract RSS hash from the packet prefix and
 286                  * set the corresponding field (if needed and possible)
 287                  */
 288                 sfc_efx_rx_set_rss_hash(rxq, desc_flags, m);
 289
 290                 m->data_off += prefix_size;
 291
 292                 *rx_pkts++ = m;
 293                 done_pkts++;
 294                 continue;
 295
 296 discard:
 297                 discard_next = ((desc_flags & EFX_PKT_CONT) != 0);
 298                 rte_mbuf_raw_free(m);
 299                 rxd->mbuf = NULL;
 300         }
 301
 302         /* pending is only moved when entire packet is received */
 303         SFC_ASSERT(scatter_pkt == NULL);
 304
 305         rxq->completed = completed;
 306
 307         sfc_efx_rx_qrefill(rxq);
 308
 309         return done_pkts;
 310 }
 311
 312 static sfc_dp_rx_qdesc_npending_t sfc_efx_rx_qdesc_npending;
 313 static unsigned int
 314 sfc_efx_rx_qdesc_npending(struct sfc_dp_rxq *dp_rxq)
 315 {
 316         struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
 317
 318         if ((rxq->flags & SFC_EFX_RXQ_FLAG_RUNNING) == 0)
 319                 return 0;
 320
 321         sfc_ev_qpoll(rxq->evq);
 322
 323         return rxq->pending - rxq->completed;
 324 }
 325
 326 static sfc_dp_rx_qdesc_status_t sfc_efx_rx_qdesc_status;
 327 static int
 328 sfc_efx_rx_qdesc_status(struct sfc_dp_rxq *dp_rxq, uint16_t offset)
 329 {
 330         struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
 331
 332         if (unlikely(offset > rxq->ptr_mask))
 333                 return -EINVAL;
 334
 335         /*
 336          * Poll EvQ to derive up-to-date 'rxq->pending' figure;
 337          * it is required for the queue to be running, but the
 338          * check is omitted because API design assumes that it
 339          * is the duty of the caller to satisfy all conditions
 340          */
 341         SFC_ASSERT((rxq->flags & SFC_EFX_RXQ_FLAG_RUNNING) ==
 342                    SFC_EFX_RXQ_FLAG_RUNNING);
 343         sfc_ev_qpoll(rxq->evq);
 344
 345         /*
 346          * There is a handful of reserved entries in the ring,
 347          * but an explicit check whether the offset points to
 348          * a reserved entry is neglected since the two checks
 349          * below rely on the figures which take the HW limits
 350          * into account and thus if an entry is reserved, the
 351          * checks will fail and UNAVAIL code will be returned
 352          */
 353
 354         if (offset < (rxq->pending - rxq->completed))
 355                 return RTE_ETH_RX_DESC_DONE;
 356
 357         if (offset < (rxq->added - rxq->completed))
 358                 return RTE_ETH_RX_DESC_AVAIL;
 359
 360         return RTE_ETH_RX_DESC_UNAVAIL;
 361 }
 362
 363 /** Get Rx datapath ops by the datapath RxQ handle */
 364 const struct sfc_dp_rx *
 365 sfc_dp_rx_by_dp_rxq(const struct sfc_dp_rxq *dp_rxq)
 366 {
 367         const struct sfc_dp_queue *dpq = &dp_rxq->dpq;
 368         struct rte_eth_dev *eth_dev;
 369         struct sfc_adapter_priv *sap;
 370
 371         SFC_ASSERT(rte_eth_dev_is_valid_port(dpq->port_id));
 372         eth_dev = &rte_eth_devices[dpq->port_id];
 373
 374         sap = sfc_adapter_priv_by_eth_dev(eth_dev);
 375
 376         return sap->dp_rx;
 377 }
 378
 379 struct sfc_rxq_info *
 380 sfc_rxq_info_by_dp_rxq(const struct sfc_dp_rxq *dp_rxq)
 381 {
 382         const struct sfc_dp_queue *dpq = &dp_rxq->dpq;
 383         struct rte_eth_dev *eth_dev;
 384         struct sfc_adapter_shared *sas;
 385
 386         SFC_ASSERT(rte_eth_dev_is_valid_port(dpq->port_id));
 387         eth_dev = &rte_eth_devices[dpq->port_id];
 388
 389         sas = sfc_adapter_shared_by_eth_dev(eth_dev);
 390
 391         SFC_ASSERT(dpq->queue_id < sas->rxq_count);
 392         return &sas->rxq_info[dpq->queue_id];
 393 }
 394
 395 struct sfc_rxq *
 396 sfc_rxq_by_dp_rxq(const struct sfc_dp_rxq *dp_rxq)
 397 {
 398         const struct sfc_dp_queue *dpq = &dp_rxq->dpq;
 399         struct rte_eth_dev *eth_dev;
 400         struct sfc_adapter *sa;
 401
 402         SFC_ASSERT(rte_eth_dev_is_valid_port(dpq->port_id));
 403         eth_dev = &rte_eth_devices[dpq->port_id];
 404
 405         sa = eth_dev->data->dev_private;
 406
 407         SFC_ASSERT(dpq->queue_id < sfc_sa2shared(sa)->rxq_count);
 408         return &sa->rxq_ctrl[dpq->queue_id];
 409 }
 410
 411 static sfc_dp_rx_qsize_up_rings_t sfc_efx_rx_qsize_up_rings;
 412 static int
 413 sfc_efx_rx_qsize_up_rings(uint16_t nb_rx_desc,
 414                           __rte_unused struct rte_mempool *mb_pool,
 415                           unsigned int *rxq_entries,
 416                           unsigned int *evq_entries,
 417                           unsigned int *rxq_max_fill_level)
 418 {
 419         *rxq_entries = nb_rx_desc;
 420         *evq_entries = nb_rx_desc;
 421         *rxq_max_fill_level = EFX_RXQ_LIMIT(*rxq_entries);
 422         return 0;
 423 }
 424
 425 static sfc_dp_rx_qcreate_t sfc_efx_rx_qcreate;
 426 static int
 427 sfc_efx_rx_qcreate(uint16_t port_id, uint16_t queue_id,
 428                    const struct rte_pci_addr *pci_addr, int socket_id,
 429                    const struct sfc_dp_rx_qcreate_info *info,
 430                    struct sfc_dp_rxq **dp_rxqp)
 431 {
 432         struct sfc_efx_rxq *rxq;
 433         int rc;
 434
 435         rc = ENOMEM;
 436         rxq = rte_zmalloc_socket("sfc-efx-rxq", sizeof(*rxq),
 437                                  RTE_CACHE_LINE_SIZE, socket_id);
 438         if (rxq == NULL)
 439                 goto fail_rxq_alloc;
 440
 441         sfc_dp_queue_init(&rxq->dp.dpq, port_id, queue_id, pci_addr);
 442
 443         rc = ENOMEM;
 444         rxq->sw_desc = rte_calloc_socket("sfc-efx-rxq-sw_desc",
 445                                          info->rxq_entries,
 446                                          sizeof(*rxq->sw_desc),
 447                                          RTE_CACHE_LINE_SIZE, socket_id);
 448         if (rxq->sw_desc == NULL)
 449                 goto fail_desc_alloc;
 450
 451         /* efx datapath is bound to efx control path */
 452         rxq->evq = sfc_rxq_by_dp_rxq(&rxq->dp)->evq;
 453         if (info->flags & SFC_RXQ_FLAG_RSS_HASH)
 454                 rxq->flags |= SFC_EFX_RXQ_FLAG_RSS_HASH;
 455         rxq->ptr_mask = info->rxq_entries - 1;
 456         rxq->batch_max = info->batch_max;
 457         rxq->prefix_size = info->prefix_size;
 458         rxq->max_fill_level = info->max_fill_level;
 459         rxq->refill_threshold = info->refill_threshold;
 460         rxq->buf_size = info->buf_size;
 461         rxq->refill_mb_pool = info->refill_mb_pool;
 462
 463         *dp_rxqp = &rxq->dp;
 464         return 0;
 465
 466 fail_desc_alloc:
 467         rte_free(rxq);
 468
 469 fail_rxq_alloc:
 470         return rc;
 471 }
 472
 473 static sfc_dp_rx_qdestroy_t sfc_efx_rx_qdestroy;
 474 static void
 475 sfc_efx_rx_qdestroy(struct sfc_dp_rxq *dp_rxq)
 476 {
 477         struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
 478
 479         rte_free(rxq->sw_desc);
 480         rte_free(rxq);
 481 }
 482
 483 static sfc_dp_rx_qstart_t sfc_efx_rx_qstart;
 484 static int
 485 sfc_efx_rx_qstart(struct sfc_dp_rxq *dp_rxq,
 486                   __rte_unused unsigned int evq_read_ptr)
 487 {
 488         /* libefx-based datapath is specific to libefx-based PMD */
 489         struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
 490         struct sfc_rxq *crxq = sfc_rxq_by_dp_rxq(dp_rxq);
 491
 492         rxq->common = crxq->common;
 493
 494         rxq->pending = rxq->completed = rxq->added = rxq->pushed = 0;
 495
 496         sfc_efx_rx_qrefill(rxq);
 497
 498         rxq->flags |= (SFC_EFX_RXQ_FLAG_STARTED | SFC_EFX_RXQ_FLAG_RUNNING);
 499
 500         return 0;
 501 }
 502
 503 static sfc_dp_rx_qstop_t sfc_efx_rx_qstop;
 504 static void
 505 sfc_efx_rx_qstop(struct sfc_dp_rxq *dp_rxq,
 506                  __rte_unused unsigned int *evq_read_ptr)
 507 {
 508         struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
 509
 510         rxq->flags &= ~SFC_EFX_RXQ_FLAG_RUNNING;
 511
 512         /* libefx-based datapath is bound to libefx-based PMD and uses
 513          * event queue structure directly. So, there is no necessity to
 514          * return EvQ read pointer.
 515          */
 516 }
 517
 518 static sfc_dp_rx_qpurge_t sfc_efx_rx_qpurge;
 519 static void
 520 sfc_efx_rx_qpurge(struct sfc_dp_rxq *dp_rxq)
 521 {
 522         struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
 523         unsigned int i;
 524         struct sfc_efx_rx_sw_desc *rxd;
 525
 526         for (i = rxq->completed; i != rxq->added; ++i) {
 527                 rxd = &rxq->sw_desc[i & rxq->ptr_mask];
 528                 rte_mbuf_raw_free(rxd->mbuf);
 529                 rxd->mbuf = NULL;
 530                 /* Packed stream relies on 0 in inactive SW desc.
 531                  * Rx queue stop is not performance critical, so
 532                  * there is no harm to do it always.
 533                  */
 534                 rxd->flags = 0;
 535                 rxd->size = 0;
 536         }
 537
 538         rxq->flags &= ~SFC_EFX_RXQ_FLAG_STARTED;
 539 }
 540
 541 struct sfc_dp_rx sfc_efx_rx = {
 542         .dp = {
 543                 .name           = SFC_KVARG_DATAPATH_EFX,
 544                 .type           = SFC_DP_RX,
 545                 .hw_fw_caps     = 0,
 546         },
 547         .features               = SFC_DP_RX_FEAT_SCATTER |
 548                                   SFC_DP_RX_FEAT_CHECKSUM,
 549         .qsize_up_rings         = sfc_efx_rx_qsize_up_rings,
 550         .qcreate                = sfc_efx_rx_qcreate,
 551         .qdestroy               = sfc_efx_rx_qdestroy,
 552         .qstart                 = sfc_efx_rx_qstart,
 553         .qstop                  = sfc_efx_rx_qstop,
 554         .qpurge                 = sfc_efx_rx_qpurge,
 555         .supported_ptypes_get   = sfc_efx_supported_ptypes_get,
 556         .qdesc_npending         = sfc_efx_rx_qdesc_npending,
 557         .qdesc_status           = sfc_efx_rx_qdesc_status,
 558         .pkt_burst              = sfc_efx_recv_pkts,
 559 };
 560
 561 static void
 562 sfc_rx_qflush(struct sfc_adapter *sa, unsigned int sw_index)
 563 {
 564         struct sfc_rxq_info *rxq_info;
 565         struct sfc_rxq *rxq;
 566         unsigned int retry_count;
 567         unsigned int wait_count;
 568         int rc;
 569
 570         rxq_info = &sfc_sa2shared(sa)->rxq_info[sw_index];
 571         SFC_ASSERT(rxq_info->state & SFC_RXQ_STARTED);
 572
 573         rxq = &sa->rxq_ctrl[sw_index];
 574
 575         /*
 576          * Retry Rx queue flushing in the case of flush failed or
 577          * timeout. In the worst case it can delay for 6 seconds.
 578          */
 579         for (retry_count = 0;
 580              ((rxq_info->state & SFC_RXQ_FLUSHED) == 0) &&
 581              (retry_count < SFC_RX_QFLUSH_ATTEMPTS);
 582              ++retry_count) {
 583                 rc = efx_rx_qflush(rxq->common);
 584                 if (rc != 0) {
 585                         rxq_info->state |= (rc == EALREADY) ?
 586                                 SFC_RXQ_FLUSHED : SFC_RXQ_FLUSH_FAILED;
 587                         break;
 588                 }
 589                 rxq_info->state &= ~SFC_RXQ_FLUSH_FAILED;
 590                 rxq_info->state |= SFC_RXQ_FLUSHING;
 591
 592                 /*
 593                  * Wait for Rx queue flush done or failed event at least
 594                  * SFC_RX_QFLUSH_POLL_WAIT_MS milliseconds and not more
 595                  * than 2 seconds (SFC_RX_QFLUSH_POLL_WAIT_MS multiplied
 596                  * by SFC_RX_QFLUSH_POLL_ATTEMPTS).
 597                  */
 598                 wait_count = 0;
 599                 do {
 600                         rte_delay_ms(SFC_RX_QFLUSH_POLL_WAIT_MS);
 601                         sfc_ev_qpoll(rxq->evq);
 602                 } while ((rxq_info->state & SFC_RXQ_FLUSHING) &&
 603                          (wait_count++ < SFC_RX_QFLUSH_POLL_ATTEMPTS));
 604
 605                 if (rxq_info->state & SFC_RXQ_FLUSHING)
 606                         sfc_err(sa, "RxQ %u flush timed out", sw_index);
 607
 608                 if (rxq_info->state & SFC_RXQ_FLUSH_FAILED)
 609                         sfc_err(sa, "RxQ %u flush failed", sw_index);
 610
 611                 if (rxq_info->state & SFC_RXQ_FLUSHED)
 612                         sfc_notice(sa, "RxQ %u flushed", sw_index);
 613         }
 614
 615         sa->priv.dp_rx->qpurge(rxq_info->dp);
 616 }
 617
 618 static int
 619 sfc_rx_default_rxq_set_filter(struct sfc_adapter *sa, struct sfc_rxq *rxq)
 620 {
 621         struct sfc_rss *rss = &sa->rss;
 622         boolean_t need_rss = (rss->channels > 0) ? B_TRUE : B_FALSE;
 623         struct sfc_port *port = &sa->port;
 624         int rc;
 625
 626         /*
 627          * If promiscuous or all-multicast mode has been requested, setting
 628          * filter for the default Rx queue might fail, in particular, while
 629          * running over PCI function which is not a member of corresponding
 630          * privilege groups; if this occurs, few iterations will be made to
 631          * repeat this step without promiscuous and all-multicast flags set
 632          */
 633 retry:
 634         rc = efx_mac_filter_default_rxq_set(sa->nic, rxq->common, need_rss);
 635         if (rc == 0)
 636                 return 0;
 637         else if (rc != EOPNOTSUPP)
 638                 return rc;
 639
 640         if (port->promisc) {
 641                 sfc_warn(sa, "promiscuous mode has been requested, "
 642                              "but the HW rejects it");
 643                 sfc_warn(sa, "promiscuous mode will be disabled");
 644
 645                 port->promisc = B_FALSE;
 646                 rc = sfc_set_rx_mode(sa);
 647                 if (rc != 0)
 648                         return rc;
 649
 650                 goto retry;
 651         }
 652
 653         if (port->allmulti) {
 654                 sfc_warn(sa, "all-multicast mode has been requested, "
 655                              "but the HW rejects it");
 656                 sfc_warn(sa, "all-multicast mode will be disabled");
 657
 658                 port->allmulti = B_FALSE;
 659                 rc = sfc_set_rx_mode(sa);
 660                 if (rc != 0)
 661                         return rc;
 662
 663                 goto retry;
 664         }
 665
 666         return rc;
 667 }
 668
 669 int
 670 sfc_rx_qstart(struct sfc_adapter *sa, unsigned int sw_index)
 671 {
 672         struct sfc_port *port = &sa->port;
 673         struct sfc_rxq_info *rxq_info;
 674         struct sfc_rxq *rxq;
 675         struct sfc_evq *evq;
 676         int rc;
 677
 678         sfc_log_init(sa, "sw_index=%u", sw_index);
 679
 680         SFC_ASSERT(sw_index < sfc_sa2shared(sa)->rxq_count);
 681
 682         rxq_info = &sfc_sa2shared(sa)->rxq_info[sw_index];
 683         SFC_ASSERT(rxq_info->state == SFC_RXQ_INITIALIZED);
 684
 685         rxq = &sa->rxq_ctrl[sw_index];
 686         evq = rxq->evq;
 687
 688         rc = sfc_ev_qstart(evq, sfc_evq_index_by_rxq_sw_index(sa, sw_index));
 689         if (rc != 0)
 690                 goto fail_ev_qstart;
 691
 692         switch (rxq_info->type) {
 693         case EFX_RXQ_TYPE_DEFAULT:
 694                 rc = efx_rx_qcreate(sa->nic, rxq->hw_index, 0, rxq_info->type,
 695                         &rxq->mem, rxq_info->entries, 0 /* not used on EF10 */,
 696                         rxq_info->type_flags, evq->common, &rxq->common);
 697                 break;
 698         case EFX_RXQ_TYPE_ES_SUPER_BUFFER: {
 699                 struct rte_mempool *mp = rxq_info->refill_mb_pool;
 700                 struct rte_mempool_info mp_info;
 701
 702                 rc = rte_mempool_ops_get_info(mp, &mp_info);
 703                 if (rc != 0) {
 704                         /* Positive errno is used in the driver */
 705                         rc = -rc;
 706                         goto fail_mp_get_info;
 707                 }
 708                 if (mp_info.contig_block_size <= 0) {
 709                         rc = EINVAL;
 710                         goto fail_bad_contig_block_size;
 711                 }
 712                 rc = efx_rx_qcreate_es_super_buffer(sa->nic, rxq->hw_index, 0,
 713                         mp_info.contig_block_size, rxq->buf_size,
 714                         mp->header_size + mp->elt_size + mp->trailer_size,
 715                         sa->rxd_wait_timeout_ns,
 716                         &rxq->mem, rxq_info->entries, rxq_info->type_flags,
 717                         evq->common, &rxq->common);
 718                 break;
 719         }
 720         default:
 721                 rc = ENOTSUP;
 722         }
 723         if (rc != 0)
 724                 goto fail_rx_qcreate;
 725
 726         efx_rx_qenable(rxq->common);
 727
 728         rc = sa->priv.dp_rx->qstart(rxq_info->dp, evq->read_ptr);
 729         if (rc != 0)
 730                 goto fail_dp_qstart;
 731
 732         rxq_info->state |= SFC_RXQ_STARTED;
 733
 734         if ((sw_index == 0) && !port->isolated) {
 735                 rc = sfc_rx_default_rxq_set_filter(sa, rxq);
 736                 if (rc != 0)
 737                         goto fail_mac_filter_default_rxq_set;
 738         }
 739
 740         /* It seems to be used by DPDK for debug purposes only ('rte_ether') */
 741         sa->eth_dev->data->rx_queue_state[sw_index] =
 742                 RTE_ETH_QUEUE_STATE_STARTED;
 743
 744         return 0;
 745
 746 fail_mac_filter_default_rxq_set:
 747         sa->priv.dp_rx->qstop(rxq_info->dp, &rxq->evq->read_ptr);
 748
 749 fail_dp_qstart:
 750         sfc_rx_qflush(sa, sw_index);
 751
 752 fail_rx_qcreate:
 753 fail_bad_contig_block_size:
 754 fail_mp_get_info:
 755         sfc_ev_qstop(evq);
 756
 757 fail_ev_qstart:
 758         return rc;
 759 }
 760
 761 void
 762 sfc_rx_qstop(struct sfc_adapter *sa, unsigned int sw_index)
 763 {
 764         struct sfc_rxq_info *rxq_info;
 765         struct sfc_rxq *rxq;
 766
 767         sfc_log_init(sa, "sw_index=%u", sw_index);
 768
 769         SFC_ASSERT(sw_index < sfc_sa2shared(sa)->rxq_count);
 770
 771         rxq_info = &sfc_sa2shared(sa)->rxq_info[sw_index];
 772
 773         if (rxq_info->state == SFC_RXQ_INITIALIZED)
 774                 return;
 775         SFC_ASSERT(rxq_info->state & SFC_RXQ_STARTED);
 776
 777         /* It seems to be used by DPDK for debug purposes only ('rte_ether') */
 778         sa->eth_dev->data->rx_queue_state[sw_index] =
 779                 RTE_ETH_QUEUE_STATE_STOPPED;
 780
 781         rxq = &sa->rxq_ctrl[sw_index];
 782         sa->priv.dp_rx->qstop(rxq_info->dp, &rxq->evq->read_ptr);
 783
 784         if (sw_index == 0)
 785                 efx_mac_filter_default_rxq_clear(sa->nic);
 786
 787         sfc_rx_qflush(sa, sw_index);
 788
 789         rxq_info->state = SFC_RXQ_INITIALIZED;
 790
 791         efx_rx_qdestroy(rxq->common);
 792
 793         sfc_ev_qstop(rxq->evq);
 794 }
 795
 796 uint64_t
 797 sfc_rx_get_dev_offload_caps(struct sfc_adapter *sa)
 798 {
 799         const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
 800         uint64_t caps = 0;
 801
 802         caps |= DEV_RX_OFFLOAD_JUMBO_FRAME;
 803
 804         if (sa->priv.dp_rx->features & SFC_DP_RX_FEAT_CHECKSUM) {
 805                 caps |= DEV_RX_OFFLOAD_IPV4_CKSUM;
 806                 caps |= DEV_RX_OFFLOAD_UDP_CKSUM;
 807                 caps |= DEV_RX_OFFLOAD_TCP_CKSUM;
 808         }
 809
 810         if (encp->enc_tunnel_encapsulations_supported &&
 811             (sa->priv.dp_rx->features & SFC_DP_RX_FEAT_TUNNELS))
 812                 caps |= DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM;
 813
 814         return caps;
 815 }
 816
 817 uint64_t
 818 sfc_rx_get_queue_offload_caps(struct sfc_adapter *sa)
 819 {
 820         uint64_t caps = 0;
 821
 822         if (sa->priv.dp_rx->features & SFC_DP_RX_FEAT_SCATTER)
 823                 caps |= DEV_RX_OFFLOAD_SCATTER;
 824
 825         return caps;
 826 }
 827
 828 static int
 829 sfc_rx_qcheck_conf(struct sfc_adapter *sa, unsigned int rxq_max_fill_level,
 830                    const struct rte_eth_rxconf *rx_conf,
 831                    __rte_unused uint64_t offloads)
 832 {
 833         int rc = 0;
 834
 835         if (rx_conf->rx_thresh.pthresh != 0 ||
 836             rx_conf->rx_thresh.hthresh != 0 ||
 837             rx_conf->rx_thresh.wthresh != 0) {
 838                 sfc_warn(sa,
 839                         "RxQ prefetch/host/writeback thresholds are not supported");
 840         }
 841
 842         if (rx_conf->rx_free_thresh > rxq_max_fill_level) {
 843                 sfc_err(sa,
 844                         "RxQ free threshold too large: %u vs maximum %u",
 845                         rx_conf->rx_free_thresh, rxq_max_fill_level);
 846                 rc = EINVAL;
 847         }
 848
 849         if (rx_conf->rx_drop_en == 0) {
 850                 sfc_err(sa, "RxQ drop disable is not supported");
 851                 rc = EINVAL;
 852         }
 853
 854         return rc;
 855 }
 856
 857 static unsigned int
 858 sfc_rx_mbuf_data_alignment(struct rte_mempool *mb_pool)
 859 {
 860         uint32_t data_off;
 861         uint32_t order;
 862
 863         /* The mbuf object itself is always cache line aligned */
 864         order = rte_bsf32(RTE_CACHE_LINE_SIZE);
 865
 866         /* Data offset from mbuf object start */
 867         data_off = sizeof(struct rte_mbuf) + rte_pktmbuf_priv_size(mb_pool) +
 868                 RTE_PKTMBUF_HEADROOM;
 869
 870         order = MIN(order, rte_bsf32(data_off));
 871
 872         return 1u << order;
 873 }
 874
 875 static uint16_t
 876 sfc_rx_mb_pool_buf_size(struct sfc_adapter *sa, struct rte_mempool *mb_pool)
 877 {
 878         const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
 879         const uint32_t nic_align_start = MAX(1, encp->enc_rx_buf_align_start);
 880         const uint32_t nic_align_end = MAX(1, encp->enc_rx_buf_align_end);
 881         uint16_t buf_size;
 882         unsigned int buf_aligned;
 883         unsigned int start_alignment;
 884         unsigned int end_padding_alignment;
 885
 886         /* Below it is assumed that both alignments are power of 2 */
 887         SFC_ASSERT(rte_is_power_of_2(nic_align_start));
 888         SFC_ASSERT(rte_is_power_of_2(nic_align_end));
 889
 890         /*
 891          * mbuf is always cache line aligned, double-check
 892          * that it meets rx buffer start alignment requirements.
 893          */
 894
 895         /* Start from mbuf pool data room size */
 896         buf_size = rte_pktmbuf_data_room_size(mb_pool);
 897
 898         /* Remove headroom */
 899         if (buf_size <= RTE_PKTMBUF_HEADROOM) {
 900                 sfc_err(sa,
 901                         "RxQ mbuf pool %s object data room size %u is smaller than headroom %u",
 902                         mb_pool->name, buf_size, RTE_PKTMBUF_HEADROOM);
 903                 return 0;
 904         }
 905         buf_size -= RTE_PKTMBUF_HEADROOM;
 906
 907         /* Calculate guaranteed data start alignment */
 908         buf_aligned = sfc_rx_mbuf_data_alignment(mb_pool);
 909
 910         /* Reserve space for start alignment */
 911         if (buf_aligned < nic_align_start) {
 912                 start_alignment = nic_align_start - buf_aligned;
 913                 if (buf_size <= start_alignment) {
 914                         sfc_err(sa,
 915                                 "RxQ mbuf pool %s object data room size %u is insufficient for headroom %u and buffer start alignment %u required by NIC",
 916                                 mb_pool->name,
 917                                 rte_pktmbuf_data_room_size(mb_pool),
 918                                 RTE_PKTMBUF_HEADROOM, start_alignment);
 919                         return 0;
 920                 }
 921                 buf_aligned = nic_align_start;
 922                 buf_size -= start_alignment;
 923         } else {
 924                 start_alignment = 0;
 925         }
 926
 927         /* Make sure that end padding does not write beyond the buffer */
 928         if (buf_aligned < nic_align_end) {
 929                 /*
 930                  * Estimate space which can be lost. If guarnteed buffer
 931                  * size is odd, lost space is (nic_align_end - 1). More
 932                  * accurate formula is below.
 933                  */
 934                 end_padding_alignment = nic_align_end -
 935                         MIN(buf_aligned, 1u << (rte_bsf32(buf_size) - 1));
 936                 if (buf_size <= end_padding_alignment) {
 937                         sfc_err(sa,
 938                                 "RxQ mbuf pool %s object data room size %u is insufficient for headroom %u, buffer start alignment %u and end padding alignment %u required by NIC",
 939                                 mb_pool->name,
 940                                 rte_pktmbuf_data_room_size(mb_pool),
 941                                 RTE_PKTMBUF_HEADROOM, start_alignment,
 942                                 end_padding_alignment);
 943                         return 0;
 944                 }
 945                 buf_size -= end_padding_alignment;
 946         } else {
 947                 /*
 948                  * Start is aligned the same or better than end,
 949                  * just align length.
 950                  */
 951                 buf_size = P2ALIGN(buf_size, nic_align_end);
 952         }
 953
 954         return buf_size;
 955 }
 956
 957 int
 958 sfc_rx_qinit(struct sfc_adapter *sa, unsigned int sw_index,
 959              uint16_t nb_rx_desc, unsigned int socket_id,
 960              const struct rte_eth_rxconf *rx_conf,
 961              struct rte_mempool *mb_pool)
 962 {
 963         const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
 964         struct sfc_rss *rss = &sa->rss;
 965         int rc;
 966         unsigned int rxq_entries;
 967         unsigned int evq_entries;
 968         unsigned int rxq_max_fill_level;
 969         uint64_t offloads;
 970         uint16_t buf_size;
 971         struct sfc_rxq_info *rxq_info;
 972         struct sfc_evq *evq;
 973         struct sfc_rxq *rxq;
 974         struct sfc_dp_rx_qcreate_info info;
 975
 976         rc = sa->priv.dp_rx->qsize_up_rings(nb_rx_desc, mb_pool, &rxq_entries,
 977                                             &evq_entries, &rxq_max_fill_level);
 978         if (rc != 0)
 979                 goto fail_size_up_rings;
 980         SFC_ASSERT(rxq_entries >= EFX_RXQ_MINNDESCS);
 981         SFC_ASSERT(rxq_entries <= EFX_RXQ_MAXNDESCS);
 982         SFC_ASSERT(rxq_max_fill_level <= nb_rx_desc);
 983
 984         offloads = rx_conf->offloads |
 985                 sa->eth_dev->data->dev_conf.rxmode.offloads;
 986         rc = sfc_rx_qcheck_conf(sa, rxq_max_fill_level, rx_conf, offloads);
 987         if (rc != 0)
 988                 goto fail_bad_conf;
 989
 990         buf_size = sfc_rx_mb_pool_buf_size(sa, mb_pool);
 991         if (buf_size == 0) {
 992                 sfc_err(sa, "RxQ %u mbuf pool object size is too small",
 993                         sw_index);
 994                 rc = EINVAL;
 995                 goto fail_bad_conf;
 996         }
 997
 998         if ((buf_size < sa->port.pdu + encp->enc_rx_prefix_size) &&
 999             (~offloads & DEV_RX_OFFLOAD_SCATTER)) {
1000                 sfc_err(sa, "Rx scatter is disabled and RxQ %u mbuf pool "
1001                         "object size is too small", sw_index);
1002                 sfc_err(sa, "RxQ %u calculated Rx buffer size is %u vs "
1003                         "PDU size %u plus Rx prefix %u bytes",
1004                         sw_index, buf_size, (unsigned int)sa->port.pdu,
1005                         encp->enc_rx_prefix_size);
1006                 rc = EINVAL;
1007                 goto fail_bad_conf;
1008         }
1009
1010         SFC_ASSERT(sw_index < sfc_sa2shared(sa)->rxq_count);
1011         rxq_info = &sfc_sa2shared(sa)->rxq_info[sw_index];
1012
1013         SFC_ASSERT(rxq_entries <= rxq_info->max_entries);
1014         rxq_info->entries = rxq_entries;
1015
1016         if (sa->priv.dp_rx->dp.hw_fw_caps & SFC_DP_HW_FW_CAP_RX_ES_SUPER_BUFFER)
1017                 rxq_info->type = EFX_RXQ_TYPE_ES_SUPER_BUFFER;
1018         else
1019                 rxq_info->type = EFX_RXQ_TYPE_DEFAULT;
1020
1021         rxq_info->type_flags =
1022                 (offloads & DEV_RX_OFFLOAD_SCATTER) ?
1023                 EFX_RXQ_FLAG_SCATTER : EFX_RXQ_FLAG_NONE;
1024
1025         if ((encp->enc_tunnel_encapsulations_supported != 0) &&
1026             (sa->priv.dp_rx->features & SFC_DP_RX_FEAT_TUNNELS))
1027                 rxq_info->type_flags |= EFX_RXQ_FLAG_INNER_CLASSES;
1028
1029         rc = sfc_ev_qinit(sa, SFC_EVQ_TYPE_RX, sw_index,
1030                           evq_entries, socket_id, &evq);
1031         if (rc != 0)
1032                 goto fail_ev_qinit;
1033
1034         rxq = &sa->rxq_ctrl[sw_index];
1035         rxq->evq = evq;
1036         rxq->hw_index = sw_index;
1037         rxq_info->refill_threshold =
1038                 RTE_MAX(rx_conf->rx_free_thresh, SFC_RX_REFILL_BULK);
1039         rxq_info->refill_mb_pool = mb_pool;
1040         rxq->buf_size = buf_size;
1041
1042         rc = sfc_dma_alloc(sa, "rxq", sw_index, EFX_RXQ_SIZE(rxq_info->entries),
1043                            socket_id, &rxq->mem);
1044         if (rc != 0)
1045                 goto fail_dma_alloc;
1046
1047         memset(&info, 0, sizeof(info));
1048         info.refill_mb_pool = rxq_info->refill_mb_pool;
1049         info.max_fill_level = rxq_max_fill_level;
1050         info.refill_threshold = rxq_info->refill_threshold;
1051         info.buf_size = buf_size;
1052         info.batch_max = encp->enc_rx_batch_max;
1053         info.prefix_size = encp->enc_rx_prefix_size;
1054
1055         if (rss->hash_support == EFX_RX_HASH_AVAILABLE && rss->channels > 0)
1056                 info.flags |= SFC_RXQ_FLAG_RSS_HASH;
1057
1058         info.rxq_entries = rxq_info->entries;
1059         info.rxq_hw_ring = rxq->mem.esm_base;
1060         info.evq_entries = evq_entries;
1061         info.evq_hw_ring = evq->mem.esm_base;
1062         info.hw_index = rxq->hw_index;
1063         info.mem_bar = sa->mem_bar.esb_base;
1064         info.vi_window_shift = encp->enc_vi_window_shift;
1065
1066         rc = sa->priv.dp_rx->qcreate(sa->eth_dev->data->port_id, sw_index,
1067                                      &RTE_ETH_DEV_TO_PCI(sa->eth_dev)->addr,
1068                                      socket_id, &info, &rxq_info->dp);
1069         if (rc != 0)
1070                 goto fail_dp_rx_qcreate;
1071
1072         evq->dp_rxq = rxq_info->dp;
1073
1074         rxq_info->state = SFC_RXQ_INITIALIZED;
1075
1076         rxq_info->deferred_start = (rx_conf->rx_deferred_start != 0);
1077
1078         return 0;
1079
1080 fail_dp_rx_qcreate:
1081         sfc_dma_free(sa, &rxq->mem);
1082
1083 fail_dma_alloc:
1084         sfc_ev_qfini(evq);
1085
1086 fail_ev_qinit:
1087         rxq_info->entries = 0;
1088
1089 fail_bad_conf:
1090 fail_size_up_rings:
1091         sfc_log_init(sa, "failed %d", rc);
1092         return rc;
1093 }
1094
1095 void
1096 sfc_rx_qfini(struct sfc_adapter *sa, unsigned int sw_index)
1097 {
1098         struct sfc_rxq_info *rxq_info;
1099         struct sfc_rxq *rxq;
1100
1101         SFC_ASSERT(sw_index < sfc_sa2shared(sa)->rxq_count);
1102         sa->eth_dev->data->rx_queues[sw_index] = NULL;
1103
1104         rxq_info = &sfc_sa2shared(sa)->rxq_info[sw_index];
1105
1106         SFC_ASSERT(rxq_info->state == SFC_RXQ_INITIALIZED);
1107
1108         sa->priv.dp_rx->qdestroy(rxq_info->dp);
1109         rxq_info->dp = NULL;
1110
1111         rxq_info->state &= ~SFC_RXQ_INITIALIZED;
1112         rxq_info->entries = 0;
1113
1114         rxq = &sa->rxq_ctrl[sw_index];
1115
1116         sfc_dma_free(sa, &rxq->mem);
1117
1118         sfc_ev_qfini(rxq->evq);
1119         rxq->evq = NULL;
1120 }
1121
1122 /*
1123  * Mapping between RTE RSS hash functions and their EFX counterparts.
1124  */
1125 static const struct sfc_rss_hf_rte_to_efx sfc_rss_hf_map[] = {
1126         { ETH_RSS_NONFRAG_IPV4_TCP,
1127           EFX_RX_HASH(IPV4_TCP, 4TUPLE) },
1128         { ETH_RSS_NONFRAG_IPV4_UDP,
1129           EFX_RX_HASH(IPV4_UDP, 4TUPLE) },
1130         { ETH_RSS_NONFRAG_IPV6_TCP | ETH_RSS_IPV6_TCP_EX,
1131           EFX_RX_HASH(IPV6_TCP, 4TUPLE) },
1132         { ETH_RSS_NONFRAG_IPV6_UDP | ETH_RSS_IPV6_UDP_EX,
1133           EFX_RX_HASH(IPV6_UDP, 4TUPLE) },
1134         { ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | ETH_RSS_NONFRAG_IPV4_OTHER,
1135           EFX_RX_HASH(IPV4_TCP, 2TUPLE) | EFX_RX_HASH(IPV4_UDP, 2TUPLE) |
1136           EFX_RX_HASH(IPV4, 2TUPLE) },
1137         { ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | ETH_RSS_NONFRAG_IPV6_OTHER |
1138           ETH_RSS_IPV6_EX,
1139           EFX_RX_HASH(IPV6_TCP, 2TUPLE) | EFX_RX_HASH(IPV6_UDP, 2TUPLE) |
1140           EFX_RX_HASH(IPV6, 2TUPLE) }
1141 };
1142
1143 static efx_rx_hash_type_t
1144 sfc_rx_hash_types_mask_supp(efx_rx_hash_type_t hash_type,
1145                             unsigned int *hash_type_flags_supported,
1146                             unsigned int nb_hash_type_flags_supported)
1147 {
1148         efx_rx_hash_type_t hash_type_masked = 0;
1149         unsigned int i, j;
1150
1151         for (i = 0; i < nb_hash_type_flags_supported; ++i) {
1152                 unsigned int class_tuple_lbn[] = {
1153                         EFX_RX_CLASS_IPV4_TCP_LBN,
1154                         EFX_RX_CLASS_IPV4_UDP_LBN,
1155                         EFX_RX_CLASS_IPV4_LBN,
1156                         EFX_RX_CLASS_IPV6_TCP_LBN,
1157                         EFX_RX_CLASS_IPV6_UDP_LBN,
1158                         EFX_RX_CLASS_IPV6_LBN
1159                 };
1160
1161                 for (j = 0; j < RTE_DIM(class_tuple_lbn); ++j) {
1162                         unsigned int tuple_mask = EFX_RX_CLASS_HASH_4TUPLE;
1163                         unsigned int flag;
1164
1165                         tuple_mask <<= class_tuple_lbn[j];
1166                         flag = hash_type & tuple_mask;
1167
1168                         if (flag == hash_type_flags_supported[i])
1169                                 hash_type_masked |= flag;
1170                 }
1171         }
1172
1173         return hash_type_masked;
1174 }
1175
1176 int
1177 sfc_rx_hash_init(struct sfc_adapter *sa)
1178 {
1179         struct sfc_rss *rss = &sa->rss;
1180         const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
1181         uint32_t alg_mask = encp->enc_rx_scale_hash_alg_mask;
1182         efx_rx_hash_alg_t alg;
1183         unsigned int flags_supp[EFX_RX_HASH_NFLAGS];
1184         unsigned int nb_flags_supp;
1185         struct sfc_rss_hf_rte_to_efx *hf_map;
1186         struct sfc_rss_hf_rte_to_efx *entry;
1187         efx_rx_hash_type_t efx_hash_types;
1188         unsigned int i;
1189         int rc;
1190
1191         if (alg_mask & (1U << EFX_RX_HASHALG_TOEPLITZ))
1192                 alg = EFX_RX_HASHALG_TOEPLITZ;
1193         else if (alg_mask & (1U << EFX_RX_HASHALG_PACKED_STREAM))
1194                 alg = EFX_RX_HASHALG_PACKED_STREAM;
1195         else
1196                 return EINVAL;
1197
1198         rc = efx_rx_scale_hash_flags_get(sa->nic, alg, flags_supp,
1199                                          RTE_DIM(flags_supp), &nb_flags_supp);
1200         if (rc != 0)
1201                 return rc;
1202
1203         hf_map = rte_calloc_socket("sfc-rss-hf-map",
1204                                    RTE_DIM(sfc_rss_hf_map),
1205                                    sizeof(*hf_map), 0, sa->socket_id);
1206         if (hf_map == NULL)
1207                 return ENOMEM;
1208
1209         entry = hf_map;
1210         efx_hash_types = 0;
1211         for (i = 0; i < RTE_DIM(sfc_rss_hf_map); ++i) {
1212                 efx_rx_hash_type_t ht;
1213
1214                 ht = sfc_rx_hash_types_mask_supp(sfc_rss_hf_map[i].efx,
1215                                                  flags_supp, nb_flags_supp);
1216                 if (ht != 0) {
1217                         entry->rte = sfc_rss_hf_map[i].rte;
1218                         entry->efx = ht;
1219                         efx_hash_types |= ht;
1220                         ++entry;
1221                 }
1222         }
1223
1224         rss->hash_alg = alg;
1225         rss->hf_map_nb_entries = (unsigned int)(entry - hf_map);
1226         rss->hf_map = hf_map;
1227         rss->hash_types = efx_hash_types;
1228
1229         return 0;
1230 }
1231
1232 void
1233 sfc_rx_hash_fini(struct sfc_adapter *sa)
1234 {
1235         struct sfc_rss *rss = &sa->rss;
1236
1237         rte_free(rss->hf_map);
1238 }
1239
1240 int
1241 sfc_rx_hf_rte_to_efx(struct sfc_adapter *sa, uint64_t rte,
1242                      efx_rx_hash_type_t *efx)
1243 {
1244         struct sfc_rss *rss = &sa->rss;
1245         efx_rx_hash_type_t hash_types = 0;
1246         unsigned int i;
1247
1248         for (i = 0; i < rss->hf_map_nb_entries; ++i) {
1249                 uint64_t rte_mask = rss->hf_map[i].rte;
1250
1251                 if ((rte & rte_mask) != 0) {
1252                         rte &= ~rte_mask;
1253                         hash_types |= rss->hf_map[i].efx;
1254                 }
1255         }
1256
1257         if (rte != 0) {
1258                 sfc_err(sa, "unsupported hash functions requested");
1259                 return EINVAL;
1260         }
1261
1262         *efx = hash_types;
1263
1264         return 0;
1265 }
1266
1267 uint64_t
1268 sfc_rx_hf_efx_to_rte(struct sfc_adapter *sa, efx_rx_hash_type_t efx)
1269 {
1270         struct sfc_rss *rss = &sa->rss;
1271         uint64_t rte = 0;
1272         unsigned int i;
1273
1274         for (i = 0; i < rss->hf_map_nb_entries; ++i) {
1275                 efx_rx_hash_type_t hash_type = rss->hf_map[i].efx;
1276
1277                 if ((efx & hash_type) == hash_type)
1278                         rte |= rss->hf_map[i].rte;
1279         }
1280
1281         return rte;
1282 }
1283
1284 static int
1285 sfc_rx_process_adv_conf_rss(struct sfc_adapter *sa,
1286                             struct rte_eth_rss_conf *conf)
1287 {
1288         struct sfc_rss *rss = &sa->rss;
1289         efx_rx_hash_type_t efx_hash_types = rss->hash_types;
1290         uint64_t rss_hf = sfc_rx_hf_efx_to_rte(sa, efx_hash_types);
1291         int rc;
1292
1293         if (rss->context_type != EFX_RX_SCALE_EXCLUSIVE) {
1294                 if ((conf->rss_hf != 0 && conf->rss_hf != rss_hf) ||
1295                     conf->rss_key != NULL)
1296                         return EINVAL;
1297         }
1298
1299         if (conf->rss_hf != 0) {
1300                 rc = sfc_rx_hf_rte_to_efx(sa, conf->rss_hf, &efx_hash_types);
1301                 if (rc != 0)
1302                         return rc;
1303         }
1304
1305         if (conf->rss_key != NULL) {
1306                 if (conf->rss_key_len != sizeof(rss->key)) {
1307                         sfc_err(sa, "RSS key size is wrong (should be %lu)",
1308                                 sizeof(rss->key));
1309                         return EINVAL;
1310                 }
1311                 rte_memcpy(rss->key, conf->rss_key, sizeof(rss->key));
1312         }
1313
1314         rss->hash_types = efx_hash_types;
1315
1316         return 0;
1317 }
1318
1319 static int
1320 sfc_rx_rss_config(struct sfc_adapter *sa)
1321 {
1322         struct sfc_rss *rss = &sa->rss;
1323         int rc = 0;
1324
1325         if (rss->channels > 0) {
1326                 rc = efx_rx_scale_mode_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT,
1327                                            rss->hash_alg, rss->hash_types,
1328                                            B_TRUE);
1329                 if (rc != 0)
1330                         goto finish;
1331
1332                 rc = efx_rx_scale_key_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT,
1333                                           rss->key, sizeof(rss->key));
1334                 if (rc != 0)
1335                         goto finish;
1336
1337                 rc = efx_rx_scale_tbl_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT,
1338                                           rss->tbl, RTE_DIM(rss->tbl));
1339         }
1340
1341 finish:
1342         return rc;
1343 }
1344
1345 int
1346 sfc_rx_start(struct sfc_adapter *sa)
1347 {
1348         struct sfc_adapter_shared * const sas = sfc_sa2shared(sa);
1349         unsigned int sw_index;
1350         int rc;
1351
1352         sfc_log_init(sa, "rxq_count=%u", sas->rxq_count);
1353
1354         rc = efx_rx_init(sa->nic);
1355         if (rc != 0)
1356                 goto fail_rx_init;
1357
1358         rc = sfc_rx_rss_config(sa);
1359         if (rc != 0)
1360                 goto fail_rss_config;
1361
1362         for (sw_index = 0; sw_index < sas->rxq_count; ++sw_index) {
1363                 if (sas->rxq_info[sw_index].state == SFC_RXQ_INITIALIZED &&
1364                     (!sas->rxq_info[sw_index].deferred_start ||
1365                      sas->rxq_info[sw_index].deferred_started)) {
1366                         rc = sfc_rx_qstart(sa, sw_index);
1367                         if (rc != 0)
1368                                 goto fail_rx_qstart;
1369                 }
1370         }
1371
1372         return 0;
1373
1374 fail_rx_qstart:
1375         while (sw_index-- > 0)
1376                 sfc_rx_qstop(sa, sw_index);
1377
1378 fail_rss_config:
1379         efx_rx_fini(sa->nic);
1380
1381 fail_rx_init:
1382         sfc_log_init(sa, "failed %d", rc);
1383         return rc;
1384 }
1385
1386 void
1387 sfc_rx_stop(struct sfc_adapter *sa)
1388 {
1389         struct sfc_adapter_shared * const sas = sfc_sa2shared(sa);
1390         unsigned int sw_index;
1391
1392         sfc_log_init(sa, "rxq_count=%u", sas->rxq_count);
1393
1394         sw_index = sas->rxq_count;
1395         while (sw_index-- > 0) {
1396                 if (sas->rxq_info[sw_index].state & SFC_RXQ_STARTED)
1397                         sfc_rx_qstop(sa, sw_index);
1398         }
1399
1400         efx_rx_fini(sa->nic);
1401 }
1402
1403 static int
1404 sfc_rx_qinit_info(struct sfc_adapter *sa, unsigned int sw_index)
1405 {
1406         struct sfc_adapter_shared * const sas = sfc_sa2shared(sa);
1407         struct sfc_rxq_info *rxq_info = &sas->rxq_info[sw_index];
1408         unsigned int max_entries;
1409
1410         max_entries = EFX_RXQ_MAXNDESCS;
1411         SFC_ASSERT(rte_is_power_of_2(max_entries));
1412
1413         rxq_info->max_entries = max_entries;
1414
1415         return 0;
1416 }
1417
1418 static int
1419 sfc_rx_check_mode(struct sfc_adapter *sa, struct rte_eth_rxmode *rxmode)
1420 {
1421         uint64_t offloads_supported = sfc_rx_get_dev_offload_caps(sa) |
1422                                       sfc_rx_get_queue_offload_caps(sa);
1423         struct sfc_rss *rss = &sa->rss;
1424         int rc = 0;
1425
1426         switch (rxmode->mq_mode) {
1427         case ETH_MQ_RX_NONE:
1428                 /* No special checks are required */
1429                 break;
1430         case ETH_MQ_RX_RSS:
1431                 if (rss->context_type == EFX_RX_SCALE_UNAVAILABLE) {
1432                         sfc_err(sa, "RSS is not available");
1433                         rc = EINVAL;
1434                 }
1435                 break;
1436         default:
1437                 sfc_err(sa, "Rx multi-queue mode %u not supported",
1438                         rxmode->mq_mode);
1439                 rc = EINVAL;
1440         }
1441
1442         /*
1443          * Requested offloads are validated against supported by ethdev,
1444          * so unsupported offloads cannot be added as the result of
1445          * below check.
1446          */
1447         if ((rxmode->offloads & DEV_RX_OFFLOAD_CHECKSUM) !=
1448             (offloads_supported & DEV_RX_OFFLOAD_CHECKSUM)) {
1449                 sfc_warn(sa, "Rx checksum offloads cannot be disabled - always on (IPv4/TCP/UDP)");
1450                 rxmode->offloads |= DEV_RX_OFFLOAD_CHECKSUM;
1451         }
1452
1453         if ((offloads_supported & DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM) &&
1454             (~rxmode->offloads & DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM)) {
1455                 sfc_warn(sa, "Rx outer IPv4 checksum offload cannot be disabled - always on");
1456                 rxmode->offloads |= DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM;
1457         }
1458
1459         return rc;
1460 }
1461
1462 /**
1463  * Destroy excess queues that are no longer needed after reconfiguration
1464  * or complete close.
1465  */
1466 static void
1467 sfc_rx_fini_queues(struct sfc_adapter *sa, unsigned int nb_rx_queues)
1468 {
1469         struct sfc_adapter_shared * const sas = sfc_sa2shared(sa);
1470         int sw_index;
1471
1472         SFC_ASSERT(nb_rx_queues <= sas->rxq_count);
1473
1474         sw_index = sas->rxq_count;
1475         while (--sw_index >= (int)nb_rx_queues) {
1476                 if (sas->rxq_info[sw_index].state & SFC_RXQ_INITIALIZED)
1477                         sfc_rx_qfini(sa, sw_index);
1478         }
1479
1480         sas->rxq_count = nb_rx_queues;
1481 }
1482
1483 /**
1484  * Initialize Rx subsystem.
1485  *
1486  * Called at device (re)configuration stage when number of receive queues is
1487  * specified together with other device level receive configuration.
1488  *
1489  * It should be used to allocate NUMA-unaware resources.
1490  */
1491 int
1492 sfc_rx_configure(struct sfc_adapter *sa)
1493 {
1494         struct sfc_adapter_shared * const sas = sfc_sa2shared(sa);
1495         struct sfc_rss *rss = &sa->rss;
1496         struct rte_eth_conf *dev_conf = &sa->eth_dev->data->dev_conf;
1497         const unsigned int nb_rx_queues = sa->eth_dev->data->nb_rx_queues;
1498         int rc;
1499
1500         sfc_log_init(sa, "nb_rx_queues=%u (old %u)",
1501                      nb_rx_queues, sas->rxq_count);
1502
1503         rc = sfc_rx_check_mode(sa, &dev_conf->rxmode);
1504         if (rc != 0)
1505                 goto fail_check_mode;
1506
1507         if (nb_rx_queues == sas->rxq_count)
1508                 goto configure_rss;
1509
1510         if (sas->rxq_info == NULL) {
1511                 rc = ENOMEM;
1512                 sas->rxq_info = rte_calloc_socket("sfc-rxqs", nb_rx_queues,
1513                                                   sizeof(sas->rxq_info[0]), 0,
1514                                                   sa->socket_id);
1515                 if (sas->rxq_info == NULL)
1516                         goto fail_rxqs_alloc;
1517
1518                 /*
1519                  * Allocate primary process only RxQ control from heap
1520                  * since it should not be shared.
1521                  */
1522                 rc = ENOMEM;
1523                 sa->rxq_ctrl = calloc(nb_rx_queues, sizeof(sa->rxq_ctrl[0]));
1524                 if (sa->rxq_ctrl == NULL)
1525                         goto fail_rxqs_ctrl_alloc;
1526         } else {
1527                 struct sfc_rxq_info *new_rxq_info;
1528                 struct sfc_rxq *new_rxq_ctrl;
1529
1530                 if (nb_rx_queues < sas->rxq_count)
1531                         sfc_rx_fini_queues(sa, nb_rx_queues);
1532
1533                 rc = ENOMEM;
1534                 new_rxq_info =
1535                         rte_realloc(sas->rxq_info,
1536                                     nb_rx_queues * sizeof(sas->rxq_info[0]), 0);
1537                 if (new_rxq_info == NULL && nb_rx_queues > 0)
1538                         goto fail_rxqs_realloc;
1539
1540                 rc = ENOMEM;
1541                 new_rxq_ctrl = realloc(sa->rxq_ctrl,
1542                                        nb_rx_queues * sizeof(sa->rxq_ctrl[0]));
1543                 if (new_rxq_ctrl == NULL && nb_rx_queues > 0)
1544                         goto fail_rxqs_ctrl_realloc;
1545
1546                 sas->rxq_info = new_rxq_info;
1547                 sa->rxq_ctrl = new_rxq_ctrl;
1548                 if (nb_rx_queues > sas->rxq_count) {
1549                         memset(&sas->rxq_info[sas->rxq_count], 0,
1550                                (nb_rx_queues - sas->rxq_count) *
1551                                sizeof(sas->rxq_info[0]));
1552                         memset(&sa->rxq_ctrl[sas->rxq_count], 0,
1553                                (nb_rx_queues - sas->rxq_count) *
1554                                sizeof(sa->rxq_ctrl[0]));
1555                 }
1556         }
1557
1558         while (sas->rxq_count < nb_rx_queues) {
1559                 rc = sfc_rx_qinit_info(sa, sas->rxq_count);
1560                 if (rc != 0)
1561                         goto fail_rx_qinit_info;
1562
1563                 sas->rxq_count++;
1564         }
1565
1566 configure_rss:
1567         rss->channels = (dev_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) ?
1568                          MIN(sas->rxq_count, EFX_MAXRSS) : 0;
1569
1570         if (rss->channels > 0) {
1571                 struct rte_eth_rss_conf *adv_conf_rss;
1572                 unsigned int sw_index;
1573
1574                 for (sw_index = 0; sw_index < EFX_RSS_TBL_SIZE; ++sw_index)
1575                         rss->tbl[sw_index] = sw_index % rss->channels;
1576
1577                 adv_conf_rss = &dev_conf->rx_adv_conf.rss_conf;
1578                 rc = sfc_rx_process_adv_conf_rss(sa, adv_conf_rss);
1579                 if (rc != 0)
1580                         goto fail_rx_process_adv_conf_rss;
1581         }
1582
1583         return 0;
1584
1585 fail_rx_process_adv_conf_rss:
1586 fail_rx_qinit_info:
1587 fail_rxqs_ctrl_realloc:
1588 fail_rxqs_realloc:
1589 fail_rxqs_ctrl_alloc:
1590 fail_rxqs_alloc:
1591         sfc_rx_close(sa);
1592
1593 fail_check_mode:
1594         sfc_log_init(sa, "failed %d", rc);
1595         return rc;
1596 }
1597
1598 /**
1599  * Shutdown Rx subsystem.
1600  *
1601  * Called at device close stage, for example, before device shutdown.
1602  */
1603 void
1604 sfc_rx_close(struct sfc_adapter *sa)
1605 {
1606         struct sfc_rss *rss = &sa->rss;
1607
1608         sfc_rx_fini_queues(sa, 0);
1609
1610         rss->channels = 0;
1611
1612         free(sa->rxq_ctrl);
1613         sa->rxq_ctrl = NULL;
1614
1615         rte_free(sfc_sa2shared(sa)->rxq_info);
1616         sfc_sa2shared(sa)->rxq_info = NULL;
1617 }