002b25fccef11221b17be2bd91ba9e642d2568b7
[dpdk.git] / drivers / net / softnic / rte_eth_softnic_internals.h
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2017 Intel Corporation
3  */
4
5 #ifndef __INCLUDE_RTE_ETH_SOFTNIC_INTERNALS_H__
6 #define __INCLUDE_RTE_ETH_SOFTNIC_INTERNALS_H__
7
8 #include <stddef.h>
9 #include <stdint.h>
10 #include <sys/queue.h>
11
12 #include <rte_mbuf.h>
13 #include <rte_ring.h>
14 #include <rte_ethdev.h>
15 #include <rte_sched.h>
16 #include <rte_ethdev_driver.h>
17 #include <rte_tm_driver.h>
18
19 #include "rte_eth_softnic.h"
20
21 #define NAME_SIZE                                            64
22
23 /**
24  * PMD Parameters
25  */
26
27 struct pmd_params {
28         const char *name;
29         const char *firmware;
30         uint32_t cpu_id;
31
32         /** Traffic Management (TM) */
33         struct {
34                 uint32_t n_queues; /**< Number of queues */
35                 uint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
36         } tm;
37 };
38
39 /**
40  * SWQ
41  */
42 struct softnic_swq_params {
43         uint32_t size;
44 };
45
46 struct softnic_swq {
47         TAILQ_ENTRY(softnic_swq) node;
48         char name[NAME_SIZE];
49         struct rte_ring *r;
50 };
51
52 TAILQ_HEAD(softnic_swq_list, softnic_swq);
53
54 /**
55  * Traffic Management (TM) Internals
56  */
57
58 #ifndef TM_MAX_SUBPORTS
59 #define TM_MAX_SUBPORTS                                 8
60 #endif
61
62 #ifndef TM_MAX_PIPES_PER_SUBPORT
63 #define TM_MAX_PIPES_PER_SUBPORT                        4096
64 #endif
65
66 struct tm_params {
67         struct rte_sched_port_params port_params;
68
69         struct rte_sched_subport_params subport_params[TM_MAX_SUBPORTS];
70
71         struct rte_sched_pipe_params
72                 pipe_profiles[RTE_SCHED_PIPE_PROFILES_PER_PORT];
73         uint32_t n_pipe_profiles;
74         uint32_t pipe_to_profile[TM_MAX_SUBPORTS * TM_MAX_PIPES_PER_SUBPORT];
75 };
76
77 /* TM Levels */
78 enum tm_node_level {
79         TM_NODE_LEVEL_PORT = 0,
80         TM_NODE_LEVEL_SUBPORT,
81         TM_NODE_LEVEL_PIPE,
82         TM_NODE_LEVEL_TC,
83         TM_NODE_LEVEL_QUEUE,
84         TM_NODE_LEVEL_MAX,
85 };
86
87 /* TM Shaper Profile */
88 struct tm_shaper_profile {
89         TAILQ_ENTRY(tm_shaper_profile) node;
90         uint32_t shaper_profile_id;
91         uint32_t n_users;
92         struct rte_tm_shaper_params params;
93 };
94
95 TAILQ_HEAD(tm_shaper_profile_list, tm_shaper_profile);
96
97 /* TM Shared Shaper */
98 struct tm_shared_shaper {
99         TAILQ_ENTRY(tm_shared_shaper) node;
100         uint32_t shared_shaper_id;
101         uint32_t n_users;
102         uint32_t shaper_profile_id;
103 };
104
105 TAILQ_HEAD(tm_shared_shaper_list, tm_shared_shaper);
106
107 /* TM WRED Profile */
108 struct tm_wred_profile {
109         TAILQ_ENTRY(tm_wred_profile) node;
110         uint32_t wred_profile_id;
111         uint32_t n_users;
112         struct rte_tm_wred_params params;
113 };
114
115 TAILQ_HEAD(tm_wred_profile_list, tm_wred_profile);
116
117 /* TM Node */
118 struct tm_node {
119         TAILQ_ENTRY(tm_node) node;
120         uint32_t node_id;
121         uint32_t parent_node_id;
122         uint32_t priority;
123         uint32_t weight;
124         uint32_t level;
125         struct tm_node *parent_node;
126         struct tm_shaper_profile *shaper_profile;
127         struct tm_wred_profile *wred_profile;
128         struct rte_tm_node_params params;
129         struct rte_tm_node_stats stats;
130         uint32_t n_children;
131 };
132
133 TAILQ_HEAD(tm_node_list, tm_node);
134
135 /* TM Hierarchy Specification */
136 struct tm_hierarchy {
137         struct tm_shaper_profile_list shaper_profiles;
138         struct tm_shared_shaper_list shared_shapers;
139         struct tm_wred_profile_list wred_profiles;
140         struct tm_node_list nodes;
141
142         uint32_t n_shaper_profiles;
143         uint32_t n_shared_shapers;
144         uint32_t n_wred_profiles;
145         uint32_t n_nodes;
146
147         uint32_t n_tm_nodes[TM_NODE_LEVEL_MAX];
148 };
149
150 struct tm_internals {
151         /** Hierarchy specification
152          *
153          *     -Hierarchy is unfrozen at init and when port is stopped.
154          *     -Hierarchy is frozen on successful hierarchy commit.
155          *     -Run-time hierarchy changes are not allowed, therefore it makes
156          *      sense to keep the hierarchy frozen after the port is started.
157          */
158         struct tm_hierarchy h;
159         int hierarchy_frozen;
160
161         /** Blueprints */
162         struct tm_params params;
163         struct rte_sched_port *sched;
164 };
165
166 /**
167  * PMD Internals
168  */
169 struct pmd_internals {
170         /** Params */
171         struct pmd_params params;
172
173         /** Soft device */
174         struct {
175                 struct tm_internals tm; /**< Traffic Management */
176         } soft;
177
178         struct softnic_swq_list swq_list;
179 };
180
181 /**
182  * SWQ
183  */
184 int
185 softnic_swq_init(struct pmd_internals *p);
186
187 void
188 softnic_swq_free(struct pmd_internals *p);
189
190 struct softnic_swq *
191 softnic_swq_find(struct pmd_internals *p,
192         const char *name);
193
194 struct softnic_swq *
195 softnic_swq_create(struct pmd_internals *p,
196         const char *name,
197         struct softnic_swq_params *params);
198
199 /**
200  * Traffic Management (TM) Operation
201  */
202 extern const struct rte_tm_ops pmd_tm_ops;
203
204 int
205 tm_init(struct pmd_internals *p, struct pmd_params *params, int numa_node);
206
207 void
208 tm_free(struct pmd_internals *p);
209
210 int
211 tm_start(struct pmd_internals *p);
212
213 void
214 tm_stop(struct pmd_internals *p);
215
216 static inline int
217 tm_used(struct rte_eth_dev *dev __rte_unused)
218 {
219         return 0;
220 }
221
222 #endif /* __INCLUDE_RTE_ETH_SOFTNIC_INTERNALS_H__ */