c9f2e78934aadcee6f643dc3af790ce2bab81ae2
[dpdk.git] / drivers / net / txgbe / base / txgbe_dummy.h
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2015-2020
3  */
4
5 #ifndef _TXGBE_TYPE_DUMMY_H_
6 #define _TXGBE_TYPE_DUMMY_H_
7
8 #ifdef TUP
9 #elif defined(__GNUC__)
10 #define TUP(x) x##_unused txgbe_unused
11 #elif defined(__LCLINT__)
12 #define TUP(x) x /*@unused@*/
13 #else
14 #define TUP(x) x
15 #endif /*TUP*/
16 #define TUP0 TUP(p0)
17 #define TUP1 TUP(p1)
18 #define TUP2 TUP(p2)
19 #define TUP3 TUP(p3)
20 #define TUP4 TUP(p4)
21 #define TUP5 TUP(p5)
22 #define TUP6 TUP(p6)
23 #define TUP7 TUP(p7)
24 #define TUP8 TUP(p8)
25 #define TUP9 TUP(p9)
26
27 /* struct txgbe_bus_operations */
28 static inline s32 txgbe_bus_get_bus_info_dummy(struct txgbe_hw *TUP0)
29 {
30         return TXGBE_ERR_OPS_DUMMY;
31 }
32 static inline void txgbe_bus_set_lan_id_dummy(struct txgbe_hw *TUP0)
33 {
34 }
35 /* struct txgbe_rom_operations */
36 static inline s32 txgbe_rom_init_params_dummy(struct txgbe_hw *TUP0)
37 {
38         return TXGBE_ERR_OPS_DUMMY;
39 }
40 static inline s32 txgbe_rom_read16_dummy(struct txgbe_hw *TUP0, u32 TUP1,
41                                         u16 *TUP2)
42 {
43         return TXGBE_ERR_OPS_DUMMY;
44 }
45 static inline s32 txgbe_rom_readw_buffer_dummy(struct txgbe_hw *TUP0, u32 TUP1,
46                                         u32 TUP2, void *TUP3)
47 {
48         return TXGBE_ERR_OPS_DUMMY;
49 }
50 static inline s32 txgbe_rom_readw_sw_dummy(struct txgbe_hw *TUP0, u32 TUP1,
51                                         u16 *TUP2)
52 {
53         return TXGBE_ERR_OPS_DUMMY;
54 }
55 static inline s32 txgbe_rom_read32_dummy(struct txgbe_hw *TUP0, u32 TUP1,
56                                         u32 *TUP2)
57 {
58         return TXGBE_ERR_OPS_DUMMY;
59 }
60 static inline s32 txgbe_rom_read_buffer_dummy(struct txgbe_hw *TUP0, u32 TUP1,
61                                         u32 TUP2, void *TUP3)
62 {
63         return TXGBE_ERR_OPS_DUMMY;
64 }
65 static inline s32 txgbe_rom_write16_dummy(struct txgbe_hw *TUP0, u32 TUP1,
66                                         u16 TUP2)
67 {
68         return TXGBE_ERR_OPS_DUMMY;
69 }
70 static inline s32 txgbe_rom_writew_buffer_dummy(struct txgbe_hw *TUP0, u32 TUP1,
71                                         u32 TUP2, void *TUP3)
72 {
73         return TXGBE_ERR_OPS_DUMMY;
74 }
75 static inline s32 txgbe_rom_writew_sw_dummy(struct txgbe_hw *TUP0, u32 TUP1,
76                                         u16 TUP2)
77 {
78         return TXGBE_ERR_OPS_DUMMY;
79 }
80 static inline s32 txgbe_rom_write32_dummy(struct txgbe_hw *TUP0, u32 TUP1,
81                                         u32 TUP2)
82 {
83         return TXGBE_ERR_OPS_DUMMY;
84 }
85 static inline s32 txgbe_rom_write_buffer_dummy(struct txgbe_hw *TUP0, u32 TUP1,
86                                         u32 TUP2, void *TUP3)
87 {
88         return TXGBE_ERR_OPS_DUMMY;
89 }
90 static inline s32 txgbe_rom_validate_checksum_dummy(struct txgbe_hw *TUP0,
91                                         u16 *TUP1)
92 {
93         return TXGBE_ERR_OPS_DUMMY;
94 }
95 static inline s32 txgbe_rom_update_checksum_dummy(struct txgbe_hw *TUP0)
96 {
97         return TXGBE_ERR_OPS_DUMMY;
98 }
99 static inline s32 txgbe_rom_calc_checksum_dummy(struct txgbe_hw *TUP0)
100 {
101         return TXGBE_ERR_OPS_DUMMY;
102 }
103
104 /* struct txgbe_mac_operations */
105 static inline s32 txgbe_mac_init_hw_dummy(struct txgbe_hw *TUP0)
106 {
107         return TXGBE_ERR_OPS_DUMMY;
108 }
109 static inline s32 txgbe_mac_reset_hw_dummy(struct txgbe_hw *TUP0)
110 {
111         return TXGBE_ERR_OPS_DUMMY;
112 }
113 static inline s32 txgbe_mac_start_hw_dummy(struct txgbe_hw *TUP0)
114 {
115         return TXGBE_ERR_OPS_DUMMY;
116 }
117 static inline s32 txgbe_mac_stop_hw_dummy(struct txgbe_hw *TUP0)
118 {
119         return TXGBE_ERR_OPS_DUMMY;
120 }
121 static inline s32 txgbe_mac_clear_hw_cntrs_dummy(struct txgbe_hw *TUP0)
122 {
123         return TXGBE_ERR_OPS_DUMMY;
124 }
125 static inline s32 txgbe_mac_get_mac_addr_dummy(struct txgbe_hw *TUP0, u8 *TUP1)
126 {
127         return TXGBE_ERR_OPS_DUMMY;
128 }
129 static inline s32 txgbe_mac_get_san_mac_addr_dummy(struct txgbe_hw *TUP0,
130                                         u8 *TUP1)
131 {
132         return TXGBE_ERR_OPS_DUMMY;
133 }
134 static inline s32 txgbe_mac_set_san_mac_addr_dummy(struct txgbe_hw *TUP0,
135                                         u8 *TUP1)
136 {
137         return TXGBE_ERR_OPS_DUMMY;
138 }
139 static inline s32 txgbe_mac_get_device_caps_dummy(struct txgbe_hw *TUP0,
140                                         u16 *TUP1)
141 {
142         return TXGBE_ERR_OPS_DUMMY;
143 }
144 static inline s32 txgbe_mac_get_wwn_prefix_dummy(struct txgbe_hw *TUP0,
145                                         u16 *TUP1, u16 *TUP2)
146 {
147         return TXGBE_ERR_OPS_DUMMY;
148 }
149 static inline s32 txgbe_mac_setup_sfp_dummy(struct txgbe_hw *TUP0)
150 {
151         return TXGBE_ERR_OPS_DUMMY;
152 }
153 static inline s32 txgbe_mac_enable_rx_dma_dummy(struct txgbe_hw *TUP0, u32 TUP1)
154 {
155         return TXGBE_ERR_OPS_DUMMY;
156 }
157 static inline s32 txgbe_mac_disable_sec_rx_path_dummy(struct txgbe_hw *TUP0)
158 {
159         return TXGBE_ERR_OPS_DUMMY;
160 }
161 static inline s32 txgbe_mac_enable_sec_rx_path_dummy(struct txgbe_hw *TUP0)
162 {
163         return TXGBE_ERR_OPS_DUMMY;
164 }
165 static inline s32 txgbe_mac_disable_sec_tx_path_dummy(struct txgbe_hw *TUP0)
166 {
167         return TXGBE_ERR_OPS_DUMMY;
168 }
169 static inline s32 txgbe_mac_enable_sec_tx_path_dummy(struct txgbe_hw *TUP0)
170 {
171         return TXGBE_ERR_OPS_DUMMY;
172 }
173 static inline s32 txgbe_mac_acquire_swfw_sync_dummy(struct txgbe_hw *TUP0,
174                                         u32 TUP1)
175 {
176         return TXGBE_ERR_OPS_DUMMY;
177 }
178 static inline void txgbe_mac_release_swfw_sync_dummy(struct txgbe_hw *TUP0,
179                                         u32 TUP1)
180 {
181 }
182 static inline u64 txgbe_mac_autoc_read_dummy(struct txgbe_hw *TUP0)
183 {
184         return 0;
185 }
186 static inline void txgbe_mac_autoc_write_dummy(struct txgbe_hw *TUP0, u64 TUP1)
187 {
188 }
189 static inline s32 txgbe_mac_prot_autoc_read_dummy(struct txgbe_hw *TUP0,
190                                         bool *TUP1, u64 *TUP2)
191 {
192         return TXGBE_ERR_OPS_DUMMY;
193 }
194 static inline s32 txgbe_mac_prot_autoc_write_dummy(struct txgbe_hw *TUP0,
195                                         bool TUP1, u64 TUP2)
196 {
197         return TXGBE_ERR_OPS_DUMMY;
198 }
199 static inline s32 txgbe_mac_negotiate_api_version_dummy(struct txgbe_hw *TUP0,
200                                         int TUP1)
201 {
202         return TXGBE_ERR_OPS_DUMMY;
203 }
204 static inline void txgbe_mac_disable_tx_laser_dummy(struct txgbe_hw *TUP0)
205 {
206 }
207 static inline void txgbe_mac_enable_tx_laser_dummy(struct txgbe_hw *TUP0)
208 {
209 }
210 static inline void txgbe_mac_flap_tx_laser_dummy(struct txgbe_hw *TUP0)
211 {
212 }
213 static inline s32 txgbe_mac_setup_link_dummy(struct txgbe_hw *TUP0, u32 TUP1,
214                                         bool TUP2)
215 {
216         return TXGBE_ERR_OPS_DUMMY;
217 }
218 static inline s32 txgbe_mac_setup_mac_link_dummy(struct txgbe_hw *TUP0,
219                                         u32 TUP1, bool TUP2)
220 {
221         return TXGBE_ERR_OPS_DUMMY;
222 }
223 static inline s32 txgbe_mac_check_link_dummy(struct txgbe_hw *TUP0, u32 *TUP1,
224                                         bool *TUP3, bool TUP4)
225 {
226         return TXGBE_ERR_OPS_DUMMY;
227 }
228 static inline s32 txgbe_mac_get_link_capabilities_dummy(struct txgbe_hw *TUP0,
229                                         u32 *TUP1, bool *TUP2)
230 {
231         return TXGBE_ERR_OPS_DUMMY;
232 }
233 static inline void txgbe_mac_set_rate_select_speed_dummy(struct txgbe_hw *TUP0,
234                                         u32 TUP1)
235 {
236 }
237 static inline void txgbe_mac_setup_pba_dummy(struct txgbe_hw *TUP0, int TUP1,
238                                         u32 TUP2, int TUP3)
239 {
240 }
241 static inline s32 txgbe_mac_led_on_dummy(struct txgbe_hw *TUP0, u32 TUP1)
242 {
243         return TXGBE_ERR_OPS_DUMMY;
244 }
245 static inline s32 txgbe_mac_led_off_dummy(struct txgbe_hw *TUP0, u32 TUP1)
246 {
247         return TXGBE_ERR_OPS_DUMMY;
248 }
249 static inline s32 txgbe_mac_set_rar_dummy(struct txgbe_hw *TUP0, u32 TUP1,
250                                         u8 *TUP2, u32 TUP3, u32 TUP4)
251 {
252         return TXGBE_ERR_OPS_DUMMY;
253 }
254 static inline s32 txgbe_mac_set_uc_addr_dummy(struct txgbe_hw *TUP0, u32 TUP1,
255                                         u8 *TUP2)
256 {
257         return TXGBE_ERR_OPS_DUMMY;
258 }
259 static inline s32 txgbe_mac_clear_rar_dummy(struct txgbe_hw *TUP0, u32 TUP1)
260 {
261         return TXGBE_ERR_OPS_DUMMY;
262 }
263 static inline s32 txgbe_mac_set_vmdq_dummy(struct txgbe_hw *TUP0, u32 TUP1,
264                                         u32 TUP2)
265 {
266         return TXGBE_ERR_OPS_DUMMY;
267 }
268 static inline s32 txgbe_mac_clear_vmdq_dummy(struct txgbe_hw *TUP0, u32 TUP1,
269                                         u32 TUP2)
270 {
271         return TXGBE_ERR_OPS_DUMMY;
272 }
273 static inline s32 txgbe_mac_init_rx_addrs_dummy(struct txgbe_hw *TUP0)
274 {
275         return TXGBE_ERR_OPS_DUMMY;
276 }
277 static inline s32 txgbe_mac_update_mc_addr_list_dummy(struct txgbe_hw *TUP0,
278                         u8 *TUP1, u32 TUP2, txgbe_mc_addr_itr TUP3, bool TUP4)
279 {
280         return TXGBE_ERR_OPS_DUMMY;
281 }
282 static inline s32 txgbe_mac_clear_vfta_dummy(struct txgbe_hw *TUP0)
283 {
284         return TXGBE_ERR_OPS_DUMMY;
285 }
286 static inline s32 txgbe_mac_set_vfta_dummy(struct txgbe_hw *TUP0, u32 TUP1,
287                                         u32 TUP2, bool TUP3, bool TUP4)
288 {
289         return TXGBE_ERR_OPS_DUMMY;
290 }
291 static inline s32 txgbe_mac_set_vlvf_dummy(struct txgbe_hw *TUP0, u32 TUP1,
292                         u32 TUP2, bool TUP3, u32 *TUP4, u32 TUP5, bool TUP6)
293 {
294         return TXGBE_ERR_OPS_DUMMY;
295 }
296 static inline s32 txgbe_mac_init_uta_tables_dummy(struct txgbe_hw *TUP0)
297 {
298         return TXGBE_ERR_OPS_DUMMY;
299 }
300 static inline void txgbe_mac_set_mac_anti_spoofing_dummy(struct txgbe_hw *TUP0,
301                                         bool TUP1, int TUP2)
302 {
303 }
304 static inline void txgbe_mac_set_vlan_anti_spoofing_dummy(struct txgbe_hw *TUP0,
305                                         bool TUP1, int TUP2)
306 {
307 }
308 static inline s32 txgbe_mac_update_xcast_mode_dummy(struct txgbe_hw *TUP0,
309                                         int TUP1)
310 {
311         return TXGBE_ERR_OPS_DUMMY;
312 }
313 static inline s32 txgbe_mac_set_rlpml_dummy(struct txgbe_hw *TUP0, u16 TUP1)
314 {
315         return TXGBE_ERR_OPS_DUMMY;
316 }
317 static inline s32 txgbe_mac_fc_enable_dummy(struct txgbe_hw *TUP0)
318 {
319         return TXGBE_ERR_OPS_DUMMY;
320 }
321 static inline s32 txgbe_mac_setup_fc_dummy(struct txgbe_hw *TUP0)
322 {
323         return TXGBE_ERR_OPS_DUMMY;
324 }
325 static inline void txgbe_mac_fc_autoneg_dummy(struct txgbe_hw *TUP0)
326 {
327 }
328 static inline s32 txgbe_mac_set_fw_drv_ver_dummy(struct txgbe_hw *TUP0, u8 TUP1,
329                         u8 TUP2, u8 TUP3, u8 TUP4, u16 TUP5, const char *TUP6)
330 {
331         return TXGBE_ERR_OPS_DUMMY;
332 }
333 static inline s32 txgbe_mac_get_thermal_sensor_data_dummy(struct txgbe_hw *TUP0)
334 {
335         return TXGBE_ERR_OPS_DUMMY;
336 }
337 static inline s32 txgbe_mac_init_thermal_ssth_dummy(struct txgbe_hw *TUP0)
338 {
339         return TXGBE_ERR_OPS_DUMMY;
340 }
341 static inline void txgbe_mac_get_rtrup2tc_dummy(struct txgbe_hw *TUP0, u8 *TUP1)
342 {
343 }
344 static inline void txgbe_mac_disable_rx_dummy(struct txgbe_hw *TUP0)
345 {
346 }
347 static inline void txgbe_mac_enable_rx_dummy(struct txgbe_hw *TUP0)
348 {
349 }
350 static inline void
351 txgbe_mac_set_ethertype_anti_spoofing_dummy(struct txgbe_hw *TUP0, bool TUP1,
352                                         int TUP2)
353 {
354 }
355 static inline s32 txgbe_mac_dmac_update_tcs_dummy(struct txgbe_hw *TUP0)
356 {
357         return TXGBE_ERR_OPS_DUMMY;
358 }
359 static inline s32 txgbe_mac_dmac_config_tcs_dummy(struct txgbe_hw *TUP0)
360 {
361         return TXGBE_ERR_OPS_DUMMY;
362 }
363 static inline s32 txgbe_mac_dmac_config_dummy(struct txgbe_hw *TUP0)
364 {
365         return TXGBE_ERR_OPS_DUMMY;
366 }
367 static inline s32 txgbe_mac_setup_eee_dummy(struct txgbe_hw *TUP0, bool TUP1)
368 {
369         return TXGBE_ERR_OPS_DUMMY;
370 }
371
372 /* struct txgbe_phy_operations */
373 static inline u32 txgbe_phy_get_media_type_dummy(struct txgbe_hw *TUP0)
374 {
375         return TXGBE_ERR_OPS_DUMMY;
376 }
377 static inline s32 txgbe_phy_identify_dummy(struct txgbe_hw *TUP0)
378 {
379         return TXGBE_ERR_OPS_DUMMY;
380 }
381 static inline s32 txgbe_phy_identify_sfp_dummy(struct txgbe_hw *TUP0)
382 {
383         return TXGBE_ERR_OPS_DUMMY;
384 }
385 static inline s32 txgbe_phy_init_dummy(struct txgbe_hw *TUP0)
386 {
387         return TXGBE_ERR_OPS_DUMMY;
388 }
389 static inline s32 txgbe_phy_reset_dummy(struct txgbe_hw *TUP0)
390 {
391         return TXGBE_ERR_OPS_DUMMY;
392 }
393 static inline s32 txgbe_phy_read_reg_dummy(struct txgbe_hw *TUP0, u32 TUP1,
394                                         u32 TUP2, u16 *TUP3)
395 {
396         return TXGBE_ERR_OPS_DUMMY;
397 }
398 static inline s32 txgbe_phy_write_reg_dummy(struct txgbe_hw *TUP0, u32 TUP1,
399                                         u32 TUP2, u16 TUP3)
400 {
401         return TXGBE_ERR_OPS_DUMMY;
402 }
403 static inline s32 txgbe_phy_read_reg_mdi_dummy(struct txgbe_hw *TUP0, u32 TUP1,
404                                         u32 TUP2, u16 *TUP3)
405 {
406         return TXGBE_ERR_OPS_DUMMY;
407 }
408 static inline s32 txgbe_phy_write_reg_mdi_dummy(struct txgbe_hw *TUP0, u32 TUP1,
409                                         u32 TUP2, u16 TUP3)
410 {
411         return TXGBE_ERR_OPS_DUMMY;
412 }
413 static inline s32 txgbe_phy_setup_link_dummy(struct txgbe_hw *TUP0)
414 {
415         return TXGBE_ERR_OPS_DUMMY;
416 }
417 static inline s32 txgbe_phy_setup_link_speed_dummy(struct txgbe_hw *TUP0,
418                                         u32 TUP1, bool TUP2)
419 {
420         return TXGBE_ERR_OPS_DUMMY;
421 }
422 static inline s32 txgbe_phy_check_link_dummy(struct txgbe_hw *TUP0, u32 *TUP1,
423                                         bool *TUP2)
424 {
425         return TXGBE_ERR_OPS_DUMMY;
426 }
427 static inline s32 txgbe_phy_read_i2c_byte_dummy(struct txgbe_hw *TUP0, u8 TUP1,
428                                         u8 TUP2, u8 *TUP3)
429 {
430         return TXGBE_ERR_OPS_DUMMY;
431 }
432 static inline s32 txgbe_phy_write_i2c_byte_dummy(struct txgbe_hw *TUP0, u8 TUP1,
433                                         u8 TUP2, u8 TUP3)
434 {
435         return TXGBE_ERR_OPS_DUMMY;
436 }
437 static inline s32 txgbe_phy_read_i2c_sff8472_dummy(struct txgbe_hw *TUP0,
438                                         u8 TUP1, u8 *TUP2)
439 {
440         return TXGBE_ERR_OPS_DUMMY;
441 }
442 static inline s32 txgbe_phy_read_i2c_eeprom_dummy(struct txgbe_hw *TUP0,
443                                         u8 TUP1, u8 *TUP2)
444 {
445         return TXGBE_ERR_OPS_DUMMY;
446 }
447 static inline s32 txgbe_phy_write_i2c_eeprom_dummy(struct txgbe_hw *TUP0,
448                                         u8 TUP1, u8 TUP2)
449 {
450         return TXGBE_ERR_OPS_DUMMY;
451 }
452 static inline s32 txgbe_phy_check_overtemp_dummy(struct txgbe_hw *TUP0)
453 {
454         return TXGBE_ERR_OPS_DUMMY;
455 }
456 static inline s32 txgbe_phy_set_phy_power_dummy(struct txgbe_hw *TUP0,
457                                         bool TUP1)
458 {
459         return TXGBE_ERR_OPS_DUMMY;
460 }
461 static inline s32 txgbe_phy_handle_lasi_dummy(struct txgbe_hw *TUP0)
462 {
463         return TXGBE_ERR_OPS_DUMMY;
464 }
465 static inline s32 txgbe_phy_read_i2c_byte_unlocked_dummy(struct txgbe_hw *TUP0,
466                                         u8 TUP1, u8 TUP2, u8 *TUP3)
467 {
468         return TXGBE_ERR_OPS_DUMMY;
469 }
470 static inline s32 txgbe_phy_write_i2c_byte_unlocked_dummy(struct txgbe_hw *TUP0,
471                                         u8 TUP1, u8 TUP2, u8 TUP3)
472 {
473         return TXGBE_ERR_OPS_DUMMY;
474 }
475
476 /* struct txgbe_link_operations */
477 static inline s32 txgbe_link_read_link_dummy(struct txgbe_hw *TUP0, u8 TUP1,
478                                         u16 TUP2, u16 *TUP3)
479 {
480         return TXGBE_ERR_OPS_DUMMY;
481 }
482 static inline s32 txgbe_link_read_link_unlocked_dummy(struct txgbe_hw *TUP0,
483                                         u8 TUP1, u16 TUP2, u16 *TUP3)
484 {
485         return TXGBE_ERR_OPS_DUMMY;
486 }
487 static inline s32 txgbe_link_write_link_dummy(struct txgbe_hw *TUP0, u8 TUP1,
488                                         u16 TUP2, u16 TUP3)
489 {
490         return TXGBE_ERR_OPS_DUMMY;
491 }
492 static inline s32 txgbe_link_write_link_unlocked_dummy(struct txgbe_hw *TUP0,
493                                         u8 TUP1, u16 TUP2, u16 TUP3)
494 {
495         return TXGBE_ERR_OPS_DUMMY;
496 }
497
498 /* struct txgbe_mbx_operations */
499 static inline void txgbe_mbx_init_params_dummy(struct txgbe_hw *TUP0)
500 {
501 }
502 static inline s32 txgbe_mbx_read_dummy(struct txgbe_hw *TUP0, u32 *TUP1,
503                                         u16 TUP2, u16 TUP3)
504 {
505         return TXGBE_ERR_OPS_DUMMY;
506 }
507 static inline s32 txgbe_mbx_write_dummy(struct txgbe_hw *TUP0, u32 *TUP1,
508                                         u16 TUP2, u16 TUP3)
509 {
510         return TXGBE_ERR_OPS_DUMMY;
511 }
512 static inline s32 txgbe_mbx_read_posted_dummy(struct txgbe_hw *TUP0, u32 *TUP1,
513                                         u16 TUP2, u16 TUP3)
514 {
515         return TXGBE_ERR_OPS_DUMMY;
516 }
517 static inline s32 txgbe_mbx_write_posted_dummy(struct txgbe_hw *TUP0, u32 *TUP1,
518                                         u16 TUP2, u16 TUP4)
519 {
520         return TXGBE_ERR_OPS_DUMMY;
521 }
522 static inline s32 txgbe_mbx_check_for_msg_dummy(struct txgbe_hw *TUP0, u16 TUP1)
523 {
524         return TXGBE_ERR_OPS_DUMMY;
525 }
526 static inline s32 txgbe_mbx_check_for_ack_dummy(struct txgbe_hw *TUP0, u16 TUP1)
527 {
528         return TXGBE_ERR_OPS_DUMMY;
529 }
530 static inline s32 txgbe_mbx_check_for_rst_dummy(struct txgbe_hw *TUP0, u16 TUP1)
531 {
532         return TXGBE_ERR_OPS_DUMMY;
533 }
534
535
536 static inline void txgbe_init_ops_dummy(struct txgbe_hw *hw)
537 {
538         hw->bus.get_bus_info = txgbe_bus_get_bus_info_dummy;
539         hw->bus.set_lan_id = txgbe_bus_set_lan_id_dummy;
540         hw->rom.init_params = txgbe_rom_init_params_dummy;
541         hw->rom.read16 = txgbe_rom_read16_dummy;
542         hw->rom.readw_buffer = txgbe_rom_readw_buffer_dummy;
543         hw->rom.readw_sw = txgbe_rom_readw_sw_dummy;
544         hw->rom.read32 = txgbe_rom_read32_dummy;
545         hw->rom.read_buffer = txgbe_rom_read_buffer_dummy;
546         hw->rom.write16 = txgbe_rom_write16_dummy;
547         hw->rom.writew_buffer = txgbe_rom_writew_buffer_dummy;
548         hw->rom.writew_sw = txgbe_rom_writew_sw_dummy;
549         hw->rom.write32 = txgbe_rom_write32_dummy;
550         hw->rom.write_buffer = txgbe_rom_write_buffer_dummy;
551         hw->rom.validate_checksum = txgbe_rom_validate_checksum_dummy;
552         hw->rom.update_checksum = txgbe_rom_update_checksum_dummy;
553         hw->rom.calc_checksum = txgbe_rom_calc_checksum_dummy;
554         hw->mac.init_hw = txgbe_mac_init_hw_dummy;
555         hw->mac.reset_hw = txgbe_mac_reset_hw_dummy;
556         hw->mac.start_hw = txgbe_mac_start_hw_dummy;
557         hw->mac.stop_hw = txgbe_mac_stop_hw_dummy;
558         hw->mac.clear_hw_cntrs = txgbe_mac_clear_hw_cntrs_dummy;
559         hw->mac.get_mac_addr = txgbe_mac_get_mac_addr_dummy;
560         hw->mac.get_san_mac_addr = txgbe_mac_get_san_mac_addr_dummy;
561         hw->mac.set_san_mac_addr = txgbe_mac_set_san_mac_addr_dummy;
562         hw->mac.get_device_caps = txgbe_mac_get_device_caps_dummy;
563         hw->mac.get_wwn_prefix = txgbe_mac_get_wwn_prefix_dummy;
564         hw->mac.setup_sfp = txgbe_mac_setup_sfp_dummy;
565         hw->mac.enable_rx_dma = txgbe_mac_enable_rx_dma_dummy;
566         hw->mac.disable_sec_rx_path = txgbe_mac_disable_sec_rx_path_dummy;
567         hw->mac.enable_sec_rx_path = txgbe_mac_enable_sec_rx_path_dummy;
568         hw->mac.disable_sec_tx_path = txgbe_mac_disable_sec_tx_path_dummy;
569         hw->mac.enable_sec_tx_path = txgbe_mac_enable_sec_tx_path_dummy;
570         hw->mac.acquire_swfw_sync = txgbe_mac_acquire_swfw_sync_dummy;
571         hw->mac.release_swfw_sync = txgbe_mac_release_swfw_sync_dummy;
572         hw->mac.autoc_read = txgbe_mac_autoc_read_dummy;
573         hw->mac.autoc_write = txgbe_mac_autoc_write_dummy;
574         hw->mac.prot_autoc_read = txgbe_mac_prot_autoc_read_dummy;
575         hw->mac.prot_autoc_write = txgbe_mac_prot_autoc_write_dummy;
576         hw->mac.negotiate_api_version = txgbe_mac_negotiate_api_version_dummy;
577         hw->mac.disable_tx_laser = txgbe_mac_disable_tx_laser_dummy;
578         hw->mac.enable_tx_laser = txgbe_mac_enable_tx_laser_dummy;
579         hw->mac.flap_tx_laser = txgbe_mac_flap_tx_laser_dummy;
580         hw->mac.setup_link = txgbe_mac_setup_link_dummy;
581         hw->mac.setup_mac_link = txgbe_mac_setup_mac_link_dummy;
582         hw->mac.check_link = txgbe_mac_check_link_dummy;
583         hw->mac.get_link_capabilities = txgbe_mac_get_link_capabilities_dummy;
584         hw->mac.set_rate_select_speed = txgbe_mac_set_rate_select_speed_dummy;
585         hw->mac.setup_pba = txgbe_mac_setup_pba_dummy;
586         hw->mac.led_on = txgbe_mac_led_on_dummy;
587         hw->mac.led_off = txgbe_mac_led_off_dummy;
588         hw->mac.set_rar = txgbe_mac_set_rar_dummy;
589         hw->mac.set_uc_addr = txgbe_mac_set_uc_addr_dummy;
590         hw->mac.clear_rar = txgbe_mac_clear_rar_dummy;
591         hw->mac.set_vmdq = txgbe_mac_set_vmdq_dummy;
592         hw->mac.clear_vmdq = txgbe_mac_clear_vmdq_dummy;
593         hw->mac.init_rx_addrs = txgbe_mac_init_rx_addrs_dummy;
594         hw->mac.update_mc_addr_list = txgbe_mac_update_mc_addr_list_dummy;
595         hw->mac.clear_vfta = txgbe_mac_clear_vfta_dummy;
596         hw->mac.set_vfta = txgbe_mac_set_vfta_dummy;
597         hw->mac.set_vlvf = txgbe_mac_set_vlvf_dummy;
598         hw->mac.init_uta_tables = txgbe_mac_init_uta_tables_dummy;
599         hw->mac.set_mac_anti_spoofing = txgbe_mac_set_mac_anti_spoofing_dummy;
600         hw->mac.set_vlan_anti_spoofing = txgbe_mac_set_vlan_anti_spoofing_dummy;
601         hw->mac.update_xcast_mode = txgbe_mac_update_xcast_mode_dummy;
602         hw->mac.set_rlpml = txgbe_mac_set_rlpml_dummy;
603         hw->mac.fc_enable = txgbe_mac_fc_enable_dummy;
604         hw->mac.setup_fc = txgbe_mac_setup_fc_dummy;
605         hw->mac.fc_autoneg = txgbe_mac_fc_autoneg_dummy;
606         hw->mac.set_fw_drv_ver = txgbe_mac_set_fw_drv_ver_dummy;
607         hw->mac.get_thermal_sensor_data =
608                         txgbe_mac_get_thermal_sensor_data_dummy;
609         hw->mac.init_thermal_sensor_thresh = txgbe_mac_init_thermal_ssth_dummy;
610         hw->mac.get_rtrup2tc = txgbe_mac_get_rtrup2tc_dummy;
611         hw->mac.disable_rx = txgbe_mac_disable_rx_dummy;
612         hw->mac.enable_rx = txgbe_mac_enable_rx_dummy;
613         hw->mac.set_ethertype_anti_spoofing =
614                         txgbe_mac_set_ethertype_anti_spoofing_dummy;
615         hw->mac.dmac_update_tcs = txgbe_mac_dmac_update_tcs_dummy;
616         hw->mac.dmac_config_tcs = txgbe_mac_dmac_config_tcs_dummy;
617         hw->mac.dmac_config = txgbe_mac_dmac_config_dummy;
618         hw->mac.setup_eee = txgbe_mac_setup_eee_dummy;
619         hw->phy.get_media_type = txgbe_phy_get_media_type_dummy;
620         hw->phy.identify = txgbe_phy_identify_dummy;
621         hw->phy.identify_sfp = txgbe_phy_identify_sfp_dummy;
622         hw->phy.init = txgbe_phy_init_dummy;
623         hw->phy.reset = txgbe_phy_reset_dummy;
624         hw->phy.read_reg = txgbe_phy_read_reg_dummy;
625         hw->phy.write_reg = txgbe_phy_write_reg_dummy;
626         hw->phy.read_reg_mdi = txgbe_phy_read_reg_mdi_dummy;
627         hw->phy.write_reg_mdi = txgbe_phy_write_reg_mdi_dummy;
628         hw->phy.setup_link = txgbe_phy_setup_link_dummy;
629         hw->phy.setup_link_speed = txgbe_phy_setup_link_speed_dummy;
630         hw->phy.check_link = txgbe_phy_check_link_dummy;
631         hw->phy.read_i2c_byte = txgbe_phy_read_i2c_byte_dummy;
632         hw->phy.write_i2c_byte = txgbe_phy_write_i2c_byte_dummy;
633         hw->phy.read_i2c_sff8472 = txgbe_phy_read_i2c_sff8472_dummy;
634         hw->phy.read_i2c_eeprom = txgbe_phy_read_i2c_eeprom_dummy;
635         hw->phy.write_i2c_eeprom = txgbe_phy_write_i2c_eeprom_dummy;
636         hw->phy.check_overtemp = txgbe_phy_check_overtemp_dummy;
637         hw->phy.set_phy_power = txgbe_phy_set_phy_power_dummy;
638         hw->phy.handle_lasi = txgbe_phy_handle_lasi_dummy;
639         hw->phy.read_i2c_byte_unlocked = txgbe_phy_read_i2c_byte_unlocked_dummy;
640         hw->phy.write_i2c_byte_unlocked =
641                         txgbe_phy_write_i2c_byte_unlocked_dummy;
642         hw->link.read_link = txgbe_link_read_link_dummy;
643         hw->link.read_link_unlocked = txgbe_link_read_link_unlocked_dummy;
644         hw->link.write_link = txgbe_link_write_link_dummy;
645         hw->link.write_link_unlocked = txgbe_link_write_link_unlocked_dummy;
646         hw->mbx.init_params = txgbe_mbx_init_params_dummy;
647         hw->mbx.read = txgbe_mbx_read_dummy;
648         hw->mbx.write = txgbe_mbx_write_dummy;
649         hw->mbx.read_posted = txgbe_mbx_read_posted_dummy;
650         hw->mbx.write_posted = txgbe_mbx_write_posted_dummy;
651         hw->mbx.check_for_msg = txgbe_mbx_check_for_msg_dummy;
652         hw->mbx.check_for_ack = txgbe_mbx_check_for_ack_dummy;
653         hw->mbx.check_for_rst = txgbe_mbx_check_for_rst_dummy;
654 }
655
656 #endif /* _TXGBE_TYPE_DUMMY_H_ */
657