a5c9ba5c177ccbdef460a340331bff6157bcc6b5
[dpdk.git] / drivers / net / vmxnet3 / vmxnet3_ethdev.c
1 /*-
2  *   BSD LICENSE
3  *
4  *   Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
5  *   All rights reserved.
6  *
7  *   Redistribution and use in source and binary forms, with or without
8  *   modification, are permitted provided that the following conditions
9  *   are met:
10  *
11  *     * Redistributions of source code must retain the above copyright
12  *       notice, this list of conditions and the following disclaimer.
13  *     * Redistributions in binary form must reproduce the above copyright
14  *       notice, this list of conditions and the following disclaimer in
15  *       the documentation and/or other materials provided with the
16  *       distribution.
17  *     * Neither the name of Intel Corporation nor the names of its
18  *       contributors may be used to endorse or promote products derived
19  *       from this software without specific prior written permission.
20  *
21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33
34 #include <sys/queue.h>
35 #include <stdio.h>
36 #include <errno.h>
37 #include <stdint.h>
38 #include <string.h>
39 #include <unistd.h>
40 #include <stdarg.h>
41 #include <fcntl.h>
42 #include <inttypes.h>
43 #include <rte_byteorder.h>
44 #include <rte_common.h>
45 #include <rte_cycles.h>
46
47 #include <rte_interrupts.h>
48 #include <rte_log.h>
49 #include <rte_debug.h>
50 #include <rte_pci.h>
51 #include <rte_atomic.h>
52 #include <rte_branch_prediction.h>
53 #include <rte_memory.h>
54 #include <rte_memzone.h>
55 #include <rte_eal.h>
56 #include <rte_alarm.h>
57 #include <rte_ether.h>
58 #include <rte_ethdev.h>
59 #include <rte_atomic.h>
60 #include <rte_string_fns.h>
61 #include <rte_malloc.h>
62 #include <rte_dev.h>
63
64 #include "base/vmxnet3_defs.h"
65
66 #include "vmxnet3_ring.h"
67 #include "vmxnet3_logs.h"
68 #include "vmxnet3_ethdev.h"
69
70 #define PROCESS_SYS_EVENTS 0
71
72 static int eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev);
73 static int eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev);
74 static int vmxnet3_dev_configure(struct rte_eth_dev *dev);
75 static int vmxnet3_dev_start(struct rte_eth_dev *dev);
76 static void vmxnet3_dev_stop(struct rte_eth_dev *dev);
77 static void vmxnet3_dev_close(struct rte_eth_dev *dev);
78 static void vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set);
79 static void vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev);
80 static void vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev);
81 static void vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev);
82 static void vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev);
83 static int vmxnet3_dev_link_update(struct rte_eth_dev *dev,
84                                 int wait_to_complete);
85 static void vmxnet3_dev_stats_get(struct rte_eth_dev *dev,
86                                 struct rte_eth_stats *stats);
87 static void vmxnet3_dev_info_get(struct rte_eth_dev *dev,
88                                 struct rte_eth_dev_info *dev_info);
89 static int vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev,
90                                        uint16_t vid, int on);
91 static void vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask);
92 static void vmxnet3_mac_addr_set(struct rte_eth_dev *dev,
93                                  struct ether_addr *mac_addr);
94
95 #if PROCESS_SYS_EVENTS == 1
96 static void vmxnet3_process_events(struct vmxnet3_hw *);
97 #endif
98 /*
99  * The set of PCI devices this driver supports
100  */
101 static const struct rte_pci_id pci_id_vmxnet3_map[] = {
102
103 #define RTE_PCI_DEV_ID_DECL_VMXNET3(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
104 #include "rte_pci_dev_ids.h"
105
106 { .vendor_id = 0, /* sentinel */ },
107 };
108
109 static const struct eth_dev_ops vmxnet3_eth_dev_ops = {
110         .dev_configure        = vmxnet3_dev_configure,
111         .dev_start            = vmxnet3_dev_start,
112         .dev_stop             = vmxnet3_dev_stop,
113         .dev_close            = vmxnet3_dev_close,
114         .promiscuous_enable   = vmxnet3_dev_promiscuous_enable,
115         .promiscuous_disable  = vmxnet3_dev_promiscuous_disable,
116         .allmulticast_enable  = vmxnet3_dev_allmulticast_enable,
117         .allmulticast_disable = vmxnet3_dev_allmulticast_disable,
118         .link_update          = vmxnet3_dev_link_update,
119         .stats_get            = vmxnet3_dev_stats_get,
120         .mac_addr_set         = vmxnet3_mac_addr_set,
121         .dev_infos_get        = vmxnet3_dev_info_get,
122         .vlan_filter_set      = vmxnet3_dev_vlan_filter_set,
123         .vlan_offload_set     = vmxnet3_dev_vlan_offload_set,
124         .rx_queue_setup       = vmxnet3_dev_rx_queue_setup,
125         .rx_queue_release     = vmxnet3_dev_rx_queue_release,
126         .tx_queue_setup       = vmxnet3_dev_tx_queue_setup,
127         .tx_queue_release     = vmxnet3_dev_tx_queue_release,
128 };
129
130 static const struct rte_memzone *
131 gpa_zone_reserve(struct rte_eth_dev *dev, uint32_t size,
132                 const char *post_string, int socket_id, uint16_t align)
133 {
134         char z_name[RTE_MEMZONE_NAMESIZE];
135         const struct rte_memzone *mz;
136
137         snprintf(z_name, sizeof(z_name), "%s_%d_%s",
138                                         dev->driver->pci_drv.name, dev->data->port_id, post_string);
139
140         mz = rte_memzone_lookup(z_name);
141         if (mz)
142                 return mz;
143
144         return rte_memzone_reserve_aligned(z_name, size,
145                         socket_id, 0, align);
146 }
147
148 /**
149  * Atomically reads the link status information from global
150  * structure rte_eth_dev.
151  *
152  * @param dev
153  *   - Pointer to the structure rte_eth_dev to read from.
154  *   - Pointer to the buffer to be saved with the link status.
155  *
156  * @return
157  *   - On success, zero.
158  *   - On failure, negative value.
159  */
160
161 static int
162 vmxnet3_dev_atomic_read_link_status(struct rte_eth_dev *dev,
163                                     struct rte_eth_link *link)
164 {
165         struct rte_eth_link *dst = link;
166         struct rte_eth_link *src = &(dev->data->dev_link);
167
168         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
169                                 *(uint64_t *)src) == 0)
170                 return -1;
171
172         return 0;
173 }
174
175 /**
176  * Atomically writes the link status information into global
177  * structure rte_eth_dev.
178  *
179  * @param dev
180  *   - Pointer to the structure rte_eth_dev to write to.
181  *   - Pointer to the buffer to be saved with the link status.
182  *
183  * @return
184  *   - On success, zero.
185  *   - On failure, negative value.
186  */
187 static int
188 vmxnet3_dev_atomic_write_link_status(struct rte_eth_dev *dev,
189                                      struct rte_eth_link *link)
190 {
191         struct rte_eth_link *dst = &(dev->data->dev_link);
192         struct rte_eth_link *src = link;
193
194         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
195                                         *(uint64_t *)src) == 0)
196                 return -1;
197
198         return 0;
199 }
200
201 /*
202  * This function is based on vmxnet3_disable_intr()
203  */
204 static void
205 vmxnet3_disable_intr(struct vmxnet3_hw *hw)
206 {
207         int i;
208
209         PMD_INIT_FUNC_TRACE();
210
211         hw->shared->devRead.intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
212         for (i = 0; i < VMXNET3_MAX_INTRS; i++)
213                         VMXNET3_WRITE_BAR0_REG(hw, VMXNET3_REG_IMR + i * 8, 1);
214 }
215
216 /*
217  * It returns 0 on success.
218  */
219 static int
220 eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev)
221 {
222         struct rte_pci_device *pci_dev;
223         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
224         uint32_t mac_hi, mac_lo, ver;
225
226         PMD_INIT_FUNC_TRACE();
227
228         eth_dev->dev_ops = &vmxnet3_eth_dev_ops;
229         eth_dev->rx_pkt_burst = &vmxnet3_recv_pkts;
230         eth_dev->tx_pkt_burst = &vmxnet3_xmit_pkts;
231         pci_dev = eth_dev->pci_dev;
232
233         /*
234          * for secondary processes, we don't initialize any further as primary
235          * has already done this work.
236          */
237         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
238                 return 0;
239
240         rte_eth_copy_pci_info(eth_dev, pci_dev);
241
242         /* Vendor and Device ID need to be set before init of shared code */
243         hw->device_id = pci_dev->id.device_id;
244         hw->vendor_id = pci_dev->id.vendor_id;
245         hw->hw_addr0 = (void *)pci_dev->mem_resource[0].addr;
246         hw->hw_addr1 = (void *)pci_dev->mem_resource[1].addr;
247
248         hw->num_rx_queues = 1;
249         hw->num_tx_queues = 1;
250         hw->bufs_per_pkt = 1;
251
252         /* Check h/w version compatibility with driver. */
253         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_VRRS);
254         PMD_INIT_LOG(DEBUG, "Hardware version : %d", ver);
255         if (ver & 0x1)
256                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS, 1);
257         else {
258                 PMD_INIT_LOG(ERR, "Incompatible h/w version, should be 0x1");
259                 return -EIO;
260         }
261
262         /* Check UPT version compatibility with driver. */
263         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_UVRS);
264         PMD_INIT_LOG(DEBUG, "UPT hardware version : %d", ver);
265         if (ver & 0x1)
266                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_UVRS, 1);
267         else {
268                 PMD_INIT_LOG(ERR, "Incompatible UPT version.");
269                 return -EIO;
270         }
271
272         /* Getting MAC Address */
273         mac_lo = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACL);
274         mac_hi = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACH);
275         memcpy(hw->perm_addr  , &mac_lo, 4);
276         memcpy(hw->perm_addr+4, &mac_hi, 2);
277
278         /* Allocate memory for storing MAC addresses */
279         eth_dev->data->mac_addrs = rte_zmalloc("vmxnet3", ETHER_ADDR_LEN *
280                                                VMXNET3_MAX_MAC_ADDRS, 0);
281         if (eth_dev->data->mac_addrs == NULL) {
282                 PMD_INIT_LOG(ERR,
283                              "Failed to allocate %d bytes needed to store MAC addresses",
284                              ETHER_ADDR_LEN * VMXNET3_MAX_MAC_ADDRS);
285                 return -ENOMEM;
286         }
287         /* Copy the permanent MAC address */
288         ether_addr_copy((struct ether_addr *) hw->perm_addr,
289                         &eth_dev->data->mac_addrs[0]);
290
291         PMD_INIT_LOG(DEBUG, "MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
292                      hw->perm_addr[0], hw->perm_addr[1], hw->perm_addr[2],
293                      hw->perm_addr[3], hw->perm_addr[4], hw->perm_addr[5]);
294
295         /* Put device in Quiesce Mode */
296         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
297
298         /* allow untagged pkts */
299         VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, 0);
300
301         return 0;
302 }
303
304 static int
305 eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev)
306 {
307         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
308
309         PMD_INIT_FUNC_TRACE();
310
311         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
312                 return 0;
313
314         if (hw->adapter_stopped == 0)
315                 vmxnet3_dev_close(eth_dev);
316
317         eth_dev->dev_ops = NULL;
318         eth_dev->rx_pkt_burst = NULL;
319         eth_dev->tx_pkt_burst = NULL;
320
321         rte_free(eth_dev->data->mac_addrs);
322         eth_dev->data->mac_addrs = NULL;
323
324         return 0;
325 }
326
327 static struct eth_driver rte_vmxnet3_pmd = {
328         .pci_drv = {
329                 .name = "rte_vmxnet3_pmd",
330                 .id_table = pci_id_vmxnet3_map,
331                 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_DETACHABLE,
332         },
333         .eth_dev_init = eth_vmxnet3_dev_init,
334         .eth_dev_uninit = eth_vmxnet3_dev_uninit,
335         .dev_private_size = sizeof(struct vmxnet3_hw),
336 };
337
338 /*
339  * Driver initialization routine.
340  * Invoked once at EAL init time.
341  * Register itself as the [Poll Mode] Driver of Virtual PCI VMXNET3 devices.
342  */
343 static int
344 rte_vmxnet3_pmd_init(const char *name __rte_unused, const char *param __rte_unused)
345 {
346         PMD_INIT_FUNC_TRACE();
347
348         rte_eth_driver_register(&rte_vmxnet3_pmd);
349         return 0;
350 }
351
352 static int
353 vmxnet3_dev_configure(struct rte_eth_dev *dev)
354 {
355         const struct rte_memzone *mz;
356         struct vmxnet3_hw *hw = dev->data->dev_private;
357         size_t size;
358
359         PMD_INIT_FUNC_TRACE();
360
361         if (dev->data->nb_rx_queues > UINT8_MAX ||
362             dev->data->nb_tx_queues > UINT8_MAX)
363                 return -EINVAL;
364
365         size = dev->data->nb_rx_queues * sizeof(struct Vmxnet3_TxQueueDesc) +
366                 dev->data->nb_tx_queues * sizeof(struct Vmxnet3_RxQueueDesc);
367
368         if (size > UINT16_MAX)
369                 return -EINVAL;
370
371         hw->num_rx_queues = (uint8_t)dev->data->nb_rx_queues;
372         hw->num_tx_queues = (uint8_t)dev->data->nb_tx_queues;
373
374         /*
375          * Allocate a memzone for Vmxnet3_DriverShared - Vmxnet3_DSDevRead
376          * on current socket
377          */
378         mz = gpa_zone_reserve(dev, sizeof(struct Vmxnet3_DriverShared),
379                               "shared", rte_socket_id(), 8);
380
381         if (mz == NULL) {
382                 PMD_INIT_LOG(ERR, "ERROR: Creating shared zone");
383                 return -ENOMEM;
384         }
385         memset(mz->addr, 0, mz->len);
386
387         hw->shared = mz->addr;
388         hw->sharedPA = mz->phys_addr;
389
390         /*
391          * Allocate a memzone for Vmxnet3_RxQueueDesc - Vmxnet3_TxQueueDesc
392          * on current socket
393          */
394         mz = gpa_zone_reserve(dev, size, "queuedesc",
395                               rte_socket_id(), VMXNET3_QUEUE_DESC_ALIGN);
396         if (mz == NULL) {
397                 PMD_INIT_LOG(ERR, "ERROR: Creating queue descriptors zone");
398                 return -ENOMEM;
399         }
400         memset(mz->addr, 0, mz->len);
401
402         hw->tqd_start = (Vmxnet3_TxQueueDesc *)mz->addr;
403         hw->rqd_start = (Vmxnet3_RxQueueDesc *)(hw->tqd_start + hw->num_tx_queues);
404
405         hw->queueDescPA = mz->phys_addr;
406         hw->queue_desc_len = (uint16_t)size;
407
408         if (dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
409
410                 /* Allocate memory structure for UPT1_RSSConf and configure */
411                 mz = gpa_zone_reserve(dev, sizeof(struct VMXNET3_RSSConf), "rss_conf",
412                                       rte_socket_id(), RTE_CACHE_LINE_SIZE);
413                 if (mz == NULL) {
414                         PMD_INIT_LOG(ERR,
415                                      "ERROR: Creating rss_conf structure zone");
416                         return -ENOMEM;
417                 }
418                 memset(mz->addr, 0, mz->len);
419
420                 hw->rss_conf = mz->addr;
421                 hw->rss_confPA = mz->phys_addr;
422         }
423
424         return 0;
425 }
426
427 static void
428 vmxnet3_write_mac(struct vmxnet3_hw *hw, const uint8_t *addr)
429 {
430         uint32_t val;
431
432         PMD_INIT_LOG(DEBUG,
433                      "Writing MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
434                      addr[0], addr[1], addr[2],
435                      addr[3], addr[4], addr[5]);
436
437         val = *(const uint32_t *)addr;
438         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACL, val);
439
440         val = (addr[5] << 8) | addr[4];
441         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACH, val);
442 }
443
444 static int
445 vmxnet3_setup_driver_shared(struct rte_eth_dev *dev)
446 {
447         struct rte_eth_conf port_conf = dev->data->dev_conf;
448         struct vmxnet3_hw *hw = dev->data->dev_private;
449         uint32_t mtu = dev->data->mtu;
450         Vmxnet3_DriverShared *shared = hw->shared;
451         Vmxnet3_DSDevRead *devRead = &shared->devRead;
452         uint32_t i;
453         int ret;
454
455         shared->magic = VMXNET3_REV1_MAGIC;
456         devRead->misc.driverInfo.version = VMXNET3_DRIVER_VERSION_NUM;
457
458         /* Setting up Guest OS information */
459         devRead->misc.driverInfo.gos.gosBits   = sizeof(void *) == 4 ?
460                 VMXNET3_GOS_BITS_32 :
461                 VMXNET3_GOS_BITS_64;
462         devRead->misc.driverInfo.gos.gosType   = VMXNET3_GOS_TYPE_LINUX;
463         devRead->misc.driverInfo.vmxnet3RevSpt = 1;
464         devRead->misc.driverInfo.uptVerSpt     = 1;
465
466         devRead->misc.mtu = rte_le_to_cpu_32(mtu);
467         devRead->misc.queueDescPA  = hw->queueDescPA;
468         devRead->misc.queueDescLen = hw->queue_desc_len;
469         devRead->misc.numTxQueues  = hw->num_tx_queues;
470         devRead->misc.numRxQueues  = hw->num_rx_queues;
471
472         /*
473          * Set number of interrupts to 1
474          * PMD disables all the interrupts but this is MUST to activate device
475          * It needs at least one interrupt for link events to handle
476          * So we'll disable it later after device activation if needed
477          */
478         devRead->intrConf.numIntrs = 1;
479         devRead->intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
480
481         for (i = 0; i < hw->num_tx_queues; i++) {
482                 Vmxnet3_TxQueueDesc *tqd = &hw->tqd_start[i];
483                 vmxnet3_tx_queue_t *txq  = dev->data->tx_queues[i];
484
485                 tqd->ctrl.txNumDeferred  = 0;
486                 tqd->ctrl.txThreshold    = 1;
487                 tqd->conf.txRingBasePA   = txq->cmd_ring.basePA;
488                 tqd->conf.compRingBasePA = txq->comp_ring.basePA;
489                 tqd->conf.dataRingBasePA = txq->data_ring.basePA;
490
491                 tqd->conf.txRingSize   = txq->cmd_ring.size;
492                 tqd->conf.compRingSize = txq->comp_ring.size;
493                 tqd->conf.dataRingSize = txq->data_ring.size;
494                 tqd->conf.intrIdx      = txq->comp_ring.intr_idx;
495                 tqd->status.stopped    = TRUE;
496                 tqd->status.error      = 0;
497                 memset(&tqd->stats, 0, sizeof(tqd->stats));
498         }
499
500         for (i = 0; i < hw->num_rx_queues; i++) {
501                 Vmxnet3_RxQueueDesc *rqd  = &hw->rqd_start[i];
502                 vmxnet3_rx_queue_t *rxq   = dev->data->rx_queues[i];
503
504                 rqd->conf.rxRingBasePA[0] = rxq->cmd_ring[0].basePA;
505                 rqd->conf.rxRingBasePA[1] = rxq->cmd_ring[1].basePA;
506                 rqd->conf.compRingBasePA  = rxq->comp_ring.basePA;
507
508                 rqd->conf.rxRingSize[0]   = rxq->cmd_ring[0].size;
509                 rqd->conf.rxRingSize[1]   = rxq->cmd_ring[1].size;
510                 rqd->conf.compRingSize    = rxq->comp_ring.size;
511                 rqd->conf.intrIdx         = rxq->comp_ring.intr_idx;
512                 rqd->status.stopped       = TRUE;
513                 rqd->status.error         = 0;
514                 memset(&rqd->stats, 0, sizeof(rqd->stats));
515         }
516
517         /* RxMode set to 0 of VMXNET3_RXM_xxx */
518         devRead->rxFilterConf.rxMode = 0;
519
520         /* Setting up feature flags */
521         if (dev->data->dev_conf.rxmode.hw_ip_checksum)
522                 devRead->misc.uptFeatures |= VMXNET3_F_RXCSUM;
523
524         if (port_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
525                 ret = vmxnet3_rss_configure(dev);
526                 if (ret != VMXNET3_SUCCESS)
527                         return ret;
528
529                 devRead->misc.uptFeatures |= VMXNET3_F_RSS;
530                 devRead->rssConfDesc.confVer = 1;
531                 devRead->rssConfDesc.confLen = sizeof(struct VMXNET3_RSSConf);
532                 devRead->rssConfDesc.confPA  = hw->rss_confPA;
533         }
534
535         vmxnet3_dev_vlan_offload_set(dev,
536                              ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK);
537
538         vmxnet3_write_mac(hw, hw->perm_addr);
539
540         return VMXNET3_SUCCESS;
541 }
542
543 /*
544  * Configure device link speed and setup link.
545  * Must be called after eth_vmxnet3_dev_init. Other wise it might fail
546  * It returns 0 on success.
547  */
548 static int
549 vmxnet3_dev_start(struct rte_eth_dev *dev)
550 {
551         int status, ret;
552         struct vmxnet3_hw *hw = dev->data->dev_private;
553
554         PMD_INIT_FUNC_TRACE();
555
556         ret = vmxnet3_setup_driver_shared(dev);
557         if (ret != VMXNET3_SUCCESS)
558                 return ret;
559
560         /* Exchange shared data with device */
561         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL,
562                                VMXNET3_GET_ADDR_LO(hw->sharedPA));
563         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH,
564                                VMXNET3_GET_ADDR_HI(hw->sharedPA));
565
566         /* Activate device by register write */
567         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_ACTIVATE_DEV);
568         status = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
569
570         if (status != 0) {
571                 PMD_INIT_LOG(ERR, "Device activation: UNSUCCESSFUL");
572                 return -1;
573         }
574
575         /* Disable interrupts */
576         vmxnet3_disable_intr(hw);
577
578         /*
579          * Load RX queues with blank mbufs and update next2fill index for device
580          * Update RxMode of the device
581          */
582         ret = vmxnet3_dev_rxtx_init(dev);
583         if (ret != VMXNET3_SUCCESS) {
584                 PMD_INIT_LOG(ERR, "Device receive init: UNSUCCESSFUL");
585                 return ret;
586         }
587
588         /* Setting proper Rx Mode and issue Rx Mode Update command */
589         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_UCAST | VMXNET3_RXM_BCAST, 1);
590
591         /*
592          * Don't need to handle events for now
593          */
594 #if PROCESS_SYS_EVENTS == 1
595         events = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_ECR);
596         PMD_INIT_LOG(DEBUG, "Reading events: 0x%X", events);
597         vmxnet3_process_events(hw);
598 #endif
599         return status;
600 }
601
602 /*
603  * Stop device: disable rx and tx functions to allow for reconfiguring.
604  */
605 static void
606 vmxnet3_dev_stop(struct rte_eth_dev *dev)
607 {
608         struct rte_eth_link link;
609         struct vmxnet3_hw *hw = dev->data->dev_private;
610
611         PMD_INIT_FUNC_TRACE();
612
613         if (hw->adapter_stopped == 1) {
614                 PMD_INIT_LOG(DEBUG, "Device already closed.");
615                 return;
616         }
617
618         /* disable interrupts */
619         vmxnet3_disable_intr(hw);
620
621         /* quiesce the device first */
622         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
623         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL, 0);
624         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH, 0);
625
626         /* reset the device */
627         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
628         PMD_INIT_LOG(DEBUG, "Device reset.");
629         hw->adapter_stopped = 0;
630
631         vmxnet3_dev_clear_queues(dev);
632
633         /* Clear recorded link status */
634         memset(&link, 0, sizeof(link));
635         vmxnet3_dev_atomic_write_link_status(dev, &link);
636 }
637
638 /*
639  * Reset and stop device.
640  */
641 static void
642 vmxnet3_dev_close(struct rte_eth_dev *dev)
643 {
644         struct vmxnet3_hw *hw = dev->data->dev_private;
645
646         PMD_INIT_FUNC_TRACE();
647
648         vmxnet3_dev_stop(dev);
649         hw->adapter_stopped = 1;
650 }
651
652 static void
653 vmxnet3_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
654 {
655         unsigned int i;
656         struct vmxnet3_hw *hw = dev->data->dev_private;
657
658         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
659
660         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_TX_QUEUES);
661         for (i = 0; i < hw->num_tx_queues; i++) {
662                 struct UPT1_TxStats *txStats = &hw->tqd_start[i].stats;
663
664                 stats->q_opackets[i] = txStats->ucastPktsTxOK +
665                         txStats->mcastPktsTxOK +
666                         txStats->bcastPktsTxOK;
667                 stats->q_obytes[i] = txStats->ucastBytesTxOK +
668                         txStats->mcastBytesTxOK +
669                         txStats->bcastBytesTxOK;
670
671                 stats->opackets += stats->q_opackets[i];
672                 stats->obytes += stats->q_obytes[i];
673                 stats->oerrors += txStats->pktsTxError +
674                         txStats->pktsTxDiscard;
675         }
676
677         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_RX_QUEUES);
678         for (i = 0; i < hw->num_rx_queues; i++) {
679                 struct UPT1_RxStats *rxStats = &hw->rqd_start[i].stats;
680
681                 stats->q_ipackets[i] = rxStats->ucastPktsRxOK +
682                         rxStats->mcastPktsRxOK +
683                         rxStats->bcastPktsRxOK;
684
685                 stats->q_ibytes[i] = rxStats->ucastBytesRxOK +
686                         rxStats->mcastBytesRxOK +
687                         rxStats->bcastBytesRxOK;
688
689                 stats->ipackets += stats->q_ipackets[i];
690                 stats->ibytes += stats->q_ibytes[i];
691
692                 stats->q_errors[i] = rxStats->pktsRxError;
693                 stats->ierrors += rxStats->pktsRxError;
694                 stats->imcasts += rxStats->mcastPktsRxOK;
695                 stats->rx_nombuf += rxStats->pktsRxOutOfBuf;
696         }
697 }
698
699 static void
700 vmxnet3_dev_info_get(__attribute__((unused))struct rte_eth_dev *dev,
701                      struct rte_eth_dev_info *dev_info)
702 {
703         dev_info->max_rx_queues = VMXNET3_MAX_RX_QUEUES;
704         dev_info->max_tx_queues = VMXNET3_MAX_TX_QUEUES;
705         dev_info->min_rx_bufsize = 1518 + RTE_PKTMBUF_HEADROOM;
706         dev_info->max_rx_pktlen = 16384; /* includes CRC, cf MAXFRS register */
707         dev_info->max_mac_addrs = VMXNET3_MAX_MAC_ADDRS;
708
709         dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
710                                                 ETH_TXQ_FLAGS_NOOFFLOADS;
711         dev_info->flow_type_rss_offloads = VMXNET3_RSS_OFFLOAD_ALL;
712
713         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
714                 .nb_max = VMXNET3_RX_RING_MAX_SIZE,
715                 .nb_min = VMXNET3_DEF_RX_RING_SIZE,
716                 .nb_align = 1,
717         };
718
719         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
720                 .nb_max = VMXNET3_TX_RING_MAX_SIZE,
721                 .nb_min = VMXNET3_DEF_TX_RING_SIZE,
722                 .nb_align = 1,
723         };
724
725         dev_info->rx_offload_capa =
726                 DEV_RX_OFFLOAD_VLAN_STRIP |
727                 DEV_RX_OFFLOAD_UDP_CKSUM |
728                 DEV_RX_OFFLOAD_TCP_CKSUM;
729
730         dev_info->tx_offload_capa =
731                 DEV_TX_OFFLOAD_VLAN_INSERT |
732                 DEV_TX_OFFLOAD_TCP_CKSUM |
733                 DEV_TX_OFFLOAD_UDP_CKSUM |
734                 DEV_TX_OFFLOAD_TCP_TSO;
735 }
736
737 static void
738 vmxnet3_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
739 {
740         struct vmxnet3_hw *hw = dev->data->dev_private;
741
742         vmxnet3_write_mac(hw, mac_addr->addr_bytes);
743 }
744
745 /* return 0 means link status changed, -1 means not changed */
746 static int
747 vmxnet3_dev_link_update(struct rte_eth_dev *dev, __attribute__((unused)) int wait_to_complete)
748 {
749         struct vmxnet3_hw *hw = dev->data->dev_private;
750         struct rte_eth_link old, link;
751         uint32_t ret;
752
753         if (dev->data->dev_started == 0)
754                 return -1; /* Link status doesn't change for stopped dev */
755
756         memset(&link, 0, sizeof(link));
757         vmxnet3_dev_atomic_read_link_status(dev, &old);
758
759         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
760         ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
761
762         if (ret & 0x1) {
763                 link.link_status = 1;
764                 link.link_duplex = ETH_LINK_FULL_DUPLEX;
765                 link.link_speed = ETH_LINK_SPEED_10000;
766         }
767
768         vmxnet3_dev_atomic_write_link_status(dev, &link);
769
770         return (old.link_status == link.link_status) ? -1 : 0;
771 }
772
773 /* Updating rxmode through Vmxnet3_DriverShared structure in adapter */
774 static void
775 vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set) {
776
777         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
778
779         if (set)
780                 rxConf->rxMode = rxConf->rxMode | feature;
781         else
782                 rxConf->rxMode = rxConf->rxMode & (~feature);
783
784         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_UPDATE_RX_MODE);
785 }
786
787 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
788 static void
789 vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev)
790 {
791         struct vmxnet3_hw *hw = dev->data->dev_private;
792         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
793
794         memset(vf_table, 0, VMXNET3_VFT_TABLE_SIZE);
795         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 1);
796
797         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
798                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
799 }
800
801 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
802 static void
803 vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev)
804 {
805         struct vmxnet3_hw *hw = dev->data->dev_private;
806         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
807
808         memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
809         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 0);
810         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
811                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
812 }
813
814 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
815 static void
816 vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev)
817 {
818         struct vmxnet3_hw *hw = dev->data->dev_private;
819
820         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 1);
821 }
822
823 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
824 static void
825 vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev)
826 {
827         struct vmxnet3_hw *hw = dev->data->dev_private;
828
829         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 0);
830 }
831
832 /* Enable/disable filter on vlan */
833 static int
834 vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vid, int on)
835 {
836         struct vmxnet3_hw *hw = dev->data->dev_private;
837         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
838         uint32_t *vf_table = rxConf->vfTable;
839
840         /* save state for restore */
841         if (on)
842                 VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, vid);
843         else
844                 VMXNET3_CLEAR_VFTABLE_ENTRY(hw->shadow_vfta, vid);
845
846         /* don't change active filter if in promiscuous mode */
847         if (rxConf->rxMode & VMXNET3_RXM_PROMISC)
848                 return 0;
849
850         /* set in hardware */
851         if (on)
852                 VMXNET3_SET_VFTABLE_ENTRY(vf_table, vid);
853         else
854                 VMXNET3_CLEAR_VFTABLE_ENTRY(vf_table, vid);
855
856         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
857                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
858         return 0;
859 }
860
861 static void
862 vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask)
863 {
864         struct vmxnet3_hw *hw = dev->data->dev_private;
865         Vmxnet3_DSDevRead *devRead = &hw->shared->devRead;
866         uint32_t *vf_table = devRead->rxFilterConf.vfTable;
867
868         if (mask & ETH_VLAN_STRIP_MASK) {
869                 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
870                         devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
871                 else
872                         devRead->misc.uptFeatures &= ~UPT1_F_RXVLAN;
873
874                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
875                                        VMXNET3_CMD_UPDATE_FEATURE);
876         }
877
878         if (mask & ETH_VLAN_FILTER_MASK) {
879                 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
880                         memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
881                 else
882                         memset(vf_table, 0xff, VMXNET3_VFT_TABLE_SIZE);
883
884                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
885                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
886         }
887 }
888
889 #if PROCESS_SYS_EVENTS == 1
890 static void
891 vmxnet3_process_events(struct vmxnet3_hw *hw)
892 {
893         uint32_t events = hw->shared->ecr;
894
895         if (!events) {
896                 PMD_INIT_LOG(ERR, "No events to process");
897                 return;
898         }
899
900         /*
901          * ECR bits when written with 1b are cleared. Hence write
902          * events back to ECR so that the bits which were set will be reset.
903          */
904         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_ECR, events);
905
906         /* Check if link state has changed */
907         if (events & VMXNET3_ECR_LINK)
908                 PMD_INIT_LOG(ERR,
909                              "Process events in %s(): VMXNET3_ECR_LINK event", __func__);
910
911         /* Check if there is an error on xmit/recv queues */
912         if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
913                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_QUEUE_STATUS);
914
915                 if (hw->tqd_start->status.stopped)
916                         PMD_INIT_LOG(ERR, "tq error 0x%x",
917                                      hw->tqd_start->status.error);
918
919                 if (hw->rqd_start->status.stopped)
920                         PMD_INIT_LOG(ERR, "rq error 0x%x",
921                                      hw->rqd_start->status.error);
922
923                 /* Reset the device */
924                 /* Have to reset the device */
925         }
926
927         if (events & VMXNET3_ECR_DIC)
928                 PMD_INIT_LOG(ERR, "Device implementation change event.");
929
930         if (events & VMXNET3_ECR_DEBUG)
931                 PMD_INIT_LOG(ERR, "Debug event generated by device.");
932
933 }
934 #endif
935
936 static struct rte_driver rte_vmxnet3_driver = {
937         .type = PMD_PDEV,
938         .init = rte_vmxnet3_pmd_init,
939 };
940
941 PMD_REGISTER_DRIVER(rte_vmxnet3_driver);