drivers/net/vmxnet3/vmxnet3_ethdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Intel Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <sys/queue.h>
  35 #include <stdio.h>
  36 #include <errno.h>
  37 #include <stdint.h>
  38 #include <string.h>
  39 #include <unistd.h>
  40 #include <stdarg.h>
  41 #include <fcntl.h>
  42 #include <inttypes.h>
  43 #include <rte_byteorder.h>
  44 #include <rte_common.h>
  45 #include <rte_cycles.h>
  46
  47 #include <rte_interrupts.h>
  48 #include <rte_log.h>
  49 #include <rte_debug.h>
  50 #include <rte_pci.h>
  51 #include <rte_atomic.h>
  52 #include <rte_branch_prediction.h>
  53 #include <rte_memory.h>
  54 #include <rte_memzone.h>
  55 #include <rte_eal.h>
  56 #include <rte_alarm.h>
  57 #include <rte_ether.h>
  58 #include <rte_ethdev.h>
  59 #include <rte_atomic.h>
  60 #include <rte_string_fns.h>
  61 #include <rte_malloc.h>
  62 #include <rte_dev.h>
  63
  64 #include "base/vmxnet3_defs.h"
  65
  66 #include "vmxnet3_ring.h"
  67 #include "vmxnet3_logs.h"
  68 #include "vmxnet3_ethdev.h"
  69
  70 #define PROCESS_SYS_EVENTS 0
  71
  72 static int eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev);
  73 static int eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev);
  74 static int vmxnet3_dev_configure(struct rte_eth_dev *dev);
  75 static int vmxnet3_dev_start(struct rte_eth_dev *dev);
  76 static void vmxnet3_dev_stop(struct rte_eth_dev *dev);
  77 static void vmxnet3_dev_close(struct rte_eth_dev *dev);
  78 static void vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set);
  79 static void vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev);
  80 static void vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev);
  81 static void vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev);
  82 static void vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev);
  83 static int vmxnet3_dev_link_update(struct rte_eth_dev *dev,
  84                                 int wait_to_complete);
  85 static void vmxnet3_dev_stats_get(struct rte_eth_dev *dev,
  86                                 struct rte_eth_stats *stats);
  87 static void vmxnet3_dev_info_get(struct rte_eth_dev *dev,
  88                                 struct rte_eth_dev_info *dev_info);
  89 static int vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev,
  90                                        uint16_t vid, int on);
  91 static void vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask);
  92 static void vmxnet3_dev_vlan_offload_set_clear(struct rte_eth_dev *dev,
  93                                                 int mask, int clear);
  94
  95 #if PROCESS_SYS_EVENTS == 1
  96 static void vmxnet3_process_events(struct vmxnet3_hw *);
  97 #endif
  98 /*
  99  * The set of PCI devices this driver supports
 100  */
 101 static const struct rte_pci_id pci_id_vmxnet3_map[] = {
 102
 103 #define RTE_PCI_DEV_ID_DECL_VMXNET3(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
 104 #include "rte_pci_dev_ids.h"
 105
 106 { .vendor_id = 0, /* sentinel */ },
 107 };
 108
 109 static const struct eth_dev_ops vmxnet3_eth_dev_ops = {
 110         .dev_configure        = vmxnet3_dev_configure,
 111         .dev_start            = vmxnet3_dev_start,
 112         .dev_stop             = vmxnet3_dev_stop,
 113         .dev_close            = vmxnet3_dev_close,
 114         .promiscuous_enable   = vmxnet3_dev_promiscuous_enable,
 115         .promiscuous_disable  = vmxnet3_dev_promiscuous_disable,
 116         .allmulticast_enable  = vmxnet3_dev_allmulticast_enable,
 117         .allmulticast_disable = vmxnet3_dev_allmulticast_disable,
 118         .link_update          = vmxnet3_dev_link_update,
 119         .stats_get            = vmxnet3_dev_stats_get,
 120         .dev_infos_get        = vmxnet3_dev_info_get,
 121         .vlan_filter_set      = vmxnet3_dev_vlan_filter_set,
 122         .vlan_offload_set     = vmxnet3_dev_vlan_offload_set,
 123         .rx_queue_setup       = vmxnet3_dev_rx_queue_setup,
 124         .rx_queue_release     = vmxnet3_dev_rx_queue_release,
 125         .tx_queue_setup       = vmxnet3_dev_tx_queue_setup,
 126         .tx_queue_release     = vmxnet3_dev_tx_queue_release,
 127 };
 128
 129 static const struct rte_memzone *
 130 gpa_zone_reserve(struct rte_eth_dev *dev, uint32_t size,
 131                 const char *post_string, int socket_id, uint16_t align)
 132 {
 133         char z_name[RTE_MEMZONE_NAMESIZE];
 134         const struct rte_memzone *mz;
 135
 136         snprintf(z_name, sizeof(z_name), "%s_%d_%s",
 137                                         dev->driver->pci_drv.name, dev->data->port_id, post_string);
 138
 139         mz = rte_memzone_lookup(z_name);
 140         if (mz)
 141                 return mz;
 142
 143         return rte_memzone_reserve_aligned(z_name, size,
 144                         socket_id, 0, align);
 145 }
 146
 147 /**
 148  * Atomically reads the link status information from global
 149  * structure rte_eth_dev.
 150  *
 151  * @param dev
 152  *   - Pointer to the structure rte_eth_dev to read from.
 153  *   - Pointer to the buffer to be saved with the link status.
 154  *
 155  * @return
 156  *   - On success, zero.
 157  *   - On failure, negative value.
 158  */
 159
 160 static int
 161 vmxnet3_dev_atomic_read_link_status(struct rte_eth_dev *dev,
 162                                     struct rte_eth_link *link)
 163 {
 164         struct rte_eth_link *dst = link;
 165         struct rte_eth_link *src = &(dev->data->dev_link);
 166
 167         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
 168                                 *(uint64_t *)src) == 0)
 169                 return -1;
 170
 171         return 0;
 172 }
 173
 174 /**
 175  * Atomically writes the link status information into global
 176  * structure rte_eth_dev.
 177  *
 178  * @param dev
 179  *   - Pointer to the structure rte_eth_dev to write to.
 180  *   - Pointer to the buffer to be saved with the link status.
 181  *
 182  * @return
 183  *   - On success, zero.
 184  *   - On failure, negative value.
 185  */
 186 static int
 187 vmxnet3_dev_atomic_write_link_status(struct rte_eth_dev *dev,
 188                                      struct rte_eth_link *link)
 189 {
 190         struct rte_eth_link *dst = &(dev->data->dev_link);
 191         struct rte_eth_link *src = link;
 192
 193         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
 194                                         *(uint64_t *)src) == 0)
 195                 return -1;
 196
 197         return 0;
 198 }
 199
 200 /*
 201  * This function is based on vmxnet3_disable_intr()
 202  */
 203 static void
 204 vmxnet3_disable_intr(struct vmxnet3_hw *hw)
 205 {
 206         int i;
 207
 208         PMD_INIT_FUNC_TRACE();
 209
 210         hw->shared->devRead.intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
 211         for (i = 0; i < VMXNET3_MAX_INTRS; i++)
 212                         VMXNET3_WRITE_BAR0_REG(hw, VMXNET3_REG_IMR + i * 8, 1);
 213 }
 214
 215 /*
 216  * It returns 0 on success.
 217  */
 218 static int
 219 eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev)
 220 {
 221         struct rte_pci_device *pci_dev;
 222         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
 223         uint32_t mac_hi, mac_lo, ver;
 224
 225         PMD_INIT_FUNC_TRACE();
 226
 227         eth_dev->dev_ops = &vmxnet3_eth_dev_ops;
 228         eth_dev->rx_pkt_burst = &vmxnet3_recv_pkts;
 229         eth_dev->tx_pkt_burst = &vmxnet3_xmit_pkts;
 230         pci_dev = eth_dev->pci_dev;
 231
 232         /*
 233          * for secondary processes, we don't initialize any further as primary
 234          * has already done this work.
 235          */
 236         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 237                 return 0;
 238
 239         rte_eth_copy_pci_info(eth_dev, pci_dev);
 240
 241         /* Vendor and Device ID need to be set before init of shared code */
 242         hw->device_id = pci_dev->id.device_id;
 243         hw->vendor_id = pci_dev->id.vendor_id;
 244         hw->hw_addr0 = (void *)pci_dev->mem_resource[0].addr;
 245         hw->hw_addr1 = (void *)pci_dev->mem_resource[1].addr;
 246
 247         hw->num_rx_queues = 1;
 248         hw->num_tx_queues = 1;
 249         hw->bufs_per_pkt = 1;
 250
 251         /* Check h/w version compatibility with driver. */
 252         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_VRRS);
 253         PMD_INIT_LOG(DEBUG, "Hardware version : %d", ver);
 254         if (ver & 0x1)
 255                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS, 1);
 256         else {
 257                 PMD_INIT_LOG(ERR, "Incompatible h/w version, should be 0x1");
 258                 return -EIO;
 259         }
 260
 261         /* Check UPT version compatibility with driver. */
 262         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_UVRS);
 263         PMD_INIT_LOG(DEBUG, "UPT hardware version : %d", ver);
 264         if (ver & 0x1)
 265                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_UVRS, 1);
 266         else {
 267                 PMD_INIT_LOG(ERR, "Incompatible UPT version.");
 268                 return -EIO;
 269         }
 270
 271         /* Getting MAC Address */
 272         mac_lo = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACL);
 273         mac_hi = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACH);
 274         memcpy(hw->perm_addr  , &mac_lo, 4);
 275         memcpy(hw->perm_addr+4, &mac_hi, 2);
 276
 277         /* Allocate memory for storing MAC addresses */
 278         eth_dev->data->mac_addrs = rte_zmalloc("vmxnet3", ETHER_ADDR_LEN *
 279                                                VMXNET3_MAX_MAC_ADDRS, 0);
 280         if (eth_dev->data->mac_addrs == NULL) {
 281                 PMD_INIT_LOG(ERR,
 282                              "Failed to allocate %d bytes needed to store MAC addresses",
 283                              ETHER_ADDR_LEN * VMXNET3_MAX_MAC_ADDRS);
 284                 return -ENOMEM;
 285         }
 286         /* Copy the permanent MAC address */
 287         ether_addr_copy((struct ether_addr *) hw->perm_addr,
 288                         &eth_dev->data->mac_addrs[0]);
 289
 290         PMD_INIT_LOG(DEBUG, "MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
 291                      hw->perm_addr[0], hw->perm_addr[1], hw->perm_addr[2],
 292                      hw->perm_addr[3], hw->perm_addr[4], hw->perm_addr[5]);
 293
 294         /* Put device in Quiesce Mode */
 295         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
 296
 297         return 0;
 298 }
 299
 300 static int
 301 eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev)
 302 {
 303         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
 304
 305         PMD_INIT_FUNC_TRACE();
 306
 307         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 308                 return 0;
 309
 310         if (hw->adapter_stopped == 0)
 311                 vmxnet3_dev_close(eth_dev);
 312
 313         eth_dev->dev_ops = NULL;
 314         eth_dev->rx_pkt_burst = NULL;
 315         eth_dev->tx_pkt_burst = NULL;
 316
 317         rte_free(eth_dev->data->mac_addrs);
 318         eth_dev->data->mac_addrs = NULL;
 319
 320         return 0;
 321 }
 322
 323 static struct eth_driver rte_vmxnet3_pmd = {
 324         .pci_drv = {
 325                 .name = "rte_vmxnet3_pmd",
 326                 .id_table = pci_id_vmxnet3_map,
 327                 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_DETACHABLE,
 328         },
 329         .eth_dev_init = eth_vmxnet3_dev_init,
 330         .eth_dev_uninit = eth_vmxnet3_dev_uninit,
 331         .dev_private_size = sizeof(struct vmxnet3_hw),
 332 };
 333
 334 /*
 335  * Driver initialization routine.
 336  * Invoked once at EAL init time.
 337  * Register itself as the [Poll Mode] Driver of Virtual PCI VMXNET3 devices.
 338  */
 339 static int
 340 rte_vmxnet3_pmd_init(const char *name __rte_unused, const char *param __rte_unused)
 341 {
 342         PMD_INIT_FUNC_TRACE();
 343
 344         rte_eth_driver_register(&rte_vmxnet3_pmd);
 345         return 0;
 346 }
 347
 348 static int
 349 vmxnet3_dev_configure(struct rte_eth_dev *dev)
 350 {
 351         const struct rte_memzone *mz;
 352         struct vmxnet3_hw *hw = dev->data->dev_private;
 353         size_t size;
 354
 355         PMD_INIT_FUNC_TRACE();
 356
 357         if (dev->data->nb_rx_queues > UINT8_MAX ||
 358             dev->data->nb_tx_queues > UINT8_MAX)
 359                 return -EINVAL;
 360
 361         size = dev->data->nb_rx_queues * sizeof(struct Vmxnet3_TxQueueDesc) +
 362                 dev->data->nb_tx_queues * sizeof(struct Vmxnet3_RxQueueDesc);
 363
 364         if (size > UINT16_MAX)
 365                 return -EINVAL;
 366
 367         hw->num_rx_queues = (uint8_t)dev->data->nb_rx_queues;
 368         hw->num_tx_queues = (uint8_t)dev->data->nb_tx_queues;
 369
 370         /*
 371          * Allocate a memzone for Vmxnet3_DriverShared - Vmxnet3_DSDevRead
 372          * on current socket
 373          */
 374         mz = gpa_zone_reserve(dev, sizeof(struct Vmxnet3_DriverShared),
 375                               "shared", rte_socket_id(), 8);
 376
 377         if (mz == NULL) {
 378                 PMD_INIT_LOG(ERR, "ERROR: Creating shared zone");
 379                 return -ENOMEM;
 380         }
 381         memset(mz->addr, 0, mz->len);
 382
 383         hw->shared = mz->addr;
 384         hw->sharedPA = mz->phys_addr;
 385
 386         /*
 387          * Allocate a memzone for Vmxnet3_RxQueueDesc - Vmxnet3_TxQueueDesc
 388          * on current socket
 389          */
 390         mz = gpa_zone_reserve(dev, size, "queuedesc",
 391                               rte_socket_id(), VMXNET3_QUEUE_DESC_ALIGN);
 392         if (mz == NULL) {
 393                 PMD_INIT_LOG(ERR, "ERROR: Creating queue descriptors zone");
 394                 return -ENOMEM;
 395         }
 396         memset(mz->addr, 0, mz->len);
 397
 398         hw->tqd_start = (Vmxnet3_TxQueueDesc *)mz->addr;
 399         hw->rqd_start = (Vmxnet3_RxQueueDesc *)(hw->tqd_start + hw->num_tx_queues);
 400
 401         hw->queueDescPA = mz->phys_addr;
 402         hw->queue_desc_len = (uint16_t)size;
 403
 404         if (dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 405
 406                 /* Allocate memory structure for UPT1_RSSConf and configure */
 407                 mz = gpa_zone_reserve(dev, sizeof(struct VMXNET3_RSSConf), "rss_conf",
 408                                       rte_socket_id(), RTE_CACHE_LINE_SIZE);
 409                 if (mz == NULL) {
 410                         PMD_INIT_LOG(ERR,
 411                                      "ERROR: Creating rss_conf structure zone");
 412                         return -ENOMEM;
 413                 }
 414                 memset(mz->addr, 0, mz->len);
 415
 416                 hw->rss_conf = mz->addr;
 417                 hw->rss_confPA = mz->phys_addr;
 418         }
 419
 420         return 0;
 421 }
 422
 423 static int
 424 vmxnet3_setup_driver_shared(struct rte_eth_dev *dev)
 425 {
 426         struct rte_eth_conf port_conf = dev->data->dev_conf;
 427         struct vmxnet3_hw *hw = dev->data->dev_private;
 428         uint32_t mtu = dev->data->mtu;
 429         Vmxnet3_DriverShared *shared = hw->shared;
 430         Vmxnet3_DSDevRead *devRead = &shared->devRead;
 431         uint32_t *mac_ptr;
 432         uint32_t val, i;
 433         int ret, mask;
 434
 435         shared->magic = VMXNET3_REV1_MAGIC;
 436         devRead->misc.driverInfo.version = VMXNET3_DRIVER_VERSION_NUM;
 437
 438         /* Setting up Guest OS information */
 439         devRead->misc.driverInfo.gos.gosBits   = sizeof(void *) == 4 ?
 440                 VMXNET3_GOS_BITS_32 :
 441                 VMXNET3_GOS_BITS_64;
 442         devRead->misc.driverInfo.gos.gosType   = VMXNET3_GOS_TYPE_LINUX;
 443         devRead->misc.driverInfo.vmxnet3RevSpt = 1;
 444         devRead->misc.driverInfo.uptVerSpt     = 1;
 445
 446         devRead->misc.mtu = rte_le_to_cpu_32(mtu);
 447         devRead->misc.queueDescPA  = hw->queueDescPA;
 448         devRead->misc.queueDescLen = hw->queue_desc_len;
 449         devRead->misc.numTxQueues  = hw->num_tx_queues;
 450         devRead->misc.numRxQueues  = hw->num_rx_queues;
 451
 452         /*
 453          * Set number of interrupts to 1
 454          * PMD disables all the interrupts but this is MUST to activate device
 455          * It needs at least one interrupt for link events to handle
 456          * So we'll disable it later after device activation if needed
 457          */
 458         devRead->intrConf.numIntrs = 1;
 459         devRead->intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
 460
 461         for (i = 0; i < hw->num_tx_queues; i++) {
 462                 Vmxnet3_TxQueueDesc *tqd = &hw->tqd_start[i];
 463                 vmxnet3_tx_queue_t *txq  = dev->data->tx_queues[i];
 464
 465                 tqd->ctrl.txNumDeferred  = 0;
 466                 tqd->ctrl.txThreshold    = 1;
 467                 tqd->conf.txRingBasePA   = txq->cmd_ring.basePA;
 468                 tqd->conf.compRingBasePA = txq->comp_ring.basePA;
 469                 tqd->conf.dataRingBasePA = txq->data_ring.basePA;
 470
 471                 tqd->conf.txRingSize   = txq->cmd_ring.size;
 472                 tqd->conf.compRingSize = txq->comp_ring.size;
 473                 tqd->conf.dataRingSize = txq->data_ring.size;
 474                 tqd->conf.intrIdx      = txq->comp_ring.intr_idx;
 475                 tqd->status.stopped    = TRUE;
 476                 tqd->status.error      = 0;
 477                 memset(&tqd->stats, 0, sizeof(tqd->stats));
 478         }
 479
 480         for (i = 0; i < hw->num_rx_queues; i++) {
 481                 Vmxnet3_RxQueueDesc *rqd  = &hw->rqd_start[i];
 482                 vmxnet3_rx_queue_t *rxq   = dev->data->rx_queues[i];
 483
 484                 rqd->conf.rxRingBasePA[0] = rxq->cmd_ring[0].basePA;
 485                 rqd->conf.rxRingBasePA[1] = rxq->cmd_ring[1].basePA;
 486                 rqd->conf.compRingBasePA  = rxq->comp_ring.basePA;
 487
 488                 rqd->conf.rxRingSize[0]   = rxq->cmd_ring[0].size;
 489                 rqd->conf.rxRingSize[1]   = rxq->cmd_ring[1].size;
 490                 rqd->conf.compRingSize    = rxq->comp_ring.size;
 491                 rqd->conf.intrIdx         = rxq->comp_ring.intr_idx;
 492                 rqd->status.stopped       = TRUE;
 493                 rqd->status.error         = 0;
 494                 memset(&rqd->stats, 0, sizeof(rqd->stats));
 495         }
 496
 497         /* RxMode set to 0 of VMXNET3_RXM_xxx */
 498         devRead->rxFilterConf.rxMode = 0;
 499
 500         /* Setting up feature flags */
 501         if (dev->data->dev_conf.rxmode.hw_ip_checksum)
 502                 devRead->misc.uptFeatures |= VMXNET3_F_RXCSUM;
 503
 504         if (port_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 505                 ret = vmxnet3_rss_configure(dev);
 506                 if (ret != VMXNET3_SUCCESS)
 507                         return ret;
 508
 509                 devRead->misc.uptFeatures |= VMXNET3_F_RSS;
 510                 devRead->rssConfDesc.confVer = 1;
 511                 devRead->rssConfDesc.confLen = sizeof(struct VMXNET3_RSSConf);
 512                 devRead->rssConfDesc.confPA  = hw->rss_confPA;
 513         }
 514
 515         mask = 0;
 516         if (dev->data->dev_conf.rxmode.hw_vlan_strip)
 517                 mask |= ETH_VLAN_STRIP_MASK;
 518
 519         if (dev->data->dev_conf.rxmode.hw_vlan_filter)
 520                 mask |= ETH_VLAN_FILTER_MASK;
 521
 522         vmxnet3_dev_vlan_offload_set_clear(dev, mask, 1);
 523
 524         PMD_INIT_LOG(DEBUG,
 525                      "Writing MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
 526                      hw->perm_addr[0], hw->perm_addr[1], hw->perm_addr[2],
 527                      hw->perm_addr[3], hw->perm_addr[4], hw->perm_addr[5]);
 528
 529         /* Write MAC Address back to device */
 530         mac_ptr = (uint32_t *)hw->perm_addr;
 531         val = *mac_ptr;
 532         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACL, val);
 533
 534         val = (hw->perm_addr[5] << 8) | hw->perm_addr[4];
 535         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACH, val);
 536
 537         return VMXNET3_SUCCESS;
 538 }
 539
 540 /*
 541  * Configure device link speed and setup link.
 542  * Must be called after eth_vmxnet3_dev_init. Other wise it might fail
 543  * It returns 0 on success.
 544  */
 545 static int
 546 vmxnet3_dev_start(struct rte_eth_dev *dev)
 547 {
 548         int status, ret;
 549         struct vmxnet3_hw *hw = dev->data->dev_private;
 550
 551         PMD_INIT_FUNC_TRACE();
 552
 553         ret = vmxnet3_setup_driver_shared(dev);
 554         if (ret != VMXNET3_SUCCESS)
 555                 return ret;
 556
 557         /* Exchange shared data with device */
 558         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL,
 559                                VMXNET3_GET_ADDR_LO(hw->sharedPA));
 560         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH,
 561                                VMXNET3_GET_ADDR_HI(hw->sharedPA));
 562
 563         /* Activate device by register write */
 564         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_ACTIVATE_DEV);
 565         status = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 566
 567         if (status != 0) {
 568                 PMD_INIT_LOG(ERR, "Device activation: UNSUCCESSFUL");
 569                 return -1;
 570         }
 571
 572         /* Disable interrupts */
 573         vmxnet3_disable_intr(hw);
 574
 575         /*
 576          * Load RX queues with blank mbufs and update next2fill index for device
 577          * Update RxMode of the device
 578          */
 579         ret = vmxnet3_dev_rxtx_init(dev);
 580         if (ret != VMXNET3_SUCCESS) {
 581                 PMD_INIT_LOG(ERR, "Device receive init: UNSUCCESSFUL");
 582                 return ret;
 583         }
 584
 585         /* Setting proper Rx Mode and issue Rx Mode Update command */
 586         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_UCAST | VMXNET3_RXM_BCAST, 1);
 587
 588         /*
 589          * Don't need to handle events for now
 590          */
 591 #if PROCESS_SYS_EVENTS == 1
 592         events = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_ECR);
 593         PMD_INIT_LOG(DEBUG, "Reading events: 0x%X", events);
 594         vmxnet3_process_events(hw);
 595 #endif
 596         return status;
 597 }
 598
 599 /*
 600  * Stop device: disable rx and tx functions to allow for reconfiguring.
 601  */
 602 static void
 603 vmxnet3_dev_stop(struct rte_eth_dev *dev)
 604 {
 605         struct rte_eth_link link;
 606         struct vmxnet3_hw *hw = dev->data->dev_private;
 607
 608         PMD_INIT_FUNC_TRACE();
 609
 610         if (hw->adapter_stopped == 1) {
 611                 PMD_INIT_LOG(DEBUG, "Device already closed.");
 612                 return;
 613         }
 614
 615         /* disable interrupts */
 616         vmxnet3_disable_intr(hw);
 617
 618         /* quiesce the device first */
 619         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
 620         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL, 0);
 621         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH, 0);
 622
 623         /* reset the device */
 624         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
 625         PMD_INIT_LOG(DEBUG, "Device reset.");
 626         hw->adapter_stopped = 0;
 627
 628         vmxnet3_dev_clear_queues(dev);
 629
 630         /* Clear recorded link status */
 631         memset(&link, 0, sizeof(link));
 632         vmxnet3_dev_atomic_write_link_status(dev, &link);
 633 }
 634
 635 /*
 636  * Reset and stop device.
 637  */
 638 static void
 639 vmxnet3_dev_close(struct rte_eth_dev *dev)
 640 {
 641         struct vmxnet3_hw *hw = dev->data->dev_private;
 642
 643         PMD_INIT_FUNC_TRACE();
 644
 645         vmxnet3_dev_stop(dev);
 646         hw->adapter_stopped = 1;
 647 }
 648
 649 static void
 650 vmxnet3_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
 651 {
 652         unsigned int i;
 653         struct vmxnet3_hw *hw = dev->data->dev_private;
 654
 655         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
 656
 657         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_TX_QUEUES);
 658         for (i = 0; i < hw->num_tx_queues; i++) {
 659                 struct UPT1_TxStats *txStats = &hw->tqd_start[i].stats;
 660
 661                 stats->q_opackets[i] = txStats->ucastPktsTxOK +
 662                         txStats->mcastPktsTxOK +
 663                         txStats->bcastPktsTxOK;
 664                 stats->q_obytes[i] = txStats->ucastBytesTxOK +
 665                         txStats->mcastBytesTxOK +
 666                         txStats->bcastBytesTxOK;
 667
 668                 stats->opackets += stats->q_opackets[i];
 669                 stats->obytes += stats->q_obytes[i];
 670                 stats->oerrors += txStats->pktsTxError +
 671                         txStats->pktsTxDiscard;
 672         }
 673
 674         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_RX_QUEUES);
 675         for (i = 0; i < hw->num_rx_queues; i++) {
 676                 struct UPT1_RxStats *rxStats = &hw->rqd_start[i].stats;
 677
 678                 stats->q_ipackets[i] = rxStats->ucastPktsRxOK +
 679                         rxStats->mcastPktsRxOK +
 680                         rxStats->bcastPktsRxOK;
 681
 682                 stats->q_ibytes[i] = rxStats->ucastBytesRxOK +
 683                         rxStats->mcastBytesRxOK +
 684                         rxStats->bcastBytesRxOK;
 685
 686                 stats->ipackets += stats->q_ipackets[i];
 687                 stats->ibytes += stats->q_ibytes[i];
 688
 689                 stats->q_errors[i] = rxStats->pktsRxError;
 690                 stats->ierrors += rxStats->pktsRxError;
 691                 stats->imcasts += rxStats->mcastPktsRxOK;
 692                 stats->rx_nombuf += rxStats->pktsRxOutOfBuf;
 693         }
 694 }
 695
 696 static void
 697 vmxnet3_dev_info_get(__attribute__((unused))struct rte_eth_dev *dev,
 698                      struct rte_eth_dev_info *dev_info)
 699 {
 700         dev_info->max_rx_queues = VMXNET3_MAX_RX_QUEUES;
 701         dev_info->max_tx_queues = VMXNET3_MAX_TX_QUEUES;
 702         dev_info->min_rx_bufsize = 1518 + RTE_PKTMBUF_HEADROOM;
 703         dev_info->max_rx_pktlen = 16384; /* includes CRC, cf MAXFRS register */
 704         dev_info->max_mac_addrs = VMXNET3_MAX_MAC_ADDRS;
 705
 706         dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
 707                                                 ETH_TXQ_FLAGS_NOOFFLOADS;
 708         dev_info->flow_type_rss_offloads = VMXNET3_RSS_OFFLOAD_ALL;
 709
 710         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
 711                 .nb_max = VMXNET3_RX_RING_MAX_SIZE,
 712                 .nb_min = VMXNET3_DEF_RX_RING_SIZE,
 713                 .nb_align = 1,
 714         };
 715
 716         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
 717                 .nb_max = VMXNET3_TX_RING_MAX_SIZE,
 718                 .nb_min = VMXNET3_DEF_TX_RING_SIZE,
 719                 .nb_align = 1,
 720         };
 721
 722         dev_info->rx_offload_capa =
 723                 DEV_RX_OFFLOAD_VLAN_STRIP |
 724                 DEV_RX_OFFLOAD_UDP_CKSUM |
 725                 DEV_RX_OFFLOAD_TCP_CKSUM;
 726
 727         dev_info->tx_offload_capa =
 728                 DEV_TX_OFFLOAD_VLAN_INSERT |
 729                 DEV_TX_OFFLOAD_TCP_CKSUM |
 730                 DEV_TX_OFFLOAD_UDP_CKSUM |
 731                 DEV_TX_OFFLOAD_TCP_TSO;
 732 }
 733
 734 /* return 0 means link status changed, -1 means not changed */
 735 static int
 736 vmxnet3_dev_link_update(struct rte_eth_dev *dev, __attribute__((unused)) int wait_to_complete)
 737 {
 738         struct vmxnet3_hw *hw = dev->data->dev_private;
 739         struct rte_eth_link old, link;
 740         uint32_t ret;
 741
 742         if (dev->data->dev_started == 0)
 743                 return -1; /* Link status doesn't change for stopped dev */
 744
 745         memset(&link, 0, sizeof(link));
 746         vmxnet3_dev_atomic_read_link_status(dev, &old);
 747
 748         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
 749         ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 750
 751         if (ret & 0x1) {
 752                 link.link_status = 1;
 753                 link.link_duplex = ETH_LINK_FULL_DUPLEX;
 754                 link.link_speed = ETH_LINK_SPEED_10000;
 755         }
 756
 757         vmxnet3_dev_atomic_write_link_status(dev, &link);
 758
 759         return (old.link_status == link.link_status) ? -1 : 0;
 760 }
 761
 762 /* Updating rxmode through Vmxnet3_DriverShared structure in adapter */
 763 static void
 764 vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set) {
 765
 766         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
 767
 768         if (set)
 769                 rxConf->rxMode = rxConf->rxMode | feature;
 770         else
 771                 rxConf->rxMode = rxConf->rxMode & (~feature);
 772
 773         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_UPDATE_RX_MODE);
 774 }
 775
 776 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
 777 static void
 778 vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev)
 779 {
 780         struct vmxnet3_hw *hw = dev->data->dev_private;
 781         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
 782
 783         memset(vf_table, 0, VMXNET3_VFT_TABLE_SIZE);
 784         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 1);
 785
 786         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 787                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
 788 }
 789
 790 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
 791 static void
 792 vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev)
 793 {
 794         struct vmxnet3_hw *hw = dev->data->dev_private;
 795         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
 796
 797         memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
 798         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 0);
 799         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 800                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
 801 }
 802
 803 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
 804 static void
 805 vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev)
 806 {
 807         struct vmxnet3_hw *hw = dev->data->dev_private;
 808
 809         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 1);
 810 }
 811
 812 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
 813 static void
 814 vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev)
 815 {
 816         struct vmxnet3_hw *hw = dev->data->dev_private;
 817
 818         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 0);
 819 }
 820
 821 /* Enable/disable filter on vlan */
 822 static int
 823 vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vid, int on)
 824 {
 825         struct vmxnet3_hw *hw = dev->data->dev_private;
 826         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
 827         uint32_t *vf_table = rxConf->vfTable;
 828
 829         /* save state for restore */
 830         if (on)
 831                 VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, vid);
 832         else
 833                 VMXNET3_CLEAR_VFTABLE_ENTRY(hw->shadow_vfta, vid);
 834
 835         /* don't change active filter if in promiscuous mode */
 836         if (rxConf->rxMode & VMXNET3_RXM_PROMISC)
 837                 return 0;
 838
 839         /* set in hardware */
 840         if (on)
 841                 VMXNET3_SET_VFTABLE_ENTRY(vf_table, vid);
 842         else
 843                 VMXNET3_CLEAR_VFTABLE_ENTRY(vf_table, vid);
 844
 845         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 846                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
 847         return 0;
 848 }
 849
 850 static void
 851 vmxnet3_dev_vlan_offload_set_clear(struct rte_eth_dev *dev,
 852                                    int mask, int clear)
 853 {
 854         struct vmxnet3_hw *hw = dev->data->dev_private;
 855         Vmxnet3_DSDevRead *devRead = &hw->shared->devRead;
 856         uint32_t *vf_table = devRead->rxFilterConf.vfTable;
 857
 858         if (mask & ETH_VLAN_STRIP_MASK)
 859                 devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
 860         else
 861                 devRead->misc.uptFeatures &= ~UPT1_F_RXVLAN;
 862
 863         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 864                                VMXNET3_CMD_UPDATE_FEATURE);
 865
 866         if (mask & ETH_VLAN_FILTER_MASK) {
 867                 if (clear) {
 868                         memset(hw->shadow_vfta, 0,
 869                                VMXNET3_VFT_TABLE_SIZE);
 870                         /* allow untagged pkts */
 871                         VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, 0);
 872                 }
 873                 memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
 874         } else {
 875                 /* allow any pkts -- no filtering */
 876                 if (clear)
 877                         memset(hw->shadow_vfta, 0xff, VMXNET3_VFT_TABLE_SIZE);
 878                 memset(vf_table, 0xff, VMXNET3_VFT_TABLE_SIZE);
 879         }
 880
 881         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 882                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
 883 }
 884
 885 static void
 886 vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask)
 887 {
 888         vmxnet3_dev_vlan_offload_set_clear(dev, mask, 0);
 889 }
 890
 891 #if PROCESS_SYS_EVENTS == 1
 892 static void
 893 vmxnet3_process_events(struct vmxnet3_hw *hw)
 894 {
 895         uint32_t events = hw->shared->ecr;
 896
 897         if (!events) {
 898                 PMD_INIT_LOG(ERR, "No events to process");
 899                 return;
 900         }
 901
 902         /*
 903          * ECR bits when written with 1b are cleared. Hence write
 904          * events back to ECR so that the bits which were set will be reset.
 905          */
 906         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_ECR, events);
 907
 908         /* Check if link state has changed */
 909         if (events & VMXNET3_ECR_LINK)
 910                 PMD_INIT_LOG(ERR,
 911                              "Process events in %s(): VMXNET3_ECR_LINK event", __func__);
 912
 913         /* Check if there is an error on xmit/recv queues */
 914         if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
 915                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_QUEUE_STATUS);
 916
 917                 if (hw->tqd_start->status.stopped)
 918                         PMD_INIT_LOG(ERR, "tq error 0x%x",
 919                                      hw->tqd_start->status.error);
 920
 921                 if (hw->rqd_start->status.stopped)
 922                         PMD_INIT_LOG(ERR, "rq error 0x%x",
 923                                      hw->rqd_start->status.error);
 924
 925                 /* Reset the device */
 926                 /* Have to reset the device */
 927         }
 928
 929         if (events & VMXNET3_ECR_DIC)
 930                 PMD_INIT_LOG(ERR, "Device implementation change event.");
 931
 932         if (events & VMXNET3_ECR_DEBUG)
 933                 PMD_INIT_LOG(ERR, "Debug event generated by device.");
 934
 935 }
 936 #endif
 937
 938 static struct rte_driver rte_vmxnet3_driver = {
 939         .type = PMD_PDEV,
 940         .init = rte_vmxnet3_pmd_init,
 941 };
 942
 943 PMD_REGISTER_DRIVER(rte_vmxnet3_driver);