drivers/net/vmxnet3/vmxnet3_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2010-2015 Intel Corporation
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdio.h>
   7 #include <errno.h>
   8 #include <stdint.h>
   9 #include <string.h>
  10 #include <unistd.h>
  11 #include <stdarg.h>
  12 #include <fcntl.h>
  13 #include <inttypes.h>
  14 #include <rte_byteorder.h>
  15 #include <rte_common.h>
  16 #include <rte_cycles.h>
  17
  18 #include <rte_interrupts.h>
  19 #include <rte_log.h>
  20 #include <rte_debug.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_branch_prediction.h>
  24 #include <rte_memory.h>
  25 #include <rte_memzone.h>
  26 #include <rte_eal.h>
  27 #include <rte_alarm.h>
  28 #include <rte_ether.h>
  29 #include <rte_ethdev_driver.h>
  30 #include <rte_ethdev_pci.h>
  31 #include <rte_string_fns.h>
  32 #include <rte_malloc.h>
  33 #include <rte_dev.h>
  34
  35 #include "base/vmxnet3_defs.h"
  36
  37 #include "vmxnet3_ring.h"
  38 #include "vmxnet3_logs.h"
  39 #include "vmxnet3_ethdev.h"
  40
  41 #define PROCESS_SYS_EVENTS 0
  42
  43 #define VMXNET3_TX_MAX_SEG      UINT8_MAX
  44
  45 static int eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev);
  46 static int eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev);
  47 static int vmxnet3_dev_configure(struct rte_eth_dev *dev);
  48 static int vmxnet3_dev_start(struct rte_eth_dev *dev);
  49 static void vmxnet3_dev_stop(struct rte_eth_dev *dev);
  50 static void vmxnet3_dev_close(struct rte_eth_dev *dev);
  51 static void vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set);
  52 static void vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev);
  53 static void vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev);
  54 static void vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev);
  55 static void vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev);
  56 static int __vmxnet3_dev_link_update(struct rte_eth_dev *dev,
  57                                      int wait_to_complete);
  58 static int vmxnet3_dev_link_update(struct rte_eth_dev *dev,
  59                                    int wait_to_complete);
  60 static void vmxnet3_hw_stats_save(struct vmxnet3_hw *hw);
  61 static int vmxnet3_dev_stats_get(struct rte_eth_dev *dev,
  62                                   struct rte_eth_stats *stats);
  63 static int vmxnet3_dev_xstats_get_names(struct rte_eth_dev *dev,
  64                                         struct rte_eth_xstat_name *xstats,
  65                                         unsigned int n);
  66 static int vmxnet3_dev_xstats_get(struct rte_eth_dev *dev,
  67                                   struct rte_eth_xstat *xstats, unsigned int n);
  68 static void vmxnet3_dev_info_get(struct rte_eth_dev *dev,
  69                                  struct rte_eth_dev_info *dev_info);
  70 static const uint32_t *
  71 vmxnet3_dev_supported_ptypes_get(struct rte_eth_dev *dev);
  72 static int vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev,
  73                                        uint16_t vid, int on);
  74 static int vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask);
  75 static int vmxnet3_mac_addr_set(struct rte_eth_dev *dev,
  76                                  struct ether_addr *mac_addr);
  77 static void vmxnet3_interrupt_handler(void *param);
  78
  79 int vmxnet3_logtype_init;
  80 int vmxnet3_logtype_driver;
  81
  82 /*
  83  * The set of PCI devices this driver supports
  84  */
  85 #define VMWARE_PCI_VENDOR_ID 0x15AD
  86 #define VMWARE_DEV_ID_VMXNET3 0x07B0
  87 static const struct rte_pci_id pci_id_vmxnet3_map[] = {
  88         { RTE_PCI_DEVICE(VMWARE_PCI_VENDOR_ID, VMWARE_DEV_ID_VMXNET3) },
  89         { .vendor_id = 0, /* sentinel */ },
  90 };
  91
  92 static const struct eth_dev_ops vmxnet3_eth_dev_ops = {
  93         .dev_configure        = vmxnet3_dev_configure,
  94         .dev_start            = vmxnet3_dev_start,
  95         .dev_stop             = vmxnet3_dev_stop,
  96         .dev_close            = vmxnet3_dev_close,
  97         .promiscuous_enable   = vmxnet3_dev_promiscuous_enable,
  98         .promiscuous_disable  = vmxnet3_dev_promiscuous_disable,
  99         .allmulticast_enable  = vmxnet3_dev_allmulticast_enable,
 100         .allmulticast_disable = vmxnet3_dev_allmulticast_disable,
 101         .link_update          = vmxnet3_dev_link_update,
 102         .stats_get            = vmxnet3_dev_stats_get,
 103         .xstats_get_names     = vmxnet3_dev_xstats_get_names,
 104         .xstats_get           = vmxnet3_dev_xstats_get,
 105         .mac_addr_set         = vmxnet3_mac_addr_set,
 106         .dev_infos_get        = vmxnet3_dev_info_get,
 107         .dev_supported_ptypes_get = vmxnet3_dev_supported_ptypes_get,
 108         .vlan_filter_set      = vmxnet3_dev_vlan_filter_set,
 109         .vlan_offload_set     = vmxnet3_dev_vlan_offload_set,
 110         .rx_queue_setup       = vmxnet3_dev_rx_queue_setup,
 111         .rx_queue_release     = vmxnet3_dev_rx_queue_release,
 112         .tx_queue_setup       = vmxnet3_dev_tx_queue_setup,
 113         .tx_queue_release     = vmxnet3_dev_tx_queue_release,
 114 };
 115
 116 struct vmxnet3_xstats_name_off {
 117         char name[RTE_ETH_XSTATS_NAME_SIZE];
 118         unsigned int offset;
 119 };
 120
 121 /* tx_qX_ is prepended to the name string here */
 122 static const struct vmxnet3_xstats_name_off vmxnet3_txq_stat_strings[] = {
 123         {"drop_total",         offsetof(struct vmxnet3_txq_stats, drop_total)},
 124         {"drop_too_many_segs", offsetof(struct vmxnet3_txq_stats, drop_too_many_segs)},
 125         {"drop_tso",           offsetof(struct vmxnet3_txq_stats, drop_tso)},
 126         {"tx_ring_full",       offsetof(struct vmxnet3_txq_stats, tx_ring_full)},
 127 };
 128
 129 /* rx_qX_ is prepended to the name string here */
 130 static const struct vmxnet3_xstats_name_off vmxnet3_rxq_stat_strings[] = {
 131         {"drop_total",           offsetof(struct vmxnet3_rxq_stats, drop_total)},
 132         {"drop_err",             offsetof(struct vmxnet3_rxq_stats, drop_err)},
 133         {"drop_fcs",             offsetof(struct vmxnet3_rxq_stats, drop_fcs)},
 134         {"rx_buf_alloc_failure", offsetof(struct vmxnet3_rxq_stats, rx_buf_alloc_failure)},
 135 };
 136
 137 static const struct rte_memzone *
 138 gpa_zone_reserve(struct rte_eth_dev *dev, uint32_t size,
 139                  const char *post_string, int socket_id,
 140                  uint16_t align, bool reuse)
 141 {
 142         char z_name[RTE_MEMZONE_NAMESIZE];
 143         const struct rte_memzone *mz;
 144
 145         snprintf(z_name, sizeof(z_name), "%s_%d_%s",
 146                  dev->device->driver->name, dev->data->port_id, post_string);
 147
 148         mz = rte_memzone_lookup(z_name);
 149         if (!reuse) {
 150                 if (mz)
 151                         rte_memzone_free(mz);
 152                 return rte_memzone_reserve_aligned(z_name, size, socket_id,
 153                                 RTE_MEMZONE_IOVA_CONTIG, align);
 154         }
 155
 156         if (mz)
 157                 return mz;
 158
 159         return rte_memzone_reserve_aligned(z_name, size, socket_id,
 160                         RTE_MEMZONE_IOVA_CONTIG, align);
 161 }
 162
 163 /*
 164  * This function is based on vmxnet3_disable_intr()
 165  */
 166 static void
 167 vmxnet3_disable_intr(struct vmxnet3_hw *hw)
 168 {
 169         int i;
 170
 171         PMD_INIT_FUNC_TRACE();
 172
 173         hw->shared->devRead.intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
 174         for (i = 0; i < hw->num_intrs; i++)
 175                 VMXNET3_WRITE_BAR0_REG(hw, VMXNET3_REG_IMR + i * 8, 1);
 176 }
 177
 178 static void
 179 vmxnet3_enable_intr(struct vmxnet3_hw *hw)
 180 {
 181         int i;
 182
 183         PMD_INIT_FUNC_TRACE();
 184
 185         hw->shared->devRead.intrConf.intrCtrl &= ~VMXNET3_IC_DISABLE_ALL;
 186         for (i = 0; i < hw->num_intrs; i++)
 187                 VMXNET3_WRITE_BAR0_REG(hw, VMXNET3_REG_IMR + i * 8, 0);
 188 }
 189
 190 /*
 191  * Gets tx data ring descriptor size.
 192  */
 193 static uint16_t
 194 eth_vmxnet3_txdata_get(struct vmxnet3_hw *hw)
 195 {
 196         uint16 txdata_desc_size;
 197
 198         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 199                                VMXNET3_CMD_GET_TXDATA_DESC_SIZE);
 200         txdata_desc_size = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 201
 202         return (txdata_desc_size < VMXNET3_TXDATA_DESC_MIN_SIZE ||
 203                 txdata_desc_size > VMXNET3_TXDATA_DESC_MAX_SIZE ||
 204                 txdata_desc_size & VMXNET3_TXDATA_DESC_SIZE_MASK) ?
 205                 sizeof(struct Vmxnet3_TxDataDesc) : txdata_desc_size;
 206 }
 207
 208 /*
 209  * It returns 0 on success.
 210  */
 211 static int
 212 eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev)
 213 {
 214         struct rte_pci_device *pci_dev;
 215         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
 216         uint32_t mac_hi, mac_lo, ver;
 217         struct rte_eth_link link;
 218
 219         PMD_INIT_FUNC_TRACE();
 220
 221         eth_dev->dev_ops = &vmxnet3_eth_dev_ops;
 222         eth_dev->rx_pkt_burst = &vmxnet3_recv_pkts;
 223         eth_dev->tx_pkt_burst = &vmxnet3_xmit_pkts;
 224         eth_dev->tx_pkt_prepare = vmxnet3_prep_pkts;
 225         pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
 226
 227         /*
 228          * for secondary processes, we don't initialize any further as primary
 229          * has already done this work.
 230          */
 231         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 232                 return 0;
 233
 234         rte_eth_copy_pci_info(eth_dev, pci_dev);
 235
 236         /* Vendor and Device ID need to be set before init of shared code */
 237         hw->device_id = pci_dev->id.device_id;
 238         hw->vendor_id = pci_dev->id.vendor_id;
 239         hw->hw_addr0 = (void *)pci_dev->mem_resource[0].addr;
 240         hw->hw_addr1 = (void *)pci_dev->mem_resource[1].addr;
 241
 242         hw->num_rx_queues = 1;
 243         hw->num_tx_queues = 1;
 244         hw->bufs_per_pkt = 1;
 245
 246         /* Check h/w version compatibility with driver. */
 247         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_VRRS);
 248         PMD_INIT_LOG(DEBUG, "Hardware version : %d", ver);
 249
 250         if (ver & (1 << VMXNET3_REV_3)) {
 251                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS,
 252                                        1 << VMXNET3_REV_3);
 253                 hw->version = VMXNET3_REV_3 + 1;
 254         } else if (ver & (1 << VMXNET3_REV_2)) {
 255                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS,
 256                                        1 << VMXNET3_REV_2);
 257                 hw->version = VMXNET3_REV_2 + 1;
 258         } else if (ver & (1 << VMXNET3_REV_1)) {
 259                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS,
 260                                        1 << VMXNET3_REV_1);
 261                 hw->version = VMXNET3_REV_1 + 1;
 262         } else {
 263                 PMD_INIT_LOG(ERR, "Incompatible hardware version: %d", ver);
 264                 return -EIO;
 265         }
 266
 267         PMD_INIT_LOG(DEBUG, "Using device version %d\n", hw->version);
 268
 269         /* Check UPT version compatibility with driver. */
 270         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_UVRS);
 271         PMD_INIT_LOG(DEBUG, "UPT hardware version : %d", ver);
 272         if (ver & 0x1)
 273                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_UVRS, 1);
 274         else {
 275                 PMD_INIT_LOG(ERR, "Incompatible UPT version.");
 276                 return -EIO;
 277         }
 278
 279         /* Getting MAC Address */
 280         mac_lo = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACL);
 281         mac_hi = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACH);
 282         memcpy(hw->perm_addr, &mac_lo, 4);
 283         memcpy(hw->perm_addr + 4, &mac_hi, 2);
 284
 285         /* Allocate memory for storing MAC addresses */
 286         eth_dev->data->mac_addrs = rte_zmalloc("vmxnet3", ETHER_ADDR_LEN *
 287                                                VMXNET3_MAX_MAC_ADDRS, 0);
 288         if (eth_dev->data->mac_addrs == NULL) {
 289                 PMD_INIT_LOG(ERR,
 290                              "Failed to allocate %d bytes needed to store MAC addresses",
 291                              ETHER_ADDR_LEN * VMXNET3_MAX_MAC_ADDRS);
 292                 return -ENOMEM;
 293         }
 294         /* Copy the permanent MAC address */
 295         ether_addr_copy((struct ether_addr *) hw->perm_addr,
 296                         &eth_dev->data->mac_addrs[0]);
 297
 298         PMD_INIT_LOG(DEBUG, "MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
 299                      hw->perm_addr[0], hw->perm_addr[1], hw->perm_addr[2],
 300                      hw->perm_addr[3], hw->perm_addr[4], hw->perm_addr[5]);
 301
 302         /* Put device in Quiesce Mode */
 303         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
 304
 305         /* allow untagged pkts */
 306         VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, 0);
 307
 308         hw->txdata_desc_size = VMXNET3_VERSION_GE_3(hw) ?
 309                 eth_vmxnet3_txdata_get(hw) : sizeof(struct Vmxnet3_TxDataDesc);
 310
 311         hw->rxdata_desc_size = VMXNET3_VERSION_GE_3(hw) ?
 312                 VMXNET3_DEF_RXDATA_DESC_SIZE : 0;
 313         RTE_ASSERT((hw->rxdata_desc_size & ~VMXNET3_RXDATA_DESC_SIZE_MASK) ==
 314                    hw->rxdata_desc_size);
 315
 316         /* clear shadow stats */
 317         memset(hw->saved_tx_stats, 0, sizeof(hw->saved_tx_stats));
 318         memset(hw->saved_rx_stats, 0, sizeof(hw->saved_rx_stats));
 319
 320         /* set the initial link status */
 321         memset(&link, 0, sizeof(link));
 322         link.link_duplex = ETH_LINK_FULL_DUPLEX;
 323         link.link_speed = ETH_SPEED_NUM_10G;
 324         link.link_autoneg = ETH_LINK_FIXED;
 325         rte_eth_linkstatus_set(eth_dev, &link);
 326
 327         return 0;
 328 }
 329
 330 static int
 331 eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev)
 332 {
 333         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
 334
 335         PMD_INIT_FUNC_TRACE();
 336
 337         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 338                 return 0;
 339
 340         if (hw->adapter_stopped == 0)
 341                 vmxnet3_dev_close(eth_dev);
 342
 343         eth_dev->dev_ops = NULL;
 344         eth_dev->rx_pkt_burst = NULL;
 345         eth_dev->tx_pkt_burst = NULL;
 346         eth_dev->tx_pkt_prepare = NULL;
 347
 348         rte_free(eth_dev->data->mac_addrs);
 349         eth_dev->data->mac_addrs = NULL;
 350
 351         return 0;
 352 }
 353
 354 static int eth_vmxnet3_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 355         struct rte_pci_device *pci_dev)
 356 {
 357         return rte_eth_dev_pci_generic_probe(pci_dev,
 358                 sizeof(struct vmxnet3_hw), eth_vmxnet3_dev_init);
 359 }
 360
 361 static int eth_vmxnet3_pci_remove(struct rte_pci_device *pci_dev)
 362 {
 363         return rte_eth_dev_pci_generic_remove(pci_dev, eth_vmxnet3_dev_uninit);
 364 }
 365
 366 static struct rte_pci_driver rte_vmxnet3_pmd = {
 367         .id_table = pci_id_vmxnet3_map,
 368         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
 369         .probe = eth_vmxnet3_pci_probe,
 370         .remove = eth_vmxnet3_pci_remove,
 371 };
 372
 373 static int
 374 vmxnet3_dev_configure(struct rte_eth_dev *dev)
 375 {
 376         const struct rte_memzone *mz;
 377         struct vmxnet3_hw *hw = dev->data->dev_private;
 378         size_t size;
 379
 380         PMD_INIT_FUNC_TRACE();
 381
 382         if (dev->data->nb_tx_queues > VMXNET3_MAX_TX_QUEUES ||
 383             dev->data->nb_rx_queues > VMXNET3_MAX_RX_QUEUES) {
 384                 PMD_INIT_LOG(ERR, "ERROR: Number of queues not supported");
 385                 return -EINVAL;
 386         }
 387
 388         if (!rte_is_power_of_2(dev->data->nb_rx_queues)) {
 389                 PMD_INIT_LOG(ERR, "ERROR: Number of rx queues not power of 2");
 390                 return -EINVAL;
 391         }
 392
 393         size = dev->data->nb_rx_queues * sizeof(struct Vmxnet3_TxQueueDesc) +
 394                 dev->data->nb_tx_queues * sizeof(struct Vmxnet3_RxQueueDesc);
 395
 396         if (size > UINT16_MAX)
 397                 return -EINVAL;
 398
 399         hw->num_rx_queues = (uint8_t)dev->data->nb_rx_queues;
 400         hw->num_tx_queues = (uint8_t)dev->data->nb_tx_queues;
 401
 402         /*
 403          * Allocate a memzone for Vmxnet3_DriverShared - Vmxnet3_DSDevRead
 404          * on current socket
 405          */
 406         mz = gpa_zone_reserve(dev, sizeof(struct Vmxnet3_DriverShared),
 407                               "shared", rte_socket_id(), 8, 1);
 408
 409         if (mz == NULL) {
 410                 PMD_INIT_LOG(ERR, "ERROR: Creating shared zone");
 411                 return -ENOMEM;
 412         }
 413         memset(mz->addr, 0, mz->len);
 414
 415         hw->shared = mz->addr;
 416         hw->sharedPA = mz->iova;
 417
 418         /*
 419          * Allocate a memzone for Vmxnet3_RxQueueDesc - Vmxnet3_TxQueueDesc
 420          * on current socket.
 421          *
 422          * We cannot reuse this memzone from previous allocation as its size
 423          * depends on the number of tx and rx queues, which could be different
 424          * from one config to another.
 425          */
 426         mz = gpa_zone_reserve(dev, size, "queuedesc", rte_socket_id(),
 427                               VMXNET3_QUEUE_DESC_ALIGN, 0);
 428         if (mz == NULL) {
 429                 PMD_INIT_LOG(ERR, "ERROR: Creating queue descriptors zone");
 430                 return -ENOMEM;
 431         }
 432         memset(mz->addr, 0, mz->len);
 433
 434         hw->tqd_start = (Vmxnet3_TxQueueDesc *)mz->addr;
 435         hw->rqd_start = (Vmxnet3_RxQueueDesc *)(hw->tqd_start + hw->num_tx_queues);
 436
 437         hw->queueDescPA = mz->iova;
 438         hw->queue_desc_len = (uint16_t)size;
 439
 440         if (dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 441                 /* Allocate memory structure for UPT1_RSSConf and configure */
 442                 mz = gpa_zone_reserve(dev, sizeof(struct VMXNET3_RSSConf),
 443                                       "rss_conf", rte_socket_id(),
 444                                       RTE_CACHE_LINE_SIZE, 1);
 445                 if (mz == NULL) {
 446                         PMD_INIT_LOG(ERR,
 447                                      "ERROR: Creating rss_conf structure zone");
 448                         return -ENOMEM;
 449                 }
 450                 memset(mz->addr, 0, mz->len);
 451
 452                 hw->rss_conf = mz->addr;
 453                 hw->rss_confPA = mz->iova;
 454         }
 455
 456         return 0;
 457 }
 458
 459 static void
 460 vmxnet3_write_mac(struct vmxnet3_hw *hw, const uint8_t *addr)
 461 {
 462         uint32_t val;
 463
 464         PMD_INIT_LOG(DEBUG,
 465                      "Writing MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
 466                      addr[0], addr[1], addr[2],
 467                      addr[3], addr[4], addr[5]);
 468
 469         memcpy(&val, addr, 4);
 470         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACL, val);
 471
 472         memcpy(&val, addr + 4, 2);
 473         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACH, val);
 474 }
 475
 476 static int
 477 vmxnet3_dev_setup_memreg(struct rte_eth_dev *dev)
 478 {
 479         struct vmxnet3_hw *hw = dev->data->dev_private;
 480         Vmxnet3_DriverShared *shared = hw->shared;
 481         Vmxnet3_CmdInfo *cmdInfo;
 482         struct rte_mempool *mp[VMXNET3_MAX_RX_QUEUES];
 483         uint8_t index[VMXNET3_MAX_RX_QUEUES + VMXNET3_MAX_TX_QUEUES];
 484         uint32_t num, i, j, size;
 485
 486         if (hw->memRegsPA == 0) {
 487                 const struct rte_memzone *mz;
 488
 489                 size = sizeof(Vmxnet3_MemRegs) +
 490                         (VMXNET3_MAX_RX_QUEUES + VMXNET3_MAX_TX_QUEUES) *
 491                         sizeof(Vmxnet3_MemoryRegion);
 492
 493                 mz = gpa_zone_reserve(dev, size, "memRegs", rte_socket_id(), 8,
 494                                       1);
 495                 if (mz == NULL) {
 496                         PMD_INIT_LOG(ERR, "ERROR: Creating memRegs zone");
 497                         return -ENOMEM;
 498                 }
 499                 memset(mz->addr, 0, mz->len);
 500                 hw->memRegs = mz->addr;
 501                 hw->memRegsPA = mz->iova;
 502         }
 503
 504         num = hw->num_rx_queues;
 505
 506         for (i = 0; i < num; i++) {
 507                 vmxnet3_rx_queue_t *rxq = dev->data->rx_queues[i];
 508
 509                 mp[i] = rxq->mp;
 510                 index[i] = 1 << i;
 511         }
 512
 513         /*
 514          * The same mempool could be used by multiple queues. In such a case,
 515          * remove duplicate mempool entries. Only one entry is kept with
 516          * bitmask indicating queues that are using this mempool.
 517          */
 518         for (i = 1; i < num; i++) {
 519                 for (j = 0; j < i; j++) {
 520                         if (mp[i] == mp[j]) {
 521                                 mp[i] = NULL;
 522                                 index[j] |= 1 << i;
 523                                 break;
 524                         }
 525                 }
 526         }
 527
 528         j = 0;
 529         for (i = 0; i < num; i++) {
 530                 if (mp[i] == NULL)
 531                         continue;
 532
 533                 Vmxnet3_MemoryRegion *mr = &hw->memRegs->memRegs[j];
 534
 535                 mr->startPA =
 536                         (uintptr_t)STAILQ_FIRST(&mp[i]->mem_list)->iova;
 537                 mr->length = STAILQ_FIRST(&mp[i]->mem_list)->len <= INT32_MAX ?
 538                         STAILQ_FIRST(&mp[i]->mem_list)->len : INT32_MAX;
 539                 mr->txQueueBits = index[i];
 540                 mr->rxQueueBits = index[i];
 541
 542                 PMD_INIT_LOG(INFO,
 543                              "index: %u startPA: %" PRIu64 " length: %u, "
 544                              "rxBits: %x",
 545                              j, mr->startPA, mr->length, mr->rxQueueBits);
 546                 j++;
 547         }
 548         hw->memRegs->numRegs = j;
 549         PMD_INIT_LOG(INFO, "numRegs: %u", j);
 550
 551         size = sizeof(Vmxnet3_MemRegs) +
 552                 (j - 1) * sizeof(Vmxnet3_MemoryRegion);
 553
 554         cmdInfo = &shared->cu.cmdInfo;
 555         cmdInfo->varConf.confVer = 1;
 556         cmdInfo->varConf.confLen = size;
 557         cmdInfo->varConf.confPA = hw->memRegsPA;
 558
 559         return 0;
 560 }
 561
 562 static int
 563 vmxnet3_setup_driver_shared(struct rte_eth_dev *dev)
 564 {
 565         struct rte_eth_conf port_conf = dev->data->dev_conf;
 566         struct vmxnet3_hw *hw = dev->data->dev_private;
 567         uint32_t mtu = dev->data->mtu;
 568         Vmxnet3_DriverShared *shared = hw->shared;
 569         Vmxnet3_DSDevRead *devRead = &shared->devRead;
 570         uint32_t i;
 571         int ret;
 572
 573         hw->mtu = mtu;
 574
 575         shared->magic = VMXNET3_REV1_MAGIC;
 576         devRead->misc.driverInfo.version = VMXNET3_DRIVER_VERSION_NUM;
 577
 578         /* Setting up Guest OS information */
 579         devRead->misc.driverInfo.gos.gosBits   = sizeof(void *) == 4 ?
 580                 VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64;
 581         devRead->misc.driverInfo.gos.gosType   = VMXNET3_GOS_TYPE_LINUX;
 582         devRead->misc.driverInfo.vmxnet3RevSpt = 1;
 583         devRead->misc.driverInfo.uptVerSpt     = 1;
 584
 585         devRead->misc.mtu = rte_le_to_cpu_32(mtu);
 586         devRead->misc.queueDescPA  = hw->queueDescPA;
 587         devRead->misc.queueDescLen = hw->queue_desc_len;
 588         devRead->misc.numTxQueues  = hw->num_tx_queues;
 589         devRead->misc.numRxQueues  = hw->num_rx_queues;
 590
 591         /*
 592          * Set number of interrupts to 1
 593          * PMD by default disables all the interrupts but this is MUST
 594          * to activate device. It needs at least one interrupt for
 595          * link events to handle
 596          */
 597         hw->num_intrs = devRead->intrConf.numIntrs = 1;
 598         devRead->intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
 599
 600         for (i = 0; i < hw->num_tx_queues; i++) {
 601                 Vmxnet3_TxQueueDesc *tqd = &hw->tqd_start[i];
 602                 vmxnet3_tx_queue_t *txq  = dev->data->tx_queues[i];
 603
 604                 txq->shared = &hw->tqd_start[i];
 605
 606                 tqd->ctrl.txNumDeferred  = 0;
 607                 tqd->ctrl.txThreshold    = 1;
 608                 tqd->conf.txRingBasePA   = txq->cmd_ring.basePA;
 609                 tqd->conf.compRingBasePA = txq->comp_ring.basePA;
 610                 tqd->conf.dataRingBasePA = txq->data_ring.basePA;
 611
 612                 tqd->conf.txRingSize   = txq->cmd_ring.size;
 613                 tqd->conf.compRingSize = txq->comp_ring.size;
 614                 tqd->conf.dataRingSize = txq->data_ring.size;
 615                 tqd->conf.txDataRingDescSize = txq->txdata_desc_size;
 616                 tqd->conf.intrIdx      = txq->comp_ring.intr_idx;
 617                 tqd->status.stopped    = TRUE;
 618                 tqd->status.error      = 0;
 619                 memset(&tqd->stats, 0, sizeof(tqd->stats));
 620         }
 621
 622         for (i = 0; i < hw->num_rx_queues; i++) {
 623                 Vmxnet3_RxQueueDesc *rqd  = &hw->rqd_start[i];
 624                 vmxnet3_rx_queue_t *rxq   = dev->data->rx_queues[i];
 625
 626                 rxq->shared = &hw->rqd_start[i];
 627
 628                 rqd->conf.rxRingBasePA[0] = rxq->cmd_ring[0].basePA;
 629                 rqd->conf.rxRingBasePA[1] = rxq->cmd_ring[1].basePA;
 630                 rqd->conf.compRingBasePA  = rxq->comp_ring.basePA;
 631
 632                 rqd->conf.rxRingSize[0]   = rxq->cmd_ring[0].size;
 633                 rqd->conf.rxRingSize[1]   = rxq->cmd_ring[1].size;
 634                 rqd->conf.compRingSize    = rxq->comp_ring.size;
 635                 rqd->conf.intrIdx         = rxq->comp_ring.intr_idx;
 636                 if (VMXNET3_VERSION_GE_3(hw)) {
 637                         rqd->conf.rxDataRingBasePA = rxq->data_ring.basePA;
 638                         rqd->conf.rxDataRingDescSize = rxq->data_desc_size;
 639                 }
 640                 rqd->status.stopped       = TRUE;
 641                 rqd->status.error         = 0;
 642                 memset(&rqd->stats, 0, sizeof(rqd->stats));
 643         }
 644
 645         /* RxMode set to 0 of VMXNET3_RXM_xxx */
 646         devRead->rxFilterConf.rxMode = 0;
 647
 648         /* Setting up feature flags */
 649         if (dev->data->dev_conf.rxmode.hw_ip_checksum)
 650                 devRead->misc.uptFeatures |= VMXNET3_F_RXCSUM;
 651
 652         if (dev->data->dev_conf.rxmode.enable_lro) {
 653                 devRead->misc.uptFeatures |= VMXNET3_F_LRO;
 654                 devRead->misc.maxNumRxSG = 0;
 655         }
 656
 657         if (port_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 658                 ret = vmxnet3_rss_configure(dev);
 659                 if (ret != VMXNET3_SUCCESS)
 660                         return ret;
 661
 662                 devRead->misc.uptFeatures |= VMXNET3_F_RSS;
 663                 devRead->rssConfDesc.confVer = 1;
 664                 devRead->rssConfDesc.confLen = sizeof(struct VMXNET3_RSSConf);
 665                 devRead->rssConfDesc.confPA  = hw->rss_confPA;
 666         }
 667
 668         ret = vmxnet3_dev_vlan_offload_set(dev,
 669                         ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK);
 670         if (ret)
 671                 return ret;
 672
 673         vmxnet3_write_mac(hw, dev->data->mac_addrs->addr_bytes);
 674
 675         return VMXNET3_SUCCESS;
 676 }
 677
 678 /*
 679  * Configure device link speed and setup link.
 680  * Must be called after eth_vmxnet3_dev_init. Other wise it might fail
 681  * It returns 0 on success.
 682  */
 683 static int
 684 vmxnet3_dev_start(struct rte_eth_dev *dev)
 685 {
 686         int ret;
 687         struct vmxnet3_hw *hw = dev->data->dev_private;
 688
 689         PMD_INIT_FUNC_TRACE();
 690
 691         /* Save stats before it is reset by CMD_ACTIVATE */
 692         vmxnet3_hw_stats_save(hw);
 693
 694         ret = vmxnet3_setup_driver_shared(dev);
 695         if (ret != VMXNET3_SUCCESS)
 696                 return ret;
 697
 698         /* check if lsc interrupt feature is enabled */
 699         if (dev->data->dev_conf.intr_conf.lsc) {
 700                 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
 701
 702                 /* Setup interrupt callback  */
 703                 rte_intr_callback_register(&pci_dev->intr_handle,
 704                                            vmxnet3_interrupt_handler, dev);
 705
 706                 if (rte_intr_enable(&pci_dev->intr_handle) < 0) {
 707                         PMD_INIT_LOG(ERR, "interrupt enable failed");
 708                         return -EIO;
 709                 }
 710         }
 711
 712         /* Exchange shared data with device */
 713         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL,
 714                                VMXNET3_GET_ADDR_LO(hw->sharedPA));
 715         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH,
 716                                VMXNET3_GET_ADDR_HI(hw->sharedPA));
 717
 718         /* Activate device by register write */
 719         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_ACTIVATE_DEV);
 720         ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 721
 722         if (ret != 0) {
 723                 PMD_INIT_LOG(ERR, "Device activation: UNSUCCESSFUL");
 724                 return -EINVAL;
 725         }
 726
 727         /* Setup memory region for rx buffers */
 728         ret = vmxnet3_dev_setup_memreg(dev);
 729         if (ret == 0) {
 730                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 731                                        VMXNET3_CMD_REGISTER_MEMREGS);
 732                 ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 733                 if (ret != 0)
 734                         PMD_INIT_LOG(DEBUG,
 735                                      "Failed in setup memory region cmd\n");
 736                 ret = 0;
 737         } else {
 738                 PMD_INIT_LOG(DEBUG, "Failed to setup memory region\n");
 739         }
 740
 741         /* Disable interrupts */
 742         vmxnet3_disable_intr(hw);
 743
 744         /*
 745          * Load RX queues with blank mbufs and update next2fill index for device
 746          * Update RxMode of the device
 747          */
 748         ret = vmxnet3_dev_rxtx_init(dev);
 749         if (ret != VMXNET3_SUCCESS) {
 750                 PMD_INIT_LOG(ERR, "Device queue init: UNSUCCESSFUL");
 751                 return ret;
 752         }
 753
 754         hw->adapter_stopped = FALSE;
 755
 756         /* Setting proper Rx Mode and issue Rx Mode Update command */
 757         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_UCAST | VMXNET3_RXM_BCAST, 1);
 758
 759         if (dev->data->dev_conf.intr_conf.lsc) {
 760                 vmxnet3_enable_intr(hw);
 761
 762                 /*
 763                  * Update link state from device since this won't be
 764                  * done upon starting with lsc in use. This is done
 765                  * only after enabling interrupts to avoid any race
 766                  * where the link state could change without an
 767                  * interrupt being fired.
 768                  */
 769                 __vmxnet3_dev_link_update(dev, 0);
 770         }
 771
 772         return VMXNET3_SUCCESS;
 773 }
 774
 775 /*
 776  * Stop device: disable rx and tx functions to allow for reconfiguring.
 777  */
 778 static void
 779 vmxnet3_dev_stop(struct rte_eth_dev *dev)
 780 {
 781         struct rte_eth_link link;
 782         struct vmxnet3_hw *hw = dev->data->dev_private;
 783
 784         PMD_INIT_FUNC_TRACE();
 785
 786         if (hw->adapter_stopped == 1) {
 787                 PMD_INIT_LOG(DEBUG, "Device already closed.");
 788                 return;
 789         }
 790
 791         /* disable interrupts */
 792         vmxnet3_disable_intr(hw);
 793
 794         if (dev->data->dev_conf.intr_conf.lsc) {
 795                 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
 796
 797                 rte_intr_disable(&pci_dev->intr_handle);
 798
 799                 rte_intr_callback_unregister(&pci_dev->intr_handle,
 800                                              vmxnet3_interrupt_handler, dev);
 801         }
 802
 803         /* quiesce the device first */
 804         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
 805         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL, 0);
 806         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH, 0);
 807
 808         /* reset the device */
 809         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
 810         PMD_INIT_LOG(DEBUG, "Device reset.");
 811         hw->adapter_stopped = 0;
 812
 813         vmxnet3_dev_clear_queues(dev);
 814
 815         /* Clear recorded link status */
 816         memset(&link, 0, sizeof(link));
 817         link.link_duplex = ETH_LINK_FULL_DUPLEX;
 818         link.link_speed = ETH_SPEED_NUM_10G;
 819         link.link_autoneg = ETH_LINK_FIXED;
 820         rte_eth_linkstatus_set(dev, &link);
 821 }
 822
 823 /*
 824  * Reset and stop device.
 825  */
 826 static void
 827 vmxnet3_dev_close(struct rte_eth_dev *dev)
 828 {
 829         struct vmxnet3_hw *hw = dev->data->dev_private;
 830
 831         PMD_INIT_FUNC_TRACE();
 832
 833         vmxnet3_dev_stop(dev);
 834         hw->adapter_stopped = 1;
 835 }
 836
 837 static void
 838 vmxnet3_hw_tx_stats_get(struct vmxnet3_hw *hw, unsigned int q,
 839                         struct UPT1_TxStats *res)
 840 {
 841 #define VMXNET3_UPDATE_TX_STAT(h, i, f, r)              \
 842                 ((r)->f = (h)->tqd_start[(i)].stats.f + \
 843                         (h)->saved_tx_stats[(i)].f)
 844
 845         VMXNET3_UPDATE_TX_STAT(hw, q, ucastPktsTxOK, res);
 846         VMXNET3_UPDATE_TX_STAT(hw, q, mcastPktsTxOK, res);
 847         VMXNET3_UPDATE_TX_STAT(hw, q, bcastPktsTxOK, res);
 848         VMXNET3_UPDATE_TX_STAT(hw, q, ucastBytesTxOK, res);
 849         VMXNET3_UPDATE_TX_STAT(hw, q, mcastBytesTxOK, res);
 850         VMXNET3_UPDATE_TX_STAT(hw, q, bcastBytesTxOK, res);
 851         VMXNET3_UPDATE_TX_STAT(hw, q, pktsTxError, res);
 852         VMXNET3_UPDATE_TX_STAT(hw, q, pktsTxDiscard, res);
 853
 854 #undef VMXNET3_UPDATE_TX_STAT
 855 }
 856
 857 static void
 858 vmxnet3_hw_rx_stats_get(struct vmxnet3_hw *hw, unsigned int q,
 859                         struct UPT1_RxStats *res)
 860 {
 861 #define VMXNET3_UPDATE_RX_STAT(h, i, f, r)              \
 862                 ((r)->f = (h)->rqd_start[(i)].stats.f + \
 863                         (h)->saved_rx_stats[(i)].f)
 864
 865         VMXNET3_UPDATE_RX_STAT(hw, q, ucastPktsRxOK, res);
 866         VMXNET3_UPDATE_RX_STAT(hw, q, mcastPktsRxOK, res);
 867         VMXNET3_UPDATE_RX_STAT(hw, q, bcastPktsRxOK, res);
 868         VMXNET3_UPDATE_RX_STAT(hw, q, ucastBytesRxOK, res);
 869         VMXNET3_UPDATE_RX_STAT(hw, q, mcastBytesRxOK, res);
 870         VMXNET3_UPDATE_RX_STAT(hw, q, bcastBytesRxOK, res);
 871         VMXNET3_UPDATE_RX_STAT(hw, q, pktsRxError, res);
 872         VMXNET3_UPDATE_RX_STAT(hw, q, pktsRxOutOfBuf, res);
 873
 874 #undef VMXNET3_UPDATE_RX_STATS
 875 }
 876
 877 static void
 878 vmxnet3_hw_stats_save(struct vmxnet3_hw *hw)
 879 {
 880         unsigned int i;
 881
 882         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
 883
 884         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_TX_QUEUES);
 885
 886         for (i = 0; i < hw->num_tx_queues; i++)
 887                 vmxnet3_hw_tx_stats_get(hw, i, &hw->saved_tx_stats[i]);
 888         for (i = 0; i < hw->num_rx_queues; i++)
 889                 vmxnet3_hw_rx_stats_get(hw, i, &hw->saved_rx_stats[i]);
 890 }
 891
 892 static int
 893 vmxnet3_dev_xstats_get_names(struct rte_eth_dev *dev,
 894                              struct rte_eth_xstat_name *xstats_names,
 895                              unsigned int n)
 896 {
 897         unsigned int i, t, count = 0;
 898         unsigned int nstats =
 899                 dev->data->nb_tx_queues * RTE_DIM(vmxnet3_txq_stat_strings) +
 900                 dev->data->nb_rx_queues * RTE_DIM(vmxnet3_rxq_stat_strings);
 901
 902         if (!xstats_names || n < nstats)
 903                 return nstats;
 904
 905         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 906                 if (!dev->data->rx_queues[i])
 907                         continue;
 908
 909                 for (t = 0; t < RTE_DIM(vmxnet3_rxq_stat_strings); t++) {
 910                         snprintf(xstats_names[count].name,
 911                                  sizeof(xstats_names[count].name),
 912                                  "rx_q%u_%s", i,
 913                                  vmxnet3_rxq_stat_strings[t].name);
 914                         count++;
 915                 }
 916         }
 917
 918         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 919                 if (!dev->data->tx_queues[i])
 920                         continue;
 921
 922                 for (t = 0; t < RTE_DIM(vmxnet3_txq_stat_strings); t++) {
 923                         snprintf(xstats_names[count].name,
 924                                  sizeof(xstats_names[count].name),
 925                                  "tx_q%u_%s", i,
 926                                  vmxnet3_txq_stat_strings[t].name);
 927                         count++;
 928                 }
 929         }
 930
 931         return count;
 932 }
 933
 934 static int
 935 vmxnet3_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
 936                        unsigned int n)
 937 {
 938         unsigned int i, t, count = 0;
 939         unsigned int nstats =
 940                 dev->data->nb_tx_queues * RTE_DIM(vmxnet3_txq_stat_strings) +
 941                 dev->data->nb_rx_queues * RTE_DIM(vmxnet3_rxq_stat_strings);
 942
 943         if (n < nstats)
 944                 return nstats;
 945
 946         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 947                 struct vmxnet3_rx_queue *rxq = dev->data->rx_queues[i];
 948
 949                 if (rxq == NULL)
 950                         continue;
 951
 952                 for (t = 0; t < RTE_DIM(vmxnet3_rxq_stat_strings); t++) {
 953                         xstats[count].value = *(uint64_t *)(((char *)&rxq->stats) +
 954                                 vmxnet3_rxq_stat_strings[t].offset);
 955                         xstats[count].id = count;
 956                         count++;
 957                 }
 958         }
 959
 960         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 961                 struct vmxnet3_tx_queue *txq = dev->data->tx_queues[i];
 962
 963                 if (txq == NULL)
 964                         continue;
 965
 966                 for (t = 0; t < RTE_DIM(vmxnet3_txq_stat_strings); t++) {
 967                         xstats[count].value = *(uint64_t *)(((char *)&txq->stats) +
 968                                 vmxnet3_txq_stat_strings[t].offset);
 969                         xstats[count].id = count;
 970                         count++;
 971                 }
 972         }
 973
 974         return count;
 975 }
 976
 977 static int
 978 vmxnet3_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
 979 {
 980         unsigned int i;
 981         struct vmxnet3_hw *hw = dev->data->dev_private;
 982         struct UPT1_TxStats txStats;
 983         struct UPT1_RxStats rxStats;
 984
 985         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
 986
 987         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_TX_QUEUES);
 988         for (i = 0; i < hw->num_tx_queues; i++) {
 989                 vmxnet3_hw_tx_stats_get(hw, i, &txStats);
 990
 991                 stats->q_opackets[i] = txStats.ucastPktsTxOK +
 992                         txStats.mcastPktsTxOK +
 993                         txStats.bcastPktsTxOK;
 994
 995                 stats->q_obytes[i] = txStats.ucastBytesTxOK +
 996                         txStats.mcastBytesTxOK +
 997                         txStats.bcastBytesTxOK;
 998
 999                 stats->opackets += stats->q_opackets[i];
1000                 stats->obytes += stats->q_obytes[i];
1001                 stats->oerrors += txStats.pktsTxError + txStats.pktsTxDiscard;
1002         }
1003
1004         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_RX_QUEUES);
1005         for (i = 0; i < hw->num_rx_queues; i++) {
1006                 vmxnet3_hw_rx_stats_get(hw, i, &rxStats);
1007
1008                 stats->q_ipackets[i] = rxStats.ucastPktsRxOK +
1009                         rxStats.mcastPktsRxOK +
1010                         rxStats.bcastPktsRxOK;
1011
1012                 stats->q_ibytes[i] = rxStats.ucastBytesRxOK +
1013                         rxStats.mcastBytesRxOK +
1014                         rxStats.bcastBytesRxOK;
1015
1016                 stats->ipackets += stats->q_ipackets[i];
1017                 stats->ibytes += stats->q_ibytes[i];
1018
1019                 stats->q_errors[i] = rxStats.pktsRxError;
1020                 stats->ierrors += rxStats.pktsRxError;
1021                 stats->imissed += rxStats.pktsRxOutOfBuf;
1022         }
1023
1024         return 0;
1025 }
1026
1027 static void
1028 vmxnet3_dev_info_get(struct rte_eth_dev *dev __rte_unused,
1029                      struct rte_eth_dev_info *dev_info)
1030 {
1031         dev_info->max_rx_queues = VMXNET3_MAX_RX_QUEUES;
1032         dev_info->max_tx_queues = VMXNET3_MAX_TX_QUEUES;
1033         dev_info->min_rx_bufsize = 1518 + RTE_PKTMBUF_HEADROOM;
1034         dev_info->max_rx_pktlen = 16384; /* includes CRC, cf MAXFRS register */
1035         dev_info->speed_capa = ETH_LINK_SPEED_10G;
1036         dev_info->max_mac_addrs = VMXNET3_MAX_MAC_ADDRS;
1037
1038         dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOXSUMSCTP;
1039         dev_info->flow_type_rss_offloads = VMXNET3_RSS_OFFLOAD_ALL;
1040
1041         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
1042                 .nb_max = VMXNET3_RX_RING_MAX_SIZE,
1043                 .nb_min = VMXNET3_DEF_RX_RING_SIZE,
1044                 .nb_align = 1,
1045         };
1046
1047         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
1048                 .nb_max = VMXNET3_TX_RING_MAX_SIZE,
1049                 .nb_min = VMXNET3_DEF_TX_RING_SIZE,
1050                 .nb_align = 1,
1051                 .nb_seg_max = VMXNET3_TX_MAX_SEG,
1052                 .nb_mtu_seg_max = VMXNET3_MAX_TXD_PER_PKT,
1053         };
1054
1055         dev_info->rx_offload_capa =
1056                 DEV_RX_OFFLOAD_VLAN_STRIP |
1057                 DEV_RX_OFFLOAD_UDP_CKSUM |
1058                 DEV_RX_OFFLOAD_TCP_CKSUM |
1059                 DEV_RX_OFFLOAD_TCP_LRO;
1060
1061         dev_info->tx_offload_capa =
1062                 DEV_TX_OFFLOAD_VLAN_INSERT |
1063                 DEV_TX_OFFLOAD_TCP_CKSUM |
1064                 DEV_TX_OFFLOAD_UDP_CKSUM |
1065                 DEV_TX_OFFLOAD_TCP_TSO;
1066 }
1067
1068 static const uint32_t *
1069 vmxnet3_dev_supported_ptypes_get(struct rte_eth_dev *dev)
1070 {
1071         static const uint32_t ptypes[] = {
1072                 RTE_PTYPE_L3_IPV4_EXT,
1073                 RTE_PTYPE_L3_IPV4,
1074                 RTE_PTYPE_UNKNOWN
1075         };
1076
1077         if (dev->rx_pkt_burst == vmxnet3_recv_pkts)
1078                 return ptypes;
1079         return NULL;
1080 }
1081
1082 static int
1083 vmxnet3_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
1084 {
1085         struct vmxnet3_hw *hw = dev->data->dev_private;
1086
1087         ether_addr_copy(mac_addr, (struct ether_addr *)(hw->perm_addr));
1088         vmxnet3_write_mac(hw, mac_addr->addr_bytes);
1089         return 0;
1090 }
1091
1092 /* return 0 means link status changed, -1 means not changed */
1093 static int
1094 __vmxnet3_dev_link_update(struct rte_eth_dev *dev,
1095                           __rte_unused int wait_to_complete)
1096 {
1097         struct vmxnet3_hw *hw = dev->data->dev_private;
1098         struct rte_eth_link link;
1099         uint32_t ret;
1100
1101         memset(&link, 0, sizeof(link));
1102
1103         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
1104         ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
1105
1106         if (ret & 0x1)
1107                 link.link_status = ETH_LINK_UP;
1108         link.link_duplex = ETH_LINK_FULL_DUPLEX;
1109         link.link_speed = ETH_SPEED_NUM_10G;
1110         link.link_autoneg = ETH_LINK_FIXED;
1111
1112         return rte_eth_linkstatus_set(dev, &link);
1113 }
1114
1115 static int
1116 vmxnet3_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete)
1117 {
1118         /* Link status doesn't change for stopped dev */
1119         if (dev->data->dev_started == 0)
1120                 return -1;
1121
1122         return __vmxnet3_dev_link_update(dev, wait_to_complete);
1123 }
1124
1125 /* Updating rxmode through Vmxnet3_DriverShared structure in adapter */
1126 static void
1127 vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set)
1128 {
1129         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
1130
1131         if (set)
1132                 rxConf->rxMode = rxConf->rxMode | feature;
1133         else
1134                 rxConf->rxMode = rxConf->rxMode & (~feature);
1135
1136         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_UPDATE_RX_MODE);
1137 }
1138
1139 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
1140 static void
1141 vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev)
1142 {
1143         struct vmxnet3_hw *hw = dev->data->dev_private;
1144         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
1145
1146         memset(vf_table, 0, VMXNET3_VFT_TABLE_SIZE);
1147         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 1);
1148
1149         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1150                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1151 }
1152
1153 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
1154 static void
1155 vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev)
1156 {
1157         struct vmxnet3_hw *hw = dev->data->dev_private;
1158         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
1159
1160         if (dev->data->dev_conf.rxmode.hw_vlan_filter)
1161                 memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
1162         else
1163                 memset(vf_table, 0xff, VMXNET3_VFT_TABLE_SIZE);
1164         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 0);
1165         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1166                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1167 }
1168
1169 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
1170 static void
1171 vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev)
1172 {
1173         struct vmxnet3_hw *hw = dev->data->dev_private;
1174
1175         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 1);
1176 }
1177
1178 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
1179 static void
1180 vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev)
1181 {
1182         struct vmxnet3_hw *hw = dev->data->dev_private;
1183
1184         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 0);
1185 }
1186
1187 /* Enable/disable filter on vlan */
1188 static int
1189 vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vid, int on)
1190 {
1191         struct vmxnet3_hw *hw = dev->data->dev_private;
1192         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
1193         uint32_t *vf_table = rxConf->vfTable;
1194
1195         /* save state for restore */
1196         if (on)
1197                 VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, vid);
1198         else
1199                 VMXNET3_CLEAR_VFTABLE_ENTRY(hw->shadow_vfta, vid);
1200
1201         /* don't change active filter if in promiscuous mode */
1202         if (rxConf->rxMode & VMXNET3_RXM_PROMISC)
1203                 return 0;
1204
1205         /* set in hardware */
1206         if (on)
1207                 VMXNET3_SET_VFTABLE_ENTRY(vf_table, vid);
1208         else
1209                 VMXNET3_CLEAR_VFTABLE_ENTRY(vf_table, vid);
1210
1211         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1212                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1213         return 0;
1214 }
1215
1216 static int
1217 vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1218 {
1219         struct vmxnet3_hw *hw = dev->data->dev_private;
1220         Vmxnet3_DSDevRead *devRead = &hw->shared->devRead;
1221         uint32_t *vf_table = devRead->rxFilterConf.vfTable;
1222
1223         if (mask & ETH_VLAN_STRIP_MASK) {
1224                 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1225                         devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
1226                 else
1227                         devRead->misc.uptFeatures &= ~UPT1_F_RXVLAN;
1228
1229                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1230                                        VMXNET3_CMD_UPDATE_FEATURE);
1231         }
1232
1233         if (mask & ETH_VLAN_FILTER_MASK) {
1234                 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
1235                         memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
1236                 else
1237                         memset(vf_table, 0xff, VMXNET3_VFT_TABLE_SIZE);
1238
1239                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1240                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1241         }
1242
1243         return 0;
1244 }
1245
1246 static void
1247 vmxnet3_process_events(struct rte_eth_dev *dev)
1248 {
1249         struct vmxnet3_hw *hw = dev->data->dev_private;
1250         uint32_t events = hw->shared->ecr;
1251
1252         if (!events)
1253                 return;
1254
1255         /*
1256          * ECR bits when written with 1b are cleared. Hence write
1257          * events back to ECR so that the bits which were set will be reset.
1258          */
1259         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_ECR, events);
1260
1261         /* Check if link state has changed */
1262         if (events & VMXNET3_ECR_LINK) {
1263                 PMD_DRV_LOG(DEBUG, "Process events: VMXNET3_ECR_LINK event");
1264                 if (vmxnet3_dev_link_update(dev, 0) == 0)
1265                         _rte_eth_dev_callback_process(dev,
1266                                                       RTE_ETH_EVENT_INTR_LSC,
1267                                                       NULL);
1268         }
1269
1270         /* Check if there is an error on xmit/recv queues */
1271         if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
1272                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1273                                        VMXNET3_CMD_GET_QUEUE_STATUS);
1274
1275                 if (hw->tqd_start->status.stopped)
1276                         PMD_DRV_LOG(ERR, "tq error 0x%x",
1277                                     hw->tqd_start->status.error);
1278
1279                 if (hw->rqd_start->status.stopped)
1280                         PMD_DRV_LOG(ERR, "rq error 0x%x",
1281                                      hw->rqd_start->status.error);
1282
1283                 /* Reset the device */
1284                 /* Have to reset the device */
1285         }
1286
1287         if (events & VMXNET3_ECR_DIC)
1288                 PMD_DRV_LOG(DEBUG, "Device implementation change event.");
1289
1290         if (events & VMXNET3_ECR_DEBUG)
1291                 PMD_DRV_LOG(DEBUG, "Debug event generated by device.");
1292 }
1293
1294 static void
1295 vmxnet3_interrupt_handler(void *param)
1296 {
1297         struct rte_eth_dev *dev = param;
1298         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
1299
1300         vmxnet3_process_events(dev);
1301
1302         if (rte_intr_enable(&pci_dev->intr_handle) < 0)
1303                 PMD_DRV_LOG(ERR, "interrupt enable failed");
1304 }
1305
1306 RTE_PMD_REGISTER_PCI(net_vmxnet3, rte_vmxnet3_pmd);
1307 RTE_PMD_REGISTER_PCI_TABLE(net_vmxnet3, pci_id_vmxnet3_map);
1308 RTE_PMD_REGISTER_KMOD_DEP(net_vmxnet3, "* igb_uio | uio_pci_generic | vfio-pci");
1309
1310 RTE_INIT(vmxnet3_init_log);
1311 static void
1312 vmxnet3_init_log(void)
1313 {
1314         vmxnet3_logtype_init = rte_log_register("pmd.net.vmxnet3.init");
1315         if (vmxnet3_logtype_init >= 0)
1316                 rte_log_set_level(vmxnet3_logtype_init, RTE_LOG_NOTICE);
1317         vmxnet3_logtype_driver = rte_log_register("pmd.net.vmxnet3.driver");
1318         if (vmxnet3_logtype_driver >= 0)
1319                 rte_log_set_level(vmxnet3_logtype_driver, RTE_LOG_NOTICE);
1320 }