drivers/net/vmxnet3/vmxnet3_ethdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Intel Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <sys/queue.h>
  35 #include <stdio.h>
  36 #include <errno.h>
  37 #include <stdint.h>
  38 #include <string.h>
  39 #include <unistd.h>
  40 #include <stdarg.h>
  41 #include <fcntl.h>
  42 #include <inttypes.h>
  43 #include <rte_byteorder.h>
  44 #include <rte_common.h>
  45 #include <rte_cycles.h>
  46
  47 #include <rte_interrupts.h>
  48 #include <rte_log.h>
  49 #include <rte_debug.h>
  50 #include <rte_pci.h>
  51 #include <rte_atomic.h>
  52 #include <rte_branch_prediction.h>
  53 #include <rte_memory.h>
  54 #include <rte_memzone.h>
  55 #include <rte_eal.h>
  56 #include <rte_alarm.h>
  57 #include <rte_ether.h>
  58 #include <rte_ethdev.h>
  59 #include <rte_atomic.h>
  60 #include <rte_string_fns.h>
  61 #include <rte_malloc.h>
  62 #include <rte_dev.h>
  63
  64 #include "base/vmxnet3_defs.h"
  65
  66 #include "vmxnet3_ring.h"
  67 #include "vmxnet3_logs.h"
  68 #include "vmxnet3_ethdev.h"
  69
  70 #define PROCESS_SYS_EVENTS 0
  71
  72 static int eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev);
  73 static int eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev);
  74 static int vmxnet3_dev_configure(struct rte_eth_dev *dev);
  75 static int vmxnet3_dev_start(struct rte_eth_dev *dev);
  76 static void vmxnet3_dev_stop(struct rte_eth_dev *dev);
  77 static void vmxnet3_dev_close(struct rte_eth_dev *dev);
  78 static void vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set);
  79 static void vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev);
  80 static void vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev);
  81 static void vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev);
  82 static void vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev);
  83 static int vmxnet3_dev_link_update(struct rte_eth_dev *dev,
  84                                    int wait_to_complete);
  85 static void vmxnet3_dev_stats_get(struct rte_eth_dev *dev,
  86                                   struct rte_eth_stats *stats);
  87 static void vmxnet3_dev_info_get(struct rte_eth_dev *dev,
  88                                  struct rte_eth_dev_info *dev_info);
  89 static const uint32_t *
  90 vmxnet3_dev_supported_ptypes_get(struct rte_eth_dev *dev);
  91 static int vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev,
  92                                        uint16_t vid, int on);
  93 static void vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask);
  94 static void vmxnet3_mac_addr_set(struct rte_eth_dev *dev,
  95                                  struct ether_addr *mac_addr);
  96
  97 #if PROCESS_SYS_EVENTS == 1
  98 static void vmxnet3_process_events(struct vmxnet3_hw *);
  99 #endif
 100 /*
 101  * The set of PCI devices this driver supports
 102  */
 103 #define VMWARE_PCI_VENDOR_ID 0x15AD
 104 #define VMWARE_DEV_ID_VMXNET3 0x07B0
 105 static const struct rte_pci_id pci_id_vmxnet3_map[] = {
 106         { RTE_PCI_DEVICE(VMWARE_PCI_VENDOR_ID, VMWARE_DEV_ID_VMXNET3) },
 107         { .vendor_id = 0, /* sentinel */ },
 108 };
 109
 110 static const struct eth_dev_ops vmxnet3_eth_dev_ops = {
 111         .dev_configure        = vmxnet3_dev_configure,
 112         .dev_start            = vmxnet3_dev_start,
 113         .dev_stop             = vmxnet3_dev_stop,
 114         .dev_close            = vmxnet3_dev_close,
 115         .promiscuous_enable   = vmxnet3_dev_promiscuous_enable,
 116         .promiscuous_disable  = vmxnet3_dev_promiscuous_disable,
 117         .allmulticast_enable  = vmxnet3_dev_allmulticast_enable,
 118         .allmulticast_disable = vmxnet3_dev_allmulticast_disable,
 119         .link_update          = vmxnet3_dev_link_update,
 120         .stats_get            = vmxnet3_dev_stats_get,
 121         .mac_addr_set         = vmxnet3_mac_addr_set,
 122         .dev_infos_get        = vmxnet3_dev_info_get,
 123         .dev_supported_ptypes_get = vmxnet3_dev_supported_ptypes_get,
 124         .vlan_filter_set      = vmxnet3_dev_vlan_filter_set,
 125         .vlan_offload_set     = vmxnet3_dev_vlan_offload_set,
 126         .rx_queue_setup       = vmxnet3_dev_rx_queue_setup,
 127         .rx_queue_release     = vmxnet3_dev_rx_queue_release,
 128         .tx_queue_setup       = vmxnet3_dev_tx_queue_setup,
 129         .tx_queue_release     = vmxnet3_dev_tx_queue_release,
 130 };
 131
 132 static const struct rte_memzone *
 133 gpa_zone_reserve(struct rte_eth_dev *dev, uint32_t size,
 134                  const char *post_string, int socket_id, uint16_t align)
 135 {
 136         char z_name[RTE_MEMZONE_NAMESIZE];
 137         const struct rte_memzone *mz;
 138
 139         snprintf(z_name, sizeof(z_name), "%s_%d_%s",
 140                  dev->driver->pci_drv.driver.name, dev->data->port_id, post_string);
 141
 142         mz = rte_memzone_lookup(z_name);
 143         if (mz)
 144                 return mz;
 145
 146         return rte_memzone_reserve_aligned(z_name, size, socket_id, 0, align);
 147 }
 148
 149 /**
 150  * Atomically reads the link status information from global
 151  * structure rte_eth_dev.
 152  *
 153  * @param dev
 154  *   - Pointer to the structure rte_eth_dev to read from.
 155  *   - Pointer to the buffer to be saved with the link status.
 156  *
 157  * @return
 158  *   - On success, zero.
 159  *   - On failure, negative value.
 160  */
 161
 162 static int
 163 vmxnet3_dev_atomic_read_link_status(struct rte_eth_dev *dev,
 164                                     struct rte_eth_link *link)
 165 {
 166         struct rte_eth_link *dst = link;
 167         struct rte_eth_link *src = &(dev->data->dev_link);
 168
 169         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
 170                                 *(uint64_t *)src) == 0)
 171                 return -1;
 172
 173         return 0;
 174 }
 175
 176 /**
 177  * Atomically writes the link status information into global
 178  * structure rte_eth_dev.
 179  *
 180  * @param dev
 181  *   - Pointer to the structure rte_eth_dev to write to.
 182  *   - Pointer to the buffer to be saved with the link status.
 183  *
 184  * @return
 185  *   - On success, zero.
 186  *   - On failure, negative value.
 187  */
 188 static int
 189 vmxnet3_dev_atomic_write_link_status(struct rte_eth_dev *dev,
 190                                      struct rte_eth_link *link)
 191 {
 192         struct rte_eth_link *dst = &(dev->data->dev_link);
 193         struct rte_eth_link *src = link;
 194
 195         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
 196                                 *(uint64_t *)src) == 0)
 197                 return -1;
 198
 199         return 0;
 200 }
 201
 202 /*
 203  * This function is based on vmxnet3_disable_intr()
 204  */
 205 static void
 206 vmxnet3_disable_intr(struct vmxnet3_hw *hw)
 207 {
 208         int i;
 209
 210         PMD_INIT_FUNC_TRACE();
 211
 212         hw->shared->devRead.intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
 213         for (i = 0; i < VMXNET3_MAX_INTRS; i++)
 214                 VMXNET3_WRITE_BAR0_REG(hw, VMXNET3_REG_IMR + i * 8, 1);
 215 }
 216
 217 /*
 218  * It returns 0 on success.
 219  */
 220 static int
 221 eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev)
 222 {
 223         struct rte_pci_device *pci_dev;
 224         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
 225         uint32_t mac_hi, mac_lo, ver;
 226
 227         PMD_INIT_FUNC_TRACE();
 228
 229         eth_dev->dev_ops = &vmxnet3_eth_dev_ops;
 230         eth_dev->rx_pkt_burst = &vmxnet3_recv_pkts;
 231         eth_dev->tx_pkt_burst = &vmxnet3_xmit_pkts;
 232         pci_dev = eth_dev->pci_dev;
 233
 234         /*
 235          * for secondary processes, we don't initialize any further as primary
 236          * has already done this work.
 237          */
 238         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 239                 return 0;
 240
 241         rte_eth_copy_pci_info(eth_dev, pci_dev);
 242
 243         /* Vendor and Device ID need to be set before init of shared code */
 244         hw->device_id = pci_dev->id.device_id;
 245         hw->vendor_id = pci_dev->id.vendor_id;
 246         hw->hw_addr0 = (void *)pci_dev->mem_resource[0].addr;
 247         hw->hw_addr1 = (void *)pci_dev->mem_resource[1].addr;
 248
 249         hw->num_rx_queues = 1;
 250         hw->num_tx_queues = 1;
 251         hw->bufs_per_pkt = 1;
 252
 253         /* Check h/w version compatibility with driver. */
 254         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_VRRS);
 255         PMD_INIT_LOG(DEBUG, "Hardware version : %d", ver);
 256         if (ver & 0x1)
 257                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS, 1);
 258         else {
 259                 PMD_INIT_LOG(ERR, "Incompatible h/w version, should be 0x1");
 260                 return -EIO;
 261         }
 262
 263         /* Check UPT version compatibility with driver. */
 264         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_UVRS);
 265         PMD_INIT_LOG(DEBUG, "UPT hardware version : %d", ver);
 266         if (ver & 0x1)
 267                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_UVRS, 1);
 268         else {
 269                 PMD_INIT_LOG(ERR, "Incompatible UPT version.");
 270                 return -EIO;
 271         }
 272
 273         /* Getting MAC Address */
 274         mac_lo = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACL);
 275         mac_hi = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACH);
 276         memcpy(hw->perm_addr, &mac_lo, 4);
 277         memcpy(hw->perm_addr + 4, &mac_hi, 2);
 278
 279         /* Allocate memory for storing MAC addresses */
 280         eth_dev->data->mac_addrs = rte_zmalloc("vmxnet3", ETHER_ADDR_LEN *
 281                                                VMXNET3_MAX_MAC_ADDRS, 0);
 282         if (eth_dev->data->mac_addrs == NULL) {
 283                 PMD_INIT_LOG(ERR,
 284                              "Failed to allocate %d bytes needed to store MAC addresses",
 285                              ETHER_ADDR_LEN * VMXNET3_MAX_MAC_ADDRS);
 286                 return -ENOMEM;
 287         }
 288         /* Copy the permanent MAC address */
 289         ether_addr_copy((struct ether_addr *) hw->perm_addr,
 290                         &eth_dev->data->mac_addrs[0]);
 291
 292         PMD_INIT_LOG(DEBUG, "MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
 293                      hw->perm_addr[0], hw->perm_addr[1], hw->perm_addr[2],
 294                      hw->perm_addr[3], hw->perm_addr[4], hw->perm_addr[5]);
 295
 296         /* Put device in Quiesce Mode */
 297         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
 298
 299         /* allow untagged pkts */
 300         VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, 0);
 301
 302         return 0;
 303 }
 304
 305 static int
 306 eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev)
 307 {
 308         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
 309
 310         PMD_INIT_FUNC_TRACE();
 311
 312         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 313                 return 0;
 314
 315         if (hw->adapter_stopped == 0)
 316                 vmxnet3_dev_close(eth_dev);
 317
 318         eth_dev->dev_ops = NULL;
 319         eth_dev->rx_pkt_burst = NULL;
 320         eth_dev->tx_pkt_burst = NULL;
 321
 322         rte_free(eth_dev->data->mac_addrs);
 323         eth_dev->data->mac_addrs = NULL;
 324
 325         return 0;
 326 }
 327
 328 static struct eth_driver rte_vmxnet3_pmd = {
 329         .pci_drv = {
 330                 .id_table = pci_id_vmxnet3_map,
 331                 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_DETACHABLE,
 332                 .probe = rte_eth_dev_pci_probe,
 333                 .remove = rte_eth_dev_pci_remove,
 334         },
 335         .eth_dev_init = eth_vmxnet3_dev_init,
 336         .eth_dev_uninit = eth_vmxnet3_dev_uninit,
 337         .dev_private_size = sizeof(struct vmxnet3_hw),
 338 };
 339
 340 static int
 341 vmxnet3_dev_configure(struct rte_eth_dev *dev)
 342 {
 343         const struct rte_memzone *mz;
 344         struct vmxnet3_hw *hw = dev->data->dev_private;
 345         size_t size;
 346
 347         PMD_INIT_FUNC_TRACE();
 348
 349         if (dev->data->nb_tx_queues > VMXNET3_MAX_TX_QUEUES ||
 350             dev->data->nb_rx_queues > VMXNET3_MAX_RX_QUEUES) {
 351                 PMD_INIT_LOG(ERR, "ERROR: Number of queues not supported");
 352                 return -EINVAL;
 353         }
 354
 355         if (!rte_is_power_of_2(dev->data->nb_rx_queues)) {
 356                 PMD_INIT_LOG(ERR, "ERROR: Number of rx queues not power of 2");
 357                 return -EINVAL;
 358         }
 359
 360         size = dev->data->nb_rx_queues * sizeof(struct Vmxnet3_TxQueueDesc) +
 361                 dev->data->nb_tx_queues * sizeof(struct Vmxnet3_RxQueueDesc);
 362
 363         if (size > UINT16_MAX)
 364                 return -EINVAL;
 365
 366         hw->num_rx_queues = (uint8_t)dev->data->nb_rx_queues;
 367         hw->num_tx_queues = (uint8_t)dev->data->nb_tx_queues;
 368
 369         /*
 370          * Allocate a memzone for Vmxnet3_DriverShared - Vmxnet3_DSDevRead
 371          * on current socket
 372          */
 373         mz = gpa_zone_reserve(dev, sizeof(struct Vmxnet3_DriverShared),
 374                               "shared", rte_socket_id(), 8);
 375
 376         if (mz == NULL) {
 377                 PMD_INIT_LOG(ERR, "ERROR: Creating shared zone");
 378                 return -ENOMEM;
 379         }
 380         memset(mz->addr, 0, mz->len);
 381
 382         hw->shared = mz->addr;
 383         hw->sharedPA = mz->phys_addr;
 384
 385         /*
 386          * Allocate a memzone for Vmxnet3_RxQueueDesc - Vmxnet3_TxQueueDesc
 387          * on current socket
 388          */
 389         mz = gpa_zone_reserve(dev, size, "queuedesc",
 390                               rte_socket_id(), VMXNET3_QUEUE_DESC_ALIGN);
 391         if (mz == NULL) {
 392                 PMD_INIT_LOG(ERR, "ERROR: Creating queue descriptors zone");
 393                 return -ENOMEM;
 394         }
 395         memset(mz->addr, 0, mz->len);
 396
 397         hw->tqd_start = (Vmxnet3_TxQueueDesc *)mz->addr;
 398         hw->rqd_start = (Vmxnet3_RxQueueDesc *)(hw->tqd_start + hw->num_tx_queues);
 399
 400         hw->queueDescPA = mz->phys_addr;
 401         hw->queue_desc_len = (uint16_t)size;
 402
 403         if (dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 404                 /* Allocate memory structure for UPT1_RSSConf and configure */
 405                 mz = gpa_zone_reserve(dev, sizeof(struct VMXNET3_RSSConf), "rss_conf",
 406                                       rte_socket_id(), RTE_CACHE_LINE_SIZE);
 407                 if (mz == NULL) {
 408                         PMD_INIT_LOG(ERR,
 409                                      "ERROR: Creating rss_conf structure zone");
 410                         return -ENOMEM;
 411                 }
 412                 memset(mz->addr, 0, mz->len);
 413
 414                 hw->rss_conf = mz->addr;
 415                 hw->rss_confPA = mz->phys_addr;
 416         }
 417
 418         return 0;
 419 }
 420
 421 static void
 422 vmxnet3_write_mac(struct vmxnet3_hw *hw, const uint8_t *addr)
 423 {
 424         uint32_t val;
 425
 426         PMD_INIT_LOG(DEBUG,
 427                      "Writing MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
 428                      addr[0], addr[1], addr[2],
 429                      addr[3], addr[4], addr[5]);
 430
 431         val = *(const uint32_t *)addr;
 432         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACL, val);
 433
 434         val = (addr[5] << 8) | addr[4];
 435         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACH, val);
 436 }
 437
 438 static int
 439 vmxnet3_setup_driver_shared(struct rte_eth_dev *dev)
 440 {
 441         struct rte_eth_conf port_conf = dev->data->dev_conf;
 442         struct vmxnet3_hw *hw = dev->data->dev_private;
 443         uint32_t mtu = dev->data->mtu;
 444         Vmxnet3_DriverShared *shared = hw->shared;
 445         Vmxnet3_DSDevRead *devRead = &shared->devRead;
 446         uint32_t i;
 447         int ret;
 448
 449         shared->magic = VMXNET3_REV1_MAGIC;
 450         devRead->misc.driverInfo.version = VMXNET3_DRIVER_VERSION_NUM;
 451
 452         /* Setting up Guest OS information */
 453         devRead->misc.driverInfo.gos.gosBits   = sizeof(void *) == 4 ?
 454                 VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64;
 455         devRead->misc.driverInfo.gos.gosType   = VMXNET3_GOS_TYPE_LINUX;
 456         devRead->misc.driverInfo.vmxnet3RevSpt = 1;
 457         devRead->misc.driverInfo.uptVerSpt     = 1;
 458
 459         devRead->misc.mtu = rte_le_to_cpu_32(mtu);
 460         devRead->misc.queueDescPA  = hw->queueDescPA;
 461         devRead->misc.queueDescLen = hw->queue_desc_len;
 462         devRead->misc.numTxQueues  = hw->num_tx_queues;
 463         devRead->misc.numRxQueues  = hw->num_rx_queues;
 464
 465         /*
 466          * Set number of interrupts to 1
 467          * PMD disables all the interrupts but this is MUST to activate device
 468          * It needs at least one interrupt for link events to handle
 469          * So we'll disable it later after device activation if needed
 470          */
 471         devRead->intrConf.numIntrs = 1;
 472         devRead->intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
 473
 474         for (i = 0; i < hw->num_tx_queues; i++) {
 475                 Vmxnet3_TxQueueDesc *tqd = &hw->tqd_start[i];
 476                 vmxnet3_tx_queue_t *txq  = dev->data->tx_queues[i];
 477
 478                 tqd->ctrl.txNumDeferred  = 0;
 479                 tqd->ctrl.txThreshold    = 1;
 480                 tqd->conf.txRingBasePA   = txq->cmd_ring.basePA;
 481                 tqd->conf.compRingBasePA = txq->comp_ring.basePA;
 482                 tqd->conf.dataRingBasePA = txq->data_ring.basePA;
 483
 484                 tqd->conf.txRingSize   = txq->cmd_ring.size;
 485                 tqd->conf.compRingSize = txq->comp_ring.size;
 486                 tqd->conf.dataRingSize = txq->data_ring.size;
 487                 tqd->conf.intrIdx      = txq->comp_ring.intr_idx;
 488                 tqd->status.stopped    = TRUE;
 489                 tqd->status.error      = 0;
 490                 memset(&tqd->stats, 0, sizeof(tqd->stats));
 491         }
 492
 493         for (i = 0; i < hw->num_rx_queues; i++) {
 494                 Vmxnet3_RxQueueDesc *rqd  = &hw->rqd_start[i];
 495                 vmxnet3_rx_queue_t *rxq   = dev->data->rx_queues[i];
 496
 497                 rqd->conf.rxRingBasePA[0] = rxq->cmd_ring[0].basePA;
 498                 rqd->conf.rxRingBasePA[1] = rxq->cmd_ring[1].basePA;
 499                 rqd->conf.compRingBasePA  = rxq->comp_ring.basePA;
 500
 501                 rqd->conf.rxRingSize[0]   = rxq->cmd_ring[0].size;
 502                 rqd->conf.rxRingSize[1]   = rxq->cmd_ring[1].size;
 503                 rqd->conf.compRingSize    = rxq->comp_ring.size;
 504                 rqd->conf.intrIdx         = rxq->comp_ring.intr_idx;
 505                 rqd->status.stopped       = TRUE;
 506                 rqd->status.error         = 0;
 507                 memset(&rqd->stats, 0, sizeof(rqd->stats));
 508         }
 509
 510         /* RxMode set to 0 of VMXNET3_RXM_xxx */
 511         devRead->rxFilterConf.rxMode = 0;
 512
 513         /* Setting up feature flags */
 514         if (dev->data->dev_conf.rxmode.hw_ip_checksum)
 515                 devRead->misc.uptFeatures |= VMXNET3_F_RXCSUM;
 516
 517         if (port_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 518                 ret = vmxnet3_rss_configure(dev);
 519                 if (ret != VMXNET3_SUCCESS)
 520                         return ret;
 521
 522                 devRead->misc.uptFeatures |= VMXNET3_F_RSS;
 523                 devRead->rssConfDesc.confVer = 1;
 524                 devRead->rssConfDesc.confLen = sizeof(struct VMXNET3_RSSConf);
 525                 devRead->rssConfDesc.confPA  = hw->rss_confPA;
 526         }
 527
 528         vmxnet3_dev_vlan_offload_set(dev,
 529                                      ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK);
 530
 531         vmxnet3_write_mac(hw, hw->perm_addr);
 532
 533         return VMXNET3_SUCCESS;
 534 }
 535
 536 /*
 537  * Configure device link speed and setup link.
 538  * Must be called after eth_vmxnet3_dev_init. Other wise it might fail
 539  * It returns 0 on success.
 540  */
 541 static int
 542 vmxnet3_dev_start(struct rte_eth_dev *dev)
 543 {
 544         int ret;
 545         struct vmxnet3_hw *hw = dev->data->dev_private;
 546
 547         PMD_INIT_FUNC_TRACE();
 548
 549         ret = vmxnet3_setup_driver_shared(dev);
 550         if (ret != VMXNET3_SUCCESS)
 551                 return ret;
 552
 553         /* Exchange shared data with device */
 554         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL,
 555                                VMXNET3_GET_ADDR_LO(hw->sharedPA));
 556         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH,
 557                                VMXNET3_GET_ADDR_HI(hw->sharedPA));
 558
 559         /* Activate device by register write */
 560         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_ACTIVATE_DEV);
 561         ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 562
 563         if (ret != 0) {
 564                 PMD_INIT_LOG(ERR, "Device activation: UNSUCCESSFUL");
 565                 return -EINVAL;
 566         }
 567
 568         /* Disable interrupts */
 569         vmxnet3_disable_intr(hw);
 570
 571         /*
 572          * Load RX queues with blank mbufs and update next2fill index for device
 573          * Update RxMode of the device
 574          */
 575         ret = vmxnet3_dev_rxtx_init(dev);
 576         if (ret != VMXNET3_SUCCESS) {
 577                 PMD_INIT_LOG(ERR, "Device queue init: UNSUCCESSFUL");
 578                 return ret;
 579         }
 580
 581         /* Setting proper Rx Mode and issue Rx Mode Update command */
 582         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_UCAST | VMXNET3_RXM_BCAST, 1);
 583
 584         /*
 585          * Don't need to handle events for now
 586          */
 587 #if PROCESS_SYS_EVENTS == 1
 588         events = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_ECR);
 589         PMD_INIT_LOG(DEBUG, "Reading events: 0x%X", events);
 590         vmxnet3_process_events(hw);
 591 #endif
 592         return VMXNET3_SUCCESS;
 593 }
 594
 595 /*
 596  * Stop device: disable rx and tx functions to allow for reconfiguring.
 597  */
 598 static void
 599 vmxnet3_dev_stop(struct rte_eth_dev *dev)
 600 {
 601         struct rte_eth_link link;
 602         struct vmxnet3_hw *hw = dev->data->dev_private;
 603
 604         PMD_INIT_FUNC_TRACE();
 605
 606         if (hw->adapter_stopped == 1) {
 607                 PMD_INIT_LOG(DEBUG, "Device already closed.");
 608                 return;
 609         }
 610
 611         /* disable interrupts */
 612         vmxnet3_disable_intr(hw);
 613
 614         /* quiesce the device first */
 615         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
 616         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL, 0);
 617         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH, 0);
 618
 619         /* reset the device */
 620         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
 621         PMD_INIT_LOG(DEBUG, "Device reset.");
 622         hw->adapter_stopped = 0;
 623
 624         vmxnet3_dev_clear_queues(dev);
 625
 626         /* Clear recorded link status */
 627         memset(&link, 0, sizeof(link));
 628         vmxnet3_dev_atomic_write_link_status(dev, &link);
 629 }
 630
 631 /*
 632  * Reset and stop device.
 633  */
 634 static void
 635 vmxnet3_dev_close(struct rte_eth_dev *dev)
 636 {
 637         struct vmxnet3_hw *hw = dev->data->dev_private;
 638
 639         PMD_INIT_FUNC_TRACE();
 640
 641         vmxnet3_dev_stop(dev);
 642         hw->adapter_stopped = 1;
 643 }
 644
 645 static void
 646 vmxnet3_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
 647 {
 648         unsigned int i;
 649         struct vmxnet3_hw *hw = dev->data->dev_private;
 650
 651         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
 652
 653         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_TX_QUEUES);
 654         for (i = 0; i < hw->num_tx_queues; i++) {
 655                 struct UPT1_TxStats *txStats = &hw->tqd_start[i].stats;
 656
 657                 stats->q_opackets[i] = txStats->ucastPktsTxOK +
 658                                         txStats->mcastPktsTxOK +
 659                                         txStats->bcastPktsTxOK;
 660                 stats->q_obytes[i] = txStats->ucastBytesTxOK +
 661                                         txStats->mcastBytesTxOK +
 662                                         txStats->bcastBytesTxOK;
 663
 664                 stats->opackets += stats->q_opackets[i];
 665                 stats->obytes += stats->q_obytes[i];
 666                 stats->oerrors += txStats->pktsTxError + txStats->pktsTxDiscard;
 667         }
 668
 669         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_RX_QUEUES);
 670         for (i = 0; i < hw->num_rx_queues; i++) {
 671                 struct UPT1_RxStats *rxStats = &hw->rqd_start[i].stats;
 672
 673                 stats->q_ipackets[i] = rxStats->ucastPktsRxOK +
 674                                         rxStats->mcastPktsRxOK +
 675                                         rxStats->bcastPktsRxOK;
 676
 677                 stats->q_ibytes[i] = rxStats->ucastBytesRxOK +
 678                                         rxStats->mcastBytesRxOK +
 679                                         rxStats->bcastBytesRxOK;
 680
 681                 stats->ipackets += stats->q_ipackets[i];
 682                 stats->ibytes += stats->q_ibytes[i];
 683
 684                 stats->q_errors[i] = rxStats->pktsRxError;
 685                 stats->ierrors += rxStats->pktsRxError;
 686                 stats->rx_nombuf += rxStats->pktsRxOutOfBuf;
 687         }
 688 }
 689
 690 static void
 691 vmxnet3_dev_info_get(__rte_unused struct rte_eth_dev *dev,
 692                      struct rte_eth_dev_info *dev_info)
 693 {
 694         dev_info->max_rx_queues = VMXNET3_MAX_RX_QUEUES;
 695         dev_info->max_tx_queues = VMXNET3_MAX_TX_QUEUES;
 696         dev_info->min_rx_bufsize = 1518 + RTE_PKTMBUF_HEADROOM;
 697         dev_info->max_rx_pktlen = 16384; /* includes CRC, cf MAXFRS register */
 698         dev_info->max_mac_addrs = VMXNET3_MAX_MAC_ADDRS;
 699
 700         dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOXSUMSCTP;
 701         dev_info->flow_type_rss_offloads = VMXNET3_RSS_OFFLOAD_ALL;
 702
 703         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
 704                 .nb_max = VMXNET3_RX_RING_MAX_SIZE,
 705                 .nb_min = VMXNET3_DEF_RX_RING_SIZE,
 706                 .nb_align = 1,
 707         };
 708
 709         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
 710                 .nb_max = VMXNET3_TX_RING_MAX_SIZE,
 711                 .nb_min = VMXNET3_DEF_TX_RING_SIZE,
 712                 .nb_align = 1,
 713         };
 714
 715         dev_info->rx_offload_capa =
 716                 DEV_RX_OFFLOAD_VLAN_STRIP |
 717                 DEV_RX_OFFLOAD_UDP_CKSUM |
 718                 DEV_RX_OFFLOAD_TCP_CKSUM;
 719
 720         dev_info->tx_offload_capa =
 721                 DEV_TX_OFFLOAD_VLAN_INSERT |
 722                 DEV_TX_OFFLOAD_TCP_CKSUM |
 723                 DEV_TX_OFFLOAD_UDP_CKSUM |
 724                 DEV_TX_OFFLOAD_TCP_TSO;
 725 }
 726
 727 static const uint32_t *
 728 vmxnet3_dev_supported_ptypes_get(struct rte_eth_dev *dev)
 729 {
 730         static const uint32_t ptypes[] = {
 731                 RTE_PTYPE_L3_IPV4_EXT,
 732                 RTE_PTYPE_L3_IPV4,
 733                 RTE_PTYPE_UNKNOWN
 734         };
 735
 736         if (dev->rx_pkt_burst == vmxnet3_recv_pkts)
 737                 return ptypes;
 738         return NULL;
 739 }
 740
 741 static void
 742 vmxnet3_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
 743 {
 744         struct vmxnet3_hw *hw = dev->data->dev_private;
 745
 746         vmxnet3_write_mac(hw, mac_addr->addr_bytes);
 747 }
 748
 749 /* return 0 means link status changed, -1 means not changed */
 750 static int
 751 vmxnet3_dev_link_update(struct rte_eth_dev *dev,
 752                         __rte_unused int wait_to_complete)
 753 {
 754         struct vmxnet3_hw *hw = dev->data->dev_private;
 755         struct rte_eth_link old, link;
 756         uint32_t ret;
 757
 758         /* Link status doesn't change for stopped dev */
 759         if (dev->data->dev_started == 0)
 760                 return -1;
 761
 762         memset(&link, 0, sizeof(link));
 763         vmxnet3_dev_atomic_read_link_status(dev, &old);
 764
 765         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
 766         ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 767
 768         if (ret & 0x1) {
 769                 link.link_status = ETH_LINK_UP;
 770                 link.link_duplex = ETH_LINK_FULL_DUPLEX;
 771                 link.link_speed = ETH_SPEED_NUM_10G;
 772                 link.link_autoneg = ETH_LINK_SPEED_FIXED;
 773         }
 774
 775         vmxnet3_dev_atomic_write_link_status(dev, &link);
 776
 777         return (old.link_status == link.link_status) ? -1 : 0;
 778 }
 779
 780 /* Updating rxmode through Vmxnet3_DriverShared structure in adapter */
 781 static void
 782 vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set)
 783 {
 784         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
 785
 786         if (set)
 787                 rxConf->rxMode = rxConf->rxMode | feature;
 788         else
 789                 rxConf->rxMode = rxConf->rxMode & (~feature);
 790
 791         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_UPDATE_RX_MODE);
 792 }
 793
 794 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
 795 static void
 796 vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev)
 797 {
 798         struct vmxnet3_hw *hw = dev->data->dev_private;
 799         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
 800
 801         memset(vf_table, 0, VMXNET3_VFT_TABLE_SIZE);
 802         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 1);
 803
 804         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 805                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
 806 }
 807
 808 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
 809 static void
 810 vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev)
 811 {
 812         struct vmxnet3_hw *hw = dev->data->dev_private;
 813         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
 814
 815         memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
 816         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 0);
 817         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 818                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
 819 }
 820
 821 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
 822 static void
 823 vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev)
 824 {
 825         struct vmxnet3_hw *hw = dev->data->dev_private;
 826
 827         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 1);
 828 }
 829
 830 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
 831 static void
 832 vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev)
 833 {
 834         struct vmxnet3_hw *hw = dev->data->dev_private;
 835
 836         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 0);
 837 }
 838
 839 /* Enable/disable filter on vlan */
 840 static int
 841 vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vid, int on)
 842 {
 843         struct vmxnet3_hw *hw = dev->data->dev_private;
 844         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
 845         uint32_t *vf_table = rxConf->vfTable;
 846
 847         /* save state for restore */
 848         if (on)
 849                 VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, vid);
 850         else
 851                 VMXNET3_CLEAR_VFTABLE_ENTRY(hw->shadow_vfta, vid);
 852
 853         /* don't change active filter if in promiscuous mode */
 854         if (rxConf->rxMode & VMXNET3_RXM_PROMISC)
 855                 return 0;
 856
 857         /* set in hardware */
 858         if (on)
 859                 VMXNET3_SET_VFTABLE_ENTRY(vf_table, vid);
 860         else
 861                 VMXNET3_CLEAR_VFTABLE_ENTRY(vf_table, vid);
 862
 863         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 864                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
 865         return 0;
 866 }
 867
 868 static void
 869 vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask)
 870 {
 871         struct vmxnet3_hw *hw = dev->data->dev_private;
 872         Vmxnet3_DSDevRead *devRead = &hw->shared->devRead;
 873         uint32_t *vf_table = devRead->rxFilterConf.vfTable;
 874
 875         if (mask & ETH_VLAN_STRIP_MASK) {
 876                 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
 877                         devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
 878                 else
 879                         devRead->misc.uptFeatures &= ~UPT1_F_RXVLAN;
 880
 881                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 882                                        VMXNET3_CMD_UPDATE_FEATURE);
 883         }
 884
 885         if (mask & ETH_VLAN_FILTER_MASK) {
 886                 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
 887                         memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
 888                 else
 889                         memset(vf_table, 0xff, VMXNET3_VFT_TABLE_SIZE);
 890
 891                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 892                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
 893         }
 894 }
 895
 896 #if PROCESS_SYS_EVENTS == 1
 897 static void
 898 vmxnet3_process_events(struct vmxnet3_hw *hw)
 899 {
 900         uint32_t events = hw->shared->ecr;
 901
 902         if (!events) {
 903                 PMD_INIT_LOG(ERR, "No events to process");
 904                 return;
 905         }
 906
 907         /*
 908          * ECR bits when written with 1b are cleared. Hence write
 909          * events back to ECR so that the bits which were set will be reset.
 910          */
 911         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_ECR, events);
 912
 913         /* Check if link state has changed */
 914         if (events & VMXNET3_ECR_LINK)
 915                 PMD_INIT_LOG(ERR,
 916                              "Process events in %s(): VMXNET3_ECR_LINK event",
 917                              __func__);
 918
 919         /* Check if there is an error on xmit/recv queues */
 920         if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
 921                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 922                                        VMXNET3_CMD_GET_QUEUE_STATUS);
 923
 924                 if (hw->tqd_start->status.stopped)
 925                         PMD_INIT_LOG(ERR, "tq error 0x%x",
 926                                      hw->tqd_start->status.error);
 927
 928                 if (hw->rqd_start->status.stopped)
 929                         PMD_INIT_LOG(ERR, "rq error 0x%x",
 930                                      hw->rqd_start->status.error);
 931
 932                 /* Reset the device */
 933                 /* Have to reset the device */
 934         }
 935
 936         if (events & VMXNET3_ECR_DIC)
 937                 PMD_INIT_LOG(ERR, "Device implementation change event.");
 938
 939         if (events & VMXNET3_ECR_DEBUG)
 940                 PMD_INIT_LOG(ERR, "Debug event generated by device.");
 941 }
 942 #endif
 943
 944 DRIVER_REGISTER_PCI(net_vmxnet3, rte_vmxnet3_pmd.pci_drv);
 945 DRIVER_REGISTER_PCI_TABLE(net_vmxnet3, pci_id_vmxnet3_map);