drivers/raw/cnxk_bphy/rte_pmd_bphy.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(C) 2021 Marvell.
   3  */
   4
   5 #ifndef _CNXK_BPHY_H_
   6 #define _CNXK_BPHY_H_
   7
   8 #include "cnxk_bphy_irq.h"
   9
  10 enum cnxk_bphy_cgx_msg_type {
  11         CNXK_BPHY_CGX_MSG_TYPE_GET_LINKINFO,
  12         CNXK_BPHY_CGX_MSG_TYPE_INTLBK_DISABLE,
  13         CNXK_BPHY_CGX_MSG_TYPE_INTLBK_ENABLE,
  14         CNXK_BPHY_CGX_MSG_TYPE_PTP_RX_DISABLE,
  15         CNXK_BPHY_CGX_MSG_TYPE_PTP_RX_ENABLE,
  16         CNXK_BPHY_CGX_MSG_TYPE_SET_LINK_MODE,
  17         CNXK_BPHY_CGX_MSG_TYPE_SET_LINK_STATE,
  18         CNXK_BPHY_CGX_MSG_TYPE_START_RXTX,
  19         CNXK_BPHY_CGX_MSG_TYPE_STOP_RXTX,
  20         CNXK_BPHY_CGX_MSG_TYPE_GET_SUPPORTED_FEC,
  21 };
  22
  23 enum cnxk_bphy_cgx_eth_link_speed {
  24         CNXK_BPHY_CGX_ETH_LINK_SPEED_NONE,
  25         CNXK_BPHY_CGX_ETH_LINK_SPEED_10M,
  26         CNXK_BPHY_CGX_ETH_LINK_SPEED_100M,
  27         CNXK_BPHY_CGX_ETH_LINK_SPEED_1G,
  28         CNXK_BPHY_CGX_ETH_LINK_SPEED_2HG,
  29         CNXK_BPHY_CGX_ETH_LINK_SPEED_5G,
  30         CNXK_BPHY_CGX_ETH_LINK_SPEED_10G,
  31         CNXK_BPHY_CGX_ETH_LINK_SPEED_20G,
  32         CNXK_BPHY_CGX_ETH_LINK_SPEED_25G,
  33         CNXK_BPHY_CGX_ETH_LINK_SPEED_40G,
  34         CNXK_BPHY_CGX_ETH_LINK_SPEED_50G,
  35         CNXK_BPHY_CGX_ETH_LINK_SPEED_80G,
  36         CNXK_BPHY_CGX_ETH_LINK_SPEED_100G,
  37         __CNXK_BPHY_CGX_ETH_LINK_SPEED_MAX
  38 };
  39
  40 enum cnxk_bphy_cgx_eth_link_fec {
  41         CNXK_BPHY_CGX_ETH_LINK_FEC_NONE,
  42         CNXK_BPHY_CGX_ETH_LINK_FEC_BASE_R,
  43         CNXK_BPHY_CGX_ETH_LINK_FEC_RS,
  44         __CNXK_BPHY_CGX_ETH_LINK_FEC_MAX
  45 };
  46
  47 enum cnxk_bphy_cgx_eth_link_mode {
  48         CNXK_BPHY_CGX_ETH_LINK_MODE_SGMII_BIT,
  49         CNXK_BPHY_CGX_ETH_LINK_MODE_1000_BASEX_BIT,
  50         CNXK_BPHY_CGX_ETH_LINK_MODE_QSGMII_BIT,
  51         CNXK_BPHY_CGX_ETH_LINK_MODE_10G_C2C_BIT,
  52         CNXK_BPHY_CGX_ETH_LINK_MODE_10G_C2M_BIT,
  53         CNXK_BPHY_CGX_ETH_LINK_MODE_10G_KR_BIT,
  54         CNXK_BPHY_CGX_ETH_LINK_MODE_20G_C2C_BIT,
  55         CNXK_BPHY_CGX_ETH_LINK_MODE_25G_C2C_BIT,
  56         CNXK_BPHY_CGX_ETH_LINK_MODE_25G_C2M_BIT,
  57         CNXK_BPHY_CGX_ETH_LINK_MODE_25G_2_C2C_BIT,
  58         CNXK_BPHY_CGX_ETH_LINK_MODE_25G_CR_BIT,
  59         CNXK_BPHY_CGX_ETH_LINK_MODE_25G_KR_BIT,
  60         CNXK_BPHY_CGX_ETH_LINK_MODE_40G_C2C_BIT,
  61         CNXK_BPHY_CGX_ETH_LINK_MODE_40G_C2M_BIT,
  62         CNXK_BPHY_CGX_ETH_LINK_MODE_40G_CR4_BIT,
  63         CNXK_BPHY_CGX_ETH_LINK_MODE_40G_KR4_BIT,
  64         CNXK_BPHY_CGX_ETH_LINK_MODE_40GAUI_C2C_BIT,
  65         CNXK_BPHY_CGX_ETH_LINK_MODE_50G_C2C_BIT,
  66         CNXK_BPHY_CGX_ETH_LINK_MODE_50G_C2M_BIT,
  67         CNXK_BPHY_CGX_ETH_LINK_MODE_50G_4_C2C_BIT,
  68         CNXK_BPHY_CGX_ETH_LINK_MODE_50G_CR_BIT,
  69         CNXK_BPHY_CGX_ETH_LINK_MODE_50G_KR_BIT,
  70         CNXK_BPHY_CGX_ETH_LINK_MODE_80GAUI_C2C_BIT,
  71         CNXK_BPHY_CGX_ETH_LINK_MODE_100G_C2C_BIT,
  72         CNXK_BPHY_CGX_ETH_LINK_MODE_100G_C2M_BIT,
  73         CNXK_BPHY_CGX_ETH_LINK_MODE_100G_CR4_BIT,
  74         CNXK_BPHY_CGX_ETH_LINK_MODE_100G_KR4_BIT,
  75         __CNXK_BPHY_CGX_ETH_LINK_MODE_MAX
  76 };
  77
  78 struct cnxk_bphy_cgx_msg_link_mode {
  79         bool full_duplex;
  80         bool autoneg;
  81         enum cnxk_bphy_cgx_eth_link_speed speed;
  82         enum cnxk_bphy_cgx_eth_link_mode mode;
  83 };
  84
  85 struct cnxk_bphy_cgx_msg_link_info {
  86         bool link_up;
  87         bool full_duplex;
  88         enum cnxk_bphy_cgx_eth_link_speed speed;
  89         bool autoneg;
  90         enum cnxk_bphy_cgx_eth_link_fec fec;
  91         enum cnxk_bphy_cgx_eth_link_mode mode;
  92 };
  93
  94 struct cnxk_bphy_cgx_msg_set_link_state {
  95         bool state; /* up or down */
  96 };
  97
  98 struct cnxk_bphy_cgx_msg {
  99         enum cnxk_bphy_cgx_msg_type type;
 100         /*
 101          * data depends on message type and whether
 102          * it's a request or a response
 103          */
 104         void *data;
 105 };
 106
 107 #define cnxk_bphy_mem       bphy_mem
 108 #define CNXK_BPHY_DEF_QUEUE 0
 109
 110 enum cnxk_bphy_irq_msg_type {
 111         CNXK_BPHY_IRQ_MSG_TYPE_INIT,
 112         CNXK_BPHY_IRQ_MSG_TYPE_FINI,
 113         CNXK_BPHY_IRQ_MSG_TYPE_REGISTER,
 114         CNXK_BPHY_IRQ_MSG_TYPE_UNREGISTER,
 115         CNXK_BPHY_IRQ_MSG_TYPE_MEM_GET,
 116 };
 117
 118 struct cnxk_bphy_irq_msg {
 119         enum cnxk_bphy_irq_msg_type type;
 120         /*
 121          * The data field, depending on message type, may point to
 122          * - (enq) full struct cnxk_bphy_irq_info for registration request
 123          * - (enq) struct cnxk_bphy_irq_info with irq_num set for unregistration
 124          * - (deq) struct cnxk_bphy_mem for memory range request response
 125          * - (xxx) NULL
 126          */
 127         void *data;
 128 };
 129
 130 struct cnxk_bphy_irq_info {
 131         int irq_num;
 132         cnxk_bphy_intr_handler_t handler;
 133         void *data;
 134         int cpu;
 135 };
 136
 137 static __rte_always_inline int
 138 rte_pmd_bphy_intr_init(uint16_t dev_id)
 139 {
 140         struct cnxk_bphy_irq_msg msg = {
 141                 .type = CNXK_BPHY_IRQ_MSG_TYPE_INIT,
 142         };
 143         struct rte_rawdev_buf *bufs[1];
 144         struct rte_rawdev_buf buf;
 145
 146         buf.buf_addr = &msg;
 147         bufs[0] = &buf;
 148
 149         return rte_rawdev_enqueue_buffers(dev_id, bufs, 1, CNXK_BPHY_DEF_QUEUE);
 150 }
 151
 152 static __rte_always_inline void
 153 rte_pmd_bphy_intr_fini(uint16_t dev_id)
 154 {
 155         struct cnxk_bphy_irq_msg msg = {
 156                 .type = CNXK_BPHY_IRQ_MSG_TYPE_FINI,
 157         };
 158         struct rte_rawdev_buf *bufs[1];
 159         struct rte_rawdev_buf buf;
 160
 161         buf.buf_addr = &msg;
 162         bufs[0] = &buf;
 163
 164         rte_rawdev_enqueue_buffers(dev_id, bufs, 1, CNXK_BPHY_DEF_QUEUE);
 165 }
 166
 167 static __rte_always_inline int
 168 rte_pmd_bphy_intr_register(uint16_t dev_id, int irq_num,
 169                            cnxk_bphy_intr_handler_t handler, void *data,
 170                            int cpu)
 171 {
 172         struct cnxk_bphy_irq_info info = {
 173                 .irq_num = irq_num,
 174                 .handler = handler,
 175                 .data = data,
 176                 .cpu = cpu,
 177         };
 178         struct cnxk_bphy_irq_msg msg = {
 179                 .type = CNXK_BPHY_IRQ_MSG_TYPE_REGISTER,
 180                 .data = &info
 181         };
 182         struct rte_rawdev_buf *bufs[1];
 183         struct rte_rawdev_buf buf;
 184
 185         buf.buf_addr = &msg;
 186         bufs[0] = &buf;
 187
 188         return rte_rawdev_enqueue_buffers(dev_id, bufs, 1, CNXK_BPHY_DEF_QUEUE);
 189 }
 190
 191 static __rte_always_inline void
 192 rte_pmd_bphy_intr_unregister(uint16_t dev_id, int irq_num)
 193 {
 194         struct cnxk_bphy_irq_info info = {
 195                 .irq_num = irq_num,
 196         };
 197         struct cnxk_bphy_irq_msg msg = {
 198                 .type = CNXK_BPHY_IRQ_MSG_TYPE_UNREGISTER,
 199                 .data = &info
 200         };
 201         struct rte_rawdev_buf *bufs[1];
 202         struct rte_rawdev_buf buf;
 203
 204         buf.buf_addr = &msg;
 205         bufs[0] = &buf;
 206
 207         rte_rawdev_enqueue_buffers(dev_id, bufs, 1, 0);
 208 }
 209
 210 static __rte_always_inline struct cnxk_bphy_mem *
 211 rte_pmd_bphy_intr_mem_get(uint16_t dev_id)
 212 {
 213         struct cnxk_bphy_irq_msg msg = {
 214                 .type = CNXK_BPHY_IRQ_MSG_TYPE_MEM_GET,
 215         };
 216         struct rte_rawdev_buf *bufs[1];
 217         struct rte_rawdev_buf buf;
 218         int ret;
 219
 220         buf.buf_addr = &msg;
 221         bufs[0] = &buf;
 222
 223         ret = rte_rawdev_enqueue_buffers(dev_id, bufs, 1, CNXK_BPHY_DEF_QUEUE);
 224         if (ret)
 225                 return NULL;
 226
 227         ret = rte_rawdev_dequeue_buffers(dev_id, bufs, 1, CNXK_BPHY_DEF_QUEUE);
 228         if (ret)
 229                 return NULL;
 230
 231         return buf.buf_addr;
 232 }
 233
 234 #endif /* _CNXK_BPHY_H_ */