1 /* SPDX-License-Identifier: BSD-3-Clause
5 #ifndef __DPAA2_QDMA_H__
6 #define __DPAA2_QDMA_H__
9 * Represents a QDMA device.
10 * A single QDMA device exists which is combination of multiple DPDMAI rawdev's.
13 /** total number of hw queues. */
14 uint16_t num_hw_queues;
16 * Maximum number of hw queues to be alocated per core.
17 * This is limited by MAX_HW_QUEUE_PER_CORE
19 uint16_t max_hw_queues_per_core;
20 /** Maximum number of VQ's */
22 /** mode of operation - physical(h/w) or virtual */
24 /** Device state - started or stopped */
26 /** FLE pool for the device */
27 struct rte_mempool *fle_pool;
30 /** A lock to QDMA device whenever required */
34 /** Represents a QDMA H/W queue */
35 struct qdma_hw_queue {
36 /** Pointer to Next instance */
37 TAILQ_ENTRY(qdma_hw_queue) next;
38 /** DPDMAI device to communicate with HW */
39 struct dpaa2_dpdmai_dev *dpdmai_dev;
40 /** queue ID to communicate with HW */
42 /** Associated lcore id */
44 /** Number of users of this hw queue */
48 /** Represents a DPDMAI raw device */
49 struct dpaa2_dpdmai_dev {
50 /** Pointer to Next device instance */
51 TAILQ_ENTRY(dpaa2_qdma_device) next;
52 /** handle to DPDMAI object */
53 struct fsl_mc_io dpdmai;
54 /** HW ID for DPDMAI object */
56 /** Tocken of this device */
58 /** Number of queue in this DPDMAI device */
61 struct dpaa2_queue rx_queue[DPDMAI_PRIO_NUM];
63 struct dpaa2_queue tx_queue[DPDMAI_PRIO_NUM];
66 #endif /* __DPAA2_QDMA_H__ */