1 /* SPDX-License-Identifier: BSD-3-Clause
5 #ifndef __DPAA2_QDMA_H__
6 #define __DPAA2_QDMA_H__
11 #define DPAA2_QDMA_MAX_FLE 3
12 #define DPAA2_QDMA_MAX_SDD 2
14 /** FLE pool size: 3 Frame list + 2 source/destination descriptor */
15 #define QDMA_FLE_POOL_SIZE (sizeof(struct qdma_io_meta) + \
16 sizeof(struct qbman_fle) * DPAA2_QDMA_MAX_FLE + \
17 sizeof(struct qdma_sdd) * DPAA2_QDMA_MAX_SDD)
18 /** FLE pool cache size */
19 #define QDMA_FLE_CACHE_SIZE(_num) (_num/(RTE_MAX_LCORE * 2))
21 /** Maximum possible H/W Queues on each core */
22 #define MAX_HW_QUEUE_PER_CORE 64
25 * Represents a QDMA device.
26 * A single QDMA device exists which is combination of multiple DPDMAI rawdev's.
29 /** total number of hw queues. */
30 uint16_t num_hw_queues;
32 * Maximum number of hw queues to be alocated per core.
33 * This is limited by MAX_HW_QUEUE_PER_CORE
35 uint16_t max_hw_queues_per_core;
36 /** Maximum number of VQ's */
38 /** mode of operation - physical(h/w) or virtual */
40 /** Device state - started or stopped */
42 /** FLE pool for the device */
43 struct rte_mempool *fle_pool;
46 /** A lock to QDMA device whenever required */
50 /** Represents a QDMA H/W queue */
51 struct qdma_hw_queue {
52 /** Pointer to Next instance */
53 TAILQ_ENTRY(qdma_hw_queue) next;
54 /** DPDMAI device to communicate with HW */
55 struct dpaa2_dpdmai_dev *dpdmai_dev;
56 /** queue ID to communicate with HW */
58 /** Associated lcore id */
60 /** Number of users of this hw queue */
64 /** Represents a QDMA virtual queue */
65 struct qdma_virt_queue {
66 /** Status ring of the virtual queue */
67 struct rte_ring *status_ring;
68 /** Associated hw queue */
69 struct qdma_hw_queue *hw_queue;
70 /** Associated lcore id */
72 /** States if this vq is in use or not */
74 /** States if this vq has exclusively associated hw queue */
75 uint8_t exclusive_hw_queue;
76 /* Total number of enqueues on this VQ */
77 uint64_t num_enqueues;
78 /* Total number of dequeues from this VQ */
79 uint64_t num_dequeues;
82 /** Represents a QDMA per core hw queues allocation in virtual mode */
83 struct qdma_per_core_info {
84 /** list for allocated hw queues */
85 struct qdma_hw_queue *hw_queues[MAX_HW_QUEUE_PER_CORE];
86 /* Number of hw queues allocated for this core */
87 uint16_t num_hw_queues;
90 /** Metadata which is stored with each operation */
93 * Context which is stored in the FLE pool (just before the FLE).
94 * QDMA job is stored as a this context as a part of metadata.
97 /** VQ ID is stored as a part of metadata of the enqueue command */
101 /** Source/Destination Descriptor */
104 /** Stride configuration */
106 /** Route-by-port command */
109 } __attribute__((__packed__));
111 /** Represents a DPDMAI raw device */
112 struct dpaa2_dpdmai_dev {
113 /** Pointer to Next device instance */
114 TAILQ_ENTRY(dpaa2_qdma_device) next;
115 /** handle to DPDMAI object */
116 struct fsl_mc_io dpdmai;
117 /** HW ID for DPDMAI object */
119 /** Tocken of this device */
121 /** Number of queue in this DPDMAI device */
124 struct dpaa2_queue rx_queue[DPDMAI_PRIO_NUM];
126 struct dpaa2_queue tx_queue[DPDMAI_PRIO_NUM];
129 #endif /* __DPAA2_QDMA_H__ */