1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2020 Mellanox Technologies, Ltd
8 #include <rte_regexdev.h>
10 #include <infiniband/verbs.h>
11 #include <infiniband/mlx5dv.h>
13 #include <mlx5_common.h>
14 #include <mlx5_common_mr.h>
15 #include <mlx5_common_devx.h>
19 struct mlx5_regex_sq {
20 uint16_t log_nb_desc; /* Log 2 number of desc for this object. */
21 struct mlx5_devx_obj *obj; /* The SQ DevX object. */
22 int64_t dbr_offset; /* Door bell record offset. */
23 uint32_t dbr_umem; /* Door bell record umem id. */
24 uint8_t *wqe; /* The SQ ring buffer. */
25 struct mlx5dv_devx_umem *wqe_umem; /* SQ buffer umem. */
32 struct mlx5_regex_cq {
33 uint32_t log_nb_desc; /* Log 2 number of desc for this object. */
34 struct mlx5_devx_cq cq_obj; /* The CQ DevX object. */
38 struct mlx5_regex_qp {
39 uint32_t flags; /* QP user flags. */
40 uint32_t nb_desc; /* Total number of desc for this qp. */
41 struct mlx5_regex_sq *sqs; /* Pointer to sq array. */
42 uint16_t nb_obj; /* Number of sq objects. */
43 struct mlx5_regex_cq cq; /* CQ struct. */
45 struct mlx5_regex_job *jobs;
46 struct ibv_mr *metadata;
47 struct ibv_mr *outputs;
49 struct mlx5_mr_ctrl mr_ctrl;
52 struct mlx5_regex_db {
53 void *ptr; /* Pointer to the db memory. */
54 uint32_t len; /* The memory len. */
55 bool active; /* Active flag. */
56 uint8_t db_assigned_to_eng_num;
57 /**< To which engine the db is connected. */
58 struct mlx5_regex_umem umem;
59 /**< The umem struct. */
62 struct mlx5_regex_priv {
63 TAILQ_ENTRY(mlx5_regex_priv) next;
64 struct ibv_context *ctx; /* Device context. */
65 struct rte_pci_device *pci_dev;
66 struct rte_regexdev *regexdev; /* Pointer to the RegEx dev. */
67 uint16_t nb_queues; /* Number of queues. */
68 struct mlx5_regex_qp *qps; /* Pointer to the qp array. */
69 uint16_t nb_max_matches; /* Max number of matches. */
70 enum mlx5_rxp_program_mode prog_mode;
71 struct mlx5_regex_db db[MLX5_RXP_MAX_ENGINES +
73 uint32_t nb_engines; /* Number of RegEx engines. */
74 struct mlx5dv_devx_uar *uar; /* UAR object. */
76 struct mlx5_dbr_page_list dbrpgs; /* Door-bell pages. */
77 struct mlx5_mr_share_cache mr_scache; /* Global shared MR cache. */
81 int mlx5_regex_start(struct rte_regexdev *dev);
82 int mlx5_regex_stop(struct rte_regexdev *dev);
83 int mlx5_regex_close(struct rte_regexdev *dev);
86 int mlx5_regex_info_get(struct rte_regexdev *dev,
87 struct rte_regexdev_info *info);
88 int mlx5_regex_configure(struct rte_regexdev *dev,
89 const struct rte_regexdev_config *cfg);
90 int mlx5_regex_rules_db_import(struct rte_regexdev *dev,
91 const char *rule_db, uint32_t rule_db_len);
93 /* mlx5_regex_devx.c */
94 int mlx5_devx_regex_register_write(struct ibv_context *ctx, int engine_id,
95 uint32_t addr, uint32_t data);
96 int mlx5_devx_regex_register_read(struct ibv_context *ctx, int engine_id,
97 uint32_t addr, uint32_t *data);
98 int mlx5_devx_regex_database_stop(void *ctx, uint8_t engine);
99 int mlx5_devx_regex_database_resume(void *ctx, uint8_t engine);
100 int mlx5_devx_regex_database_program(void *ctx, uint8_t engine,
101 uint32_t umem_id, uint64_t umem_offset);
103 /* mlx5_regex_control.c */
104 int mlx5_regex_qp_setup(struct rte_regexdev *dev, uint16_t qp_ind,
105 const struct rte_regexdev_qp_conf *cfg);
107 /* mlx5_regex_fastpath.c */
108 int mlx5_regexdev_setup_fastpath(struct mlx5_regex_priv *priv, uint32_t qp_id);
109 void mlx5_regexdev_teardown_fastpath(struct mlx5_regex_priv *priv,
111 uint16_t mlx5_regexdev_enqueue(struct rte_regexdev *dev, uint16_t qp_id,
112 struct rte_regex_ops **ops, uint16_t nb_ops);
113 uint16_t mlx5_regexdev_dequeue(struct rte_regexdev *dev, uint16_t qp_id,
114 struct rte_regex_ops **ops, uint16_t nb_ops);
116 #endif /* MLX5_REGEX_H */