1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2019 Mellanox Technologies, Ltd
8 #include <rte_malloc.h>
12 #include <mlx5_common.h>
14 #include "mlx5_vdpa_utils.h"
15 #include "mlx5_vdpa.h"
19 mlx5_vdpa_virtq_handler(void *cb_arg)
21 struct mlx5_vdpa_virtq *virtq = cb_arg;
22 struct mlx5_vdpa_priv *priv = virtq->priv;
27 nbytes = read(virtq->intr_handle.fd, &buf, 8);
30 errno == EWOULDBLOCK ||
33 DRV_LOG(ERR, "Failed to read kickfd of virtq %d: %s",
34 virtq->index, strerror(errno));
38 rte_write32(virtq->index, priv->virtq_db_addr);
39 DRV_LOG(DEBUG, "Ring virtq %u doorbell.", virtq->index);
43 mlx5_vdpa_virtq_unset(struct mlx5_vdpa_virtq *virtq)
46 int retries = MLX5_VDPA_INTR_RETRIES;
49 if (virtq->intr_handle.fd != -1) {
50 while (retries-- && ret == -EAGAIN) {
51 ret = rte_intr_callback_unregister(&virtq->intr_handle,
52 mlx5_vdpa_virtq_handler,
55 DRV_LOG(DEBUG, "Try again to unregister fd %d "
56 "of virtq %d interrupt, retries = %d.",
57 virtq->intr_handle.fd,
58 (int)virtq->index, retries);
59 usleep(MLX5_VDPA_INTR_RETRIES_USEC);
64 claim_zero(mlx5_devx_cmd_destroy(virtq->virtq));
65 for (i = 0; i < RTE_DIM(virtq->umems); ++i) {
66 if (virtq->umems[i].obj)
67 claim_zero(mlx5_glue->devx_umem_dereg
68 (virtq->umems[i].obj));
69 if (virtq->umems[i].buf)
70 rte_free(virtq->umems[i].buf);
73 mlx5_vdpa_event_qp_destroy(&virtq->eqp);
74 memset(virtq, 0, sizeof(*virtq));
75 virtq->intr_handle.fd = -1;
80 mlx5_vdpa_virtqs_release(struct mlx5_vdpa_priv *priv)
84 for (i = 0; i < priv->nr_virtqs; i++)
85 mlx5_vdpa_virtq_unset(&priv->virtqs[i]);
87 claim_zero(mlx5_devx_cmd_destroy(priv->tis));
91 claim_zero(mlx5_devx_cmd_destroy(priv->td));
94 if (priv->virtq_db_addr) {
95 claim_zero(munmap(priv->virtq_db_addr, priv->var->length));
96 priv->virtq_db_addr = NULL;
103 mlx5_vdpa_virtq_modify(struct mlx5_vdpa_virtq *virtq, int state)
105 struct mlx5_devx_virtq_attr attr = {
106 .type = MLX5_VIRTQ_MODIFY_TYPE_STATE,
107 .state = state ? MLX5_VIRTQ_STATE_RDY :
108 MLX5_VIRTQ_STATE_SUSPEND,
109 .queue_index = virtq->index,
112 return mlx5_devx_cmd_modify_virtq(virtq->virtq, &attr);
116 mlx5_vdpa_hva_to_gpa(struct rte_vhost_memory *mem, uint64_t hva)
118 struct rte_vhost_mem_region *reg;
122 for (i = 0; i < mem->nregions; i++) {
123 reg = &mem->regions[i];
124 if (hva >= reg->host_user_addr &&
125 hva < reg->host_user_addr + reg->size) {
126 gpa = hva - reg->host_user_addr + reg->guest_phys_addr;
134 mlx5_vdpa_virtq_setup(struct mlx5_vdpa_priv *priv, int index)
136 struct mlx5_vdpa_virtq *virtq = &priv->virtqs[index];
137 struct rte_vhost_vring vq;
138 struct mlx5_devx_virtq_attr attr = {0};
142 uint16_t last_avail_idx;
143 uint16_t last_used_idx;
145 ret = rte_vhost_get_vhost_vring(priv->vid, index, &vq);
148 virtq->index = index;
149 virtq->vq_size = vq.size;
150 attr.tso_ipv4 = !!(priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO4));
151 attr.tso_ipv6 = !!(priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO6));
152 attr.tx_csum = !!(priv->features & (1ULL << VIRTIO_NET_F_CSUM));
153 attr.rx_csum = !!(priv->features & (1ULL << VIRTIO_NET_F_GUEST_CSUM));
154 attr.virtio_version_1_0 = !!(priv->features & (1ULL <<
155 VIRTIO_F_VERSION_1));
156 attr.type = (priv->features & (1ULL << VIRTIO_F_RING_PACKED)) ?
157 MLX5_VIRTQ_TYPE_PACKED : MLX5_VIRTQ_TYPE_SPLIT;
159 * No need event QPs creation when the guest in poll mode or when the
160 * capability allows it.
162 attr.event_mode = vq.callfd != -1 || !(priv->caps.event_mode & (1 <<
163 MLX5_VIRTQ_EVENT_MODE_NO_MSIX)) ?
164 MLX5_VIRTQ_EVENT_MODE_QP :
165 MLX5_VIRTQ_EVENT_MODE_NO_MSIX;
166 if (attr.event_mode == MLX5_VIRTQ_EVENT_MODE_QP) {
167 ret = mlx5_vdpa_event_qp_create(priv, vq.size, vq.callfd,
170 DRV_LOG(ERR, "Failed to create event QPs for virtq %d.",
174 attr.qp_id = virtq->eqp.fw_qp->id;
176 DRV_LOG(INFO, "Virtq %d is, for sure, working by poll mode, no"
177 " need event QPs and event mechanism.", index);
179 /* Setup 3 UMEMs for each virtq. */
180 for (i = 0; i < RTE_DIM(virtq->umems); ++i) {
181 virtq->umems[i].size = priv->caps.umems[i].a * vq.size +
182 priv->caps.umems[i].b;
183 virtq->umems[i].buf = rte_zmalloc(__func__,
184 virtq->umems[i].size, 4096);
185 if (!virtq->umems[i].buf) {
186 DRV_LOG(ERR, "Cannot allocate umem %d memory for virtq"
190 virtq->umems[i].obj = mlx5_glue->devx_umem_reg(priv->ctx,
192 virtq->umems[i].size,
193 IBV_ACCESS_LOCAL_WRITE);
194 if (!virtq->umems[i].obj) {
195 DRV_LOG(ERR, "Failed to register umem %d for virtq %u.",
199 attr.umems[i].id = virtq->umems[i].obj->umem_id;
200 attr.umems[i].offset = 0;
201 attr.umems[i].size = virtq->umems[i].size;
203 if (attr.type == MLX5_VIRTQ_TYPE_SPLIT) {
204 gpa = mlx5_vdpa_hva_to_gpa(priv->vmem,
205 (uint64_t)(uintptr_t)vq.desc);
207 DRV_LOG(ERR, "Failed to get descriptor ring GPA.");
210 attr.desc_addr = gpa;
211 gpa = mlx5_vdpa_hva_to_gpa(priv->vmem,
212 (uint64_t)(uintptr_t)vq.used);
214 DRV_LOG(ERR, "Failed to get GPA for used ring.");
217 attr.used_addr = gpa;
218 gpa = mlx5_vdpa_hva_to_gpa(priv->vmem,
219 (uint64_t)(uintptr_t)vq.avail);
221 DRV_LOG(ERR, "Failed to get GPA for available ring.");
224 attr.available_addr = gpa;
226 ret = rte_vhost_get_vring_base(priv->vid, index, &last_avail_idx,
231 DRV_LOG(WARNING, "Couldn't get vring base, idx are set to 0");
233 DRV_LOG(INFO, "vid %d: Init last_avail_idx=%d, last_used_idx=%d for "
234 "virtq %d.", priv->vid, last_avail_idx,
235 last_used_idx, index);
237 attr.hw_available_index = last_avail_idx;
238 attr.hw_used_index = last_used_idx;
239 attr.q_size = vq.size;
240 attr.mkey = priv->gpa_mkey_index;
241 attr.tis_id = priv->tis->id;
242 attr.queue_index = index;
243 virtq->virtq = mlx5_devx_cmd_create_virtq(priv->ctx, &attr);
247 if (mlx5_vdpa_virtq_modify(virtq, 1))
251 /* Be sure notifications are not missed during configuration. */
252 claim_zero(rte_vhost_enable_guest_notification(priv->vid, index, 1));
253 rte_write32(virtq->index, priv->virtq_db_addr);
254 /* Setup doorbell mapping. */
255 virtq->intr_handle.fd = vq.kickfd;
256 if (virtq->intr_handle.fd == -1) {
257 DRV_LOG(WARNING, "Virtq %d kickfd is invalid.", index);
258 if (!priv->direct_notifier) {
259 DRV_LOG(ERR, "Virtq %d cannot be notified.", index);
263 virtq->intr_handle.type = RTE_INTR_HANDLE_EXT;
264 if (rte_intr_callback_register(&virtq->intr_handle,
265 mlx5_vdpa_virtq_handler,
267 virtq->intr_handle.fd = -1;
268 DRV_LOG(ERR, "Failed to register virtq %d interrupt.",
272 DRV_LOG(DEBUG, "Register fd %d interrupt for virtq %d.",
273 virtq->intr_handle.fd, index);
278 mlx5_vdpa_virtq_unset(virtq);
283 mlx5_vdpa_features_validate(struct mlx5_vdpa_priv *priv)
285 if (priv->features & (1ULL << VIRTIO_F_RING_PACKED)) {
286 if (!(priv->caps.virtio_queue_type & (1 <<
287 MLX5_VIRTQ_TYPE_PACKED))) {
288 DRV_LOG(ERR, "Failed to configur PACKED mode for vdev "
289 "%d - it was not reported by HW/driver"
290 " capability.", priv->vid);
294 if (priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO4)) {
295 if (!priv->caps.tso_ipv4) {
296 DRV_LOG(ERR, "Failed to enable TSO4 for vdev %d - TSO4"
297 " was not reported by HW/driver capability.",
302 if (priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO6)) {
303 if (!priv->caps.tso_ipv6) {
304 DRV_LOG(ERR, "Failed to enable TSO6 for vdev %d - TSO6"
305 " was not reported by HW/driver capability.",
310 if (priv->features & (1ULL << VIRTIO_NET_F_CSUM)) {
311 if (!priv->caps.tx_csum) {
312 DRV_LOG(ERR, "Failed to enable CSUM for vdev %d - CSUM"
313 " was not reported by HW/driver capability.",
318 if (priv->features & (1ULL << VIRTIO_NET_F_GUEST_CSUM)) {
319 if (!priv->caps.rx_csum) {
320 DRV_LOG(ERR, "Failed to enable GUEST CSUM for vdev %d"
321 " GUEST CSUM was not reported by HW/driver "
322 "capability.", priv->vid);
326 if (priv->features & (1ULL << VIRTIO_F_VERSION_1)) {
327 if (!priv->caps.virtio_version_1_0) {
328 DRV_LOG(ERR, "Failed to enable version 1 for vdev %d "
329 "version 1 was not reported by HW/driver"
330 " capability.", priv->vid);
338 mlx5_vdpa_virtqs_prepare(struct mlx5_vdpa_priv *priv)
340 struct mlx5_devx_tis_attr tis_attr = {0};
342 uint16_t nr_vring = rte_vhost_get_vring_num(priv->vid);
343 int ret = rte_vhost_get_negotiated_features(priv->vid, &priv->features);
345 if (ret || mlx5_vdpa_features_validate(priv)) {
346 DRV_LOG(ERR, "Failed to configure negotiated features.");
349 if (nr_vring > priv->caps.max_num_virtio_queues * 2) {
350 DRV_LOG(ERR, "Do not support more than %d virtqs(%d).",
351 (int)priv->caps.max_num_virtio_queues * 2,
355 /* Always map the entire page. */
356 priv->virtq_db_addr = mmap(NULL, priv->var->length, PROT_READ |
357 PROT_WRITE, MAP_SHARED, priv->ctx->cmd_fd,
358 priv->var->mmap_off);
359 if (priv->virtq_db_addr == MAP_FAILED) {
360 DRV_LOG(ERR, "Failed to map doorbell page %u.", errno);
361 priv->virtq_db_addr = NULL;
364 DRV_LOG(DEBUG, "VAR address of doorbell mapping is %p.",
365 priv->virtq_db_addr);
367 priv->td = mlx5_devx_cmd_create_td(priv->ctx);
369 DRV_LOG(ERR, "Failed to create transport domain.");
372 tis_attr.transport_domain = priv->td->id;
373 priv->tis = mlx5_devx_cmd_create_tis(priv->ctx, &tis_attr);
375 DRV_LOG(ERR, "Failed to create TIS.");
378 priv->nr_virtqs = nr_vring;
379 for (i = 0; i < nr_vring; i++)
380 if (mlx5_vdpa_virtq_setup(priv, i))
384 mlx5_vdpa_virtqs_release(priv);